From 42883e7b6ac84d2abe06442f5e55373efd65cfe8 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 21 Dec 2006 15:28:32 +0000 Subject: [PATCH] Fix * with filenames < 8 characters git-svn-id: file://localhost/svn/verilator/trunk/verilator@859 77ca24e4-aefa-0310-84f0-b9a241c72d87 --- Changes | 2 ++ include/verilated.cpp | 4 +-- src/V3EmitC.cpp | 6 +++-- test_regress/t/t_sys_file.v | 6 +++++ test_regress/t/t_sys_readmem_b_8.mem | 40 +++++++++++++++------------- 5 files changed, 35 insertions(+), 23 deletions(-) diff --git a/Changes b/Changes index f88ff7bc1..9c4368051 100644 --- a/Changes +++ b/Changes @@ -9,6 +9,8 @@ indicates the contributor was also the author of the fix; Thanks! Verilator no longer accepts duplicated variables inside unique generate blocks as this is illegal according to the specification. +**** Fix $readmem* with filenames < 8 characters. [Emerson Suguimoto] + * Verilator 3.630 12/19/2006 ** Support $readmemb and $readmemh. [Eugene Weber, Arthur Kahlich] diff --git a/include/verilated.cpp b/include/verilated.cpp index 936aada41..f1f4ef746 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -242,7 +242,7 @@ QData VL_FOPEN_WI(int fnwords, WDataInP filenamep, IData mode) { void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int, QData ofilename, void* memp, IData start, IData end) { IData fnw[2]; VL_SET_WQ(fnw, ofilename); - return VL_READMEM_W(hex,2,width,depth,array_lsb, fnw,memp,start,end); + return VL_READMEM_W(hex,width,depth,array_lsb,2, fnw,memp,start,end); } void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, @@ -257,7 +257,7 @@ void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, } // Prep for reading IData addr = start; - int linenum = 0; + int linenum = 1; bool innum = false; bool ignore_to_eol = false; bool ignore_to_cmt = false; diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index f6e3bfb80..db6c8fdca 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -239,11 +239,13 @@ public: emitIQW(nodep->modep()); if (nodep->modep()->width()>4*8) nodep->modep()->v3error("$fopen mode should be <= 4 characters"); puts("("); - if (nodep->filenamep()->isWide()) puts(cvtToStr(nodep->filenamep()->widthWords())); + if (nodep->filenamep()->isWide()) { + puts(cvtToStr(nodep->filenamep()->widthWords())); + putbs(", "); + } if (nodep->filenamep()->widthWords() > VL_TO_STRING_MAX_WORDS) { nodep->v3error("String of "<filenamep()->width()<<" bits exceeds hardcoded limit VL_TO_STRING_MAX_WORDS in verilatedos.h\n"); } - putbs(", "); nodep->filenamep()->iterateAndNext(*this); putbs(", "); nodep->modep()->iterateAndNext(*this); diff --git a/test_regress/t/t_sys_file.v b/test_regress/t/t_sys_file.v index 21439e859..23f98b01a 100644 --- a/test_regress/t/t_sys_file.v +++ b/test_regress/t/t_sys_file.v @@ -32,6 +32,12 @@ module t; if (|file) $stop; // Should not exist, IE must return 0 end + begin + // Check quadword access; a little strange, but it's legal to open "." + file = $fopen(".","r"); + $fclose(file); + end + $write("*-* All Finished *-*\n"); $finish; end diff --git a/test_regress/t/t_sys_readmem_b_8.mem b/test_regress/t/t_sys_readmem_b_8.mem index 7c811db4b..8c6546ad5 100644 --- a/test_regress/t/t_sys_readmem_b_8.mem +++ b/test_regress/t/t_sys_readmem_b_8.mem @@ -1,19 +1,21 @@ -// $Id$ -// DESCRIPTION: Verilator: Verilog Test data file -// -// Copyright 2006 by Wilson Snyder. This program is free software; you can -// redistribute it and/or modify it under the terms of either the GNU -// General Public License or the Perl Artistic License. - -10000 -10001 -10010 -10011 -/* -multi line -ignored -*/ -10100 -10101 -10110 -10111 +// $Id$ +// DESCRIPTION: Verilator: Verilog Test data file +// +// Copyright 2006 by Wilson Snyder. This program is free software; you can +// redistribute it and/or modify it under the terms of either the GNU +// General Public License or the Perl Artistic License. + +// ** Note this file has DOS CR's so we can test them! + +10000 +10001 +10010 +10011 +/* +multi line +ignored +*/ +10100 +10101 +10110 +10111