diff --git a/src/verilog.y b/src/verilog.y index 6232f9091..f51f90dad 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -6608,7 +6608,7 @@ class_declaration: // ==IEEE: part of class_declaration $1->addExtendsp($4); $1->addMembersp($7); SYMP->popScope($$); - GRAMMARP->endLabel($7, $1, $9); } + GRAMMARP->endLabel($9, $1, $9); } ; classFront: // IEEE: part of class_declaration