diff --git a/Changes b/Changes index e7d5b7007..ab5a8e453 100644 --- a/Changes +++ b/Changes @@ -31,6 +31,7 @@ Verilator 5.051 devel * Fix unique0 case side effects (#7787). [Pawel Klopotek] * Fix mid-window disable iff (#7792) (#7869). [Yilou Wang] * Fix cleaning purity cache after assertions. [Geza Lore, Testorrent USA, Inc.] +* Fix uncaught type error leading to invalid C++ output (#7814). [Geza Lore, Testorrent USA, Inc.] * Fix internal error for coverpoints that reference a covergroup formal parameter (#7853 partial) (#7889). [Matthew Ballance] * Fix clang++ ambiguous overload of '==' operator (#7863). [Pawel Kojma, Antmicro Ltd.] * Fix heap-use-after-free in `VlRNG::VlRNG()` (#7865). [Dragon-Git] diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp index f1a468a8c..39ed3b44d 100644 --- a/src/V3LinkDot.cpp +++ b/src/V3LinkDot.cpp @@ -5823,6 +5823,7 @@ class LinkDotResolveVisitor final : public VNVisitor { VL_RESTORER(m_insideClassExtParam); { m_ds.init(m_curSymp); + m_insideClassExtParam = false; // Until overridden by a SCOPE m_ds.m_dotSymp = m_curSymp = m_modSymp = m_statep->getNodeSym(nodep); m_modp = nodep; diff --git a/test_regress/t/t_class_extend_new_bad.out b/test_regress/t/t_class_extend_new_bad.out new file mode 100644 index 000000000..a821fbed7 --- /dev/null +++ b/test_regress/t/t_class_extend_new_bad.out @@ -0,0 +1,8 @@ +%Error: t/t_class_extend_new_bad.v:14:13: Function Argument expects a CLASSREFDTYPE 'uvm_component', got BASICDTYPE 'int' + 14 | super.new(name, parent); + | ^~~ + ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance. +%Error: t/t_class_extend_new_bad.v:21:13: Function Argument 'class{}uvm_component' cannot be assigned to non-class 'int' + 21 | super.new(name, parent); + | ^~~ +%Error: Exiting due to diff --git a/test_regress/t/t_class_extend_new_bad.py b/test_regress/t/t_class_extend_new_bad.py new file mode 100755 index 000000000..38cf36b43 --- /dev/null +++ b/test_regress/t/t_class_extend_new_bad.py @@ -0,0 +1,16 @@ +#!/usr/bin/env python3 +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of either the GNU Lesser General Public License Version 3 +# or the Perl Artistic License Version 2.0. +# SPDX-FileCopyrightText: 2026 Wilson Snyder +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +import vltest_bootstrap + +test.scenarios('linter') + +test.lint(fails=True, expect_filename=test.golden_filename) + +test.passes() diff --git a/test_regress/t/t_class_extend_new_bad.v b/test_regress/t/t_class_extend_new_bad.v new file mode 100644 index 000000000..cacc021b7 --- /dev/null +++ b/test_regress/t/t_class_extend_new_bad.v @@ -0,0 +1,45 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 Wilson Snyder +// SPDX-License-Identifier: CC0-1.0 + +package uvm_pkg; + virtual class uvm_component; + function new(string name, uvm_component parent); + endfunction + endclass + class uvm_sequencer_base extends uvm_component; + function new(string name, int parent); + super.new(name, parent); // <- 'int' passed instead of 'uvm_component', no type error + endfunction + endclass + class uvm_sequencer_param_base #( + type REQ = int + ) extends uvm_sequencer_base; + function new(string name, uvm_component parent); + super.new(name, parent); // <- 'uvm_component' passed instead of 'int', no type error + endfunction + endclass + class uvm_sequencer #( + type REQ = int + ) extends uvm_sequencer_param_base #(REQ); + function new(string name, uvm_component parent); + super.new(name, parent); + endfunction + endclass +endpackage + +package s_core_env_pkg; + class s_core_p_base_vsequencer extends uvm_sequencer; + function new(input string name, input uvm_component parent); + super.new(name, parent); + endfunction + endclass +endpackage + +package s_core_tests_pkg; + import s_core_env_pkg::*; +endpackage + +import uvm_pkg::*;