From 38d5da7a2405c39383e3d2ca8aa43fa560f0383a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 22 Feb 2026 11:36:22 -0500 Subject: [PATCH] Tests: Fix t_fork_join_none_capture for other simulators --- test_regress/t/t_fork_join_none_capture.v | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/test_regress/t/t_fork_join_none_capture.v b/test_regress/t/t_fork_join_none_capture.v index 471424db4..5f4ecb464 100644 --- a/test_regress/t/t_fork_join_none_capture.v +++ b/test_regress/t/t_fork_join_none_capture.v @@ -1,7 +1,7 @@ // DESCRIPTION: Verilator: Verilog Test module // -// This file ONLY is placed under the Creative Commons Public Domain, for -// any use, without warranty, 2026 by Antmicro Ltd. +// This file ONLY is placed under the Creative Commons Public Domain. +// SPDX-FileCopyrightText: 2026 by Antmicro Ltd. // SPDX-License-Identifier: CC0-1.0 module test; @@ -11,14 +11,13 @@ module test; mbox.put(10); mbox.put(30); - repeat(2) begin - int item; + repeat (2) begin + automatic int item; mbox.get(item); fork begin $display("got", item); - if(item==10) - $finish; + if (item == 10) $finish; end join_none end