From 370a40348b8e04c8b53b3a7d2a748518a3c11ba5 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 24 Jul 2026 09:20:25 -0400 Subject: [PATCH] Commentary: Changes update --- Changes | 11 +++++++++++ test_regress/t/t_invalid_task_arguments_bad.v | 8 ++++---- test_regress/t/t_lint_multidriven_proc_bad.v | 10 +++++----- test_regress/t/t_table_wide.v | 4 +++- 4 files changed, 23 insertions(+), 10 deletions(-) diff --git a/Changes b/Changes index ab5a8e453..354a0dab6 100644 --- a/Changes +++ b/Changes @@ -19,9 +19,13 @@ Verilator 5.051 devel * Add --enable-light-debug configure option (#7886). [Geza Lore, Testorrent USA, Inc.] * Add user-provided DPI-C function declarations (#7626) (#7893). [Jakub Michalski] * Add error on static virtual functions (#7932). [Igor Zaworski, Antmicro Ltd.] +* Add error when scalar is passed to array task argument (#7948). [Pawel Klopotek] +* Add MULTIDRIVENPROC warning for signals driven by multiple plain always blocks (#7968). [Aisha] +* Add FSM arc and state coverage to verilator_coverage .info output (#7972) (#7973). [Igor Zaworski, Antmicro Ltd.] * Support a sequence used as an event control (#7797) (#7846). [Yilou Wang] * Support `[\*N:$]` consecutive repetition (#7940). [Artur Bieniek, Antmicro Ltd.] * Support dynamic containers in unique constraints (#7947). [Adam Kostrzewski, Antmicro Ltd.] +* Support delayed tristate gates (#7960) (#7961). [Patrick Creighton] * Optimize random initialization. [Geza Lore, Testorrent USA, Inc.] * Optimize more always blocks in DFG (#7775). [Geza Lore, Testorrent USA, Inc.] * Optimize assertion NFAs using bit-vector ring buffers (#7885). [Artur Bieniek, Antmicro Ltd.] @@ -38,12 +42,14 @@ Verilator 5.051 devel * Fix mixed-width inside and dist range bounds failing randomization (#7875). [Yilou Wang] * Fix solve-before over array variables failing randomization (#7876). [Yilou Wang] * Fix scoped randomize with array members under rand_mode (#7877). [Yilou Wang] +* Fix dist constraint on a frozen variable failing randomization (#7878). [Yilou Wang] * Fix range delays with parameter bounds (#7882). [Artur Bieniek, Antmicro Ltd.] * Fix --coverage on labeled inline assert/cover property (#7898) (#7904). [Patrick Creighton] * Fix memory leak in VerilatedFst::close() (#7899). [Jakub Michalski] * Fix spurious FSM COVERIGN on comparisons (#7900) (#7908). [Yogish Sekhar] * Fix independent force of multiply instantiated signals (#7905). [Artur Bieniek, Antmicro Ltd.] * Fix release of forced port nets (#7907) (#7901). [Artur Bieniek, Antmicro Ltd.] +* Fix randomization of unreferenced rand members of unpacked structs (#7910) (#7911). [Philip Axer] * Fix VL_TO_STRING function for array of structs (#7912). [Kornel Uriasz, Antmicro Ltd.] * Fix queues falling into wrong template spec (#7914). [Adam Kostrzewski, Antmicro Ltd.] * Fix type resolution when a local name shadows a type name (#7915). [Pawel Klopotek] @@ -55,6 +61,11 @@ Verilator 5.051 devel * Fix class parameter resolution (#7935). * Fix FSM detection of coverage-only branches (#7941) (#7942). [Patrick Creighton] * Fix sampled-value clocks in repeated assertions (#7944). [Artur Bieniek, Antmicro Ltd.] +* Fix lambda parameter types in queue min and max (#7962). [Bartosz Skorowski] +* Fix solve-before dropping all soft constraints in randomize() (#7963). [Yilou Wang] +* Fix lost writes when select width exceeds variable width (#7975). [Bartosz Skorowski] +* Fix variable scope in unique on dynamic array (#7981). [Kornel Uriasz, Antmicro Ltd.] +* Fix table optimization causing not contextually convertible to bool error (#7983). [Jakub Michalski] Verilator 5.050 2026-07-01 diff --git a/test_regress/t/t_invalid_task_arguments_bad.v b/test_regress/t/t_invalid_task_arguments_bad.v index 7ff217662..c5d7adaad 100644 --- a/test_regress/t/t_invalid_task_arguments_bad.v +++ b/test_regress/t/t_invalid_task_arguments_bad.v @@ -4,19 +4,19 @@ // SPDX-FileCopyrightText: 2026 Antmicro // SPDX-License-Identifier: CC0-1.0 -task dyn_task(input logic [30:0] data []); +task dyn_task(input logic [30:0] data[]); $display("%p", data); endtask -task unpacked_task(input logic [30:0] data [3:0]); +task unpacked_task(input logic [30:0] data[3:0]); $display("%p", data); endtask -task queue_task(input logic [30:0] data [$]); +task queue_task(input logic [30:0] data[$]); $display("%p", data); endtask -task assoc_task(input logic [30:0] data [int]); +task assoc_task(input logic [30:0] data[int]); $display("%p", data); endtask diff --git a/test_regress/t/t_lint_multidriven_proc_bad.v b/test_regress/t/t_lint_multidriven_proc_bad.v index dafc8774e..2bccbbf71 100644 --- a/test_regress/t/t_lint_multidriven_proc_bad.v +++ b/test_regress/t/t_lint_multidriven_proc_bad.v @@ -7,8 +7,8 @@ // Same clock: two plain always blocks drive the whole of 'q', reported by // MULTIDRIVENPROC. module t ( - input wire clk, - input wire d, + input wire clk, + input wire d, output logic q ); @@ -20,9 +20,9 @@ endmodule // Different clocks: reported by MULTIDRIVEN (on by default). MULTIDRIVENPROC is // suppressed here so the conflict is reported only once. module t2 ( - input wire clka, - input wire clkb, - input wire d, + input wire clka, + input wire clkb, + input wire d, output logic q ); diff --git a/test_regress/t/t_table_wide.v b/test_regress/t/t_table_wide.v index cd644dac4..fb52b70ea 100644 --- a/test_regress/t/t_table_wide.v +++ b/test_regress/t/t_table_wide.v @@ -4,7 +4,9 @@ // SPDX-FileCopyrightText: 2026 Antmicro // SPDX-License-Identifier: CC0-1.0 -module m(input in); +module m ( + input in +); // at least 65 variables are required reg id42; reg id43;