From 345a5d5646b7a74cda1f6450366ac14958caf3e0 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 26 Apr 2013 21:02:32 -0400 Subject: [PATCH] Add --pins-sc-uint and --pins-sc-biguint, bug638. --- Changes | 2 + bin/verilator | 16 +++++++ include/verilated.h | 29 ++++++++++++ src/V3AstNodes.cpp | 16 ++++++- src/V3AstNodes.h | 2 + src/V3EmitC.cpp | 33 +++++++++++--- src/V3Options.cpp | 2 + src/V3Options.h | 4 ++ test_regress/t/t_var_pins_sc_biguint.pl | 46 ++++++++++++++++++++ test_regress/t/t_var_pins_sc_uint.pl | 46 ++++++++++++++++++++ test_regress/t/t_var_pins_sc_uint_biguint.pl | 46 ++++++++++++++++++++ test_regress/t/t_var_pinsizes.cpp | 14 ++++++ test_regress/t/t_var_pinsizes.v | 34 +++++++++------ 13 files changed, 268 insertions(+), 22 deletions(-) create mode 100755 test_regress/t/t_var_pins_sc_biguint.pl create mode 100755 test_regress/t/t_var_pins_sc_uint.pl create mode 100755 test_regress/t/t_var_pins_sc_uint_biguint.pl diff --git a/Changes b/Changes index f92e7872f..c6bb9622b 100644 --- a/Changes +++ b/Changes @@ -5,6 +5,8 @@ indicates the contributor was also the author of the fix; Thanks! * Verilator 3.847 devel +*** Add --pins-sc-uint and --pins-sc-biguint, bug638. [Alex Hornung] + **** Fix module resolution with __, bug631. [Jason McMullan] diff --git a/bin/verilator b/bin/verilator index 2a777edbc..c87cb2a4c 100755 --- a/bin/verilator +++ b/bin/verilator @@ -302,6 +302,8 @@ descriptions in the next sections for more information. --output-split Split .cpp files into pieces --output-split-cfuncs Split .ccp functions --pins-bv Specify types for top level ports + --pins-sc-uint Specify types for top level ports + --pins-sc-biguint Specify types for top level ports --pins-uint8 Specify types for top level ports --pipe-filter Filter all input through a script --prefix Name of top level class @@ -820,6 +822,20 @@ wide should use sc_bv's instead of uint32/vluint64_t's. The default is 33". The more sc_bv is used, the worse for performance. Use the "/*verilator sc_bv*/" attribute to select specific ports to be sc_bv. +=item --pins-sc-uint + +Specifies SystemC inputs/outputs of greater than 2 bits wide should use +sc_uint between 2 and 64. When combined with the "--pins-sc-biguint" +combination, it results in sc_uint being used between 2 and 64 and +sc_biguint being used between 65 and 512. + +=item --pins-sc-biguint + +Specifies SystemC inputs/outputs of greater than 65 bits wide should use +sc_biguint between 65 and 512, and sc_bv from 513 upwards. When combined +with the "--pins-sc-uint" combination, it results in sc_uint being used +between 2 and 64 and sc_biguint being used between 65 and 512. + =item --pins-uint8 Specifies SystemC inputs/outputs that are smaller than the --pins-bv diff --git a/include/verilated.h b/include/verilated.h index cf14cce0b..91efed3dd 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -547,6 +547,7 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) { //=================================================================== // SYSTEMC OPERATORS // Copying verilog format to systemc integers and bit vectors. +// Get a SystemC variable #define VL_ASSIGN_ISI(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); } #define VL_ASSIGN_QSQ(obits,vvar,svar) { (vvar) = VL_CLEAN_QQ((obits),(obits),(svar).read()); } @@ -564,7 +565,21 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) { owp[words-1] &= VL_MASK_I(obits); \ } +#define VL_ASSIGN_ISU(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read().to_uint()); } +#define VL_ASSIGN_QSU(obits,vvar,svar) { (vvar) = VL_CLEAN_QQ((obits),(obits),(svar).read().to_uint64()); } +#define VL_ASSIGN_WSB(obits,owp,svar) { \ + int words = VL_WORDS_I(obits); \ + sc_biguint _butemp = (svar).read(); \ + for (int i=0; i < words; i++) { \ + int msb = ((i+1)*VL_WORDSIZE) - 1; \ + msb = (msb >= obits) ? (obits-1) : msb; \ + owp[i] = _butemp.range(msb,i*VL_WORDSIZE).to_uint(); \ + } \ + owp[words-1] &= VL_MASK_I(obits); \ +} + // Copying verilog format from systemc integers and bit vectors. +// Set a SystemC variable #define VL_ASSIGN_SII(obits,svar,vvar) { (svar).write(vvar); } #define VL_ASSIGN_SQQ(obits,svar,vvar) { (svar).write(vvar); } @@ -586,6 +601,20 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) { svar.write(_bvtemp); \ } +#define VL_ASSIGN_SUI(obits,svar,rd) { (svar).write(rd); } +#define VL_ASSIGN_SUQ(obits,svar,rd) { (svar).write(rd); } +#define VL_ASSIGN_SBI(obits,svar,rd) { (svar).write(rd); } +#define VL_ASSIGN_SBQ(obits,svar,rd) { (svar).write(rd); } +#define VL_ASSIGN_SBW(obits,svar,rwp) { \ + sc_biguint _butemp; \ + for (int i=0; i < VL_WORDS_I(obits); i++) { \ + int msb = ((i+1)*VL_WORDSIZE) - 1; \ + msb = (msb >= obits) ? (obits-1) : msb; \ + _butemp.range(msb,i*VL_WORDSIZE) = rwp[i]; \ + } \ + svar.write(_butemp); \ +} + //=================================================================== // Extending sizes diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index ba97aab3d..3f70b3332 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -103,13 +103,21 @@ bool AstVar::isSigPublic() const { } bool AstVar::isScQuad() const { - return (isSc() && isQuad() && !isScBv()); + return (isSc() && isQuad() && !isScBv() && !isScBigUint()); } bool AstVar::isScBv() const { return ((isSc() && width() >= v3Global.opt.pinsBv()) || m_attrScBv); } +bool AstVar::isScUint() const { + return ((isSc() && v3Global.opt.pinsScUint() && width() >= 2 && width() <= 64) && !isScBv()); +} + +bool AstVar::isScBigUint() const { + return ((isSc() && v3Global.opt.pinsScBigUint() && width() >= 65 && width() <= 512) && !isScBv()); +} + void AstVar::combineType(AstVarType type) { // These flags get combined with the existing settings of the flags. // We don't test varType for certain types, instead set flags since @@ -278,7 +286,11 @@ string AstVar::dpiArgType(bool named, bool forReturn) const { } string AstVar::scType() const { - if (isScBv()) { + if (isScBigUint()) { + return (string("sc_biguint<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >> + } else if (isScUint()) { + return (string("sc_uint<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >> + } else if (isScBv()) { return (string("sc_bv<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >> } else if (widthMin() == 1) { return "bool"; diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 4ef64340a..2ed21b8cc 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -979,6 +979,8 @@ public: bool isSc() const { return m_sc; } bool isScQuad() const; bool isScBv() const; + bool isScUint() const; + bool isScBigUint() const; bool isScSensitive() const { return m_scSensitive; } bool isSigPublic() const; bool isSigModPublic() const { return m_sigModPublic; } diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 316f64c19..1c37b4289 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -79,7 +79,10 @@ public: puts (nodep->isWide()?"W":(nodep->isQuad()?"Q":"I")); } void emitScIQW(AstVar* nodep) { - puts (nodep->isScBv()?"SW":(nodep->isScQuad()?"SQ":"SI")); + puts (nodep->isScBigUint() ? "SB" + : nodep->isScUint() ? "SU" + : nodep->isScBv() ? "SW" + : (nodep->isScQuad() ? "SQ" : "SI")); } void emitOpName(AstNode* nodep, const string& format, AstNode* lhsp, AstNode* rhsp, AstNode* thsp); @@ -1699,7 +1702,7 @@ void EmitCStmts::emitVarList(AstNode* firstp, EisWhich which, const string& pref if (varp->isUsedClock() && varp->widthMin()==1) sortbytes = 0; else if (varp->dtypeSkipRefp()->castUnpackArrayDType()) sortbytes=8; else if (varp->basicp() && varp->basicp()->isOpaque()) sortbytes=7; - else if (varp->isScBv()) sortbytes=6; + else if (varp->isScBv() || varp->isScBigUint()) sortbytes=6; else if (sigbytes==8) sortbytes=5; else if (sigbytes==4) sortbytes=4; else if (sigbytes==2) sortbytes=2; @@ -2172,6 +2175,21 @@ class EmitCTrace : EmitCStmts { AstVar* varp = varrefp->varp(); return varp->isSc() && varp->isScBv(); } + + bool emitTraceIsScBigUint(AstTraceInc* nodep) { + AstVarRef* varrefp = nodep->valuep()->castVarRef(); + if (!varrefp) return false; + AstVar* varp = varrefp->varp(); + return varp->isSc() && varp->isScBigUint(); + } + + bool emitTraceIsScUint(AstTraceInc* nodep) { + AstVarRef* varrefp = nodep->valuep()->castVarRef(); + if (!varrefp) return false; + AstVar* varp = varrefp->varp(); + return varp->isSc() && varp->isScUint(); + } + void emitTraceInitOne(AstTraceDecl* nodep) { if (nodep->isDouble()) { puts("vcdp->declDouble"); @@ -2207,7 +2225,7 @@ class EmitCTrace : EmitCStmts { ? "full":"chg"); if (nodep->isDouble()) { puts("vcdp->"+full+"Double"); - } else if (nodep->isWide() || emitTraceIsScBv(nodep)) { + } else if (nodep->isWide() || emitTraceIsScBv(nodep) || emitTraceIsScBigUint(nodep)) { puts("vcdp->"+full+"Array"); } else if (nodep->isQuad()) { puts("vcdp->"+full+"Quad "); @@ -2221,7 +2239,7 @@ class EmitCTrace : EmitCStmts { puts(","); emitTraceValue(nodep, arrayindex); if (!nodep->isDouble() // When float/double no longer have widths this can go - && (nodep->declp()->left() || nodep->declp()->right() || emitTraceIsScBv(nodep))) { + && (nodep->declp()->left() || nodep->declp()->right() || emitTraceIsScBv(nodep) || emitTraceIsScBigUint(nodep))) { puts(","+cvtToStr(nodep->declp()->widthMin())); } puts(");\n"); @@ -2231,7 +2249,8 @@ class EmitCTrace : EmitCStmts { AstVarRef* varrefp = nodep->valuep()->castVarRef(); AstVar* varp = varrefp->varp(); puts("("); - if (emitTraceIsScBv(nodep)) puts("VL_SC_BV_DATAP("); + if (emitTraceIsScBigUint(nodep)) puts("(vluint32_t*)"); + else if (emitTraceIsScBv(nodep)) puts("VL_SC_BV_DATAP("); varrefp->iterate(*this); // Put var name out // Tracing only supports 1D arrays if (varp->dtypeSkipRefp()->castUnpackArrayDType()) { @@ -2240,7 +2259,9 @@ class EmitCTrace : EmitCStmts { else puts("["+cvtToStr(arrayindex)+"]"); } if (varp->isSc()) puts(".read()"); - if (emitTraceIsScBv(nodep)) puts(")"); + if (emitTraceIsScUint(nodep)) puts(nodep->isQuad() ? ".to_uint64()" : ".to_uint()"); + else if (emitTraceIsScBigUint(nodep)) puts(".get_raw()"); + else if (emitTraceIsScBv(nodep)) puts(")"); puts(")"); } else { puts("("); diff --git a/src/V3Options.cpp b/src/V3Options.cpp index abb6b57f0..560be0e33 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -737,6 +737,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char else if ( onoff (sw, "-lint-only", flag/*ref*/) ) { m_lintOnly = flag; } else if ( !strcmp (sw, "-no-pins64") ) { m_pinsBv = 33; } else if ( !strcmp (sw, "-pins64") ) { m_pinsBv = 65; } + else if ( onoff (sw, "-pins-sc-uint", flag/*ref*/) ){ m_pinsScUint = flag; if (!m_pinsScBigUint) m_pinsBv = 65; } + else if ( onoff (sw, "-pins-sc-biguint", flag/*ref*/) ){ m_pinsScBigUint = flag; m_pinsBv = 513; } else if ( onoff (sw, "-pins-uint8", flag/*ref*/) ){ m_pinsUint8 = flag; } else if ( !strcmp (sw, "-private") ) { m_public = false; } else if ( onoff (sw, "-profile-cfuncs", flag/*ref*/) ) { m_profileCFuncs = flag; } diff --git a/src/V3Options.h b/src/V3Options.h index 55d0def8e..84feac46d 100644 --- a/src/V3Options.h +++ b/src/V3Options.h @@ -76,6 +76,8 @@ class V3Options { bool m_lintOnly; // main switch: --lint-only bool m_outFormatOk; // main switch: --cc, --sc or --sp was specified bool m_warnFatal; // main switch: --warnFatal + bool m_pinsScUint; // main switch: --pins-sc-uint + bool m_pinsScBigUint;// main switch: --pins-sc-biguint bool m_pinsUint8; // main switch: --pins-uint8 bool m_profileCFuncs;// main switch: --profile-cfuncs bool m_psl; // main switch: --psl @@ -215,6 +217,8 @@ class V3Options { bool outFormatOk() const { return m_outFormatOk; } bool keepTempFiles() const { return (V3Error::debugDefault()!=0); } bool warnFatal() const { return m_warnFatal; } + bool pinsScUint() const { return m_pinsScUint; } + bool pinsScBigUint() const { return m_pinsScBigUint; } bool pinsUint8() const { return m_pinsUint8; } bool profileCFuncs() const { return m_profileCFuncs; } bool psl() const { return m_psl; } diff --git a/test_regress/t/t_var_pins_sc_biguint.pl b/test_regress/t/t_var_pins_sc_biguint.pl new file mode 100755 index 000000000..9a4584bd8 --- /dev/null +++ b/test_regress/t/t_var_pins_sc_biguint.pl @@ -0,0 +1,46 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +$Self->{vlt} or $Self->skip("Verilator only test"); + +top_filename("t/t_var_pinsizes.v"); + +compile ( + verilator_flags2 => ["-sp --pins-sc-biguint --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + make_main => 0, + ); + +if ($Self->{vlt}) { + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv16;/x); + + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv16;/x); +} + +execute(); + +ok(1); +1; diff --git a/test_regress/t/t_var_pins_sc_uint.pl b/test_regress/t/t_var_pins_sc_uint.pl new file mode 100755 index 000000000..3d1bedd32 --- /dev/null +++ b/test_regress/t/t_var_pins_sc_uint.pl @@ -0,0 +1,46 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +$Self->{vlt} or $Self->skip("Verilator only test"); + +top_filename("t/t_var_pinsizes.v"); + +compile ( + verilator_flags2 => ["-sp --pins-sc-uint --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + make_main => 0, + ); + +if ($Self->{vlt}) { + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv16;/x); + + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv16;/x); +} + +execute(); + +ok(1); +1; diff --git a/test_regress/t/t_var_pins_sc_uint_biguint.pl b/test_regress/t/t_var_pins_sc_uint_biguint.pl new file mode 100755 index 000000000..9bc5234b3 --- /dev/null +++ b/test_regress/t/t_var_pins_sc_uint_biguint.pl @@ -0,0 +1,46 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +$Self->{vlt} or $Self->skip("Verilator only test"); + +top_filename("t/t_var_pinsizes.v"); + +compile ( + verilator_flags2 => ["-sp --pins-sc-uint --pins-sc-biguint --trace --exe $Self->{t_dir}/t_var_pinsizes.cpp"], + make_main => 0, + ); + +if ($Self->{vlt}) { + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in \s+ i1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ i513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_in\s> \s+ ibv16;/x); + + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out \s+ o1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o8;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o16;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o32;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o64;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o65;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o128;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ o513;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv1;/x); + file_grep ("$Self->{obj_dir}/$Self->{VM_PREFIX}.sp", qr/sc_out\s> \s+ obv16;/x); +} + +execute(); + +ok(1); +1; diff --git a/test_regress/t/t_var_pinsizes.cpp b/test_regress/t/t_var_pinsizes.cpp index 758fc06b7..995e00840 100644 --- a/test_regress/t/t_var_pinsizes.cpp +++ b/test_regress/t/t_var_pinsizes.cpp @@ -12,6 +12,12 @@ # include "Vt_var_pins_sc64.h" #elif defined(T_VAR_PINS_SCUI) # include "Vt_var_pins_scui.h" +#elif defined(T_VAR_PINS_SC_UINT) +# include "Vt_var_pins_sc_uint.h" +#elif defined(T_VAR_PINS_SC_BIGUINT) +# include "Vt_var_pins_sc_biguint.h" +#elif defined(T_VAR_PINS_SC_UINT_BIGUINT) +# include "Vt_var_pins_sc_uint_biguint.h" #else # error "Unknown test" #endif @@ -30,3 +36,11 @@ int main() { tb->final(); return 0; } + +int sc_main(int argc, char *argv[]) { + tb = new VM_PREFIX("tb"); + + VL_PRINTF("*-* All Finished *-*\n"); + tb->final(); + return 0; +} diff --git a/test_regress/t/t_var_pinsizes.v b/test_regress/t/t_var_pinsizes.v index bca013395..8db1d550e 100644 --- a/test_regress/t/t_var_pinsizes.v +++ b/test_regress/t/t_var_pinsizes.v @@ -8,26 +8,30 @@ module t (/*AUTOARG*/ // Outputs - o1, o8, o16, o32, o64, o65, obv1, obv16, + o1, o8, o16, o32, o64, o65, o128, o513, obv1, obv16, // Inputs - clk, i1, i8, i16, i32, i64, i65, ibv1, ibv16 + clk, i1, i8, i16, i32, i64, i65, i128, i513, ibv1, ibv16 ); input clk; - input i1; - input [7:0] i8; - input [15:0] i16; - input [31:0] i32; - input [63:0] i64; - input [64:0] i65; + input i1; + input [7:0] i8; + input [15:0] i16; + input [31:0] i32; + input [63:0] i64; + input [64:0] i65; + input [127:0] i128; + input [512:0] i513; - output o1; - output [7:0] o8; - output [15:0] o16; - output [31:0] o32; - output [63:0] o64; - output [64:0] o65; + output o1; + output [7:0] o8; + output [15:0] o16; + output [31:0] o32; + output [63:0] o64; + output [64:0] o65; + output [127:0] o128; + output [512:0] o513; input [0:0] ibv1 /*verilator sc_bv*/; input [15:0] ibv16 /*verilator sc_bv*/; @@ -42,6 +46,8 @@ module t (/*AUTOARG*/ o32 <= i32; o64 <= i64; o65 <= i65; + o128 <= i128; + o513 <= i513; obv1 <= ibv1; obv16 <= ibv16; end