From cd1fe64e6c3296d4724b17c20d70296e93ab13fd Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 16 Sep 2023 21:46:01 -0400
Subject: [PATCH 001/157] devel release

---
 CMakeLists.txt | 2 +-
 Changes        | 7 +++++++
 configure.ac   | 2 +-
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 4c600a850..87a695c0b 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -15,7 +15,7 @@
 cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(Verilator
-    VERSION 5.016
+    VERSION 5.017
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )
diff --git a/Changes b/Changes
index 2a6f93e02..9c86598cf 100644
--- a/Changes
+++ b/Changes
@@ -8,6 +8,13 @@ The changes in each Verilator version are described below.  The
 contributors that suggested a given feature are shown in []. Thanks!
 
 
+Verilator 5.017 devel
+==========================
+
+**Minor:**
+
+
+
 Verilator 5.016 2023-09-16
 ==========================
 
diff --git a/configure.ac b/configure.ac
index c10eadcd1..c530489f3 100644
--- a/configure.ac
+++ b/configure.ac
@@ -10,7 +10,7 @@
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.016 2023-09-16],
+AC_INIT([Verilator],[5.017 devel],
         [https://verilator.org],
         [verilator],[https://verilator.org])
 

From 761adf1cf01eaa1a2fa927f63719b67ed17e48b4 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 16 Sep 2023 22:50:54 -0400
Subject: [PATCH 002/157] Internals: Add cloneTreePure to prepare for side
 effect check.

Use cloneTreePure when what is being cloned must be side-effect free.
Use cloneTree when safe to contain side effects (e.g. cloning module).
---
 src/V3Assert.cpp      |  16 +++----
 src/V3AssertPre.cpp   |  16 +++----
 src/V3Ast.h           |   3 +-
 src/V3AstNodeExpr.h   |   6 +--
 src/V3AstNodes.cpp    |   4 +-
 src/V3Case.cpp        |  12 ++---
 src/V3Const.cpp       |  26 +++++------
 src/V3Delayed.cpp     |   2 +-
 src/V3DfgDfgToAst.cpp |   4 +-
 src/V3Expand.cpp      |  54 ++++++++++-----------
 src/V3Force.cpp       |   8 ++--
 src/V3Gate.cpp        |  11 +++--
 src/V3LinkInc.cpp     |   6 +--
 src/V3MergeCond.cpp   |   4 +-
 src/V3Premit.cpp      |  12 ++---
 src/V3Randomize.cpp   |   2 +-
 src/V3Slice.cpp       |   9 ++--
 src/V3Split.cpp       |   2 +
 src/V3SplitAs.cpp     |   3 ++
 src/V3Subst.cpp       |   2 +-
 src/V3Tristate.cpp    |  26 +++++------
 src/V3Unknown.cpp     |  10 ++--
 src/V3Width.cpp       |  26 ++++++-----
 src/astgen            |   3 ++
 src/verilog.y         | 106 +++++++++++++++++++++---------------------
 25 files changed, 193 insertions(+), 180 deletions(-)

diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index 59fd8ede5..e010215d9 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -243,7 +243,7 @@ private:
                 }
 
                 // Build a bitmask of the true predicates
-                AstNodeExpr* const predp = ifp->condp()->cloneTree(false);
+                AstNodeExpr* const predp = ifp->condp()->cloneTreePure(false);
                 if (propp) {
                     propp = new AstConcat{nodep->fileline(), predp, propp};
                 } else {
@@ -312,17 +312,17 @@ private:
                              icondp = VN_AS(icondp->nextp(), NodeExpr)) {
                             AstNodeExpr* onep;
                             if (AstInsideRange* const rcondp = VN_CAST(icondp, InsideRange)) {
-                                onep = rcondp->newAndFromInside(nodep->exprp(),
-                                                                rcondp->lhsp()->cloneTree(true),
-                                                                rcondp->rhsp()->cloneTree(true));
+                                onep = rcondp->newAndFromInside(
+                                    nodep->exprp(), rcondp->lhsp()->cloneTreePure(true),
+                                    rcondp->rhsp()->cloneTreePure(true));
                             } else if (nodep->casex() || nodep->casez() || nodep->caseInside()) {
                                 onep = AstEqWild::newTyped(itemp->fileline(),
-                                                           nodep->exprp()->cloneTree(false),
-                                                           icondp->cloneTree(false));
+                                                           nodep->exprp()->cloneTreePure(false),
+                                                           icondp->cloneTreePure(false));
                             } else {
                                 onep = AstEq::newTyped(icondp->fileline(),
-                                                       nodep->exprp()->cloneTree(false),
-                                                       icondp->cloneTree(false));
+                                                       nodep->exprp()->cloneTreePure(false),
+                                                       icondp->cloneTreePure(false));
                             }
                             if (propp) {
                                 propp = new AstConcat{icondp->fileline(), onep, propp};
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index 341204593..766d454d1 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -177,7 +177,7 @@ private:
         if (nodep->direction() == VDirection::OUTPUT) {
             AstVarRef* const skewedRefp = new AstVarRef{flp, varp, VAccess::READ};
             skewedRefp->user1(true);
-            AstAssign* const assignp = new AstAssign{flp, exprp->cloneTree(false), skewedRefp};
+            AstAssign* const assignp = new AstAssign{flp, exprp->cloneTreePure(false), skewedRefp};
             if (skewp->isZero()) {
                 // Drive the var in Re-NBA (IEEE 1800-2017 14.16)
                 m_clockingp->addNextHere(new AstAlwaysReactive{
@@ -208,12 +208,12 @@ private:
             refp->user1(true);
             if (skewp->num().is1Step()) {
                 // Assign the sampled expression to the clockvar (IEEE 1800-2017 14.13)
-                AstSampled* const sampledp = new AstSampled{flp, exprp->cloneTree(false)};
+                AstSampled* const sampledp = new AstSampled{flp, exprp->cloneTreePure(false)};
                 sampledp->dtypeFrom(exprp);
                 m_clockingp->addNextHere(new AstAssignW{flp, refp, sampledp});
             } else if (skewp->isZero()) {
                 // #0 means the var has to be sampled in Observed (IEEE 1800-2017 14.13)
-                AstAssign* const assignp = new AstAssign{flp, refp, exprp->cloneTree(false)};
+                AstAssign* const assignp = new AstAssign{flp, refp, exprp->cloneTreePure(false)};
                 m_clockingp->addNextHere(new AstAlwaysObserved{
                     flp, new AstSenTree{flp, m_clockingp->sensesp()->cloneTree(false)}, assignp});
             } else {
@@ -230,7 +230,7 @@ private:
                 AstCMethodHard* const pushp = new AstCMethodHard{
                     flp, new AstVarRef{flp, queueVarp, VAccess::WRITE}, "push",
                     new AstTime{nodep->fileline(), m_modp->timeunit()}};
-                pushp->addPinsp(exprp->cloneTree(false));
+                pushp->addPinsp(exprp->cloneTreePure(false));
                 pushp->dtypeSetVoid();
                 m_clockingp->addNextHere(
                     new AstAlways{flp, VAlwaysKwd::ALWAYS, nullptr, pushp->makeStmt()});
@@ -372,7 +372,7 @@ private:
         if (sentreep) sentreep->unlinkFrBack();
         AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
         past->dtypeFrom(exprp);
-        exprp = new AstAnd{fl, past, new AstNot{fl, exprp->cloneTree(false)}};
+        exprp = new AstAnd{fl, past, new AstNot{fl, exprp->cloneTreePure(false)}};
         exprp->dtypeSetBit();
         nodep->replaceWith(exprp);
         nodep->sentreep(newSenTree(nodep, sentreep));
@@ -393,7 +393,7 @@ private:
         if (sentreep) sentreep->unlinkFrBack();
         AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
         past->dtypeFrom(exprp);
-        exprp = new AstAnd{fl, new AstNot{fl, past}, exprp->cloneTree(false)};
+        exprp = new AstAnd{fl, new AstNot{fl, past}, exprp->cloneTreePure(false)};
         exprp->dtypeSetBit();
         nodep->replaceWith(exprp);
         nodep->sentreep(newSenTree(nodep, sentreep));
@@ -408,7 +408,7 @@ private:
         if (sentreep) sentreep->unlinkFrBack();
         AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
         past->dtypeFrom(exprp);
-        exprp = new AstEq{fl, past, exprp->cloneTree(false)};
+        exprp = new AstEq{fl, past, exprp->cloneTreePure(false)};
         exprp->dtypeSetBit();
         nodep->replaceWith(exprp);
         nodep->sentreep(newSenTree(nodep, sentreep));
@@ -442,7 +442,7 @@ private:
         // Block is the new expression to evaluate
         AstNodeExpr* blockp = VN_AS(nodep->propp()->unlinkFrBack(), NodeExpr);
         if (AstNodeExpr* const disablep = nodep->disablep()) {
-            m_disablep = disablep->cloneTree(false);
+            m_disablep = disablep->cloneTreePure(false);
             if (VN_IS(nodep->backp(), Cover)) {
                 blockp = new AstAnd{disablep->fileline(),
                                     new AstNot{disablep->fileline(), disablep->unlinkFrBack()},
diff --git a/src/V3Ast.h b/src/V3Ast.h
index b925d7f26..5de6ab906 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1998,7 +1998,8 @@ public:
                              AstNode* belowp);  // When calling, "this" is second argument
 
     // METHODS - Iterate on a tree
-    AstNode* cloneTree(bool cloneNextLink);  // Not const, as sets clonep() on original nodep
+    AstNode* cloneTree(bool cloneNextLink);  // Not const, as sets clonep() on original nodep //
+    AstNode* cloneTreePure(bool cloneNextLink) { return cloneTree(cloneNextLink); }
     bool gateTree() { return gateTreeIter(); }  // Is tree isGateOptimizable?
     inline bool sameTree(const AstNode* node2p) const;  // Does tree of this == node2p?
     // Does tree of this == node2p?, not allowing non-isGateOptimizable
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 4c4250b96..e5e44c785 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -4187,10 +4187,10 @@ class AstCountBits final : public AstNodeQuadop {
     // Number of bits set in vector
 public:
     AstCountBits(FileLine* fl, AstNodeExpr* exprp, AstNodeExpr* ctrl1p)
-        : ASTGEN_SUPER_CountBits(fl, exprp, ctrl1p, ctrl1p->cloneTree(false),
-                                 ctrl1p->cloneTree(false)) {}
+        : ASTGEN_SUPER_CountBits(fl, exprp, ctrl1p, ctrl1p->cloneTreePure(false),
+                                 ctrl1p->cloneTreePure(false)) {}
     AstCountBits(FileLine* fl, AstNodeExpr* exprp, AstNodeExpr* ctrl1p, AstNodeExpr* ctrl2p)
-        : ASTGEN_SUPER_CountBits(fl, exprp, ctrl1p, ctrl2p, ctrl2p->cloneTree(false)) {}
+        : ASTGEN_SUPER_CountBits(fl, exprp, ctrl1p, ctrl2p, ctrl2p->cloneTreePure(false)) {}
     AstCountBits(FileLine* fl, AstNodeExpr* exprp, AstNodeExpr* ctrl1p, AstNodeExpr* ctrl2p,
                  AstNodeExpr* ctrl3p)
         : ASTGEN_SUPER_CountBits(fl, exprp, ctrl1p, ctrl2p, ctrl3p) {}
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index b08d56f9e..9a35b190b 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -279,8 +279,8 @@ AstExecGraph::~AstExecGraph() { VL_DO_DANGLING(delete m_depGraphp, m_depGraphp);
 
 AstNodeExpr* AstInsideRange::newAndFromInside(AstNodeExpr* exprp, AstNodeExpr* lhsp,
                                               AstNodeExpr* rhsp) {
-    AstNodeExpr* const ap = new AstGte{fileline(), exprp->cloneTree(true), lhsp};
-    AstNodeExpr* const bp = new AstLte{fileline(), exprp->cloneTree(true), rhsp};
+    AstNodeExpr* const ap = new AstGte{fileline(), exprp->cloneTreePure(true), lhsp};
+    AstNodeExpr* const bp = new AstLte{fileline(), exprp->cloneTreePure(true), rhsp};
     ap->fileline()->modifyWarnOff(V3ErrorCode::UNSIGNED, true);
     bp->fileline()->modifyWarnOff(V3ErrorCode::CMPCONST, true);
     return new AstAnd{fileline(), ap, bp};
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 8297c1b69..9110d9b93 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -362,10 +362,10 @@ private:
 
             // Alternate scheme if we ever do multiple bits at a time:
             // V3Number nummask (cexprp, cexprp->width(), (1UL<<msb));
-            // AstNode* and1p = new AstAnd(cexprp->fileline(), cexprp->cloneTree(false),
+            // AstNode* and1p = new AstAnd(cexprp->fileline(), cexprp->cloneTreePure(false),
             //                            new AstConst(cexprp->fileline(), nummask));
             AstNodeExpr* const and1p
-                = new AstSel{cexprp->fileline(), cexprp->cloneTree(false), msb, 1};
+                = new AstSel{cexprp->fileline(), cexprp->cloneTreePure(false), msb, 1};
             AstNodeExpr* const eqp
                 = new AstNeq{cexprp->fileline(), new AstConst{cexprp->fileline(), 0}, and1p};
             AstIf* const ifp = new AstIf{cexprp->fileline(), eqp, tree1p, tree0p};
@@ -450,7 +450,7 @@ private:
                         V3Number numval{itemp, iconstp->width()};
                         numval.opBitsOne(iconstp->num());
                         AstNodeExpr* const and1p
-                            = new AstAnd{itemp->fileline(), cexprp->cloneTree(false),
+                            = new AstAnd{itemp->fileline(), cexprp->cloneTreePure(false),
                                          new AstConst{itemp->fileline(), nummask}};
                         AstNodeExpr* const and2p = new AstAnd{
                             itemp->fileline(), new AstConst{itemp->fileline(), numval},
@@ -460,7 +460,7 @@ private:
                         condp = AstEq::newTyped(itemp->fileline(), and1p, and2p);
                     } else {
                         // Not a caseX mask, we can build CASEEQ(cexpr icond)
-                        AstNodeExpr* const and1p = cexprp->cloneTree(false);
+                        AstNodeExpr* const and1p = cexprp->cloneTreePure(false);
                         AstNodeExpr* const and2p = icondp;
                         condp = AstEq::newTyped(itemp->fileline(), and1p, and2p);
                     }
@@ -502,7 +502,7 @@ private:
                 if (++depth > CASE_ENCODER_GROUP_DEPTH) depth = 1;
                 if (depth == 1) {  // First group or starting new group
                     itemnextp = nullptr;
-                    AstIf* const newp = new AstIf{itemp->fileline(), ifexprp->cloneTree(true)};
+                    AstIf* const newp = new AstIf{itemp->fileline(), ifexprp->cloneTreePure(true)};
                     if (groupnextp) {
                         groupnextp->addElsesp(newp);
                     } else {
@@ -512,7 +512,7 @@ private:
                 } else {  // Continue group, modify if condition to OR in this new condition
                     AstNodeExpr* const condp = groupnextp->condp()->unlinkFrBack();
                     groupnextp->condp(
-                        new AstOr{ifexprp->fileline(), condp, ifexprp->cloneTree(true)});
+                        new AstOr{ifexprp->fileline(), condp, ifexprp->cloneTreePure(true)});
                 }
             }
             {  // Make the new lower IF and attach in the tree
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 696fceb5e..888bd7780 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1494,13 +1494,13 @@ private:
         const AstSel* rselp = VN_CAST(rhsp, Sel);
         // a[i:0] a
         if (lselp && !rselp && rhsp->sameGateTree(lselp->fromp()))
-            rselp = new AstSel{rhsp->fileline(), rhsp->cloneTree(false), 0, rhsp->width()};
+            rselp = new AstSel{rhsp->fileline(), rhsp->cloneTreePure(false), 0, rhsp->width()};
         // a[i:j] {a[j-1:k], b}
         if (lselp && !rselp && VN_IS(rhsp, Concat))
             return ifMergeAdjacent(lhsp, VN_CAST(rhsp, Concat)->lhsp());
         // a a[msb:j]
         if (rselp && !lselp && lhsp->sameGateTree(rselp->fromp()))
-            lselp = new AstSel{lhsp->fileline(), lhsp->cloneTree(false), 0, lhsp->width()};
+            lselp = new AstSel{lhsp->fileline(), lhsp->cloneTreePure(false), 0, lhsp->width()};
         // {b, a[j:k]} a[k-1:i]
         if (rselp && !lselp && VN_IS(lhsp, Concat))
             return ifMergeAdjacent(VN_CAST(lhsp, Concat)->rhsp(), rhsp);
@@ -1812,10 +1812,10 @@ private:
         // {llp OP lrp, rlp OP rrp} => {llp, rlp} OP {lrp, rrp}, where OP = AND/OR/XOR
         AstNodeBiop* const lp = VN_AS(nodep->lhsp(), NodeBiop);
         AstNodeBiop* const rp = VN_AS(nodep->rhsp(), NodeBiop);
-        AstNodeExpr* const llp = lp->lhsp()->cloneTree(false);
-        AstNodeExpr* const lrp = lp->rhsp()->cloneTree(false);
-        AstNodeExpr* const rlp = rp->lhsp()->cloneTree(false);
-        AstNodeExpr* const rrp = rp->rhsp()->cloneTree(false);
+        AstNodeExpr* const llp = lp->lhsp()->cloneTreePure(false);
+        AstNodeExpr* const lrp = lp->rhsp()->cloneTreePure(false);
+        AstNodeExpr* const rlp = rp->lhsp()->cloneTreePure(false);
+        AstNodeExpr* const rrp = rp->rhsp()->cloneTreePure(false);
         if (concatMergeable(lp, rp, 0)) {
             AstConcat* const newlp = new AstConcat{rlp->fileline(), llp, rlp};
             AstConcat* const newrp = new AstConcat{rrp->fileline(), lrp, rrp};
@@ -1897,9 +1897,9 @@ private:
         AstNodeExpr* const ap = lhsp->lhsp()->unlinkFrBack();
         AstNodeExpr* const bp = lhsp->rhsp()->unlinkFrBack();
         AstNodeBiop* const shift1p = nodep;
-        AstNodeBiop* const shift2p = nodep->cloneTree(true);
+        AstNodeBiop* const shift2p = nodep->cloneTreePure(true);
         shift1p->lhsp(ap);
-        shift1p->rhsp(shiftp->cloneTree(true));
+        shift1p->rhsp(shiftp->cloneTreePure(true));
         shift2p->lhsp(bp);
         shift2p->rhsp(shiftp);
         AstNodeBiop* const newp = lhsp;
@@ -2085,7 +2085,7 @@ private:
             AstNodeExpr* const lc2p = VN_AS(nodep->lhsp(), Concat)->rhsp()->unlinkFrBack();
             AstNodeExpr* const conp = VN_AS(nodep->lhsp(), Concat)->unlinkFrBack();
             AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
-            AstNodeExpr* const rhs2p = rhsp->cloneTree(false);
+            AstNodeExpr* const rhs2p = rhsp->cloneTreePure(false);
             // Calc widths
             const int lsb2 = 0;
             const int msb2 = lsb2 + lc2p->width() - 1;
@@ -2430,8 +2430,8 @@ private:
             nodep->fileline(),
             new AstLogOr{nodep->fileline(), new AstLogNot{nodep->fileline(), lhsp}, rhsp},
             new AstLogOr{nodep->fileline(),
-                         new AstLogNot{nodep->fileline(), rhsp->cloneTree(false)},
-                         lhsp->cloneTree(false)}};
+                         new AstLogNot{nodep->fileline(), rhsp->cloneTreePure(false)},
+                         lhsp->cloneTreePure(false)}};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
         VL_DO_DANGLING(nodep->deleteTree(), nodep);
@@ -2588,8 +2588,8 @@ private:
         AstNodeExpr* const bilhsp = fromp->lhsp()->unlinkFrBack();
         AstNodeExpr* const birhsp = fromp->rhsp()->unlinkFrBack();
         //
-        fromp->lhsp(
-            new AstSel{nodep->fileline(), bilhsp, lsbp->cloneTree(true), widthp->cloneTree(true)});
+        fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp->cloneTreePure(true),
+                               widthp->cloneTreePure(true)});
         fromp->rhsp(new AstSel{nodep->fileline(), birhsp, lsbp, widthp});
         fromp->dtypeFrom(nodep);
         nodep->replaceWith(fromp);
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 226185e89..d8d9185ff 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -353,7 +353,7 @@ private:
         }
         if (bitselp) {
             selectsp = new AstSel{nodep->fileline(), selectsp, bitreadp,
-                                  bitselp->widthp()->cloneTree(false)};
+                                  bitselp->widthp()->cloneTreePure(false)};  // Always pure
         }
         // Build "IF (changeit) ...
         UINFO(9, "   For " << setvscp << endl);
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index 6667ee35f..089e551b4 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -282,8 +282,8 @@ class DfgToAstVisitor final : DfgVisitor {
                 FileLine* const flp = dfgVarp->driverFileLine(idx);
                 AstConst* const lsbp = new AstConst{flp, dfgVarp->driverLsb(idx)};
                 AstConst* const widthp = new AstConst{flp, edge.sourcep()->width()};
-                AstSel* const rhsp = new AstSel{flp, rRef(), lsbp, widthp->cloneTree(false)};
-                AstSel* const lhsp = new AstSel{flp, wRef(), lsbp->cloneTree(false), widthp};
+                AstSel* const rhsp = new AstSel{flp, rRef(), lsbp, widthp->cloneTreePure(false)};
+                AstSel* const lhsp = new AstSel{flp, wRef(), lsbp->cloneTreePure(false), widthp};
                 // Add assignment of the value to the selected bits
                 addResultEquation(flp, lhsp, rhsp);
             });
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 54cb31068..7af734fe8 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -137,7 +137,7 @@ private:
                                   AstNodeExpr* rhsp) {
         FileLine* const fl = placep->fileline();
         return new AstAssign{fl,
-                             new AstWordSel{fl, lhsp->cloneTree(true),
+                             new AstWordSel{fl, lhsp->cloneTreePure(true),
                                             new AstConst{fl, static_cast<uint32_t>(word)}},
                              rhsp};
     }
@@ -166,20 +166,20 @@ private:
         // Concat may pass negative word numbers, that means it wants a zero
         FileLine* const fl = nodep->fileline();
         if (nodep->isWide() && word >= 0 && word < nodep->widthWords()) {
-            return new AstWordSel{fl, nodep->cloneTree(true),
+            return new AstWordSel{fl, nodep->cloneTreePure(true),
                                   new AstConst{fl, static_cast<uint32_t>(word)}};
         } else if (nodep->isQuad() && word == 0) {
-            AstNodeExpr* const quadfromp = nodep->cloneTree(true);
+            AstNodeExpr* const quadfromp = nodep->cloneTreePure(true);
             quadfromp->dtypeSetBitUnsized(VL_QUADSIZE, quadfromp->widthMin(), VSigning::UNSIGNED);
             return new AstCCast{fl, quadfromp, VL_EDATASIZE};
         } else if (nodep->isQuad() && word == 1) {
-            AstNodeExpr* const quadfromp = nodep->cloneTree(true);
+            AstNodeExpr* const quadfromp = nodep->cloneTreePure(true);
             quadfromp->dtypeSetBitUnsized(VL_QUADSIZE, quadfromp->widthMin(), VSigning::UNSIGNED);
             return new AstCCast{
                 fl, new AstShiftR{fl, quadfromp, new AstConst{fl, VL_EDATASIZE}, VL_EDATASIZE},
                 VL_EDATASIZE};
         } else if (!nodep->isWide() && !nodep->isQuad() && word == 0) {
-            return nodep->cloneTree(true);
+            return nodep->cloneTreePure(true);
         } else {  // Out of bounds
             return new AstConst{fl, 0};
         }
@@ -231,7 +231,7 @@ private:
             if (VN_IS(lsbp, Const)) {
                 wordp = new AstConst{lfl, wordOffset + VL_BITWORD_E(VN_AS(lsbp, Const)->toUInt())};
             } else {
-                wordp = new AstShiftR{lfl, lsbp->cloneTree(true),
+                wordp = new AstShiftR{lfl, lsbp->cloneTreePure(true),
                                       new AstConst{lfl, VL_EDATASIZE_LOG2}, VL_EDATASIZE};
                 if (wordOffset
                     != 0) {  // This is indexing a arraysel, so a 32 bit constant is fine
@@ -260,7 +260,7 @@ private:
             return new AstConst{fl, VL_BITBIT_E(VN_AS(lsbp, Const)->toUInt())};
         } else {
             return new AstAnd{fl, new AstConst{fl, VL_EDATASIZE - 1},
-                              dropCondBound(lsbp)->cloneTree(true)};
+                              dropCondBound(lsbp)->cloneTreePure(true)};
         }
     }
 
@@ -351,7 +351,7 @@ private:
         FileLine* const fl = nodep->fileline();
         for (int w = 0; w < nodep->widthWords(); ++w) {
             addWordAssign(nodep, w,
-                          new AstCond{fl, rhsp->condp()->cloneTree(true),
+                          new AstCond{fl, rhsp->condp()->cloneTreePure(true),
                                       newAstWordSelClone(rhsp->thenp(), w),
                                       newAstWordSelClone(rhsp->elsep(), w)});
         }
@@ -419,7 +419,7 @@ private:
             FileLine* const lfl = nodep->lsbp()->fileline();
             FileLine* const ffl = nodep->fromp()->fileline();
             AstNodeExpr* lowwordp
-                = newWordSel(ffl, nodep->fromp()->cloneTree(true), nodep->lsbp());
+                = newWordSel(ffl, nodep->fromp()->cloneTreePure(true), nodep->lsbp());
             if (nodep->isQuad() && !lowwordp->isQuad()) {
                 lowwordp = new AstCCast{nfl, lowwordp, nodep};
             }
@@ -431,9 +431,9 @@ private:
                 const uint32_t midMsbOffset
                     = std::min<uint32_t>(nodep->widthConst(), VL_EDATASIZE) - 1;
                 AstNodeExpr* const midMsbp = new AstAdd{lfl, new AstConst{lfl, midMsbOffset},
-                                                        nodep->lsbp()->cloneTree(true)};
+                                                        nodep->lsbp()->cloneTreePure(true)};
                 AstNodeExpr* midwordp =  // SEL(from,[midwordnum])
-                    newWordSel(ffl, nodep->fromp()->cloneTree(true), midMsbp, 0);
+                    newWordSel(ffl, nodep->fromp()->cloneTreePure(true), midMsbp, 0);
                 // newWordSel clones the index, so delete it
                 VL_DO_DANGLING(midMsbp->deleteTree(), midMsbp);
                 if (nodep->isQuad() && !midwordp->isQuad()) {
@@ -459,9 +459,9 @@ private:
             if (nodep->widthConst() > VL_EDATASIZE) {
                 const uint32_t hiMsbOffset = nodep->widthConst() - 1;
                 AstNodeExpr* const hiMsbp = new AstAdd{lfl, new AstConst{lfl, hiMsbOffset},
-                                                       nodep->lsbp()->cloneTree(true)};
+                                                       nodep->lsbp()->cloneTreePure(true)};
                 AstNodeExpr* hiwordp =  // SEL(from,[hiwordnum])
-                    newWordSel(ffl, nodep->fromp()->cloneTree(true), hiMsbp);
+                    newWordSel(ffl, nodep->fromp()->cloneTreePure(true), hiMsbp);
                 // newWordSel clones the index, so delete it
                 VL_DO_DANGLING(hiMsbp->deleteTree(), hiMsbp);
                 if (nodep->isQuad() && !hiwordp->isQuad()) {
@@ -518,13 +518,13 @@ private:
             for (int w = 0; w < nodep->widthWords(); ++w) {
                 // Grab lowest bits
                 AstNodeExpr* const lowwordp
-                    = newWordSel(rfl, rhsp->fromp()->cloneTree(true), rhsp->lsbp(), w);
+                    = newWordSel(rfl, rhsp->fromp()->cloneTreePure(true), rhsp->lsbp(), w);
                 AstNodeExpr* const lowp
                     = new AstShiftR{rfl, lowwordp, newSelBitBit(rhsp->lsbp()), VL_EDATASIZE};
                 // Upper bits
                 const V3Number zero{nodep, VL_EDATASIZE, 0};
                 AstNodeExpr* const midwordp =  // SEL(from,[1+wordnum])
-                    newWordSel(ffl, rhsp->fromp()->cloneTree(true), rhsp->lsbp(), w + 1);
+                    newWordSel(ffl, rhsp->fromp()->cloneTreePure(true), rhsp->lsbp(), w + 1);
                 AstNodeExpr* const midshiftp
                     = new AstSub{lfl, new AstConst{lfl, VL_EDATASIZE}, newSelBitBit(rhsp->lsbp())};
                 AstNodeExpr* const midmayp = new AstShiftL{rfl, midwordp, midshiftp, VL_EDATASIZE};
@@ -596,9 +596,9 @@ private:
             } else {
                 UINFO(8, "    ASSIGNSEL(const,narrow) " << nodep << endl);
                 if (destp->isQuad() && !rhsp->isQuad()) { rhsp = new AstCCast{nfl, rhsp, nodep}; }
-                AstNodeExpr* oldvalp = destp->cloneTree(true);
+                AstNodeExpr* oldvalp = destp->cloneTreePure(true);
                 fixCloneLvalue(oldvalp);
-                if (!ones) { oldvalp = new AstAnd{lfl, new AstConst{lfl, maskold}, oldvalp}; }
+                if (!ones) oldvalp = new AstAnd{lfl, new AstConst{lfl, maskold}, oldvalp};
 
                 // The bit-select can refer to bits outside the width of nodep
                 // which we aren't allowed to assign to.  This is a mask of the
@@ -619,7 +619,7 @@ private:
                 UINFO(8, "    ASSIGNSEL(varlsb,wide,1bit) " << nodep << endl);
                 AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
                 AstNodeExpr* const destp = lhsp->fromp()->unlinkFrBack();
-                AstNodeExpr* oldvalp = newWordSel(lfl, destp->cloneTree(true), lhsp->lsbp());
+                AstNodeExpr* oldvalp = newWordSel(lfl, destp->cloneTreePure(true), lhsp->lsbp());
                 fixCloneLvalue(oldvalp);
                 if (!ones) {
                     oldvalp = new AstAnd{
@@ -633,7 +633,7 @@ private:
                         oldvalp};
                 }
                 // Restrict the shift amount to 0-31, see bug804.
-                AstNodeExpr* const shiftp = new AstAnd{nfl, lhsp->lsbp()->cloneTree(true),
+                AstNodeExpr* const shiftp = new AstAnd{nfl, lhsp->lsbp()->cloneTreePure(true),
                                                        new AstConst{nfl, VL_EDATASIZE - 1}};
                 AstNode* const newp = new AstAssign{
                     nfl, newWordSel(nfl, destp, lhsp->lsbp()),
@@ -657,7 +657,7 @@ private:
                 // nodep->dumpTree("-  old: ");
                 AstNodeExpr* rhsp = nodep->rhsp()->unlinkFrBack();
                 AstNodeExpr* const destp = lhsp->fromp()->unlinkFrBack();
-                AstNodeExpr* oldvalp = destp->cloneTree(true);
+                AstNodeExpr* oldvalp = destp->cloneTreePure(true);
                 fixCloneLvalue(oldvalp);
 
                 V3Number maskwidth{nodep, destp->widthMin()};
@@ -667,13 +667,13 @@ private:
                 if (!ones) {
                     oldvalp = new AstAnd{
                         lfl,
-                        new AstNot{lfl,
-                                   new AstShiftL{lfl, new AstConst{nfl, maskwidth},
-                                                 lhsp->lsbp()->cloneTree(true), destp->width()}},
+                        new AstNot{lfl, new AstShiftL{lfl, new AstConst{nfl, maskwidth},
+                                                      lhsp->lsbp()->cloneTreePure(true),
+                                                      destp->width()}},
                         oldvalp};
                 }
                 AstNodeExpr* newp
-                    = new AstShiftL{lfl, rhsp, lhsp->lsbp()->cloneTree(true), destp->width()};
+                    = new AstShiftL{lfl, rhsp, lhsp->lsbp()->cloneTreePure(true), destp->width()};
                 // Apply cleaning to the new value being inserted.  Mask is
                 // slightly wider than necessary to avoid an AND with all ones
                 // being optimized out.  No need to clean if destp is
@@ -749,12 +749,12 @@ private:
                             "Replication value isn't a constant.  Checked earlier!");
                 const uint32_t times = constp->toUInt();
                 if (nodep->isQuad() && !lhsp->isQuad()) { lhsp = new AstCCast{fl, lhsp, nodep}; }
-                newp = lhsp->cloneTree(true);
+                newp = lhsp->cloneTreePure(true);
                 for (unsigned repnum = 1; repnum < times; repnum++) {
                     const int rhsshift = repnum * lhswidth;
                     newp = new AstOr{
                         fl,
-                        new AstShiftL{fl, lhsp->cloneTree(true),
+                        new AstShiftL{fl, lhsp->cloneTreePure(true),
                                       new AstConst{fl, static_cast<uint32_t>(rhsshift)},
                                       nodep->width()},
                         newp};
@@ -778,7 +778,7 @@ private:
         for (int w = 0; w < rhsp->widthWords(); ++w) {
             AstNodeExpr* newp;
             if (lhswidth == 1) {
-                newp = new AstNegate{fl, lhsp->cloneTree(true)};
+                newp = new AstNegate{fl, lhsp->cloneTreePure(true)};
                 // Replicate always unsigned
                 newp->dtypeSetLogicSized(VL_EDATASIZE, VSigning::UNSIGNED);
             } else {
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index 6eab5f0d4..464ea6237 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -188,13 +188,13 @@ class ForceConvertVisitor final : public VNVisitor {
         V3Number ones{lhsp, isRangedDType(lhsp) ? lhsp->width() : 1};
         ones.setAllBits1();
         AstAssign* const setEnp
-            = new AstAssign{flp, lhsp->cloneTree(false), new AstConst{rhsp->fileline(), ones}};
+            = new AstAssign{flp, lhsp->cloneTreePure(false), new AstConst{rhsp->fileline(), ones}};
         transformWritenVarScopes(setEnp->lhsp(), [this](AstVarScope* vscp) {
             return getForceComponents(vscp).m_enVscp;
         });
         // Set corresponding value signals to the forced value
         AstAssign* const setValp
-            = new AstAssign{flp, lhsp->cloneTree(false), rhsp->cloneTree(false)};
+            = new AstAssign{flp, lhsp->cloneTreePure(false), rhsp->cloneTreePure(false)};
         transformWritenVarScopes(setValp->lhsp(), [this](AstVarScope* vscp) {
             return getForceComponents(vscp).m_valVscp;
         });
@@ -223,7 +223,7 @@ class ForceConvertVisitor final : public VNVisitor {
         V3Number zero{lhsp, isRangedDType(lhsp) ? lhsp->width() : 1};
         zero.setAllBits0();
         AstAssign* const resetEnp
-            = new AstAssign{flp, lhsp->cloneTree(false), new AstConst{lhsp->fileline(), zero}};
+            = new AstAssign{flp, lhsp->cloneTreePure(false), new AstConst{lhsp->fileline(), zero}};
         transformWritenVarScopes(resetEnp->lhsp(), [this](AstVarScope* vscp) {
             return getForceComponents(vscp).m_enVscp;
         });
@@ -235,7 +235,7 @@ class ForceConvertVisitor final : public VNVisitor {
         FileLine* const fl_nowarn = new FileLine{flp};
         fl_nowarn->warnOff(V3ErrorCode::BLKANDNBLK, true);
         AstAssign* const resetRdp
-            = new AstAssign{fl_nowarn, lhsp->cloneTree(false), lhsp->unlinkFrBack()};
+            = new AstAssign{fl_nowarn, lhsp->cloneTreePure(false), lhsp->unlinkFrBack()};
         // Replace write refs on the LHS
         resetRdp->lhsp()->foreach([this](AstNodeVarRef* refp) {
             if (refp->access() != VAccess::WRITE) return;
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index e99c1561f..b3811bce8 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -395,7 +395,7 @@ private:
     void optimizeElimVar(AstVarScope* varscp, AstNode* substp, AstNode* consumerp) {
         if (debug() >= 5) consumerp->dumpTree("-    elimUsePre: ");
         if (!m_substitutions.tryGet(consumerp)) m_optimized.push_back(consumerp);
-        m_substitutions(consumerp).emplace(varscp, substp->cloneTree(false));
+        m_substitutions(consumerp).emplace(varscp, substp->cloneTreePure(false));
     }
 
     void commitElimVar(AstNode* logicp) {
@@ -1008,7 +1008,7 @@ static void eliminate(AstNode* logicp,
                     // Prevent an infinite loop...
                     substp, "Replacing node with itself; perhaps circular logic?");
         // The replacement
-        AstNode* const newp = substp->cloneTree(false);
+        AstNode* const newp = substp->cloneTreePure(false);
         // Which fileline() to use? If replacing with logic, an error/warning is likely to want
         // to point to the logic IE what we're replacing with. However, a VARREF should point
         // to the original as it's otherwise confusing to throw warnings that point to a PIN
@@ -1219,9 +1219,10 @@ private:
                             preselp->replaceWith(newselp);
                             VL_DO_DANGLING(preselp->deleteTree(), preselp);
                             // create new rhs for pre assignment
-                            AstNode* const newrhsp = new AstConcat{
-                                m_assignp->rhsp()->fileline(), m_assignp->rhsp()->cloneTree(false),
-                                assignp->rhsp()->cloneTree(false)};
+                            AstNode* const newrhsp
+                                = new AstConcat{m_assignp->rhsp()->fileline(),
+                                                m_assignp->rhsp()->cloneTreePure(false),
+                                                assignp->rhsp()->cloneTreePure(false)};
                             AstNode* const oldrhsp = m_assignp->rhsp();
                             oldrhsp->replaceWith(newrhsp);
                             VL_DO_DANGLING(oldrhsp->deleteTree(), oldrhsp);
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 3a6eb7eaf..6c0834182 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -283,9 +283,9 @@ private:
         // Define what operation will we be doing
         AstNodeExpr* operp;
         if (VN_IS(nodep, PostSub) || VN_IS(nodep, PreSub)) {
-            operp = new AstSub{fl, readp->cloneTree(true), newconstp};
+            operp = new AstSub{fl, readp->cloneTreePure(true), newconstp};
         } else {
-            operp = new AstAdd{fl, readp->cloneTree(true), newconstp};
+            operp = new AstAdd{fl, readp->cloneTreePure(true), newconstp};
         }
 
         if (VN_IS(nodep, PreAdd) || VN_IS(nodep, PreSub)) {
@@ -301,7 +301,7 @@ private:
             // PostAdd/PostSub operations
             // Assign the original variable to the temporary one
             AstAssign* const assignp = new AstAssign{fl, new AstVarRef{fl, varp, VAccess::WRITE},
-                                                     readp->cloneTree(true)};
+                                                     readp->cloneTreePure(true)};
             insertNextToStmt(nodep, assignp);
             // Increment the original variable by one
             assignp->addNextHere(new AstAssign{fl, writep, operp});
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index 8a237c8ba..52c6a4dfa 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -601,7 +601,7 @@ private:
             if (condp == rhsp) return resp;
             if (const AstAnd* const andp = VN_CAST(rhsp, And)) {
                 UASSERT_OBJ(andp->rhsp() == condp, rhsp, "Should not try to fold this");
-                return new AstAnd{andp->fileline(), andp->lhsp()->cloneTree(false), resp};
+                return new AstAnd{andp->fileline(), andp->lhsp()->cloneTreePure(false), resp};
             }
         } else if (const AstAnd* const andp = VN_CAST(rhsp, And)) {
             if (andp->lhsp()->sameTree(m_mgCondp)) {
@@ -655,7 +655,7 @@ private:
 
             // We need a copy of the condition in the new equivalent 'if' statement,
             // and we also need to keep track of it for comparisons later.
-            m_mgCondp = m_mgCondp->cloneTree(false);
+            m_mgCondp = m_mgCondp->cloneTreePure(false);
             // Create equivalent 'if' statement and insert it before the first node
             AstIf* const resultp = new AstIf{m_mgCondp->fileline(), m_mgCondp};
             m_mgFirstp->addHereThisAsNext(resultp);
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 2d1d3cfdb..9b58dc8b4 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -257,7 +257,7 @@ private:
                     // Create equivalent of VL_SIGNONES_(node_width)
                     constzerop = new AstNegate{
                         nodep->fileline(),
-                        new AstShiftR{nodep->fileline(), nodep->lhsp()->cloneTree(false),
+                        new AstShiftR{nodep->fileline(), nodep->lhsp()->cloneTreePure(false),
                                       new AstConst(nodep->fileline(), m1value), nodep->width()}};
                 } else {
                     constzerop = new AstConst{nodep->fileline(), AstConst::WidthedValue{},
@@ -269,10 +269,10 @@ private:
                     = new AstConst(nodep->fileline(), AstConst::WidthedValue{},
                                    nodep->rhsp()->widthMin(), m1value);
                 constwidthp->dtypeFrom(nodep->rhsp());  // unsigned
-                AstCond* const newp = new AstCond{
-                    nodep->fileline(),
-                    new AstGte{nodep->fileline(), constwidthp, nodep->rhsp()->cloneTree(false)},
-                    nodep, constzerop};
+                AstCond* const newp = new AstCond{nodep->fileline(),
+                                                  new AstGte{nodep->fileline(), constwidthp,
+                                                             nodep->rhsp()->cloneTreePure(false)},
+                                                  nodep, constzerop};
                 replaceHandle.relink(newp);
             }
         }
@@ -370,7 +370,7 @@ private:
                 UINFO(4, "Autoflush " << nodep << endl);
                 nodep->addNextHere(
                     new AstFFlush{nodep->fileline(),
-                                  nodep->filep() ? nodep->filep()->cloneTree(true) : nullptr});
+                                  nodep->filep() ? nodep->filep()->cloneTreePure(true) : nullptr});
             }
         }
     }
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 7d6aad6f9..95c4ce2e9 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -338,7 +338,7 @@ private:
                 = new AstIf{itemp->fileline(),
                             new AstLte{condp->fileline(),
                                        new AstVarRef{condp->fileline(), randVarp, VAccess::READ},
-                                       sump->cloneTree(true)},
+                                       sump->cloneTreePure(true)},
                             stmtsp, nullptr};
             ifsp->addElsesp(newifp);
             ifsp = newifp;
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index e4aa7407f..968a16571 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -98,10 +98,10 @@ class SliceVisitor final : public VNVisitor {
                 nodep->v3error("Array initialization has too few elements, need element "
                                << offset);
             }
-            newp = itemp ? itemp->cloneTree(false) : new AstConst{nodep->fileline(), 0};
+            newp = itemp ? itemp->cloneTreePure(false) : new AstConst{nodep->fileline(), 0};
         } else if (AstNodeCond* const snodep = VN_CAST(nodep, NodeCond)) {
             UINFO(9, "  cloneCond(" << elements << "," << offset << ") " << nodep << endl);
-            return snodep->cloneType(snodep->condp()->cloneTree(false),
+            return snodep->cloneType(snodep->condp()->cloneTreePure(false),
                                      cloneAndSel(snodep->thenp(), elements, offset),
                                      cloneAndSel(snodep->elsep(), elements, offset));
         } else if (const AstSliceSel* const snodep = VN_CAST(nodep, SliceSel)) {
@@ -110,7 +110,8 @@ class SliceVisitor final : public VNVisitor {
                                   + (!snodep->declRange().ascending()
                                          ? snodep->declRange().elements() - 1 - offset
                                          : offset));
-            newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTree(false), leOffset};
+            newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTreePure(false),
+                                   leOffset};
         } else if (VN_IS(nodep, ArraySel) || VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel)
                    || VN_IS(nodep, CMethodHard) || VN_IS(nodep, MemberSel)
                    || VN_IS(nodep, ExprStmt)) {
@@ -118,7 +119,7 @@ class SliceVisitor final : public VNVisitor {
             const int leOffset = !arrayp->rangep()->ascending()
                                      ? arrayp->rangep()->elementsConst() - 1 - offset
                                      : offset;
-            newp = new AstArraySel{nodep->fileline(), VN_AS(nodep, NodeExpr)->cloneTree(false),
+            newp = new AstArraySel{nodep->fileline(), VN_AS(nodep, NodeExpr)->cloneTreePure(false),
                                    leOffset};
         } else {
             if (!m_assignError) {
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index 5ff887b59..1e6b82801 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -767,6 +767,8 @@ protected:
             // Clone this if into its set of split blocks
             AstSplitPlaceholder* const if_placeholderp = makePlaceholderp();
             AstSplitPlaceholder* const else_placeholderp = makePlaceholderp();
+            // We check for condition isPure earlier, but may still clone a
+            // non-pure to separate from other pure statements.
             AstIf* const clonep = new AstIf{nodep->fileline(), nodep->condp()->cloneTree(true),
                                             if_placeholderp, else_placeholderp};
             const AstIf* const origp = VN_CAST(nodep, If);
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index 24bf6f831..f67263dd7 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -142,6 +142,9 @@ private:
     void splitAlways(AstAlways* nodep, AstVarScope* splitVscp) {
         if (debug() >= 9) nodep->dumpTree("-  in: ");
         // Duplicate it and link in
+        // Below cloneTree should perhaps be cloneTreePure, but given
+        // isolate_assignments is required to hit this code, we presume the user
+        // knows what they are asking for
         AstAlways* const newp = nodep->cloneTree(false);
         newp->user1(true);  // So we don't clone it again
         nodep->addNextHere(newp);
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 38ebafb6a..79aa116a6 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -292,7 +292,7 @@ private:
     }
     void replaceSubstEtc(AstNode* nodep, AstNodeExpr* substp) {
         if (debug() > 5) nodep->dumpTree("-  substw_old: ");
-        AstNodeExpr* newp = substp->cloneTree(true);
+        AstNodeExpr* newp = substp->cloneTreePure(true);
         if (!nodep->isQuad() && newp->isQuad()) {
             newp = new AstCCast{newp->fileline(), newp, nodep};
         }
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index 99ff0f328..ded800d65 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -516,14 +516,14 @@ class TristateVisitor final : public TristateBaseVisitor {
 
             // Unlink lhsp before copying to save unnecessary copy of lhsp
             AstNodeExpr* const lhsp = extendp->lhsp()->unlinkFrBack();
-            AstExtend* const enExtendp = extendp->cloneTree(false);
+            AstExtend* const enExtendp = extendp->cloneTreePure(false);
             extendp->lhsp(lhsp);
             AstNodeExpr* const enLhsp = getEnExprBasedOnOriginalp(lhsp);
             enExtendp->lhsp(new AstNot{enLhsp->fileline(), enLhsp});
             return new AstNot{enExtendp->fileline(), enExtendp};
         } else if (AstSel* const selp = VN_CAST(nodep, Sel)) {
             AstNodeExpr* const fromp = selp->fromp()->unlinkFrBack();
-            AstSel* const enSelp = selp->cloneTree(false);
+            AstSel* const enSelp = selp->cloneTreePure(false);
             selp->fromp(fromp);
             AstNodeExpr* const enFromp = getEnExprBasedOnOriginalp(fromp);
             enSelp->fromp(enFromp);
@@ -572,7 +572,7 @@ class TristateVisitor final : public TristateBaseVisitor {
         // Would be nicer if we made this a new AST type
         AstNodeExpr* const newp = new AstShiftL{
             selp->fileline(), new AstExtend{selp->fileline(), enp, selp->fromp()->width()},
-            selp->lsbp()->cloneTree(false), selp->fromp()->width()};
+            selp->lsbp()->cloneTreePure(false), selp->fromp()->width()};
         return newp;
     }
 
@@ -779,7 +779,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 // If weaker driver should be overwritten by a stronger, replace its value with z
                 exprCurrentStrengthp
                     = new AstAnd{fl, new AstVarRef{fl, varStrengthp, VAccess::READ},
-                                 new AstNot{fl, enp->cloneTree(false)}};
+                                 new AstNot{fl, enp->cloneTreePure(false)}};
             } else {
                 exprCurrentStrengthp = new AstVarRef{fl, varStrengthp, VAccess::READ};
             }
@@ -1086,7 +1086,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 if (nodep->fromp()->user1p()) {  // SEL(VARREF, lsb)
                     AstNodeExpr* const en1p = getEnp(nodep->fromp());
                     AstNodeExpr* const enp
-                        = new AstSel{nodep->fileline(), en1p, nodep->lsbp()->cloneTree(true),
+                        = new AstSel{nodep->fileline(), en1p, nodep->lsbp()->cloneTreePure(true),
                                      nodep->widthp()->cloneTree(true)};
                     UINFO(9, "       newsel " << enp << endl);
                     nodep->user1p(enp);  // propagate up SEL(fromp->enable, value)
@@ -1113,7 +1113,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                     // Each half of the concat gets a select of the enable expression
                     AstNodeExpr* const enp = VN_AS(nodep->user1p(), NodeExpr);
                     nodep->user1p(nullptr);
-                    nodep->lhsp()->user1p(new AstSel{nodep->fileline(), enp->cloneTree(true),
+                    nodep->lhsp()->user1p(new AstSel{nodep->fileline(), enp->cloneTreePure(true),
                                                      nodep->rhsp()->width(),
                                                      nodep->lhsp()->width()});
                     nodep->rhsp()->user1p(
@@ -1208,8 +1208,8 @@ class TristateVisitor final : public TristateBaseVisitor {
             m_tgraph.didProcess(nodep);
             AstNodeExpr* const en1p = getEnp(expr1p);
             AstNodeExpr* const en2p = getEnp(expr2p);
-            AstNodeExpr* subexpr1p = expr1p->cloneTree(false);
-            AstNodeExpr* subexpr2p = expr2p->cloneTree(false);
+            AstNodeExpr* subexpr1p = expr1p->cloneTreePure(false);
+            AstNodeExpr* subexpr2p = expr2p->cloneTreePure(false);
             if (isAnd) {
                 subexpr1p = new AstNot{nodep->fileline(), subexpr1p};
                 subexpr2p = new AstNot{nodep->fileline(), subexpr2p};
@@ -1407,15 +1407,15 @@ class TristateVisitor final : public TristateBaseVisitor {
                 if (nonXp) {  // Need to still count '0 or '1 or 'x's
                     if (dropop[0]) {
                         nodep->rhsp()->unlinkFrBack()->deleteTree();
-                        nodep->rhsp(nonXp->cloneTree(true));
+                        nodep->rhsp(nonXp->cloneTreePure(true));
                     }
                     if (dropop[1]) {
                         nodep->thsp()->unlinkFrBack()->deleteTree();
-                        nodep->thsp(nonXp->cloneTree(true));
+                        nodep->thsp(nonXp->cloneTreePure(true));
                     }
                     if (dropop[2]) {
                         nodep->fhsp()->unlinkFrBack()->deleteTree();
-                        nodep->fhsp(nonXp->cloneTree(true));
+                        nodep->fhsp(nonXp->cloneTreePure(true));
                     }
                     newp = new AstAdd{nodep->fileline(), nodep, newp};
                 }
@@ -1582,8 +1582,8 @@ class TristateVisitor final : public TristateBaseVisitor {
                                                      << nodep->prettyNameQ());
                 }
             } else {
-                AstNodeExpr* const outexprp
-                    = VN_AS(nodep->exprp(), NodeExpr)->cloneTree(false);  // Note has lvalue() set
+                AstNodeExpr* const outexprp = VN_AS(nodep->exprp(), NodeExpr)
+                                                  ->cloneTreePure(false);  // Note has lvalue() set
                 outpinp = new AstPin{nodep->fileline(), nodep->pinNum(),
                                      outModVarp->name(),  // should be {var}"__out"
                                      outexprp};
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index bf597e4e3..66a6c78c4 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -306,15 +306,15 @@ private:
         }
         if (dropop[0]) {
             nodep->rhsp()->unlinkFrBack()->deleteTree();
-            nodep->rhsp(nonXp->cloneTree(true));
+            nodep->rhsp(nonXp->cloneTreePure(true));
         }
         if (dropop[1]) {
             nodep->thsp()->unlinkFrBack()->deleteTree();
-            nodep->thsp(nonXp->cloneTree(true));
+            nodep->thsp(nonXp->cloneTreePure(true));
         }
         if (dropop[2]) {
             nodep->fhsp()->unlinkFrBack()->deleteTree();
-            nodep->fhsp(nonXp->cloneTree(true));
+            nodep->fhsp(nonXp->cloneTreePure(true));
         }
         iterateChildren(nodep);
     }
@@ -398,7 +398,7 @@ private:
                 = new AstGte{nodep->fileline(),
                              new AstConst(nodep->fileline(), AstConst::WidthedValue{},
                                           nodep->lsbp()->width(), maxmsb),
-                             nodep->lsbp()->cloneTree(false)};
+                             nodep->lsbp()->cloneTreePure(false)};
             // See if the condition is constant true (e.g. always in bound due to constant select)
             // Note below has null backp(); the Edit function knows how to deal with that.
             condp = V3Const::constifyEdit(condp);
@@ -457,7 +457,7 @@ private:
                 = new AstGte{nodep->fileline(),
                              new AstConst(nodep->fileline(), AstConst::WidthedValue{},
                                           nodep->bitp()->width(), declElements - 1),
-                             nodep->bitp()->cloneTree(false)};
+                             nodep->bitp()->cloneTreePure(false)};
             // Note below has null backp(); the Edit function knows how to deal with that.
             condp = V3Const::constifyEdit(condp);
             if (condp->isOne()) {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index e1c0edff1..c00628e92 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1858,7 +1858,7 @@ private:
             if (assoc) {
                 AstVar* const varp = enumVarp(enumDtp, VAttrType::ENUM_VALID, true, 0);
                 testp = new AstAssocSel{fl_novalue, newVarRefDollarUnit(varp),
-                                        nodep->fromp()->cloneTree(false)};
+                                        nodep->fromp()->cloneTreePure(false)};
             } else {
                 const int selwidth = V3Number::log2b(maxval) + 1;  // Width to address a bit
                 AstVar* const varp
@@ -1867,12 +1867,12 @@ private:
                 fl_nowidth->warnOff(V3ErrorCode::WIDTH, true);
                 testp = new AstCond{
                     fl,
-                    new AstGt{fl_nowidth, nodep->fromp()->cloneTree(false),
+                    new AstGt{fl_nowidth, nodep->fromp()->cloneTreePure(false),
                               new AstConst{fl_nowidth, AstConst::Unsized64{}, maxval}},
                     new AstConst{fl, AstConst::BitFalse{}},
-                    new AstArraySel{
-                        fl, newVarRefDollarUnit(varp),
-                        new AstSel{fl_novalue, nodep->fromp()->cloneTree(false), 0, selwidth}}};
+                    new AstArraySel{fl, newVarRefDollarUnit(varp),
+                                    new AstSel{fl_novalue, nodep->fromp()->cloneTreePure(false), 0,
+                                               selwidth}}};
             }
             newp = new AstCond{
                 fl, testp,
@@ -2550,7 +2550,7 @@ private:
                     "Inside operator not legal on non-unpacked arrays (IEEE 1800-2017 11.4.13)");
                 continue;
             } else {
-                inewp = AstEqWild::newTyped(itemp->fileline(), nodep->exprp()->cloneTree(true),
+                inewp = AstEqWild::newTyped(itemp->fileline(), nodep->exprp()->cloneTreePure(true),
                                             itemp->unlinkFrBack());
             }
             if (newp) {
@@ -3625,7 +3625,7 @@ private:
             FileLine* const fl = nodep->fileline();
             AstNodeExpr* newp = nullptr;
             for (int i = 0; i < adtypep->elementsConst(); ++i) {
-                AstNodeExpr* const arrayRef = nodep->fromp()->cloneTree(false);
+                AstNodeExpr* const arrayRef = nodep->fromp()->cloneTreePure(false);
                 AstNodeExpr* const selector = new AstArraySel{fl, arrayRef, i};
                 if (!newp) {
                     newp = selector;
@@ -4552,8 +4552,9 @@ private:
                 if (adtypep->isString()) {
                     if (varp) {
                         AstConst* const leftp = new AstConst{fl, AstConst::Signed32{}, 0};
-                        AstLt* const condp = new AstLt{fl, new AstVarRef{fl, varp, VAccess::READ},
-                                                       new AstLenN{fl, fromp->cloneTree(false)}};
+                        AstLt* const condp
+                            = new AstLt{fl, new AstVarRef{fl, varp, VAccess::READ},
+                                        new AstLenN{fl, fromp->cloneTreePure(false)}};
                         AstAdd* const incp
                             = new AstAdd{fl, new AstConst{fl, AstConst::Signed32{}, 1},
                                          new AstVarRef{fl, varp, VAccess::READ}};
@@ -4576,7 +4577,8 @@ private:
             } else if (VN_IS(fromDtp, DynArrayDType) || VN_IS(fromDtp, QueueDType)) {
                 if (varp) {
                     auto* const leftp = new AstConst{fl, AstConst::Signed32{}, 0};
-                    auto* const sizep = new AstCMethodHard{fl, fromp->cloneTree(false), "size"};
+                    auto* const sizep
+                        = new AstCMethodHard{fl, fromp->cloneTreePure(false), "size"};
                     sizep->dtypeSetSigned32();
                     sizep->didWidth(true);
                     sizep->protect(false);
@@ -4601,10 +4603,10 @@ private:
                     fl, VVarType::BLOCKTEMP, varp->name() + "__Vfirst", VFlagBitPacked{}, 1};
                 first_varp->usedLoopIdx(true);
                 AstNodeExpr* const firstp = new AstMethodCall{
-                    fl, fromp->cloneTree(false), "first",
+                    fl, fromp->cloneTreePure(false), "first",
                     new AstArg{fl, "", new AstVarRef{fl, varp, VAccess::READWRITE}}};
                 AstNodeExpr* const nextp = new AstMethodCall{
-                    fl, fromp->cloneTree(false), "next",
+                    fl, fromp->cloneTreePure(false), "next",
                     new AstArg{fl, "", new AstVarRef{fl, varp, VAccess::READWRITE}}};
                 AstNode* const first_clearp
                     = new AstAssign{fl, new AstVarRef{fl, first_varp, VAccess::WRITE},
diff --git a/src/astgen b/src/astgen
index 048077e3d..761313ee5 100755
--- a/src/astgen
+++ b/src/astgen
@@ -961,6 +961,9 @@ def write_ast_macros(filename):
             Ast{t}* cloneTree(bool cloneNext) {{
                 return static_cast<Ast{t}*>(AstNode::cloneTree(cloneNext));
             }}
+            Ast{t}* cloneTreePure(bool cloneNext) {{
+                return static_cast<Ast{t}*>(AstNode::cloneTreePure(cloneNext));
+            }}
             Ast{t}* clonep() const {{ return static_cast<Ast{t}*>(AstNode::clonep()); }}
             Ast{t}* addNext(Ast{t}* nodep) {{ return static_cast<Ast{t}*>(AstNode::addNext(this, nodep)); }}
             ''',
diff --git a/src/verilog.y b/src/verilog.y
index 65d92bc6b..794a4cf61 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -2885,40 +2885,40 @@ genvar_iteration<nodep>:        // ==IEEE: genvar_iteration
                 varRefBase '='          expr
                         { $$ = new AstAssign{$2, $1, $3}; }
         |       varRefBase yP_PLUSEQ    expr
-                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_MINUSEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_TIMESEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstMul{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstMul{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_DIVEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstDiv{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstDiv{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_MODEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstModDiv{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstModDiv{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_ANDEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstAnd{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstAnd{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_OREQ      expr
-                        { $$ = new AstAssign{$2, $1, new AstOr{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstOr{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_XOREQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstXor{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstXor{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_SLEFTEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftL{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftL{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_SRIGHTEQ  expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftR{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftR{$2, $1->cloneTreePure(true), $3}}; }
         |       varRefBase yP_SSRIGHTEQ expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftRS{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftRS{$2, $1->cloneTreePure(true), $3}}; }
         //                      // inc_or_dec_operator
         // When support ++ as a real AST type, maybe AstWhile::precondsp() becomes generic AstNodeExprStmt?
         |       yP_PLUSPLUS   varRefBase
-                        { $$ = new AstAssign{$1, $2, new AstAdd{$1, $2->cloneTree(true),
+                        { $$ = new AstAssign{$1, $2, new AstAdd{$1, $2->cloneTreePure(true),
                                                                 new AstConst{$1, AstConst::StringToParse{}, "'b1"}}}; }
         |       yP_MINUSMINUS varRefBase
-                        { $$ = new AstAssign{$1, $2, new AstSub{$1, $2->cloneTree(true),
+                        { $$ = new AstAssign{$1, $2, new AstSub{$1, $2->cloneTreePure(true),
                                                                 new AstConst{$1, AstConst::StringToParse{}, "'b1"}}}; }
         |       varRefBase yP_PLUSPLUS
-                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTree(true),
+                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTreePure(true),
                                                                 new AstConst{$2, AstConst::StringToParse{}, "'b1"}}}; }
         |       varRefBase yP_MINUSMINUS
-                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTree(true),
+                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTreePure(true),
                                                                 new AstConst{$2, AstConst::StringToParse{}, "'b1"}}}; }
         ;
 
@@ -3681,44 +3681,44 @@ foperator_assignment<nodep>:    // IEEE: operator_assignment (for first part of
                 fexprLvalue '=' delay_or_event_controlE expr    { $$ = new AstAssign{$2, $1, $4, $3}; }
         //
         |       fexprLvalue yP_PLUSEQ    expr
-                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstAdd{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_MINUSEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstSub{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_TIMESEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstMul{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstMul{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_DIVEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstDiv{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstDiv{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_MODEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstModDiv{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstModDiv{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_ANDEQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstAnd{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstAnd{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_OREQ      expr
-                        { $$ = new AstAssign{$2, $1, new AstOr{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstOr{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_XOREQ     expr
-                        { $$ = new AstAssign{$2, $1, new AstXor{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstXor{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_SLEFTEQ   expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftL{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftL{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_SRIGHTEQ  expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftR{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftR{$2, $1->cloneTreePure(true), $3}}; }
         |       fexprLvalue yP_SSRIGHTEQ expr
-                        { $$ = new AstAssign{$2, $1, new AstShiftRS{$2, $1->cloneTree(true), $3}}; }
+                        { $$ = new AstAssign{$2, $1, new AstShiftRS{$2, $1->cloneTreePure(true), $3}}; }
         ;
 
 inc_or_dec_expression<nodeExprp>:   // ==IEEE: inc_or_dec_expression
         //                      // Need fexprScope instead of variable_lvalue to prevent conflict
                 ~l~exprScope yP_PLUSPLUS
                         { $<fl>$ = $<fl>1; $$ = new AstPostAdd{$2, new AstConst{$2, AstConst::StringToParse{}, "'b1"},
-                                                               $1, $1->cloneTree(true)}; }
+                                                               $1, $1->cloneTreePure(true)}; }
         |       ~l~exprScope yP_MINUSMINUS
                         { $<fl>$ = $<fl>1; $$ = new AstPostSub{$2, new AstConst{$2, AstConst::StringToParse{}, "'b1"},
-                                                               $1, $1->cloneTree(true)}; }
+                                                               $1, $1->cloneTreePure(true)}; }
         //                      // Need expr instead of variable_lvalue to prevent conflict
         |       yP_PLUSPLUS     expr
                         { $<fl>$ = $<fl>1; $$ = new AstPreAdd{$1, new AstConst{$1, AstConst::StringToParse{}, "'b1"},
-                                                              $2, $2->cloneTree(true)}; }
+                                                              $2, $2->cloneTreePure(true)}; }
         |       yP_MINUSMINUS   expr
                         { $<fl>$ = $<fl>1; $$ = new AstPreSub{$1, new AstConst{$1, AstConst::StringToParse{}, "'b1"},
-                                                              $2, $2->cloneTree(true)}; }
+                                                              $2, $2->cloneTreePure(true)}; }
         ;
 
 finc_or_dec_expression<nodeExprp>:  // ==IEEE: inc_or_dec_expression
@@ -4734,40 +4734,40 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
         //                      // Need exprScope of variable_lvalue to prevent conflict
         |       '(' ~p~exprScope '='          expr ')'
                         { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, $4},
-                                               $2->cloneTree(true)}; }
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_PLUSEQ    expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstAdd{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstAdd{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_MINUSEQ   expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstSub{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstSub{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_TIMESEQ   expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstMul{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstMul{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_DIVEQ     expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstDiv{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstDiv{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_MODEQ     expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstModDiv{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstModDiv{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_ANDEQ     expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstAnd{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstAnd{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_OREQ      expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstOr{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstOr{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_XOREQ     expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstXor{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstXor{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_SLEFTEQ   expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftL{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftL{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_SRIGHTEQ  expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftR{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftR{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         |       '(' ~p~exprScope yP_SSRIGHTEQ expr ')'
-                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftRS{$3, $2->cloneTree(true), $4}},
-                                               $2->cloneTree(true)}; }
+                        { $$ = new AstExprStmt{$1, new AstAssign{$3, $2, new AstShiftRS{$3, $2->cloneTreePure(true), $4}},
+                                               $2->cloneTreePure(true)}; }
         //
         //                      // IEEE: expression binary_operator expression
         |       ~l~expr '+' ~r~expr                     { $$ = new AstAdd{$2, $1, $3}; }

From f507ee56b04bd299f7675cb559109d3f69feb090 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 17 Sep 2023 08:01:54 -0400
Subject: [PATCH 003/157] Fix warning in configure sc_main compile. (#4499)

---
 configure.ac | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index c530489f3..6ad04c29c 100644
--- a/configure.ac
+++ b/configure.ac
@@ -573,7 +573,7 @@ ACO_SAVE_LIBS="$LIBS"
 LIBS="$LIBS -lsystemc"
 AC_LINK_IFELSE(
     [AC_LANG_PROGRAM([[#include <systemc.h>
-                     extern "C" int sc_main(int argc, char* argv[]) {}
+                     extern "C" int sc_main(int argc, char* argv[]) { return 0; }
                      ]],[[sc_version()]])],
     [_my_result=yes
      AC_DEFINE([HAVE_SYSTEMC],[1],[Defined if have SystemC library])],

From ab13548018e3db957920bdcdc593358602ca87d9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 17 Sep 2023 18:23:44 -0400
Subject: [PATCH 004/157] Support resizing function call inout arguments
 (#4467).

---
 Changes                                       |   1 +
 src/V3AstNodeExpr.h                           |  15 +++
 src/V3Task.cpp                                | 105 +++++++++++----
 src/V3Width.cpp                               |  18 +--
 test_regress/t/t_func_bad.out                 |   7 +-
 test_regress/t/t_func_tasknsvar_bad.out       |   8 --
 test_regress/t/t_func_tasknsvar_bad.v         |  19 ---
 ...nc_tasknsvar_bad.pl => t_func_wide_out.pl} |  12 +-
 test_regress/t/t_func_wide_out.v              | 125 ++++++++++++++++++
 test_regress/t/t_func_wide_out_bad.out        |  87 +++++++++++-
 test_regress/t/t_func_wide_out_bad.pl         |   4 +-
 test_regress/t/t_func_wide_out_bad.v          |  30 -----
 test_regress/t/t_func_wide_out_c.cpp          |  46 +++++++
 test_regress/t/t_func_wide_out_noinl.pl       |  25 ++++
 test_regress/t/t_uvm_pkg_todo.vh              |  40 ++----
 15 files changed, 408 insertions(+), 134 deletions(-)
 delete mode 100644 test_regress/t/t_func_tasknsvar_bad.out
 delete mode 100644 test_regress/t/t_func_tasknsvar_bad.v
 rename test_regress/t/{t_func_tasknsvar_bad.pl => t_func_wide_out.pl} (71%)
 create mode 100644 test_regress/t/t_func_wide_out.v
 delete mode 100644 test_regress/t/t_func_wide_out_bad.v
 create mode 100644 test_regress/t/t_func_wide_out_c.cpp
 create mode 100755 test_regress/t/t_func_wide_out_noinl.pl

diff --git a/Changes b/Changes
index 9c86598cf..6a13b022b 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.017 devel
 
 **Minor:**
 
+* Support resizing function call inout arguments (#4467).
 
 
 Verilator 5.016 2023-09-16
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index e5e44c785..ec2f06693 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -5083,6 +5083,21 @@ public:
     bool sizeMattersLhs() const override { return false; }
     int instrCount() const override { return 1 + V3Number::log2b(width()); }
 };
+class AstResizeLValue final : public AstNodeUniop {
+    // Resize a LValue into a wider/narrower entity at function argument boundry
+    // Width and signness is implied from nodep->width()
+public:
+    AstResizeLValue(FileLine* fl, AstNodeExpr* lhsp)
+        : ASTGEN_SUPER_ResizeLValue(fl, lhsp) {}
+    ASTGEN_MEMBERS_AstResizeLValue;
+    void numberOperate(V3Number& out, const V3Number& lhs) override { V3ERROR_NA; }
+    string emitVerilog() override { return "%l"; }
+    string emitC() final override { V3ERROR_NA_RETURN(""); }
+    bool cleanOut() const override { return true; }
+    bool cleanLhs() const override { return true; }
+    bool sizeMattersLhs() const override { return false; }
+    int instrCount() const override { return 0; }
+};
 class AstSigned final : public AstNodeUniop {
     // $signed(lhs)
 public:
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 6dff27044..1170f3326 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -412,6 +412,53 @@ private:
         });
     }
 
+    AstAssign* connectPortMakeInAssign(AstNodeExpr* pinp, AstVarScope* newvscp, bool pureCheck) {
+        // Create input assignment to go in FRONT of function call
+        AstNodeExpr* inPinp = pinp;
+        if (AstResizeLValue* sinPinp = VN_CAST(inPinp, ResizeLValue)) inPinp = sinPinp->lhsp();
+        AstNodeExpr* const inPinClonep
+            = pureCheck ? inPinp->cloneTreePure(true) : inPinp->cloneTree(true);
+        AstAssign* const assp = new AstAssign{
+            pinp->fileline(), new AstVarRef{newvscp->fileline(), newvscp, VAccess::WRITE},
+            inPinClonep};
+        assp->fileline()->modifyWarnOff(V3ErrorCode::BLKSEQ, true);  // Ok if in <= block
+        return assp;
+    }
+    AstAssign* connectPortMakeOutAssign(AstVar* portp, AstNodeExpr* pinp, AstVarScope* newvscp,
+                                        bool pureCheck) {
+        // If needed, remap size of function to caller's output size
+        AstNodeExpr* outPinp = pinp;
+        AstNodeExpr* postRhsp = new AstVarRef{newvscp->fileline(), newvscp, VAccess::READ};
+        if (AstResizeLValue* soutPinp = VN_CAST(outPinp, ResizeLValue)) {
+            outPinp = soutPinp->lhsp();
+            if (AstNodeUniop* soutPinp = VN_CAST(outPinp, Extend)) {
+                outPinp = soutPinp->lhsp();
+            } else if (AstNodeUniop* soutPinp = VN_CAST(outPinp, ExtendS)) {
+                outPinp = soutPinp->lhsp();
+            } else if (AstSel* soutPinp = VN_CAST(outPinp, Sel)) {
+                outPinp = soutPinp->fromp();
+            } else {
+                outPinp->v3fatalSrc("Inout pin resizing should have had extend or select");
+            }
+            if (outPinp->width() < portp->width()) {
+                postRhsp = new AstSel{pinp->fileline(), postRhsp, 0, pinp->width()};
+            } else {  // pin width > port width
+                if (pinp->isSigned() && postRhsp->isSigned()) {
+                    postRhsp = new AstExtendS{pinp->fileline(), postRhsp};
+                } else {
+                    postRhsp = new AstExtend{pinp->fileline(), postRhsp};
+                }
+            }
+            postRhsp->dtypeFrom(outPinp);
+        }
+        // Put output assignment AFTER function call
+        AstNodeExpr* const outPinClonep
+            = pureCheck ? outPinp->cloneTreePure(true) : outPinp->cloneTree(true);
+        AstAssign* const assp = new AstAssign{pinp->fileline(), outPinClonep, postRhsp};
+        assp->fileline()->modifyWarnOff(V3ErrorCode::BLKSEQ, true);  // Ok if in <= block
+        return assp;
+    }
+
     void connectPort(AstVar* portp, AstArg* argp, const string& namePrefix, AstNode* beginp,
                      bool inlineTask) {
         AstNodeExpr* const pinp = argp->exprp();
@@ -432,23 +479,31 @@ private:
                 pinp->v3error("Function/task " + portp->direction().prettyName()  // e.g. "output"
                               + " connected to constant instead of variable: "
                               + portp->prettyNameQ());
-            } else if (portp->isInoutish()) {
-                // Correct lvalue; see comments below
+            }
+            // else if (portp->direction() == VDirection::REF) {
+            // TODO References need to instead pass a real reference var, see issue #3385
+            else if (portp->isInoutish()) {
+                // if (debug() >= 9) pinp->dumpTree("-pinrsize- ");
                 V3LinkLValue::linkLValueSet(pinp);
 
-                if (AstVarRef* const varrefp = VN_CAST(pinp, VarRef)) {
-                    // Connect to this exact variable
-                    if (inlineTask) {
-                        AstVarScope* const localVscp = varrefp->varScopep();
-                        UASSERT_OBJ(localVscp, varrefp, "Null var scope");
-                        portp->user2p(localVscp);
-                        pushDeletep(pinp);
-                    }
-                } else {
-                    pinp->v3warn(
-                        E_TASKNSVAR,
-                        "Unsupported: Function/task input argument is not simple variable");
+                AstVarScope* const newvscp
+                    = createVarScope(portp, namePrefix + "__" + portp->shortName());
+                portp->user2p(newvscp);
+                if (!inlineTask)
+                    pinp->replaceWith(
+                        new AstVarRef{newvscp->fileline(), newvscp, VAccess::READWRITE});
+
+                // Put input assignment in FRONT of all other statements
+                AstAssign* const preassp = connectPortMakeInAssign(pinp, newvscp, true);
+                if (AstNode* const afterp = beginp->nextp()) {
+                    afterp->unlinkFrBackWithNext();
+                    AstNode::addNext<AstNode, AstNode>(preassp, afterp);
                 }
+                beginp->addNext(preassp);
+
+                AstAssign* const postassp = connectPortMakeOutAssign(portp, pinp, newvscp, true);
+                beginp->addNext(postassp);
+                // if (debug() >= 9) beginp->dumpTreeAndNext(cout, "-pinrsize-out- ");
             } else if (portp->isWritable()) {
                 // Make output variables
                 // Correct lvalue; we didn't know when we linked
@@ -463,29 +518,21 @@ private:
                 portp->user2p(newvscp);
                 if (!inlineTask)
                     pinp->replaceWith(new AstVarRef{newvscp->fileline(), newvscp, VAccess::WRITE});
-                AstAssign* const assp
-                    = new AstAssign{pinp->fileline(), pinp,
-                                    new AstVarRef{newvscp->fileline(), newvscp, VAccess::READ}};
-                assp->fileline()->modifyWarnOff(V3ErrorCode::BLKSEQ,
-                                                true);  // Ok if in <= block
+                AstAssign* const postassp = connectPortMakeOutAssign(portp, pinp, newvscp, false);
                 // Put assignment BEHIND of all other statements
-                beginp->addNext(assp);
+                beginp->addNext(postassp);
             } else if (inlineTask && portp->isNonOutput()) {
                 // Make input variable
-                AstVarScope* const inVscp
+                AstVarScope* const newvscp
                     = createVarScope(portp, namePrefix + "__" + portp->shortName());
-                portp->user2p(inVscp);
-                AstAssign* const assp = new AstAssign{
-                    pinp->fileline(), new AstVarRef{inVscp->fileline(), inVscp, VAccess::WRITE},
-                    pinp};
-                assp->fileline()->modifyWarnOff(V3ErrorCode::BLKSEQ,
-                                                true);  // Ok if in <= block
+                portp->user2p(newvscp);
+                AstAssign* const preassp = connectPortMakeInAssign(pinp, newvscp, false);
                 // Put assignment in FRONT of all other statements
                 if (AstNode* const afterp = beginp->nextp()) {
                     afterp->unlinkFrBackWithNext();
-                    AstNode::addNext<AstNode, AstNode>(assp, afterp);
+                    AstNode::addNext<AstNode, AstNode>(preassp, afterp);
                 }
-                beginp->addNext(assp);
+                beginp->addNext(preassp);
             }
         }
     }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index c00628e92..756cf3dc9 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5577,7 +5577,7 @@ private:
             for (const auto& tconnect : tconnects) {
                 const AstVar* const portp = tconnect.first;
                 const AstArg* const argp = tconnect.second;
-                AstNode* const pinp = argp->exprp();
+                AstNodeExpr* const pinp = argp->exprp();
                 if (!pinp) continue;  // Argument error we'll find later
                 AstNodeDType* const portDTypep = portp->dtypep()->skipRefToEnump();
                 const AstNodeDType* const pinDTypep = pinp->dtypep()->skipRefToEnump();
@@ -5588,13 +5588,15 @@ private:
                                   << portDTypep->prettyDTypeName() << " but connection is "
                                   << pinDTypep->prettyDTypeName() << ".");
                 } else if (portp->isWritable() && pinp->width() != portp->width()) {
-                    pinp->v3warn(E_UNSUPPORTED, "Unsupported: Function output argument "
-                                                    << portp->prettyNameQ() << " requires "
-                                                    << portp->width() << " bits, but connection's "
-                                                    << pinp->prettyTypeName() << " generates "
-                                                    << pinp->width() << " bits.");
-                    // otherwise would need some mess to force both sides to proper size
-                    // (get an ASSIGN with EXTEND on the lhs instead of rhs)
+                    pinp->v3widthWarn(portp->width(), pinp->width(),
+                                      "Function output argument "
+                                          << portp->prettyNameQ() << " requires " << portp->width()
+                                          << " bits, but connection's " << pinp->prettyTypeName()
+                                          << " generates " << pinp->width() << " bits.");
+                    VNRelinker relinkHandle;
+                    pinp->unlinkFrBack(&relinkHandle);
+                    AstNodeExpr* const newp = new AstResizeLValue{pinp->fileline(), pinp};
+                    relinkHandle.relink(newp);
                 }
                 if (!portp->basicp() || portp->basicp()->isOpaque()) {
                     checkClassAssign(nodep, "Function Argument", pinp, portDTypep);
diff --git a/test_regress/t/t_func_bad.out b/test_regress/t/t_func_bad.out
index cac076c15..d5d2b8dc2 100644
--- a/test_regress/t/t_func_bad.out
+++ b/test_regress/t/t_func_bad.out
@@ -10,11 +10,12 @@
                            : ... In instance t
    11 |       x;  
       |       ^
-%Error-UNSUPPORTED: t/t_func_bad.v:11:7: Unsupported: Function output argument 'y' requires 1 bits, but connection's CONST '?32?h0' generates 32 bits.
-                                       : ... In instance t
+%Warning-WIDTHTRUNC: t/t_func_bad.v:11:7: Function output argument 'y' requires 1 bits, but connection's CONST '?32?h0' generates 32 bits.
+                                        : ... In instance t
    11 |       x;  
       |       ^
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Error: t/t_func_bad.v:14:17: No such argument 'no_such' in function call to FUNC 'f'
                             : ... In instance t
    14 |       f(.j(1), .no_such(2));  
diff --git a/test_regress/t/t_func_tasknsvar_bad.out b/test_regress/t/t_func_tasknsvar_bad.out
deleted file mode 100644
index 9fd20faba..000000000
--- a/test_regress/t/t_func_tasknsvar_bad.out
+++ /dev/null
@@ -1,8 +0,0 @@
-%Error-TASKNSVAR: t/t_func_tasknsvar_bad.v:16:29: Unsupported: Function/task input argument is not simple variable
-   16 |       foo(bus_we_select_from[2]);   
-      |                             ^
-                  ... For error description see https://verilator.org/warn/TASKNSVAR?v=latest
-%Error: Internal Error: t/t_func_tasknsvar_bad.v:10:7: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): 'm_varp && !m_varp->brokeExists()' @ ../V3AstNodes.cpp:#
-   10 |       sig = '1;
-      |       ^~~
-                        ... See the manual at https://verilator.org/verilator_doc.html for more assistance.
diff --git a/test_regress/t/t_func_tasknsvar_bad.v b/test_regress/t/t_func_tasknsvar_bad.v
deleted file mode 100644
index 7f4a62308..000000000
--- a/test_regress/t/t_func_tasknsvar_bad.v
+++ /dev/null
@@ -1,19 +0,0 @@
-// DESCRIPTION: Verilator: Test of select from constant
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2020 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-module t (/*AUTOARG*/);
-
-   task foo(inout sig);
-      sig = '1;
-   endtask
-
-   reg [3:0] bus_we_select_from;
-
-   initial begin
-      foo(bus_we_select_from[2]);  // Will get TASKNSVAR error
-   end
-
-endmodule
diff --git a/test_regress/t/t_func_tasknsvar_bad.pl b/test_regress/t/t_func_wide_out.pl
similarity index 71%
rename from test_regress/t/t_func_tasknsvar_bad.pl
rename to test_regress/t/t_func_wide_out.pl
index a5846c699..bdc7b0a29 100755
--- a/test_regress/t/t_func_tasknsvar_bad.pl
+++ b/test_regress/t/t_func_wide_out.pl
@@ -8,11 +8,15 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-scenarios(vlt => 1);
+scenarios(simulator => 1);
 
-lint(
-    fails => 1,
-    expect_filename => $Self->{golden_filename},
+compile(
+    verilator_flags2 => ["-Wno-WIDTHTRUNC"],
+    v_flags2 => ["+define+T_FUNC_WIDE_OUT t/t_func_wide_out_c.cpp"],
+    );
+
+execute(
+    check_finished => 1,
     );
 
 ok(1);
diff --git a/test_regress/t/t_func_wide_out.v b/test_regress/t/t_func_wide_out.v
new file mode 100644
index 000000000..6a7c9fb1c
--- /dev/null
+++ b/test_regress/t/t_func_wide_out.v
@@ -0,0 +1,125 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+typedef bit signed [11:0] s12_t;
+typedef bit unsigned [11:0] u12_t;
+typedef bit signed [69:0] s70_t;
+typedef bit unsigned [69:0] u70_t;
+
+import "DPI-C" context function void dpii_inv_s12(input s12_t in, output s12_t out);
+import "DPI-C" context function void dpii_inv_u12(input u12_t in, output u12_t out);
+import "DPI-C" context function void dpii_inv_s70(input s70_t in, output s70_t out);
+import "DPI-C" context function void dpii_inv_u70(input s70_t in, output u70_t out);
+
+class Cls #(type T = bit);
+   static function void get(inout T value);
+`ifdef TEST_NOINLINE
+      // verilator no_inline_task
+`endif
+      value = ~value;
+   endfunction
+endclass
+
+module t;
+
+   parameter MSG_PORT_WIDTH = 4350;
+   localparam PAYLOAD_MAX_BITS = 4352;
+
+   reg [MSG_PORT_WIDTH-1:0] msg;
+
+   function void func (output bit [PAYLOAD_MAX_BITS-1:0] data);
+`ifdef TEST_NOINLINE
+      // verilator no_inline_task
+`endif
+      data = {PAYLOAD_MAX_BITS{1'b1}};
+   endfunction
+
+   s12_t ds12;
+   u12_t du12;
+   s70_t ds70;
+   u70_t du70;
+   s12_t qs12;
+   u12_t qu12;
+   s70_t qs70;
+   u70_t qu70;
+
+   initial begin
+      // Operator TASKREF 'func' expects 4352 bits on the Function Argument, but Function Argument's VARREF 'msg' generates 4350 bits.
+      // verilator lint_off WIDTHEXPAND
+      func(msg);
+      if (msg !== {MSG_PORT_WIDTH{1'b1}}) $stop;
+
+      begin
+         // narrow connect to wide
+         ds12 = 12'h234;
+         Cls#(s70_t)::get(ds12);
+         `checkh(ds12, 12'hdcb);
+         ds12 = 12'he34;  // negative if signed
+         Cls#(s70_t)::get(ds12);
+         `checkh(ds12, 12'h1cb);
+
+         du12 = 12'h244;
+         Cls#(u70_t)::get(du12);
+         `checkh(du12, 12'hdbb);
+         du12 = 12'he34;  // negative if signed
+         Cls#(u70_t)::get(du12);
+         `checkh(du12, 12'h1cb);
+
+         // wie connect to narrow
+         ds70 = 12'h254;
+         Cls#(s12_t)::get(ds70);
+         `checkh(ds70, 70'h3ffffffffffffffdab);
+         ds70 = 12'he34;  // negative if signed
+         Cls#(s12_t)::get(ds70);
+         `checkh(ds70, 70'h0000000000000001cb);
+
+         du70 = 12'h264;
+         Cls#(u12_t)::get(du70);
+         `checkh(du70, 70'h000000000000000d9b);
+         du70 = 12'he34;  // negative if signed
+         Cls#(u12_t)::get(du70);
+         `checkh(du70, 70'h0000000000000001cb);
+      end
+
+      begin
+         // narrow connect to wide
+         ds12 = 12'h234;
+         dpii_inv_s70(ds12, qs12);
+         `checkh(qs12, 12'hdcb);
+         ds12 = 12'he34;  // negative if signed
+         dpii_inv_s70(ds12, qs12);
+         `checkh(qs12, 12'h1cb);
+
+         du12 = 12'h244;
+         dpii_inv_u70(du12, qu12);
+         `checkh(qu12, 12'hdbb);
+         du12 = 12'he34;  // negative if signed
+         dpii_inv_u70(ds12, qs12);
+         `checkh(qs12, 12'h1cb);
+
+         // wie connect to narrow
+         ds70 = 12'h254;
+         dpii_inv_s12(ds70, qs70);
+         `checkh(qs70, 70'h3ffffffffffffffdab);
+         ds70 = 12'he34;  // negative if signed
+         dpii_inv_s12(ds70, qs70);
+         `checkh(qs70, 70'h0000000000000001cb);
+
+         du70 = 12'h264;
+         dpii_inv_u12(du70, qu70);
+         `checkh(qu70, 70'h000000000000000d9b);
+         du70 = 12'he34;  // negative if signed
+         dpii_inv_u12(du70, qu70);
+         `checkh(qu70, 70'h0000000000000001cb);
+      end
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_func_wide_out_bad.out b/test_regress/t/t_func_wide_out_bad.out
index e10df9ce9..b2648177a 100644
--- a/test_regress/t/t_func_wide_out_bad.out
+++ b/test_regress/t/t_func_wide_out_bad.out
@@ -1,6 +1,83 @@
-%Error-UNSUPPORTED: t/t_func_wide_out_bad.v:17:12: Unsupported: Function output argument 'data' requires 4352 bits, but connection's VARREF 'msg' generates 4350 bits.
-                                                 : ... In instance t
-   17 |       func(msg);
-      |            ^~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:76:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'ds70' generates 70 bits.
+                                              : ... In instance t
+   76 |          Cls#(s12_t)::get(ds70);
+      |                           ^~~~
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:76:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
+                                              : ... In instance t
+   76 |          Cls#(s12_t)::get(ds70);
+      |                       ^~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:79:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'ds70' generates 70 bits.
+                                              : ... In instance t
+   79 |          Cls#(s12_t)::get(ds70);
+      |                           ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:79:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
+                                              : ... In instance t
+   79 |          Cls#(s12_t)::get(ds70);
+      |                       ^~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:83:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'du70' generates 70 bits.
+                                              : ... In instance t
+   83 |          Cls#(u12_t)::get(du70);
+      |                           ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:83:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
+                                              : ... In instance t
+   83 |          Cls#(u12_t)::get(du70);
+      |                       ^~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:86:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'du70' generates 70 bits.
+                                              : ... In instance t
+   86 |          Cls#(u12_t)::get(du70);
+      |                           ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:86:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
+                                              : ... In instance t
+   86 |          Cls#(u12_t)::get(du70);
+      |                       ^~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
+                                               : ... In instance t
+  108 |          dpii_inv_s12(ds70, qs70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qs70' generates 70 bits.
+                                               : ... In instance t
+  108 |          dpii_inv_s12(ds70, qs70);
+      |                             ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qs70' generates 70 bits.
+                                               : ... In instance t
+  108 |          dpii_inv_s12(ds70, qs70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
+                                               : ... In instance t
+  111 |          dpii_inv_s12(ds70, qs70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qs70' generates 70 bits.
+                                               : ... In instance t
+  111 |          dpii_inv_s12(ds70, qs70);
+      |                             ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qs70' generates 70 bits.
+                                               : ... In instance t
+  111 |          dpii_inv_s12(ds70, qs70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
+                                               : ... In instance t
+  115 |          dpii_inv_u12(du70, qu70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qu70' generates 70 bits.
+                                               : ... In instance t
+  115 |          dpii_inv_u12(du70, qu70);
+      |                             ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qu70' generates 70 bits.
+                                               : ... In instance t
+  115 |          dpii_inv_u12(du70, qu70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
+                                               : ... In instance t
+  118 |          dpii_inv_u12(du70, qu70);
+      |          ^~~~~~~~~~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qu70' generates 70 bits.
+                                               : ... In instance t
+  118 |          dpii_inv_u12(du70, qu70);
+      |                             ^~~~
+%Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qu70' generates 70 bits.
+                                               : ... In instance t
+  118 |          dpii_inv_u12(du70, qu70);
+      |          ^~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_func_wide_out_bad.pl b/test_regress/t/t_func_wide_out_bad.pl
index a60503a1f..15b164f6a 100755
--- a/test_regress/t/t_func_wide_out_bad.pl
+++ b/test_regress/t/t_func_wide_out_bad.pl
@@ -8,7 +8,9 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-scenarios(linter => 1);
+scenarios(vlt => 1);
+
+top_filename("t/t_func_wide_out.v");
 
 lint(
     fails => 1,
diff --git a/test_regress/t/t_func_wide_out_bad.v b/test_regress/t/t_func_wide_out_bad.v
deleted file mode 100644
index e7fd53a4b..000000000
--- a/test_regress/t/t_func_wide_out_bad.v
+++ /dev/null
@@ -1,30 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2003 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-module t ();
-
-   parameter MSG_PORT_WIDTH = 4350;
-   localparam PAYLOAD_MAX_BITS = 4352;
-
-   reg [MSG_PORT_WIDTH-1:0] msg;
-
-   initial begin
-      // Operator TASKREF 'func' expects 4352 bits on the Function Argument, but Function Argument's VARREF 'msg' generates 4350 bits.
-      // verilator lint_off WIDTH
-      func(msg);
-      // verilator lint_on WIDTH
-      if (msg !== {MSG_PORT_WIDTH{1'b1}}) $stop;
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
-
-   function integer func (output bit [PAYLOAD_MAX_BITS-1:0] data);
-      /*verilator no_inline_task*/
-      data = {PAYLOAD_MAX_BITS{1'b1}};
-      return 1;
-   endfunction
-
-endmodule
diff --git a/test_regress/t/t_func_wide_out_c.cpp b/test_regress/t/t_func_wide_out_c.cpp
new file mode 100644
index 000000000..7518d510b
--- /dev/null
+++ b/test_regress/t/t_func_wide_out_c.cpp
@@ -0,0 +1,46 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+//
+// Copyright 2009-2009 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+#include "svdpi.h"
+
+#include <cstdio>
+#include <cstring>
+
+//======================================================================
+
+// clang-format off
+#if defined(VERILATOR)
+# ifdef T_FUNC_WIDE_OUT
+#  include "Vt_func_wide_out__Dpi.h"
+# elif defined(T_FUNC_WIDE_OUT_NOINL)
+#  include "Vt_func_wide_out_noinl__Dpi.h"
+# else
+#  error "Unknown test"
+# endif
+#elif defined(VCS)
+# include "../vc_hdrs.h"
+#else
+# error "Unknown simulator for DPI test"
+#endif
+// clang-format on
+
+//======================================================================
+
+void dpii_inv_s12(const svBitVecVal* in, svBitVecVal* out) { out[0] = ~in[0]; }
+void dpii_inv_u12(const svBitVecVal* in, svBitVecVal* out) { out[0] = ~in[0]; }
+void dpii_inv_s70(const svBitVecVal* in, svBitVecVal* out) {
+    out[0] = ~in[0];
+    out[1] = ~in[1] & 0xf;
+}
+void dpii_inv_u70(const svBitVecVal* in, svBitVecVal* out) {
+    out[0] = ~in[0];
+    out[1] = ~in[1] & 0xf;
+}
diff --git a/test_regress/t/t_func_wide_out_noinl.pl b/test_regress/t/t_func_wide_out_noinl.pl
new file mode 100755
index 000000000..cfdf588bf
--- /dev/null
+++ b/test_regress/t/t_func_wide_out_noinl.pl
@@ -0,0 +1,25 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t_func_wide_out.v");
+
+compile(
+    verilator_flags2 => ["-Wno-WIDTHTRUNC"],
+    v_flags2 => ["+define+T_FUNC_WIDE_OUT_NOINL +define+TEST_NOINLINE t/t_func_wide_out_c.cpp"],
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index dceffefad..35f108a3d 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -13464,10 +13464,8 @@ function uvm_component::new (string name, uvm_component parent);
   event_pool = new("event_pool");
   m_domain = parent.m_domain;
   reseed();
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:13463:76: Unsupported: Function output argument 'value' requires 4096 bits, but connection's VARREF 'recording_detail' generates 32 bits.
-//TODO  if (!uvm_config_db #(uvm_bitstream_t)::get(this, "", "recording_detail", recording_detail))
-//TODO        void'(uvm_config_db #(int)::get(this, "", "recording_detail", recording_detail));
+  if (!uvm_config_db #(uvm_bitstream_t)::get(this, "", "recording_detail", recording_detail))
+        void'(uvm_config_db #(int)::get(this, "", "recording_detail", recording_detail));
   m_rh.set_name(get_full_name());
   set_report_verbosity_level(parent.get_report_verbosity_level());
   m_set_cl_msg_args();
@@ -15876,10 +15874,8 @@ virtual class uvm_port_base #(type IF=uvm_void) extends IF;
     m_min_size  = min_size;
     m_max_size  = max_size;
     m_comp = new(name, parent, this);
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:15875:75: Unsupported: Function output argument 'value' requires 4096 bits, but connection's VARREF 'tmp' generates 32 bits.
-//TODO    if (!uvm_config_int::get(m_comp, "", "check_connection_relationships",tmp))
-//TODO      m_comp.set_report_id_action(s_connection_warning_id, UVM_NO_ACTION);
+    if (!uvm_config_int::get(m_comp, "", "check_connection_relationships",tmp))
+      m_comp.set_report_id_action(s_connection_warning_id, UVM_NO_ACTION);
   endfunction
   function string get_name();
     return m_comp.get_name();
@@ -26304,17 +26300,13 @@ function uvm_status_e uvm_reg::backdoor_read_func(uvm_reg_item rw);
        uvm_report_info ("RegMem", $sformatf("backdoor_read from %s ", hdl_concat.slices[j].path), UVM_DEBUG, "t/uvm/src/reg/uvm_reg.svh", 2192, "", 1);
    end
         if (hdl_concat.slices[j].offset < 0) begin
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:26297:57: Unsupported: Function output argument 'value' requires 1024 bits, but connection's VARREF 'val' generates 64 bits.
-//TODO           ok &= uvm_hdl_read(hdl_concat.slices[j].path,val);
+           ok &= uvm_hdl_read(hdl_concat.slices[j].path,val);
            continue;
         end
         begin
            uvm_reg_data_t slice;
            int k = hdl_concat.slices[j].offset;
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:26303:58: Unsupported: Function output argument 'value' requires 1024 bits, but connection's VARREF 'slice' generates 64 bits.
-//TODO           ok &= uvm_hdl_read(hdl_concat.slices[j].path, slice);
+           ok &= uvm_hdl_read(hdl_concat.slices[j].path, slice);
            repeat (hdl_concat.slices[j].size) begin
               val[k++] = slice[0];
               slice >>= 1;
@@ -29572,17 +29564,13 @@ function uvm_status_e uvm_mem::backdoor_read_func(uvm_reg_item rw);
        uvm_report_info ("RegModel", {"backdoor_read from ",hdl_path}, UVM_DEBUG, "t/uvm/src/reg/uvm_mem.svh", 1691, "", 1);
    end
            if (hdl_concat.slices[j].offset < 0) begin
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:29567:44: Unsupported: Function output argument 'value' requires 1024 bits, but connection's VARREF 'slice' generates 64 bits.
-//TODO              ok &= uvm_hdl_read(hdl_path, val);
+              ok &= uvm_hdl_read(hdl_path, val);
               continue;
            end
            begin
               uvm_reg_data_t slice;
               int k = hdl_concat.slices[j].offset;
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:34181:38: Unsupported: Function output argument 'value' requires 1024 bits, but connection's VARREF 'd' generates 64 bits.
-//TODO              ok &= uvm_hdl_read(hdl_path, slice);
+              ok &= uvm_hdl_read(hdl_path, slice);
               repeat (hdl_concat.slices[j].size) begin
                  val[k++] = slice[0];
                  slice >>= 1;
@@ -34196,13 +34184,11 @@ endfunction : __m_uvm_execute_field_op
             foreach (path.slices[j]) begin
                 string p_ = path.slices[j].path;
                 uvm_reg_data_t d;
-//TODO issue #4467 - Fix UVM function output width reassignment
-//TODO  %Error: t/t_uvm_pkg_todo.vh:19861:21: Function Argument expects a CLASSREFDTYPE 'uvm_sequencer__Tz97_TBz97', got CLASSREFDTYPE 'uvm_sequencer__Tz97'
-//TODO                if (!uvm_hdl_read(p_,d))
-//TODO   begin
-//TODO     if (uvm_report_enabled(UVM_NONE,UVM_ERROR,"uvm_reg_mem_hdl_paths_seq"))
-//TODO       uvm_report_error ("uvm_reg_mem_hdl_paths_seq", $sformatf("HDL path \"%s\" for register \"%s\" is not readable", p_, r.get_full_name()), UVM_NONE, "t/uvm/src/reg/sequences/uvm_reg_mem_hdl_paths_seq.svh", 145, "", 1);
-//TODO   end
+                if (!uvm_hdl_read(p_,d))
+   begin
+     if (uvm_report_enabled(UVM_NONE,UVM_ERROR,"uvm_reg_mem_hdl_paths_seq"))
+       uvm_report_error ("uvm_reg_mem_hdl_paths_seq", $sformatf("HDL path \"%s\" for register \"%s\" is not readable", p_, r.get_full_name()), UVM_NONE, "t/uvm/src/reg/sequences/uvm_reg_mem_hdl_paths_seq.svh", 145, "", 1);
+   end
                 if (!uvm_hdl_check_path(p_))
    begin
      if (uvm_report_enabled(UVM_NONE,UVM_ERROR,"uvm_reg_mem_hdl_paths_seq"))

From b68f101e8152773d8a0823db9011abf296030d7a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 17 Sep 2023 19:49:38 -0400
Subject: [PATCH 005/157] Support preprocessing __LINE__

---
 docs/guide/extensions.rst             | 13 ++++++++++---
 src/V3FileLine.cpp                    |  5 ++++-
 test_regress/t/t_preproc.out          | 17 +++++++++++------
 test_regress/t/t_preproc_comments.out | 17 +++++++++++------
 test_regress/t/t_preproc_inc3.vh      |  6 +++++-
 5 files changed, 41 insertions(+), 17 deletions(-)

diff --git a/docs/guide/extensions.rst b/docs/guide/extensions.rst
index 5994fb770..26e1bc425 100644
--- a/docs/guide/extensions.rst
+++ b/docs/guide/extensions.rst
@@ -17,14 +17,21 @@ or "`ifdef`"'s may break other tools.
 
 .. option:: `__LINE__
 
-   The :option:`\`__LINE__` define expands to the current filename as a
-   string, like C++'s __LINE__.  This Verilator feature added in 2006 was
-   incorporated into IEEE 1800-2009.
+   The :option:`\`__LINE__` define expands to the current line number like
+   C++'s __LINE__.  This Verilator feature added in 2006 was incorporated
+   into IEEE 1800-2009.
 
 .. option:: `error [string]
 
    This will report an error when encountered, like C++'s #error.
 
+.. option:: `line
+
+   As a special case `\`line \`__LINE__ "filename"` allows setting the
+   filename, without changing the line number. This is used for some
+   internal tests, so that debugging can leave the line numbers correctly
+   referring to the test file's line numbers.
+
 .. option:: """ [string] """
 
    A triple-quoted block specifies a string that may include newlines and
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index f3a0fb6de..87b7115a5 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -221,7 +221,10 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
     bool fail = false;
     const char* const ln = textp;
     while (*textp && !std::isspace(*textp)) ++textp;
-    if (std::isdigit(*ln)) {
+    if (0 == strncmp(ln, "`__LINE__", strlen("`__LINE__"))) {
+        // Special case - see docs - don't change other than accounting for `line itself
+        lineno(lineno() + 1);
+    } if (std::isdigit(*ln)) {
         lineno(std::atoi(ln));
     } else {
         fail = true;
diff --git a/test_regress/t/t_preproc.out b/test_regress/t/t_preproc.out
index 1aa204271..6e09e8fcd 100644
--- a/test_regress/t/t_preproc.out
+++ b/test_regress/t/t_preproc.out
@@ -23,29 +23,34 @@ At file "t/t_preproc_inc2.vh"  line 5
  
 `line 7 "t/t_preproc_inc2.vh" 0
 `line 1 "t/t_preproc_inc3.vh" 1
-`line 2 "inc3_a_filename_from_line_directive" 0
  
+`line 2 "t/t_preproc_inc3.vh" 0
  
  
  
 
-`line 7 "inc3_a_filename_from_line_directive" 0
+`line 6 "t/t_preproc_inc3.vh" 0
  
   
   
    
-  At file "inc3_a_filename_from_line_directive"  line 11
+  At file "t/t_preproc_inc3.vh"  line 10
+`line 12 "inc3_a_filename_from_line_directive_with_LINE" 0
+  At file "inc3_a_filename_from_line_directive_with_LINE"  line 12
+`line 100 "inc3_a_filename_from_line_directive" 0
+  At file "inc3_a_filename_from_line_directive"  line 100
 
-`line 13 "inc3_a_filename_from_line_directive" 0
+
+`line 103 "inc3_a_filename_from_line_directive" 0
    
   
 
-`line 16 "inc3_a_filename_from_line_directive" 0
+`line 106 "inc3_a_filename_from_line_directive" 0
  
   
 
 
-`line 20 "inc3_a_filename_from_line_directive" 2
+`line 110 "inc3_a_filename_from_line_directive" 2
 `line 7 "t/t_preproc_inc2.vh" 0
 
 
diff --git a/test_regress/t/t_preproc_comments.out b/test_regress/t/t_preproc_comments.out
index 4c6a565ab..ba69fa2c0 100644
--- a/test_regress/t/t_preproc_comments.out
+++ b/test_regress/t/t_preproc_comments.out
@@ -23,29 +23,34 @@ At file "t/t_preproc_inc2.vh"  line 5
  
 `line 7 "t/t_preproc_inc2.vh" 0
 `line 1 "t/t_preproc_inc3.vh" 1
-`line 2 "inc3_a_filename_from_line_directive" 0
 // DESCRIPTION: Verilog::Preproc: Example source code 
+`line 2 "t/t_preproc_inc3.vh" 0
 // This file ONLY is placed under the Creative Commons Public Domain, for 
 // any use, without warranty, 2000-2007 by Wilson Snyder. 
 // SPDX-License-Identifier: CC0-1.0 
 
-`line 7 "inc3_a_filename_from_line_directive" 0
+`line 6 "t/t_preproc_inc3.vh" 0
  
   
   
   // FOO 
-  At file "inc3_a_filename_from_line_directive"  line 11
+  At file "t/t_preproc_inc3.vh"  line 10
+`line 12 "inc3_a_filename_from_line_directive_with_LINE" 0
+  At file "inc3_a_filename_from_line_directive_with_LINE"  line 12
+`line 100 "inc3_a_filename_from_line_directive" 0
+  At file "inc3_a_filename_from_line_directive"  line 100
 
-`line 13 "inc3_a_filename_from_line_directive" 0
+
+`line 103 "inc3_a_filename_from_line_directive" 0
    
  // guard 
 
-`line 16 "inc3_a_filename_from_line_directive" 0
+`line 106 "inc3_a_filename_from_line_directive" 0
  
   
 
 
-`line 20 "inc3_a_filename_from_line_directive" 2
+`line 110 "inc3_a_filename_from_line_directive" 2
 `line 7 "t/t_preproc_inc2.vh" 0
 
 
diff --git a/test_regress/t/t_preproc_inc3.vh b/test_regress/t/t_preproc_inc3.vh
index 0abaf0e7a..9d3d91ac4 100644
--- a/test_regress/t/t_preproc_inc3.vh
+++ b/test_regress/t/t_preproc_inc3.vh
@@ -1,4 +1,3 @@
-`line 2 "inc3_a_filename_from_line_directive" 0
 // DESCRIPTION: Verilog::Preproc: Example source code
 // This file ONLY is placed under the Creative Commons Public Domain, for
 // any use, without warranty, 2000-2007 by Wilson Snyder.
@@ -9,6 +8,11 @@
  `define _EMPTY
   // FOO
   At file `__FILE__  line `__LINE__
+`line `__LINE__ "inc3_a_filename_from_line_directive_with_LINE" 0
+  At file `__FILE__  line `__LINE__
+`line 100 "inc3_a_filename_from_line_directive" 0
+  At file `__FILE__  line `__LINE__
+
 `else
   `error "INC2 File already included once"
 `endif // guard

From 016278a75975dc49bd6100a516bfddde9280a6f8 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 17 Sep 2023 21:43:00 -0400
Subject: [PATCH 006/157] Commentary

---
 src/V3Ast.cpp    | 4 ++--
 src/V3Config.cpp | 4 ++--
 src/V3Config.h   | 2 +-
 src/V3FileLine.h | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 67dba756d..8f50841ae 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -372,8 +372,8 @@ AstNode* AstNode::addNext<AstNode, AstNode>(AstNode* nodep, AstNode* newp) {
 
 void AstNode::addNextHere(AstNode* newp) {
     // Add to m_nextp on exact node passed, not at the end.
-    //  This could be at head, tail, or both (single)
-    //  New  could be head of single node, or list
+    //  'this' could be at head, tail, or both (single)
+    //  'newp' could be head of single node, or list
     UASSERT(newp, "Null item passed to addNext");
     UASSERT_OBJ(!newp->backp(), newp, "New node (back) already assigned?");
     debugTreeChange(this, "-addHereThs: ", __LINE__, false);
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 7bcb4b72c..de968acab 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -590,8 +590,8 @@ void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftas
     }
 }
 
-void V3Config::addWaiver(V3ErrorCode code, const string& filename, const string& message) {
-    V3ConfigResolver::s().files().at(filename).addWaiver(code, message);
+void V3Config::addWaiver(V3ErrorCode code, const string& filename, const string& match) {
+    V3ConfigResolver::s().files().at(filename).addWaiver(code, match);
 }
 
 void V3Config::applyCase(AstCase* nodep) {
diff --git a/src/V3Config.h b/src/V3Config.h
index 2ae32ef0d..bee0ea59e 100644
--- a/src/V3Config.h
+++ b/src/V3Config.h
@@ -41,7 +41,7 @@ public:
     static void addScopeTraceOn(bool on, const string& scope, int levels);
     static void addVarAttr(FileLine* fl, const string& module, const string& ftask,
                            const string& signal, VAttrType type, AstSenTree* nodep);
-    static void addWaiver(V3ErrorCode code, const string& filename, const string& message);
+    static void addWaiver(V3ErrorCode code, const string& filename, const string& match);
 
     static void applyCase(AstCase* nodep);
     static void applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep);
diff --git a/src/V3FileLine.h b/src/V3FileLine.h
index 514299173..15541f418 100644
--- a/src/V3FileLine.h
+++ b/src/V3FileLine.h
@@ -121,7 +121,7 @@ std::ostream& operator<<(std::ostream& os, VFileContent* contentp);
 
 // File and line number of an object, mostly for error reporting
 
-// This class is instantiated for every source code line (potentially millions), and  instances
+// This class is instantiated for every source code line (potentially millions), and instances
 // created at any point usually persist until the end of the program. To save space, per-file
 // information (e.g. filename, source language) is held in tables in the FileLineSingleton class.
 // Similarly, message enablement flags are interned in FileLineSingleton.

From cd201f8eb88db35afd1cea824e3b1631f62d97d7 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Mon, 18 Sep 2023 01:44:43 +0000
Subject: [PATCH 007/157] Apply 'make format'

---
 src/V3FileLine.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 87b7115a5..91ee773f2 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -224,7 +224,8 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
     if (0 == strncmp(ln, "`__LINE__", strlen("`__LINE__"))) {
         // Special case - see docs - don't change other than accounting for `line itself
         lineno(lineno() + 1);
-    } if (std::isdigit(*ln)) {
+    }
+    if (std::isdigit(*ln)) {
         lineno(std::atoi(ln));
     } else {
         fail = true;

From 47b3f464a9b15913ce3228132edb279954f03841 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Mon, 18 Sep 2023 15:21:30 +0200
Subject: [PATCH 008/157] Disable conversion of impure logical expressions to
 bitwise expressions (#487 partial) (#4437)

---
 configure.ac                                |   1 +
 src/V3Ast.cpp                               |  10 --
 src/V3Ast.h                                 |  22 +++-
 src/V3AstNodeExpr.h                         | 131 +++++++++++++-------
 src/V3AstNodeOther.h                        | 100 ++++++++-------
 src/V3AstNodes.cpp                          | 126 +++++++++++++++++--
 src/V3Const.cpp                             |  32 ++---
 src/V3Inline.cpp                            |   5 +-
 src/V3LinkInc.cpp                           |   4 +-
 src/V3Premit.cpp                            |   1 +
 src/V3Scope.cpp                             |   1 +
 src/V3Task.cpp                              |   3 +
 src/V3Width.cpp                             |   1 -
 test_regress/t/t_class_method_str_literal.v |  20 +++
 test_regress/t/t_const_opt_shortcut.pl      |   5 +-
 test_regress/t/t_dpi_shortcircuit.out       |  20 ---
 test_regress/t/t_dpi_shortcircuit.pl        |   5 +-
 17 files changed, 318 insertions(+), 169 deletions(-)
 delete mode 100644 test_regress/t/t_dpi_shortcircuit.out

diff --git a/configure.ac b/configure.ac
index 6ad04c29c..c508bcfb9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -442,6 +442,7 @@ m4_foreach([cflag],[
         [-mno-cet],
         [-Qunused-arguments],
         [-Wno-bool-operation],
+        [-Wno-constant-logical-operand],
         [-Wno-tautological-bitwise-compare],
         [-Wno-parentheses-equality],
         [-Wno-sign-compare],
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 8f50841ae..ddde27f08 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1343,16 +1343,6 @@ void AstNode::dumpTreeDotFile(const string& filename, bool append, bool doDump)
     }
 }
 
-bool AstNode::isTreePureRecurse() const {
-    // Should memoize this if call commonly
-    if (!this->isPure()) return false;
-    if (this->op1p() && !this->op1p()->isTreePureRecurse()) return false;
-    if (this->op2p() && !this->op2p()->isTreePureRecurse()) return false;
-    if (this->op3p() && !this->op3p()->isTreePureRecurse()) return false;
-    if (this->op4p() && !this->op4p()->isTreePureRecurse()) return false;
-    return true;
-}
-
 string AstNode::instanceStr() const {
     // Max iterations before giving up on location search,
     // in case we have some circular reference bug.
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 5de6ab906..8c42e41ba 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -167,6 +167,21 @@ inline std::ostream& operator<<(std::ostream& os, const VLifetime& rhs) {
 
 // ######################################################################
 
+class VPurity final {
+    // Used in some nodes to cache the result of isPure method
+public:
+    enum en : uint8_t { NOT_CACHED, PURE, IMPURE };
+    enum en m_e;
+    VPurity()
+        : m_e{NOT_CACHED} {}
+    bool isCached() const { return m_e != NOT_CACHED; }
+    bool isPure() const { return m_e == PURE; }
+    void setPurity(bool pure) { m_e = pure ? PURE : IMPURE; }
+    void clearCache() { m_e = NOT_CACHED; }
+};
+
+// ######################################################################
+
 class VAccess final {
 public:
     enum en : uint8_t {
@@ -690,6 +705,7 @@ public:
     }
     bool isReadOnly() const VL_MT_SAFE { return m_e == INPUT || m_e == CONSTREF; }
     bool isWritable() const VL_MT_SAFE { return m_e == OUTPUT || m_e == INOUT || m_e == REF; }
+    bool isRef() const VL_MT_SAFE { return m_e == REF; }
     bool isRefOrConstRef() const VL_MT_SAFE { return m_e == REF || m_e == CONSTREF; }
 };
 constexpr bool operator==(const VDirection& lhs, const VDirection& rhs) {
@@ -2024,8 +2040,6 @@ public:
     void dumpTreeDot(std::ostream& os = std::cout) const;
     void dumpTreeDotFile(const string& filename, bool append = false, bool doDump = true);
 
-    bool isTreePureRecurse() const;
-
     // METHODS - queries
     // Changes control flow, disable some optimizations
     virtual bool isBrancher() const { return false; }
@@ -2034,11 +2048,11 @@ public:
     // GateDedupable is a slightly larger superset of GateOptimzable (eg, AstNodeIf)
     virtual bool isGateDedupable() const { return isGateOptimizable(); }
     // Else creates output or exits, etc, not unconsumed
-    virtual bool isOutputter() const { return false; }
+    virtual bool isOutputter() { return false; }
     // Else a AstTime etc which output can't be predicted from input
     virtual bool isPredictOptimizable() const { return !isTimingControl(); }
     // Else a $display, etc, that must be ordered with other displays
-    virtual bool isPure() const { return true; }
+    virtual bool isPure() { return true; }
     // Else a AstTime etc that can't be substituted out
     virtual bool isSubstOptimizable() const { return true; }
     // An event control, delay, wait, etc.
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index ec2f06693..823c26a05 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -64,11 +64,14 @@ public:
 
     // Wrap This expression into an AstStmtExpr to denote it occurs in statement position
     inline AstStmtExpr* makeStmt();
+    virtual void clearCachedPurity(){};  // Most nodes don't cache their purity
 };
 class AstNodeBiop VL_NOT_FINAL : public AstNodeExpr {
     // Binary expression
     // @astgen op1 := lhsp : AstNodeExpr
     // @astgen op2 := rhsp : AstNodeExpr
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeBiop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp)
         : AstNodeExpr{t, fl} {
@@ -93,6 +96,12 @@ public:
     virtual bool stringFlavor() const { return false; }  // N flavor of nodes with both flavors?
     int instrCount() const override { return widthInstrs(); }
     bool same(const AstNode*) const override { return true; }
+    bool isPure() override;
+    const char* broken() const override;
+    void clearCachedPurity() override;
+
+private:
+    bool getPurity() const { return lhsp()->isPure() && rhsp()->isPure(); }
 };
 class AstNodeBiCom VL_NOT_FINAL : public AstNodeBiop {
     // Binary expr with commutative properties
@@ -196,8 +205,8 @@ public:
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override;
-    bool isOutputter() const override { return !isPure(); }
+    bool isPure() override;
+    bool isOutputter() override { return !isPure(); }
     AstCFunc* funcp() const { return m_funcp; }
     void funcp(AstCFunc* funcp) { m_funcp = funcp; }
     void argTypes(const string& str) { m_argTypes = str; }
@@ -219,6 +228,8 @@ class AstNodeFTaskRef VL_NOT_FINAL : public AstNodeExpr {
     string m_dotted;  // Dotted part of scope the name()ed task/func is under or ""
     string m_inlinedDots;  // Dotted hierarchy flattened out
     bool m_pli = false;  // Pli system call ($name)
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeFTaskRef(VNType t, FileLine* fl, AstNode* namep, AstNodeExpr* pinsp)
         : AstNodeExpr{t, fl} {
@@ -249,11 +260,15 @@ public:
     void classOrPackagep(AstNodeModule* nodep) { m_classOrPackagep = nodep; }
     bool pli() const { return m_pli; }
     void pli(bool flag) { m_pli = flag; }
-    bool isPure() const override;
+    bool isPure() override;
 
     string emitVerilog() final override { V3ERROR_NA_RETURN(""); }
     string emitC() final override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const final override { V3ERROR_NA_RETURN(true); }
+    void clearCachedPurity() override;
+
+private:
+    bool getPurity() const;
 };
 class AstNodePreSel VL_NOT_FINAL : public AstNodeExpr {
     // Something that becomes an AstSel
@@ -261,6 +276,8 @@ class AstNodePreSel VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : Optional[AstNodeExpr]
     // @astgen op4 := attrp : Optional[AstAttrOf]
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodePreSel(VNType t, FileLine* fl, AstNodeExpr* fromp, AstNodeExpr* rhsp, AstNodeExpr* thsp)
         : AstNodeExpr{t, fl} {
@@ -277,6 +294,14 @@ public:
     string emitVerilog() final override { V3ERROR_NA_RETURN(""); }
     string emitC() final override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const final override { V3ERROR_NA_RETURN(true); }
+    bool isPure() override;
+    const char* broken() const override;
+    void clearCachedPurity() override;
+
+private:
+    bool getPurity() const {
+        return fromp()->isPure() && rhsp()->isPure() && (!thsp() || thsp()->isPure());
+    }
 };
 class AstNodeQuadop VL_NOT_FINAL : public AstNodeExpr {
     // 4-ary expression
@@ -284,6 +309,8 @@ class AstNodeQuadop VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : AstNodeExpr
     // @astgen op4 := fhsp : AstNodeExpr
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeQuadop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, AstNodeExpr* thsp,
                   AstNodeExpr* fhsp)
@@ -311,6 +338,14 @@ public:
     virtual bool sizeMattersFhs() const = 0;  // True if output result depends on ths size
     int instrCount() const override { return widthInstrs(); }
     bool same(const AstNode*) const override { return true; }
+    bool isPure() override;
+    const char* broken() const override;
+    void clearCachedPurity() override;
+
+private:
+    bool getPurity() const {
+        return lhsp()->isPure() && rhsp()->isPure() && thsp()->isPure() && fhsp()->isPure();
+    }
 };
 class AstNodeTermop VL_NOT_FINAL : public AstNodeExpr {
     // Terminal operator -- an operator with no "inputs"
@@ -330,6 +365,8 @@ class AstNodeTriop VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op1 := lhsp : AstNodeExpr
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : AstNodeExpr
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeTriop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, AstNodeExpr* thsp)
         : AstNodeExpr{t, fl} {
@@ -354,6 +391,12 @@ public:
     virtual bool sizeMattersThs() const = 0;  // True if output result depends on ths size
     int instrCount() const override { return widthInstrs(); }
     bool same(const AstNode*) const override { return true; }
+    bool isPure() override;
+    const char* broken() const override;
+    void clearCachedPurity() override;
+
+private:
+    bool getPurity() const { return lhsp()->isPure() && rhsp()->isPure() && thsp()->isPure(); }
 };
 class AstNodeCond VL_NOT_FINAL : public AstNodeTriop {
     // @astgen alias op1 := condp
@@ -403,6 +446,8 @@ public:
 class AstNodeUniop VL_NOT_FINAL : public AstNodeExpr {
     // Unary expression
     // @astgen op1 := lhsp : AstNodeExpr
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeUniop(VNType t, FileLine* fl, AstNodeExpr* lhsp)
         : AstNodeExpr{t, fl} {
@@ -424,6 +469,9 @@ public:
     virtual bool stringFlavor() const { return false; }  // N flavor of nodes with both flavors?
     int instrCount() const override { return widthInstrs(); }
     bool same(const AstNode*) const override { return true; }
+    bool isPure() override;
+    const char* broken() const override;
+    void clearCachedPurity() override;
 };
 class AstNodeSystemUniopD VL_NOT_FINAL : public AstNodeUniop {
 public:
@@ -600,7 +648,7 @@ public:
         const AstCMethodHard* asamep = static_cast<const AstCMethodHard*>(samep);
         return (m_name == asamep->m_name);
     }
-    bool isPure() const override { return m_pure; }
+    bool isPure() override { return m_pure; }
     int instrCount() const override;
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
@@ -1121,7 +1169,7 @@ public:
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const override { return true; }
-    bool isPure() const override { return false; }
+    bool isPure() override { return false; }
     bool same(const AstNode*) const override { return true; }
 };
 class AstFError final : public AstNodeExpr {
@@ -1139,7 +1187,7 @@ public:
     bool cleanOut() const override { return true; }
     int instrCount() const override { return widthInstrs() * 64; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
 class AstFOpen final : public AstNodeExpr {
@@ -1158,8 +1206,8 @@ public:
     string verilogKwd() const override { return "$fopen"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -1177,8 +1225,8 @@ public:
     string verilogKwd() const override { return "$fopen"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -1201,8 +1249,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: makes output
+    bool isPure() override { return false; }  // SPECIAL: has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -1219,8 +1267,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool cleanOut() const override { return false; }
     bool same(const AstNode* /*samep*/) const override { return true; }
@@ -1244,8 +1292,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: makes output
+    bool isPure() override { return false; }  // SPECIAL: has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* samep) const override {
         return text() == static_cast<const AstFScanF*>(samep)->text();
@@ -1270,8 +1318,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: makes output
+    bool isPure() override { return false; }  // SPECIAL: has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -1288,8 +1336,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool cleanOut() const override { return false; }
     bool same(const AstNode* /*samep*/) const override { return true; }
@@ -1766,8 +1814,8 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: makes output
+    bool isPure() override { return false; }  // SPECIAL: has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* samep) const override {
         return text() == static_cast<const AstSScanF*>(samep)->text();
@@ -1924,8 +1972,8 @@ public:
     string emitC() override { return "VL_STACKTRACE_N()"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool cleanOut() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
@@ -1970,8 +2018,8 @@ public:
     string verilogKwd() const override { return "$ignored"; }
     bool isGateOptimizable() const override { return false; }  // Though deleted before opt
     bool isPredictOptimizable() const override { return false; }  // Though deleted before opt
-    bool isPure() const override { return false; }  // Though deleted before opt
-    bool isOutputter() const override { return true; }  // Though deleted before opt
+    bool isPure() override { return false; }  // Though deleted before opt
+    bool isOutputter() override { return true; }  // Though deleted before opt
     int instrCount() const override { return INSTR_COUNT_PLI; }
 
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
@@ -1992,8 +2040,8 @@ public:
     string emitC() override { return "VL_SYSTEM_%nq(%lw, %P)"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool cleanOut() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
@@ -2076,8 +2124,8 @@ public:
     bool cleanOut() const override { return false; }
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
     bool isGateOptimizable() const override { return false; }
     bool isSubstOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
@@ -2132,7 +2180,7 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return !outp(); }
+    bool isPure() override { return !outp(); }
     bool cleanOut() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -2239,7 +2287,7 @@ public:
     bool sizeMattersLhs() const override { return false; }
     bool sizeMattersRhs() const override { return false; }
     int instrCount() const override { return widthInstrs() * 20; }
-    bool isPure() const override { return true; }
+    bool isPure() override { return true; }
 };
 class AstCompareNN final : public AstNodeBiop {
     // Verilog str.compare() and str.icompare()
@@ -2463,7 +2511,7 @@ public:
     bool sizeMattersRhs() const override { return false; }
     int instrCount() const override { return widthInstrs() * 64; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
     AstNode* filep() const { return lhsp(); }
     AstNode* charp() const { return rhsp(); }
 };
@@ -2748,11 +2796,6 @@ public:
     int instrCount() const override { return widthInstrs() + INSTR_COUNT_BRANCH; }
 };
 class AstLogOr final : public AstNodeBiop {
-    // LOGOR with optional side effects
-    // Side effects currently used in some V3Width code
-    // TBD if this concept is generally adopted for side-effect tracking
-    // versus V3Const tracking it itself
-    bool m_sideEffect = false;  // Has side effect, relies on short-circuiting
 public:
     AstLogOr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp)
         : ASTGEN_SUPER_LogOr(fl, lhsp, rhsp) {
@@ -2765,11 +2808,6 @@ public:
     void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
         out.opLogOr(lhs, rhs);
     }
-    bool same(const AstNode* samep) const override {
-        const AstLogOr* const sp = static_cast<const AstLogOr*>(samep);
-        return m_sideEffect == sp->m_sideEffect;
-    }
-    void dump(std::ostream& str = std::cout) const override;
     string emitVerilog() override { return "%k(%l %f|| %r)"; }
     string emitC() override { return "VL_LOGOR_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
     string emitSimpleOperator() override { return "||"; }
@@ -2779,9 +2817,6 @@ public:
     bool sizeMattersLhs() const override { return false; }
     bool sizeMattersRhs() const override { return false; }
     int instrCount() const override { return widthInstrs() + INSTR_COUNT_BRANCH; }
-    bool isPure() const override { return !m_sideEffect; }
-    void sideEffect(bool flag) { m_sideEffect = flag; }
-    bool sideEffect() const { return m_sideEffect; }
 };
 class AstLt final : public AstNodeBiop {
 public:
@@ -4760,7 +4795,7 @@ public:
     bool sizeMattersLhs() const override { return false; }
     int instrCount() const override { return widthInstrs() * 16; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
     AstNode* filep() const { return lhsp(); }
 };
 class AstFGetC final : public AstNodeUniop {
@@ -4777,7 +4812,7 @@ public:
     bool sizeMattersLhs() const override { return false; }
     int instrCount() const override { return widthInstrs() * 64; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
     AstNode* filep() const { return lhsp(); }
 };
 class AstISToRD final : public AstNodeUniop {
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index ffb7ef422..23e1b0891 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -88,6 +88,8 @@ private:
     bool m_virtual : 1;  // Virtual method in class
     bool m_needProcess : 1;  // Implements part of a process that allocates std::process
     VLifetime m_lifetime;  // Lifetime
+    VPurity m_purity;  // Pure state
+
 protected:
     AstNodeFTask(VNType t, FileLine* fl, const string& name, AstNode* stmtsp)
         : AstNode{t, fl}
@@ -180,6 +182,8 @@ public:
     void lifetime(const VLifetime& flag) { m_lifetime = flag; }
     VLifetime lifetime() const { return m_lifetime; }
     bool isFirstInMyListOfStatements(AstNode* n) const override { return n == stmtsp(); }
+    bool isPure() override;
+    const char* broken() const override;
     void propagateAttrFrom(const AstNodeFTask* fromp) {
         // Creating a wrapper with e.g. cloneType(); preserve some attributes
         classMethod(fromp->classMethod());
@@ -189,6 +193,9 @@ public:
         lifetime(fromp->lifetime());
         underGenerate(fromp->underGenerate());
     }
+
+private:
+    bool getPurity() const;
 };
 class AstNodeFile VL_NOT_FINAL : public AstNode {
     // Emitted Output file
@@ -469,8 +476,8 @@ public:
     ASTGEN_MEMBERS_AstNodeReadWriteMem;
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
         return isHex() == static_cast<const AstNodeReadWriteMem*>(samep)->isHex();
@@ -994,8 +1001,8 @@ public:
     string verilogKwd() const override { return string{"$"} + string{displayType().ascii()}; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: $display makes output
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
         return displayType() == static_cast<const AstElabDisplay*>(samep)->displayType();
@@ -1915,6 +1922,7 @@ public:
     bool isInoutish() const { return m_direction.isInoutish(); }
     bool isNonOutput() const { return m_direction.isNonOutput(); }
     bool isReadOnly() const VL_MT_SAFE { return m_direction.isReadOnly(); }
+    bool isRef() const VL_MT_SAFE { return m_direction.isRef(); }
     bool isWritable() const VL_MT_SAFE { return m_direction.isWritable(); }
     bool isTristate() const { return m_tristate; }
     bool isPrimaryIO() const { return m_primaryIO; }
@@ -2616,7 +2624,7 @@ public:
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isOutputter() override { return true; }
     // but isPure()  true
     AstCoverDecl* declp() const { return m_declp; }  // Where defined
 };
@@ -2638,7 +2646,7 @@ public:
     bool same(const AstNode* /*samep*/) const override { return true; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return true; }
-    bool isOutputter() const override {
+    bool isOutputter() override {
         return false;  // Though the AstCoverInc under this is an outputter
     }
     // but isPure()  true
@@ -2715,8 +2723,8 @@ public:
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: $display makes output
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
         return displayType() == static_cast<const AstDisplay*>(samep)->displayType();
@@ -2758,7 +2766,7 @@ public:
     string verilogKwd() const override { return ctlType().ascii(); }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isOutputter() override { return true; }
     virtual bool cleanOut() const { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
     VDumpCtlType ctlType() const { return m_ctlType; }
@@ -2790,8 +2798,8 @@ public:
     string verilogKwd() const override { return "$fclose"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -2807,8 +2815,8 @@ public:
     string verilogKwd() const override { return "$fflush"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -2819,8 +2827,8 @@ public:
     ASTGEN_MEMBERS_AstFinish;
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: $display makes output
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     int instrCount() const override { return 0; }  // Rarely executes
     bool same(const AstNode* samep) const override { return fileline() == samep->fileline(); }
@@ -2942,8 +2950,8 @@ public:
     string verilogKwd() const override { return m_off ? "$monitoroff" : "$monitoron"; }
     bool isGateOptimizable() const override { return false; }  // Though deleted before opt
     bool isPredictOptimizable() const override { return false; }  // Though deleted before opt
-    bool isPure() const override { return false; }  // Though deleted before opt
-    bool isOutputter() const override { return true; }  // Though deleted before opt
+    bool isPure() override { return false; }  // Though deleted before opt
+    bool isOutputter() override { return true; }  // Though deleted before opt
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool same(const AstNode* samep) const override {
         return m_off == static_cast<const AstMonitorOff*>(samep)->m_off;
@@ -2964,8 +2972,8 @@ public:
     string verilogKwd() const override { return "$printtimescale"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     void timeunit(const VTimescale& flag) { m_timeunit = flag; }
     VTimescale timeunit() const { return m_timeunit; }
@@ -3042,8 +3050,8 @@ public:
     string verilogKwd() const override { return "$sformat"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return true; }
-    bool isPure() const override { return true; }
-    bool isOutputter() const override { return false; }
+    bool isPure() override { return true; }
+    bool isOutputter() override { return false; }
     virtual bool cleanOut() const { return false; }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool same(const AstNode* /*samep*/) const override { return true; }
@@ -3057,8 +3065,8 @@ public:
     string verilogKwd() const override { return "$stacktrace"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -3079,8 +3087,8 @@ public:
     ASTGEN_MEMBERS_AstStop;
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }  // SPECIAL: $display has 'visual' ordering
-    bool isOutputter() const override { return true; }  // SPECIAL: $display makes output
+    bool isPure() override { return false; }  // SPECIAL: $display has 'visual' ordering
+    bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     int instrCount() const override { return 0; }  // Rarely executes
     bool same(const AstNode* samep) const override { return fileline() == samep->fileline(); }
@@ -3098,8 +3106,8 @@ public:
     string verilogKwd() const override { return ""; }
     bool isGateOptimizable() const override { return true; }
     bool isPredictOptimizable() const override { return true; }
-    bool isPure() const override { return true; }
-    bool isOutputter() const override { return false; }
+    bool isPure() override { return true; }
+    bool isOutputter() override { return false; }
     int instrCount() const override { return 0; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -3115,8 +3123,8 @@ public:
     string verilogKwd() const override { return "$system"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
@@ -3139,8 +3147,8 @@ public:
     string verilogKwd() const override { return "$timeformat"; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     int instrCount() const override { return INSTR_COUNT_PLI; }
 };
 class AstTraceDecl final : public AstNodeStmt {
@@ -3229,7 +3237,7 @@ public:
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isOutputter() override { return true; }
     // but isPure()  true
     AstTraceDecl* declp() const { return m_declp; }
     bool full() const { return m_full; }
@@ -3266,8 +3274,8 @@ public:
     ASTGEN_MEMBERS_AstUCStmt;
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() const override { return false; }
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }
+    bool isOutputter() override { return true; }
     bool same(const AstNode* /*samep*/) const override { return true; }
 };
 class AstWait final : public AstNodeStmt {
@@ -3557,48 +3565,48 @@ public:
     AstScCtor(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScCtor(fl, textp) {}
     ASTGEN_MEMBERS_AstScCtor;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 class AstScDtor final : public AstNodeText {
 public:
     AstScDtor(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScDtor(fl, textp) {}
     ASTGEN_MEMBERS_AstScDtor;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 class AstScHdr final : public AstNodeText {
 public:
     AstScHdr(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScHdr(fl, textp) {}
     ASTGEN_MEMBERS_AstScHdr;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 class AstScImp final : public AstNodeText {
 public:
     AstScImp(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScImp(fl, textp) {}
     ASTGEN_MEMBERS_AstScImp;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 class AstScImpHdr final : public AstNodeText {
 public:
     AstScImpHdr(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScImpHdr(fl, textp) {}
     ASTGEN_MEMBERS_AstScImpHdr;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 class AstScInt final : public AstNodeText {
 public:
     AstScInt(FileLine* fl, const string& textp)
         : ASTGEN_SUPER_ScInt(fl, textp) {}
     ASTGEN_MEMBERS_AstScInt;
-    bool isPure() const override { return false; }  // SPECIAL: User may order w/other sigs
-    bool isOutputter() const override { return true; }
+    bool isPure() override { return false; }  // SPECIAL: User may order w/other sigs
+    bool isOutputter() override { return true; }
 };
 
 // === AstNodeSimpleText ===
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 9a35b190b..29fbf3902 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -51,6 +51,7 @@ AstIface* AstIfaceRefDType::ifaceViaCellp() const {
 const char* AstNodeFTaskRef::broken() const {
     BROKEN_RTN(m_taskp && !m_taskp->brokeExists());
     BROKEN_RTN(m_classOrPackagep && !m_classOrPackagep->brokeExists());
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
     return nullptr;
 }
 
@@ -61,12 +62,34 @@ void AstNodeFTaskRef::cloneRelink() {
     }
 }
 
-bool AstNodeFTaskRef::isPure() const {
-    // TODO: For non-DPI functions we could traverse the AST of function's body to determine
-    // pureness.
-    return this->taskp() && this->taskp()->dpiImport() && this->taskp()->dpiPure();
+bool AstNodeFTaskRef::isPure() {
+    if (!this->taskp()) {
+        // The task isn't linked yet, so it's assumed that it is impure, but the value shouldn't be
+        // cached.
+        return false;
+    } else {
+        if (!m_purity.isCached()) m_purity.setPurity(this->getPurity());
+        return m_purity.isPure();
+    }
 }
 
+void AstNodeFTaskRef::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
+
+bool AstNodeFTaskRef::getPurity() const {
+    AstNodeFTask* const taskp = this->taskp();
+    // Unlinked yet, so treat as impure
+    if (!taskp) return false;
+
+    // First compute the purity of arguments
+    for (AstNode* pinp = this->pinsp(); pinp; pinp = pinp->nextp()) {
+        if (!pinp->isPure()) return false;
+    }
+
+    return taskp->isPure();
+}
 bool AstNodeFTaskRef::isGateOptimizable() const { return m_taskp && m_taskp->isGateOptimizable(); }
 
 const char* AstNodeVarRef::broken() const {
@@ -121,7 +144,71 @@ const char* AstNodeCCall::broken() const {
     BROKEN_RTN(m_funcp && !m_funcp->brokeExists());
     return nullptr;
 }
-bool AstNodeCCall::isPure() const { return funcp()->dpiPure(); }
+bool AstNodeCCall::isPure() { return funcp()->dpiPure(); }
+bool AstNodeUniop::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(lhsp()->isPure());
+    return m_purity.isPure();
+}
+const char* AstNodeUniop::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != lhsp()->isPure());
+    return nullptr;
+}
+void AstNodeUniop::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
+
+bool AstNodeBiop::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
+    return m_purity.isPure();
+}
+const char* AstNodeBiop::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    return nullptr;
+}
+void AstNodeBiop::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
+
+bool AstNodeTriop::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
+    return m_purity.isPure();
+}
+const char* AstNodeTriop::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    return nullptr;
+}
+void AstNodeTriop::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
+
+bool AstNodePreSel::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
+    return m_purity.isPure();
+}
+const char* AstNodePreSel::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    return nullptr;
+}
+void AstNodePreSel::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
+
+bool AstNodeQuadop::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
+    return m_purity.isPure();
+}
+const char* AstNodeQuadop::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    return nullptr;
+}
+void AstNodeQuadop::clearCachedPurity() {
+    m_purity.clearCache();
+    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
+}
 
 AstNodeCond::AstNodeCond(VNType t, FileLine* fl, AstNodeExpr* condp, AstNodeExpr* thenp,
                          AstNodeExpr* elsep)
@@ -1622,10 +1709,6 @@ void AstJumpLabel::dump(std::ostream& str) const {
         str << "%Error:UNLINKED";
     }
 }
-void AstLogOr::dump(std::ostream& str) const {
-    this->AstNodeExpr::dump(str);
-    if (sideEffect()) str << " [SIDE]";
-}
 
 void AstMemberDType::dumpSmall(std::ostream& str) const {
     this->AstNodeDType::dumpSmall(str);
@@ -2218,6 +2301,31 @@ void AstNodeFTask::dump(std::ostream& str) const {
     if (taskPublic()) str << " [PUBLIC]";
     if ((dpiImport() || dpiExport()) && cname() != name()) str << " [c=" << cname() << "]";
 }
+bool AstNodeFTask::isPure() {
+    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
+    return m_purity.isPure();
+}
+const char* AstNodeFTask::broken() const {
+    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    return nullptr;
+}
+bool AstNodeFTask::getPurity() const {
+    if (this->dpiImport()) return this->dpiPure();
+    // Check the list of statements if it contains any impure statement
+    // or any write reference to a variable that isn't an automatic function local.
+    for (AstNode* stmtp = this->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
+        if (const AstVar* const varp = VN_CAST(stmtp, Var)) {
+            if (varp->isInoutish() || varp->isRef()) return false;
+        }
+        if (!stmtp->isPure()) return false;
+        if (stmtp->exists([](const AstNodeVarRef* const varrefp) {
+                return (!varrefp->varp()->isFuncLocal() || varrefp->varp()->lifetime().isStatic())
+                       && varrefp->access().isWriteOrRW();
+            }))
+            return false;
+    }
+    return true;
+}
 void AstNodeBlock::dump(std::ostream& str) const {
     this->AstNode::dump(str);
     if (unnamed()) str << " [UNNAMED]";
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 888bd7780..b96b2fee8 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1217,13 +1217,13 @@ private:
     bool operandHugeShiftL(const AstNodeBiop* nodep) {
         return (VN_IS(nodep->rhsp(), Const) && !VN_AS(nodep->rhsp(), Const)->num().isFourState()
                 && (VN_AS(nodep->rhsp(), Const)->toUInt() >= static_cast<uint32_t>(nodep->width()))
-                && isTPure(nodep->lhsp()));
+                && nodep->lhsp()->isPure());
     }
     bool operandHugeShiftR(const AstNodeBiop* nodep) {
         return (VN_IS(nodep->rhsp(), Const) && !VN_AS(nodep->rhsp(), Const)->num().isFourState()
                 && (VN_AS(nodep->rhsp(), Const)->toUInt()
                     >= static_cast<uint32_t>(nodep->lhsp()->width()))
-                && isTPure(nodep->lhsp()));
+                && nodep->lhsp()->isPure());
     }
     bool operandIsTwo(const AstNode* nodep) {
         return (VN_IS(nodep, Const) && !VN_AS(nodep, Const)->num().isFourState()
@@ -1377,14 +1377,6 @@ private:
         return nodep;
     }
 
-    bool isTPure(AstNode* nodep) {
-        // Pure checks - if this node and all nodes under it are free of
-        // side effects can do this optimization
-        // Eventually we'll recurse through tree when unknown, memoizing results so far,
-        // but for now can disable en masse until V3Purify takes effect.
-        return m_doShort || VN_IS(nodep, VarRef) || VN_IS(nodep, Const);
-    }
-
     // Extraction checks
     bool warnSelect(AstSel* nodep) {
         if (m_doGenerate) {
@@ -1587,7 +1579,7 @@ private:
         // For example, "0 * n" -> 0 if n has no side effects
         // Else strength reduce it to 0 & n.
         // If ever change the operation note AstAnd rule specially ignores this created pattern
-        if (isTPure(checkp)) {
+        if (checkp->isPure()) {
             VL_DO_DANGLING(replaceNum(nodep, 0), nodep);
         } else {
             AstNode* const newp = new AstAnd{nodep->fileline(), new AstConst{nodep->fileline(), 0},
@@ -2053,7 +2045,7 @@ private:
                 VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
                 return true;
             }
-        } else if (m_doV && VN_IS(nodep->lhsp(), Concat) && nodep->isTreePureRecurse()) {
+        } else if (m_doV && VN_IS(nodep->lhsp(), Concat) && nodep->isPure()) {
             bool need_temp = false;
             if (m_warn && !VN_IS(nodep, AssignDly)) {  // Is same var on LHS and RHS?
                 // Note only do this (need user4) when m_warn, which is
@@ -3014,7 +3006,7 @@ private:
                 }
                 VL_DO_DANGLING(nodep->deleteTree(), nodep);
             } else if (!afterComment(nodep->thensp()) && !afterComment(nodep->elsesp())) {
-                if (!nodep->condp()->isTreePureRecurse()) {
+                if (!nodep->condp()->isPure()) {
                     // Condition has side effect - leave - perhaps in
                     // future simplify to remove all but side effect terms
                 } else {
@@ -3374,7 +3366,7 @@ private:
     TREEOPA("AstNodeQuadop{$lhsp.castConst, $rhsp.castConst, $thsp.castConst, $fhsp.castConst}",  "replaceConst(nodep)");
     // Zero on one side or the other
     TREEOP ("AstAdd   {$lhsp.isZero, $rhsp}",   "replaceWRhs(nodep)");
-    TREEOP ("AstAnd   {$lhsp.isZero, $rhsp, isTPure($rhsp)}",   "replaceZero(nodep)");  // Can't use replaceZeroChkPure as we make this pattern in ChkPure
+    TREEOP ("AstAnd   {$lhsp.isZero, $rhsp, $rhsp.isPure}",   "replaceZero(nodep)");  // Can't use replaceZeroChkPure as we make this pattern in ChkPure
     // This visit function here must allow for short-circuiting.
     TREEOPS("AstLogAnd   {$lhsp.isZero}",       "replaceZero(nodep)");
     TREEOP ("AstLogAnd{$lhsp.isZero, $rhsp}",   "replaceZero(nodep)");
@@ -3414,12 +3406,12 @@ private:
     // Non-zero on one side or the other
     TREEOP ("AstAnd   {$lhsp.isAllOnes, $rhsp}",        "replaceWRhs(nodep)");
     TREEOP ("AstLogAnd{$lhsp.isNeqZero, $rhsp}",        "replaceWRhsBool(nodep)");
-    TREEOP ("AstOr    {$lhsp.isAllOnes, $rhsp, isTPure($rhsp)}",        "replaceWLhs(nodep)");  // ->allOnes
+    TREEOP ("AstOr    {$lhsp.isAllOnes, $rhsp, $rhsp.isPure}",        "replaceWLhs(nodep)");  // ->allOnes
     TREEOP ("AstLogOr {$lhsp.isNeqZero, $rhsp}",        "replaceNum(nodep,1)");
     TREEOP ("AstAnd   {$lhsp, $rhsp.isAllOnes}",        "replaceWLhs(nodep)");
     TREEOP ("AstLogAnd{$lhsp, $rhsp.isNeqZero}",        "replaceWLhsBool(nodep)");
-    TREEOP ("AstOr    {$lhsp, $rhsp.isAllOnes, isTPure($lhsp)}",        "replaceWRhs(nodep)");  // ->allOnes
-    TREEOP ("AstLogOr {$lhsp, $rhsp.isNeqZero, isTPure($lhsp), nodep->isPure()}",        "replaceNum(nodep,1)");
+    TREEOP ("AstOr    {$lhsp, $rhsp.isAllOnes, $lhsp.isPure}",        "replaceWRhs(nodep)");  // ->allOnes
+    TREEOP ("AstLogOr {$lhsp, $rhsp.isNeqZero, $lhsp.isPure, nodep->isPure()}",        "replaceNum(nodep,1)");
     TREEOP ("AstXor   {$lhsp.isAllOnes, $rhsp}",        "AstNot{$rhsp}");
     TREEOP ("AstMul   {$lhsp.isOne, $rhsp}",    "replaceWRhs(nodep)");
     TREEOP ("AstMulS  {$lhsp.isOne, $rhsp}",    "replaceWRhs(nodep)");
@@ -3591,9 +3583,9 @@ private:
     TREEOPV("AstOneHot{$lhsp.width1}",          "replaceWLhs(nodep)");
     TREEOPV("AstOneHot0{$lhsp.width1}",         "replaceNum(nodep,1)");
     // Binary AND/OR is faster than logical and/or (usually)
-    TREEOPV("AstLogAnd{$lhsp.width1, $rhsp.width1, isTPure($lhsp), isTPure($rhsp)}", "AstAnd{$lhsp,$rhsp}");
-    TREEOPV("AstLogOr {$lhsp.width1, $rhsp.width1, nodep->isPure(), isTPure($lhsp), isTPure($rhsp)}", "AstOr{$lhsp,$rhsp}");
-    TREEOPV("AstLogNot{$lhsp.width1, isTPure($lhsp)}",  "AstNot{$lhsp}");
+    TREEOPV("AstLogAnd{$lhsp.width1, $rhsp.width1, nodep->isPure()}", "AstAnd{$lhsp,$rhsp}");
+    TREEOPV("AstLogOr {$lhsp.width1, $rhsp.width1, nodep->isPure()}", "AstOr{$lhsp,$rhsp}");
+    TREEOPV("AstLogNot{$lhsp.width1}",  "AstNot{$lhsp}");
     // CONCAT(CONCAT({a},{b}),{c}) -> CONCAT({a},CONCAT({b},{c}))
     // CONCAT({const},CONCAT({const},{c})) -> CONCAT((constifiedCONC{const|const},{c}))
     TREEOPV("AstConcat{matchConcatRand(nodep)}",      "DONE");
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index e97ce6ec6..09e486a12 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -170,7 +170,10 @@ private:
     void visit(AstNodeFTaskRef* nodep) override {
         // Remove link. V3LinkDot will reestablish it after inlining.
         // MethodCalls not currently supported by inliner, so keep linked
-        if (!nodep->classOrPackagep() && !VN_IS(nodep, MethodCall)) nodep->taskp(nullptr);
+        if (!nodep->classOrPackagep() && !VN_IS(nodep, MethodCall)) {
+            nodep->taskp(nullptr);
+            nodep->clearCachedPurity();
+        }
         iterateChildren(nodep);
     }
     void visit(AstAlways* nodep) override {
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 6c0834182..164f005c2 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -222,7 +222,7 @@ private:
         // Currently we can't reference the target, so we just copy the AST both for read and
         // write, but doing so would double any side-effects, so as a safety measure all
         // statements which could have side-effects are banned at the moment.
-        if (!nodep->rhsp()->isTreePureRecurse()) {
+        if (!nodep->rhsp()->isPure()) {
             nodep->rhsp()->v3warn(E_UNSUPPORTED,
                                   "Unsupported: Inc/Dec of expression with side-effects");
             return;
@@ -252,7 +252,7 @@ private:
         // Currently we can't reference the target, so we just copy the AST both for read and
         // write, but doing so would double any side-effects, so as a safety measure all
         // statements which could have side-effects are banned at the moment.
-        if (!nodep->rhsp()->isTreePureRecurse()) {
+        if (!nodep->rhsp()->isPure()) {
             nodep->rhsp()->v3warn(E_UNSUPPORTED,
                                   "Unsupported: Inc/Dec of expression with side-effects");
             return;
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 9b58dc8b4..39dbdb9ad 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -346,6 +346,7 @@ private:
             // We're going to need the expression several times in the expanded code,
             // so might as well make it a common expression
             createDeepTemp(nodep->condp(), false);
+            nodep->clearCachedPurity();
         }
         checkNode(nodep);
     }
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index b5a31ea51..8156ec1e3 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -394,6 +394,7 @@ private:
             UINFO(9, "   New pkg-taskref " << nodep << endl);
         } else if (!VN_IS(nodep, MethodCall)) {
             nodep->taskp(nullptr);
+            nodep->clearCachedPurity();
             UINFO(9, "   New pkg-taskref " << nodep << endl);
         }
         iterateChildren(nodep);
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 1170f3326..246748d59 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -1437,6 +1437,9 @@ private:
                         "funcref-like expression to non-function");
             AstVarRef* const outrefp = new AstVarRef{nodep->fileline(), outvscp, VAccess::READ};
             beginp = new AstExprStmt{nodep->fileline(), beginp, outrefp};
+            // AstExprStmt is currently treated as impure, so clear the cached purity of its
+            // parents
+            nodep->clearCachedPurity();
             nodep->replaceWith(beginp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
         } else {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 756cf3dc9..1e2be1013 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4613,7 +4613,6 @@ private:
                                     new AstConst{fl, AstConst::BitFalse{}}};
                 auto* const orp = new AstLogOr{fl, new AstVarRef{fl, first_varp, VAccess::READ},
                                                new AstNeq{fl, new AstConst{fl, 0}, nextp}};
-                orp->sideEffect(true);
                 AstNode* const whilep = new AstWhile{fl, orp, first_clearp};
                 first_clearp->addNext(bodyPointp);
                 AstNode* const ifbodyp
diff --git a/test_regress/t/t_class_method_str_literal.v b/test_regress/t/t_class_method_str_literal.v
index 5f6309c02..54dec5ca5 100644
--- a/test_regress/t/t_class_method_str_literal.v
+++ b/test_regress/t/t_class_method_str_literal.v
@@ -6,6 +6,24 @@
 
 module t;
 
+class uvm_reg;
+    function int get_1;
+        return 1;
+    endfunction
+
+    function bit get_true;
+        return 1;
+    endfunction
+
+    function string get_string;
+        if (get_1() == 1) begin
+            return get_true() ? "user backdoor" : "DPI backdoor";
+        end else begin
+            return "";
+        end
+    endfunction
+endclass
+
 class T;
     function automatic string return_str(input string a_string);
        return a_string;
@@ -19,6 +37,8 @@ endclass
 
 initial begin
     T t_c = new;
+    uvm_reg u_r = new;
+    if (u_r.get_string() != "user backdoor") $stop;
     if (t_c.return_str("A") != "A") $stop;
     if (t_c.static_return_str("B") != "B") $stop;
     if (T::static_return_str("C") != "C") $stop;
diff --git a/test_regress/t/t_const_opt_shortcut.pl b/test_regress/t/t_const_opt_shortcut.pl
index 8955f94f0..beae879d6 100755
--- a/test_regress/t/t_const_opt_shortcut.pl
+++ b/test_regress/t/t_const_opt_shortcut.pl
@@ -16,10 +16,7 @@ compile(
     );
 
 execute(
-    # Shortcut is not properly implemented yet as in https://github.com/verilator/verilator/issues/487
-    # When the issue is fixed, change the following two lines.
-    check_finished => 0,
-    fails => $Self->{vlt_all},
+    check_finished => 1,
     );
 
 ok(1);
diff --git a/test_regress/t/t_dpi_shortcircuit.out b/test_regress/t/t_dpi_shortcircuit.out
deleted file mode 100644
index 2cc554bcf..000000000
--- a/test_regress/t/t_dpi_shortcircuit.out
+++ /dev/null
@@ -1,20 +0,0 @@
-%Error: Line 62: Bad result, got=1 expect=0
-%Error: Line 66: Bad result, got=1 expect=0
-%Error: Line 69: Bad result, got=0 expect=1
-%Error: Line 81: Bad result, got=0 expect=1
-%Error: Line 91: Bad result, got=0 expect=1
-%Error: Line 108: Bad result, got=1 expect=0
-%Error: Line 112: Bad result, got=1 expect=0
-%Error: Line 114: Bad result, got=0 expect=1
-%Error: Line 126: Bad result, got=0 expect=1
-%Error: Line 136: Bad result, got=0 expect=1
-%Error: Line 148: Bad result, got=1 expect=0
-%Error: Line 152: Bad result, got=1 expect=0
-%Error: Line 179: Bad result, got=0 expect=1
-%Error: Line 219: Bad result, got=64 expect=32
-%Error: Line 220: Bad result, got=64 expect=16
-%Error: Line 221: Bad result, got=64 expect=16
-%Error: Line 222: Bad result, got=64 expect=36
-%Error: Line 223: Bad result, got=64 expect=46
-%Error: t/t_dpi_shortcircuit.v:225: Verilog $stop
-Aborting...
diff --git a/test_regress/t/t_dpi_shortcircuit.pl b/test_regress/t/t_dpi_shortcircuit.pl
index ee25e9d79..b109f6b46 100755
--- a/test_regress/t/t_dpi_shortcircuit.pl
+++ b/test_regress/t/t_dpi_shortcircuit.pl
@@ -16,10 +16,7 @@ compile(
     );
 
 execute(
-    # Should pass, Verilator unsupported, bug413 short circuit");
-    fails => $Self->{vlt},
-    check_finished => !$Self->{vlt},
-    expect_filename => $Self->{golden_filename},
+    check_finished => 1,
     );
 
 ok(1);

From 24ff3155ae07e731759d1e4bbd0c89c9e3a50539 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 18 Sep 2023 21:17:21 -0400
Subject: [PATCH 009/157] Support randc (#4349).

---
 Changes                                 |  1 +
 docs/guide/warnings.rst                 |  5 +-
 include/verilated_types.h               | 64 +++++++++++++++++++++-
 src/V3AstNodeDType.h                    | 35 +++++++++++++
 src/V3AstNodeOther.h                    | 11 ++++
 src/V3AstNodes.cpp                      |  8 +++
 src/V3Common.cpp                        |  2 +-
 src/V3EmitCFunc.cpp                     |  2 +
 src/V3Hasher.cpp                        |  5 ++
 src/V3ParseImp.h                        |  5 +-
 src/V3Randomize.cpp                     | 70 ++++++++++++++++++++++---
 src/V3Unknown.cpp                       | 12 +++++
 test_regress/t/t_randc.out              | 12 -----
 test_regress/t/t_randc.pl               | 10 ++--
 test_regress/t/t_randc_ignore_unsup.pl  | 24 ---------
 test_regress/t/t_randc_oversize_bad.out |  7 ++-
 test_regress/t/t_randc_oversize_bad.v   |  7 ++-
 test_regress/t/t_uvm_todo.pl            |  1 -
 18 files changed, 220 insertions(+), 61 deletions(-)
 delete mode 100644 test_regress/t/t_randc.out
 delete mode 100755 test_regress/t/t_randc_ignore_unsup.pl

diff --git a/Changes b/Changes
index 6a13b022b..a23881b92 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.017 devel
 
 **Minor:**
 
+* Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 7f0898b5d..b7cf29a81 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1360,7 +1360,10 @@ List Of Warnings
 
 .. option:: RANDC
 
-   Warns that the :code:`randc` keyword is unsupported and being converted
+   Historical, never issued since version 5.018, when :code:`randc` became
+   fully supported.
+
+   Warned that the :code:`randc` keyword was unsupported and was converted
    to :code:`rand`.
 
 
diff --git a/include/verilated_types.h b/include/verilated_types.h
index bce36f258..00ffbedb1 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -74,8 +74,18 @@ extern std::string VL_TO_STRING_W(int words, const WDataInP obj);
 #define VL_OUTW(name, msb, lsb, words) VlWide<words> name  ///< Declare output signal, 65+ bits
 
 //===================================================================
-// VlProcess stores metadata of running processes
+// Functions needed here
 
+constexpr IData VL_CLOG2_CE_Q(QData lhs) VL_PURE {
+    if (VL_UNLIKELY(!lhs)) return 0;
+    --lhs;
+    int shifts = 0;
+    for (; lhs != 0; ++shifts) lhs = lhs >> 1ULL;
+    return shifts;
+}
+
+//===================================================================
+// VlProcess stores metadata of running processes
 class VlProcess final {
     // MEMBERS
     int m_state;  // Current state of the process
@@ -210,6 +220,58 @@ public:
     size_t operator()() { return VL_MASK_I(31) & vl_rand64(); }
 };
 
+template <class T_Value, std::size_t T_numValues>
+class VlRandC final {
+    T_Value m_remaining = 0;  // Number of values to pull before re-randomize
+    T_Value m_lfsr = 1;  // LFSR state
+    // Polynomials are first listed at https://users.ece.cmu.edu/~koopman/lfsr/
+    static constexpr uint64_t s_polynomials[] = {
+        0x0ULL,  // 0 never used (constant, no randomization)
+        0x0ULL,  // 1
+        0x3ULL,        0x5ULL,       0x9ULL,        0x12ULL,       0x21ULL,
+        0x41ULL,       0x8eULL,      0x108ULL,      0x204ULL,      0x402ULL,
+        0x829ULL,      0x100dULL,    0x2015ULL,     0x4001ULL,
+        0x8016ULL,  // 16
+        0x10004ULL,    0x20040ULL,   0x40013ULL,    0x80004ULL,    0x100002ULL,
+        0x200001ULL,   0x400010ULL,  0x80000dULL,   0x1000004ULL,  0x2000023ULL,
+        0x4000013ULL,  0x8000004ULL, 0x10000002ULL, 0x20000029ULL, 0x40000004ULL,
+        0x80000057ULL,  // 32
+        0x100000029ULL  // 33
+    };
+
+public:
+    // CONSTRUCTORS
+    VlRandC() {
+        static_assert(T_numValues >= 1, "");
+        static_assert(sizeof(T_Value) == 8 || (T_numValues < (1ULL << (8 * sizeof(T_Value)))), "");
+    }
+    // METHODS
+    T_Value randomize(VlRNG& rngr) {
+        if (VL_UNLIKELY(!m_remaining)) reseed(rngr);
+        constexpr uint32_t clogWidth = VL_CLOG2_CE_Q(T_numValues) + 1;
+        constexpr uint32_t lfsrWidth = (clogWidth < 2) ? 2 : clogWidth;
+        constexpr T_Value polynomial = static_cast<T_Value>(s_polynomials[lfsrWidth]);
+        // printf("  numV=%ld w=%d poly=%x\n", T_numValues, lfsrWidth, polynomial);
+        //  Loop until get reasonable value. Because we picked a LFSR of at most one
+        //  extra bit in width, this will only require at most on average 1.5 loops
+        do {
+            m_lfsr = (m_lfsr & 1ULL) ? ((m_lfsr >> 1ULL) ^ polynomial) : (m_lfsr >> 1ULL);
+        } while (m_lfsr > T_numValues);  // Note if == then output value 0
+        --m_remaining;
+        T_Value result = (m_lfsr == T_numValues) ? 0 : m_lfsr;
+        // printf("    result=%x  (numv=%ld, rem=%d)\n", result, T_numValues, m_remaining);
+        return result;
+    }
+    void reseed(VlRNG& rngr) {
+        constexpr uint32_t lfsrWidth = VL_CLOG2_CE_Q(T_numValues) + 1;
+        m_remaining = T_numValues;
+        do {
+            m_lfsr = rngr.rand64() & VL_MASK_Q(lfsrWidth);
+            // printf("    lfsr.reseed=%x\n", m_lfsr);
+        } while (!m_lfsr);  // 0 not a legal seed
+    }
+};
+
 // These require the class object to have the thread safety lock
 inline IData VL_RANDOM_RNG_I(VlRNG& rngr) VL_MT_UNSAFE { return rngr.rand64(); }
 inline QData VL_RANDOM_RNG_Q(VlRNG& rngr) VL_MT_UNSAFE { return rngr.rand64(); }
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 180d14cca..b8ee2c72e 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -494,6 +494,41 @@ public:
     int widthTotalBytes() const override { V3ERROR_NA_RETURN(0); }
     bool isCompound() const override { return true; }
 };
+class AstCDType final : public AstNodeDType {
+    // Raw "C" data type passed directly to output
+    string m_name;  // Name of data type, printed when do V3EmitC
+public:
+    AstCDType(FileLine* fl, const string& name)
+        : ASTGEN_SUPER_CDType(fl)
+        , m_name{name} {
+        this->dtypep(this);
+    }
+
+public:
+    ASTGEN_MEMBERS_AstCDType;
+    bool same(const AstNode* samep) const override {
+        const AstCDType* const asamep = static_cast<const AstCDType*>(samep);
+        return m_name == asamep->m_name;
+    }
+    bool similarDType(const AstNodeDType* samep) const override { return same(samep); }
+    string name() const override VL_MT_STABLE { return m_name; }
+    string prettyDTypeName() const override { return m_name; }
+    const char* broken() const override { return nullptr; }
+    // METHODS
+    AstBasicDType* basicp() const override VL_MT_STABLE { return nullptr; }
+    AstNodeDType* skipRefp() const override VL_MT_STABLE { return (AstNodeDType*)this; }
+    AstNodeDType* skipRefToConstp() const override { return (AstNodeDType*)this; }
+    AstNodeDType* skipRefToEnump() const override { return (AstNodeDType*)this; }
+    int widthAlignBytes() const override { return 8; }  // Assume
+    int widthTotalBytes() const override { return 8; }  // Assume
+    bool isCompound() const override { return true; }
+    static string typeToHold(uint64_t maxItem) {
+        return (maxItem < (1ULL << 8))    ? "CData"
+               : (maxItem < (1ULL << 16)) ? "SData"
+               : (maxItem < (1ULL << 32)) ? "IData"
+                                          : "QData";
+    }
+};
 class AstClassRefDType final : public AstNodeDType {
     // Reference to a class
     // @astgen op1 := paramsp: List[AstPin]
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 23e1b0891..8d4622164 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1684,6 +1684,7 @@ class AstVar final : public AstNode {
     bool m_attrSplitVar : 1;  // declared with split_var metacomment
     bool m_fileDescr : 1;  // File descriptor
     bool m_isRand : 1;  // Random variable
+    bool m_isRandC : 1;  // Random cyclic variable (isRand also set)
     bool m_isConst : 1;  // Table contains constant data
     bool m_isContinuously : 1;  // Ever assigned continuously (for force/release)
     bool m_hasStrengthAssignment : 1;  // Is on LHS of assignment with strength specifier
@@ -1691,6 +1692,7 @@ class AstVar final : public AstNode {
     bool m_isPulldown : 1;  // Tri0
     bool m_isPullup : 1;  // Tri1
     bool m_isIfaceParent : 1;  // dtype is reference to interface present in this module
+    bool m_isInternal : 1;  // Internal state, don't add to method pinter
     bool m_isDpiOpenArray : 1;  // DPI import open array
     bool m_isHideLocal : 1;  // Verilog local
     bool m_isHideProtected : 1;  // Verilog protected
@@ -1728,6 +1730,7 @@ class AstVar final : public AstNode {
         m_attrSplitVar = false;
         m_fileDescr = false;
         m_isRand = false;
+        m_isRandC = false;
         m_isConst = false;
         m_isContinuously = false;
         m_hasStrengthAssignment = false;
@@ -1735,6 +1738,7 @@ class AstVar final : public AstNode {
         m_isPulldown = false;
         m_isPullup = false;
         m_isIfaceParent = false;
+        m_isInternal = false;
         m_isDpiOpenArray = false;
         m_isHideLocal = false;
         m_isHideProtected = false;
@@ -1880,10 +1884,15 @@ public:
     void scSensitive(bool flag) { m_scSensitive = flag; }
     void primaryIO(bool flag) { m_primaryIO = flag; }
     void isRand(bool flag) { m_isRand = flag; }
+    void isRandC(bool flag) {
+        m_isRandC = flag;
+        if (flag) isRand(true);
+    }
     void isConst(bool flag) { m_isConst = flag; }
     void isContinuously(bool flag) { m_isContinuously = flag; }
     void isStatic(bool flag) { m_isStatic = flag; }
     void isIfaceParent(bool flag) { m_isIfaceParent = flag; }
+    void isInternal(bool flag) { m_isInternal = flag; }
     void funcLocal(bool flag) {
         m_funcLocal = flag;
         if (flag) m_funcLocalSticky = true;
@@ -1929,6 +1938,7 @@ public:
     bool isPrimaryInish() const { return isPrimaryIO() && isNonOutput(); }
     bool isIfaceRef() const { return (varType() == VVarType::IFACEREF); }
     bool isIfaceParent() const { return m_isIfaceParent; }
+    bool isInternal() const { return m_isInternal; }
     bool isSignal() const { return varType().isSignal(); }
     bool isNet() const { return varType().isNet(); }
     bool isTemp() const { return varType().isTemp(); }
@@ -1964,6 +1974,7 @@ public:
     bool isSigUserRWPublic() const { return m_sigUserRWPublic; }
     bool isTrace() const { return m_trace; }
     bool isRand() const { return m_isRand; }
+    bool isRandC() const { return m_isRandC; }
     bool isConst() const VL_MT_SAFE { return m_isConst; }
     bool isStatic() const VL_MT_SAFE { return m_isStatic; }
     bool isLatched() const { return m_isLatched; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 29fbf3902..d28692165 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -799,6 +799,8 @@ AstNodeDType::CTypeRecursed AstNodeDType::cTypeRecurse(bool compound) const {
         const CTypeRecursed key = adtypep->keyDTypep()->cTypeRecurse(true);
         const CTypeRecursed val = adtypep->subDTypep()->cTypeRecurse(true);
         info.m_type = "VlAssocArray<" + key.m_type + ", " + val.m_type + ">";
+    } else if (const auto* const adtypep = VN_CAST(dtypep, CDType)) {
+        info.m_type = adtypep->name();
     } else if (const auto* const adtypep = VN_CAST(dtypep, WildcardArrayDType)) {
         const CTypeRecursed sub = adtypep->subDTypep()->cTypeRecurse(true);
         info.m_type = "VlAssocArray<std::string, " + sub.m_type + ">";
@@ -2187,8 +2189,14 @@ void AstVar::dump(std::ostream& str) const {
     if (isPulldown()) str << " [PULLDOWN]";
     if (isUsedClock()) str << " [CLK]";
     if (isSigPublic()) str << " [P]";
+    if (isInternal()) str << " [INTERNAL]";
     if (isLatched()) str << " [LATCHED]";
     if (isUsedLoopIdx()) str << " [LOOP]";
+    if (isRandC()) {
+        str << " [RANDC]";
+    } else if (isRand()) {
+        str << " [RAND]";
+    }
     if (noReset()) str << " [!RST]";
     if (attrIsolateAssign()) str << " [aISO]";
     if (attrFileDescr()) str << " [aFD]";
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index 4dc587a10..e4cddae9d 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -116,7 +116,7 @@ static void makeToStringMiddle(AstClass* nodep) {
     std::string comma;
     for (AstNode* itemp = nodep->membersp(); itemp; itemp = itemp->nextp()) {
         if (const auto* const varp = VN_CAST(itemp, Var)) {
-            if (!varp->isParam()) {
+            if (!varp->isParam() && !varp->isInternal()) {
                 string stmt = "out += \"";
                 stmt += comma;
                 comma = ", ";
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 644aa9b78..0264059a3 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -667,6 +667,8 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, const string& varNameP
         const string cvtarray = (adtypep->subDTypep()->isWide() ? ".data()" : "");
         return emitVarResetRecurse(varp, varNameProtected, adtypep->subDTypep(), depth + 1,
                                    suffix + ".atDefault()" + cvtarray);
+    } else if (VN_IS(dtypep, CDType)) {
+        return "";  // Constructor does it
     } else if (VN_IS(dtypep, ClassRefDType)) {
         return "";  // Constructor does it
     } else if (VN_IS(dtypep, IfaceRefDType)) {
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index 9169d06bd..f0a4d2bfa 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -147,6 +147,11 @@ private:
             m_hash += nodep->nrange().right();
         });
     }
+    void visit(AstCDType* nodep) override {
+        m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [=]() {  //
+            m_hash += nodep->name();
+        });
+    }
     void visit(AstConstDType* nodep) override {
         m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [=]() {  //
             iterateConstNull(nodep->virtRefDTypep());
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index bba341102..9017c0ae6 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -83,11 +83,8 @@ struct VMemberQualifiers {
     }
     void applyToNodes(AstVar* nodesp) const {
         for (AstVar* nodep = nodesp; nodep; nodep = VN_AS(nodep->nextp(), Var)) {
-            if (m_randc) {
-                nodep->v3warn(RANDC, "Unsupported: Converting 'randc' to 'rand'");
-                nodep->isRand(true);
-            }
             if (m_rand) nodep->isRand(true);
+            if (m_randc) nodep->isRandC(true);
             if (m_local) nodep->isHideLocal(true);
             if (m_protected) nodep->isHideProtected(true);
             if (m_automatic) nodep->lifetime(VLifetime::AUTOMATIC);
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 95c4ce2e9..983ecf98a 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -144,6 +144,7 @@ private:
     const AstNodeFTask* m_ftaskp = nullptr;  // Current function/task
     size_t m_enumValueTabCount = 0;  // Number of tables with enum values created
     int m_randCaseNum = 0;  // Randcase number within a module for var naming
+    std::map<std::string, AstCDType*> m_randcDtypes;  // RandC data type deduplication
 
     // METHODS
     AstVar* enumValueTabp(AstEnumDType* nodep) {
@@ -172,8 +173,49 @@ private:
         nodep->user2p(varp);
         return varp;
     }
-    AstNodeStmt* newRandStmtsp(FileLine* fl, AstNodeVarRef* varrefp, int offset = 0,
-                               AstMemberDType* memberp = nullptr) {
+
+    AstCDType* findVlRandCDType(FileLine* fl, uint64_t items) {
+        // For 8 items we need to have a 9 item LFSR so items is max count
+        const std::string type = AstCDType::typeToHold(items);
+        const std::string name = "VlRandC<" + type + ", " + cvtToStr(items) + "ULL>";
+        // Create or reuse (to avoid duplicates) randomization object dtype
+        auto it = m_randcDtypes.find(name);
+        if (it != m_randcDtypes.end()) return it->second;
+        AstCDType* newp = new AstCDType{fl, name};
+        v3Global.rootp()->typeTablep()->addTypesp(newp);
+        m_randcDtypes.emplace(std::make_pair(name, newp));
+        return newp;
+    }
+
+    AstVar* newRandcVarsp(AstVar* varp) {
+        // If a randc, make a VlRandC object to hold the state
+        if (!varp->isRandC()) return nullptr;
+        uint64_t items = 0;
+
+        if (AstEnumDType* const enumDtp = VN_CAST(varp->dtypep()->skipRefToEnump(), EnumDType)) {
+            items = static_cast<uint64_t>(enumDtp->itemCount());
+        } else {
+            AstBasicDType* const basicp = varp->dtypep()->skipRefp()->basicp();
+            UASSERT_OBJ(basicp, varp, "Unexpected randc variable dtype");
+            if (basicp->width() > 32) {
+                varp->v3error("Maxiumum implemented width for randc is 32 bits, "
+                              << varp->prettyNameQ() << " is " << basicp->width() << " bits");
+                varp->isRandC(false);
+                varp->isRand(true);
+                return nullptr;
+            }
+            items = 1ULL << basicp->width();
+        }
+        AstCDType* newdtp = findVlRandCDType(varp->fileline(), items);
+        AstVar* newp
+            = new AstVar{varp->fileline(), VVarType::MEMBER, varp->name() + "__Vrandc", newdtp};
+        newp->isInternal(true);
+        varp->addNextHere(newp);
+        UINFO(9, "created " << varp << endl);
+        return newp;
+    }
+    AstNodeStmt* newRandStmtsp(FileLine* fl, AstNodeVarRef* varrefp, AstVar* randcVarp,
+                               int offset = 0, AstMemberDType* memberp = nullptr) {
         if (const auto* const structDtp
             = VN_CAST(memberp ? memberp->subDTypep()->skipRefp() : varrefp->dtypep()->skipRefp(),
                       StructDType)) {
@@ -182,7 +224,7 @@ private:
             for (AstMemberDType* smemberp = structDtp->membersp(); smemberp;
                  smemberp = VN_AS(smemberp->nextp(), MemberDType)) {
                 AstNodeStmt* const randp = newRandStmtsp(
-                    fl, stmtsp ? varrefp->cloneTree(false) : varrefp, offset, smemberp);
+                    fl, stmtsp ? varrefp->cloneTree(false) : varrefp, nullptr, offset, smemberp);
                 if (stmtsp) {
                     stmtsp->addNext(randp);
                 } else {
@@ -198,15 +240,15 @@ private:
                 AstVarRef* const tabRefp
                     = new AstVarRef{fl, enumValueTabp(enumDtp), VAccess::READ};
                 tabRefp->classOrPackagep(v3Global.rootp()->dollarUnitPkgAddp());
-                AstRandRNG* const randp
-                    = new AstRandRNG{fl, varrefp->findBasicDType(VBasicDTypeKwd::UINT32)};
+                AstNodeExpr* const randp
+                    = newRandValue(fl, randcVarp, varrefp->findBasicDType(VBasicDTypeKwd::UINT32));
                 AstNodeExpr* const moddivp = new AstModDiv{
                     fl, randp, new AstConst{fl, static_cast<uint32_t>(enumDtp->itemCount())}};
                 moddivp->dtypep(enumDtp);
                 valp = new AstArraySel{fl, tabRefp, moddivp};
             } else {
-                valp = new AstRandRNG{fl,
-                                      (memberp ? memberp->dtypep() : varrefp->varp()->dtypep())};
+                valp = newRandValue(fl, randcVarp,
+                                    (memberp ? memberp->dtypep() : varrefp->varp()->dtypep()));
             }
             return new AstAssign{fl,
                                  new AstSel{fl, varrefp, offset + (memberp ? memberp->lsb() : 0),
@@ -214,6 +256,17 @@ private:
                                  valp};
         }
     }
+    AstNodeExpr* newRandValue(FileLine* fl, AstVar* randcVarp, AstNodeDType* dtypep) {
+        if (randcVarp) {
+            AstNode* argsp = new AstVarRef{fl, randcVarp, VAccess::READWRITE};
+            argsp->addNext(new AstText{fl, ".randomize(__Vm_rng)"});
+            AstCExpr* newp = new AstCExpr{fl, argsp};
+            newp->dtypep(dtypep);
+            return newp;
+        } else {
+            return new AstRandRNG{fl, dtypep};
+        }
+    }
     void addPrePostCall(AstClass* classp, AstFunc* funcp, const string& name) {
         if (AstTask* userFuncp = VN_CAST(m_memberMap.findMember(classp, name), Task)) {
             AstTaskRef* const callp
@@ -271,8 +324,9 @@ private:
             if (!memberVarp || !memberVarp->isRand()) continue;
             const AstNodeDType* const dtypep = memberp->dtypep()->skipRefp();
             if (VN_IS(dtypep, BasicDType) || VN_IS(dtypep, StructDType)) {
+                AstVar* const randcVarp = newRandcVarsp(memberVarp);
                 AstVarRef* const refp = new AstVarRef{fl, memberVarp, VAccess::WRITE};
-                AstNodeStmt* const stmtp = newRandStmtsp(fl, refp);
+                AstNodeStmt* const stmtp = newRandStmtsp(fl, refp, randcVarp);
                 funcp->addStmtsp(stmtp);
             } else if (const auto* const classRefp = VN_CAST(dtypep, ClassRefDType)) {
                 if (classRefp->classp() == nodep) {
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 66a6c78c4..5a5c6d969 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -452,6 +452,18 @@ private:
             }
             if (debug() >= 9) nodep->dumpTree("-  arraysel_old: ");
 
+            // If value MODDIV constant, where constant <= declElements, known ok
+            // V3Random makes these to intentionally prevent exceeding enum array bounds.
+            if (const AstModDiv* const moddivp = VN_CAST(nodep->bitp(), ModDiv)) {
+                if (const AstConst* const modconstp = VN_CAST(moddivp->rhsp(), Const)) {
+                    if (modconstp->width() <= 32
+                        && modconstp->toUInt() <= static_cast<uint32_t>(declElements)) {
+                        UINFO(9, "arraysel mod const " << declElements
+                                                       << " >= " << modconstp->toUInt() << endl);
+                        return;
+                    }
+                }
+            }
             // See if the condition is constant true
             AstNodeExpr* condp
                 = new AstGte{nodep->fileline(),
diff --git a/test_regress/t/t_randc.out b/test_regress/t/t_randc.out
deleted file mode 100644
index f83777149..000000000
--- a/test_regress/t/t_randc.out
+++ /dev/null
@@ -1,12 +0,0 @@
-%Warning-RANDC: t/t_randc.v:8:26: Unsupported: Converting 'randc' to 'rand'
-    8 |    randc bit [WIDTH-1:0] m_var;
-      |                          ^~~~~
-                ... For warning description see https://verilator.org/warn/RANDC?v=latest
-                ... Use "/* verilator lint_off RANDC */" and lint_on around source to disable this message.
-%Warning-RANDC: t/t_randc.v:46:26: Unsupported: Converting 'randc' to 'rand'
-   46 |    randc bit [WIDTH-1:0] m_var;
-      |                          ^~~~~
-%Warning-RANDC: t/t_randc.v:76:17: Unsupported: Converting 'randc' to 'rand'
-   76 |    randc enum_t m_var;
-      |                 ^~~~~
-%Error: Exiting due to
diff --git a/test_regress/t/t_randc.pl b/test_regress/t/t_randc.pl
index 66fa61649..aabcde63e 100755
--- a/test_regress/t/t_randc.pl
+++ b/test_regress/t/t_randc.pl
@@ -8,11 +8,13 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-scenarios(linter => 1);
+scenarios(simulator => 1);
 
-lint(
-    fails => $Self->{vlt_all},
-    expect_filename => $Self->{golden_filename},
+compile(
+    );
+
+execute(
+    check_finished => 1,
     );
 
 ok(1);
diff --git a/test_regress/t/t_randc_ignore_unsup.pl b/test_regress/t/t_randc_ignore_unsup.pl
deleted file mode 100755
index af711b6c9..000000000
--- a/test_regress/t/t_randc_ignore_unsup.pl
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/usr/bin/env perl
-if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2020 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-scenarios(vlt => 1);
-
-top_filename("t/t_randc.v");
-
-compile(
-    verilator_flags2 => ['-Wno-RANDC -DTEST_IGNORE_RANDC'],
-    );
-
-execute(
-    check_finished => 1,
-    );
-
-ok(1);
-1;
diff --git a/test_regress/t/t_randc_oversize_bad.out b/test_regress/t/t_randc_oversize_bad.out
index 293258c1f..61f0030e3 100644
--- a/test_regress/t/t_randc_oversize_bad.out
+++ b/test_regress/t/t_randc_oversize_bad.out
@@ -1,6 +1,5 @@
-%Warning-RANDC: t/t_randc_oversize_bad.v:8:21: Unsupported: Converting 'randc' to 'rand'
-    8 |    randc bit [33:0] i;
+%Error: t/t_randc_oversize_bad.v:8:21: Maxiumum implemented width for randc is 32 bits, 'i' is 38 bits
+                                     : ... In instance t
+    8 |    randc bit [37:0] i;
       |                     ^
-                ... For warning description see https://verilator.org/warn/RANDC?v=latest
-                ... Use "/* verilator lint_off RANDC */" and lint_on around source to disable this message.
 %Error: Exiting due to
diff --git a/test_regress/t/t_randc_oversize_bad.v b/test_regress/t/t_randc_oversize_bad.v
index 852f4743c..c687f61df 100644
--- a/test_regress/t/t_randc_oversize_bad.v
+++ b/test_regress/t/t_randc_oversize_bad.v
@@ -5,8 +5,13 @@
 // SPDX-License-Identifier: CC0-1.0
 
 class Cls;
-   randc bit [33:0] i;
+   randc bit [37:0] i;
 endclass
 
 module t (/*AUTOARG*/);
+   Cls c;
+   initial begin
+      c = new;
+      c.randomize;
+   end
 endmodule
diff --git a/test_regress/t/t_uvm_todo.pl b/test_regress/t/t_uvm_todo.pl
index b71e06d09..9fb3de36f 100755
--- a/test_regress/t/t_uvm_todo.pl
+++ b/test_regress/t/t_uvm_todo.pl
@@ -15,7 +15,6 @@ compile(
                  "-Wno-PKGNODECL -Wno-IMPLICITSTATIC -Wno-CONSTRAINTIGN -Wno-MISINDENT",
                  "-Wno-CASEINCOMPLETE -Wno-CASTCONST -Wno-SYMRSVDWORD -Wno-WIDTHEXPAND -Wno-WIDTHTRUNC",
                  "-Wno-REALCVT", # TODO note mostly related to $realtime - could suppress or fix upstream
-                 "-Wno-RANDC", # TODO issue #4349, add support
                  "-Wno-ZERODLY", # TODO issue #4494, add support
                  ],
     verilator_make_gmake => 0,

From 470f480bc1cad7d8f9066b2fa783cba7ccbaaec6 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 19 Sep 2023 07:23:35 -0400
Subject: [PATCH 010/157] Fix -m32 compile issue

---
 include/verilated_types.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 00ffbedb1..4fac347f1 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -220,7 +220,7 @@ public:
     size_t operator()() { return VL_MASK_I(31) & vl_rand64(); }
 };
 
-template <class T_Value, std::size_t T_numValues>
+template <class T_Value, uint64_t T_numValues>
 class VlRandC final {
     T_Value m_remaining = 0;  // Number of values to pull before re-randomize
     T_Value m_lfsr = 1;  // LFSR state

From b9ea249f8135e80d3eaf610232039c4c7785831f Mon Sep 17 00:00:00 2001
From: Michal Czyz <120088471+mczyz-antmicro@users.noreply.github.com>
Date: Tue, 19 Sep 2023 15:08:17 +0200
Subject: [PATCH 011/157] Rewrite usage of annotation options (#4486) (#4504)

---
 docs/CONTRIBUTORS                     |  1 +
 docs/guide/exe_verilator_coverage.rst | 49 +++++++++++++++++++++------
 2 files changed, 40 insertions(+), 10 deletions(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index f066d9bef..b80f0bfc3 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -114,6 +114,7 @@ Martin Stadler
 Matthew Ballance
 Michael Killough
 Michaël Lefebvre
+Michal Czyz
 Mike Popoloski
 Miodrag Milanović
 Mladen Slijepcevic
diff --git a/docs/guide/exe_verilator_coverage.rst b/docs/guide/exe_verilator_coverage.rst
index 2c78cf7de..a9ae9a044 100644
--- a/docs/guide/exe_verilator_coverage.rst
+++ b/docs/guide/exe_verilator_coverage.rst
@@ -64,30 +64,59 @@ if there are multiple coverage points on a single line they will merge.
 The minimum coverage across all merged points will be used to report
 coverage of the line.
 
-The first character of the line shows a summary of the coverage; this
-allows use of grep to filter the report.  `%` indicates at least one point
-on the line was below the coverage limit.  `+` indicates an
-:option:`--annotate-points` point was at or above the limit, and `-` that
-the point was below the limit.
+Coverage data is annotated at the beginning of the line and is formatted
+as a special character followed by the number of coverage hits. The special
+characters " ,%,+,-" indicate summary of the coverage, and allow use of grep
+to filter the report.
+
+* " " (whitespace) indicates that all points on the line are above the coverage limit.
+* "%" indicates at least one point on the line was below the coverage limit.
+* "+" coverage point was at or above the limit. Only used with :option:`--annotate-points`.
+* "-" coverage point was below the limit.  Only used with :option:`--annotate-points`.
+
+.. code-block::
+
+   100000  input logic a;   // Begins with whitespace, because
+                            // number of hits (100000) is above the limit.
+  +100000  point: comment=a // Begins with +, because
+                            // number of hits (100000) is above the limit.
+  %000000  input logic b;   // Begins with %, because
+                            // number of hits (0) is below the limit.
+  -000000  point: comment=b // Begins with -, because
+                            // number of hits (0) is below the limit.
 
 .. option:: --annotate-all
 
 Specifies all files should be shown.  By default, only those source files
 with low coverage are written to the output directory.
 
+This option should be used together with :option:`--annotate`.
+
 .. option:: --annotate-min <count>
 
-Specifies if the coverage point does not include the count number of
-coverage hits, then the coverage point will be considered above the
-threshold, and the coverage report will put a "%" to indicate the coverage
-is insufficient.  Defaults to 10.
+Specifies the threshold (<count>) below which coverage point is considered
+sufficient. If the threshold is not exceeded, then the annotation will begin
+with a "%" symbol to indicate the coverage is insufficient.
+
+The <count> threshold defaults to 10.
+
+This option should be used together with :option:`--annotate`.
+
 
 .. option:: --annotate-points
 
 Specifies all coverage points should be shown after each line of text.  By
 default, only source lines are shown.
 
-with low coverage are written to the output directory.
+.. code-block::
+
+  100000  input logic a, b, c;
+ +100000 point: comment=a // These lines are only shown
+ +200000 point: comment=b // with option --annotate-points
+ +300000 point: comment=c // enabled.
+
+
+This option should be used together with :option:`--annotate`.
 
 .. option:: --help
 

From a16ea94836f44a5db877a9069f3d663bdfa4be72 Mon Sep 17 00:00:00 2001
From: Kamil Rakoczy <krakoczy@antmicro.com>
Date: Tue, 19 Sep 2023 23:32:42 +0200
Subject: [PATCH 012/157] Fix detecting local vars in nested forks (#4493)
 (#4506)

---
 src/V3Fork.cpp                    | 10 ++++++----
 test_regress/t/t_fork_none_var.pl |  8 +++-----
 test_regress/t/t_fork_none_var.v  |  2 +-
 test_regress/t/t_uvm_pkg_todo.vh  |  4 +---
 4 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 0cfc7dd00..db64eda77 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -516,9 +516,11 @@ private:
         VL_RESTORER(m_capturedVarsp);
         VL_RESTORER(m_capturedVarRefsp);
         VL_RESTORER(m_newProcess);
+        VL_RESTORER(m_forkLocalsp);
         m_capturedVarsp = nullptr;
         m_capturedVarRefsp = nullptr;
         m_newProcess = false;
+        m_forkLocalsp.clear();
 
         iterateChildren(nodep);
 
@@ -566,7 +568,6 @@ private:
         if (!nodep->joinType().join()) {
             ++m_forkDepth;
             m_newProcess = true;
-            m_forkLocalsp.clear();
             // Nested forks get moved into separate tasks
             if (nested) {
                 visitTaskifiable(nodep);
@@ -604,9 +605,10 @@ private:
             UASSERT_OBJ(
                 !nodep->varp()->lifetime().isNone(), nodep,
                 "Variable's lifetime is unknown. Can't determine if a capture is necessary.");
-
-            AstVar* const varp = captureRef(nodep);
-            nodep->varp(varp);
+            if (m_forkLocalsp.count(nodep->varp()) == 0) {
+                AstVar* const varp = captureRef(nodep);
+                nodep->varp(varp);
+            }
         }
     }
     void visit(AstAssign* nodep) override {
diff --git a/test_regress/t/t_fork_none_var.pl b/test_regress/t/t_fork_none_var.pl
index 3407291f9..b8493bd06 100755
--- a/test_regress/t/t_fork_none_var.pl
+++ b/test_regress/t/t_fork_none_var.pl
@@ -13,13 +13,11 @@ scenarios(simulator => 1);
 compile(
     verilator_flags2 => ["--exe --main --timing"],
     make_main => 0,
-    fails => $Self->{vlt_all},  # issue #4493
     );
 
-# issue #4493
-#execute(
-#    check_finished => 1,
-#    );
+execute(
+    check_finished => 1,
+    );
 
 ok(1);
 1;
diff --git a/test_regress/t/t_fork_none_var.v b/test_regress/t/t_fork_none_var.v
index 3b568b085..1dc892b53 100644
--- a/test_regress/t/t_fork_none_var.v
+++ b/test_regress/t/t_fork_none_var.v
@@ -22,7 +22,7 @@ module t(/*AUTOARG*/);
                            fork
                               automatic int k = i;
                               begin
-                                 // issue #4493
+                                 // see issue #4493
                                  $display("[%0t] start %0d", $time, k);
                                  // UVM's arb_sequence_q[is_relevant_entries[k]].wait_for_relevant();
                                  m_mask[k] = 1;
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index 35f108a3d..d80314618 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -19192,9 +19192,7 @@ task uvm_sequencer_base::m_wait_for_available_sequence();
                 fork
                     automatic int k = i;
                   begin
-//TODO issue #4493 - Fix UVM fork..join_none local variable can't locate varref scope
-//TODO %Error: Internal Error: t/t_uvm_pkg_todo.vh:19203:56: ../V3Scope.cpp:80: Can't locate varref scope
-//TODO                    arb_sequence_q[is_relevant_entries[k]].sequence_ptr.wait_for_relevant();
+                    arb_sequence_q[is_relevant_entries[k]].sequence_ptr.wait_for_relevant();
                     if ($realtime != m_last_wait_relevant_time) begin
                        m_last_wait_relevant_time = $realtime ;
                        m_wait_relevant_count = 0 ;

From 4b2bf556d8579a64d5886477556b8ca499c12942 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 20 Sep 2023 07:32:21 -0400
Subject: [PATCH 013/157] Tests: Revert UVM upstream
 (chipsalliance/uvm-verilator#7)

---
 test_regress/t/t_uvm_pkg_all.vh  | 6 +++---
 test_regress/t/t_uvm_pkg_todo.vh | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/test_regress/t/t_uvm_pkg_all.vh b/test_regress/t/t_uvm_pkg_all.vh
index 9e4b85028..a2fd611b6 100644
--- a/test_regress/t/t_uvm_pkg_all.vh
+++ b/test_regress/t/t_uvm_pkg_all.vh
@@ -517,7 +517,7 @@ virtual class uvm_coreservice_t;
         pure virtual function uvm_resource_pool get_resource_pool();
         pure virtual function void set_resource_pool_default_precedence(int unsigned precedence);
         pure virtual function int unsigned get_resource_pool_default_precedence();
-        static uvm_coreservice_t inst;
+        local static uvm_coreservice_t inst;
         static function uvm_coreservice_t get();
                 if(inst==null)
                         uvm_init(null);
@@ -830,11 +830,11 @@ function void uvm_init(uvm_coreservice_t cs=null);
     end
     else begin
       uvm_coreservice_t actual;
-      actual = uvm_coreservice_t::inst;
+      actual = uvm_coreservice_t::get();
       if ((cs != actual) && (cs != null))
    begin
      if (uvm_report_enabled(UVM_NONE,UVM_WARNING,"UVM/INIT/MULTI"))
-       uvm_report_warning ("UVM/INIT/MULTI", "uvm_init() called after library has already completed initialization, subsequent calls are ignored!", UVM_NONE, "t/uvm/src/base/uvm_globals.svh", 349, "", 1);
+       uvm_report_warning ("UVM/INIT/MULTI", "uvm_init() called after library has already completed initialization, subsequent calls are ignored!", UVM_NONE, "t/uvm/src/base/uvm_globals.svh", 344, "", 1);
    end
     end
     return;
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index d80314618..f3f21fa0d 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -517,7 +517,7 @@ virtual class uvm_coreservice_t;
         pure virtual function uvm_resource_pool get_resource_pool();
         pure virtual function void set_resource_pool_default_precedence(int unsigned precedence);
         pure virtual function int unsigned get_resource_pool_default_precedence();
-        static uvm_coreservice_t inst;
+        local static uvm_coreservice_t inst;
         static function uvm_coreservice_t get();
                 if(inst==null)
                         uvm_init(null);
@@ -830,11 +830,11 @@ function void uvm_init(uvm_coreservice_t cs=null);
     end
     else begin
       uvm_coreservice_t actual;
-      actual = uvm_coreservice_t::inst;
+      actual = uvm_coreservice_t::get();
       if ((cs != actual) && (cs != null))
    begin
      if (uvm_report_enabled(UVM_NONE,UVM_WARNING,"UVM/INIT/MULTI"))
-       uvm_report_warning ("UVM/INIT/MULTI", "uvm_init() called after library has already completed initialization, subsequent calls are ignored!", UVM_NONE, "t/uvm/src/base/uvm_globals.svh", 349, "", 1);
+       uvm_report_warning ("UVM/INIT/MULTI", "uvm_init() called after library has already completed initialization, subsequent calls are ignored!", UVM_NONE, "t/uvm/src/base/uvm_globals.svh", 344, "", 1);
    end
     end
     return;

From 4636e9cffb709de7d953389b708854a6077f5149 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Wed, 20 Sep 2023 13:33:11 +0200
Subject: [PATCH 014/157] Fix passing arguments by reference (#3385 partial)
 (#4489)

---
 src/V3Ast.h                                   |  2 +-
 src/V3AstNodeOther.h                          |  1 +
 src/V3AstNodes.cpp                            |  5 +-
 src/V3LinkLevel.cpp                           |  2 +-
 src/V3Task.cpp                                | 36 +++++++++--
 test_regress/t/t_func_inout_bit_sel.pl        | 21 +++++++
 test_regress/t/t_func_inout_bit_sel.v         | 31 ++++++++++
 test_regress/t/t_func_ref_arg.pl              | 21 +++++++
 test_regress/t/t_func_ref_arg.v               | 60 +++++++++++++++++++
 test_regress/t/t_func_ref_bad.out             |  4 ++
 test_regress/t/t_func_ref_bad.pl              | 19 ++++++
 test_regress/t/t_func_ref_bad.v               | 22 +++++++
 test_regress/t/t_func_ref_unsup.out           |  8 +++
 test_regress/t/t_func_ref_unsup.pl            | 19 ++++++
 test_regress/t/t_func_ref_unsup.v             | 41 +++++++++++++
 .../t/t_queue_persistence_inl_unsup.out       |  5 ++
 ...ce.pl => t_queue_persistence_inl_unsup.pl} |  7 +--
 test_regress/t/t_queue_persistence_noinl.pl   |  3 +-
 18 files changed, 292 insertions(+), 15 deletions(-)
 create mode 100755 test_regress/t/t_func_inout_bit_sel.pl
 create mode 100644 test_regress/t/t_func_inout_bit_sel.v
 create mode 100755 test_regress/t/t_func_ref_arg.pl
 create mode 100644 test_regress/t/t_func_ref_arg.v
 create mode 100644 test_regress/t/t_func_ref_bad.out
 create mode 100755 test_regress/t/t_func_ref_bad.pl
 create mode 100644 test_regress/t/t_func_ref_bad.v
 create mode 100644 test_regress/t/t_func_ref_unsup.out
 create mode 100755 test_regress/t/t_func_ref_unsup.pl
 create mode 100644 test_regress/t/t_func_ref_unsup.v
 create mode 100644 test_regress/t/t_queue_persistence_inl_unsup.out
 rename test_regress/t/{t_queue_persistence.pl => t_queue_persistence_inl_unsup.pl} (84%)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 8c42e41ba..22e4fd846 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -706,7 +706,7 @@ public:
     bool isReadOnly() const VL_MT_SAFE { return m_e == INPUT || m_e == CONSTREF; }
     bool isWritable() const VL_MT_SAFE { return m_e == OUTPUT || m_e == INOUT || m_e == REF; }
     bool isRef() const VL_MT_SAFE { return m_e == REF; }
-    bool isRefOrConstRef() const VL_MT_SAFE { return m_e == REF || m_e == CONSTREF; }
+    bool isConstRef() const VL_MT_SAFE { return m_e == CONSTREF; }
 };
 constexpr bool operator==(const VDirection& lhs, const VDirection& rhs) {
     return lhs.m_e == rhs.m_e;
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 8d4622164..12b7ce9f2 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1931,6 +1931,7 @@ public:
     bool isInoutish() const { return m_direction.isInoutish(); }
     bool isNonOutput() const { return m_direction.isNonOutput(); }
     bool isReadOnly() const VL_MT_SAFE { return m_direction.isReadOnly(); }
+    bool isConstRef() const VL_MT_SAFE { return m_direction.isConstRef(); }
     bool isRef() const VL_MT_SAFE { return m_direction.isRef(); }
     bool isWritable() const VL_MT_SAFE { return m_direction.isWritable(); }
     bool isTristate() const { return m_tristate; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index d28692165..81dfdbaf4 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -475,7 +475,8 @@ string AstVar::vlArgType(bool named, bool forReturn, bool forFunc, const string&
     if (isStatic() && namespc.empty()) ostatic = "static ";
 
     const bool isRef = isDpiOpenArray()
-                       || (forFunc && (isWritable() || direction().isRefOrConstRef())) || asRef;
+                       || (forFunc && (isWritable() || this->isRef() || this->isConstRef()))
+                       || asRef;
 
     if (forFunc && isReadOnly() && isRef) ostatic = ostatic + "const ";
 
@@ -589,7 +590,7 @@ string AstVar::cPubArgType(bool named, bool forReturn) const {
     if (forReturn) named = false;
     string arg;
     if (isWide() && isReadOnly()) arg += "const ";
-    const bool isRef = !forReturn && (isWritable() || direction().isRefOrConstRef());
+    const bool isRef = !forReturn && (isWritable() || this->isRef() || this->isConstRef());
     if (VN_IS(dtypeSkipRefp(), BasicDType) && !dtypeSkipRefp()->isDouble()
         && !dtypeSkipRefp()->isString()) {
         // Backward compatible type declaration
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 1b0dc54cf..03ba5bf96 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -277,7 +277,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
                     varp->sigPublic(true);  // User needs to be able to get to it...
                     oldvarp->primaryIO(false);
                     varp->primaryIO(true);
-                    if (varp->direction().isRefOrConstRef()) {
+                    if (varp->isRef() || varp->isConstRef()) {
                         varp->v3warn(E_UNSUPPORTED,
                                      "Unsupported: ref/const ref as primary input/output: "
                                          << varp->prettyNameQ());
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 246748d59..7586795a0 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -479,10 +479,38 @@ private:
                 pinp->v3error("Function/task " + portp->direction().prettyName()  // e.g. "output"
                               + " connected to constant instead of variable: "
                               + portp->prettyNameQ());
-            }
-            // else if (portp->direction() == VDirection::REF) {
-            // TODO References need to instead pass a real reference var, see issue #3385
-            else if (portp->isInoutish()) {
+            } else if (portp->isRef() || portp->isConstRef()) {
+                bool refArgOk = false;
+                if (VN_IS(pinp, VarRef) || VN_IS(pinp, MemberSel) || VN_IS(pinp, StructSel)
+                    || VN_IS(pinp, ArraySel)) {
+                    refArgOk = true;
+                } else if (const AstCMethodHard* const cMethodp = VN_CAST(pinp, CMethodHard)) {
+                    refArgOk = cMethodp->name() == "at";
+                }
+                if (refArgOk) {
+                    if (AstVarRef* const varrefp = VN_CAST(pinp, VarRef)) {
+                        varrefp->access(VAccess::READWRITE);
+                    }
+                } else {
+                    pinp->v3error("Function/task ref argument is not of allowed type");
+                }
+                if (inlineTask) {
+                    if (AstVarRef* const varrefp = VN_CAST(pinp, VarRef)) {
+                        // Connect to this exact variable
+                        AstVarScope* const localVscp = varrefp->varScopep();
+                        UASSERT_OBJ(localVscp, varrefp, "Null var scope");
+                        portp->user2p(localVscp);
+                        pushDeletep(pinp);
+                    } else {
+                        pinp->v3warn(E_TASKNSVAR, "Unsupported: ref argument of inlined "
+                                                  "function/task is not a simple variable");
+                        // Providing a var to avoid an internal error.
+                        AstVarScope* const newvscp
+                            = createVarScope(portp, namePrefix + "__" + portp->shortName());
+                        portp->user2p(newvscp);
+                    }
+                }
+            } else if (portp->isInoutish()) {
                 // if (debug() >= 9) pinp->dumpTree("-pinrsize- ");
                 V3LinkLValue::linkLValueSet(pinp);
 
diff --git a/test_regress/t/t_func_inout_bit_sel.pl b/test_regress/t/t_func_inout_bit_sel.pl
new file mode 100755
index 000000000..beaa2ca59
--- /dev/null
+++ b/test_regress/t/t_func_inout_bit_sel.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_func_inout_bit_sel.v b/test_regress/t/t_func_inout_bit_sel.v
new file mode 100644
index 000000000..3af758d75
--- /dev/null
+++ b/test_regress/t/t_func_inout_bit_sel.v
@@ -0,0 +1,31 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class Cls;
+   function bit get_x_set_1(inout bit x);
+      bit a = x;
+      x = 1;
+      return a;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   int a;
+   bit b;
+   Cls cls;
+   initial begin
+      cls = new;
+      b = cls.get_x_set_1(a[1]);
+      `checkh(b, 0);
+      `checkh(a[1], 1);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_func_ref_arg.pl b/test_regress/t/t_func_ref_arg.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_func_ref_arg.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_func_ref_arg.v b/test_regress/t/t_func_ref_arg.v
new file mode 100644
index 000000000..b552a2b24
--- /dev/null
+++ b/test_regress/t/t_func_ref_arg.v
@@ -0,0 +1,60 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class MyInt;
+   int x;
+   function new(int a);
+      x = a;
+   endfunction
+endclass
+
+function int get_val_set_5(ref int x);
+   automatic int y = x;
+   x = 5;
+   return y;
+endfunction
+
+class Cls;
+   function int get_val_set_2(ref int x);
+      automatic int y = x;
+      x = 2;
+      return y;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   int a, b;
+   int arr[1];
+   Cls cls;
+   MyInt mi;
+   initial begin
+      a = 10;
+      b = get_val_set_5(a);
+      `checkh(a, 5);
+      `checkh(b, 10);
+
+      cls = new;
+      b = cls.get_val_set_2(a);
+      `checkh(a, 2);
+      `checkh(b, 5);
+
+      mi = new(1);
+      b = cls.get_val_set_2(mi.x);
+      `checkh(mi.x, 2);
+      `checkh(b, 1);
+
+      arr[0] = 10;
+      b = cls.get_val_set_2(arr[0]);
+      `checkh(arr[0], 2);
+      `checkh(b, 10);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_func_ref_bad.out b/test_regress/t/t_func_ref_bad.out
new file mode 100644
index 000000000..aa39be63e
--- /dev/null
+++ b/test_regress/t/t_func_ref_bad.out
@@ -0,0 +1,4 @@
+%Error: t/t_func_ref_bad.v:19:22: Function/task ref argument is not of allowed type
+   19 |       b = cls.get_x(a[1]);
+      |                      ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_func_ref_bad.pl b/test_regress/t/t_func_ref_bad.pl
new file mode 100755
index 000000000..23eda8f99
--- /dev/null
+++ b/test_regress/t/t_func_ref_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_func_ref_bad.v b/test_regress/t/t_func_ref_bad.v
new file mode 100644
index 000000000..22154bb05
--- /dev/null
+++ b/test_regress/t/t_func_ref_bad.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class Cls;
+   function logic get_x(ref logic x);
+      return x;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   logic [10:0] a;
+   logic b;
+   Cls cls;
+   initial begin
+      cls = new;
+      b = cls.get_x(a[1]);
+      $stop;
+   end
+endmodule
diff --git a/test_regress/t/t_func_ref_unsup.out b/test_regress/t/t_func_ref_unsup.out
new file mode 100644
index 000000000..1888aea08
--- /dev/null
+++ b/test_regress/t/t_func_ref_unsup.out
@@ -0,0 +1,8 @@
+%Error-TASKNSVAR: t/t_func_ref_unsup.v:29:28: Unsupported: ref argument of inlined function/task is not a simple variable
+   29 |       b = get_val_set_5(mi.x);
+      |                            ^
+                  ... For error description see https://verilator.org/warn/TASKNSVAR?v=latest
+%Error-TASKNSVAR: t/t_func_ref_unsup.v:34:28: Unsupported: ref argument of inlined function/task is not a simple variable
+   34 |       b = get_val_set_5(arr[0]);
+      |                            ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_func_ref_unsup.pl b/test_regress/t/t_func_ref_unsup.pl
new file mode 100755
index 000000000..23eda8f99
--- /dev/null
+++ b/test_regress/t/t_func_ref_unsup.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_func_ref_unsup.v b/test_regress/t/t_func_ref_unsup.v
new file mode 100644
index 000000000..6fa1e9d87
--- /dev/null
+++ b/test_regress/t/t_func_ref_unsup.v
@@ -0,0 +1,41 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class MyInt;
+   int x;
+   function new(int a);
+      x = a;
+   endfunction
+endclass
+
+function int get_val_set_5(ref int x);
+   automatic int y = x;
+   x = 5;
+   return y;
+endfunction
+
+module t (/*AUTOARG*/);
+   int b;
+   int arr[1];
+   MyInt mi;
+   initial begin
+      mi = new(1);
+      b = get_val_set_5(mi.x);
+      `checkh(mi.x, 5);
+      `checkh(b, 1);
+
+      arr[0] = 10;
+      b = get_val_set_5(arr[0]);
+      `checkh(arr[0], 5);
+      `checkh(b, 10);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_queue_persistence_inl_unsup.out b/test_regress/t/t_queue_persistence_inl_unsup.out
new file mode 100644
index 000000000..d9e34ab83
--- /dev/null
+++ b/test_regress/t/t_queue_persistence_inl_unsup.out
@@ -0,0 +1,5 @@
+%Error-TASKNSVAR: t/t_queue_persistence.v:30:13: Unsupported: ref argument of inlined function/task is not a simple variable
+   30 |       func(q[1]);
+      |             ^
+                  ... For error description see https://verilator.org/warn/TASKNSVAR?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_queue_persistence.pl b/test_regress/t/t_queue_persistence_inl_unsup.pl
similarity index 84%
rename from test_regress/t/t_queue_persistence.pl
rename to test_regress/t/t_queue_persistence_inl_unsup.pl
index c9515ce9b..8cf7fc5b6 100755
--- a/test_regress/t/t_queue_persistence.pl
+++ b/test_regress/t/t_queue_persistence_inl_unsup.pl
@@ -19,11 +19,8 @@ else {
     compile(
         timing_loop => 1,
         verilator_flags2 => ["--timing"],
-        );
-
-    execute(
-        fails => $Self->{vlt_all},  # bug3385 need to fix "ref"
-        check_finished => !$Self->{vlt_all},
+        fails => 1,   # bug3385 need to fix "ref"
+        expect_filename => $Self->{golden_filename},
         );
 }
 
diff --git a/test_regress/t/t_queue_persistence_noinl.pl b/test_regress/t/t_queue_persistence_noinl.pl
index afaa948eb..187562462 100755
--- a/test_regress/t/t_queue_persistence_noinl.pl
+++ b/test_regress/t/t_queue_persistence_noinl.pl
@@ -22,8 +22,7 @@ else {
         );
 
     execute(
-        fails => $Self->{vlt_all},  # bug3385 need to fix "ref"
-        check_finished => !$Self->{vlt_all},
+        check_finished => 1,
         );
 }
 

From 9f75068059c7c263d7fd1c53b8297056b7b3dc29 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 23 Sep 2023 08:52:50 -0400
Subject: [PATCH 015/157] Cleanup some error messages to properly quote

---
 src/V3Ast.cpp                                 |  8 +--
 src/V3FileLine.cpp                            |  4 +-
 src/V3LinkDot.cpp                             |  2 +-
 src/V3LinkParse.cpp                           |  2 +-
 src/V3PreLex.l                                |  2 +-
 src/V3Simulate.h                              |  4 +-
 src/verilog.l                                 |  6 +-
 src/verilog.y                                 |  4 +-
 test_regress/t/t_array_backw_index_bad.out    | 14 ++--
 test_regress/t/t_array_list_bad.out           |  4 +-
 test_regress/t/t_array_method_bad.out         |  2 +-
 test_regress/t/t_array_method_unsup.out       | 10 +--
 test_regress/t/t_array_pattern_bad.out        |  2 +-
 test_regress/t/t_array_pattern_bad2.out       |  2 +-
 test_regress/t/t_array_pattern_bad3.out       |  6 +-
 test_regress/t/t_assert_comp_bad.out          | 16 ++---
 test_regress/t/t_assert_disable_bad.out       |  2 +-
 test_regress/t/t_assert_procedural_clk.out    |  4 +-
 .../t/t_assert_recursive_property_unsup.out   |  2 +-
 test_regress/t/t_assoc_method_bad.out         | 28 ++++----
 test_regress/t/t_assoc_wildcard_bad.out       | 38 +++++-----
 test_regress/t/t_bigmem_bad.out               |  2 +-
 test_regress/t/t_bitsel_const_bad.out         |  2 +-
 test_regress/t/t_bitsel_wire_array_bad.out    |  2 +-
 test_regress/t/t_case_genx_bad.out            |  2 +-
 test_regress/t/t_cast_class_incompat_bad.out  |  4 +-
 test_regress/t/t_cast_size_bad.out            |  4 +-
 test_regress/t/t_castdyn_castconst_bad.out    |  6 +-
 test_regress/t/t_castdyn_unsup_bad.out        |  2 +-
 test_regress/t/t_class_assign_bad.out         | 18 ++---
 test_regress/t/t_class_assign_cond_bad.out    | 10 +--
 test_regress/t/t_class_builtin_bad.out        |  4 +-
 test_regress/t/t_class_copy_bad.out           |  2 +-
 .../t/t_class_extends_aliased_real_bad.out    |  2 +-
 .../t/t_class_extends_int_param_bad.out       |  2 +-
 test_regress/t/t_class_extern_bad.out         |  4 +-
 test_regress/t/t_class_local_bad.out          | 30 ++++----
 test_regress/t/t_class_member_bad.out         |  4 +-
 test_regress/t/t_class_method_bad.out         |  2 +-
 test_regress/t/t_class_new_bad.out            | 10 +--
 test_regress/t/t_class_param_bad2.out         |  2 +-
 test_regress/t/t_class_param_circ_bad.out     |  2 +-
 test_regress/t/t_class_param_enum_bad.out     |  4 +-
 test_regress/t/t_class_param_nconst_bad.out   |  4 +-
 test_regress/t/t_class_param_nested_bad.out   |  4 +-
 test_regress/t/t_class_param_noinit_bad.out   |  2 +-
 test_regress/t/t_class_virtual_bad.out        |  2 +-
 test_regress/t/t_clocking_bad1.out            |  2 +-
 test_regress/t/t_clocking_bad4.out            | 22 +++---
 test_regress/t/t_clocking_notiming.out        |  2 +-
 test_regress/t/t_clocking_unsup2.out          |  2 +-
 test_regress/t/t_concat_large_bad.out         |  2 +-
 test_regress/t/t_const_bad.out                |  6 +-
 test_regress/t/t_constraint_mode_warn_bad.out | 24 +++----
 test_regress/t/t_cover_unused_bad.out         |  2 +-
 test_regress/t/t_delay_stmtdly_bad.out        | 16 ++---
 test_regress/t/t_dfg_multidriver_dfg_bad.out  |  8 +--
 test_regress/t/t_dpi_2exparg_bad.out          |  4 +-
 test_regress/t/t_dpi_unpack_bad.out           | 14 ++--
 test_regress/t/t_dynarray_bad.out             |  2 +-
 test_regress/t/t_enum_bad_circdecl.out        |  2 +-
 test_regress/t/t_enum_bad_value.out           |  2 +-
 test_regress/t/t_enum_bad_wrap.out            |  2 +-
 test_regress/t/t_enum_huge_methods_bad.out    |  2 +-
 test_regress/t/t_enum_overlap_bad.out         |  2 +-
 test_regress/t/t_enum_type_bad.out            |  6 +-
 test_regress/t/t_enum_type_methods_bad.out    |  2 +-
 test_regress/t/t_enum_type_nomethod_bad.out   |  2 +-
 test_regress/t/t_enum_x_bad.out               |  4 +-
 test_regress/t/t_event_control.out            |  4 +-
 test_regress/t/t_event_control_expr_unsup.out |  2 +-
 test_regress/t/t_event_copy.out               |  4 +-
 test_regress/t/t_flag_context_bad.out         |  4 +-
 test_regress/t/t_flag_structs_packed_bad.out  |  2 +-
 test_regress/t/t_flag_werror_bad1.out         |  2 +-
 test_regress/t/t_flag_werror_bad2.out         |  2 +-
 test_regress/t/t_flag_wfatal.out              |  2 +-
 test_regress/t/t_force_tri.out                |  2 +-
 test_regress/t/t_fork.out                     |  2 +-
 test_regress/t/t_fork_disable.out             |  4 +-
 test_regress/t/t_fork_func2_bad.out           |  2 +-
 test_regress/t/t_func_bad.out                 | 14 ++--
 test_regress/t/t_func_bad_width.out           |  4 +-
 test_regress/t/t_func_const2_bad.out          |  6 +-
 test_regress/t/t_func_const3_bad.out          |  2 +-
 test_regress/t/t_func_const_bad.out           | 22 +++---
 .../t/t_func_const_packed_array_bad.out       |  6 +-
 .../t/t_func_const_packed_struct_bad.out      |  6 +-
 .../t/t_func_const_packed_struct_bad2.out     |  6 +-
 test_regress/t/t_func_const_struct_bad.out    |  6 +-
 test_regress/t/t_func_recurse_param.out       |  4 +-
 test_regress/t/t_func_recurse_param_bad.out   |  2 +-
 test_regress/t/t_func_refio_bad.out           |  2 +-
 test_regress/t/t_func_wide_out_bad.out        | 40 +++++------
 test_regress/t/t_fuzz_triand_bad.out          |  4 +-
 test_regress/t/t_gen_cond_bitrange_bad.out    |  8 +--
 test_regress/t/t_gen_missing_bad2.out         |  8 +--
 test_regress/t/t_gen_var_bad.out              |  2 +-
 test_regress/t/t_generate_fatal_bad.out       | 48 ++++++-------
 test_regress/t/t_hier_block0_bad.out          |  4 +-
 test_regress/t/t_hier_block1_bad.out          |  6 +-
 test_regress/t/t_implements_new_bad.out       |  2 +-
 test_regress/t/t_inside_queue_bad.out         |  6 +-
 test_regress/t/t_inside_unpacked.out          |  4 +-
 test_regress/t/t_inst_array_bad.out           |  2 +-
 test_regress/t/t_inst_misarray2_bad.out       |  2 +-
 test_regress/t/t_inst_misarray_bad.out        |  2 +-
 test_regress/t/t_inst_overwide_bad.out        |  8 +--
 test_regress/t/t_inst_pin_realnreal.out       |  2 +-
 test_regress/t/t_inst_recurse2_bad.out        |  2 +-
 test_regress/t/t_interface_ar3.out            |  4 +-
 test_regress/t/t_interface_array_bad.out      |  4 +-
 .../t/t_interface_array_nocolon_bad.out       |  8 +--
 test_regress/t/t_interface_asvar_bad.out      |  4 +-
 .../t/t_interface_modport_dir_bad.out         |  2 +-
 test_regress/t/t_interface_param_acc_bits.out |  2 +-
 .../t/t_interface_param_another_bad.out       |  2 +-
 test_regress/t/t_interface_size_bad.out       |  4 +-
 test_regress/t/t_interface_virtual_bad.out    | 16 ++---
 test_regress/t/t_interface_wrong_bad.out      |  2 +-
 test_regress/t/t_lint_always_comb_bad.out     |  8 +--
 .../t/t_lint_always_comb_multidriven.out      | 20 +++---
 test_regress/t/t_lint_cmpconst_bad.out        |  2 +-
 test_regress/t/t_lint_const_func_dpi_bad.out  |  6 +-
 test_regress/t/t_lint_const_func_gen_bad.out  |  6 +-
 test_regress/t/t_lint_contassreg_bad.out      |  2 +-
 test_regress/t/t_lint_edge_real_bad.out       |  4 +-
 test_regress/t/t_lint_genunnamed_bad.out      | 18 +++--
 .../t/t_lint_iface_array_topmodule_bad.out    |  2 +-
 test_regress/t/t_lint_iface_topmodule_bad.out |  2 +-
 test_regress/t/t_lint_ifdepth_bad.out         |  2 +-
 test_regress/t/t_lint_in_inc_bad.out          |  4 +-
 test_regress/t/t_lint_infinite_bad.out        |  4 +-
 test_regress/t/t_lint_modport_dir_bad.out     |  2 +-
 test_regress/t/t_lint_once_bad.out            |  4 +-
 .../t/t_lint_pragma_protected_bad.out         |  4 +-
 test_regress/t/t_lint_repeat_bad.out          |  2 +-
 test_regress/t/t_lint_restore_bad.out         |  2 +-
 test_regress/t/t_lint_setout_bad.out          |  2 +-
 test_regress/t/t_lint_setout_bad_noinl.out    |  2 +-
 test_regress/t/t_lint_stmtdly_bad.out         |  2 +-
 test_regress/t/t_lint_subout_bad.out          |  6 +-
 test_regress/t/t_lint_unsigned_bad.out        |  2 +-
 test_regress/t/t_lint_unused_bad.out          | 30 ++++----
 test_regress/t/t_lint_unused_iface_bad.out    |  4 +-
 test_regress/t/t_lint_vcmarker_bad.out        |  6 +-
 test_regress/t/t_lint_width_bad.out           | 22 +++---
 test_regress/t/t_lint_width_genfor_bad.out    | 10 +--
 .../t/t_lint_widthexpand_docs_bad.out         |  2 +-
 test_regress/t/t_mailbox_bad.out              |  2 +-
 test_regress/t/t_math_eq_bad.out              |  2 +-
 test_regress/t/t_math_repl2_bad.out           |  2 +-
 test_regress/t/t_math_repl_bad.out            |  8 +--
 test_regress/t/t_math_shift_over_bad.out      |  2 +-
 test_regress/t/t_mem_multi_ref_bad.out        | 18 ++---
 test_regress/t/t_mem_slice_bad.out            | 12 ++--
 test_regress/t/t_metacmt_onoff.out            |  4 +-
 test_regress/t/t_net_delay.out                |  6 +-
 test_regress/t/t_notiming.out                 | 22 +++---
 test_regress/t/t_notiming_off.out             | 12 ++--
 test_regress/t/t_packed_concat_bad.out        |  6 +-
 test_regress/t/t_param_circ_bad.out           |  2 +-
 test_regress/t/t_param_concat_bad.out         |  6 +-
 test_regress/t/t_param_default_bad.out        |  2 +-
 test_regress/t/t_param_default_presv_bad.out  |  2 +-
 test_regress/t/t_param_noval_bad.out          | 14 ++--
 test_regress/t/t_param_sel_range_bad.out      |  2 +-
 test_regress/t/t_param_type_bad2.out          |  4 +-
 test_regress/t/t_param_width_loc_bad.out      |  2 +-
 test_regress/t/t_past_bad.out                 |  8 +--
 test_regress/t/t_pp_line_bad.out              |  2 +-
 test_regress/t/t_preproc_inc_bad.out          |  2 +-
 test_regress/t/t_process_bad.out              |  4 +-
 test_regress/t/t_process_notiming.out         | 26 +++----
 test_regress/t/t_queue_empty_bad.out          |  4 +-
 test_regress/t/t_queue_method3_bad.out        |  4 +-
 test_regress/t/t_queue_method_bad.out         | 18 ++---
 test_regress/t/t_randc_oversize_bad.out       |  2 +-
 .../t/t_randomize_method_types_unsup.out      | 10 +--
 test_regress/t/t_randstate_obj.out            |  4 +-
 test_regress/t/t_sampled_expr_unsup.out       |  2 +-
 test_regress/t/t_select_bad_msb.out           |  4 +-
 test_regress/t/t_select_bad_range.out         |  4 +-
 test_regress/t/t_select_bad_range2.out        |  2 +-
 test_regress/t/t_select_bad_range3.out        |  2 +-
 test_regress/t/t_select_bad_range4.out        | 38 +++++-----
 test_regress/t/t_select_bad_range5.out        |  8 +--
 test_regress/t/t_select_bad_tri.out           |  2 +-
 test_regress/t/t_semaphore_bad.out            |  2 +-
 test_regress/t/t_split_var_1_bad.out          | 30 ++++----
 test_regress/t/t_stream_bad.out               |  6 +-
 .../t/t_stream_dynamic_wide_unsup.out         |  4 +-
 .../t/t_stream_integer_type_unsup.out         | 72 +++++++++----------
 test_regress/t/t_strength_2_uneq_assign.out   |  4 +-
 test_regress/t/t_string_type_methods_bad.out  |  8 +--
 test_regress/t/t_struct_contents_bad.out      | 20 +++---
 test_regress/t/t_struct_init_bad.out          |  2 +-
 test_regress/t/t_struct_notfound_bad.out      |  2 +-
 test_regress/t/t_struct_packed_init_bad.out   |  2 +-
 test_regress/t/t_struct_unpacked_init.out     |  2 +-
 .../t/t_structu_dataType_assignment_bad.out   |  2 +-
 test_regress/t/t_sys_readmem_assoc_bad.out    |  4 +-
 test_regress/t/t_timing_func_bad.out          | 12 ++--
 test_regress/t/t_timing_localevent_unsup.out  |  2 +-
 test_regress/t/t_timing_unset1.out            | 24 +++----
 test_regress/t/t_timing_unset2.out            | 12 ++--
 test_regress/t/t_timing_unset3.out            |  2 +-
 test_regress/t/t_tri_array.out                |  8 +--
 test_regress/t/t_tri_compass_bad.out          |  2 +-
 test_regress/t/t_tri_pull2_bad.out            |  2 +-
 test_regress/t/t_tri_pull_bad.out             |  2 +-
 test_regress/t/t_tri_pullvec_bad.out          |  4 +-
 test_regress/t/t_type_compare_bad.out         |  2 +-
 test_regress/t/t_unbounded_bad.out            |  4 +-
 test_regress/t/t_unpacked_concat_bad.out      |  4 +-
 test_regress/t/t_var_const_bad.out            |  2 +-
 test_regress/t/t_var_ref_bad1.out             |  2 +-
 test_regress/t/t_var_ref_bad2.out             |  4 +-
 test_regress/t/t_var_rsvd_bad.out             |  2 +-
 test_regress/t/t_var_types_bad.out            | 14 ++--
 test_regress/t/t_vlt_warn_bad.out             |  2 +-
 test_regress/t/t_vlt_warn_ecode_bad.out       |  4 +-
 test_regress/t/t_wait.out                     | 18 ++---
 test_regress/t/t_wire_beh1364_bad.out         | 10 +--
 test_regress/t/t_wire_beh1800_bad.out         | 10 +--
 test_regress/t/t_wire_behp1364_bad.out        |  6 +-
 test_regress/t/t_wire_behp1800_bad.out        |  6 +-
 227 files changed, 757 insertions(+), 755 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index ddde27f08..35f6606f9 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1348,23 +1348,19 @@ string AstNode::instanceStr() const {
     // in case we have some circular reference bug.
     constexpr unsigned maxIterations = 10000;
     unsigned iterCount = 0;
-
     for (const AstNode* backp = this; backp; backp = backp->backp(), ++iterCount) {
         if (VL_UNCOVERABLE(iterCount >= maxIterations)) return "";  // LCOV_EXCL_LINE
-
         // Prefer the enclosing scope, if there is one. This is always under the enclosing module,
         // so just pick it up when encountered
         if (const AstScope* const scopep = VN_CAST(backp, Scope)) {
-            return scopep->isTop() ? "" : "... In instance " + scopep->prettyName();
+            return scopep->isTop() ? "" : "... note: In instance " + scopep->prettyNameQ();
         }
-
         // If scopes don't exist, report an example instance of the enclosing module
         if (const AstModule* const modp = VN_CAST(backp, Module)) {
             const string instanceName = modp->someInstanceName();
-            return instanceName.empty() ? "" : "... In instance " + instanceName;
+            return instanceName.empty() ? "" : "... note: In instance '" + instanceName + "'";
         }
     }
-
     return "";
 }
 void AstNode::v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex) {
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 91ee773f2..e97db97b2 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -476,8 +476,8 @@ string FileLine::warnContextParent() const VL_REQUIRES(V3Error::s().m_mutex) {
     string result;
     for (FileLine* parentFl = parent(); parentFl; parentFl = parentFl->parent()) {
         if (parentFl->filenameIsGlobal()) break;
-        result += parentFl->warnOther() + "... note: In file included from "
-                  + parentFl->filebasename() + "\n";
+        result += parentFl->warnOther() + "... note: In file included from '"
+                  + parentFl->filebasename() + "'\n";
     }
     return result;
 }
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index ceb1f2284..d9751b87a 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3348,7 +3348,7 @@ private:
         }
         if (nodep->isExternProto()) {
             if (!m_curSymp->findIdFallback(nodep->name())) {
-                nodep->v3error("definition not found for extern " + nodep->prettyNameQ());
+                nodep->v3error("Definition not found for extern " + nodep->prettyNameQ());
             }
         }
         VSymEnt* const oldCurSymp = m_curSymp;
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index e61ff5f59..00b9ea3aa 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -674,7 +674,7 @@ private:
             if (nodep->stmtsp()) {
                 nodep->v3warn(GENUNNAMED,
                               "Unnamed generate block "
-                                  << nodep->prettyNameQ() << " (IEEE 1800-2017 27.6)"
+                                  << nodep->prettyNameQ() << " (IEEE 1800-2017 27.6)\n"
                                   << nodep->warnMore()
                                   << "... Suggest assign a label with 'begin : gen_<label_name>'");
             }
diff --git a/src/V3PreLex.l b/src/V3PreLex.l
index 1daee9a31..9c84b9ed5 100644
--- a/src/V3PreLex.l
+++ b/src/V3PreLex.l
@@ -125,7 +125,7 @@ bom             [\357\273\277]
                           int res;
                           char enctype[16]; // long enough to hold "quote-printable"
                           if (LEXP->m_protBytes > 0) {
-                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "multiple `pragma protected encoding sections");
+                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "Multiple `pragma protected encoding sections");
                           }
                           res = sscanf(yytext + std::strlen("encoding"), " = (enctype = \"%15[A-Za-z0-9]\", line_length = %d, bytes = %d)", &enctype[0], &LEXP->m_protLength, &LEXP->m_protBytes);
                           if (res == 0)
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index a3f1be13a..bc36bf0d7 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -185,8 +185,8 @@ public:
             std::ostringstream stack;
             for (const auto& callstack : vlstd::reverse_view(m_callStack)) {
                 AstFuncRef* const funcp = callstack->m_funcp;
-                stack << "\n        " << funcp->fileline() << "... Called from "
-                      << funcp->prettyName() << "() with parameters:";
+                stack << "\n        " << funcp->fileline() << "... Called from '"
+                      << funcp->prettyName() << "()' with parameters:";
                 V3TaskConnects* tconnects = callstack->m_tconnects;
                 for (V3TaskConnects::iterator conIt = tconnects->begin();
                      conIt != tconnects->end(); ++conIt) {
diff --git a/src/verilog.l b/src/verilog.l
index eec6be4ed..3ac7873b3 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -1084,9 +1084,9 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   "`verilog"                            { FL_FWD; BEGIN PARSEP->lexKwdLastState(); FL_BRK; }
 
   /* Errors */
-  "<<<<<<<"[^\n\r]*                     { FL; yylval.fl->v3error("version control conflict marker in file"); FL_BRK; }
-  "======="[^\n\r]*                     { FL; yylval.fl->v3error("version control conflict marker in file"); FL_BRK; }
-  ">>>>>>>"[^\n\r]*                     { FL; yylval.fl->v3error("version control conflict marker in file"); FL_BRK; }
+  "<<<<<<<"[^\n\r]*                     { FL; yylval.fl->v3error("Version control conflict marker in file"); FL_BRK; }
+  "======="[^\n\r]*                     { FL; yylval.fl->v3error("Version control conflict marker in file"); FL_BRK; }
+  ">>>>>>>"[^\n\r]*                     { FL; yylval.fl->v3error("Version control conflict marker in file"); FL_BRK; }
 
   /* If add to this list also add to V3LanguageWords.h */
 }
diff --git a/src/verilog.y b/src/verilog.y
index 794a4cf61..c850947d2 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -7289,7 +7289,7 @@ vltOffFront<errcodeen>:
                         { const char *codemsg = (*$3).c_str();
                           if (V3ErrorCode::unusedMsg(codemsg)) {$$ = V3ErrorCode::I_UNUSED; }
                           else {$$ = V3ErrorCode{codemsg}; }
-                          if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown error code: " << *$3);  } }
+                          if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown error code: '" << *$3 << "'"); } }
         ;
 
 vltOnFront<errcodeen>:
@@ -7301,7 +7301,7 @@ vltOnFront<errcodeen>:
                         { const char *codemsg = (*$3).c_str();
                           if (V3ErrorCode::unusedMsg(codemsg)) {$$ = V3ErrorCode::I_UNUSED; }
                           else {$$ = V3ErrorCode{codemsg}; }
-                          if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown error code: " << *$3);  } }
+                          if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown error code: '" << *$3 << "'"); } }
         ;
 
 vltDModuleE<strp>:
diff --git a/test_regress/t/t_array_backw_index_bad.out b/test_regress/t/t_array_backw_index_bad.out
index f49d74019..babc5358e 100644
--- a/test_regress/t/t_array_backw_index_bad.out
+++ b/test_regress/t/t_array_backw_index_bad.out
@@ -1,29 +1,29 @@
 %Error: t/t_array_backw_index_bad.v:17:19: Slice selection '[1:3]' has reversed range order versus data type's '[3:0]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    17 |       array_assign[1:3] = '{32'd4, 32'd3, 32'd2};
       |                   ^
 %Error: t/t_array_backw_index_bad.v:18:20: Slice selection '[3:1]' has reversed range order versus data type's '[0:3]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    18 |       larray_assign[3:1] = '{32'd4, 32'd3, 32'd2};
       |                    ^
 %Error: t/t_array_backw_index_bad.v:19:20: Slice selection '[4:6]' has reversed range order versus data type's '[6:3]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    19 |       array_assign2[4:6] = '{32'd4, 32'd3, 32'd2};
       |                    ^
 %Error: t/t_array_backw_index_bad.v:20:21: Slice selection '[6:4]' has reversed range order versus data type's '[3:6]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    20 |       larray_assign2[6:4] = '{32'd4, 32'd3, 32'd2};
       |                     ^
 %Error: t/t_array_backw_index_bad.v:22:19: Slice selection index '[4:3]' outside data type's '[3:0]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    22 |       array_assign[4:3] = '{32'd4, 32'd3};
       |                   ^
 %Error: t/t_array_backw_index_bad.v:23:19: Slice selection index '[1:-1]' outside data type's '[3:0]'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    23 |       array_assign[1:-1] = '{32'd4, 32'd3};
       |                   ^
 %Error: t/t_array_backw_index_bad.v:23:28: Assignment pattern missed initializing elements: -1
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    23 |       array_assign[1:-1] = '{32'd4, 32'd3};
       |                            ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_array_list_bad.out b/test_regress/t/t_array_list_bad.out
index c1b3a1b46..96a70f1d3 100644
--- a/test_regress/t/t_array_list_bad.out
+++ b/test_regress/t/t_array_list_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_array_list_bad.v:38:25: Assignment pattern missed initializing elements: 'logic' 't3'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    38 |             test_out <= '{'0, '0};  
       |                         ^~
 %Warning-WIDTHEXPAND: t/t_array_list_bad.v:38:22: Operator ASSIGNDLY expects 3 bits on the Assign RHS, but Assign RHS's CONCAT generates 2 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    38 |             test_out <= '{'0, '0};  
       |                      ^~
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
diff --git a/test_regress/t/t_array_method_bad.out b/test_regress/t/t_array_method_bad.out
index 34f1fcb09..ce2d8a52d 100644
--- a/test_regress/t/t_array_method_bad.out
+++ b/test_regress/t/t_array_method_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_array_method_bad.v:11:9: Unknown built-in array method 'mex'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    11 |       q.mex;
       |         ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_array_method_unsup.out b/test_regress/t/t_array_method_unsup.out
index 792927193..9e3cd5e02 100644
--- a/test_regress/t/t_array_method_unsup.out
+++ b/test_regress/t/t_array_method_unsup.out
@@ -1,21 +1,21 @@
 %Error: t/t_array_method_unsup.v:24:17: 'with' not legal on this method
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    24 |       i = q.sum with (item + 1); do if ((i) !== (32'h11)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_array_method_unsup.v",24, (i), (32'h11)); $stop; end while(0);;
       |                 ^~~~
 %Error: t/t_array_method_unsup.v:25:21: 'with' not legal on this method
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    25 |       i = q.product with (item + 1); do if ((i) !== (32'h168)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_array_method_unsup.v",25, (i), (32'h168)); $stop; end while(0);;
       |                     ^~~~
 %Error: t/t_array_method_unsup.v:28:17: 'with' not legal on this method
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    28 |       i = q.and with (item + 1); do if ((i) !== (32'b1001)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_array_method_unsup.v",28, (i), (32'b1001)); $stop; end while(0);;
       |                 ^~~~
 %Error: t/t_array_method_unsup.v:29:16: 'with' not legal on this method
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    29 |       i = q.or with (item + 1); do if ((i) !== (32'b1111)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_array_method_unsup.v",29, (i), (32'b1111)); $stop; end while(0);;
       |                ^~~~
 %Error: t/t_array_method_unsup.v:30:17: 'with' not legal on this method
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    30 |       i = q.xor with (item + 1); do if ((i) !== (32'hb)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_array_method_unsup.v",30, (i), (32'hb)); $stop; end while(0);;
       |                 ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_array_pattern_bad.out b/test_regress/t/t_array_pattern_bad.out
index 957b1715e..2a451e965 100644
--- a/test_regress/t/t_array_pattern_bad.out
+++ b/test_regress/t/t_array_pattern_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_array_pattern_bad.v:24:18: Assignment pattern key 'valids' not found as member
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    24 |                  valids: '1};
       |                  ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_array_pattern_bad2.out b/test_regress/t/t_array_pattern_bad2.out
index bc5533253..ca000e327 100644
--- a/test_regress/t/t_array_pattern_bad2.out
+++ b/test_regress/t/t_array_pattern_bad2.out
@@ -1,5 +1,5 @@
 %Error: t/t_array_pattern_bad2.v:22:16: Multiple '{ default: } clauses
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    22 |       myinfo = '{default: '0,
       |                ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_array_pattern_bad3.out b/test_regress/t/t_array_pattern_bad3.out
index dd393b336..ccc680c93 100644
--- a/test_regress/t/t_array_pattern_bad3.out
+++ b/test_regress/t/t_array_pattern_bad3.out
@@ -1,13 +1,13 @@
 %Error: t/t_array_pattern_bad3.v:20:15: Assignment pattern key used multiple times: 1
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    20 |               1: '1};   
       |               ^
 %Error: t/t_array_pattern_bad3.v:21:13: Assignment pattern with too many elements
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    21 |       arr = '{'0, '1, '0, '1};   
       |             ^~
 %Error: t/t_array_pattern_bad3.v:22:13: Assignment pattern missed initializing elements: 2
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    22 |       arr = '{'0, '1};   
       |             ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assert_comp_bad.out b/test_regress/t/t_assert_comp_bad.out
index 759fcf96a..90ed6293e 100644
--- a/test_regress/t/t_assert_comp_bad.out
+++ b/test_regress/t/t_assert_comp_bad.out
@@ -1,35 +1,35 @@
 -Info: t/t_assert_comp_bad.v:10:7: Elaboration system task message (IEEE 1800-2017 20.11)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    10 |       $info;
       |       ^~~~~
 -Info: t/t_assert_comp_bad.v:11:7: User elaboration-time info
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    11 |       $info("User elaboration-time info");
       |       ^~~~~
 %Warning-USERWARN: t/t_assert_comp_bad.v:12:7: Elaboration system task message (IEEE 1800-2017 20.11)
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    12 |       $warning;
       |       ^~~~~~~~
                    ... For warning description see https://verilator.org/warn/USERWARN?v=latest
                    ... Use "/* verilator lint_off USERWARN */" and lint_on around source to disable this message.
 %Warning-USERWARN: t/t_assert_comp_bad.v:13:7: User elaboration-time warning
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    13 |       $warning("User elaboration-time warning");
       |       ^~~~~~~~
 %Warning-USERWARN: t/t_assert_comp_bad.v:14:7:           1
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    14 |       $warning(1);   
       |       ^~~~~~~~
 %Warning-USERERROR: t/t_assert_comp_bad.v:15:7: Elaboration system task message (IEEE 1800-2017 20.11)
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    15 |       $error;
       |       ^~~~~~
 %Warning-USERERROR: t/t_assert_comp_bad.v:16:7: User elaboration-time error
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    16 |       $error("User elaboration-time error");
       |       ^~~~~~
 %Warning-USERFATAL: t/t_assert_comp_bad.v:17:7: User elaboration-time fatal
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    17 |       $fatal(0, "User elaboration-time fatal");
       |       ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assert_disable_bad.out b/test_regress/t/t_assert_disable_bad.out
index a53fbe9d1..8fc8cf9ef 100644
--- a/test_regress/t/t_assert_disable_bad.out
+++ b/test_regress/t/t_assert_disable_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_assert_disable_bad.v:27:38: disable iff expression before property call and in its body is not legal
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    27 |    assert property (disable iff (val == 0) check(1, 1));
       |                                      ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assert_procedural_clk.out b/test_regress/t/t_assert_procedural_clk.out
index 0cd9304b0..98cbce1d6 100644
--- a/test_regress/t/t_assert_procedural_clk.out
+++ b/test_regress/t/t_assert_procedural_clk.out
@@ -1,9 +1,9 @@
 %Error: t/t_assert_procedural_clk.v:21:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2917 16.14.6)
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    21 |             assume property (@(posedge clk) cyc == 9);
       |             ^~~~~~
 %Error: t/t_assert_procedural_clk.v:22:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2917 16.14.6)
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    22 |             assume property (@(negedge clk) cyc == 9);
       |             ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assert_recursive_property_unsup.out b/test_regress/t/t_assert_recursive_property_unsup.out
index 7a2e9e68b..6176205df 100644
--- a/test_regress/t/t_assert_recursive_property_unsup.out
+++ b/test_regress/t/t_assert_recursive_property_unsup.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_assert_recursive_property_unsup.v:20:13: Unsupported: Recursive property call: 'check'
-                                                               : ... In instance t
+                                                               : ... note: In instance 't'
    20 |    property check(int n);
       |             ^~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_assoc_method_bad.out b/test_regress/t/t_assoc_method_bad.out
index 76c49e771..794685136 100644
--- a/test_regress/t/t_assoc_method_bad.out
+++ b/test_regress/t/t_assoc_method_bad.out
@@ -1,57 +1,57 @@
 %Error: t/t_assoc_method_bad.v:14:13: The 1 arguments passed to .num method does not match its requiring 0 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    14 |       v = a.num("badarg");
       |             ^~~
 %Error: t/t_assoc_method_bad.v:15:13: The 1 arguments passed to .size method does not match its requiring 0 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    15 |       v = a.size("badarg");
       |             ^~~~
 %Error: t/t_assoc_method_bad.v:16:13: The 0 arguments passed to .exists method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    16 |       v = a.exists();   
       |             ^~~~~~
 %Error: t/t_assoc_method_bad.v:17:13: The 2 arguments passed to .exists method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    17 |       v = a.exists(k, "bad2");
       |             ^~~~~~
 %Error: t/t_assoc_method_bad.v:18:13: The 0 arguments passed to .first method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    18 |       v = a.first();   
       |             ^~~~~
 %Error: t/t_assoc_method_bad.v:19:13: The 2 arguments passed to .next method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    19 |       v = a.next(k, "bad2");   
       |             ^~~~
 %Error: t/t_assoc_method_bad.v:20:13: The 0 arguments passed to .last method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    20 |       v = a.last();   
       |             ^~~~
 %Error: t/t_assoc_method_bad.v:21:13: The 2 arguments passed to .prev method does not match its requiring 1 arguments
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    21 |       v = a.prev(k, "bad2");   
       |             ^~~~
 %Error: t/t_assoc_method_bad.v:22:9: The 2 arguments passed to .delete method does not match its requiring 0 to 1 arguments
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    22 |       a.delete(k, "bad2");
       |         ^~~~~~
 %Error: t/t_assoc_method_bad.v:24:9: Array method 'sort' not legal on associative arrays
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    24 |       a.sort;   
       |         ^~~~
 %Error: t/t_assoc_method_bad.v:25:9: Array method 'rsort' not legal on associative arrays
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    25 |       a.rsort;   
       |         ^~~~~
 %Error: t/t_assoc_method_bad.v:26:9: Array method 'reverse' not legal on associative arrays
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    26 |       a.reverse;   
       |         ^~~~~~~
 %Error: t/t_assoc_method_bad.v:27:9: Array method 'shuffle' not legal on associative arrays
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    27 |       a.shuffle;   
       |         ^~~~~~~
 %Error: t/t_assoc_method_bad.v:29:9: Unknown built-in associative array method 'bad_not_defined'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    29 |       a.bad_not_defined();
       |         ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assoc_wildcard_bad.out b/test_regress/t/t_assoc_wildcard_bad.out
index 650f4b90c..348dfb271 100644
--- a/test_regress/t/t_assoc_wildcard_bad.out
+++ b/test_regress/t/t_assoc_wildcard_bad.out
@@ -1,77 +1,77 @@
 %Error: t/t_assoc_wildcard_bad.v:23:13: The 1 arguments passed to .num method does not match its requiring 0 arguments
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    23 |       v = a.num("badarg");
       |             ^~~
 %Error: t/t_assoc_wildcard_bad.v:24:13: The 1 arguments passed to .size method does not match its requiring 0 arguments
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    24 |       v = a.size("badarg");
       |             ^~~~
 %Error: t/t_assoc_wildcard_bad.v:25:13: The 0 arguments passed to .exists method does not match its requiring 1 arguments
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    25 |       v = a.exists();   
       |             ^~~~~~
 %Error: t/t_assoc_wildcard_bad.v:26:13: The 2 arguments passed to .exists method does not match its requiring 1 arguments
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    26 |       v = a.exists(k, "bad2");
       |             ^~~~~~
 %Error: t/t_assoc_wildcard_bad.v:27:9: The 2 arguments passed to .delete method does not match its requiring 0 to 1 arguments
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    27 |       a.delete(k, "bad2");
       |         ^~~~~~
 %Error: t/t_assoc_wildcard_bad.v:29:9: Array method 'sort' not legal on associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    29 |       a.sort;   
       |         ^~~~
 %Error: t/t_assoc_wildcard_bad.v:30:9: Array method 'rsort' not legal on associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    30 |       a.rsort;   
       |         ^~~~~
 %Error: t/t_assoc_wildcard_bad.v:31:9: Array method 'reverse' not legal on associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    31 |       a.reverse;   
       |         ^~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:32:9: Array method 'shuffle' not legal on associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    32 |       a.shuffle;   
       |         ^~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:34:9: Array method 'first' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    34 |       a.first;   
       |         ^~~~~
 %Error: t/t_assoc_wildcard_bad.v:35:9: Array method 'last' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    35 |       a.last;   
       |         ^~~~
 %Error: t/t_assoc_wildcard_bad.v:36:9: Array method 'next' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    36 |       a.next;   
       |         ^~~~
 %Error: t/t_assoc_wildcard_bad.v:37:9: Array method 'prev' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    37 |       a.prev;   
       |         ^~~~
 %Error: t/t_assoc_wildcard_bad.v:38:9: Array method 'unique_index' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    38 |       a.unique_index;   
       |         ^~~~~~~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:39:9: Array method 'find_index' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    39 |       a.find_index;   
       |         ^~~~~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:40:9: Array method 'find_first_index' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    40 |       a.find_first_index;   
       |         ^~~~~~~~~~~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:41:9: Array method 'find_last_index' not legal on wildcard associative arrays
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    41 |       a.find_last_index;   
       |         ^~~~~~~~~~~~~~~
 %Error: t/t_assoc_wildcard_bad.v:43:8: Wildcard index must be integral (IEEE 1800-2017 7.8.1)
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    43 |       a[x] = "bad";
       |        ^
 %Error: t/t_assoc_wildcard_bad.v:45:9: Unknown wildcard associative array method 'bad_not_defined'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    45 |       a.bad_not_defined();
       |         ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_bigmem_bad.out b/test_regress/t/t_bigmem_bad.out
index ec7bfe78a..fc31e3e90 100644
--- a/test_regress/t/t_bigmem_bad.out
+++ b/test_regress/t/t_bigmem_bad.out
@@ -1,5 +1,5 @@
 %Warning-SELRANGE: t/t_bigmem_bad.v:14:19: Selection index out of range: (nodep->declElWidth() == 0) -1:0 outside 268435455:0
-                                         : ... In instance t_bigmem
+                                         : ... note: In instance 't_bigmem'
    14 |       if (wen) mem[addr] <= data;
       |                   ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
diff --git a/test_regress/t/t_bitsel_const_bad.out b/test_regress/t/t_bitsel_const_bad.out
index 767882eeb..549399517 100644
--- a/test_regress/t/t_bitsel_const_bad.out
+++ b/test_regress/t/t_bitsel_const_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_bitsel_const_bad.v:21:16: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    21 |    assign a = b[0];   
       |                ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_bitsel_wire_array_bad.out b/test_regress/t/t_bitsel_wire_array_bad.out
index d256eef7d..43ba6671a 100644
--- a/test_regress/t/t_bitsel_wire_array_bad.out
+++ b/test_regress/t/t_bitsel_wire_array_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_bitsel_wire_array_bad.v:21:16: Illegal assignment of constant to unpacked array
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    21 |    assign b = a[0];   
       |                ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_case_genx_bad.out b/test_regress/t/t_case_genx_bad.out
index abdb81e62..c70d5a572 100644
--- a/test_regress/t/t_case_genx_bad.out
+++ b/test_regress/t/t_case_genx_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_case_genx_bad.v:14:9: Use of x/? constant in generate case statement, (no such thing as 'generate casez')
-                                : ... In instance t
+                                : ... note: In instance 't'
    14 |         32'b1xxx: initial begin end
       |         ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_cast_class_incompat_bad.out b/test_regress/t/t_cast_class_incompat_bad.out
index 2f214826d..8fe092ad8 100644
--- a/test_regress/t/t_cast_class_incompat_bad.out
+++ b/test_regress/t/t_cast_class_incompat_bad.out
@@ -1,10 +1,10 @@
 %Error: t/t_cast_class_incompat_bad.v:26:16: Dynamic, not static cast, required to cast 'CLASSREFDTYPE 'BaseExtended'' from 'CLASSREFDTYPE 'Base''
-                                           : ... In instance t
+                                           : ... note: In instance 't'
                                            : ... Suggest dynamic $cast
    26 |       cls_ab = BaseExtended'(cls_a);   
       |                ^~~~~~~~~~~~
 %Error: t/t_cast_class_incompat_bad.v:27:15: Incompatible types to static cast to 'CLASSREFDTYPE 'Other'' from 'CLASSREFDTYPE 'BaseExtended''
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    27 |       other = Other'(cls_ab);   
       |               ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_cast_size_bad.out b/test_regress/t/t_cast_size_bad.out
index 498099b69..e8243cae6 100644
--- a/test_regress/t/t_cast_size_bad.out
+++ b/test_regress/t/t_cast_size_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_cast_size_bad.v:14:15: Size-changing cast to zero or negative size
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    14 |       b = (-1)'(a);   
       |               ^
 %Warning-WIDTHEXPAND: t/t_cast_size_bad.v:14:9: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 1 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    14 |       b = (-1)'(a);   
       |         ^
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
diff --git a/test_regress/t/t_castdyn_castconst_bad.out b/test_regress/t/t_castdyn_castconst_bad.out
index 0251dc59e..adb79a262 100644
--- a/test_regress/t/t_castdyn_castconst_bad.out
+++ b/test_regress/t/t_castdyn_castconst_bad.out
@@ -1,17 +1,17 @@
 %Warning-CASTCONST: t/t_castdyn_castconst_bad.v:20:11: $cast will always return one as 'int' is always castable from 'logic[31:0]'
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
                                                      : ... Suggest static cast
    20 |       i = $cast(v, 1);   
       |           ^~~~~
                     ... For warning description see https://verilator.org/warn/CASTCONST?v=latest
                     ... Use "/* verilator lint_off CASTCONST */" and lint_on around source to disable this message.
 %Warning-CASTCONST: t/t_castdyn_castconst_bad.v:21:11: $cast will always return one as 'CLASSREFDTYPE 'Base'' is always castable from 'CLASSREFDTYPE 'Base''
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
                                                      : ... Suggest static cast
    21 |       i = $cast(b, b);   
       |           ^~~~~
 %Warning-CASTCONST: t/t_castdyn_castconst_bad.v:22:11: $cast will always return zero as 'CLASSREFDTYPE 'Base'' is not castable from 'CLASSREFDTYPE 'Other''
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
    22 |       i = $cast(b, o);   
       |           ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_castdyn_unsup_bad.out b/test_regress/t/t_castdyn_unsup_bad.out
index 328f9b91b..e73b1eecd 100644
--- a/test_regress/t/t_castdyn_unsup_bad.out
+++ b/test_regress/t/t_castdyn_unsup_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_castdyn_unsup_bad.v:13:7: Unsupported: $cast to 'string[$]' from 'int[string]'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
                                                 : ... Suggest try static cast
    13 |       $cast(q, aarray);
       |       ^~~~~
diff --git a/test_regress/t/t_class_assign_bad.out b/test_regress/t/t_class_assign_bad.out
index 151bc48a8..4ae5b5cad 100644
--- a/test_regress/t/t_class_assign_bad.out
+++ b/test_regress/t/t_class_assign_bad.out
@@ -1,37 +1,37 @@
 %Error: t/t_class_assign_bad.v:28:9: Assign RHS expects a CLASSREFDTYPE 'Cls', got BASICDTYPE 'logic'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    28 |       c = 0;
       |         ^
 %Error: t/t_class_assign_bad.v:29:9: Assign RHS expects a CLASSREFDTYPE 'Cls', got BASICDTYPE 'logic'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    29 |       c = 1;
       |         ^
 %Error: t/t_class_assign_bad.v:30:9: Assign RHS expects a CLASSREFDTYPE 'Cls', got CLASSREFDTYPE 'Cls2'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    30 |       c = c2;
       |         ^
 %Error: t/t_class_assign_bad.v:31:13: Assign RHS expects a CLASSREFDTYPE 'ClsExt', got CLASSREFDTYPE 'Cls'
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    31 |       c_ext = c;
       |             ^
 %Error: t/t_class_assign_bad.v:32:11: Assign RHS expects a CLASSREFDTYPE 'Cls2', got CLASSREFDTYPE 'Cls'
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    32 |       ct2 = c;
       |           ^
 %Error: t/t_class_assign_bad.v:34:7: Function Argument expects a CLASSREFDTYPE 'Cls', got BASICDTYPE 'logic'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    34 |       t(0);
       |       ^
 %Error: t/t_class_assign_bad.v:35:7: Function Argument expects a CLASSREFDTYPE 'Cls', got BASICDTYPE 'logic'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    35 |       t(1);
       |       ^
 %Error: t/t_class_assign_bad.v:36:7: Function Argument expects a CLASSREFDTYPE 'Cls', got CLASSREFDTYPE 'Cls2'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    36 |       t(c2);
       |       ^
 %Error: t/t_class_assign_bad.v:37:7: Function Argument expects a CLASSREFDTYPE 'ClsExt', got CLASSREFDTYPE 'Cls'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    37 |       f(c);
       |       ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_assign_cond_bad.out b/test_regress/t/t_class_assign_cond_bad.out
index d0d347f17..6705aafef 100644
--- a/test_regress/t/t_class_assign_cond_bad.out
+++ b/test_regress/t/t_class_assign_cond_bad.out
@@ -1,21 +1,21 @@
 %Error: t/t_class_assign_cond_bad.v:22:25: Incompatible types of operands of condition operator: CLASSREFDTYPE 'Cls1' and CLASSREFDTYPE 'Cls2'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    22 |       c1 = (c1 != null) ? c1 : c2;
       |                         ^
 %Error: t/t_class_assign_cond_bad.v:23:10: Assign RHS expects a CLASSREFDTYPE 'Cls1', got CLASSREFDTYPE 'Cls2'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    23 |       c1 = (c1 != null) ? c2 : c2;
       |          ^
 %Error: t/t_class_assign_cond_bad.v:24:25: Incompatible types of operands of condition operator: BASICDTYPE 'logic' and CLASSREFDTYPE 'Cls2'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    24 |       c2 = (c1 == null) ? 1'b1 : c2;
       |                         ^
 %Error: t/t_class_assign_cond_bad.v:24:10: Assign RHS expects a CLASSREFDTYPE 'Cls2', got BASICDTYPE 'logic'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    24 |       c2 = (c1 == null) ? 1'b1 : c2;
       |          ^
 %Error: t/t_class_assign_cond_bad.v:25:29: Incompatible types of operands of condition operator: CLASSREFDTYPE 'ExtCls1' and CLASSREFDTYPE 'Cls1'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    25 |       ext_c1 = (c1 == null) ? ext_c1 : c1;
       |                             ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_builtin_bad.out b/test_regress/t/t_class_builtin_bad.out
index 525420077..5b5c21072 100644
--- a/test_regress/t/t_class_builtin_bad.out
+++ b/test_regress/t/t_class_builtin_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_class_builtin_bad.v:8:17: The 'rand_mode' method is built-in and cannot be overridden (IEEE 1800-2017 18.8)
-                                    : ... In instance t
+                                    : ... note: In instance 't'
     8 |    function int rand_mode(bit onoff);
       |                 ^~~~~~~~~
 %Error: t/t_class_builtin_bad.v:11:17: The 'constraint_mode' method is built-in and cannot be overridden (IEEE 1800-2017 18.9)
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    11 |    function int constraint_mode(bit onoff);
       |                 ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_copy_bad.out b/test_regress/t/t_class_copy_bad.out
index 5b1c726b6..de65e77eb 100644
--- a/test_regress/t/t_class_copy_bad.out
+++ b/test_regress/t/t_class_copy_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_copy_bad.v:19:16: New-as-copier passed different data type 'CLASSREFDTYPE 'Cls'' then expected 'CLASSREFDTYPE 'Other''
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    19 |       c1 = new co;   
       |                ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_extends_aliased_real_bad.out b/test_regress/t/t_class_extends_aliased_real_bad.out
index ce714742d..0aca6d8e4 100644
--- a/test_regress/t/t_class_extends_aliased_real_bad.out
+++ b/test_regress/t/t_class_extends_aliased_real_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_extends_aliased_real_bad.v:14:10: Attempting to extend using non-class
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    14 |    bar #(real_t) bar_real_t;
       |          ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_extends_int_param_bad.out b/test_regress/t/t_class_extends_int_param_bad.out
index e16b75da5..d6d473552 100644
--- a/test_regress/t/t_class_extends_int_param_bad.out
+++ b/test_regress/t/t_class_extends_int_param_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_extends_int_param_bad.v:9:23: Attempting to extend using non-class
-                                              : ... In instance t
+                                              : ... note: In instance 't'
     9 |    class Bar #(type T=int) extends T;
       |                       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_extern_bad.out b/test_regress/t/t_class_extern_bad.out
index 96a3e2bb1..6fda0c135 100644
--- a/test_regress/t/t_class_extern_bad.out
+++ b/test_regress/t/t_class_extern_bad.out
@@ -4,10 +4,10 @@
         t/t_class_extern_bad.v:8:16: ... Location of original declaration
     8 |    extern task nodef();
       |                ^~~~~
-%Error: t/t_class_extern_bad.v:8:16: definition not found for extern 'nodef'
+%Error: t/t_class_extern_bad.v:8:16: Definition not found for extern 'nodef'
     8 |    extern task nodef();
       |                ^~~~~
-%Error: t/t_class_extern_bad.v:9:16: definition not found for extern 'nodef'
+%Error: t/t_class_extern_bad.v:9:16: Definition not found for extern 'nodef'
     9 |    extern task nodef();   
       |                ^~~~~
 %Error: t/t_class_extern_bad.v:12:6: extern not found that declares 'noproto'
diff --git a/test_regress/t/t_class_local_bad.out b/test_regress/t/t_class_local_bad.out
index 994f36a69..872e4f1e3 100644
--- a/test_regress/t/t_class_local_bad.out
+++ b/test_regress/t/t_class_local_bad.out
@@ -1,5 +1,5 @@
 %Error-ENCAPSULATED: t/t_class_local_bad.v:71:20: 'm_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    71 |       bad(); if (c.m_loc != 2) $stop;
       |                    ^~~~~
                      t/t_class_local_bad.v:71:20: ... Location of definition
@@ -7,98 +7,98 @@
       |              ^~~~~
                      ... For error description see https://verilator.org/warn/ENCAPSULATED?v=latest
 %Error-ENCAPSULATED: t/t_class_local_bad.v:72:20: 'm_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    72 |       bad(); if (c.m_prot != 20) $stop;
       |                    ^~~~~~
                      t/t_class_local_bad.v:72:20: ... Location of definition
    16 |    protected int m_prot = 3;
       |                  ^~~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:74:20: 'm_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    74 |       bad(); if (e.m_loc != 2) $stop;
       |                    ^~~~~
                      t/t_class_local_bad.v:74:20: ... Location of definition
    15 |    local int m_loc = 2;
       |              ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:75:20: 'm_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    75 |       bad(); if (e.m_prot != 20) $stop;
       |                    ^~~~~~
                      t/t_class_local_bad.v:75:20: ... Location of definition
    16 |    protected int m_prot = 3;
       |                  ^~~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:77:16: 'f_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    77 |       bad(); c.f_loc();
       |                ^~~~~
                      t/t_class_local_bad.v:77:16: ... Location of definition
    18 |    local task f_loc; endtask
       |               ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:78:16: 'f_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    78 |       bad(); c.f_prot();
       |                ^~~~~~
                      t/t_class_local_bad.v:78:16: ... Location of definition
    19 |    protected task f_prot; endtask
       |                   ^~~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:80:16: 's_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    80 |       bad(); c.s_loc();
       |                ^~~~~
                      t/t_class_local_bad.v:80:16: ... Location of definition
    21 |    static local task s_loc; endtask
       |                      ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:81:16: 's_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    81 |       bad(); c.s_prot();
       |                ^~~~~~
                      t/t_class_local_bad.v:81:16: ... Location of definition
    22 |    static protected task s_prot; endtask
       |                          ^~~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:83:19: 's_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    83 |       bad(); Cls::s_loc();
       |                   ^~~~~
                      t/t_class_local_bad.v:83:19: ... Location of definition
    21 |    static local task s_loc; endtask
       |                      ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:84:19: 's_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    84 |       bad(); Cls::s_prot();
       |                   ^~~~~~
                      t/t_class_local_bad.v:84:19: ... Location of definition
    22 |    static protected task s_prot; endtask
       |                          ^~~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:47:18: 'm_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    47 |       bad(); if (m_loc != 10) $stop;
       |                  ^~~~~
                      t/t_class_local_bad.v:47:18: ... Location of definition
    15 |    local int m_loc = 2;
       |              ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:50:14: 'f_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    50 |       bad(); f_loc();
       |              ^~~~~
                      t/t_class_local_bad.v:50:14: ... Location of definition
    18 |    local task f_loc; endtask
       |               ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:53:16: 'f_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    53 |       bad(); o.f_loc();
       |                ^~~~~
                      t/t_class_local_bad.v:53:16: ... Location of definition
    18 |    local task f_loc; endtask
       |               ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:56:14: 's_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    56 |       bad(); s_loc();
       |              ^~~~~
                      t/t_class_local_bad.v:56:14: ... Location of definition
    21 |    static local task s_loc; endtask
       |                      ^~~~~
 %Error-ENCAPSULATED: t/t_class_local_bad.v:59:19: 's_loc' is hidden as 'local' within this context (IEEE 1800-2017 8.18)
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    59 |       bad(); Cls::s_loc();
       |                   ^~~~~
                      t/t_class_local_bad.v:59:19: ... Location of definition
diff --git a/test_regress/t/t_class_member_bad.out b/test_regress/t/t_class_member_bad.out
index 49570f53f..a7b0dbb3e 100644
--- a/test_regress/t/t_class_member_bad.out
+++ b/test_regress/t/t_class_member_bad.out
@@ -1,10 +1,10 @@
 %Error: t/t_class_member_bad.v:18:9: Member 'memb3' not found in class 'Cls2'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
                                    : ... Suggested alternative: 'memb2'
    18 |       c.memb3 = 3;   
       |         ^~~~~
 %Warning-WIDTHTRUNC: t/t_class_member_bad.v:18:15: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's CONST '?32?sh3' generates 32 or 2 bits.
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    18 |       c.memb3 = 3;   
       |               ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_class_method_bad.out b/test_regress/t/t_class_method_bad.out
index 5a2cbc931..754de927c 100644
--- a/test_regress/t/t_class_method_bad.out
+++ b/test_regress/t/t_class_method_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_method_bad.v:18:9: Class method 'meth3' not found in class 'Cls2'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
                                    : ... Suggested alternative: 'meth2'
    18 |       c.meth3();   
       |         ^~~~~
diff --git a/test_regress/t/t_class_new_bad.out b/test_regress/t/t_class_new_bad.out
index 454eae5d6..19ea9d1cf 100644
--- a/test_regress/t/t_class_new_bad.out
+++ b/test_regress/t/t_class_new_bad.out
@@ -1,20 +1,20 @@
 %Error: t/t_class_new_bad.v:31:16: Too many arguments in function call to FUNC 'new'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    31 |       c1 = new(3);   
       |                ^
 %Error: t/t_class_new_bad.v:32:16: Too many arguments in function call to FUNC 'new'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    32 |       c2 = new(3);   
       |                ^
 %Error: t/t_class_new_bad.v:33:12: Missing argument on non-defaulted argument 'i' in function call to FUNC 'new'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    33 |       c3 = new();   
       |            ^~~
 %Error: t/t_class_new_bad.v:34:12: dynamic new() not expected in this context (data type must be dynamic array)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    34 |       c1 = new[2];
       |            ^~~
 %Error: Internal Error: t/t_class_new_bad.v:34:12: ../V3Width.cpp:#: Node has no type
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    34 |       c1 = new[2];
       |            ^~~
diff --git a/test_regress/t/t_class_param_bad2.out b/test_regress/t/t_class_param_bad2.out
index 35b901184..1eadc4902 100644
--- a/test_regress/t/t_class_param_bad2.out
+++ b/test_regress/t/t_class_param_bad2.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_param_bad2.v:12:4: Missing type parameter: 'PARAMB'
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    12 |    Cls c;   
       |    ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_param_circ_bad.out b/test_regress/t/t_class_param_circ_bad.out
index 35b6ce09a..48506b492 100644
--- a/test_regress/t/t_class_param_circ_bad.out
+++ b/test_regress/t/t_class_param_circ_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_param_circ_bad.v:14:4: Exceeded maximum --module-recursion-depth of 100
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    14 |    ClsA #(PARAM+1) a;
       |    ^~~~
 %Error: Internal Error: ../V3Param.cpp:#: should find just-made module
diff --git a/test_regress/t/t_class_param_enum_bad.out b/test_regress/t/t_class_param_enum_bad.out
index 4f5f727f9..95e80621a 100644
--- a/test_regress/t/t_class_param_enum_bad.out
+++ b/test_regress/t/t_class_param_enum_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_class_param_enum_bad.v:20:31: Assign RHS expects a CLASSREFDTYPE 'Converter__Tz2', got CLASSREFDTYPE 'Converter__Tz1'
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    20 |       Converter#(bit) conv2 = conv1;
       |                               ^~~~~
 %Error-ENUMVALUE: t/t_class_param_enum_bad.v:21:19: Implicit conversion to enum 'ENUMDTYPE '$unit::enum_t'' from 'logic[31:0]' (IEEE 1800-2017 6.19.3)
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
                                                   : ... Suggest use enum's mnemonic, or static cast
    21 |       conv1.toInt(0);
       |                   ^
diff --git a/test_regress/t/t_class_param_nconst_bad.out b/test_regress/t/t_class_param_nconst_bad.out
index 812399530..28382723a 100644
--- a/test_regress/t/t_class_param_nconst_bad.out
+++ b/test_regress/t/t_class_param_nconst_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_class_param_nconst_bad.v:12:17: Expecting expression to be constant, but can't convert a RAND to constant.
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    12 |    Cls #(.PARAM($random)) c;   
       |                 ^~~~~~~
 %Error: t/t_class_param_nconst_bad.v:12:11: Can't convert defparam value to constant: Param 'PARAM' of 'Cls'
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    12 |    Cls #(.PARAM($random)) c;   
       |           ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_param_nested_bad.out b/test_regress/t/t_class_param_nested_bad.out
index ce4a30bc0..9e7f90c07 100644
--- a/test_regress/t/t_class_param_nested_bad.out
+++ b/test_regress/t/t_class_param_nested_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_class_param_nested_bad.v:51:23: dotted expressions in parameters
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
                                                       : ... Suggest use a typedef
    51 |    Wrap2 #(Wrap#(19)::PBASE * 2) w38;
       |                       ^~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: Internal Error: t/t_class_param_nested_bad.v:51:29: ../V3Width.cpp:#: Node has no type
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
    51 |    Wrap2 #(Wrap#(19)::PBASE * 2) w38;
       |                             ^
diff --git a/test_regress/t/t_class_param_noinit_bad.out b/test_regress/t/t_class_param_noinit_bad.out
index 7e021c7b9..2e8cd6dc1 100644
--- a/test_regress/t/t_class_param_noinit_bad.out
+++ b/test_regress/t/t_class_param_noinit_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_param_noinit_bad.v:13:7: Class parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'B'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    13 |       Cls #(1) c;   
       |       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_virtual_bad.out b/test_regress/t/t_class_virtual_bad.out
index 4b1e2878b..946c04299 100644
--- a/test_regress/t/t_class_virtual_bad.out
+++ b/test_regress/t/t_class_virtual_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_class_virtual_bad.v:12:17: Illegal to call 'new' using an abstract virtual class (IEEE 1800-2017 8.21)
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    12 |       VBase b = new;   
       |                 ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_clocking_bad1.out b/test_regress/t/t_clocking_bad1.out
index 214ae7a0d..c134cd91d 100644
--- a/test_regress/t/t_clocking_bad1.out
+++ b/test_regress/t/t_clocking_bad1.out
@@ -1,5 +1,5 @@
 %Error: t/t_clocking_bad1.v:16:12: Only one default clocking block allowed per module (IEEE 1800-2017 14.12)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    16 |    default clocking @(posedge clk);
       |            ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_clocking_bad4.out b/test_regress/t/t_clocking_bad4.out
index b5702e561..04df674f1 100644
--- a/test_regress/t/t_clocking_bad4.out
+++ b/test_regress/t/t_clocking_bad4.out
@@ -1,45 +1,45 @@
 %Error: t/t_clocking_bad4.v:23:15: Skew must be constant (IEEE 1800-2017 14.4)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    23 |        input #cyc in;
       |               ^~~
 %Error: t/t_clocking_bad4.v:24:16: Skew cannot be negative
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    24 |        input #(-1) out;
       |                ^
 %Error: t/t_clocking_bad4.v:31:11: Usage of cycle delays requires default clocking (IEEE 1800-2017 14.11)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    31 |    always ##1;
       |           ^~
 %Error: t/t_clocking_bad4.v:32:15: Only non-blocking assignments can write to clockvars (IEEE 1800-2017 14.16)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    32 |    always cb1.out = clk;
       |               ^~~
 %Error: t/t_clocking_bad4.v:33:15: Only non-blocking assignments can write to clockvars (IEEE 1800-2017 14.16)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    33 |    assign cb1.out = clk;
       |               ^~~
 %Error: t/t_clocking_bad4.v:34:21: Only non-blocking assignments can write to clockvars (IEEE 1800-2017 14.16)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    34 |    always write(cb1.out);
       |                     ^~~
 %Error: t/t_clocking_bad4.v:35:22: Event controls cannot be used in synchronous drives (IEEE 1800-2017 14.16)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    35 |    always cb1.out <= @(posedge clk) 1;
       |                      ^
 %Error: t/t_clocking_bad4.v:36:22: Only cycle delays can be used in synchronous drives (IEEE 1800-2017 14.16)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    36 |    always cb1.out <= #1 1;
       |                      ^
 %Error: t/t_clocking_bad4.v:37:18: Cycle delays not allowed as intra-assignment delays (IEEE 1800-2017 14.11)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    37 |    always out <= ##1 1;
       |                  ^~
 %Error: t/t_clocking_bad4.v:40:12: Cannot write to input clockvar (IEEE 1800-2017 14.3)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    40 |        cb1.in = 1;
       |            ^~
 %Error: t/t_clocking_bad4.v:41:21: Cannot read from output clockvar (IEEE 1800-2017 14.3)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    41 |        $display(cb1.out);
       |                     ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_clocking_notiming.out b/test_regress/t/t_clocking_notiming.out
index 4a304c9d9..7b7fe7943 100644
--- a/test_regress/t/t_clocking_notiming.out
+++ b/test_regress/t/t_clocking_notiming.out
@@ -1,5 +1,5 @@
 %Error-NOTIMING: t/t_clocking_notiming.v:11:8: Clocking output skew greater than #0 requires --timing
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    11 |        output #1 out;
       |        ^~~~~~
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
diff --git a/test_regress/t/t_clocking_unsup2.out b/test_regress/t/t_clocking_unsup2.out
index 644d2e206..9d4b7df46 100644
--- a/test_regress/t/t_clocking_unsup2.out
+++ b/test_regress/t/t_clocking_unsup2.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_clocking_unsup2.v:16:11: Unsupported: ##0 delays
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    16 |    always ##0;
       |           ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_concat_large_bad.out b/test_regress/t/t_concat_large_bad.out
index 1874895ef..9ae1fcc8c 100644
--- a/test_regress/t/t_concat_large_bad.out
+++ b/test_regress/t/t_concat_large_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHCONCAT: t/t_concat_large_bad.v:9:29: More than a 8k bit replication is probably wrong: 32768
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
     9 |    wire [32767:0] a = {32768{1'b1}};
       |                             ^
                       ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
diff --git a/test_regress/t/t_const_bad.out b/test_regress/t/t_const_bad.out
index 65358eb59..5ef1e1fd6 100644
--- a/test_regress/t/t_const_bad.out
+++ b/test_regress/t/t_const_bad.out
@@ -1,15 +1,15 @@
 %Warning-WIDTHXZEXPAND: t/t_const_bad.v:13:39: Unsized constant being X/Z extended to 68 bits: ?32?bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    13 |       if (68'hx_xxxxxxxx_xxxxxxxx !== 'dX) $stop;
       |                                       ^~~
                         ... For warning description see https://verilator.org/warn/WIDTHXZEXPAND?v=latest
                         ... Use "/* verilator lint_off WIDTHXZEXPAND */" and lint_on around source to disable this message.
 %Warning-WIDTHXZEXPAND: t/t_const_bad.v:14:39: Unsized constant being X/Z extended to 68 bits: ?32?bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    14 |       if (68'hz_zzzzzzzz_zzzzzzzz !== 'dZ) $stop;
       |                                       ^~~
 %Warning-WIDTHXZEXPAND: t/t_const_bad.v:15:39: Unsized constant being X/Z extended to 68 bits: ?32?bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    15 |       if (68'h?_????????_???????? !== 'd?) $stop;
       |                                       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_constraint_mode_warn_bad.out b/test_regress/t/t_constraint_mode_warn_bad.out
index 478853c43..7bcae1c14 100644
--- a/test_regress/t/t_constraint_mode_warn_bad.out
+++ b/test_regress/t/t_constraint_mode_warn_bad.out
@@ -4,51 +4,51 @@
                         ... For warning description see https://verilator.org/warn/CONSTRAINTIGN?v=latest
                         ... Use "/* verilator lint_off CONSTRAINTIGN */" and lint_on around source to disable this message.
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:14:11: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    14 |       one.rand_mode(0);
       |           ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:15:11: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    15 |       one.rand_mode(1);
       |           ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:16:15: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    16 |       if (one.rand_mode() != 1) $stop;
       |               ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:19:9: constraint_mode ignored (unsupported)
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    19 |       a.constraint_mode(1);
       |         ^~~~~~~~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:20:9: constraint_mode ignored (unsupported)
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    20 |       a.constraint_mode(0);
       |         ^~~~~~~~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:21:13: constraint_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    21 |       if (a.constraint_mode() != 0) $stop;
       |             ^~~~~~~~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:41:13: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    41 |       p.one.rand_mode(0);
       |             ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:42:13: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    42 |       p.one.rand_mode(1);
       |             ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:43:17: rand_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    43 |       if (p.one.rand_mode() != 1) $stop;
       |                 ^~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:46:11: constraint_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    46 |       p.a.constraint_mode(1);
       |           ^~~~~~~~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:47:11: constraint_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    47 |       p.a.constraint_mode(0);
       |           ^~~~~~~~~~~~~~~
 %Warning-CONSTRAINTIGN: t/t_constraint_mode.v:48:15: constraint_mode ignored (unsupported)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    48 |       if (p.a.constraint_mode() != 0) $stop;
       |               ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_cover_unused_bad.out b/test_regress/t/t_cover_unused_bad.out
index 023d50917..32656657e 100644
--- a/test_regress/t/t_cover_unused_bad.out
+++ b/test_regress/t/t_cover_unused_bad.out
@@ -1,5 +1,5 @@
 %Warning-UNUSEDSIGNAL: t/t_cover_unused_bad.v:14:10: Signal is not used: 'unu3'
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    14 |    logic unu3 = 0;
       |          ^~~~
                        ... For warning description see https://verilator.org/warn/UNUSEDSIGNAL?v=latest
diff --git a/test_regress/t/t_delay_stmtdly_bad.out b/test_regress/t/t_delay_stmtdly_bad.out
index ed8235f57..40b0b31a3 100644
--- a/test_regress/t/t_delay_stmtdly_bad.out
+++ b/test_regress/t/t_delay_stmtdly_bad.out
@@ -1,35 +1,35 @@
 %Warning-ASSIGNDLY: t/t_delay.v:25:11: Ignoring timing control on this assignment/primitive due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    25 |    assign #(1.2000000000000000) dly1 = dly0 + 32'h1;
       |           ^
                     ... For warning description see https://verilator.org/warn/ASSIGNDLY?v=latest
                     ... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
 %Warning-ASSIGNDLY: t/t_delay.v:26:11: Ignoring timing control on this assignment/primitive due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    26 |    assign #(sub.delay) dly3 = dly1 + 1;
       |           ^
 %Warning-ASSIGNDLY: t/t_delay.v:33:18: Ignoring timing control on this assignment/primitive due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    33 |          dly0 <= #0 32'h11;
       |                  ^
 %Warning-ASSIGNDLY: t/t_delay.v:36:18: Ignoring timing control on this assignment/primitive due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    36 |          dly0 <= #0.12 dly0 + 32'h12;
       |                  ^
 %Warning-ASSIGNDLY: t/t_delay.v:44:18: Ignoring timing control on this assignment/primitive due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    44 |          dly0 <= #(dly_s.dly) 32'h55;
       |                  ^
 %Warning-STMTDLY: t/t_delay.v:50:10: Ignoring delay on this statement due to --no-timing
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    50 |          #100 $finish;
       |          ^
 %Warning-UNUSEDSIGNAL: t/t_delay.v:23:12: Signal is not used: 'dly_s'
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    23 |    dly_s_t dly_s;
       |            ^~~~~
 %Warning-UNUSEDSIGNAL: t/t_delay.v:57:13: Signal is not used: 'delay'
-                                        : ... In instance t.sub
+                                        : ... note: In instance 't.sub'
    57 |    realtime delay = 2.3;
       |             ^~~~~
 %Warning-BLKSEQ: t/t_delay.v:43:20: Blocking assignment '=' in sequential logic process
diff --git a/test_regress/t/t_dfg_multidriver_dfg_bad.out b/test_regress/t/t_dfg_multidriver_dfg_bad.out
index ce36240b8..62fea591c 100644
--- a/test_regress/t/t_dfg_multidriver_dfg_bad.out
+++ b/test_regress/t/t_dfg_multidriver_dfg_bad.out
@@ -1,5 +1,5 @@
 %Warning-MULTIDRIVEN: t/t_dfg_multidriver_dfg_bad.v:13:18: Bits [3:1] of signal 'a' have multiple combinational drivers
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
                       t/t_dfg_multidriver_dfg_bad.v:14:19: ... Location of first driver
    14 |     assign a[3:0] = i[3:0];
       |                   ^
@@ -10,7 +10,7 @@
                       ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest
                       ... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
 %Warning-MULTIDRIVEN: t/t_dfg_multidriver_dfg_bad.v:13:18: Bits [3:3] of signal 'a' have multiple combinational drivers
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
                       t/t_dfg_multidriver_dfg_bad.v:14:19: ... Location of first driver
    14 |     assign a[3:0] = i[3:0];
       |                   ^
@@ -19,7 +19,7 @@
       |                 ^
                       t/t_dfg_multidriver_dfg_bad.v:13:18: ... Only the first driver will be respected
 %Warning-MULTIDRIVEN: t/t_dfg_multidriver_dfg_bad.v:13:18: Bits [7:6] of signal 'a' have multiple combinational drivers
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
                       t/t_dfg_multidriver_dfg_bad.v:17:19: ... Location of first driver
    17 |     assign a[8:5] = i[8:5];
       |                   ^
@@ -28,7 +28,7 @@
       |                   ^
                       t/t_dfg_multidriver_dfg_bad.v:13:18: ... Only the first driver will be respected
 %Warning-MULTIDRIVEN: t/t_dfg_multidriver_dfg_bad.v:13:18: Bits [9:9] of signal 'a' have multiple combinational drivers
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
                       t/t_dfg_multidriver_dfg_bad.v:19:17: ... Location of first driver
    19 |     assign a[9] = i[9];
       |                 ^
diff --git a/test_regress/t/t_dpi_2exparg_bad.out b/test_regress/t/t_dpi_2exparg_bad.out
index 47496c569..cb7fe065d 100644
--- a/test_regress/t/t_dpi_2exparg_bad.out
+++ b/test_regress/t/t_dpi_2exparg_bad.out
@@ -1,11 +1,11 @@
 %Warning-WIDTHEXPAND: t/t_dpi_2exparg_bad.v:19:56: Operator NOT expects 64 bits on the LHS, but LHS's VARREF 'i' generates 32 bits.
-                                                 : ... In instance t.b
+                                                 : ... note: In instance 't.b'
    19 |    task dpix_twice(input int i, output [63:0] o);  o = ~i; endtask
       |                                                        ^
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Warning-WIDTHTRUNC: t/t_dpi_2exparg_bad.v:12:53: Operator ASSIGN expects 3 bits on the Assign RHS, but Assign RHS's NOT generates 32 bits.
-                                                : ... In instance t.a
+                                                : ... note: In instance 't.a'
    12 |    task dpix_twice(input int i, output [2:0] o);  o = ~i; endtask
       |                                                     ^
 %Error: t/t_dpi_2exparg_bad.v:19:9: Duplicate declaration of DPI function with different signature: 'dpix_twice'
diff --git a/test_regress/t/t_dpi_unpack_bad.out b/test_regress/t/t_dpi_unpack_bad.out
index aaaeef547..3e03f665e 100644
--- a/test_regress/t/t_dpi_unpack_bad.out
+++ b/test_regress/t/t_dpi_unpack_bad.out
@@ -1,31 +1,31 @@
 %Error-UNSUPPORTED: t/t_dpi_unpack_bad.v:21:20: Shape of the argument does not match the shape of the parameter ('logic[2:0]' v.s. 'logic[3:0]')
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    21 |       import_func0(sig0);
       |                    ^~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Warning-WIDTHEXPAND: t/t_dpi_unpack_bad.v:21:7: Operator TASKREF 'import_func0' expects 4 bits on the Function Argument, but Function Argument's VARREF 'sig0' generates 3 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    21 |       import_func0(sig0);
       |       ^~~~~~~~~~~~
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Error-UNSUPPORTED: t/t_dpi_unpack_bad.v:23:20: Shape of the argument does not match the shape of the parameter ('logic[2:0]$[0:2][0:1]' v.s. 'logic[2:0]$[0:2]')
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    23 |       import_func1(sig1);
       |                    ^~~~
 %Error-UNSUPPORTED: t/t_dpi_unpack_bad.v:25:20: Shape of the argument does not match the shape of the parameter ('logic[2:0]$[0:2][0:1]' v.s. 'logic[2:0]$[0:2][0:2]')
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    25 |       import_func2(sig1);
       |                    ^~~~
 %Error-UNSUPPORTED: t/t_dpi_unpack_bad.v:27:20: Shape of the argument does not match the shape of the parameter ('bit[2:0]' v.s. 'logic[2:0]')
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    27 |       import_func2(sig2);
       |                    ^~~~
 %Error-UNSUPPORTED: t/t_dpi_unpack_bad.v:29:24: Argument is not an unpacked array while parameter 'in' is
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    29 |       import_func0(sig0[1]);
       |                        ^
 %Warning-WIDTHEXPAND: t/t_dpi_unpack_bad.v:29:7: Operator TASKREF 'import_func0' expects 4 bits on the Function Argument, but Function Argument's ARRAYSEL generates 3 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    29 |       import_func0(sig0[1]);
       |       ^~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_dynarray_bad.out b/test_regress/t/t_dynarray_bad.out
index a579f8fc8..fe1e71b45 100644
--- a/test_regress/t/t_dynarray_bad.out
+++ b/test_regress/t/t_dynarray_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_dynarray_bad.v:15:11: Operator NEWDYNAMIC expects 32 bits on the new() size, but new() size's VARREF 's' generates 64 bits.
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    15 |       a = new [s];   
       |           ^~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_enum_bad_circdecl.out b/test_regress/t/t_enum_bad_circdecl.out
index 3c30cd2c2..abeff1184 100644
--- a/test_regress/t/t_enum_bad_circdecl.out
+++ b/test_regress/t/t_enum_bad_circdecl.out
@@ -1,5 +1,5 @@
 %Error: t/t_enum_bad_circdecl.v:11:6: Typedef has self-reference: 'bad_redecl'
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    11 |    } bad_redecl;
       |      ^~~~~~~~~~
         t/t_enum_bad_circdecl.v:9:17: ... Location of reference
diff --git a/test_regress/t/t_enum_bad_value.out b/test_regress/t/t_enum_bad_value.out
index 052f16ac8..03af7f4b0 100644
--- a/test_regress/t/t_enum_bad_value.out
+++ b/test_regress/t/t_enum_bad_value.out
@@ -1,5 +1,5 @@
 %Error: t/t_enum_bad_value.v:10:19: Enum value exceeds width of enum type (IEEE 1800-2017 6.19)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    10 |       VALUE_BAD = 8
       |                   ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_enum_bad_wrap.out b/test_regress/t/t_enum_bad_wrap.out
index 72c9403fc..2dab9a311 100644
--- a/test_regress/t/t_enum_bad_wrap.out
+++ b/test_regress/t/t_enum_bad_wrap.out
@@ -1,5 +1,5 @@
 %Error: t/t_enum_bad_wrap.v:11:19: Enum value illegally wrapped around (IEEE 1800-2017 6.19)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    11 |                   WRAPPED
       |                   ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_enum_huge_methods_bad.out b/test_regress/t/t_enum_huge_methods_bad.out
index b5d5e6853..6671d5dc9 100644
--- a/test_regress/t/t_enum_huge_methods_bad.out
+++ b/test_regress/t/t_enum_huge_methods_bad.out
@@ -2,7 +2,7 @@
    15 |         ELARGE = 160'h1234_4567_abcd_1234_4567_abcd
       |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_enum_huge_methods_bad.v:30:21: Unsupported: enum next/prev/name method on enum with > 64 bits
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
    30 |          $display(e.name);
       |                     ^~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_enum_overlap_bad.out b/test_regress/t/t_enum_overlap_bad.out
index 6e745c509..16f3d51a3 100644
--- a/test_regress/t/t_enum_overlap_bad.out
+++ b/test_regress/t/t_enum_overlap_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_enum_overlap_bad.v:12:11: Overlapping enumeration value: 'e1b'
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    12 |           e1b=1
       |           ^~~
         t/t_enum_overlap_bad.v:10:11: ... Location of original declaration
diff --git a/test_regress/t/t_enum_type_bad.out b/test_regress/t/t_enum_type_bad.out
index 59d5cb988..a6f749c3b 100644
--- a/test_regress/t/t_enum_type_bad.out
+++ b/test_regress/t/t_enum_type_bad.out
@@ -1,16 +1,16 @@
 %Error-ENUMVALUE: t/t_enum_type_bad.v:28:11: Implicit conversion to enum 't.e_t' from 'logic[31:0]' (IEEE 1800-2017 6.19.3)
-                                           : ... In instance t
+                                           : ... note: In instance 't'
                                           : ... Suggest use enum's mnemonic, or static cast
    28 |       e = 1;   
       |           ^
                   ... For error description see https://verilator.org/warn/ENUMVALUE?v=latest
 %Error-ENUMVALUE: t/t_enum_type_bad.v:29:11: Implicit conversion to enum 't.o_t' from 't.e_t' (IEEE 1800-2017 6.19.3)
-                                           : ... In instance t
+                                           : ... note: In instance 't'
                                           : ... Suggest use enum's mnemonic, or static cast
    29 |       o = e;   
       |           ^
 %Error-ENUMVALUE: t/t_enum_type_bad.v:35:15: Implicit conversion to enum 't.o_t' from 'ENUMDTYPE 't.e_t'' (IEEE 1800-2017 6.19.3)
-                                           : ... In instance t
+                                           : ... note: In instance 't'
                                           : ... Suggest use enum's mnemonic, or static cast
    35 |       o = str.m_e;   
       |               ^~~
diff --git a/test_regress/t/t_enum_type_methods_bad.out b/test_regress/t/t_enum_type_methods_bad.out
index 41c5834a1..233d51a6b 100644
--- a/test_regress/t/t_enum_type_methods_bad.out
+++ b/test_regress/t/t_enum_type_methods_bad.out
@@ -1,5 +1,5 @@
 %Error: Internal Error: t/t_enum_type_methods_bad.v:24:14: ../V3Width.cpp:#: Unsupported: enum next/prev with non-const argument
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
    24 |       e.next(increment);
       |              ^~~~~~~~~
                         ... See the manual at https://verilator.org/verilator_doc.html for more assistance.
diff --git a/test_regress/t/t_enum_type_nomethod_bad.out b/test_regress/t/t_enum_type_nomethod_bad.out
index bc6d41978..f2085bb77 100644
--- a/test_regress/t/t_enum_type_nomethod_bad.out
+++ b/test_regress/t/t_enum_type_nomethod_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_enum_type_nomethod_bad.v:15:9: Unknown built-in enum method 'bad_no_such_method'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    15 |       e.bad_no_such_method();
       |         ^~~~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_enum_x_bad.out b/test_regress/t/t_enum_x_bad.out
index 360ee2f57..c9441d947 100644
--- a/test_regress/t/t_enum_x_bad.out
+++ b/test_regress/t/t_enum_x_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_enum_x_bad.v:9:21: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 1800-2017 6.19)
-                             : ... In instance t
+                             : ... note: In instance 't'
     9 |    enum bit [1:0] { BADX = 2'b1x } BAD1;
       |                     ^~~~
 %Error: t/t_enum_x_bad.v:12:23: Enum value that is unassigned cannot follow value with X/Zs (IEEE 1800-2017 6.19)
-                              : ... In instance t
+                              : ... note: In instance 't'
    12 |                       e1
       |                       ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_event_control.out b/test_regress/t/t_event_control.out
index f04260a95..2debb40b8 100644
--- a/test_regress/t/t_event_control.out
+++ b/test_regress/t/t_event_control.out
@@ -1,11 +1,11 @@
 %Error-NOTIMING: t/t_event_control.v:14:7: Event control statement in this location requires --timing
-                                         : ... In instance t
+                                         : ... note: In instance 't'
                                          : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    14 |       @(clk);
       |       ^
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
 %Error-NOTIMING: t/t_event_control.v:16:7: Event control statement in this location requires --timing
-                                         : ... In instance t
+                                         : ... note: In instance 't'
                                          : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    16 |       @(clk);
       |       ^
diff --git a/test_regress/t/t_event_control_expr_unsup.out b/test_regress/t/t_event_control_expr_unsup.out
index 8f8e2cb64..8b6cc69ae 100644
--- a/test_regress/t/t_event_control_expr_unsup.out
+++ b/test_regress/t/t_event_control_expr_unsup.out
@@ -3,7 +3,7 @@
       |             ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_event_control_expr.v:82:17: Unsupported: function calls in sensitivity lists
-                                                  : ... In instance t.u_method
+                                                  : ... note: In instance 't.u_method'
    82 |    always @(obj.get_k()) begin 
       |                 ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_event_copy.out b/test_regress/t/t_event_copy.out
index 9965cd23e..6be6494fe 100644
--- a/test_regress/t/t_event_copy.out
+++ b/test_regress/t/t_event_copy.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_event_copy.v:100:13: Unsupported: assignment of event data type
-                                           : ... In instance t
+                                           : ... note: In instance 't'
   100 |          e4 = e3;   
       |             ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_event_copy.v:101:13: Unsupported: assignment of event data type
-                                           : ... In instance t
+                                           : ... note: In instance 't'
   101 |          e3 = e2;   
       |             ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_flag_context_bad.out b/test_regress/t/t_flag_context_bad.out
index 5cd7f81be..cbab432e9 100644
--- a/test_regress/t/t_flag_context_bad.out
+++ b/test_regress/t/t_flag_context_bad.out
@@ -1,7 +1,7 @@
 %Warning-WIDTHTRUNC: t/t_flag_context_bad.v:9:19: Operator ASSIGNW expects 3 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Warning-UNUSEDSIGNAL: t/t_flag_context_bad.v:9:15: Signal is not used: 'foo'
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
 %Error: Exiting due to
diff --git a/test_regress/t/t_flag_structs_packed_bad.out b/test_regress/t/t_flag_structs_packed_bad.out
index 43068e836..d8a2f8fa3 100644
--- a/test_regress/t/t_flag_structs_packed_bad.out
+++ b/test_regress/t/t_flag_structs_packed_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_flag_structs_packed.v:14:19: Unpacked data type 'STRUCTDTYPE 'x.notpacked_t'' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance x
+                                       : ... note: In instance 'x'
    14 |       notpacked_t b;
       |                   ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_flag_werror_bad1.out b/test_regress/t/t_flag_werror_bad1.out
index 5e0131123..904df576d 100644
--- a/test_regress/t/t_flag_werror_bad1.out
+++ b/test_regress/t/t_flag_werror_bad1.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_flag_werror.v:10:19: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS's CONST '6'h2e' generates 6 bits.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    10 |    wire [3:0] foo = 6'h2e;
       |                   ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_flag_werror_bad2.out b/test_regress/t/t_flag_werror_bad2.out
index 2f1001fbd..55ffa6d25 100644
--- a/test_regress/t/t_flag_werror_bad2.out
+++ b/test_regress/t/t_flag_werror_bad2.out
@@ -1,5 +1,5 @@
 %Error-WIDTHTRUNC: t/t_flag_werror.v:10:19: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS's CONST '6'h2e' generates 6 bits.
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    10 |    wire [3:0] foo = 6'h2e;
       |                   ^
                    ... For error description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_flag_wfatal.out b/test_regress/t/t_flag_wfatal.out
index 8489b1824..16a2669fd 100644
--- a/test_regress/t/t_flag_wfatal.out
+++ b/test_regress/t/t_flag_wfatal.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_flag_wfatal.v:10:19: Operator ASSIGNW expects 4 bits on the Assign RHS, but Assign RHS's CONST '6'h2e' generates 6 bits.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    10 |    wire [3:0] foo = 6'h2e;
       |                   ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_force_tri.out b/test_regress/t/t_force_tri.out
index 97b0dd018..9a80c51c3 100644
--- a/test_regress/t/t_force_tri.out
+++ b/test_regress/t/t_force_tri.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_force_tri.v:27:10: Unsupported tristate construct: ASSIGNFORCE
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    27 |          force bus = 4'bzz10;
       |          ^~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_fork.out b/test_regress/t/t_fork.out
index 6070aeb85..5f067c56a 100644
--- a/test_regress/t/t_fork.out
+++ b/test_regress/t/t_fork.out
@@ -1,5 +1,5 @@
 %Error-NOTIMING: t/t_fork.v:10:14: Fork statements require --timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    10 |       fork : fblk
       |              ^~~~
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
diff --git a/test_regress/t/t_fork_disable.out b/test_regress/t/t_fork_disable.out
index 62ba6a34f..4a245ec4d 100644
--- a/test_regress/t/t_fork_disable.out
+++ b/test_regress/t/t_fork_disable.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_fork_disable.v:16:7: Unsupported: disable fork statements
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    16 |       disable fork;
       |       ^~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_fork_disable.v:17:7: Unsupported: wait fork statements
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    17 |       wait fork;
       |       ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_fork_func2_bad.out b/test_regress/t/t_fork_func2_bad.out
index 16cdd6242..e9a3650d3 100644
--- a/test_regress/t/t_fork_func2_bad.out
+++ b/test_regress/t/t_fork_func2_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_fork_func2_bad.v:10:7: Only fork .. join_none is legal in functions. (IEEE 1800-2017 13.4.4)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    10 |       fork
       |       ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_func_bad.out b/test_regress/t/t_func_bad.out
index d5d2b8dc2..0b52f146a 100644
--- a/test_regress/t/t_func_bad.out
+++ b/test_regress/t/t_func_bad.out
@@ -1,31 +1,31 @@
 %Error: t/t_func_bad.v:9:11: Missing argument on non-defaulted argument 'from2' in function call to FUNC 'add'
-                           : ... In instance t
+                           : ... note: In instance 't'
     9 |       if (add(3'd1) != 0) $stop;   
       |           ^~~
 %Error: t/t_func_bad.v:10:27: Too many arguments in function call to FUNC 'add'
-                            : ... In instance t
+                            : ... note: In instance 't'
    10 |       if (add(3'd1, 3'd2, 3'd3) != 0) $stop;     
       |                           ^~~~
 %Error: t/t_func_bad.v:11:7: Missing argument on non-defaulted argument 'y' in function call to TASK 'x'
-                           : ... In instance t
+                           : ... note: In instance 't'
    11 |       x;  
       |       ^
 %Warning-WIDTHTRUNC: t/t_func_bad.v:11:7: Function output argument 'y' requires 1 bits, but connection's CONST '?32?h0' generates 32 bits.
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    11 |       x;  
       |       ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Error: t/t_func_bad.v:14:17: No such argument 'no_such' in function call to FUNC 'f'
-                            : ... In instance t
+                            : ... note: In instance 't'
    14 |       f(.j(1), .no_such(2));  
       |                 ^~~~~~~
 %Error: t/t_func_bad.v:15:19: Duplicate argument 'dup' in function call to FUNC 'f'
-                            : ... In instance t
+                            : ... note: In instance 't'
    15 |       f(.dup(1), .dup(3));  
       |                   ^~~
 %Error: t/t_func_bad.v:16:13: Too many arguments in function call to FUNC 'f'
-                            : ... In instance t
+                            : ... note: In instance 't'
    16 |       f(1,2,3);  
       |             ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_func_bad_width.out b/test_regress/t/t_func_bad_width.out
index af48783fa..c274b565a 100644
--- a/test_regress/t/t_func_bad_width.out
+++ b/test_regress/t/t_func_bad_width.out
@@ -1,11 +1,11 @@
 %Warning-WIDTHEXPAND: t/t_func_bad_width.v:13:13: Operator FUNCREF 'MUX' expects 40 bits on the Function Argument, but Function Argument's VARREF 'in' generates 39 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    13 |       out = MUX (in);
       |             ^~~
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Warning-WIDTHTRUNC: t/t_func_bad_width.v:13:11: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's FUNCREF 'MUX' generates 32 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    13 |       out = MUX (in);
       |           ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_func_const2_bad.out b/test_regress/t/t_func_const2_bad.out
index 05647a61d..2a12b83a7 100644
--- a/test_regress/t/t_func_const2_bad.out
+++ b/test_regress/t/t_func_const2_bad.out
@@ -2,12 +2,12 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const2_bad.v:22:23: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
-                                   : ... In instance t.b8_a7.c9
+                                   : ... note: In instance 't.b8_a7.c9'
         t/t_func_const2_bad.v:10:6: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const2_bad.v:15:13: ... Called from f_add() with parameters:
+        t/t_func_const2_bad.v:15:13: ... Called from 'f_add()' with parameters:
            a = 32'h7
            b = 32'h8
-        t/t_func_const2_bad.v:22:23: ... Called from f_add2() with parameters:
+        t/t_func_const2_bad.v:22:23: ... Called from 'f_add2()' with parameters:
            a = ?32?h7
            b = ?32?h8
            c = ?32?h9
diff --git a/test_regress/t/t_func_const3_bad.out b/test_regress/t/t_func_const3_bad.out
index 5390514c9..6172af3b0 100644
--- a/test_regress/t/t_func_const3_bad.out
+++ b/test_regress/t/t_func_const3_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHCONCAT: t/t_func_const3_bad.v:12:28: More than a 8k bit replication is probably wrong: 9000
-                                                 : ... In instance t.b9k.c9
+                                                 : ... note: In instance 't.b9k.c9'
    12 |    localparam SOMEP = {BITS{1'b0}};
       |                            ^
                       ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
diff --git a/test_regress/t/t_func_const_bad.out b/test_regress/t/t_func_const_bad.out
index 22ecf6b39..f8802f4db 100644
--- a/test_regress/t/t_func_const_bad.out
+++ b/test_regress/t/t_func_const_bad.out
@@ -1,33 +1,33 @@
 %Error: t/t_func_const_bad.v:12:20: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_output'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:13:64: ... Location of non-constant VAR 'o': Language violation: Outputs/refs not allowed in constant functions
    12 |    localparam B1 = f_bad_output(1,2);
       |                    ^~~~~~~~~~~~
 %Error: t/t_func_const_bad.v:21:20: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_dotted'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:23:24: ... Location of non-constant VARXREF 'EIGHT': Language violation: Dotted hierarchical references not allowed in constant functions
-        t/t_func_const_bad.v:21:20: ... Called from f_bad_dotted() with parameters:
+        t/t_func_const_bad.v:21:20: ... Called from 'f_bad_dotted()' with parameters:
            a = ?32?h2
    21 |    localparam B2 = f_bad_dotted(2);
       |                    ^~~~~~~~~~~~
 %Error: t/t_func_const_bad.v:28:20: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_nonparam'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:30:24: ... Location of non-constant VARREF 'modvar': Language violation: reference to non-function-local variable
-        t/t_func_const_bad.v:28:20: ... Called from f_bad_nonparam() with parameters:
+        t/t_func_const_bad.v:28:20: ... Called from 'f_bad_nonparam()' with parameters:
            a = ?32?h3
    28 |    localparam B3 = f_bad_nonparam(3);
       |                    ^~~~~~~~~~~~~~
 %Error: t/t_func_const_bad.v:36:20: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_infinite'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:38:7: ... Location of non-constant WHILE: Loop unrolling took too long; probably this is an infinite loop, or set --unroll-count above 1024
-        t/t_func_const_bad.v:36:20: ... Called from f_bad_infinite() with parameters:
+        t/t_func_const_bad.v:36:20: ... Called from 'f_bad_infinite()' with parameters:
            a = ?32?h3
    36 |    localparam B4 = f_bad_infinite(3);
       |                    ^~~~~~~~~~~~~~
 %Error: t/t_func_const_bad.v:44:23: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_stop'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:46:7: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_bad.v:44:23: ... Called from f_bad_stop() with parameters:
+        t/t_func_const_bad.v:44:23: ... Called from 'f_bad_stop()' with parameters:
            a = ?32?h3
    44 |    localparam BSTOP = f_bad_stop(3);
       |                       ^~~~~~~~~~
@@ -38,9 +38,9 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const_bad.v:50:24: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_fatal'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
         t/t_func_const_bad.v:55:7: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_bad.v:50:24: ... Called from f_bad_fatal() with parameters:
+        t/t_func_const_bad.v:50:24: ... Called from 'f_bad_fatal()' with parameters:
            a = ?32?h3
    50 |    localparam BFATAL = f_bad_fatal(3);
       |                        ^~~~~~~~~~~
diff --git a/test_regress/t/t_func_const_packed_array_bad.out b/test_regress/t/t_func_const_packed_array_bad.out
index 19284f0eb..6b55415c0 100644
--- a/test_regress/t/t_func_const_packed_array_bad.out
+++ b/test_regress/t/t_func_const_packed_array_bad.out
@@ -2,11 +2,11 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const_packed_array_bad.v:12:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
         t/t_func_const_packed_array_bad.v:23:9: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_packed_array_bad.v:31:16: ... Called from f_add() with parameters:
+        t/t_func_const_packed_array_bad.v:31:16: ... Called from 'f_add()' with parameters:
            params = [0 = 32'h7, 1 = 32'h8]
-        t/t_func_const_packed_array_bad.v:12:21: ... Called from f_add2() with parameters:
+        t/t_func_const_packed_array_bad.v:12:21: ... Called from 'f_add2()' with parameters:
            a = ?32?h7
            b = ?32?h8
            c = ?32?h9
diff --git a/test_regress/t/t_func_const_packed_struct_bad.out b/test_regress/t/t_func_const_packed_struct_bad.out
index 6cc4a4d8e..3dd459670 100644
--- a/test_regress/t/t_func_const_packed_struct_bad.out
+++ b/test_regress/t/t_func_const_packed_struct_bad.out
@@ -2,11 +2,11 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const_packed_struct_bad.v:14:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
         t/t_func_const_packed_struct_bad.v:25:9: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_packed_struct_bad.v:33:16: ... Called from f_add() with parameters:
+        t/t_func_const_packed_struct_bad.v:33:16: ... Called from 'f_add()' with parameters:
            params = [0 = '{a: 32'h7, b: 32'h22b}, 1 = '{a: 32'h3039, b: 32'h8}]
-        t/t_func_const_packed_struct_bad.v:14:21: ... Called from f_add2() with parameters:
+        t/t_func_const_packed_struct_bad.v:14:21: ... Called from 'f_add2()' with parameters:
            a = ?32?h7
            b = ?32?h8
            c = ?32?h9
diff --git a/test_regress/t/t_func_const_packed_struct_bad2.out b/test_regress/t/t_func_const_packed_struct_bad2.out
index 5090203c3..23643b079 100644
--- a/test_regress/t/t_func_const_packed_struct_bad2.out
+++ b/test_regress/t/t_func_const_packed_struct_bad2.out
@@ -2,11 +2,11 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const_packed_struct_bad2.v:20:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
         t/t_func_const_packed_struct_bad2.v:31:9: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_packed_struct_bad2.v:43:16: ... Called from f_add() with parameters:
+        t/t_func_const_packed_struct_bad2.v:43:16: ... Called from 'f_add()' with parameters:
            params = [0 = '{a: 32'h7, foo: 6'hb, sub_params: '{b: 32'h37, bar: 8'h6f}}, 1 = '{a: 32'h3039, foo: 6'hc, sub_params: '{b: 32'h8, bar: 8'h70}}]
-        t/t_func_const_packed_struct_bad2.v:20:21: ... Called from f_add2() with parameters:
+        t/t_func_const_packed_struct_bad2.v:20:21: ... Called from 'f_add2()' with parameters:
            a = ?32?h7
            b = ?32?h8
            c = ?32?h9
diff --git a/test_regress/t/t_func_const_struct_bad.out b/test_regress/t/t_func_const_struct_bad.out
index a8fd8baf8..4b0bb70ae 100644
--- a/test_regress/t/t_func_const_struct_bad.out
+++ b/test_regress/t/t_func_const_struct_bad.out
@@ -2,11 +2,11 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_func_const_struct_bad.v:17:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
         t/t_func_const_struct_bad.v:28:9: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_func_const_struct_bad.v:38:16: ... Called from f_add() with parameters:
+        t/t_func_const_struct_bad.v:38:16: ... Called from 'f_add()' with parameters:
            params = '{a: 32'h7, b: 32'h8}
-        t/t_func_const_struct_bad.v:17:21: ... Called from f_add2() with parameters:
+        t/t_func_const_struct_bad.v:17:21: ... Called from 'f_add2()' with parameters:
            a = ?32?h7
            b = ?32?h8
            c = ?32?h9
diff --git a/test_regress/t/t_func_recurse_param.out b/test_regress/t/t_func_recurse_param.out
index ba95348dc..1d578c015 100644
--- a/test_regress/t/t_func_recurse_param.out
+++ b/test_regress/t/t_func_recurse_param.out
@@ -1,10 +1,10 @@
 %Error: t/t_func_recurse_param.v:15:26: Expecting expression to be constant, but can't determine constant for FUNCREF 'recurse_self'
-                                      : ... In instance t
+                                      : ... note: In instance 't'
         t/t_func_recurse_param.v:9:27: ... Location of non-constant FUNC 'recurse_self': Unsupported: Recursive constant functions
    15 |    localparam int ZERO = recurse_self(0);
       |                          ^~~~~~~~~~~~
 %Error: t/t_func_recurse_param.v:16:28: Expecting expression to be constant, but can't determine constant for FUNCREF 'recurse_self'
-                                      : ... In instance t
+                                      : ... note: In instance 't'
         t/t_func_recurse_param.v:9:27: ... Location of non-constant FUNC 'recurse_self': Unsupported: Recursive constant functions
    16 |    localparam int ELEVEN = recurse_self(3);
       |                            ^~~~~~~~~~~~
diff --git a/test_regress/t/t_func_recurse_param_bad.out b/test_regress/t/t_func_recurse_param_bad.out
index 7ec686842..fd61bb496 100644
--- a/test_regress/t/t_func_recurse_param_bad.out
+++ b/test_regress/t/t_func_recurse_param_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_func_recurse_param_bad.v:15:26: Expecting expression to be constant, but can't determine constant for FUNCREF 'recurse_self'
-                                          : ... In instance t
+                                          : ... note: In instance 't'
         t/t_func_recurse_param_bad.v:9:27: ... Location of non-constant FUNC 'recurse_self': Unsupported: Recursive constant functions
    15 |    localparam int HUGE = recurse_self(10000);   
       |                          ^~~~~~~~~~~~
diff --git a/test_regress/t/t_func_refio_bad.out b/test_regress/t/t_func_refio_bad.out
index b92a72d8d..279b12315 100644
--- a/test_regress/t/t_func_refio_bad.out
+++ b/test_regress/t/t_func_refio_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_func_refio_bad.v:16:17: Ref argument requires matching types; port 'q' requires integer[$] but connection is logic[31:0].
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    16 |       queue_set(42);   
       |                 ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_func_wide_out_bad.out b/test_regress/t/t_func_wide_out_bad.out
index b2648177a..3d66ef69f 100644
--- a/test_regress/t/t_func_wide_out_bad.out
+++ b/test_regress/t/t_func_wide_out_bad.out
@@ -1,83 +1,83 @@
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:76:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'ds70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    76 |          Cls#(s12_t)::get(ds70);
       |                           ^~~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:76:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    76 |          Cls#(s12_t)::get(ds70);
       |                       ^~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:79:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'ds70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    79 |          Cls#(s12_t)::get(ds70);
       |                           ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:79:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    79 |          Cls#(s12_t)::get(ds70);
       |                       ^~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:83:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'du70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    83 |          Cls#(u12_t)::get(du70);
       |                           ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:83:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    83 |          Cls#(u12_t)::get(du70);
       |                       ^~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:86:27: Function output argument 'value' requires 12 bits, but connection's VARREF 'du70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    86 |          Cls#(u12_t)::get(du70);
       |                           ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:86:23: Operator TASKREF 'get' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    86 |          Cls#(u12_t)::get(du70);
       |                       ^~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   108 |          dpii_inv_s12(ds70, qs70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qs70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   108 |          dpii_inv_s12(ds70, qs70);
       |                             ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:108:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qs70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   108 |          dpii_inv_s12(ds70, qs70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'ds70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   111 |          dpii_inv_s12(ds70, qs70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qs70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   111 |          dpii_inv_s12(ds70, qs70);
       |                             ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:111:10: Operator TASKREF 'dpii_inv_s12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qs70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   111 |          dpii_inv_s12(ds70, qs70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   115 |          dpii_inv_u12(du70, qu70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qu70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   115 |          dpii_inv_u12(du70, qu70);
       |                             ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:115:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qu70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   115 |          dpii_inv_u12(du70, qu70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'du70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   118 |          dpii_inv_u12(du70, qu70);
       |          ^~~~~~~~~~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:29: Function output argument 'out' requires 12 bits, but connection's VARREF 'qu70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   118 |          dpii_inv_u12(du70, qu70);
       |                             ^~~~
 %Warning-WIDTHTRUNC: t/t_func_wide_out.v:118:10: Operator TASKREF 'dpii_inv_u12' expects 12 bits on the Function Argument, but Function Argument's VARREF 'qu70' generates 70 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
   118 |          dpii_inv_u12(du70, qu70);
       |          ^~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_fuzz_triand_bad.out b/test_regress/t/t_fuzz_triand_bad.out
index d2186a59e..4ed8efd50 100644
--- a/test_regress/t/t_fuzz_triand_bad.out
+++ b/test_regress/t/t_fuzz_triand_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_fuzz_triand_bad.v:8:12: Unsupported: Member call on object 'VARREF 'g'' which is a 'BASICDTYPE 'logic''
-                                              : ... In instance t
+                                              : ... note: In instance 't'
     8 |    tri g=g.and.g;
       |            ^~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: Internal Error: t/t_fuzz_triand_bad.v:8:12: ../V3Width.cpp:#: Unlinked data type
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
     8 |    tri g=g.and.g;
       |            ^~~
                         ... See the manual at https://verilator.org/verilator_doc.html for more assistance.
diff --git a/test_regress/t/t_gen_cond_bitrange_bad.out b/test_regress/t/t_gen_cond_bitrange_bad.out
index 98d3aad6b..47a9d3a71 100644
--- a/test_regress/t/t_gen_cond_bitrange_bad.out
+++ b/test_regress/t/t_gen_cond_bitrange_bad.out
@@ -1,19 +1,19 @@
 %Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:58:38: Selection index out of range: 2:2 outside 1:0
-                                                    : ... In instance t.i_test_gen
+                                                    : ... note: In instance 't.i_test_gen'
    58 |          if ((g < (SIZE + 1)) && MASK[g]) begin
       |                                      ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
                    ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.
 %Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:70:32: Selection index out of range: 2:2 outside 1:0
-                                                    : ... In instance t.i_test_gen
+                                                    : ... note: In instance 't.i_test_gen'
    70 |          if ((g < SIZE) && MASK[g + 1]) begin
       |                                ^
 %Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:83:33: Selection index out of range: 2:2 outside 1:0
-                                                    : ... In instance t.i_test_gen
+                                                    : ... note: In instance 't.i_test_gen'
    83 |          if ((g < (SIZE)) & MASK[g]) begin
       |                                 ^
 %Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:96:35: Selection index out of range: 2:2 outside 1:0
-                                                    : ... In instance t.i_test_gen
+                                                    : ... note: In instance 't.i_test_gen'
    96 |          if (!((g >= SIZE) | ~MASK[g])) begin
       |                                   ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_gen_missing_bad2.out b/test_regress/t/t_gen_missing_bad2.out
index d7c378472..4236c9693 100644
--- a/test_regress/t/t_gen_missing_bad2.out
+++ b/test_regress/t/t_gen_missing_bad2.out
@@ -1,17 +1,17 @@
 %Error: t/t_gen_missing_bad2.v:8:8: Expecting expression to be constant, but can't convert a TESTPLUSARGS to constant.
-                                  : ... In instance t
+                                  : ... note: In instance 't'
     8 |    if ($test$plusargs("BAD-non-constant")) begin
       |        ^~~~~~~~~~~~~~
 %Error: t/t_gen_missing_bad2.v:8:8: Generate If condition must evaluate to constant
-                                  : ... In instance t
+                                  : ... note: In instance 't'
     8 |    if ($test$plusargs("BAD-non-constant")) begin
       |        ^~~~~~~~~~~~~~
 %Error: t/t_gen_missing_bad2.v:12:7: Expecting expression to be constant, but can't convert a TESTPLUSARGS to constant.
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    12 |       $test$plusargs("BAD-non-constant"): initial $stop;
       |       ^~~~~~~~~~~~~~
 %Error: t/t_gen_missing_bad2.v:12:41: Generate Case item does not evaluate to constant
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    12 |       $test$plusargs("BAD-non-constant"): initial $stop;
       |                                         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_gen_var_bad.out b/test_regress/t/t_gen_var_bad.out
index e488e77d0..bedab7f34 100644
--- a/test_regress/t/t_gen_var_bad.out
+++ b/test_regress/t/t_gen_var_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_gen_var_bad.v:10:7: Non-genvar used in generate for: 'i'
-                              : ... In instance t
+                              : ... note: In instance 't'
    10 |       for (i=0; i<3; i=i+1) begin   
       |       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_generate_fatal_bad.out b/test_regress/t/t_generate_fatal_bad.out
index 5eb417f9d..f2569883c 100644
--- a/test_regress/t/t_generate_fatal_bad.out
+++ b/test_regress/t/t_generate_fatal_bad.out
@@ -2,86 +2,86 @@
                     ... For warning description see https://verilator.org/warn/USERFATAL?v=latest
                     ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message.
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst
+                                      : ... note: In instance 't.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = ?32?h0
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.genloop[1].foo_inst
+                                      : ... note: In instance 't.genloop[1].foo_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = ?32?h1
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.gen_l1[2].gen_l2[0].foo_inst2
+                                      : ... note: In instance 't.gen_l1[2].gen_l2[0].foo_inst2'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h2
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.gen_l1[2].gen_l2[1].foo_inst2
+                                      : ... note: In instance 't.gen_l1[2].gen_l2[1].foo_inst2'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h4
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.gen_l1[3].gen_l2[0].foo_inst2
+                                      : ... note: In instance 't.gen_l1[3].gen_l2[0].foo_inst2'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h3
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.gen_l1[3].gen_l2[1].foo_inst2
+                                      : ... note: In instance 't.gen_l1[3].gen_l2[1].foo_inst2'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h5
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.cond_true.foo_inst3
+                                      : ... note: In instance 't.cond_true.foo_inst3'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = ?32?h6
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.genblk4.foo_inst4
+                                      : ... note: In instance 't.genblk4.foo_inst4'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = ?32?h7
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.nested_loop[8].foo2_inst.foo2_loop[0].foo_in_foo2_inst
+                                      : ... note: In instance 't.nested_loop[8].foo2_inst.foo2_loop[0].foo_in_foo2_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h8
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.nested_loop[8].foo2_inst.foo2_loop[1].foo_in_foo2_inst
+                                      : ... note: In instance 't.nested_loop[8].foo2_inst.foo2_loop[1].foo_in_foo2_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'h9
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.nested_loop[10].foo2_inst.foo2_loop[0].foo_in_foo2_inst
+                                      : ... note: In instance 't.nested_loop[10].foo2_inst.foo2_loop[0].foo_in_foo2_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'ha
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
 %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... In instance t.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst
+                                      : ... note: In instance 't.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst'
         t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from get_baz() with parameters:
+        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
            bar = 32'hb
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
diff --git a/test_regress/t/t_hier_block0_bad.out b/test_regress/t/t_hier_block0_bad.out
index c3a778047..57d1bde09 100644
--- a/test_regress/t/t_hier_block0_bad.out
+++ b/test_regress/t/t_hier_block0_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_hier_block0_bad.v:21:11: 'sub0' has hier_block metacomment, hierarchical Verilation supports only integer/floating point/string parameters
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    21 |    sub0 #(UNPACKED) i_sub0(.clk(clk), .in(8'(count)), .out(out0));
       |           ^~~~~~~~
 %Error: t/t_hier_block0_bad.v:23:12: 'sub1' has hier_block metacomment, but 'parameter type' is not supported
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    23 |    sub1 #(.T(logic[7:0])) i_sub1(.in(out0), .out(out1));
       |            ^
 %Error: t/t_hier_block0_bad.v:27:42: Cannot access inside hierarchical block
diff --git a/test_regress/t/t_hier_block1_bad.out b/test_regress/t/t_hier_block1_bad.out
index 4e7234c0f..8284bfa27 100644
--- a/test_regress/t/t_hier_block1_bad.out
+++ b/test_regress/t/t_hier_block1_bad.out
@@ -1,16 +1,16 @@
 %Warning-HIERBLOCK: t/t_hier_block1_bad.v:16:8: Top module illegally marked hierarchical block, ignoring marking
-                                              : ... In instance t
+                                              : ... note: In instance 't'
                                               : ... Suggest remove verilator hier_block on this module
    16 | module t ( 
       |        ^
                     ... For warning description see https://verilator.org/warn/HIERBLOCK?v=latest
                     ... Use "/* verilator lint_off HIERBLOCK */" and lint_on around source to disable this message.
 %Error: t/t_hier_block1_bad.v:45:32: Modport cannot be used at the hierarchical block boundary
-                                   : ... In instance t.i_sub1
+                                   : ... note: In instance 't.i_sub1'
    45 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ 
       |                                ^~
 %Error: t/t_hier_block1_bad.v:45:52: Modport cannot be used at the hierarchical block boundary
-                                   : ... In instance t.i_sub1
+                                   : ... note: In instance 't.i_sub1'
    45 | module sub1 (byte_ifs.receiver in, byte_ifs.sender out); /*verilator hier_block*/ 
       |                                                    ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_implements_new_bad.out b/test_regress/t/t_implements_new_bad.out
index e86450d3a..3201ecfaf 100644
--- a/test_regress/t/t_implements_new_bad.out
+++ b/test_regress/t/t_implements_new_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_implements_new_bad.v:13:11: Illegal to call 'new' using an abstract virtual class (IEEE 1800-2017 8.21)
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    13 |       c = new;   
       |           ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inside_queue_bad.out b/test_regress/t/t_inside_queue_bad.out
index ad0b436c9..37b7be1ad 100644
--- a/test_regress/t/t_inside_queue_bad.out
+++ b/test_regress/t/t_inside_queue_bad.out
@@ -1,13 +1,13 @@
 %Error: t/t_inside_queue_bad.v:15:15: Inside operator not legal on non-unpacked arrays (IEEE 1800-2017 11.4.13)
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    15 |       m = (10 inside {q});
       |               ^~~~~~
 %Error: t/t_inside_queue_bad.v:16:15: Inside operator not legal on non-unpacked arrays (IEEE 1800-2017 11.4.13)
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    16 |       m = (10 inside {assoc});
       |               ^~~~~~
 %Error: t/t_inside_queue_bad.v:17:15: Inside operator not legal on non-unpacked arrays (IEEE 1800-2017 11.4.13)
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    17 |       m = (10 inside {dyn});
       |               ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inside_unpacked.out b/test_regress/t/t_inside_unpacked.out
index 608d0f49b..d46038344 100644
--- a/test_regress/t/t_inside_unpacked.out
+++ b/test_regress/t/t_inside_unpacked.out
@@ -1,9 +1,9 @@
 %Error: t/t_inside_unpacked.v:17:35: Unsupported: inside (set membership operator) on unpacked array
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    17 |    localparam HIT_INSIDE = HIT_LP inside {CHECKLIST_P};
       |                                   ^~~~~~
 %Error: t/t_inside_unpacked.v:18:37: Unsupported: inside (set membership operator) on unpacked array
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    18 |    localparam MISS_INSIDE = MISS_LP inside {CHECKLIST_P};
       |                                     ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_array_bad.out b/test_regress/t/t_inst_array_bad.out
index b438a2a0d..cb47790f3 100644
--- a/test_regress/t/t_inst_array_bad.out
+++ b/test_regress/t/t_inst_array_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_inst_array_bad.v:19:28: Input port connection 'onebit' as part of a module instance array requires 1 or 8 bits, but connection's VARREF 'onebitbad' generates 9 bits. (IEEE 1800-2017 23.3.3)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    19 |    sub sub [7:0] (allbits, onebitbad, bitout);
       |                            ^~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_misarray2_bad.out b/test_regress/t/t_inst_misarray2_bad.out
index 889bfcc7c..032c520ec 100644
--- a/test_regress/t/t_inst_misarray2_bad.out
+++ b/test_regress/t/t_inst_misarray2_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_inst_misarray2_bad.v:10:17: Illegal input port connection 'i_data', mismatch between port which is not an array, and expression which is an array. (IEEE 1800-2017 7.6)
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    10 |                .i_data(fft_oQ[6:0])
       |                 ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_misarray_bad.out b/test_regress/t/t_inst_misarray_bad.out
index 56dd2368a..bfbffa997 100644
--- a/test_regress/t/t_inst_misarray_bad.out
+++ b/test_regress/t/t_inst_misarray_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_inst_misarray_bad.v:17:23: Illegal input port connection 'foo', mismatch between port which is an array, and expression which is not an array. (IEEE 1800-2017 7.6)
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    17 |                      .foo(foo));   
       |                       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_overwide_bad.out b/test_regress/t/t_inst_overwide_bad.out
index 6bf85b1c5..3a43fefa6 100644
--- a/test_regress/t/t_inst_overwide_bad.out
+++ b/test_regress/t/t_inst_overwide_bad.out
@@ -1,19 +1,19 @@
 %Warning-WIDTHEXPAND: t/t_inst_overwide.v:23:14: Output port connection 'outy_w92' expects 92 bits on the pin connection, but pin connection's VARREF 'outc_w30' generates 30 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    23 |             .outy_w92   (outc_w30),      
       |              ^~~~~~~~
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Warning-WIDTHTRUNC: t/t_inst_overwide.v:24:14: Output port connection 'outz_w22' expects 22 bits on the pin connection, but pin connection's VARREF 'outd_w73' generates 73 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    24 |             .outz_w22   (outd_w73),      
       |              ^~~~~~~~
 %Warning-WIDTHEXPAND: t/t_inst_overwide.v:27:14: Input port connection 'inw_w31' expects 31 bits on the pin connection, but pin connection's VARREF 'ina_w1' generates 1 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    27 |             .inw_w31    (ina_w1),        
       |              ^~~~~~~
 %Warning-WIDTHTRUNC: t/t_inst_overwide.v:28:14: Input port connection 'inx_w11' expects 11 bits on the pin connection, but pin connection's VARREF 'inb_w61' generates 61 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    28 |             .inx_w11    (inb_w61)        
       |              ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_pin_realnreal.out b/test_regress/t/t_inst_pin_realnreal.out
index d78ce9a1e..486d7613c 100644
--- a/test_regress/t/t_inst_pin_realnreal.out
+++ b/test_regress/t/t_inst_pin_realnreal.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_inst_pin_realnreal.v:51:32: Unsupported: Output port connection 'out' connects real to non-real
-                                                  : ... In instance t.netlist
+                                                  : ... note: In instance 't.netlist'
    51 |    pga_model pga0(.in, .gain, .out(pga_out));
       |                                ^~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_inst_recurse2_bad.out b/test_regress/t/t_inst_recurse2_bad.out
index 312a2bf48..024193f31 100644
--- a/test_regress/t/t_inst_recurse2_bad.out
+++ b/test_regress/t/t_inst_recurse2_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_inst_recurse2_bad.v:18:8: Unsupported: Identically recursive module (module instantiates itself, without changing parameters): 'looped'
-                                                : ... In instance t.looped.looped
+                                                : ... note: In instance 't.looped.looped'
    18 | module looped ( );
       |        ^~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_interface_ar3.out b/test_regress/t/t_interface_ar3.out
index 49bc89443..97dead9a0 100644
--- a/test_regress/t/t_interface_ar3.out
+++ b/test_regress/t/t_interface_ar3.out
@@ -1,9 +1,9 @@
 %Error: t/t_interface_ar3.v:16:36: Unsupported: interface slices
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    16 |    sub sub01 [2] (.clk, .infc(iinst[0:1]));
       |                                    ^
 %Error: Internal Error: t/t_interface_ar3.v:16:36: ../V3Inst.cpp:#: No interface varref under array
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    16 |    sub sub01 [2] (.clk, .infc(iinst[0:1]));
       |                                    ^
                         ... See the manual at https://verilator.org/verilator_doc.html for more assistance.
diff --git a/test_regress/t/t_interface_array_bad.out b/test_regress/t/t_interface_array_bad.out
index 0caac3af4..a5c9dddac 100644
--- a/test_regress/t/t_interface_array_bad.out
+++ b/test_regress/t/t_interface_array_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_interface_array_bad.v:23:16: Expecting expression to be constant, but variable isn't const: 'bar'
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    23 |    assign foos[bar].a = 1'b1;
       |                ^~~
 %Error: t/t_interface_array_bad.v:23:15: Could not expand constant selection inside dotted reference: 'bar'
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    23 |    assign foos[bar].a = 1'b1;
       |               ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_array_nocolon_bad.out b/test_regress/t/t_interface_array_nocolon_bad.out
index 744b81d20..efeba5432 100644
--- a/test_regress/t/t_interface_array_nocolon_bad.out
+++ b/test_regress/t/t_interface_array_nocolon_bad.out
@@ -1,19 +1,19 @@
 %Warning-ASCRANGE: t/t_interface_array_nocolon_bad.v:26:26: Ascending instance range connecting to vector: left < right of instance range: [0:2]
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
    26 |    foo_intf foos [N] (.x(X));  
       |                          ^
                    ... For warning description see https://verilator.org/warn/ASCRANGE?v=latest
                    ... Use "/* verilator lint_off ASCRANGE */" and lint_on around source to disable this message.
 %Warning-ASCRANGE: t/t_interface_array_nocolon_bad.v:27:28: Ascending instance range connecting to vector: left < right of instance range: [1:3]
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
    27 |    foo_intf fool [1:3] (.x(X));  
       |                            ^
 %Warning-ASCRANGE: t/t_interface_array_nocolon_bad.v:30:26: Ascending instance range connecting to vector: left < right of instance range: [0:2]
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
    30 |    foo_subm subs [N] (.x(X));  
       |                          ^
 %Warning-ASCRANGE: t/t_interface_array_nocolon_bad.v:31:28: Ascending instance range connecting to vector: left < right of instance range: [1:3]
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
    31 |    foo_subm subl [1:3] (.x(X));  
       |                            ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_asvar_bad.out b/test_regress/t/t_interface_asvar_bad.out
index ffcdb86d7..84efcaf96 100644
--- a/test_regress/t/t_interface_asvar_bad.out
+++ b/test_regress/t/t_interface_asvar_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_interface_asvar_bad.v:29:16: Operator ASSIGN expected non-interface on Assign RHS but 'itf' is an interface.
-                                       : ... In instance t.source
+                                       : ... note: In instance 't.source'
    29 |       getter = itf;   
       |                ^~~
 %Error: t/t_interface_asvar_bad.v:30:23: Operator ADD expected non-interface on RHS but 'itf' is an interface.
-                                       : ... In instance t.source
+                                       : ... note: In instance 't.source'
    30 |       getter = 4'd3 + itf;   
       |                       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_modport_dir_bad.out b/test_regress/t/t_interface_modport_dir_bad.out
index d7783d86d..aaec5dd1c 100644
--- a/test_regress/t/t_interface_modport_dir_bad.out
+++ b/test_regress/t/t_interface_modport_dir_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_interface_modport_dir_bad.v:52:25: Port connection 'ctrl' expected 'source' interface modport on pin connection but got 'sink' modport.
-                                             : ... In instance t.source_i
+                                             : ... note: In instance 't.source_i'
    52 |    sourceMod source_i (.ctrl);
       |                         ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_param_acc_bits.out b/test_regress/t/t_interface_param_acc_bits.out
index 69419ae25..51998432b 100644
--- a/test_regress/t/t_interface_param_acc_bits.out
+++ b/test_regress/t/t_interface_param_acc_bits.out
@@ -1,5 +1,5 @@
 %Error: t/t_interface_param_acc_bits.v:15:42: Parameter-resolved constants must not use dotted references: 'dummy'
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    15 |    simple_bus #(.PARAMETER($bits(sb_intf.dummy))) simple();
       |                                          ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_param_another_bad.out b/test_regress/t/t_interface_param_another_bad.out
index c77f8eae3..f63612458 100644
--- a/test_regress/t/t_interface_param_another_bad.out
+++ b/test_regress/t/t_interface_param_another_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_interface_param_another_bad.v:9:42: Parameter-resolved constants must not use dotted references: 'dummy'
-                                              : ... In instance t
+                                              : ... note: In instance 't'
     9 |    simple_bus #(.PARAMETER($bits(sb_intf.dummy))) simple();
       |                                          ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_size_bad.out b/test_regress/t/t_interface_size_bad.out
index b5ccb6def..80351f39a 100644
--- a/test_regress/t/t_interface_size_bad.out
+++ b/test_regress/t/t_interface_size_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_interface_size_bad.v:16:20: Illegal port connection 'foo', mismatch between port which is an interface array of size 5, and expression which is an interface array of size 4.
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    16 |    baz baz4_inst (.foo(foo4));
       |                    ^~~
 %Error: t/t_interface_size_bad.v:17:20: Illegal port connection 'foo', mismatch between port which is an interface array of size 5, and expression which is an interface array of size 6.
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    17 |    baz baz6_inst (.foo(foo6));
       |                    ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_virtual_bad.out b/test_regress/t/t_interface_virtual_bad.out
index 6afbdc125..7149f62ba 100644
--- a/test_regress/t/t_interface_virtual_bad.out
+++ b/test_regress/t/t_interface_virtual_bad.out
@@ -1,33 +1,33 @@
 %Error: t/t_interface_virtual_bad.v:31:12: Operator ASSIGN expected 'PBus' interface on Assign RHS but 'q8__Viftop' is a different interface ('QBus').
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    31 |       v8 = q8;   
       |            ^~
 %Error: t/t_interface_virtual_bad.v:35:12: Operator ASSIGN expected no interface modport on Assign RHS but got 'phy' modport.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    35 |       v8 = v8_phy;   
       |            ^~~~~~
 %Error: t/t_interface_virtual_bad.v:37:17: Operator ASSIGN expected non-interface on Assign RHS but 'p8__Viftop' is an interface.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    37 |       data = p8.phy;   
       |                 ^~~
 %Error: t/t_interface_virtual_bad.v:38:14: Operator ASSIGN expected non-interface on Assign RHS but 'v8_phy' is an interface.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    38 |       data = v8_phy;   
       |              ^~~~~~
 %Error: t/t_interface_virtual_bad.v:39:14: Operator ASSIGN expected non-interface on Assign RHS but 'v8' is an interface.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    39 |       data = v8;   
       |              ^~
 %Error: t/t_interface_virtual_bad.v:40:14: Operator ASSIGN expected non-interface on Assign RHS but 'p8__Viftop' is an interface.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    40 |       data = p8;   
       |              ^~
 %Error: t/t_interface_virtual_bad.v:41:12: Operator ASSIGN expected 'PBus' interface on Assign RHS but 'data' is not an interface.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    41 |       v8 = data;   
       |            ^~~~
 %Error: t/t_interface_virtual_bad.v:44:79: Member 'gran' not found in interface 'PBus'
-                                         : ... In instance t
+                                         : ... note: In instance 't'
                                          : ... Suggested alternative: 'grant'
    44 |       $display("q8.grant=", p8.grant, " v8.grant=", v8.grant, v8_phy.addr, v8.gran);
       |                                                                               ^~~~
diff --git a/test_regress/t/t_interface_wrong_bad.out b/test_regress/t/t_interface_wrong_bad.out
index d4694955a..ce767fc66 100644
--- a/test_regress/t/t_interface_wrong_bad.out
+++ b/test_regress/t/t_interface_wrong_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_interface_wrong_bad.v:32:8: Port 'foo_port' expects 'foo_intf' interface but pin connects 'bar_intf' interface
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    32 |       .foo_port (bar)
       |        ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_always_comb_bad.out b/test_regress/t/t_lint_always_comb_bad.out
index 10d0e1dfb..33157d657 100644
--- a/test_regress/t/t_lint_always_comb_bad.out
+++ b/test_regress/t/t_lint_always_comb_bad.out
@@ -1,19 +1,19 @@
 %Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:29:9: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'temp1'
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    29 |         temp1 = 'h0;
       |         ^~~~~
                     ... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
 %Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:31:9: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'temp1'
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    31 |         temp1 = (temp1_d1r - 'h1);
       |         ^~~~~
 %Warning-ALWCOMBORDER: t/t_lint_always_comb_bad.v:32:7: Always_comb variable driven after use: 'mid'
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    32 |       mid = (temp1_d1r == 'h0);   
       |       ^~~
                        ... Use "/* verilator lint_off ALWCOMBORDER */" and lint_on around source to disable this message.
 %Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:46:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'temp1_d1r'
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    46 |       temp1_d1r <= temp1;
       |       ^~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_always_comb_multidriven.out b/test_regress/t/t_lint_always_comb_multidriven.out
index e57a462a5..a9708f7f6 100644
--- a/test_regress/t/t_lint_always_comb_multidriven.out
+++ b/test_regress/t/t_lint_always_comb_multidriven.out
@@ -1,5 +1,5 @@
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:26:16: Variable written to in always_comb also written by other process (IEEE 1800-2017 9.2.2.2): 'out1'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:26:16: 
    26 |    always_comb out1 = d;   
       |                ^~~~
@@ -9,7 +9,7 @@
                       ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest
                       ... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:29:16: Variable written to in always_comb also written by other process (IEEE 1800-2017 9.2.2.2): 'out2'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:29:16: 
    29 |    always_comb out2 = 1'b0;   
       |                ^~~~
@@ -17,7 +17,7 @@
    28 |    assign out2 = d;
       |           ^~~~
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:32:11: Variable also written to in always_comb (IEEE 1800-2017 9.2.2.2): 'out3'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:32:11: 
    32 |    assign out3 = 1'b0;   
       |           ^~~~
@@ -25,7 +25,7 @@
    31 |    always_comb out3 = d;
       |                ^~~~
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:35:11: Variable also written to in always_comb (IEEE 1800-2017 9.2.2.2): 'out4'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:35:11: 
    35 |    assign out4 = d;   
       |           ^~~~
@@ -33,7 +33,7 @@
    34 |    always_comb out4 = 1'b0;
       |                ^~~~
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:38:16: Variable written to in always_comb also written by other process (IEEE 1800-2017 9.2.2.2): 'out5'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:38:16: 
    38 |    always_comb out5 = d;   
       |                ^~~~
@@ -41,7 +41,7 @@
    37 |    always_comb out5 = 1'b0;
       |                ^~~~
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:41:16: Variable written to in always_comb also written by other process (IEEE 1800-2017 9.2.2.2): 'out6'
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:41:16: 
    41 |    always_comb out6 = 1'b0;   
       |                ^~~~
@@ -49,7 +49,7 @@
    40 |    always_comb out6 = d;
       |                ^~~~
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:17:15: Bits [0:0] of signal 'out2' have multiple combinational drivers
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:28:16: ... Location of first driver
    28 |    assign out2 = d;
       |                ^
@@ -58,7 +58,7 @@
       |                     ^
                       t/t_lint_always_comb_multidriven.v:17:15: ... Only the first driver will be respected
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:19:15: Bits [0:0] of signal 'out4' have multiple combinational drivers
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:34:21: ... Location of first driver
    34 |    always_comb out4 = 1'b0;
       |                     ^
@@ -67,7 +67,7 @@
       |                ^
                       t/t_lint_always_comb_multidriven.v:19:15: ... Only the first driver will be respected
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:20:15: Bits [0:0] of signal 'out5' have multiple combinational drivers
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:37:21: ... Location of first driver
    37 |    always_comb out5 = 1'b0;
       |                     ^
@@ -76,7 +76,7 @@
       |                     ^
                       t/t_lint_always_comb_multidriven.v:20:15: ... Only the first driver will be respected
 %Warning-MULTIDRIVEN: t/t_lint_always_comb_multidriven.v:21:15: Bits [0:0] of signal 'out6' have multiple combinational drivers
-                                                              : ... In instance t
+                                                              : ... note: In instance 't'
                       t/t_lint_always_comb_multidriven.v:40:21: ... Location of first driver
    40 |    always_comb out6 = d;
       |                     ^
diff --git a/test_regress/t/t_lint_cmpconst_bad.out b/test_regress/t/t_lint_cmpconst_bad.out
index 39cb5e47c..cb994fb50 100644
--- a/test_regress/t/t_lint_cmpconst_bad.out
+++ b/test_regress/t/t_lint_cmpconst_bad.out
@@ -1,5 +1,5 @@
 %Warning-CMPCONST: t/t_lint_cmpconst_bad.v:13:15: Comparison is constant due to limited range
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    13 |       if (uns > 3'b111) $stop;
       |               ^
                    ... For warning description see https://verilator.org/warn/CMPCONST?v=latest
diff --git a/test_regress/t/t_lint_const_func_dpi_bad.out b/test_regress/t/t_lint_const_func_dpi_bad.out
index 6ac7d0ab6..329c5eeea 100644
--- a/test_regress/t/t_lint_const_func_dpi_bad.out
+++ b/test_regress/t/t_lint_const_func_dpi_bad.out
@@ -1,11 +1,11 @@
 %Error: t/t_lint_const_func_dpi_bad.v:8:32: Constant function may not be DPI import (IEEE 1800-2017 13.4.3)
-                                          : ... In instance t
+                                          : ... note: In instance 't'
     8 |    import "DPI-C" function int dpiFunc();
       |                                ^~~~~~~
 %Error: t/t_lint_const_func_dpi_bad.v:9:23: Expecting expression to be constant, but can't determine constant for FUNCREF 'dpiFunc'
-                                          : ... In instance t
+                                          : ... note: In instance 't'
         t/t_lint_const_func_dpi_bad.v:8:32: ... Location of non-constant FUNC 'dpiFunc': DPI import functions aren't simulatable
-        t/t_lint_const_func_dpi_bad.v:9:23: ... Called from dpiFunc() with parameters:
+        t/t_lint_const_func_dpi_bad.v:9:23: ... Called from 'dpiFunc()' with parameters:
     9 |    localparam PARAM = dpiFunc();
       |                       ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_const_func_gen_bad.out b/test_regress/t/t_lint_const_func_gen_bad.out
index 61bd870a8..0ff833ba1 100644
--- a/test_regress/t/t_lint_const_func_gen_bad.out
+++ b/test_regress/t/t_lint_const_func_gen_bad.out
@@ -1,11 +1,11 @@
 %Error: t/t_lint_const_func_gen_bad.v:11:30: Constant function may not be declared under generate (IEEE 1800-2017 13.4.3)
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    11 |       function automatic bit constFunc();
       |                              ^~~~~~~~~
 %Error: t/t_lint_const_func_gen_bad.v:15:26: Expecting expression to be constant, but can't determine constant for FUNCREF 'constFunc'
-                                           : ... In instance t
+                                           : ... note: In instance 't'
         t/t_lint_const_func_gen_bad.v:11:30: ... Location of non-constant FUNC 'constFunc': Constant function called under generate
-        t/t_lint_const_func_gen_bad.v:15:26: ... Called from constFunc() with parameters:
+        t/t_lint_const_func_gen_bad.v:15:26: ... Called from 'constFunc()' with parameters:
    15 |       localparam PARAM = constFunc();
       |                          ^~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_contassreg_bad.out b/test_regress/t/t_lint_contassreg_bad.out
index 4921a2787..21f3b5ec4 100644
--- a/test_regress/t/t_lint_contassreg_bad.out
+++ b/test_regress/t/t_lint_contassreg_bad.out
@@ -1,5 +1,5 @@
 %Error-CONTASSREG: t/t_lint_contassreg_bad.v:14:11: Continuous assignment to reg, perhaps intended wire (IEEE 1364-2005 6.1; Verilog only, legal in SV): 'r'
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    14 |    assign r = 1'b0;   
       |           ^
                    ... For error description see https://verilator.org/warn/CONTASSREG?v=latest
diff --git a/test_regress/t/t_lint_edge_real_bad.out b/test_regress/t/t_lint_edge_real_bad.out
index 6932b75ea..b9012194b 100644
--- a/test_regress/t/t_lint_edge_real_bad.out
+++ b/test_regress/t/t_lint_edge_real_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_lint_edge_real_bad.v:19:22: Edge event control not legal on real type (IEEE 1800-2017 6.12.1)
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    19 |    always @ (posedge rbad) $stop;
       |                      ^~~~
 %Error: t/t_lint_edge_real_bad.v:20:22: Edge event control not legal on non-integral type (IEEE 1800-2017 9.4.2)
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    20 |    always @ (posedge ebad) $stop;
       |                      ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_genunnamed_bad.out b/test_regress/t/t_lint_genunnamed_bad.out
index 2989ed1aa..09d2fe43b 100644
--- a/test_regress/t/t_lint_genunnamed_bad.out
+++ b/test_regress/t/t_lint_genunnamed_bad.out
@@ -1,21 +1,27 @@
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:14:6: Unnamed generate block 'genblk2' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:14:6: Unnamed generate block 'genblk2' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    14 |      begin
       |      ^~~~~
                      ... For warning description see https://verilator.org/warn/GENUNNAMED?v=latest
                      ... Use "/* verilator lint_off GENUNNAMED */" and lint_on around source to disable this message.
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:18:6: Unnamed generate block 'genblk2' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:18:6: Unnamed generate block 'genblk2' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    18 |      begin
       |      ^~~~~
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:22:4: Unnamed generate block 'genblk3' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:22:4: Unnamed generate block 'genblk3' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    22 |    for (genvar v = 0; v < P; ++v) ;
       |    ^~~
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:24:4: Unnamed generate block 'genblk4' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:24:4: Unnamed generate block 'genblk4' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    24 |    for (genvar v = 0; v < P; ++v)
       |    ^~~
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:30:9: Unnamed generate block 'genblk5' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:30:9: Unnamed generate block 'genblk5' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    30 |      1: initial begin end
       |         ^~~~~~~
-%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:31:9: Unnamed generate block 'genblk5' (IEEE 1800-2017 27.6)                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
+%Warning-GENUNNAMED: t/t_lint_genunnamed_bad.v:31:9: Unnamed generate block 'genblk5' (IEEE 1800-2017 27.6)
+                                                   : ... Suggest assign a label with 'begin : gen_<label_name>'
    31 |      2: begin
       |         ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_iface_array_topmodule_bad.out b/test_regress/t/t_lint_iface_array_topmodule_bad.out
index 6c0980c74..c71e24a5c 100644
--- a/test_regress/t/t_lint_iface_array_topmodule_bad.out
+++ b/test_regress/t/t_lint_iface_array_topmodule_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_lint_iface_array_topmodule_bad.v:8:24: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'DW'
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
     8 |      parameter integer DW
       |                        ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_iface_topmodule_bad.out b/test_regress/t/t_lint_iface_topmodule_bad.out
index b5263bb79..49cd039e9 100644
--- a/test_regress/t/t_lint_iface_topmodule_bad.out
+++ b/test_regress/t/t_lint_iface_topmodule_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_lint_iface_topmodule_bad.v:8:23: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'DW'
-                                           : ... In instance t
+                                           : ... note: In instance 't'
     8 |     parameter integer DW
       |                       ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_ifdepth_bad.out b/test_regress/t/t_lint_ifdepth_bad.out
index 01c910555..43e2eca53 100644
--- a/test_regress/t/t_lint_ifdepth_bad.out
+++ b/test_regress/t/t_lint_ifdepth_bad.out
@@ -1,5 +1,5 @@
 %Warning-IFDEPTH: t/t_lint_ifdepth_bad.v:22:12: Deep 'if' statement; suggest unique/priority to avoid slow logic
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    22 |       else if (value==11) begin end   
       |            ^~
                   ... For warning description see https://verilator.org/warn/IFDEPTH?v=latest
diff --git a/test_regress/t/t_lint_in_inc_bad.out b/test_regress/t/t_lint_in_inc_bad.out
index b643c6ad8..b151b87be 100644
--- a/test_regress/t/t_lint_in_inc_bad.out
+++ b/test_regress/t/t_lint_in_inc_bad.out
@@ -1,6 +1,6 @@
 %Error: t/t_lint_in_inc_bad_2.vh:9:7: syntax error, unexpected if, expecting '('
     9 |    if if if;
       |       ^~
-        t/t_lint_in_inc_bad_1.vh:8:1: ... note: In file included from t_lint_in_inc_bad_1.vh
-        t/t_lint_in_inc_bad.v:8:1: ... note: In file included from t_lint_in_inc_bad.v
+        t/t_lint_in_inc_bad_1.vh:8:1: ... note: In file included from 't_lint_in_inc_bad_1.vh'
+        t/t_lint_in_inc_bad.v:8:1: ... note: In file included from 't_lint_in_inc_bad.v'
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_infinite_bad.out b/test_regress/t/t_lint_infinite_bad.out
index 4599a677f..3a324846d 100644
--- a/test_regress/t/t_lint_infinite_bad.out
+++ b/test_regress/t/t_lint_infinite_bad.out
@@ -1,11 +1,11 @@
 %Warning-INFINITELOOP: t/t_lint_infinite_bad.v:10:7: Infinite loop (condition always true)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    10 |       forever begin end
       |       ^~~~~~~
                        ... For warning description see https://verilator.org/warn/INFINITELOOP?v=latest
                        ... Use "/* verilator lint_off INFINITELOOP */" and lint_on around source to disable this message.
 %Warning-INFINITELOOP: t/t_lint_infinite_bad.v:12:7: Infinite loop (condition always true)
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    12 |       for (reg [31:0] i=0; i>=0; i=i+1) begin end
       |       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_modport_dir_bad.out b/test_regress/t/t_lint_modport_dir_bad.out
index 976bcd3b1..4931bac79 100644
--- a/test_regress/t/t_lint_modport_dir_bad.out
+++ b/test_regress/t/t_lint_modport_dir_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_lint_modport_dir_bad.v:26:20: Attempt to drive input-only modport: 'signal'
-                                        : ... In instance t.sub
+                                        : ... note: In instance 't.sub'
    26 |    assign dummy_in.signal = signal_i;
       |                    ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_once_bad.out b/test_regress/t/t_lint_once_bad.out
index 2f4ffa38d..d6993b0f7 100644
--- a/test_regress/t/t_lint_once_bad.out
+++ b/test_regress/t/t_lint_once_bad.out
@@ -1,11 +1,11 @@
 %Warning-UNUSEDSIGNAL: t/t_lint_once_bad.v:19:14: Signal is not driven, nor used: 'unus1'
-                                                : ... In instance t.sub1
+                                                : ... note: In instance 't.sub1'
    19 |    reg [A:0] unus1;    reg [A:0] unus2;
       |              ^~~~~
                        ... For warning description see https://verilator.org/warn/UNUSEDSIGNAL?v=latest
                        ... Use "/* verilator lint_off UNUSEDSIGNAL */" and lint_on around source to disable this message.
 %Warning-UNUSEDSIGNAL: t/t_lint_once_bad.v:19:34: Signal is not driven, nor used: 'unus2'
-                                                : ... In instance t.sub1
+                                                : ... note: In instance 't.sub1'
    19 |    reg [A:0] unus1;    reg [A:0] unus2;
       |                                  ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_pragma_protected_bad.out b/test_regress/t/t_lint_pragma_protected_bad.out
index a19cc9826..dac9a4676 100644
--- a/test_regress/t/t_lint_pragma_protected_bad.out
+++ b/test_regress/t/t_lint_pragma_protected_bad.out
@@ -6,7 +6,7 @@
    16 | `pragma protect encrypt_agent_info
       |                 ^~~~~~~~~~~~~~~~~~
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:29:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:33:17: multiple `pragma protected encoding sections
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:33:17: Multiple `pragma protected encoding sections
    33 | `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:50:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
@@ -38,7 +38,7 @@
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:69:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 line too long in `pragma protect key_bloock/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: multiple `pragma protected encoding sections
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: Multiple `pragma protected encoding sections
    72 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: line_length must be multiple of 4 for BASE64
diff --git a/test_regress/t/t_lint_repeat_bad.out b/test_regress/t/t_lint_repeat_bad.out
index de1fa2a99..225cce27b 100644
--- a/test_regress/t/t_lint_repeat_bad.out
+++ b/test_regress/t/t_lint_repeat_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_lint_repeat_bad.v:18:17: Operator ASSIGNW expects 1 bits on the Assign RHS, but Assign RHS's VARREF 'a' generates 2 bits.
-                                                : ... In instance t.sub3
+                                                : ... note: In instance 't.sub3'
    18 |    wire [0:0] b = a;
       |                 ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_lint_restore_bad.out b/test_regress/t/t_lint_restore_bad.out
index 3f219f8e6..242414e49 100644
--- a/test_regress/t/t_lint_restore_bad.out
+++ b/test_regress/t/t_lint_restore_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_lint_restore_bad.v:19:17: Operator ASSIGN expects 5 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    19 |    initial five = 64'h1;
       |                 ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_lint_setout_bad.out b/test_regress/t/t_lint_setout_bad.out
index 19e21e7d3..143058185 100644
--- a/test_regress/t/t_lint_setout_bad.out
+++ b/test_regress/t/t_lint_setout_bad.out
@@ -1,5 +1,5 @@
 %Error-PORTSHORT: t/t_lint_setout_bad.v:17:8: Output port is connected to a constant pin, electrical short
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    17 |       .cpu_if_timeout(1'b0)
       |        ^~~~~~~~~~~~~~
                   ... For error description see https://verilator.org/warn/PORTSHORT?v=latest
diff --git a/test_regress/t/t_lint_setout_bad_noinl.out b/test_regress/t/t_lint_setout_bad_noinl.out
index 19e21e7d3..143058185 100644
--- a/test_regress/t/t_lint_setout_bad_noinl.out
+++ b/test_regress/t/t_lint_setout_bad_noinl.out
@@ -1,5 +1,5 @@
 %Error-PORTSHORT: t/t_lint_setout_bad.v:17:8: Output port is connected to a constant pin, electrical short
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    17 |       .cpu_if_timeout(1'b0)
       |        ^~~~~~~~~~~~~~
                   ... For error description see https://verilator.org/warn/PORTSHORT?v=latest
diff --git a/test_regress/t/t_lint_stmtdly_bad.out b/test_regress/t/t_lint_stmtdly_bad.out
index c91e37476..a028e83e0 100644
--- a/test_regress/t/t_lint_stmtdly_bad.out
+++ b/test_regress/t/t_lint_stmtdly_bad.out
@@ -1,5 +1,5 @@
 %Warning-STMTDLY: t/t_lint_stmtdly_bad.v:10:7: Ignoring delay on this statement due to --no-timing
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    10 |       #100 $finish;   
       |       ^
                   ... For warning description see https://verilator.org/warn/STMTDLY?v=latest
diff --git a/test_regress/t/t_lint_subout_bad.out b/test_regress/t/t_lint_subout_bad.out
index 846d5de89..fe1a91a4d 100644
--- a/test_regress/t/t_lint_subout_bad.out
+++ b/test_regress/t/t_lint_subout_bad.out
@@ -1,14 +1,14 @@
 %Error-PORTSHORT: t/t_lint_subout_bad.v:12:14: Output port is connected to a constant pin, electrical short
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    12 |    sub sub1(.out({32'b0, sig}));
       |              ^~~
                   ... For error description see https://verilator.org/warn/PORTSHORT?v=latest
 %Error-PORTSHORT: t/t_lint_subout_bad.v:13:14: Output port is connected to a constant pin, electrical short
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    13 |    sub sub2(.out({32'b1, sig}));
       |              ^~~
 %Error-PORTSHORT: t/t_lint_subout_bad.v:11:14: Output port is connected to a constant pin, electrical short
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    11 |    sub sub0(.out(33'b0));
       |              ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_unsigned_bad.out b/test_regress/t/t_lint_unsigned_bad.out
index 8f9d385b1..853b31f4f 100644
--- a/test_regress/t/t_lint_unsigned_bad.out
+++ b/test_regress/t/t_lint_unsigned_bad.out
@@ -1,5 +1,5 @@
 %Warning-UNSIGNED: t/t_lint_unsigned_bad.v:13:15: Comparison is constant due to unsigned arithmetic
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    13 |       if (uns < 0) $stop;
       |               ^
                    ... For warning description see https://verilator.org/warn/UNSIGNED?v=latest
diff --git a/test_regress/t/t_lint_unused_bad.out b/test_regress/t/t_lint_unused_bad.out
index 4c2025413..2632b7a97 100644
--- a/test_regress/t/t_lint_unused_bad.out
+++ b/test_regress/t/t_lint_unused_bad.out
@@ -1,63 +1,63 @@
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:17:15: Bits of signal are not used: 'assunu1'[5:1]
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    17 |    wire [5:0] assunu1 = 0;   
       |               ^~~~~~~
                        ... For warning description see https://verilator.org/warn/UNUSEDSIGNAL?v=latest
                        ... Use "/* verilator lint_off UNUSEDSIGNAL */" and lint_on around source to disable this message.
 %Warning-UNDRIVEN: t/t_lint_unused_bad.v:21:17: Bits of signal are not driven: 'udrb2'[14:13,11]
-                                              : ... In instance t.sub
+                                              : ... note: In instance 't.sub'
    21 |    wire [15:10] udrb2;   
       |                 ^~~~~
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:26:15: Signal is not driven, nor used: 'unu3'
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    26 |    wire       unu3;   
       |               ^~~~
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:28:15: Bits of signal are not driven, nor used: 'mixed'[3]
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    28 |    wire [3:0] mixed;   
       |               ^~~~~
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:28:15: Bits of signal are not used: 'mixed'[2]
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    28 |    wire [3:0] mixed;   
       |               ^~~~~
 %Warning-UNDRIVEN: t/t_lint_unused_bad.v:28:15: Bits of signal are not driven: 'mixed'[1]
-                                              : ... In instance t.sub
+                                              : ... note: In instance 't.sub'
    28 |    wire [3:0] mixed;   
       |               ^~~~~
 %Warning-UNUSEDPARAM: t/t_lint_unused_bad.v:37:14: Parameter is not used: 'UNUSED_P'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    37 |    parameter UNUSED_P = 1;
       |              ^~~~~~~~
 %Warning-UNUSEDPARAM: t/t_lint_unused_bad.v:38:15: Parameter is not used: 'UNUSED_LP'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    38 |    localparam UNUSED_LP = 2;
       |               ^~~~~~~~~
 %Warning-UNUSEDGENVAR: t/t_lint_unused_bad.v:40:15: Genvar is not used: 'unused_gv'
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    40 |    genvar     unused_gv;
       |               ^~~~~~~~~
 %Warning-UNUSEDPARAM: t/t_lint_unused_bad.v:45:15: Parameter is not used: 'linter_param1'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    45 |    localparam linter_param1 = 1;
       |               ^~~~~~~~~~~~~
 %Warning-UNUSEDGENVAR: t/t_lint_unused_bad.v:46:11: Genvar is not used: 'linter_genvar1'
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    46 |    genvar linter_genvar1;
       |           ^~~~~~~~~~~~~~
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:50:9: Signal is not driven, nor used: 'linter_sig2'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    50 |    wire linter_sig2;
       |         ^~~~~~~~~~~
 %Warning-UNUSEDGENVAR: t/t_lint_unused_bad.v:52:11: Genvar is not used: 'linter_genvar2'
-                                                  : ... In instance t.sub
+                                                  : ... note: In instance 't.sub'
    52 |    genvar linter_genvar2;
       |           ^~~~~~~~~~~~~~
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_bad.v:56:9: Signal is not driven, nor used: 'linter_sig3'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    56 |    wire linter_sig3;
       |         ^~~~~~~~~~~
 %Warning-UNUSEDPARAM: t/t_lint_unused_bad.v:57:15: Parameter is not used: 'linter_param3'
-                                                 : ... In instance t.sub
+                                                 : ... note: In instance 't.sub'
    57 |    localparam linter_param3 = 3;
       |               ^~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_unused_iface_bad.out b/test_regress/t/t_lint_unused_iface_bad.out
index ba0a9294e..2f073331d 100644
--- a/test_regress/t/t_lint_unused_iface_bad.out
+++ b/test_regress/t/t_lint_unused_iface_bad.out
@@ -1,11 +1,11 @@
 %Warning-UNDRIVEN: t/t_lint_unused_iface_bad.v:8:10: Signal is not driven: 'sig_udrv'
-                                                   : ... In instance t.sub
+                                                   : ... note: In instance 't.sub'
     8 |    logic sig_udrv;
       |          ^~~~~~~~
                    ... For warning description see https://verilator.org/warn/UNDRIVEN?v=latest
                    ... Use "/* verilator lint_off UNDRIVEN */" and lint_on around source to disable this message.
 %Warning-UNUSEDSIGNAL: t/t_lint_unused_iface_bad.v:9:10: Signal is not used: 'sig_uusd'
-                                                       : ... In instance t.sub
+                                                       : ... note: In instance 't.sub'
     9 |    logic sig_uusd;
       |          ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_vcmarker_bad.out b/test_regress/t/t_lint_vcmarker_bad.out
index 944368358..c086394e3 100644
--- a/test_regress/t/t_lint_vcmarker_bad.out
+++ b/test_regress/t/t_lint_vcmarker_bad.out
@@ -1,10 +1,10 @@
-%Error: t/t_lint_vcmarker_bad.v:9:1: version control conflict marker in file
+%Error: t/t_lint_vcmarker_bad.v:9:1: Version control conflict marker in file
     9 | <<<<<<< HEAD   
       | ^~~~~~~~~~~~~~~
-%Error: t/t_lint_vcmarker_bad.v:11:1: version control conflict marker in file
+%Error: t/t_lint_vcmarker_bad.v:11:1: Version control conflict marker in file
    11 | =======    
       | ^~~~~~~~~~~
-%Error: t/t_lint_vcmarker_bad.v:13:1: version control conflict marker in file
+%Error: t/t_lint_vcmarker_bad.v:13:1: Version control conflict marker in file
    13 | >>>>>>> MERGE   
       | ^~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_width_bad.out b/test_regress/t/t_lint_width_bad.out
index dc841f05d..1237949e3 100644
--- a/test_regress/t/t_lint_width_bad.out
+++ b/test_regress/t/t_lint_width_bad.out
@@ -1,47 +1,47 @@
 %Warning-WIDTHTRUNC: t/t_lint_width_bad.v:17:25: Operator VAR 'XS' expects 4 bits on the Initial value, but Initial value's CONST '?32?bxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx' generates 32 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    17 |    localparam [3:0]     XS = 'hx;   
       |                         ^~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:47:19: Operator ASSIGNW expects 5 bits on the Assign RHS, but Assign RHS's VARREF 'in' generates 4 bits.
-                                                : ... In instance t.p4
+                                                : ... note: In instance 't.p4'
    47 |    wire [4:0] out = in;
       |                   ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:21:25: Operator SHIFTL expects 5 bits on the LHS, but LHS's CONST '1'h1' generates 1 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    21 |    wire [4:0] d = (1'b1 << 2) + 5'b1;   
       |                         ^~
 %Warning-WIDTHTRUNC: t/t_lint_width_bad.v:27:32: Operator ASSIGNW expects 6 bits on the Assign RHS, but Assign RHS's SHIFTL generates 7 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    27 |    wire [WIDTH-1:0]     masked = (({{(WIDTH){1'b0}}, one_bit}) << shifter);
       |                                ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:32:37: Operator ADD expects 3 bits on the LHS, but LHS's VARREF 'one' generates 1 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    32 |    wire [2:0]           cnt  = (one + one + one + one);
       |                                     ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:32:37: Operator ADD expects 3 bits on the RHS, but RHS's VARREF 'one' generates 1 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    32 |    wire [2:0]           cnt  = (one + one + one + one);
       |                                     ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:32:43: Operator ADD expects 3 bits on the RHS, but RHS's VARREF 'one' generates 1 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    32 |    wire [2:0]           cnt  = (one + one + one + one);
       |                                           ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:32:49: Operator ADD expects 3 bits on the RHS, but RHS's VARREF 'one' generates 1 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    32 |    wire [2:0]           cnt  = (one + one + one + one);
       |                                                 ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:37:26: Operator GT expects 41 bits on the LHS, but LHS's VARREF 'a' generates 32 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    37 |    initial for (a = 0; a > THREE; ++a) $display(a);
       |                          ^
 %Warning-WIDTHEXPAND: t/t_lint_width_bad.v:38:26: Operator GTE expects 41 bits on the LHS, but LHS's VARREF 'a' generates 32 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    38 |    initial for (a = 0; a >= THREE; ++a) $display(a);
       |                          ^~
 %Warning-WIDTHTRUNC: t/t_lint_width_bad.v:40:12: Logical operator IF expects 1 bit on the If, but If's VARREF 'THREE' generates 41 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    40 |    initial if (THREE) $stop;
       |            ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_width_genfor_bad.out b/test_regress/t/t_lint_width_genfor_bad.out
index 4e672b104..f3eee67d3 100644
--- a/test_regress/t/t_lint_width_genfor_bad.out
+++ b/test_regress/t/t_lint_width_genfor_bad.out
@@ -1,23 +1,23 @@
 %Warning-WIDTHTRUNC: t/t_lint_width_genfor_bad.v:25:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's CONST '?32?sh10' generates 32 or 5 bits.
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    25 |          rg = g;   
       |             ^
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Warning-WIDTHTRUNC: t/t_lint_width_genfor_bad.v:26:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's VARREF 'P' generates 32 or 5 bits.
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    26 |          rp = P;   
       |             ^
 %Warning-WIDTHTRUNC: t/t_lint_width_genfor_bad.v:27:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's VARREF 'w' generates 5 bits.
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    27 |          rw = w;   
       |             ^
 %Warning-WIDTHTRUNC: t/t_lint_width_genfor_bad.v:28:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    28 |          rc = 64'h1;   
       |             ^
 %Warning-WIDTHTRUNC: t/t_lint_width_genfor_bad.v:33:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's VARREF 'i' generates 32 bits.
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    33 |          ri = i;   
       |             ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_widthexpand_docs_bad.out b/test_regress/t/t_lint_widthexpand_docs_bad.out
index 241fa51ce..8af03b587 100644
--- a/test_regress/t/t_lint_widthexpand_docs_bad.out
+++ b/test_regress/t/t_lint_widthexpand_docs_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHEXPAND: t/t_lint_widthexpand_docs_bad.v:10:29: Bit extraction of array[4:0] requires 3 bit index, not 2 bits.
-                                                           : ... In instance t
+                                                           : ... note: In instance 't'
    10 |    wire int rd_value = array[rd_addr];   
       |                             ^
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
diff --git a/test_regress/t/t_mailbox_bad.out b/test_regress/t/t_mailbox_bad.out
index 3ef286864..bf7e85b52 100644
--- a/test_regress/t/t_mailbox_bad.out
+++ b/test_regress/t/t_mailbox_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_mailbox_bad.v:12:13: Class method 'bad_method' not found in class 'mailbox__Tz1'
-                               : ... In instance t
+                               : ... note: In instance 't'
    12 |       if (m.bad_method() != 0) $stop;
       |             ^~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_math_eq_bad.out b/test_regress/t/t_math_eq_bad.out
index d428d8f50..1eaf134bc 100644
--- a/test_regress/t/t_math_eq_bad.out
+++ b/test_regress/t/t_math_eq_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_math_eq_bad.v:13:13: Real is illegal operand to ?== operator
-                               : ... In instance t
+                               : ... note: In instance 't'
    13 |       if (a ==? 1.0) $stop;   
       |             ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_math_repl2_bad.out b/test_regress/t/t_math_repl2_bad.out
index 5d3ff0d0d..5e4e76690 100644
--- a/test_regress/t/t_math_repl2_bad.out
+++ b/test_regress/t/t_math_repl2_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_math_repl2_bad.v:28:30: More than a 16 Mbit replication, perhaps the replication factor was two's-complement negative: 4294967291
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    28 |          out <= {{(P24 - P29){1'b0}}, in};
       |                              ^
 %Error: Internal Error: ../V3Number.h:#: `num` member accessed when data type is UNINITIALIZED
diff --git a/test_regress/t/t_math_repl_bad.out b/test_regress/t/t_math_repl_bad.out
index 34fc9e4f8..d39d2f109 100644
--- a/test_regress/t/t_math_repl_bad.out
+++ b/test_regress/t/t_math_repl_bad.out
@@ -1,19 +1,19 @@
 %Error: t/t_math_repl_bad.v:12:14: Replication value of 0 is only legal under a concatenation (IEEE 1800-2017 11.4.12.1)
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    12 |       o = {0 {1'b1}};   
       |              ^
 %Warning-WIDTHEXPAND: t/t_math_repl_bad.v:12:9: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's REPLICATE generates 1 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    12 |       o = {0 {1'b1}};   
       |         ^
                       ... For warning description see https://verilator.org/warn/WIDTHEXPAND?v=latest
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Error: t/t_math_repl_bad.v:13:43: Replication value isn't a constant.
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    13 |       o = {$test$plusargs("NON-CONSTANT") {1'b1}};   
       |                                           ^
 %Warning-WIDTHEXPAND: t/t_math_repl_bad.v:13:9: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's REPLICATE generates 1 bits.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    13 |       o = {$test$plusargs("NON-CONSTANT") {1'b1}};   
       |         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_math_shift_over_bad.out b/test_regress/t/t_math_shift_over_bad.out
index b731354e6..09004172d 100644
--- a/test_regress/t/t_math_shift_over_bad.out
+++ b/test_regress/t/t_math_shift_over_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_math_shift_over_bad.v:19:20: Value too wide for 32-bits expected in this context 64'h123456789abcdef
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    19 |    assign o = i << 64'h01234567_89abcdef;
       |                    ^~~~~~~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_mem_multi_ref_bad.out b/test_regress/t/t_mem_multi_ref_bad.out
index 8a43b779e..83bce0b5f 100644
--- a/test_regress/t/t_mem_multi_ref_bad.out
+++ b/test_regress/t/t_mem_multi_ref_bad.out
@@ -1,39 +1,39 @@
 %Error: t/t_mem_multi_ref_bad.v:15:11: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    15 |       dimn[1:0] = 0;             
       |           ^
 %Warning-SELRANGE: t/t_mem_multi_ref_bad.v:15:11: Extracting 2 bits from only 1 bit number
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    15 |       dimn[1:0] = 0;             
       |           ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
                    ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.
 %Error: t/t_mem_multi_ref_bad.v:16:14: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    16 |       dim0[1][1] = 0;            
       |              ^
 %Warning-SELRANGE: t/t_mem_multi_ref_bad.v:16:14: Selection index out of range: 1:1 outside 0:0
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    16 |       dim0[1][1] = 0;            
       |              ^
 %Error: t/t_mem_multi_ref_bad.v:17:17: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    17 |       dim1[1][1][1] = 0;         
       |                 ^
 %Warning-SELRANGE: t/t_mem_multi_ref_bad.v:17:17: Selection index out of range: 1:1 outside 0:0
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    17 |       dim1[1][1][1] = 0;         
       |                 ^
 %Warning-SELRANGE: t/t_mem_multi_ref_bad.v:19:19: Selection index out of range: 1 outside 0:0
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    19 |       dim2[0 +: 1][1] = 0;       
       |                   ^
 %Error: t/t_mem_multi_ref_bad.v:23:16: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    23 |       dim0nv[1][1] = 0;          
       |                ^
 %Warning-SELRANGE: t/t_mem_multi_ref_bad.v:23:16: Selection index out of range: 1:1 outside 0:0
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    23 |       dim0nv[1][1] = 0;          
       |                ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_mem_slice_bad.out b/test_regress/t/t_mem_slice_bad.out
index 35f165b59..b8ee9429c 100644
--- a/test_regress/t/t_mem_slice_bad.out
+++ b/test_regress/t/t_mem_slice_bad.out
@@ -1,25 +1,25 @@
 %Error: t/t_mem_slice_bad.v:39:31: Slice selection index '[2:0]' outside data type's '[1:0]'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    39 |    assign active_command3[1:0][2:0][3:0] = (use_AnB) ?  command_A3[1:0][2:0][3:0] : command_B3[1:0][1:0][3:0];
       |                               ^
 %Error: t/t_mem_slice_bad.v:39:36: Slice selection index '[3:0]' outside data type's '[2:0]'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    39 |    assign active_command3[1:0][2:0][3:0] = (use_AnB) ?  command_A3[1:0][2:0][3:0] : command_B3[1:0][1:0][3:0];
       |                                    ^
 %Error: t/t_mem_slice_bad.v:39:72: Slice selection index '[2:0]' outside data type's '[1:0]'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    39 |    assign active_command3[1:0][2:0][3:0] = (use_AnB) ?  command_A3[1:0][2:0][3:0] : command_B3[1:0][1:0][3:0];
       |                                                                        ^
 %Error: t/t_mem_slice_bad.v:39:77: Slice selection index '[3:0]' outside data type's '[2:0]'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    39 |    assign active_command3[1:0][2:0][3:0] = (use_AnB) ?  command_A3[1:0][2:0][3:0] : command_B3[1:0][1:0][3:0];
       |                                                                             ^
 %Error: t/t_mem_slice_bad.v:39:105: Slice selection index '[3:0]' outside data type's '[1:0]'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    39 |    assign active_command3[1:0][2:0][3:0] = (use_AnB) ?  command_A3[1:0][2:0][3:0] : command_B3[1:0][1:0][3:0];
       |                                                                                                         ^
 %Error: t/t_mem_slice_bad.v:51:41: Slice selection index '[8:0]' outside data type's '[7:0]'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    51 |       active_command4[7:0] <= command_A4[8:0];
       |                                         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_metacmt_onoff.out b/test_regress/t/t_metacmt_onoff.out
index 7b912780c..1c8f60b7c 100644
--- a/test_regress/t/t_metacmt_onoff.out
+++ b/test_regress/t/t_metacmt_onoff.out
@@ -1,11 +1,11 @@
 %Warning-ASCRANGE: t/t_metacmt_onoff.v:8:8: Ascending bit range vector: left < right of bit range: [0:1]
-                                          : ... In instance t
+                                          : ... note: In instance 't'
     8 |    reg [0:1] show1; /*verilator lint_off ASCRANGE*/  reg [0:2] ign2; /*verilator lint_on ASCRANGE*/   reg [0:3] show3;
       |        ^
                    ... For warning description see https://verilator.org/warn/ASCRANGE?v=latest
                    ... Use "/* verilator lint_off ASCRANGE */" and lint_on around source to disable this message.
 %Warning-ASCRANGE: t/t_metacmt_onoff.v:8:107: Ascending bit range vector: left < right of bit range: [0:3]
-                                            : ... In instance t
+                                            : ... note: In instance 't'
     8 |    reg [0:1] show1; /*verilator lint_off ASCRANGE*/  reg [0:2] ign2; /*verilator lint_on ASCRANGE*/   reg [0:3] show3;
       |                                                                                                           ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_net_delay.out b/test_regress/t/t_net_delay.out
index d812684ed..be7a665b1 100644
--- a/test_regress/t/t_net_delay.out
+++ b/test_regress/t/t_net_delay.out
@@ -1,15 +1,15 @@
 %Warning-STMTDLY: t/t_net_delay.v:15:14: Ignoring delay on this statement due to --no-timing
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    15 |    wire[3:0] #4 val1 = half_cyc;
       |              ^
                   ... For warning description see https://verilator.org/warn/STMTDLY?v=latest
                   ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
 %Warning-STMTDLY: t/t_net_delay.v:16:14: Ignoring delay on this statement due to --no-timing
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    16 |    wire[3:0] #4 val2;
       |              ^
 %Warning-ASSIGNDLY: t/t_net_delay.v:19:11: Ignoring timing control on this assignment/primitive due to --no-timing
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    19 |    assign #4 val2 = half_cyc;
       |           ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_notiming.out b/test_regress/t/t_notiming.out
index e12212acd..3819b82b6 100644
--- a/test_regress/t/t_notiming.out
+++ b/test_regress/t/t_notiming.out
@@ -1,49 +1,49 @@
 %Warning-STMTDLY: t/t_notiming.v:12:8: Ignoring delay on this statement due to --no-timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    12 |        #1
       |        ^
                   ... For warning description see https://verilator.org/warn/STMTDLY?v=latest
                   ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
 %Error-NOTIMING: t/t_notiming.v:13:8: Fork statements require --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    13 |        fork @e; @e; join;
       |        ^~~~
 %Error-NOTIMING: t/t_notiming.v:14:8: Event control statement in this location requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
                                     : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    14 |        @e
       |        ^
 %Error-NOTIMING: t/t_notiming.v:15:8: Wait statements require --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    15 |        wait(x == 4)
       |        ^~~~
 %Error-NOTIMING: t/t_notiming.v:19:8: Event control statement in this location requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
                                     : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    19 |        @e
       |        ^
 %Warning-STMTDLY: t/t_notiming.v:26:12: Ignoring delay on this statement due to --no-timing
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    26 |    initial #1 ->e;
       |            ^
 %Warning-STMTDLY: t/t_notiming.v:27:12: Ignoring delay on this statement due to --no-timing
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    27 |    initial #2 $stop;  
       |            ^
 %Error-NOTIMING: t/t_notiming.v:33:10: mailbox::put() requires --timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    33 |        m.put(i);
       |          ^~~
 %Error-NOTIMING: t/t_notiming.v:34:10: mailbox::get() requires --timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    34 |        m.get(i);
       |          ^~~
 %Error-NOTIMING: t/t_notiming.v:35:10: mailbox::peek() requires --timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    35 |        m.peek(i);
       |          ^~~~
 %Error-NOTIMING: t/t_notiming.v:36:10: semaphore::get() requires --timing
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    36 |        s.get();
       |          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_notiming_off.out b/test_regress/t/t_notiming_off.out
index 72c86fd65..78ba91da6 100644
--- a/test_regress/t/t_notiming_off.out
+++ b/test_regress/t/t_notiming_off.out
@@ -1,29 +1,29 @@
 %Error-NOTIMING: t/t_timing_off.v:25:8: Event control statement in this location requires --timing
-                                      : ... In instance t
+                                      : ... note: In instance 't'
                                       : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    25 |        @e1;
       |        ^
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
 %Warning-STMTDLY: t/t_timing_off.v:33:12: Ignoring delay on this statement due to --no-timing
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    33 |    initial #2 ->e1;
       |            ^
                   ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
 %Warning-STMTDLY: t/t_timing_off.v:37:12: Ignoring delay on this statement due to --no-timing
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    37 |    initial #3 $stop;  
       |            ^
 %Warning-STMTDLY: t/t_timing_off.v:38:12: Ignoring delay on this statement due to --no-timing
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |            ^
 %Error-NOTIMING: t/t_timing_off.v:38:15: Event control statement in this location requires --timing
-                                       : ... In instance t
+                                       : ... note: In instance 't'
                                        : ... With --no-timing, suggest have one event control statement per procedure, at the top of the procedure
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |               ^
 %Warning-STMTDLY: t/t_timing_off.v:38:25: Ignoring delay on this statement due to --no-timing
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |                         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_packed_concat_bad.out b/test_regress/t/t_packed_concat_bad.out
index 559a8c1ca..c508f1635 100644
--- a/test_regress/t/t_packed_concat_bad.out
+++ b/test_regress/t/t_packed_concat_bad.out
@@ -1,15 +1,15 @@
 %Warning-WIDTHCONCAT: t/t_packed_concat_bad.v:17:47: Unsized numbers/parameters not allowed in replications.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    17 |    localparam bit_int_t [1:0] count_bits = {2{$bits(count_t)}};
       |                                               ^~~~~
                       ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
                       ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
 %Warning-WIDTHCONCAT: t/t_packed_concat_bad.v:18:46: Unsized numbers/parameters not allowed in concatenations.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    18 |    localparam bit_int_t [1:0] count_bitsc = {$bits(count_t), $bits(count_t)};
       |                                              ^~~~~
 %Warning-WIDTHCONCAT: t/t_packed_concat_bad.v:18:60: Unsized numbers/parameters not allowed in replications.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    18 |    localparam bit_int_t [1:0] count_bitsc = {$bits(count_t), $bits(count_t)};
       |                                                            ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_circ_bad.out b/test_regress/t/t_param_circ_bad.out
index ce70ca9d9..bc052c47e 100644
--- a/test_regress/t/t_param_circ_bad.out
+++ b/test_regress/t/t_param_circ_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_param_circ_bad.v:11:43: Variable's initial value is circular: 'X'
-                                  : ... In instance t.sub
+                                  : ... note: In instance 't.sub'
    11 | module sub #(parameter WIDTH=X, parameter X=WIDTH)
       |                                           ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_concat_bad.out b/test_regress/t/t_param_concat_bad.out
index 008022682..87b78c550 100644
--- a/test_regress/t/t_param_concat_bad.out
+++ b/test_regress/t/t_param_concat_bad.out
@@ -1,15 +1,15 @@
 %Warning-WIDTHCONCAT: t/t_param_concat.v:19:15: Unsized numbers/parameters not allowed in concatenations.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    19 |          if ({UNSIZED,UNSIZED+1} != {32'd10, 32'd11}) $stop;
       |               ^~~~~~~
                       ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=latest
                       ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message.
 %Warning-WIDTHCONCAT: t/t_param_concat.v:19:22: Unsized numbers/parameters not allowed in replications.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    19 |          if ({UNSIZED,UNSIZED+1} != {32'd10, 32'd11}) $stop;
       |                      ^
 %Warning-WIDTHCONCAT: t/t_param_concat.v:20:17: Unsized numbers/parameters not allowed in replications.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    20 |          if ({2{UNSIZED}} != {32'd10, 32'd10}) $stop;
       |                 ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_default_bad.out b/test_regress/t/t_param_default_bad.out
index 630da39db..a31068bf2 100644
--- a/test_regress/t/t_param_default_bad.out
+++ b/test_regress/t/t_param_default_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_param_default_bad.v:7:26: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'Foo'
-                                    : ... In instance t.foo
+                                    : ... note: In instance 't.foo'
     7 | module m #(parameter int Foo);
       |                          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_default_presv_bad.out b/test_regress/t/t_param_default_presv_bad.out
index 1e86bff74..eba93507a 100644
--- a/test_regress/t/t_param_default_presv_bad.out
+++ b/test_regress/t/t_param_default_presv_bad.out
@@ -4,7 +4,7 @@
                    ... For warning description see https://verilator.org/warn/NEWERSTD?v=latest
                    ... Use "/* verilator lint_off NEWERSTD */" and lint_on around source to disable this message.
 %Error: t/t_param_default_bad.v:7:26: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'Foo'
-                                    : ... In instance t.foo
+                                    : ... note: In instance 't.foo'
     7 | module m #(parameter int Foo);
       |                          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_noval_bad.out b/test_regress/t/t_param_noval_bad.out
index ff5b9a48f..31ce3ad64 100644
--- a/test_regress/t/t_param_noval_bad.out
+++ b/test_regress/t/t_param_noval_bad.out
@@ -1,30 +1,30 @@
 %Error: t/t_param_noval_bad.v:7:22: Parameter without initial value is never given value (IEEE 1800-2017 6.20.1): 'P'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
     7 | module t #(parameter P);
       |                      ^
 %Warning-WIDTHTRUNC: t/t_param_noval_bad.v:10:7: Logical operator GENFOR expects 1 bit on the For Test Condition, but For Test Condition's VARREF 'P' generates 32 bits.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Error: t/t_param_noval_bad.v:10:7: Non-genvar used in generate for: 'j'
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
 %Error: t/t_param_noval_bad.v:10:7: Loop unrolling failed.
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
 %Error-UNSUPPORTED: t/t_param_noval_bad.v:10:7: Unsupported: Can't unroll generate for; Unable to unroll loop
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
 %Error: t/t_param_noval_bad.v:10:7: For loop doesn't have genvar index, or is malformed
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
 %Error: Internal Error: t/t_param_noval_bad.v:10:7: ../V3Param.cpp:#: GENFOR should have been wrapped in BEGIN
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    10 |       for (j=0; P; j++)
       |       ^~~
diff --git a/test_regress/t/t_param_sel_range_bad.out b/test_regress/t/t_param_sel_range_bad.out
index 9316728ba..64fa2b82f 100644
--- a/test_regress/t/t_param_sel_range_bad.out
+++ b/test_regress/t/t_param_sel_range_bad.out
@@ -1,5 +1,5 @@
 %Warning-SELRANGE: t/t_param_sel_range.v:43:35: Selection index out of range: 7:7 outside 4:0
-                                              : ... In instance t.u2
+                                              : ... note: In instance 't.u2'
    43 |                  r_rst[i] <= r_rst[i-1];   
       |                                   ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
diff --git a/test_regress/t/t_param_type_bad2.out b/test_regress/t/t_param_type_bad2.out
index 9d199c249..b1b6448c7 100644
--- a/test_regress/t/t_param_type_bad2.out
+++ b/test_regress/t/t_param_type_bad2.out
@@ -1,9 +1,9 @@
 %Error: t/t_param_type_bad2.v:8:19: Operator VAR 't' expected non-datatype Initial value but 'logic' is a datatype.
-                                  : ... In instance t
+                                  : ... note: In instance 't'
     8 |    localparam t = logic;   
       |                   ^~~~~
 %Error: t/t_param_type_bad2.v:9:20: Operator VAR 't2' expected non-datatype Initial value but 'real' is a datatype.
-                                  : ... In instance t
+                                  : ... note: In instance 't'
     9 |    localparam t2 = realtime;   
       |                    ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_width_loc_bad.out b/test_regress/t/t_param_width_loc_bad.out
index 3905343e9..985c3ddca 100644
--- a/test_regress/t/t_param_width_loc_bad.out
+++ b/test_regress/t/t_param_width_loc_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_param_width_loc_bad.v:25:21: Operator VAR 'param' expects 1 bits on the Initial value, but Initial value's CONST '32'h0' generates 32 bits.
-                                                    : ... In instance t.test_i
+                                                    : ... note: In instance 't.test_i'
    25 |     parameter logic param = 1'b0
       |                     ^~~~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_past_bad.out b/test_regress/t/t_past_bad.out
index f1e1ea1b8..69a981f05 100644
--- a/test_regress/t/t_past_bad.out
+++ b/test_regress/t/t_past_bad.out
@@ -1,17 +1,17 @@
 %Error: t/t_past_bad.v:16:20: Expecting expression to be constant, but variable isn't const: 'num'
-                            : ... In instance t
+                            : ... note: In instance 't'
    16 |       if ($past(d, num)) $stop;   
       |                    ^~~
 %Error: t/t_past_bad.v:16:11: $past tick value must be constant (IEEE 1800-2017 16.9.3)
-                            : ... In instance t
+                            : ... note: In instance 't'
    16 |       if ($past(d, num)) $stop;   
       |           ^~~~~
 %Error: t/t_past_bad.v:17:20: $past tick value must be >= 1 (IEEE 1800-2017 16.9.3)
-                            : ... In instance t
+                            : ... note: In instance 't'
    17 |       if ($past(d, 0)) $stop;   
       |                    ^
 %Warning-TICKCOUNT: t/t_past_bad.v:18:20: $past tick value of 10000 may have a large performance cost
-                                        : ... In instance t
+                                        : ... note: In instance 't'
    18 |       if ($past(d, 10000)) $stop;   
       |                    ^~~~~
                     ... For warning description see https://verilator.org/warn/TICKCOUNT?v=latest
diff --git a/test_regress/t/t_pp_line_bad.out b/test_regress/t/t_pp_line_bad.out
index 15958d5ff..062cbf6af 100644
--- a/test_regress/t/t_pp_line_bad.out
+++ b/test_regress/t/t_pp_line_bad.out
@@ -9,5 +9,5 @@
     7 | `line
       | ^~~~~
 %Error: somefile:100:1: `line was not properly formed with '`line number "filename" level'
-        t/t_pp_line_bad.v:101:1: ... note: In file included from t_pp_line_bad.v
+        t/t_pp_line_bad.v:101:1: ... note: In file included from 't_pp_line_bad.v'
 %Error: Exiting due to
diff --git a/test_regress/t/t_preproc_inc_bad.out b/test_regress/t/t_preproc_inc_bad.out
index b03e7f868..006f0ec09 100644
--- a/test_regress/t/t_preproc_inc_bad.out
+++ b/test_regress/t/t_preproc_inc_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_preproc_inc_inc_bad.vh:11:1: syntax error, unexpected endmodule, expecting IDENTIFIER or randomize
    11 | endmodule
       | ^~~~~~~~~
-        t/t_preproc_inc_bad.v:10:1: ... note: In file included from t_preproc_inc_bad.v
+        t/t_preproc_inc_bad.v:10:1: ... note: In file included from 't_preproc_inc_bad.v'
 %Error: Exiting due to
diff --git a/test_regress/t/t_process_bad.out b/test_regress/t/t_process_bad.out
index 0c696d1d4..0665a79e0 100644
--- a/test_regress/t/t_process_bad.out
+++ b/test_regress/t/t_process_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_process_bad.v:13:13: Class method 'bad_method' not found in class 'process'
-                               : ... In instance t
+                               : ... note: In instance 't'
    13 |       if (p.bad_method() != 0) $stop;
       |             ^~~~~~~~~~
 %Error: t/t_process_bad.v:15:9: Class method 'bad_method_2' not found in class 'process'
-                              : ... In instance t
+                              : ... note: In instance 't'
    15 |       p.bad_method_2();
       |         ^~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_process_notiming.out b/test_regress/t/t_process_notiming.out
index 833040f13..b3934ae0b 100644
--- a/test_regress/t/t_process_notiming.out
+++ b/test_regress/t/t_process_notiming.out
@@ -1,54 +1,54 @@
 %Error-NOTIMING: t/t_process.v:26:20: process::self() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    26 |       p = process::self();
       |                    ^~~~
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
 %Error-NOTIMING: t/t_process.v:27:13: process::status() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    27 |       if (p.status() != process::RUNNING) $stop;
       |             ^~~~~~
 %Error-NOTIMING: t/t_process.v:28:13: process::status() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    28 |       if (p.status() == process::WAITING) $stop;
       |             ^~~~~~
 %Error-NOTIMING: t/t_process.v:29:13: process::status() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    29 |       if (p.status() == process::SUSPENDED) $stop;
       |             ^~~~~~
 %Error-NOTIMING: t/t_process.v:30:13: process::status() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    30 |       if (p.status() == process::KILLED) $stop;
       |             ^~~~~~
 %Error-NOTIMING: t/t_process.v:31:13: process::status() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    31 |       if (p.status() == process::FINISHED) $stop;
       |             ^~~~~~
 %Error-NOTIMING: t/t_process.v:33:16: process::kill() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    33 |       if (0) p.kill();
       |                ^~~~
 %Error-NOTIMING: t/t_process.v:34:16: process::await() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    34 |       if (0) p.await();
       |                ^~~~~
 %Error-NOTIMING: t/t_process.v:35:16: process::suspend() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    35 |       if (0) p.suspend();
       |                ^~~~~~~
 %Error-NOTIMING: t/t_process.v:36:16: process::resume() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    36 |       if (0) p.resume();
       |                ^~~~~~
 %Error-NOTIMING: t/t_process.v:38:9: process::srandom() requires --timing
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    38 |       p.srandom(0);
       |         ^~~~~~~
 %Error-NOTIMING: t/t_process.v:39:25: process::get_randstate() requires --timing
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    39 |       p.set_randstate(p.get_randstate());
       |                         ^~~~~~~~~~~~~
 %Error-NOTIMING: t/t_process.v:39:9: process::set_randstate() requires --timing
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    39 |       p.set_randstate(p.get_randstate());
       |         ^~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_queue_empty_bad.out b/test_regress/t/t_queue_empty_bad.out
index a9762673b..c8fe1528e 100644
--- a/test_regress/t/t_queue_empty_bad.out
+++ b/test_regress/t/t_queue_empty_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_queue_empty_bad.v:11:11: Unsupported/Illegal: empty queue ('{}') in this context
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    11 |       i = {} + 1;
       |           ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_queue_empty_bad.v:13:9: Unsupported/Illegal: empty queue ('{}') in this assign context
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    13 |       i = {};
       |         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_queue_method3_bad.out b/test_regress/t/t_queue_method3_bad.out
index 4beb3e580..ca32b617d 100644
--- a/test_regress/t/t_queue_method3_bad.out
+++ b/test_regress/t/t_queue_method3_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_queue_method3_bad.v:16:52: Unsupported: Member call on object 'SEL' which is a 'BASICDTYPE 'int''
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    16 |       points_qv = points_q.find_first(a) with (a.x.index == 0);
       |                                                    ^~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: Internal Error: t/t_queue_method3_bad.v:16:58: ../V3Width.cpp:#: Node has no type
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
    16 |       points_qv = points_q.find_first(a) with (a.x.index == 0);
       |                                                          ^~
                         ... See the manual at https://verilator.org/verilator_doc.html for more assistance.
diff --git a/test_regress/t/t_queue_method_bad.out b/test_regress/t/t_queue_method_bad.out
index 64de372f9..db03af9f0 100644
--- a/test_regress/t/t_queue_method_bad.out
+++ b/test_regress/t/t_queue_method_bad.out
@@ -1,37 +1,37 @@
 %Error: t/t_queue_method_bad.v:15:9: The 1 arguments passed to .reverse method does not match its requiring 0 arguments
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    15 |       q.reverse(1);   
       |         ^~~~~~~
 %Error: t/t_queue_method_bad.v:16:9: The 1 arguments passed to .shuffle method does not match its requiring 0 arguments
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    16 |       q.shuffle(1);   
       |         ^~~~~~~
 %Error: t/t_queue_method_bad.v:17:14: 'with' statement is required for .find method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    17 |       qv = q.find;   
       |              ^~~~
 %Error: t/t_queue_method_bad.v:18:14: 'with' statement is required for .find_first method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    18 |       qv = q.find_first;   
       |              ^~~~~~~~~~
 %Error: t/t_queue_method_bad.v:19:14: 'with' statement is required for .find_last method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    19 |       qv = q.find_last;   
       |              ^~~~~~~~~
 %Error: t/t_queue_method_bad.v:20:14: 'with' statement is required for .find_index method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    20 |       qi = q.find_index;   
       |              ^~~~~~~~~~
 %Error: t/t_queue_method_bad.v:21:14: 'with' statement is required for .find_first_index method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    21 |       qi = q.find_first_index;   
       |              ^~~~~~~~~~~~~~~~
 %Error: t/t_queue_method_bad.v:22:14: 'with' statement is required for .find_last_index method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    22 |       qi = q.find_last_index;   
       |              ^~~~~~~~~~~~~~~
 %Error: t/t_queue_method_bad.v:24:19: 'with' not legal on this method
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    24 |       qi = q.size with (1);   
       |                   ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_randc_oversize_bad.out b/test_regress/t/t_randc_oversize_bad.out
index 61f0030e3..6eaf0eefe 100644
--- a/test_regress/t/t_randc_oversize_bad.out
+++ b/test_regress/t/t_randc_oversize_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_randc_oversize_bad.v:8:21: Maxiumum implemented width for randc is 32 bits, 'i' is 38 bits
-                                     : ... In instance t
+                                     : ... note: In instance 't'
     8 |    randc bit [37:0] i;
       |                     ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_randomize_method_types_unsup.out b/test_regress/t/t_randomize_method_types_unsup.out
index 331acdcd8..d75313662 100644
--- a/test_regress/t/t_randomize_method_types_unsup.out
+++ b/test_regress/t/t_randomize_method_types_unsup.out
@@ -1,22 +1,22 @@
 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:12:13: Unsupported: random member variable with type 'int[string]'
-                                                            : ... In instance t
+                                                            : ... note: In instance 't'
    12 |    rand int assocarr[string];
       |             ^~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:13:13: Unsupported: random member variable with type 'int[]'
-                                                            : ... In instance t
+                                                            : ... note: In instance 't'
    13 |    rand int dynarr[];
       |             ^~~~~~
 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:14:13: Unsupported: random member variable with type 'int$[0:4]'
-                                                            : ... In instance t
+                                                            : ... note: In instance 't'
    14 |    rand int unpackarr[5];
       |             ^~~~~~~~~
 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:15:15: Unsupported: random member variable with type '$unit::Union'
-                                                            : ... In instance t
+                                                            : ... note: In instance 't'
    15 |    rand Union uni;
       |               ^~~
 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:16:13: Unsupported: random member variable with type of a current class
-                                                            : ... In instance t
+                                                            : ... note: In instance 't'
    16 |    rand Cls cls;
       |             ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_randstate_obj.out b/test_regress/t/t_randstate_obj.out
index 74f858877..62595c9e5 100644
--- a/test_regress/t/t_randstate_obj.out
+++ b/test_regress/t/t_randstate_obj.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_randstate_obj.v:20:13: Unsupported: 'get_randstate'/'set_randstate' called on object. Suggest call from inside class.
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    20 |       s = c.get_randstate();
       |             ^~~~~~~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_randstate_obj.v:26:9: Unsupported: 'get_randstate'/'set_randstate' called on object. Suggest call from inside class.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    26 |       c.set_randstate(s);
       |         ^~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_sampled_expr_unsup.out b/test_regress/t/t_sampled_expr_unsup.out
index 8a8a1634d..f6b05c074 100644
--- a/test_regress/t/t_sampled_expr_unsup.out
+++ b/test_regress/t/t_sampled_expr_unsup.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_sampled_expr_unsup.v:20:38: Unsupported: Write to variable in sampled expression
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    20 |    assert property (@(posedge clk) f(a) >= 0);
       |                                      ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_select_bad_msb.out b/test_regress/t/t_select_bad_msb.out
index 84e30c325..aa46cf502 100644
--- a/test_regress/t/t_select_bad_msb.out
+++ b/test_regress/t/t_select_bad_msb.out
@@ -1,11 +1,11 @@
 %Warning-ASCRANGE: t/t_select_bad_msb.v:12:8: Ascending bit range vector: left < right of bit range: [0:22]
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    12 |    reg [0:22] backwd;
       |        ^
                    ... For warning description see https://verilator.org/warn/ASCRANGE?v=latest
                    ... Use "/* verilator lint_off ASCRANGE */" and lint_on around source to disable this message.
 %Warning-SELRANGE: t/t_select_bad_msb.v:16:16: [1:4] Slice range has ascending bit ordering, perhaps you wanted [4:1]
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    16 |       sel2 = mi[1:4];
       |                ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_select_bad_range.out b/test_regress/t/t_select_bad_range.out
index c0b031982..19205ca10 100644
--- a/test_regress/t/t_select_bad_range.out
+++ b/test_regress/t/t_select_bad_range.out
@@ -1,11 +1,11 @@
 %Warning-SELRANGE: t/t_select_bad_range.v:16:15: Selection index out of range: 44:44 outside 43:0
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    16 |       sel = mi[44];
       |               ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
                    ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.
 %Warning-SELRANGE: t/t_select_bad_range.v:17:16: Selection index out of range: 44:41 outside 43:0
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    17 |       sel2 = mi[44:41];
       |                ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_select_bad_range2.out b/test_regress/t/t_select_bad_range2.out
index f648d7c2b..428fc9aed 100644
--- a/test_regress/t/t_select_bad_range2.out
+++ b/test_regress/t/t_select_bad_range2.out
@@ -1,5 +1,5 @@
 %Warning-SELRANGE: t/t_select_bad_range2.v:51:21: Selection index out of range: 3:2 outside 1:0
-                                                : ... In instance t.test
+                                                : ... note: In instance 't.test'
    51 |    assign out32 = in[3:2];
       |                     ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
diff --git a/test_regress/t/t_select_bad_range3.out b/test_regress/t/t_select_bad_range3.out
index fa19b0512..612b981a8 100644
--- a/test_regress/t/t_select_bad_range3.out
+++ b/test_regress/t/t_select_bad_range3.out
@@ -1,5 +1,5 @@
 %Warning-SELRANGE: t/t_select_bad_range3.v:19:33: Selection index out of range: 13 outside 12:10
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    19 |    assign outwires[12] = inwires[13];   
       |                                 ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
diff --git a/test_regress/t/t_select_bad_range4.out b/test_regress/t/t_select_bad_range4.out
index 6646fc383..395b1bee4 100644
--- a/test_regress/t/t_select_bad_range4.out
+++ b/test_regress/t/t_select_bad_range4.out
@@ -1,79 +1,79 @@
 %Error: t/t_select_bad_range4.v:17:8: Width of bit range is huge; vector of over 1 billion bits: 0x20000001
-                                    : ... In instance t
+                                    : ... note: In instance 't'
    17 |    reg [1<<29 : 0] hugerange;
       |        ^
 %Error: t/t_select_bad_range4.v:20:16: Width of :+ or :- is < 0: 32'hffffffff
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    20 |       sel2 = mi[44 +: -1];
       |                ^
 %Error-UNSUPPORTED: t/t_select_bad_range4.v:20:16: Unsupported: left < right of bit extract: 2<4
-                                                 : ... In instance t
+                                                 : ... note: In instance 't'
    20 |       sel2 = mi[44 +: -1];
       |                ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Warning-WIDTHEXPAND: t/t_select_bad_range4.v:20:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 3 bits.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    20 |       sel2 = mi[44 +: -1];
       |            ^
                       ... Use "/* verilator lint_off WIDTHEXPAND */" and lint_on around source to disable this message.
 %Error: t/t_select_bad_range4.v:21:16: Width of :+ or :- is huge; vector of over 1 billion bits: 32'h20000000
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    21 |       sel2 = mi[44 +: 1<<29];
       |                ^
 %Warning-SELRANGE: t/t_select_bad_range4.v:21:16: Extracting 20000000 bits from only 6 bit number
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    21 |       sel2 = mi[44 +: 1<<29];
       |                ^
 %Warning-SELRANGE: t/t_select_bad_range4.v:21:16: Selection index out of range: 20000003:4 outside 2d:28
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    21 |       sel2 = mi[44 +: 1<<29];
       |                ^
 %Warning-WIDTHTRUNC: t/t_select_bad_range4.v:21:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 20000000 bits.
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    21 |       sel2 = mi[44 +: 1<<29];
       |            ^
 %Error: t/t_select_bad_range4.v:22:23: Expecting expression to be constant, but variable isn't const: 'nonconst'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    22 |       sel2 = mi[44 +: nonconst];
       |                       ^~~~~~~~
 %Error: t/t_select_bad_range4.v:22:23: Width of :+ or :- bit slice range isn't a constant
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    22 |       sel2 = mi[44 +: nonconst];
       |                       ^~~~~~~~
 %Warning-WIDTHEXPAND: t/t_select_bad_range4.v:22:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 1 bits.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    22 |       sel2 = mi[44 +: nonconst];
       |            ^
 %Warning-WIDTHEXPAND: t/t_select_bad_range4.v:23:17: Operator SUB expects 20 or 6 bits on the LHS, but LHS's VARREF 'nonconst' generates 1 bits.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    23 |       sel2 = mi[nonconst];
       |                 ^~~~~~~~
 %Warning-WIDTHEXPAND: t/t_select_bad_range4.v:23:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 1 bits.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    23 |       sel2 = mi[nonconst];
       |            ^
 %Error: t/t_select_bad_range4.v:24:17: First value of [a:b] isn't a constant, maybe you want +: or -:
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    24 |       sel2 = mi[nonconst : nonconst];
       |                 ^~~~~~~~
 %Error: t/t_select_bad_range4.v:24:28: Second value of [a:b] isn't a constant, maybe you want +: or -:
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    24 |       sel2 = mi[nonconst : nonconst];
       |                            ^~~~~~~~
 %Warning-WIDTHEXPAND: t/t_select_bad_range4.v:24:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 1 bits.
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    24 |       sel2 = mi[nonconst : nonconst];
       |            ^
 %Warning-SELRANGE: t/t_select_bad_range4.v:25:16: Extracting 20000001 bits from only 6 bit number
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    25 |       sel2 = mi[1<<29 : 0];
       |                ^
 %Warning-SELRANGE: t/t_select_bad_range4.v:25:16: Selection index out of range: 1fffffd8:ffffffd8 outside 2d:28
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    25 |       sel2 = mi[1<<29 : 0];
       |                ^
 %Warning-WIDTHTRUNC: t/t_select_bad_range4.v:25:12: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's SEL generates 20000001 bits.
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    25 |       sel2 = mi[1<<29 : 0];
       |            ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_select_bad_range5.out b/test_regress/t/t_select_bad_range5.out
index 0c84ef079..c1dd3fa1e 100644
--- a/test_regress/t/t_select_bad_range5.out
+++ b/test_regress/t/t_select_bad_range5.out
@@ -1,19 +1,19 @@
 %Error: t/t_select_bad_range5.v:16:19: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                     : ... In instance t
+                                     : ... note: In instance 't'
    16 |    assign mi = unk[3:2];
       |                   ^
 %Warning-SELRANGE: t/t_select_bad_range5.v:16:19: Extracting 2 bits from only 1 bit number
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    16 |    assign mi = unk[3:2];
       |                   ^
                    ... For warning description see https://verilator.org/warn/SELRANGE?v=latest
                    ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message.
 %Warning-SELRANGE: t/t_select_bad_range5.v:16:19: Selection index out of range: 3:2 outside 1:0
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    16 |    assign mi = unk[3:2];
       |                   ^
 %Warning-WIDTHTRUNC: t/t_select_bad_range5.v:16:14: Operator ASSIGNW expects 1 bits on the Assign RHS, but Assign RHS's SEL generates 2 bits.
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    16 |    assign mi = unk[3:2];
       |              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_select_bad_tri.out b/test_regress/t/t_select_bad_tri.out
index 2fd802546..6b0b07934 100644
--- a/test_regress/t/t_select_bad_tri.out
+++ b/test_regress/t/t_select_bad_tri.out
@@ -2,6 +2,6 @@
    11 |       if (in[(   (1'h0 / 1'b0)   )+:71] != 71'h0) $stop;
       |                        ^
 %Error: Internal Error: t/t_select_bad_tri.v:11:24: ../V3Number.cpp:#: toUInt with 4-state 1'bx
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    11 |       if (in[(   (1'h0 / 1'b0)   )+:71] != 71'h0) $stop;
       |                        ^
diff --git a/test_regress/t/t_semaphore_bad.out b/test_regress/t/t_semaphore_bad.out
index 2fc1c33cb..41eab7032 100644
--- a/test_regress/t/t_semaphore_bad.out
+++ b/test_regress/t/t_semaphore_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_semaphore_bad.v:12:13: Class method 'bad_method' not found in class 'semaphore'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    12 |       if (s.bad_method() != 0) $stop;
       |             ^~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_split_var_1_bad.out b/test_regress/t/t_split_var_1_bad.out
index 0b8fbf11a..6337a8271 100644
--- a/test_regress/t/t_split_var_1_bad.out
+++ b/test_regress/t/t_split_var_1_bad.out
@@ -16,63 +16,63 @@
    40 |       i_sub0.cannot_split1[0] = 0;
       |              ^~~~~~~~~~~~~
 %Warning-SELRANGE: t/t_split_var_1_bad.v:90:33: Selection index out of range: 13 outside 12:10
-                                              : ... In instance t.i_sub3
+                                              : ... note: In instance 't.i_sub3'
    90 |    assign outwires[12] = inwires[13];   
       |                                 ^
 %Warning-WIDTHTRUNC: t/t_split_var_1_bad.v:41:31: Operator ASSIGN expects 8 bits on the Assign RHS, but Assign RHS's FUNCREF 'bad_func' generates 32 bits.
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    41 |       i_sub0.cannot_split1[1] = bad_func(addr, rd_data0);
       |                               ^
 %Error: t/t_split_var_1_bad.v:79:16: Illegal assignment of constant to unpacked array
-                                   : ... In instance t.i_sub2
+                                   : ... note: In instance 't.i_sub2'
    79 |    assign b = a[0];   
       |                ^
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:56:31: 'cannot_split0' has split_var metacomment but will not be split because index cannot be determined statically.
-                                              : ... In instance t.i_sub0
+                                              : ... note: In instance 't.i_sub0'
    56 |       rd_data = cannot_split0[addr];
       |                               ^~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:90:34: 'inwires' has split_var metacomment but will not be split because index is out of range.
-                                              : ... In instance t.i_sub3
+                                              : ... note: In instance 't.i_sub3'
    90 |    assign outwires[12] = inwires[13];   
       |                                  ^~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:17:9: 'should_show_warning0' has split_var metacomment but will not be split because it is not an aggregate type of bit nor logic.
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    17 |    real should_show_warning0                  /*verilator split_var*/ ;
       |         ^~~~~~~~~~~~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:18:11: 'should_show_warning1' has split_var metacomment but will not be split because it is not an aggregate type of bit nor logic.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    18 |    string should_show_warning1                /*verilator split_var*/ ;
       |           ^~~~~~~~~~~~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:19:11: 'should_show_warning2' has split_var metacomment but will not be split because its bitwidth is 1.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    19 |    wire   should_show_warning2                /*verilator split_var*/ ;
       |           ^~~~~~~~~~~~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:23:16: 'public_signal' has split_var metacomment but will not be split because it is public.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    23 |    logic [1:0] public_signal /*verilator public*/  /*verilator split_var*/ ;
       |                ^~~~~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:31:44: 'inout_port' has split_var metacomment but will not be split because it is an inout port.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    31 |    function int bad_func(inout logic [3:0] inout_port /*verilator split_var*/ ,
       |                                            ^~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:32:42: 'ref_port' has split_var metacomment but will not be split because it is a ref argument.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    32 |                          ref logic [7:0] ref_port /*verilator split_var*/ );
       |                                          ^~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:37:19: 'loop_idx' has split_var metacomment but will not be split because it is used as a loop variable.
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    37 |       logic [7:0] loop_idx /*verilator split_var*/ ;
       |                   ^~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:62:11: 'cannot_split_genvar' has split_var metacomment but will not be split because it is not an aggregate type of bit nor logic.
-                                              : ... In instance t.i_sub1
+                                              : ... note: In instance 't.i_sub1'
    62 |    genvar cannot_split_genvar /*verilator split_var*/ ;
       |           ^~~~~~~~~~~~~~~~~~~
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:65:65: 'cannot_split' has split_var metacomment but will not be split because its bit range cannot be determined statically.
-                                              : ... In instance t.i_sub1
+                                              : ... note: In instance 't.i_sub1'
    65 |       logic [8:0] rd_tmp /*verilator split_var*/  = cannot_split[addr];
       |                                                                 ^
 %Warning-SPLITVAR: t/t_split_var_1_bad.v:66:23: 'rd_tmp' has split_var metacomment but will not be split because its bit range cannot be determined statically.
-                                              : ... In instance t.i_sub1
+                                              : ... note: In instance 't.i_sub1'
    66 |       rd_data = rd_tmp[{3'b0, addr[0]}+:8];
       |                       ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_stream_bad.out b/test_regress/t/t_stream_bad.out
index 966297307..34284f067 100644
--- a/test_regress/t/t_stream_bad.out
+++ b/test_regress/t/t_stream_bad.out
@@ -1,13 +1,13 @@
 %Error: t/t_stream_bad.v:12:32: Expecting expression to be constant, but can't convert a RAND to constant.
-                              : ... In instance t
+                              : ... note: In instance 't'
    12 |    initial packed_data_32 = {<<$random{byte_in}};
       |                                ^~~~~~~
 %Error: t/t_stream_bad.v:12:30: Slice size isn't a constant or basic data type.
-                              : ... In instance t
+                              : ... note: In instance 't'
    12 |    initial packed_data_32 = {<<$random{byte_in}};
       |                              ^~
 %Error-UNSUPPORTED: t/t_stream_bad.v:12:30: Unsupported: Stream operation on a variable of a type 'byte$[0:3]'
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    12 |    initial packed_data_32 = {<<$random{byte_in}};
       |                              ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_stream_dynamic_wide_unsup.out b/test_regress/t/t_stream_dynamic_wide_unsup.out
index 6ddca3aaf..1edcffc16 100644
--- a/test_regress/t/t_stream_dynamic_wide_unsup.out
+++ b/test_regress/t/t_stream_dynamic_wide_unsup.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_stream_dynamic_wide_unsup.v:15:14: Unsupported: Assignment of stream of dynamic array to a variable of size greater than 64
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
    15 |       bit100 = { >> bit {arr} };
       |              ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_stream_dynamic_wide_unsup.v:17:14: Unsupported: Assignment of stream of dynamic array to a variable of size greater than 64
-                                                         : ... In instance t
+                                                         : ... note: In instance 't'
    17 |       bit100 = { << bit {arr} };
       |              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_stream_integer_type_unsup.out b/test_regress/t/t_stream_integer_type_unsup.out
index e688d40f8..83e8c92a9 100644
--- a/test_regress/t/t_stream_integer_type_unsup.out
+++ b/test_regress/t/t_stream_integer_type_unsup.out
@@ -1,146 +1,146 @@
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:118:31: Unsupported: Stream operation on a variable of a type 'byte$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   118 |          packed_data_32    = {<<8{byte_in}};
       |                               ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:119:31: Unsupported: Stream operation on a variable of a type 'shortint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   119 |          packed_data_64    = {<<16{shortint_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:120:31: Unsupported: Stream operation on a variable of a type 'int$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   120 |          packed_data_128   = {<<32{int_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:121:31: Unsupported: Stream operation on a variable of a type 'integer$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   121 |          packed_data_128_i = {<<32{integer_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:122:31: Unsupported: Stream operation on a variable of a type 'longint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   122 |          packed_data_256   = {<<64{longint_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:123:31: Unsupported: Stream operation on a variable of a type 'time$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   123 |          packed_time_256   = {<<64{time_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:124:31: Unsupported: Stream operation on a variable of a type 'bit[7:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   124 |          v_packed_data_32  = {<<8{bit_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:125:31: Unsupported: Stream operation on a variable of a type 'bit[15:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   125 |          v_packed_data_64  = {<<16{logic_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:126:31: Unsupported: Stream operation on a variable of a type 'bit[31:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   126 |          v_packed_data_128 = {<<32{reg_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:128:11: Unsupported: Stream operation on a variable of a type 'byte$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   128 |          {<<8{byte_out}}      = packed_data_32;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:129:11: Unsupported: Stream operation on a variable of a type 'shortint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   129 |          {<<16{shortint_out}} = packed_data_64;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:130:11: Unsupported: Stream operation on a variable of a type 'int$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   130 |          {<<32{int_out}}      = packed_data_128;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:131:11: Unsupported: Stream operation on a variable of a type 'integer$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   131 |          {<<32{integer_out}}  = packed_data_128_i;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:132:11: Unsupported: Stream operation on a variable of a type 'longint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   132 |          {<<64{longint_out}}  = packed_data_256;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:133:11: Unsupported: Stream operation on a variable of a type 'time$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   133 |          {<<64{time_out}}     = packed_time_256;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:134:11: Unsupported: Stream operation on a variable of a type 'bit[7:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   134 |          {<<8{bit_out}}       = v_packed_data_32;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:135:11: Unsupported: Stream operation on a variable of a type 'bit[15:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   135 |          {<<16{logic_out}}    = v_packed_data_64;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:136:11: Unsupported: Stream operation on a variable of a type 'bit[31:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   136 |          {<<32{reg_out}}      = v_packed_data_128;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:150:31: Unsupported: Stream operation on a variable of a type 'byte$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   150 |          packed_data_32    = {<<byte{byte_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:151:31: Unsupported: Stream operation on a variable of a type 'shortint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   151 |          packed_data_64    = {<<shortint{shortint_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:152:31: Unsupported: Stream operation on a variable of a type 'int$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   152 |          packed_data_128   = {<<int{int_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:153:31: Unsupported: Stream operation on a variable of a type 'integer$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   153 |          packed_data_128_i = {<<integer{integer_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:154:31: Unsupported: Stream operation on a variable of a type 'longint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   154 |          packed_data_256   = {<<longint{longint_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:155:31: Unsupported: Stream operation on a variable of a type 'time$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   155 |          packed_time_256   = {<<time{time_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:156:31: Unsupported: Stream operation on a variable of a type 'bit[7:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   156 |          v_packed_data_32  = {<<test_byte{bit_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:157:31: Unsupported: Stream operation on a variable of a type 'bit[15:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   157 |          v_packed_data_64  = {<<test_short{logic_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:158:31: Unsupported: Stream operation on a variable of a type 'bit[31:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   158 |          v_packed_data_128 = {<<test_word{reg_in}};
       |                               ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:160:11: Unsupported: Stream operation on a variable of a type 'byte$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   160 |          {<<byte{byte_out}}         = packed_data_32;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:161:11: Unsupported: Stream operation on a variable of a type 'shortint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   161 |          {<<shortint{shortint_out}} = packed_data_64;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:162:11: Unsupported: Stream operation on a variable of a type 'int$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   162 |          {<<int{int_out}}           = packed_data_128;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:163:11: Unsupported: Stream operation on a variable of a type 'integer$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   163 |          {<<integer{integer_out}}   = packed_data_128_i;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:164:11: Unsupported: Stream operation on a variable of a type 'longint$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   164 |          {<<longint{longint_out}}   = packed_data_256;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:165:11: Unsupported: Stream operation on a variable of a type 'time$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   165 |          {<<time{time_out}}         = packed_time_256;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:166:11: Unsupported: Stream operation on a variable of a type 'bit[7:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   166 |          {<<test_byte{bit_out}}     = v_packed_data_32;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:167:11: Unsupported: Stream operation on a variable of a type 'bit[15:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   167 |          {<<test_short{logic_out}}  = v_packed_data_64;
       |           ^~
 %Error-UNSUPPORTED: t/t_stream_integer_type_unsup.v:168:11: Unsupported: Stream operation on a variable of a type 'bit[31:0]$[0:3]'
-                                                          : ... In instance t
+                                                          : ... note: In instance 't'
   168 |          {<<test_word{reg_out}}     = v_packed_data_128;
       |           ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_strength_2_uneq_assign.out b/test_regress/t/t_strength_2_uneq_assign.out
index 4235b8fb3..6b249fe8d 100644
--- a/test_regress/t/t_strength_2_uneq_assign.out
+++ b/test_regress/t/t_strength_2_uneq_assign.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_strength_2_uneq_assign.v:10:30: Unsupported: Unable to resolve unequal strength specifier
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    10 |    assign (weak0, strong1) a = clk ? 'z : '0;
       |                              ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_strength_2_uneq_assign.v:11:30: Unsupported: Unable to resolve unequal strength specifier
-                                                      : ... In instance t
+                                                      : ... note: In instance 't'
    11 |    assign (strong0, pull1) a = 6'b110001;
       |                              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_string_type_methods_bad.out b/test_regress/t/t_string_type_methods_bad.out
index 0c3389838..65e9e4cfb 100644
--- a/test_regress/t/t_string_type_methods_bad.out
+++ b/test_regress/t/t_string_type_methods_bad.out
@@ -1,17 +1,17 @@
 %Error: t/t_string_type_methods_bad.v:15:13: The 1 arguments passed to .len method does not match its requiring 0 arguments
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    15 |       i = s.len(0);  
       |             ^~~
 %Error: t/t_string_type_methods_bad.v:16:9: The 0 arguments passed to .itoa method does not match its requiring 1 arguments
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    16 |       s.itoa;   
       |         ^~~~
 %Error: t/t_string_type_methods_bad.v:17:9: The 3 arguments passed to .itoa method does not match its requiring 1 arguments
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    17 |       s.itoa(1,2,3);   
       |         ^~~~
 %Error: t/t_string_type_methods_bad.v:18:9: Unknown built-in string method 'bad_no_such_method'
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    18 |       s.bad_no_such_method();   
       |         ^~~~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_struct_contents_bad.out b/test_regress/t/t_struct_contents_bad.out
index c39da5643..932d6d241 100644
--- a/test_regress/t/t_struct_contents_bad.out
+++ b/test_regress/t/t_struct_contents_bad.out
@@ -1,41 +1,41 @@
 %Error: t/t_struct_contents_bad.v:20:19: Unpacked data type 'real' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    20 |       real        r;   
       |                   ^
 %Error: t/t_struct_contents_bad.v:22:19: Unpacked data type 'real' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    22 |       shortreal   sr;  
       |                   ^~
 %Error: t/t_struct_contents_bad.v:23:19: Unpacked data type 'real' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    23 |       realtime    rt;  
       |                   ^~
 %Error: t/t_struct_contents_bad.v:24:19: Unpacked data type 'chandle' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    24 |       chandle     ch;  
       |                   ^~
 %Error: t/t_struct_contents_bad.v:25:19: Unpacked data type 'string' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    25 |       string      s;  
       |                   ^
 %Error: t/t_struct_contents_bad.v:26:19: Unpacked data type 'event' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    26 |       event       e;  
       |                   ^
 %Error: t/t_struct_contents_bad.v:27:25: Unpacked data type 'STRUCTDTYPE 't.struct_unpacked_t'' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    27 |       struct_unpacked_t sp;   
       |                         ^~
 %Error: t/t_struct_contents_bad.v:28:24: Unpacked data type 'UNIONDTYPE 't.union_unpacked_t'' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    28 |       union_unpacked_t up;    
       |                        ^~
 %Error: t/t_struct_contents_bad.v:29:11: Unpacked data type 'int$[0:1]' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    29 |       int uarray[2];    
       |           ^~~~~~
 %Error: t/t_struct_contents_bad.v:30:11: Unpacked data type 'CLASSREFDTYPE 'Cls'' in packed struct/union (IEEE 1800-2017 7.2.1)
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    30 |       Cls c;   
       |           ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_struct_init_bad.out b/test_regress/t/t_struct_init_bad.out
index 2213562e0..4d2d6c889 100644
--- a/test_regress/t/t_struct_init_bad.out
+++ b/test_regress/t/t_struct_init_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_struct_init.v:55:40: Assignment pattern contains duplicate entry: b1
-                               : ... In instance t
+                               : ... note: In instance 't'
    55 |    const b4_t b4_const_c = '{b1: 1'b1, b1: 1'b0, b0:1'b0, b2: 1'b1, b3: 1'b1};
       |                                        ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_struct_notfound_bad.out b/test_regress/t/t_struct_notfound_bad.out
index f35348c30..334bcef0d 100644
--- a/test_regress/t/t_struct_notfound_bad.out
+++ b/test_regress/t/t_struct_notfound_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_struct_notfound_bad.v:13:9: Member 'nfmember' not found in structure
-                                      : ... In instance t
+                                      : ... note: In instance 't'
    13 |       s.nfmember = 0;  
       |         ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_struct_packed_init_bad.out b/test_regress/t/t_struct_packed_init_bad.out
index 90d48e049..41da5c711 100644
--- a/test_regress/t/t_struct_packed_init_bad.out
+++ b/test_regress/t/t_struct_packed_init_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_struct_packed_init_bad.v:12:17: Initial values not allowed in packed struct/union (IEEE 1800-2017 7.2.1)
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    12 |       bit [3:0] m_lo = P;   
       |                 ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_struct_unpacked_init.out b/test_regress/t/t_struct_unpacked_init.out
index 9e3d7bc11..5e6a8ecfc 100644
--- a/test_regress/t/t_struct_unpacked_init.out
+++ b/test_regress/t/t_struct_unpacked_init.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_struct_unpacked_init.v:12:24: Unsupported: Initial values in struct/union members
-                                                    : ... In instance t
+                                                    : ... note: In instance 't'
    12 |       bit [3:0] m_lo = P;
       |                        ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_structu_dataType_assignment_bad.out b/test_regress/t/t_structu_dataType_assignment_bad.out
index 1b430ffd4..314204842 100644
--- a/test_regress/t/t_structu_dataType_assignment_bad.out
+++ b/test_regress/t/t_structu_dataType_assignment_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_structu_dataType_assignment_bad.v:19:26: Assignment pattern key not supported/understood: CONST '?32?sh1'
-                                                   : ... In instance top
+                                                   : ... note: In instance 'top'
    19 |   DEF_struct DEF_bad = '{1: 5, default: 10};
       |                          ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_sys_readmem_assoc_bad.out b/test_regress/t/t_sys_readmem_assoc_bad.out
index 2a1695a99..3464ef0b7 100644
--- a/test_regress/t/t_sys_readmem_assoc_bad.out
+++ b/test_regress/t/t_sys_readmem_assoc_bad.out
@@ -1,9 +1,9 @@
 %Error: t/t_sys_readmem_assoc_bad.v:13:24: $readmemb address/key must be integral (IEEE 1800-2017 21.4.1)
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    13 |       $readmemb("not", assoc_bad_key);
       |                        ^~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_sys_readmem_assoc_bad.v:14:24: Unsupported: $readmemb array values must be integral
-                                                     : ... In instance t
+                                                     : ... note: In instance 't'
    14 |       $readmemb("not", assoc_bad_value);
       |                        ^~~~~~~~~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_timing_func_bad.out b/test_regress/t/t_timing_func_bad.out
index c3fb3c88e..1ce254a92 100644
--- a/test_regress/t/t_timing_func_bad.out
+++ b/test_regress/t/t_timing_func_bad.out
@@ -1,25 +1,25 @@
 %Error: t/t_timing_func_bad.v:10:7: Delays are not legal in functions. Suggest use a task (IEEE 1800-2017 13.4.4)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    10 |       #1 $stop;
       |       ^
 %Error: t/t_timing_func_bad.v:15:12: Timing controls are not legal in functions. Suggest use a task (IEEE 1800-2017 13.4.4)
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    15 |       f2 = #5 0; $stop;
       |            ^
 %Error: t/t_timing_func_bad.v:20:7: Event controls are not legal in functions. Suggest use a task (IEEE 1800-2017 13.4.4)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    20 |       @e $stop;
       |       ^
 %Error: t/t_timing_func_bad.v:25:12: Timing controls are not legal in functions. Suggest use a task (IEEE 1800-2017 13.4.4)
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    25 |       f4 = @e 0; $stop;
       |            ^
 %Error: t/t_timing_func_bad.v:31:7: Wait statements are not legal in functions. Suggest use a task (IEEE 1800-2017 13.4.4)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    31 |       wait(i == 0) $stop;
       |       ^~~~
 %Error: t/t_timing_func_bad.v:42:7: Delays are not legal in final blocks (IEEE 1800-2017 9.2.3)
-                                  : ... In instance t
+                                  : ... note: In instance 't'
    42 |       #1;
       |       ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_timing_localevent_unsup.out b/test_regress/t/t_timing_localevent_unsup.out
index 46578cb94..01b2c9f44 100644
--- a/test_regress/t/t_timing_localevent_unsup.out
+++ b/test_regress/t/t_timing_localevent_unsup.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_timing_localevent_unsup.v:12:17: Unsupported: waiting on local event variables
-                                                       : ... In instance t::Sleeper
+                                                       : ... note: In instance 't::Sleeper'
    12 |                 @e;
       |                 ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_timing_unset1.out b/test_regress/t/t_timing_unset1.out
index eb8c53eb8..5f441d693 100644
--- a/test_regress/t/t_timing_unset1.out
+++ b/test_regress/t/t_timing_unset1.out
@@ -1,50 +1,50 @@
 %Error-NEEDTIMINGOPT: t/t_notiming.v:12:8: Use --timing or --no-timing to specify how delays should be handled
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    12 |        #1
       |        ^
                       ... For error description see https://verilator.org/warn/NEEDTIMINGOPT?v=latest
 %Error-NEEDTIMINGOPT: t/t_notiming.v:13:8: Use --timing or --no-timing to specify how forks should be handled
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    13 |        fork @e; @e; join;
       |        ^~~~
 %Error-NEEDTIMINGOPT: t/t_notiming.v:14:8: Use --timing or --no-timing to specify how event controls should be handled
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    14 |        @e
       |        ^
 %Error-NEEDTIMINGOPT: t/t_notiming.v:15:8: Use --timing or --no-timing to specify how wait statements should be handled
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    15 |        wait(x == 4)
       |        ^~~~
 %Error-NEEDTIMINGOPT: t/t_notiming.v:16:12: Use --timing or --no-timing to specify how timing controls should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    16 |        x = #1 8;
       |            ^
 %Error-NEEDTIMINGOPT: t/t_notiming.v:19:8: Use --timing or --no-timing to specify how event controls should be handled
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    19 |        @e
       |        ^
 %Error-NEEDTIMINGOPT: t/t_notiming.v:26:12: Use --timing or --no-timing to specify how delays should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    26 |    initial #1 ->e;
       |            ^
 %Error-NEEDTIMINGOPT: t/t_notiming.v:27:12: Use --timing or --no-timing to specify how delays should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    27 |    initial #2 $stop;  
       |            ^
 %Error-NEEDTIMINGOPT: t/t_notiming.v:33:10: Use --timing or --no-timing to specify how mailbox::put() should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    33 |        m.put(i);
       |          ^~~
 %Error-NEEDTIMINGOPT: t/t_notiming.v:34:10: Use --timing or --no-timing to specify how mailbox::get() should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    34 |        m.get(i);
       |          ^~~
 %Error-NEEDTIMINGOPT: t/t_notiming.v:35:10: Use --timing or --no-timing to specify how mailbox::peek() should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    35 |        m.peek(i);
       |          ^~~~
 %Error-NEEDTIMINGOPT: t/t_notiming.v:36:10: Use --timing or --no-timing to specify how semaphore::get() should be handled
-                                          : ... In instance t
+                                          : ... note: In instance 't'
    36 |        s.get();
       |          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_timing_unset2.out b/test_regress/t/t_timing_unset2.out
index 0d340a8f2..cccbcc862 100644
--- a/test_regress/t/t_timing_unset2.out
+++ b/test_regress/t/t_timing_unset2.out
@@ -1,26 +1,26 @@
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:25:8: Use --timing or --no-timing to specify how event controls should be handled
-                                           : ... In instance t
+                                           : ... note: In instance 't'
    25 |        @e1;
       |        ^
                       ... For error description see https://verilator.org/warn/NEEDTIMINGOPT?v=latest
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:33:12: Use --timing or --no-timing to specify how delays should be handled
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    33 |    initial #2 ->e1;
       |            ^
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:37:12: Use --timing or --no-timing to specify how delays should be handled
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    37 |    initial #3 $stop;  
       |            ^
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:38:12: Use --timing or --no-timing to specify how delays should be handled
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |            ^
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:38:15: Use --timing or --no-timing to specify how event controls should be handled
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |               ^
 %Error-NEEDTIMINGOPT: t/t_timing_off.v:38:25: Use --timing or --no-timing to specify how delays should be handled
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    38 |    initial #1 @(e1, e2) #1 $stop;  
       |                         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_timing_unset3.out b/test_regress/t/t_timing_unset3.out
index 3d91db2b4..8401328f3 100644
--- a/test_regress/t/t_timing_unset3.out
+++ b/test_regress/t/t_timing_unset3.out
@@ -1,5 +1,5 @@
 %Error-NEEDTIMINGOPT: t/t_clocking_notiming.v:11:8: Use --timing or --no-timing to specify how clocking output skew greater than #0 should be handled
-                                                  : ... In instance t
+                                                  : ... note: In instance 't'
    11 |        output #1 out;
       |        ^~~~~~
                       ... For error description see https://verilator.org/warn/NEEDTIMINGOPT?v=latest
diff --git a/test_regress/t/t_tri_array.out b/test_regress/t/t_tri_array.out
index 4ca9228ce..228308ed4 100644
--- a/test_regress/t/t_tri_array.out
+++ b/test_regress/t/t_tri_array.out
@@ -1,18 +1,18 @@
 %Error-UNSUPPORTED: t/t_tri_array.v:25:25: Unsupported LHS tristate construct: ARRAYSEL
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    25 |       Pad pad1 (.pad(pad[g]),
       |                         ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_tri_array.v:28:25: Unsupported LHS tristate construct: ARRAYSEL
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    28 |       Pad pad0 (.pad(pad[g]),
       |                         ^
 %Error: t/t_tri_array.v:25:25: Select from non-array BASICDTYPE 'bit'
-                             : ... In instance t
+                             : ... note: In instance 't'
    25 |       Pad pad1 (.pad(pad[g]),
       |                         ^
 %Error: t/t_tri_array.v:28:25: Select from non-array BASICDTYPE 'bit'
-                             : ... In instance t
+                             : ... note: In instance 't'
    28 |       Pad pad0 (.pad(pad[g]),
       |                         ^
 %Error: Internal Error: t/t_tri_array.v:25:22: ../V3Dfg.h:#: DfgVertex is not of expected type, but instead has type 'VARPACKED'
diff --git a/test_regress/t/t_tri_compass_bad.out b/test_regress/t/t_tri_compass_bad.out
index d9c240860..0bd522480 100644
--- a/test_regress/t/t_tri_compass_bad.out
+++ b/test_regress/t/t_tri_compass_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_tri_compass_bad.v:16:12: Unsupported: tristate in top-level IO: '__pinNumber1'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    16 |    sub sub(i, o);
       |            ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_tri_pull2_bad.out b/test_regress/t/t_tri_pull2_bad.out
index ea60ddfd2..cd8ed3185 100644
--- a/test_regress/t/t_tri_pull2_bad.out
+++ b/test_regress/t/t_tri_pull2_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_tri_pull2_bad.v:12:11: Unsupported: Conflicting pull directions.
-                                             : ... In instance t
+                                             : ... note: In instance 't'
    12 |    pullup p1(A);
       |           ^~
                     t/t_tri_pull2_bad.v:22:13: ... Location of conflicting pull.
diff --git a/test_regress/t/t_tri_pull_bad.out b/test_regress/t/t_tri_pull_bad.out
index 6d7960c19..fb22a6d89 100644
--- a/test_regress/t/t_tri_pull_bad.out
+++ b/test_regress/t/t_tri_pull_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_tri_pull_bad.v:13:13: Unsupported: Conflicting pull directions.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
    13 |    pulldown p2(A);
       |             ^~
                     t/t_tri_pull_bad.v:12:11: ... Location of conflicting pull.
diff --git a/test_regress/t/t_tri_pullvec_bad.out b/test_regress/t/t_tri_pullvec_bad.out
index ae95a7c27..297186924 100644
--- a/test_regress/t/t_tri_pullvec_bad.out
+++ b/test_regress/t/t_tri_pullvec_bad.out
@@ -1,5 +1,5 @@
 %Error-UNSUPPORTED: t/t_tri_pullvec_bad.v:13:13: Unsupported: Conflicting pull directions.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    13 |    pulldown p1 (w[1]);
       |             ^~
                     t/t_tri_pullvec_bad.v:12:11: ... Location of conflicting pull.
@@ -7,7 +7,7 @@
       |           ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_tri_pullvec_bad.v:14:13: Unsupported: Conflicting pull directions.
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    14 |    pulldown p2 (w[2]);
       |             ^~
                     t/t_tri_pullvec_bad.v:12:11: ... Location of conflicting pull.
diff --git a/test_regress/t/t_type_compare_bad.out b/test_regress/t/t_type_compare_bad.out
index e3827de74..ea2fbaba2 100644
--- a/test_regress/t/t_type_compare_bad.out
+++ b/test_regress/t/t_type_compare_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_type_compare_bad.v:12:9: Case(type) statement requires items that have type() items
-                                   : ... In instance t
+                                   : ... note: In instance 't'
    12 |         1: $stop;   
       |         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_unbounded_bad.out b/test_regress/t/t_unbounded_bad.out
index c21431950..2e4bdca79 100644
--- a/test_regress/t/t_unbounded_bad.out
+++ b/test_regress/t/t_unbounded_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_unbounded_bad.v:9:11: Unsupported/illegal unbounded ('$') in this context.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
     9 |       if ($) $stop;
       |           ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Warning-WIDTHTRUNC: t/t_unbounded_bad.v:9:7: Logical operator IF expects 1 bit on the If, but If's UNBOUNDED generates 32 bits.
-                                            : ... In instance t
+                                            : ... note: In instance 't'
     9 |       if ($) $stop;
       |       ^~
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
diff --git a/test_regress/t/t_unpacked_concat_bad.out b/test_regress/t/t_unpacked_concat_bad.out
index 0f7ec60dd..4f2954473 100644
--- a/test_regress/t/t_unpacked_concat_bad.out
+++ b/test_regress/t/t_unpacked_concat_bad.out
@@ -1,10 +1,10 @@
 %Error-UNSUPPORTED: t/t_unpacked_concat_bad.v:17:46: Unsupported: Non-1 replication to form 'bit[31:0]$[1:0]' data type
-                                                   : ... In instance t
+                                                   : ... note: In instance 't'
    17 |    localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}};
       |                                              ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: t/t_unpacked_concat_bad.v:17:46: Assignment pattern missed initializing elements: 0
-                                       : ... In instance t
+                                       : ... note: In instance 't'
    17 |    localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}};
       |                                              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_var_const_bad.out b/test_regress/t/t_var_const_bad.out
index f29ef0b8a..a29bdef45 100644
--- a/test_regress/t/t_var_const_bad.out
+++ b/test_regress/t/t_var_const_bad.out
@@ -1,5 +1,5 @@
 %Error: t/t_var_const_bad.v:17:7: Assigning to const variable: 'five'
-                                : ... In instance t
+                                : ... note: In instance 't'
    17 |       five = 3'd4;
       |       ^~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_var_ref_bad1.out b/test_regress/t/t_var_ref_bad1.out
index fad8332f9..9351d8750 100644
--- a/test_regress/t/t_var_ref_bad1.out
+++ b/test_regress/t/t_var_ref_bad1.out
@@ -1,5 +1,5 @@
 %Error: t/t_var_ref_bad1.v:14:8: Ref connection 'bad_sub_ref' requires matching types; ref requires 'real' data type but connection is 'bit' data type.
-                               : ... In instance t
+                               : ... note: In instance 't'
    14 |      (.bad_sub_ref(bad_parent));   
       |        ^~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_var_ref_bad2.out b/test_regress/t/t_var_ref_bad2.out
index 7a14ae05e..fa46d14c5 100644
--- a/test_regress/t/t_var_ref_bad2.out
+++ b/test_regress/t/t_var_ref_bad2.out
@@ -1,9 +1,9 @@
 %Error: t/t_var_ref_bad2.v:13:7: Assigning to const ref variable: 'bad_const_set'
-                               : ... In instance t
+                               : ... note: In instance 't'
    13 |       bad_const_set = 32'h4567;   
       |       ^~~~~~~~~~~~~
 %Error: t/t_var_ref_bad2.v:23:17: Ref argument requires matching types; port 'int_ref' requires int but connection is byte.
-                                : ... In instance t
+                                : ... note: In instance 't'
    23 |       checkset2(bad_non_int);   
       |                 ^~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_var_rsvd_bad.out b/test_regress/t/t_var_rsvd_bad.out
index ef3f32fc0..93b831450 100644
--- a/test_regress/t/t_var_rsvd_bad.out
+++ b/test_regress/t/t_var_rsvd_bad.out
@@ -4,7 +4,7 @@
                       ... For warning description see https://verilator.org/warn/SYMRSVDWORD?v=latest
                       ... Use "/* verilator lint_off SYMRSVDWORD */" and lint_on around source to disable this message.
 %Warning-SYMRSVDWORD: t/t_var_rsvd_port.v:15:9: Symbol matches C++ keyword: 'switch'
-                                              : ... In instance t
+                                              : ... note: In instance 't'
    15 |    reg  switch /*verilator public*/ ;     
       |         ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_var_types_bad.out b/test_regress/t/t_var_types_bad.out
index 47c3d490b..199f4423d 100644
--- a/test_regress/t/t_var_types_bad.out
+++ b/test_regress/t/t_var_types_bad.out
@@ -1,21 +1,21 @@
 %Error: t/t_var_types_bad.v:39:13: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'bit'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    39 |       d_bitz[0] = 1'b1;          
       |             ^
 %Error: t/t_var_types_bad.v:40:15: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    40 |       d_logicz[0] = 1'b1;        
       |               ^
 %Error: t/t_var_types_bad.v:41:13: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    41 |       d_regz[0] = 1'b1;          
       |             ^
 %Error: t/t_var_types_bad.v:46:13: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'real'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    46 |       d_real[0] = 1'b1;          
       |             ^
 %Error: t/t_var_types_bad.v:46:7: Expected integral (non-real) input to SEL
-                                : ... In instance t
+                                : ... note: In instance 't'
    46 |       d_real[0] = 1'b1;          
       |       ^~~~~~
 %Warning-REALCVT: t/t_var_types_bad.v:46:7: Implicit conversion of real to integer
@@ -24,11 +24,11 @@
                   ... For warning description see https://verilator.org/warn/REALCVT?v=latest
                   ... Use "/* verilator lint_off REALCVT */" and lint_on around source to disable this message.
 %Error: t/t_var_types_bad.v:47:17: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'real'
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    47 |       d_realtime[0] = 1'b1;      
       |                 ^
 %Error: t/t_var_types_bad.v:47:7: Expected integral (non-real) input to SEL
-                                : ... In instance t
+                                : ... note: In instance 't'
    47 |       d_realtime[0] = 1'b1;      
       |       ^~~~~~~~~~
 %Warning-REALCVT: t/t_var_types_bad.v:47:7: Implicit conversion of real to integer
diff --git a/test_regress/t/t_vlt_warn_bad.out b/test_regress/t/t_vlt_warn_bad.out
index e4520566e..4f49d7621 100644
--- a/test_regress/t/t_vlt_warn_bad.out
+++ b/test_regress/t/t_vlt_warn_bad.out
@@ -1,5 +1,5 @@
 %Warning-WIDTHTRUNC: t/t_vlt_warn.v:21:33: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's CONST '2'h3' generates 2 bits.
-                                         : ... In instance t
+                                         : ... note: In instance 't'
    21 |    reg width_warn3_var_line20 = 2'b11;   
       |                                 ^~~~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
diff --git a/test_regress/t/t_vlt_warn_ecode_bad.out b/test_regress/t/t_vlt_warn_ecode_bad.out
index ec0e047bf..4b28e5c34 100644
--- a/test_regress/t/t_vlt_warn_ecode_bad.out
+++ b/test_regress/t/t_vlt_warn_ecode_bad.out
@@ -1,7 +1,7 @@
-%Error: t/t_vlt_warn_ecode_bad.vlt:9:1: Unknown error code: BADRULENAME
+%Error: t/t_vlt_warn_ecode_bad.vlt:9:1: Unknown error code: 'BADRULENAME'
     9 | lint_off -rule BADRULENAME -file "t/t_vlt_warn.v"
       | ^~~~~~~~
-%Error: t/t_vlt_warn_ecode_bad.vlt:10:1: Unknown error code: BADRULENAME
+%Error: t/t_vlt_warn_ecode_bad.vlt:10:1: Unknown error code: 'BADRULENAME'
    10 | lint_on -rule BADRULENAME -file "t/t_vlt_warn.v"
       | ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_wait.out b/test_regress/t/t_wait.out
index 2de31cc23..5e07cbc26 100644
--- a/test_regress/t/t_wait.out
+++ b/test_regress/t/t_wait.out
@@ -1,39 +1,39 @@
 %Error-NOTIMING: t/t_wait.v:12:7: Wait statements require --timing
-                                : ... In instance t
+                                : ... note: In instance 't'
    12 |       wait (value == 1);
       |       ^~~~
                  ... For error description see https://verilator.org/warn/NOTIMING?v=latest
 %Error-NOTIMING: t/t_wait.v:14:7: Wait statements require --timing
-                                : ... In instance t
+                                : ... note: In instance 't'
    14 |       wait (0);
       |       ^~~~
 %Error-NOTIMING: t/t_wait.v:17:7: Wait statements require --timing
-                                : ... In instance t
+                                : ... note: In instance 't'
    17 |       wait (value == 2);
       |       ^~~~
 %Error-NOTIMING: t/t_wait.v:20:7: Wait statements require --timing
-                                : ... In instance t
+                                : ... note: In instance 't'
    20 |       wait (value == 3) if (value != 3) $stop;
       |       ^~~~
 %Warning-STMTDLY: t/t_wait.v:25:7: Ignoring delay on this statement due to --no-timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    25 |       #10;
       |       ^
                   ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
 %Warning-STMTDLY: t/t_wait.v:27:7: Ignoring delay on this statement due to --no-timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    27 |       #10;
       |       ^
 %Warning-STMTDLY: t/t_wait.v:29:7: Ignoring delay on this statement due to --no-timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    29 |       #10;
       |       ^
 %Warning-STMTDLY: t/t_wait.v:31:7: Ignoring delay on this statement due to --no-timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    31 |       #10;
       |       ^
 %Warning-STMTDLY: t/t_wait.v:33:7: Ignoring delay on this statement due to --no-timing
-                                 : ... In instance t
+                                 : ... note: In instance 't'
    33 |       #10;
       |       ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_wire_beh1364_bad.out b/test_regress/t/t_wire_beh1364_bad.out
index 4667a07f9..46ef1ad3c 100644
--- a/test_regress/t/t_wire_beh1364_bad.out
+++ b/test_regress/t/t_wire_beh1364_bad.out
@@ -1,22 +1,22 @@
 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    26 |       w = 0;
       |       ^
                     ... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:27:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    27 |       o = 0;
       |       ^
 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:28:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    28 |       oa = 0;
       |       ^~
 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:29:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'wo'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    29 |       wo = 0;
       |       ^~
 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:30:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'woa'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    30 |       woa = 0;
       |       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_wire_beh1800_bad.out b/test_regress/t/t_wire_beh1800_bad.out
index 7f6881e18..534097220 100644
--- a/test_regress/t/t_wire_beh1800_bad.out
+++ b/test_regress/t/t_wire_beh1800_bad.out
@@ -1,22 +1,22 @@
 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:25:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    25 |       w = '0;   
       |       ^
                     ... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    26 |       o = '0;   
       |       ^
 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:27:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    27 |       oa = '0;   
       |       ^~
 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:28:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'wo'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    28 |       wo = '0;   
       |       ^~
 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:29:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'woa'
-                                               : ... In instance t
+                                               : ... note: In instance 't'
    29 |       woa = '0;   
       |       ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_wire_behp1364_bad.out b/test_regress/t/t_wire_behp1364_bad.out
index 9fbbf0f6c..8f874080e 100644
--- a/test_regress/t/t_wire_behp1364_bad.out
+++ b/test_regress/t/t_wire_behp1364_bad.out
@@ -1,14 +1,14 @@
 %Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    24 |       w = 0;
       |       ^
                     ... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
 %Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:25:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    25 |       o = 0;
       |       ^
 %Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    26 |       oa = 0;
       |       ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_wire_behp1800_bad.out b/test_regress/t/t_wire_behp1800_bad.out
index 658c081e0..e2e3e2645 100644
--- a/test_regress/t/t_wire_behp1800_bad.out
+++ b/test_regress/t/t_wire_behp1800_bad.out
@@ -1,14 +1,14 @@
 %Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:23:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'w'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    23 |       w = '0;   
       |       ^
                     ... For error description see https://verilator.org/warn/PROCASSWIRE?v=latest
 %Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    24 |       o = '0;   
       |       ^
 %Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:25:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'oa'
-                                                : ... In instance t
+                                                : ... note: In instance 't'
    25 |       oa = '0;   
       |       ^~
 %Error: Exiting due to

From 429cb1f7f726ccad3b933e899ac255b806948d92 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 23 Sep 2023 09:04:35 -0400
Subject: [PATCH 016/157] Commentary (#4517)

---
 docs/guide/environment.rst | 21 +++++++++++++++++++++
 docs/internals.rst         |  4 ++--
 docs/spelling.txt          |  1 +
 3 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/docs/guide/environment.rst b/docs/guide/environment.rst
index a8e4b4439..4cfe4c535 100644
--- a/docs/guide/environment.rst
+++ b/docs/guide/environment.rst
@@ -7,6 +7,21 @@ Environment
 This section describes the environment variables used by Verilator and
 associated programs.
 
+.. option:: AR
+
+   Optionally overrides the default :command:`ar` (archive) binary used by
+   the Verilated makefiles. If AR is not set, the version found at
+   configure time is used.
+
+.. option:: CXX
+
+   Optionally overrides the default compiler binary used by the Verilated
+   makefiles. If CXX is not set, the version found at configure time is
+   used.  Note the default flags passed to the compiler are determined at
+   configuration time, so changing the CXX compiler version using this
+   variable, as opposed to passing it at configuration time, may not give
+   desired results.
+
 .. option:: LD_LIBRARY_PATH
 
    A generic Linux/OS variable specifying what directories have shared
@@ -35,6 +50,12 @@ associated programs.
    those programs.  If OBJCACHE is not set, and at configure time ccache
    was present, ccache will be used as a default.
 
+.. option:: PYTHON3
+
+   Optionally overrides the default :command:`python3` binary used by the
+   Verilated makefiles. If PYTHON3 is not set, the version found at
+   configure time is used.
+
 .. option:: SYSTEMC
 
    Deprecated.  Used only if :option:`SYSTEMC_INCLUDE` or
diff --git a/docs/internals.rst b/docs/internals.rst
index 136c90265..d03eebd17 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1400,7 +1400,7 @@ Controlling the Test Driver
 ---------------------------
 
 The test driver script `driver.pl` runs tests; see the `Test Driver`
-section.  The individual test drivers are written in PERL; see `Test
+section.  The individual test drivers are written in Perl; see `Test
 Language`.
 
 
@@ -1432,7 +1432,7 @@ Developers will also want to call ./configure with two extra flags:
    disabled by default, as SystemC installation problems would otherwise
    falsely indicate a Verilator problem.
 
-When enabling the long tests, some additional PERL modules are needed,
+When enabling the long tests, some additional Perl modules are needed,
 which you can install using cpan.
 
 ::
diff --git a/docs/spelling.txt b/docs/spelling.txt
index cddf6a1b2..d55530c50 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -486,6 +486,7 @@ countbits
 countones
 cout
 cpp
+cppstyle
 cpu
 ctor
 ctrace

From d64c023099fb5018501a08e42be9f096e32710b3 Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Sat, 23 Sep 2023 23:50:05 +0800
Subject: [PATCH 017/157] CI: Cancel previous runs for pull requests
 automatically (#4512)

---
 .github/workflows/build.yml   | 4 ++++
 .github/workflows/msbuild.yml | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 704917c53..46752f44c 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -23,6 +23,10 @@ defaults:
     shell: bash
     working-directory: repo
 
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
 jobs:
 
   build:
diff --git a/.github/workflows/msbuild.yml b/.github/workflows/msbuild.yml
index dd25c2669..fe148ad6e 100644
--- a/.github/workflows/msbuild.yml
+++ b/.github/workflows/msbuild.yml
@@ -22,6 +22,10 @@ defaults:
   run:
     working-directory: repo
 
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
 jobs:
 
    windows:

From 28bd7e5b198b1380dcf193d14c1c170db7371c6b Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglebocki@antmicro.com>
Date: Mon, 25 Sep 2023 04:12:23 +0200
Subject: [PATCH 018/157] Rework multithreading handling to separate by code
 units that use/never use it. (#4228)

---
 src/Makefile_obj.in        |   2 +-
 src/V3Active.cpp           |   2 +
 src/V3Active.h             |   4 +-
 src/V3ActiveTop.cpp        |   2 +
 src/V3ActiveTop.h          |   4 +-
 src/V3Assert.cpp           |   2 +
 src/V3Assert.h             |   3 +-
 src/V3AssertPre.cpp        |   2 +
 src/V3AssertPre.h          |   4 +-
 src/V3AstNodeOther.h       |   2 +-
 src/V3AstNodes.cpp         |   8 +-
 src/V3Begin.cpp            |   2 +
 src/V3Begin.h              |   4 +-
 src/V3Branch.cpp           |   2 +
 src/V3Branch.h             |   4 +-
 src/V3CCtors.cpp           |   2 +
 src/V3CCtors.h             |   6 +-
 src/V3CUse.cpp             |   2 +
 src/V3CUse.h               |   4 +-
 src/V3Case.cpp             |   2 +
 src/V3Case.h               |   6 +-
 src/V3Cast.cpp             |   2 +
 src/V3Cast.h               |   4 +-
 src/V3Class.cpp            |   2 +
 src/V3Class.h              |   4 +-
 src/V3Clean.cpp            |   2 +
 src/V3Clean.h              |   4 +-
 src/V3Clock.cpp            |   2 +
 src/V3Clock.h              |   4 +-
 src/V3Combine.cpp          |   2 +
 src/V3Combine.h            |   4 +-
 src/V3Common.cpp           |   2 +
 src/V3Common.h             |   4 +-
 src/V3Const.cpp            |   2 +
 src/V3Const.h              |  29 +-
 src/V3Coverage.cpp         |   2 +
 src/V3Coverage.h           |   4 +-
 src/V3CoverageJoin.cpp     |   2 +
 src/V3CoverageJoin.h       |   4 +-
 src/V3Dead.cpp             |   2 +
 src/V3Dead.h               |  12 +-
 src/V3Delayed.cpp          |   2 +
 src/V3Delayed.h            |   4 +-
 src/V3Depth.cpp            |   2 +
 src/V3Depth.h              |   4 +-
 src/V3DepthBlock.cpp       |   2 +
 src/V3DepthBlock.h         |   4 +-
 src/V3Descope.cpp          |   2 +
 src/V3Descope.h            |   4 +-
 src/V3Dfg.cpp              |   2 +
 src/V3Dfg.h                |  75 +--
 src/V3DfgAstToDfg.cpp      |   2 +
 src/V3DfgDecomposition.cpp |   2 +
 src/V3DfgDfgToAst.cpp      |   2 +
 src/V3DfgOptimizer.cpp     |   2 +
 src/V3DfgOptimizer.h       |   5 +-
 src/V3DfgPasses.cpp        |   2 +
 src/V3DfgPasses.h          |  25 +-
 src/V3DfgPeephole.cpp      |   2 +
 src/V3DfgPeephole.h        |   6 +-
 src/V3DfgVertices.h        |  12 +-
 src/V3DupFinder.cpp        |   2 +
 src/V3DupFinder.h          |   9 +-
 src/V3EmitC.h              |  14 +-
 src/V3EmitCBase.h          |   2 +-
 src/V3EmitCFunc.h          |   1 +
 src/V3EmitCMain.cpp        |   2 +
 src/V3EmitCMain.h          |   4 +-
 src/V3EmitCMake.cpp        |   2 +
 src/V3EmitCMake.h          |   4 +-
 src/V3EmitCModel.cpp       |   2 +
 src/V3EmitCSyms.cpp        |   2 +
 src/V3EmitMk.cpp           |   2 +
 src/V3EmitMk.h             |   6 +-
 src/V3EmitV.h              |   2 +
 src/V3EmitXml.cpp          |   2 +
 src/V3EmitXml.h            |   4 +-
 src/V3Error.cpp            |  23 +-
 src/V3Error.h              |  35 +-
 src/V3Expand.cpp           |   2 +
 src/V3Expand.h             |   4 +-
 src/V3Force.cpp            |   2 +
 src/V3Force.h              |   4 +-
 src/V3Fork.cpp             |   2 +
 src/V3Fork.h               |   6 +-
 src/V3Gate.cpp             |   2 +
 src/V3Gate.h               |   4 +-
 src/V3Global.h             |   7 +-
 src/V3Graph.cpp            |   2 +
 src/V3Graph.h              | 109 +++--
 src/V3GraphAcyc.cpp        |   2 +
 src/V3GraphAlg.cpp         |   2 +
 src/V3GraphPathChecker.cpp |   2 +
 src/V3GraphPathChecker.h   |  14 +-
 src/V3GraphTest.cpp        |   2 +
 src/V3HierBlock.cpp        |   2 +
 src/V3HierBlock.h          |  41 +-
 src/V3Inline.cpp           |   2 +
 src/V3Inline.h             |   4 +-
 src/V3Inst.cpp             |   2 +
 src/V3Inst.h               |  10 +-
 src/V3InstrCount.cpp       |   2 +
 src/V3InstrCount.h         |   5 +-
 src/V3Life.cpp             |   2 +
 src/V3Life.h               |   4 +-
 src/V3LifePost.cpp         |   2 +
 src/V3LifePost.h           |   4 +-
 src/V3LinkCells.cpp        |   2 +
 src/V3LinkCells.h          |   4 +-
 src/V3LinkDot.cpp          |   2 +
 src/V3LinkDot.h            |  11 +-
 src/V3LinkInc.cpp          |   2 +
 src/V3LinkInc.h            |   4 +-
 src/V3LinkJump.cpp         |   2 +
 src/V3LinkJump.h           |   4 +-
 src/V3LinkLValue.cpp       |   2 +
 src/V3LinkLValue.h         |   6 +-
 src/V3LinkLevel.cpp        |   2 +
 src/V3LinkLevel.h          |  11 +-
 src/V3LinkParse.cpp        |   2 +
 src/V3LinkParse.h          |   4 +-
 src/V3LinkResolve.cpp      |   2 +
 src/V3LinkResolve.h        |   4 +-
 src/V3Localize.cpp         |   2 +
 src/V3Localize.h           |   4 +-
 src/V3MergeCond.cpp        |   2 +
 src/V3MergeCond.h          |   4 +-
 src/V3Name.cpp             |   2 +
 src/V3Name.h               |   4 +-
 src/V3Number_test.cpp      |   1 +
 src/V3OptionParser.cpp     |   2 +
 src/V3OptionParser.h       |  56 ++-
 src/V3Options.cpp          |  25 +-
 src/V3Options.h            |  11 +-
 src/V3Order.cpp            |   2 +
 src/V3Order.h              |   4 +-
 src/V3OrderGraph.h         |  59 ++-
 src/V3OrderMoveGraph.h     |  24 +-
 src/V3Param.cpp            |   2 +
 src/V3Param.h              |   4 +-
 src/V3Parse.h              |   9 +-
 src/V3ParseGrammar.cpp     |   2 +
 src/V3ParseImp.cpp         |   2 +
 src/V3ParseImp.h           |  68 +--
 src/V3ParseLex.cpp         |   2 +
 src/V3Partition.cpp        |   2 +
 src/V3Partition.h          |  15 +-
 src/V3PartitionGraph.h     |  14 +-
 src/V3PreProc.cpp          |   2 +
 src/V3PreProc.h            |   5 +-
 src/V3PreShell.cpp         |   2 +
 src/V3PreShell.h           |  17 +-
 src/V3Premit.cpp           |   2 +
 src/V3Premit.h             |   4 +-
 src/V3ProtectLib.cpp       |   2 +
 src/V3ProtectLib.h         |   4 +-
 src/V3Randomize.cpp        |   2 +
 src/V3Randomize.h          |   8 +-
 src/V3Reloop.cpp           |   2 +
 src/V3Reloop.h             |   4 +-
 src/V3Sched.cpp            |   2 +
 src/V3Sched.h              |  22 +-
 src/V3SchedAcyclic.cpp     |   2 +
 src/V3SchedPartition.cpp   |   2 +
 src/V3SchedReplicate.cpp   |   2 +
 src/V3SchedTiming.cpp      |   2 +
 src/V3Scope.cpp            |   2 +
 src/V3Scope.h              |   4 +-
 src/V3Scoreboard.cpp       |   2 +
 src/V3Scoreboard.h         |   3 +-
 src/V3Slice.cpp            |   2 +
 src/V3Slice.h              |   4 +-
 src/V3Split.cpp            |   2 +
 src/V3Split.h              |   6 +-
 src/V3SplitAs.cpp          |   2 +
 src/V3SplitAs.h            |   4 +-
 src/V3SplitVar.cpp         |   2 +
 src/V3SplitVar.h           |   6 +-
 src/V3Subst.cpp            |   2 +
 src/V3Subst.h              |   4 +-
 src/V3TSP.cpp              |   2 +
 src/V3TSP.h                |   5 +-
 src/V3Table.cpp            |   2 +
 src/V3Table.h              |   4 +-
 src/V3Task.cpp             |   2 +
 src/V3Task.h               |  14 +-
 src/V3Timing.cpp           |   2 +
 src/V3Timing.h             |   3 +-
 src/V3Trace.cpp            |   2 +
 src/V3Trace.h              |   4 +-
 src/V3TraceDecl.cpp        |   2 +
 src/V3TraceDecl.h          |   4 +-
 src/V3Tristate.cpp         |   2 +
 src/V3Tristate.h           |   4 +-
 src/V3Undriven.cpp         |   2 +
 src/V3Undriven.h           |   4 +-
 src/V3Unknown.cpp          |   2 +
 src/V3Unknown.h            |   4 +-
 src/V3Unroll.cpp           |   2 +
 src/V3Unroll.h             |  11 +-
 src/V3VariableOrder.cpp    |   2 +
 src/V3VariableOrder.h      |   4 +-
 src/V3Width.cpp            |   5 +-
 src/V3Width.h              |  14 +-
 src/V3WidthSel.cpp         |   2 +
 src/Verilator.cpp          | 943 +++++++++++++++++++------------------
 src/VlcMain.cpp            |   2 +
 src/VlcOptions.h           |  10 +-
 src/VlcTop.cpp             |   2 +
 src/verilog.y              |  13 +-
 210 files changed, 1365 insertions(+), 913 deletions(-)

diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 471af2c79..162da5d85 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -389,7 +389,7 @@ HEADER_CC_H := $(filter-out $(NON_STANDALONE_HEADERS), $(notdir $(wildcard $(src
 header_cc: $(addsuffix __header_cc.o, $(basename $(HEADER_CC_H)))
 
 %__header_cc.cpp: %.h
-	$(PYTHON3) $(srcdir)/../bin/verilator_includer $^ > $@
+	$(PYTHON3) $(srcdir)/../bin/verilator_includer -DVL_MT_DISABLED_CODE_UNIT=1 $^ > $@
 
 .SUFFIXES:
 
diff --git a/src/V3Active.cpp b/src/V3Active.cpp
index 54b110d00..857c34045 100644
--- a/src/V3Active.cpp
+++ b/src/V3Active.cpp
@@ -26,6 +26,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Active.h b/src/V3Active.h
index 81684c6f1..090d7b019 100644
--- a/src/V3Active.h
+++ b/src/V3Active.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Active final {
 public:
-    static void activeAll(AstNetlist* nodep);
+    static void activeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp
index 16cfe6e95..4dc193116 100644
--- a/src/V3ActiveTop.cpp
+++ b/src/V3ActiveTop.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3ActiveTop.h b/src/V3ActiveTop.h
index ac9361c7d..ae3821112 100644
--- a/src/V3ActiveTop.h
+++ b/src/V3ActiveTop.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3ActiveTop final {
 public:
-    static void activeTopAll(AstNetlist* nodep);
+    static void activeTopAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index e010215d9..b13fae8c0 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Assert.h b/src/V3Assert.h
index dcf26756a..f345c2e27 100644
--- a/src/V3Assert.h
+++ b/src/V3Assert.h
@@ -21,12 +21,13 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 
 class V3Assert final {
 public:
-    static void assertAll(AstNetlist* nodep);
+    static void assertAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index 766d454d1..bf416c276 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -19,6 +19,8 @@
 //      Transform clocking blocks into imperative logic
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3AssertPre.h b/src/V3AssertPre.h
index 9cc61528d..dc58f6054 100644
--- a/src/V3AssertPre.h
+++ b/src/V3AssertPre.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3AssertPre final {
 public:
-    static void assertPreAll(AstNetlist* nodep);
+    static void assertPreAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 12b7ce9f2..a6b8aa63f 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1034,7 +1034,7 @@ class AstExecGraph final : public AstNode {
     const string m_name;  // Name of this AstExecGraph (for uniqueness at code generation)
 
 public:
-    explicit AstExecGraph(FileLine* fl, const string& name);
+    explicit AstExecGraph(FileLine* fl, const string& name) VL_MT_DISABLED;
     ASTGEN_MEMBERS_AstExecGraph;
     ~AstExecGraph() override;
     const char* broken() const override {
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 81dfdbaf4..3ba281286 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -357,10 +357,10 @@ AstNodeBiop* AstEqWild::newTyped(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* r
     }
 }
 
-AstExecGraph::AstExecGraph(FileLine* fileline, const string& name)
-    : ASTGEN_SUPER_ExecGraph(fileline)
-    , m_depGraphp{new V3Graph}
-    , m_name{name} {}
+AstExecGraph::AstExecGraph(FileLine* fileline, const string& name) VL_MT_DISABLED
+    : ASTGEN_SUPER_ExecGraph(fileline),
+      m_depGraphp{new V3Graph},
+      m_name{name} {}
 
 AstExecGraph::~AstExecGraph() { VL_DO_DANGLING(delete m_depGraphp, m_depGraphp); }
 
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index abe27a1dc..1ff68713b 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -26,6 +26,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Begin.h b/src/V3Begin.h
index b62f6ce34..b2cd44a01 100644
--- a/src/V3Begin.h
+++ b/src/V3Begin.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Begin final {
 public:
-    static void debeginAll(AstNetlist* nodep);
+    static void debeginAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp
index e84e041b5..f24307808 100644
--- a/src/V3Branch.cpp
+++ b/src/V3Branch.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Branch.h b/src/V3Branch.h
index a86d9fae1..79f793307 100644
--- a/src/V3Branch.h
+++ b/src/V3Branch.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
@@ -27,7 +29,7 @@ class AstNetlist;
 class V3Branch final {
 public:
     // CONSTRUCTORS
-    static void branchAll(AstNetlist* nodep);
+    static void branchAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 0cec01ab1..1727126ed 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -24,6 +24,8 @@
 //      This transformation honors outputSplitCFuncs.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3CCtors.h b/src/V3CCtors.h
index 4a244dca2..c719d65d1 100644
--- a/src/V3CCtors.h
+++ b/src/V3CCtors.h
@@ -20,14 +20,16 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3CCtors final {
 public:
-    static void cctorsAll();
+    static void cctorsAll() VL_MT_DISABLED;
 
 private:
-    static void evalAsserts();
+    static void evalAsserts() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 1fae654db..05215f5bc 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -22,6 +22,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3CUse.h b/src/V3CUse.h
index 1ab67c8f0..4e475f3b8 100644
--- a/src/V3CUse.h
+++ b/src/V3CUse.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3CUse final {
 public:
-    static void cUseAll();
+    static void cUseAll() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 9110d9b93..53cc524ce 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -34,6 +34,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Case.h b/src/V3Case.h
index 0fa9fb11f..d78984d16 100644
--- a/src/V3Case.h
+++ b/src/V3Case.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 class AstNodeCase;
 
@@ -27,8 +29,8 @@ class AstNodeCase;
 
 class V3Case final {
 public:
-    static void caseAll(AstNetlist* nodep);
-    static void caseLint(AstNodeCase* nodep);
+    static void caseAll(AstNetlist* nodep) VL_MT_DISABLED;
+    static void caseLint(AstNodeCase* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index eaecd7320..7362f9c71 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -37,6 +37,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Cast.h b/src/V3Cast.h
index 1f359dc9c..23177ced6 100644
--- a/src/V3Cast.h
+++ b/src/V3Cast.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Cast final {
 public:
-    static void castAll(AstNetlist* nodep);
+    static void castAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index ab62db18c..e71de0dab 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -20,6 +20,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Class.h b/src/V3Class.h
index bde611ead..8401a9504 100644
--- a/src/V3Class.h
+++ b/src/V3Class.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Class final {
 public:
-    static void classAll(AstNetlist* nodep);
+    static void classAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index 026ebe039..9023fadd7 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Clean.h b/src/V3Clean.h
index 451004d00..be37e2420 100644
--- a/src/V3Clean.h
+++ b/src/V3Clean.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Clean final {
 public:
-    static void cleanAll(AstNetlist* nodep);
+    static void cleanAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index c72730ffb..6a66f45e5 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -27,6 +27,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Clock.h b/src/V3Clock.h
index c809b9113..da009685b 100644
--- a/src/V3Clock.h
+++ b/src/V3Clock.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Clock final {
 public:
-    static void clockAll(AstNetlist* nodep);
+    static void clockAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp
index a4d425229..f6fcd3260 100644
--- a/src/V3Combine.cpp
+++ b/src/V3Combine.cpp
@@ -19,6 +19,8 @@
 //      Also drop empty CFuncs
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Combine.h b/src/V3Combine.h
index 2ea3ef581..466cb850c 100644
--- a/src/V3Combine.h
+++ b/src/V3Combine.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Combine final {
 public:
-    static void combineAll(AstNetlist* nodep);
+    static void combineAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index e4cddae9d..d6e08d083 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -20,6 +20,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Common.h b/src/V3Common.h
index f71e7ba2e..854077e07 100644
--- a/src/V3Common.h
+++ b/src/V3Common.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3Common final {
 public:
-    static void commonAll();
+    static void commonAll() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index b96b2fee8..ea0e4bea6 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -20,6 +20,8 @@
 //          If operands are constant, replace this node with constant.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Const.h b/src/V3Const.h
index a0c0cf797..e992faca8 100644
--- a/src/V3Const.h
+++ b/src/V3Const.h
@@ -21,43 +21,44 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 
 class V3Const final {
 public:
-    static AstNode* constifyParamsEdit(AstNode* nodep);
-    static AstNodeExpr* constifyParamsEdit(AstNodeExpr* exprp) {
+    static AstNode* constifyParamsEdit(AstNode* nodep) VL_MT_DISABLED;
+    static AstNodeExpr* constifyParamsEdit(AstNodeExpr* exprp) VL_MT_DISABLED {
         return VN_AS(constifyParamsEdit(static_cast<AstNode*>(exprp)), NodeExpr);
     }
-    static AstNode* constifyParamsNoWarnEdit(AstNode* nodep);
-    static AstNodeExpr* constifyParamsNoWarnEdit(AstNodeExpr* exprp) {
+    static AstNode* constifyParamsNoWarnEdit(AstNode* nodep) VL_MT_DISABLED;
+    static AstNodeExpr* constifyParamsNoWarnEdit(AstNodeExpr* exprp) VL_MT_DISABLED {
         return VN_AS(constifyParamsNoWarnEdit(static_cast<AstNode*>(exprp)), NodeExpr);
     }
-    static AstNode* constifyGenerateParamsEdit(AstNode* nodep);
+    static AstNode* constifyGenerateParamsEdit(AstNode* nodep) VL_MT_DISABLED;
     // Only do constant pushing, without removing dead logic
-    static void constifyAllLive(AstNetlist* nodep);
+    static void constifyAllLive(AstNetlist* nodep) VL_MT_DISABLED;
     // Everything that's possible
-    static void constifyAll(AstNetlist* nodep);
+    static void constifyAll(AstNetlist* nodep) VL_MT_DISABLED;
     // Also, warn
-    static void constifyAllLint(AstNetlist* nodep);
+    static void constifyAllLint(AstNetlist* nodep) VL_MT_DISABLED;
     // C++ datatypes
-    static void constifyCpp(AstNetlist* nodep);
+    static void constifyCpp(AstNetlist* nodep) VL_MT_DISABLED;
     // Only the current node and lower
     // Return new node that may have replaced nodep
-    static AstNode* constifyEditCpp(AstNode* nodep);
-    static AstNodeExpr* constifyEditCpp(AstNodeExpr* exprp) {
+    static AstNode* constifyEditCpp(AstNode* nodep) VL_MT_DISABLED;
+    static AstNodeExpr* constifyEditCpp(AstNodeExpr* exprp) VL_MT_DISABLED {
         return VN_AS(constifyEditCpp(static_cast<AstNode*>(exprp)), NodeExpr);
     }
     // Only the current node and lower
     // Return new node that may have replaced nodep
-    static AstNode* constifyEdit(AstNode* nodep);
-    static AstNodeExpr* constifyEdit(AstNodeExpr* exprp) {
+    static AstNode* constifyEdit(AstNode* nodep) VL_MT_DISABLED;
+    static AstNodeExpr* constifyEdit(AstNodeExpr* exprp) VL_MT_DISABLED {
         return VN_AS(constifyEdit(static_cast<AstNode*>(exprp)), NodeExpr);
     }
     // Only the current node and lower, with special SenTree optimization
     // Return new node that may have replaced nodep
-    static AstNode* constifyExpensiveEdit(AstNode* nodep);
+    static AstNode* constifyExpensiveEdit(AstNode* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 280e652cc..85c9af732 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Coverage.h b/src/V3Coverage.h
index 3a29fd7cb..b3a48739b 100644
--- a/src/V3Coverage.h
+++ b/src/V3Coverage.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
@@ -27,7 +29,7 @@ class AstNetlist;
 class V3Coverage final {
 public:
     // CONSTRUCTORS
-    static void coverage(AstNetlist* rootp);
+    static void coverage(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp
index dbfc26862..58176cd69 100644
--- a/src/V3CoverageJoin.cpp
+++ b/src/V3CoverageJoin.cpp
@@ -17,6 +17,8 @@
 //      If two COVERTOGGLEs have same VARSCOPE, combine them
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3CoverageJoin.h b/src/V3CoverageJoin.h
index 3f1a88345..9441b3742 100644
--- a/src/V3CoverageJoin.h
+++ b/src/V3CoverageJoin.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
@@ -27,7 +29,7 @@ class AstNetlist;
 class V3CoverageJoin final {
 public:
     // CONSTRUCTORS
-    static void coverageJoin(AstNetlist* rootp);
+    static void coverageJoin(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index dd91a542d..6a0f8ae7a 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -33,6 +33,8 @@
 // here after scoping to allow more dead node removal.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Dead.h b/src/V3Dead.h
index c94508137..614bc7270 100644
--- a/src/V3Dead.h
+++ b/src/V3Dead.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
@@ -27,13 +29,13 @@ class AstNetlist;
 class V3Dead final {
 public:
     // Modules, no vars/dtypes
-    static void deadifyModules(AstNetlist* nodep);
+    static void deadifyModules(AstNetlist* nodep) VL_MT_DISABLED;
     // Modules, Data types
-    static void deadifyDTypes(AstNetlist* nodep);
-    static void deadifyDTypesScoped(AstNetlist* nodep);
+    static void deadifyDTypes(AstNetlist* nodep) VL_MT_DISABLED;
+    static void deadifyDTypesScoped(AstNetlist* nodep) VL_MT_DISABLED;
     // Everything that's possible
-    static void deadifyAll(AstNetlist* nodep);
-    static void deadifyAllScoped(AstNetlist* nodep);
+    static void deadifyAll(AstNetlist* nodep) VL_MT_DISABLED;
+    static void deadifyAllScoped(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index d8d9185ff..eba736d48 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -48,6 +48,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Delayed.h b/src/V3Delayed.h
index dd36bda69..c8147cb0d 100644
--- a/src/V3Delayed.h
+++ b/src/V3Delayed.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Delayed final {
 public:
-    static void delayedAll(AstNetlist* nodep);
+    static void delayedAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index 32797e069..7f1012f50 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Depth.h b/src/V3Depth.h
index a35aaf56a..b844330cf 100644
--- a/src/V3Depth.h
+++ b/src/V3Depth.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Depth final {
 public:
-    static void depthAll(AstNetlist* nodep);
+    static void depthAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index 4adebda13..b0e65d136 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -20,6 +20,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DepthBlock.h b/src/V3DepthBlock.h
index 0282d0487..9f29b0ce9 100644
--- a/src/V3DepthBlock.h
+++ b/src/V3DepthBlock.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3DepthBlock final {
 public:
-    static void depthBlockAll(AstNetlist* nodep);
+    static void depthBlockAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp
index fe5fe15f9..8b68ca011 100644
--- a/src/V3Descope.cpp
+++ b/src/V3Descope.cpp
@@ -22,6 +22,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Descope.h b/src/V3Descope.h
index b8f77b8db..ff1e0a9ff 100644
--- a/src/V3Descope.h
+++ b/src/V3Descope.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Descope final {
 public:
-    static void descopeAll(AstNetlist* nodep);
+    static void descopeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index c3caf86c8..4e70c94ac 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Dfg.h b/src/V3Dfg.h
index e0d72335b..3be33cf06 100644
--- a/src/V3Dfg.h
+++ b/src/V3Dfg.h
@@ -35,8 +35,10 @@
 
 #include "V3Ast.h"
 #include "V3Error.h"
+#include "V3Global.h"
 #include "V3Hash.h"
 #include "V3List.h"
+#include "V3ThreadSafety.h"
 
 #include "V3Dfg__gen_forward_class_decls.h"  // From ./astgen
 
@@ -140,8 +142,8 @@ class DfgGraph final {
 
 public:
     // CONSTRUCTOR
-    explicit DfgGraph(AstModule& module, const string& name = "");
-    ~DfgGraph();
+    explicit DfgGraph(AstModule& module, const string& name = "") VL_MT_DISABLED;
+    ~DfgGraph() VL_MT_DISABLED;
     VL_UNCOPYABLE(DfgGraph);
 
     // METHODS
@@ -183,12 +185,12 @@ public:
     inline void forEachVertex(std::function<void(const DfgVertex&)> f) const;
 
     // Add contents of other graph to this graph. Leaves other graph empty.
-    void addGraph(DfgGraph& other);
+    void addGraph(DfgGraph& other) VL_MT_DISABLED;
 
     // Split this graph into individual components (unique sub-graphs with no edges between them).
     // Also removes any vertices that are not weakly connected to any variable.
     // Leaves 'this' graph empty.
-    std::vector<std::unique_ptr<DfgGraph>> splitIntoComponents(std::string label);
+    std::vector<std::unique_ptr<DfgGraph>> splitIntoComponents(std::string label) VL_MT_DISABLED;
 
     // Extract cyclic sub-graphs from 'this' graph. Cyclic sub-graphs are those that contain at
     // least one strongly connected component (SCC) plus any other vertices that feed or sink from
@@ -198,26 +200,27 @@ public:
     // of a cycle) are left in 'this' graph. This means that at the end 'this' graph is guaranteed
     // to be a DAG (acyclic). 'this' will not necessarily be a connected graph at the end, even if
     // it was originally connected.
-    std::vector<std::unique_ptr<DfgGraph>> extractCyclicComponents(std::string label);
+    std::vector<std::unique_ptr<DfgGraph>>
+    extractCyclicComponents(std::string label) VL_MT_DISABLED;
 
     // Dump graph in Graphviz format into the given stream 'os'. 'label' is added to the name of
     // the graph which is included in the output.
-    void dumpDot(std::ostream& os, const string& label = "") const;
+    void dumpDot(std::ostream& os, const string& label = "") const VL_MT_DISABLED;
     // Dump graph in Graphviz format into a new file with the given 'fileName'. 'label' is added to
     // the name of the graph which is included in the output.
-    void dumpDotFile(const string& fileName, const string& label = "") const;
+    void dumpDotFile(const string& fileName, const string& label = "") const VL_MT_DISABLED;
     // Dump graph in Graphviz format into a new automatically numbered debug file. 'label' is
     // added to the name of the graph, which is included in the file name and the output.
-    void dumpDotFilePrefixed(const string& label = "") const;
+    void dumpDotFilePrefixed(const string& label = "") const VL_MT_DISABLED;
     // Dump upstream (source) logic cone starting from given vertex into a file with the given
     // 'fileName'. 'name' is the name of the graph, which is included in the output.
     void dumpDotUpstreamCone(const string& fileName, const DfgVertex& vtx,
-                             const string& name = "") const;
+                             const string& name = "") const VL_MT_DISABLED;
     // Dump all individual logic cones driving external variables in Graphviz format into separate
     // new automatically numbered debug files. 'label' is added to the name of the graph, which is
     // included in the file names and the output. This is useful for very large graphs that are
     // otherwise difficult to browse visually due to their size.
-    void dumpDotAllVarConesPrefixed(const string& label = "") const;
+    void dumpDotAllVarConesPrefixed(const string& label = "") const VL_MT_DISABLED;
 };
 
 //------------------------------------------------------------------------------
@@ -243,9 +246,9 @@ public:
     // The sink (consumer) of this edge
     DfgVertex* sinkp() const { return m_sinkp; }
     // Remove driver of this edge
-    void unlinkSource();
+    void unlinkSource() VL_MT_DISABLED;
     // Relink this edge to be driven from the given new source vertex
-    void relinkSource(DfgVertex* newSourcep);
+    void relinkSource(DfgVertex* newSourcep) VL_MT_DISABLED;
 };
 
 //------------------------------------------------------------------------------
@@ -272,10 +275,10 @@ protected:
     UserDataStorage m_userDataStorage;  // User data storage
 
     // CONSTRUCTOR
-    DfgVertex(DfgGraph& dfg, VDfgType type, FileLine* flp, AstNodeDType* dtypep);
+    DfgVertex(DfgGraph& dfg, VDfgType type, FileLine* flp, AstNodeDType* dtypep) VL_MT_DISABLED;
 
 public:
-    virtual ~DfgVertex();
+    virtual ~DfgVertex() VL_MT_DISABLED;
 
     // METHODS
 private:
@@ -283,10 +286,10 @@ private:
     virtual void accept(DfgVisitor& v) = 0;
 
     // Part of Vertex equality only dependent on this vertex
-    virtual bool selfEquals(const DfgVertex& that) const;
+    virtual bool selfEquals(const DfgVertex& that) const VL_MT_DISABLED;
 
     // Part of Vertex hash only dependent on this vertex
-    virtual V3Hash selfHash() const;
+    virtual V3Hash selfHash() const VL_MT_DISABLED;
 
 public:
     // Supported packed types
@@ -409,7 +412,7 @@ public:
     // semantics of the logic. The 'cache' argument is used to store results to avoid repeat
     // evaluations, but it requires that the upstream sources of the compared vertices do not
     // change between invocations.
-    bool equals(const DfgVertex& that, EqualsCache& cache) const;
+    bool equals(const DfgVertex& that, EqualsCache& cache) const VL_MT_DISABLED;
 
     // Uncached version of 'equals'
     bool equals(const DfgVertex& that) const {
@@ -419,7 +422,7 @@ public:
 
     // Hash of vertex (depends on this vertex and all upstream vertices feeding into this vertex).
     // Uses user data for caching hashes
-    V3Hash hash();
+    V3Hash hash() VL_MT_DISABLED;
 
     // Source edges of this vertex
     virtual std::pair<DfgEdge*, size_t> sourceEdges() = 0;
@@ -437,13 +440,13 @@ public:
     bool hasMultipleSinks() const { return m_sinksp && m_sinksp->m_nextp; }
 
     // Fanout (number of sinks) of this vertex (expensive to compute)
-    uint32_t fanout() const;
+    uint32_t fanout() const VL_MT_DISABLED;
 
     // Unlink from container (graph or builder), then delete this vertex
-    void unlinkDelete(DfgGraph& dfg);
+    void unlinkDelete(DfgGraph& dfg) VL_MT_DISABLED;
 
     // Relink all sinks to be driven from the given new source
-    void replaceWith(DfgVertex* newSourcep);
+    void replaceWith(DfgVertex* newSourcep) VL_MT_DISABLED;
 
     // Access to vertex list for faster iteration in important contexts
     DfgVertex* verticesNext() const { return m_verticesEnt.nextp(); }
@@ -451,56 +454,58 @@ public:
 
     // Calls given function 'f' for each source vertex of this vertex
     // Unconnected source edges are not iterated.
-    inline void forEachSource(std::function<void(DfgVertex&)> f);
+    inline void forEachSource(std::function<void(DfgVertex&)> f) VL_MT_DISABLED;
 
     // Calls given function 'f' for each source vertex of this vertex
     // Unconnected source edges are not iterated.
-    inline void forEachSource(std::function<void(const DfgVertex&)> f) const;
+    inline void forEachSource(std::function<void(const DfgVertex&)> f) const VL_MT_DISABLED;
 
     // Calls given function 'f' for each source edge of this vertex. Also passes source index.
-    inline void forEachSourceEdge(std::function<void(DfgEdge&, size_t)> f);
+    inline void forEachSourceEdge(std::function<void(DfgEdge&, size_t)> f) VL_MT_DISABLED;
 
     // Calls given function 'f' for each source edge of this vertex. Also passes source index.
-    inline void forEachSourceEdge(std::function<void(const DfgEdge&, size_t)> f) const;
+    inline void
+    forEachSourceEdge(std::function<void(const DfgEdge&, size_t)> f) const VL_MT_DISABLED;
 
     // Calls given function 'f' for each sink vertex of this vertex
     // Unlinking/deleting the given sink during iteration is safe, but not other sinks of this
     // vertex.
-    inline void forEachSink(std::function<void(DfgVertex&)> f);
+    inline void forEachSink(std::function<void(DfgVertex&)> f) VL_MT_DISABLED;
 
     // Calls given function 'f' for each sink vertex of this vertex
-    inline void forEachSink(std::function<void(const DfgVertex&)> f) const;
+    inline void forEachSink(std::function<void(const DfgVertex&)> f) const VL_MT_DISABLED;
 
     // Calls given function 'f' for each sink edge of this vertex.
     // Unlinking/deleting the given sink during iteration is safe, but not other sinks of this
     // vertex.
-    inline void forEachSinkEdge(std::function<void(DfgEdge&)> f);
+    inline void forEachSinkEdge(std::function<void(DfgEdge&)> f) VL_MT_DISABLED;
 
     // Calls given function 'f' for each sink edge of this vertex.
-    inline void forEachSinkEdge(std::function<void(const DfgEdge&)> f) const;
+    inline void forEachSinkEdge(std::function<void(const DfgEdge&)> f) const VL_MT_DISABLED;
 
     // Returns first source edge which satisfies the given predicate 'p', or nullptr if no such
     // sink vertex exists
-    inline const DfgEdge* findSourceEdge(std::function<bool(const DfgEdge&, size_t)> p) const;
+    inline const DfgEdge*
+    findSourceEdge(std::function<bool(const DfgEdge&, size_t)> p) const VL_MT_DISABLED;
 
     // Returns first sink vertex of type 'Vertex' which satisfies the given predicate 'p',
     // or nullptr if no such sink vertex exists
     template <typename Vertex>
-    inline Vertex* findSink(std::function<bool(const Vertex&)> p) const;
+    inline Vertex* findSink(std::function<bool(const Vertex&)> p) const VL_MT_DISABLED;
 
     // Returns first sink vertex of type 'Vertex', or nullptr if no such sink vertex exists.
     // This is a special case of 'findSink' above with the predicate always true.
     template <typename Vertex>
-    inline Vertex* findSink() const;
+    inline Vertex* findSink() const VL_MT_DISABLED;
 
     // Is this a DfgConst that is all zeroes
-    inline bool isZero() const;
+    inline bool isZero() const VL_MT_DISABLED;
 
     // Is this a DfgConst that is all ones
-    inline bool isOnes() const;
+    inline bool isOnes() const VL_MT_DISABLED;
 
     // Should this vertex be inlined when rendering to Ast, or be stored to a temporary
-    inline bool inlined() const;
+    inline bool inlined() const VL_MT_DISABLED;
 
     // Methods that allow DfgVertex to participate in error reporting/messaging
     void v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex) {
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index da265a1ff..c4aa2d1be 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -26,6 +26,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DfgDecomposition.cpp b/src/V3DfgDecomposition.cpp
index 9dc61a07d..31bb001ce 100644
--- a/src/V3DfgDecomposition.cpp
+++ b/src/V3DfgDecomposition.cpp
@@ -18,6 +18,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index 089e551b4..43728cef9 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -26,6 +26,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index a299cae0e..0a514723b 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -18,6 +18,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DfgOptimizer.h b/src/V3DfgOptimizer.h
index 16b4b34cb..8ec1ede6c 100644
--- a/src/V3DfgOptimizer.h
+++ b/src/V3DfgOptimizer.h
@@ -21,15 +21,16 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 
 namespace V3DfgOptimizer {
 // Extract further logic blocks from the design for additional optimization opportunities
-void extract(AstNetlist*);
+void extract(AstNetlist*) VL_MT_DISABLED;
 
 // Optimize the design
-void optimize(AstNetlist*, const string& label);
+void optimize(AstNetlist*, const string& label) VL_MT_DISABLED;
 }  // namespace V3DfgOptimizer
 
 #endif  // Guard
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 3edfe5a88..44026320e 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 
 #include "V3DfgPasses.h"
diff --git a/src/V3DfgPasses.h b/src/V3DfgPasses.h
index fabe4f92d..6b6689503 100644
--- a/src/V3DfgPasses.h
+++ b/src/V3DfgPasses.h
@@ -20,6 +20,7 @@
 #include "config_build.h"
 
 #include "V3DfgPeephole.h"
+#include "V3ThreadSafety.h"
 
 class AstModule;
 class DfgGraph;
@@ -35,7 +36,7 @@ public:
     VDouble0 m_eliminated;  // Number of common sub-expressions eliminated
     explicit V3DfgCseContext(const std::string& label)
         : m_label{label} {}
-    ~V3DfgCseContext();
+    ~V3DfgCseContext() VL_MT_DISABLED;
 };
 
 class DfgRemoveVarsContext final {
@@ -45,7 +46,7 @@ public:
     VDouble0 m_removed;  // Number of redundant variables removed
     explicit DfgRemoveVarsContext(const std::string& label)
         : m_label{label} {}
-    ~DfgRemoveVarsContext();
+    ~DfgRemoveVarsContext() VL_MT_DISABLED;
 };
 
 class V3DfgOptimizationContext final {
@@ -73,8 +74,8 @@ public:
     V3DfgCseContext m_cseContext1{m_label + " 2nd"};
     V3DfgPeepholeContext m_peepholeContext{m_label};
     DfgRemoveVarsContext m_removeVarsContext{m_label};
-    explicit V3DfgOptimizationContext(const std::string& label);
-    ~V3DfgOptimizationContext();
+    explicit V3DfgOptimizationContext(const std::string& label) VL_MT_DISABLED;
+    ~V3DfgOptimizationContext() VL_MT_DISABLED;
 
     const std::string& prefix() const { return m_prefix; }
 };
@@ -87,29 +88,29 @@ namespace V3DfgPasses {
 // Construct a DfGGraph representing the combinational logic in the given AstModule. The logic
 // that is represented by the graph is removed from the given AstModule. Returns the
 // constructed DfgGraph.
-DfgGraph* astToDfg(AstModule&, V3DfgOptimizationContext&);
+DfgGraph* astToDfg(AstModule&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
 // Optimize the given DfgGraph
-void optimize(DfgGraph&, V3DfgOptimizationContext&);
+void optimize(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
 // Convert DfgGraph back into Ast, and insert converted graph back into its parent module.
 // Returns the parent module.
-AstModule* dfgToAst(DfgGraph&, V3DfgOptimizationContext&);
+AstModule* dfgToAst(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
 //===========================================================================
 // Intermediate/internal operations
 //===========================================================================
 
 // Common subexpression elimination
-void cse(DfgGraph&, V3DfgCseContext&);
+void cse(DfgGraph&, V3DfgCseContext&) VL_MT_DISABLED;
 // Inline fully driven variables
-void inlineVars(const DfgGraph&);
+void inlineVars(const DfgGraph&) VL_MT_DISABLED;
 // Peephole optimizations
-void peephole(DfgGraph&, V3DfgPeepholeContext&);
+void peephole(DfgGraph&, V3DfgPeepholeContext&) VL_MT_DISABLED;
 // Remove redundant variables
-void removeVars(DfgGraph&, DfgRemoveVarsContext&);
+void removeVars(DfgGraph&, DfgRemoveVarsContext&) VL_MT_DISABLED;
 // Remove unused nodes
-void removeUnused(DfgGraph&);
+void removeUnused(DfgGraph&) VL_MT_DISABLED;
 }  // namespace V3DfgPasses
 
 #endif
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index 72d1f19b0..c3d969a8e 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 
 #include "V3DfgPeephole.h"
diff --git a/src/V3DfgPeephole.h b/src/V3DfgPeephole.h
index 70cf8e044..c2d83042e 100644
--- a/src/V3DfgPeephole.h
+++ b/src/V3DfgPeephole.h
@@ -19,6 +19,8 @@
 
 #include "config_build.h"
 
+#include "V3ThreadSafety.h"
+
 #include <V3Stats.h>
 
 #define _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, arg) macro(arg, #arg)
@@ -127,8 +129,8 @@ struct V3DfgPeepholeContext final {
     // Count of applications for each optimization (for statistics)
     std::array<VDouble0, VDfgPeepholePattern::_ENUM_END> m_count;
 
-    explicit V3DfgPeepholeContext(const std::string& label);
-    ~V3DfgPeepholeContext();
+    explicit V3DfgPeepholeContext(const std::string& label) VL_MT_DISABLED;
+    ~V3DfgPeepholeContext() VL_MT_DISABLED;
 };
 
 #endif
diff --git a/src/V3DfgVertices.h b/src/V3DfgVertices.h
index a576d5767..bbcd9bdca 100644
--- a/src/V3DfgVertices.h
+++ b/src/V3DfgVertices.h
@@ -43,8 +43,8 @@ class DfgVertexVar VL_NOT_FINAL : public DfgVertexVariadic {
     bool m_hasModRefs = false;  // This AstVar is referenced outside the DFG, but in the module
     bool m_hasExtRefs = false;  // This AstVar is referenced from outside the module
 
-    bool selfEquals(const DfgVertex& that) const final;
-    V3Hash selfHash() const final;
+    bool selfEquals(const DfgVertex& that) const final VL_MT_DISABLED;
+    V3Hash selfHash() const final VL_MT_DISABLED;
 
 public:
     DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVar* varp, uint32_t initialCapacity)
@@ -92,8 +92,8 @@ class DfgConst final : public DfgVertex {
 
     V3Number m_num;  // Constant value
 
-    bool selfEquals(const DfgVertex& that) const override;
-    V3Hash selfHash() const override;
+    bool selfEquals(const DfgVertex& that) const override VL_MT_DISABLED;
+    V3Hash selfHash() const override VL_MT_DISABLED;
 
 public:
     DfgConst(DfgGraph& dfg, FileLine* flp, const V3Number& num)
@@ -158,8 +158,8 @@ class DfgSel final : public DfgVertexUnary {
     // the constant 'lsbp', and as 'DfgMux` for the non-constant 'lsbp'.
     uint32_t m_lsb = 0;  // The LSB index
 
-    bool selfEquals(const DfgVertex& that) const override;
-    V3Hash selfHash() const override;
+    bool selfEquals(const DfgVertex& that) const override VL_MT_DISABLED;
+    V3Hash selfHash() const override VL_MT_DISABLED;
 
 public:
     DfgSel(DfgGraph& dfg, FileLine* flp, AstNodeDType* dtypep)
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index f41d9b1df..f1e3ab956 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3DupFinder.h b/src/V3DupFinder.h
index 37118aebc..102ef6a43 100644
--- a/src/V3DupFinder.h
+++ b/src/V3DupFinder.h
@@ -26,6 +26,7 @@
 #include "V3Ast.h"
 #include "V3Error.h"
 #include "V3Hasher.h"
+#include "V3ThreadSafety.h"
 
 #include <map>
 #include <memory>
@@ -76,14 +77,14 @@ public:
     iterator insert(AstNode* nodep) { return emplace(m_hasher(nodep), nodep); }
 
     // Erase node from data structure
-    size_type erase(AstNode* nodep);
+    size_type erase(AstNode* nodep) VL_MT_DISABLED;
 
     // Return duplicate, if one was inserted, with optional user check for sameness
-    iterator findDuplicate(AstNode* nodep, V3DupFinderUserSame* checkp = nullptr);
+    iterator findDuplicate(AstNode* nodep, V3DupFinderUserSame* checkp = nullptr) VL_MT_DISABLED;
 
     // Dump for debug
-    void dumpFile(const string& filename, bool tree);
-    void dumpFilePrefixed(const string& nameComment, bool tree = false);
+    void dumpFile(const string& filename, bool tree) VL_MT_DISABLED;
+    void dumpFilePrefixed(const string& nameComment, bool tree = false) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitC.h b/src/V3EmitC.h
index 696eb3df6..4ee9460cf 100644
--- a/src/V3EmitC.h
+++ b/src/V3EmitC.h
@@ -20,17 +20,19 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3EmitC final {
 public:
-    static void emitcConstPool();
-    static void emitcHeaders();
+    static void emitcConstPool() VL_MT_DISABLED;
+    static void emitcHeaders() VL_MT_DISABLED;
     static void emitcImp();
-    static void emitcInlines();
-    static void emitcModel();
-    static void emitcSyms(bool dpiHdrOnly = false);
-    static void emitcFiles();
+    static void emitcInlines() VL_MT_DISABLED;
+    static void emitcModel() VL_MT_DISABLED;
+    static void emitcSyms(bool dpiHdrOnly = false) VL_MT_DISABLED;
+    static void emitcFiles() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitCBase.h b/src/V3EmitCBase.h
index d3d797e3a..5abf33271 100644
--- a/src/V3EmitCBase.h
+++ b/src/V3EmitCBase.h
@@ -22,7 +22,7 @@
 
 #include "V3Ast.h"
 #include "V3File.h"
-#include "V3Global.h"
+#include "V3ThreadSafety.h"
 
 #include <cmath>
 #include <cstdarg>
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 6481ea2c4..8dbe3ca70 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -23,6 +23,7 @@
 #include "V3EmitCConstInit.h"
 #include "V3Global.h"
 #include "V3MemberMap.h"
+#include "V3ThreadSafety.h"
 
 #include <algorithm>
 #include <map>
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 3ea952903..873519d5d 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitCMain.h b/src/V3EmitCMain.h
index cf4d04f9f..65877429b 100644
--- a/src/V3EmitCMain.h
+++ b/src/V3EmitCMain.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3EmitCMain final {
 public:
-    static void emit();
+    static void emit() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index 071808934..6598da9a8 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitCMake.h b/src/V3EmitCMake.h
index 1f2a11246..ac611386c 100644
--- a/src/V3EmitCMake.h
+++ b/src/V3EmitCMake.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3EmitCMake final {
 public:
-    static void emit();
+    static void emit() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 3f988ed32..8eff11e6f 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 0ae5d82fd..4a041d784 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 02696c342..3f38e5119 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitMk.h b/src/V3EmitMk.h
index 0ddfdba66..2c043890b 100644
--- a/src/V3EmitMk.h
+++ b/src/V3EmitMk.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class V3HierBlockPlan;
 
 //============================================================================
@@ -29,8 +31,8 @@ public:
     // Number of source files after which to use parallel compiles
     static const size_t PARALLEL_FILE_CNT_THRESHOLD = 128;
 
-    static void emitmk();
-    static void emitHierVerilation(const V3HierBlockPlan* planp);
+    static void emitmk() VL_MT_DISABLED;
+    static void emitHierVerilation(const V3HierBlockPlan* planp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitV.h b/src/V3EmitV.h
index 8af3061df..80be5453a 100644
--- a/src/V3EmitV.h
+++ b/src/V3EmitV.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNode;
 class AstSenTree;
 
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 5466bf2f4..9065a24b7 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3EmitXml.h b/src/V3EmitXml.h
index 399f3f743..420795b0d 100644
--- a/src/V3EmitXml.h
+++ b/src/V3EmitXml.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3EmitXml final {
 public:
-    static void emitxml();
+    static void emitxml() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 48966be77..5d915f9c5 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -291,22 +291,27 @@ void V3Error::vlAbort() {
     VL_GCOV_DUMP();
     std::abort();
 }
-void V3Error::v3errorAcquireLock() VL_ACQUIRE(s().m_mutex) {
-#ifndef V3ERROR_NO_GLOBAL_
-    V3Error::s().m_mutex.lockCheckStopRequest(
-        []() -> void { V3ThreadPool::s().waitIfStopRequested(); });
+void V3Error::v3errorAcquireLock(bool mtDisabledCodeUnit) VL_ACQUIRE(s().m_mutex) {
+#if !defined(V3ERROR_NO_GLOBAL_)
+    if (!mtDisabledCodeUnit) {
+        V3Error::s().m_mutex.lockCheckStopRequest(
+            []() -> void { V3ThreadPool::s().waitIfStopRequested(); });
+    } else {
+        V3Error::s().m_mutex.lock();
+    }
 #else
     V3Error::s().m_mutex.lock();
 #endif
 }
-std::ostringstream& V3Error::v3errorPrep(V3ErrorCode code) VL_ACQUIRE(s().m_mutex) {
-    v3errorAcquireLock();
+std::ostringstream& V3Error::v3errorPrep(V3ErrorCode code, bool mtDisabledCodeUnit)
+    VL_ACQUIRE(s().m_mutex) {
+    v3errorAcquireLock(mtDisabledCodeUnit);
     s().v3errorPrep(code);
     return v3errorStr();
 }
-std::ostringstream& V3Error::v3errorPrepFileLine(V3ErrorCode code, const char* file, int line)
-    VL_ACQUIRE(s().m_mutex) {
-    v3errorPrep(code) << file << ":" << std::dec << line << ": ";
+std::ostringstream& V3Error::v3errorPrepFileLine(V3ErrorCode code, const char* file, int line,
+                                                 bool mtDisabledCodeUnit) VL_ACQUIRE(s().m_mutex) {
+    v3errorPrep(code, mtDisabledCodeUnit) << file << ":" << std::dec << line << ": ";
     return v3errorStr();
 }
 std::ostringstream& V3Error::v3errorStr() VL_REQUIRES(s().m_mutex) { return s().v3errorStr(); }
diff --git a/src/V3Error.h b/src/V3Error.h
index b6c92e8af..87c6c0bad 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -24,7 +24,7 @@
 
 // Limited V3 headers here - this is a base class for Vlc etc
 #include "V3String.h"
-#ifndef V3ERROR_NO_GLOBAL_
+#ifndef VL_MT_DISABLED_CODE_UNIT
 #include "V3ThreadPool.h"
 #endif
 
@@ -518,9 +518,11 @@ public:
 
     // Internals for v3error()/v3fatal() macros only
     // Error end takes the string stream to output, be careful to seek() as needed
-    static void v3errorAcquireLock() VL_ACQUIRE(s().m_mutex);
-    static std::ostringstream& v3errorPrep(V3ErrorCode code) VL_ACQUIRE(s().m_mutex);
-    static std::ostringstream& v3errorPrepFileLine(V3ErrorCode code, const char* file, int line)
+    static void v3errorAcquireLock(bool checkStopRequest) VL_ACQUIRE(s().m_mutex);
+    static std::ostringstream& v3errorPrep(V3ErrorCode code, bool mtDisabledCodeUnit)
+        VL_ACQUIRE(s().m_mutex);
+    static std::ostringstream& v3errorPrepFileLine(V3ErrorCode code, const char* file, int line,
+                                                   bool mtDisabledCodeUnit)
         VL_ACQUIRE(s().m_mutex);
     static std::ostringstream& v3errorStr() VL_REQUIRES(s().m_mutex);
     // static, but often overridden in classes.
@@ -530,8 +532,15 @@ public:
 };
 
 // Global versions, so that if the class doesn't define an operator, we get the functions anyway.
-void v3errorEnd(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex);
-void v3errorEndFatal(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex) VL_ATTR_NORETURN;
+void v3errorEnd(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex) VL_MT_SAFE;
+void v3errorEndFatal(std::ostringstream& sstr)
+    VL_RELEASE(V3Error::s().m_mutex) VL_MT_SAFE VL_ATTR_NORETURN;
+
+#ifdef VL_MT_DISABLED_CODE_UNIT
+#define VL_MT_DISABLED_CODE_UNIT_DEFINED 1
+#else
+#define VL_MT_DISABLED_CODE_UNIT_DEFINED 0
+#endif
 
 // Theses allow errors using << operators: v3error("foo"<<"bar");
 // Careful, you can't put () around msg, as you would in most macro definitions.
@@ -541,9 +550,12 @@ void v3errorEndFatal(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex)
 // the comma operator (,) to guarantee the execution order here.
 #define v3errorBuildMessage(prep, msg) \
     (prep, static_cast<std::ostringstream&>(V3Error::v3errorStr() << msg))
-#define v3warnCode(code, msg) v3errorEnd(v3errorBuildMessage(V3Error::v3errorPrep(code), msg))
+#define v3warnCode(code, msg) \
+    v3errorEnd( \
+        v3errorBuildMessage(V3Error::v3errorPrep(code, VL_MT_DISABLED_CODE_UNIT_DEFINED), msg))
 #define v3warnCodeFatal(code, msg) \
-    v3errorEndFatal(v3errorBuildMessage(V3Error::v3errorPrep(code), msg))
+    v3errorEndFatal( \
+        v3errorBuildMessage(V3Error::v3errorPrep(code, VL_MT_DISABLED_CODE_UNIT_DEFINED), msg))
 #define v3warn(code, msg) v3warnCode(V3ErrorCode::code, msg)
 #define v3info(msg) v3warnCode(V3ErrorCode::EC_INFO, msg)
 #define v3error(msg) v3warnCode(V3ErrorCode::EC_ERROR, msg)
@@ -553,10 +565,13 @@ void v3errorEndFatal(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex)
 // Use this instead of fatal() to mention the source code line.
 #define v3fatalSrc(msg) \
     v3errorEndFatal(v3errorBuildMessage( \
-        V3Error::v3errorPrepFileLine(V3ErrorCode::EC_FATALSRC, __FILE__, __LINE__), msg))
+        V3Error::v3errorPrepFileLine(V3ErrorCode::EC_FATALSRC, __FILE__, __LINE__, \
+                                     VL_MT_DISABLED_CODE_UNIT_DEFINED), \
+        msg))
 // Use this when normal v3fatal is called in static method that overrides fileline.
 #define v3fatalStatic(msg) \
-    ::v3errorEndFatal(v3errorBuildMessage(V3Error::v3errorPrep(V3ErrorCode::EC_FATAL), msg))
+    ::v3errorEndFatal(v3errorBuildMessage( \
+        V3Error::v3errorPrep(V3ErrorCode::EC_FATAL, VL_MT_DISABLED_CODE_UNIT_DEFINED), msg))
 
 #define UINFO(level, stmsg) \
     do { \
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 7af734fe8..2bfe49c5a 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -25,6 +25,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Expand.h b/src/V3Expand.h
index 01938f7a9..e3f8fc630 100644
--- a/src/V3Expand.h
+++ b/src/V3Expand.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Expand final {
 public:
-    static void expandAll(AstNetlist* nodep);
+    static void expandAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index 464ea6237..51437482b 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -37,6 +37,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Force.h b/src/V3Force.h
index 0318f80e3..647d6c813 100644
--- a/src/V3Force.h
+++ b/src/V3Force.h
@@ -21,13 +21,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Force final {
 public:
-    static void forceAll(AstNetlist* nodep);
+    static void forceAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index db64eda77..bce03b9fa 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -38,6 +38,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Fork.h b/src/V3Fork.h
index e36b530cb..53bd6c19d 100644
--- a/src/V3Fork.h
+++ b/src/V3Fork.h
@@ -21,6 +21,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
@@ -29,10 +31,10 @@ class V3Fork final {
 public:
     // Move/copy variables to "anonymous" objects if their lifetime might exceed the scope of a
     // procedure that declared them. Update the references apropriately.
-    static void makeDynamicScopes(AstNetlist* nodep);
+    static void makeDynamicScopes(AstNetlist* nodep) VL_MT_DISABLED;
     // Create tasks out of blocks/statments that can outlive processes in which they were forked.
     // Return value: number of tasks created
-    static void makeTasks(AstNetlist* nodep);
+    static void makeTasks(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index b3811bce8..a1594e185 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Gate.h b/src/V3Gate.h
index f4a03d3f0..f30c6f9a4 100644
--- a/src/V3Gate.h
+++ b/src/V3Gate.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Gate final {
 public:
-    static void gateAll(AstNetlist* nodep);
+    static void gateAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Global.h b/src/V3Global.h
index 90f8bc59b..a25a3f274 100644
--- a/src/V3Global.h
+++ b/src/V3Global.h
@@ -28,7 +28,9 @@
 
 #include "V3Error.h"
 #include "V3FileLine.h"
+#include "V3Mutex.h"
 #include "V3Options.h"
+#include "V3ThreadSafety.h"
 
 #include <string>
 #include <unordered_map>
@@ -127,6 +129,7 @@ public:
     V3Global() {}
     void boot();
     void shutdown();  // Release allocated resources
+
     // ACCESSORS (general)
     AstNetlist* rootp() const VL_MT_SAFE { return m_rootp; }
     VWidthMinUsage widthMinUsage() const { return m_widthMinUsage; }
@@ -134,8 +137,8 @@ public:
     bool assertScoped() const { return m_assertScoped; }
 
     // METHODS
-    void readFiles();
-    void removeStd();
+    void readFiles() VL_MT_DISABLED;
+    void removeStd() VL_MT_DISABLED;
     void checkTree() const;
     static void dumpCheckGlobalTree(const string& stagename, int newNumber = 0,
                                     bool doDump = true);
diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp
index 9eca82238..e8ab00441 100644
--- a/src/V3Graph.cpp
+++ b/src/V3Graph.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Graph.h b/src/V3Graph.h
index 84dd4f85f..c8a01acfa 100644
--- a/src/V3Graph.h
+++ b/src/V3Graph.h
@@ -23,6 +23,7 @@
 #include "V3Error.h"
 #include "V3List.h"
 #include "V3Rtti.h"
+#include "V3ThreadSafety.h"
 
 #include <algorithm>
 
@@ -88,19 +89,20 @@ protected:
     friend class V3GraphEdge;
     friend class GraphAcyc;
     // METHODS
-    double orderDFSIterate(V3GraphVertex* vertexp);
-    void dumpEdge(std::ostream& os, const V3GraphVertex* vertexp, const V3GraphEdge* edgep);
+    double orderDFSIterate(V3GraphVertex* vertexp) VL_MT_DISABLED;
+    void dumpEdge(std::ostream& os, const V3GraphVertex* vertexp,
+                  const V3GraphEdge* edgep) VL_MT_DISABLED;
     void verticesUnlink() { m_vertices.reset(); }
     // ACCESSORS
 
 public:
-    V3Graph();
-    virtual ~V3Graph();
+    V3Graph() VL_MT_DISABLED;
+    virtual ~V3Graph() VL_MT_DISABLED;
     virtual string dotRankDir() const { return "TB"; }  // rankdir for dot plotting
 
     // METHODS
-    void clear();  // Empty it of all vertices/edges, as if making a new object
-    void clearColors();
+    void clear() VL_MT_DISABLED;  // Empty it of all vertices/edges, as if making a new object
+    void clearColors() VL_MT_DISABLED;
     bool empty() const { return m_vertices.empty(); }
 
     V3GraphVertex* verticesBeginp() const { return m_vertices.begin(); }
@@ -109,66 +111,69 @@ public:
 
     /// Assign same color to all vertices in the same weakly connected component
     /// Thus different color if there's no edges between the two subgraphs
-    void weaklyConnected(V3EdgeFuncP edgeFuncp);
+    void weaklyConnected(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Assign same color to all vertices that are strongly connected
     /// Thus different color if there's no directional circuit within the subgraphs.
     /// (I.E. all loops will occur within each color, not between them.)
-    void stronglyConnected(V3EdgeFuncP edgeFuncp);
+    void stronglyConnected(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Assign an ordering number to all vertexes in a tree.
     /// All nodes with no inputs will get rank 1
-    void rank(V3EdgeFuncP edgeFuncp);
-    void rank();
+    void rank(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
+    void rank() VL_MT_DISABLED;
 
     /// Sort all vertices and edges using the V3GraphVertex::sortCmp() function
-    void sortVertices();
+    void sortVertices() VL_MT_DISABLED;
     /// Sort all edges and edges using the V3GraphEdge::sortCmp() function
-    void sortEdges();
+    void sortEdges() VL_MT_DISABLED;
 
     /// Order all vertices by rank and fanout, lowest first
     /// Sort all vertices by rank and fanout, lowest first
     /// Sort all edges by weight, lowest first
     /// Side-effect: assigns ranks to every node.
-    void order();
+    void order() VL_MT_DISABLED;
 
     // Similar to order() but does not assign ranks. Caller must
     // ensure that the graph has been ranked ahead of the call.
-    void orderPreRanked();
+    void orderPreRanked() VL_MT_DISABLED;
 
     /// Make acyclical (into a tree) by breaking a minimal subset of cutable edges.
-    void acyclic(V3EdgeFuncP edgeFuncp);
+    void acyclic(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any redundant edges, weights become MAX of any other weight
-    void removeRedundantEdges(V3EdgeFuncP edgeFuncp);
+    void removeRedundantEdges(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any redundant edges, weights become SUM of any other weight
-    void removeRedundantEdgesSum(V3EdgeFuncP edgeFuncp);
+    void removeRedundantEdgesSum(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any transitive edges.  E.g. if have edges A->B, B->C, and A->C
     /// then A->C is a "transitive" edge; it's implied by the first two
     /// (assuming the DAG is a dependency graph.)
     /// This algorithm can be expensive.
-    void removeTransitiveEdges();
+    void removeTransitiveEdges() VL_MT_DISABLED;
 
     /// Call loopsVertexCb on any one loop starting where specified
-    void reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp);
+    void reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) VL_MT_DISABLED;
 
     /// Build a subgraph of all loops starting where specified
-    void subtreeLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp, V3Graph* loopGraphp);
+    void subtreeLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp,
+                      V3Graph* loopGraphp) VL_MT_DISABLED;
 
     /// Debugging
-    void dump(std::ostream& os = std::cout);
-    void dumpDotFile(const string& filename, bool colorAsSubgraph) const;
-    void dumpDotFilePrefixed(const string& nameComment, bool colorAsSubgraph = false) const;
-    void dumpDotFilePrefixedAlways(const string& nameComment, bool colorAsSubgraph = false) const;
-    void userClearVertices();
-    void userClearEdges();
-    static void selfTest();
+    void dump(std::ostream& os = std::cout) VL_MT_DISABLED;
+    void dumpDotFile(const string& filename, bool colorAsSubgraph) const VL_MT_DISABLED;
+    void dumpDotFilePrefixed(const string& nameComment,
+                             bool colorAsSubgraph = false) const VL_MT_DISABLED;
+    void dumpDotFilePrefixedAlways(const string& nameComment,
+                                   bool colorAsSubgraph = false) const VL_MT_DISABLED;
+    void userClearVertices() VL_MT_DISABLED;
+    void userClearEdges() VL_MT_DISABLED;
+    static void selfTest() VL_MT_DISABLED;
 
     // CALLBACKS
-    virtual void loopsMessageCb(V3GraphVertex* vertexp);
-    virtual void loopsVertexCb(V3GraphVertex* vertexp);
+    virtual void loopsMessageCb(V3GraphVertex* vertexp) VL_MT_DISABLED;
+    virtual void loopsVertexCb(V3GraphVertex* vertexp) VL_MT_DISABLED;
 };
 
 //============================================================================
@@ -192,24 +197,24 @@ protected:
         uint32_t m_user;  // Marker for some algorithms
     };
     // METHODS
-    void verticesPushBack(V3Graph* graphp);
+    void verticesPushBack(V3Graph* graphp) VL_MT_DISABLED;
     // ACCESSORS
     void fanout(double fanout) { m_fanout = fanout; }
     void inUnlink() { m_ins.reset(); }  // Low level; normally unlinkDelete is what you want
     void outUnlink() { m_outs.reset(); }  // Low level; normally unlinkDelete is what you want
 protected:
     // CONSTRUCTORS
-    V3GraphVertex(V3Graph* graphp, const V3GraphVertex& old);
+    V3GraphVertex(V3Graph* graphp, const V3GraphVertex& old) VL_MT_DISABLED;
 
 public:
-    explicit V3GraphVertex(V3Graph* graphp);
+    explicit V3GraphVertex(V3Graph* graphp) VL_MT_DISABLED;
     //! Clone copy constructor. Doesn't copy edges or user/userp.
-    virtual V3GraphVertex* clone(V3Graph* graphp) const {
+    virtual V3GraphVertex* clone(V3Graph* graphp) const VL_MT_DISABLED {
         return new V3GraphVertex{graphp, *this};
     }
     virtual ~V3GraphVertex() = default;
-    void unlinkEdges(V3Graph* graphp);
-    void unlinkDelete(V3Graph* graphp);
+    void unlinkEdges(V3Graph* graphp) VL_MT_DISABLED;
+    void unlinkDelete(V3Graph* graphp) VL_MT_DISABLED;
 
     // METHODS
     // Return true iff of type T
@@ -275,23 +280,24 @@ public:
     V3GraphVertex* verticesNextp() const { return m_vertices.nextp(); }
     V3GraphEdge* inBeginp() const { return m_ins.begin(); }
     bool inEmpty() const { return inBeginp() == nullptr; }
-    bool inSize1() const;
+    bool inSize1() const VL_MT_DISABLED;
     V3GraphEdge* outBeginp() const { return m_outs.begin(); }
     bool outEmpty() const { return outBeginp() == nullptr; }
-    bool outSize1() const;
+    bool outSize1() const VL_MT_DISABLED;
     V3GraphEdge* beginp(GraphWay way) const { return way.forward() ? outBeginp() : inBeginp(); }
     // METHODS
     /// Error reporting
-    void v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex);
-    void v3errorEndFatal(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex);
+    void v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex) VL_MT_DISABLED;
+    void v3errorEndFatal(std::ostringstream& str) const
+        VL_RELEASE(V3Error::s().m_mutex) VL_MT_DISABLED;
     /// Edges are routed around this vertex to point from "from" directly to "to"
-    void rerouteEdges(V3Graph* graphp);
+    void rerouteEdges(V3Graph* graphp) VL_MT_DISABLED;
     /// Find the edge connecting ap and bp, where bp is wayward from ap.
     /// If edge is not found returns nullptr. O(edges) performance.
-    V3GraphEdge* findConnectingEdgep(GraphWay way, const V3GraphVertex* waywardp);
+    V3GraphEdge* findConnectingEdgep(GraphWay way, const V3GraphVertex* waywardp) VL_MT_DISABLED;
 };
 
-std::ostream& operator<<(std::ostream& os, V3GraphVertex* vertexp);
+std::ostream& operator<<(std::ostream& os, V3GraphVertex* vertexp) VL_MT_DISABLED;
 
 //============================================================================
 
@@ -320,25 +326,26 @@ protected:
     };
     // METHODS
     void init(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top, int weight,
-              bool cutable = false);
+              bool cutable = false) VL_MT_DISABLED;
     void cut() { m_weight = 0; }  // 0 weight is same as disconnected
-    void outPushBack();
-    void inPushBack();
+    void outPushBack() VL_MT_DISABLED;
+    void inPushBack() VL_MT_DISABLED;
     // CONSTRUCTORS
 protected:
     V3GraphEdge(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top,
-                const V3GraphEdge& old) {
+                const V3GraphEdge& old) VL_MT_DISABLED {
         init(graphp, fromp, top, old.m_weight, old.m_cutable);
     }
 
 public:
     //! Add DAG from one node to the specified node
     V3GraphEdge(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top, int weight,
-                bool cutable = false) {
+                bool cutable = false) VL_MT_DISABLED {
         init(graphp, fromp, top, weight, cutable);
     }
     //! Clone copy constructor.  Doesn't copy existing vertices or user/userp.
-    virtual V3GraphEdge* clone(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top) const {
+    virtual V3GraphEdge* clone(V3Graph* graphp, V3GraphVertex* fromp,
+                               V3GraphVertex* top) const VL_MT_DISABLED {
         return new V3GraphEdge{graphp, fromp, top, *this};
     }
     virtual ~V3GraphEdge() = default;
@@ -384,9 +391,9 @@ public:
         if (!m_weight || !rhsp->m_weight) return 0;
         return top()->sortCmp(rhsp->top());
     }
-    void unlinkDelete();
-    V3GraphEdge* relinkFromp(V3GraphVertex* newFromp);
-    V3GraphEdge* relinkTop(V3GraphVertex* newTop);
+    void unlinkDelete() VL_MT_DISABLED;
+    V3GraphEdge* relinkFromp(V3GraphVertex* newFromp) VL_MT_DISABLED;
+    V3GraphEdge* relinkTop(V3GraphVertex* newTop) VL_MT_DISABLED;
     // ACCESSORS
     int weight() const { return m_weight; }
     void weight(int weight) { m_weight = weight; }
diff --git a/src/V3GraphAcyc.cpp b/src/V3GraphAcyc.cpp
index 4b15ca3dd..968efd38b 100644
--- a/src/V3GraphAcyc.cpp
+++ b/src/V3GraphAcyc.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp
index 67a2f12b0..99b65dbc5 100644
--- a/src/V3GraphAlg.cpp
+++ b/src/V3GraphAlg.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3GraphPathChecker.cpp b/src/V3GraphPathChecker.cpp
index f609652b0..21cd1493c 100644
--- a/src/V3GraphPathChecker.cpp
+++ b/src/V3GraphPathChecker.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3GraphPathChecker.h b/src/V3GraphPathChecker.h
index 620736ff1..c4326d129 100644
--- a/src/V3GraphPathChecker.h
+++ b/src/V3GraphPathChecker.h
@@ -20,6 +20,7 @@
 #include "V3Error.h"
 #include "V3Graph.h"
 #include "V3GraphAlg.h"
+#include "V3ThreadSafety.h"
 
 //######################################################################
 
@@ -39,21 +40,22 @@ class GraphPathChecker final : GraphAlg<const V3Graph> {
 public:
     // CONSTRUCTORS
     explicit GraphPathChecker(const V3Graph* graphp,
-                              V3EdgeFuncP edgeFuncp = V3GraphEdge::followAlwaysTrue);
-    ~GraphPathChecker();
+                              V3EdgeFuncP edgeFuncp
+                              = V3GraphEdge::followAlwaysTrue) VL_MT_DISABLED;
+    ~GraphPathChecker() VL_MT_DISABLED;
 
     // METHODS
-    bool pathExistsFrom(const V3GraphVertex* fromp, const V3GraphVertex* top);
+    bool pathExistsFrom(const V3GraphVertex* fromp, const V3GraphVertex* top) VL_MT_DISABLED;
 
     // If have edges A->B, B->C, and A->C then A->C is considered a
     // "transitive" edge (implied by A->B and B->C) and it could be safely
     // removed. Detect such an edge.
-    bool isTransitiveEdge(const V3GraphEdge* edgep);
+    bool isTransitiveEdge(const V3GraphEdge* edgep) VL_MT_DISABLED;
 
 private:
     bool pathExistsInternal(const V3GraphVertex* ap, const V3GraphVertex* bp,
-                            unsigned* costp = nullptr);
-    void initHalfCriticalPaths(GraphWay way, bool checkOnly);
+                            unsigned* costp = nullptr) VL_MT_DISABLED;
+    void initHalfCriticalPaths(GraphWay way, bool checkOnly) VL_MT_DISABLED;
     void incGeneration() { ++m_generation; }
 
     VL_UNCOPYABLE(GraphPathChecker);
diff --git a/src/V3GraphTest.cpp b/src/V3GraphTest.cpp
index 0550e73c1..1635bfc6a 100644
--- a/src/V3GraphTest.cpp
+++ b/src/V3GraphTest.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index 8c234cac2..331c8cbc9 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -72,6 +72,8 @@
 //       Used for b) and c).
 //       This options is repeated for all instantiating hierarchical blocks.
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "V3HierBlock.h"
 
 #include "V3Ast.h"
diff --git a/src/V3HierBlock.h b/src/V3HierBlock.h
index 02842a62d..33310209f 100644
--- a/src/V3HierBlock.h
+++ b/src/V3HierBlock.h
@@ -19,7 +19,8 @@
 
 #include "verilatedos.h"
 
-#include "V3Global.h"
+#include "V3Options.h"
+#include "V3ThreadSafety.h"
 
 #include <map>
 #include <set>
@@ -56,13 +57,13 @@ private:
 
     // METHODS
     VL_UNCOPYABLE(V3HierBlock);
-    static StrGParams stringifyParams(const GParams& gparams, bool forGOption);
+    static StrGParams stringifyParams(const GParams& gparams, bool forGOption) VL_MT_DISABLED;
 
 public:
     V3HierBlock(const AstNodeModule* modp, const GParams& gparams)
         : m_modp{modp}
         , m_gparams{gparams} {}
-    ~V3HierBlock();
+    ~V3HierBlock() VL_MT_DISABLED;
 
     void addParent(V3HierBlock* parentp) { m_parents.insert(parentp); }
     void addChild(V3HierBlock* childp) { m_children.insert(childp); }
@@ -73,19 +74,19 @@ public:
     const AstNodeModule* modp() const { return m_modp; }
 
     // For emitting Makefile and CMakeLists.txt
-    V3StringList commandArgs(bool forCMake) const;
-    V3StringList hierBlockArgs() const;
-    string hierPrefix() const;
-    string hierSomeFile(bool withDir, const char* prefix, const char* suffix) const;
-    string hierWrapper(bool withDir) const;
-    string hierMk(bool withDir) const;
-    string hierLib(bool withDir) const;
-    string hierGenerated(bool withDir) const;
+    V3StringList commandArgs(bool forCMake) const VL_MT_DISABLED;
+    V3StringList hierBlockArgs() const VL_MT_DISABLED;
+    string hierPrefix() const VL_MT_DISABLED;
+    string hierSomeFile(bool withDir, const char* prefix, const char* suffix) const VL_MT_DISABLED;
+    string hierWrapper(bool withDir) const VL_MT_DISABLED;
+    string hierMk(bool withDir) const VL_MT_DISABLED;
+    string hierLib(bool withDir) const VL_MT_DISABLED;
+    string hierGenerated(bool withDir) const VL_MT_DISABLED;
     // Returns the original HDL file if it is not included in v3Global.opt.vFiles().
-    string vFileIfNecessary() const;
+    string vFileIfNecessary() const VL_MT_DISABLED;
     // Write command line arguments to .f file for this hierarchical block
-    void writeCommandArgsFile(bool forCMake) const;
-    string commandArgsFileName(bool forCMake) const;
+    void writeCommandArgsFile(bool forCMake) const VL_MT_DISABLED;
+    string commandArgsFileName(bool forCMake) const VL_MT_DISABLED;
 };
 
 //######################################################################
@@ -103,8 +104,8 @@ public:
     using const_iterator = HierMap::const_iterator;
     using HierVector = std::vector<const V3HierBlock*>;
 
-    void add(const AstNodeModule* modp, const std::vector<AstVar*>& gparams);
-    void registerUsage(const AstNodeModule* parentp, const AstNodeModule* childp);
+    void add(const AstNodeModule* modp, const std::vector<AstVar*>& gparams) VL_MT_DISABLED;
+    void registerUsage(const AstNodeModule* parentp, const AstNodeModule* childp) VL_MT_DISABLED;
 
     const_iterator begin() const { return m_blocks.begin(); }
     const_iterator end() const { return m_blocks.end(); }
@@ -112,13 +113,13 @@ public:
 
     // Returns all hierarchical blocks that sorted in leaf-first order.
     // Latter block refers only already appeared hierarchical blocks.
-    HierVector hierBlocksSorted() const;
+    HierVector hierBlocksSorted() const VL_MT_DISABLED;
 
     // Write command line arguments to .f files for child Verilation run
-    void writeCommandArgsFiles(bool forCMake) const;
-    static string topCommandArgsFileName(bool forCMake);
+    void writeCommandArgsFiles(bool forCMake) const VL_MT_DISABLED;
+    static string topCommandArgsFileName(bool forCMake) VL_MT_DISABLED;
 
-    static void createPlan(AstNetlist* nodep);
+    static void createPlan(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // guard
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index 09e486a12..996e9d9bf 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Inline.h b/src/V3Inline.h
index dc5264ad1..1f347b139 100644
--- a/src/V3Inline.h
+++ b/src/V3Inline.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Inline final {
 public:
-    static void inlineAll(AstNetlist* nodep);
+    static void inlineAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 0b96463e5..5f0455714 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Inst.h b/src/V3Inst.h
index 6cfce8f77..8baccb465 100644
--- a/src/V3Inst.h
+++ b/src/V3Inst.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstAssignW;
 class AstCell;
 class AstNetlist;
@@ -29,11 +31,11 @@ class AstPin;
 
 class V3Inst final {
 public:
-    static void instAll(AstNetlist* nodep);
-    static void dearrayAll(AstNetlist* nodep);
+    static void instAll(AstNetlist* nodep) VL_MT_DISABLED;
+    static void dearrayAll(AstNetlist* nodep) VL_MT_DISABLED;
     static AstAssignW* pinReconnectSimple(AstPin* pinp, AstCell* cellp, bool forTristate,
-                                          bool alwaysCvt = false);
-    static void checkOutputShort(AstPin* nodep);
+                                          bool alwaysCvt = false) VL_MT_DISABLED;
+    static void checkOutputShort(AstPin* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index c236da288..7e363ba17 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -15,6 +15,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3InstrCount.h b/src/V3InstrCount.h
index 279885616..fc4978439 100644
--- a/src/V3InstrCount.h
+++ b/src/V3InstrCount.h
@@ -21,6 +21,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNode;
 
 class V3InstrCount final {
@@ -38,7 +40,8 @@ public:
     // if we see the same node twice (across more than one call to count,
     // potentially) raises an error.
     // Optional osp is stream to dump critical path to.
-    static uint32_t count(AstNode* nodep, bool assertNoDups, std::ostream* osp = nullptr);
+    static uint32_t count(AstNode* nodep, bool assertNoDups,
+                          std::ostream* osp = nullptr) VL_MT_DISABLED;
 };
 
 #endif  // guard
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 0b5f83122..a20c17252 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Life.h b/src/V3Life.h
index fa4291519..024f4e7c8 100644
--- a/src/V3Life.h
+++ b/src/V3Life.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Life final {
 public:
-    static void lifeAll(AstNetlist* nodep);
+    static void lifeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index f62882369..35728e5de 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LifePost.h b/src/V3LifePost.h
index ddf92c555..01042ce38 100644
--- a/src/V3LifePost.h
+++ b/src/V3LifePost.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3LifePost final {
 public:
-    static void lifepostAll(AstNetlist* nodep);
+    static void lifepostAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 6087999b3..d98a9158b 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -23,6 +23,8 @@
 //              Link to module that instantiates it
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkCells.h b/src/V3LinkCells.h
index eab1a73fe..dbaecd2be 100644
--- a/src/V3LinkCells.h
+++ b/src/V3LinkCells.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 class VInFilter;
 class V3ParseSym;
@@ -28,7 +30,7 @@ class V3ParseSym;
 
 class V3LinkCells final {
 public:
-    static void link(AstNetlist* nodep, VInFilter* filterp, V3ParseSym* parseSymp);
+    static void link(AstNetlist* nodep, VInFilter* filterp, V3ParseSym* parseSymp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index d9751b87a..7ea95b46f 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -61,6 +61,8 @@
 //      b          (VSymEnt->AstCell)
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkDot.h b/src/V3LinkDot.h
index 14af04e82..5e3667210 100644
--- a/src/V3LinkDot.h
+++ b/src/V3LinkDot.h
@@ -22,19 +22,20 @@
 
 #include "V3Ast.h"
 #include "V3Error.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 
 enum VLinkDotStep : uint8_t { LDS_PRIMARY, LDS_PARAMED, LDS_ARRAYED, LDS_SCOPED };
 
 class V3LinkDot final {
-    static void linkDotGuts(AstNetlist* rootp, VLinkDotStep step);
+    static void linkDotGuts(AstNetlist* rootp, VLinkDotStep step) VL_MT_DISABLED;
 
 public:
-    static void linkDotPrimary(AstNetlist* nodep);
-    static void linkDotParamed(AstNetlist* nodep);
-    static void linkDotArrayed(AstNetlist* nodep);
-    static void linkDotScope(AstNetlist* nodep);
+    static void linkDotPrimary(AstNetlist* nodep) VL_MT_DISABLED;
+    static void linkDotParamed(AstNetlist* nodep) VL_MT_DISABLED;
+    static void linkDotArrayed(AstNetlist* nodep) VL_MT_DISABLED;
+    static void linkDotScope(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 164f005c2..49b775ab9 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -36,6 +36,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkInc.h b/src/V3LinkInc.h
index 1b5a6ff55..b41807437 100644
--- a/src/V3LinkInc.h
+++ b/src/V3LinkInc.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3LinkInc final {
 public:
-    static void linkIncrements(AstNetlist* nodep);
+    static void linkIncrements(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index b7785e975..68807a097 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -29,6 +29,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkJump.h b/src/V3LinkJump.h
index 598cd98bc..48b919f8a 100644
--- a/src/V3LinkJump.h
+++ b/src/V3LinkJump.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3LinkJump final {
 public:
-    static void linkJump(AstNetlist* nodep);
+    static void linkJump(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index 6ba79865f..9431731a3 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -18,6 +18,8 @@
 //          Set lvalue() attributes on appropriate VARREFs.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkLValue.h b/src/V3LinkLValue.h
index 16656936d..26cbaa4e3 100644
--- a/src/V3LinkLValue.h
+++ b/src/V3LinkLValue.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 class AstNode;
 
@@ -27,8 +29,8 @@ class AstNode;
 
 class V3LinkLValue final {
 public:
-    static void linkLValue(AstNetlist* nodep);
-    static void linkLValueSet(AstNode* nodep);
+    static void linkLValue(AstNetlist* nodep) VL_MT_DISABLED;
+    static void linkLValueSet(AstNode* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 03ba5bf96..dbb0631da 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -19,6 +19,8 @@
 //          Create new MODULE TOP with connections to below signals
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkLevel.h b/src/V3LinkLevel.h
index c1b1c6354..aa86a2b82 100644
--- a/src/V3LinkLevel.h
+++ b/src/V3LinkLevel.h
@@ -22,6 +22,7 @@
 
 #include "V3Ast.h"
 #include "V3Error.h"
+#include "V3ThreadSafety.h"
 
 #include <vector>
 
@@ -31,13 +32,13 @@ class V3LinkLevel final {
 private:
     using ModVec = std::vector<AstNodeModule*>;
 
-    static void timescaling(const ModVec& mods);
-    static void wrapTopCell(AstNetlist* rootp);
-    static void wrapTopPackages(AstNetlist* rootp);
+    static void timescaling(const ModVec& mods) VL_MT_DISABLED;
+    static void wrapTopCell(AstNetlist* rootp) VL_MT_DISABLED;
+    static void wrapTopPackages(AstNetlist* rootp) VL_MT_DISABLED;
 
 public:
-    static void modSortByLevel();
-    static void wrapTop(AstNetlist* rootp);
+    static void modSortByLevel() VL_MT_DISABLED;
+    static void wrapTop(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 00b9ea3aa..48a5cf0e4 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -18,6 +18,8 @@
 //          Move some attributes around
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkParse.h b/src/V3LinkParse.h
index df57d97d2..5694c4396 100644
--- a/src/V3LinkParse.h
+++ b/src/V3LinkParse.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3LinkParse final {
 public:
-    static void linkParse(AstNetlist* rootp);
+    static void linkParse(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index 187d84028..e3767407c 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -24,6 +24,8 @@
 //          SenItems: Convert pos/negedge of non-simple signals to temporaries
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3LinkResolve.h b/src/V3LinkResolve.h
index 929c36452..0588f8e7a 100644
--- a/src/V3LinkResolve.h
+++ b/src/V3LinkResolve.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3LinkResolve final {
 public:
-    static void linkResolve(AstNetlist* rootp);
+    static void linkResolve(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index 586e8940e..16500e84d 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -22,6 +22,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Localize.h b/src/V3Localize.h
index 65d369214..ee4e62e6d 100644
--- a/src/V3Localize.h
+++ b/src/V3Localize.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Localize final {
 public:
-    static void localizeAll(AstNetlist* nodep);
+    static void localizeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index 52c6a4dfa..5598a5cdf 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -72,6 +72,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3MergeCond.h b/src/V3MergeCond.h
index 07d41e538..4510e4572 100644
--- a/src/V3MergeCond.h
+++ b/src/V3MergeCond.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3MergeCond final {
 public:
-    static void mergeAll(AstNetlist* nodep);
+    static void mergeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Name.cpp b/src/V3Name.cpp
index fc532f498..56896ef58 100644
--- a/src/V3Name.cpp
+++ b/src/V3Name.cpp
@@ -19,6 +19,8 @@
 //              Prepend __PVT__ to variable names
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Name.h b/src/V3Name.h
index f51fdac0b..cb2781378 100644
--- a/src/V3Name.h
+++ b/src/V3Name.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Name final {
 public:
-    static void nameAll(AstNetlist* nodep);
+    static void nameAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Number_test.cpp b/src/V3Number_test.cpp
index fd0887d8b..1d7898013 100644
--- a/src/V3Number_test.cpp
+++ b/src/V3Number_test.cpp
@@ -17,6 +17,7 @@
 // CHEAT!
 #define V3NUMBER_ASCII_BINARY
 #define V3ERROR_NO_GLOBAL_
+#define VL_MT_DISABLED_CODE_UNIT 1
 
 #include "config_build.h"
 #include "verilatedos.h"
diff --git a/src/V3OptionParser.cpp b/src/V3OptionParser.cpp
index 8d9f41b2c..ea245400e 100644
--- a/src/V3OptionParser.cpp
+++ b/src/V3OptionParser.cpp
@@ -15,6 +15,8 @@
 //*************************************************************************
 
 #ifndef V3OPTION_PARSER_NO_VOPTION_BOOL
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "V3Global.h"
 #include "V3Options.h"
 #endif
diff --git a/src/V3OptionParser.h b/src/V3OptionParser.h
index cc22b8f0a..6975bd844 100644
--- a/src/V3OptionParser.h
+++ b/src/V3OptionParser.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 #include <functional>
 #include <memory>
 #include <string>
@@ -64,25 +66,27 @@ private:
     const std::unique_ptr<Impl> m_pimpl;
 
     // METHODS
-    ActionIfs* find(const char* optp);
+    ActionIfs* find(const char* optp) VL_MT_DISABLED;
     template <class ACT, class ARG>
-    ActionIfs& add(const string& opt, ARG arg);
-    static bool hasPrefixFNo(const char* strp);  // Returns true if strp starts with "-fno"
-    static bool hasPrefixNo(const char* strp);  // Returns true if strp starts with "-no"
+    ActionIfs& add(const string& opt, ARG arg) VL_MT_DISABLED;
+    // Returns true if strp starts with "-fno"
+    static bool hasPrefixFNo(const char* strp) VL_MT_DISABLED;
+    // Returns true if strp starts with "-no"
+    static bool hasPrefixNo(const char* strp) VL_MT_DISABLED;
 
 public:
     // METHODS
     // Returns how many args are consumed. 0 means not match
-    int parse(int idx, int argc, char* argv[]);
+    int parse(int idx, int argc, char* argv[]) VL_MT_DISABLED;
     // Find the most similar option
-    string getSuggestion(const char* str) const;
-    void addSuggestionCandidate(const string& s);
+    string getSuggestion(const char* str) const VL_MT_DISABLED;
+    void addSuggestionCandidate(const string& s) VL_MT_DISABLED;
     // Call this function after all options are registered.
-    void finalize();
+    void finalize() VL_MT_DISABLED;
 
     // CONSTRUCTORS
-    V3OptionParser();
-    ~V3OptionParser();
+    V3OptionParser() VL_MT_DISABLED;
+    ~V3OptionParser() VL_MT_DISABLED;
 };
 
 class V3OptionParser::ActionIfs VL_NOT_FINAL {
@@ -121,29 +125,33 @@ private:
 
 public:
     // METHODS
-    ActionIfs& operator()(const char* optp, Set, bool*) const;
+    ActionIfs& operator()(const char* optp, Set, bool*) const VL_MT_DISABLED;
 #ifndef V3OPTION_PARSER_NO_VOPTION_BOOL
-    ActionIfs& operator()(const char* optp, Set, VOptionBool*) const;
+    ActionIfs& operator()(const char* optp, Set, VOptionBool*) const VL_MT_DISABLED;
 #endif
-    ActionIfs& operator()(const char* optp, Set, int*) const;
-    ActionIfs& operator()(const char* optp, Set, string*) const;
+    ActionIfs& operator()(const char* optp, Set, int*) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, Set, string*) const VL_MT_DISABLED;
 
-    ActionIfs& operator()(const char* optp, FOnOff, bool*) const;
-    ActionIfs& operator()(const char* optp, OnOff, bool*) const;
+    ActionIfs& operator()(const char* optp, FOnOff, bool*) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, OnOff, bool*) const VL_MT_DISABLED;
 #ifndef V3OPTION_PARSER_NO_VOPTION_BOOL
-    ActionIfs& operator()(const char* optp, OnOff, VOptionBool*) const;
+    ActionIfs& operator()(const char* optp, OnOff, VOptionBool*) const VL_MT_DISABLED;
 #endif
 
-    ActionIfs& operator()(const char* optp, CbCall, std::function<void(void)>) const;
-    ActionIfs& operator()(const char* optp, CbFOnOff, std::function<void(bool)>) const;
-    ActionIfs& operator()(const char* optp, CbOnOff, std::function<void(bool)>) const;
-    ActionIfs& operator()(const char* optp, CbVal, std::function<void(int)>) const;
-    ActionIfs& operator()(const char* optp, CbVal, std::function<void(const char*)>) const;
+    ActionIfs& operator()(const char* optp, CbCall,
+                          std::function<void(void)>) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, CbFOnOff,
+                          std::function<void(bool)>) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, CbOnOff,
+                          std::function<void(bool)>) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, CbVal, std::function<void(int)>) const VL_MT_DISABLED;
+    ActionIfs& operator()(const char* optp, CbVal,
+                          std::function<void(const char*)>) const VL_MT_DISABLED;
 
     ActionIfs& operator()(const char* optp, CbPartialMatch,
-                          std::function<void(const char*)>) const;
+                          std::function<void(const char*)>) const VL_MT_DISABLED;
     ActionIfs& operator()(const char* optp, CbPartialMatchVal,
-                          std::function<void(const char*, const char*)>) const;
+                          std::function<void(const char*, const char*)>) const VL_MT_DISABLED;
 
     // CONSTRUCTORS
     explicit AppendHelper(V3OptionParser& parser)
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index bc08b0256..42e33a040 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -292,7 +292,7 @@ void V3Options::addLangExt(const string& langext, const V3LangCode& lc) {
     m_impp->addLangExt(langext, lc);
 }
 void V3Options::addLibExtV(const string& libext) { m_impp->addLibExtV(libext); }
-void V3Options::addDefine(const string& defline, bool allowPlus) {
+void V3Options::addDefine(const string& defline, bool allowPlus) VL_MT_DISABLED {
     // Split +define+foo=value into the appropriate parts and parse
     // Optional + says to allow multiple defines on the line
     // + is not quotable, as other simulators do not allow that
@@ -792,7 +792,7 @@ bool V3Options::coroutineSupport() {
 //######################################################################
 // V3 Options notification methods
 
-void V3Options::notify() {
+void V3Options::notify() VL_MT_DISABLED {
     // Notify that all arguments have been passed and final modification can be made.
     FileLine* const cmdfl = new FileLine{FileLine::commandLineFilename()};
 
@@ -978,7 +978,7 @@ string V3Options::argString(int argc, char** argv) {
 //######################################################################
 // V3 Options Parsing
 
-void V3Options::parseOpts(FileLine* fl, int argc, char** argv) {
+void V3Options::parseOpts(FileLine* fl, int argc, char** argv) VL_MT_DISABLED {
     // Parse all options
     // Initial entry point from Verilator.cpp
     parseOptsList(fl, ".", argc, argv);
@@ -1009,7 +1009,8 @@ bool V3Options::suffixed(const string& sw, const char* arg) {
     return (0 == std::strcmp(sw.c_str() + sw.length() - std::strlen(arg), arg));
 }
 
-void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char** argv) {
+void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
+                              char** argv) VL_MT_DISABLED {
     // Parse parameters
     // Note argc and argv DO NOT INCLUDE the filename in [0]!!!
     // May be called recursively when there are -f files.
@@ -1057,7 +1058,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
     // (If DECL_OPTION is a macro, then lambda would be collapsed into a single line).
 
     // Plus options
-    DECL_OPTION("+define+", CbPartialMatch, [this](const char* optp) { addDefine(optp, true); });
+    DECL_OPTION("+define+", CbPartialMatch,
+                [this](const char* optp) VL_MT_DISABLED { addDefine(optp, true); });
     DECL_OPTION("+incdir+", CbPartialMatch,
                 [this, &optdir](const char* optp) { addIncDirUser(parseFileArg(optdir, optp)); });
     DECL_OPTION("+libext+", CbPartialMatch, [this](const char* optp) {
@@ -1159,7 +1161,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
     DECL_OPTION("-coverage-underscore", OnOff, &m_coverageUnderscore);
     DECL_OPTION("-coverage-user", OnOff, &m_coverageUser);
 
-    DECL_OPTION("-D", CbPartialMatch, [this](const char* valp) { addDefine(valp, false); });
+    DECL_OPTION("-D", CbPartialMatch,
+                [this](const char* valp) VL_MT_DISABLED { addDefine(valp, false); });
     DECL_OPTION("-debug", CbCall, [this]() { setDebugMode(3); });
     DECL_OPTION("-debugi", CbVal, [this](int v) { setDebugMode(v); });
     DECL_OPTION("-debugi-", CbPartialMatchVal, [this](const char* optp, const char* valp) {
@@ -1199,12 +1202,12 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
     DECL_OPTION("-expand-limit", CbVal,
                 [this](const char* valp) { m_expandLimit = std::atoi(valp); });
 
-    DECL_OPTION("-F", CbVal, [this, fl, &optdir](const char* valp) {
+    DECL_OPTION("-F", CbVal, [this, fl, &optdir](const char* valp) VL_MT_DISABLED {
         parseOptsFile(fl, parseFileArg(optdir, valp), true);
     });
     DECL_OPTION("-FI", CbVal,
                 [this, &optdir](const char* valp) { addForceInc(parseFileArg(optdir, valp)); });
-    DECL_OPTION("-f", CbVal, [this, fl, &optdir](const char* valp) {
+    DECL_OPTION("-f", CbVal, [this, fl, &optdir](const char* valp) VL_MT_DISABLED {
         parseOptsFile(fl, parseFileArg(optdir, valp), false);
     });
     DECL_OPTION("-flatten", OnOff, &m_flatten);
@@ -1604,7 +1607,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
         // Note it may not be a future option, but one that is currently implemented.
         addFuture(optp);
     });
-    DECL_OPTION("-Wno-", CbPartialMatch, [fl, &parser](const char* optp) {
+    DECL_OPTION("-Wno-", CbPartialMatch, [fl, &parser](const char* optp) VL_MT_DISABLED {
         if (!FileLine::globalWarnOff(optp, true)) {
             const string fullopt = std::string{"-Wno-"} + optp;
             fl->v3fatal("Unknown warning specified: " << fullopt
@@ -1624,7 +1627,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
     DECL_OPTION("-Wno-style", CbCall, []() { FileLine::globalWarnStyleOff(true); });
     DECL_OPTION("-Wno-UNUSED", CbCall, []() { FileLine::globalWarnUnusedOff(true); });
     DECL_OPTION("-Wno-WIDTH", CbCall, []() { FileLine::globalWarnOff(V3ErrorCode::WIDTH, true); });
-    DECL_OPTION("-Wwarn-", CbPartialMatch, [this, fl, &parser](const char* optp) {
+    DECL_OPTION("-Wwarn-", CbPartialMatch, [this, fl, &parser](const char* optp) VL_MT_DISABLED {
         const V3ErrorCode code{optp};
         if (code == V3ErrorCode::EC_ERROR) {
             if (!isFuture(optp)) {
@@ -1741,7 +1744,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char
 
 //======================================================================
 
-void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) {
+void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) VL_MT_DISABLED {
     // Read the specified -f filename and process as arguments
     UINFO(1, "Reading Options File " << filename << endl);
 
diff --git a/src/V3Options.h b/src/V3Options.h
index f9ee897bb..6378c8545 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -22,6 +22,7 @@
 
 #include "V3Error.h"
 #include "V3LangCode.h"
+#include "V3ThreadSafety.h"
 
 #include <map>
 #include <set>
@@ -385,7 +386,7 @@ private:
 private:
     // METHODS
     void addArg(const string& arg);
-    void addDefine(const string& defline, bool allowPlus);
+    void addDefine(const string& defline, bool allowPlus) VL_MT_DISABLED;
     void addFuture(const string& flag);
     void addFuture0(const string& flag);
     void addFuture1(const string& flag);
@@ -426,7 +427,7 @@ public:
     void addForceInc(const string& filename);
     bool available() const VL_MT_SAFE { return m_available; }
     void ccSet();
-    void notify();
+    void notify() VL_MT_DISABLED;
 
     // ACCESSORS (options)
     bool preprocOnly() const { return m_preprocOnly; }
@@ -666,9 +667,9 @@ public:
     // Return options for child hierarchical blocks when forTop==false, otherwise returns args for
     // the top module.
     string allArgsStringForHierBlock(bool forTop) const;
-    void parseOpts(FileLine* fl, int argc, char** argv);
-    void parseOptsList(FileLine* fl, const string& optdir, int argc, char** argv);
-    void parseOptsFile(FileLine* fl, const string& filename, bool rel);
+    void parseOpts(FileLine* fl, int argc, char** argv) VL_MT_DISABLED;
+    void parseOptsList(FileLine* fl, const string& optdir, int argc, char** argv) VL_MT_DISABLED;
+    void parseOptsFile(FileLine* fl, const string& filename, bool rel) VL_MT_DISABLED;
 
     // METHODS (environment)
     // Most of these may be built into the executable with --enable-defenv,
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index 066d5d5b4..f0047b81e 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -71,6 +71,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Order.h b/src/V3Order.h
index be2612371..3262e0ed8 100644
--- a/src/V3Order.h
+++ b/src/V3Order.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 #include <functional>
 #include <unordered_map>
 #include <vector>
@@ -48,7 +50,7 @@ AstCFunc* order(
     bool parallel,  //
     bool slow,  //
     const ExternalDomainsProvider& externalDomains
-    = [](const AstVarScope*, std::vector<AstSenTree*>&) {});
+    = [](const AstVarScope*, std::vector<AstSenTree*>&) {}) VL_MT_DISABLED;
 
 };  // namespace V3Order
 
diff --git a/src/V3OrderGraph.h b/src/V3OrderGraph.h
index af6788d6e..fef667f5b 100644
--- a/src/V3OrderGraph.h
+++ b/src/V3OrderGraph.h
@@ -92,10 +92,14 @@ public:
 
     // Methods to add edges representing constraints, utilizing the type system to help us ensure
     // the graph remains bipartite.
-    inline void addHardEdge(OrderLogicVertex* fromp, OrderVarVertex* top, int weight);
-    inline void addHardEdge(OrderVarVertex* fromp, OrderLogicVertex* top, int weight);
-    inline void addSoftEdge(OrderLogicVertex* fromp, OrderVarVertex* top, int weight);
-    inline void addSoftEdge(OrderVarVertex* fromp, OrderLogicVertex* top, int weight);
+    inline void addHardEdge(OrderLogicVertex* fromp, OrderVarVertex* top,
+                            int weight) VL_MT_DISABLED;
+    inline void addHardEdge(OrderVarVertex* fromp, OrderLogicVertex* top,
+                            int weight) VL_MT_DISABLED;
+    inline void addSoftEdge(OrderLogicVertex* fromp, OrderVarVertex* top,
+                            int weight) VL_MT_DISABLED;
+    inline void addSoftEdge(OrderVarVertex* fromp, OrderLogicVertex* top,
+                            int weight) VL_MT_DISABLED;
 };
 
 //======================================================================
@@ -114,9 +118,9 @@ class OrderEitherVertex VL_NOT_FINAL : public V3GraphVertex {
 
 protected:
     // CONSTRUCTOR
-    OrderEitherVertex(OrderGraph* graphp, AstSenTree* domainp)
-        : V3GraphVertex{graphp}
-        , m_domainp{domainp} {}
+    OrderEitherVertex(OrderGraph* graphp, AstSenTree* domainp) VL_MT_DISABLED
+        : V3GraphVertex{graphp},
+          m_domainp{domainp} {}
     ~OrderEitherVertex() override = default;
 
 public:
@@ -125,7 +129,7 @@ public:
 
     // ACCESSORS
     AstSenTree* domainp() const VL_MT_STABLE { return m_domainp; }
-    void domainp(AstSenTree* domainp) {
+    void domainp(AstSenTree* domainp) VL_MT_DISABLED {
 #if VL_DEBUG
         UASSERT(!m_domainp, "Domain should only be set once");
 #endif
@@ -142,11 +146,11 @@ class OrderLogicVertex final : public OrderEitherVertex {
 public:
     // CONSTRUCTOR
     OrderLogicVertex(OrderGraph* graphp, AstScope* scopep, AstSenTree* domainp,
-                     AstSenTree* hybridp, AstNode* nodep)
-        : OrderEitherVertex{graphp, domainp}
-        , m_nodep{nodep}
-        , m_scopep{scopep}
-        , m_hybridp{hybridp} {
+                     AstSenTree* hybridp, AstNode* nodep) VL_MT_DISABLED
+        : OrderEitherVertex{graphp, domainp},
+          m_nodep{nodep},
+          m_scopep{scopep},
+          m_hybridp{hybridp} {
         UASSERT_OBJ(scopep, nodep, "Must not be null");
         UASSERT_OBJ(!(domainp && hybridp), nodep, "Cannot have bot domainp and hybridp set");
     }
@@ -174,9 +178,9 @@ class OrderVarVertex VL_NOT_FINAL : public OrderEitherVertex {
 
 public:
     // CONSTRUCTOR
-    OrderVarVertex(OrderGraph* graphp, AstVarScope* vscp)
-        : OrderEitherVertex{graphp, nullptr}
-        , m_vscp{vscp} {}
+    OrderVarVertex(OrderGraph* graphp, AstVarScope* vscp) VL_MT_DISABLED
+        : OrderEitherVertex{graphp, nullptr},
+          m_vscp{vscp} {}
     ~OrderVarVertex() override = default;
 
     // ACCESSORS
@@ -195,7 +199,7 @@ class OrderVarStdVertex final : public OrderVarVertex {
     VL_RTTI_IMPL(OrderVarStdVertex, OrderVarVertex)
 public:
     // CONSTRUCTOR
-    OrderVarStdVertex(OrderGraph* graphp, AstVarScope* vscp)
+    OrderVarStdVertex(OrderGraph* graphp, AstVarScope* vscp) VL_MT_DISABLED
         : OrderVarVertex{graphp, vscp} {}
     ~OrderVarStdVertex() override = default;
 
@@ -212,7 +216,7 @@ class OrderVarPreVertex final : public OrderVarVertex {
     VL_RTTI_IMPL(OrderVarPreVertex, OrderVarVertex)
 public:
     // CONSTRUCTOR
-    OrderVarPreVertex(OrderGraph* graphp, AstVarScope* vscp)
+    OrderVarPreVertex(OrderGraph* graphp, AstVarScope* vscp) VL_MT_DISABLED
         : OrderVarVertex{graphp, vscp} {}
     ~OrderVarPreVertex() override = default;
 
@@ -229,7 +233,7 @@ class OrderVarPostVertex final : public OrderVarVertex {
     VL_RTTI_IMPL(OrderVarPostVertex, OrderVarVertex)
 public:
     // CONSTRUCTOR
-    OrderVarPostVertex(OrderGraph* graphp, AstVarScope* vscp)
+    OrderVarPostVertex(OrderGraph* graphp, AstVarScope* vscp) VL_MT_DISABLED
         : OrderVarVertex{graphp, vscp} {}
     ~OrderVarPostVertex() override = default;
 
@@ -246,7 +250,7 @@ class OrderVarPordVertex final : public OrderVarVertex {
     VL_RTTI_IMPL(OrderVarPordVertex, OrderVarVertex)
 public:
     // CONSTRUCTOR
-    OrderVarPordVertex(OrderGraph* graphp, AstVarScope* vscp)
+    OrderVarPordVertex(OrderGraph* graphp, AstVarScope* vscp) VL_MT_DISABLED
         : OrderVarVertex{graphp, vscp} {}
     ~OrderVarPordVertex() override = default;
 
@@ -267,8 +271,7 @@ class OrderEdge final : public V3GraphEdge {
     friend class OrderGraph;  // Only the OrderGraph can create these
     // CONSTRUCTOR
     OrderEdge(OrderGraph* graphp, OrderEitherVertex* fromp, OrderEitherVertex* top, int weight,
-              bool cutable)
-        : V3GraphEdge{graphp, fromp, top, weight, cutable} {}
+              bool cutable) VL_MT_DISABLED : V3GraphEdge{graphp, fromp, top, weight, cutable} {}
     ~OrderEdge() override = default;
 
     // LCOV_EXCL_START // Debug code
@@ -279,16 +282,20 @@ class OrderEdge final : public V3GraphEdge {
 //======================================================================
 // Inline methods
 
-void OrderGraph::addHardEdge(OrderLogicVertex* fromp, OrderVarVertex* top, int weight) {
+void OrderGraph::addHardEdge(OrderLogicVertex* fromp, OrderVarVertex* top,
+                             int weight) VL_MT_DISABLED {
     new OrderEdge{this, fromp, top, weight, /* cutable: */ false};
 }
-void OrderGraph::addHardEdge(OrderVarVertex* fromp, OrderLogicVertex* top, int weight) {
+void OrderGraph::addHardEdge(OrderVarVertex* fromp, OrderLogicVertex* top,
+                             int weight) VL_MT_DISABLED {
     new OrderEdge{this, fromp, top, weight, /* cutable: */ false};
 }
-void OrderGraph::addSoftEdge(OrderLogicVertex* fromp, OrderVarVertex* top, int weight) {
+void OrderGraph::addSoftEdge(OrderLogicVertex* fromp, OrderVarVertex* top,
+                             int weight) VL_MT_DISABLED {
     new OrderEdge{this, fromp, top, weight, /* cutable: */ true};
 }
-void OrderGraph::addSoftEdge(OrderVarVertex* fromp, OrderLogicVertex* top, int weight) {
+void OrderGraph::addSoftEdge(OrderVarVertex* fromp, OrderLogicVertex* top,
+                             int weight) VL_MT_DISABLED {
     new OrderEdge{this, fromp, top, weight, /* cutable: */ true};
 }
 
diff --git a/src/V3OrderMoveGraph.h b/src/V3OrderMoveGraph.h
index af5da4df0..2404e9730 100644
--- a/src/V3OrderMoveGraph.h
+++ b/src/V3OrderMoveGraph.h
@@ -27,6 +27,7 @@
 #include "V3Ast.h"
 #include "V3Graph.h"
 #include "V3OrderGraph.h"
+#include "V3ThreadSafety.h"
 
 #include <unordered_map>
 
@@ -49,11 +50,11 @@ protected:
     V3ListEnt<OrderMoveVertex*> m_readyVerticesE;  // List of ready under domain/scope
 public:
     // CONSTRUCTORS
-    OrderMoveVertex(V3Graph* graphp, OrderLogicVertex* logicp)
-        : V3GraphVertex{graphp}
-        , m_logicp{logicp}
-        , m_state{POM_WAIT}
-        , m_domScopep{nullptr} {}
+    OrderMoveVertex(V3Graph* graphp, OrderLogicVertex* logicp) VL_MT_DISABLED
+        : V3GraphVertex{graphp},
+          m_logicp{logicp},
+          m_state{POM_WAIT},
+          m_domScopep{nullptr} {}
     ~OrderMoveVertex() override = default;
 
     // METHODS
@@ -78,11 +79,11 @@ public:
     }
     OrderLogicVertex* logicp() const VL_MT_STABLE { return m_logicp; }
     bool isWait() const { return m_state == POM_WAIT; }
-    void setReady() {
+    void setReady() VL_MT_DISABLED {
         UASSERT(m_state == POM_WAIT, "Wait->Ready on node not in proper state");
         m_state = POM_READY;
     }
-    void setMoved() {
+    void setMoved() VL_MT_DISABLED {
         UASSERT(m_state == POM_READY, "Ready->Moved on node not in proper state");
         m_state = POM_MOVED;
     }
@@ -103,11 +104,10 @@ class MTaskMoveVertex final : public V3GraphVertex {
 
 public:
     MTaskMoveVertex(V3Graph* graphp, OrderLogicVertex* logicp, const OrderEitherVertex* varp,
-                    const AstSenTree* domainp)
-        : V3GraphVertex{graphp}
-        , m_logicp{logicp}
-        , m_varp{varp}
-        , m_domainp{domainp} {
+                    const AstSenTree* domainp) VL_MT_DISABLED : V3GraphVertex{graphp},
+                                                                m_logicp{logicp},
+                                                                m_varp{varp},
+                                                                m_domainp{domainp} {
         UASSERT(!(logicp && varp), "MTaskMoveVertex: logicp and varp may not both be set!\n");
     }
     ~MTaskMoveVertex() override = default;
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 1539ce3c4..ce5ded6a8 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -44,6 +44,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Param.h b/src/V3Param.h
index bf4fbe16d..d09a4314c 100644
--- a/src/V3Param.h
+++ b/src/V3Param.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Param final {
 public:
-    static void param(AstNetlist* rootp);
+    static void param(AstNetlist* rootp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Parse.h b/src/V3Parse.h
index ed034d36b..70e7b4896 100644
--- a/src/V3Parse.h
+++ b/src/V3Parse.h
@@ -22,6 +22,7 @@
 
 #include "V3Error.h"
 #include "V3Global.h"
+#include "V3ThreadSafety.h"
 
 class AstNetlist;
 class VInFilter;
@@ -39,16 +40,16 @@ private:
 
 public:
     // We must allow reading multiple files into one parser
-    V3Parse(AstNetlist* rootp, VInFilter* filterp, V3ParseSym* symp);
-    ~V3Parse();
+    V3Parse(AstNetlist* rootp, VInFilter* filterp, V3ParseSym* symp) VL_MT_DISABLED;
+    ~V3Parse() VL_MT_DISABLED;
 
     // METHODS
     // Preprocess and read the Verilog file specified into the netlist database
     void parseFile(FileLine* fileline, const string& modname, bool inLibrary,
-                   const string& errmsg);
+                   const string& errmsg) VL_MT_DISABLED;
 
     // Push preprocessed text to the lexer
-    static void ppPushText(V3ParseImp* impp, const string& text);
+    static void ppPushText(V3ParseImp* impp, const string& text) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp
index 74b729abc..10be43782 100644
--- a/src/V3ParseGrammar.cpp
+++ b/src/V3ParseGrammar.cpp
@@ -16,6 +16,8 @@
 
 #define YYDEBUG 1  // Nicer errors
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "V3Ast.h"  // This must be before V3ParseBison.cpp, as we don't want #defines to conflict
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index c7e2e62b4..1da582004 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -22,6 +22,8 @@
 //           V3Lexer.yy.cpp     Flex output
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 9017c0ae6..743b4ec14 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -25,6 +25,7 @@
 #include "V3Global.h"
 #include "V3Parse.h"
 #include "V3ParseSym.h"
+#include "V3ThreadSafety.h"
 
 #include <algorithm>
 #include <deque>
@@ -123,7 +124,7 @@ struct V3ParseBisonYYSType {
 #include "V3Ast__gen_yystype.h"
     };
 };
-std::ostream& operator<<(std::ostream& os, const V3ParseBisonYYSType& rhs);
+std::ostream& operator<<(std::ostream& os, const V3ParseBisonYYSType& rhs) VL_MT_DISABLED;
 
 #define YYSTYPE V3ParseBisonYYSType
 
@@ -170,21 +171,21 @@ public:
 
     void tagNodep(AstNode* nodep) { m_tagNodep = nodep; }
     AstNode* tagNodep() const { return m_tagNodep; }
-    void lexTimescaleParse(FileLine* fl, const char* textp);
+    void lexTimescaleParse(FileLine* fl, const char* textp) VL_MT_DISABLED;
     void timescaleMod(FileLine* fl, AstNodeModule* modp, bool unitSet, double unitVal,
-                      bool precSet, double precVal);
+                      bool precSet, double precVal) VL_MT_DISABLED;
     VTimescale timeLastUnit() const { return m_timeLastUnit; }
 
     FileLine* lexFileline() const { return m_lexFileline; }
     FileLine* lexCopyOrSameFileLine() { return lexFileline()->copyOrSameFileLine(); }
-    static void lexErrorPreprocDirective(FileLine* fl, const char* textp);
-    static string lexParseTag(const char* textp);
-    static double lexParseTimenum(const char* text);
-    void lexPpline(const char* textp);
-    void lexVerilatorCmtLint(FileLine* fl, const char* textp, bool warnOff);
-    void lexVerilatorCmtLintSave(const FileLine* fl);
-    void lexVerilatorCmtLintRestore(FileLine* fl);
-    static void lexVerilatorCmtBad(FileLine* fl, const char* textp);
+    static void lexErrorPreprocDirective(FileLine* fl, const char* textp) VL_MT_DISABLED;
+    static string lexParseTag(const char* textp) VL_MT_DISABLED;
+    static double lexParseTimenum(const char* text) VL_MT_DISABLED;
+    void lexPpline(const char* textp) VL_MT_DISABLED;
+    void lexVerilatorCmtLint(FileLine* fl, const char* textp, bool warnOff) VL_MT_DISABLED;
+    void lexVerilatorCmtLintSave(const FileLine* fl) VL_MT_DISABLED;
+    void lexVerilatorCmtLintRestore(FileLine* fl) VL_MT_DISABLED;
+    static void lexVerilatorCmtBad(FileLine* fl, const char* textp) VL_MT_DISABLED;
 
     void lexPushKeywords(int state) {
         ++m_lexKwdDepth;
@@ -199,14 +200,14 @@ public:
         }
     }
     int lexKwdLastState() const { return m_lexKwdLast; }
-    static const char* tokenName(int tok);
-    static bool isStrengthToken(int tok);
+    static const char* tokenName(int tok) VL_MT_DISABLED;
+    static bool isStrengthToken(int tok) VL_MT_DISABLED;
 
     void ppPushText(const string& text) {
         m_ppBuffers.push_back(text);
         if (lexFileline()->contentp()) lexFileline()->contentp()->pushText(text);
     }
-    size_t ppInputToLex(char* buf, size_t max_size);
+    size_t ppInputToLex(char* buf, size_t max_size) VL_MT_DISABLED;
 
     static V3ParseImp* parsep() { return s_parsep; }
 
@@ -248,12 +249,12 @@ public:
     void unconnectedDrive(const VOptionBool flag) { m_unconnectedDrive = flag; }
 
     // Interactions with parser
-    int bisonParse();
+    int bisonParse() VL_MT_DISABLED;
 
     // Interactions with lexer
-    void lexNew();
-    void lexDestroy();
-    static int stateVerilogRecent();  // Parser -> lexer communication
+    void lexNew() VL_MT_DISABLED;
+    void lexDestroy() VL_MT_DISABLED;
+    static int stateVerilogRecent() VL_MT_DISABLED;  // Parser -> lexer communication
     int lexPrevToken() const { return m_lexPrevToken; }  // Parser -> lexer communication
     size_t flexPpInputToLex(char* buf, size_t max_size) { return ppInputToLex(buf, max_size); }
 
@@ -282,28 +283,29 @@ public:
         m_lexKwdLast = stateVerilogRecent();
         m_timeLastUnit = v3Global.opt.timeDefaultUnit();
     }
-    ~V3ParseImp();
-    void parserClear();
-    void lexUnputString(const char* textp, size_t length);
+    ~V3ParseImp() VL_MT_DISABLED;
+    void parserClear() VL_MT_DISABLED;
+    void lexUnputString(const char* textp, size_t length) VL_MT_DISABLED;
 
     // METHODS
     // Preprocess and read the Verilog file specified into the netlist database
-    int tokenToBison();  // Pass token to bison
+    int tokenToBison() VL_MT_DISABLED;  // Pass token to bison
 
     void parseFile(FileLine* fileline, const string& modfilename, bool inLibrary,
-                   const string& errmsg);
-    void dumpInputsFile();
+                   const string& errmsg) VL_MT_DISABLED;
+    void dumpInputsFile() VL_MT_DISABLED;
 
 private:
-    void lexFile(const string& modname);
-    void yylexReadTok();
-    void tokenPull();
-    void tokenPipeline();  // Internal; called from tokenToBison
-    void tokenPipelineSym();
-    size_t tokenPipeScanParam(size_t depth);
-    size_t tokenPipeScanType(size_t depth);
-    const V3ParseBisonYYSType* tokenPeekp(size_t depth);
-    void preprocDumps(std::ostream& os, bool forInputs);
+    void preprocDumps(std::ostream& os);
+    void lexFile(const string& modname) VL_MT_DISABLED;
+    void yylexReadTok() VL_MT_DISABLED;
+    void tokenPull() VL_MT_DISABLED;
+    void tokenPipeline() VL_MT_DISABLED;  // Internal; called from tokenToBison
+    void tokenPipelineSym() VL_MT_DISABLED;
+    size_t tokenPipeScanParam(size_t depth) VL_MT_DISABLED;
+    size_t tokenPipeScanType(size_t depth) VL_MT_DISABLED;
+    const V3ParseBisonYYSType* tokenPeekp(size_t depth) VL_MT_DISABLED;
+    void preprocDumps(std::ostream& os, bool forInputs) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3ParseLex.cpp b/src/V3ParseLex.cpp
index 43ae1fb53..bb39e3a59 100644
--- a/src/V3ParseLex.cpp
+++ b/src/V3ParseLex.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index a67f92d7b..d2e27a85b 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Partition.h b/src/V3Partition.h
index cfa68c515..caac97371 100644
--- a/src/V3Partition.h
+++ b/src/V3Partition.h
@@ -23,6 +23,7 @@
 #include "V3Graph.h"
 #include "V3OrderGraph.h"
 #include "V3OrderMoveGraph.h"
+#include "V3ThreadSafety.h"
 
 #include <list>
 #include <unordered_map>
@@ -51,24 +52,24 @@ public:
 
     // Fill in the provided empty graph with AbstractLogicMTask's and their
     // interdependencies.
-    void go(V3Graph* mtasksp);
+    void go(V3Graph* mtasksp) VL_MT_DISABLED;
 
-    static void selfTest();
-    static void selfTestNormalizeCosts();
+    static void selfTest() VL_MT_DISABLED;
+    static void selfTestNormalizeCosts() VL_MT_DISABLED;
 
     // Print out a hash of the shape of graphp.  Only needed to debug the
     // origin of some nondeterminism; otherwise this is pretty useless.
-    static void hashGraphDebug(const V3Graph* graphp, const char* debugName);
+    static void hashGraphDebug(const V3Graph* graphp, const char* debugName) VL_MT_DISABLED;
 
     // Print debug stats about graphp whose nodes must be AbstractMTask's.
-    static void debugMTaskGraphStats(const V3Graph* graphp, const string& stage);
+    static void debugMTaskGraphStats(const V3Graph* graphp, const string& stage) VL_MT_DISABLED;
 
     // Operate on the final ExecMTask graph, immediately prior to code
     // generation time.
-    static void finalize(AstNetlist* netlistp);
+    static void finalize(AstNetlist* netlistp) VL_MT_DISABLED;
 
 private:
-    uint32_t setupMTaskDeps(V3Graph* mtasksp);
+    uint32_t setupMTaskDeps(V3Graph* mtasksp) VL_MT_DISABLED;
 
     VL_UNCOPYABLE(V3Partition);
 };
diff --git a/src/V3PartitionGraph.h b/src/V3PartitionGraph.h
index eb1455e2a..cdfab1be1 100644
--- a/src/V3PartitionGraph.h
+++ b/src/V3PartitionGraph.h
@@ -31,8 +31,7 @@
 class AbstractMTask VL_NOT_FINAL : public V3GraphVertex {
     VL_RTTI_IMPL(AbstractMTask, V3GraphVertex)
 public:
-    explicit AbstractMTask(V3Graph* graphp)
-        : V3GraphVertex{graphp} {}
+    explicit AbstractMTask(V3Graph* graphp) VL_MT_DISABLED : V3GraphVertex{graphp} {}
     ~AbstractMTask() override = default;
     virtual uint32_t id() const = 0;
     virtual uint32_t cost() const = 0;
@@ -44,8 +43,7 @@ public:
     // TYPES
     using VxList = std::list<MTaskMoveVertex*>;
     // CONSTRUCTORS
-    explicit AbstractLogicMTask(V3Graph* graphp)
-        : AbstractMTask{graphp} {}
+    explicit AbstractLogicMTask(V3Graph* graphp) VL_MT_DISABLED : AbstractMTask{graphp} {}
     ~AbstractLogicMTask() override = default;
     // METHODS
     // Set of logic vertices in this mtask. Order is not significant.
@@ -70,10 +68,10 @@ private:
     VL_UNCOPYABLE(ExecMTask);
 
 public:
-    ExecMTask(V3Graph* graphp, AstMTaskBody* bodyp, uint32_t id)
-        : AbstractMTask{graphp}
-        , m_bodyp{bodyp}
-        , m_id{id} {}
+    ExecMTask(V3Graph* graphp, AstMTaskBody* bodyp, uint32_t id) VL_MT_DISABLED
+        : AbstractMTask{graphp},
+          m_bodyp{bodyp},
+          m_id{id} {}
     AstMTaskBody* bodyp() const { return m_bodyp; }
     uint32_t id() const override VL_MT_SAFE { return m_id; }
     uint32_t priority() const { return m_priority; }
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index cea6db1f2..075d677d2 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3PreProc.h b/src/V3PreProc.h
index f13ef98ed..13d4aefad 100644
--- a/src/V3PreProc.h
+++ b/src/V3PreProc.h
@@ -23,6 +23,7 @@
 #include "V3Error.h"
 #include "V3FileLine.h"
 #include "V3Global.h"
+#include "V3ThreadSafety.h"
 
 #include <iostream>
 #include <list>
@@ -57,7 +58,7 @@ public:
     virtual bool isEof() const = 0;  // Return true on EOF.
     virtual void insertUnreadback(const string& text) = 0;
 
-    FileLine* fileline();  ///< File/Line number for last getline call
+    FileLine* fileline() VL_MT_DISABLED;  ///< File/Line number for last getline call
 
     // CONTROL METHODS
     // These options control how the parsing proceeds
@@ -96,7 +97,7 @@ protected:
     void configure(FileLine* fl);
 
 public:
-    static V3PreProc* createPreProc(FileLine* fl);
+    static V3PreProc* createPreProc(FileLine* fl) VL_MT_DISABLED;
     virtual ~V3PreProc() = default;  // LCOV_EXCL_LINE  // Persistent
 };
 
diff --git a/src/V3PreShell.cpp b/src/V3PreShell.cpp
index 087b25a75..fc48e1f62 100644
--- a/src/V3PreShell.cpp
+++ b/src/V3PreShell.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3PreShell.h b/src/V3PreShell.h
index eb6a426cd..6972d5a67 100644
--- a/src/V3PreShell.h
+++ b/src/V3PreShell.h
@@ -22,6 +22,7 @@
 
 #include "V3Error.h"
 #include "V3FileLine.h"
+#include "V3ThreadSafety.h"
 
 class V3ParseImp;
 class VInFilter;
@@ -32,15 +33,15 @@ class VSpellCheck;
 class V3PreShell final {
     // Static class for calling preprocessor
 public:
-    static void boot();
-    static void shutdown();
+    static void boot() VL_MT_DISABLED;
+    static void shutdown() VL_MT_DISABLED;
     static bool preproc(FileLine* fl, const string& modname, VInFilter* filterp,
-                        V3ParseImp* parsep, const string& errmsg);
-    static void preprocInclude(FileLine* fl, const string& modname);
-    static void defineCmdLine(const string& name, const string& value);
-    static void undef(const string& name);
-    static void dumpDefines(std::ostream& os);
-    static void candidateDefines(VSpellCheck* spellerp);
+                        V3ParseImp* parsep, const string& errmsg) VL_MT_DISABLED;
+    static void preprocInclude(FileLine* fl, const string& modname) VL_MT_DISABLED;
+    static void defineCmdLine(const string& name, const string& value) VL_MT_DISABLED;
+    static void undef(const string& name) VL_MT_DISABLED;
+    static void dumpDefines(std::ostream& os) VL_MT_DISABLED;
+    static void candidateDefines(VSpellCheck* spellerp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 39dbdb9ad..78a748543 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Premit.h b/src/V3Premit.h
index 59f09a188..e625392f0 100644
--- a/src/V3Premit.h
+++ b/src/V3Premit.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Premit final {
 public:
-    static void premitAll(AstNetlist* nodep);
+    static void premitAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index 3a993714a..08a415395 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3ProtectLib.h b/src/V3ProtectLib.h
index a3db9ea8c..7c1361573 100644
--- a/src/V3ProtectLib.h
+++ b/src/V3ProtectLib.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3ProtectLib final {
 public:
-    static void protect();
+    static void protect() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 983ecf98a..b544690d1 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Randomize.h b/src/V3Randomize.h
index 223575203..5de300667 100644
--- a/src/V3Randomize.h
+++ b/src/V3Randomize.h
@@ -20,16 +20,18 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstClass;
 class AstFunc;
 class AstNetlist;
 
 class V3Randomize final {
 public:
-    static void randomizeNetlist(AstNetlist* nodep);
+    static void randomizeNetlist(AstNetlist* nodep) VL_MT_DISABLED;
 
-    static AstFunc* newRandomizeFunc(AstClass* nodep);
-    static AstFunc* newSRandomFunc(AstClass* nodep);
+    static AstFunc* newRandomizeFunc(AstClass* nodep) VL_MT_DISABLED;
+    static AstFunc* newSRandomFunc(AstClass* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index 284c0df36..b50f21b67 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -29,6 +29,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Reloop.h b/src/V3Reloop.h
index da9228510..4408bcb8d 100644
--- a/src/V3Reloop.h
+++ b/src/V3Reloop.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Reloop final {
 public:
-    static void reloopAll(AstNetlist* nodep);
+    static void reloopAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 897cb6343..32386e38b 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -35,6 +35,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Sched.h b/src/V3Sched.h
index 526525a37..fca742de4 100644
--- a/src/V3Sched.h
+++ b/src/V3Sched.h
@@ -21,6 +21,7 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3ThreadSafety.h"
 
 #include <functional>
 #include <unordered_map>
@@ -130,12 +131,12 @@ public:
     AstNodeStmt* m_postUpdates = nullptr;  // Post updates for the trigger eval function
 
     // Remaps external domains using the specified trigger map
-    std::map<const AstVarScope*, std::vector<AstSenTree*>>
-    remapDomains(const std::unordered_map<const AstSenTree*, AstSenTree*>& trigMap) const;
+    std::map<const AstVarScope*, std::vector<AstSenTree*>> remapDomains(
+        const std::unordered_map<const AstSenTree*, AstSenTree*>& trigMap) const VL_MT_DISABLED;
     // Creates a timing resume call (if needed, else returns null)
-    AstCCall* createResume(AstNetlist* const netlistp);
+    AstCCall* createResume(AstNetlist* const netlistp) VL_MT_DISABLED;
     // Creates a timing commit call (if needed, else returns null)
-    AstCCall* createCommit(AstNetlist* const netlistp);
+    AstCCall* createCommit(AstNetlist* const netlistp) VL_MT_DISABLED;
 
     TimingKit() = default;
     TimingKit(LogicByScope&& lbs, AstNodeStmt* postUpdates,
@@ -149,19 +150,20 @@ public:
 };
 
 // Creates the timing kit and marks variables written by suspendables
-TimingKit prepareTiming(AstNetlist* const netlistp);
+TimingKit prepareTiming(AstNetlist* const netlistp) VL_MT_DISABLED;
 
 // Transforms fork sub-statements into separate functions
-void transformForks(AstNetlist* const netlistp);
+void transformForks(AstNetlist* const netlistp) VL_MT_DISABLED;
 
 // Top level entry point to scheduling
-void schedule(AstNetlist*);
+void schedule(AstNetlist*) VL_MT_DISABLED;
 
 // Sub-steps
-LogicByScope breakCycles(AstNetlist* netlistp, const LogicByScope& combinationalLogic);
+LogicByScope breakCycles(AstNetlist* netlistp,
+                         const LogicByScope& combinationalLogic) VL_MT_DISABLED;
 LogicRegions partition(LogicByScope& clockedLogic, LogicByScope& combinationalLogic,
-                       LogicByScope& hybridLogic);
-LogicReplicas replicateLogic(LogicRegions&);
+                       LogicByScope& hybridLogic) VL_MT_DISABLED;
+LogicReplicas replicateLogic(LogicRegions&) VL_MT_DISABLED;
 
 }  // namespace V3Sched
 
diff --git a/src/V3SchedAcyclic.cpp b/src/V3SchedAcyclic.cpp
index 1416bc2e4..d6d9d73ce 100644
--- a/src/V3SchedAcyclic.cpp
+++ b/src/V3SchedAcyclic.cpp
@@ -33,6 +33,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index 6299813b2..c7c3fb29b 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -34,6 +34,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3SchedReplicate.cpp b/src/V3SchedReplicate.cpp
index e47e2fad8..037fd3593 100644
--- a/src/V3SchedReplicate.cpp
+++ b/src/V3SchedReplicate.cpp
@@ -34,6 +34,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index ca7e45626..c3ffa9ef6 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index 8156ec1e3..c68b14fe8 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Scope.h b/src/V3Scope.h
index 3a6e6b2c6..5e5760554 100644
--- a/src/V3Scope.h
+++ b/src/V3Scope.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Scope final {
 public:
-    static void scopeAll(AstNetlist* nodep);
+    static void scopeAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Scoreboard.cpp b/src/V3Scoreboard.cpp
index 761ba9f94..5d25cdf76 100644
--- a/src/V3Scoreboard.cpp
+++ b/src/V3Scoreboard.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Scoreboard.h b/src/V3Scoreboard.h
index 796183ef6..27573b8d2 100644
--- a/src/V3Scoreboard.h
+++ b/src/V3Scoreboard.h
@@ -22,6 +22,7 @@
 
 #include "V3Error.h"
 #include "V3PairingHeap.h"
+#include "V3ThreadSafety.h"
 
 //===============================================================================================
 // V3Scoreboard is essentially a heap that can be hinted that some elements have changed keys, at
@@ -139,7 +140,7 @@ public:
 // ######################################################################
 
 namespace V3ScoreboardBase {
-void selfTest();
+void selfTest() VL_MT_DISABLED;
 }  // namespace V3ScoreboardBase
 
 #endif  // Guard
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 968a16571..3282e9ef2 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -35,6 +35,8 @@
 // simplified to look primarily for SLICESELs.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Slice.h b/src/V3Slice.h
index 002c31443..5eefd784c 100644
--- a/src/V3Slice.h
+++ b/src/V3Slice.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Slice final {
 public:
-    static void sliceAll(AstNetlist* nodep);
+    static void sliceAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index 1e6b82801..aa0ac31f0 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -77,6 +77,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Split.h b/src/V3Split.h
index e0978405d..e3eff188f 100644
--- a/src/V3Split.h
+++ b/src/V3Split.h
@@ -20,14 +20,16 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Split final {
 public:
-    static void splitReorderAll(AstNetlist* nodep);
-    static void splitAlwaysAll(AstNetlist* nodep);
+    static void splitReorderAll(AstNetlist* nodep) VL_MT_DISABLED;
+    static void splitAlwaysAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index f67263dd7..80be47d77 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3SplitAs.h b/src/V3SplitAs.h
index 7d692813d..528695564 100644
--- a/src/V3SplitAs.h
+++ b/src/V3SplitAs.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3SplitAs final {
 public:
-    static void splitAsAll(AstNetlist* nodep);
+    static void splitAsAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index dc62dc823..34779a573 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -110,6 +110,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3SplitVar.h b/src/V3SplitVar.h
index 2d2c525a5..d3f47afb6 100644
--- a/src/V3SplitVar.h
+++ b/src/V3SplitVar.h
@@ -19,17 +19,19 @@
 
 //============================================================================
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 class AstVar;
 
 class V3SplitVar final {
 public:
     // Split variables marked with split_var metacomment.
-    static void splitVariable(AstNetlist* nodep);
+    static void splitVariable(AstNetlist* nodep) VL_MT_DISABLED;
 
     // Return true if the variable can be split.
     // This check is not perfect.
-    static bool canSplitVar(const AstVar* varp);
+    static bool canSplitVar(const AstVar* varp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 79aa116a6..b214a860f 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -22,6 +22,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Subst.h b/src/V3Subst.h
index de7e09381..5320e4c3c 100644
--- a/src/V3Subst.h
+++ b/src/V3Subst.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Subst final {
 public:
-    static void substituteAll(AstNetlist* nodep);
+    static void substituteAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index 09774b8fc..cdc296c45 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -19,6 +19,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3TSP.h b/src/V3TSP.h
index ea698c62a..91a31d7ed 100644
--- a/src/V3TSP.h
+++ b/src/V3TSP.h
@@ -22,6 +22,7 @@
 #include "verilatedos.h"
 
 #include "V3Error.h"
+#include "V3ThreadSafety.h"
 
 #include <vector>
 
@@ -49,9 +50,9 @@ using StateVec = std::vector<const TspStateBase*>;
 
 // Given an unsorted set of TspState's, sort them to minimize
 // the transition cost for walking the sorted list.
-void tspSort(const StateVec& states, StateVec* resultp);
+void tspSort(const StateVec& states, StateVec* resultp) VL_MT_DISABLED;
 
-void selfTest();
+void selfTest() VL_MT_DISABLED;
 }  // namespace V3TSP
 
 #endif  // Guard
diff --git a/src/V3Table.cpp b/src/V3Table.cpp
index 6e1c4d6db..ec9bb4167 100644
--- a/src/V3Table.cpp
+++ b/src/V3Table.cpp
@@ -21,6 +21,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Table.h b/src/V3Table.h
index 08eaf62b7..40c43657b 100644
--- a/src/V3Table.h
+++ b/src/V3Table.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Table final {
 public:
-    static void tableAll(AstNetlist* nodep);
+    static void tableAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 7586795a0..576342885 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Task.h b/src/V3Task.h
index 8dea5bee7..feea7e17e 100644
--- a/src/V3Task.h
+++ b/src/V3Task.h
@@ -22,6 +22,7 @@
 
 #include "V3Ast.h"
 #include "V3Error.h"
+#include "V3ThreadSafety.h"
 
 #include <utility>
 #include <vector>
@@ -51,19 +52,20 @@ class V3Task final {
     static const char* const s_dpiTemporaryVarSuffix;
 
 public:
-    static void taskAll(AstNetlist* nodep);
+    static void taskAll(AstNetlist* nodep) VL_MT_DISABLED;
     /// Return vector of [port, pin-connects-to]  (SLOW)
     static V3TaskConnects taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
-                                       V3TaskConnectState* statep = nullptr);
+                                       V3TaskConnectState* statep = nullptr) VL_MT_DISABLED;
     static void taskConnectWrap(AstNodeFTaskRef* nodep, const V3TaskConnects& tconnects,
                                 V3TaskConnectState* statep,
-                                const std::set<const AstVar*>& argWrap);
+                                const std::set<const AstVar*>& argWrap) VL_MT_DISABLED;
     static AstNodeFTask* taskConnectWrapNew(AstNodeFTask* taskp, const string& newname,
                                             const V3TaskConnects& tconnects,
-                                            const std::set<const AstVar*>& argWrap);
+                                            const std::set<const AstVar*>& argWrap) VL_MT_DISABLED;
     static string assignInternalToDpi(AstVar* portp, bool isPtr, const string& frSuffix,
-                                      const string& toSuffix, const string& frPrefix = "");
-    static string assignDpiToInternal(const string& lhsName, AstVar* rhsp);
+                                      const string& toSuffix,
+                                      const string& frPrefix = "") VL_MT_DISABLED;
+    static string assignDpiToInternal(const string& lhsName, AstVar* rhsp) VL_MT_DISABLED;
     static const char* dpiTemporaryVarSuffix() VL_MT_SAFE { return s_dpiTemporaryVarSuffix; }
 };
 
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index ba5fb36e1..6a10731b6 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -44,6 +44,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Timing.h b/src/V3Timing.h
index 784b5cddf..271583793 100644
--- a/src/V3Timing.h
+++ b/src/V3Timing.h
@@ -21,12 +21,13 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 
 class V3Timing final {
 public:
-    static void timingAll(AstNetlist* nodep);
+    static void timingAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index abd9b5ffd..c698e1f99 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -35,6 +35,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Trace.h b/src/V3Trace.h
index 4e89805e3..214f71a33 100644
--- a/src/V3Trace.h
+++ b/src/V3Trace.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Trace final {
 public:
-    static void traceAll(AstNetlist* nodep);
+    static void traceAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index e06a7f02b..d7c69efc7 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -20,6 +20,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3TraceDecl.h b/src/V3TraceDecl.h
index 0922e842f..91ca6cad7 100644
--- a/src/V3TraceDecl.h
+++ b/src/V3TraceDecl.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3TraceDecl final {
 public:
-    static void traceDeclAll(AstNetlist* nodep);
+    static void traceDeclAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index ded800d65..f13c1dfa0 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -115,6 +115,8 @@
 // unsupported.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Tristate.h b/src/V3Tristate.h
index 2b8a22c64..0fff67827 100644
--- a/src/V3Tristate.h
+++ b/src/V3Tristate.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Tristate final {
 public:
-    static void tristateAll(AstNetlist* nodep);
+    static void tristateAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index 84e7aba35..ece583f21 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -23,6 +23,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Undriven.h b/src/V3Undriven.h
index a93e7fc1a..30c107598 100644
--- a/src/V3Undriven.h
+++ b/src/V3Undriven.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Undriven final {
 public:
-    static void undrivenAll(AstNetlist* nodep);
+    static void undrivenAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 5a5c6d969..4ad6c78b9 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -28,6 +28,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Unknown.h b/src/V3Unknown.h
index 24af14faa..912152836 100644
--- a/src/V3Unknown.h
+++ b/src/V3Unknown.h
@@ -20,13 +20,15 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 
 //============================================================================
 
 class V3Unknown final {
 public:
-    static void unknownAll(AstNetlist* nodep);
+    static void unknownAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp
index 6655001d1..59a6efa7b 100644
--- a/src/V3Unroll.cpp
+++ b/src/V3Unroll.cpp
@@ -24,6 +24,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Unroll.h b/src/V3Unroll.h
index 4abf47241..c13e99a58 100644
--- a/src/V3Unroll.h
+++ b/src/V3Unroll.h
@@ -22,6 +22,7 @@
 
 #include "V3Ast.h"
 #include "V3Error.h"
+#include "V3ThreadSafety.h"
 
 //============================================================================
 /// Unroller with saved state, so caller can determine when pushDelete's are executed.
@@ -35,18 +36,18 @@ class UnrollStateful final {
 
 public:
     // CONSTRUCTORS
-    UnrollStateful();
-    ~UnrollStateful();
+    UnrollStateful() VL_MT_DISABLED;
+    ~UnrollStateful() VL_MT_DISABLED;
     // METHODS
-    void unrollGen(AstNodeFor* nodep, const string& beginName);
-    void unrollAll(AstNetlist* nodep);
+    void unrollGen(AstNodeFor* nodep, const string& beginName) VL_MT_DISABLED;
+    void unrollAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 //============================================================================
 
 class V3Unroll final {
 public:
-    static void unrollAll(AstNetlist* nodep);
+    static void unrollAll(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3VariableOrder.cpp b/src/V3VariableOrder.cpp
index e108e1605..707a8d391 100644
--- a/src/V3VariableOrder.cpp
+++ b/src/V3VariableOrder.cpp
@@ -20,6 +20,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3VariableOrder.h b/src/V3VariableOrder.h
index 5dc7b274e..33cc55cec 100644
--- a/src/V3VariableOrder.h
+++ b/src/V3VariableOrder.h
@@ -20,11 +20,13 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 //============================================================================
 
 class V3VariableOrder final {
 public:
-    static void orderAll();
+    static void orderAll() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 1e2be1013..3cc703257 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -63,6 +63,8 @@
 // iterateSubtreeReturnEdits.
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
@@ -124,7 +126,8 @@ std::ostream& operator<<(std::ostream& str, const Castable& rhs) {
     v3errorEnd( \
         v3errorBuildMessage(V3Error::v3errorPrep((lhs) < (rhs)   ? V3ErrorCode::WIDTHTRUNC \
                                                  : (lhs) > (rhs) ? V3ErrorCode::WIDTHEXPAND \
-                                                                 : V3ErrorCode::WIDTH), \
+                                                                 : V3ErrorCode::WIDTH, \
+                                                 VL_MT_DISABLED_CODE_UNIT), \
                             msg))
 
 //######################################################################
diff --git a/src/V3Width.h b/src/V3Width.h
index 497c0bd23..29021146f 100644
--- a/src/V3Width.h
+++ b/src/V3Width.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 class AstNetlist;
 class AstNode;
 class AstNodeDType;
@@ -28,18 +30,18 @@ class AstNodeDType;
 
 class V3Width final {
 public:
-    static void width(AstNetlist* nodep);
-    static AstNode* widthParamsEdit(AstNode* nodep);
-    static AstNode* widthGenerateParamsEdit(AstNode* nodep);
+    static void width(AstNetlist* nodep) VL_MT_DISABLED;
+    static AstNode* widthParamsEdit(AstNode* nodep) VL_MT_DISABLED;
+    static AstNode* widthGenerateParamsEdit(AstNode* nodep) VL_MT_DISABLED;
     // Final step... Mark all widths as equal
-    static void widthCommit(AstNetlist* nodep);
+    static void widthCommit(AstNetlist* nodep) VL_MT_DISABLED;
 
-    static AstNodeDType* getCommonClassTypep(AstNode* nodep1, AstNode* nodep2);
+    static AstNodeDType* getCommonClassTypep(AstNode* nodep1, AstNode* nodep2) VL_MT_DISABLED;
 
     // For use only in WidthVisitor
     // Replace AstSelBit, etc with AstSel/AstArraySel
     // Returns replacement node if nodep was deleted, or null if none.
-    static AstNode* widthSelNoIterEdit(AstNode* nodep);
+    static AstNode* widthSelNoIterEdit(AstNode* nodep) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index 96c88a2d5..c15d64add 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -26,6 +26,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 1e98874b8..10b0fb06d 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_CONTROL_CODE_UNIT 1
+
 #include "V3Active.h"
 #include "V3ActiveTop.h"
 #include "V3Assert.h"
@@ -116,479 +118,490 @@ static void reportStatsIfEnabled() {
 }
 
 static void process() {
-    // Sort modules by level so later algorithms don't need to care
-    V3LinkLevel::modSortByLevel();
-    V3Error::abortIfErrors();
-    if (v3Global.opt.debugExitParse()) {
-        cout << "--debug-exit-parse: Exiting after parse\n";
-        std::exit(0);
-    }
-
-    // Convert parseref's to varrefs, and other directly post parsing fixups
-    V3LinkParse::linkParse(v3Global.rootp());
-    // Cross-link signal names
-    // Cross-link dotted hierarchical references
-    V3LinkDot::linkDotPrimary(v3Global.rootp());
-    v3Global.checkTree();  // Force a check, as link is most likely place for problems
-    // Check if all parameters have been found
-    v3Global.opt.checkParameters();
-    // Correct state we couldn't know at parse time, repair SEL's
-    V3LinkResolve::linkResolve(v3Global.rootp());
-    // Set Lvalue's in variable refs
-    V3LinkLValue::linkLValue(v3Global.rootp());
-    // Convert return/continue/disable to jumps
-    V3LinkJump::linkJump(v3Global.rootp());
-    // Convert --/++ to normal operations. Must be after LinkJump.
-    V3LinkInc::linkIncrements(v3Global.rootp());
-    V3Error::abortIfErrors();
-
-    if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "Link");
-    if (v3Global.opt.debugExitUvm23()) {
+    {
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+        // Sort modules by level so later algorithms don't need to care
+        V3LinkLevel::modSortByLevel();
         V3Error::abortIfErrors();
-        if (v3Global.opt.xmlOnly()) V3EmitXml::emitxml();
-        cout << "--debug-exit-uvm23: Exiting after UVM-supported pass\n";
-        std::exit(0);
-    }
-
-    // Remove parameters by cloning modules to de-parameterized versions
-    //   This requires some width calculations and constant propagation
-    V3Param::param(v3Global.rootp());
-    V3LinkDot::linkDotParamed(v3Global.rootp());  // Cleanup as made new modules
-    V3LinkLValue::linkLValue(v3Global.rootp());  // Resolve new VarRefs
-    V3Error::abortIfErrors();
-
-    // Remove any modules that were parameterized and are no longer referenced.
-    V3Dead::deadifyModules(v3Global.rootp());
-    v3Global.checkTree();
-
-    // Create a hierarchical Verilation plan
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && v3Global.opt.hierarchical()) {
-        V3HierBlockPlan::createPlan(v3Global.rootp());
-        // If a plan is created, further analysis is not necessary.
-        // The actual Verilation will be done based on this plan.
-        if (v3Global.hierPlanp()) {
-            reportStatsIfEnabled();
-            return;
+        if (v3Global.opt.debugExitParse()) {
+            cout << "--debug-exit-parse: Exiting after parse\n";
+            std::exit(0);
         }
-    }
-    if (v3Global.opt.debugExitUvm()) {
+
+        // Convert parseref's to varrefs, and other directly post parsing fixups
+        V3LinkParse::linkParse(v3Global.rootp());
+        // Cross-link signal names
+        // Cross-link dotted hierarchical references
+        V3LinkDot::linkDotPrimary(v3Global.rootp());
+        v3Global.checkTree();  // Force a check, as link is most likely place for problems
+        // Check if all parameters have been found
+        v3Global.opt.checkParameters();
+        // Correct state we couldn't know at parse time, repair SEL's
+        V3LinkResolve::linkResolve(v3Global.rootp());
+        // Set Lvalue's in variable refs
+        V3LinkLValue::linkLValue(v3Global.rootp());
+        // Convert return/continue/disable to jumps
+        V3LinkJump::linkJump(v3Global.rootp());
+        // Convert --/++ to normal operations. Must be after LinkJump.
+        V3LinkInc::linkIncrements(v3Global.rootp());
         V3Error::abortIfErrors();
-        if (v3Global.opt.xmlOnly()) V3EmitXml::emitxml();
-        cout << "--debug-exit-uvm: Exiting after UVM-supported pass\n";
-        std::exit(0);
-    }
 
-    // Calculate and check widths, edit tree to TRUNC/EXTRACT any width mismatches
-    V3Width::width(v3Global.rootp());
-
-    V3Error::abortIfErrors();
-
-    // Commit to the widths we've chosen; Make widthMin==width
-    V3Width::widthCommit(v3Global.rootp());
-    v3Global.assertDTypesResolved(true);
-    v3Global.widthMinUsage(VWidthMinUsage::MATCHES_WIDTH);
-
-    // Coverage insertion
-    //    Before we do dead code elimination and inlining, or we'll lose it.
-    if (v3Global.opt.coverage()) V3Coverage::coverage(v3Global.rootp());
-
-    // Add randomize() class methods if they are used by the design
-    if (v3Global.useRandomizeMethods()) V3Randomize::randomizeNetlist(v3Global.rootp());
-
-    // Push constants, but only true constants preserving liveness
-    // so V3Undriven sees variables to be eliminated, ie "if (0 && foo) ..."
-    if (v3Global.opt.fConstBeforeDfg()) V3Const::constifyAllLive(v3Global.rootp());
-
-    // Signal based lint checks, no change to structures
-    // Must be before first constification pass drops dead code
-    V3Undriven::undrivenAll(v3Global.rootp());
-
-    // Assertion insertion
-    //    After we've added block coverage, but before other nasty transforms
-    V3AssertPre::assertPreAll(v3Global.rootp());
-    //
-    V3Assert::assertAll(v3Global.rootp());
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // Add top level wrapper with instance pointing to old top
-        // Move packages to under new top
-        // Must do this after we know parameters and dtypes (as don't clone dtype decls)
-        V3LinkLevel::wrapTop(v3Global.rootp());
-    }
-
-    // Propagate constants into expressions
-    if (v3Global.opt.fConstBeforeDfg()) V3Const::constifyAllLint(v3Global.rootp());
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // Split packed variables into multiple pieces to resolve UNOPTFLAT.
-        // should be after constifyAllLint() which flattens to 1D bit vector
-        V3SplitVar::splitVariable(v3Global.rootp());
-
-        // Remove cell arrays (must be between V3Width and scoping)
-        V3Inst::dearrayAll(v3Global.rootp());
-        V3LinkDot::linkDotArrayed(v3Global.rootp());
-
-        // Generate classes and tasks required to maintain proper lifetimes for references in forks
-        V3Fork::makeDynamicScopes(v3Global.rootp());
-        V3Fork::makeTasks(v3Global.rootp());
-
-        // Task inlining & pushing BEGINs names to variables/cells
-        // Begin processing must be after Param, before module inlining
-        V3Begin::debeginAll(v3Global.rootp());  // Flatten cell names, before inliner
-
-        // Expand inouts, stage 2
-        // Also simplify pin connections to always be AssignWs in prep for V3Unknown
-        V3Tristate::tristateAll(v3Global.rootp());
-    }
-
-    if (!v3Global.opt.xmlOnly()) {
-        // Move assignments from X into MODULE temps.
-        // (Before flattening, so each new X variable is shared between all scopes of that module.)
-        V3Unknown::unknownAll(v3Global.rootp());
-        v3Global.constRemoveXs(true);
-    }
-
-    if (v3Global.opt.fDfgPreInline() || v3Global.opt.fDfgPostInline()) {
-        // If doing DFG optimization, extract some additional candidates
-        V3DfgOptimizer::extract(v3Global.rootp());
-    }
-
-    if (v3Global.opt.fDfgPreInline()) {
-        // Pre inline DFG optimization
-        V3DfgOptimizer::optimize(v3Global.rootp(), " pre inline");
-    }
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // Module inlining
-        // Cannot remove dead variables after this, as alias information for final
-        // V3Scope's V3LinkDot is in the AstVar.
-        if (v3Global.opt.fInline()) {
-            V3Inline::inlineAll(v3Global.rootp());
-            V3LinkDot::linkDotArrayed(v3Global.rootp());  // Cleanup as made new modules
-        }
-    }
-
-    if (v3Global.opt.fDfgPostInline()) {
-        // Post inline DFG optimization
-        V3DfgOptimizer::optimize(v3Global.rootp(), "post inline");
-    }
-
-    // --PRE-FLAT OPTIMIZATIONS------------------
-
-    // Initial const/dead to reduce work for ordering code
-    V3Const::constifyAll(v3Global.rootp());
-    v3Global.checkTree();
-
-    V3Dead::deadifyDTypes(v3Global.rootp());
-    v3Global.checkTree();
-
-    V3Error::abortIfErrors();
-
-    // --FLATTENING---------------
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // We're going to flatten the hierarchy, so as many optimizations that
-        // can be done as possible should be before this....
-
-        // Convert instantiations to wassigns and always blocks
-        V3Inst::instAll(v3Global.rootp());
-
-        // Inst may have made lots of concats; fix them
-        V3Const::constifyAll(v3Global.rootp());
-
-        // Flatten hierarchy, creating a SCOPE for each module's usage as a cell
-        V3Scope::scopeAll(v3Global.rootp());
-        V3LinkDot::linkDotScope(v3Global.rootp());
-
-        // Relocate classes (after linkDot)
-        V3Class::classAll(v3Global.rootp());
-    }
-
-    // --SCOPE BASED OPTIMIZATIONS--------------
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // Cleanup
-        V3Const::constifyAll(v3Global.rootp());
-        V3Dead::deadifyDTypesScoped(v3Global.rootp());
-        v3Global.checkTree();
-    }
-
-    if (!v3Global.opt.xmlOnly()) {
-        // Convert case statements to if() blocks.  Must be after V3Unknown
-        // Must be before V3Task so don't need to deal with task in case value compares
-        V3Case::caseAll(v3Global.rootp());
-    }
-
-    if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
-        // Inline all tasks
-        V3Task::taskAll(v3Global.rootp());
-    }
-
-    if (!v3Global.opt.xmlOnly()) {
-        // Add __PVT's
-        // After V3Task so task internal variables will get renamed
-        V3Name::nameAll(v3Global.rootp());
-
-        // Loop unrolling & convert FORs to WHILEs
-        V3Unroll::unrollAll(v3Global.rootp());
-
-        // Expand slices of arrays
-        V3Slice::sliceAll(v3Global.rootp());
-
-        // Push constants across variables and remove redundant assignments
-        V3Const::constifyAll(v3Global.rootp());
-
-        if (v3Global.opt.fLife()) V3Life::lifeAll(v3Global.rootp());
-
-        // Make large low-fanin logic blocks into lookup tables
-        // This should probably be done much later, once we have common logic elimination.
-        if (!v3Global.opt.lintOnly() && v3Global.opt.fTable()) {
-            V3Table::tableAll(v3Global.rootp());
+        if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "Link");
+        if (v3Global.opt.debugExitUvm23()) {
+            V3Error::abortIfErrors();
+            if (v3Global.opt.xmlOnly()) V3EmitXml::emitxml();
+            cout << "--debug-exit-uvm23: Exiting after UVM-supported pass\n";
+            std::exit(0);
         }
 
-        // Cleanup
-        V3Const::constifyAll(v3Global.rootp());
-        V3Dead::deadifyDTypesScoped(v3Global.rootp());
+        // Remove parameters by cloning modules to de-parameterized versions
+        //   This requires some width calculations and constant propagation
+        V3Param::param(v3Global.rootp());
+        V3LinkDot::linkDotParamed(v3Global.rootp());  // Cleanup as made new modules
+        V3LinkLValue::linkLValue(v3Global.rootp());  // Resolve new VarRefs
+        V3Error::abortIfErrors();
+
+        // Remove any modules that were parameterized and are no longer referenced.
+        V3Dead::deadifyModules(v3Global.rootp());
         v3Global.checkTree();
 
-        // Move assignments/sensitives into a SBLOCK for each unique sensitivity list
-        // (May convert some ALWAYS to combo blocks, so should be before V3Gate step.)
-        V3Active::activeAll(v3Global.rootp());
-
-        // Split single ALWAYS blocks into multiple blocks for better ordering chances
-        if (v3Global.opt.fSplit()) V3Split::splitAlwaysAll(v3Global.rootp());
-        V3SplitAs::splitAsAll(v3Global.rootp());
-
-        // Create tracing sample points, before we start eliminating signals
-        if (v3Global.opt.trace()) V3TraceDecl::traceDeclAll(v3Global.rootp());
-
-        // Convert forceable signals, process force/release statements.
-        // After V3TraceDecl so we don't trace additional signals inserted to implement forcing.
-        V3Force::forceAll(v3Global.rootp());
-
-        // Gate-based logic elimination; eliminate signals and push constant across cell boundaries
-        // Instant propagation makes lots-o-constant reduction possibilities.
-        if (v3Global.opt.fGate()) {
-            V3Gate::gateAll(v3Global.rootp());
-            // V3Gate calls constant propagation itself.
-        } else {
-            v3info("Command Line disabled gate optimization with -fno-gate.  "
-                   "This may cause ordering problems.");
+        // Create a hierarchical Verilation plan
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && v3Global.opt.hierarchical()) {
+            V3HierBlockPlan::createPlan(v3Global.rootp());
+            // If a plan is created, further analysis is not necessary.
+            // The actual Verilation will be done based on this plan.
+            if (v3Global.hierPlanp()) {
+                reportStatsIfEnabled();
+                return;
+            }
+        }
+        if (v3Global.opt.debugExitUvm()) {
+            V3Error::abortIfErrors();
+            if (v3Global.opt.xmlOnly()) V3EmitXml::emitxml();
+            cout << "--debug-exit-uvm: Exiting after UVM-supported pass\n";
+            std::exit(0);
         }
 
-        // Combine COVERINCs with duplicate terms
-        if (v3Global.opt.coverage()) V3CoverageJoin::coverageJoin(v3Global.rootp());
+        // Calculate and check widths, edit tree to TRUNC/EXTRACT any width mismatches
+        V3Width::width(v3Global.rootp());
 
-        // Remove unused vars
+        V3Error::abortIfErrors();
+
+        // Commit to the widths we've chosen; Make widthMin==width
+        V3Width::widthCommit(v3Global.rootp());
+        v3Global.assertDTypesResolved(true);
+        v3Global.widthMinUsage(VWidthMinUsage::MATCHES_WIDTH);
+
+        // Coverage insertion
+        //    Before we do dead code elimination and inlining, or we'll lose it.
+        if (v3Global.opt.coverage()) V3Coverage::coverage(v3Global.rootp());
+
+        // Add randomize() class methods if they are used by the design
+        if (v3Global.useRandomizeMethods()) V3Randomize::randomizeNetlist(v3Global.rootp());
+
+        // Push constants, but only true constants preserving liveness
+        // so V3Undriven sees variables to be eliminated, ie "if (0 && foo) ..."
+        if (v3Global.opt.fConstBeforeDfg()) V3Const::constifyAllLive(v3Global.rootp());
+
+        // Signal based lint checks, no change to structures
+        // Must be before first constification pass drops dead code
+        V3Undriven::undrivenAll(v3Global.rootp());
+
+        // Assertion insertion
+        //    After we've added block coverage, but before other nasty transforms
+        V3AssertPre::assertPreAll(v3Global.rootp());
+        //
+        V3Assert::assertAll(v3Global.rootp());
+
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // Add top level wrapper with instance pointing to old top
+            // Move packages to under new top
+            // Must do this after we know parameters and dtypes (as don't clone dtype decls)
+            V3LinkLevel::wrapTop(v3Global.rootp());
+        }
+
+        // Propagate constants into expressions
+        if (v3Global.opt.fConstBeforeDfg()) V3Const::constifyAllLint(v3Global.rootp());
+
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // Split packed variables into multiple pieces to resolve UNOPTFLAT.
+            // should be after constifyAllLint() which flattens to 1D bit vector
+            V3SplitVar::splitVariable(v3Global.rootp());
+
+            // Remove cell arrays (must be between V3Width and scoping)
+            V3Inst::dearrayAll(v3Global.rootp());
+            V3LinkDot::linkDotArrayed(v3Global.rootp());
+
+            // Generate classes and tasks required to maintain proper lifetimes for references in
+            // forks
+            V3Fork::makeDynamicScopes(v3Global.rootp());
+            V3Fork::makeTasks(v3Global.rootp());
+
+            // Task inlining & pushing BEGINs names to variables/cells
+            // Begin processing must be after Param, before module inlining
+            V3Begin::debeginAll(v3Global.rootp());  // Flatten cell names, before inliner
+
+            // Expand inouts, stage 2
+            // Also simplify pin connections to always be AssignWs in prep for V3Unknown
+            V3Tristate::tristateAll(v3Global.rootp());
+        }
+
+        if (!v3Global.opt.xmlOnly()) {
+            // Move assignments from X into MODULE temps.
+            // (Before flattening, so each new X variable is shared between all scopes of that
+            // module.)
+            V3Unknown::unknownAll(v3Global.rootp());
+            v3Global.constRemoveXs(true);
+        }
+
+        if (v3Global.opt.fDfgPreInline() || v3Global.opt.fDfgPostInline()) {
+            // If doing DFG optimization, extract some additional candidates
+            V3DfgOptimizer::extract(v3Global.rootp());
+        }
+
+        if (v3Global.opt.fDfgPreInline()) {
+            // Pre inline DFG optimization
+            V3DfgOptimizer::optimize(v3Global.rootp(), " pre inline");
+        }
+
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // Module inlining
+            // Cannot remove dead variables after this, as alias information for final
+            // V3Scope's V3LinkDot is in the AstVar.
+            if (v3Global.opt.fInline()) {
+                V3Inline::inlineAll(v3Global.rootp());
+                V3LinkDot::linkDotArrayed(v3Global.rootp());  // Cleanup as made new modules
+            }
+        }
+
+        if (v3Global.opt.fDfgPostInline()) {
+            // Post inline DFG optimization
+            V3DfgOptimizer::optimize(v3Global.rootp(), "post inline");
+        }
+
+        // --PRE-FLAT OPTIMIZATIONS------------------
+
+        // Initial const/dead to reduce work for ordering code
         V3Const::constifyAll(v3Global.rootp());
-        V3Dead::deadifyAllScoped(v3Global.rootp());
+        v3Global.checkTree();
 
-        // Reorder assignments in pipelined blocks
-        if (v3Global.opt.fReorder()) V3Split::splitReorderAll(v3Global.rootp());
+        V3Dead::deadifyDTypes(v3Global.rootp());
+        v3Global.checkTree();
 
-        if (v3Global.opt.timing().isSetTrue()) {
-            // Convert AST for timing if requested
-            // Needs to be after V3Gate, as that step modifies sentrees
-            // Needs to be before V3Delayed, as delayed assignments are handled differently in
-            // suspendable processes
-            V3Timing::timingAll(v3Global.rootp());
-        }
+        V3Error::abortIfErrors();
 
-        // Create delayed assignments
-        // This creates lots of duplicate ACTIVES so ActiveTop needs to be after this step
-        V3Delayed::delayedAll(v3Global.rootp());
+        // --FLATTENING---------------
 
-        // Make Active's on the top level.
-        // Differs from V3Active, because identical clocks may be pushed
-        // down to a module and now be identical
-        V3ActiveTop::activeTopAll(v3Global.rootp());
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // We're going to flatten the hierarchy, so as many optimizations that
+            // can be done as possible should be before this....
 
-        if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "PreOrder");
+            // Convert instantiations to wassigns and always blocks
+            V3Inst::instAll(v3Global.rootp());
 
-        // Schedule the logic
-        V3Sched::schedule(v3Global.rootp());
-
-        // Convert sense lists into IF statements.
-        V3Clock::clockAll(v3Global.rootp());
-
-        // Cleanup any dly vars or other temps that are simple assignments
-        // Life must be done before Subst, as it assumes each CFunc under
-        // _eval is called only once.
-        if (v3Global.opt.fLife()) {
+            // Inst may have made lots of concats; fix them
             V3Const::constifyAll(v3Global.rootp());
-            V3Life::lifeAll(v3Global.rootp());
+
+            // Flatten hierarchy, creating a SCOPE for each module's usage as a cell
+            V3Scope::scopeAll(v3Global.rootp());
+            V3LinkDot::linkDotScope(v3Global.rootp());
+
+            // Relocate classes (after linkDot)
+            V3Class::classAll(v3Global.rootp());
         }
 
-        if (v3Global.opt.fLifePost()) V3LifePost::lifepostAll(v3Global.rootp());
+        // --SCOPE BASED OPTIMIZATIONS--------------
 
-        // Remove unused vars
-        V3Const::constifyAll(v3Global.rootp());
-        V3Dead::deadifyAllScoped(v3Global.rootp());
-
-        // Create tracing logic, since we ripped out some signals the user might want to trace
-        // Note past this point, we presume traced variables won't move between CFuncs
-        // (It's OK if untraced temporaries move around, or vars
-        // "effectively" activate the same way.)
-        if (v3Global.opt.trace()) V3Trace::traceAll(v3Global.rootp());
-
-        if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "Scoped");
-    }
-
-    // --MODULE OPTIMIZATIONS--------------
-
-    if (!v3Global.opt.xmlOnly()) {
-        // Split deep blocks to appease MSVC++.  Must be before Localize.
-        if (!v3Global.opt.lintOnly() && v3Global.opt.compLimitBlocks()) {
-            V3DepthBlock::depthBlockAll(v3Global.rootp());
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // Cleanup
+            V3Const::constifyAll(v3Global.rootp());
+            V3Dead::deadifyDTypesScoped(v3Global.rootp());
+            v3Global.checkTree();
         }
 
-        // Up until this point, all references must be scoped
-        v3Global.assertScoped(false);
-
-        // Move variables from modules to function local variables where possible
-        if (v3Global.opt.fLocalize()) V3Localize::localizeAll(v3Global.rootp());
-
-        // Remove remaining scopes; make varrefs/funccalls relative to current module
-        V3Descope::descopeAll(v3Global.rootp());
-
-        // Icache packing; combine common code in each module's functions into subroutines
-        if (v3Global.opt.fCombine()) V3Combine::combineAll(v3Global.rootp());
-    }
-
-    V3Error::abortIfErrors();
-
-    // --GENERATION------------------
-
-    if (!v3Global.opt.xmlOnly()) {
-        // Remove unused vars
-        V3Const::constifyAll(v3Global.rootp());
-        V3Dead::deadifyAll(v3Global.rootp());
-
-        // Here down, widthMin() is the Verilog width, and width() is the C++ width
-        // Bits between widthMin() and width() are irrelevant, but may be non zero.
-        v3Global.widthMinUsage(VWidthMinUsage::VERILOG_WIDTH);
-
-        // Make all expressions either 8, 16, 32 or 64 bits
-        V3Clean::cleanAll(v3Global.rootp());
-
-        // Move wide constants to BLOCK temps / ConstPool.
-        V3Premit::premitAll(v3Global.rootp());
-    }
-
-    // Expand macros and wide operators into C++ primitives
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && v3Global.opt.fExpand()) {
-        V3Expand::expandAll(v3Global.rootp());
-    }
-
-    // Propagate constants across WORDSEL arrayed temporaries
-    if (!v3Global.opt.xmlOnly() && v3Global.opt.fSubst()) {
-        // Constant folding of expanded stuff
-        V3Const::constifyCpp(v3Global.rootp());
-        V3Subst::substituteAll(v3Global.rootp());
-    }
-
-    if (!v3Global.opt.xmlOnly() && v3Global.opt.fSubstConst()) {
-        // Constant folding of substitutions
-        V3Const::constifyCpp(v3Global.rootp());
-        V3Dead::deadifyAll(v3Global.rootp());
-    }
-
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly()) {
-        if (v3Global.opt.fMergeCond()) {
-            // Merge conditionals
-            V3MergeCond::mergeAll(v3Global.rootp());
+        if (!v3Global.opt.xmlOnly()) {
+            // Convert case statements to if() blocks.  Must be after V3Unknown
+            // Must be before V3Task so don't need to deal with task in case value compares
+            V3Case::caseAll(v3Global.rootp());
         }
 
-        if (v3Global.opt.fReloop()) {
-            // Reform loops to reduce code size
-            // Must be after all Sel/array index based optimizations
-            V3Reloop::reloopAll(v3Global.rootp());
+        if (!(v3Global.opt.xmlOnly() && !v3Global.opt.flatten())) {
+            // Inline all tasks
+            V3Task::taskAll(v3Global.rootp());
         }
 
-        // Fix very deep expressions
-        // Mark evaluation functions as member functions, if needed.
-        V3Depth::depthAll(v3Global.rootp());
+        if (!v3Global.opt.xmlOnly()) {
+            // Add __PVT's
+            // After V3Task so task internal variables will get renamed
+            V3Name::nameAll(v3Global.rootp());
 
-        // Branch prediction
-        V3Branch::branchAll(v3Global.rootp());
+            // Loop unrolling & convert FORs to WHILEs
+            V3Unroll::unrollAll(v3Global.rootp());
 
-        // Add C casts when longs need to become long-long and vice-versa
-        // Note depth may insert something needing a cast, so this must be last.
-        V3Cast::castAll(v3Global.rootp());
-    }
+            // Expand slices of arrays
+            V3Slice::sliceAll(v3Global.rootp());
 
-    V3Error::abortIfErrors();
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly()) {  //
-        V3CCtors::cctorsAll();
-    }
+            // Push constants across variables and remove redundant assignments
+            V3Const::constifyAll(v3Global.rootp());
 
-    if (!v3Global.opt.xmlOnly() && v3Global.opt.mtasks()) {
-        // Finalize our MTask cost estimates and pack the mtasks into
-        // threads. Must happen pre-EmitC which relies on the packing
-        // order. Must happen post-V3LifePost which changes the relative
-        // costs of mtasks.
-        V3Partition::finalize(v3Global.rootp());
-    }
+            if (v3Global.opt.fLife()) V3Life::lifeAll(v3Global.rootp());
 
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
-        // Add common methods/etc to modules
-        V3Common::commonAll();
+            // Make large low-fanin logic blocks into lookup tables
+            // This should probably be done much later, once we have common logic elimination.
+            if (!v3Global.opt.lintOnly() && v3Global.opt.fTable()) {
+                V3Table::tableAll(v3Global.rootp());
+            }
 
-        // Order variables
-        V3VariableOrder::orderAll();
+            // Cleanup
+            V3Const::constifyAll(v3Global.rootp());
+            V3Dead::deadifyDTypesScoped(v3Global.rootp());
+            v3Global.checkTree();
 
-        // Create AstCUse to determine what class forward declarations/#includes needed in C
-        V3CUse::cUseAll();
-    }
+            // Move assignments/sensitives into a SBLOCK for each unique sensitivity list
+            // (May convert some ALWAYS to combo blocks, so should be before V3Gate step.)
+            V3Active::activeAll(v3Global.rootp());
 
-    // Output the text
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
-        // emitcInlines is first, as it may set needHInlines which other emitters read
-        V3EmitC::emitcInlines();
-        V3EmitC::emitcSyms();
-        V3EmitC::emitcConstPool();
-        V3EmitC::emitcModel();
-        V3EmitC::emitcHeaders();
-    } else if (v3Global.opt.dpiHdrOnly()) {
-        V3EmitC::emitcSyms(true);
+            // Split single ALWAYS blocks into multiple blocks for better ordering chances
+            if (v3Global.opt.fSplit()) V3Split::splitAlwaysAll(v3Global.rootp());
+            V3SplitAs::splitAsAll(v3Global.rootp());
+
+            // Create tracing sample points, before we start eliminating signals
+            if (v3Global.opt.trace()) V3TraceDecl::traceDeclAll(v3Global.rootp());
+
+            // Convert forceable signals, process force/release statements.
+            // After V3TraceDecl so we don't trace additional signals inserted to implement
+            // forcing.
+            V3Force::forceAll(v3Global.rootp());
+
+            // Gate-based logic elimination; eliminate signals and push constant across cell
+            // boundaries Instant propagation makes lots-o-constant reduction possibilities.
+            if (v3Global.opt.fGate()) {
+                V3Gate::gateAll(v3Global.rootp());
+                // V3Gate calls constant propagation itself.
+            } else {
+                v3info("Command Line disabled gate optimization with -fno-gate.  "
+                       "This may cause ordering problems.");
+            }
+
+            // Combine COVERINCs with duplicate terms
+            if (v3Global.opt.coverage()) V3CoverageJoin::coverageJoin(v3Global.rootp());
+
+            // Remove unused vars
+            V3Const::constifyAll(v3Global.rootp());
+            V3Dead::deadifyAllScoped(v3Global.rootp());
+
+            // Reorder assignments in pipelined blocks
+            if (v3Global.opt.fReorder()) V3Split::splitReorderAll(v3Global.rootp());
+
+            if (v3Global.opt.timing().isSetTrue()) {
+                // Convert AST for timing if requested
+                // Needs to be after V3Gate, as that step modifies sentrees
+                // Needs to be before V3Delayed, as delayed assignments are handled differently in
+                // suspendable processes
+                V3Timing::timingAll(v3Global.rootp());
+            }
+
+            // Create delayed assignments
+            // This creates lots of duplicate ACTIVES so ActiveTop needs to be after this step
+            V3Delayed::delayedAll(v3Global.rootp());
+
+            // Make Active's on the top level.
+            // Differs from V3Active, because identical clocks may be pushed
+            // down to a module and now be identical
+            V3ActiveTop::activeTopAll(v3Global.rootp());
+
+            if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "PreOrder");
+
+            // Schedule the logic
+            V3Sched::schedule(v3Global.rootp());
+
+            // Convert sense lists into IF statements.
+            V3Clock::clockAll(v3Global.rootp());
+
+            // Cleanup any dly vars or other temps that are simple assignments
+            // Life must be done before Subst, as it assumes each CFunc under
+            // _eval is called only once.
+            if (v3Global.opt.fLife()) {
+                V3Const::constifyAll(v3Global.rootp());
+                V3Life::lifeAll(v3Global.rootp());
+            }
+
+            if (v3Global.opt.fLifePost()) V3LifePost::lifepostAll(v3Global.rootp());
+
+            // Remove unused vars
+            V3Const::constifyAll(v3Global.rootp());
+            V3Dead::deadifyAllScoped(v3Global.rootp());
+
+            // Create tracing logic, since we ripped out some signals the user might want to trace
+            // Note past this point, we presume traced variables won't move between CFuncs
+            // (It's OK if untraced temporaries move around, or vars
+            // "effectively" activate the same way.)
+            if (v3Global.opt.trace()) V3Trace::traceAll(v3Global.rootp());
+
+            if (v3Global.opt.stats()) V3Stats::statsStageAll(v3Global.rootp(), "Scoped");
+        }
+
+        // --MODULE OPTIMIZATIONS--------------
+
+        if (!v3Global.opt.xmlOnly()) {
+            // Split deep blocks to appease MSVC++.  Must be before Localize.
+            if (!v3Global.opt.lintOnly() && v3Global.opt.compLimitBlocks()) {
+                V3DepthBlock::depthBlockAll(v3Global.rootp());
+            }
+
+            // Up until this point, all references must be scoped
+            v3Global.assertScoped(false);
+
+            // Move variables from modules to function local variables where possible
+            if (v3Global.opt.fLocalize()) V3Localize::localizeAll(v3Global.rootp());
+
+            // Remove remaining scopes; make varrefs/funccalls relative to current module
+            V3Descope::descopeAll(v3Global.rootp());
+
+            // Icache packing; combine common code in each module's functions into subroutines
+            if (v3Global.opt.fCombine()) V3Combine::combineAll(v3Global.rootp());
+        }
+
+        V3Error::abortIfErrors();
+
+        // --GENERATION------------------
+
+        if (!v3Global.opt.xmlOnly()) {
+            // Remove unused vars
+            V3Const::constifyAll(v3Global.rootp());
+            V3Dead::deadifyAll(v3Global.rootp());
+
+            // Here down, widthMin() is the Verilog width, and width() is the C++ width
+            // Bits between widthMin() and width() are irrelevant, but may be non zero.
+            v3Global.widthMinUsage(VWidthMinUsage::VERILOG_WIDTH);
+
+            // Make all expressions either 8, 16, 32 or 64 bits
+            V3Clean::cleanAll(v3Global.rootp());
+
+            // Move wide constants to BLOCK temps / ConstPool.
+            V3Premit::premitAll(v3Global.rootp());
+        }
+
+        // Expand macros and wide operators into C++ primitives
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && v3Global.opt.fExpand()) {
+            V3Expand::expandAll(v3Global.rootp());
+        }
+
+        // Propagate constants across WORDSEL arrayed temporaries
+        if (!v3Global.opt.xmlOnly() && v3Global.opt.fSubst()) {
+            // Constant folding of expanded stuff
+            V3Const::constifyCpp(v3Global.rootp());
+            V3Subst::substituteAll(v3Global.rootp());
+        }
+
+        if (!v3Global.opt.xmlOnly() && v3Global.opt.fSubstConst()) {
+            // Constant folding of substitutions
+            V3Const::constifyCpp(v3Global.rootp());
+            V3Dead::deadifyAll(v3Global.rootp());
+        }
+
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly()) {
+            if (v3Global.opt.fMergeCond()) {
+                // Merge conditionals
+                V3MergeCond::mergeAll(v3Global.rootp());
+            }
+
+            if (v3Global.opt.fReloop()) {
+                // Reform loops to reduce code size
+                // Must be after all Sel/array index based optimizations
+                V3Reloop::reloopAll(v3Global.rootp());
+            }
+
+            // Fix very deep expressions
+            // Mark evaluation functions as member functions, if needed.
+            V3Depth::depthAll(v3Global.rootp());
+
+            // Branch prediction
+            V3Branch::branchAll(v3Global.rootp());
+
+            // Add C casts when longs need to become long-long and vice-versa
+            // Note depth may insert something needing a cast, so this must be last.
+            V3Cast::castAll(v3Global.rootp());
+        }
+
+        V3Error::abortIfErrors();
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly()) {  //
+            V3CCtors::cctorsAll();
+        }
+
+        if (!v3Global.opt.xmlOnly() && v3Global.opt.mtasks()) {
+            // Finalize our MTask cost estimates and pack the mtasks into
+            // threads. Must happen pre-EmitC which relies on the packing
+            // order. Must happen post-V3LifePost which changes the relative
+            // costs of mtasks.
+            V3Partition::finalize(v3Global.rootp());
+        }
+
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
+            // Add common methods/etc to modules
+            V3Common::commonAll();
+
+            // Order variables
+            V3VariableOrder::orderAll();
+
+            // Create AstCUse to determine what class forward declarations/#includes needed in C
+            V3CUse::cUseAll();
+        }
+
+        // Output the text
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
+            // emitcInlines is first, as it may set needHInlines which other emitters read
+            V3EmitC::emitcInlines();
+            V3EmitC::emitcSyms();
+            V3EmitC::emitcConstPool();
+            V3EmitC::emitcModel();
+            V3EmitC::emitcHeaders();
+        } else if (v3Global.opt.dpiHdrOnly()) {
+            V3EmitC::emitcSyms(true);
+        }
     }
     if (!v3Global.opt.xmlOnly()
         && !v3Global.opt.dpiHdrOnly()) {  // Unfortunately we have some lint checks in emitcImp.
         V3EmitC::emitcImp();
     }
-    if (v3Global.opt.xmlOnly()
-        // Check XML when debugging to make sure no missing node types
-        || (v3Global.opt.debugCheck() && !v3Global.opt.lintOnly() && !v3Global.opt.dpiHdrOnly())) {
-        V3EmitXml::emitxml();
-    }
-
-    // Output DPI protected library files
-    if (!v3Global.opt.libCreate().empty()) {
-        if (v3Global.rootp()->delaySchedulerp()) {
-            v3warn(E_UNSUPPORTED, "Unsupported: --lib-create with --timing and delays");
+    {
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+        if (v3Global.opt.xmlOnly()
+            // Check XML when debugging to make sure no missing node types
+            || (v3Global.opt.debugCheck() && !v3Global.opt.lintOnly()
+                && !v3Global.opt.dpiHdrOnly())) {
+            V3EmitXml::emitxml();
         }
-        V3ProtectLib::protect();
-        V3EmitV::emitvFiles();
-        V3EmitC::emitcFiles();
-    }
 
-    if (v3Global.opt.stats()) V3Stats::statsStage("emit");
-
-    // Statistics
-    reportStatsIfEnabled();
-
-    if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
-        size_t src_f_cnt = 0;
-        for (AstNode* nodep = v3Global.rootp()->filesp(); nodep; nodep = nodep->nextp()) {
-            if (const AstCFile* cfilep = VN_CAST(nodep, CFile))
-                src_f_cnt += cfilep->source() ? 1 : 0;
+        // Output DPI protected library files
+        if (!v3Global.opt.libCreate().empty()) {
+            if (v3Global.rootp()->delaySchedulerp()) {
+                v3warn(E_UNSUPPORTED, "Unsupported: --lib-create with --timing and delays");
+            }
+            V3ProtectLib::protect();
+            V3EmitV::emitvFiles();
+            V3EmitC::emitcFiles();
         }
-        if (src_f_cnt >= V3EmitMk::PARALLEL_FILE_CNT_THRESHOLD) v3Global.useParallelBuild(true);
 
-        // Makefile must be after all other emitters
-        if (v3Global.opt.main()) V3EmitCMain::emit();
-        if (v3Global.opt.cmake()) V3EmitCMake::emit();
-        if (v3Global.opt.gmake()) V3EmitMk::emitmk();
+        if (v3Global.opt.stats()) V3Stats::statsStage("emit");
+
+        // Statistics
+        reportStatsIfEnabled();
+
+        if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
+            size_t src_f_cnt = 0;
+            for (AstNode* nodep = v3Global.rootp()->filesp(); nodep; nodep = nodep->nextp()) {
+                if (const AstCFile* cfilep = VN_CAST(nodep, CFile))
+                    src_f_cnt += cfilep->source() ? 1 : 0;
+            }
+            if (src_f_cnt >= V3EmitMk::PARALLEL_FILE_CNT_THRESHOLD)
+                v3Global.useParallelBuild(true);
+
+            // Makefile must be after all other emitters
+            if (v3Global.opt.main()) V3EmitCMain::emit();
+            if (v3Global.opt.cmake()) V3EmitCMake::emit();
+            if (v3Global.opt.gmake()) V3EmitMk::emitmk();
+        }
     }
 }
 
@@ -626,21 +639,29 @@ static void verilate(const string& argString) {
     // and after removing files as may make debug output)
     VBasicDTypeKwd::selfTest();
     if (v3Global.opt.debugSelfTest()) {
-        VHashSha256::selfTest();
-        VSpellCheck::selfTest();
-        V3Graph::selfTest();
-        V3TSP::selfTest();
-        V3ScoreboardBase::selfTest();
-        V3Partition::selfTest();
-        V3Partition::selfTestNormalizeCosts();
-        V3Broken::selfTest();
+        {
+            const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+
+            VHashSha256::selfTest();
+            VSpellCheck::selfTest();
+            V3Graph::selfTest();
+            V3TSP::selfTest();
+            V3ScoreboardBase::selfTest();
+            V3Partition::selfTest();
+            V3Partition::selfTestNormalizeCosts();
+            V3Broken::selfTest();
+        }
         V3ThreadPool::selfTest();
         UINFO(2, "selfTest done\n");
     }
 
-    // Read first filename
-    v3Global.readFiles();
-    v3Global.removeStd();
+    {
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+
+        // Read first filename
+        v3Global.readFiles();
+        v3Global.removeStd();
+    }
 
     // Link, etc, if needed
     if (!v3Global.opt.preprocOnly()) {  //
@@ -660,6 +681,8 @@ static void verilate(const string& argString) {
     V3Error::abortIfWarnings();
 
     if (v3Global.hierPlanp()) {  // This run is for just write a makefile
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+
         UASSERT(v3Global.opt.hierarchical(), "hierarchical must be set");
         UASSERT(!v3Global.opt.hierChild(), "This must not be a hierarhcical-child run");
         UASSERT(v3Global.opt.hierBlocks().empty(), "hierarchical-block must not be set");
@@ -747,21 +770,25 @@ int main(int argc, char** argv) {
     time(&randseed);
     srand(static_cast<int>(randseed));
 
-    // Post-constructor initialization of netlists
-    v3Global.boot();
-
-    // Preprocessor
-    // Before command parsing so we can handle -Ds on command line.
-    V3PreShell::boot();
-
-    // Command option parsing
-    v3Global.opt.buildDepBin(VString::escapeStringForPath(argv[0]));
     const string argString = V3Options::argString(argc - 1, argv + 1);
-    v3Global.opt.parseOpts(new FileLine{FileLine::commandLineFilename()}, argc - 1, argv + 1);
+    {
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
 
-    // Validate settings (aka Boost.Program_options)
-    v3Global.opt.notify();
-    v3Global.rootp()->timeInit();
+        // Post-constructor initialization of netlists
+        v3Global.boot();
+
+        // Preprocessor
+        // Before command parsing so we can handle -Ds on command line.
+        V3PreShell::boot();
+
+        // Command option parsing
+        v3Global.opt.buildDepBin(VString::escapeStringForPath(argv[0]));
+        v3Global.opt.parseOpts(new FileLine{FileLine::commandLineFilename()}, argc - 1, argv + 1);
+
+        // Validate settings (aka Boost.Program_options)
+        v3Global.opt.notify();
+        v3Global.rootp()->timeInit();
+    }
 
     V3Error::abortIfErrors();
 
@@ -777,10 +804,14 @@ int main(int argc, char** argv) {
         execBuildJob();
     }
 
-    // Explicitly release resources
-    V3PreShell::shutdown();
-    v3Global.shutdown();
-    FileLine::deleteAllRemaining();
+    {
+        const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
+
+        // Explicitly release resources
+        V3PreShell::shutdown();
+        v3Global.shutdown();
+        FileLine::deleteAllRemaining();
+    }
 
     UINFO(1, "Done, Exiting...\n");
 }
diff --git a/src/VlcMain.cpp b/src/VlcMain.cpp
index c0c75cdc7..34e314d6d 100644
--- a/src/VlcMain.cpp
+++ b/src/VlcMain.cpp
@@ -15,6 +15,8 @@
 //*************************************************************************
 
 // clang-format off
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "config_build.h"
 #ifndef HAVE_CONFIG_PACKAGE
 # error "Something failed during ./configure as config_package.h is incomplete. Perhaps you used autoreconf, don't."
diff --git a/src/VlcOptions.h b/src/VlcOptions.h
index 5bfd183f5..a81737b4f 100644
--- a/src/VlcOptions.h
+++ b/src/VlcOptions.h
@@ -20,6 +20,8 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3ThreadSafety.h"
+
 #include "config_rev.h"
 
 #include <map>
@@ -47,7 +49,7 @@ class VlcOptions final {
 
 private:
     // METHODS
-    static void showVersion(bool verbose);
+    static void showVersion(bool verbose) VL_MT_DISABLED;
 
 public:
     // CONSTRUCTORS
@@ -55,8 +57,8 @@ public:
     ~VlcOptions() = default;
 
     // METHODS
-    void parseOptsList(int argc, char** argv);
-    void addReadFile(const string& filename);
+    void parseOptsList(int argc, char** argv) VL_MT_DISABLED;
+    void addReadFile(const string& filename) VL_MT_DISABLED;
 
     // ACCESSORS (options)
     const VlStringSet& readFiles() const { return m_readFiles; }
@@ -70,7 +72,7 @@ public:
     string writeInfoFile() const { return m_writeInfoFile; }
 
     // METHODS (from main)
-    static string version();
+    static string version() VL_MT_DISABLED;
 };
 
 //######################################################################
diff --git a/src/VlcTop.cpp b/src/VlcTop.cpp
index bf5038450..5ca8d968e 100644
--- a/src/VlcTop.cpp
+++ b/src/VlcTop.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#define VL_MT_DISABLED_CODE_UNIT 1
+
 #include "VlcTop.h"
 
 #include "V3Error.h"
diff --git a/src/verilog.y b/src/verilog.y
index c850947d2..cdc6682e9 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -120,15 +120,16 @@ public:
     }
 
     // METHODS
-    AstArg* argWrapList(AstNodeExpr* nodep);
+    AstArg* argWrapList(AstNodeExpr* nodep) VL_MT_DISABLED;
     bool allTracingOn(FileLine* fl) {
         return v3Global.opt.trace() && m_tracingParse && fl->tracingOn();
     }
-    AstRange* scrubRange(AstNodeRange* rangep);
-    AstNodeDType* createArray(AstNodeDType* basep, AstNodeRange* rangep, bool isPacked);
+    AstRange* scrubRange(AstNodeRange* rangep) VL_MT_DISABLED;
+    AstNodeDType* createArray(AstNodeDType* basep, AstNodeRange* rangep,
+                              bool isPacked) VL_MT_DISABLED;
     AstVar* createVariable(FileLine* fileline, const string& name, AstNodeRange* arrayp,
-                           AstNode* attrsp);
-    AstNode* createSupplyExpr(FileLine* fileline, const string& name, int value);
+                           AstNode* attrsp) VL_MT_DISABLED;
+    AstNode* createSupplyExpr(FileLine* fileline, const string& name, int value) VL_MT_DISABLED;
     AstText* createTextQuoted(FileLine* fileline, const string& text) {
         string newtext = deQuote(fileline, text);
         return new AstText{fileline, newtext};
@@ -254,7 +255,7 @@ public:
             return createArray(dtypep, rangearraysp, isPacked);
         }
     }
-    string deQuote(FileLine* fileline, string text);
+    string deQuote(FileLine* fileline, string text) VL_MT_DISABLED;
     void checkDpiVer(FileLine* fileline, const string& str) {
         if (str != "DPI-C" && !v3Global.opt.bboxSys()) {
             fileline->v3error("Unsupported DPI type '" << str << "': Use 'DPI-C'");

From 750b5be5d3f884e54f4a078b05b844a0e0b533de Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Mon, 25 Sep 2023 22:40:44 +0800
Subject: [PATCH 019/157] Remove support for parameterized UDPs (#4518)

---
 src/verilog.y                      |  7 +++----
 test_regress/t/t_udp_param_bad.out |  7 +++++++
 test_regress/t/t_udp_param_bad.pl  | 19 +++++++++++++++++++
 test_regress/t/t_udp_param_bad.v   | 22 ++++++++++++++++++++++
 4 files changed, 51 insertions(+), 4 deletions(-)
 create mode 100644 test_regress/t/t_udp_param_bad.out
 create mode 100755 test_regress/t/t_udp_param_bad.pl
 create mode 100644 test_regress/t/t_udp_param_bad.v

diff --git a/src/verilog.y b/src/verilog.y
index cdc6682e9..134494488 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1346,16 +1346,15 @@ module_declaration:             // ==IEEE: module_declaration
                           GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
-        |       udpFront parameter_port_listE portsStarE ';'
+        |       udpFront portsStarE ';'
         /*cont*/    module_itemListE yENDPRIMITIVE endLabelE
                         { $1->modTrace(false);  // Stash for implicit wires, etc
                           if ($2) $1->addStmtsp($2);
-                          if ($3) $1->addStmtsp($3);
-                          if ($5) $1->addStmtsp($5);
+                          if ($4) $1->addStmtsp($4);
                           GRAMMARP->m_tracingParse = true;
                           GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
-                          GRAMMARP->endLabel($<fl>7, $1, $7); }
+                          GRAMMARP->endLabel($<fl>6, $1, $6); }
         //
         |       yEXTERN modFront parameter_port_listE portsStarE ';'
                         { BBUNSUP($<fl>1, "Unsupported: extern module"); }
diff --git a/test_regress/t/t_udp_param_bad.out b/test_regress/t/t_udp_param_bad.out
new file mode 100644
index 000000000..cd3152a08
--- /dev/null
+++ b/test_regress/t/t_udp_param_bad.out
@@ -0,0 +1,7 @@
+%Error: t/t_udp_param_bad.v:12:15: syntax error, unexpected '#', expecting ';'
+   12 | primitive udp #(
+      |               ^
+%Error: t/t_udp_param_bad.v:14:1: syntax error, unexpected ')', expecting ';'
+   14 | ) (o, a);
+      | ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_udp_param_bad.pl b/test_regress/t/t_udp_param_bad.pl
new file mode 100755
index 000000000..a60503a1f
--- /dev/null
+++ b/test_regress/t/t_udp_param_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_udp_param_bad.v b/test_regress/t/t_udp_param_bad.v
new file mode 100644
index 000000000..8ac68827e
--- /dev/null
+++ b/test_regress/t/t_udp_param_bad.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   wire a, b;
+   udp i_udp (a, b);
+endmodule
+
+primitive udp #(
+    parameter A = 1
+) (o, a);
+   output o;
+   input  a;
+   table
+      //o a
+      0 :  1;
+      1 :  0;
+   endtable
+endprimitive

From a9256d47584acf95ba4126f72b69d1f9017d82c5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 25 Sep 2023 11:28:44 -0400
Subject: [PATCH 020/157] CI: Disable m32 runs

---
 .github/workflows/build.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 46752f44c..2ef21b11c 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -37,7 +37,8 @@ jobs:
         compiler:
           - { cc: clang, cxx: clang++ }
           - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
+        # m32 1 is deprecated, not here to speed up regressions
+        m32: [0]
         exclude:
           # Build pull requests only with ubuntu-22.04 and without m32
           # - os:  ${{ github.event_name == 'pull_request' && 'ubuntu-18.04' || 'do-not-exclude' }}

From 60e9827ffe7c68f2b786c8bed76d632c3931a1db Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Mon, 25 Sep 2023 23:39:04 +0800
Subject: [PATCH 021/157] Support converting parameters inside modules to
 localparams (#4511)

---
 src/V3AstNodeOther.h                          |  6 +-
 src/V3LinkParse.cpp                           | 15 ++++
 src/V3ParseSym.h                              |  7 ++
 src/V3SplitVar.cpp                            |  1 -
 src/verilog.y                                 | 76 +++++++++----------
 test_regress/t/t_param_implicit_local_bad.out | 23 ++++++
 test_regress/t/t_param_implicit_local_bad.pl  | 19 +++++
 test_regress/t/t_param_implicit_local_bad.v   | 55 ++++++++++++++
 test_regress/t/t_param_named.v                | 10 +--
 9 files changed, 160 insertions(+), 52 deletions(-)
 create mode 100644 test_regress/t/t_param_implicit_local_bad.out
 create mode 100755 test_regress/t/t_param_implicit_local_bad.pl
 create mode 100644 test_regress/t/t_param_implicit_local_bad.v

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index a6b8aa63f..2908bbe95 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -234,6 +234,7 @@ private:
     bool m_inLibrary : 1;  // From a library, no error if not used, never top level
     bool m_dead : 1;  // LinkDot believes is dead; will remove in Dead visitors
     bool m_hasGParam : 1;  // Has global parameter (for link)
+    bool m_hasParameterList : 1;  // Has #() for parameter declaration
     bool m_hierBlock : 1;  // Hierarchical Block marked by HIER_BLOCK pragma
     bool m_internal : 1;  // Internally created
     bool m_recursive : 1;  // Recursive module
@@ -248,6 +249,7 @@ protected:
         , m_inLibrary{false}
         , m_dead{false}
         , m_hasGParam{false}
+        , m_hasParameterList{false}
         , m_hierBlock{false}
         , m_internal{false}
         , m_recursive{false}
@@ -277,6 +279,8 @@ public:
     bool dead() const { return m_dead; }
     void hasGParam(bool flag) { m_hasGParam = flag; }
     bool hasGParam() const { return m_hasGParam; }
+    void hasParameterList(bool flag) { m_hasParameterList = flag; }
+    bool hasParameterList() const { return m_hasParameterList; }
     void hierBlock(bool flag) { m_hierBlock = flag; }
     bool hierBlock() const { return m_hierBlock; }
     void internal(bool flag) { m_internal = flag; }
@@ -1660,7 +1664,7 @@ class AstVar final : public AstNode {
     VVarAttrClocker m_attrClocker;
     MTaskIdSet m_mtaskIds;  // MTaskID's that read or write this var
     int m_pinNum = 0;  // For XML, if non-zero the connection pin number
-    bool m_ansi : 1;  // ANSI port list variable (for dedup check)
+    bool m_ansi : 1;  // Params or pins declared in the module header, rather than the body
     bool m_declTyped : 1;  // Declared as type (for dedup check)
     bool m_tristate : 1;  // Inout or triwire or trireg
     bool m_primaryIO : 1;  // In/out to top level (or directly assigned from same)
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 48a5cf0e4..5b863df9c 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -66,6 +66,7 @@ private:
     AstNodeExpr* m_defaultOutSkewp = nullptr;  // Current default output skew
     int m_genblkAbove = 0;  // Begin block number of if/case/for above
     int m_genblkNum = 0;  // Begin block number, 0=none seen
+    int m_beginDepth = 0;  // How many begin blocks above current node within current AstNodeModule
     VLifetime m_lifetime = VLifetime::STATIC;  // Propagating lifetime
     bool m_insideLoop = false;  // True if the node is inside a loop
 
@@ -312,7 +313,17 @@ private:
         if (nodep->lifetime().isNone() && nodep->varType() != VVarType::PORT) {
             nodep->lifetime(m_lifetime);
         }
+
+        if (nodep->isGParam() && !nodep->isAnsi()) {  // shadow some parameters into localparams
+            if (m_beginDepth > 0
+                || (m_beginDepth == 0
+                    && (m_modp->hasParameterList() || VN_IS(m_modp, Class)
+                        || VN_IS(m_modp, Package)))) {
+                nodep->varType(VVarType::LPARAM);
+            }
+        }
         if (nodep->isGParam() && m_modp) m_modp->hasGParam(true);
+
         if (nodep->isParam() && !nodep->valuep()
             && nodep->fileline()->language() < V3LangCode::L1800_2009) {
             nodep->v3warn(NEWERSTD,
@@ -619,6 +630,7 @@ private:
         VL_RESTORER(m_modp);
         VL_RESTORER(m_genblkAbove);
         VL_RESTORER(m_genblkNum);
+        VL_RESTORER(m_beginDepth);
         VL_RESTORER(m_lifetime);
         {
             // Module: Create sim table for entire module and iterate
@@ -628,6 +640,7 @@ private:
             m_modp = nodep;
             m_genblkAbove = 0;
             m_genblkNum = 0;
+            m_beginDepth = 0;
             m_valueModp = nodep;
             m_lifetime = nodep->lifetime();
             if (m_lifetime.isNone()) {
@@ -658,6 +671,8 @@ private:
     void visit(AstBegin* nodep) override {
         V3Config::applyCoverageBlock(m_modp, nodep);
         cleanFileline(nodep);
+        VL_RESTORER(m_beginDepth);
+        m_beginDepth++;
         const AstNode* const backp = nodep->backp();
         // IEEE says directly nested item is not a new block
         // The genblk name will get attached to the if true/false LOWER begin block(s)
diff --git a/src/V3ParseSym.h b/src/V3ParseSym.h
index c29db09d3..32b817e19 100644
--- a/src/V3ParseSym.h
+++ b/src/V3ParseSym.h
@@ -130,6 +130,13 @@ public:
         UASSERT_OBJ(!m_sympStack.empty(), nodep, "symbol stack underflow");
         m_symCurrentp = m_sympStack.back();
     }
+    AstNodeModule* findTopNodeModule(FileLine* fl, bool requireNoneNull = true) {
+        for (VSymEnt* const symp : vlstd::reverse_view(m_sympStack)) {
+            if (AstNodeModule* const modp = VN_CAST(symp->nodep(), NodeModule)) return modp;
+        }
+        if (requireNoneNull) fl->v3fatalSrc("fail to find current module");
+        return nullptr;
+    }
     void showUpward() {  // LCOV_EXCL_START
         UINFO(1, "ParseSym Stack:\n");
         for (VSymEnt* const symp : vlstd::reverse_view(m_sympStack)) {
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 34779a573..e940918b8 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -719,7 +719,6 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
                         adtypep = VN_AS(refp->dtypep()->skipRefp(), UnpackArrayDType);
                     } else {
                         AstSliceSel* const selp = VN_AS(ref.nodep(), SliceSel);
-                        UASSERT_OBJ(selp, ref.nodep(), "Unexpected op is registered");
                         refp = VN_AS(selp->fromp(), VarRef);
                         UASSERT_OBJ(refp, selp, "Unexpected op is registered");
                         adtypep = VN_AS(selp->dtypep()->skipRefp(), UnpackArrayDType);
diff --git a/src/verilog.y b/src/verilog.y
index 134494488..2b9120969 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -84,7 +84,6 @@ public:
     AstNodeDType* m_memDTypep = nullptr;  // Pointer to data type for next member declaration
     AstDelay* m_netDelayp = nullptr;  // Pointer to delay for next signal declaration
     AstStrengthSpec* m_netStrengthp = nullptr;  // Pointer to strength for next net declaration
-    AstNodeModule* m_modp = nullptr;  // Last module for timeunits
     FileLine* m_instModuleFl = nullptr;  // Fileline of module referenced for instantiations
     AstPin* m_instParamp = nullptr;  // Parameters for instantiations
     string m_instModule;  // Name of module referenced for instantiations
@@ -93,10 +92,9 @@ public:
     VLifetime m_varLifetime;  // Static/Automatic for next signal
     bool m_impliedDecl = false;  // Allow implied wire declarations
     bool m_varDeclTyped = false;  // Var got reg/wire for dedup check
-    bool m_pinAnsi = false;  // In ANSI port list
+    bool m_pinAnsi = false;  // In ANSI parameter or port list
     bool m_tracingParse = true;  // Tracing disable for parser
     bool m_inImplements = false;  // Is inside class implements list
-    bool m_insideClass = false;  // Is inside a class body
     bool m_insideProperty = false;  // Is inside property declaration
     bool m_typedPropertyPort = false;  // Typed property port occurred on port lists
     bool m_modportImpExpActive
@@ -317,14 +315,12 @@ int V3ParseGrammar::s_modTypeImpNum = 0;
 #define VARRESET_LIST(decl) \
     { \
         GRAMMARP->m_pinNum = 1; \
-        GRAMMARP->m_pinAnsi = false; \
         VARRESET(); \
         VARDECL(decl); \
     }  // Start of pinlist
 #define VARRESET_NONLIST(decl) \
     { \
         GRAMMARP->m_pinNum = 0; \
-        GRAMMARP->m_pinAnsi = false; \
         VARRESET(); \
         VARDECL(decl); \
     }  // Not in a pinlist
@@ -1209,11 +1205,14 @@ description:                    // ==IEEE: description
 
 timeunits_declaration<nodep>:   // ==IEEE: timeunits_declaration
                 yTIMEUNIT yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, GRAMMARP->m_modp, true, $2, false, 0); $$ = nullptr; }
+                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), true, $2, false, 0);
+                          $$ = nullptr; }
         |       yTIMEUNIT yaTIMENUM '/' yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, GRAMMARP->m_modp, true, $2, true, $4); $$ = nullptr; }
+                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), true, $2, true, $4);
+                          $$ = nullptr; }
         |       yTIMEPRECISION yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, GRAMMARP->m_modp, false, 0, true, $2); $$ = nullptr; }
+                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), false, 0, true, $2);
+                          $$ = nullptr; }
         ;
 
 //**********************************************************************
@@ -1223,7 +1222,6 @@ package_declaration:            // ==IEEE: package_declaration
                 packageFront package_itemListE yENDPACKAGE endLabelE
                         { $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));  // Stash for implicit wires, etc
                           if ($2) $1->addStmtsp($2);
-                          GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
@@ -1243,8 +1241,7 @@ packageFront<nodeModulep>:
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
                           PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$);
-                          GRAMMARP->m_modp = $$; }
+                          SYMP->pushNew($$); }
         ;
 
 package_itemListE<nodep>:       // IEEE: [{ package_item }]
@@ -1343,7 +1340,6 @@ module_declaration:             // ==IEEE: module_declaration
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
-                          GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
         |       udpFront portsStarE ';'
@@ -1352,7 +1348,6 @@ module_declaration:             // ==IEEE: module_declaration
                           if ($2) $1->addStmtsp($2);
                           if ($4) $1->addStmtsp($4);
                           GRAMMARP->m_tracingParse = true;
-                          GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>6, $1, $6); }
         //
@@ -1371,8 +1366,7 @@ modFront<nodeModulep>:
                           $$->timeunit(PARSEP->timeLastUnit());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive());
                           PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$);
-                          GRAMMARP->m_modp = $$; }
+                          SYMP->pushNew($$); }
         |       modFront sigAttrScope                   { $$ = $1; }
         ;
 
@@ -1419,13 +1413,18 @@ parameter_value_assignmentClass<pinp>:  // IEEE: [ parameter_value_assignment ]
 
 parameter_port_listE<nodep>:    // IEEE: parameter_port_list + empty == parameter_value_assignment
                 /* empty */                             { $$ = nullptr; }
-        |       '#' '(' ')'                             { $$ = nullptr; }
+        |       '#' '(' ')'                             { $$ = nullptr;
+                                                          SYMP->findTopNodeModule($<fl>1)->hasParameterList(true); }
         //                      // IEEE: '#' '(' list_of_param_assignments { ',' parameter_port_declaration } ')'
         //                      // IEEE: '#' '(' parameter_port_declaration { ',' parameter_port_declaration } ')'
         //                      // Can't just do that as "," conflicts with between vars and between stmts, so
         //                      // split into pre-comma and post-comma parts
-        |       '#' '(' {VARRESET_LIST(GPARAM);} paramPortDeclOrArgList ')'
-                        { $$ = $4; VARRESET_NONLIST(UNKNOWN); }
+        |       '#' '('                                 { VARRESET_LIST(GPARAM);
+                                                          SYMP->findTopNodeModule($<fl>1)->hasParameterList(true);
+                                                          GRAMMARP->m_pinAnsi = true; }
+        /*cont*/    paramPortDeclOrArgList ')'          { $$ = $4;
+                                                          VARRESET_NONLIST(UNKNOWN);
+                                                          GRAMMARP->m_pinAnsi = false; }
         //                      // Note legal to start with "a=b" with no parameter statement
         ;
 
@@ -1451,7 +1450,10 @@ portsStarE<nodep>:              // IEEE: .* + list_of_ports + list_of_port_decla
         |       '(' ')'                                 { $$ = nullptr; }
         //                      // .* expanded from module_declaration
         //UNSUP '(' yP_DOTSTAR ')'                              { UNSUP }
-        |       '(' {VARRESET_LIST(PORT);} list_of_ports ')'    { $$ = $3; VARRESET_NONLIST(UNKNOWN); }
+        |       '('                                     { VARRESET_LIST(PORT);
+                                                          GRAMMARP->m_pinAnsi = true; }
+        /*cont*/    list_of_ports ')'                   { $$ = $3; VARRESET_NONLIST(UNKNOWN);
+                                                          GRAMMARP->m_pinAnsi = false; }
         ;
 
 list_of_portsE<nodep>:          // IEEE: list_of_ports + list_of_port_declarations
@@ -1596,7 +1598,7 @@ portDirNetE:                    // IEEE: part of port, optional net type and/or
         //                      // The higher level rule may override this VARDTYPE with one later in the parse.
         |       port_direction                                  { VARDECL(PORT); VARDTYPE_NDECL(nullptr); }
         |       port_direction { VARDECL(PORT); } net_type      { VARDTYPE_NDECL(nullptr); }  // net_type calls VARDECL
-        |       net_type                                        { VARDTYPE_NDECL(nullptr); } // net_type calls VARDECL
+        |       net_type                                        { VARDTYPE_NDECL(nullptr); }  // net_type calls VARDECL
         ;
 
 port_declNetE:                  // IEEE: part of port_declaration, optional net type
@@ -1706,7 +1708,6 @@ program_declaration:            // IEEE: program_declaration + program_nonansi_h
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
-                          GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
         |       yEXTERN pgmFront parameter_port_listE portsStarE ';'
@@ -1722,8 +1723,7 @@ pgmFront<nodeModulep>:
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
                           PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$);
-                          GRAMMARP->m_modp = $$; }
+                          SYMP->pushNew($$); }
         ;
 
 program_itemListE<nodep>:       // ==IEEE: [{ program_item }]
@@ -1958,23 +1958,19 @@ net_type:                       // ==IEEE: net_type
         ;
 
 varParamReset:
-                yPARAMETER
-                        { if (GRAMMARP->m_insideClass) {
-                             VARRESET_NONLIST(LPARAM);
-                          } else {
-                             VARRESET_NONLIST(GPARAM);
-                          } }
+                yPARAMETER                              { VARRESET_NONLIST(GPARAM); }
         |       yLOCALPARAM                             { VARRESET_NONLIST(LPARAM); }
+        // Note that the type of these params could be modified later according to context (see V3LinkParse)
         ;
 
 port_direction:                 // ==IEEE: port_direction + tf_port_direction
         //                      // IEEE 19.8 just "input" FIRST forces type to wire - we'll ignore that here
         //                      // Only used for ANSI declarations
-                yINPUT                                  { GRAMMARP->m_pinAnsi = true; VARIO(INPUT); }
-        |       yOUTPUT                                 { GRAMMARP->m_pinAnsi = true; VARIO(OUTPUT); }
-        |       yINOUT                                  { GRAMMARP->m_pinAnsi = true; VARIO(INOUT); }
-        |       yREF                                    { GRAMMARP->m_pinAnsi = true; VARIO(REF); }
-        |       yCONST__REF yREF                        { GRAMMARP->m_pinAnsi = true; VARIO(CONSTREF); }
+                yINPUT                                  { VARIO(INPUT); }
+        |       yOUTPUT                                 { VARIO(OUTPUT); }
+        |       yINOUT                                  { VARIO(INOUT); }
+        |       yREF                                    { VARIO(REF); }
+        |       yCONST__REF yREF                        { VARIO(CONSTREF); }
         ;
 
 port_directionReset:            // IEEE: port_direction that starts a port_declaraiton
@@ -5960,12 +5956,12 @@ property_port_itemAssignment<nodep>:  // IEEE: part of property_port_item/sequen
 
 property_port_itemDirE:
                 /* empty */
-                        { GRAMMARP->m_pinAnsi = true; VARIO(INPUT); }
+                        { VARIO(INPUT); }
         |       yLOCAL__ETC
-                        { GRAMMARP->m_pinAnsi = true; VARIO(INPUT);
+                        { VARIO(INPUT);
                           BBUNSUP($1, "Unsupported: property port 'local'"); }
         |       yLOCAL__ETC yINPUT
-                        { GRAMMARP->m_pinAnsi = true; VARIO(INPUT);
+                        { VARIO(INPUT);
                           BBUNSUP($1, "Unsupported: property port 'local'"); }
         ;
 
@@ -6743,7 +6739,6 @@ checker_declaration<nodep>:  // ==IEEE: part of checker_declaration
                           $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));
                           if ($2) $1->addStmtsp($2);
                           if ($4) $1->addStmtsp($4);
-                          GRAMMARP->m_modp = nullptr;
                           SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>6, $1, $6); }
         ;
@@ -6756,8 +6751,7 @@ checkerFront<nodeModulep>:  // IEEE: part of checker_declaration
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive());
-                          SYMP->pushNew($$);
-                          GRAMMARP->m_modp = $$; }
+                          SYMP->pushNew($$); }
         ;
 
 checker_port_listE<nodep>:  // IEEE: [ ( [ checker_port_list ] ) ]
@@ -6833,7 +6827,6 @@ class_declaration<nodep>:       // ==IEEE: part of class_declaration
                 classFront parameter_port_listE classExtendsE classImplementsE ';'
         /*mid*/         { // Allow resolving types declared in base extends class
                           if ($<scp>3) SYMP->importExtends($<scp>3);
-                          GRAMMARP->m_insideClass = true;
                         }
         /*cont*/    class_itemListE yENDCLASS endLabelE
                         { $$ = $1; $1->addMembersp($2);
@@ -6842,7 +6835,6 @@ class_declaration<nodep>:       // ==IEEE: part of class_declaration
                           $1->addExtendsp($4);
                           $1->addMembersp($7);
                           SYMP->popScope($$);
-                          GRAMMARP->m_insideClass = false;
                           GRAMMARP->endLabel($<fl>9, $1, $9); }
         ;
 
diff --git a/test_regress/t/t_param_implicit_local_bad.out b/test_regress/t/t_param_implicit_local_bad.out
new file mode 100644
index 000000000..ef6479300
--- /dev/null
+++ b/test_regress/t/t_param_implicit_local_bad.out
@@ -0,0 +1,23 @@
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:15:20: Parameter pin not found: '__paramNumber2'
+   15 |     NestedCls #(1, 2) cls;
+      |                    ^
+                    ... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:17:21: Parameter pin not found: '__paramNumber3'
+   17 |     mod1  # ( 3, 4, 5 )   i_mod1 ();
+      |                     ^
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:15: Parameter pin not found: '__paramNumber1'
+   19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
+      |               ^
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:18: Parameter pin not found: '__paramNumber2'
+   19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
+      |                  ^~
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:22: Parameter pin not found: '__paramNumber3'
+   19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
+      |                      ^~
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:20:22: Parameter pin not found: '__paramNumber3'
+   20 |     intf1 # ( 8, 15, 17 ) i_intf1 ();
+      |                      ^~
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:21:22: Parameter pin not found: '__paramNumber3'
+   21 |     prgm1 # ( 9, 40, 41 ) i_prgm1 ();
+      |                      ^~
+%Error: Exiting due to
diff --git a/test_regress/t/t_param_implicit_local_bad.pl b/test_regress/t/t_param_implicit_local_bad.pl
new file mode 100755
index 000000000..a60503a1f
--- /dev/null
+++ b/test_regress/t/t_param_implicit_local_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_param_implicit_local_bad.v b/test_regress/t/t_param_implicit_local_bad.v
new file mode 100644
index 000000000..a6252f77d
--- /dev/null
+++ b/test_regress/t/t_param_implicit_local_bad.v
@@ -0,0 +1,55 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+
+module t;
+    class NestedCls #(
+        parameter A = 0
+    );
+        parameter B = 0;
+    endclass
+
+    NestedCls #(1, 2) cls;
+
+    mod1  # ( 3, 4, 5 )   i_mod1 ();
+    mod2  # ( 5, 12, 13 ) i_mod2 ();
+    mod3  # ( 7, 24, 25 ) i_mod3 ();
+    intf1 # ( 8, 15, 17 ) i_intf1 ();
+    prgm1 # ( 9, 40, 41 ) i_prgm1 ();
+endmodule
+
+`define CHECK_PARAMS  if (A**2 + B**2 != C**2) $error("A**2 + B**2 != C**2")
+
+module mod1 # (
+    parameter A = 1, B = 1
+);
+    parameter C = 1;
+    `CHECK_PARAMS;
+endmodule
+
+module mod2 ();
+    parameter A = 1, B = 1, C = 1;
+    `CHECK_PARAMS;
+endmodule
+
+module mod3 #() ();
+    parameter A = 1, B = 1, C = 1;
+    `CHECK_PARAMS;
+endmodule
+
+interface intf1 # (
+    parameter A = 1, B = 1
+);
+    parameter C = 1;
+    `CHECK_PARAMS;
+endinterface
+
+program prgm1 # (
+    parameter A = 1, B = 1
+);
+    parameter C = 1;
+    `CHECK_PARAMS;
+endprogram
diff --git a/test_regress/t/t_param_named.v b/test_regress/t/t_param_named.v
index 633b6a220..523b65138 100644
--- a/test_regress/t/t_param_named.v
+++ b/test_regress/t/t_param_named.v
@@ -11,10 +11,7 @@ module t (/*AUTOARG*/
    parameter PAR = 3;
    input clk;
 
-`ifdef verilator
-   // Else it becomes a localparam, per IEEE 4.10.1, but we don't check it
    defparam m3.FROMDEFP = 19;
-`endif
 
    m3 #(.P3(PAR),
         .P2(2))
@@ -36,7 +33,8 @@ module m3
     parameter  UNCH = 99,
     parameter  P1 = 10,
     parameter  P2 = 20,
-               P3 = 30
+               P3 = 30,
+    parameter  FROMDEFP = 11
     )
     (/*AUTOARG*/
      // Inputs
@@ -45,8 +43,6 @@ module m3
    input       clk;
    localparam  LOC = 13;
 
-   parameter   FROMDEFP = 11;
-
    initial begin
       $display("%x %x %x",P1,P2,P3);
    end
@@ -55,8 +51,6 @@ module m3
       if (P1 !== 10) $stop;
       if (P2 !== 2) $stop;
       if (P3 !== 3) $stop;
-`ifdef verilator
       if (FROMDEFP !== 19) $stop;
-`endif
    end
 endmodule

From d2c72a7f21cdbdcf5464bbb9c735ce6f49df0d44 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 25 Sep 2023 12:30:25 -0400
Subject: [PATCH 022/157] CI: Disable m32 runs

---
 .github/workflows/build.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 2ef21b11c..ee8fc9162 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -108,7 +108,7 @@ jobs:
         compiler:
           - { cc: clang, cxx: clang++ }
           - { cc: gcc,   cxx: g++     }
-        m32: [0, 1]
+        m32: [0]
         suite: [dist-vlt-0, dist-vlt-1, dist-vlt-2, vltmt-0, vltmt-1]
         exclude:
           # Build pull requests only with ubuntu-22.04 and without m32

From be45a9b7d50baef222ac388feb222fbb359829ad Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Wed, 27 Sep 2023 03:05:57 +0800
Subject: [PATCH 023/157] Style: Update clang-format config to make formatted
 code consistent between versions. No functional change (#4520)

---
 .clang-format                         |  3 +++
 include/verilated_funcs.h             |  4 ++--
 src/V3Number.cpp                      |  6 ++----
 test_regress/t/t_dpi_qw_c.cpp         |  2 +-
 test_regress/t/t_dpi_var.cpp          |  2 +-
 test_regress/t/t_mem_multi_io2.cpp    |  2 +-
 test_regress/t/t_trace_two_cc.cpp     |  2 +-
 test_regress/t/t_var_sc_bv.cpp        | 17 ++++++++---------
 test_regress/t/t_vpi_time_cb.cpp      |  2 --
 test_regress/t/t_vpi_zero_time_cb.cpp |  2 +-
 10 files changed, 20 insertions(+), 22 deletions(-)

diff --git a/.clang-format b/.clang-format
index 39b753e7a..3e8142bf7 100644
--- a/.clang-format
+++ b/.clang-format
@@ -112,6 +112,9 @@ SpacesBeforeTrailingComments: 2
 SpacesInAngles:  false
 SpacesInContainerLiterals: true
 SpacesInCStyleCastParentheses: false
+SpacesInLineCommentPrefix:
+  Minimum: 0
+  Maximum: -1
 SpacesInParentheses: false
 SpacesInSquareBrackets: false
 Standard:        Cpp11
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index a33b9023b..32ab2268e 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -344,8 +344,8 @@ uint64_t vl_time_pow10(int n) VL_PURE;
 
 // Output clean
 // EMIT_RULE: VL_CLEAN:  oclean=clean; obits=lbits;
-#define VL_CLEAN_II(obits, lbits, lhs) ((lhs)&VL_MASK_I(obits))
-#define VL_CLEAN_QQ(obits, lbits, lhs) ((lhs)&VL_MASK_Q(obits))
+#define VL_CLEAN_II(obits, lbits, lhs) ((lhs) & (VL_MASK_I(obits)))
+#define VL_CLEAN_QQ(obits, lbits, lhs) ((lhs) & (VL_MASK_Q(obits)))
 
 // EMIT_RULE: VL_ASSIGNCLEAN:  oclean=clean; obits==lbits;
 #define VL_ASSIGNCLEAN_W(obits, owp, lwp) VL_CLEAN_WW((obits), (owp), (lwp))
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 38e7de3a2..702c4c1ca 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -314,8 +314,7 @@ void V3Number::create(const char* sourcep) {
 
             case 'o':
             case 'c': {
-                switch (std::tolower(*cp)) {
-                // clang-format off
+                switch (std::tolower(*cp)) {  // clang-format off
                 case '0': setBit(obit++, 0); setBit(obit++, 0);  setBit(obit++, 0);  break;
                 case '1': setBit(obit++, 1); setBit(obit++, 0);  setBit(obit++, 0);  break;
                 case '2': setBit(obit++, 0); setBit(obit++, 1);  setBit(obit++, 0);  break;
@@ -335,8 +334,7 @@ void V3Number::create(const char* sourcep) {
             }
 
             case 'h': {
-                switch (std::tolower(*cp)) {
-                    // clang-format off
+                switch (std::tolower(*cp)) {  // clang-format off
                 case '0': setBit(obit++,0); setBit(obit++,0); setBit(obit++,0); setBit(obit++,0); break;
                 case '1': setBit(obit++,1); setBit(obit++,0); setBit(obit++,0); setBit(obit++,0); break;
                 case '2': setBit(obit++,0); setBit(obit++,1); setBit(obit++,0); setBit(obit++,0); break;
diff --git a/test_regress/t/t_dpi_qw_c.cpp b/test_regress/t/t_dpi_qw_c.cpp
index 7a18e6b83..751e1c331 100644
--- a/test_regress/t/t_dpi_qw_c.cpp
+++ b/test_regress/t/t_dpi_qw_c.cpp
@@ -33,7 +33,7 @@ void poke_value(int i) {
     const char* const scopeNamep = svGetNameFromScope(svGetScope());
     printf("svGetNameFromScope=\"%s\"\n", scopeNamep);
 
-// clang-format off
+    // clang-format off
 #ifdef VERILATOR
     static int didDump = 0;
     if (didDump++ == 0) {
diff --git a/test_regress/t/t_dpi_var.cpp b/test_regress/t/t_dpi_var.cpp
index eac0571fe..13c3020e0 100644
--- a/test_regress/t/t_dpi_var.cpp
+++ b/test_regress/t/t_dpi_var.cpp
@@ -121,7 +121,7 @@ int main(int argc, char** argv) {
                                                         // Note null name - we're flattening it out
                                                         ""}};
 
-// clang-format off
+    // clang-format off
 #ifdef VERILATOR
 # ifdef TEST_VERBOSE
     contextp->scopesDump();
diff --git a/test_regress/t/t_mem_multi_io2.cpp b/test_regress/t/t_mem_multi_io2.cpp
index 14e71c1a4..24269b14c 100644
--- a/test_regress/t/t_mem_multi_io2.cpp
+++ b/test_regress/t/t_mem_multi_io2.cpp
@@ -48,7 +48,7 @@ int main()
 #endif
 
     // loop through every possibility and check the result
-// clang-format off
+    // clang-format off
 #ifdef SYSTEMC_VERSION
     sc_start(1, SC_NS);
 # define ASSIGN(s, v) s.write(v)
diff --git a/test_regress/t/t_trace_two_cc.cpp b/test_regress/t/t_trace_two_cc.cpp
index 92d9d33f9..46ad12913 100644
--- a/test_regress/t/t_trace_two_cc.cpp
+++ b/test_regress/t/t_trace_two_cc.cpp
@@ -37,7 +37,7 @@ int main(int argc, char** argv) {
     ap = new VM_PREFIX{contextp.get(), "topa"};
     bp = new Vt_trace_two_b{contextp.get(), "topb"};
 
-// clang-format off
+    // clang-format off
 #ifdef TEST_HDR_TRACE
     contextp->traceEverOn(true);
 # ifdef TEST_FST
diff --git a/test_regress/t/t_var_sc_bv.cpp b/test_regress/t/t_var_sc_bv.cpp
index 306810635..cb0b93ed2 100644
--- a/test_regress/t/t_var_sc_bv.cpp
+++ b/test_regress/t/t_var_sc_bv.cpp
@@ -108,21 +108,20 @@ int main()
 
 #endif
 
-// clang-format off
 #ifdef SYSTEMC_VERSION
     sc_start(1, SC_NS);
 #else
     tb->eval();
 #endif
     // This testcase is testing multi-thread safe VL_ASSIGN_SBW and VL_ASSIGN_WSB macros.
-    // Testbench is assigning different number of bits from VlWide input_var variable to different inputs.
-    // Values around multiple of 30 (i.e. BITS_PER_DIGIT defined in SystemC sc_nbdefs.h) are tested with the special care, since
-    // it is the value by which the data_ptr of sc_biguint underlying data type is increased by (and not expected 32, as width of uint32_t).
-    // Correctness of the output is compared against the 'old' macro, which is correct but has multi-threaded issue since it's using range function.
-    // Second part is testing VL_ASSIGN_WSB in a reverse way, it is reading signals from the previous test,
-    // and comparing the output with (fraction) of VlWide input_var variable.
-
-    // clang-format on
+    // Testbench is assigning different number of bits from VlWide input_var variable to different
+    // inputs. Values around multiple of 30 (i.e. BITS_PER_DIGIT defined in SystemC sc_nbdefs.h)
+    // are tested with the special care, since it is the value by which the data_ptr of sc_biguint
+    // underlying data type is increased by (and not expected 32, as width of uint32_t).
+    // Correctness of the output is compared against the 'old' macro, which is correct but has
+    // multi-threaded issue since it's using range function. Second part is testing VL_ASSIGN_WSB
+    // in a reverse way, it is reading signals from the previous test, and comparing the output
+    // with (fraction) of VlWide input_var variable.
     VL_ASSIGN_SBW(29, i_29_s, input_var);
     VL_ASSIGN_SBW_MT_ISSUE(29, i_29_old_s, input_var);
     VL_ASSIGN_SBW(30, i_30_s, input_var);
diff --git a/test_regress/t/t_vpi_time_cb.cpp b/test_regress/t/t_vpi_time_cb.cpp
index b26a1fb1f..8bc06e2f1 100644
--- a/test_regress/t/t_vpi_time_cb.cpp
+++ b/test_regress/t/t_vpi_time_cb.cpp
@@ -35,11 +35,9 @@ int main(int argc, char** argv) {
                                                         // Note null name - we're flattening it out
                                                         ""}};
 
-// clang-format off
 #ifdef TEST_VERBOSE
     contextp->scopesDump();
 #endif
-    // clang-format on
 
 #if VM_TRACE
     contextp->traceEverOn(true);
diff --git a/test_regress/t/t_vpi_zero_time_cb.cpp b/test_regress/t/t_vpi_zero_time_cb.cpp
index e94e11164..32cf2fe6a 100644
--- a/test_regress/t/t_vpi_zero_time_cb.cpp
+++ b/test_regress/t/t_vpi_zero_time_cb.cpp
@@ -116,7 +116,7 @@ int main(int argc, char** argv) {
                                                         // Note null name - we're flattening it out
                                                         ""}};
 
-// clang-format off
+    // clang-format off
 #ifdef VERILATOR
 # ifdef TEST_VERBOSE
     contextp->scopesDump();

From 229ce1aecf8c54c3d107fee26eab96f1251962ec Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Wed, 27 Sep 2023 03:42:15 +0800
Subject: [PATCH 024/157] Fix handling input file path separator (#4515)
 (#4516)

---
 src/V3EmitCFunc.h                |   2 +-
 src/V3EmitCMake.cpp              |  25 ++++----
 src/V3EmitMk.cpp                 |   5 +-
 src/V3Error.cpp                  |  10 +---
 src/V3File.cpp                   |   2 +-
 src/V3FileLine.cpp               | 100 +++++++++++++++----------------
 src/V3Options.cpp                |  66 ++++++++++----------
 src/V3Os.cpp                     |  75 ++++++++++++++++++++---
 src/V3Os.h                       |  29 +++++----
 src/V3ParseGrammar.cpp           |  64 ++------------------
 src/V3PreProc.cpp                |   2 +-
 src/V3Sched.cpp                  |   3 +-
 src/V3String.cpp                 |  65 ++++++++++++++++++++
 src/V3String.h                   |   3 +
 src/Verilator.cpp                |   3 +-
 src/verilog.y                    |   8 +--
 test_regress/t/t_pp_line.out     |  16 +++++
 test_regress/t/t_pp_line.pl      |  18 ++++++
 test_regress/t/t_pp_line.v       |  15 +++++
 test_regress/t/t_pp_line_bad.out |  19 ++++--
 test_regress/t/t_pp_line_bad.pl  |   3 +-
 test_regress/t/t_pp_line_bad.v   |   8 ++-
 22 files changed, 335 insertions(+), 206 deletions(-)
 create mode 100644 test_regress/t/t_pp_line.out
 create mode 100755 test_regress/t/t_pp_line.pl
 create mode 100644 test_regress/t/t_pp_line.v

diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 8dbe3ca70..f9b3bd3d6 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -636,7 +636,7 @@ public:
                 puts("vlSymsp->_traceDumpOpen();\n");
             } else {
                 puts("VL_PRINTF_MT(\"-Info: ");
-                puts(protect(nodep->fileline()->filename()));
+                puts(V3OutFormatter::quoteNameControls(protect(nodep->fileline()->filename())));
                 puts(":");
                 puts(cvtToStr(nodep->fileline()->lineno()));
                 puts(": $dumpvar ignored, as Verilated without --trace");
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index 6598da9a8..bd065144d 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -43,15 +43,11 @@ class CMakeEmitter final {
     template <typename List>
     static string cmake_list(const List& strs) {
         string s;
-        if (strs.begin() != strs.end()) {
-            s.append("\"");
-            s.append(VString::quoteAny(*strs.begin(), '"', '\\'));
-            s.append("\"");
-            for (typename List::const_iterator it = ++strs.begin(); it != strs.end(); ++it) {
-                s.append(" \"");
-                s.append(VString::quoteAny(*it, '"', '\\'));
-                s.append("\"");
-            }
+        for (auto it = strs.begin(); it != strs.end(); ++it) {
+            s += '"';
+            s += V3OutFormatter::quoteNameControls(*it);
+            s += '"';
+            if (it != strs.end()) s += ' ';
         }
         return s;
     }
@@ -63,13 +59,13 @@ class CMakeEmitter final {
     static void cmake_set_raw(std::ofstream& of, const string& name, const string& raw_value,
                               const string& cache_type = "", const string& docstring = "") {
         of << "set(" << name << " " << raw_value;
-        if (!cache_type.empty()) of << " CACHE " << cache_type << " \"" << docstring << "\"";
+        if (!cache_type.empty()) of << " CACHE " << cache_type << " \"" << docstring << '"';
         of << ")\n";
     }
 
     static void cmake_set(std::ofstream& of, const string& name, const string& value,
                           const string& cache_type = "", const string& docstring = "") {
-        const string raw_value = "\"" + value + "\"";
+        const string raw_value = '"' + value + '"';
         cmake_set_raw(of, name, raw_value, cache_type, docstring);
     }
 
@@ -88,9 +84,10 @@ class CMakeEmitter final {
         *of << "# which becomes available after executing `find_package(verilator).\n";
 
         *of << "\n### Constants...\n";
-        cmake_set(*of, "PERL", V3Options::getenvPERL(), "FILEPATH",
-                  "Perl executable (from $PERL)");
-        cmake_set(*of, "VERILATOR_ROOT", V3Options::getenvVERILATOR_ROOT(), "PATH",
+        cmake_set(*of, "PERL", V3OutFormatter::quoteNameControls(V3Options::getenvPERL()),
+                  "FILEPATH", "Perl executable (from $PERL)");
+        cmake_set(*of, "VERILATOR_ROOT",
+                  V3OutFormatter::quoteNameControls(V3Options::getenvVERILATOR_ROOT()), "PATH",
                   "Path to Verilator kit (from $VERILATOR_ROOT)");
 
         *of << "\n### Compiler flags...\n";
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 3f38e5119..bdf088c6a 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -154,9 +154,10 @@ public:
         }
         of.puts("\n### Constants...\n");
         of.puts("# Perl executable (from $PERL)\n");
-        of.puts("PERL = " + V3Options::getenvPERL() + "\n");
+        of.puts("PERL = " + V3OutFormatter::quoteNameControls(V3Options::getenvPERL()) + "\n");
         of.puts("# Path to Verilator kit (from $VERILATOR_ROOT)\n");
-        of.puts("VERILATOR_ROOT = " + V3Options::getenvVERILATOR_ROOT() + "\n");
+        of.puts("VERILATOR_ROOT = "
+                + V3OutFormatter::quoteNameControls(V3Options::getenvVERILATOR_ROOT()) + "\n");
         of.puts("# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)\n");
         of.puts(string{"SYSTEMC_INCLUDE ?= "} + V3Options::getenvSYSTEMC_INCLUDE() + "\n");
         of.puts("# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)\n");
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 5d915f9c5..1194cd7e3 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -16,6 +16,7 @@
 
 // clang-format off
 #include "V3Error.h"
+#include "V3Os.h"
 #ifndef V3ERROR_NO_GLOBAL_
 # include "V3Ast.h"
 # include "V3Global.h"
@@ -262,13 +263,8 @@ void V3Error::init() {
 
 string V3Error::lineStr(const char* filename, int lineno) VL_PURE {
     std::ostringstream out;
-    const char* const fnslashp = std::strrchr(filename, '/');
-    if (fnslashp) filename = fnslashp + 1;
-    out << filename << ":" << std::dec << lineno << ":";
-    const char* const spaces = "                    ";
-    size_t numsp = out.str().length();
-    if (numsp > 20) numsp = 20;
-    out << (spaces + numsp);
+    out << V3Os::filenameNonDir(filename) << ":" << std::dec << lineno << ":";
+    out << std::string(std::max<int>(0, 20 - static_cast<int>(out.str().length())), ' ');
     return out.str();
 }
 
diff --git a/src/V3File.cpp b/src/V3File.cpp
index 157e8d028..7a669f30d 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -859,7 +859,7 @@ void V3OutFormatter::putcNoTracking(char chr) {
 string V3OutFormatter::quoteNameControls(const string& namein,
                                          V3OutFormatter::Language lang) VL_PURE {
     // Encode control chars into output-appropriate escapes
-    // Reverse is V3Parse::deQuote
+    // Reverse is VString::unquoteSVString
     string out;
     if (lang == LA_XML) {
         // Encode chars into XML string
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index e97db97b2..a8bf044a6 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -203,63 +203,62 @@ string FileLine::xmlDetailedLocation() const {
 }
 
 string FileLine::lineDirectiveStrg(int enterExit) const {
-    return std::string{"`line "} + cvtToStr(lastLineno()) + " \"" + filename() + "\" "
-           + cvtToStr(enterExit) + "\n";
+    return std::string{"`line "} + cvtToStr(lastLineno()) + " \""
+           + V3OutFormatter::quoteNameControls(filename()) + "\" " + cvtToStr(enterExit) + "\n";
 }
 
 void FileLine::lineDirective(const char* textp, int& enterExitRef) {
     // Handle `line directive
     // Does not parse streamNumber/streamLineno as the next input token
     // will come from the same stream as the previous line.
+    do {
+        int lineNo;
+        // Skip `line
+        while (*textp && std::isspace(*textp)) ++textp;
+        while (*textp && !std::isspace(*textp)) ++textp;
+        while (*textp && std::isspace(*textp)) ++textp;
 
-    // Skip `line
-    while (*textp && std::isspace(*textp)) ++textp;
-    while (*textp && !std::isspace(*textp)) ++textp;
-    while (*textp && (std::isspace(*textp) || *textp == '"')) ++textp;
+        // Grab linenumber
+        const char* const ln = textp;
+        while (*textp && !std::isspace(*textp)) ++textp;
+        if (0 == strncmp(ln, "`__LINE__", textp - ln)) {
+            // Special case - see docs - don't change other than accounting for `line itself
+            lineNo = lineno() + 1;
+        } else if (std::isdigit(*ln)) {
+            lineNo = std::atoi(ln);
+        } else {
+            break;  // Fail
+        }
+        lineno(lineNo);
+        while (*textp && (std::isspace(*textp))) ++textp;
 
-    // Grab linenumber
-    bool fail = false;
-    const char* const ln = textp;
-    while (*textp && !std::isspace(*textp)) ++textp;
-    if (0 == strncmp(ln, "`__LINE__", strlen("`__LINE__"))) {
-        // Special case - see docs - don't change other than accounting for `line itself
-        lineno(lineno() + 1);
-    }
-    if (std::isdigit(*ln)) {
-        lineno(std::atoi(ln));
-    } else {
-        fail = true;
-    }
-    while (*textp && (std::isspace(*textp))) ++textp;
-    if (*textp != '"') fail = true;
-    while (*textp && (std::isspace(*textp) || *textp == '"')) ++textp;
+        // Grab filename
+        if (*textp != '"') break;  // Fail
+        const char* const fn = ++textp;
+        while (*textp && *textp != '"') ++textp;
+        if (*textp != '"') break;  // Fail
+        string errMsg;
+        const string& parsedFilename = VString::unquoteSVString(string{fn, textp}, errMsg);
+        if (!errMsg.empty()) this->v3error(errMsg.c_str());
+        filename(parsedFilename);
+        ++textp;
+        while (*textp && std::isspace(*textp)) ++textp;
 
-    // Grab filename
-    const char* const fn = textp;
-    while (*textp && !(std::isspace(*textp) || *textp == '"')) ++textp;
-    if (textp != fn) {
-        string strfn = fn;
-        strfn = strfn.substr(0, textp - fn);
-        filename(strfn);
-    } else {
-        fail = true;
-    }
+        // Grab level
+        if (!std::isdigit(*textp)) break;  // Fail
+        const int level = std::atoi(textp);
+        if (level < 0 || level >= 3) break;  // Fail
+        /// TODO: store lineno/filename only when the `line directive is valid
+        /// lineno(lineNo);
+        /// filename(filenameNew);
+        enterExitRef = level;
+        return;
+    } while (false);
 
-    // Grab level
-    while (*textp && (std::isspace(*textp) || *textp == '"')) ++textp;
-    if (std::isdigit(*textp)) {
-        enterExitRef = std::atoi(textp);
-        if (enterExitRef >= 3) fail = true;
-    } else {
-        enterExitRef = 0;
-        fail = true;
-    }
-
-    if (fail && v3Global.opt.pedantic()) {
-        v3error("`line was not properly formed with '`line number \"filename\" level'\n");
-    }
-
-    // printf ("PPLINE %d '%s'\n", s_lineno, s_filename.c_str());
+    // Fail
+    // TODO: show correct place of the code
+    v3error("`line was not properly formed with '`line number \"filename\" level'\n");
+    enterExitRef = 0;
 }
 
 void FileLine::forwardToken(const char* textp, size_t size, bool trackLines) {
@@ -293,12 +292,7 @@ FileLine* FileLine::copyOrSameFileLine() {
 
 string FileLine::filebasename() const VL_MT_SAFE { return V3Os::filenameNonDir(filename()); }
 
-string FileLine::filebasenameNoExt() const {
-    string name = filebasename();
-    string::size_type pos;
-    if ((pos = name.find('.')) != string::npos) name = name.substr(0, pos);
-    return name;
-}
+string FileLine::filebasenameNoExt() const { return V3Os::filenameNonDirExt(filename()); }
 
 string FileLine::firstColumnLetters() const VL_MT_SAFE {
     const char a = ((firstColumn() / 26) % 26) + 'a';
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 42e33a040..9b816f63d 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -81,19 +81,21 @@ public:
 
     // ACCESSOR METHODS
     void addIncDirUser(const string& incdir) {
-        const auto itFoundPair = m_incDirUserSet.insert(incdir);
+        const string& dir = V3Os::filenameCleanup(incdir);
+        const auto itFoundPair = m_incDirUserSet.insert(dir);
         if (itFoundPair.second) {
             // cppcheck-suppress stlFindInsert  // cppcheck 1.90 bug
-            m_incDirUsers.push_back(incdir);
-            m_incDirFallbacks.remove(incdir);  // User has priority over Fallback
-            m_incDirFallbackSet.erase(incdir);  // User has priority over Fallback
+            m_incDirUsers.push_back(dir);
+            m_incDirFallbacks.remove(dir);  // User has priority over Fallback
+            m_incDirFallbackSet.erase(dir);  // User has priority over Fallback
         }
     }
     void addIncDirFallback(const string& incdir) {
-        if (m_incDirUserSet.find(incdir)
+        const string& dir = V3Os::filenameCleanup(incdir);
+        if (m_incDirUserSet.find(dir)
             == m_incDirUserSet.end()) {  // User has priority over Fallback
-            const auto itFoundPair = m_incDirFallbackSet.insert(incdir);
-            if (itFoundPair.second) m_incDirFallbacks.push_back(incdir);
+            const auto itFoundPair = m_incDirFallbackSet.insert(dir);
+            if (itFoundPair.second) m_incDirFallbacks.push_back(dir);
         }
     }
     void addLangExt(const string& langext, const V3LangCode& lc) {
@@ -508,20 +510,16 @@ string V3Options::fileExists(const string& filename) {
         return "";  // Not found
     }
     // Check if it is a directory, ignore if so
-    string filenameOut = V3Os::filenameFromDirBase(dir, basename);
+    string filenameOut = V3Os::filenameJoin(dir, basename);
     if (!fileStatNormal(filenameOut)) return "";  // Directory
     return filenameOut;
 }
 
 string V3Options::filePathCheckOneDir(const string& modname, const string& dirname) {
     for (const string& i : m_impp->m_libExtVs) {
-        const string fn = V3Os::filenameFromDirBase(dirname, modname + i);
+        const string fn = V3Os::filenameJoin(dirname, modname + i);
         string exists = fileExists(fn);
-        if (exists != "") {
-            // Strip ./, it just looks ugly
-            if (exists.substr(0, 2) == "./") exists.erase(0, 2);
-            return exists;
-        }
+        if (exists != "") return exists;
     }
     return "";
 }
@@ -548,29 +546,30 @@ string V3Options::filePath(FileLine* fl, const string& modname, const string& la
     // Find a filename to read the specified module name,
     // using the incdir and libext's.
     // Return "" if not found.
-    if (!V3Os::filenameIsRel(modname)) {
-        // modname is an absolute path, so can find getStdPackagePath()
-        string exists = filePathCheckOneDir(modname, "");
+    const string filename = V3Os::filenameCleanup(modname);
+    if (!V3Os::filenameIsRel(filename)) {
+        // filename is an absolute path, so can find getStdPackagePath()
+        string exists = filePathCheckOneDir(filename, "");
         if (exists != "") return exists;
     }
     for (const string& dir : m_impp->m_incDirUsers) {
-        string exists = filePathCheckOneDir(modname, dir);
+        string exists = filePathCheckOneDir(filename, dir);
         if (exists != "") return exists;
     }
     for (const string& dir : m_impp->m_incDirFallbacks) {
-        string exists = filePathCheckOneDir(modname, dir);
+        string exists = filePathCheckOneDir(filename, dir);
         if (exists != "") return exists;
     }
 
     if (m_relativeIncludes) {
-        const string exists = filePathCheckOneDir(modname, lastpath);
+        const string exists = filePathCheckOneDir(filename, lastpath);
         if (exists != "") return V3Os::filenameRealPath(exists);
     }
 
     // Warn and return not found
     if (errmsg != "") {
-        fl->v3error(errmsg + modname);
-        filePathLookedMsg(fl, modname);
+        fl->v3error(errmsg + filename);
+        filePathLookedMsg(fl, filename);
     }
     return "";
 }
@@ -592,13 +591,13 @@ void V3Options::filePathLookedMsg(FileLine* fl, const string& modname) {
         std::cerr << V3Error::warnMoreStandalone() << "... Looked in:" << endl;
         for (const string& dir : m_impp->m_incDirUsers) {
             for (const string& ext : m_impp->m_libExtVs) {
-                const string fn = V3Os::filenameFromDirBase(dir, modname + ext);
+                const string fn = V3Os::filenameJoin(dir, modname + ext);
                 std::cerr << V3Error::warnMoreStandalone() << "     " << fn << endl;
             }
         }
         for (const string& dir : m_impp->m_incDirFallbacks) {
             for (const string& ext : m_impp->m_libExtVs) {
-                const string fn = V3Os::filenameFromDirBase(dir, modname + ext);
+                const string fn = V3Os::filenameJoin(dir, modname + ext);
                 std::cerr << V3Error::warnMoreStandalone() << "     " << fn << endl;
             }
         }
@@ -657,7 +656,7 @@ string V3Options::getenvMAKEFLAGS() {  //
 }
 
 string V3Options::getenvPERL() {  //
-    return V3Os::getenvStr("PERL", "perl");
+    return V3Os::filenameCleanup(V3Os::getenvStr("PERL", "perl"));
 }
 
 string V3Options::getenvSYSTEMC() {
@@ -669,7 +668,7 @@ string V3Options::getenvSYSTEMC() {
         var = defenv;
         V3Os::setenvStr("SYSTEMC", var, "Hardcoded at build time");
     }
-    return var;
+    return V3Os::filenameCleanup(var);
 }
 
 string V3Options::getenvSYSTEMC_ARCH() {
@@ -718,9 +717,9 @@ string V3Options::getenvSYSTEMC_INCLUDE() {
     }
     if (var == "") {
         const string sc = getenvSYSTEMC();
-        if (sc != "") var = sc + "/include";
+        if (sc != "") var = V3Os::filenameJoin(sc, "include");
     }
-    return var;
+    return V3Os::filenameCleanup(var);
 }
 
 string V3Options::getenvSYSTEMC_LIBDIR() {
@@ -735,9 +734,9 @@ string V3Options::getenvSYSTEMC_LIBDIR() {
     if (var == "") {
         const string sc = getenvSYSTEMC();
         const string arch = getenvSYSTEMC_ARCH();
-        if (sc != "" && arch != "") var = sc + "/lib-" + arch;
+        if (sc != "" && arch != "") var = V3Os::filenameJoin(sc, "lib-" + arch);
     }
-    return var;
+    return V3Os::filenameCleanup(var);
 }
 
 string V3Options::getenvVERILATOR_ROOT() {
@@ -750,11 +749,11 @@ string V3Options::getenvVERILATOR_ROOT() {
         V3Os::setenvStr("VERILATOR_ROOT", var, "Hardcoded at build time");
     }
     if (var == "") v3fatal("$VERILATOR_ROOT needs to be in environment\n");
-    return var;
+    return V3Os::filenameCleanup(var);
 }
 
 string V3Options::getStdPackagePath() {
-    return getenvVERILATOR_ROOT() + "/include/verilated_std.sv";
+    return V3Os::filenameJoin(getenvVERILATOR_ROOT(), "include", "verilated_std.sv");
 }
 
 string V3Options::getSupported(const string& var) {
@@ -1890,7 +1889,8 @@ void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) VL
 
 string V3Options::parseFileArg(const string& optdir, const string& relfilename) {
     string filename = V3Os::filenameSubstitute(relfilename);
-    if (optdir != "." && V3Os::filenameIsRel(filename)) filename = optdir + "/" + filename;
+    if (optdir != "." && V3Os::filenameIsRel(filename))
+        filename = V3Os::filenameJoin(optdir, filename);
     return filename;
 }
 
diff --git a/src/V3Os.cpp b/src/V3Os.cpp
index 01d9db383..8763725c1 100644
--- a/src/V3Os.cpp
+++ b/src/V3Os.cpp
@@ -124,15 +124,46 @@ void V3Os::setenvStr(const string& envvar, const string& value, const string& wh
 //######################################################################
 // Generic filename utilities
 
-static bool isSlash(char ch) VL_PURE { return ch == '/' || ch == '\\'; }
+#if defined(_WIN32) || defined(__MINGW32__)
+static constexpr char V3OS_SLASH = '\\';
+#else
+static constexpr char V3OS_SLASH = '/';
+#endif
 
-string V3Os::filenameFromDirBase(const string& dir, const string& basename) VL_PURE {
-    // Don't return ./{filename} because if filename was absolute, that makes it relative
-    if (dir.empty() || dir == ".") {
-        return basename;
-    } else {
-        return dir + "/" + basename;
+static bool isSlash(char ch) VL_PURE {
+#if defined(_WIN32) || defined(__MINGW32__)
+    return ch == '/' || ch == '\\';
+#else
+    return ch == '/';
+#endif
+}
+
+string V3Os::filenameCleanup(const string& filename) VL_PURE {
+    string str;
+    str.reserve(filename.length());
+    bool lastIsSlash = false;
+    for (const char ch : filename) {
+        const bool lastIsSlashOld = lastIsSlash;
+        lastIsSlash = isSlash(ch);
+        if (lastIsSlash && lastIsSlashOld) continue;
+        str += ch;
     }
+    if (str.size() > 1 && isSlash(str.back())) str.pop_back();
+    while (str.size() > 2 && str[0] == '.' && isSlash(str[1])) str.erase(0, 2);
+    return str;
+}
+
+string V3Os::filenameJoin(std::initializer_list<const std::string> paths) VL_PURE {
+    string fullpath;
+    for (const auto& item : paths) {
+        if (item.empty() || item == ".") {
+            continue;
+        } else {
+            if (!fullpath.empty()) fullpath += V3OS_SLASH;
+            fullpath += item;
+        }
+    }
+    return fullpath;
 }
 
 string V3Os::filenameDir(const string& filename) VL_PURE {
@@ -144,7 +175,7 @@ string V3Os::filenameDir(const string& filename) VL_PURE {
     if (it.base() == filename.begin()) {
         return ".";
     } else {
-        return {filename.begin(), (++it).base()};
+        return string{filename.begin(), (++it).base()};
     }
 }
 
@@ -164,6 +195,10 @@ string V3Os::filenameNonExt(const string& filename) VL_PURE {
     return base;
 }
 
+string V3Os::filenameNonDirExt(const string& filename) VL_PURE {
+    return filenameNonExt(filenameNonDir(filename));
+}
+
 string V3Os::filenameSubstitute(const string& filename) {
     string result;
     // cppcheck-has-bug-suppress unusedLabel
@@ -392,3 +427,27 @@ int V3Os::system(const string& command) {
         return exit_code;
     }
 }
+
+void V3Os::selfTest() {
+#ifdef VL_DEBUG
+    UASSERT_SELFTEST(string, filenameCleanup(""), "");
+    UASSERT_SELFTEST(string, filenameCleanup("."), ".");
+    UASSERT_SELFTEST(string, filenameCleanup(".."), "..");
+    UASSERT_SELFTEST(string, filenameCleanup("/"), "/");
+    UASSERT_SELFTEST(string, filenameCleanup("../"), "..");
+    UASSERT_SELFTEST(string, filenameCleanup("//"), "/");
+    UASSERT_SELFTEST(string, filenameCleanup("//."), "/.");
+    UASSERT_SELFTEST(string, filenameCleanup("./"), ".");
+    UASSERT_SELFTEST(string, filenameCleanup("././"), ".");
+    UASSERT_SELFTEST(string, filenameCleanup(".///"), ".");
+    UASSERT_SELFTEST(string, filenameCleanup("a"), "a");
+    UASSERT_SELFTEST(string, filenameCleanup("a/"), "a");
+    UASSERT_SELFTEST(string, filenameCleanup("a/b"), "a/b");
+    UASSERT_SELFTEST(string, filenameCleanup("././//./a/b"), "a/b");
+    UASSERT_SELFTEST(string, filenameCleanup(".//./a///"), "a");
+    UASSERT_SELFTEST(string, filenameCleanup("///a/./b///."), "/a/./b/.");
+    UASSERT_SELFTEST(string, filenameCleanup("aaa/bbb/ccc/"), "aaa/bbb/ccc");
+    UASSERT_SELFTEST(string, filenameCleanup("./aaa/bbb/ccc/"), "aaa/bbb/ccc");
+    UASSERT_SELFTEST(string, filenameCleanup("../aaa/bbb/ccc/"), "../aaa/bbb/ccc");
+#endif
+}
diff --git a/src/V3Os.h b/src/V3Os.h
index da1bcb1d0..3bf69ca17 100644
--- a/src/V3Os.h
+++ b/src/V3Os.h
@@ -35,22 +35,28 @@ public:
     static void setenvStr(const string& envvar, const string& value, const string& why);
 
     // METHODS (generic filename utilities)
-    static string filenameFromDirBase(const string& dir, const string& basename) VL_PURE;
-    ///< Return non-directory part of filename
+    ///< @return concatenated path
+    static string filenameJoin(std::initializer_list<const std::string> paths) VL_PURE;
+    template <typename... Args>
+    static string filenameJoin(Args... args) VL_PURE {
+        return filenameJoin({args...});
+    };
+    ///< @return file path without repeated separators and ./ prefix
+    static string filenameCleanup(const string& filename) VL_PURE;
+    ///< @return non-directory part of filename
     static string filenameNonDir(const string& filename) VL_PURE;
-    ///< Return non-extensioned (no .) part of filename
+    ///< @return non-extensioned (no .) part of filename
     static string filenameNonExt(const string& filename) VL_PURE;
-    ///< Return basename of filename
-    static string filenameNonDirExt(const string& filename) VL_PURE {
-        return filenameNonExt(filenameNonDir(filename));
-    }
-    ///< Return directory part of filename
+    ///< @return basename of filename
+    static string filenameNonDirExt(const string& filename) VL_PURE;
+    ///< @return directory part of filename
     static string filenameDir(const string& filename) VL_PURE;
-    /// Return filename with env vars removed
+    ///< @return filename with env vars removed
     static string filenameSubstitute(const string& filename);
-    ///< Return realpath of filename
+    ///< @return realpath of filename
     static string filenameRealPath(const string& filename) VL_PURE;
-    static bool filenameIsRel(const string& filename) VL_PURE;  ///< True if relative
+    ///< @return filename is relative
+    static bool filenameIsRel(const string& filename) VL_PURE;
 
     // METHODS (file utilities)
     static string getline(std::istream& is, char delim = '\n');
@@ -72,6 +78,7 @@ public:
     // METHODS (sub command)
     /// Run system command, returns the exit code of the child process.
     static int system(const string& command);
+    static void selfTest();
 };
 
 #endif  // Guard
diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp
index 10be43782..384ec1ffa 100644
--- a/src/V3ParseGrammar.cpp
+++ b/src/V3ParseGrammar.cpp
@@ -251,63 +251,9 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
     return nodep;
 }
 
-string V3ParseGrammar::deQuote(FileLine* fileline, string text) {
-    // Fix up the quoted strings the user put in, for example "\"" becomes "
-    // Reverse is V3OutFormatter::quoteNameControls(...)
-    bool quoted = false;
-    string newtext;
-    unsigned char octal_val = 0;
-    int octal_digits = 0;
-    for (string::const_iterator cp = text.begin(); cp != text.end(); ++cp) {
-        if (quoted) {
-            if (std::isdigit(*cp)) {
-                octal_val = octal_val * 8 + (*cp - '0');
-                if (++octal_digits == 3) {
-                    octal_digits = 0;
-                    quoted = false;
-                    newtext += octal_val;
-                }
-            } else {
-                if (octal_digits) {
-                    // Spec allows 1-3 digits
-                    octal_digits = 0;
-                    quoted = false;
-                    newtext += octal_val;
-                    --cp;  // Backup to reprocess terminating character as non-escaped
-                    continue;
-                }
-                quoted = false;
-                if (*cp == 'n') {
-                    newtext += '\n';
-                } else if (*cp == 'a') {
-                    newtext += '\a';  // SystemVerilog 3.1
-                } else if (*cp == 'f') {
-                    newtext += '\f';  // SystemVerilog 3.1
-                } else if (*cp == 'r') {
-                    newtext += '\r';
-                } else if (*cp == 't') {
-                    newtext += '\t';
-                } else if (*cp == 'v') {
-                    newtext += '\v';  // SystemVerilog 3.1
-                } else if (*cp == 'x' && std::isxdigit(cp[1])
-                           && std::isxdigit(cp[2])) {  // SystemVerilog 3.1
-#define vl_decodexdigit(c) ((std::isdigit(c) ? ((c) - '0') : (std::tolower((c)) - 'a' + 10)))
-                    newtext
-                        += static_cast<char>(16 * vl_decodexdigit(cp[1]) + vl_decodexdigit(cp[2]));
-                    cp += 2;
-                } else if (std::isalnum(*cp)) {
-                    fileline->v3error("Unknown escape sequence: \\" << *cp);
-                    break;
-                } else {
-                    newtext += *cp;
-                }
-            }
-        } else if (*cp == '\\') {
-            quoted = true;
-            octal_digits = 0;
-        } else {
-            newtext += *cp;
-        }
-    }
-    return newtext;
+string V3ParseGrammar::unquoteString(FileLine* fileline, string text) {
+    string errMsg;
+    string res = VString::unquoteSVString(text, errMsg);
+    if (!errMsg.empty()) fileline->v3error(errMsg.c_str());
+    return res;
 }
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index 075d677d2..7769dd41a 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -358,7 +358,7 @@ string V3PreProcImp::removeDefines(const string& text) {
     string rtnsym = text;
     for (int loopprevent = 0; loopprevent < 100; loopprevent++) {
         string xsym = rtnsym;
-        if (xsym.substr(0, 1) == "`") xsym.replace(0, 1, "");
+        if (xsym[0] == '`') xsym.erase(0, 1);
         if (defExists(xsym)) {
             val = defValue(xsym);
             if (val != rtnsym) {
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 32386e38b..b3849955d 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -663,7 +663,8 @@ std::pair<AstVarScope*, AstNodeStmt*> makeEvalLoop(AstNetlist* netlistp, const s
                 newcallp->dtypeSetVoid();
                 blockp->addNodesp(newcallp->makeStmt());
                 add("#endif\n");
-                add("VL_FATAL_MT(\"" + file + "\", " + line + ", \"\", ");
+                add("VL_FATAL_MT(\"" + V3OutFormatter::quoteNameControls(file) + "\", " + line
+                    + ", \"\", ");
                 add("\"" + name + " region did not converge.\");\n");
             }
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 5ed5279e1..c23a15705 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -20,6 +20,7 @@
 #include "V3String.h"
 
 #include "V3Error.h"
+#include "V3FileLine.h"
 
 #ifndef V3ERROR_NO_GLOBAL_
 #include "V3Global.h"
@@ -130,6 +131,70 @@ string VString::escapeStringForPath(const string& str) {
     return result;
 }
 
+static int vl_decodexdigit(char c) {
+    return std::isdigit(c) ? c - '0' : std::tolower(c) - 'a' + 10;
+}
+
+string VString::unquoteSVString(const string& text, string& errOut) {
+    bool quoted = false;
+    string newtext;
+    newtext.reserve(text.size());
+    unsigned char octal_val = 0;
+    int octal_digits = 0;
+    for (string::const_iterator cp = text.begin(); cp != text.end(); ++cp) {
+        if (quoted) {
+            if (std::isdigit(*cp)) {
+                octal_val = octal_val * 8 + (*cp - '0');
+                if (++octal_digits == 3) {
+                    octal_digits = 0;
+                    quoted = false;
+                    newtext += octal_val;
+                }
+            } else {
+                if (octal_digits) {
+                    // Spec allows 1-3 digits
+                    octal_digits = 0;
+                    quoted = false;
+                    newtext += octal_val;
+                    --cp;  // Backup to reprocess terminating character as non-escaped
+                    continue;
+                }
+                quoted = false;
+                if (*cp == 'n') {
+                    newtext += '\n';
+                } else if (*cp == 'a') {
+                    newtext += '\a';  // SystemVerilog 3.1
+                } else if (*cp == 'f') {
+                    newtext += '\f';  // SystemVerilog 3.1
+                } else if (*cp == 'r') {
+                    newtext += '\r';
+                } else if (*cp == 't') {
+                    newtext += '\t';
+                } else if (*cp == 'v') {
+                    newtext += '\v';  // SystemVerilog 3.1
+                } else if (*cp == 'x' && std::isxdigit(cp[1])
+                           && std::isxdigit(cp[2])) {  // SystemVerilog 3.1
+                    newtext
+                        += static_cast<char>(16 * vl_decodexdigit(cp[1]) + vl_decodexdigit(cp[2]));
+                    cp += 2;
+                } else if (std::isalnum(*cp)) {
+                    errOut = "Unknown escape sequence: \\";
+                    errOut += *cp;
+                    break;
+                } else {
+                    newtext += *cp;
+                }
+            }
+        } else if (*cp == '\\') {
+            quoted = true;
+            octal_digits = 0;
+        } else {
+            newtext += *cp;
+        }
+    }
+    return newtext;
+}
+
 string VString::spaceUnprintable(const string& str) VL_PURE {
     string result;
     for (const char c : str) {
diff --git a/src/V3String.h b/src/V3String.h
index cbca5de56..33c792757 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -102,6 +102,9 @@ public:
     // Surround a raw string by double quote and escape if necessary
     // e.g. input abc's  becomes "\"abc\'s\""
     static string escapeStringForPath(const string& str);
+    // Convert SV quoted string input from source code to normal form.
+    // Reverse is V3OutFormatter::quoteNameControls(...)
+    static string unquoteSVString(const string& text, string& errOut);
     // Escape path in Windows
     // e.g. input `C:\Program Files\My Program\My Program.exe` becomes
     // `C:\\Program\ Files\\My\ Program\\My\ Program.exe`
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 10b0fb06d..cb2109ea0 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -642,6 +642,7 @@ static void verilate(const string& argString) {
         {
             const V3MtDisabledLockGuard mtDisabler{v3MtDisabledLock()};
 
+            V3Os::selfTest();
             VHashSha256::selfTest();
             VSpellCheck::selfTest();
             V3Graph::selfTest();
@@ -782,7 +783,7 @@ int main(int argc, char** argv) {
         V3PreShell::boot();
 
         // Command option parsing
-        v3Global.opt.buildDepBin(VString::escapeStringForPath(argv[0]));
+        v3Global.opt.buildDepBin(V3Os::filenameCleanup(argv[0]));
         v3Global.opt.parseOpts(new FileLine{FileLine::commandLineFilename()}, argc - 1, argv + 1);
 
         // Validate settings (aka Boost.Program_options)
diff --git a/src/verilog.y b/src/verilog.y
index 2b9120969..39f2e31ff 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -129,7 +129,7 @@ public:
                            AstNode* attrsp) VL_MT_DISABLED;
     AstNode* createSupplyExpr(FileLine* fileline, const string& name, int value) VL_MT_DISABLED;
     AstText* createTextQuoted(FileLine* fileline, const string& text) {
-        string newtext = deQuote(fileline, text);
+        string newtext = GRAMMARP->unquoteString(fileline, text);
         return new AstText{fileline, newtext};
     }
     AstNode* createCellOrIfaceRef(FileLine* fileline, const string& name, AstPin* pinlistp,
@@ -253,7 +253,7 @@ public:
             return createArray(dtypep, rangearraysp, isPacked);
         }
     }
-    string deQuote(FileLine* fileline, string text) VL_MT_DISABLED;
+    string unquoteString(FileLine* fileline, string text) VL_MT_DISABLED;
     void checkDpiVer(FileLine* fileline, const string& str) {
         if (str != "DPI-C" && !v3Global.opt.bboxSys()) {
             fileline->v3error("Unsupported DPI type '" << str << "': Use 'DPI-C'");
@@ -5675,13 +5675,13 @@ parseRefBase<nodep>:
 
 // yaSTRING shouldn't be used directly, instead via an abstraction below
 str<strp>:                      // yaSTRING but with \{escapes} need decoded
-                yaSTRING                                { $$ = PARSEP->newString(GRAMMARP->deQuote($<fl>1, *$1)); }
+                yaSTRING                                { $$ = PARSEP->newString(GRAMMARP->unquoteString($<fl>1, *$1)); }
         ;
 
 strAsInt<nodeExprp>:
                 yaSTRING
                         { // Numeric context, so IEEE 1800-2017 11.10.3 "" is a "\000"
-                          $$ = new AstConst{$<fl>1, AstConst::VerilogStringLiteral{}, GRAMMARP->deQuote($<fl>1, *$1)}; }
+                          $$ = new AstConst{$<fl>1, AstConst::VerilogStringLiteral{}, GRAMMARP->unquoteString($<fl>1, *$1)}; }
         ;
 
 strAsIntIgnore<nodeExprp>:          // strAsInt, but never matches for when expr shouldn't parse strings
diff --git a/test_regress/t/t_pp_line.out b/test_regress/t/t_pp_line.out
new file mode 100644
index 000000000..a3e32422f
--- /dev/null
+++ b/test_regress/t/t_pp_line.out
@@ -0,0 +1,16 @@
+-Info: some file:100:1: aaaaaaaa
+                      : ... note: In instance 't'
+  100 | $info("aaaaaaaa");
+      | ^~~~~
+-Info: some file:101:1: bbbbbbbb
+                      : ... note: In instance 't'
+  101 | $info("bbbbbbbb");
+      | ^~~~~
+-Info: somefile.v:200:1: cccccccc
+                       : ... note: In instance 't'
+  200 | $info("cccccccc");
+      | ^~~~~
+-Info: /a/somefile.v:300:1: dddddddd
+                          : ... note: In instance 't'
+  300 | $info("dddddddd");
+      | ^~~~~
diff --git a/test_regress/t/t_pp_line.pl b/test_regress/t/t_pp_line.pl
new file mode 100755
index 000000000..d1ed9a923
--- /dev/null
+++ b/test_regress/t/t_pp_line.pl
@@ -0,0 +1,18 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_pp_line.v b/test_regress/t/t_pp_line.v
new file mode 100644
index 000000000..ac991e550
--- /dev/null
+++ b/test_regress/t/t_pp_line.v
@@ -0,0 +1,15 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+`line 100 "some file" 0
+$info("aaaaaaaa");
+$info("bbbbbbbb");
+`line 200 "somefile.v" 0
+$info("cccccccc");
+`line 300 "/a/somefile.v" 0
+$info("dddddddd");
+endmodule
diff --git a/test_regress/t/t_pp_line_bad.out b/test_regress/t/t_pp_line_bad.out
index 062cbf6af..8365b61c6 100644
--- a/test_regress/t/t_pp_line_bad.out
+++ b/test_regress/t/t_pp_line_bad.out
@@ -1,13 +1,22 @@
 %Error: t/t_pp_line_bad.v:100:1: `line was not properly formed with '`line number "filename" level'
   100 | `line 100
       | ^
-%Error: somefile:100:1: `line was not properly formed with '`line number "filename" level'
-  100 | `line 100
+%Error: t/t_pp_line_bad.v:200:1: `line was not properly formed with '`line number "filename" level'
+  200 | `line 100
+      | ^
+%Error: t/t_pp_line_bad.v:300:1: `line was not properly formed with '`line number "filename" level'
+  300 | `line 100
+      | ^
+%Error: some file:400:1: `line was not properly formed with '`line number "filename" level'
+  400 | `line 100
+      | ^
+%Error: somefile:500:1: `line was not properly formed with '`line number "filename" level'
+  500 | `line 100
+      | ^
+%Error: some file:600:1: `line was not properly formed with '`line number "filename" level'
+  600 | `line 100
       | ^
-%Error: somefile:100:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:7:1: Define or directive not defined: '`line'
     7 | `line
       | ^~~~~
-%Error: somefile:100:1: `line was not properly formed with '`line number "filename" level'
-        t/t_pp_line_bad.v:101:1: ... note: In file included from 't_pp_line_bad.v'
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_line_bad.pl b/test_regress/t/t_pp_line_bad.pl
index 9de6b85ee..a60503a1f 100755
--- a/test_regress/t/t_pp_line_bad.pl
+++ b/test_regress/t/t_pp_line_bad.pl
@@ -8,10 +8,9 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-scenarios(vlt => 1);
+scenarios(linter => 1);
 
 lint(
-    verilator_flags2 => ["-Wpedantic"],
     fails => 1,
     expect_filename => $Self->{golden_filename},
     );
diff --git a/test_regress/t/t_pp_line_bad.v b/test_regress/t/t_pp_line_bad.v
index e1ac808a4..0d41247a1 100644
--- a/test_regress/t/t_pp_line_bad.v
+++ b/test_regress/t/t_pp_line_bad.v
@@ -6,6 +6,8 @@
 
 `line
 `line 100
-`line 100 somefile 1
-`line 100 "somefile"
-`line 100 "somefile" 3
+`line 200 somefile
+`line 300 "somefile 1
+`line 400 "some file"
+`line 500 "somefile" 3
+`line 600 "some file" 3

From 36c824d9733567c631b14560379d27062a7a6992 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 18:37:39 -0400
Subject: [PATCH 025/157] Add trace() API even when Verilated without --trace
 (#4462).

---
 Changes                                 |  1 +
 src/V3EmitCModel.cpp                    | 32 ++++++++++++++++---------
 test_regress/t/t_trace_noflag_bad.out   |  2 ++
 test_regress/t/t_trace_noflag_bad.pl    | 27 +++++++++++++++++++++
 test_regress/t/t_trace_noflag_bad.v     | 14 +++++++++++
 test_regress/t/t_trace_noflag_bad_c.cpp | 24 +++++++++++++++++++
 6 files changed, 89 insertions(+), 11 deletions(-)
 create mode 100644 test_regress/t/t_trace_noflag_bad.out
 create mode 100755 test_regress/t/t_trace_noflag_bad.pl
 create mode 100644 test_regress/t/t_trace_noflag_bad.v
 create mode 100644 test_regress/t/t_trace_noflag_bad_c.cpp

diff --git a/Changes b/Changes
index a23881b92..283efe579 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.017 devel
 
 **Minor:**
 
+* Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 8eff11e6f..9c694d37c 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -197,15 +197,13 @@ class EmitCModel final : public EmitCFunc {
         puts("/// Returns time at next time slot. Aborts if !eventsPending()\n");
         puts("uint64_t nextTimeSlot();\n");
 
-        if (v3Global.opt.trace()) {
-            puts("/// Trace signals in the model; called by application code\n");
-            puts("void trace(" + v3Global.opt.traceClassBase()
-                 + "C* tfp, int levels, int options = 0);\n");
-            if (optSystemC()) {
-                puts("/// SC tracing; avoid overloaded virtual function lint warning\n");
-                puts("void trace(sc_trace_file* tfp) const override { "
-                     "::sc_core::sc_module::trace(tfp); }\n");
-            }
+        puts("/// Trace signals in the model; called by application code\n");
+        puts("void trace(" + v3Global.opt.traceClassBase()
+             + "C* tfp, int levels, int options = 0);\n");
+        if (v3Global.opt.trace() && optSystemC()) {
+            puts("/// SC tracing; avoid overloaded virtual function lint warning\n");
+            puts("void trace(sc_trace_file* tfp) const override { "
+                 "::sc_core::sc_module::trace(tfp); }\n");
         }
 
         if (!optSystemC()) {
@@ -591,6 +589,15 @@ class EmitCModel final : public EmitCFunc {
 
         puts("}\n");
     }
+    void emitTraceOffMethods(AstNodeModule* modp) {
+        putSectionDelimiter("Trace configuration");
+        // ::trace
+        puts("\nVL_ATTR_COLD void " + topClassName() + "::trace(");
+        puts(v3Global.opt.traceClassBase() + "C* tfp, int levels, int options) {\n");
+        puts(/**/ "vl_fatal(__FILE__, __LINE__, __FILE__,\"'" + topClassName()
+             + +"::trace()' called on model that was Verilated without --trace option\");\n");
+        puts("}\n");
+    }
 
     void emitSerializationFunctions() {
         putSectionDelimiter("Model serialization");
@@ -635,8 +642,11 @@ class EmitCModel final : public EmitCFunc {
         emitDestructorImplementation();
         emitStandardMethods1(modp);
         emitStandardMethods2(modp);
-        if (v3Global.opt.trace()) { emitTraceMethods(modp); }
-        if (v3Global.opt.savable()) { emitSerializationFunctions(); }
+        if (v3Global.opt.trace())
+            emitTraceMethods(modp);
+        else
+            emitTraceOffMethods(modp);
+        if (v3Global.opt.savable()) emitSerializationFunctions();
 
         VL_DO_CLEAR(delete m_ofp, m_ofp = nullptr);
     }
diff --git a/test_regress/t/t_trace_noflag_bad.out b/test_regress/t/t_trace_noflag_bad.out
new file mode 100644
index 000000000..e8156e0c9
--- /dev/null
+++ b/test_regress/t/t_trace_noflag_bad.out
@@ -0,0 +1,2 @@
+%Error: Vt_trace_noflag_bad.cpp:106: 'Vt_trace_noflag_bad::trace()' called on model that was Verilated without --trace option
+Aborting...
diff --git a/test_regress/t/t_trace_noflag_bad.pl b/test_regress/t/t_trace_noflag_bad.pl
new file mode 100755
index 000000000..8271fa41d
--- /dev/null
+++ b/test_regress/t/t_trace_noflag_bad.pl
@@ -0,0 +1,27 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+compile(
+    # We need to list verilated_vcd_c.cpp because without --trace Verilator
+    # won't build it itself automatically.
+    verilator_flags2 => ["--cc --exe $Self->{t_dir}/$Self->{name}_c.cpp verilated_vcd_c.cpp"],
+    make_top_shell => 0,
+    make_main => 0,
+    );
+
+execute(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_trace_noflag_bad.v b/test_regress/t/t_trace_noflag_bad.v
new file mode 100644
index 000000000..fc9beb176
--- /dev/null
+++ b/test_regress/t/t_trace_noflag_bad.v
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/);
+   int i;
+   initial begin
+      i = 10;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_trace_noflag_bad_c.cpp b/test_regress/t/t_trace_noflag_bad_c.cpp
new file mode 100644
index 000000000..1fccdddd3
--- /dev/null
+++ b/test_regress/t/t_trace_noflag_bad_c.cpp
@@ -0,0 +1,24 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2010 by Yu-Sheng Lin.
+// SPDX-License-Identifier: CC0-1.0
+
+#include <verilated.h>
+#include <verilated_vcd_c.h>
+
+#include "Vt_trace_noflag_bad.h"
+
+int main(int argc, char** argv) {
+    std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
+    contextp->traceEverOn(true);
+    std::unique_ptr<VerilatedVcdC> tfp{new VerilatedVcdC};
+    const std::unique_ptr<VM_PREFIX> topp{new VM_PREFIX{contextp.get()}};
+    topp->trace(tfp.get(), 99);  // Error!
+    tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/dump.vcd");  // Error! shall put to the next line!
+    tfp->dump(0);
+    tfp->close();
+    return 0;
+}

From 72b4a742453422ef79a26b169e8e9ebb69e32eb2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 19:58:09 -0400
Subject: [PATCH 026/157] Fix clang error on last commit

---
 src/V3EmitCModel.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 9c694d37c..2ceeafbde 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -642,10 +642,11 @@ class EmitCModel final : public EmitCFunc {
         emitDestructorImplementation();
         emitStandardMethods1(modp);
         emitStandardMethods2(modp);
-        if (v3Global.opt.trace())
+        if (v3Global.opt.trace()) {
             emitTraceMethods(modp);
-        else
+        } else if (!v3Global.opt.systemC()) {
             emitTraceOffMethods(modp);
+        }
         if (v3Global.opt.savable()) emitSerializationFunctions();
 
         VL_DO_CLEAR(delete m_ofp, m_ofp = nullptr);

From a948be184c0abf9d7edbe2004d1ddce1d514991c Mon Sep 17 00:00:00 2001
From: Justin Thiel <jthiel@hudson-trading.com>
Date: Tue, 26 Sep 2023 20:35:23 -0400
Subject: [PATCH 027/157] Tests: Add t_interface_localparam_unsup (#3857
 partial) (#3858)

---
 docs/CONTRIBUTORS                             |  1 +
 .../t/t_interface_localparam_unsup.out        |  5 ++
 .../t/t_interface_localparam_unsup.pl         | 23 +++++++++
 test_regress/t/t_interface_localparam_unsup.v | 51 +++++++++++++++++++
 4 files changed, 80 insertions(+)
 create mode 100644 test_regress/t/t_interface_localparam_unsup.out
 create mode 100755 test_regress/t/t_interface_localparam_unsup.pl
 create mode 100644 test_regress/t/t_interface_localparam_unsup.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index b80f0bfc3..92c0ec46c 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -88,6 +88,7 @@ Josh Redford
 Julian Daube
 Julie Schwartz
 Julien Margetts
+Justin Thiel
 Kaleb Barrett
 Kamil Rakoczy
 Kanad Kanhere
diff --git a/test_regress/t/t_interface_localparam_unsup.out b/test_regress/t/t_interface_localparam_unsup.out
new file mode 100644
index 000000000..1ac204e0e
--- /dev/null
+++ b/test_regress/t/t_interface_localparam_unsup.out
@@ -0,0 +1,5 @@
+*-* All Finished *-*
+top.t.intf: symbolsPerBeat 16, symbolsPerBeatDivBy2 8, mismatch 0
+top.t.theCore.core_intf: symbolsPerBeat 64, symbolsPerBeatDivBy2 8, mismatch 1
+%Error: t/t_interface_localparam_unsup.v:23: Verilog $stop
+Aborting...
diff --git a/test_regress/t/t_interface_localparam_unsup.pl b/test_regress/t/t_interface_localparam_unsup.pl
new file mode 100755
index 000000000..fa08b1e33
--- /dev/null
+++ b/test_regress/t/t_interface_localparam_unsup.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    fails => $Self->{vlt_all},
+    expect_filename => $Self->{golden_filename},
+);
+
+ok(1);
+1;
diff --git a/test_regress/t/t_interface_localparam_unsup.v b/test_regress/t/t_interface_localparam_unsup.v
new file mode 100644
index 000000000..6deb411ae
--- /dev/null
+++ b/test_regress/t/t_interface_localparam_unsup.v
@@ -0,0 +1,51 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Justin Thiel.
+// SPDX-License-Identifier: CC0-1.0
+
+interface SimpleIntf
+#(
+   parameter int symbolsPerBeat = 16
+)
+();
+
+   // This value is calculated incorrectly for other instances of
+   // this interface when it is accessed via the HDL for any other
+   // instance of this interface
+   localparam int symbolsPerBeatDivBy2  = symbolsPerBeat/2;
+
+   localparam bit mismatch = (symbolsPerBeat != (2*symbolsPerBeatDivBy2) );
+
+   initial begin
+      $write("%m: symbolsPerBeat %0d, symbolsPerBeatDivBy2 %0d, mismatch %0d\n",
+             symbolsPerBeat, symbolsPerBeatDivBy2, mismatch);
+      if (mismatch) $stop;
+   end
+
+endinterface
+
+module Core(
+   SimpleIntf intf
+);
+
+   // NOTE: When this line is commented out the test will pass
+   localparam intf_symbolsPerBeatDivBy2 = intf.symbolsPerBeatDivBy2;
+
+   localparam int core_intf_symbolsPerBeat = 64;
+   SimpleIntf #(.symbolsPerBeat(core_intf_symbolsPerBeat)) core_intf ();
+
+endmodule
+
+module t();
+
+   SimpleIntf intf();
+
+   Core theCore (.intf);
+
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 018d766179509e532482952c39214cbea3b8db26 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 21:07:43 -0400
Subject: [PATCH 028/157] Fix clang error (#4462)

---
 src/V3EmitCModel.cpp   | 8 +++++---
 test_regress/driver.pl | 1 +
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 2ceeafbde..25a7368c0 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -197,9 +197,11 @@ class EmitCModel final : public EmitCFunc {
         puts("/// Returns time at next time slot. Aborts if !eventsPending()\n");
         puts("uint64_t nextTimeSlot();\n");
 
-        puts("/// Trace signals in the model; called by application code\n");
-        puts("void trace(" + v3Global.opt.traceClassBase()
-             + "C* tfp, int levels, int options = 0);\n");
+        if (v3Global.opt.trace() || !optSystemC()) {
+            puts("/// Trace signals in the model; called by application code\n");
+            puts("void trace(" + v3Global.opt.traceClassBase()
+                 + "C* tfp, int levels, int options = 0);\n");
+        }
         if (v3Global.opt.trace() && optSystemC()) {
             puts("/// SC tracing; avoid overloaded virtual function lint warning\n");
             puts("void trace(sc_trace_file* tfp) const override { "
diff --git a/test_regress/driver.pl b/test_regress/driver.pl
index 69c8cccb4..05b4c2ed9 100755
--- a/test_regress/driver.pl
+++ b/test_regress/driver.pl
@@ -2245,6 +2245,7 @@ sub files_identical {
                 $l1[$l] =~ s/CPU Time: +[0-9.]+ seconds[^\n]+/CPU Time: ###/mig;
                 $l1[$l] =~ s/\?v=[0-9.]+/?v=latest/mig;  # warning URL
                 $l1[$l] =~ s/_h[0-9a-f]{8}_/_h########_/mg;
+                $l1[$l] =~ s!%Error: \./!%Error: !mg; # clang gives ./ while GCC does not
                 $l1[$l] =~ s/ \/[^ ]+\/verilated_std.sv/ verilated_std.sv/mg;
                 if ($l1[$l] =~ s/Exiting due to.*/Exiting due to/mig) {
                     splice @l1, $l+1;  # Trunc rest

From ad343f8260cf429e786e73cace8ecf5e96654937 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 22:15:48 -0400
Subject: [PATCH 029/157] Add warning on interface instantiation without parens
 (#4094).

---
 Changes                                       |  1 +
 src/V3AstNodeOther.h                          |  4 ++++
 src/V3LinkCells.cpp                           |  6 ++++++
 src/verilog.y                                 |  7 ++++---
 test_regress/t/t_fuzz_genintf_bad.v           |  2 +-
 .../t/t_interface_paren_missing_bad.out       |  5 +++++
 .../t/t_interface_paren_missing_bad.pl        | 19 +++++++++++++++++++
 .../t/t_interface_paren_missing_bad.v         | 15 +++++++++++++++
 test_regress/t/t_interface_virtual.v          |  2 +-
 test_regress/t/t_interface_virtual_bad.v      |  4 ++--
 10 files changed, 58 insertions(+), 7 deletions(-)
 create mode 100644 test_regress/t/t_interface_paren_missing_bad.out
 create mode 100755 test_regress/t/t_interface_paren_missing_bad.pl
 create mode 100644 test_regress/t/t_interface_paren_missing_bad.v

diff --git a/Changes b/Changes
index 283efe579..6c60e88e3 100644
--- a/Changes
+++ b/Changes
@@ -14,6 +14,7 @@ Verilator 5.017 devel
 **Minor:**
 
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
+* Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 2908bbe95..ee393ad9d 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -776,6 +776,7 @@ class AstCell final : public AstNode {
     string m_modName;  // Module the cell instances
     AstNodeModule* m_modp = nullptr;  // [AfterLink] Pointer to module instanced
     bool m_hasIfaceVar : 1;  // True if a Var has been created for this cell
+    bool m_hasNoParens : 1;  // Instantiation has no parenthesis
     bool m_recursive : 1;  // Self-recursive module
     bool m_trace : 1;  // Trace this cell
 public:
@@ -787,6 +788,7 @@ public:
         , m_origName{instName}
         , m_modName{modName}
         , m_hasIfaceVar{false}
+        , m_hasNoParens{false}
         , m_recursive{false}
         , m_trace{true} {
         this->addPinsp(pinsp);
@@ -810,6 +812,8 @@ public:
     void modp(AstNodeModule* nodep) { m_modp = nodep; }
     bool hasIfaceVar() const { return m_hasIfaceVar; }
     void hasIfaceVar(bool flag) { m_hasIfaceVar = flag; }
+    bool hasNoParens() const { return m_hasNoParens; }
+    void hasNoParens(bool flag) { m_hasNoParens = flag; }
     void trace(bool flag) { m_trace = flag; }
     bool isTrace() const { return m_trace; }
     void recursive(bool flag) { m_recursive = flag; }
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index d98a9158b..4d18030eb 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -455,6 +455,12 @@ private:
                 nodep->addNextHere(varp);
                 nodep->hasIfaceVar(true);
             }
+            if (nodep->hasNoParens()) {
+                nodep->v3error("Interface instantiation "
+                               << nodep->prettyNameQ() << " requires parenthesis\n"
+                               << nodep->warnMore() << "... Suggest use '" << nodep->prettyName()
+                               << "()'");
+            }
         }
         if (nodep->modp()) {  //
             iterateChildren(nodep);
diff --git a/src/verilog.y b/src/verilog.y
index 39f2e31ff..6d06f969e 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -133,7 +133,7 @@ public:
         return new AstText{fileline, newtext};
     }
     AstNode* createCellOrIfaceRef(FileLine* fileline, const string& name, AstPin* pinlistp,
-                                  AstNodeRange* rangelistp) {
+                                  AstNodeRange* rangelistp, bool parens) {
         // Must clone m_instParamp as may be comma'ed list of instances
         VSymEnt* const foundp = SYMP->symCurrentp()->findIdFallback(name);
         if (foundp && VN_IS(foundp->nodep(), Port)) {
@@ -155,6 +155,7 @@ public:
             pinlistp,
             (GRAMMARP->m_instParamp ? GRAMMARP->m_instParamp->cloneTree(true) : nullptr),
             GRAMMARP->scrubRange(rangelistp)};
+        nodep->hasNoParens(!parens);
         nodep->trace(GRAMMARP->allTracingOn(fileline));
         return nodep;
     }
@@ -3187,9 +3188,9 @@ instnameList<nodep>:
 
 instnameParen<nodep>:
                 id instRangeListE '(' cellpinListE ')'
-                        { $$ = GRAMMARP->createCellOrIfaceRef($<fl>1, *$1, $4, $2); }
+                        { $$ = GRAMMARP->createCellOrIfaceRef($<fl>1, *$1, $4, $2, true); }
         |       id instRangeListE
-                        { $$ = GRAMMARP->createCellOrIfaceRef($<fl>1, *$1, nullptr, $2); }
+                        { $$ = GRAMMARP->createCellOrIfaceRef($<fl>1, *$1, nullptr, $2, false); }
         //UNSUP instRangeListE '(' cellpinListE ')'      { UNSUP } // UDP
         //                      // Adding above and switching to the Verilog-Perl syntax
         //                      // causes a shift conflict due to use of idClassSel inside exprScope.
diff --git a/test_regress/t/t_fuzz_genintf_bad.v b/test_regress/t/t_fuzz_genintf_bad.v
index 53df6dea8..99fad227c 100644
--- a/test_regress/t/t_fuzz_genintf_bad.v
+++ b/test_regress/t/t_fuzz_genintf_bad.v
@@ -18,7 +18,7 @@ module m1
 endmodule
 
 module t;
-   intf ifs;
+   intf ifs();
 
    m1 m0(
          j.e(0),
diff --git a/test_regress/t/t_interface_paren_missing_bad.out b/test_regress/t/t_interface_paren_missing_bad.out
new file mode 100644
index 000000000..161dad3fc
--- /dev/null
+++ b/test_regress/t/t_interface_paren_missing_bad.out
@@ -0,0 +1,5 @@
+%Error: t/t_interface_paren_missing_bad.v:13:9: Interface instantiation 'intf_i' requires parenthesis
+                                              : ... Suggest use 'intf_i()'
+   13 |    intf intf_i;
+      |         ^~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_interface_paren_missing_bad.pl b/test_regress/t/t_interface_paren_missing_bad.pl
new file mode 100755
index 000000000..b564041ff
--- /dev/null
+++ b/test_regress/t/t_interface_paren_missing_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_interface_paren_missing_bad.v b/test_regress/t/t_interface_paren_missing_bad.v
new file mode 100644
index 000000000..c1a9edae4
--- /dev/null
+++ b/test_regress/t/t_interface_paren_missing_bad.v
@@ -0,0 +1,15 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Interface instantiation without paranthesis
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Goekce Aydos.
+// SPDX-License-Identifier: CC0-1.0
+
+interface intf;
+endinterface
+
+module t;
+   intf intf_i;
+   initial $finish;
+endmodule
diff --git a/test_regress/t/t_interface_virtual.v b/test_regress/t/t_interface_virtual.v
index 878df0995..0e05cf47e 100644
--- a/test_regress/t/t_interface_virtual.v
+++ b/test_regress/t/t_interface_virtual.v
@@ -25,7 +25,7 @@ endclass
 
 module t (/*AUTOARG*/);
 
-   PBus ia, ib;
+   PBus ia(), ib();
    virtual PBus va, vb;
    virtual PBus.phy pa, pb;
    Cls ca, cb;
diff --git a/test_regress/t/t_interface_virtual_bad.v b/test_regress/t/t_interface_virtual_bad.v
index 3c4f690da..55c99e285 100644
--- a/test_regress/t/t_interface_virtual_bad.v
+++ b/test_regress/t/t_interface_virtual_bad.v
@@ -19,8 +19,8 @@ typedef virtual PBus vpbus_t;
 
 module t (/*AUTOARG*/);
 
-   PBus p8;
-   QBus q8;
+   PBus p8();
+   QBus q8();
    vpbus_t v8;
    virtual PBus.phy v8_phy;
    logic data;

From 84ccb230989a1c5d35f356cb782cbb441e40df16 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 22:43:17 -0400
Subject: [PATCH 030/157] Fix C++11 compiler constexpr return error

---
 include/verilated_types.h | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 4fac347f1..6a1a3bfac 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -69,7 +69,7 @@ extern std::string VL_TO_STRING_W(int words, const WDataInP obj);
 #define VL_INOUTW(name, msb, lsb, words) VlWide<words> name  ///< Declare bidir signal, 65+ bits
 #define VL_OUT8(name, msb, lsb) CData name  ///< Declare output signal, 1-8 bits
 #define VL_OUT16(name, msb, lsb) SData name  ///< Declare output signal, 9-16 bits
-#define VL_OUT64(name, msb, lsb) QData name  ///< Declare output signal, 33-64bits
+#define VL_OUT64(name, msb, lsb) QData name  ///< Declare output signal, 33-64 bits
 #define VL_OUT(name, msb, lsb) IData name  ///< Declare output signal, 17-32 bits
 #define VL_OUTW(name, msb, lsb, words) VlWide<words> name  ///< Declare output signal, 65+ bits
 
@@ -77,11 +77,8 @@ extern std::string VL_TO_STRING_W(int words, const WDataInP obj);
 // Functions needed here
 
 constexpr IData VL_CLOG2_CE_Q(QData lhs) VL_PURE {
-    if (VL_UNLIKELY(!lhs)) return 0;
-    --lhs;
-    int shifts = 0;
-    for (; lhs != 0; ++shifts) lhs = lhs >> 1ULL;
-    return shifts;
+    // constexpr usage only! Recuses to meet C++11 constexpr func limitations
+    return lhs <= 1 ? 0 : VL_CLOG2_CE_Q((lhs + 1) >> 1ULL) + 1;
 }
 
 //===================================================================

From 2385ab8294f042a3594d542d308646eb588e3283 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 26 Sep 2023 22:53:25 -0400
Subject: [PATCH 031/157] Tests: randc now supported

---
 test_regress/t/t_class_unsup_bad.pl  | 1 -
 test_regress/t/t_func_arg_complex.pl | 2 +-
 test_regress/t/t_uvm_all.pl          | 2 +-
 3 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/test_regress/t/t_class_unsup_bad.pl b/test_regress/t/t_class_unsup_bad.pl
index 33a7f3beb..009248fc5 100755
--- a/test_regress/t/t_class_unsup_bad.pl
+++ b/test_regress/t/t_class_unsup_bad.pl
@@ -12,7 +12,6 @@ scenarios(vlt => 1);
 
 lint(
     fails => 1,
-    verilator_flags2 => ['-Wno-RANDC'],
     expect_filename => $Self->{golden_filename},
     );
 
diff --git a/test_regress/t/t_func_arg_complex.pl b/test_regress/t/t_func_arg_complex.pl
index 02e61ae8f..433693b72 100755
--- a/test_regress/t/t_func_arg_complex.pl
+++ b/test_regress/t/t_func_arg_complex.pl
@@ -11,7 +11,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 scenarios(vlt => 1);
 
 compile(
-    v_flags2 => ["-Wno-PKGNODECL -Wno-UNPACKED -Wno-RANDC -Wno-IMPLICITSTATIC -Wno-CONSTRAINTIGN -Wno-MISINDENT",
+    v_flags2 => ["-Wno-PKGNODECL -Wno-UNPACKED -Wno-IMPLICITSTATIC -Wno-CONSTRAINTIGN -Wno-MISINDENT",
                  "--error-limit 200"],
     );
 
diff --git a/test_regress/t/t_uvm_all.pl b/test_regress/t/t_uvm_all.pl
index 23cc4f82d..2b328c903 100755
--- a/test_regress/t/t_uvm_all.pl
+++ b/test_regress/t/t_uvm_all.pl
@@ -12,7 +12,7 @@ scenarios(vlt => 1);
 
 compile(
     v_flags2 => ["--timing",
-                 "-Wno-PKGNODECL -Wno-RANDC -Wno-IMPLICITSTATIC -Wno-CONSTRAINTIGN -Wno-MISINDENT",
+                 "-Wno-PKGNODECL -Wno-IMPLICITSTATIC -Wno-CONSTRAINTIGN -Wno-MISINDENT",
                  "-Wno-WIDTHEXPAND -Wno-WIDTHTRUNC -Wno-CASTCONST -Wno-REALCVT",
                  "--error-limit 200 --debug-exit-uvm"],
     verilator_make_gmake => 0,

From e49ae663a605ac1a91b1e048560817c115e68317 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 28 Sep 2023 22:45:00 -0400
Subject: [PATCH 032/157] Fix constification of $realtobits, $bitstoreal
 (#4522).

---
 Changes                      |  1 +
 src/V3Number.cpp             | 20 ++++++++++++--------
 test_regress/t/t_math_real.v |  4 ++++
 test_regress/t/t_package.v   |  8 ++++++++
 4 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/Changes b/Changes
index 6c60e88e3..77040d98b 100644
--- a/Changes
+++ b/Changes
@@ -15,6 +15,7 @@ Verilator 5.017 devel
 
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
+* Fix constification of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 702c4c1ca..b6d2a519c 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -2388,19 +2388,23 @@ V3Number& V3Number::opRToIRoundS(const V3Number& lhs) {
 V3Number& V3Number::opRealToBits(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_DOUBLE_ARGS1(lhs);
-    // Conveniently our internal format is identical so we can copy bits...
     if (lhs.width() != 64 || width() != 64) v3fatalSrc("Real operation on wrong sized number");
-    m_data.setLogic();
-    opAssign(lhs);
-    return *this;
+    union {
+        double m_d;
+        uint64_t m_v;
+    } u;
+    u.m_d = lhs.toDouble();
+    return setQuad(u.m_v);
 }
 V3Number& V3Number::opBitsToRealD(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
-    // Conveniently our internal format is identical so we can copy bits...
     if (lhs.width() != 64 || width() != 64) v3fatalSrc("Real operation on wrong sized number");
-    m_data.setDouble();
-    opAssign(lhs);
-    return *this;
+    union {
+        double m_d;
+        uint64_t m_v;
+    } u;
+    u.m_v = lhs.toUQuad();
+    return setDouble(u.m_d);
 }
 V3Number& V3Number::opNegateD(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
diff --git a/test_regress/t/t_math_real.v b/test_regress/t/t_math_real.v
index 6e0584d5f..f9ee46d5b 100644
--- a/test_regress/t/t_math_real.v
+++ b/test_regress/t/t_math_real.v
@@ -97,6 +97,10 @@ module t (/*AUTOARG*/
       for (r=1.0; r<2.0; r=r+0.1) i++;
       if (i!=10) $stop;
       // bug
+      ci64 = $realtobits(1.444);
+      if (ci64 != 64'h3ff71a9fbe76c8b4) $stop;
+      r = $bitstoreal(64'h3ff71a9fbe76c8b4);
+      if (r != 1.444) $stop;
       r = $bitstoreal($realtobits(1.414));
       if (r != 1.414) $stop;
       // bug
diff --git a/test_regress/t/t_package.v b/test_regress/t/t_package.v
index 12bd01ab6..db29474f6 100644
--- a/test_regress/t/t_package.v
+++ b/test_regress/t/t_package.v
@@ -23,6 +23,12 @@ package p2;
    function [3:0] plustwo(input [3:0] i);
       plustwo = i+2;
    endfunction
+
+   function automatic bit realCompare(real r);
+      logic [63:0] b = $realtobits(r);
+      return b > 0;
+   endfunction
+
 endpackage
 
 module t (/*AUTOARG*/
@@ -55,10 +61,12 @@ endmodule
 module t2;
    import p::*;
    import p2::plustwo;
+   import p2::realCompare;
    import p2::package2_type_t;
    package_type_t vp;
    package2_type_t vp2;
    initial begin
+      bit x = realCompare(1.0);
       if (plusone(1) !== 2) $stop;
       if (plustwo(1) !== 3) $stop;
       if (p::pi !== 123 && p::pi !== 124) $stop;  // may race with other initial, so either value

From 44e7d2ebe6c6fbd09ae939623623d8ea3e599690 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 29 Sep 2023 12:23:51 +0200
Subject: [PATCH 033/157] Internals: rename VPurity class and related
 functions. No functional change (#4523)

---
 src/V3Ast.h          | 12 ++++++------
 src/V3AstNodeExpr.h  | 24 ++++++++++++-----------
 src/V3AstNodeOther.h |  4 ++--
 src/V3AstNodes.cpp   | 46 ++++++++++++++++++++++----------------------
 4 files changed, 44 insertions(+), 42 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 22e4fd846..7772581d4 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -167,16 +167,16 @@ inline std::ostream& operator<<(std::ostream& os, const VLifetime& rhs) {
 
 // ######################################################################
 
-class VPurity final {
-    // Used in some nodes to cache the result of isPure method
+class VIsCached final {
+    // Used in some nodes to cache results of boolean methods
 public:
-    enum en : uint8_t { NOT_CACHED, PURE, IMPURE };
+    enum en : uint8_t { NOT_CACHED, YES, NO };
     enum en m_e;
-    VPurity()
+    VIsCached()
         : m_e{NOT_CACHED} {}
     bool isCached() const { return m_e != NOT_CACHED; }
-    bool isPure() const { return m_e == PURE; }
-    void setPurity(bool pure) { m_e = pure ? PURE : IMPURE; }
+    bool get() const { return m_e == YES; }
+    void set(bool flag) { m_e = flag ? YES : NO; }
     void clearCache() { m_e = NOT_CACHED; }
 };
 
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 823c26a05..5b6da8b42 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -70,7 +70,7 @@ class AstNodeBiop VL_NOT_FINAL : public AstNodeExpr {
     // Binary expression
     // @astgen op1 := lhsp : AstNodeExpr
     // @astgen op2 := rhsp : AstNodeExpr
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeBiop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp)
@@ -101,7 +101,7 @@ public:
     void clearCachedPurity() override;
 
 private:
-    bool getPurity() const { return lhsp()->isPure() && rhsp()->isPure(); }
+    bool getPurityRecurse() const { return lhsp()->isPure() && rhsp()->isPure(); }
 };
 class AstNodeBiCom VL_NOT_FINAL : public AstNodeBiop {
     // Binary expr with commutative properties
@@ -228,7 +228,7 @@ class AstNodeFTaskRef VL_NOT_FINAL : public AstNodeExpr {
     string m_dotted;  // Dotted part of scope the name()ed task/func is under or ""
     string m_inlinedDots;  // Dotted hierarchy flattened out
     bool m_pli = false;  // Pli system call ($name)
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeFTaskRef(VNType t, FileLine* fl, AstNode* namep, AstNodeExpr* pinsp)
@@ -268,7 +268,7 @@ public:
     void clearCachedPurity() override;
 
 private:
-    bool getPurity() const;
+    bool getPurityRecurse() const;
 };
 class AstNodePreSel VL_NOT_FINAL : public AstNodeExpr {
     // Something that becomes an AstSel
@@ -276,7 +276,7 @@ class AstNodePreSel VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : Optional[AstNodeExpr]
     // @astgen op4 := attrp : Optional[AstAttrOf]
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodePreSel(VNType t, FileLine* fl, AstNodeExpr* fromp, AstNodeExpr* rhsp, AstNodeExpr* thsp)
@@ -299,7 +299,7 @@ public:
     void clearCachedPurity() override;
 
 private:
-    bool getPurity() const {
+    bool getPurityRecurse() const {
         return fromp()->isPure() && rhsp()->isPure() && (!thsp() || thsp()->isPure());
     }
 };
@@ -309,7 +309,7 @@ class AstNodeQuadop VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : AstNodeExpr
     // @astgen op4 := fhsp : AstNodeExpr
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeQuadop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, AstNodeExpr* thsp,
@@ -343,7 +343,7 @@ public:
     void clearCachedPurity() override;
 
 private:
-    bool getPurity() const {
+    bool getPurityRecurse() const {
         return lhsp()->isPure() && rhsp()->isPure() && thsp()->isPure() && fhsp()->isPure();
     }
 };
@@ -365,7 +365,7 @@ class AstNodeTriop VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op1 := lhsp : AstNodeExpr
     // @astgen op2 := rhsp : AstNodeExpr
     // @astgen op3 := thsp : AstNodeExpr
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeTriop(VNType t, FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, AstNodeExpr* thsp)
@@ -396,7 +396,9 @@ public:
     void clearCachedPurity() override;
 
 private:
-    bool getPurity() const { return lhsp()->isPure() && rhsp()->isPure() && thsp()->isPure(); }
+    bool getPurityRecurse() const {
+        return lhsp()->isPure() && rhsp()->isPure() && thsp()->isPure();
+    }
 };
 class AstNodeCond VL_NOT_FINAL : public AstNodeTriop {
     // @astgen alias op1 := condp
@@ -446,7 +448,7 @@ public:
 class AstNodeUniop VL_NOT_FINAL : public AstNodeExpr {
     // Unary expression
     // @astgen op1 := lhsp : AstNodeExpr
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeUniop(VNType t, FileLine* fl, AstNodeExpr* lhsp)
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index ee393ad9d..e41d614d2 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -88,7 +88,7 @@ private:
     bool m_virtual : 1;  // Virtual method in class
     bool m_needProcess : 1;  // Implements part of a process that allocates std::process
     VLifetime m_lifetime;  // Lifetime
-    VPurity m_purity;  // Pure state
+    VIsCached m_purity;  // Pure state
 
 protected:
     AstNodeFTask(VNType t, FileLine* fl, const string& name, AstNode* stmtsp)
@@ -195,7 +195,7 @@ public:
     }
 
 private:
-    bool getPurity() const;
+    bool getPurityRecurse() const;
 };
 class AstNodeFile VL_NOT_FINAL : public AstNode {
     // Emitted Output file
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 3ba281286..7dd6ffee7 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -51,7 +51,7 @@ AstIface* AstIfaceRefDType::ifaceViaCellp() const {
 const char* AstNodeFTaskRef::broken() const {
     BROKEN_RTN(m_taskp && !m_taskp->brokeExists());
     BROKEN_RTN(m_classOrPackagep && !m_classOrPackagep->brokeExists());
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
 
@@ -68,8 +68,8 @@ bool AstNodeFTaskRef::isPure() {
         // cached.
         return false;
     } else {
-        if (!m_purity.isCached()) m_purity.setPurity(this->getPurity());
-        return m_purity.isPure();
+        if (!m_purity.isCached()) m_purity.set(this->getPurityRecurse());
+        return m_purity.get();
     }
 }
 
@@ -78,7 +78,7 @@ void AstNodeFTaskRef::clearCachedPurity() {
     if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
 }
 
-bool AstNodeFTaskRef::getPurity() const {
+bool AstNodeFTaskRef::getPurityRecurse() const {
     AstNodeFTask* const taskp = this->taskp();
     // Unlinked yet, so treat as impure
     if (!taskp) return false;
@@ -146,11 +146,11 @@ const char* AstNodeCCall::broken() const {
 }
 bool AstNodeCCall::isPure() { return funcp()->dpiPure(); }
 bool AstNodeUniop::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(lhsp()->isPure());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(lhsp()->isPure());
+    return m_purity.get();
 }
 const char* AstNodeUniop::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != lhsp()->isPure());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != lhsp()->isPure());
     return nullptr;
 }
 void AstNodeUniop::clearCachedPurity() {
@@ -159,11 +159,11 @@ void AstNodeUniop::clearCachedPurity() {
 }
 
 bool AstNodeBiop::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
+    return m_purity.get();
 }
 const char* AstNodeBiop::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
 void AstNodeBiop::clearCachedPurity() {
@@ -172,11 +172,11 @@ void AstNodeBiop::clearCachedPurity() {
 }
 
 bool AstNodeTriop::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
+    return m_purity.get();
 }
 const char* AstNodeTriop::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
 void AstNodeTriop::clearCachedPurity() {
@@ -185,11 +185,11 @@ void AstNodeTriop::clearCachedPurity() {
 }
 
 bool AstNodePreSel::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
+    return m_purity.get();
 }
 const char* AstNodePreSel::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
 void AstNodePreSel::clearCachedPurity() {
@@ -198,11 +198,11 @@ void AstNodePreSel::clearCachedPurity() {
 }
 
 bool AstNodeQuadop::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
+    return m_purity.get();
 }
 const char* AstNodeQuadop::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
 void AstNodeQuadop::clearCachedPurity() {
@@ -2311,14 +2311,14 @@ void AstNodeFTask::dump(std::ostream& str) const {
     if ((dpiImport() || dpiExport()) && cname() != name()) str << " [c=" << cname() << "]";
 }
 bool AstNodeFTask::isPure() {
-    if (!m_purity.isCached()) m_purity.setPurity(getPurity());
-    return m_purity.isPure();
+    if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
+    return m_purity.get();
 }
 const char* AstNodeFTask::broken() const {
-    BROKEN_RTN(m_purity.isCached() && m_purity.isPure() != getPurity());
+    BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
-bool AstNodeFTask::getPurity() const {
+bool AstNodeFTask::getPurityRecurse() const {
     if (this->dpiImport()) return this->dpiPure();
     // Check the list of statements if it contains any impure statement
     // or any write reference to a variable that isn't an automatic function local.

From 33787c6add3976ca35f9e9065d639b6439318151 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 1 Oct 2023 12:46:35 -0400
Subject: [PATCH 034/157] Internals: Fix number nodep cloning, and assert stays
 consistent (#4528 partial)

---
 src/V3AstNodeExpr.h | 5 +++++
 src/V3Number.h      | 1 +
 2 files changed, 6 insertions(+)

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 5b6da8b42..727cdca6e 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1053,6 +1053,11 @@ public:
         const AstConst* const sp = static_cast<const AstConst*>(samep);
         return num().isCaseEq(sp->num());
     }
+    void cloneRelink() override { m_num.nodep(this); }
+    const char* broken() const override {
+        BROKEN_RTN(m_num.nodep() && m_num.nodep() != this);
+        return nullptr;
+    }
     int instrCount() const override { return widthInstrs(); }
     bool isEqAllOnes() const { return num().isEqAllOnes(width()); }
     bool isEqAllOnesV() const { return num().isEqAllOnes(widthMinV()); }
diff --git a/src/V3Number.h b/src/V3Number.h
index e76c854c4..acab8420e 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -357,6 +357,7 @@ class V3Number final {
 
 public:
     void nodep(AstNode* nodep) VL_MT_STABLE;
+    AstNode* nodep() const VL_MT_SAFE { return m_nodep; }  // For debug only
     FileLine* fileline() const VL_MT_SAFE { return m_fileline; }
     V3Number& setZero();
     V3Number& setQuad(uint64_t value);

From 732d03f4e5999879adf53de5864fa09849d84e29 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 1 Oct 2023 13:00:16 -0400
Subject: [PATCH 035/157] Fix conversion of integers in $display %e (#4528).

---
 Changes                           | 1 +
 src/V3Width.cpp                   | 1 +
 test_regress/t/t_display_real.out | 2 ++
 test_regress/t/t_display_real.v   | 3 +++
 4 files changed, 7 insertions(+)

diff --git a/Changes b/Changes
index 77040d98b..f40cebad4 100644
--- a/Changes
+++ b/Changes
@@ -16,6 +16,7 @@ Verilator 5.017 devel
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
 * Fix constification of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
+* Fix conversion of integers in $display '%e' (#4528). [muzafferkal]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 3cc703257..0c73d9116 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4893,6 +4893,7 @@ private:
                     }
                     break;
                 }
+                case 'e':  // FALLTHRU
                 case 'f':  // FALLTHRU
                 case 'g': {
                     if (argp) {
diff --git a/test_regress/t/t_display_real.out b/test_regress/t/t_display_real.out
index bf94bb29a..eb6fb770f 100644
--- a/test_regress/t/t_display_real.out
+++ b/test_regress/t/t_display_real.out
@@ -20,4 +20,6 @@
 
 r8=  3 n1=1 n2=0.1
 n1=1 n2=0.1 r8=  3
+
+iconst=0.000000e+00 0.000000 0
 *-* All Finished *-*
diff --git a/test_regress/t/t_display_real.v b/test_regress/t/t_display_real.v
index 1e5de3684..33e15d81c 100644
--- a/test_regress/t/t_display_real.v
+++ b/test_regress/t/t_display_real.v
@@ -11,6 +11,7 @@ module t;
    real n3; initial n3 = 1.2345e-15;
    real n4; initial n4 = 2.579e+15;
    reg [7:0] r8;  initial r8 = 3;
+   integer iconst = 0;
 
    initial begin
       // Display formatting
@@ -36,6 +37,8 @@ module t;
       $display;
       $display("r8=%d n1=%g n2=%g", r8, n1, n2);
       $display("n1=%g n2=%g r8=%d", n1, n2, r8);
+      $display;
+      $display("iconst=%e %f %g", iconst, iconst, iconst);
       $write("*-* All Finished *-*\n");
       $finish;
    end

From 1b8228b6421843f5d92b93258b588510df20c97c Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 3 Oct 2023 13:23:20 +0200
Subject: [PATCH 036/157] Fix stream operations with operands of struct type
 (#4531) (#4532)

---
 src/V3Width.cpp                   |  2 +-
 test_regress/t/t_stream_struct.pl | 21 +++++++++
 test_regress/t/t_stream_struct.v  | 74 +++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_stream_struct.pl
 create mode 100644 test_regress/t/t_stream_struct.v

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 0c73d9116..1d6468001 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -843,7 +843,7 @@ private:
             } else {
                 nodep->v3error("Slice size isn't a constant or basic data type.");
             }
-            const AstNodeDType* const lhsDtypep = nodep->lhsp()->dtypep();
+            const AstNodeDType* const lhsDtypep = nodep->lhsp()->dtypep()->skipRefToEnump();
             if (VN_IS(lhsDtypep, DynArrayDType) || VN_IS(lhsDtypep, QueueDType)) {
                 nodep->dtypeSetStream();
             } else if (VN_IS(lhsDtypep, UnpackArrayDType) || lhsDtypep->isCompound()) {
diff --git a/test_regress/t/t_stream_struct.pl b/test_regress/t/t_stream_struct.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_stream_struct.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_stream_struct.v b/test_regress/t/t_stream_struct.v
new file mode 100644
index 000000000..c3a1fcde3
--- /dev/null
+++ b/test_regress/t/t_stream_struct.v
@@ -0,0 +1,74 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   integer cyc = 0;
+   reg [63:0] crc;
+   reg [63:0] sum;
+
+   // Take CRC data and apply to testblock inputs
+   wire [63:0] in = crc[63:0];
+
+   /*AUTOWIRE*/
+   // Beginning of automatic wires (for undeclared instantiated-module outputs)
+   logic [63:0]         out;                    // From test of Test.v
+   // End of automatics
+
+   Test test(/*AUTOINST*/
+             // Outputs
+             .out                       (out[63:0]),
+             // Inputs
+             .in                        (in[63:0]));
+
+   // Test loop
+   always @ (posedge clk) begin
+`ifdef TEST_VERBOSE
+      $write("[%0t] cyc==%0d crc=%x out=%x\n", $time, cyc, crc, out);
+`endif
+      cyc <= cyc + 1;
+      crc <= {crc[62:0], crc[63] ^ crc[2] ^ crc[0]};
+      sum <= out ^ {sum[62:0], sum[63] ^ sum[2] ^ sum[0]};
+      if (cyc == 0) begin
+         // Setup
+         crc <= 64'h5aef0c8d_d70a4497;
+         sum <= '0;
+      end
+      else if (cyc < 10) begin
+         sum <= '0;
+      end
+      else if (cyc == 99) begin
+         $write("[%0t] cyc==%0d crc=%x sum=%x\n", $time, cyc, crc, sum);
+         if (crc !== 64'hc77bb9b3784ea091) $stop;
+         // What checksum will we end up with (above print should match)
+`define EXPECTED_SUM 64'h29271cf844d6f90c
+         if (sum !== `EXPECTED_SUM) $stop;
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+
+endmodule
+
+module Test (
+             input wire [63:0]   in,
+             output logic [63:0] out);
+
+   typedef struct  packed {
+      logic [63:0] dummy;
+   } data_t;
+
+   function automatic logic [63:0] reverse(data_t d);
+      return {<<{d}};
+   endfunction
+
+   assign out = reverse(in);
+
+endmodule

From a3c154dcd3fb0ec4768eaa3be2c3dd7b648376b3 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 3 Oct 2023 14:32:18 +0200
Subject: [PATCH 037/157] Fix this in a constructor (#4533)

---
 include/verilated_types.h                  |  5 +++--
 test_regress/t/t_class_this_constructor.pl | 21 +++++++++++++++++
 test_regress/t/t_class_this_constructor.v  | 26 ++++++++++++++++++++++
 3 files changed, 50 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_class_this_constructor.pl
 create mode 100644 test_regress/t/t_class_this_constructor.v

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 6a1a3bfac..cb40b0e82 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -1477,7 +1477,7 @@ class VlClass VL_NOT_FINAL : public VlDeletable {
 
 public:
     // CONSTRUCTORS
-    VlClass() = default;
+    VlClass() { refCountInc(); }
     VlClass(const VlClass& copied) {}
     ~VlClass() override = default;
 };
@@ -1526,8 +1526,9 @@ public:
         // () required here to avoid narrowing conversion warnings,
         // when a new() has an e.g. CData type and passed a 1U.
         : m_objp{new T_Class(std::forward<T_Args>(args)...)} {
+        // refCountInc was moved to the constructor of T_Class
+        // to fix self references in constructor.
         m_objp->m_deleterp = &deleter;
-        refCountInc();
     }
     // Explicit to avoid implicit conversion from 0
     explicit VlClassRef(T_Class* objp)
diff --git a/test_regress/t/t_class_this_constructor.pl b/test_regress/t/t_class_this_constructor.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_class_this_constructor.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_this_constructor.v b/test_regress/t/t_class_this_constructor.v
new file mode 100644
index 000000000..944d737db
--- /dev/null
+++ b/test_regress/t/t_class_this_constructor.v
@@ -0,0 +1,26 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class Cls;
+   bit x = 1'b0;
+   function new;
+      Cls c;
+      if (c == this) begin
+         x = 1'b1;
+      end
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   Cls c;
+   initial begin
+      c = new;
+      if (c.x) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From f84907313709db0e5cafb495f7c5fcc53f67c41a Mon Sep 17 00:00:00 2001
From: Todd Strader <tstrader@hudson-trading.com>
Date: Tue, 3 Oct 2023 19:55:25 -0400
Subject: [PATCH 038/157] Fix non-inlined interface tracing (#3984) (#4530)

---
 src/CMakeLists.txt                            |   2 +
 src/Makefile_obj.in                           |   1 +
 src/V3Inline.cpp                              |  83 -----------
 src/V3Interface.cpp                           | 129 ++++++++++++++++++
 src/V3Interface.h                             |  34 +++++
 src/Verilator.cpp                             |   3 +
 test_regress/t/t_interface_ref_trace_noinl.pl |  28 ++++
 .../t/t_interface_ref_trace_noinl_notrace.pl  |  24 ++++
 8 files changed, 221 insertions(+), 83 deletions(-)
 create mode 100644 src/V3Interface.cpp
 create mode 100644 src/V3Interface.h
 create mode 100755 test_regress/t/t_interface_ref_trace_noinl.pl
 create mode 100755 test_regress/t/t_interface_ref_trace_noinl_notrace.pl

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 396d79fd6..393eba402 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -96,6 +96,7 @@ set(HEADERS
     V3Inline.h
     V3Inst.h
     V3InstrCount.h
+    V3Interface.h
     V3LangCode.h
     V3LanguageWords.h
     V3Life.h
@@ -243,6 +244,7 @@ set(COMMON_SOURCES
     V3Inline.cpp
     V3Inst.cpp
     V3InstrCount.cpp
+    V3Interface.cpp
     V3Life.cpp
     V3LifePost.cpp
     V3LinkCells.cpp
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 162da5d85..b076f1a2a 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -219,6 +219,7 @@ RAW_OBJS = \
 	V3Inline.o \
 	V3Inst.o \
 	V3InstrCount.o \
+	V3Interface.o \
 	V3Life.o \
 	V3LifePost.o \
 	V3LinkCells.o \
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index 996e9d9bf..f704c9fb7 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -623,88 +623,6 @@ public:
     }
 };
 
-//######################################################################
-// Track interface references under the Cell they reference
-
-class InlineIntfRefVisitor final : public VNVisitor {
-private:
-    // NODE STATE
-    //   AstVar::user1p()   // AstCell which this Var points to
-    const VNUser1InUse m_inuser1;
-    const VNUser2InUse m_inuser2;
-
-    string m_scope;  // Scope name
-
-    // VISITORS
-    void visit(AstNetlist* nodep) override { iterateChildren(nodep->topModulep()); }
-    void visit(AstCell* nodep) override {
-        VL_RESTORER(m_scope);
-        if (m_scope.empty()) {
-            m_scope = nodep->name();
-        } else {
-            m_scope += "__DOT__" + nodep->name();
-        }
-
-        if (VN_IS(nodep->modp(), Iface)) {
-            nodep->addIntfRefsp(new AstIntfRef{nodep->fileline(), m_scope});
-        }
-        {
-            AstNodeModule* const modp = nodep->modp();
-            // Pass Cell pointers down to the next module
-            for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
-                AstVar* const varp = pinp->modVarp();
-                const AstVarRef* const varrefp = VN_CAST(pinp->exprp(), VarRef);
-                if (!varrefp) continue;
-                const AstVar* const fromVarp = varrefp->varp();
-                const AstIfaceRefDType* const irdtp = VN_CAST(fromVarp->dtypep(), IfaceRefDType);
-                if (!irdtp) continue;
-
-                AstCell* cellp;
-                if ((cellp = VN_CAST(fromVarp->user1p(), Cell)) || (cellp = irdtp->cellp())) {
-                    varp->user1p(cellp);
-                    const string alias = m_scope + "__DOT__" + pinp->name();
-                    cellp->addIntfRefsp(new AstIntfRef{pinp->fileline(), alias});
-                }
-            }
-
-            iterateChildren(modp);
-        }
-    }
-    void visit(AstAssignVarScope* nodep) override {
-        // Reference
-        const AstVarRef* const reflp = VN_CAST(nodep->lhsp(), VarRef);
-        // What the reference refers to
-        const AstVarRef* const refrp = VN_CAST(nodep->rhsp(), VarRef);
-        if (!(reflp && refrp)) return;
-
-        const AstVar* const varlp = reflp->varp();
-        const AstVar* const varrp = refrp->varp();
-        if (!(varlp && varrp)) return;
-
-        AstCell* cellp = VN_CAST(varrp->user1p(), Cell);
-        if (!cellp) {
-            const AstIfaceRefDType* const irdtp = VN_CAST(varrp->dtypep(), IfaceRefDType);
-            if (!irdtp) return;
-
-            cellp = irdtp->cellp();
-        }
-        if (!cellp) return;
-        string alias;
-        if (!m_scope.empty()) alias = m_scope + "__DOT__";
-        alias += varlp->name();
-        cellp->addIntfRefsp(new AstIntfRef{varlp->fileline(), alias});
-    }
-    //--------------------
-    void visit(AstNodeExpr*) override {}  // Accelerate
-    void visit(AstNodeStmt*) override {}  // Accelerate
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
-
-public:
-    // CONSTRUCTORS
-    explicit InlineIntfRefVisitor(AstNode* nodep) { iterate(nodep); }
-    ~InlineIntfRefVisitor() override = default;
-};
-
 //######################################################################
 // Inline class functions
 
@@ -730,6 +648,5 @@ void V3Inline::inlineAll(AstNetlist* nodep) {
         }
     }
 
-    { InlineIntfRefVisitor{nodep}; }
     V3Global::dumpCheckGlobalTree("inline", 0, dumpTreeLevel() >= 3);
 }
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
new file mode 100644
index 000000000..a0b641885
--- /dev/null
+++ b/src/V3Interface.cpp
@@ -0,0 +1,129 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Interface references for tracing
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+// V3Interface's Transformations:
+//
+// Each module:
+//      Look for CELL...
+//          Keep track of scope and concrete interface along the way
+//          Find all interface references
+//              Add INTFREF to concrete interface's list of references
+//
+//*************************************************************************
+
+#define VL_MT_DISABLED_CODE_UNIT 1
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include "V3Interface.h"
+
+#include "V3Ast.h"
+#include "V3Global.h"
+
+VL_DEFINE_DEBUG_FUNCTIONS;
+
+//######################################################################
+// Track interface references under the Cell they reference
+
+class InlineIntfRefVisitor final : public VNVisitor {
+private:
+    // NODE STATE
+    //   AstVar::user1p()   // AstCell which this Var points to
+    const VNUser1InUse m_inuser1;
+    const VNUser2InUse m_inuser2;
+
+    string m_scope;  // Scope name
+
+    // VISITORS
+    void visit(AstNetlist* nodep) override { iterateChildren(nodep->topModulep()); }
+    void visit(AstCell* nodep) override {
+        VL_RESTORER(m_scope);
+        if (m_scope.empty()) {
+            m_scope = nodep->name();
+        } else {
+            m_scope += "__DOT__" + nodep->name();
+        }
+
+        if (VN_IS(nodep->modp(), Iface)) {
+            nodep->addIntfRefsp(new AstIntfRef{nodep->fileline(), m_scope});
+        }
+        {
+            AstNodeModule* const modp = nodep->modp();
+            // Pass Cell pointers down to the next module
+            for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
+                AstVar* const varp = pinp->modVarp();
+                const AstVarRef* const varrefp = VN_CAST(pinp->exprp(), VarRef);
+                if (!varrefp) continue;
+                const AstVar* const fromVarp = varrefp->varp();
+                const AstIfaceRefDType* const irdtp = VN_CAST(fromVarp->dtypep(), IfaceRefDType);
+                if (!irdtp) continue;
+
+                AstCell* cellp;
+                if ((cellp = VN_CAST(fromVarp->user1p(), Cell)) || (cellp = irdtp->cellp())) {
+                    varp->user1p(cellp);
+                    const string alias = m_scope + "__DOT__" + pinp->name();
+                    cellp->addIntfRefsp(new AstIntfRef{pinp->fileline(), alias});
+                }
+            }
+
+            iterateChildren(modp);
+        }
+    }
+    void visit(AstAssignVarScope* nodep) override {
+        // Reference
+        const AstVarRef* const reflp = VN_CAST(nodep->lhsp(), VarRef);
+        // What the reference refers to
+        const AstVarRef* const refrp = VN_CAST(nodep->rhsp(), VarRef);
+        if (!(reflp && refrp)) return;
+
+        const AstVar* const varlp = reflp->varp();
+        const AstVar* const varrp = refrp->varp();
+        if (!(varlp && varrp)) return;
+
+        AstCell* cellp = VN_CAST(varrp->user1p(), Cell);
+        if (!cellp) {
+            const AstIfaceRefDType* const irdtp = VN_CAST(varrp->dtypep(), IfaceRefDType);
+            if (!irdtp) return;
+
+            cellp = irdtp->cellp();
+        }
+        if (!cellp) return;
+        string alias;
+        if (!m_scope.empty()) alias = m_scope + "__DOT__";
+        alias += varlp->name();
+        cellp->addIntfRefsp(new AstIntfRef{varlp->fileline(), alias});
+    }
+    //--------------------
+    void visit(AstNodeExpr*) override {}  // Accelerate
+    void visit(AstNodeStmt*) override {}  // Accelerate
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+
+public:
+    // CONSTRUCTORS
+    explicit InlineIntfRefVisitor(AstNode* nodep) { iterate(nodep); }
+    ~InlineIntfRefVisitor() override = default;
+};
+
+//######################################################################
+// Interface class functions
+
+void V3Interface::interfaceAll(AstNetlist* nodep) {
+    UINFO(2, __FUNCTION__ << ": " << endl);
+
+    { InlineIntfRefVisitor{nodep}; }
+
+    V3Global::dumpCheckGlobalTree("interface", 0, dumpTreeLevel() >= 3);
+}
diff --git a/src/V3Interface.h b/src/V3Interface.h
new file mode 100644
index 000000000..08bea3574
--- /dev/null
+++ b/src/V3Interface.h
@@ -0,0 +1,34 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Interface references for tracing
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+#ifndef VERILATOR_V3INTERFACE_H_
+#define VERILATOR_V3INTERFACE_H_
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include "V3ThreadSafety.h"
+
+class AstNetlist;
+
+//============================================================================
+
+class V3Interface final {
+public:
+    static void interfaceAll(AstNetlist* nodep) VL_MT_DISABLED;
+};
+
+#endif  // Guard
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index cb2109ea0..99af25820 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -58,6 +58,7 @@
 #include "V3HierBlock.h"
 #include "V3Inline.h"
 #include "V3Inst.h"
+#include "V3Interface.h"
 #include "V3Life.h"
 #include "V3LifePost.h"
 #include "V3LinkDot.h"
@@ -274,6 +275,8 @@ static void process() {
             }
         }
 
+        if (v3Global.opt.trace()) V3Interface::interfaceAll(v3Global.rootp());
+
         if (v3Global.opt.fDfgPostInline()) {
             // Post inline DFG optimization
             V3DfgOptimizer::optimize(v3Global.rootp(), "post inline");
diff --git a/test_regress/t/t_interface_ref_trace_noinl.pl b/test_regress/t/t_interface_ref_trace_noinl.pl
new file mode 100755
index 000000000..f183f40d1
--- /dev/null
+++ b/test_regress/t/t_interface_ref_trace_noinl.pl
@@ -0,0 +1,28 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003-2009 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t/t_interface_ref_trace.v");
+golden_filename("t/t_interface_ref_trace.out");
+
+compile(
+    verilator_flags2 => ['-fno-inline --trace-structs --trace'],
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+vcd_identical($Self->trace_filename,
+              $Self->{golden_filename});
+
+ok(1);
+1;
diff --git a/test_regress/t/t_interface_ref_trace_noinl_notrace.pl b/test_regress/t/t_interface_ref_trace_noinl_notrace.pl
new file mode 100755
index 000000000..b41a3654b
--- /dev/null
+++ b/test_regress/t/t_interface_ref_trace_noinl_notrace.pl
@@ -0,0 +1,24 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003-2009 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t/t_interface_ref_trace.v");
+
+compile(
+    verilator_flags2 => ['-fno-inline'],
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;

From 537650a2cd1bca1b18f6c87657612022fe41dffc Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 3 Oct 2023 22:10:50 -0400
Subject: [PATCH 039/157] Fix stream of 32 bit (#4536).

---
 Changes                     |  1 +
 include/verilated_funcs.h   |  2 +-
 test_regress/t/t_stream5.pl | 23 +++++++++++++++++++++++
 test_regress/t/t_stream5.v  | 37 +++++++++++++++++++++++++++++++++++++
 4 files changed, 62 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_stream5.pl
 create mode 100644 test_regress/t/t_stream5.v

diff --git a/Changes b/Changes
index f40cebad4..9af06d980 100644
--- a/Changes
+++ b/Changes
@@ -17,6 +17,7 @@ Verilator 5.017 devel
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
 * Fix constification of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
 * Fix conversion of integers in $display '%e' (#4528). [muzafferkal]
+* Fix stream of 32 bit (#4536). [Julien Faucher]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 32ab2268e..22285812e 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -1437,7 +1437,7 @@ static inline IData VL_STREAML_FAST_III(int lbits, IData ld, IData rd_log2) VL_P
     if (rd_log2) {
         const uint32_t lbitsFloor = lbits & ~VL_MASK_I(rd_log2);  // max multiple of rd <= lbits
         const uint32_t lbitsRem = lbits - lbitsFloor;  // number of bits in most-sig slice (MSS)
-        const IData msbMask = VL_MASK_I(lbitsRem) << lbitsFloor;  // mask to sel only bits in MSS
+        const IData msbMask = lbitsFloor == 32 ? 0UL : VL_MASK_I(lbitsRem) << lbitsFloor;
         ret = (ret & ~msbMask) | ((ret & msbMask) << ((VL_UL(1) << rd_log2) - lbitsRem));
     }
     switch (rd_log2) {
diff --git a/test_regress/t/t_stream5.pl b/test_regress/t/t_stream5.pl
new file mode 100755
index 000000000..b8493bd06
--- /dev/null
+++ b/test_regress/t/t_stream5.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_stream5.v b/test_regress/t/t_stream5.v
new file mode 100644
index 000000000..1eab118d9
--- /dev/null
+++ b/test_regress/t/t_stream5.v
@@ -0,0 +1,37 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/);
+
+   logic [15:0] i16;
+   logic [15:0] o16;
+   logic [31:0] i32;
+   logic [31:0] o32;
+   logic [63:0] i64;
+   logic [63:0] o64;
+
+   always_comb begin
+      o16 = {<<4{i16}};
+      o32 = {<<4{i32}};
+      o64 = {<<4{i64}};
+   end
+
+   initial begin
+      i16 = 16'hfade;
+      i32 = 32'hcafefade;
+      i64 = 64'hdeaddeedcafefade;
+      #100ns;
+      $display("o16=0x%h i16=0x%h", o16, i16);
+      if (o16 != 16'hEDAF) $stop;
+      $display("o32=0x%h i32=0x%h", o32, i32);
+      if (o32 != 32'hEDAFEFAC) $stop;
+      $display("o64=0x%h i64=0x%h", o64, i64);
+      if (o64 != 64'hEDAFEFACDEEDDAED) $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 45162652dec80d3914b3407876674548506f33f1 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 4 Oct 2023 20:13:59 -0400
Subject: [PATCH 040/157] Commentary

---
 docs/guide/languages.rst | 55 +++++++++++++---------------------------
 1 file changed, 18 insertions(+), 37 deletions(-)

diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index 6eeb84fb1..21b18914d 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -237,11 +237,9 @@ optimizations will be disabled around the latch.
 Structures and Unions
 ---------------------
 
-Presently Verilator only supports packed structs and packed unions.  Rand
-and randc tags on members are ignored.  All structures and unions are
-represented as a single vector, which means that generating one member of a
-structure from blocking, and another from non-blocking assignments is
-unsupported.
+All structures and unions are scheduled together, which means that
+generating one member of a structure from blocking, and another from
+non-blocking assignments is unsupported.
 
 
 .. _Unknown States:
@@ -320,20 +318,6 @@ there will be considered a two-state variable that is read and written
 instead of a four-state variable.
 
 
-Functions & Tasks
------------------
-
-All functions and tasks will be inlined (will not become functions in C.)
-The only support provided is simple statements in tasks (which may
-affect global variables).
-
-Recursive functions and tasks are not supported.  All inputs and outputs
-are automatic as if they had the Verilog 2001 "automatic" keyword
-prepended.  (If you don't know what this means, Verilator will do what you
-probably expect, what C does. The default behavior of Verilog is
-different.)
-
-
 Gate Primitives
 ---------------
 
@@ -383,24 +367,6 @@ Verilator does not support SEREs yet.  All assertion and coverage
 statements must be simple expressions that complete in one cycle.
 
 
-Force statement
----------------
-
-Verilator supports the procedural `force` (and corresponding `release`)
-statement. However, the behavior of the `force` statement does not entirely
-comply with IEEE 1800. According to the standard,
-when a procedural statement of the form `force a = b;` is executed, the
-simulation should behave as if, from that point forwards, a continuous
-assignment `assign a = b;` has been added to override the drivers of `a`.
-More specifically: the value of `a` should be updated whenever the value of
-`b` changes, until a `release a;` statement is executed.
-Verilator instead evaluates the current value of `b` when the `force`
-statement is executed, and forces `a` to that value, without updating it
-until a new `force` or `release` statement is encountered that applies to
-`a`. This non-standard behavior is nevertheless consistent with some other
-simulators.
-
-
 Encrypted Verilog
 -----------------
 
@@ -471,6 +437,21 @@ disable
   provide loop break and continue functionality before SystemVerilog added
   the break and continue keywords.
 
+force, release
+  Verilator supports the procedural `force` (and corresponding `release`)
+  statement. However, the behavior of the `force` statement does not
+  entirely comply with IEEE 1800. According to the standard, when a
+  procedural statement of the form `force a = b;` is executed, the
+  simulation should behave as if, from that point forwards, a continuous
+  assignment `assign a = b;` has been added to override the drivers of `a`.
+  More specifically: the value of `a` should be updated whenever the value
+  of `b` changes, until a `release a;` statement is executed.  Verilator
+  instead evaluates the current value of `b` when the `force` statement is
+  executed, and forces `a` to that value, without updating it until a new
+  `force` or `release` statement is encountered that applies to `a`. This
+  non-standard behavior is nevertheless consistent with some other
+  simulators.
+
 inside
   Inside expressions may not include unpacked array traversal or $ as an
   upper bound.  Case inside and case matches are also unsupported.

From 25fa1d7c6a61edb91de6f1fe0bc7c3c0e0bab337 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 4 Oct 2023 20:16:05 -0400
Subject: [PATCH 041/157] Commentary: Changes update

---
 Changes           | 17 ++++++++++++++---
 docs/spelling.txt |  4 ++++
 2 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/Changes b/Changes
index 9af06d980..2cf70f114 100644
--- a/Changes
+++ b/Changes
@@ -15,11 +15,22 @@ Verilator 5.017 devel
 
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
-* Fix constification of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
-* Fix conversion of integers in $display '%e' (#4528). [muzafferkal]
-* Fix stream of 32 bit (#4536). [Julien Faucher]
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
+* Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
+* Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
+* Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
+* Fix multithreading handling to separate by code units that use/never use it (#4228). [Mariusz Glebocki, Antmicro Ltd.]
+* Fix usage of annotation options (#4486) (#4504). [Michal Czyz]
+* Fix detecting local vars in nested forks (#4493) (#4506). [Kamil Rakoczy]
+* Fix handling input file path separator (#4515) (#4516). [Anthony Donlon]
+* Fix mis-support for parameterized UDPs (#4518). [Anthony Donlon]
+* Fix constant conversion of $realtobits, $bitstoreal (#4522).  [Andrew Nolte]
+* Fix conversion of integers in $display '%e' (#4528). [muzafferkal]
+* Fix non-inlined interface tracing (#3984) (#4530). [Todd Strader]
+* Fix stream operations with operands of struct type (#4531) (#4532). [Ryszard Rozak, Antmicro Ltd.]
+* Fix 'this' in a constructor (#4533). [Ryszard Rozak, Antmicro Ltd.]
+* Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
 
 
 Verilator 5.016 2023-09-16
diff --git a/docs/spelling.txt b/docs/spelling.txt
index d55530c50..a0321e494 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -89,6 +89,7 @@ Engstrom
 Enzo
 Eugen
 Fabrizio
+Faucher
 Fekete
 Ferrandi
 Flachs
@@ -722,6 +723,7 @@ multithreading
 musl
 mutexes
 mux
+muzafferkal
 myftptoyman
 mysignal
 namespace
@@ -760,6 +762,7 @@ pdf
 perf
 perftools
 pgo
+phelter
 picoChip
 pinIndex
 pinout
@@ -815,6 +818,7 @@ readmemb
 readmemh
 realpath
 realtime
+realtobits
 recoding
 recrem
 redeclaring

From 1c738c6b83867d220f2338f2ea9eaa4e9e3d20b0 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Thu, 5 Oct 2023 13:21:33 +0200
Subject: [PATCH 042/157] Fix object destruction after a copy constructor
 (#4540) (#4541)

---
 include/verilated_types.h       |  2 +-
 test_regress/t/t_class_copy2.pl | 21 +++++++++++++++++++
 test_regress/t/t_class_copy2.v  | 36 +++++++++++++++++++++++++++++++++
 3 files changed, 58 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_class_copy2.pl
 create mode 100644 test_regress/t/t_class_copy2.v

diff --git a/include/verilated_types.h b/include/verilated_types.h
index cb40b0e82..9eae185d5 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -1478,7 +1478,7 @@ class VlClass VL_NOT_FINAL : public VlDeletable {
 public:
     // CONSTRUCTORS
     VlClass() { refCountInc(); }
-    VlClass(const VlClass& copied) {}
+    VlClass(const VlClass& copied) { refCountInc(); }
     ~VlClass() override = default;
 };
 
diff --git a/test_regress/t/t_class_copy2.pl b/test_regress/t/t_class_copy2.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_class_copy2.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_copy2.v b/test_regress/t/t_class_copy2.v
new file mode 100644
index 000000000..9fb72e670
--- /dev/null
+++ b/test_regress/t/t_class_copy2.v
@@ -0,0 +1,36 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class Cls;
+   bit x = 1;
+endclass
+
+module t (/*AUTOARG*/);
+   Cls obj1;
+   Cls obj2;
+
+   initial begin
+      obj1 = new;
+      `checkh(obj1.x, 1);
+
+      obj1.x = 0;
+      obj2 = new obj1;
+      `checkh(obj2.x, 0);
+
+      obj2.x = 1;
+      `checkh(obj1.x, 0);
+      `checkh(obj2.x, 1);
+
+      obj2.x = 0;
+      `checkh(obj2.x, 0);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 106664b94271b22008ba3badddfbd0baa666fee5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 5 Oct 2023 08:40:46 -0400
Subject: [PATCH 043/157] Internals: Fix long lines. No functional change.

---
 src/verilog.y | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/verilog.y b/src/verilog.y
index 6d06f969e..fd0c18ca9 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -4465,7 +4465,8 @@ taskId<nodeFTaskp>:
 
 funcId<nodeFTaskp>:                     // IEEE: function_data_type_or_implicit + part of function_body_declaration
         //                      // IEEE: function_data_type_or_implicit must be expanded here to prevent conflict
-        //                      // function_data_type expanded here to prevent conflicts with implicit_type:empty vs data_type:ID
+        //                      // function_data_type expanded here to prevent conflicts with
+        //                      // implicit_type:empty vs data_type:ID
                 /**/ fIdScoped
                         { $$ = $1;
                           $$->fvarp(new AstBasicDType{$<fl>1, LOGIC_IMPLICIT});
@@ -4932,7 +4933,7 @@ fexpr<nodeExprp>:                   // For use as first part of statement (disam
 //UNSUP //
 //UNSUP //---------------------
 //UNSUP //                      // IEEE: expr
-//UNSUP |       BISONPRE_COPY(expr,{s/~l~/ev_/g; s/~r~/ev_/g; s/~p~/ev_/g; s/~noPar__IGNORE~'.'/yP_PAR__IGNORE /g;})       // {copied}
+//UNSUP |       BISONPRE_COPY(expr,{s/~l~/ev_/g; s/~r~/ev_/g; s/~p~/ev_/g; s/~noPar__IGNORE~'.'/yP_PAR__IGNORE /g;})  // {copied}
 //UNSUP //
 //UNSUP //                      // IEEE: '(' event_expression ')'
 //UNSUP //                      // expr:'(' x ')' conflicts with event_expression:'(' event_expression ')'
@@ -5722,7 +5723,8 @@ clocking_eventE<senItemp>:      // IEEE: optional clocking_event
 
 clocking_event<senItemp>:       // IEEE: clocking_event
                 '@' id
-                        { $$ = new AstSenItem{$<fl>2, VEdgeType::ET_CHANGED, new AstParseRef{$<fl>2, VParseRefExp::PX_TEXT, *$2, nullptr, nullptr}}; }
+                        { $$ = new AstSenItem{$<fl>2, VEdgeType::ET_CHANGED,
+                                              new AstParseRef{$<fl>2, VParseRefExp::PX_TEXT, *$2, nullptr, nullptr}}; }
         |       '@' '(' event_expression ')'            { $$ = $3; }
         ;
 
@@ -5787,9 +5789,12 @@ clocking_skew<nodeExprp>:           // IEEE: clocking_skew
         ;
 
 cycle_delay<delayp>:  // IEEE: cycle_delay
-               yP_POUNDPOUND yaINTNUM                   { $$ = new AstDelay{$<fl>1, new AstConst{$<fl>2, *$2}, true}; }
-        |      yP_POUNDPOUND id                         { $$ = new AstDelay{$<fl>1, new AstParseRef{$<fl>2, VParseRefExp::PX_TEXT, *$2, nullptr, nullptr}, true}; }
-        |      yP_POUNDPOUND '(' expr ')'               { $$ = new AstDelay{$<fl>1, $3, true}; }
+               yP_POUNDPOUND yaINTNUM
+                       { $$ = new AstDelay{$<fl>1, new AstConst{$<fl>2, *$2}, true}; }
+        |      yP_POUNDPOUND id
+                       { $$ = new AstDelay{$<fl>1, new AstParseRef{$<fl>2, VParseRefExp::PX_TEXT, *$2, nullptr, nullptr}, true}; }
+        |      yP_POUNDPOUND '(' expr ')'
+                       { $$ = new AstDelay{$<fl>1, $3, true}; }
         ;
 
 //************************************************

From 800a789f5065cb580edf2ed36a8c23b8d732caf4 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 6 Oct 2023 21:33:31 -0400
Subject: [PATCH 044/157] Fix inlining of real functions miscasting (#4543).

---
 Changes                                |  1 +
 src/V3Cast.cpp                         |  8 ++++++--
 src/V3Const.cpp                        |  2 +-
 test_regress/t/t_func_real_exprstmt.pl | 21 +++++++++++++++++++++
 test_regress/t/t_func_real_exprstmt.v  | 23 +++++++++++++++++++++++
 5 files changed, 52 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_func_real_exprstmt.pl
 create mode 100644 test_regress/t/t_func_real_exprstmt.v

diff --git a/Changes b/Changes
index 2cf70f114..2b3e63fac 100644
--- a/Changes
+++ b/Changes
@@ -31,6 +31,7 @@ Verilator 5.017 devel
 * Fix stream operations with operands of struct type (#4531) (#4532). [Ryszard Rozak, Antmicro Ltd.]
 * Fix 'this' in a constructor (#4533). [Ryszard Rozak, Antmicro Ltd.]
 * Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
+* Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
 
 
 Verilator 5.016 2023-09-16
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 7362f9c71..4fb3b868e 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -58,7 +58,7 @@ class CastVisitor final : public VNVisitor {
 private:
     // NODE STATE
     // Entire netlist:
-    //   AstNode::user()                // bool.  Indicates node is of known size
+    //   AstNode::user1()               // bool.  Indicates node is of known size
     const VNUser1InUse m_inuser1;
 
     // STATE
@@ -66,12 +66,12 @@ private:
     // METHODS
 
     void insertCast(AstNodeExpr* nodep, int needsize) {  // We'll insert ABOVE passed node
-        UINFO(4, "  NeedCast " << nodep << endl);
         VNRelinker relinkHandle;
         nodep->unlinkFrBack(&relinkHandle);
         //
         AstCCast* const castp
             = new AstCCast{nodep->fileline(), nodep, needsize, nodep->widthMin()};
+        UINFO(4, "  MadeCast " << static_cast<void*>(castp) << " for " << nodep << endl);
         relinkHandle.relink(castp);
         // if (debug() > 8) castp->dumpTree("-  castins: ");
         //
@@ -170,6 +170,10 @@ private:
         ensureLower32Cast(nodep);
         nodep->user1(1);
     }
+    void visit(AstExprStmt* nodep) override {
+        iterateChildren(nodep);
+        nodep->user1(1);
+    }
     void visit(AstNegate* nodep) override {
         iterateChildren(nodep);
         nodep->user1(nodep->lhsp()->user1());
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index ea0e4bea6..087f4b3af 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1375,7 +1375,7 @@ private:
     AstNode* afterComment(AstNode* nodep) {
         // Ignore comments, such as to determine if a AstIf is empty.
         // nodep may be null, if so return null.
-        while (nodep && VN_IS(nodep, Comment)) { nodep = nodep->nextp(); }
+        while (nodep && VN_IS(nodep, Comment)) nodep = nodep->nextp();
         return nodep;
     }
 
diff --git a/test_regress/t/t_func_real_exprstmt.pl b/test_regress/t/t_func_real_exprstmt.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_func_real_exprstmt.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_func_real_exprstmt.v b/test_regress/t/t_func_real_exprstmt.v
new file mode 100644
index 000000000..4df720960
--- /dev/null
+++ b/test_regress/t/t_func_real_exprstmt.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+
+   function automatic real logWrapper(real x);
+      return $ln(x);
+   endfunction
+
+   initial begin
+      // See bug4543
+      $display("bad x=%f, y=%f", logWrapper(10.0), 1.0 * logWrapper(10.0));
+      $display("noc x=%f, y=%f", $ln(10.0), 1.0 * $ln(10.0));
+      if (logWrapper(10.0) != $ln(10.0)) $stop;
+      if (logWrapper(10.0) != 1.0 * logWrapper(10.0)) $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 0e0df1fb3b430b1fd964142e71eb8d444e9f9320 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 6 Oct 2023 22:38:46 -0400
Subject: [PATCH 045/157] Fix enum functions in localparams (#3999).

---
 Changes                               | 1 +
 src/V3AstNodeDType.h                  | 9 +++++++++
 src/V3Width.cpp                       | 7 ++++---
 src/V3WidthCommit.h                   | 7 ++++++-
 test_regress/t/t_enum_const_methods.v | 9 +++++++++
 5 files changed, 29 insertions(+), 4 deletions(-)

diff --git a/Changes b/Changes
index 2b3e63fac..a2b96cf76 100644
--- a/Changes
+++ b/Changes
@@ -19,6 +19,7 @@ Verilator 5.017 devel
 * Support resizing function call inout arguments (#4467).
 * Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
 * Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
+* Fix enum functions in localparams (#3999). [Andrew Nolte]
 * Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
 * Fix multithreading handling to separate by code units that use/never use it (#4228). [Mariusz Glebocki, Antmicro Ltd.]
 * Fix usage of annotation options (#4486) (#4504). [Michal Czyz]
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index b8ee2c72e..e1353b9a1 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -754,10 +754,14 @@ class AstEnumDType final : public AstNodeDType {
     // Parents: TYPEDEF/MODULE
     // @astgen op1 := childDTypep : Optional[AstNodeDType]
     // @astgen op2 := itemsp : List[AstEnumItem]
+public:
+    using TableMap = std::map<VAttrType, AstVar*>;
+
 private:
     string m_name;  // Name from upper typedef, if any
     AstNodeDType* m_refDTypep = nullptr;  // Elements are of this type after V3Width
     const int m_uniqueNum = 0;
+    TableMap m_tableMap;  // Created table for V3Width only to remove duplicates
 
 public:
     AstEnumDType(FileLine* fl, VFlagChildDType, AstNodeDType* dtp, AstEnumItem* itemsp)
@@ -770,9 +774,12 @@ public:
         widthFromSub(subDTypep());
     }
     ASTGEN_MEMBERS_AstEnumDType;
+
     const char* broken() const override {
         BROKEN_RTN(!((m_refDTypep && !childDTypep() && m_refDTypep->brokeExists())
                      || (!m_refDTypep && childDTypep())));
+        BROKEN_RTN(std::any_of(m_tableMap.begin(), m_tableMap.end(),
+                               [](const auto& p) { return !p.second->brokeExists(); }));
         return nullptr;
     }
     void cloneRelink() override {
@@ -809,6 +816,8 @@ public:
         return count;
     }
     bool isCompound() const override { return false; }
+    TableMap& tableMap() { return m_tableMap; }
+    const TableMap& tableMap() const { return m_tableMap; }
 };
 class AstIfaceRefDType final : public AstNodeDType {
     // Reference to an interface, either for a port, or inside parent cell
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 1d6468001..7f7e8214f 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -7193,8 +7193,9 @@ private:
     }
     AstVar* enumVarp(AstEnumDType* nodep, VAttrType attrType, bool assoc, uint32_t msbdim) {
         // Return a variable table which has specified dimension properties for this variable
-        const auto pos = m_tableMap.find(std::make_pair(nodep, attrType));
-        if (pos != m_tableMap.end()) return pos->second;
+        const auto& tableMapr = nodep->tableMap();
+        const auto pos = tableMapr.find(attrType);
+        if (pos != tableMapr.end()) return pos->second;
         UINFO(9, "Construct Venumtab attr=" << attrType.ascii() << " assoc=" << assoc
                                             << " max=" << msbdim << " for " << nodep << endl);
         AstNodeDType* basep;
@@ -7276,7 +7277,7 @@ private:
             }
         }
         userIterate(varp, nullptr);  // May have already done $unit so must do this var
-        m_tableMap.emplace(std::make_pair(nodep, attrType), varp);
+        nodep->tableMap().emplace(attrType, varp);
         return varp;
     }
 
diff --git a/src/V3WidthCommit.h b/src/V3WidthCommit.h
index 959bde51b..ec538084c 100644
--- a/src/V3WidthCommit.h
+++ b/src/V3WidthCommit.h
@@ -184,13 +184,18 @@ private:
         nodep->replaceWith(nodep->lhsp()->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
-    void visit(AstNodeDType* nodep) override {  //
+    void visit(AstNodeDType* nodep) override {
+        // Note some specific dtypes have unique visitors
         visitIterateNodeDType(nodep);
     }
     void visit(AstNodeUOrStructDType* nodep) override {
         if (nodep->user1SetOnce()) return;  // Process once
         visitIterateNodeDType(nodep);
     }
+    void visit(AstEnumDType* nodep) override {
+        nodep->tableMap().clear();  // Only needed up through V3Width process
+        visitIterateNodeDType(nodep);
+    }
     void visit(AstParamTypeDType* nodep) override {
         if (nodep->user1SetOnce()) return;  // Process once
         visitIterateNodeDType(nodep);
diff --git a/test_regress/t/t_enum_const_methods.v b/test_regress/t/t_enum_const_methods.v
index e5ce9e979..547a19a02 100644
--- a/test_regress/t/t_enum_const_methods.v
+++ b/test_regress/t/t_enum_const_methods.v
@@ -36,11 +36,20 @@ module t ();
 
    localparam string e0_name = get_name(E0);
 
+   function automatic enm_t get_2();
+      enm_t enm;
+      enm = E0;
+      return enm.next.next;
+   endfunction
+
+   localparam enm_t enum_2 = get_2();
+
    initial begin
       if (enum_first != E0) $stop;
       if (enum_last != E2) $stop;
       if (enum_second != E1) $stop;
       if (e0_name != "E0") $stop;
+      if (enum_2 != E2) $stop;
       $write("*-* All Finished *-*\n");
       $finish;
    end

From e2343c03e07db2c40c6a7d71512220e36155f9d9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 6 Oct 2023 23:18:26 -0400
Subject: [PATCH 046/157] Internals: Create V3WidthCommit from overly fat
 header. No functional change intended.

---
 src/CMakeLists.txt    |   2 +
 src/Makefile_obj.in   |   3 +-
 src/V3Width.cpp       |  12 +--
 src/V3Width.h         |   2 -
 src/V3WidthCommit.cpp | 236 ++++++++++++++++++++++++++++++++++++++++++
 src/V3WidthCommit.h   | 235 +----------------------------------------
 src/V3WidthRemove.h   |  63 +++++++++++
 src/Verilator.cpp     |   3 +-
 8 files changed, 312 insertions(+), 244 deletions(-)
 create mode 100644 src/V3WidthCommit.cpp
 create mode 100644 src/V3WidthRemove.h

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 393eba402..b2fbf9f4d 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -166,6 +166,7 @@ set(HEADERS
     V3Waiver.h
     V3Width.h
     V3WidthCommit.h
+    V3WidthRemove.h
     VlcBucket.h
     VlcOptions.h
     VlcPoint.h
@@ -298,6 +299,7 @@ set(COMMON_SOURCES
     V3VariableOrder.cpp
     V3Waiver.cpp
     V3Width.cpp
+    V3WidthCommit.cpp
     V3WidthSel.cpp
     V3ParseImp.cpp
     V3ParseGrammar.cpp
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index b076f1a2a..36ae799bb 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -278,6 +278,7 @@ RAW_OBJS = \
 	V3VariableOrder.o \
 	V3Waiver.o \
 	V3Width.o \
+	V3WidthCommit.o \
 	V3WidthSel.o \
 
 # verilator_coverage
@@ -291,7 +292,7 @@ NON_STANDALONE_HEADERS = \
 	V3AstNodeOther.h  \
 	V3DfgVertices.h  \
 	V3ThreadPool.h \
-	V3WidthCommit.h  \
+	V3WidthRemove.h \
 
 AST_DEFS := \
   V3AstNodeDType.h \
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 7f7e8214f..b87fe81e4 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -77,12 +77,13 @@
 #include "V3Randomize.h"
 #include "V3String.h"
 #include "V3Task.h"
+#include "V3WidthCommit.h"
 
 #include <algorithm>
 
 // More code; this file was getting too large; see actions there
 #define VERILATOR_V3WIDTH_CPP_
-#include "V3WidthCommit.h"
+#include "V3WidthRemove.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
@@ -4311,8 +4312,7 @@ private:
         if (VN_IS(valuep, Const)) {
             // Forming a AstConcat will cause problems with
             // unsized (uncommitted sized) constants
-            if (AstConst* const newp
-                = WidthCommitVisitor::newIfConstCommitSize(VN_AS(valuep, Const))) {
+            if (AstConst* const newp = V3WidthCommit::newIfConstCommitSize(VN_AS(valuep, Const))) {
                 VL_DO_DANGLING(pushDeletep(valuep), valuep);
                 valuep = newp;
             }
@@ -7614,9 +7614,3 @@ AstNode* V3Width::widthGenerateParamsEdit(
     // No WidthRemoveVisitor, as don't want to drop $signed etc inside gen blocks
     return nodep;
 }
-
-void V3Width::widthCommit(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
-    { WidthCommitVisitor{nodep}; }  // Destruct before checking
-    V3Global::dumpCheckGlobalTree("widthcommit", 0, dumpTreeLevel() >= 6);
-}
diff --git a/src/V3Width.h b/src/V3Width.h
index 29021146f..fd9f17af5 100644
--- a/src/V3Width.h
+++ b/src/V3Width.h
@@ -33,8 +33,6 @@ public:
     static void width(AstNetlist* nodep) VL_MT_DISABLED;
     static AstNode* widthParamsEdit(AstNode* nodep) VL_MT_DISABLED;
     static AstNode* widthGenerateParamsEdit(AstNode* nodep) VL_MT_DISABLED;
-    // Final step... Mark all widths as equal
-    static void widthCommit(AstNetlist* nodep) VL_MT_DISABLED;
 
     static AstNodeDType* getCommonClassTypep(AstNode* nodep1, AstNode* nodep2) VL_MT_DISABLED;
 
diff --git a/src/V3WidthCommit.cpp b/src/V3WidthCommit.cpp
new file mode 100644
index 000000000..295d3be8d
--- /dev/null
+++ b/src/V3WidthCommit.cpp
@@ -0,0 +1,236 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Commit expression widths
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+//
+// Remove all $signed, $unsigned, we're done with them.
+//
+// This step is only called on real V3Width, not intermediate e.g. widthParams
+//
+//*************************************************************************
+
+#define VL_MT_DISABLED_CODE_UNIT 1
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include "V3WidthCommit.h"
+
+VL_DEFINE_DEBUG_FUNCTIONS;
+
+//######################################################################
+// Now that all widthing is complete,
+// Copy all width() to widthMin().  V3Const expects this
+
+class WidthCommitVisitor final : public VNVisitor {
+    // NODE STATE
+    // AstVar::user1p           -> bool, processed
+    const VNUser1InUse m_inuser1;
+
+    // STATE
+    AstNodeModule* m_modp = nullptr;
+
+public:
+    // METHODS
+    VL_DEFINE_DEBUG_FUNCTIONS;
+
+private:
+    // METHODS
+    void editDType(AstNode* nodep) {
+        // Edit dtypes for this node
+        nodep->dtypep(editOneDType(nodep->dtypep()));
+    }
+    AstNodeDType* editOneDType(AstNodeDType* nodep) {
+        // See if the dtype/refDType can be converted to a standard one
+        // This reduces the number of dtypes in the system, and since
+        // dtypep() figures into sameTree() results in better optimizations
+        if (!nodep) return nullptr;
+        // Recurse to handle the data type, as may change the size etc of this type
+        if (!nodep->user1()) iterate(nodep);
+        // Look for duplicate
+        if (AstBasicDType* const bdtypep = VN_CAST(nodep, BasicDType)) {
+            AstBasicDType* const newp = nodep->findInsertSameDType(bdtypep);
+            if (newp != bdtypep && debug() >= 9) {
+                UINFO(9, "dtype replacement ");
+                nodep->dumpSmall(std::cout);
+                std::cout << "  ---->  ";
+                newp->dumpSmall(std::cout);
+                std::cout << std::endl;
+            }
+            return newp;
+        }
+        return nodep;
+    }
+    void classEncapCheck(AstNode* nodep, AstNode* defp, AstClass* defClassp) {
+        // Call on non-local class to check local/protected status and complain
+        bool local = false;
+        bool prot = false;
+        if (const auto varp = VN_CAST(defp, Var)) {
+            local = varp->isHideLocal();
+            prot = varp->isHideProtected();
+        } else if (const auto ftaskp = VN_CAST(defp, NodeFTask)) {
+            local = ftaskp->isHideLocal();
+            prot = ftaskp->isHideProtected();
+        } else {
+            nodep->v3fatalSrc("ref to unhandled definition type " << defp->prettyTypeName());
+        }
+        if (local || prot) {
+            const auto refClassp = VN_CAST(m_modp, Class);
+            const char* how = nullptr;
+            if (local && defClassp && refClassp != defClassp) {
+                how = "'local'";
+            } else if (prot && defClassp && !AstClass::isClassExtendedFrom(refClassp, defClassp)) {
+                how = "'protected'";
+            }
+            if (how) {
+                UINFO(9, "refclass " << refClassp << endl);
+                UINFO(9, "defclass " << defClassp << endl);
+                nodep->v3warn(ENCAPSULATED, nodep->prettyNameQ()
+                                                << " is hidden as " << how
+                                                << " within this context (IEEE 1800-2017 8.18)\n"
+                                                << nodep->warnContextPrimary() << endl
+                                                << nodep->warnOther()
+                                                << "... Location of definition" << endl
+                                                << defp->warnContextSecondary());
+            }
+        }
+    }
+
+    // VISITORS
+    void visit(AstNodeModule* nodep) override {
+        VL_RESTORER(m_modp);
+        {
+            m_modp = nodep;
+            iterateChildren(nodep);
+            editDType(nodep);
+        }
+    }
+    void visit(AstConst* nodep) override {
+        if (nodep->user1SetOnce()) return;  // Process once
+        UASSERT_OBJ(nodep->dtypep(), nodep, "No dtype");
+        iterate(nodep->dtypep());  // Do datatype first
+        if (AstConst* const newp = V3WidthCommit::newIfConstCommitSize(nodep)) {
+            nodep->replaceWith(newp);
+            AstNode* const oldp = nodep;
+            nodep = newp;
+            // if (debug() > 4) oldp->dumpTree("-  fixConstSize_old: ");
+            // if (debug() > 4) newp->dumpTree("-              _new: ");
+            VL_DO_DANGLING(pushDeletep(oldp), oldp);
+        }
+        editDType(nodep);
+    }
+    void visit(AstCastWrap* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        UINFO(6, " Replace " << nodep << " w/ " << nodep->lhsp() << endl);
+        nodep->replaceWith(nodep->lhsp()->unlinkFrBack());
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+    }
+    void visit(AstNodeDType* nodep) override {
+        // Note some specific dtypes have unique visitors
+        visitIterateNodeDType(nodep);
+    }
+    void visit(AstNodeUOrStructDType* nodep) override {
+        if (nodep->user1SetOnce()) return;  // Process once
+        visitIterateNodeDType(nodep);
+    }
+    void visit(AstEnumDType* nodep) override {
+        nodep->tableMap().clear();  // Only needed up through V3Width process
+        visitIterateNodeDType(nodep);
+    }
+    void visit(AstParamTypeDType* nodep) override {
+        if (nodep->user1SetOnce()) return;  // Process once
+        visitIterateNodeDType(nodep);
+        // Move to type table as all dtype pointers must resolve there
+        nodep->unlinkFrBack();  // Make non-child
+        v3Global.rootp()->typeTablep()->addTypesp(nodep);
+    }
+    void visitIterateNodeDType(AstNodeDType* nodep) {
+        // Rather than use dtypeChg which may make new nodes, we edit in place,
+        // as we don't need to preserve any widthMin's, and every dtype with the same width
+        // gets an identical edit.
+        if (nodep->user1SetOnce()) return;  // Process once
+        nodep->widthMinFromWidth();
+        // Too late to any unspecified sign to be anything but unsigned
+        if (nodep->numeric().isNosign()) nodep->numeric(VSigning::UNSIGNED);
+        iterateChildren(nodep);
+        nodep->virtRefDTypep(editOneDType(nodep->virtRefDTypep()));
+        nodep->virtRefDType2p(editOneDType(nodep->virtRefDType2p()));
+    }
+    void visit(AstNodeFTask* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        AstClass* classp = VN_CAST(m_modp, Class);
+        if (nodep->classMethod() && nodep->pureVirtual() && classp && !classp->isInterfaceClass()
+            && !classp->isVirtual()) {
+            nodep->v3error(
+                "Illegal to have 'pure virtual' in non-virtual class (IEEE 1800-2017 8.21)");
+        }
+    }
+    void visit(AstNodeVarRef* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        classEncapCheck(nodep, nodep->varp(), VN_CAST(nodep->classOrPackagep(), Class));
+    }
+    void visit(AstNodeFTaskRef* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        classEncapCheck(nodep, nodep->taskp(), VN_CAST(nodep->classOrPackagep(), Class));
+    }
+    void visit(AstMemberSel* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        if (auto* const classrefp = VN_CAST(nodep->fromp()->dtypep(), ClassRefDType)) {
+            classEncapCheck(nodep, nodep->varp(), classrefp->classp());
+        }  // else might be struct, etc
+    }
+    void visit(AstVar* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+        if (nodep->isFuncLocal() && nodep->direction() == VDirection::INPUT && nodep->valuep()) {
+            // It's the default value of optional argument.
+            // Such values are added to function calls in V3Width so can be removed now
+            pushDeletep(nodep->valuep()->unlinkFrBack());
+        }
+    }
+    void visit(AstNodePreSel* nodep) override {  // LCOV_EXCL_LINE
+        // This check could go anywhere after V3Param
+        nodep->v3fatalSrc("Presels should have been removed before this point");
+    }
+    void visit(AstNode* nodep) override {
+        iterateChildren(nodep);
+        editDType(nodep);
+    }
+
+public:
+    // CONSTRUCTORS
+    explicit WidthCommitVisitor(AstNetlist* nodep) {
+        // Were changing widthMin's, so the table is now somewhat trashed
+        nodep->typeTablep()->clearCache();
+        iterate(nodep);
+        // Don't want to AstTypeTable::repairCache, as all needed nodes
+        // have been added back in; a repair would prevent dead nodes from
+        // being detected
+    }
+    ~WidthCommitVisitor() override = default;
+};
+
+//######################################################################
+// V3WidthCommit class functions
+
+void V3WidthCommit::widthCommit(AstNetlist* nodep) {
+    UINFO(2, __FUNCTION__ << ": " << endl);
+    { WidthCommitVisitor{nodep}; }  // Destruct before checking
+    V3Global::dumpCheckGlobalTree("widthcommit", 0, dumpTreeLevel() >= 6);
+}
diff --git a/src/V3WidthCommit.h b/src/V3WidthCommit.h
index ec538084c..4c61e0da8 100644
--- a/src/V3WidthCommit.h
+++ b/src/V3WidthCommit.h
@@ -23,60 +23,10 @@
 #include "V3Ast.h"
 #include "V3Error.h"
 
-// clang-format off
-#ifndef VERILATOR_V3WIDTH_CPP_
-# error "V3WidthCommit for V3Width internal use only"
-#endif
-// clang-format on
-
-//######################################################################
-
-/// Remove all $signed, $unsigned, we're done with them.
-/// This step is only called on real V3Width, not intermediate e.g. widthParams
-
-class WidthRemoveVisitor final : public VNVisitor {
-    // METHODS
-    VL_DEFINE_DEBUG_FUNCTIONS;
-
-    void replaceWithSignedVersion(AstNode* nodep, AstNode* newp) {
-        UINFO(6, " Replace " << nodep << " w/ " << newp << endl);
-        nodep->replaceWith(newp);
-        newp->dtypeFrom(nodep);
-        VL_DO_DANGLING(pushDeletep(nodep), nodep);
-    }
-
-    // VISITORS
-    void visit(AstSigned* nodep) override {
-        VL_DO_DANGLING(replaceWithSignedVersion(nodep, nodep->lhsp()->unlinkFrBack()), nodep);
-    }
-    void visit(AstUnsigned* nodep) override {
-        VL_DO_DANGLING(replaceWithSignedVersion(nodep, nodep->lhsp()->unlinkFrBack()), nodep);
-    }
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+//============================================================================
 
+class V3WidthCommit final {
 public:
-    // CONSTRUCTORS
-    WidthRemoveVisitor() = default;
-    ~WidthRemoveVisitor() override = default;
-    AstNode* mainAcceptEdit(AstNode* nodep) { return iterateSubtreeReturnEdits(nodep); }
-};
-
-//######################################################################
-// Now that all widthing is complete,
-// Copy all width() to widthMin().  V3Const expects this
-
-class WidthCommitVisitor final : public VNVisitor {
-    // NODE STATE
-    // AstVar::user1p           -> bool, processed
-    const VNUser1InUse m_inuser1;
-
-    // STATE
-    AstNodeModule* m_modp = nullptr;
-
-public:
-    // METHODS
-    VL_DEFINE_DEBUG_FUNCTIONS;
-
     static AstConst* newIfConstCommitSize(AstConst* nodep) {
         if (((nodep->dtypep()->width() != nodep->num().width()) || !nodep->num().sized())
             && !nodep->num().isString()) {  // Need to force the number from unsized to sized
@@ -92,185 +42,8 @@ public:
         }
     }
 
-private:
-    // METHODS
-    void editDType(AstNode* nodep) {
-        // Edit dtypes for this node
-        nodep->dtypep(editOneDType(nodep->dtypep()));
-    }
-    AstNodeDType* editOneDType(AstNodeDType* nodep) {
-        // See if the dtype/refDType can be converted to a standard one
-        // This reduces the number of dtypes in the system, and since
-        // dtypep() figures into sameTree() results in better optimizations
-        if (!nodep) return nullptr;
-        // Recurse to handle the data type, as may change the size etc of this type
-        if (!nodep->user1()) iterate(nodep);
-        // Look for duplicate
-        if (AstBasicDType* const bdtypep = VN_CAST(nodep, BasicDType)) {
-            AstBasicDType* const newp = nodep->findInsertSameDType(bdtypep);
-            if (newp != bdtypep && debug() >= 9) {
-                UINFO(9, "dtype replacement ");
-                nodep->dumpSmall(std::cout);
-                std::cout << "  ---->  ";
-                newp->dumpSmall(std::cout);
-                std::cout << std::endl;
-            }
-            return newp;
-        }
-        return nodep;
-    }
-    void classEncapCheck(AstNode* nodep, AstNode* defp, AstClass* defClassp) {
-        // Call on non-local class to check local/protected status and complain
-        bool local = false;
-        bool prot = false;
-        if (const auto varp = VN_CAST(defp, Var)) {
-            local = varp->isHideLocal();
-            prot = varp->isHideProtected();
-        } else if (const auto ftaskp = VN_CAST(defp, NodeFTask)) {
-            local = ftaskp->isHideLocal();
-            prot = ftaskp->isHideProtected();
-        } else {
-            nodep->v3fatalSrc("ref to unhandled definition type " << defp->prettyTypeName());
-        }
-        if (local || prot) {
-            const auto refClassp = VN_CAST(m_modp, Class);
-            const char* how = nullptr;
-            if (local && defClassp && refClassp != defClassp) {
-                how = "'local'";
-            } else if (prot && defClassp && !AstClass::isClassExtendedFrom(refClassp, defClassp)) {
-                how = "'protected'";
-            }
-            if (how) {
-                UINFO(9, "refclass " << refClassp << endl);
-                UINFO(9, "defclass " << defClassp << endl);
-                nodep->v3warn(ENCAPSULATED, nodep->prettyNameQ()
-                                                << " is hidden as " << how
-                                                << " within this context (IEEE 1800-2017 8.18)\n"
-                                                << nodep->warnContextPrimary() << endl
-                                                << nodep->warnOther()
-                                                << "... Location of definition" << endl
-                                                << defp->warnContextSecondary());
-            }
-        }
-    }
-
-    // VISITORS
-    void visit(AstNodeModule* nodep) override {
-        VL_RESTORER(m_modp);
-        {
-            m_modp = nodep;
-            iterateChildren(nodep);
-            editDType(nodep);
-        }
-    }
-    void visit(AstConst* nodep) override {
-        if (nodep->user1SetOnce()) return;  // Process once
-        UASSERT_OBJ(nodep->dtypep(), nodep, "No dtype");
-        iterate(nodep->dtypep());  // Do datatype first
-        if (AstConst* const newp = newIfConstCommitSize(nodep)) {
-            nodep->replaceWith(newp);
-            AstNode* const oldp = nodep;
-            nodep = newp;
-            // if (debug() > 4) oldp->dumpTree("-  fixConstSize_old: ");
-            // if (debug() > 4) newp->dumpTree("-              _new: ");
-            VL_DO_DANGLING(pushDeletep(oldp), oldp);
-        }
-        editDType(nodep);
-    }
-    void visit(AstCastWrap* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        UINFO(6, " Replace " << nodep << " w/ " << nodep->lhsp() << endl);
-        nodep->replaceWith(nodep->lhsp()->unlinkFrBack());
-        VL_DO_DANGLING(pushDeletep(nodep), nodep);
-    }
-    void visit(AstNodeDType* nodep) override {
-        // Note some specific dtypes have unique visitors
-        visitIterateNodeDType(nodep);
-    }
-    void visit(AstNodeUOrStructDType* nodep) override {
-        if (nodep->user1SetOnce()) return;  // Process once
-        visitIterateNodeDType(nodep);
-    }
-    void visit(AstEnumDType* nodep) override {
-        nodep->tableMap().clear();  // Only needed up through V3Width process
-        visitIterateNodeDType(nodep);
-    }
-    void visit(AstParamTypeDType* nodep) override {
-        if (nodep->user1SetOnce()) return;  // Process once
-        visitIterateNodeDType(nodep);
-        // Move to type table as all dtype pointers must resolve there
-        nodep->unlinkFrBack();  // Make non-child
-        v3Global.rootp()->typeTablep()->addTypesp(nodep);
-    }
-    void visitIterateNodeDType(AstNodeDType* nodep) {
-        // Rather than use dtypeChg which may make new nodes, we edit in place,
-        // as we don't need to preserve any widthMin's, and every dtype with the same width
-        // gets an identical edit.
-        if (nodep->user1SetOnce()) return;  // Process once
-        nodep->widthMinFromWidth();
-        // Too late to any unspecified sign to be anything but unsigned
-        if (nodep->numeric().isNosign()) nodep->numeric(VSigning::UNSIGNED);
-        iterateChildren(nodep);
-        nodep->virtRefDTypep(editOneDType(nodep->virtRefDTypep()));
-        nodep->virtRefDType2p(editOneDType(nodep->virtRefDType2p()));
-    }
-    void visit(AstNodeFTask* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        AstClass* classp = VN_CAST(m_modp, Class);
-        if (nodep->classMethod() && nodep->pureVirtual() && classp && !classp->isInterfaceClass()
-            && !classp->isVirtual()) {
-            nodep->v3error(
-                "Illegal to have 'pure virtual' in non-virtual class (IEEE 1800-2017 8.21)");
-        }
-    }
-    void visit(AstNodeVarRef* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        classEncapCheck(nodep, nodep->varp(), VN_CAST(nodep->classOrPackagep(), Class));
-    }
-    void visit(AstNodeFTaskRef* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        classEncapCheck(nodep, nodep->taskp(), VN_CAST(nodep->classOrPackagep(), Class));
-    }
-    void visit(AstMemberSel* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        if (auto* const classrefp = VN_CAST(nodep->fromp()->dtypep(), ClassRefDType)) {
-            classEncapCheck(nodep, nodep->varp(), classrefp->classp());
-        }  // else might be struct, etc
-    }
-    void visit(AstVar* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-        if (nodep->isFuncLocal() && nodep->direction() == VDirection::INPUT && nodep->valuep()) {
-            // It's the default value of optional argument.
-            // Such values are added to function calls in V3Width so can be removed now
-            pushDeletep(nodep->valuep()->unlinkFrBack());
-        }
-    }
-    void visit(AstNodePreSel* nodep) override {  // LCOV_EXCL_LINE
-        // This check could go anywhere after V3Param
-        nodep->v3fatalSrc("Presels should have been removed before this point");
-    }
-    void visit(AstNode* nodep) override {
-        iterateChildren(nodep);
-        editDType(nodep);
-    }
-
-public:
-    // CONSTRUCTORS
-    explicit WidthCommitVisitor(AstNetlist* nodep) {
-        // Were changing widthMin's, so the table is now somewhat trashed
-        nodep->typeTablep()->clearCache();
-        iterate(nodep);
-        // Don't want to AstTypeTable::repairCache, as all needed nodes
-        // have been added back in; a repair would prevent dead nodes from
-        // being detected
-    }
-    ~WidthCommitVisitor() override = default;
+    // Final step... Mark all widths as equal
+    static void widthCommit(AstNetlist* nodep) VL_MT_DISABLED;
 };
 
 //######################################################################
diff --git a/src/V3WidthRemove.h b/src/V3WidthRemove.h
new file mode 100644
index 000000000..23469299e
--- /dev/null
+++ b/src/V3WidthRemove.h
@@ -0,0 +1,63 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Cleanup stage in V3Width
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+#ifndef VERILATOR_V3WIDTHREMOVE_H_
+#define VERILATOR_V3WIDTHREMOVE_H_
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include "V3Ast.h"
+#include "V3Error.h"
+
+// clang-format off
+#ifndef VERILATOR_V3WIDTH_CPP_
+# error "V3WidthRemove for V3Width internal use only"
+#endif
+// clang-format on
+
+//######################################################################
+
+class WidthRemoveVisitor final : public VNVisitor {
+    // METHODS
+    VL_DEFINE_DEBUG_FUNCTIONS;
+
+    void replaceWithSignedVersion(AstNode* nodep, AstNode* newp) {
+        UINFO(6, " Replace " << nodep << " w/ " << newp << endl);
+        nodep->replaceWith(newp);
+        newp->dtypeFrom(nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+    }
+
+    // VISITORS
+    void visit(AstSigned* nodep) override {
+        VL_DO_DANGLING(replaceWithSignedVersion(nodep, nodep->lhsp()->unlinkFrBack()), nodep);
+    }
+    void visit(AstUnsigned* nodep) override {
+        VL_DO_DANGLING(replaceWithSignedVersion(nodep, nodep->lhsp()->unlinkFrBack()), nodep);
+    }
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+
+public:
+    // CONSTRUCTORS
+    WidthRemoveVisitor() = default;
+    ~WidthRemoveVisitor() override = default;
+    AstNode* mainAcceptEdit(AstNode* nodep) { return iterateSubtreeReturnEdits(nodep); }
+};
+
+//######################################################################
+
+#endif  // Guard
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 99af25820..e5ba41c55 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -104,6 +104,7 @@
 #include "V3VariableOrder.h"
 #include "V3Waiver.h"
 #include "V3Width.h"
+#include "V3WidthCommit.h"
 
 #include <ctime>
 
@@ -189,7 +190,7 @@ static void process() {
         V3Error::abortIfErrors();
 
         // Commit to the widths we've chosen; Make widthMin==width
-        V3Width::widthCommit(v3Global.rootp());
+        V3WidthCommit::widthCommit(v3Global.rootp());
         v3Global.assertDTypesResolved(true);
         v3Global.widthMinUsage(VWidthMinUsage::MATCHES_WIDTH);
 

From 1d3d59243c321e14f9672d4dc04af147bbf656b0 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 7 Oct 2023 14:29:46 -0400
Subject: [PATCH 047/157] Fix preprocessor to show `line 2 on resumed file per
 IEEE.

---
 Changes                               |  1 +
 src/V3PreLex.l                        |  4 ++--
 test_regress/t/t_lint_eofline.out     |  2 +-
 test_regress/t/t_pipe_filter.out      | 10 +++++-----
 test_regress/t/t_pp_pragma_bad.out    |  2 +-
 test_regress/t/t_preproc.out          | 18 +++++++++---------
 test_regress/t/t_preproc_comments.out | 18 +++++++++---------
 test_regress/t/t_preproc_def09.out    |  2 +-
 8 files changed, 29 insertions(+), 28 deletions(-)

diff --git a/Changes b/Changes
index a2b96cf76..64c4f6832 100644
--- a/Changes
+++ b/Changes
@@ -33,6 +33,7 @@ Verilator 5.017 devel
 * Fix 'this' in a constructor (#4533). [Ryszard Rozak, Antmicro Ltd.]
 * Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
+* Fix preprocessor to show `line 2 on resumed file.
 
 
 Verilator 5.016 2023-09-16
diff --git a/src/V3PreLex.l b/src/V3PreLex.l
index 9c84b9ed5..3209aa8bf 100644
--- a/src/V3PreLex.l
+++ b/src/V3PreLex.l
@@ -583,7 +583,7 @@ string V3PreLex::endOfStream(bool& againr) {
     } else if (curStreamp()->m_termState == 2) {
         // Now ending `line
         curStreamp()->m_termState = 3;
-        return curFilelinep()->lineDirectiveStrg(2);  // Exit old file
+        return curFilelinep()->lineDirectiveStrg(0);  // THe "2" exit is below
     } else {
         // Final shutdown phase for a stream, we can finally change the
         // current fileline to the new stream
@@ -603,7 +603,7 @@ string V3PreLex::endOfStream(bool& againr) {
         if (curStreamp()->m_eof) {
             return "";
         } else {
-            return curFilelinep()->lineDirectiveStrg(0);  // Reenter resumed file
+            return curFilelinep()->lineDirectiveStrg(2);  // Reenter resumed file
         }
     }
 }
diff --git a/test_regress/t/t_lint_eofline.out b/test_regress/t/t_lint_eofline.out
index d4f4a5251..3de26aff4 100644
--- a/test_regress/t/t_lint_eofline.out
+++ b/test_regress/t/t_lint_eofline.out
@@ -1,3 +1,3 @@
 `line 1 "obj_vlt/t_lint_eofline/t_lint_eofline_bad.v" 1
 
-`line 2 "obj_vlt/t_lint_eofline/t_lint_eofline_bad.v" 2
+`line 2 "obj_vlt/t_lint_eofline/t_lint_eofline_bad.v" 0
diff --git a/test_regress/t/t_pipe_filter.out b/test_regress/t/t_pipe_filter.out
index 60d00f061..77571bb19 100644
--- a/test_regress/t/t_pipe_filter.out
+++ b/test_regress/t/t_pipe_filter.out
@@ -35,8 +35,8 @@ inc line 7;
 inc line 8;   
 inc line 9;
 
-`line 14 "t/t_pipe_filter_inc.vh" 2
-`line 14 "t/t_pipe_filter.v" 0
+`line 14 "t/t_pipe_filter_inc.vh" 0
+`line 14 "t/t_pipe_filter.v" 2
 
 `line 15 "t/t_pipe_filter.v" 0
  
@@ -59,12 +59,12 @@ inc line 7;
 inc line 8;   
 inc line 9;
 
-`line 14 "t/t_pipe_filter_inc.vh" 2
-`line 16 "t/t_pipe_filter.v" 0
+`line 14 "t/t_pipe_filter_inc.vh" 0
+`line 16 "t/t_pipe_filter.v" 2
 
 
 `line 18 "t/t_pipe_filter.v" 0
 example line 15;
 example line 16;
 
-`line 21 "t/t_pipe_filter.v" 2
+`line 21 "t/t_pipe_filter.v" 0
diff --git a/test_regress/t/t_pp_pragma_bad.out b/test_regress/t/t_pp_pragma_bad.out
index 713607531..7e36d642b 100644
--- a/test_regress/t/t_pp_pragma_bad.out
+++ b/test_regress/t/t_pp_pragma_bad.out
@@ -13,5 +13,5 @@
 `line 7 "t/t_pp_pragma_bad.v" 0
 `pragma
 
-`line 9 "t/t_pp_pragma_bad.v" 2
+`line 9 "t/t_pp_pragma_bad.v" 0
 %Error: Exiting due to
diff --git a/test_regress/t/t_preproc.out b/test_regress/t/t_preproc.out
index 6e09e8fcd..83cefad3a 100644
--- a/test_regress/t/t_preproc.out
+++ b/test_regress/t/t_preproc.out
@@ -50,12 +50,12 @@ At file "t/t_preproc_inc2.vh"  line 5
   
 
 
-`line 110 "inc3_a_filename_from_line_directive" 2
-`line 7 "t/t_preproc_inc2.vh" 0
+`line 110 "inc3_a_filename_from_line_directive" 0
+`line 7 "t/t_preproc_inc2.vh" 2
 
 
-`line 9 "t/t_preproc_inc2.vh" 2
-`line 10 "t/t_preproc.v" 0
+`line 9 "t/t_preproc_inc2.vh" 0
+`line 10 "t/t_preproc.v" 2
 
 
 `line 12 "t/t_preproc.v" 0
@@ -372,8 +372,8 @@ begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
 `line 6 "t/t_preproc_inc4.vh" 0
  
 
-`line 8 "t/t_preproc_inc4.vh" 2
-`line 236 "t/t_preproc.v" 0
+`line 8 "t/t_preproc_inc4.vh" 0
+`line 236 "t/t_preproc.v" 2
 
 `line 237 "t/t_preproc.v" 0
  
@@ -701,8 +701,8 @@ hello4hello4hello4hello4
 `line 6 "t/t_preproc_inc4.vh" 0
  
 
-`line 8 "t/t_preproc_inc4.vh" 2
-`line 444 "t/t_preproc.v" 0
+`line 8 "t/t_preproc_inc4.vh" 0
+`line 444 "t/t_preproc.v" 2
 
 `line 445 "t/t_preproc.v" 0
    
@@ -1045,4 +1045,4 @@ predef 2 2
  
  
 
-`line 729 "t/t_preproc.v" 2
+`line 729 "t/t_preproc.v" 0
diff --git a/test_regress/t/t_preproc_comments.out b/test_regress/t/t_preproc_comments.out
index ba69fa2c0..8b01ff8bf 100644
--- a/test_regress/t/t_preproc_comments.out
+++ b/test_regress/t/t_preproc_comments.out
@@ -50,12 +50,12 @@ At file "t/t_preproc_inc2.vh"  line 5
   
 
 
-`line 110 "inc3_a_filename_from_line_directive" 2
-`line 7 "t/t_preproc_inc2.vh" 0
+`line 110 "inc3_a_filename_from_line_directive" 0
+`line 7 "t/t_preproc_inc2.vh" 2
 
 
-`line 9 "t/t_preproc_inc2.vh" 2
-`line 10 "t/t_preproc.v" 0
+`line 9 "t/t_preproc_inc2.vh" 0
+`line 10 "t/t_preproc.v" 2
 
 
 `line 12 "t/t_preproc.v" 0
@@ -372,8 +372,8 @@ begin addr <= ({regs[6], regs[7]}); wdata <= (rdata); wr <= 1; end  more
 `line 6 "t/t_preproc_inc4.vh" 0
  
 
-`line 8 "t/t_preproc_inc4.vh" 2
-`line 236 "t/t_preproc.v" 0
+`line 8 "t/t_preproc_inc4.vh" 0
+`line 236 "t/t_preproc.v" 2
 
 `line 237 "t/t_preproc.v" 0
  
@@ -706,8 +706,8 @@ hello4hello4hello4hello4
 `line 6 "t/t_preproc_inc4.vh" 0
  
 
-`line 8 "t/t_preproc_inc4.vh" 2
-`line 444 "t/t_preproc.v" 0
+`line 8 "t/t_preproc_inc4.vh" 0
+`line 444 "t/t_preproc.v" 2
 
 `line 445 "t/t_preproc.v" 0
    
@@ -1050,4 +1050,4 @@ predef 2 2
 // After `undefineall above, for testing --dump-defines 
  
 
-`line 729 "t/t_preproc.v" 2
+`line 729 "t/t_preproc.v" 0
diff --git a/test_regress/t/t_preproc_def09.out b/test_regress/t/t_preproc_def09.out
index 1958e614e..f6abcc305 100644
--- a/test_regress/t/t_preproc_def09.out
+++ b/test_regress/t/t_preproc_def09.out
@@ -84,4 +84,4 @@ HERE-72 - Line71
 `line 74 "t/t_preproc_def09.v" 0
  
 
-`line 76 "t/t_preproc_def09.v" 2
+`line 76 "t/t_preproc_def09.v" 0

From 7f38414276e359c768351e1a2e293fd845eb44f1 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 8 Oct 2023 01:02:23 -0400
Subject: [PATCH 048/157] Internals: Rename addIgnoreMatch. No functional
 change.

---
 docs/guide/warnings.rst |  7 ++++---
 src/V3Config.cpp        | 10 +++++-----
 src/V3Config.h          |  2 +-
 src/verilog.y           | 10 +++++-----
 4 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index b7cf29a81..48c0888f9 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -2046,17 +2046,18 @@ List Of Warnings
 
    .. include:: ../../docs/gen/ex_WIDTHEXPAND_1_fixed.rst
 
+
 .. option:: WIDTHTRUNC
 
-   A more granular WIDTH warning, for when a value is truncated
+   A more granular WIDTH warning, for when a value is truncated.
 
 .. option:: WIDTHEXPAND
 
-   A more granular WIDTH warning, for when a value is zero expanded
+   A more granular WIDTH warning, for when a value is zero expanded.
 
 .. option:: WIDTHXZEXPAND
 
-   A more granular WIDTH warning, for when a value is X/Z expanded
+   A more granular WIDTH warning, for when a value is X/Z expanded.
 
 .. option:: WIDTHCONCAT
 
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index de968acab..a221f92e8 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -303,7 +303,7 @@ public:
         m_ignLines.insert(V3ConfigIgnoresLine{code, lineno, on});
         m_lastIgnore.it = m_ignLines.begin();
     }
-    void addWaiver(V3ErrorCode code, const string& match) {
+    void addIgnoreMatch(V3ErrorCode code, const string& match) {
         m_waivers.push_back(std::make_pair(code, match));
     }
 
@@ -518,6 +518,10 @@ void V3Config::addIgnore(V3ErrorCode code, bool on, const string& filename, int
     }
 }
 
+void V3Config::addIgnoreMatch(V3ErrorCode code, const string& filename, const string& match) {
+    V3ConfigResolver::s().files().at(filename).addIgnoreMatch(code, match);
+}
+
 void V3Config::addInline(FileLine* fl, const string& module, const string& ftask, bool on) {
     if (ftask.empty()) {
         V3ConfigResolver::s().modules().at(module).setInline(on);
@@ -590,10 +594,6 @@ void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftas
     }
 }
 
-void V3Config::addWaiver(V3ErrorCode code, const string& filename, const string& match) {
-    V3ConfigResolver::s().files().at(filename).addWaiver(code, match);
-}
-
 void V3Config::applyCase(AstCase* nodep) {
     const string& filename = nodep->fileline()->filename();
     V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename);
diff --git a/src/V3Config.h b/src/V3Config.h
index bee0ea59e..6b49a0997 100644
--- a/src/V3Config.h
+++ b/src/V3Config.h
@@ -34,6 +34,7 @@ public:
     static void addCoverageBlockOff(const string& file, int lineno);
     static void addCoverageBlockOff(const string& module, const string& blockname);
     static void addIgnore(V3ErrorCode code, bool on, const string& filename, int min, int max);
+    static void addIgnoreMatch(V3ErrorCode code, const string& filename, const string& match);
     static void addInline(FileLine* fl, const string& module, const string& ftask, bool on);
     static void addModulePragma(const string& module, VPragmaType pragma);
     static void addProfileData(FileLine* fl, const string& model, const string& key,
@@ -41,7 +42,6 @@ public:
     static void addScopeTraceOn(bool on, const string& scope, int levels);
     static void addVarAttr(FileLine* fl, const string& module, const string& ftask,
                            const string& signal, VAttrType type, AstSenTree* nodep);
-    static void addWaiver(V3ErrorCode code, const string& filename, const string& match);
 
     static void applyCase(AstCase* nodep);
     static void applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep);
diff --git a/src/verilog.y b/src/verilog.y
index fd0c18ca9..31581e891 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -7213,9 +7213,9 @@ vltItem:
         |       vltOffFront yVLT_D_FILE yaSTRING
                         { V3Config::addIgnore($1, false, *$3, 0, 0); }
         |       vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM
-                        { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $5->toUInt()+1); }
+                        { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $5->toUInt() + 1); }
         |       vltOffFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM
-                        { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $7->toUInt()+1); }
+                        { V3Config::addIgnore($1, false, *$3, $5->toUInt(), $7->toUInt() + 1); }
         |       vltOffFront yVLT_D_SCOPE yaSTRING
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off");
@@ -7232,16 +7232,16 @@ vltItem:
                         { if (($1 == V3ErrorCode::I_COVERAGE) || ($1 == V3ErrorCode::I_TRACING)) {
                               $<fl>1->v3error("Argument -match only supported for lint_off");
                           } else {
-                              V3Config::addWaiver($1, *$3, *$5);
+                              V3Config::addIgnoreMatch($1, *$3, *$5);
                           }}
         |       vltOnFront
                         { V3Config::addIgnore($1, true, "*", 0, 0); }
         |       vltOnFront yVLT_D_FILE yaSTRING
                         { V3Config::addIgnore($1, true, *$3, 0, 0); }
         |       vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM
-                        { V3Config::addIgnore($1, true, *$3, $5->toUInt(), $5->toUInt()+1); }
+                        { V3Config::addIgnore($1, true, *$3, $5->toUInt(), $5->toUInt() + 1); }
         |       vltOnFront yVLT_D_FILE yaSTRING yVLT_D_LINES yaINTNUM '-' yaINTNUM
-                        { V3Config::addIgnore($1, true, *$3, $5->toUInt(), $7->toUInt()+1); }
+                        { V3Config::addIgnore($1, true, *$3, $5->toUInt(), $7->toUInt() + 1); }
         |       vltOnFront yVLT_D_SCOPE yaSTRING
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off");

From 622f0c047c736278d7f06d0d885def72aaca703a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 8 Oct 2023 20:38:45 -0400
Subject: [PATCH 049/157] Fix reporting `line at wrong spot. Rework some
 internal fileline parsing functions.

---
 src/V3FileLine.cpp               | 40 +++++++++++++++++++++++---------
 src/V3FileLine.h                 |  4 ++++
 src/V3ParseImp.cpp               |  2 +-
 src/V3ParseImp.h                 |  3 +--
 src/verilog.l                    |  2 +-
 src/verilog.y                    |  4 ++--
 test_regress/t/t_pp_line_bad.out | 33 ++++++++++++++++----------
 test_regress/t/t_pp_line_bad.pl  |  1 +
 8 files changed, 60 insertions(+), 29 deletions(-)

diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index a8bf044a6..56f5090a1 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -208,17 +208,30 @@ string FileLine::lineDirectiveStrg(int enterExit) const {
 }
 
 void FileLine::lineDirective(const char* textp, int& enterExitRef) {
+    string newFilename;
+    int newLineno = -1;
+    lineDirectiveParse(textp, newFilename /*ref*/, newLineno /*ref*/, enterExitRef);
+    if (enterExitRef != -1) {
+        filename(newFilename);
+        lineno(newLineno);
+    } else {  // Advance line number to account for bogus `line
+        linenoInc();
+    }
+}
+
+void FileLine::lineDirectiveParse(const char* textp, string& filenameRef, int& linenoRef,
+                                  int& enterExitRef) {
     // Handle `line directive
     // Does not parse streamNumber/streamLineno as the next input token
     // will come from the same stream as the previous line.
     do {
-        int lineNo;
         // Skip `line
         while (*textp && std::isspace(*textp)) ++textp;
         while (*textp && !std::isspace(*textp)) ++textp;
         while (*textp && std::isspace(*textp)) ++textp;
 
         // Grab linenumber
+        int lineNo;
         const char* const ln = textp;
         while (*textp && !std::isspace(*textp)) ++textp;
         if (0 == strncmp(ln, "`__LINE__", textp - ln)) {
@@ -229,7 +242,6 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
         } else {
             break;  // Fail
         }
-        lineno(lineNo);
         while (*textp && (std::isspace(*textp))) ++textp;
 
         // Grab filename
@@ -240,7 +252,6 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
         string errMsg;
         const string& parsedFilename = VString::unquoteSVString(string{fn, textp}, errMsg);
         if (!errMsg.empty()) this->v3error(errMsg.c_str());
-        filename(parsedFilename);
         ++textp;
         while (*textp && std::isspace(*textp)) ++textp;
 
@@ -248,17 +259,16 @@ void FileLine::lineDirective(const char* textp, int& enterExitRef) {
         if (!std::isdigit(*textp)) break;  // Fail
         const int level = std::atoi(textp);
         if (level < 0 || level >= 3) break;  // Fail
-        /// TODO: store lineno/filename only when the `line directive is valid
-        /// lineno(lineNo);
-        /// filename(filenameNew);
+
+        linenoRef = lineNo;
+        filenameRef = parsedFilename;
         enterExitRef = level;
         return;
     } while (false);
 
     // Fail
-    // TODO: show correct place of the code
     v3error("`line was not properly formed with '`line number \"filename\" level'\n");
-    enterExitRef = 0;
+    enterExitRef = -1;
 }
 
 void FileLine::forwardToken(const char* textp, size_t size, bool trackLines) {
@@ -273,14 +283,22 @@ void FileLine::forwardToken(const char* textp, size_t size, bool trackLines) {
     }
 }
 
+void FileLine::applyIgnores() {
+#ifndef V3ERROR_NO_GLOBAL_
+    V3Config::applyIgnores(this);  // Toggle warnings based on global config file
+#endif
+}
+
+FileLine* FileLine::copyOrSameFileLineApplied() {
+    applyIgnores();
+    return copyOrSameFileLine();
+}
+
 FileLine* FileLine::copyOrSameFileLine() {
     // When a fileline is "used" to produce a node, calls this function.
     // Return this, or a copy of this
     // There are often more than one token per line, thus we use the
     // same pointer as long as we're on the same line, file & warn state.
-#ifndef V3ERROR_NO_GLOBAL_
-    V3Config::applyIgnores(this);  // Toggle warnings based on global config file
-#endif
     static FileLine* lastNewp = nullptr;
     if (lastNewp && *lastNewp == *this) {  // Compares lineno, filename, etc
         return lastNewp;
diff --git a/src/V3FileLine.h b/src/V3FileLine.h
index 15541f418..03cf71695 100644
--- a/src/V3FileLine.h
+++ b/src/V3FileLine.h
@@ -195,7 +195,9 @@ public:
         , m_parent{fromp->m_parent} {
         if (m_contentp) m_contentp->refInc();
     }
+    void applyIgnores();
     FileLine* copyOrSameFileLine();
+    FileLine* copyOrSameFileLineApplied();
     static void deleteAllRemaining();
     ~FileLine();
 #ifdef VL_LEAK_CHECKS
@@ -221,6 +223,8 @@ public:
     void filename(const string& name) { m_filenameno = singleton().nameToNumber(name); }
     void parent(FileLine* fileline) { m_parent = fileline; }
     void lineDirective(const char* textp, int& enterExitRef);
+    void lineDirectiveParse(const char* textp, string& filenameRef, int& linenoRef,
+                            int& enterExitRef);
     void linenoInc() {
         m_lastLineno++;
         m_lastColumn = 1;
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 1da582004..0e082d402 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -72,7 +72,7 @@ V3ParseImp::~V3ParseImp() {
 
 void V3ParseImp::lexPpline(const char* textp) {
     // Handle lexer `line directive
-    FileLine* const prevFl = copyOrSameFileLine();
+    FileLine* const prevFl = lexFileline()->copyOrSameFileLineApplied();
     int enterExit;
     lexFileline()->lineDirective(textp, enterExit /*ref*/);
     if (enterExit == 1) {  // Enter
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 743b4ec14..439edf510 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -176,8 +176,8 @@ public:
                       bool precSet, double precVal) VL_MT_DISABLED;
     VTimescale timeLastUnit() const { return m_timeLastUnit; }
 
+    void lexFileline(FileLine* fl) { m_lexFileline = fl; }
     FileLine* lexFileline() const { return m_lexFileline; }
-    FileLine* lexCopyOrSameFileLine() { return lexFileline()->copyOrSameFileLine(); }
     static void lexErrorPreprocDirective(FileLine* fl, const char* textp) VL_MT_DISABLED;
     static string lexParseTag(const char* textp) VL_MT_DISABLED;
     static double lexParseTimenum(const char* text) VL_MT_DISABLED;
@@ -243,7 +243,6 @@ public:
 
     // Return next token, for bison, since bison isn't class based, use a global THIS
     AstNetlist* rootp() const { return m_rootp; }
-    FileLine* copyOrSameFileLine() { return bisonLastFileline()->copyOrSameFileLine(); }
     bool inLibrary() const { return m_inLibrary; }
     VOptionBool unconnectedDrive() const { return m_unconnectedDrive; }
     void unconnectedDrive(const VOptionBool flag) { m_unconnectedDrive = flag; }
diff --git a/src/verilog.l b/src/verilog.l
index 3ac7873b3..102a43195 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -40,7 +40,7 @@
 // Use this to break between tokens whereever not return'ing a token (e.g. skipping inside lexer)
 #define FL_BRK (PARSEP->lexFileline()->startToken())
 
-#define CRELINE() (PARSEP->lexCopyOrSameFileLine())
+#define CRELINE() (PARSEP->lexFileline()->copyOrSameFileLineApplied())
 
 #define FL \
     do { \
diff --git a/src/verilog.y b/src/verilog.y
index 31581e891..cfc01f62a 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -309,8 +309,8 @@ int V3ParseGrammar::s_modTypeImpNum = 0;
 //======================================================================
 // Macro functions
 
-#define CRELINE() \
-    (PARSEP->copyOrSameFileLine())  // Only use in empty rules, so lines point at beginnings
+// Only use in empty rules, so lines point at beginnings
+#define CRELINE() (PARSEP->bisonLastFileline()->copyOrSameFileLineApplied())
 #define FILELINE_OR_CRE(nodep) ((nodep) ? (nodep)->fileline() : CRELINE())
 
 #define VARRESET_LIST(decl) \
diff --git a/test_regress/t/t_pp_line_bad.out b/test_regress/t/t_pp_line_bad.out
index 8365b61c6..fc54a045d 100644
--- a/test_regress/t/t_pp_line_bad.out
+++ b/test_regress/t/t_pp_line_bad.out
@@ -1,22 +1,31 @@
-%Error: t/t_pp_line_bad.v:100:1: `line was not properly formed with '`line number "filename" level'
-  100 | `line 100
+%Error: t/t_pp_line_bad.v:8:1: `line was not properly formed with '`line number "filename" level'
+    8 | `line 100
       | ^
-%Error: t/t_pp_line_bad.v:200:1: `line was not properly formed with '`line number "filename" level'
-  200 | `line 100
+%Error: t/t_pp_line_bad.v:8:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:9:1: `line was not properly formed with '`line number "filename" level'
+    9 | `line 200 somefile
       | ^
-%Error: t/t_pp_line_bad.v:300:1: `line was not properly formed with '`line number "filename" level'
-  300 | `line 100
+%Error: t/t_pp_line_bad.v:9:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:10:1: `line was not properly formed with '`line number "filename" level'
+   10 | `line 300 "somefile 1
       | ^
-%Error: some file:400:1: `line was not properly formed with '`line number "filename" level'
-  400 | `line 100
+%Error: t/t_pp_line_bad.v:10:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:11:1: `line was not properly formed with '`line number "filename" level'
+   11 | `line 400 "some file"
       | ^
-%Error: somefile:500:1: `line was not properly formed with '`line number "filename" level'
-  500 | `line 100
+%Error: t/t_pp_line_bad.v:11:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:12:1: `line was not properly formed with '`line number "filename" level'
+   12 | `line 500 "somefile" 3
       | ^
-%Error: some file:600:1: `line was not properly formed with '`line number "filename" level'
-  600 | `line 100
+%Error: t/t_pp_line_bad.v:12:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:13:1: `line was not properly formed with '`line number "filename" level'
+   13 | `line 600 "some file" 3
       | ^
+%Error: t/t_pp_line_bad.v:13:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:7:1: Define or directive not defined: '`line'
     7 | `line
       | ^~~~~
+%Error: t/t_pp_line_bad.v:15:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:17:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:19:1: `line was not properly formed with '`line number "filename" level'
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_line_bad.pl b/test_regress/t/t_pp_line_bad.pl
index a60503a1f..887b07b64 100755
--- a/test_regress/t/t_pp_line_bad.pl
+++ b/test_regress/t/t_pp_line_bad.pl
@@ -11,6 +11,7 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 scenarios(linter => 1);
 
 lint(
+    verilator_flags2 => ['-no-std'],
     fails => 1,
     expect_filename => $Self->{golden_filename},
     );

From 472ad90d837448ebc8e1647d54bbc4fa5bed681a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 9 Oct 2023 04:12:01 -0400
Subject: [PATCH 050/157] Change lint_off to not propagate upwards to files
 including where the lint_off is.

---
 Changes                                      |  1 +
 docs/guide/warnings.rst                      | 28 +++++++++++++-------
 src/V3ParseImp.cpp                           | 22 ++++++++++-----
 test_regress/t/t_lint_warn_incfile2_bad.out  |  5 ++++
 test_regress/t/t_lint_warn_incfile2_bad.pl   | 22 +++++++++++++++
 test_regress/t/t_lint_warn_incfile2_bad.v    | 14 ++++++++++
 test_regress/t/t_lint_warn_incfile2_bad_b.vh | 10 +++++++
 test_regress/t/t_pp_line_bad.out             |  4 +--
 test_regress/t/t_vlt_warn_file_bad.out       |  5 ++++
 test_regress/t/t_vlt_warn_file_bad.pl        | 22 +++++++++++++++
 test_regress/t/t_vlt_warn_file_bad.v         | 12 +++++++++
 test_regress/t/t_vlt_warn_file_bad.vlt       | 10 +++++++
 test_regress/t/t_vlt_warn_file_bad_b.vh      |  9 +++++++
 13 files changed, 145 insertions(+), 19 deletions(-)
 create mode 100644 test_regress/t/t_lint_warn_incfile2_bad.out
 create mode 100755 test_regress/t/t_lint_warn_incfile2_bad.pl
 create mode 100644 test_regress/t/t_lint_warn_incfile2_bad.v
 create mode 100644 test_regress/t/t_lint_warn_incfile2_bad_b.vh
 create mode 100644 test_regress/t/t_vlt_warn_file_bad.out
 create mode 100755 test_regress/t/t_vlt_warn_file_bad.pl
 create mode 100644 test_regress/t/t_vlt_warn_file_bad.v
 create mode 100644 test_regress/t/t_vlt_warn_file_bad.vlt
 create mode 100644 test_regress/t/t_vlt_warn_file_bad_b.vh

diff --git a/Changes b/Changes
index 64c4f6832..dc07f520b 100644
--- a/Changes
+++ b/Changes
@@ -18,6 +18,7 @@ Verilator 5.017 devel
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 * Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
+* Change lint_off to not propagate upwards to files including where the lint_off is.
 * Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
 * Fix enum functions in localparams (#3999). [Andrew Nolte]
 * Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 48c0888f9..4588fd28b 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -12,10 +12,18 @@ Disabling Warnings
 
 Warnings may be disabled in multiple ways:
 
-#. Disable the warning in the source code.  When the warning is printed, it
-   will include a warning code.  Surround the offending line with a
-   :code:`/*verilator&32;lint_off*/` and :code:`/*verilator&32;lint_on*/`
-   metacomment pair:
+#. Disable the warning globally by invoking Verilator with the
+   :code:`-Wno-{warning-code}` option.
+
+   Global disables should be avoided, as they removes all checking across
+   the source files, and prevents other users from compiling the sources
+   without knowing the magic set of disables needed to compile those
+   sources successfully.
+
+#. Disable the warning in the design source code.  When the warning is
+   printed, it will include a warning code.  Surround the offending line
+   with a :code:`/*verilator&32;lint_off*/` and
+   :code:`/*verilator&32;lint_on*/` metacomment pair:
 
    .. code-block:: sv
 
@@ -23,6 +31,12 @@ Warnings may be disabled in multiple ways:
          if (`DEF_THAT_IS_EQ_ZERO <= 3) $stop;
          // verilator lint_on UNSIGNED
 
+
+   A lint_off in the design source code will propagate down to any child
+   files (files later included by the file with the lint_off), but will not
+   propagate upwards to any parent file (file that included the file with
+   the lint_off).
+
 #. Disable the warning using :ref:`Configuration Files` with a
    :option:`lint_off` command.  This is useful when a script suppresses
    warnings, and the Verilog source should not be changed.  This method also
@@ -32,12 +46,6 @@ Warnings may be disabled in multiple ways:
 
          lint_off -rule UNSIGNED -file "*/example.v" -line 1
 
-#. Disable the warning globally invoking Verilator with the
-   :code:`-Wno-{warning-code}` option.  This should be avoided, as it
-   removes all checking across the designs, and prevents other users from
-   compiling your code without knowing the magic set of disables needed to
-   compile your design successfully.
-
 
 Error And Warning Format
 ========================
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 0e082d402..cb23e938f 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -72,15 +72,25 @@ V3ParseImp::~V3ParseImp() {
 
 void V3ParseImp::lexPpline(const char* textp) {
     // Handle lexer `line directive
-    FileLine* const prevFl = lexFileline()->copyOrSameFileLineApplied();
-    int enterExit;
-    lexFileline()->lineDirective(textp, enterExit /*ref*/);
+    // FileLine* const prevFl = lexFileline();
+    string newFilename;
+    int newLineno = -1;
+    int enterExit = 0;
+    lexFileline()->lineDirectiveParse(textp, newFilename /*ref*/, newLineno /*ref*/, enterExit /*ref*/);
     if (enterExit == 1) {  // Enter
+        FileLine* const prevFl = lexFileline()->copyOrSameFileLine();  // Without applyIgnores
+        FileLine* const newFl = new FileLine{prevFl}; // Not copyOrSameFileLine as need to keep old value
+        lexFileline(newFl);
         lexFileline()->parent(prevFl);
     } else if (enterExit == 2) {  // Exit
-        FileLine* upFl = lexFileline()->parent();
-        if (upFl) upFl = upFl->parent();
-        if (upFl) lexFileline()->parent(upFl);
+        if (FileLine* upFl = lexFileline()->parent()) {
+            lexFileline(upFl);  // Restore warning state to upper file
+        }
+    }
+    if (enterExit != -1) {  // Line/fn change
+        lexFileline()->filename(newFilename);
+        lexFileline()->lineno(newLineno);
+        lexFileline()->applyIgnores();
     }
 }
 
diff --git a/test_regress/t/t_lint_warn_incfile2_bad.out b/test_regress/t/t_lint_warn_incfile2_bad.out
new file mode 100644
index 000000000..5060cbd21
--- /dev/null
+++ b/test_regress/t/t_lint_warn_incfile2_bad.out
@@ -0,0 +1,5 @@
+%Warning-WIDTHTRUNC: t/t_lint_warn_incfile2_bad.v:13:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
+                                                       : ... note: In instance 't'
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_warn_incfile2_bad.pl b/test_regress/t/t_lint_warn_incfile2_bad.pl
new file mode 100755
index 000000000..b3cdb56a9
--- /dev/null
+++ b/test_regress/t/t_lint_warn_incfile2_bad.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2008 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    # See also t/t_lint_warn_incfile1_bad
+    # See also t/t_vlt_warn_file_bad
+    verilator_flags2 => ["--no-std"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_lint_warn_incfile2_bad.v b/test_regress/t/t_lint_warn_incfile2_bad.v
new file mode 100644
index 000000000..0d821dcd8
--- /dev/null
+++ b/test_regress/t/t_lint_warn_incfile2_bad.v
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// Check that lint_off doesn't propagate from include, for post-preprocessor warnings
+
+`include "t_lint_warn_incfile2_bad_b.vh"
+
+module t;
+   sub sub();
+   int warn_t = 64'h1;  // Not suppressed - should warn
+endmodule
diff --git a/test_regress/t/t_lint_warn_incfile2_bad_b.vh b/test_regress/t/t_lint_warn_incfile2_bad_b.vh
new file mode 100644
index 000000000..aae34e35c
--- /dev/null
+++ b/test_regress/t/t_lint_warn_incfile2_bad_b.vh
@@ -0,0 +1,10 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module sub;
+   // verilator lint_off WIDTHTRUNC
+   int warn_sub = 64'h1;  // Suppressed
+endmodule
diff --git a/test_regress/t/t_pp_line_bad.out b/test_regress/t/t_pp_line_bad.out
index fc54a045d..3041d5dfa 100644
--- a/test_regress/t/t_pp_line_bad.out
+++ b/test_regress/t/t_pp_line_bad.out
@@ -25,7 +25,5 @@
 %Error: t/t_pp_line_bad.v:7:1: Define or directive not defined: '`line'
     7 | `line
       | ^~~~~
-%Error: t/t_pp_line_bad.v:15:1: `line was not properly formed with '`line number "filename" level'
-%Error: t/t_pp_line_bad.v:17:1: `line was not properly formed with '`line number "filename" level'
-%Error: t/t_pp_line_bad.v:19:1: `line was not properly formed with '`line number "filename" level'
+%Error: t/t_pp_line_bad.v:14:1: `line was not properly formed with '`line number "filename" level'
 %Error: Exiting due to
diff --git a/test_regress/t/t_vlt_warn_file_bad.out b/test_regress/t/t_vlt_warn_file_bad.out
new file mode 100644
index 000000000..6ff3c6fe0
--- /dev/null
+++ b/test_regress/t/t_vlt_warn_file_bad.out
@@ -0,0 +1,5 @@
+%Warning-WIDTHTRUNC: t/t_vlt_warn_file_bad.v:11:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
+                                                  : ... note: In instance 't'
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
+%Error: Exiting due to
diff --git a/test_regress/t/t_vlt_warn_file_bad.pl b/test_regress/t/t_vlt_warn_file_bad.pl
new file mode 100755
index 000000000..83d974461
--- /dev/null
+++ b/test_regress/t/t_vlt_warn_file_bad.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2008 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    # See also t/t_lint_warn_incfile1_bad
+    # See also t/t_lint_warn_incfile2_bad
+    verilator_flags2 => ["--no-std t/t_vlt_warn_file_bad.vlt"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_vlt_warn_file_bad.v b/test_regress/t/t_vlt_warn_file_bad.v
new file mode 100644
index 000000000..89ef7bfc2
--- /dev/null
+++ b/test_regress/t/t_vlt_warn_file_bad.v
@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`include "t_vlt_warn_file_bad_b.vh"
+
+module t;
+   sub sub();
+   int warn_t = 64'h1;
+endmodule
diff --git a/test_regress/t/t_vlt_warn_file_bad.vlt b/test_regress/t/t_vlt_warn_file_bad.vlt
new file mode 100644
index 000000000..14107e8a0
--- /dev/null
+++ b/test_regress/t/t_vlt_warn_file_bad.vlt
@@ -0,0 +1,10 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`verilator_config
+
+// Test that this -file rule doesn't turn off warnings in t/t_vlt_warn_file_bad.v
+lint_off -rule WIDTHTRUNC -file "t/t_vlt_warn_file_bad_b.vh"
diff --git a/test_regress/t/t_vlt_warn_file_bad_b.vh b/test_regress/t/t_vlt_warn_file_bad_b.vh
new file mode 100644
index 000000000..bf1bb1067
--- /dev/null
+++ b/test_regress/t/t_vlt_warn_file_bad_b.vh
@@ -0,0 +1,9 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module sub;
+   int warn_sub = 64'h1;
+endmodule

From e114dfda6d5c8ea6444c25f5b8257d4d0a7630d1 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Mon, 9 Oct 2023 08:14:14 +0000
Subject: [PATCH 051/157] Apply 'make format'

---
 src/V3ParseImp.cpp | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index cb23e938f..e2bfdedcf 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -76,10 +76,12 @@ void V3ParseImp::lexPpline(const char* textp) {
     string newFilename;
     int newLineno = -1;
     int enterExit = 0;
-    lexFileline()->lineDirectiveParse(textp, newFilename /*ref*/, newLineno /*ref*/, enterExit /*ref*/);
+    lexFileline()->lineDirectiveParse(textp, newFilename /*ref*/, newLineno /*ref*/,
+                                      enterExit /*ref*/);
     if (enterExit == 1) {  // Enter
         FileLine* const prevFl = lexFileline()->copyOrSameFileLine();  // Without applyIgnores
-        FileLine* const newFl = new FileLine{prevFl}; // Not copyOrSameFileLine as need to keep old value
+        FileLine* const newFl
+            = new FileLine{prevFl};  // Not copyOrSameFileLine as need to keep old value
         lexFileline(newFl);
         lexFileline()->parent(prevFl);
     } else if (enterExit == 2) {  // Exit

From 8d99bdac254fec6d1449e1d00468ad12fd17c997 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 9 Oct 2023 05:03:57 -0400
Subject: [PATCH 052/157] Internals: Move afterCommentp to AstNode. No
 functional change.

---
 src/V3Ast.h     |  9 +++++++++
 src/V3Const.cpp | 14 ++++----------
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 7772581d4..a2fbe15cd 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2040,6 +2040,15 @@ public:
     void dumpTreeDot(std::ostream& os = std::cout) const;
     void dumpTreeDotFile(const string& filename, bool append = false, bool doDump = true);
 
+    // METHODS - static advancement
+    static AstNode* afterCommentp(AstNode* nodep) {
+        // Skip over comments starting at provided nodep,
+        // such as to determine if a AstIf is empty.
+        // nodep may be null, if so return nullptr.
+        while (nodep && VN_IS(nodep, Comment)) nodep = nodep->nextp();
+        return nodep;
+    }
+
     // METHODS - queries
     // Changes control flow, disable some optimizations
     virtual bool isBrancher() const { return false; }
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 087f4b3af..6432a7eb5 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1372,13 +1372,6 @@ private:
         return true;
     }
 
-    AstNode* afterComment(AstNode* nodep) {
-        // Ignore comments, such as to determine if a AstIf is empty.
-        // nodep may be null, if so return null.
-        while (nodep && VN_IS(nodep, Comment)) nodep = nodep->nextp();
-        return nodep;
-    }
-
     // Extraction checks
     bool warnSelect(AstSel* nodep) {
         if (m_doGenerate) {
@@ -1459,7 +1452,7 @@ private:
         const AstNodeIf* const lowerIfp = VN_CAST(nodep->thensp(), NodeIf);
         if (!lowerIfp || lowerIfp->nextp()) return false;
         if (nodep->type() != lowerIfp->type()) return false;
-        if (afterComment(lowerIfp->elsesp())) return false;
+        if (AstNode::afterCommentp(lowerIfp->elsesp())) return false;
         return true;
     }
     bool ifConcatMergeableBiop(const AstNode* nodep) {
@@ -3007,7 +3000,8 @@ private:
                     nodep->unlinkFrBack();
                 }
                 VL_DO_DANGLING(nodep->deleteTree(), nodep);
-            } else if (!afterComment(nodep->thensp()) && !afterComment(nodep->elsesp())) {
+            } else if (!AstNode::afterCommentp(nodep->thensp())
+                       && !AstNode::afterCommentp(nodep->elsesp())) {
                 if (!nodep->condp()->isPure()) {
                     // Condition has side effect - leave - perhaps in
                     // future simplify to remove all but side effect terms
@@ -3015,7 +3009,7 @@ private:
                     // Empty block, remove it
                     VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
                 }
-            } else if (!afterComment(nodep->thensp())) {
+            } else if (!AstNode::afterCommentp(nodep->thensp())) {
                 UINFO(4, "IF({x}) nullptr {...} => IF(NOT{x}}: " << nodep << endl);
                 AstNodeExpr* const condp = nodep->condp();
                 AstNode* const elsesp = nodep->elsesp();

From b306715b4acd9d27745d7dd532f37ac84c4ace03 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 9 Oct 2023 05:50:31 -0400
Subject: [PATCH 053/157] Optimize empty expression statements (#4544).

---
 Changes                                |  1 +
 src/V3Ast.cpp                          |  2 ++
 src/V3Ast.h                            | 30 ++++++++++++++++++++------
 src/V3AstNodeExpr.h                    |  5 ++++-
 src/V3Const.cpp                        | 10 +++++++++
 src/V3Dead.cpp                         |  1 +
 src/V3Life.cpp                         |  1 +
 test_regress/t/t_func_real_exprstmt.pl |  6 ++++++
 8 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/Changes b/Changes
index dc07f520b..63b868510 100644
--- a/Changes
+++ b/Changes
@@ -19,6 +19,7 @@ Verilator 5.017 devel
 * Support resizing function call inout arguments (#4467).
 * Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
 * Change lint_off to not propagate upwards to files including where the lint_off is.
+* Optimize empty expression statements (#4544).
 * Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
 * Fix enum functions in localparams (#3999). [Andrew Nolte]
 * Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 35f6606f9..3e26ad7cd 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -33,6 +33,8 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 //======================================================================
 // Statics
 
+uint32_t VIsCached::s_cachedCntGbl = 1;
+
 uint64_t AstNode::s_editCntLast = 0;
 uint64_t AstNode::s_editCntGbl = 0;  // Hot cache line
 
diff --git a/src/V3Ast.h b/src/V3Ast.h
index a2fbe15cd..a6daaa584 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -169,15 +169,31 @@ inline std::ostream& operator<<(std::ostream& os, const VLifetime& rhs) {
 
 class VIsCached final {
     // Used in some nodes to cache results of boolean methods
+    // If cachedCnt == 0, not cached
+    // else if cachedCnt == s_cachedCntGbl, then m_state is if cached
+    uint32_t m_cachedCnt : 31;  // Mark of when cache was computed
+    uint32_t m_state : 1;
+    static uint32_t s_cachedCntGbl;  // Global computed count
+    static constexpr uint32_t MAX_CNT = (1UL << 31) - 1;  // Max for m_cachedCnt
+
 public:
-    enum en : uint8_t { NOT_CACHED, YES, NO };
-    enum en m_e;
     VIsCached()
-        : m_e{NOT_CACHED} {}
-    bool isCached() const { return m_e != NOT_CACHED; }
-    bool get() const { return m_e == YES; }
-    void set(bool flag) { m_e = flag ? YES : NO; }
-    void clearCache() { m_e = NOT_CACHED; }
+        : m_cachedCnt{0}
+        , m_state{0} {}
+    bool isCached() const { return m_cachedCnt == s_cachedCntGbl; }
+    bool get() const { return m_state; }
+    void set(bool flag) {
+        m_cachedCnt = s_cachedCntGbl;
+        m_state = flag;
+    }
+    void clearCache() {
+        m_cachedCnt = 0;
+        m_state = 0;
+    }
+    static void clearCacheTree() {
+        ++s_cachedCntGbl;
+        UASSERT_STATIC(s_cachedCntGbl < MAX_CNT, "Overflow of cache counting");
+    }
 };
 
 // ######################################################################
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 727cdca6e..002b980c5 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1176,7 +1176,10 @@ public:
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const override { return true; }
-    bool isPure() override { return false; }
+    bool isPure() override {
+        if (AstNode::afterCommentp(stmtsp())) return false;
+        return resultp()->isPure();
+    }
     bool same(const AstNode*) const override { return true; }
 };
 class AstFError final : public AstNodeExpr {
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 6432a7eb5..031269f78 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -2689,6 +2689,15 @@ private:
                            << nodep->varp()->prettyNameQ());
         }
     }
+    void visit(AstExprStmt* nodep) override {
+        iterateChildren(nodep);
+        if (!AstNode::afterCommentp(nodep->stmtsp())) {
+            UINFO(8, "ExprStmt(...) " << nodep << " " << nodep->resultp() << endl);
+            nodep->replaceWith(nodep->resultp()->unlinkFrBack());
+            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            // Removing the ExprStmt might have made something impure above now pure
+        }
+    }
     void visit(AstEnumItemRef* nodep) override {
         iterateChildren(nodep);
         UASSERT_OBJ(nodep->itemp(), nodep, "Not linked");
@@ -3718,6 +3727,7 @@ public:
     }
 
     AstNode* mainAcceptEdit(AstNode* nodep) {
+        VIsCached::clearCacheTree();  // Avoid using any stale isPure
         // Operate starting at a random place
         return iterateSubtreeReturnEdits(nodep);
     }
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index 6a0f8ae7a..428538e1c 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -533,6 +533,7 @@ public:
 
         // We may have removed some datatypes, cleanup
         nodep->typeTablep()->repairCache();
+        VIsCached::clearCacheTree();  // Removing assignments may affect isPure
     }
     ~DeadVisitor() override = default;
 };
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index a20c17252..5fd69a27f 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -517,5 +517,6 @@ void V3Life::lifeAll(AstNetlist* nodep) {
         LifeState state;
         LifeTopVisitor{nodep, &state};
     }  // Destruct before checking
+    VIsCached::clearCacheTree();  // Removing assignments may affect isPure
     V3Global::dumpCheckGlobalTree("life", 0, dumpTreeLevel() >= 3);
 }
diff --git a/test_regress/t/t_func_real_exprstmt.pl b/test_regress/t/t_func_real_exprstmt.pl
index 859050d63..e8d0aa63b 100755
--- a/test_regress/t/t_func_real_exprstmt.pl
+++ b/test_regress/t/t_func_real_exprstmt.pl
@@ -11,8 +11,14 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 scenarios(simulator => 1);
 
 compile(
+    verilator_flags2 => ["--stats"],
     );
 
+if ($Self->{vlt_all}) {
+    # Check no EXPRSTMTs in final output - should get optimized away
+    file_grep_not($Self->{stats}, qr/Node count, EXPRSTMT/i);
+}
+
 execute(
     check_finished => 1,
     );

From 5b06c60318b9709d28efdaae8c7261d2ffab6555 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Mon, 9 Oct 2023 15:45:09 +0200
Subject: [PATCH 054/157] Internals: Change deleteTree to pushDeletep (#4548).
 No functional change intended.

---
 src/V3Const.cpp | 176 ++++++++++++++++++++++++------------------------
 1 file changed, 88 insertions(+), 88 deletions(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 031269f78..297cfb1f8 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -997,7 +997,7 @@ private:
         }
         if (ccastp) {
             andp->replaceWith(ccastp);
-            VL_DO_DANGLING(andp->deleteTree(), andp);
+            VL_DO_DANGLING(pushDeletep(andp), andp);
             return true;
         }
         return false;
@@ -1074,7 +1074,7 @@ private:
         newp->thenp()->dtypeFrom(nodep);  // As And might have been to change widths
         newp->elsep()->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     bool matchMaskedOr(AstAnd* nodep) {
@@ -1105,15 +1105,15 @@ private:
         if (orLIsRedundant && orRIsRedundant) {
             nodep->replaceWith(
                 new AstConst{nodep->fileline(), AstConst::DTyped{}, nodep->dtypep()});
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             return true;
         } else if (orLIsRedundant) {
             orp->replaceWith(orp->rhsp()->unlinkFrBack());
-            VL_DO_DANGLING(orp->deleteTree(), orp);
+            VL_DO_DANGLING(pushDeletep(orp), orp);
             return false;  // input node is still valid, keep going
         } else if (orRIsRedundant) {
             orp->replaceWith(orp->lhsp()->unlinkFrBack());
-            VL_DO_DANGLING(orp->deleteTree(), orp);
+            VL_DO_DANGLING(pushDeletep(orp), orp);
             return false;  // input node is still valid, keep going
         } else {
             return false;
@@ -1131,7 +1131,7 @@ private:
                 rhsp->unlinkFrBack();
                 nodep->replaceWith(rhsp);
                 rhsp->dtypeFrom(nodep);
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 return true;
             }
             return false;
@@ -1183,7 +1183,7 @@ private:
         if (newp) {
             UINFO(4, "Transformed leaf of bit tree to " << newp << std::endl);
             nodep->replaceWith(newp);
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
 
         if (debug() >= 9) {  // LCOV_EXCL_START
@@ -1347,14 +1347,14 @@ private:
         //
         if (debug() >= 9) nodep->dumpTree("-  BI(EXTEND)-in: ");
         smallerp->unlinkFrBack();
-        VL_DO_DANGLING(extendp->unlinkFrBack()->deleteTree(), extendp);  // aka nodep->lhsp.
+        VL_DO_DANGLING(pushDeletep(extendp->unlinkFrBack()), extendp);  // aka nodep->lhsp.
         nodep->rhsp(smallerp);
 
         constp->unlinkFrBack();
         V3Number num{constp, subsize};
         num.opAssign(constp->num());
         nodep->lhsp(new AstConst{constp->fileline(), num});
-        VL_DO_DANGLING(constp->deleteTree(), constp);
+        VL_DO_DANGLING(pushDeletep(constp), constp);
         if (debug() >= 9) nodep->dumpTree("-  BI(EXTEND)-ou: ");
         return true;
     }
@@ -1550,7 +1550,7 @@ private:
         if (debug() > 5) oldp->dumpTree("-  const_old: ");
         if (debug() > 5) newp->dumpTree("-       _new: ");
         oldp->replaceWith(newp);
-        VL_DO_DANGLING(oldp->deleteTree(), oldp);
+        VL_DO_DANGLING(pushDeletep(oldp), oldp);
     }
     void replaceNum(AstNode* nodep, uint32_t val) {
         V3Number num{nodep, nodep->width(), val};
@@ -1581,7 +1581,7 @@ private:
                                              checkp->unlinkFrBack()};
             newp->dtypeFrom(nodep);
             nodep->replaceWith(newp);
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
     void replaceAllOnes(AstNode* nodep) {
@@ -1626,7 +1626,7 @@ private:
         if (debug() > 5) oldp->dumpTree("-  const_old: ");
         if (debug() > 5) newp->dumpTree("-       _new: ");
         oldp->replaceWith(newp);
-        VL_DO_DANGLING(oldp->deleteTree(), oldp);
+        VL_DO_DANGLING(pushDeletep(oldp), oldp);
     }
     //----------------------------------------
     // Replacement functions.
@@ -1639,7 +1639,7 @@ private:
         // This may adversely affect the operation of the node being replaced.
         childp->dtypeFrom(nodep);
         nodep->replaceWith(childp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceWChildBool(AstNode* nodep, AstNodeExpr* childp) {
         // NODE(..., CHILD(...)) -> REDOR(CHILD(...))
@@ -1649,7 +1649,7 @@ private:
         } else {
             nodep->replaceWith(new AstRedOr{childp->fileline(), childp});
         }
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
     //! Replace a ternary node with its RHS after iterating
@@ -1740,16 +1740,16 @@ private:
             lp->dtypeFrom(nodep);
             nodep->lhsp(lrp);
             nodep->rhsp(rrp);
-            VL_DO_DANGLING(rp->deleteTree(), rp);
-            VL_DO_DANGLING(rlp->deleteTree(), rlp);
+            VL_DO_DANGLING(pushDeletep(rp), rp);
+            VL_DO_DANGLING(pushDeletep(rlp), rlp);
         } else if (operandsSame(lrp, rrp)) {
             lp->lhsp(nodep);
             lp->rhsp(rrp);
             lp->dtypeFrom(nodep);
             nodep->lhsp(llp);
             nodep->rhsp(rlp);
-            VL_DO_DANGLING(rp->deleteTree(), rp);
-            VL_DO_DANGLING(lrp->deleteTree(), lrp);
+            VL_DO_DANGLING(pushDeletep(rp), rp);
+            VL_DO_DANGLING(pushDeletep(lrp), lrp);
         } else {
             nodep->v3fatalSrc("replaceAndOr on something operandAndOrSame shouldn't have matched");
         }
@@ -1770,8 +1770,8 @@ private:
         nodep->lhsp(llp);
         nodep->rhsp(rlp);
         nodep->dtypep(llp->dtypep());  // dtype of Biop is before shift.
-        VL_DO_DANGLING(rp->deleteTree(), rp);
-        VL_DO_DANGLING(rrp->deleteTree(), rrp);
+        VL_DO_DANGLING(pushDeletep(rp), rp);
+        VL_DO_DANGLING(pushDeletep(rrp), rrp);
         // nodep->dumpTree("-  repShiftSame_new: ");
     }
     void replaceConcatSel(AstConcat* nodep) {
@@ -1791,9 +1791,9 @@ private:
                                             << endl);
 
         nodep->replaceWith(newselp);
-        VL_DO_DANGLING(lselp->deleteTree(), lselp);
-        VL_DO_DANGLING(rselp->deleteTree(), rselp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(lselp), lselp);
+        VL_DO_DANGLING(pushDeletep(rselp), rselp);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceConcatMerge(AstConcat* nodep) {
         // {llp OP lrp, rlp OP rrp} => {llp, rlp} OP {lrp, rrp}, where OP = AND/OR/XOR
@@ -1811,9 +1811,9 @@ private:
             lp->rhsp()->replaceWith(newrp);
             lp->dtypeChgWidthSigned(newlp->width(), newlp->width(), VSigning::UNSIGNED);
             UINFO(5, "merged " << nodep << endl);
-            VL_DO_DANGLING(rp->unlinkFrBack()->deleteTree(), rp);
+            VL_DO_DANGLING(pushDeletep(rp->unlinkFrBack()), rp);
             nodep->replaceWith(lp->unlinkFrBack());
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             iterate(lp->lhsp());
             iterate(lp->rhsp());
         } else {
@@ -1830,7 +1830,7 @@ private:
                    : static_cast<AstNodeExpr*>(new AstExtend{nodep->fileline(), arg0p}));
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replacePowShift(AstNodeBiop* nodep) {  // Pow or PowS
         UINFO(5, "POW(2,b)->SHIFTL(1,b) " << nodep << endl);
@@ -1840,7 +1840,7 @@ private:
         newp->dtypeFrom(nodep);
         newp->lhsp()->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceMulShift(AstMul* nodep) {  // Mul, but not MulS as not simple shift
         UINFO(5, "MUL(2^n,b)->SHIFTL(b,n) " << nodep << endl);
@@ -1850,7 +1850,7 @@ private:
             = new AstShiftL{nodep->fileline(), opp, new AstConst(nodep->fileline(), amount)};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceDivShift(AstDiv* nodep) {  // Mul, but not MulS as not simple shift
         UINFO(5, "DIV(b,2^n)->SHIFTR(b,n) " << nodep << endl);
@@ -1860,7 +1860,7 @@ private:
             = new AstShiftR{nodep->fileline(), opp, new AstConst(nodep->fileline(), amount)};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceModAnd(AstModDiv* nodep) {  // Mod, but not ModS as not simple shift
         UINFO(5, "MOD(b,2^n)->AND(b,2^n-1) " << nodep << endl);
@@ -1872,7 +1872,7 @@ private:
             = new AstAnd{nodep->fileline(), opp, new AstConst{nodep->fileline(), mask}};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceShiftOp(AstNodeBiop* nodep) {
         UINFO(5, "SHIFT(AND(a,b),CONST)->AND(SHIFT(a,CONST),SHIFT(b,CONST)) " << nodep << endl);
@@ -1909,8 +1909,8 @@ private:
             const int shift1 = VN_AS(shift1p, Const)->toUInt();
             const int shift2 = VN_AS(shift2p, Const)->toUInt();
             const int newshift = shift1 + shift2;
-            VL_DO_DANGLING(shift1p->deleteTree(), shift1p);
-            VL_DO_DANGLING(shift2p->deleteTree(), shift2p);
+            VL_DO_DANGLING(pushDeletep(shift1p), shift1p);
+            VL_DO_DANGLING(pushDeletep(shift2p), shift2p);
             nodep->lhsp(ap);
             nodep->rhsp(new AstConst(nodep->fileline(), newshift));
             iterate(nodep);  // Further reduce, either node may have more reductions.
@@ -1921,8 +1921,8 @@ private:
             int shift2 = VN_AS(shift2p, Const)->toUInt();
             if (VN_IS(nodep, ShiftR)) shift2 = -shift2;
             const int newshift = shift1 + shift2;
-            VL_DO_DANGLING(shift1p->deleteTree(), shift1p);
-            VL_DO_DANGLING(shift2p->deleteTree(), shift2p);
+            VL_DO_DANGLING(pushDeletep(shift1p), shift1p);
+            VL_DO_DANGLING(pushDeletep(shift2p), shift2p);
             AstNodeExpr* newp;
             V3Number mask1{nodep, nodep->width()};
             V3Number ones{nodep, nodep->width()};
@@ -1949,11 +1949,11 @@ private:
             newp = new AstAnd{nodep->fileline(), newp, new AstConst{nodep->fileline(), mask}};
             newp->dtypeFrom(nodep);
             nodep->replaceWith(newp);
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // newp->dumpTree("-  repShiftShift_new: ");
             iterate(newp);  // Further reduce, either node may have more reductions.
         }
-        VL_DO_DANGLING(lhsp->deleteTree(), lhsp);
+        VL_DO_DANGLING(pushDeletep(lhsp), lhsp);
     }
 
     bool replaceAssignMultiSel(AstNodeAssign* nodep) {
@@ -2009,8 +2009,8 @@ private:
         }
         // pnewp->dumpTree("-  conew: ");
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
-        VL_DO_DANGLING(nextp->unlinkFrBack()->deleteTree(), nextp);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+        VL_DO_DANGLING(pushDeletep(nextp->unlinkFrBack()), nextp);
         return true;
     }
 
@@ -2037,7 +2037,7 @@ private:
                 nodep->v3error("Wire inputs its own output, creating circular logic (wire x=x)");
                 return false;  // Don't delete the assign, or V3Gate will freak out
             } else {
-                VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 return true;
             }
         } else if (m_doV && VN_IS(nodep->lhsp(), Concat) && nodep->isPure()) {
@@ -2127,8 +2127,8 @@ private:
             if (debug() >= 9 && newp) newp->dumpTreeAndNext(cout, "-     _new: ");
             nodep->addNextHere(newp);
             // Cleanup
-            VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
-            VL_DO_DANGLING(conp->deleteTree(), conp);
+            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
+            VL_DO_DANGLING(pushDeletep(conp), conp);
             // Further reduce, either node may have more reductions.
             return true;
         } else if (m_doV && VN_IS(nodep->rhsp(), StreamR)) {
@@ -2146,7 +2146,7 @@ private:
                 srcp = new AstCvtDynArrayToPacked{srcp->fileline(), srcp, srcDTypep};
             }
             nodep->rhsp(srcp);
-            VL_DO_DANGLING(streamp->deleteTree(), streamp);
+            VL_DO_DANGLING(pushDeletep(streamp), streamp);
             // Further reduce, any of the nodes may have more reductions.
             return true;
         } else if (m_doV && VN_IS(nodep->lhsp(), StreamL)) {
@@ -2188,7 +2188,7 @@ private:
             }
             nodep->lhsp(dstp);
             nodep->rhsp(srcp);
-            VL_DO_DANGLING(streamp->deleteTree(), streamp);
+            VL_DO_DANGLING(pushDeletep(streamp), streamp);
             // Further reduce, any of the nodes may have more reductions.
             return true;
         } else if (m_doV && VN_IS(nodep->rhsp(), StreamL)) {
@@ -2238,7 +2238,7 @@ private:
         // widthMin no longer applicable if different C-expanded width
         newp->dtypeSetLogicSized(nodep->width(), VSigning::UNSIGNED);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         if (debug() >= 9) newp->dumpTree("-       _new: ");
     }
 
@@ -2264,7 +2264,7 @@ private:
             newp->fileline(nodep->fileline());
             UINFO(4, "Simulate->" << newp << endl);
             nodep->replaceWith(newp);
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
 
@@ -2296,7 +2296,7 @@ private:
         iterateChildren(nodep);
         if (!nodep->stmtsp()) {
             nodep->unlinkFrBack();
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
     void visit(AstScope* nodep) override {
@@ -2329,7 +2329,7 @@ private:
         UINFO(4, "Concat(Rand,Rand) => Rand: " << nodep << endl);
         aRandp->dtypeFrom(nodep);  // I.e. the total width
         nodep->replaceWith(aRandp->unlinkFrBack());
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     bool matchSelRand(AstSel* nodep) {
@@ -2340,7 +2340,7 @@ private:
         UINFO(4, "Sel(Rand) => Rand: " << nodep << endl);
         aRandp->dtypeFrom(nodep);  // I.e. the total width
         nodep->replaceWith(aRandp->unlinkFrBack());
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     int operandConcatMove(AstConcat* nodep) {
@@ -2380,7 +2380,7 @@ private:
             // If bp was a concat, then we have this exact same form again!
             // Recurse rather then calling node->iterate to prevent 2^n recursion!
             if (operandConcatMove(abConcp)) moveConcat(abConcp);
-            VL_DO_DANGLING(bcConcp->deleteTree(), bcConcp);
+            VL_DO_DANGLING(pushDeletep(bcConcp), bcConcp);
         } else {
             AstConcat* const abConcp = VN_AS(nodep->lhsp(), Concat);
             abConcp->unlinkFrBack();
@@ -2391,7 +2391,7 @@ private:
             nodep->lhsp(ap);
             nodep->rhsp(bcConcp);
             if (operandConcatMove(bcConcp)) moveConcat(bcConcp);
-            VL_DO_DANGLING(abConcp->deleteTree(), abConcp);
+            VL_DO_DANGLING(pushDeletep(abConcp), abConcp);
         }
     }
 
@@ -2421,7 +2421,7 @@ private:
                          lhsp->cloneTreePure(false)}};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
     void replaceSelSel(AstSel* nodep) {
@@ -2437,8 +2437,8 @@ private:
         if (VN_IS(lsb1p, Const) && VN_IS(lsb2p, Const)) {
             newlsbp = new AstConst{lsb1p->fileline(),
                                    VN_AS(lsb1p, Const)->toUInt() + VN_AS(lsb2p, Const)->toUInt()};
-            VL_DO_DANGLING(lsb1p->deleteTree(), lsb1p);
-            VL_DO_DANGLING(lsb2p->deleteTree(), lsb2p);
+            VL_DO_DANGLING(pushDeletep(lsb1p), lsb1p);
+            VL_DO_DANGLING(pushDeletep(lsb2p), lsb2p);
         } else {
             // Width is important, we need the width of the fromp's expression, not the
             // potentially smaller lsb1p's width, but don't insert a redundant AstExtend.
@@ -2458,7 +2458,7 @@ private:
         }
         AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, widthp};
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
     void replaceSelConcat(AstSel* nodep) {
@@ -2489,7 +2489,7 @@ private:
                                            conRhsp->width() - nodep->lsbConst()}};
             nodep->replaceWith(newp);
         }
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     bool operandSelReplicate(AstSel* nodep) {
         // SEL(REPLICATE(from,rep),lsb,width) => SEL(from,0,width) as long
@@ -2513,7 +2513,7 @@ private:
                          new AstConst{lsbp->fileline(), lsbp->toUInt() % fromp->width()}, widthp};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     bool operandRepRep(AstReplicate* nodep) {
@@ -2532,7 +2532,7 @@ private:
             = new AstReplicate{nodep->fileline(), from2p, cnt1p->toUInt() * cnt2p->toUInt()};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     bool operandConcatSame(AstConcat* nodep) {
@@ -2562,7 +2562,7 @@ private:
         AstReplicate* const newp = new AstReplicate{nodep->fileline(), from1p, cnt1 + cnt2};
         newp->dtypeFrom(nodep);
         nodep->replaceWith(newp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
     void replaceSelIntoBiop(AstSel* nodep) {
@@ -2580,7 +2580,7 @@ private:
         fromp->rhsp(new AstSel{nodep->fileline(), birhsp, lsbp, widthp});
         fromp->dtypeFrom(nodep);
         nodep->replaceWith(fromp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceSelIntoUniop(AstSel* nodep) {
         // SEL(NOT(a),1,bit) => NOT(SEL(a,bit))
@@ -2594,7 +2594,7 @@ private:
         fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp, widthp});
         fromp->dtypeFrom(nodep);
         nodep->replaceWith(fromp);
-        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
     void visit(AstAttrOf* nodep) override {
@@ -2626,7 +2626,7 @@ private:
                     fromp->dtypeFrom(
                         VN_AS(fromp->dtypep()->skipRefp(), NodeArrayDType)->subDTypep());
                 }
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             }
         }
         m_selp = nullptr;
@@ -2674,12 +2674,12 @@ private:
                     // support arrays of arrays or other stuff
                     AstNode* const newp = valuep->cloneTree(false);
                     nodep->replaceWith(newp);
-                    VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     did = true;
                 } else if (nodep->varp()->isParam() && VN_IS(valuep, Unbounded)) {
                     AstNode* const newp = valuep->cloneTree(false);
                     nodep->replaceWith(newp);
-                    VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     did = true;
                 }
             }
@@ -2694,7 +2694,7 @@ private:
         if (!AstNode::afterCommentp(nodep->stmtsp())) {
             UINFO(8, "ExprStmt(...) " << nodep << " " << nodep->resultp() << endl);
             nodep->replaceWith(nodep->resultp()->unlinkFrBack());
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // Removing the ExprStmt might have made something impure above now pure
         }
     }
@@ -2747,13 +2747,13 @@ private:
                     } else {
                         nodep->replaceWith(new AstSenItem{nodep->fileline(), AstSenItem::Never{}});
                     }
-                    VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 } else {
-                    VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 }
             } else {  // Otherwise it may compute a result that needs to settle out
                 nodep->replaceWith(new AstSenItem{nodep->fileline(), AstSenItem::Combo{}});
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             }
         } else if (m_doNConst && VN_IS(nodep->sensp(), Not)) {
             // V3Gate may propagate NOTs into clocks... Just deal with it
@@ -2767,7 +2767,7 @@ private:
             UINFO(8, "senItem(NOT...) " << nodep << " " << invert << endl);
             if (invert) nodep->edgeType(nodep->edgeType().invert());
             sensp->replaceWith(lastSensp->unlinkFrBack());
-            VL_DO_DANGLING(sensp->deleteTree(), sensp);
+            VL_DO_DANGLING(pushDeletep(sensp), sensp);
         }
     }
 
@@ -2906,7 +2906,7 @@ private:
 
                     // Remove identical expressions
                     if (lItemp->edgeType() == rItemp->edgeType()) {
-                        VL_DO_DANGLING(rItemp->unlinkFrBack()->deleteTree(), rItemp);
+                        VL_DO_DANGLING(pushDeletep(rItemp->unlinkFrBack()), rItemp);
                         nextp = lItemp;
                     }
 
@@ -2923,7 +2923,7 @@ private:
                                     const V3Number lNum{lConstp->num()};
                                     lConstp->num().opOr(lNum, rConstp->num());
                                     // Remove redundant term
-                                    VL_DO_DANGLING(rItemp->unlinkFrBack()->deleteTree(), rItemp);
+                                    VL_DO_DANGLING(pushDeletep(rItemp->unlinkFrBack()), rItemp);
                                     nextp = lItemp;
                                 }
                             }
@@ -2968,7 +2968,7 @@ private:
             AstInitial* const newinitp = new AstInitial{
                 nodep->fileline(), new AstAssign{nodep->fileline(), varrefp, exprp}};
             m_modp->addStmtsp(newinitp);
-            VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
             // Set the initial value right in the variable so we can constant propagate
             AstNode* const initvaluep = exprp->cloneTree(false);
             varrefp->varp()->valuep(initvaluep);
@@ -2981,7 +2981,7 @@ private:
             AstRelease* const newRp = new AstRelease{flp, concatp->rhsp()->unlinkFrBack()};
             nodep->replaceWith(newLp);
             newLp->addNextHere(newRp);
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             visit(newLp);
             visit(newRp);
         }
@@ -3008,7 +3008,7 @@ private:
                 } else {
                     nodep->unlinkFrBack();
                 }
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (!AstNode::afterCommentp(nodep->thensp())
                        && !AstNode::afterCommentp(nodep->elsesp())) {
                 if (!nodep->condp()->isPure()) {
@@ -3016,7 +3016,7 @@ private:
                     // future simplify to remove all but side effect terms
                 } else {
                     // Empty block, remove it
-                    VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 }
             } else if (!AstNode::afterCommentp(nodep->thensp())) {
                 UINFO(4, "IF({x}) nullptr {...} => IF(NOT{x}}: " << nodep << endl);
@@ -3025,7 +3025,7 @@ private:
                 condp->unlinkFrBackWithNext();
                 elsesp->unlinkFrBackWithNext();
                 if (nodep->thensp()) {  // Must have been comment
-                    nodep->thensp()->unlinkFrBackWithNext()->deleteTree();
+                    pushDeletep(nodep->thensp()->unlinkFrBackWithNext());
                 }
                 nodep->condp(new AstLogNot{condp->fileline(),
                                            condp});  // LogNot, as C++ optimization also possible
@@ -3042,7 +3042,7 @@ private:
                 ifp->isBoundsCheck(nodep->isBoundsCheck());  // Copy bounds check info
                 ifp->branchPred(nodep->branchPred().invert());
                 nodep->replaceWith(ifp);
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (ifSameAssign(nodep)) {
                 UINFO(
                     4,
@@ -3055,7 +3055,7 @@ private:
                 AstNodeExpr* const falsep = elsesp->rhsp()->unlinkFrBack();
                 thensp->rhsp(new AstCond{truep->fileline(), condp, truep, falsep});
                 nodep->replaceWith(thensp);
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (false  // Disabled, as vpm assertions are faster
                               // without due to short-circuiting
                        && operandIfIf(nodep)) {
@@ -3066,7 +3066,7 @@ private:
                 AstNodeExpr* const lowerCondp = lowerIfp->condp()->unlinkFrBackWithNext();
                 nodep->condp(new AstLogAnd{lowerIfp->fileline(), condp, lowerCondp});
                 lowerIfp->replaceWith(lowerThensp);
-                VL_DO_DANGLING(lowerIfp->deleteTree(), lowerIfp);
+                VL_DO_DANGLING(pushDeletep(lowerIfp), lowerIfp);
             } else if (operandBoolShift(nodep->condp())) {
                 replaceBoolShift(nodep->condp());
             }
@@ -3126,7 +3126,7 @@ private:
             scopeNamep->unlinkFrBackWithNext();
             pformatp->scopeNamep(scopeNamep);
         }
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
         return true;
     }
     void visit(AstSFormatF* nodep) override {
@@ -3174,7 +3174,7 @@ private:
                                                             << argp << endl);
                                 // fmt = out w/ replace % with %% as it must be literal.
                                 fmt = VString::quotePercent(out);
-                                VL_DO_DANGLING(argp->unlinkFrBack()->deleteTree(), argp);
+                                VL_DO_DANGLING(pushDeletep(argp->unlinkFrBack()), argp);
                             }
                             argp = nextp;
                         }
@@ -3234,7 +3234,7 @@ private:
                 } else {
                     nodep->unlinkFrBack();
                 }
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (nodep->condp()->isNeqZero()) {
                 if (!thisWhileHasJumpDelay) {
                     nodep->v3warn(INFINITELOOP, "Infinite loop (condition always true)");
@@ -3257,13 +3257,13 @@ private:
     // Ignored, can eliminate early
     void visit(AstSysIgnore* nodep) override {
         iterateChildren(nodep);
-        if (m_doNConst) VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        if (m_doNConst) VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
 
     void visit(AstStmtExpr* nodep) override {
         iterateChildren(nodep);
         if (!nodep->exprp() || VN_IS(nodep->exprp(), Const)) {
-            VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
             return;
         }
         // TODO if there's an ExprStmt underneath just keep lower statements
@@ -3283,14 +3283,14 @@ private:
         iterateChildren(nodep);
         // Jump to label where label immediately follows this go is not useful
         if (nodep->labelp() == VN_CAST(nodep->nextp(), JumpLabel)) {
-            VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
             // Keep the label, might be other jumps pointing to it, gets cleaned later
             return;
         }
         if (m_doExpensive) {
             // Any non-label statements (at this statement level) can never execute
             while (nodep->nextp() && !VN_IS(nodep->nextp(), JumpLabel)) {
-                nodep->nextp()->unlinkFrBack()->deleteTree();
+                pushDeletep(nodep->nextp()->unlinkFrBack());
             }
             // If last statement in a jump label we have JumpLabel(...., JumpGo)
             // Often caused by "return" in a Verilog function.  The Go is pointless, remove.
@@ -3299,7 +3299,7 @@ private:
                     if (aboveBlockp == nodep->labelp()->blockp()) {
                         if (aboveBlockp->endStmtsp() == nodep->labelp()) {
                             UINFO(4, "JUMPGO => last remove " << nodep << endl);
-                            VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                             return;
                         }
                     }
@@ -3325,8 +3325,8 @@ private:
             } else {
                 nodep->unlinkFrBack();
             }
-            nodep->labelp()->unlinkFrBack()->deleteTree();
-            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            pushDeletep(nodep->labelp()->unlinkFrBack());
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
 

From a5ee8b39efb6b96e2160a5fc157755967329ec0f Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglebocki@antmicro.com>
Date: Mon, 9 Oct 2023 23:43:27 +0200
Subject: [PATCH 055/157] Internals: Remove use of V3Width code from V3AstNodes
 (#4537). No functional change intended.

`getCommonClassTypep` and its helper code has been moved to AstNode
class. This is a lot better place for this functionality. Moreover, it
allowed to get rid of the dependency on V3Width from generic AST-related
code.
---
 src/V3Ast.cpp      |  96 ++++++++++++++++++++++++++++
 src/V3Ast.h        |  43 +++++++++++++
 src/V3AstNodes.cpp |   3 +-
 src/V3Width.cpp    | 154 +++++++--------------------------------------
 src/V3Width.h      |   2 -
 5 files changed, 163 insertions(+), 135 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 3e26ad7cd..6115dabf8 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1461,6 +1461,102 @@ AstNodeDType* AstNode::findStreamDType() const {
     return v3Global.rootp()->typeTablep()->findStreamDType(fileline());
 }
 
+static const AstNodeDType* computeCastableBase(const AstNodeDType* nodep) {
+    while (true) {
+        if (const AstPackArrayDType* const packp = VN_CAST(nodep, PackArrayDType)) {
+            nodep = packp->subDTypep();
+            continue;
+        } else if (const AstNodeDType* const refp = nodep->skipRefToEnump()) {
+            if (refp != nodep) {
+                nodep = refp;
+                continue;
+            }
+        }
+        return nodep;
+    }
+}
+
+static VCastable computeCastableImp(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
+                                    const AstNode* fromConstp) {
+    const VCastable castable = VCastable::UNSUPPORTED;
+    toDtp = toDtp->skipRefToEnump();
+    fromDtp = fromDtp->skipRefToEnump();
+    if (toDtp == fromDtp) return VCastable::SAMEISH;
+    if (toDtp->similarDType(fromDtp)) return VCastable::SAMEISH;
+    // UNSUP unpacked struct/unions (treated like BasicDType)
+    const AstNodeDType* fromBaseDtp = computeCastableBase(fromDtp);
+
+    const bool fromNumericable = VN_IS(fromBaseDtp, BasicDType) || VN_IS(fromBaseDtp, EnumDType)
+                                 || VN_IS(fromBaseDtp, StreamDType)
+                                 || VN_IS(fromBaseDtp, NodeUOrStructDType);
+
+    const AstNodeDType* toBaseDtp = computeCastableBase(toDtp);
+    const bool toNumericable
+        = VN_IS(toBaseDtp, BasicDType) || VN_IS(toBaseDtp, NodeUOrStructDType);
+
+    if (toBaseDtp == fromBaseDtp) {
+        return VCastable::COMPATIBLE;
+    } else if (toNumericable) {
+        if (fromNumericable) return VCastable::COMPATIBLE;
+    } else if (VN_IS(toDtp, EnumDType)) {
+        if (VN_IS(fromBaseDtp, EnumDType) && toDtp->sameTree(fromDtp))
+            return VCastable::ENUM_IMPLICIT;
+        if (fromNumericable) return VCastable::ENUM_EXPLICIT;
+    } else if (VN_IS(toDtp, ClassRefDType) && VN_IS(fromConstp, Const)) {
+        if (VN_IS(fromConstp, Const) && VN_AS(fromConstp, Const)->num().isNull())
+            return VCastable::COMPATIBLE;
+    } else if (VN_IS(toDtp, ClassRefDType) && VN_IS(fromDtp, ClassRefDType)) {
+        const auto toClassp = VN_AS(toDtp, ClassRefDType)->classp();
+        const auto fromClassp = VN_AS(fromDtp, ClassRefDType)->classp();
+        const bool downcast = AstClass::isClassExtendedFrom(toClassp, fromClassp);
+        const bool upcast = AstClass::isClassExtendedFrom(fromClassp, toClassp);
+        if (upcast) {
+            return VCastable::COMPATIBLE;
+        } else if (downcast) {
+            return VCastable::DYNAMIC_CLASS;
+        } else {
+            return VCastable::INCOMPATIBLE;
+        }
+    }
+    return castable;
+}
+
+VCastable AstNode::computeCastable(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
+                                   const AstNode* fromConstp) {
+    const auto castable = computeCastableImp(toDtp, fromDtp, fromConstp);
+    UINFO(9, "  castable=" << castable << "  for " << toDtp << endl);
+    UINFO(9, "     =?= " << fromDtp << endl);
+    UINFO(9, "     const= " << fromConstp << endl);
+    return castable;
+}
+
+AstNodeDType* AstNode::getCommonClassTypep(AstNode* nodep1, AstNode* nodep2) {
+    // Return the class type that both nodep1 and nodep2 are castable to.
+    // If both are null, return the type of null constant.
+    // If one is a class and one is null, return AstClassRefDType that points to that class.
+    // If no common class type exists, return nullptr.
+
+    // First handle cases with null values and when one class is a super class of the other.
+    if (VN_IS(nodep1, Const)) std::swap(nodep1, nodep2);
+    {
+        const VCastable castable = computeCastable(nodep1->dtypep(), nodep2->dtypep(), nodep2);
+        if (castable == VCastable::SAMEISH || castable == VCastable::COMPATIBLE) {
+            return nodep1->dtypep();
+        } else if (castable == VCastable::DYNAMIC_CLASS) {
+            return nodep2->dtypep();
+        }
+    }
+
+    AstClassRefDType* classDtypep1 = VN_CAST(nodep1->dtypep(), ClassRefDType);
+    while (classDtypep1) {
+        const VCastable castable = computeCastable(classDtypep1, nodep2->dtypep(), nodep2);
+        if (castable == VCastable::COMPATIBLE) return classDtypep1;
+        AstClassExtends* const extendsp = classDtypep1->classp()->extendsp();
+        classDtypep1 = extendsp ? VN_AS(extendsp->dtypep(), ClassRefDType) : nullptr;
+    }
+    return nullptr;
+}
+
 //######################################################################
 // VNDeleter
 
diff --git a/src/V3Ast.h b/src/V3Ast.h
index a6daaa584..38dba7714 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1249,6 +1249,45 @@ inline std::ostream& operator<<(std::ostream& os, const VUseType& rhs) {
 
 // ######################################################################
 
+class VCastable final {
+public:
+    enum en : uint8_t {
+        UNSUPPORTED,
+        SAMEISH,
+        COMPATIBLE,
+        ENUM_EXPLICIT,
+        ENUM_IMPLICIT,
+        DYNAMIC_CLASS,
+        INCOMPATIBLE,
+        _ENUM_MAX  // Leave last
+    };
+    enum en m_e;
+    const char* ascii() const {
+        static const char* const names[]
+            = {"UNSUPPORTED",   "SAMEISH",       "COMPATIBLE",  "ENUM_EXPLICIT",
+               "ENUM_IMPLICIT", "DYNAMIC_CLASS", "INCOMPATIBLE"};
+        return names[m_e];
+    }
+    VCastable()
+        : m_e{UNSUPPORTED} {}
+    // cppcheck-suppress noExplicitConstructor
+    constexpr VCastable(en _e)
+        : m_e{_e} {}
+    explicit VCastable(int _e)
+        : m_e(static_cast<en>(_e)) {}  // Need () or GCC 4.8 false warning
+    constexpr operator en() const { return m_e; }
+};
+constexpr bool operator==(const VCastable& lhs, const VCastable& rhs) {
+    return lhs.m_e == rhs.m_e;
+}
+constexpr bool operator==(const VCastable& lhs, VCastable::en rhs) { return lhs.m_e == rhs; }
+constexpr bool operator==(VCastable::en lhs, const VCastable& rhs) { return lhs == rhs.m_e; }
+inline std::ostream& operator<<(std::ostream& os, const VCastable& rhs) {
+    return os << rhs.ascii();
+}
+
+// ######################################################################
+
 class VBasicTypeKey final {
 public:
     const int m_width;  // From AstNodeDType: Bit width of operation
@@ -1989,6 +2028,10 @@ public:
     AstNodeDType* findBasicDType(VBasicDTypeKwd kwd) const;
     static AstBasicDType* findInsertSameDType(AstBasicDType* nodep);
 
+    static VCastable computeCastable(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
+                                     const AstNode* fromConstp);
+    static AstNodeDType* getCommonClassTypep(AstNode* nodep1, AstNode* nodep2);
+
     // METHODS - dump and error
     void v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex);
     void v3errorEndFatal(std::ostringstream& str) const VL_ATTR_NORETURN
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 7dd6ffee7..507bcfbbc 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -25,7 +25,6 @@
 #include "V3Hasher.h"
 #include "V3PartitionGraph.h"  // Just for mtask dumping
 #include "V3String.h"
-#include "V3Width.h"
 
 #include "V3Ast__gen_macros.h"  // Generated by 'astgen'
 
@@ -217,7 +216,7 @@ AstNodeCond::AstNodeCond(VNType t, FileLine* fl, AstNodeExpr* condp, AstNodeExpr
     UASSERT_OBJ(elsep, this, "No elsep expression");
     if (thenp->isClassHandleValue() && elsep->isClassHandleValue()) {
         // Get the most-deriving class type that both arguments can be casted to.
-        AstNodeDType* const commonClassTypep = V3Width::getCommonClassTypep(thenp, elsep);
+        AstNodeDType* const commonClassTypep = getCommonClassTypep(thenp, elsep);
         UASSERT_OBJ(commonClassTypep, this, "No common base class exists");
         dtypep(commonClassTypep);
     } else {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index b87fe81e4..cecd6ad1b 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -108,21 +108,6 @@ std::ostream& operator<<(std::ostream& str, const Determ& rhs) {
     return str << s_det[rhs];
 }
 
-enum Castable : uint8_t {
-    UNSUPPORTED,
-    SAMEISH,
-    COMPATIBLE,
-    ENUM_EXPLICIT,
-    ENUM_IMPLICIT,
-    DYNAMIC_CLASS,
-    INCOMPATIBLE
-};
-std::ostream& operator<<(std::ostream& str, const Castable& rhs) {
-    static const char* const s_det[]
-        = {"UNSUP", "IDENT", "COMPAT", "ENUM_EXP", "ENUM_IMP", "DYN_CLS", "INCOMPAT"};
-    return str << s_det[rhs];
-}
-
 #define v3widthWarn(lhs, rhs, msg) \
     v3errorEnd( \
         v3errorBuildMessage(V3Error::v3errorPrep((lhs) < (rhs)   ? V3ErrorCode::WIDTHTRUNC \
@@ -518,7 +503,7 @@ private:
                 if (nodep->thenp()->isClassHandleValue() && nodep->elsep()->isClassHandleValue()) {
                     // Get the most-deriving class type that both arguments can be casted to.
                     commonClassTypep
-                        = V3Width::getCommonClassTypep(nodep->thenp(), nodep->elsep());
+                        = AstNode::getCommonClassTypep(nodep->thenp(), nodep->elsep());
                 }
                 if (commonClassTypep) {
                     nodep->dtypep(commonClassTypep);
@@ -1842,12 +1827,12 @@ private:
         AstNodeDType* const toDtp = nodep->top()->dtypep()->skipRefToEnump();
         AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefToEnump();
         FileLine* const fl = nodep->fileline();
-        const auto castable = computeCastable(toDtp, fromDtp, nodep->fromp());
+        const auto castable = AstNode::computeCastable(toDtp, fromDtp, nodep->fromp());
         AstNode* newp;
-        if (castable == DYNAMIC_CLASS) {
+        if (castable == VCastable::DYNAMIC_CLASS) {
             // Keep in place, will compute at runtime
             return;
-        } else if (castable == ENUM_EXPLICIT || castable == ENUM_IMPLICIT) {
+        } else if (castable == VCastable::ENUM_EXPLICIT || castable == VCastable::ENUM_IMPLICIT) {
             // TODO is from is a constant we could simplify, though normal constant
             // elimination should do much the same
             // Form: "( ((v > size) ? false : enum_valid[v[N:0]])
@@ -1885,7 +1870,7 @@ private:
                                               nodep->fromp()->unlinkFrBack()},
                                 new AstConst{fl, AstConst::Signed32{}, 1}},
                 new AstConst{fl, AstConst::Signed32{}, 0}};
-        } else if (castable == SAMEISH || castable == COMPATIBLE) {
+        } else if (castable == VCastable::SAMEISH || castable == VCastable::COMPATIBLE) {
             nodep->v3warn(CASTCONST, "$cast will always return one as "
                                          << toDtp->prettyDTypeNameQ()
                                          << " is always castable from "
@@ -1896,7 +1881,7 @@ private:
                 new AstAssign{fl, nodep->top()->unlinkFrBack(),
                               new AstCast{fl, nodep->fromp()->unlinkFrBack(), toDtp}},
                 new AstConst{fl, AstConst::Signed32{}, 1}};
-        } else if (castable == INCOMPATIBLE) {
+        } else if (castable == VCastable::INCOMPATIBLE) {
             newp = new AstConst{fl, 0};
             nodep->v3warn(CASTCONST, "$cast will always return zero as "
                                          << toDtp->prettyDTypeNameQ() << " is not castable from "
@@ -1941,23 +1926,24 @@ private:
             userIterateAndNext(nodep->fromp(), WidthVP{SELF, PRELIM}.p());
             AstNodeDType* const toDtp = nodep->dtypep()->skipRefToEnump();
             AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefToEnump();
-            const auto castable = computeCastable(toDtp, fromDtp, nodep->fromp());
+            const auto castable = AstNode::computeCastable(toDtp, fromDtp, nodep->fromp());
             bool bad = false;
-            if (castable == UNSUPPORTED) {
+            if (castable == VCastable::UNSUPPORTED) {
                 nodep->v3warn(E_UNSUPPORTED, "Unsupported: static cast to "
                                                  << toDtp->prettyDTypeNameQ() << " from "
                                                  << fromDtp->prettyDTypeNameQ());
                 bad = true;
-            } else if (castable == SAMEISH || castable == COMPATIBLE || castable == ENUM_IMPLICIT
-                       || castable == ENUM_EXPLICIT) {
+            } else if (castable == VCastable::SAMEISH || castable == VCastable::COMPATIBLE
+                       || castable == VCastable::ENUM_IMPLICIT
+                       || castable == VCastable::ENUM_EXPLICIT) {
                 ;  // Continue
-            } else if (castable == DYNAMIC_CLASS) {
+            } else if (castable == VCastable::DYNAMIC_CLASS) {
                 nodep->v3error("Dynamic, not static cast, required to cast "
                                << toDtp->prettyDTypeNameQ() << " from "
                                << fromDtp->prettyDTypeNameQ() << '\n'
                                << nodep->warnMore() << "... Suggest dynamic $cast");
                 bad = true;
-            } else if (castable == INCOMPATIBLE) {
+            } else if (castable == VCastable::INCOMPATIBLE) {
                 nodep->v3error("Incompatible types to static cast to "
                                << toDtp->prettyDTypeNameQ() << " from "
                                << fromDtp->prettyDTypeNameQ() << '\n');
@@ -4407,7 +4393,8 @@ private:
                                     "Case(type) statement requires items that have type() items");
                             } else {
                                 AstNodeDType* const condDtp = VN_AS(condAttrp->fromp(), NodeDType);
-                                if (computeCastable(exprDtp, condDtp, nodep) == SAMEISH) {
+                                if (AstNode::computeCastable(exprDtp, condDtp, nodep)
+                                    == VCastable::SAMEISH) {
                                     hit = true;
                                     break;
                                 }
@@ -6004,7 +5991,8 @@ private:
             UINFO(9, "==type lhsDtp " << lhsDtp << endl);
             UINFO(9, "==type rhsDtp " << lhsDtp << endl);
             const bool invert = VN_IS(nodep, NeqT);
-            const bool identical = computeCastable(lhsDtp, rhsDtp, nodep) == SAMEISH;
+            const bool identical
+                = AstNode::computeCastable(lhsDtp, rhsDtp, nodep) == VCastable::SAMEISH;
             UINFO(9, "== " << identical << endl);
             const bool eq = invert ^ identical;
             AstNode* const newp = new AstConst{nodep->fileline(), AstConst::BitTrue{}, eq};
@@ -6641,9 +6629,11 @@ private:
             if (expBasicp && underBasicp) {
                 if (const AstEnumDType* const expEnump
                     = VN_CAST(expDTypep->skipRefToEnump(), EnumDType)) {
-                    const auto castable = computeCastable(expEnump, underp->dtypep(), underp);
-                    if (castable != SAMEISH && castable != COMPATIBLE && castable != ENUM_IMPLICIT
-                        && !VN_IS(underp, Cast) && !VN_IS(underp, CastDynamic) && !m_enumItemp
+                    const auto castable
+                        = AstNode::computeCastable(expEnump, underp->dtypep(), underp);
+                    if (castable != VCastable::SAMEISH && castable != VCastable::COMPATIBLE
+                        && castable != VCastable::ENUM_IMPLICIT && !VN_IS(underp, Cast)
+                        && !VN_IS(underp, CastDynamic) && !m_enumItemp
                         && !nodep->fileline()->warnIsOff(V3ErrorCode::ENUMVALUE) && warnOn) {
                         underp->v3warn(ENUMVALUE,
                                        "Implicit conversion to enum "
@@ -7363,68 +7353,9 @@ private:
         return false;
     }
 
-    //----------------------------------------------------------------------
-    // METHODS - casting
-    static Castable computeCastableImp(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
-                                       const AstNode* fromConstp) {
-        const Castable castable = UNSUPPORTED;
-        toDtp = toDtp->skipRefToEnump();
-        fromDtp = fromDtp->skipRefToEnump();
-        if (toDtp == fromDtp) return SAMEISH;
-        if (toDtp->similarDType(fromDtp)) return SAMEISH;
-        // UNSUP unpacked struct/unions (treated like BasicDType)
-        const AstNodeDType* fromBaseDtp = computeCastableBase(fromDtp);
-
-        const bool fromNumericable
-            = VN_IS(fromBaseDtp, BasicDType) || VN_IS(fromBaseDtp, EnumDType)
-              || VN_IS(fromBaseDtp, StreamDType) || VN_IS(fromBaseDtp, NodeUOrStructDType);
-
-        const AstNodeDType* toBaseDtp = computeCastableBase(toDtp);
-        const bool toNumericable
-            = VN_IS(toBaseDtp, BasicDType) || VN_IS(toBaseDtp, NodeUOrStructDType);
-
-        if (toBaseDtp == fromBaseDtp) {
-            return COMPATIBLE;
-        } else if (toNumericable) {
-            if (fromNumericable) return COMPATIBLE;
-        } else if (VN_IS(toDtp, EnumDType)) {
-            if (VN_IS(fromBaseDtp, EnumDType) && toDtp->sameTree(fromDtp)) return ENUM_IMPLICIT;
-            if (fromNumericable) return ENUM_EXPLICIT;
-        } else if (VN_IS(toDtp, ClassRefDType) && VN_IS(fromConstp, Const)) {
-            if (VN_IS(fromConstp, Const) && VN_AS(fromConstp, Const)->num().isNull())
-                return COMPATIBLE;
-        } else if (VN_IS(toDtp, ClassRefDType) && VN_IS(fromDtp, ClassRefDType)) {
-            const auto toClassp = VN_AS(toDtp, ClassRefDType)->classp();
-            const auto fromClassp = VN_AS(fromDtp, ClassRefDType)->classp();
-            const bool downcast = AstClass::isClassExtendedFrom(toClassp, fromClassp);
-            const bool upcast = AstClass::isClassExtendedFrom(fromClassp, toClassp);
-            if (upcast) {
-                return COMPATIBLE;
-            } else if (downcast) {
-                return DYNAMIC_CLASS;
-            } else {
-                return INCOMPATIBLE;
-            }
-        }
-        return castable;
-    }
-    static const AstNodeDType* computeCastableBase(const AstNodeDType* nodep) {
-        while (true) {
-            if (const AstPackArrayDType* const packp = VN_CAST(nodep, PackArrayDType)) {
-                nodep = packp->subDTypep();
-                continue;
-            } else if (const AstNodeDType* const refp = nodep->skipRefToEnump()) {
-                if (refp != nodep) {
-                    nodep = refp;
-                    continue;
-                }
-            }
-            return nodep;
-        }
-    }
-
     //----------------------------------------------------------------------
     // METHODS - special type detection
+
     void assertAtStatement(AstNode* nodep) {
         if (VL_UNCOVERABLE(m_vup && !m_vup->selfDtm())) {
             UINFO(1, "-: " << m_vup << endl);
@@ -7529,15 +7460,6 @@ public:
         return userIterateSubtreeReturnEdits(nodep, WidthVP{SELF, BOTH}.p());
     }
     ~WidthVisitor() override = default;
-
-    static Castable computeCastable(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
-                                    const AstNode* fromConstp) {
-        const auto castable = computeCastableImp(toDtp, fromDtp, fromConstp);
-        UINFO(9, "  castable=" << castable << "  for " << toDtp << endl);
-        UINFO(9, "     =?= " << fromDtp << endl);
-        UINFO(9, "     const= " << fromConstp << endl);
-        return castable;
-    }
 };
 
 //######################################################################
@@ -7555,36 +7477,6 @@ void V3Width::width(AstNetlist* nodep) {
     }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("width", 0, dumpTreeLevel() >= 3);
 }
-
-AstNodeDType* V3Width::getCommonClassTypep(AstNode* nodep1, AstNode* nodep2) {
-    // Return the class type that both nodep1 and nodep2 are castable to.
-    // If both are null, return the type of null constant.
-    // If one is a class and one is null, return AstClassRefDType that points to that class.
-    // If no common class type exists, return nullptr.
-
-    // First handle cases with null values and when one class is a super class of the other.
-    if (VN_IS(nodep1, Const)) std::swap(nodep1, nodep2);
-    {
-        const Castable castable
-            = WidthVisitor::computeCastable(nodep1->dtypep(), nodep2->dtypep(), nodep2);
-        if (castable == SAMEISH || castable == COMPATIBLE) {
-            return nodep1->dtypep();
-        } else if (castable == DYNAMIC_CLASS) {
-            return nodep2->dtypep();
-        }
-    }
-
-    AstClassRefDType* classDtypep1 = VN_CAST(nodep1->dtypep(), ClassRefDType);
-    while (classDtypep1) {
-        const Castable castable
-            = WidthVisitor::computeCastable(classDtypep1, nodep2->dtypep(), nodep2);
-        if (castable == COMPATIBLE) return classDtypep1;
-        AstClassExtends* const extendsp = classDtypep1->classp()->extendsp();
-        classDtypep1 = extendsp ? VN_AS(extendsp->dtypep(), ClassRefDType) : nullptr;
-    }
-    return nullptr;
-}
-
 //! Single node parameter propagation
 //! Smaller step... Only do a single node for parameter propagation
 AstNode* V3Width::widthParamsEdit(AstNode* nodep) {
diff --git a/src/V3Width.h b/src/V3Width.h
index fd9f17af5..0ac3a6b25 100644
--- a/src/V3Width.h
+++ b/src/V3Width.h
@@ -34,8 +34,6 @@ public:
     static AstNode* widthParamsEdit(AstNode* nodep) VL_MT_DISABLED;
     static AstNode* widthGenerateParamsEdit(AstNode* nodep) VL_MT_DISABLED;
 
-    static AstNodeDType* getCommonClassTypep(AstNode* nodep1, AstNode* nodep2) VL_MT_DISABLED;
-
     // For use only in WidthVisitor
     // Replace AstSelBit, etc with AstSel/AstArraySel
     // Returns replacement node if nodep was deleted, or null if none.

From a4b7c39a9abf32b4c3c964bdc9d1c772c72147cf Mon Sep 17 00:00:00 2001
From: Gus Smith <guscomps@gmail.com>
Date: Tue, 10 Oct 2023 14:53:02 -0700
Subject: [PATCH 056/157] Fix Verilated Makefile to get CXX etc. from
 enviorment (#4549) (#4554)

---
 docs/CONTRIBUTORS       |  1 +
 include/verilated.mk.in | 10 +++++-----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 92c0ec46c..09c1ae87b 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -49,6 +49,7 @@ Glen Gibb
 Gökçe Aydos
 Graham Rushton
 Guokai Chen
+Gus Smith
 Gustav Svensk
 Harald Heckmann
 Hennadii Chernyshchyk
diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index 4f138288b..6b0bda50d 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -9,12 +9,12 @@
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 ######################################################################
 
-AR = @AR@
-CXX = @CXX@
-LINK = @CXX@
+AR ?= @AR@
+CXX ?= @CXX@
+LINK ?= @CXX@
 OBJCACHE ?= @OBJCACHE@
-PERL = @PERL@
-PYTHON3 = @PYTHON3@
+PERL ?= @PERL@
+PYTHON3 ?= @PYTHON3@
 
 CFG_WITH_CCWARN = @CFG_WITH_CCWARN@
 CFG_WITH_LONGTESTS = @CFG_WITH_LONGTESTS@

From 7ce0bd1181d00c4bca0867717b1f5ed0356782bb Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Tue, 10 Oct 2023 22:55:40 +0100
Subject: [PATCH 057/157] Fix broken link error for enum references (#4551)

---
 src/V3AstNodeExpr.h                  |  4 +--
 src/V3AstNodes.cpp                   |  6 +++++
 test_regress/t/t_enum_param_class.pl | 21 ++++++++++++++++
 test_regress/t/t_enum_param_class.v  | 37 ++++++++++++++++++++++++++++
 4 files changed, 65 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_enum_param_class.pl
 create mode 100644 test_regress/t/t_enum_param_class.v

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 002b980c5..a4126dad0 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1144,9 +1144,7 @@ public:
     string name() const override VL_MT_STABLE { return itemp()->name(); }
     int instrCount() const override { return 0; }
     const char* broken() const override;
-    void cloneRelink() override {
-        if (m_itemp->clonep()) m_itemp = m_itemp->clonep();
-    }
+    void cloneRelink() override;
     bool same(const AstNode* samep) const override {
         const AstEnumItemRef* const sp = static_cast<const AstEnumItemRef*>(samep);
         return itemp() == sp->itemp();
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 507bcfbbc..7ba41a926 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1614,6 +1614,12 @@ const char* AstEnumItemRef::broken() const {
     BROKEN_RTN(m_classOrPackagep && !m_classOrPackagep->brokeExists());
     return nullptr;
 }
+void AstEnumItemRef::cloneRelink() {
+    if (m_itemp->clonep()) m_itemp = m_itemp->clonep();
+    if (m_classOrPackagep && m_classOrPackagep->clonep()) {
+        m_classOrPackagep = m_classOrPackagep->clonep();
+    }
+}
 void AstIfaceRefDType::dump(std::ostream& str) const {
     this->AstNodeDType::dump(str);
     if (cellName() != "") str << " cell=" << cellName();
diff --git a/test_regress/t/t_enum_param_class.pl b/test_regress/t/t_enum_param_class.pl
new file mode 100755
index 000000000..b46d46042
--- /dev/null
+++ b/test_regress/t/t_enum_param_class.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_enum_param_class.v b/test_regress/t/t_enum_param_class.v
new file mode 100644
index 000000000..c59f4b523
--- /dev/null
+++ b/test_regress/t/t_enum_param_class.v
@@ -0,0 +1,37 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+/// (See bug4551)
+/// Verilator creates an AstEnumItemRef for each reference. If the enum is inside a parameterizable class/module, it
+/// should be handled properly.
+
+class ClsParam #(
+   int A = 0
+);
+    typedef enum int {
+        EN_A = A + 0,
+        EN_B = A + 1,
+        EN_C = A + 2
+    } enums_t;
+
+    int val = EN_C;
+    function int test();
+        return EN_C;
+    endfunction
+endclass;
+
+module t;
+    // localparam ENUM_VAL = ClsParam#(100)::EN_C; // TODO: Unsupported: dotted expressions in parameters
+    // $info("ENUM_VAL: %0d", ENUM_VAL);
+
+    ClsParam#(100) cls = new;
+    initial begin
+        if (cls.test() != 102) $stop;
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+
+endmodule

From 1fd8e772b0920684495d6367b58ac34e8f1c2ad0 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Oct 2023 20:40:21 -0400
Subject: [PATCH 058/157] Fix loss of warning source content with `line enter
 (due to earlier commit 472ad90d837448ebc8e1647d54bbc4fa5bed681a).

---
 src/V3FileLine.h                            |  1 +
 src/V3ParseImp.cpp                          |  5 ++++-
 test_regress/t/t_lint_warn_incfile2_bad.out |  2 ++
 test_regress/t/t_lint_warn_line_bad.out     |  7 +++++++
 test_regress/t/t_lint_warn_line_bad.pl      | 22 +++++++++++++++++++++
 test_regress/t/t_lint_warn_line_bad.v       | 14 +++++++++++++
 test_regress/t/t_vlt_warn_file_bad.out      |  2 ++
 7 files changed, 52 insertions(+), 1 deletion(-)
 create mode 100644 test_regress/t/t_lint_warn_line_bad.out
 create mode 100755 test_regress/t/t_lint_warn_line_bad.pl
 create mode 100644 test_regress/t/t_lint_warn_line_bad.v

diff --git a/src/V3FileLine.h b/src/V3FileLine.h
index 03cf71695..cdc6ab748 100644
--- a/src/V3FileLine.h
+++ b/src/V3FileLine.h
@@ -210,6 +210,7 @@ public:
         lineno(num);
         m_contentLineno = static_cast<unsigned>(num);
     }
+    void contentLinenoFrom(const FileLine* fromp) { m_contentLineno = fromp->m_contentLineno; }
     void lineno(int num) {
         m_firstLineno = num;
         m_lastLineno = num;
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index e2bfdedcf..1a058be02 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -85,8 +85,11 @@ void V3ParseImp::lexPpline(const char* textp) {
         lexFileline(newFl);
         lexFileline()->parent(prevFl);
     } else if (enterExit == 2) {  // Exit
+        const FileLine* const prevFl = lexFileline();
         if (FileLine* upFl = lexFileline()->parent()) {
-            lexFileline(upFl);  // Restore warning state to upper file
+            // Must copy upFl as may be existing nodes that use the FileLine value
+            lexFileline(new FileLine{upFl});  // Restore warning state to upper file
+            lexFileline()->contentLinenoFrom(prevFl);
         }
     }
     if (enterExit != -1) {  // Line/fn change
diff --git a/test_regress/t/t_lint_warn_incfile2_bad.out b/test_regress/t/t_lint_warn_incfile2_bad.out
index 5060cbd21..bea3e325b 100644
--- a/test_regress/t/t_lint_warn_incfile2_bad.out
+++ b/test_regress/t/t_lint_warn_incfile2_bad.out
@@ -1,5 +1,7 @@
 %Warning-WIDTHTRUNC: t/t_lint_warn_incfile2_bad.v:13:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
                                                        : ... note: In instance 't'
+   13 |    int warn_t = 64'h1;   
+      |                 ^~~~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_warn_line_bad.out b/test_regress/t/t_lint_warn_line_bad.out
new file mode 100644
index 000000000..eec0f2982
--- /dev/null
+++ b/test_regress/t/t_lint_warn_line_bad.out
@@ -0,0 +1,7 @@
+%Warning-WIDTHTRUNC: the_line_file:13:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
+                                        : ... note: In instance 't'
+   13 |    int warn_t = 64'h1;   
+      |                 ^~~~~
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_warn_line_bad.pl b/test_regress/t/t_lint_warn_line_bad.pl
new file mode 100755
index 000000000..b3cdb56a9
--- /dev/null
+++ b/test_regress/t/t_lint_warn_line_bad.pl
@@ -0,0 +1,22 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2008 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    # See also t/t_lint_warn_incfile1_bad
+    # See also t/t_vlt_warn_file_bad
+    verilator_flags2 => ["--no-std"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_lint_warn_line_bad.v b/test_regress/t/t_lint_warn_line_bad.v
new file mode 100644
index 000000000..0c219e8a7
--- /dev/null
+++ b/test_regress/t/t_lint_warn_line_bad.v
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// Check that `line `__LINE__ still shows proper warning context
+
+`line `__LINE__ "the_line_file" 1
+`line `__LINE__ "the_line_file" 2
+
+module t;
+   int warn_t = 64'h1;  // Not suppressed - should warn
+endmodule
diff --git a/test_regress/t/t_vlt_warn_file_bad.out b/test_regress/t/t_vlt_warn_file_bad.out
index 6ff3c6fe0..77804160c 100644
--- a/test_regress/t/t_vlt_warn_file_bad.out
+++ b/test_regress/t/t_vlt_warn_file_bad.out
@@ -1,5 +1,7 @@
 %Warning-WIDTHTRUNC: t/t_vlt_warn_file_bad.v:11:17: Operator ASSIGN expects 32 bits on the Assign RHS, but Assign RHS's CONST '64'h1' generates 64 bits.
                                                   : ... note: In instance 't'
+   11 |    int warn_t = 64'h1;
+      |                 ^~~~~
                      ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
                      ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
 %Error: Exiting due to

From bd4eede6b47bc894f73ba6151f2ffe63db8feb3d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Oct 2023 20:43:32 -0400
Subject: [PATCH 059/157] Commentary: Changes update

---
 Changes | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Changes b/Changes
index 63b868510..0c7f831d4 100644
--- a/Changes
+++ b/Changes
@@ -34,7 +34,10 @@ Verilator 5.017 devel
 * Fix stream operations with operands of struct type (#4531) (#4532). [Ryszard Rozak, Antmicro Ltd.]
 * Fix 'this' in a constructor (#4533). [Ryszard Rozak, Antmicro Ltd.]
 * Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
+* Fix object destruction after a copy constructor (#4540) (#4541). [Ryszard Rozak, Antmicro Ltd.]
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
+* Fix Verilated Makefile to get CXX etc. from environment (#4549) (#4554). [Gus Smith]
+* Fix broken link error for enum references (#4551). [Anthony Donlon]
 * Fix preprocessor to show `line 2 on resumed file.
 
 

From d699caf255412d4bfdc45886139329be500acd1d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 12 Oct 2023 04:22:58 -0400
Subject: [PATCH 060/157] Revert fix Verilated Makefile to get CXX etc. from
 environment (#4549) (#4554).

---
 Changes                 |  1 -
 include/verilated.mk.in | 14 +++++++++-----
 2 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/Changes b/Changes
index 0c7f831d4..c34674158 100644
--- a/Changes
+++ b/Changes
@@ -36,7 +36,6 @@ Verilator 5.017 devel
 * Fix stream shift operator of 32 bits (#4536). [Julien Faucher]
 * Fix object destruction after a copy constructor (#4540) (#4541). [Ryszard Rozak, Antmicro Ltd.]
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
-* Fix Verilated Makefile to get CXX etc. from environment (#4549) (#4554). [Gus Smith]
 * Fix broken link error for enum references (#4551). [Anthony Donlon]
 * Fix preprocessor to show `line 2 on resumed file.
 
diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index 6b0bda50d..4c97a82e4 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -9,13 +9,17 @@
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 ######################################################################
 
-AR ?= @AR@
-CXX ?= @CXX@
-LINK ?= @CXX@
+# Tool names.
+# These are computed at configuration time, and most are not ?=
+# to avoid picking up potentilly incorrect Make implicit variables
+AR = @AR@
+CXX = @CXX@
+LINK = @CXX@
 OBJCACHE ?= @OBJCACHE@
-PERL ?= @PERL@
-PYTHON3 ?= @PYTHON3@
+PERL = @PERL@
+PYTHON3 = @PYTHON3@
 
+# Configuration time options
 CFG_WITH_CCWARN = @CFG_WITH_CCWARN@
 CFG_WITH_LONGTESTS = @CFG_WITH_LONGTESTS@
 

From edfd3d72064df6e9690dd8d44cbc148f13dfc1a6 Mon Sep 17 00:00:00 2001
From: Varun Koyyalagunta <vkoyyalagunta@tenstorrent.com>
Date: Thu, 12 Oct 2023 17:08:58 -0500
Subject: [PATCH 061/157] Fix large constant buffer overflow (#4556)

---
 include/verilated_funcs.h                 | 56 ++++++++--------
 test_regress/t/t_struct_param_overflow.pl | 21 ++++++
 test_regress/t/t_struct_param_overflow.v  | 81 +++++++++++++++++++++++
 3 files changed, 130 insertions(+), 28 deletions(-)
 create mode 100755 test_regress/t/t_struct_param_overflow.pl
 create mode 100644 test_regress/t/t_struct_param_overflow.v

diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 22285812e..4037b23c4 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -2111,60 +2111,60 @@ static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
     VL_C_END_(obits, 8);
 }
 //
-static inline WDataOutP VL_CONSTHI_W_1X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_1X(int obits, int lsb, WDataOutP o,
                                         EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 1);
 }
-static inline WDataOutP VL_CONSTHI_W_2X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_2X(int obits, int lsb, WDataOutP o,
                                         EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 2);
 }
-static inline WDataOutP VL_CONSTHI_W_3X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_3X(int obits, int lsb, WDataOutP o,
                                         EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 3);
 }
-static inline WDataOutP VL_CONSTHI_W_4X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_4X(int obits, int lsb, WDataOutP o,
                                         EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;  ohi[3] = d3;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 4);
 }
-static inline WDataOutP VL_CONSTHI_W_5X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_5X(int obits, int lsb, WDataOutP o,
                                         EData d4,
                                         EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
-    o[4] = d4;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;  ohi[3] = d3;
+    ohi[4] = d4;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 5);
 }
-static inline WDataOutP VL_CONSTHI_W_6X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_6X(int obits, int lsb, WDataOutP o,
                                         EData d5, EData d4,
                                         EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
-    o[4] = d4;  o[5] = d5;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;  ohi[3] = d3;
+    ohi[4] = d4;  ohi[5] = d5;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 6);
 }
-static inline WDataOutP VL_CONSTHI_W_7X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_7X(int obits, int lsb, WDataOutP o,
                                         EData d6, EData d5, EData d4,
                                         EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
-    o[4] = d4;  o[5] = d5;  o[6] = d6;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;  ohi[3] = d3;
+    ohi[4] = d4;  ohi[5] = d5;  ohi[6] = d6;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 7);
 }
-static inline WDataOutP VL_CONSTHI_W_8X(int obits, int lsb, WDataOutP obase,
+static inline WDataOutP VL_CONSTHI_W_8X(int obits, int lsb, WDataOutP o,
                                         EData d7, EData d6, EData d5, EData d4,
                                         EData d3, EData d2, EData d1, EData d0) VL_MT_SAFE {
-    WDataOutP o = obase + VL_WORDS_I(lsb);
-    o[0] = d0;  o[1] = d1;  o[2] = d2;  o[3] = d3;
-    o[4] = d4;  o[5] = d5;  o[6] = d6;  o[7] = d7;
+    WDataOutP ohi = o + VL_WORDS_I(lsb);
+    ohi[0] = d0;  ohi[1] = d1;  ohi[2] = d2;  ohi[3] = d3;
+    ohi[4] = d4;  ohi[5] = d5;  ohi[6] = d6;  ohi[7] = d7;
     VL_C_END_(obits, VL_WORDS_I(lsb) + 8);
 }
 
diff --git a/test_regress/t/t_struct_param_overflow.pl b/test_regress/t/t_struct_param_overflow.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_struct_param_overflow.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_struct_param_overflow.v b/test_regress/t/t_struct_param_overflow.v
new file mode 100644
index 000000000..97f3220ec
--- /dev/null
+++ b/test_regress/t/t_struct_param_overflow.v
@@ -0,0 +1,81 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Varun Koyyalagunta.
+// SPDX-License-Identifier: CC0-1.0
+
+package config_pkg;
+
+    localparam int unsigned N = 10;
+
+    typedef struct packed {
+        logic [N-1:0][31:0] lo;
+        logic [N-1:0][31:0] hi;
+        logic [100-1:0][31:0] x;
+        int unsigned n;
+    } config_struct;
+
+    function automatic logic subcheck(logic[31:0] lo, logic[31:0] hi, logic[31:0] val);
+        return lo <= val && val < hi;
+    endfunction
+
+    function automatic logic check(config_struct cfg, logic[31:0] val);
+        logic[N-1:0] good = '0;
+        logic[N-1:0] bad  = '0;
+        for (int i = 0; i < cfg.n; i++) begin
+            good[i] = subcheck(cfg.lo[i], cfg.hi[i], val);
+        end
+        for (int i = cfg.n; i < N; i++) begin
+            bad[i] = !(cfg.lo[i] == '0 && cfg.hi[i] == '0);
+        end
+        return good != '0 && bad == '0;
+    endfunction
+
+endpackage : config_pkg
+
+module t(/*AUTOARG*/
+    // Inputs
+    clk
+);
+
+    input clk;
+    import config_pkg::*;
+
+    parameter config_struct MY_CONFIG = '{
+        lo: {((N-3)*32)'('0), 32'h00, 32'h10, 32'h20},
+        hi: {((N-3)*32)'('0), 32'h10, 32'h20, 32'h30},
+        x : 3200'h0deadbeef,
+        n : 3
+    };
+
+    struct_submodule #(.MY_CONFIG(MY_CONFIG)) a_submodule_I (.clk);
+endmodule : t
+
+module struct_submodule
+    import config_pkg::*;
+    #(
+        parameter config_struct MY_CONFIG = '0
+    ) (
+        input clk
+    );
+
+    logic [31:0] val;
+    logic c;
+    int count = 0;
+
+    assign val = 3;
+    assign c   = check(MY_CONFIG, count);
+
+    always @(posedge clk) begin
+        count <= count + 1;
+        if (c != '1) begin
+            $error("c not 1");
+            $stop;
+        end
+        if (count >= 10) begin
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+
+endmodule : struct_submodule

From 7eb09c3445d16544cb5fd70a9942d36f1315dad4 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 14 Oct 2023 15:19:19 -0400
Subject: [PATCH 062/157] Fix instance arrays connecting to array of structs
 (#4557).

---
 Changes                               |  1 +
 src/V3Inst.cpp                        |  6 ++--
 test_regress/t/t_inst_array_struct.pl | 21 ++++++++++++
 test_regress/t/t_inst_array_struct.v  | 48 +++++++++++++++++++++++++++
 4 files changed, 73 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_inst_array_struct.pl
 create mode 100644 test_regress/t/t_inst_array_struct.v

diff --git a/Changes b/Changes
index c34674158..4859331fe 100644
--- a/Changes
+++ b/Changes
@@ -37,6 +37,7 @@ Verilator 5.017 devel
 * Fix object destruction after a copy constructor (#4540) (#4541). [Ryszard Rozak, Antmicro Ltd.]
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
 * Fix broken link error for enum references (#4551). [Anthony Donlon]
+* Fix instance arrays connecting to array of structs (#4557). [raphmaster]
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 5f0455714..605dfbd0e 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -326,10 +326,10 @@ private:
                 = nodep->exprp()->dtypep()->dimensions(false);
             UINFO(4, "   PINVAR  " << nodep->modVarp() << endl);
             UINFO(4, "   EXP     " << nodep->exprp() << endl);
-            UINFO(4, "   modwidth ew=" << expwidth << " pw=" << modwidth << "  ed=" << expDim.first
-                                       << "," << expDim.second << "  pd=" << pinDim.first << ","
+            UINFO(4, "   expwidth=" << expwidth << " modwidth=" << modwidth << "  expDim(p,u)=" << expDim.first
+                                       << "," << expDim.second << "  pinDim(p,u)=" << pinDim.first << ","
                                        << pinDim.second << endl);
-            if (expDim.first == pinDim.first && expDim.second == pinDim.second + 1) {
+            if (expDim.second == pinDim.second + 1) {
                 // Connection to array, where array dimensions match the instant dimension
                 const AstRange* const rangep
                     = VN_AS(nodep->exprp()->dtypep(), UnpackArrayDType)->rangep();
diff --git a/test_regress/t/t_inst_array_struct.pl b/test_regress/t/t_inst_array_struct.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_inst_array_struct.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_inst_array_struct.v b/test_regress/t/t_inst_array_struct.v
new file mode 100644
index 000000000..35831162e
--- /dev/null
+++ b/test_regress/t/t_inst_array_struct.v
@@ -0,0 +1,48 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   typedef struct packed {
+      bit         one;
+      bit         two;
+   } ps_t;
+
+   ps_t in0 [2];
+   ps_t out0 [2];
+
+   bit [1:0] in1 [2] = {{1'b1, 1'b0}, {1'b0, 1'b1}};
+   bit [1:0] out1 [2];
+
+   Sub sub0 [2] (in0, out0);
+   Sub sub1 [2] (in1, out1);
+
+   int       cyc;
+
+   always @ (posedge clk) begin
+      cyc <= cyc + 1;
+      in0 = {{1'b1, 1'b0}, {1'b0, 1'b1}};
+      if (cyc == 9) begin
+         $display("%p %p", in0, out0);
+         $display("%p %p", in1, out1);
+         if (out0[0] != 2'h2 || out0[1] != 2'h1) $stop;
+         if (out1[0] != 2'h2 || out1[1] != 2'h1) $stop;
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+
+endmodule
+
+module Sub
+  (input bit [1:0] in,
+   output bit [1:0] out);
+   assign out = in;
+endmodule

From fa8eaf73558ba88f984d239f2871c2fb447b2db1 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Sat, 14 Oct 2023 19:20:22 +0000
Subject: [PATCH 063/157] Apply 'make format'

---
 src/V3Inst.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 605dfbd0e..dd3e7e283 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -326,9 +326,10 @@ private:
                 = nodep->exprp()->dtypep()->dimensions(false);
             UINFO(4, "   PINVAR  " << nodep->modVarp() << endl);
             UINFO(4, "   EXP     " << nodep->exprp() << endl);
-            UINFO(4, "   expwidth=" << expwidth << " modwidth=" << modwidth << "  expDim(p,u)=" << expDim.first
-                                       << "," << expDim.second << "  pinDim(p,u)=" << pinDim.first << ","
-                                       << pinDim.second << endl);
+            UINFO(4, "   expwidth=" << expwidth << " modwidth=" << modwidth
+                                    << "  expDim(p,u)=" << expDim.first << "," << expDim.second
+                                    << "  pinDim(p,u)=" << pinDim.first << "," << pinDim.second
+                                    << endl);
             if (expDim.second == pinDim.second + 1) {
                 // Connection to array, where array dimensions match the instant dimension
                 const AstRange* const rangep

From b5a6b34968d3c87780e6e03104f9ab97f4e024b1 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 14 Oct 2023 18:28:47 -0400
Subject: [PATCH 064/157] Tests: Remove old hack from before unpacked structs

---
 test_regress/t/t_sv_cpu_code/ports.sv | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/test_regress/t/t_sv_cpu_code/ports.sv b/test_regress/t/t_sv_cpu_code/ports.sv
index 3eeb00b3d..da9dbc25b 100644
--- a/test_regress/t/t_sv_cpu_code/ports.sv
+++ b/test_regress/t/t_sv_cpu_code/ports.sv
@@ -6,12 +6,6 @@
 
 // Contributed by M W Lund, Atmel Corporation.
 
-`ifdef VERILATOR  //TODO
- `define PACKED packed
-`else
- `define  packed
-`endif
-
 module ports
  #( parameter
       ID = 1 )
@@ -42,12 +36,12 @@ module ports
 
 
   // **** Interal Registers ****
-  struct `PACKED
+  struct
   {
     logic [7:0][1:0] in;
     logic [7:0]      dir;
     logic [7:0]      out;
-    struct `PACKED
+    struct
     {
     logic [7:2]      reserved;
     logic            pullupen;

From 411f563cbea549bb727df76b38e4493430fd7b3f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 14 Oct 2023 22:20:42 -0400
Subject: [PATCH 065/157] Internals: Remove unneeded pure checks. No functional
 change.

---
 src/V3Const.cpp    | 2 +-
 src/V3Tristate.cpp | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 297cfb1f8..d3a95ae7b 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1884,7 +1884,7 @@ private:
         AstNodeExpr* const ap = lhsp->lhsp()->unlinkFrBack();
         AstNodeExpr* const bp = lhsp->rhsp()->unlinkFrBack();
         AstNodeBiop* const shift1p = nodep;
-        AstNodeBiop* const shift2p = nodep->cloneTreePure(true);
+        AstNodeBiop* const shift2p = nodep->cloneTree(true);
         shift1p->lhsp(ap);
         shift1p->rhsp(shiftp->cloneTreePure(true));
         shift2p->lhsp(bp);
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index f13c1dfa0..00e92e6e9 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -518,14 +518,14 @@ class TristateVisitor final : public TristateBaseVisitor {
 
             // Unlink lhsp before copying to save unnecessary copy of lhsp
             AstNodeExpr* const lhsp = extendp->lhsp()->unlinkFrBack();
-            AstExtend* const enExtendp = extendp->cloneTreePure(false);
+            AstExtend* const enExtendp = extendp->cloneTree(false);
             extendp->lhsp(lhsp);
             AstNodeExpr* const enLhsp = getEnExprBasedOnOriginalp(lhsp);
             enExtendp->lhsp(new AstNot{enLhsp->fileline(), enLhsp});
             return new AstNot{enExtendp->fileline(), enExtendp};
         } else if (AstSel* const selp = VN_CAST(nodep, Sel)) {
             AstNodeExpr* const fromp = selp->fromp()->unlinkFrBack();
-            AstSel* const enSelp = selp->cloneTreePure(false);
+            AstSel* const enSelp = selp->cloneTree(false);
             selp->fromp(fromp);
             AstNodeExpr* const enFromp = getEnExprBasedOnOriginalp(fromp);
             enSelp->fromp(enFromp);

From 3940a214d0f8ece08ec4a29ed05808f51ca32b36 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 14 Oct 2023 22:22:00 -0400
Subject: [PATCH 066/157] Internals: Reorder some shift functions for next
 commit. No functional change.

---
 include/verilated_funcs.h | 40 ++++++++++++++++++---------------------
 1 file changed, 18 insertions(+), 22 deletions(-)

diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 4037b23c4..57c47d46d 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -1647,6 +1647,14 @@ static inline void _vl_shiftl_inplace_w(int obits, WDataOutP iowp,
 // EMIT_RULE: VL_SHIFTL:  oclean=lclean; rclean==clean;
 // Important: Unlike most other funcs, the shift might well be a computed
 // expression.  Thus consider this when optimizing.  (And perhaps have 2 funcs?)
+static inline IData VL_SHIFTL_IIQ(int obits, int, int, IData lhs, QData rhs) VL_MT_SAFE {
+    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
+    return VL_CLEAN_II(obits, obits, lhs << rhs);
+}
+static inline QData VL_SHIFTL_QQQ(int obits, int, int, QData lhs, QData rhs) VL_MT_SAFE {
+    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
+    return VL_CLEAN_QQ(obits, obits, lhs << rhs);
+}
 static inline WDataOutP VL_SHIFTL_WWI(int obits, int, int, WDataOutP owp, WDataInP const lwp,
                                       IData rd) VL_MT_SAFE {
     const int word_shift = VL_BITWORD_E(rd);
@@ -1686,10 +1694,6 @@ static inline IData VL_SHIFTL_IIW(int obits, int, int rbits, IData lhs,
     }
     return VL_CLEAN_II(obits, obits, lhs << rwp[0]);
 }
-static inline IData VL_SHIFTL_IIQ(int obits, int, int, IData lhs, QData rhs) VL_MT_SAFE {
-    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
-    return VL_CLEAN_II(obits, obits, lhs << rhs);
-}
 static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
                                   WDataInP const rwp) VL_MT_SAFE {
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
@@ -1700,14 +1704,18 @@ static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
     // Above checks rwp[1]==0 so not needed in below shift
     return VL_CLEAN_QQ(obits, obits, lhs << (static_cast<QData>(rwp[0])));
 }
-static inline QData VL_SHIFTL_QQQ(int obits, int, int, QData lhs, QData rhs) VL_MT_SAFE {
-    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
-    return VL_CLEAN_QQ(obits, obits, lhs << rhs);
-}
 
 // EMIT_RULE: VL_SHIFTR:  oclean=lclean; rclean==clean;
 // Important: Unlike most other funcs, the shift might well be a computed
 // expression.  Thus consider this when optimizing.  (And perhaps have 2 funcs?)
+static inline IData VL_SHIFTR_IIQ(int obits, int, int, IData lhs, QData rhs) VL_PURE {
+    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
+    return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
+}
+static inline QData VL_SHIFTR_QQQ(int obits, int, int, QData lhs, QData rhs) VL_PURE {
+    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
+    return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
+}
 static inline WDataOutP VL_SHIFTR_WWI(int obits, int, int, WDataOutP owp, WDataInP const lwp,
                                       IData rd) VL_MT_SAFE {
     const int word_shift = VL_BITWORD_E(rd);  // Maybe 0
@@ -1751,30 +1759,18 @@ static inline WDataOutP VL_SHIFTR_WWQ(int obits, int lbits, int rbits, WDataOutP
 static inline IData VL_SHIFTR_IIW(int obits, int, int rbits, IData lhs,
                                   WDataInP const rwp) VL_PURE {
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
-        if (VL_UNLIKELY(rwp[i])) {  // Huge shift 1>>32 or more
-            return 0;
-        }
+        if (VL_UNLIKELY(rwp[i])) return 0;  // Huge shift 1>>32 or more
     }
     return VL_CLEAN_II(obits, obits, lhs >> rwp[0]);
 }
 static inline QData VL_SHIFTR_QQW(int obits, int, int rbits, QData lhs,
                                   WDataInP const rwp) VL_PURE {
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
-        if (VL_UNLIKELY(rwp[i])) {  // Huge shift 1>>32 or more
-            return 0;
-        }
+        if (VL_UNLIKELY(rwp[i])) return 0;  // Huge shift 1>>32 or more
     }
     // Above checks rwp[1]==0 so not needed in below shift
     return VL_CLEAN_QQ(obits, obits, lhs >> (static_cast<QData>(rwp[0])));
 }
-static inline IData VL_SHIFTR_IIQ(int obits, int, int, IData lhs, QData rhs) VL_PURE {
-    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
-    return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
-}
-static inline QData VL_SHIFTR_QQQ(int obits, int, int, QData lhs, QData rhs) VL_PURE {
-    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
-    return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
-}
 
 // EMIT_RULE: VL_SHIFTRS:  oclean=false; lclean=clean, rclean==clean;
 static inline IData VL_SHIFTRS_III(int obits, int lbits, int, IData lhs, IData rhs) VL_PURE {

From 46f8a659b37f3d3ff259f1bfa5939ece2acf3387 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 14 Oct 2023 22:34:37 -0400
Subject: [PATCH 067/157] Fix shift to remove operation side effects (#4563).

---
 Changes                                 |  1 +
 include/verilated_funcs.h               | 29 ++++++++--
 src/V3AstNodeExpr.h                     | 76 +++++++++++++++++++++++++
 src/V3Const.cpp                         | 24 +++++---
 src/V3Premit.cpp                        | 72 +++++++++--------------
 test_regress/t/t_const_opt.pl           |  2 +-
 test_regress/t/t_const_opt_no_expand.pl |  2 +-
 test_regress/t/t_math_shift_side.pl     | 21 +++++++
 test_regress/t/t_math_shift_side.v      | 40 +++++++++++++
 9 files changed, 206 insertions(+), 61 deletions(-)
 create mode 100755 test_regress/t/t_math_shift_side.pl
 create mode 100644 test_regress/t/t_math_shift_side.v

diff --git a/Changes b/Changes
index 4859331fe..73f5a63f5 100644
--- a/Changes
+++ b/Changes
@@ -38,6 +38,7 @@ Verilator 5.017 devel
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
 * Fix broken link error for enum references (#4551). [Anthony Donlon]
 * Fix instance arrays connecting to array of structs (#4557). [raphmaster]
+* Fix shift to remove operation side effects (#4563).
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 57c47d46d..db24cfe9c 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -1647,10 +1647,20 @@ static inline void _vl_shiftl_inplace_w(int obits, WDataOutP iowp,
 // EMIT_RULE: VL_SHIFTL:  oclean=lclean; rclean==clean;
 // Important: Unlike most other funcs, the shift might well be a computed
 // expression.  Thus consider this when optimizing.  (And perhaps have 2 funcs?)
+// If RHS (rd/rwp) is larger than the output, zeros (or all ones for >>>) must be returned
+// (This corresponds to AstShift*Ovr Ast nodes)
+static inline IData VL_SHIFTL_III(int obits, int, int, IData lhs, IData rhs) VL_MT_SAFE {
+    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
+    return lhs << rhs;  // Small is common so not clean return
+}
 static inline IData VL_SHIFTL_IIQ(int obits, int, int, IData lhs, QData rhs) VL_MT_SAFE {
     if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
     return VL_CLEAN_II(obits, obits, lhs << rhs);
 }
+static inline QData VL_SHIFTL_QQI(int obits, int, int, QData lhs, IData rhs) VL_MT_SAFE {
+    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
+    return lhs << rhs;  // Small is common so not clean return
+}
 static inline QData VL_SHIFTL_QQQ(int obits, int, int, QData lhs, QData rhs) VL_MT_SAFE {
     if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
     return VL_CLEAN_QQ(obits, obits, lhs << rhs);
@@ -1692,7 +1702,7 @@ static inline IData VL_SHIFTL_IIW(int obits, int, int rbits, IData lhs,
             return 0;
         }
     }
-    return VL_CLEAN_II(obits, obits, lhs << rwp[0]);
+    return VL_SHIFTL_III(obits, obits, 32, lhs, rwp[0]);
 }
 static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
                                   WDataInP const rwp) VL_MT_SAFE {
@@ -1702,16 +1712,24 @@ static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs,
         }
     }
     // Above checks rwp[1]==0 so not needed in below shift
-    return VL_CLEAN_QQ(obits, obits, lhs << (static_cast<QData>(rwp[0])));
+    return VL_SHIFTL_QQI(obits, obits, 32, lhs, rwp[0]);
 }
 
 // EMIT_RULE: VL_SHIFTR:  oclean=lclean; rclean==clean;
 // Important: Unlike most other funcs, the shift might well be a computed
 // expression.  Thus consider this when optimizing.  (And perhaps have 2 funcs?)
+static inline IData VL_SHIFTR_III(int obits, int, int, IData lhs, IData rhs) VL_PURE {
+    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
+    return lhs >> rhs;  // Small is common so assumed not clean
+}
 static inline IData VL_SHIFTR_IIQ(int obits, int, int, IData lhs, QData rhs) VL_PURE {
     if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return 0;
     return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
 }
+static inline QData VL_SHIFTR_QQI(int obits, int, int, QData lhs, IData rhs) VL_PURE {
+    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
+    return lhs >> rhs;  // Small is common so assumed not clean
+}
 static inline QData VL_SHIFTR_QQQ(int obits, int, int, QData lhs, QData rhs) VL_PURE {
     if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return 0;
     return VL_CLEAN_QQ(obits, obits, lhs >> rhs);
@@ -1761,15 +1779,14 @@ static inline IData VL_SHIFTR_IIW(int obits, int, int rbits, IData lhs,
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
         if (VL_UNLIKELY(rwp[i])) return 0;  // Huge shift 1>>32 or more
     }
-    return VL_CLEAN_II(obits, obits, lhs >> rwp[0]);
+    return VL_SHIFTR_III(obits, obits, 32, lhs, rwp[0]);
 }
 static inline QData VL_SHIFTR_QQW(int obits, int, int rbits, QData lhs,
                                   WDataInP const rwp) VL_PURE {
     for (int i = 1; i < VL_WORDS_I(rbits); ++i) {
         if (VL_UNLIKELY(rwp[i])) return 0;  // Huge shift 1>>32 or more
     }
-    // Above checks rwp[1]==0 so not needed in below shift
-    return VL_CLEAN_QQ(obits, obits, lhs >> (static_cast<QData>(rwp[0])));
+    return VL_SHIFTR_QQI(obits, obits, 32, lhs, rwp[0]);
 }
 
 // EMIT_RULE: VL_SHIFTRS:  oclean=false; lclean=clean, rclean==clean;
@@ -1779,11 +1796,13 @@ static inline IData VL_SHIFTRS_III(int obits, int lbits, int, IData lhs, IData r
     // must use lbits for sign; lbits might != obits,
     // an EXTEND(SHIFTRS(...)) can became a SHIFTRS(...) within same 32/64 bit word length
     const IData sign = -(lhs >> (lbits - 1));  // ffff_ffff if negative
+    if (VL_UNLIKELY(rhs >= VL_IDATASIZE)) return sign & VL_MASK_I(obits);
     const IData signext = ~(VL_MASK_I(lbits) >> rhs);  // One with bits where we've shifted "past"
     return (lhs >> rhs) | (sign & VL_CLEAN_II(obits, obits, signext));
 }
 static inline QData VL_SHIFTRS_QQI(int obits, int lbits, int, QData lhs, IData rhs) VL_PURE {
     const QData sign = -(lhs >> (lbits - 1));
+    if (VL_UNLIKELY(rhs >= VL_QUADSIZE)) return sign & VL_MASK_Q(obits);
     const QData signext = ~(VL_MASK_Q(lbits) >> rhs);
     return (lhs >> rhs) | (sign & VL_CLEAN_QQ(obits, obits, signext));
 }
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index a4126dad0..009e4478b 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -3279,6 +3279,30 @@ public:
     bool sizeMattersLhs() const override { return true; }
     bool sizeMattersRhs() const override { return false; }
 };
+class AstShiftLOvr final : public AstNodeBiop {
+    // Like ShiftL but checks for an over shift and returns zeros
+    // TODO: All Verilog shifts should start as these and later get demoted to AstShiftL
+public:
+    AstShiftLOvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
+        : ASTGEN_SUPER_ShiftLOvr(fl, lhsp, rhsp) {
+        if (setwidth) dtypeSetLogicSized(setwidth, VSigning::UNSIGNED);
+    }
+    ASTGEN_MEMBERS_AstShiftLOvr;
+    AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
+        return new AstShiftLOvr{fileline(), lhsp, rhsp};
+    }
+    void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
+        out.opShiftL(lhs, rhs);
+    }
+    string emitVerilog() override { return "%k(%l %f<< %r)"; }
+    string emitC() override { return "VL_SHIFTL_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
+    string emitSimpleOperator() override { return ""; }
+    bool cleanOut() const override { return false; }
+    bool cleanLhs() const override { return false; }
+    bool cleanRhs() const override { return true; }
+    bool sizeMattersLhs() const override { return true; }
+    bool sizeMattersRhs() const override { return false; }
+};
 class AstShiftR final : public AstNodeBiop {
 public:
     AstShiftR(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
@@ -3304,6 +3328,31 @@ public:
     bool sizeMattersLhs() const override { return false; }
     bool sizeMattersRhs() const override { return false; }
 };
+class AstShiftROvr final : public AstNodeBiop {
+    // Like ShiftR but checks for an over shift and returns zeros
+    // TODO: All Verilog shifts should start as these and later get demoted to AstShiftR
+public:
+    AstShiftROvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
+        : ASTGEN_SUPER_ShiftROvr(fl, lhsp, rhsp) {
+        if (setwidth) dtypeSetLogicSized(setwidth, VSigning::UNSIGNED);
+    }
+    ASTGEN_MEMBERS_AstShiftROvr;
+    AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
+        return new AstShiftROvr{fileline(), lhsp, rhsp};
+    }
+    void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
+        out.opShiftR(lhs, rhs);
+    }
+    string emitVerilog() override { return "%k(%l %f>> %r)"; }
+    string emitC() override { return "VL_SHIFTR_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
+    string emitSimpleOperator() override { return ""; }
+    bool cleanOut() const override { return false; }
+    bool cleanLhs() const override { return true; }
+    bool cleanRhs() const override { return true; }
+    // LHS size might be > output size, so don't want to force size
+    bool sizeMattersLhs() const override { return false; }
+    bool sizeMattersRhs() const override { return false; }
+};
 class AstShiftRS final : public AstNodeBiop {
     // Shift right with sign extension, >>> operator
     // Output data type's width determines which bit is used for sign extension
@@ -3330,6 +3379,33 @@ public:
     bool sizeMattersRhs() const override { return false; }
     bool signedFlavor() const override { return true; }
 };
+class AstShiftRSOvr final : public AstNodeBiop {
+    // Shift right with sign extension, >>> operator, checks for an over shift and returns zeros
+    // Output data type's width determines which bit is used for sign extension
+    // TODO: All Verilog shifts should start as these and later get demoted to AstShiftRSOvr
+public:
+    AstShiftRSOvr(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
+        : ASTGEN_SUPER_ShiftRSOvr(fl, lhsp, rhsp) {
+        // Important that widthMin be correct, as opExtend requires it after V3Expand
+        if (setwidth) dtypeSetLogicSized(setwidth, VSigning::SIGNED);
+    }
+    ASTGEN_MEMBERS_AstShiftRSOvr;
+    AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
+        return new AstShiftRSOvr{fileline(), lhsp, rhsp};
+    }
+    void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) override {
+        out.opShiftRS(lhs, rhs, lhsp()->widthMinV());
+    }
+    string emitVerilog() override { return "%k(%l %f>>> %r)"; }
+    string emitC() override { return "VL_SHIFTRS_%nq%lq%rq(%nw,%lw,%rw, %P, %li, %ri)"; }
+    string emitSimpleOperator() override { return ""; }
+    bool cleanOut() const override { return false; }
+    bool cleanLhs() const override { return true; }
+    bool cleanRhs() const override { return true; }
+    bool sizeMattersLhs() const override { return false; }
+    bool sizeMattersRhs() const override { return false; }
+    bool signedFlavor() const override { return true; }
+};
 class AstSub final : public AstNodeBiop {
 public:
     AstSub(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp)
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index d3a95ae7b..1435d3ab0 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -3391,9 +3391,12 @@ private:
     TREEOP ("AstPowUS {$lhsp.isZero, !$rhsp.isZero}",   "replaceZeroChkPure(nodep,$rhsp)");
     TREEOP ("AstPowSU {$lhsp.isZero, !$rhsp.isZero}",   "replaceZeroChkPure(nodep,$rhsp)");
     TREEOP ("AstOr    {$lhsp.isZero, $rhsp}",   "replaceWRhs(nodep)");
-    TREEOP ("AstShiftL{$lhsp.isZero, $rhsp}",   "replaceZeroChkPure(nodep,$rhsp)");
-    TREEOP ("AstShiftR{$lhsp.isZero, $rhsp}",   "replaceZeroChkPure(nodep,$rhsp)");
-    TREEOP ("AstShiftRS{$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftL    {$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftLOvr {$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftR    {$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftROvr {$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftRS   {$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
+    TREEOP ("AstShiftRSOvr{$lhsp.isZero, $rhsp}",  "replaceZeroChkPure(nodep,$rhsp)");
     TREEOP ("AstXor   {$lhsp.isZero, $rhsp}",   "replaceWRhs(nodep)");
     TREEOP ("AstSub   {$lhsp.isZero, $rhsp}",   "AstNegate{$rhsp}");
     TREEOP ("AstAdd   {$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
@@ -3403,9 +3406,12 @@ private:
     TREEOP ("AstMul   {$lhsp, $rhsp.isZero}",   "replaceZeroChkPure(nodep,$lhsp)");
     TREEOP ("AstMulS  {$lhsp, $rhsp.isZero}",   "replaceZeroChkPure(nodep,$lhsp)");
     TREEOP ("AstOr    {$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
-    TREEOP ("AstShiftL{$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
-    TREEOP ("AstShiftR{$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
-    TREEOP ("AstShiftRS{$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftL    {$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftLOvr {$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftR    {$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftROvr {$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftRS   {$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
+    TREEOP ("AstShiftRSOvr{$lhsp, $rhsp.isZero}",  "replaceWLhs(nodep)");
     TREEOP ("AstSub   {$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
     TREEOP ("AstXor   {$lhsp, $rhsp.isZero}",   "replaceWLhs(nodep)");
     // Non-zero on one side or the other
@@ -3500,8 +3506,10 @@ private:
     TREEOPV("AstNot   {$lhsp.castGteS, $lhsp.width1}",  "AstLtS {$lhsp->castGteS()->lhsp(),$lhsp->castGteS()->rhsp()}");
     TREEOP ("AstLogNot{$lhsp.castGteS}",                "AstLtS {$lhsp->castGteS()->lhsp(),$lhsp->castGteS()->rhsp()}");
     // Not common, but avoids compiler warnings about over shifting
-    TREEOP ("AstShiftL{operandHugeShiftL(nodep)}",      "replaceZero(nodep)");
-    TREEOP ("AstShiftR{operandHugeShiftR(nodep)}",      "replaceZero(nodep)");
+    TREEOP ("AstShiftL   {operandHugeShiftL(nodep)}",   "replaceZero(nodep)");
+    TREEOP ("AstShiftLOvr{operandHugeShiftL(nodep)}",   "replaceZero(nodep)");
+    TREEOP ("AstShiftR   {operandHugeShiftR(nodep)}",   "replaceZero(nodep)");
+    TREEOP ("AstShiftROvr{operandHugeShiftR(nodep)}",   "replaceZero(nodep)");
     TREEOP ("AstShiftL{operandShiftOp(nodep)}",         "replaceShiftOp(nodep)");
     TREEOP ("AstShiftR{operandShiftOp(nodep)}",         "replaceShiftOp(nodep)");
     TREEOP ("AstShiftL{operandShiftShift(nodep)}",      "replaceShiftShift(nodep)");
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 78a748543..40ffc1c9e 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -49,11 +49,8 @@ class PremitVisitor final : public VNVisitor {
 private:
     // NODE STATE
     //  AstNodeExpr::user()     -> bool.  True if iterated already
-    //  AstShiftL::user2()      -> bool.  True if converted to conditional
-    //  AstShiftR::user2()      -> bool.  True if converted to conditional
     //  *::user3()              -> Used when visiting AstNodeAssign
     const VNUser1InUse m_inuser1;
-    const VNUser2InUse m_inuser2;
 
     // STATE - across all visitors
     VDouble0 m_extractedToConstPool;  // Statistic tracking
@@ -236,47 +233,33 @@ private:
     }
     void visitShift(AstNodeBiop* nodep) {
         // Shifts of > 32/64 bits in C++ will wrap-around and generate non-0s
-        if (!nodep->user2SetOnce()) {
-            UINFO(4, "  ShiftFix  " << nodep << endl);
-            const AstConst* const shiftp = VN_CAST(nodep->rhsp(), Const);
-            if (shiftp && shiftp->num().mostSetBitP1() > 32) {
-                shiftp->v3error(
-                    "Unsupported: Shifting of by over 32-bit number isn't supported."
-                    << " (This isn't a shift of 32 bits, but a shift of 2^32, or 4 billion!)\n");
-            }
-            if (nodep->widthMin() <= 64  // Else we'll use large operators which work right
-                                         // C operator's width must be < maximum shift which is
-                                         // based on Verilog width
-                && nodep->width() < (1LL << nodep->rhsp()->widthMin())) {
-                VNRelinker replaceHandle;
-                nodep->unlinkFrBack(&replaceHandle);
-                AstNodeExpr* constzerop;
-                const int m1value
-                    = nodep->widthMin() - 1;  // Constant of width-1; not changing dtype width
-                if (nodep->signedFlavor()) {
-                    // Then over shifting gives the sign bit, not all zeros
-                    // Note *NOT* clean output -- just like normal shift!
-                    // Create equivalent of VL_SIGNONES_(node_width)
-                    constzerop = new AstNegate{
-                        nodep->fileline(),
-                        new AstShiftR{nodep->fileline(), nodep->lhsp()->cloneTreePure(false),
-                                      new AstConst(nodep->fileline(), m1value), nodep->width()}};
-                } else {
-                    constzerop = new AstConst{nodep->fileline(), AstConst::WidthedValue{},
-                                              nodep->width(), 0};
-                }
-                constzerop->dtypeFrom(nodep);  // unsigned
-
-                AstNodeExpr* const constwidthp
-                    = new AstConst(nodep->fileline(), AstConst::WidthedValue{},
-                                   nodep->rhsp()->widthMin(), m1value);
-                constwidthp->dtypeFrom(nodep->rhsp());  // unsigned
-                AstCond* const newp = new AstCond{nodep->fileline(),
-                                                  new AstGte{nodep->fileline(), constwidthp,
-                                                             nodep->rhsp()->cloneTreePure(false)},
-                                                  nodep, constzerop};
-                replaceHandle.relink(newp);
+        UINFO(4, "  ShiftFix  " << nodep << endl);
+        const AstConst* const shiftp = VN_CAST(nodep->rhsp(), Const);
+        if (shiftp && shiftp->num().mostSetBitP1() > 32) {
+            shiftp->v3error(
+                "Unsupported: Shifting of by over 32-bit number isn't supported."
+                << " (This isn't a shift of 32 bits, but a shift of 2^32, or 4 billion!)\n");
+        }
+        if (nodep->widthMin() <= 64  // Else we'll use large operators which work right
+                                     // C operator's width must be < maximum shift which is
+                                     // based on Verilog width
+            && nodep->width() < (1LL << nodep->rhsp()->widthMin())) {
+            AstNode* newp;
+            if (VN_IS(nodep, ShiftL)) {
+                newp = new AstShiftLOvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
+                                        nodep->rhsp()->unlinkFrBack()};
+            } else if (VN_IS(nodep, ShiftR)) {
+                newp = new AstShiftROvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
+                                        nodep->rhsp()->unlinkFrBack()};
+            } else {
+                UASSERT_OBJ(VN_IS(nodep, ShiftRS), nodep, "Bad case");
+                newp = new AstShiftRSOvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
+                                         nodep->rhsp()->unlinkFrBack()};
             }
+            newp->dtypeFrom(nodep);
+            nodep->replaceWith(newp);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            return;
         }
         iterateChildren(nodep);
         checkNode(nodep);
@@ -403,9 +386,6 @@ public:
     }
 };
 
-//----------------------------------------------------------------------
-// Top loop
-
 //######################################################################
 // Premit class functions
 
diff --git a/test_regress/t/t_const_opt.pl b/test_regress/t/t_const_opt.pl
index c01b55613..9d9becae5 100755
--- a/test_regress/t/t_const_opt.pl
+++ b/test_regress/t/t_const_opt.pl
@@ -20,7 +20,7 @@ execute(
     );
 
 if ($Self->{vlt}) {
-    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 39);
+    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 36);
 }
 ok(1);
 1;
diff --git a/test_regress/t/t_const_opt_no_expand.pl b/test_regress/t/t_const_opt_no_expand.pl
index db812ea9a..d4701df03 100755
--- a/test_regress/t/t_const_opt_no_expand.pl
+++ b/test_regress/t/t_const_opt_no_expand.pl
@@ -21,7 +21,7 @@ execute(
     );
 
 if ($Self->{vlt}) {
-    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 2);
+    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 1);
 }
 ok(1);
 1;
diff --git a/test_regress/t/t_math_shift_side.pl b/test_regress/t/t_math_shift_side.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_math_shift_side.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_math_shift_side.v b/test_regress/t/t_math_shift_side.v
new file mode 100644
index 000000000..fe3c66924
--- /dev/null
+++ b/test_regress/t/t_math_shift_side.v
@@ -0,0 +1,40 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+class Cls;
+   int m_n_bits;
+
+   function int get_n_bytes;
+      return ((m_n_bits - 1) / 8) + 1;
+   endfunction
+
+endclass
+
+module t(/*AUTOARG*/);
+
+   int  i;
+
+   initial begin
+      Cls c;
+      c = new;
+
+      c.m_n_bits = 23;
+      if (c.get_n_bytes() != 3) $stop;
+
+      i = 1 << c.get_n_bytes();
+      if (i != 8) $stop;
+
+      i = 32'h1234 >> c.get_n_bytes();
+      if (i != 32'h246) $stop;
+
+      i = 32'shffffffff >>> c.get_n_bytes();
+      if (i != 32'hffffffff) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 684aba0e901738398fc92d0cd6b550ce5bbbbb92 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 15 Oct 2023 06:25:42 -0400
Subject: [PATCH 068/157] Fix purity calculation during V3Const simplifying Ast

---
 src/V3Ast.cpp       |  2 +-
 src/V3Ast.h         | 11 ++++++-----
 src/V3AstNodeExpr.h |  7 -------
 src/V3AstNodes.cpp  | 26 --------------------------
 src/V3Inline.cpp    |  2 +-
 src/V3LinkDot.cpp   |  1 +
 src/V3Premit.cpp    |  2 +-
 src/V3Scope.cpp     |  2 +-
 src/V3Task.cpp      |  2 +-
 9 files changed, 12 insertions(+), 43 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 6115dabf8..e85a2f980 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -33,7 +33,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 //======================================================================
 // Statics
 
-uint32_t VIsCached::s_cachedCntGbl = 1;
+uint64_t VIsCached::s_cachedCntGbl = 1;
 
 uint64_t AstNode::s_editCntLast = 0;
 uint64_t AstNode::s_editCntGbl = 0;  // Hot cache line
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 38dba7714..7fb97634d 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -171,10 +171,9 @@ class VIsCached final {
     // Used in some nodes to cache results of boolean methods
     // If cachedCnt == 0, not cached
     // else if cachedCnt == s_cachedCntGbl, then m_state is if cached
-    uint32_t m_cachedCnt : 31;  // Mark of when cache was computed
-    uint32_t m_state : 1;
-    static uint32_t s_cachedCntGbl;  // Global computed count
-    static constexpr uint32_t MAX_CNT = (1UL << 31) - 1;  // Max for m_cachedCnt
+    uint64_t m_cachedCnt : 63;  // Mark of when cache was computed
+    uint64_t m_state : 1;
+    static uint64_t s_cachedCntGbl;  // Global computed count
 
 public:
     VIsCached()
@@ -192,7 +191,8 @@ public:
     }
     static void clearCacheTree() {
         ++s_cachedCntGbl;
-        UASSERT_STATIC(s_cachedCntGbl < MAX_CNT, "Overflow of cache counting");
+        // 64 bits so won't overflow
+        // UASSERT_STATIC(s_cachedCntGbl < MAX_CNT, "Overflow of cache counting");
     }
 };
 
@@ -1956,6 +1956,7 @@ public:
     uint64_t editCount() const { return m_editCount; }
     void editCountInc() {
         m_editCount = ++s_editCntGbl;  // Preincrement, so can "watch AstNode::s_editCntGbl=##"
+        VIsCached::clearCacheTree();  // Any edit clears all caching
     }
 #else
     void editCountInc() { ++s_editCntGbl; }
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 009e4478b..580c5e3ce 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -64,7 +64,6 @@ public:
 
     // Wrap This expression into an AstStmtExpr to denote it occurs in statement position
     inline AstStmtExpr* makeStmt();
-    virtual void clearCachedPurity(){};  // Most nodes don't cache their purity
 };
 class AstNodeBiop VL_NOT_FINAL : public AstNodeExpr {
     // Binary expression
@@ -98,7 +97,6 @@ public:
     bool same(const AstNode*) const override { return true; }
     bool isPure() override;
     const char* broken() const override;
-    void clearCachedPurity() override;
 
 private:
     bool getPurityRecurse() const { return lhsp()->isPure() && rhsp()->isPure(); }
@@ -265,7 +263,6 @@ public:
     string emitVerilog() final override { V3ERROR_NA_RETURN(""); }
     string emitC() final override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const final override { V3ERROR_NA_RETURN(true); }
-    void clearCachedPurity() override;
 
 private:
     bool getPurityRecurse() const;
@@ -296,7 +293,6 @@ public:
     bool cleanOut() const final override { V3ERROR_NA_RETURN(true); }
     bool isPure() override;
     const char* broken() const override;
-    void clearCachedPurity() override;
 
 private:
     bool getPurityRecurse() const {
@@ -340,7 +336,6 @@ public:
     bool same(const AstNode*) const override { return true; }
     bool isPure() override;
     const char* broken() const override;
-    void clearCachedPurity() override;
 
 private:
     bool getPurityRecurse() const {
@@ -393,7 +388,6 @@ public:
     bool same(const AstNode*) const override { return true; }
     bool isPure() override;
     const char* broken() const override;
-    void clearCachedPurity() override;
 
 private:
     bool getPurityRecurse() const {
@@ -473,7 +467,6 @@ public:
     bool same(const AstNode*) const override { return true; }
     bool isPure() override;
     const char* broken() const override;
-    void clearCachedPurity() override;
 };
 class AstNodeSystemUniopD VL_NOT_FINAL : public AstNodeUniop {
 public:
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 7ba41a926..ccd0c24ed 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -72,11 +72,6 @@ bool AstNodeFTaskRef::isPure() {
     }
 }
 
-void AstNodeFTaskRef::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
-
 bool AstNodeFTaskRef::getPurityRecurse() const {
     AstNodeFTask* const taskp = this->taskp();
     // Unlinked yet, so treat as impure
@@ -152,11 +147,6 @@ const char* AstNodeUniop::broken() const {
     BROKEN_RTN(m_purity.isCached() && m_purity.get() != lhsp()->isPure());
     return nullptr;
 }
-void AstNodeUniop::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
-
 bool AstNodeBiop::isPure() {
     if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
     return m_purity.get();
@@ -165,10 +155,6 @@ const char* AstNodeBiop::broken() const {
     BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
-void AstNodeBiop::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
 
 bool AstNodeTriop::isPure() {
     if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
@@ -178,10 +164,6 @@ const char* AstNodeTriop::broken() const {
     BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
-void AstNodeTriop::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
 
 bool AstNodePreSel::isPure() {
     if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
@@ -191,10 +173,6 @@ const char* AstNodePreSel::broken() const {
     BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
-void AstNodePreSel::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
 
 bool AstNodeQuadop::isPure() {
     if (!m_purity.isCached()) m_purity.set(getPurityRecurse());
@@ -204,10 +182,6 @@ const char* AstNodeQuadop::broken() const {
     BROKEN_RTN(m_purity.isCached() && m_purity.get() != getPurityRecurse());
     return nullptr;
 }
-void AstNodeQuadop::clearCachedPurity() {
-    m_purity.clearCache();
-    if (AstNodeExpr* const exprp = VN_CAST(backp(), NodeExpr)) exprp->clearCachedPurity();
-}
 
 AstNodeCond::AstNodeCond(VNType t, FileLine* fl, AstNodeExpr* condp, AstNodeExpr* thenp,
                          AstNodeExpr* elsep)
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index f704c9fb7..4735bc079 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -174,7 +174,7 @@ private:
         // MethodCalls not currently supported by inliner, so keep linked
         if (!nodep->classOrPackagep() && !VN_IS(nodep, MethodCall)) {
             nodep->taskp(nullptr);
-            nodep->clearCachedPurity();
+            VIsCached::clearCacheTree();
         }
         iterateChildren(nodep);
     }
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 7ea95b46f..dd9a6548c 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3726,6 +3726,7 @@ public:
 // Link class functions
 
 void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
+    VIsCached::clearCacheTree();  // Avoid using any stale isPure
     if (debug() >= 5 || dumpTreeLevel() >= 9) {
         v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot.tree"));
     }
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 40ffc1c9e..57a5c3826 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -331,7 +331,7 @@ private:
             // We're going to need the expression several times in the expanded code,
             // so might as well make it a common expression
             createDeepTemp(nodep->condp(), false);
-            nodep->clearCachedPurity();
+            VIsCached::clearCacheTree();
         }
         checkNode(nodep);
     }
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index c68b14fe8..c60a8c935 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -396,7 +396,7 @@ private:
             UINFO(9, "   New pkg-taskref " << nodep << endl);
         } else if (!VN_IS(nodep, MethodCall)) {
             nodep->taskp(nullptr);
-            nodep->clearCachedPurity();
+            VIsCached::clearCacheTree();
             UINFO(9, "   New pkg-taskref " << nodep << endl);
         }
         iterateChildren(nodep);
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 576342885..5e1ce27a0 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -1469,9 +1469,9 @@ private:
             beginp = new AstExprStmt{nodep->fileline(), beginp, outrefp};
             // AstExprStmt is currently treated as impure, so clear the cached purity of its
             // parents
-            nodep->clearCachedPurity();
             nodep->replaceWith(beginp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
+            VIsCached::clearCacheTree();
         } else {
             insertBeforeStmt(nodep, beginp);
             if (nodep->taskp()->isFunction()) {

From c14eae6d5620efe159ac3f35c92eed6d233536cd Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 15 Oct 2023 06:44:35 -0400
Subject: [PATCH 069/157] Add SIDEEFFECT warning on mishandled side effect
 cases (#487 partial)

---
 Changes                                  |  1 +
 docs/guide/warnings.rst                  | 33 ++++++++++++++++++++++++
 src/V3Ast.cpp                            | 27 ++++++++++++-------
 src/V3Ast.h                              |  8 +++---
 src/V3Error.h                            |  7 +++--
 src/V3LinkInc.cpp                        | 20 --------------
 test_regress/t/t_altera_lpm.v            |  2 ++
 test_regress/t/t_expr_incr_unsup.out     | 10 +++++--
 test_regress/t/t_lint_sideeffect_bad.out | 24 +++++++++++++++++
 test_regress/t/t_lint_sideeffect_bad.pl  | 19 ++++++++++++++
 test_regress/t/t_lint_sideeffect_bad.v   | 22 ++++++++++++++++
 test_regress/t/t_stmt_incr_unsup.out     | 10 +++++--
 test_regress/t/t_sv_cpu_code/ports.sv    |  2 ++
 13 files changed, 145 insertions(+), 40 deletions(-)
 create mode 100644 test_regress/t/t_lint_sideeffect_bad.out
 create mode 100755 test_regress/t/t_lint_sideeffect_bad.pl
 create mode 100644 test_regress/t/t_lint_sideeffect_bad.v

diff --git a/Changes b/Changes
index 73f5a63f5..cc313c39f 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.017 devel
 
 **Minor:**
 
+* Add SIDEEFFECT warning on mishandled side effect cases.
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
 * Support randc (#4349).
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 4588fd28b..2691e9acf 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1514,6 +1514,39 @@ List Of Warnings
    modeled values, or DPI calls.
 
 
+.. option:: SIDEEFFECT
+
+   Warns that an expression has a side effect that might not properly be
+   executed by Verilator.
+
+   This often represents a bug in Verilator, as opposed to a bad code
+   construct, however the Verilog code can typically be changed to avoid
+   the warning.
+
+   Faulty example:
+
+   .. code-block:: sv
+      :linenos:
+      :emphasize-lines: 1
+
+         x = y[a++];
+
+   This example warns because Verilator does not currently handle side
+   effects inside array subscripts; the a++ may be executed multiple times.
+
+   Rewrite the code to avoid expression side effects, typically by using a
+   temporary:
+
+   .. code-block:: sv
+      :linenos:
+
+         temp = a++;
+         x = y[temp];
+
+   Ignoring this warning may make Verilator simulations differ from other
+   simulators.
+
+
 .. option:: SPLITVAR
 
    Warns that a variable with a :option:`/*verilator&32;split_var*/`
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index e85a2f980..30ebd67cf 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -801,26 +801,33 @@ void AstNode::swapWith(AstNode* bp) {
 //======================================================================
 // Clone
 
-AstNode* AstNode::cloneTreeIter() {
+AstNode* AstNode::cloneTreeIter(bool needPure) {
     // private: Clone single node and children
+    if (VL_UNLIKELY(needPure && !isPure())) {
+        this->v3warn(SIDEEFFECT,
+                     "Expression side effect may be mishandled\n"
+                         << this->warnMore()
+                         << "... Suggest use a temporary variable in place of this expression");
+        // this->v3fatalSrc("cloneTreePure debug backtrace");  // Comment in to debug where caused it
+    }
     AstNode* const newp = this->clone();
-    if (this->m_op1p) newp->op1p(this->m_op1p->cloneTreeIterList());
-    if (this->m_op2p) newp->op2p(this->m_op2p->cloneTreeIterList());
-    if (this->m_op3p) newp->op3p(this->m_op3p->cloneTreeIterList());
-    if (this->m_op4p) newp->op4p(this->m_op4p->cloneTreeIterList());
+    if (this->m_op1p) newp->op1p(this->m_op1p->cloneTreeIterList(needPure));
+    if (this->m_op2p) newp->op2p(this->m_op2p->cloneTreeIterList(needPure));
+    if (this->m_op3p) newp->op3p(this->m_op3p->cloneTreeIterList(needPure));
+    if (this->m_op4p) newp->op4p(this->m_op4p->cloneTreeIterList(needPure));
     newp->m_iterpp = nullptr;
     newp->clonep(this);  // Save pointers to/from both to simplify relinking.
     this->clonep(newp);  // Save pointers to/from both to simplify relinking.
     return newp;
 }
 
-AstNode* AstNode::cloneTreeIterList() {
+AstNode* AstNode::cloneTreeIterList(bool needPure) {
     // private: Clone list of nodes, set m_headtailp
     AstNode* newheadp = nullptr;
     AstNode* newtailp = nullptr;
     // Audited to make sure this is never nullptr
     for (AstNode* oldp = this; oldp; oldp = oldp->m_nextp) {
-        AstNode* const newp = oldp->cloneTreeIter();
+        AstNode* const newp = oldp->cloneTreeIter(needPure);
         newp->m_headtailp = nullptr;
         newp->m_backp = newtailp;
         if (newtailp) newtailp->m_nextp = newp;
@@ -832,14 +839,14 @@ AstNode* AstNode::cloneTreeIterList() {
     return newheadp;
 }
 
-AstNode* AstNode::cloneTree(bool cloneNextLink) {
+AstNode* AstNode::cloneTree(bool cloneNextLink, bool needPure) {
     debugTreeChange(this, "-cloneThs: ", __LINE__, cloneNextLink);
     cloneClearTree();
     AstNode* newp;
     if (cloneNextLink && this->m_nextp) {
-        newp = cloneTreeIterList();
+        newp = cloneTreeIterList(needPure);
     } else {
-        newp = cloneTreeIter();
+        newp = cloneTreeIter(needPure);
         newp->m_nextp = nullptr;
         newp->m_headtailp = newp;
     }
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 7fb97634d..402f4b8eb 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1713,8 +1713,8 @@ class AstNode VL_NOT_FINAL {
     }
 
 private:
-    AstNode* cloneTreeIter();
-    AstNode* cloneTreeIterList();
+    AstNode* cloneTreeIter(bool needPure);
+    AstNode* cloneTreeIterList(bool needPure);
     void checkTreeIter(const AstNode* prevBackp) const VL_MT_STABLE;
     bool gateTreeIter() const;
     static bool sameTreeIter(const AstNode* node1p, const AstNode* node2p, bool ignNext,
@@ -2074,8 +2074,8 @@ public:
                              AstNode* belowp);  // When calling, "this" is second argument
 
     // METHODS - Iterate on a tree
-    AstNode* cloneTree(bool cloneNextLink);  // Not const, as sets clonep() on original nodep //
-    AstNode* cloneTreePure(bool cloneNextLink) { return cloneTree(cloneNextLink); }
+    AstNode* cloneTree(bool cloneNextLink, bool needPure = false);  // Not const, as sets clonep() on original nodep
+    AstNode* cloneTreePure(bool cloneNextLink) { return cloneTree(cloneNextLink, true); }
     bool gateTree() { return gateTreeIter(); }  // Is tree isGateOptimizable?
     inline bool sameTree(const AstNode* node2p) const;  // Does tree of this == node2p?
     // Does tree of this == node2p?, not allowing non-isGateOptimizable
diff --git a/src/V3Error.h b/src/V3Error.h
index 87c6c0bad..3513c3902 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -136,6 +136,7 @@ public:
         RISEFALLDLY,    // Unsupported: rise/fall/turn-off delays
         SELRANGE,       // Selection index out of range
         SHORTREAL,      // Shortreal not supported
+        SIDEEFFECT,     // Sideeffect ignored
         SPLITVAR,       // Cannot split the variable
         STATICVAR,      // Static variable declared in a loop with a declaration assignment
         STMTDLY,        // Delayed statement
@@ -203,7 +204,8 @@ public:
             "MULTIDRIVEN", "MULTITOP", "NEWERSTD", "NOLATCH", "NULLPORT", "PINCONNECTEMPTY",
             "PINMISSING", "PINNOCONNECT",  "PINNOTFOUND", "PKGNODECL", "PROCASSWIRE",
             "PROFOUTOFDATE", "PROTECTED", "RANDC", "REALCVT", "REDEFMACRO", "RISEFALLDLY",
-            "SELRANGE", "SHORTREAL", "SPLITVAR", "STATICVAR", "STMTDLY", "SYMRSVDWORD", "SYNCASYNCNET",
+            "SELRANGE", "SHORTREAL", "SIDEEFFECT", "SPLITVAR",
+            "STATICVAR", "STMTDLY", "SYMRSVDWORD", "SYNCASYNCNET",
             "TICKCOUNT", "TIMESCALEMOD",
             "UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNOPTTHREADS",
             "UNPACKED", "UNSIGNED", "UNUSEDGENVAR", "UNUSEDPARAM", "UNUSEDSIGNAL",
@@ -231,7 +233,8 @@ public:
     }
     // Warnings to mention manual
     bool mentionManual() const VL_MT_SAFE {
-        return (m_e == EC_FATALSRC || m_e == SYMRSVDWORD || m_e == ZERODLY || pretendError());
+        return (m_e == EC_FATALSRC || m_e == SIDEEFFECT || m_e == SYMRSVDWORD || m_e == ZERODLY
+                || pretendError());
     }
     // Warnings that are lint only
     bool lintError() const VL_MT_SAFE {
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 49b775ab9..4e2381ff7 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -220,16 +220,6 @@ private:
     }
     void prepost_stmt_visit(AstNodeTriop* nodep) {
         iterateChildren(nodep);
-
-        // Currently we can't reference the target, so we just copy the AST both for read and
-        // write, but doing so would double any side-effects, so as a safety measure all
-        // statements which could have side-effects are banned at the moment.
-        if (!nodep->rhsp()->isPure()) {
-            nodep->rhsp()->v3warn(E_UNSUPPORTED,
-                                  "Unsupported: Inc/Dec of expression with side-effects");
-            return;
-        }
-
         AstConst* const constp = VN_AS(nodep->lhsp(), Const);
         UASSERT_OBJ(nodep, constp, "Expecting CONST");
         AstConst* const newconstp = constp->cloneTree(true);
@@ -250,16 +240,6 @@ private:
     }
     void prepost_expr_visit(AstNodeTriop* nodep) {
         iterateChildren(nodep);
-
-        // Currently we can't reference the target, so we just copy the AST both for read and
-        // write, but doing so would double any side-effects, so as a safety measure all
-        // statements which could have side-effects are banned at the moment.
-        if (!nodep->rhsp()->isPure()) {
-            nodep->rhsp()->v3warn(E_UNSUPPORTED,
-                                  "Unsupported: Inc/Dec of expression with side-effects");
-            return;
-        }
-
         if (m_unsupportedHere) {
             nodep->v3warn(E_UNSUPPORTED, "Unsupported: Incrementation in this context.");
             return;
diff --git a/test_regress/t/t_altera_lpm.v b/test_regress/t/t_altera_lpm.v
index 0a3671e49..95e16b454 100644
--- a/test_regress/t/t_altera_lpm.v
+++ b/test_regress/t/t_altera_lpm.v
@@ -2557,12 +2557,14 @@ module lpm_clshift (
 // ALWAYS CONSTRUCT BLOCK
     always @(data or i_direction or distance)
     begin
+        // verilator lint_off SIDEEFFECT
         if ((lpm_shifttype == "LOGICAL") || (lpm_shifttype == "UNUSED"))
             {tmp_overflow, tmp_underflow, tmp_result} = LogicShift(data, distance, i_direction);
         else if (lpm_shifttype == "ARITHMETIC")
             {tmp_overflow, tmp_underflow, tmp_result} = ArithShift(data, distance, i_direction);
         else if (lpm_shifttype == "ROTATE")
             {tmp_overflow, tmp_underflow, tmp_result} = RotateShift(data, distance, i_direction);
+        // verilator lint_on SIDEEFFECT
     end
 
     always @(posedge i_clock or posedge i_aclr)
diff --git a/test_regress/t/t_expr_incr_unsup.out b/test_regress/t/t_expr_incr_unsup.out
index 6f899d2ac..3f28464b5 100644
--- a/test_regress/t/t_expr_incr_unsup.out
+++ b/test_regress/t/t_expr_incr_unsup.out
@@ -1,5 +1,11 @@
-%Error-UNSUPPORTED: t/t_expr_incr_unsup.v:17:34: Unsupported: Inc/Dec of expression with side-effects
+%Warning-SIDEEFFECT: t/t_expr_incr_unsup.v:17:34: Expression side effect may be mishandled
+                                                : ... Suggest use a temporary variable in place of this expression
    17 |         $display("Value: %d", arr[postincrement_i()]++);
       |                                  ^
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+                     ... For warning description see https://verilator.org/warn/SIDEEFFECT?v=latest
+                     ... Use "/* verilator lint_off SIDEEFFECT */" and lint_on around source to disable this message.
+%Warning-SIDEEFFECT: t/t_expr_incr_unsup.v:17:35: Expression side effect may be mishandled
+                                                : ... Suggest use a temporary variable in place of this expression
+   17 |         $display("Value: %d", arr[postincrement_i()]++);
+      |                                   ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_sideeffect_bad.out b/test_regress/t/t_lint_sideeffect_bad.out
new file mode 100644
index 000000000..7b2dbd3f4
--- /dev/null
+++ b/test_regress/t/t_lint_sideeffect_bad.out
@@ -0,0 +1,24 @@
+%Warning-SIDEEFFECT: t/t_lint_sideeffect_bad.v:19:31: Expression side effect may be mishandled
+                                                    : ... note: In instance 't'
+                                                    : ... Suggest use a temporary variable in place of this expression
+   19 |       $display("0x%8x", array[$c(0) +: 32]);
+      |                               ^~
+                     ... For warning description see https://verilator.org/warn/SIDEEFFECT?v=latest
+                     ... Use "/* verilator lint_off SIDEEFFECT */" and lint_on around source to disable this message.
+%Warning-SIDEEFFECT: t/t_lint_sideeffect_bad.v:12:13: Expression side effect may be mishandled
+                                                    : ... Suggest use a temporary variable in place of this expression
+   12 |       case ($c("1"))
+      |             ^~
+%Warning-SIDEEFFECT: t/t_lint_sideeffect_bad.v:13:10: Expression side effect may be mishandled
+                                                    : ... Suggest use a temporary variable in place of this expression
+   13 |         1: $stop;
+      |          ^
+%Warning-SIDEEFFECT: t/t_lint_sideeffect_bad.v:14:10: Expression side effect may be mishandled
+                                                    : ... Suggest use a temporary variable in place of this expression
+   14 |         2: $stop;
+      |          ^
+%Warning-SIDEEFFECT: t/t_lint_sideeffect_bad.v:15:10: Expression side effect may be mishandled
+                                                    : ... Suggest use a temporary variable in place of this expression
+   15 |         3: $stop;
+      |          ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_sideeffect_bad.pl b/test_regress/t/t_lint_sideeffect_bad.pl
new file mode 100755
index 000000000..a82cf66cb
--- /dev/null
+++ b/test_regress/t/t_lint_sideeffect_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2008 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_lint_sideeffect_bad.v b/test_regress/t/t_lint_sideeffect_bad.v
new file mode 100644
index 000000000..d153b846e
--- /dev/null
+++ b/test_regress/t/t_lint_sideeffect_bad.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   logic [63:0] array = 64'hfeedf00d12345678;
+
+   initial begin
+      case ($c("1"))
+        1: $stop;
+        2: $stop;
+        3: $stop;
+        default: $stop;
+      endcase
+
+      $display("0x%8x", array[$c(0) +: 32]);
+   end
+
+endmodule
diff --git a/test_regress/t/t_stmt_incr_unsup.out b/test_regress/t/t_stmt_incr_unsup.out
index 9bc34d883..c7c313981 100644
--- a/test_regress/t/t_stmt_incr_unsup.out
+++ b/test_regress/t/t_stmt_incr_unsup.out
@@ -1,5 +1,11 @@
-%Error-UNSUPPORTED: t/t_stmt_incr_unsup.v:17:12: Unsupported: Inc/Dec of expression with side-effects
+%Warning-SIDEEFFECT: t/t_stmt_incr_unsup.v:17:12: Expression side effect may be mishandled
+                                                : ... Suggest use a temporary variable in place of this expression
    17 |         arr[postincrement_i()]++;
       |            ^
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+                     ... For warning description see https://verilator.org/warn/SIDEEFFECT?v=latest
+                     ... Use "/* verilator lint_off SIDEEFFECT */" and lint_on around source to disable this message.
+%Warning-SIDEEFFECT: t/t_stmt_incr_unsup.v:17:13: Expression side effect may be mishandled
+                                                : ... Suggest use a temporary variable in place of this expression
+   17 |         arr[postincrement_i()]++;
+      |             ^~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_sv_cpu_code/ports.sv b/test_regress/t/t_sv_cpu_code/ports.sv
index da9dbc25b..5cfeeccbb 100644
--- a/test_regress/t/t_sv_cpu_code/ports.sv
+++ b/test_regress/t/t_sv_cpu_code/ports.sv
@@ -112,10 +112,12 @@ module ports
       // - Setup read multiplexer -
       for ( j = PORTID_A; j <= PORTID_D; j++ )
         begin
+          // verilator lint_off SIDEEFFECT
           if ( padsif.IsPort( j ) )
             data[j] = '{ port[j].dir, port[j].out, 8'h00, 8'h00 };
           else
             data[j] = '{ 8'h00, 8'h00, 8'h00, 8'h00 };
+          // verilator lint_on SIDEEFFECT
         end
 
       // - Connect "genbusif" -

From afecde87d813abd08db917672980b9431f1ca967 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Sun, 15 Oct 2023 11:00:14 +0000
Subject: [PATCH 070/157] Apply 'make format'

---
 src/V3Ast.cpp | 3 ++-
 src/V3Ast.h   | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 30ebd67cf..2c4353ffb 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -808,7 +808,8 @@ AstNode* AstNode::cloneTreeIter(bool needPure) {
                      "Expression side effect may be mishandled\n"
                          << this->warnMore()
                          << "... Suggest use a temporary variable in place of this expression");
-        // this->v3fatalSrc("cloneTreePure debug backtrace");  // Comment in to debug where caused it
+        // this->v3fatalSrc("cloneTreePure debug backtrace");  // Comment in to debug where caused
+        // it
     }
     AstNode* const newp = this->clone();
     if (this->m_op1p) newp->op1p(this->m_op1p->cloneTreeIterList(needPure));
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 402f4b8eb..8e97c4e34 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2074,7 +2074,8 @@ public:
                              AstNode* belowp);  // When calling, "this" is second argument
 
     // METHODS - Iterate on a tree
-    AstNode* cloneTree(bool cloneNextLink, bool needPure = false);  // Not const, as sets clonep() on original nodep
+    AstNode* cloneTree(bool cloneNextLink,
+                       bool needPure = false);  // Not const, as sets clonep() on original nodep
     AstNode* cloneTreePure(bool cloneNextLink) { return cloneTree(cloneNextLink, true); }
     bool gateTree() { return gateTreeIter(); }  // Is tree isGateOptimizable?
     inline bool sameTree(const AstNode* node2p) const;  // Does tree of this == node2p?

From 4e2c63c8cb5ced2486cb067b21e9df6be407c298 Mon Sep 17 00:00:00 2001
From: Yutetsu TAKATSUKASA <y.takatsukasa@gmail.com>
Date: Mon, 16 Oct 2023 01:53:35 +0900
Subject: [PATCH 071/157] Support concatenation of unpacked arrays (#4558)

---
 src/V3Slice.cpp                           | 148 +++++++++++++++++-----
 src/V3Width.cpp                           |   7 +-
 test_regress/t/t_unpacked_concat.pl       |  21 +++
 test_regress/t/t_unpacked_concat.v        | 102 +++++++++++++++
 test_regress/t/t_unpacked_concat_bad.out  |   4 -
 test_regress/t/t_unpacked_concat_bad2.out |  13 ++
 test_regress/t/t_unpacked_concat_bad2.pl  |  19 +++
 test_regress/t/t_unpacked_concat_bad2.v   |  34 +++++
 8 files changed, 314 insertions(+), 34 deletions(-)
 create mode 100755 test_regress/t/t_unpacked_concat.pl
 create mode 100644 test_regress/t/t_unpacked_concat.v
 create mode 100644 test_regress/t/t_unpacked_concat_bad2.out
 create mode 100755 test_regress/t/t_unpacked_concat_bad2.pl
 create mode 100644 test_regress/t/t_unpacked_concat_bad2.v

diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 3282e9ef2..3df645406 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -56,6 +56,9 @@ class SliceVisitor final : public VNVisitor {
     //  AstNodeUniop::user1()       -> bool.  True if find is complete
     //  AstArraySel::user1p()       -> AstVarRef. The VarRef that the final ArraySel points to
     const VNUser1InUse m_inuser1;
+    //  AstInitArray::user2()       -> Previously accessed itemIdx
+    //  AstInitItem::user2()        -> Corresponding first elemIdx
+    const VNUser2InUse m_inuser2;
 
     // STATE
     AstNode* m_assignp = nullptr;  // Assignment we are under
@@ -63,7 +66,8 @@ class SliceVisitor final : public VNVisitor {
     bool m_okInitArray = false;  // Allow InitArray children
 
     // METHODS
-    AstNodeExpr* cloneAndSel(AstNode* nodep, int elements, int offset) {
+
+    AstNodeExpr* cloneAndSel(AstNode* nodep, int elements, int elemIdx) {
         // Insert an ArraySel, except for a few special cases
         const AstUnpackArrayDType* const arrayp
             = VN_CAST(nodep->dtypep()->skipRefp(), UnpackArrayDType);
@@ -87,40 +91,126 @@ class SliceVisitor final : public VNVisitor {
             }
             m_assignError = true;
             elements = 1;
-            offset = 0;
+            elemIdx = 0;
         }
         AstNodeExpr* newp;
-        if (const AstInitArray* const initp = VN_CAST(nodep, InitArray)) {
-            UINFO(9, "  cloneInitArray(" << elements << "," << offset << ") " << nodep << endl);
-            const int leOffset = !arrayp->rangep()->ascending()
-                                     ? arrayp->rangep()->elementsConst() - 1 - offset
-                                     : offset;
-            AstNodeExpr* const itemp = initp->getIndexDefaultedValuep(leOffset);
-            if (!itemp) {
-                nodep->v3error("Array initialization has too few elements, need element "
-                               << offset);
+        if (AstInitArray* const initp = VN_CAST(nodep, InitArray)) {
+            UINFO(9, "  cloneInitArray(" << elements << "," << elemIdx << ") " << nodep << endl);
+
+            auto considerOrder = [](const auto* nodep, int idxFromLeft) -> int {
+                return !nodep->rangep()->ascending()
+                           ? nodep->rangep()->elementsConst() - 1 - idxFromLeft
+                           : idxFromLeft;
+            };
+            newp = nullptr;
+            int itemIdx = 0;
+            int i = 0;
+            if (const int prevItemIdx = initp->user2()) {
+                const AstInitArray::KeyItemMap& itemMap = initp->map();
+                const auto it = itemMap.find(considerOrder(arrayp, prevItemIdx));
+                if (it != itemMap.end()) {
+                    const AstInitItem* itemp = it->second;
+                    if (itemp->user2() && itemp->user2() < elemIdx) {
+                        // Let's resume traversal from the previous position
+                        itemIdx = prevItemIdx;
+                        i = itemp->user2();
+                    }
+                }
             }
-            newp = itemp ? itemp->cloneTreePure(false) : new AstConst{nodep->fileline(), 0};
+            const AstNodeDType* const expectedItemDTypep = arrayp->subDTypep()->skipRefp();
+            while (i <= elemIdx) {
+                AstNodeExpr* const itemp
+                    = initp->getIndexDefaultedValuep(considerOrder(arrayp, itemIdx));
+                if (!itemp && !m_assignError) {
+                    nodep->v3error("Array initialization has too few elements, need element "
+                                   << elemIdx);
+                    m_assignError = true;
+                }
+                const AstNodeDType* itemRawDTypep = itemp->dtypep()->skipRefp();
+                const VCastable castable
+                    = AstNode::computeCastable(expectedItemDTypep, itemRawDTypep, itemp);
+                if (castable == VCastable::SAMEISH || castable == VCastable::COMPATIBLE) {
+                    if (i == elemIdx) {
+                        newp = itemp->cloneTreePure(false);
+                        break;
+                    } else {  // Check the next item
+                        ++i;
+                        ++itemIdx;
+                    }
+                } else {
+                    const AstUnpackArrayDType* const itemDTypep
+                        = VN_CAST(itemRawDTypep, UnpackArrayDType);
+                    if (!itemDTypep
+                        || !expectedItemDTypep->same(itemDTypep->subDTypep()->skipRefp())) {
+                        if (!m_assignError) {
+                            itemp->v3error("Item is incompatible with the array type.");
+                        }
+                        m_assignError = true;
+                        break;
+                    }
+                    if (i + itemDTypep->elementsConst()
+                        > elemIdx) {  // This item contains the element
+                        int offset = considerOrder(itemDTypep, elemIdx - i);
+                        if (AstSliceSel* const slicep = VN_CAST(itemp, SliceSel)) {
+                            offset += slicep->declRange().lo();
+                            newp = new AstArraySel{nodep->fileline(),
+                                                   slicep->lhsp()->cloneTreePure(false), offset};
+                        } else {
+                            newp = new AstArraySel{nodep->fileline(), itemp->cloneTreePure(false),
+                                                   offset};
+                        }
+
+                        if (!m_assignError && elemIdx + 1 == elements
+                            && i + itemDTypep->elementsConst() > elements) {
+                            nodep->v3error("Array initialization has too many elements. "
+                                           << elements << " elements are expected, but at least "
+                                           << i + itemDTypep->elementsConst()
+                                           << " elements exist.");
+                            m_assignError = true;
+                        }
+                        break;
+                    } else {  // Check the next item
+                        i += itemDTypep->elementsConst();
+                        ++itemIdx;
+                    }
+                }
+            }
+            if (elemIdx + 1 == elements && static_cast<size_t>(itemIdx) + 1 < initp->map().size()
+                && !m_assignError) {
+                nodep->v3error("Array initialization has too many elements. "
+                               << elements << " elements are expected, but at least "
+                               << i + initp->map().size() - itemIdx << " elements exist.");
+                m_assignError = true;
+            }
+            if (newp) {
+                const AstInitArray::KeyItemMap& itemMap = initp->map();
+                const auto it = itemMap.find(considerOrder(arrayp, itemIdx));
+                if (it != itemMap.end()) {  // Remember current position for the next invocation.
+                    initp->user2(itemIdx);
+                    it->second->user2(i);
+                }
+            }
+            if (!newp) newp = new AstConst{nodep->fileline(), 0};
         } else if (AstNodeCond* const snodep = VN_CAST(nodep, NodeCond)) {
-            UINFO(9, "  cloneCond(" << elements << "," << offset << ") " << nodep << endl);
+            UINFO(9, "  cloneCond(" << elements << "," << elemIdx << ") " << nodep << endl);
             return snodep->cloneType(snodep->condp()->cloneTreePure(false),
-                                     cloneAndSel(snodep->thenp(), elements, offset),
-                                     cloneAndSel(snodep->elsep(), elements, offset));
+                                     cloneAndSel(snodep->thenp(), elements, elemIdx),
+                                     cloneAndSel(snodep->elsep(), elements, elemIdx));
         } else if (const AstSliceSel* const snodep = VN_CAST(nodep, SliceSel)) {
-            UINFO(9, "  cloneSliceSel(" << elements << "," << offset << ") " << nodep << endl);
+            UINFO(9, "  cloneSliceSel(" << elements << "," << elemIdx << ") " << nodep << endl);
             const int leOffset = (snodep->declRange().lo()
                                   + (!snodep->declRange().ascending()
-                                         ? snodep->declRange().elements() - 1 - offset
-                                         : offset));
+                                         ? snodep->declRange().elements() - 1 - elemIdx
+                                         : elemIdx));
             newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTreePure(false),
                                    leOffset};
         } else if (VN_IS(nodep, ArraySel) || VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel)
                    || VN_IS(nodep, CMethodHard) || VN_IS(nodep, MemberSel)
                    || VN_IS(nodep, ExprStmt)) {
-            UINFO(9, "  cloneSel(" << elements << "," << offset << ") " << nodep << endl);
+            UINFO(9, "  cloneSel(" << elements << "," << elemIdx << ") " << nodep << endl);
             const int leOffset = !arrayp->rangep()->ascending()
-                                     ? arrayp->rangep()->elementsConst() - 1 - offset
-                                     : offset;
+                                     ? arrayp->rangep()->elementsConst() - 1 - elemIdx
+                                     : elemIdx;
             newp = new AstArraySel{nodep->fileline(), VN_AS(nodep, NodeExpr)->cloneTreePure(false),
                                    leOffset};
         } else {
@@ -149,10 +239,10 @@ class SliceVisitor final : public VNVisitor {
                 // elements
                 AstNodeAssign* newlistp = nullptr;
                 const int elements = arrayp->rangep()->elementsConst();
-                for (int offset = 0; offset < elements; ++offset) {
+                for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
                     AstNodeAssign* const newp
-                        = nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, offset),
-                                           cloneAndSel(nodep->rhsp(), elements, offset));
+                        = nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx),
+                                           cloneAndSel(nodep->rhsp(), elements, elemIdx));
                     if (debug() >= 9) newp->dumpTree("-  new: ");
                     newlistp = AstNode::addNext(newlistp, newp);
                 }
@@ -199,12 +289,12 @@ class SliceVisitor final : public VNVisitor {
                         << " on non-slicable (e.g. non-vector) right-hand-side operand");
                 } else {
                     const int elements = adtypep->rangep()->elementsConst();
-                    for (int offset = 0; offset < elements; ++offset) {
+                    for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
                         // EQ(a,b) -> LOGAND(EQ(ARRAYSEL(a,0), ARRAYSEL(b,0)), ...[1])
-                        AstNodeBiop* const clonep
-                            = VN_AS(nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, offset),
-                                                     cloneAndSel(nodep->rhsp(), elements, offset)),
-                                    NodeBiop);
+                        AstNodeBiop* const clonep = VN_AS(
+                            nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx),
+                                             cloneAndSel(nodep->rhsp(), elements, elemIdx)),
+                            NodeBiop);
                         if (!logp) {
                             logp = clonep;
                         } else {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index cecd6ad1b..cc6f2551d 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4120,6 +4120,7 @@ private:
         PatVecMap patmap = patVectorMap(nodep, range);
         UINFO(9, "ent " << range.left() << " to " << range.right() << endl);
         AstNode* newp = nullptr;
+        bool allConstant = true;
         for (int entn = 0, ent = range.left(); entn < range.elements();
              ++entn, ent += range.leftToRightInc()) {
             AstPatMember* newpatp = nullptr;
@@ -4129,7 +4130,10 @@ private:
                 if (defaultp) {
                     newpatp = defaultp->cloneTree(false);
                     patp = newpatp;
-                } else {
+                } else if (!(VN_IS(arrayDtp, UnpackArrayDType) && !allConstant)) {
+                    // If arrayDtp is an unpacked array and item is not constant,
+                    // the number of elemnt cannot be determined here as the dtype of each element
+                    // is not set yet. V3Slice checks for such cases.
                     nodep->v3error("Assignment pattern missed initializing elements: " << ent);
                 }
             } else {
@@ -4140,6 +4144,7 @@ private:
             if (patp) {
                 // Don't want the RHS an array
                 patp->dtypep(arrayDtp->subDTypep());
+                allConstant &= VN_IS(patp->lhssp(), Const);
                 AstNodeExpr* const valuep = patternMemberValueIterate(patp);
                 if (VN_IS(arrayDtp, UnpackArrayDType)) {
                     if (!newp) {
diff --git a/test_regress/t/t_unpacked_concat.pl b/test_regress/t/t_unpacked_concat.pl
new file mode 100755
index 000000000..354bf40cc
--- /dev/null
+++ b/test_regress/t/t_unpacked_concat.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+execute(
+    check_finished => 1,
+    );
+
+
+ok(1);
+1;
diff --git a/test_regress/t/t_unpacked_concat.v b/test_regress/t/t_unpacked_concat.v
new file mode 100644
index 000000000..1c73f8ffd
--- /dev/null
+++ b/test_regress/t/t_unpacked_concat.v
@@ -0,0 +1,102 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Yutetsu TAKATSUKASA.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk;
+
+   typedef int AI3[1:3];
+   AI3 A3;
+   int A9[1:9];
+
+   logic [2:0] s0;
+   logic [2:0] s1[1:3];
+   logic [2:0] s2[3:1];
+   logic [2:0] s3[2:8];
+   logic [2:0] s4[8:2];
+
+   initial begin
+      s0 = 3'd1;
+      s1[1] = 3'd2;
+      s1[2] = 3'd3;
+      s1[3] = 3'd4;
+      s2[1] = 3'd5;
+      s2[2] = 3'd6;
+      s2[3] = 3'd7;
+
+      A3 = '{1, 2, 3};
+      A9 = {A3, 4, 5, A3, 6};
+      if (A9[1] != 1) $stop;
+      if (A9[2] != 2) $stop;
+      if (A9[3] != 3) $stop;
+      if (A9[4] != 4) $stop;
+      if (A9[5] != 5) $stop;
+      if (A9[6] != 1) $stop;
+      if (A9[7] != 2) $stop;
+      if (A9[8] != 3) $stop;
+      if (A9[9] != 6) $stop;
+
+      s3 = {s0, s1, s2};
+      if (s3[2] != s0) $stop;
+      if (s3[3] != s1[1]) $stop;
+      if (s3[4] != s1[2]) $stop;
+      if (s3[5] != s1[3]) $stop;
+      if (s3[6] != s2[3]) $stop;
+      if (s3[7] != s2[2]) $stop;
+      if (s3[8] != s2[1]) $stop;
+
+      s3[2:8] = {s0, s1[1:2], s1[3], s2[3], s2[2:1]};
+      if (s3[2] != s0) $stop;
+      if (s3[3] != s1[1]) $stop;
+      if (s3[4] != s1[2]) $stop;
+      if (s3[5] != s1[3]) $stop;
+      if (s3[6] != s2[3]) $stop;
+      if (s3[7] != s2[2]) $stop;
+      if (s3[8] != s2[1]) $stop;
+
+      s3 = {s0, s1[1], s1[2:3], s2[3:2], s2[1]};
+      if (s3[2] != s0) $stop;
+      if (s3[3] != s1[1]) $stop;
+      if (s3[4] != s1[2]) $stop;
+      if (s3[5] != s1[3]) $stop;
+      if (s3[6] != s2[3]) $stop;
+      if (s3[7] != s2[2]) $stop;
+      if (s3[8] != s2[1]) $stop;
+
+      s4 = {s0, s1, s2};
+      if (s4[8] != s0) $stop;
+      if (s4[7] != s1[1]) $stop;
+      if (s4[6] != s1[2]) $stop;
+      if (s4[5] != s1[3]) $stop;
+      if (s4[4] != s2[3]) $stop;
+      if (s4[3] != s2[2]) $stop;
+      if (s4[2] != s2[1]) $stop;
+
+      s4[8:2] = {s0, s1[1:2], s1[3], s2[3], s2[2:1]};
+      if (s4[8] != s0) $stop;
+      if (s4[7] != s1[1]) $stop;
+      if (s4[6] != s1[2]) $stop;
+      if (s4[5] != s1[3]) $stop;
+      if (s4[4] != s2[3]) $stop;
+      if (s4[3] != s2[2]) $stop;
+      if (s4[2] != s2[1]) $stop;
+
+      s4 = {s0, s1[1], s1[2:3], s2[3:2], s2[1]};
+      if (s4[8] != s0) $stop;
+      if (s4[7] != s1[1]) $stop;
+      if (s4[6] != s1[2]) $stop;
+      if (s4[5] != s1[3]) $stop;
+      if (s4[4] != s2[3]) $stop;
+      if (s4[3] != s2[2]) $stop;
+      if (s4[2] != s2[1]) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_unpacked_concat_bad.out b/test_regress/t/t_unpacked_concat_bad.out
index 4f2954473..e2c0f4797 100644
--- a/test_regress/t/t_unpacked_concat_bad.out
+++ b/test_regress/t/t_unpacked_concat_bad.out
@@ -3,8 +3,4 @@
    17 |    localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}};
       |                                              ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_unpacked_concat_bad.v:17:46: Assignment pattern missed initializing elements: 0
-                                       : ... note: In instance 't'
-   17 |    localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}};
-      |                                              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_unpacked_concat_bad2.out b/test_regress/t/t_unpacked_concat_bad2.out
new file mode 100644
index 000000000..1a5e93630
--- /dev/null
+++ b/test_regress/t/t_unpacked_concat_bad2.out
@@ -0,0 +1,13 @@
+%Error: t/t_unpacked_concat_bad2.v:25:15: Array initialization has too many elements. 2 elements are expected, but at least 5 elements exist.
+   25 |       s1 = {s0, s2};
+      |               ^
+%Error: t/t_unpacked_concat_bad2.v:26:23: Array initialization has too many elements. 4 elements are expected, but at least 5 elements exist.
+   26 |       s2 = {s1, s0, s0, s0};
+      |                       ^
+%Error: t/t_unpacked_concat_bad2.v:28:17: Item is incompatible with the array type.
+   28 |       s2 = {s0, s3};
+      |                 ^~
+%Error: t/t_unpacked_concat_bad2.v:30:19: Item is incompatible with the array type.
+   30 |       A9_logic = {A3, 4, 5, A3, 6};
+      |                   ^~
+%Error: Exiting due to
diff --git a/test_regress/t/t_unpacked_concat_bad2.pl b/test_regress/t/t_unpacked_concat_bad2.pl
new file mode 100755
index 000000000..63947fd00
--- /dev/null
+++ b/test_regress/t/t_unpacked_concat_bad2.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_unpacked_concat_bad2.v b/test_regress/t/t_unpacked_concat_bad2.v
new file mode 100644
index 000000000..ba3800237
--- /dev/null
+++ b/test_regress/t/t_unpacked_concat_bad2.v
@@ -0,0 +1,34 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Yutetsu TAKATSUKASA.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk;
+
+   logic [7:0] s0;
+   logic [7:0] s1[1:2];
+   logic [7:0] s2[1:4];
+   logic [7:0] s3[2][2];
+
+   typedef int AI3[1:3];
+   AI3 A3;
+   logic [31:0] A9_logic[1:9];
+
+   initial begin
+      // RHS has too many elements.
+      s1 = {s0, s2};
+      s2 = {s1, s0, s0, s0};
+      // Incompatible type
+      s2 = {s0, s3};
+
+      A9_logic = {A3, 4, 5, A3, 6};
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 4427f03b08550ae9fb0aba6aca4f5c8d4127f15e Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Sun, 15 Oct 2023 17:59:36 +0100
Subject: [PATCH 072/157] Fix error message for invalid parameter overrides
 (#4559)

---
 src/V3LinkDot.cpp                             | 105 ++++++++++--------
 src/V3Param.cpp                               |   8 +-
 src/V3String.cpp                              |  11 ++
 src/V3String.h                                |   3 +
 test_regress/t/t_class_param_bad1.out         |   4 +-
 .../t/t_class_param_override_local_bad.out    |   8 +-
 test_regress/t/t_dist_warn_coverage.pl        |   2 -
 test_regress/t/t_inst_param_override_bad.out  |  19 ++++
 test_regress/t/t_inst_param_override_bad.pl   |  19 ++++
 test_regress/t/t_inst_param_override_bad.v    |  45 ++++++++
 test_regress/t/t_inst_pin_place_bad.out       |   4 +-
 test_regress/t/t_lint_pindup_bad.out          |  10 +-
 test_regress/t/t_lint_pinnotfound_bad.out     |   2 +-
 test_regress/t/t_param_implicit_local_bad.out |  14 +--
 14 files changed, 182 insertions(+), 72 deletions(-)
 create mode 100644 test_regress/t/t_inst_param_override_bad.out
 create mode 100755 test_regress/t/t_inst_param_override_bad.pl
 create mode 100644 test_regress/t/t_inst_param_override_bad.v

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index dd9a6548c..1d8cbce88 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -224,8 +224,22 @@ public:
 
     // METHODS
     static string nodeTextType(AstNode* nodep) {
-        if (VN_IS(nodep, Var)) {
-            return "variable";
+        if (const AstVar* const varp = VN_CAST(nodep, Var)) {
+            if (varp->isIO() || varp->isIfaceRef()) {
+                return "port";
+            } else if (varp->isGParam()) {
+                return "parameter";
+            } else if (varp->varType() == VVarType::LPARAM) {
+                return "local parameter";
+            } else {
+                return "variable";
+            }
+        } else if (const AstParamTypeDType* const dtypep = VN_CAST(nodep, ParamTypeDType)) {
+            if (dtypep->isGParam()) {
+                return "type parameter";
+            } else {
+                return "local type parameter";
+            }
         } else if (VN_IS(nodep, Cell)) {
             return "instance";
         } else if (VN_IS(nodep, Task)) {
@@ -236,8 +250,6 @@ public:
             return "block";
         } else if (VN_IS(nodep, Iface)) {
             return "interface";
-        } else if (VN_IS(nodep, ParamTypeDType)) {
-            return "parameter type";
         } else {
             return nodep->prettyTypeName();
         }
@@ -2262,11 +2274,6 @@ private:
         m_ds.init(srcp);
         iterate(nodep);
     }
-    bool checkPinRef(AstPin* pinp, VVarType refVarType) {
-        // In instantiations of modules/ifaces, we shouldn't connect port pins to submodule's
-        // parameters or vice versa
-        return pinp->param() == refVarType.isParam();
-    }
     void updateVarUse(AstVar* nodep) {
         // Avoid dotted.PARAM false positive when in a parameter block
         // that is if ()'ed off by same dotted name as another block
@@ -2365,49 +2372,57 @@ private:
         if (!nodep->modVarp()) {
             UASSERT_OBJ(m_pinSymp, nodep, "Pin not under instance?");
             VSymEnt* const foundp = m_pinSymp->findIdFlat(nodep->name());
-            const char* const whatp = nodep->param() ? "parameter pin" : "pin";
-            bool pinCheckFail = false;
-            if (foundp) {
-                if (AstVar* const refp = VN_CAST(foundp->nodep(), Var)) {
-                    if (!refp->isIO() && !refp->isParam() && !refp->isIfaceRef()) {
-                        nodep->v3error(ucfirst(whatp)
-                                       << " is not an in/out/inout/param/interface: "
-                                       << nodep->prettyNameQ());
-                    } else if (!checkPinRef(nodep, refp->varType())) {
-                        pinCheckFail = true;
-                    } else {
-                        nodep->modVarp(refp);
-                        markAndCheckPinDup(nodep, refp, whatp);
-                    }
-                } else if (AstParamTypeDType* const refp
-                           = VN_CAST(foundp->nodep(), ParamTypeDType)) {
-                    if (!checkPinRef(nodep, refp->varType())) {
-                        pinCheckFail = true;
-                    } else {
-                        nodep->modPTypep(refp);
-                        markAndCheckPinDup(nodep, refp, whatp);
-                    }
-                } else {
-                    nodep->v3error(ucfirst(whatp) << " not found: " << nodep->prettyNameQ());
-                }
-            }
-            if (!foundp || pinCheckFail) {
+            const char* const whatp = nodep->param() ? "parameter" : "pin";
+            if (!foundp) {
                 if (nodep->name() == "__paramNumber1" && m_cellp
                     && VN_IS(m_cellp->modp(), Primitive)) {
                     // Primitive parameter is really a delay we can just ignore
                     VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
                     return;
+                } else {
+                    const string suggest
+                        = (nodep->param() ? m_statep->suggestSymFlat(m_pinSymp, nodep->name(),
+                                                                     LinkNodeMatcherVarParam{})
+                                          : m_statep->suggestSymFlat(m_pinSymp, nodep->name(),
+                                                                     LinkNodeMatcherVarIO{}));
+                    nodep->v3warn(PINNOTFOUND,
+                                  ucfirst(whatp)
+                                      << " not found: " << nodep->prettyNameQ() << '\n'
+                                      << (suggest.empty() ? "" : nodep->warnMore() + suggest));
+                    return;
                 }
-                const string suggest
-                    = (nodep->param() ? m_statep->suggestSymFlat(m_pinSymp, nodep->name(),
-                                                                 LinkNodeMatcherVarParam{})
-                                      : m_statep->suggestSymFlat(m_pinSymp, nodep->name(),
-                                                                 LinkNodeMatcherVarIO{}));
-                nodep->v3warn(PINNOTFOUND,
-                              ucfirst(whatp)
-                                  << " not found: " << nodep->prettyNameQ() << '\n'
-                                  << (suggest.empty() ? "" : nodep->warnMore() + suggest));
             }
+            VVarType refVarType = VVarType::UNKNOWN;
+            bool wrongPinType = false;
+            if (AstVar* const varp = VN_CAST(foundp->nodep(), Var)) {
+                if (varp->isIO() || varp->isParam() || varp->isIfaceRef()) {
+                    refVarType = varp->varType();
+                    nodep->modVarp(varp);
+                } else {
+                    wrongPinType = true;
+                }
+            } else if (AstParamTypeDType* const typep = VN_CAST(foundp->nodep(), ParamTypeDType)) {
+                refVarType = typep->varType();
+                nodep->modPTypep(typep);
+            } else {
+                wrongPinType = true;
+            }
+            // Don't connect parameter pin to module ports or vice versa
+            if (nodep->param() != (refVarType == VVarType::GPARAM)) wrongPinType = true;
+            if (wrongPinType) {
+                string targetType = LinkDotState::nodeTextType(foundp->nodep());
+                targetType = VString::aOrAn(targetType) + ' ' + targetType;
+                if (nodep->param()) {
+                    nodep->v3error("Instance attempts to override "
+                                   << nodep->prettyNameQ() << " as a " << whatp << ", but it is "
+                                   << targetType);
+                } else {
+                    nodep->v3error("Instance attempts to connect to "
+                                   << nodep->prettyNameQ() << ", but it is " << targetType);
+                }
+                return;
+            }
+            markAndCheckPinDup(nodep, foundp->nodep(), whatp);
         }
         // Early return() above when deleted
     }
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index ce5ded6a8..8bc5358a6 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -699,8 +699,8 @@ class ParamProcessor final : public VNDeleter {
         if (!pinp->exprp()) return;  // No-connect
         if (AstVar* const modvarp = pinp->modVarp()) {
             if (!modvarp->isGParam()) {
-                pinp->v3error("Attempted parameter setting of non-parameter: Param "
-                              << pinp->prettyNameQ() << " of " << nodep->prettyNameQ());
+                pinp->v3fatalSrc("Attempted parameter setting of non-parameter: Param "
+                                 << pinp->prettyNameQ() << " of " << nodep->prettyNameQ());
             } else if (VN_IS(pinp->exprp(), InitArray) && arraySubDTypep(modvarp->subDTypep())) {
                 // Array assigned to array
                 AstNode* const exprp = pinp->exprp();
@@ -761,8 +761,8 @@ class ParamProcessor final : public VNDeleter {
                 }
             }
         } else {
-            pinp->v3error("Parameter not found in sub-module: Param "
-                          << pinp->prettyNameQ() << " of " << nodep->prettyNameQ());
+            pinp->v3fatalSrc("Parameter not found in sub-module: Param "
+                             << pinp->prettyNameQ() << " of " << nodep->prettyNameQ());
         }
     }
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index c23a15705..e42bee71d 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -273,6 +273,17 @@ bool VString::endsWith(const string& str, const string& suffix) {
     if (str.length() < suffix.length()) return false;
     return str.compare(str.length() - suffix.length(), suffix.length(), suffix) == 0;
 }
+string VString::aOrAn(const char* word) {
+    switch (word[0]) {
+    case '\0': return "";
+    case 'a':
+    case 'e':
+    case 'i':
+    case 'o':
+    case 'u': return "an";
+    default: return "a";
+    }
+}
 
 //######################################################################
 // VHashSha256
diff --git a/src/V3String.h b/src/V3String.h
index 33c792757..149ce2d43 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -130,6 +130,9 @@ public:
     static bool endsWith(const string& str, const string& suffix);
     // Return true if char is valid character in word
     static bool isWordChar(char c) { return isalnum(c) || c == '_'; }
+    // Return proper article (a/an) for a word. May be inaccurate for some special words
+    static string aOrAn(const char* word);
+    static string aOrAn(const string& word) { return aOrAn(word.c_str()); }
 };
 
 //######################################################################
diff --git a/test_regress/t/t_class_param_bad1.out b/test_regress/t/t_class_param_bad1.out
index 756f6e838..55071fadd 100644
--- a/test_regress/t/t_class_param_bad1.out
+++ b/test_regress/t/t_class_param_bad1.out
@@ -1,9 +1,9 @@
-%Error-PINNOTFOUND: t/t_class_param_bad1.v:12:11: Parameter pin not found: 'PARAMBAD'
+%Error-PINNOTFOUND: t/t_class_param_bad1.v:12:11: Parameter not found: 'PARAMBAD'
                                                 : ... Suggested alternative: 'PARAMB'
    12 |    Cls #(.PARAMBAD(1)) c;   
       |           ^~~~~~~~
                     ... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
-%Error-PINNOTFOUND: t/t_class_param_bad1.v:13:14: Parameter pin not found: '__paramNumber2'
+%Error-PINNOTFOUND: t/t_class_param_bad1.v:13:14: Parameter not found: '__paramNumber2'
    13 |    Cls #(13, 1) cd;   
       |              ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_param_override_local_bad.out b/test_regress/t/t_class_param_override_local_bad.out
index dacafe468..37c671895 100644
--- a/test_regress/t/t_class_param_override_local_bad.out
+++ b/test_regress/t/t_class_param_override_local_bad.out
@@ -1,14 +1,14 @@
-%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:23:30: Parameter pin not found: '__paramNumber1'
+%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:23:30: Parameter not found: '__paramNumber1'
    23 | class Cls3 implements Icls1#(2), Icls2#(0);
       |                              ^
                     ... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
-%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:23:41: Parameter pin not found: '__paramNumber1'
+%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:23:41: Parameter not found: '__paramNumber1'
    23 | class Cls3 implements Icls1#(2), Icls2#(0);
       |                                         ^
-%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:29:23: Parameter pin not found: '__paramNumber1'
+%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:29:23: Parameter not found: '__paramNumber1'
    29 |       automatic Cls1#(bit) cls1 = new;
       |                       ^~~
-%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:30:23: Parameter pin not found: '__paramNumber1'
+%Error-PINNOTFOUND: t/t_class_param_override_local_bad.v:30:23: Parameter not found: '__paramNumber1'
    30 |       automatic Cls2#(1) cls2 = new;
       |                       ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_dist_warn_coverage.pl b/test_regress/t/t_dist_warn_coverage.pl
index 25b6be901..558a35b3d 100755
--- a/test_regress/t/t_dist_warn_coverage.pl
+++ b/test_regress/t/t_dist_warn_coverage.pl
@@ -39,7 +39,6 @@ foreach my $s (
     'Array initialization has too few elements, need element ',
     'Assigned pin is neither input nor output',
     'Assignment pattern with no members',
-    'Attempted parameter setting of non-parameter: Param ',
     'Can\'t find varpin scope of ',
     'Can\'t resolve module reference: \'',
     'Cannot write preprocessor output: ',
@@ -60,7 +59,6 @@ foreach my $s (
     'Modport not referenced as <interface>.',
     'Modport not referenced from underneath an interface: ',
     'Non-interface used as an interface: ',
-    'Parameter not found in sub-module: Param ',
     'Parameter type pin value isn\'t a type: Param ',
     'Parameter type variable isn\'t a type: Param ',
     'Pattern replication value of 0 is not legal.',
diff --git a/test_regress/t/t_inst_param_override_bad.out b/test_regress/t/t_inst_param_override_bad.out
new file mode 100644
index 000000000..13f027a3b
--- /dev/null
+++ b/test_regress/t/t_inst_param_override_bad.out
@@ -0,0 +1,19 @@
+%Error: t/t_inst_param_override_bad.v:33:23: Instance attempts to override 'PACKED_DATA_WIDTH' as a parameter, but it is a local parameter
+   33 |     axi_stream_if # (.PACKED_DATA_WIDTH(10)) axis1(clk);
+      |                       ^~~~~~~~~~~~~~~~~
+%Error: t/t_inst_param_override_bad.v:35:23: Instance attempts to override 'mytask' as a parameter, but it is a task
+   35 |     axi_stream_if # (.mytask(10)) axis2(clk);
+      |                       ^~~~~~
+%Error: t/t_inst_param_override_bad.v:37:23: Instance attempts to override 'my_genvar' as a parameter, but it is a variable
+   37 |     axi_stream_if # (.my_genvar(10)) axis3(clk);
+      |                       ^~~~~~~~~
+%Error: t/t_inst_param_override_bad.v:39:23: Instance attempts to override 'clk' as a parameter, but it is a port
+   39 |     axi_stream_if # (.clk(10)) axis4(clk);
+      |                       ^~~
+%Error: t/t_inst_param_override_bad.v:41:23: Instance attempts to override 'tvalid' as a parameter, but it is a variable
+   41 |     axi_stream_if # (.tvalid(10)) axis5(clk);
+      |                       ^~~~~~
+%Error: t/t_inst_param_override_bad.v:43:23: Instance attempts to override 'i_sub' as a parameter, but it is an instance
+   43 |     axi_stream_if # (.i_sub(10)) axis6(clk);
+      |                       ^~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_inst_param_override_bad.pl b/test_regress/t/t_inst_param_override_bad.pl
new file mode 100755
index 000000000..376c2d2ee
--- /dev/null
+++ b/test_regress/t/t_inst_param_override_bad.pl
@@ -0,0 +1,19 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_inst_param_override_bad.v b/test_regress/t/t_inst_param_override_bad.v
new file mode 100644
index 000000000..8ac842b23
--- /dev/null
+++ b/test_regress/t/t_inst_param_override_bad.v
@@ -0,0 +1,45 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+module sub();
+endmodule
+
+interface axi_stream_if #(
+    parameter int  DATA_WIDTH = 64,
+    parameter type TUSER_TYPE = logic
+) (
+    input clk
+);
+
+    task mytask();
+    endtask : mytask
+
+    genvar my_genvar;
+
+    logic tvalid;
+
+    sub i_sub();
+
+    localparam PACKED_DATA_WIDTH = DATA_WIDTH + DATA_WIDTH / 8 + 1 + $bits(TUSER_TYPE);
+endinterface
+
+module t;
+    logic clk;
+
+    // overriding a localparam
+    axi_stream_if # (.PACKED_DATA_WIDTH(10)) axis1(clk);
+    // overriding a non-var
+    axi_stream_if # (.mytask(10)) axis2(clk);
+    // overriding a non-port/interface/param var
+    axi_stream_if # (.my_genvar(10)) axis3(clk);
+    // overriding a port
+    axi_stream_if # (.clk(10)) axis4(clk);
+    // overriding a signal
+    axi_stream_if # (.tvalid(10)) axis5(clk);
+    // overriding an instance
+    axi_stream_if # (.i_sub(10)) axis6(clk);
+
+endmodule
diff --git a/test_regress/t/t_inst_pin_place_bad.out b/test_regress/t/t_inst_pin_place_bad.out
index 0d3f845a6..8cc323ac1 100644
--- a/test_regress/t/t_inst_pin_place_bad.out
+++ b/test_regress/t/t_inst_pin_place_bad.out
@@ -3,10 +3,10 @@
       |       ^~~~~
                      ... For warning description see https://verilator.org/warn/PINMISSING?v=latest
                      ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message.
-%Error-PINNOTFOUND: t/t_inst_pin_place_bad.v:22:10: Pin not found: 'PARAM_A'
+%Error: t/t_inst_pin_place_bad.v:22:10: Instance attempts to connect to 'PARAM_A', but it is a parameter
    22 |         .PARAM_A(1)
       |          ^~~~~~~
-%Error-PINNOTFOUND: t/t_inst_pin_place_bad.v:20:10: Parameter pin not found: 'pin_1'
+%Error: t/t_inst_pin_place_bad.v:20:10: Instance attempts to override 'pin_1' as a parameter, but it is a port
    20 |         .pin_1(1)
       |          ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_pindup_bad.out b/test_regress/t/t_lint_pindup_bad.out
index 94b81c87b..7cdb90a6c 100644
--- a/test_regress/t/t_lint_pindup_bad.out
+++ b/test_regress/t/t_lint_pindup_bad.out
@@ -13,20 +13,20 @@
                                                : ... Suggested alternative: 'exists'
    22 |         .nexist(i2)   
       |          ^~~~~~
-%Error-PINNOTFOUND: t/t_lint_pindup_bad.v:16:9: Parameter pin not found: 'NEXIST'
+%Error-PINNOTFOUND: t/t_lint_pindup_bad.v:16:9: Parameter not found: 'NEXIST'
                                               : ... Suggested alternative: 'EXIST'
    16 |        .NEXIST(1),   
       |         ^~~~~~
-%Error: t/t_lint_pindup_bad.v:17:9: Duplicate parameter pin connection: 'P'
+%Error: t/t_lint_pindup_bad.v:17:9: Duplicate parameter connection: 'P'
    17 |        .P(2),
       |         ^
-        t/t_lint_pindup_bad.v:15:8: ... Location of original parameter pin connection
+        t/t_lint_pindup_bad.v:15:8: ... Location of original parameter connection
    15 |      #(,   
       |        ^
-%Error: t/t_lint_pindup_bad.v:18:9: Duplicate parameter pin connection: 'P'
+%Error: t/t_lint_pindup_bad.v:18:9: Duplicate parameter connection: 'P'
    18 |        .P(3))   
       |         ^
-        t/t_lint_pindup_bad.v:15:8: ... Location of original parameter pin connection
+        t/t_lint_pindup_bad.v:15:8: ... Location of original parameter connection
    15 |      #(,   
       |        ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_pinnotfound_bad.out b/test_regress/t/t_lint_pinnotfound_bad.out
index 81a6f40e5..6aded1ba0 100644
--- a/test_regress/t/t_lint_pinnotfound_bad.out
+++ b/test_regress/t/t_lint_pinnotfound_bad.out
@@ -2,7 +2,7 @@
    12 | b b_inst1 (.x(1'b0));  
       |             ^
                     ... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
-%Error-PINNOTFOUND: t/t_lint_pinnotfound_bad.v:13:6: Parameter pin not found: 'PX'
+%Error-PINNOTFOUND: t/t_lint_pinnotfound_bad.v:13:6: Parameter not found: 'PX'
    13 | b #(.PX(1'b0)) b_inst2 ();  
       |      ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_param_implicit_local_bad.out b/test_regress/t/t_param_implicit_local_bad.out
index ef6479300..159b4f135 100644
--- a/test_regress/t/t_param_implicit_local_bad.out
+++ b/test_regress/t/t_param_implicit_local_bad.out
@@ -1,23 +1,23 @@
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:15:20: Parameter pin not found: '__paramNumber2'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:15:20: Parameter not found: '__paramNumber2'
    15 |     NestedCls #(1, 2) cls;
       |                    ^
                     ... For error description see https://verilator.org/warn/PINNOTFOUND?v=latest
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:17:21: Parameter pin not found: '__paramNumber3'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:17:21: Parameter not found: '__paramNumber3'
    17 |     mod1  # ( 3, 4, 5 )   i_mod1 ();
       |                     ^
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:15: Parameter pin not found: '__paramNumber1'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:15: Parameter not found: '__paramNumber1'
    19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
       |               ^
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:18: Parameter pin not found: '__paramNumber2'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:18: Parameter not found: '__paramNumber2'
    19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
       |                  ^~
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:22: Parameter pin not found: '__paramNumber3'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:19:22: Parameter not found: '__paramNumber3'
    19 |     mod3  # ( 7, 24, 25 ) i_mod3 ();
       |                      ^~
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:20:22: Parameter pin not found: '__paramNumber3'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:20:22: Parameter not found: '__paramNumber3'
    20 |     intf1 # ( 8, 15, 17 ) i_intf1 ();
       |                      ^~
-%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:21:22: Parameter pin not found: '__paramNumber3'
+%Error-PINNOTFOUND: t/t_param_implicit_local_bad.v:21:22: Parameter not found: '__paramNumber3'
    21 |     prgm1 # ( 9, 40, 41 ) i_prgm1 ();
       |                      ^~
 %Error: Exiting due to

From 4fdaa463285a3ea59fab5dc3b2dad8394dbc97a8 Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Sun, 15 Oct 2023 18:01:32 +0100
Subject: [PATCH 073/157] Fix using functions/tasks following class definition
 inside module (#4553)

---
 src/V3Global.h                        |  6 ++--
 src/V3LinkDot.cpp                     | 50 +++++++++++++--------------
 test_regress/t/t_class_nested_link.pl | 21 +++++++++++
 test_regress/t/t_class_nested_link.v  | 45 ++++++++++++++++++++++++
 4 files changed, 95 insertions(+), 27 deletions(-)
 create mode 100755 test_regress/t/t_class_nested_link.pl
 create mode 100644 test_regress/t/t_class_nested_link.v

diff --git a/src/V3Global.h b/src/V3Global.h
index a25a3f274..126392ad9 100644
--- a/src/V3Global.h
+++ b/src/V3Global.h
@@ -41,12 +41,13 @@ class V3HierBlockPlan;
 //======================================================================
 // Restorer
 
-/// Save a given variable's value on the stack, restoring it at
-/// end-of-stope.
+/// Save a given variable's value on the stack, restoring it at end-of-scope.
 // Object must be named, or it will not persist until end-of-scope.
 // Constructor needs () or GCC 4.8 false warning.
 #define VL_RESTORER(var) \
     const VRestorer<typename std::decay<decltype(var)>::type> restorer_##var(var);
+/// Get the copy of the variable previously saved by VL_RESTORER()
+#define VL_RESTORER_PREV(var) restorer_##var.saved()
 
 // Object used by VL_RESTORER.  This object must be an auto variable, not
 // allocated on the heap or otherwise.
@@ -60,6 +61,7 @@ public:
         : m_ref{permr}
         , m_saved{permr} {}
     ~VRestorer() { m_ref = m_saved; }
+    const T& saved() const { return m_saved; }
     VL_UNCOPYABLE(VRestorer);
 };
 
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 1d8cbce88..3b129d741 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -1050,12 +1050,11 @@ class LinkDotFindVisitor final : public VNVisitor {
         } else {
             VL_RESTORER(m_blockp);
             VL_RESTORER(m_curSymp);
-            VSymEnt* const oldCurSymp = m_curSymp;
             {
                 m_blockp = nodep;
                 m_curSymp
                     = m_statep->insertBlock(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
-                m_curSymp->fallbackp(oldCurSymp);
+                m_curSymp->fallbackp(VL_RESTORER_PREV(m_curSymp));
                 // Iterate
                 iterateChildren(nodep);
             }
@@ -1440,12 +1439,11 @@ class LinkDotFindVisitor final : public VNVisitor {
     void visit(AstForeach* nodep) override {
         // Symbol table needs nodep->name() as the index variable's name
         VL_RESTORER(m_curSymp);
-        VSymEnt* const oldCurSymp = m_curSymp;
         {
             ++m_modWithNum;
             m_curSymp = m_statep->insertBlock(m_curSymp, "__Vforeach" + cvtToStr(m_modWithNum),
                                               nodep, m_classOrPackagep);
-            m_curSymp->fallbackp(oldCurSymp);
+            m_curSymp->fallbackp(VL_RESTORER_PREV(m_curSymp));
             // DOT(x, SELLOOPVARS(var, loops)) -> SELLOOPVARS(DOT(x, var), loops)
             if (AstDot* const dotp = VN_CAST(nodep->arrayp(), Dot)) {
                 if (AstSelLoopVars* const loopvarsp = VN_CAST(dotp->rhsp(), SelLoopVars)) {
@@ -1520,12 +1518,11 @@ class LinkDotFindVisitor final : public VNVisitor {
         // Symbol table needs nodep->name() as the index variable's name
         // Iteration will pickup the AstVar we made under AstWith
         VL_RESTORER(m_curSymp);
-        VSymEnt* const oldCurSymp = m_curSymp;
         {
             ++m_modWithNum;
             m_curSymp = m_statep->insertBlock(m_curSymp, "__Vwith" + cvtToStr(m_modWithNum), nodep,
                                               m_classOrPackagep);
-            m_curSymp->fallbackp(oldCurSymp);
+            m_curSymp->fallbackp(VL_RESTORER_PREV(m_curSymp));
             UASSERT_OBJ(nodep->indexArgRefp(), nodep, "Missing lambda argref");
             UASSERT_OBJ(nodep->valueArgRefp(), nodep, "Missing lambda argref");
             // Insert argref's name into symbol table
@@ -1927,11 +1924,10 @@ class LinkDotIfaceVisitor final : public VNVisitor {
         // Modport: Remember its name for later resolution
         UINFO(5, "   fiv: " << nodep << endl);
         VL_RESTORER(m_curSymp);
-        VSymEnt* const oldCurSymp = m_curSymp;
         {
             // Create symbol table for the vars
             m_curSymp = m_statep->insertBlock(m_curSymp, nodep->name(), nodep, nullptr);
-            m_curSymp->fallbackp(oldCurSymp);
+            m_curSymp->fallbackp(VL_RESTORER_PREV(m_curSymp));
             iterateChildren(nodep);
         }
     }
@@ -2461,7 +2457,8 @@ private:
                     m_ds.m_dotErr = true;
                 } else {
                     const auto classp = VN_AS(classSymp->nodep(), Class);
-                    if (!classp->extendsp()) {
+                    const auto cextp = classp->extendsp();
+                    if (!cextp) {
                         nodep->v3error("'super' used on non-extended class (IEEE 1800-2017 8.15)");
                         m_ds.m_dotErr = true;
                     } else {
@@ -2469,8 +2466,6 @@ private:
                             && m_extendsParam.find(classp) != m_extendsParam.end()) {
                             m_ds.m_unresolvedClass = true;
                         } else {
-                            const auto cextp = classp->extendsp();
-                            UASSERT_OBJ(cextp, nodep, "Bad super extends link");
                             const auto baseClassp = cextp->classp();
                             UASSERT_OBJ(baseClassp, nodep, "Bad superclass");
                             m_ds.m_dotSymp = m_statep->getNodeSym(baseClassp);
@@ -3151,12 +3146,16 @@ private:
         } else {
             string baddot;
             VSymEnt* okSymp = nullptr;
-            VSymEnt* dotSymp = nodep->dotted().empty()
-                                   ? m_ds.m_dotSymp  // Non-'super.' dotted reference
-                                   : m_curSymp;  // Start search at dotted point
-            // of same name under a subtask isn't a relevant hit however a
-            // function under a begin/end is.  So we want begins, but not
-            // the function
+            VSymEnt* dotSymp;
+            if (nodep->dotted().empty()) {
+                // Non-'super.' dotted reference
+                dotSymp = m_ds.m_dotSymp;
+            } else {
+                // Start search at module, as a variable of same name under a subtask isn't a
+                // relevant hit however a function under a begin/end is.  So we want begins, but
+                // not the function
+                dotSymp = m_curSymp;
+            }
             if (nodep->classOrPackagep()) {  // Look only in specified package
                 dotSymp = m_statep->getNodeSym(nodep->classOrPackagep());
                 UINFO(8, "    Override classOrPackage " << dotSymp << endl);
@@ -3335,7 +3334,7 @@ private:
     void visit(AstNodeBlock* nodep) override {
         UINFO(5, "   " << nodep << endl);
         checkNoDot(nodep);
-        VSymEnt* const oldCurSymp = m_curSymp;
+        VL_RESTORER(m_curSymp);
         {
             if (nodep->name() != "") {
                 m_ds.m_dotSymp = m_curSymp = m_statep->getNodeSym(nodep);
@@ -3343,7 +3342,7 @@ private:
             }
             iterateChildren(nodep);
         }
-        m_ds.m_dotSymp = m_curSymp = oldCurSymp;
+        m_ds.m_dotSymp = VL_RESTORER_PREV(m_curSymp);
         UINFO(5, "   cur=se" << cvtToHex(m_curSymp) << endl);
     }
     void visit(AstNodeFTask* nodep) override {
@@ -3368,7 +3367,7 @@ private:
                 nodep->v3error("Definition not found for extern " + nodep->prettyNameQ());
             }
         }
-        VSymEnt* const oldCurSymp = m_curSymp;
+        VL_RESTORER(m_curSymp);
         {
             m_ftaskp = nodep;
             m_ds.m_dotSymp = m_curSymp = m_statep->getNodeSym(nodep);
@@ -3383,28 +3382,28 @@ private:
                 }
             }
         }
-        m_ds.m_dotSymp = m_curSymp = oldCurSymp;
+        m_ds.m_dotSymp = VL_RESTORER_PREV(m_curSymp);
         m_ftaskp = nullptr;
     }
     void visit(AstForeach* nodep) override {
         UINFO(5, "   " << nodep << endl);
         checkNoDot(nodep);
-        VSymEnt* const oldCurSymp = m_curSymp;
+        VL_RESTORER(m_curSymp);
         {
             m_ds.m_dotSymp = m_curSymp = m_statep->getNodeSym(nodep);
             iterateChildren(nodep);
         }
-        m_ds.m_dotSymp = m_curSymp = oldCurSymp;
+        m_ds.m_dotSymp = VL_RESTORER_PREV(m_curSymp);
     }
     void visit(AstWith* nodep) override {
         UINFO(5, "   " << nodep << endl);
         checkNoDot(nodep);
-        VSymEnt* const oldCurSymp = m_curSymp;
+        VL_RESTORER(m_curSymp);
         {
             m_ds.m_dotSymp = m_curSymp = m_statep->getNodeSym(nodep);
             iterateChildren(nodep);
         }
-        m_ds.m_dotSymp = m_curSymp = oldCurSymp;
+        m_ds.m_dotSymp = VL_RESTORER_PREV(m_curSymp);
     }
     void visit(AstLambdaArgRef* nodep) override {
         UINFO(5, "   " << nodep << endl);
@@ -3582,6 +3581,7 @@ private:
                 }
             }
         }
+        m_ds.m_dotSymp = VL_RESTORER_PREV(m_curSymp);
     }
     void visit(AstRefDType* nodep) override {
         // Resolve its reference
diff --git a/test_regress/t/t_class_nested_link.pl b/test_regress/t/t_class_nested_link.pl
new file mode 100755
index 000000000..1aa73f80a
--- /dev/null
+++ b/test_regress/t/t_class_nested_link.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2022 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_nested_link.v b/test_regress/t/t_class_nested_link.v
new file mode 100644
index 000000000..def276cc9
--- /dev/null
+++ b/test_regress/t/t_class_nested_link.v
@@ -0,0 +1,45 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Anthony Donlon.
+// SPDX-License-Identifier: CC0-1.0
+
+/// Test for bug4553
+
+// bit0: 'new' called
+// bit1: 'myfunc' called
+// bit2: 'myfunc' in class called
+int calls = 0;
+
+module t;
+    // int calls = 0;  // TODO: Error: Internal Error: Can't locate varref scope
+
+    function void myfunc();
+        calls |= 32'b10;
+    endfunction : myfunc
+
+    class Cls #(int A = 0);
+        function new();
+            calls |= 32'b1;
+        endfunction : new
+        function void myfunc();
+            calls |= 32'b100;
+        endfunction : myfunc
+    endclass
+
+    Cls #(100) cls;
+
+    // this block is following the definition of Cls
+    initial begin
+        cls = new;
+        myfunc();
+
+        if (calls != 32'b011) begin
+            $write("calls: %0b\n", calls);
+            $stop;
+        end
+
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+endmodule

From bba3487dc420b5fa7367020bc3733e06efdb2199 Mon Sep 17 00:00:00 2001
From: Anthony Donlon <4056887+donlon@users.noreply.github.com>
Date: Sun, 15 Oct 2023 20:15:46 +0100
Subject: [PATCH 074/157] Internals: Fix hash and comparison function for
 AstBasicDType (#4564)

---
 src/V3AstNodes.cpp | 8 +++-----
 src/V3Hasher.cpp   | 1 +
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index ccd0c24ed..df65365c4 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -277,11 +277,9 @@ int AstBasicDType::widthTotalBytes() const {
 
 bool AstBasicDType::same(const AstNode* samep) const {
     const AstBasicDType* const sp = static_cast<const AstBasicDType*>(samep);
-    if (!rangep() && !sp->rangep() && m == sp->m) {
-        return true;
-    } else {
-        return m == sp->m && rangep() && rangep()->sameTree(sp->rangep());
-    }
+    if (!(m == sp->m) || numeric() != sp->numeric()) return false;
+    if (!rangep() && !sp->rangep()) return true;
+    return rangep() && rangep()->sameTree(sp->rangep());
 }
 
 int AstNodeUOrStructDType::widthTotalBytes() const {
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index f0a4d2bfa..0e13e18d5 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -143,6 +143,7 @@ private:
     void visit(AstBasicDType* nodep) override {
         m_hash += hashNodeAndIterate(nodep, false, HASH_CHILDREN, [=]() {
             m_hash += nodep->keyword();
+            m_hash += nodep->numeric();
             m_hash += nodep->nrange().left();
             m_hash += nodep->nrange().right();
         });

From 25dde58297059c6f4bdfbdb1c31ef532591d1a6d Mon Sep 17 00:00:00 2001
From: Yutetsu TAKATSUKASA <y.takatsukasa@gmail.com>
Date: Mon, 16 Oct 2023 18:17:52 +0900
Subject: [PATCH 075/157] Internals: Use VN_AS instead of static_cast. Fix some
 wrong types. (#4561)

---
 src/V3AstNodeDType.h | 56 ++++++++++++++++++++++++--------------------
 src/V3AstNodeExpr.h  | 30 ++++++++++++------------
 src/V3AstNodeOther.h | 30 ++++++++++++------------
 src/V3AstNodes.cpp   | 28 +++++++++++-----------
 4 files changed, 74 insertions(+), 70 deletions(-)

diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index e1353b9a1..dd5efe25d 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -160,14 +160,14 @@ public:
         if (m_refDTypep && m_refDTypep->clonep()) m_refDTypep = m_refDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
+        const AstNodeArrayDType* const asamep = VN_DBG_AS(samep, NodeArrayDType);
         return (hi() == asamep->hi() && subDTypep() == asamep->subDTypep()
                 && rangenp()->sameTree(asamep->rangenp()));
     }  // HashedDT doesn't recurse, so need to check children
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
-        return (asamep && type() == samep->type() && hi() == asamep->hi()
-                && rangenp()->sameTree(asamep->rangenp())
+        if (type() != samep->type()) return false;
+        const AstNodeArrayDType* const asamep = VN_DBG_AS(samep, NodeArrayDType);
+        return (hi() == asamep->hi() && rangenp()->sameTree(asamep->rangenp())
                 && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp()));
     }
     AstNodeDType* getChildDTypep() const override { return childDTypep(); }
@@ -314,14 +314,15 @@ public:
         if (m_keyDTypep && m_keyDTypep->clonep()) m_keyDTypep = m_keyDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstAssocArrayDType* const asamep = static_cast<const AstAssocArrayDType*>(samep);
+        const AstAssocArrayDType* const asamep = VN_DBG_AS(samep, AssocArrayDType);
         if (!asamep->subDTypep()) return false;
         if (!asamep->keyDTypep()) return false;
         return (subDTypep() == asamep->subDTypep() && keyDTypep() == asamep->keyDTypep());
     }
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstAssocArrayDType* const asamep = static_cast<const AstAssocArrayDType*>(samep);
-        return type() == samep->type() && asamep->subDTypep()
+        if (type() != samep->type()) return false;
+        const AstAssocArrayDType* const asamep = VN_DBG_AS(samep, AssocArrayDType);
+        return asamep->subDTypep()
                && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
     }
     string prettyDTypeName() const override;
@@ -507,7 +508,7 @@ public:
 public:
     ASTGEN_MEMBERS_AstCDType;
     bool same(const AstNode* samep) const override {
-        const AstCDType* const asamep = static_cast<const AstCDType*>(samep);
+        const AstCDType* const asamep = VN_DBG_AS(samep, CDType);
         return m_name == asamep->m_name;
     }
     bool similarDType(const AstNodeDType* samep) const override { return same(samep); }
@@ -547,7 +548,7 @@ public:
     const char* broken() const override;
     void cloneRelink() override;
     bool same(const AstNode* samep) const override {
-        const AstClassRefDType* const asamep = static_cast<const AstClassRefDType*>(samep);
+        const AstClassRefDType* const asamep = VN_DBG_AS(samep, ClassRefDType);
         return (m_classp == asamep->m_classp && m_classOrPackagep == asamep->m_classOrPackagep);
     }
     bool similarDType(const AstNodeDType* samep) const override {
@@ -596,7 +597,7 @@ public:
         if (m_refDTypep && m_refDTypep->clonep()) m_refDTypep = m_refDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstConstDType* const sp = static_cast<const AstConstDType*>(samep);
+        const AstConstDType* const sp = VN_DBG_AS(samep, ConstDType);
         return (m_refDTypep == sp->m_refDTypep);
     }
     bool similarDType(const AstNodeDType* samep) const override {
@@ -645,7 +646,7 @@ public:
     ASTGEN_MEMBERS_AstDefImplicitDType;
     int uniqueNum() const { return m_uniqueNum; }
     bool same(const AstNode* samep) const override {
-        const AstDefImplicitDType* const sp = static_cast<const AstDefImplicitDType*>(samep);
+        const AstDefImplicitDType* const sp = VN_DBG_AS(samep, DefImplicitDType);
         return uniqueNum() == sp->uniqueNum();
     }
     bool similarDType(const AstNodeDType* samep) const override {
@@ -696,13 +697,14 @@ public:
         if (m_refDTypep && m_refDTypep->clonep()) m_refDTypep = m_refDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstAssocArrayDType* const asamep = static_cast<const AstAssocArrayDType*>(samep);
+        const AstDynArrayDType* const asamep = VN_DBG_AS(samep, DynArrayDType);
         if (!asamep->subDTypep()) return false;
         return subDTypep() == asamep->subDTypep();
     }
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstAssocArrayDType* const asamep = static_cast<const AstAssocArrayDType*>(samep);
-        return type() == samep->type() && asamep->subDTypep()
+        if (type() != samep->type()) return false;
+        const AstDynArrayDType* const asamep = VN_DBG_AS(samep, DynArrayDType);
+        return asamep->subDTypep()
                && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
     }
     string prettyDTypeName() const override;
@@ -787,7 +789,7 @@ public:
     }
     int uniqueNum() const { return m_uniqueNum; }
     bool same(const AstNode* samep) const override {
-        const AstEnumDType* const sp = static_cast<const AstEnumDType*>(samep);
+        const AstEnumDType* const sp = VN_DBG_AS(samep, EnumDType);
         return uniqueNum() == sp->uniqueNum();
     }
     bool similarDType(const AstNodeDType* samep) const override { return this == samep; }
@@ -982,9 +984,9 @@ public:
     AstNodeDType* skipRefToConstp() const override { return subDTypep()->skipRefToConstp(); }
     AstNodeDType* skipRefToEnump() const override { return subDTypep()->skipRefToEnump(); }
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstParamTypeDType* const sp = static_cast<const AstParamTypeDType*>(samep);
-        return type() == samep->type() && sp
-               && this->subDTypep()->skipRefp()->similarDType(sp->subDTypep()->skipRefp());
+        if (type() != samep->type()) return false;
+        const AstParamTypeDType* const sp = VN_DBG_AS(samep, ParamTypeDType);
+        return this->subDTypep()->skipRefp()->similarDType(sp->subDTypep()->skipRefp());
     }
     int widthAlignBytes() const override { return dtypep()->widthAlignBytes(); }
     int widthTotalBytes() const override { return dtypep()->widthTotalBytes(); }
@@ -1055,13 +1057,14 @@ public:
         if (m_refDTypep && m_refDTypep->clonep()) m_refDTypep = m_refDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstQueueDType* const asamep = static_cast<const AstQueueDType*>(samep);
+        const AstQueueDType* const asamep = VN_DBG_AS(samep, QueueDType);
         if (!asamep->subDTypep()) return false;
         return (subDTypep() == asamep->subDTypep());
     }
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstQueueDType* const asamep = static_cast<const AstQueueDType*>(samep);
-        return type() == samep->type() && asamep->subDTypep()
+        if (type() != samep->type()) return false;
+        const AstQueueDType* const asamep = VN_DBG_AS(samep, QueueDType);
+        return asamep->subDTypep()
                && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
     }
     void dumpSmall(std::ostream& str) const override;
@@ -1119,7 +1122,7 @@ public:
     const char* broken() const override;
     void cloneRelink() override;
     bool same(const AstNode* samep) const override {
-        const AstRefDType* const asamep = static_cast<const AstRefDType*>(samep);
+        const AstRefDType* const asamep = VN_DBG_AS(samep, RefDType);
         return (m_typedefp == asamep->m_typedefp && m_refDTypep == asamep->m_refDTypep
                 && m_name == asamep->m_name && m_classOrPackagep == asamep->m_classOrPackagep);
     }
@@ -1197,13 +1200,14 @@ public:
         if (m_refDTypep && m_refDTypep->clonep()) m_refDTypep = m_refDTypep->clonep();
     }
     bool same(const AstNode* samep) const override {
-        const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
+        const AstSampleQueueDType* const asamep = VN_DBG_AS(samep, SampleQueueDType);
         if (!asamep->subDTypep()) return false;
         return (subDTypep() == asamep->subDTypep());
     }
     bool similarDType(const AstNodeDType* samep) const override {
-        const AstSampleQueueDType* const asamep = static_cast<const AstSampleQueueDType*>(samep);
-        return type() == samep->type() && asamep->subDTypep()
+        if (type() != samep->type()) return false;
+        const AstSampleQueueDType* const asamep = VN_DBG_AS(samep, SampleQueueDType);
+        return asamep->subDTypep()
                && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
     }
     void dumpSmall(std::ostream& str) const override;
@@ -1396,7 +1400,7 @@ public:
     ASTGEN_MEMBERS_AstUnpackArrayDType;
     string prettyDTypeName() const override;
     bool same(const AstNode* samep) const override {
-        const AstUnpackArrayDType* const sp = static_cast<const AstUnpackArrayDType*>(samep);
+        const AstUnpackArrayDType* const sp = VN_DBG_AS(samep, UnpackArrayDType);
         return m_isCompound == sp->m_isCompound;
     }
     // Outer dimension comes first. The first element is this node.
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 580c5e3ce..37a360170 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -198,7 +198,7 @@ public:
     const char* broken() const override;
     int instrCount() const override { return INSTR_COUNT_CALL; }
     bool same(const AstNode* samep) const override {
-        const AstNodeCCall* const asamep = static_cast<const AstNodeCCall*>(samep);
+        const AstNodeCCall* const asamep = VN_DBG_AS(samep, NodeCCall);
         return (funcp() == asamep->funcp() && argTypes() == asamep->argTypes());
     }
     bool isGateOptimizable() const override { return false; }
@@ -640,7 +640,7 @@ public:
     string name() const override VL_MT_STABLE { return m_name; }  // * = Var name
     void name(const string& name) override { m_name = name; }
     bool same(const AstNode* samep) const override {
-        const AstCMethodHard* asamep = static_cast<const AstCMethodHard*>(samep);
+        const AstCMethodHard* const asamep = VN_DBG_AS(samep, CMethodHard);
         return (m_name == asamep->m_name);
     }
     bool isPure() override { return m_pure; }
@@ -772,7 +772,7 @@ public:
     }
     bool same(const AstNode* samep) const override {
         return (m_classOrPackageNodep
-                == static_cast<const AstClassOrPackageRef*>(samep)->m_classOrPackageNodep);
+                == VN_DBG_AS(samep, ClassOrPackageRef)->m_classOrPackageNodep);
     }
     void dump(std::ostream& str = std::cout) const override;
     string name() const override VL_MT_STABLE { return m_name; }  // * = Var name
@@ -1043,7 +1043,7 @@ public:
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const override { return true; }
     bool same(const AstNode* samep) const override {
-        const AstConst* const sp = static_cast<const AstConst*>(samep);
+        const AstConst* const sp = VN_DBG_AS(samep, Const);
         return num().isCaseEq(sp->num());
     }
     void cloneRelink() override { m_num.nodep(this); }
@@ -1139,7 +1139,7 @@ public:
     const char* broken() const override;
     void cloneRelink() override;
     bool same(const AstNode* samep) const override {
-        const AstEnumItemRef* const sp = static_cast<const AstEnumItemRef*>(samep);
+        const AstEnumItemRef* const sp = VN_DBG_AS(samep, EnumItemRef);
         return itemp() == sp->itemp();
     }
     AstEnumItem* itemp() const VL_MT_STABLE { return m_itemp; }
@@ -1297,7 +1297,7 @@ public:
     bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* samep) const override {
-        return text() == static_cast<const AstFScanF*>(samep)->text();
+        return text() == VN_DBG_AS(samep, FScanF)->text();
     }
     string text() const { return m_text; }  // * = Text to display
     void text(const string& text) { m_text = text; }
@@ -1426,7 +1426,7 @@ public:
     bool same(const AstNode* samep) const override {
         // Only works if exact same children, instead should override comparison
         // of children list, and instead use map-vs-map key/value compare
-        return m_map == static_cast<const AstInitArray*>(samep)->m_map;
+        return m_map == VN_DBG_AS(samep, InitArray)->m_map;
     }
     void addValuep(AstNodeExpr* newp) { addIndexValuep(m_map.size(), newp); }
     const KeyItemMap& map() const { return m_map; }
@@ -1582,7 +1582,7 @@ public:
     void dump(std::ostream& str) const override;
     string name() const override VL_MT_STABLE { return m_name; }  // * = Var name
     bool same(const AstNode* samep) const override {
-        const AstParseRef* const asamep = static_cast<const AstParseRef*>(samep);
+        const AstParseRef* const asamep = VN_DBG_AS(samep, ParseRef);
         return (expect() == asamep->expect() && m_name == asamep->m_name);
     }
     void name(const string& name) override { m_name = name; }
@@ -1777,7 +1777,7 @@ public:
     string name() const override VL_MT_STABLE { return m_text; }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool same(const AstNode* samep) const override {
-        return text() == static_cast<const AstSFormatF*>(samep)->text();
+        return text() == VN_DBG_AS(samep, SFormatF)->text();
     }
     string verilogKwd() const override { return "$sformatf"; }
     string text() const { return m_text; }  // * = Text to display
@@ -1819,7 +1819,7 @@ public:
     bool isOutputter() override { return true; }  // SPECIAL: makes output
     bool cleanOut() const override { return false; }
     bool same(const AstNode* samep) const override {
-        return text() == static_cast<const AstSScanF*>(samep)->text();
+        return text() == VN_DBG_AS(samep, SScanF)->text();
     }
     string text() const { return m_text; }  // * = Text to display
     void text(const string& text) { m_text = text; }
@@ -1859,8 +1859,8 @@ public:
     }
     ASTGEN_MEMBERS_AstScopeName;
     bool same(const AstNode* samep) const override {
-        return (m_dpiExport == static_cast<const AstScopeName*>(samep)->m_dpiExport
-                && m_forFormat == static_cast<const AstScopeName*>(samep)->m_forFormat);
+        const AstScopeName* const sp = VN_DBG_AS(samep, ScopeName);
+        return (m_dpiExport == sp->m_dpiExport && m_forFormat == sp->m_forFormat);
     }
     string emitVerilog() override { return ""; }
     string emitC() override { V3ERROR_NA_RETURN(""); }
@@ -2003,7 +2003,7 @@ public:
         return VN_IS(fromp()->dtypep()->skipRefp(), StructDType);
     }
     bool same(const AstNode* samep) const override {
-        const AstStructSel* const sp = static_cast<const AstStructSel*>(samep);
+        const AstStructSel* const sp = VN_DBG_AS(samep, StructSel);
         return m_name == sp->m_name;
     }
     int instrCount() const override { return widthInstrs(); }
@@ -4749,7 +4749,7 @@ public:
     bool cleanLhs() const override { return true; }
     bool sizeMattersLhs() const override { return false; }  // Special cased in V3Cast
     bool same(const AstNode* samep) const override {
-        return size() == static_cast<const AstCCast*>(samep)->size();
+        return size() == VN_DBG_AS(samep, CCast)->size();
     }
     void dump(std::ostream& str = std::cout) const override;
     //
@@ -5543,7 +5543,7 @@ public:
     bool cleanOut() const override { return true; }
     int instrCount() const override { return widthInstrs(); }
     bool same(const AstNode* samep) const override {
-        const AstVarXRef* asamep = static_cast<const AstVarXRef*>(samep);
+        const AstVarXRef* asamep = VN_DBG_AS(samep, VarXRef);
         return (selfPointer() == asamep->selfPointer() && varp() == asamep->varp()
                 && name() == asamep->name() && dotted() == asamep->dotted());
     }
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index e41d614d2..91c015958 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -484,7 +484,7 @@ public:
     bool isOutputter() override { return true; }
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
-        return isHex() == static_cast<const AstNodeReadWriteMem*>(samep)->isHex();
+        return isHex() == VN_DBG_AS(samep, NodeReadWriteMem)->isHex();
     }
     bool isHex() const { return m_isHex; }
     virtual const char* cFuncPrefixp() const = 0;
@@ -503,7 +503,7 @@ public:
     ASTGEN_MEMBERS_AstNodeText;
     void dump(std::ostream& str = std::cout) const override;
     bool same(const AstNode* samep) const override {
-        const AstNodeText* asamep = static_cast<const AstNodeText*>(samep);
+        const AstNodeText* asamep = VN_DBG_AS(samep, NodeText);
         return text() == asamep->text();
     }
     const string& text() const VL_MT_SAFE { return m_text; }
@@ -645,7 +645,7 @@ public:
     bool maybePointedTo() const override { return true; }
     void dump(std::ostream& str = std::cout) const override;
     bool same(const AstNode* samep) const override {
-        const AstCFunc* const asamep = static_cast<const AstCFunc*>(samep);
+        const AstCFunc* const asamep = VN_DBG_AS(samep, CFunc);
         return ((isTrace() == asamep->isTrace()) && (rtnTypeVoid() == asamep->rtnTypeVoid())
                 && (argTypes() == asamep->argTypes()) && (baseCtors() == asamep->baseCtors())
                 && isLoose() == asamep->isLoose()
@@ -1013,7 +1013,7 @@ public:
     bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
-        return displayType() == static_cast<const AstElabDisplay*>(samep)->displayType();
+        return displayType() == VN_DBG_AS(samep, ElabDisplay)->displayType();
     }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     VDisplayType displayType() const { return m_displayType; }
@@ -1347,7 +1347,7 @@ public:
     VPragmaType pragType() const { return m_pragType; }  // *=type of the pragma
     bool isPredictOptimizable() const override { return false; }
     bool same(const AstNode* samep) const override {
-        return pragType() == static_cast<const AstPragma*>(samep)->pragType();
+        return pragType() == VN_DBG_AS(samep, Pragma)->pragType();
     }
 };
 class AstPropSpec final : public AstNode {
@@ -1382,7 +1382,7 @@ public:
     }
     ASTGEN_MEMBERS_AstPull;
     bool same(const AstNode* samep) const override {
-        return direction() == static_cast<const AstPull*>(samep)->direction();
+        return direction() == VN_DBG_AS(samep, Pull)->direction();
     }
     uint32_t direction() const { return (uint32_t)m_direction; }
 };
@@ -1462,7 +1462,7 @@ public:
     ASTGEN_MEMBERS_AstSenItem;
     void dump(std::ostream& str) const override;
     bool same(const AstNode* samep) const override {
-        return edgeType() == static_cast<const AstSenItem*>(samep)->edgeType();
+        return edgeType() == VN_DBG_AS(samep, SenItem)->edgeType();
     }
     VEdgeType edgeType() const { return m_edgeType; }
     void edgeType(VEdgeType type) {
@@ -2611,7 +2611,7 @@ public:
     void hier(const string& flag) { m_hier = flag; }
     void comment(const string& flag) { m_text = flag; }
     bool same(const AstNode* samep) const override {
-        const AstCoverDecl* const asamep = static_cast<const AstCoverDecl*>(samep);
+        const AstCoverDecl* const asamep = VN_DBG_AS(samep, CoverDecl);
         return (fileline() == asamep->fileline() && linescov() == asamep->linescov()
                 && hier() == asamep->hier() && comment() == asamep->comment());
     }
@@ -2640,7 +2640,7 @@ public:
     void dump(std::ostream& str) const override;
     int instrCount() const override { return 1 + 2 * INSTR_COUNT_LD; }
     bool same(const AstNode* samep) const override {
-        return declp() == static_cast<const AstCoverInc*>(samep)->declp();
+        return declp() == VN_DBG_AS(samep, CoverInc)->declp();
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
@@ -2747,7 +2747,7 @@ public:
     bool isOutputter() override { return true; }  // SPECIAL: $display makes output
     bool isUnlikely() const override { return true; }
     bool same(const AstNode* samep) const override {
-        return displayType() == static_cast<const AstDisplay*>(samep)->displayType();
+        return displayType() == VN_DBG_AS(samep, Display)->displayType();
     }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     VDisplayType displayType() const { return m_displayType; }
@@ -2924,7 +2924,7 @@ public:
     void dump(std::ostream& str) const override;
     int instrCount() const override { return INSTR_COUNT_BRANCH; }
     bool same(const AstNode* samep) const override {
-        return labelp() == static_cast<const AstJumpGo*>(samep)->labelp();
+        return labelp() == VN_DBG_AS(samep, JumpGo)->labelp();
     }
     bool isGateOptimizable() const override { return false; }
     bool isBrancher() const override {
@@ -2955,7 +2955,7 @@ public:
     void dump(std::ostream& str) const override;
     int instrCount() const override { return 0; }
     bool same(const AstNode* samep) const override {
-        return blockp() == static_cast<const AstJumpLabel*>(samep)->blockp();
+        return blockp() == VN_DBG_AS(samep, JumpLabel)->blockp();
     }
     AstJumpBlock* blockp() const { return m_blockp; }
 };
@@ -2974,7 +2974,7 @@ public:
     bool isOutputter() override { return true; }  // Though deleted before opt
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool same(const AstNode* samep) const override {
-        return m_off == static_cast<const AstMonitorOff*>(samep)->m_off;
+        return m_off == VN_DBG_AS(samep, MonitorOff)->m_off;
     }
     bool off() const { return m_off; }
 };
@@ -3253,7 +3253,7 @@ public:
     int instrCount() const override { return 10 + 2 * INSTR_COUNT_LD; }
     bool hasDType() const override { return true; }
     bool same(const AstNode* samep) const override {
-        return declp() == static_cast<const AstTraceInc*>(samep)->declp();
+        return declp() == VN_DBG_AS(samep, TraceInc)->declp();
     }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
@@ -3463,7 +3463,7 @@ public:
     ASTGEN_MEMBERS_AstCase;
     string verilogKwd() const override { return casez() ? "casez" : casex() ? "casex" : "case"; }
     bool same(const AstNode* samep) const override {
-        return m_casex == static_cast<const AstCase*>(samep)->m_casex;
+        return m_casex == VN_DBG_AS(samep, Case)->m_casex;
     }
     bool casex() const { return m_casex == VCaseType::CT_CASEX; }
     bool casez() const { return m_casex == VCaseType::CT_CASEZ; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index df65365c4..c06e60907 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -276,7 +276,7 @@ int AstBasicDType::widthTotalBytes() const {
 }
 
 bool AstBasicDType::same(const AstNode* samep) const {
-    const AstBasicDType* const sp = static_cast<const AstBasicDType*>(samep);
+    const AstBasicDType* const sp = VN_DBG_AS(samep, BasicDType);
     if (!(m == sp->m) || numeric() != sp->numeric()) return false;
     if (!rangep() && !sp->rangep()) return true;
     return rangep() && rangep()->sameTree(sp->rangep());
@@ -1703,7 +1703,7 @@ AstNodeUOrStructDType* AstMemberDType::getChildStructp() const {
 }
 
 bool AstMemberSel::same(const AstNode* samep) const {
-    const AstMemberSel* const sp = static_cast<const AstMemberSel*>(samep);
+    const AstMemberSel* const sp = VN_DBG_AS(samep, MemberSel);
     return sp != nullptr && access() == sp->access() && fromp()->same(sp->fromp())
            && name() == sp->name() && varp()->same(sp->varp());
 }
@@ -2061,13 +2061,14 @@ void AstWildcardArrayDType::dumpSmall(std::ostream& str) const {
     str << "[*]";
 }
 bool AstWildcardArrayDType::same(const AstNode* samep) const {
-    const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
+    const AstWildcardArrayDType* const asamep = VN_DBG_AS(samep, WildcardArrayDType);
     if (!asamep->subDTypep()) return false;
     return (subDTypep() == asamep->subDTypep());
 }
 bool AstWildcardArrayDType::similarDType(const AstNodeDType* samep) const {
-    const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
-    return type() == samep->type() && asamep->subDTypep()
+    if (type() != samep->type()) return false;
+    const AstWildcardArrayDType* const asamep = VN_DBG_AS(samep, WildcardArrayDType);
+    return asamep->subDTypep()
            && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
 }
 void AstSampleQueueDType::dumpSmall(std::ostream& str) const {
@@ -2079,13 +2080,14 @@ void AstUnsizedArrayDType::dumpSmall(std::ostream& str) const {
     str << "[]";
 }
 bool AstUnsizedArrayDType::same(const AstNode* samep) const {
-    const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
+    const AstUnsizedArrayDType* const asamep = VN_DBG_AS(samep, UnsizedArrayDType);
     if (!asamep->subDTypep()) return false;
     return (subDTypep() == asamep->subDTypep());
 }
 bool AstUnsizedArrayDType::similarDType(const AstNodeDType* samep) const {
-    const AstNodeArrayDType* const asamep = static_cast<const AstNodeArrayDType*>(samep);
-    return type() == samep->type() && asamep->subDTypep()
+    if (type() != samep->type()) return false;
+    const AstUnsizedArrayDType* const asamep = VN_DBG_AS(samep, UnsizedArrayDType);
+    return asamep->subDTypep()
            && subDTypep()->skipRefp()->similarDType(asamep->subDTypep()->skipRefp());
 }
 void AstEmptyQueueDType::dumpSmall(std::ostream& str) const {
@@ -2112,7 +2114,7 @@ void AstVarScope::dump(std::ostream& str) const {
     }
 }
 bool AstVarScope::same(const AstNode* samep) const {
-    const AstVarScope* const asamep = static_cast<const AstVarScope*>(samep);
+    const AstVarScope* const asamep = VN_DBG_AS(samep, VarScope);
     return varp()->same(asamep->varp()) && scopep()->same(asamep->scopep());
 }
 void AstNodeVarRef::dump(std::ostream& str) const {
@@ -2146,9 +2148,7 @@ const char* AstVarRef::broken() const {
     BROKEN_RTN(!varp());
     return AstNodeVarRef::broken();
 }
-bool AstVarRef::same(const AstNode* samep) const {
-    return same(static_cast<const AstVarRef*>(samep));
-}
+bool AstVarRef::same(const AstNode* samep) const { return same(VN_DBG_AS(samep, VarRef)); }
 int AstVarRef::instrCount() const {
     // Account for the target of hard-coded method calls as just an address computation
     if (const AstCMethodHard* const callp = VN_CAST(backp(), CMethodHard)) {
@@ -2189,7 +2189,7 @@ void AstVar::dump(std::ostream& str) const {
     str << " " << varType();
 }
 bool AstVar::same(const AstNode* samep) const {
-    const AstVar* const asamep = static_cast<const AstVar*>(samep);
+    const AstVar* const asamep = VN_DBG_AS(samep, Var);
     return name() == asamep->name() && varType() == asamep->varType();
 }
 void AstScope::dump(std::ostream& str) const {
@@ -2199,7 +2199,7 @@ void AstScope::dump(std::ostream& str) const {
     str << " [modp=" << reinterpret_cast<const void*>(modp()) << "]";
 }
 bool AstScope::same(const AstNode* samep) const {
-    const AstScope* const asamep = static_cast<const AstScope*>(samep);
+    const AstScope* const asamep = VN_DBG_AS(samep, Scope);
     return name() == asamep->name()
            && ((!aboveScopep() && !asamep->aboveScopep())
                || (aboveScopep() && asamep->aboveScopep()

From ad3bcbb1bb0a8afe63e842d7214682b562f0807f Mon Sep 17 00:00:00 2001
From: Aleksander Kiryk <akiryk@antmicro.com>
Date: Mon, 16 Oct 2023 14:02:29 +0200
Subject: [PATCH 076/157] Support `disable fork` (#4125) (#4569)

---
 include/verilated_types.h                     |  33 +++-
 src/V3AstNodeOther.h                          |  14 +-
 src/V3AstNodes.cpp                            |   1 +
 src/V3EmitCFunc.cpp                           |   5 +-
 src/V3EmitCFunc.h                             |   7 +-
 src/V3LinkJump.cpp                            |   2 +-
 src/V3SchedTiming.cpp                         |  10 +-
 src/V3Timing.cpp                              | 145 ++++++++++++------
 src/V3Width.cpp                               |  10 +-
 test_regress/t/t_disable.out                  |   5 +
 test_regress/t/t_disable.pl                   |  20 +++
 test_regress/t/t_disable.v                    |  19 +++
 test_regress/t/t_disable_fork1.pl             |  23 +++
 test_regress/t/t_disable_fork1.v              |  49 ++++++
 test_regress/t/t_disable_fork2.pl             |  23 +++
 test_regress/t/t_disable_fork2.v              |  58 +++++++
 test_regress/t/t_disable_fork3.pl             |  23 +++
 test_regress/t/t_disable_fork3.v              |  18 +++
 test_regress/t/t_disable_fork_notiming.out    |   6 +
 test_regress/t/t_disable_fork_notiming.pl     |  20 +++
 test_regress/t/t_disable_fork_notiming.v      |   9 ++
 test_regress/t/t_fork_disable.out             |  10 --
 test_regress/t/t_uvm_pkg_todo.vh              |  12 +-
 test_regress/t/t_wait_fork.out                |   6 +
 .../t/{t_fork_disable.pl => t_wait_fork.pl}   |   0
 .../t/{t_fork_disable.v => t_wait_fork.v}     |   0
 26 files changed, 441 insertions(+), 87 deletions(-)
 create mode 100644 test_regress/t/t_disable.out
 create mode 100755 test_regress/t/t_disable.pl
 create mode 100644 test_regress/t/t_disable.v
 create mode 100755 test_regress/t/t_disable_fork1.pl
 create mode 100644 test_regress/t/t_disable_fork1.v
 create mode 100755 test_regress/t/t_disable_fork2.pl
 create mode 100644 test_regress/t/t_disable_fork2.v
 create mode 100755 test_regress/t/t_disable_fork3.pl
 create mode 100644 test_regress/t/t_disable_fork3.v
 create mode 100644 test_regress/t/t_disable_fork_notiming.out
 create mode 100755 test_regress/t/t_disable_fork_notiming.pl
 create mode 100644 test_regress/t/t_disable_fork_notiming.v
 delete mode 100644 test_regress/t/t_fork_disable.out
 create mode 100644 test_regress/t/t_wait_fork.out
 rename test_regress/t/{t_fork_disable.pl => t_wait_fork.pl} (100%)
 rename test_regress/t/{t_fork_disable.v => t_wait_fork.v} (100%)

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 9eae185d5..876a78511 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -81,11 +81,16 @@ constexpr IData VL_CLOG2_CE_Q(QData lhs) VL_PURE {
     return lhs <= 1 ? 0 : VL_CLOG2_CE_Q((lhs + 1) >> 1ULL) + 1;
 }
 
-//===================================================================
-// VlProcess stores metadata of running processes
+// Metadata of processes
+class VlProcess;
+
+using VlProcessRef = std::shared_ptr<VlProcess>;
+
 class VlProcess final {
     // MEMBERS
     int m_state;  // Current state of the process
+    VlProcessRef m_parentp = nullptr;  // Parent process, if exists
+    std::set<VlProcess*> m_children;  // Active child processes
 
 public:
     // TYPES
@@ -98,16 +103,34 @@ public:
     };
 
     // CONSTRUCTORS
+    // Construct independent process
     VlProcess()
         : m_state{RUNNING} {}
+    // Construct child process of parent
+    VlProcess(VlProcessRef parentp)
+        : m_state{RUNNING}
+        , m_parentp{parentp} {
+        m_parentp->attach(this);
+    }
+
+    ~VlProcess() {
+        if (m_parentp) m_parentp->detach(this);
+    }
+
+    void attach(VlProcess* childp) { m_children.insert(childp); }
+    void detach(VlProcess* childp) { m_children.erase(childp); }
 
-    // METHODS
     int state() { return m_state; }
     void state(int s) { m_state = s; }
+    void disable() {
+        state(KILLED);
+        disable_fork();
+    }
+    void disable_fork() {
+        for (VlProcess* childp : m_children) childp->disable();
+    }
 };
 
-using VlProcessRef = std::shared_ptr<VlProcess>;
-
 inline std::string VL_TO_STRING(const VlProcessRef& p) { return std::string("process"); }
 
 //===================================================================
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 91c015958..2fea7ff71 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -86,7 +86,7 @@ private:
     bool m_recursive : 1;  // Recursive or part of recursion
     bool m_underGenerate : 1;  // Under generate (for warning)
     bool m_virtual : 1;  // Virtual method in class
-    bool m_needProcess : 1;  // Implements part of a process that allocates std::process
+    bool m_needProcess : 1;  // Needs access to VlProcess of the caller
     VLifetime m_lifetime;  // Lifetime
     VIsCached m_purity;  // Pure state
 
@@ -300,7 +300,7 @@ class AstNodeProcedure VL_NOT_FINAL : public AstNode {
     // IEEE procedure: initial, final, always
     // @astgen op2 := stmtsp : List[AstNode] // Note: op1 is used in some sub-types only
     bool m_suspendable : 1;  // Is suspendable by a Delay, EventControl, etc.
-    bool m_needProcess : 1;  // Implements part of a process that allocates std::process
+    bool m_needProcess : 1;  // Uses VlProcess
 protected:
     AstNodeProcedure(VNType t, FileLine* fl, AstNode* stmtsp)
         : AstNode{t, fl} {
@@ -608,7 +608,7 @@ private:
     bool m_dpiImportPrototype : 1;  // This is the DPI import prototype (i.e.: provided by user)
     bool m_dpiImportWrapper : 1;  // Wrapper for invoking DPI import prototype from generated code
     bool m_dpiTraceInit : 1;  // DPI trace_init
-    bool m_needProcess : 1;  // Implements part of a process that allocates std::process
+    bool m_needProcess : 1;  // Needs access to VlProcess of the caller
 public:
     AstCFunc(FileLine* fl, const string& name, AstScope* scopep, const string& rtnType = "")
         : ASTGEN_SUPER_CFunc(fl) {
@@ -2096,19 +2096,23 @@ class AstBegin final : public AstNodeBlock {
     // Parents: statement
     // @astgen op1 := genforp : Optional[AstNode]
 
-    bool m_generate;  // Underneath a generate
-    const bool m_implied;  // Not inserted by user
+    bool m_generate : 1;  // Underneath a generate
+    bool m_needProcess : 1;  // Uses VlProcess
+    const bool m_implied : 1;  // Not inserted by user
 public:
     // Node that puts name into the output stream
     AstBegin(FileLine* fl, const string& name, AstNode* stmtsp, bool generate = false,
              bool implied = false)
         : ASTGEN_SUPER_Begin(fl, name, stmtsp)
         , m_generate{generate}
+        , m_needProcess{false}
         , m_implied{implied} {}
     ASTGEN_MEMBERS_AstBegin;
     void dump(std::ostream& str) const override;
     void generate(bool flag) { m_generate = flag; }
     bool generate() const { return m_generate; }
+    void setNeedProcess() { m_needProcess = true; }
+    bool needProcess() const { return m_needProcess; }
     bool implied() const { return m_implied; }
 };
 class AstFork final : public AstNodeBlock {
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index c06e60907..4720c4b01 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -2321,6 +2321,7 @@ void AstBegin::dump(std::ostream& str) const {
     if (generate()) str << " [GEN]";
     if (genforp()) str << " [GENFOR]";
     if (implied()) str << " [IMPLIED]";
+    if (needProcess()) str << " [NPRC]";
 }
 void AstCoverDecl::dump(std::ostream& str) const {
     this->AstNodeStmt::dump(str);
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 0264059a3..deb4ceb61 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -410,7 +410,8 @@ void EmitCFunc::displayNode(AstNode* nodep, AstScopeName* scopenamep, const stri
     displayEmit(nodep, isScan);
 }
 
-void EmitCFunc::emitCCallArgs(const AstNodeCCall* nodep, const string& selfPointer) {
+void EmitCFunc::emitCCallArgs(const AstNodeCCall* nodep, const string& selfPointer,
+                              bool inProcess) {
     puts("(");
     bool comma = false;
     if (nodep->funcp()->isLoose() && !nodep->funcp()->isStatic()) {
@@ -422,6 +423,8 @@ void EmitCFunc::emitCCallArgs(const AstNodeCCall* nodep, const string& selfPoint
         if (comma) puts(", ");
         if (VN_IS(nodep->backp(), CAwait) || !nodep->funcp()->isCoroutine()) {
             puts("vlProcess");
+        } else if (inProcess) {
+            puts("std::make_shared<VlProcess>(vlProcess)");
         } else {
             puts("std::make_shared<VlProcess>()");
         }
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index f9b3bd3d6..871ec3624 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -205,7 +205,7 @@ public:
     }
     void emitOpName(AstNode* nodep, const string& format, AstNode* lhsp, AstNode* rhsp,
                     AstNode* thsp);
-    void emitCCallArgs(const AstNodeCCall* nodep, const string& selfPointer);
+    void emitCCallArgs(const AstNodeCCall* nodep, const string& selfPointer, bool inProcess);
     void emitDereference(const string& pointer);
     void emitCvtPackStr(AstNode* nodep);
     void emitCvtWideArray(AstNode* nodep, AstNode* fromp);
@@ -500,7 +500,7 @@ public:
             }
             puts(funcp->nameProtect());
         }
-        emitCCallArgs(nodep, nodep->selfPointerProtect(m_useSelfForThis));
+        emitCCallArgs(nodep, nodep->selfPointerProtect(m_useSelfForThis), m_cfuncp->needProcess());
     }
     void visit(AstCMethodCall* nodep) override {
         const AstCFunc* const funcp = nodep->funcp();
@@ -508,7 +508,7 @@ public:
         iterateConst(nodep->fromp());
         putbs("->");
         puts(funcp->nameProtect());
-        emitCCallArgs(nodep, "");
+        emitCCallArgs(nodep, "", m_cfuncp->needProcess());
     }
     void visit(AstCAwait* nodep) override {
         puts("co_await ");
@@ -613,6 +613,7 @@ public:
             puts("]);\n");
         }
     }
+    void visit(AstDisableFork* nodep) override { puts("vlProcess->disable_fork();\n"); }
     void visit(AstCReturn* nodep) override {
         puts("return (");
         iterateAndNextConstNull(nodep->lhsp());
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index 68807a097..d0aa33e64 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -330,7 +330,7 @@ private:
             AstJumpLabel* const labelp = findAddLabel(beginp, false);
             nodep->addNextHere(new AstJumpGo{nodep->fileline(), labelp});
         } else {
-            nodep->v3warn(E_UNSUPPORTED, "Unsupported: disable fork");
+            nodep->v3warn(E_UNSUPPORTED, "Unsupported: disabling fork by name");
         }
         nodep->unlinkFrBack();
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index c3ffa9ef6..e072814e7 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -279,7 +279,6 @@ void transformForks(AstNetlist* const netlistp) {
         // STATE
         bool m_inClass = false;  // Are we in a class?
         bool m_beginHasAwaits = false;  // Does the current begin have awaits?
-        bool m_beginNeedProcess = false;  // Does the current begin have process::self dependency?
         AstFork* m_forkp = nullptr;  // Current fork
         AstCFunc* m_funcp = nullptr;  // Current function
 
@@ -358,9 +357,8 @@ void transformForks(AstNetlist* const netlistp) {
             UASSERT_OBJ(m_forkp, nodep, "Begin outside of a fork");
             // Start with children, so later we only find awaits that are actually in this begin
             m_beginHasAwaits = false;
-            m_beginNeedProcess = false;
             iterateChildrenConst(nodep);
-            if (m_beginHasAwaits || m_beginNeedProcess) {
+            if (m_beginHasAwaits || nodep->needProcess()) {
                 UASSERT_OBJ(!nodep->name().empty(), nodep, "Begin needs a name");
                 // Create a function to put this begin's statements in
                 FileLine* const flp = nodep->fileline();
@@ -384,7 +382,7 @@ void transformForks(AstNetlist* const netlistp) {
                 }
                 // Put the begin's statements in the function, delete the begin
                 newfuncp->addStmtsp(nodep->stmtsp()->unlinkFrBackWithNext());
-                if (m_beginNeedProcess) {
+                if (nodep->needProcess()) {
                     newfuncp->setNeedProcess();
                     newfuncp->addStmtsp(new AstCStmt{nodep->fileline(),
                                                      "vlProcess->state(VlProcess::FINISHED);\n"});
@@ -405,10 +403,6 @@ void transformForks(AstNetlist* const netlistp) {
             m_beginHasAwaits = true;
             iterateChildrenConst(nodep);
         }
-        void visit(AstCCall* nodep) override {
-            if (nodep->funcp()->needProcess()) m_beginNeedProcess = true;
-            iterateChildrenConst(nodep);
-        }
         void visit(AstExprStmt* nodep) override { iterateChildren(nodep); }
 
         //--------------------
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 6a10731b6..d2d6bae96 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -12,11 +12,27 @@
 // Version 2.0.
 // SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 //
-// TimingSuspendableVisitor locates all C++ functions and processes that contain timing controls,
-// and marks them as suspendable. If a process calls a suspendable function, then it is also marked
-// as suspendable. If a function calls or overrides a suspendable function, it is also marked as
-// suspendable. TimingSuspendableVisitor creates a dependency graph to propagate this property. It
-// does not perform any AST transformations.
+// TimingSuspendableVisitor does not perform any AST transformations.
+// Instead it propagates two types of flags:
+// - flag "suspendable": (for detecting what will need to become a coroutine)
+//     The visitor locates all C++ functions and processes that contain timing controls,
+//     and marks them as suspendable. If a process calls a suspendable function,
+//     then it is also marked as suspendable. If a function calls or overrides
+//     a suspendable function, it is also marked as suspendable.
+//     TimingSuspendableVisitor creates a dependency graph to propagate this property.
+// - flag "needs process": (for detecting what needs a VlProcess argument in signature)
+//   The visitor distinguishes 4 types of nodes:
+//     - T_ALLOCS_PROC: nodes that can allocate VlProcess (forks, always, initial etc.),
+//     - T_FORCES_PROC: nodes that make it necessary for the previous type to allocate VlProcess
+//       (like process::self which then wraps it, allowing use inside Verilog).
+//     - T_NEEDS_PROC: nodes that should obtain VlProcess if it will be allocated
+//       (all of the previous type + timing controls, so they could update process state),
+//     - T_HAS_PROC: nodes that are going to be emitted with a VlProcess argument.
+//   T_FORCES_PROC and T_NEEDS_PROC are propagated upwards up to the nodes of type T_ALLOCS_PROC,
+//   this is to detect which processes have to allocate VlProcess. Then nodes of these processes
+//   get marked as T_HAS_PROC and the flag is propagated downwards through nodes
+//   type T_NEEDS_PROC. Using only nodes type T_NEEDS_PROC assures the flags are only propagated
+//   through paths leading to nodes that actually use VlProcess.
 //
 // TimingControlVisitor is the one that actually performs transformations:
 // - for each intra-assignment timing control:
@@ -70,8 +86,10 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 enum NodeFlag : uint8_t {
     T_SUSPENDEE = 1 << 0,  // Suspendable (due to dependence on another suspendable)
     T_SUSPENDER = 1 << 1,  // Suspendable (has timing control)
-    T_HAS_PROC = 1 << 2,  // Has an associated std::process
-    T_CALLS_PROC_SELF = 1 << 3,  // Calls std::process::self
+    T_ALLOCS_PROC = 1 << 2,  // Can allocate VlProcess
+    T_FORCES_PROC = 1 << 3,  // Forces VlProcess allocation
+    T_NEEDS_PROC = 1 << 4,  // Needs access to VlProcess if it's allocated
+    T_HAS_PROC = 1 << 5,  // Has VlProcess argument in the signature
 };
 
 enum ForkType : uint8_t {
@@ -86,6 +104,11 @@ enum PropagationType : uint8_t {
     P_SIGNATURE = 3,  // Propagation required to maintain C++ function's signature requirements
 };
 
+// Add timing flag to a node
+static void addFlags(AstNode* const nodep, uint8_t flags) { nodep->user2(nodep->user2() | flags); }
+// Check if a node has ALL of the expected flags set
+static bool hasFlags(AstNode* const nodep, uint8_t flags) { return !(~nodep->user2() & flags); }
+
 // ######################################################################
 //  Detect nodes affected by timing and/or requiring a process
 
@@ -126,8 +149,8 @@ private:
     class SuspendDepVtx final : public DepVtx {
         VL_RTTI_IMPL(SuspendDepVtx, DepVtx)
         string dotColor() const override {
-            if (nodep()->user2() & T_SUSPENDER) return "red";
-            if (nodep()->user2() & T_SUSPENDEE) return "blue";
+            if (hasFlags(nodep(), T_SUSPENDER)) return "red";
+            if (hasFlags(nodep(), T_SUSPENDEE)) return "blue";
             return "black";
         }
 
@@ -140,8 +163,9 @@ private:
     class NeedsProcDepVtx final : public DepVtx {
         VL_RTTI_IMPL(NeedsProcDepVtx, DepVtx)
         string dotColor() const override {
-            if (nodep()->user2() & T_CALLS_PROC_SELF) return "red";
-            if (nodep()->user2() & T_HAS_PROC) return "blue";
+            if (hasFlags(nodep(), T_HAS_PROC)) return "blue";
+            if (hasFlags(nodep(), T_NEEDS_PROC)) return "green";
+            if (hasFlags(nodep(), T_FORCES_PROC)) return "red";
             return "black";
         }
 
@@ -198,10 +222,10 @@ private:
         if (!nodep->user5p()) nodep->user5p(new NeedsProcDepVtx{&m_procGraph, nodep, classp});
         return nodep->user5u().to<NeedsProcDepVtx*>();
     }
-    // Set timing flag of a node
+    // Pass timing flag between nodes
     bool passFlag(const AstNode* from, AstNode* to, NodeFlag flag) {
         if ((from->user2() & flag) && !(to->user2() & flag)) {
-            to->user2(to->user2() | flag);
+            addFlags(to, flag);
             return true;
         }
         return false;
@@ -216,6 +240,15 @@ private:
         }
     }
     template <typename Predicate>
+    void propagateFlagsIf(DepVtx* const vxp, NodeFlag flag, Predicate p) {
+        auto* const parentp = vxp->nodep();
+        for (V3GraphEdge* edgep = vxp->outBeginp(); edgep; edgep = edgep->outNextp()) {
+            auto* const depVxp = static_cast<DepVtx*>(edgep->top());
+            AstNode* const depp = depVxp->nodep();
+            if (p(edgep) && passFlag(parentp, depp, flag)) propagateFlagsIf(depVxp, flag, p);
+        }
+    }
+    template <typename Predicate>
     void propagateFlagsReversedIf(DepVtx* const vxp, NodeFlag flag, Predicate p) {
         auto* const parentp = vxp->nodep();
         for (V3GraphEdge* edgep = vxp->inBeginp(); edgep; edgep = edgep->inNextp()) {
@@ -236,17 +269,22 @@ private:
     void visit(AstNodeProcedure* nodep) override {
         VL_RESTORER(m_procp);
         m_procp = nodep;
-        if (nodep->needProcess()) nodep->user2(T_HAS_PROC | T_CALLS_PROC_SELF);
+        getNeedsProcDepVtx(nodep);
+        addFlags(nodep, T_ALLOCS_PROC);
         if (VN_IS(nodep, Always)) {
             UINFO(1, "Always does " << (nodep->needProcess() ? "" : "NOT ") << "need process\n");
         }
         iterateChildren(nodep);
     }
+    void visit(AstDisableFork* nodep) override {
+        visit(static_cast<AstNode*>(nodep));
+        addFlags(m_procp, T_FORCES_PROC | T_NEEDS_PROC);
+    }
     void visit(AstCFunc* nodep) override {
         VL_RESTORER(m_procp);
         m_procp = nodep;
         iterateChildren(nodep);
-        if (nodep->needProcess()) nodep->user2(T_HAS_PROC | T_CALLS_PROC_SELF);
+        if (nodep->needProcess()) addFlags(nodep, T_FORCES_PROC | T_NEEDS_PROC);
         DepVtx* const sVxp = getSuspendDepVtx(nodep);
         DepVtx* const pVxp = getNeedsProcDepVtx(nodep);
         if (!m_classp) return;
@@ -287,9 +325,12 @@ private:
             new V3GraphEdge{&m_suspGraph, getSuspendDepVtx(nodep->funcp()),
                             getSuspendDepVtx(m_procp), m_underFork ? P_FORK : P_CALL};
 
-        if (!m_underFork)
-            new V3GraphEdge{&m_procGraph, getNeedsProcDepVtx(nodep->funcp()),
-                            getNeedsProcDepVtx(m_procp), P_CALL};
+        new V3GraphEdge{&m_procGraph, getNeedsProcDepVtx(nodep->funcp()),
+                        getNeedsProcDepVtx(m_procp), P_CALL};
+
+        if (m_underFork && !(m_underFork & F_MIGHT_SUSPEND)) {
+            addFlags(nodep, T_NEEDS_PROC | T_ALLOCS_PROC);
+        }
 
         iterateChildren(nodep);
     }
@@ -301,9 +342,12 @@ private:
             new V3GraphEdge{&m_suspGraph, getSuspendDepVtx(nodep), getSuspendDepVtx(m_procp),
                             m_underFork ? P_FORK : P_CALL};
 
-        if (!m_underFork)
-            new V3GraphEdge{&m_procGraph, getNeedsProcDepVtx(nodep), getNeedsProcDepVtx(m_procp),
-                            P_CALL};
+        new V3GraphEdge{&m_procGraph, getNeedsProcDepVtx(nodep), getNeedsProcDepVtx(m_procp),
+                        P_CALL};
+
+        if (m_underFork && !(m_underFork & F_MIGHT_SUSPEND)) {
+            addFlags(nodep, T_NEEDS_PROC | T_ALLOCS_PROC);
+        }
 
         m_procp = nodep;
         m_underFork = 0;
@@ -316,7 +360,7 @@ private:
                                    // so that transformForks() in V3SchedTiming gets called and
                                    // removes all forks and begins
         if (nodep->isTimingControl() && m_procp) {
-            m_procp->user2(T_SUSPENDEE | T_SUSPENDER);
+            addFlags(m_procp, T_SUSPENDEE | T_SUSPENDER);
             m_underFork |= F_MIGHT_SUSPEND;
         }
         m_underFork |= F_MIGHT_NEED_PROC;
@@ -325,7 +369,7 @@ private:
     void visit(AstNode* nodep) override {
         if (nodep->isTimingControl()) {
             v3Global.setUsesTiming();
-            if (m_procp) m_procp->user2(T_SUSPENDEE | T_SUSPENDER);
+            if (m_procp) addFlags(m_procp, T_SUSPENDEE | T_SUSPENDER | T_NEEDS_PROC);
         }
         iterateChildren(nodep);
     }
@@ -342,22 +386,35 @@ public:
         // Propagate suspendability
         for (V3GraphVertex* vxp = m_suspGraph.verticesBeginp(); vxp; vxp = vxp->verticesNextp()) {
             DepVtx* const depVxp = static_cast<DepVtx*>(vxp);
-            if (depVxp->nodep()->user2() & T_SUSPENDEE) propagateFlags(depVxp, T_SUSPENDEE);
+            if (hasFlags(depVxp->nodep(), T_SUSPENDEE)) propagateFlags(depVxp, T_SUSPENDEE);
         }
         if (dumpGraphLevel() >= 6) m_suspGraph.dumpDotFilePrefixed("timing_deps");
-        // Propagate process
+
+        // Propagate T_HAS_PROCESS
         for (V3GraphVertex* vxp = m_procGraph.verticesBeginp(); vxp; vxp = vxp->verticesNextp()) {
             DepVtx* const depVxp = static_cast<DepVtx*>(vxp);
-            if (depVxp->nodep()->user2() & T_HAS_PROC) propagateFlags(depVxp, T_HAS_PROC);
-        }
-        // Propagate process downwards (from caller to callee) for suspendable calls
-        for (V3GraphVertex* vxp = m_suspGraph.verticesBeginp(); vxp; vxp = vxp->verticesNextp()) {
-            DepVtx* const depVxp = static_cast<DepVtx*>(vxp);
-            if (depVxp->nodep()->user2() & T_HAS_PROC)
-                propagateFlagsReversedIf(depVxp, T_HAS_PROC, [&](const V3GraphEdge* e) -> bool {
-                    return (e->weight() != P_FORK)
-                           && (static_cast<DepVtx*>(e->top())->nodep()->user2() & T_SUSPENDEE);
+            // Find processes that'll allocate VlProcess
+            if (hasFlags(depVxp->nodep(), T_FORCES_PROC)) {
+                propagateFlagsIf(depVxp, T_FORCES_PROC, [&](const V3GraphEdge* e) -> bool {
+                    return !hasFlags(static_cast<DepVtx*>(e->fromp())->nodep(), T_ALLOCS_PROC);
                 });
+            }
+            // Mark nodes on paths between processes and statements that use VlProcess
+            if (hasFlags(depVxp->nodep(), T_NEEDS_PROC)) {
+                propagateFlagsIf(depVxp, T_NEEDS_PROC, [&](const V3GraphEdge* e) -> bool {
+                    return !hasFlags(static_cast<DepVtx*>(e->top())->nodep(), T_ALLOCS_PROC);
+                });
+            }
+        }
+        for (V3GraphVertex* vxp = m_procGraph.verticesBeginp(); vxp; vxp = vxp->verticesNextp()) {
+            DepVtx* const depVxp = static_cast<DepVtx*>(vxp);
+            // Mark nodes that will be emitted with a VlProcess argument
+            if (hasFlags(depVxp->nodep(), T_ALLOCS_PROC | T_FORCES_PROC)) {
+                addFlags(depVxp->nodep(), T_HAS_PROC);
+                propagateFlagsReversedIf(depVxp, T_HAS_PROC, [&](const V3GraphEdge* e) -> bool {
+                    return hasFlags(static_cast<DepVtx*>(e->fromp())->nodep(), T_NEEDS_PROC);
+                });
+            }
         }
         if (dumpGraphLevel() >= 6) m_procGraph.dumpDotFilePrefixed("proc_deps");
     }
@@ -586,7 +643,7 @@ private:
     void addProcessInfo(AstCMethodHard* const methodp) const {
         FileLine* const flp = methodp->fileline();
         AstCExpr* const ap = new AstCExpr{
-            flp, m_procp && (m_procp->user2() & T_HAS_PROC) ? "vlProcess" : "nullptr", 0};
+            flp, m_procp && (hasFlags(m_procp, T_HAS_PROC)) ? "vlProcess" : "nullptr", 0};
         ap->dtypeSetVoid();
         methodp->addPinsp(ap);
     }
@@ -697,8 +754,8 @@ private:
         VL_RESTORER(m_procp);
         m_procp = nodep;
         iterateChildren(nodep);
-        if (nodep->user2() & T_SUSPENDEE) nodep->setSuspendable();
-        if (nodep->user2() & T_HAS_PROC) nodep->setNeedProcess();
+        if (hasFlags(nodep, T_SUSPENDEE)) nodep->setSuspendable();
+        if (hasFlags(nodep, T_HAS_PROC)) nodep->setNeedProcess();
     }
     void visit(AstInitial* nodep) override {
         visit(static_cast<AstNodeProcedure*>(nodep));
@@ -719,11 +776,11 @@ private:
 
         // Workaround for killing `always` processes (doing that is pretty much UB)
         // TODO: Disallow killing `always` at runtime (throw an error)
-        if (nodep->user2() & T_HAS_PROC) nodep->user2(nodep->user2() | T_SUSPENDEE);
+        if (hasFlags(nodep, T_HAS_PROC)) addFlags(nodep, T_SUSPENDEE);
 
         iterateChildren(nodep);
-        if (nodep->user2() & T_HAS_PROC) nodep->setNeedProcess();
-        if (!(nodep->user2() & T_SUSPENDEE)) return;
+        if (hasFlags(nodep, T_HAS_PROC)) nodep->setNeedProcess();
+        if (!hasFlags(nodep, T_SUSPENDEE)) return;
         nodep->setSuspendable();
         FileLine* const flp = nodep->fileline();
         AstSenTree* const sensesp = m_activep->sensesp();
@@ -744,8 +801,8 @@ private:
         VL_RESTORER(m_procp);
         m_procp = nodep;
         iterateChildren(nodep);
-        if (nodep->user2() & T_HAS_PROC) nodep->setNeedProcess();
-        if (!(nodep->user2() & T_SUSPENDEE)) return;
+        if (hasFlags(nodep, T_HAS_PROC)) nodep->setNeedProcess();
+        if (!(hasFlags(nodep, T_SUSPENDEE))) return;
 
         nodep->rtnType("VlCoroutine");
         // If in a class, create a shared pointer to 'this'
@@ -768,7 +825,7 @@ private:
         }
     }
     void visit(AstNodeCCall* nodep) override {
-        if ((nodep->funcp()->user2() & T_SUSPENDEE) && !nodep->user1SetOnce()) {  // If suspendable
+        if (hasFlags(nodep->funcp(), T_SUSPENDEE) && !nodep->user1SetOnce()) {  // If suspendable
             VNRelinker relinker;
             nodep->unlinkFrBack(&relinker);
             AstCAwait* const awaitp = new AstCAwait{nodep->fileline(), nodep};
@@ -1048,6 +1105,7 @@ private:
     void visit(AstBegin* nodep) override {
         VL_RESTORER(m_procp);
         m_procp = nodep;
+        if (hasFlags(nodep, T_HAS_PROC)) nodep->setNeedProcess();
         iterateChildren(nodep);
     }
     void visit(AstFork* nodep) override {
@@ -1061,6 +1119,7 @@ private:
         while (stmtp) {
             if (!VN_IS(stmtp, Begin)) {
                 auto* const beginp = new AstBegin{stmtp->fileline(), "", nullptr};
+                if (hasFlags(stmtp, T_HAS_PROC)) addFlags(beginp, T_HAS_PROC);
                 stmtp->replaceWith(beginp);
                 beginp->addStmtsp(stmtp);
                 stmtp = beginp;
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index cc6f2551d..ed55d1b36 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -696,8 +696,14 @@ private:
         }
     }
     void visit(AstDisableFork* nodep) override {
-        nodep->v3warn(E_UNSUPPORTED, "Unsupported: disable fork statements");
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        if (nodep->fileline()->timingOn()) {
+            if (v3Global.opt.timing().isSetFalse()) {
+                nodep->v3warn(E_NOTIMING, "Support for disable fork statement requires --timing");
+            } else if (!v3Global.opt.timing().isSetTrue()) {
+                nodep->v3warn(E_NEEDTIMINGOPT, "Use --timing or --no-timing to specify how "
+                                                   << "disable fork should be handled");
+            }
+        }
     }
     void visit(AstWaitFork* nodep) override {
         nodep->v3warn(E_UNSUPPORTED, "Unsupported: wait fork statements");
diff --git a/test_regress/t/t_disable.out b/test_regress/t/t_disable.out
new file mode 100644
index 000000000..d59e8bc0f
--- /dev/null
+++ b/test_regress/t/t_disable.out
@@ -0,0 +1,5 @@
+%Error-UNSUPPORTED: t/t_disable.v:11:10: Unsupported: disabling fork by name
+   11 |          disable foo;
+      |          ^~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_disable.pl b/test_regress/t/t_disable.pl
new file mode 100755
index 000000000..e68534982
--- /dev/null
+++ b/test_regress/t/t_disable.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+lint(
+    verilator_flags2 => ['--lint-only --timing'],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_disable.v b/test_regress/t/t_disable.v
new file mode 100644
index 000000000..78cdb2f21
--- /dev/null
+++ b/test_regress/t/t_disable.v
@@ -0,0 +1,19 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/);
+
+   initial begin
+      fork : foo
+         disable foo;
+         #1 $stop;
+      join_none
+      #2;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule
diff --git a/test_regress/t/t_disable_fork1.pl b/test_regress/t/t_disable_fork1.pl
new file mode 100755
index 000000000..b8493bd06
--- /dev/null
+++ b/test_regress/t/t_disable_fork1.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_disable_fork1.v b/test_regress/t/t_disable_fork1.v
new file mode 100644
index 000000000..e1f5cc711
--- /dev/null
+++ b/test_regress/t/t_disable_fork1.v
@@ -0,0 +1,49 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define N 3
+
+class Cls;
+   task runforks(integer n);
+      for (integer i = 0; i < n; i++) fork
+         #1 $stop;
+      join_none
+   endtask
+endclass
+
+module t;
+   Cls cls = new;
+
+   initial begin
+      // run forks
+      for (integer i = 0; i < `N; i++) fork
+         #1 $stop;
+      join_none
+
+      // run forks inside a method
+      cls.runforks(`N);
+
+      // run forks in forks
+      for (integer i = 0; i < `N; i++) fork
+         for (integer j = 0; j < `N; j++) fork
+            #1 $stop;
+         join_none
+      join_none
+
+      for (integer i = 0; i < `N; i++) fork
+         cls.runforks(`N);
+      join_none
+
+      // kill them all
+      disable fork;
+
+      // check if we can still fork
+      fork
+         #2 $write("*-* All Finished *-*\n");
+         #3 $finish;
+      join_none
+   end
+endmodule
diff --git a/test_regress/t/t_disable_fork2.pl b/test_regress/t/t_disable_fork2.pl
new file mode 100755
index 000000000..b8493bd06
--- /dev/null
+++ b/test_regress/t/t_disable_fork2.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_disable_fork2.v b/test_regress/t/t_disable_fork2.v
new file mode 100644
index 000000000..118e3e7f5
--- /dev/null
+++ b/test_regress/t/t_disable_fork2.v
@@ -0,0 +1,58 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+// USING THIS FOR DEBUGGING PROCESS PROPAGATION:
+//
+// The example contains most cases that were problematic during the
+// works on support of 'disable fork' statement, including:
+//
+// - indirect use of disable fork (through a task),
+// - indirect use of forks that are to be disabled,
+// - forks in forks,
+// - a function taking VlProcess argument shared between a process that
+//   allocates VlProcess, and one that doesnt,
+// - a function that has a delay and obtains VlProcess argument,
+// - a function that has a delay and doesn't obtain it.
+//
+// Blocks below contain info on whether they should (YES) or shouldn't (NO)
+// be emitted as functions with a VlProcess argument.
+//
+// To check if that corresponds to reality, see blue nodes in proc_deps.dot
+
+class Cls;
+   task print; /*NO*/
+      $write("*-* All ");
+   endtask
+   task disable_fork_func; /*YES*/
+      disable fork;
+   endtask
+   task common_func; /*YES*/
+      fork /*YES*/ #1; join_none
+   endtask
+   task fork_func; /*YES*/
+      fork /*YES*/ #1 $stop; join_none
+   endtask
+   task delay_func; /*NO*/
+      fork /*NO*/ #1 $write("Finished *-*\n"); join_none
+   endtask
+endclass
+
+module t;
+   Cls cls = new;
+
+   initial begin /*YES*/
+      fork /*YES*/ cls.common_func(); join_none
+      cls.fork_func();
+      cls.disable_fork_func();
+      cls.print();
+   end
+
+   initial begin /*NO*/
+      cls.delay_func();
+      cls.common_func();
+      fork /*YES*/ disable fork; join_none
+   end
+endmodule
diff --git a/test_regress/t/t_disable_fork3.pl b/test_regress/t/t_disable_fork3.pl
new file mode 100755
index 000000000..b8493bd06
--- /dev/null
+++ b/test_regress/t/t_disable_fork3.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_disable_fork3.v b/test_regress/t/t_disable_fork3.v
new file mode 100644
index 000000000..4fc5f1759
--- /dev/null
+++ b/test_regress/t/t_disable_fork3.v
@@ -0,0 +1,18 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   initial begin
+      fork begin
+         fork begin
+            #3 $stop;
+         end join_none
+         #1;
+      end join_none
+      #2 disable fork;
+   end
+   initial #4 $write("*-* All Finished *-*\n");
+endmodule
diff --git a/test_regress/t/t_disable_fork_notiming.out b/test_regress/t/t_disable_fork_notiming.out
new file mode 100644
index 000000000..63f71caef
--- /dev/null
+++ b/test_regress/t/t_disable_fork_notiming.out
@@ -0,0 +1,6 @@
+%Error-NOTIMING: t/t_disable_fork_notiming.v:8:12: Support for disable fork statement requires --timing
+                                                 : ... note: In instance 't'
+    8 |    initial disable fork;
+      |            ^~~~~~~
+                 ... For error description see https://verilator.org/warn/NOTIMING?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_disable_fork_notiming.pl b/test_regress/t/t_disable_fork_notiming.pl
new file mode 100755
index 000000000..1a013a057
--- /dev/null
+++ b/test_regress/t/t_disable_fork_notiming.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    expect_filename => $Self->{golden_filename},
+    v_flags2 => ["--no-timing"],
+    fails => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_disable_fork_notiming.v b/test_regress/t/t_disable_fork_notiming.v
new file mode 100644
index 000000000..21ac2743e
--- /dev/null
+++ b/test_regress/t/t_disable_fork_notiming.v
@@ -0,0 +1,9 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   initial disable fork;
+endmodule
diff --git a/test_regress/t/t_fork_disable.out b/test_regress/t/t_fork_disable.out
deleted file mode 100644
index 4a245ec4d..000000000
--- a/test_regress/t/t_fork_disable.out
+++ /dev/null
@@ -1,10 +0,0 @@
-%Error-UNSUPPORTED: t/t_fork_disable.v:16:7: Unsupported: disable fork statements
-                                           : ... note: In instance 't'
-   16 |       disable fork;
-      |       ^~~~~~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error-UNSUPPORTED: t/t_fork_disable.v:17:7: Unsupported: wait fork statements
-                                           : ... note: In instance 't'
-   17 |       wait fork;
-      |       ^~~~
-%Error: Exiting due to
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index f3f21fa0d..30f708ef3 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -11190,9 +11190,7 @@ task uvm_phase::execute_phase();
                end
              end
            join_any
-//TODO issue #4125 - Support disable fork
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:11187:12: Unsupported: disable fork statements
-//TODO           disable fork;
+           disable fork;
           end
         join
     end
@@ -15172,9 +15170,7 @@ class uvm_heartbeat extends uvm_object;
       end
       @(m_stop_event);
     join_any
-//TODO issue #4125 - Support disable fork
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:15167:12: Unsupported: disable fork statements
-//TODO    disable fork;
+    disable fork;
   endtask
 endclass
 class uvm_heartbeat_callback extends uvm_objection_callback;
@@ -19218,9 +19214,7 @@ task uvm_sequencer_base::m_wait_for_available_sequence();
           join_any
         end
       join_any
-//TODO issue #4125 - Support disable fork
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:19213:12: Unsupported: disable fork statements
-//TODO      disable fork;
+      disable fork;
     end
   join
 endtask
diff --git a/test_regress/t/t_wait_fork.out b/test_regress/t/t_wait_fork.out
new file mode 100644
index 000000000..b9cf141c8
--- /dev/null
+++ b/test_regress/t/t_wait_fork.out
@@ -0,0 +1,6 @@
+%Error-UNSUPPORTED: t/t_wait_fork.v:17:7: Unsupported: wait fork statements
+                                        : ... note: In instance 't'
+   17 |       wait fork;
+      |       ^~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_fork_disable.pl b/test_regress/t/t_wait_fork.pl
similarity index 100%
rename from test_regress/t/t_fork_disable.pl
rename to test_regress/t/t_wait_fork.pl
diff --git a/test_regress/t/t_fork_disable.v b/test_regress/t/t_wait_fork.v
similarity index 100%
rename from test_regress/t/t_fork_disable.v
rename to test_regress/t/t_wait_fork.v

From bc9ff6d1bf192f8af0ce44879469cbb8174ab097 Mon Sep 17 00:00:00 2001
From: Krzysztof Bieganski <kbieganski@antmicro.com>
Date: Mon, 16 Oct 2023 17:05:39 +0200
Subject: [PATCH 077/157] Fix interface comparison (#4570)

---
 src/V3Width.cpp                        | 3 ++-
 test_regress/t/t_interface_virtual.out | 4 ++++
 test_regress/t/t_interface_virtual.v   | 5 +++++
 3 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index ed55d1b36..20d5d4954 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -6681,7 +6681,8 @@ private:
                 // child node's width to end up correct for the assignment (etc)
                 widthCheckSized(nodep, side, VN_AS(underp, NodeExpr), expDTypep, extendRule,
                                 warnOn);
-            } else if (!VN_IS(expDTypep->skipRefp(), IfaceRefDType)
+            } else if (!VN_IS(nodep, Eq) && !VN_IS(nodep, Neq)
+                       && !VN_IS(expDTypep->skipRefp(), IfaceRefDType)
                        && VN_IS(underp->dtypep()->skipRefp(), IfaceRefDType)) {
                 underp->v3error(ucfirst(nodep->prettyOperatorName())
                                 << " expected non-interface on " << side << " but "
diff --git a/test_regress/t/t_interface_virtual.out b/test_regress/t/t_interface_virtual.out
index 2e63964b4..315bffb65 100644
--- a/test_regress/t/t_interface_virtual.out
+++ b/test_regress/t/t_interface_virtual.out
@@ -1,3 +1,7 @@
+va==vb? 1
+va!=vb? 0
+va==vb? 0
+va!=vb? 1
 va.addr=aa va.data=11 ia.addr=aa ia.data=11
 vb.addr=bb vb.data=22 ib.addr=bb ib.data=22
 ca.fa.addr=a0 ca.fa.data=11 ca.fa.addr=b0 ca.fb.data=22
diff --git a/test_regress/t/t_interface_virtual.v b/test_regress/t/t_interface_virtual.v
index 0e05cf47e..2b36e1a30 100644
--- a/test_regress/t/t_interface_virtual.v
+++ b/test_regress/t/t_interface_virtual.v
@@ -33,7 +33,12 @@ module t (/*AUTOARG*/);
 
    initial begin
       va = ia;
+      vb = ia;
+      $display("va==vb? %b", va==vb);
+      $display("va!=vb? %b", va!=vb);
       vb = ib;
+      $display("va==vb? %b", va==vb);
+      $display("va!=vb? %b", va!=vb);
 
       ca = new;
       cb = new;

From 99ea16d7fde77d6f27e19d73f2fa68245dcaa7ef Mon Sep 17 00:00:00 2001
From: Krzysztof Bieganski <kbieganski@antmicro.com>
Date: Mon, 16 Oct 2023 17:06:41 +0200
Subject: [PATCH 078/157] Fix dynamic triggers for named events (#4571)

---
 include/verilated_timing.cpp       |  3 ++-
 include/verilated_timing.h         |  4 ++++
 src/V3AstNodes.cpp                 |  1 +
 src/V3Timing.cpp                   |  7 +++++++
 test_regress/t/t_timing_debug2.out | 11 +----------
 5 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/include/verilated_timing.cpp b/include/verilated_timing.cpp
index 30b3fbf7f..c14eaf2c7 100644
--- a/include/verilated_timing.cpp
+++ b/include/verilated_timing.cpp
@@ -153,11 +153,12 @@ void VlTriggerScheduler::dump(const char* eventDescription) const {
 // VlDynamicTriggerScheduler:: Methods
 
 bool VlDynamicTriggerScheduler::evaluate() {
+    m_anyTriggered = false;
     VL_DEBUG_IF(dump(););
     std::swap(m_suspended, m_evaluated);
     for (auto& coro : m_evaluated) coro.resume();
     m_evaluated.clear();
-    return !m_triggered.empty();
+    return m_anyTriggered;
 }
 
 void VlDynamicTriggerScheduler::doPostUpdates() {
diff --git a/include/verilated_timing.h b/include/verilated_timing.h
index 54b505e2a..48646de69 100644
--- a/include/verilated_timing.h
+++ b/include/verilated_timing.h
@@ -275,6 +275,7 @@ public:
 //         co_await __VdynSched.evaluation();
 //         <pre updates>;
 //         __Vtrigger = <trigger eval>;
+//         __VdynShed.anyTriggered(__Vtrigger);
 //         [optionally] co_await __VdynSched.postUpdate();
 //         <post updates>;
 //     }
@@ -288,6 +289,7 @@ class VlDynamicTriggerScheduler final {
     using VlCoroutineVec = std::vector<VlCoroutineHandle>;
 
     // MEMBERS
+    bool m_anyTriggered = false;  // If true, at least one trigger was set
     VlCoroutineVec m_suspended;  // Suspended coroutines awaiting trigger evaluation
     VlCoroutineVec m_evaluated;  // Coroutines currently being evaluated (for evaluate())
     VlCoroutineVec m_triggered;  // Coroutines whose triggers were set, and are awaiting resumption
@@ -313,6 +315,8 @@ class VlDynamicTriggerScheduler final {
 public:
     // Evaluates all dynamic triggers (resumed coroutines that co_await evaluation())
     bool evaluate();
+    // Called by coroutines that evaluate triggers to notify the scheduler if any triggers were set
+    void anyTriggered(bool triggered) { m_anyTriggered = m_anyTriggered || triggered; }
     // Runs post updates for all dynamic triggers (resumes coroutines that co_await postUpdate())
     void doPostUpdates();
     // Resumes all coroutines whose triggers are set (those that co_await resumption())
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 4720c4b01..c48ef68ec 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -2424,6 +2424,7 @@ int AstCMethodHard::instrCount() const {
 void AstCMethodHard::setPurity() {
     static const std::map<std::string, bool> isPureMethod{{"andNot", false},
                                                           {"any", true},
+                                                          {"anyTriggered", false},
                                                           {"assign", false},
                                                           {"at", true},
                                                           {"atBack", true},
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index d2d6bae96..132d3d6bf 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -931,6 +931,13 @@ private:
             }
             // Then the trigger check and assignment
             loopp->addStmtsp(assignp);
+            // Let the dynamic trigger scheduler know if this trigger was set
+            // If it was, a call to the scheduler's evaluate() will return true
+            AstCMethodHard* const anyTriggeredMethodp = new AstCMethodHard{
+                flp, new AstVarRef{flp, getCreateDynamicTriggerScheduler(), VAccess::WRITE},
+                "anyTriggered", new AstVarRef{flp, trigvscp, VAccess::READ}};
+            anyTriggeredMethodp->dtypeSetVoid();
+            loopp->addStmtsp(anyTriggeredMethodp->makeStmt());
             // If the post update is destructive (e.g. event vars are cleared), create an await for
             // the post update step
             if (destructivePostUpdate(sensesp)) {
diff --git a/test_regress/t/t_timing_debug2.out b/test_regress/t/t_timing_debug2.out
index 6698864f4..0e22dcd4e 100644
--- a/test_regress/t/t_timing_debug2.out
+++ b/test_regress/t/t_timing_debug2.out
@@ -649,6 +649,7 @@
 -V{t#,#}         Process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37 awaiting the post update step
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([event] t.ec.e)
+-V{t#,#}         'act' region trigger index 2 is active: @([true] __VdynSched.evaluate())
 -V{t#,#}         Doing post updates for processes:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:37
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
@@ -657,16 +658,6 @@
 -V{t#,#}+    Vt_timing_debug2___024root___timing_resume
 -V{t#,#}         No ready processes waiting for @([event] t.ec.e)
 -V{t#,#}         Resuming processes waiting for @([event] t.ec.e)
--V{t#,#}+    Vt_timing_debug2___024root___eval_act
--V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
--V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
--V{t#,#}           - Process waiting at t/t_timing_class.v:101
--V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:101
--V{t#,#}         Suspending process waiting for @(posedge t::ClkClass.clk) at t/t_timing_class.v:101
--V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
--V{t#,#}         'act' region trigger index 2 is active: @([true] __VdynSched.evaluate())
--V{t#,#}+    Vt_timing_debug2___024root___timing_commit
--V{t#,#}+    Vt_timing_debug2___024root___timing_resume
 -V{t#,#}         Resuming processes:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:37
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37

From e99fd2892b5590219afd4818a7941b1486c18e51 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 17 Oct 2023 09:26:53 +0200
Subject: [PATCH 079/157] Make VNDeleter a member of VNVisitor. No function
 change. (#4573)

---
 src/V3Ast.h     | 14 ++++++++++----
 src/V3Const.cpp | 16 +++++++++-------
 src/V3Order.cpp | 11 ++++++-----
 src/V3Param.cpp |  5 +++--
 4 files changed, 28 insertions(+), 18 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 8e97c4e34..8c6282876 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1502,7 +1502,7 @@ public:
 // nodes needs to be deferred to a later time, because pointers to the
 // removed nodes might still exist.
 
-class VNDeleter VL_NOT_FINAL {
+class VNDeleter final {
     // MEMBERS
     std::vector<AstNode*> m_deleteps;  // Nodes to delete
 
@@ -1515,11 +1515,11 @@ public:
         m_deleteps.push_back(nodep);
     }
 
-    // Delete all previously pushed nodes (by callint deleteTree)
+    // Delete all previously pushed nodes (by calling deleteTree)
     void doDeletes();
 
     // Do the deletions on destruction
-    virtual ~VNDeleter() { doDeletes(); }
+    ~VNDeleter() { doDeletes(); }
 };
 
 //######################################################################
@@ -1528,7 +1528,7 @@ public:
 // This only has the constant fuctions for non-modifying visitors.
 // For more typical usage see VNVisitor
 
-class VNVisitorConst VL_NOT_FINAL : public VNDeleter {
+class VNVisitorConst VL_NOT_FINAL {
     friend class AstNode;
 
 public:
@@ -1546,6 +1546,7 @@ public:
     inline void iterateAndNextConstNullBackwards(AstNode* nodep);
 
     virtual void visit(AstNode* nodep) = 0;
+    virtual ~VNVisitorConst() {}
 #include "V3Ast__gen_visitor_decls.h"  // From ./astgen
 };
 
@@ -1554,6 +1555,7 @@ public:
 // type without changing the base classes.  See "Modern C++ Design".
 
 class VNVisitor VL_NOT_FINAL : public VNVisitorConst {
+    VNDeleter m_deleter;  // Used to delay deletion of nodes
 public:
     /// Call visit()s on nodep
     inline void iterate(AstNode* nodep);
@@ -1565,6 +1567,10 @@ public:
     inline void iterateAndNextNull(AstNode* nodep);
     /// Return edited nodep; see comments in V3Ast.cpp
     inline AstNode* iterateSubtreeReturnEdits(AstNode* nodep);
+
+    VNDeleter& deleter() { return m_deleter; }
+    void pushDeletep(AstNode* nodep) { deleter().pushDeletep(nodep); }
+    void doDeletes() { deleter().doDeletes(); }
 };
 
 //######################################################################
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 1435d3ab0..c2b3e1b1b 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -673,7 +673,7 @@ public:
     // Reduction ops are transformed in the same way.
     // &{v[0], v[1]} => 2'b11 == (2'b11 & v)
     static AstNodeExpr* simplify(AstNodeExpr* nodep, int resultWidth, unsigned externalOps,
-                                 VDouble0& reduction) {
+                                 VDouble0& reduction, VNDeleter& deleterr) {
         UASSERT_OBJ(1 <= resultWidth && resultWidth <= 64, nodep, "resultWidth out of range");
 
         // Walk tree, gathering all terms referenced in expression
@@ -716,7 +716,7 @@ public:
                 }
                 // Set width and widthMin precisely
                 resultp->dtypeChgWidth(resultWidth, 1);
-                for (AstNode* const termp : termps) termp->deleteTree();
+                for (AstNode* const termp : termps) deleterr.pushDeletep(termp);
                 return resultp;
             }
             const ResultTerm result = v->getResultTerm();
@@ -792,7 +792,7 @@ public:
 
         // Only substitute the result if beneficial as determined by operation count
         if (visitor.m_ops <= resultOps) {
-            for (AstNode* const termp : termps) termp->deleteTree();
+            for (AstNode* const termp : termps) deleterr.pushDeletep(termp);
             return nullptr;
         }
 
@@ -1012,7 +1012,7 @@ private:
         return (lp && rp && lp->width() == rp->width() && lp->type() == rp->type()
                 && (operandsSame(lp->lhsp(), rp->lhsp()) || operandsSame(lp->rhsp(), rp->rhsp())));
     }
-    static bool matchOrAndNot(AstNodeBiop* nodep) {
+    bool matchOrAndNot(AstNodeBiop* nodep) {
         // AstOr{$a, AstAnd{AstNot{$b}, $c}} if $a.width1, $a==$b => AstOr{$a,$c}
         // Someday we'll sort the biops completely and this can be simplified
         // This often results from our simplified clock generation:
@@ -1043,7 +1043,7 @@ private:
         if (!operandsSame(ap, bp)) return false;
         // Do it
         cp->unlinkFrBack();
-        VL_DO_DANGLING(andp->unlinkFrBack()->deleteTree(), andp);
+        VL_DO_DANGLING(pushDeletep(andp->unlinkFrBack()), andp);
         VL_DANGLING(notp);
         // Replace whichever branch is now dangling
         if (nodep->rhsp()) {
@@ -1175,9 +1175,11 @@ private:
         const AstAnd* const andp = VN_CAST(nodep, And);
         const int width = nodep->width();
         if (andp && isConst(andp->lhsp(), 1)) {  // 1 & BitOpTree
-            newp = ConstBitOpTreeVisitor::simplify(andp->rhsp(), width, 1, m_statBitOpReduction);
+            newp = ConstBitOpTreeVisitor::simplify(andp->rhsp(), width, 1, m_statBitOpReduction,
+                                                   deleter());
         } else {  // BitOpTree
-            newp = ConstBitOpTreeVisitor::simplify(nodep, width, 0, m_statBitOpReduction);
+            newp = ConstBitOpTreeVisitor::simplify(nodep, width, 0, m_statBitOpReduction,
+                                                   deleter());
         }
 
         if (newp) {
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index f0047b81e..c3ba10a93 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -801,7 +801,7 @@ struct MTaskVxIdLessThan final {
 //######################################################################
 // OrderProcess class
 
-class OrderProcess final : VNDeleter {
+class OrderProcess final {
     // NODE STATE
     //  AstNode::user4  -> Used by V3Const::constifyExpensiveEdit
 
@@ -829,6 +829,7 @@ class OrderProcess final : VNDeleter {
     friend class OrderMoveDomScope;
     V3List<OrderMoveDomScope*> m_pomReadyDomScope;  // List of ready domain/scope pairs, by loopId
     std::map<std::pair<AstNodeModule*, std::string>, unsigned> m_funcNums;  // Function ordinals
+    VNDeleter m_deleter;  // Used to delay deletion of nodes
 
     // METHODS
 
@@ -900,10 +901,10 @@ class OrderProcess final : VNDeleter {
         , m_deleteDomainp{makeDeleteDomainSenTree(netlistp->fileline())}
         , m_tag{tag}
         , m_slow{slow} {
-        pushDeletep(m_deleteDomainp);
+        m_deleter.pushDeletep(m_deleteDomainp);
     }
 
-    ~OrderProcess() override = default;
+    ~OrderProcess() = default;
 
 public:
     // Order the logic
@@ -1223,7 +1224,7 @@ AstActive* OrderProcess::processMoveOneLogic(const OrderLogicVertex* lvertexp,
         needProcess = procp->needProcess();
         if (suspendable) slow = slow && !VN_IS(procp, Always);
         nodep = procp->stmtsp();
-        pushDeletep(procp);
+        m_deleter.pushDeletep(procp);
     }
 
     // Put suspendable processes into individual functions on their own
@@ -1270,7 +1271,7 @@ AstActive* OrderProcess::processMoveOneLogic(const OrderLogicVertex* lvertexp,
         if (nodep->backp()) nodep->unlinkFrBack();
 
         if (domainp == m_deleteDomainp) {
-            VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            VL_DO_DANGLING(m_deleter.pushDeletep(nodep), nodep);
         } else {
             newFuncpr->addStmtsp(nodep);
             // Add in the number of nodes we're adding
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 8bc5358a6..2479c7f0d 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -223,7 +223,7 @@ public:
 //######################################################################
 // Remove parameters from cells and build new modules
 
-class ParamProcessor final : public VNDeleter {
+class ParamProcessor final {
     // NODE STATE - Local
     //   AstVar::user4()        // int    Global parameter number (for naming new module)
     //                          //        (0=not processed, 1=iterated, but no number,
@@ -277,6 +277,7 @@ class ParamProcessor final : public VNDeleter {
     using DefaultValueMap = std::map<std::string, AstConst*>;
     // Default parameter values of hierarchical blocks
     std::map<AstNodeModule*, DefaultValueMap> m_defaultParameterValues;
+    VNDeleter m_deleter;  // Used to delay deletion of nodes
 
     // METHODS
 
@@ -868,7 +869,7 @@ class ParamProcessor final : public VNDeleter {
                 AstClass* classCopyp = VN_AS(srcModpr, Class)->cloneTree(false);
                 // It is a temporary copy of the original class node, stored in order to create
                 // another instances. It is needed only during class instantiation.
-                pushDeletep(classCopyp);
+                m_deleter.pushDeletep(classCopyp);
                 srcModpr->user4p(classCopyp);
                 storeOriginalParams(classCopyp);
             }

From 45edcbb03ed9e0820d1b483a6c6199b98f81ae48 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 17 Oct 2023 13:38:45 +0200
Subject: [PATCH 080/157] Fix logical expressions with class objects - caching
 in v3Const (#4552)

---
 src/V3AstNodeOther.h                    |  4 +++
 src/V3Const.cpp                         | 48 +++++++++++++++++++++++--
 src/V3Task.cpp                          |  1 +
 test_regress/t/t_class_short_circuit.pl | 21 +++++++++++
 test_regress/t/t_class_short_circuit.v  | 33 +++++++++++++++++
 test_regress/t/t_const_opt.pl           |  2 +-
 6 files changed, 105 insertions(+), 4 deletions(-)
 create mode 100755 test_regress/t/t_class_short_circuit.pl
 create mode 100644 test_regress/t/t_class_short_circuit.v

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 2fea7ff71..568a0f5b8 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -609,6 +609,7 @@ private:
     bool m_dpiImportWrapper : 1;  // Wrapper for invoking DPI import prototype from generated code
     bool m_dpiTraceInit : 1;  // DPI trace_init
     bool m_needProcess : 1;  // Needs access to VlProcess of the caller
+    bool m_recursive : 1;  // Recursive or part of recursion
 public:
     AstCFunc(FileLine* fl, const string& name, AstScope* scopep, const string& rtnType = "")
         : ASTGEN_SUPER_CFunc(fl) {
@@ -637,6 +638,7 @@ public:
         m_dpiImportPrototype = false;
         m_dpiImportWrapper = false;
         m_dpiTraceInit = false;
+        m_recursive = false;
     }
     ASTGEN_MEMBERS_AstCFunc;
     string name() const override VL_MT_STABLE { return m_name; }
@@ -716,6 +718,8 @@ public:
     void dpiTraceInit(bool flag) { m_dpiTraceInit = flag; }
     bool dpiTraceInit() const { return m_dpiTraceInit; }
     bool isCoroutine() const { return m_rtnType == "VlCoroutine"; }
+    void recursive(bool flag) { m_recursive = flag; }
+    bool recursive() const { return m_recursive; }
     // Special methods
     bool emptyBody() const {
         return argsp() == nullptr && initsp() == nullptr && stmtsp() == nullptr
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index c2b3e1b1b..d42bb07b0 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -900,6 +900,7 @@ private:
     bool m_doNConst = false;  // Enable non-constant-child simplifications
     bool m_doV = false;  // Verilog, not C++ conversion
     bool m_doGenerate = false;  // Postpone width checking inside generate
+    bool m_convertLogicToBit = false;  // Convert logical operators to bitwise
     bool m_hasJumpDelay = false;  // JumpGo or Delay under this while
     bool m_underRecFunc = false;  // Under a recursive function
     AstNodeModule* m_modp = nullptr;  // Current module
@@ -910,6 +911,7 @@ private:
     const bool m_globalPass;  // ConstVisitor invoked as a global pass
     static uint32_t s_globalPassNum;  // Counts number of times ConstVisitor invoked as global pass
     V3UniqueNames m_concswapNames;  // For generating unique temporary variable names
+    std::map<const AstNode*, bool> m_containsMemberAccess;  // Caches results of matchBiopToBitwise
 
     // METHODS
 
@@ -2322,6 +2324,46 @@ private:
         iterate(nodep);  // Again?
     }
 
+    bool containsMemberAccessRecurse(const AstNode* const nodep) {
+        if (!nodep) return false;
+        const auto it = m_containsMemberAccess.lower_bound(nodep);
+        if (it != m_containsMemberAccess.end() && it->first == nodep) return it->second;
+        bool result = false;
+        if (VN_IS(nodep, MemberSel) || VN_IS(nodep, MethodCall) || VN_IS(nodep, CMethodCall)) {
+            result = true;
+        } else if (const AstNodeFTaskRef* const funcRefp = VN_CAST(nodep, NodeFTaskRef)) {
+            if (containsMemberAccessRecurse(funcRefp->taskp())) result = true;
+        } else if (const AstNodeCCall* const funcRefp = VN_CAST(nodep, NodeCCall)) {
+            if (containsMemberAccessRecurse(funcRefp->funcp())) result = true;
+        } else if (const AstNodeFTask* const funcp = VN_CAST(nodep, NodeFTask)) {
+            // Assume that it has a member access
+            if (funcp->recursive()) result = true;
+        } else if (const AstCFunc* const funcp = VN_CAST(nodep, CFunc)) {
+            if (funcp->recursive()) result = true;
+        }
+        if (!result) {
+            result = containsMemberAccessRecurse(nodep->op1p())
+                     || containsMemberAccessRecurse(nodep->op2p())
+                     || containsMemberAccessRecurse(nodep->op3p())
+                     || containsMemberAccessRecurse(nodep->op4p());
+        }
+        if (!result && !VN_IS(nodep, NodeFTask)
+            && !VN_IS(nodep, CFunc)  // don't enter into next function
+            && containsMemberAccessRecurse(nodep->nextp())) {
+            result = true;
+        }
+        m_containsMemberAccess.insert(it, std::make_pair(nodep, result));
+        return result;
+    }
+
+    bool matchBiopToBitwise(AstNodeBiop* const nodep) {
+        if (!m_convertLogicToBit) return false;
+        if (!nodep->lhsp()->width1()) return false;
+        if (!nodep->rhsp()->width1()) return false;
+        if (!nodep->isPure()) return false;
+        if (containsMemberAccessRecurse(nodep)) return false;
+        return true;
+    }
     bool matchConcatRand(AstConcat* nodep) {
         //    CONCAT(RAND, RAND) - created by Chisel code
         AstRand* const aRandp = VN_CAST(nodep->lhsp(), Rand);
@@ -3598,8 +3640,8 @@ private:
     TREEOPV("AstOneHot{$lhsp.width1}",          "replaceWLhs(nodep)");
     TREEOPV("AstOneHot0{$lhsp.width1}",         "replaceNum(nodep,1)");
     // Binary AND/OR is faster than logical and/or (usually)
-    TREEOPV("AstLogAnd{$lhsp.width1, $rhsp.width1, nodep->isPure()}", "AstAnd{$lhsp,$rhsp}");
-    TREEOPV("AstLogOr {$lhsp.width1, $rhsp.width1, nodep->isPure()}", "AstOr{$lhsp,$rhsp}");
+    TREEOPV("AstLogAnd{matchBiopToBitwise(nodep)}", "AstAnd{$lhsp,$rhsp}");
+    TREEOPV("AstLogOr {matchBiopToBitwise(nodep)}", "AstOr{$lhsp,$rhsp}");
     TREEOPV("AstLogNot{$lhsp.width1}",  "AstNot{$lhsp}");
     // CONCAT(CONCAT({a},{b}),{c}) -> CONCAT({a},CONCAT({b},{c}))
     // CONCAT({const},CONCAT({const},{c})) -> CONCAT((constifiedCONC{const|const},{c}))
@@ -3718,7 +3760,7 @@ public:
         case PROC_GENERATE:       m_doV = true;  m_doNConst = true; m_params = true;
                                   m_required = true; m_doGenerate = true; break;
         case PROC_LIVE:           break;
-        case PROC_V_WARN:         m_doV = true;  m_doNConst = true; m_warn = true; break;
+        case PROC_V_WARN:         m_doV = true;  m_doNConst = true; m_warn = true; m_convertLogicToBit = true; break;
         case PROC_V_NOWARN:       m_doV = true;  m_doNConst = true; break;
         case PROC_V_EXPENSIVE:    m_doV = true;  m_doNConst = true; m_doExpensive = true; break;
         case PROC_CPP:            m_doV = false; m_doNConst = true; m_doCpp = true; break;
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 5e1ce27a0..993ee99a5 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -1226,6 +1226,7 @@ private:
         cfuncp->dpiExportImpl(nodep->dpiExport());
         cfuncp->dpiImportWrapper(nodep->dpiImport());
         cfuncp->dpiTraceInit(nodep->dpiTraceInit());
+        cfuncp->recursive(nodep->recursive());
         if (nodep->dpiImport() || nodep->dpiExport()) {
             cfuncp->isStatic(true);
             cfuncp->isLoose(true);
diff --git a/test_regress/t/t_class_short_circuit.pl b/test_regress/t/t_class_short_circuit.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_class_short_circuit.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_short_circuit.v b/test_regress/t/t_class_short_circuit.v
new file mode 100644
index 000000000..dd7477267
--- /dev/null
+++ b/test_regress/t/t_class_short_circuit.v
@@ -0,0 +1,33 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class Cls;
+   int x;
+   function new;
+      x = 10;
+   endfunction
+   function bit set_x(int a);
+      x = a;
+      return 1;
+   endfunction
+   function int get_x;
+      return x;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   initial begin
+      Cls cls;
+      if (cls != null && cls.x == 10) $stop;
+      if (cls != null && cls.get_x() == 10) $stop;
+      cls = new;
+      if (!cls.set_x(1) || cls.x != 1) $stop;
+      if (!cls.set_x(2) || cls.get_x() != 2) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_const_opt.pl b/test_regress/t/t_const_opt.pl
index 9d9becae5..c46c13c54 100755
--- a/test_regress/t/t_const_opt.pl
+++ b/test_regress/t/t_const_opt.pl
@@ -20,7 +20,7 @@ execute(
     );
 
 if ($Self->{vlt}) {
-    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 36);
+    file_grep($Self->{stats}, qr/Optimizations, Const bit op reduction\s+(\d+)/i, 37);
 }
 ok(1);
 1;

From 3bb9c7ee92168417aeba130a64b1dac330bd19db Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 17 Oct 2023 17:15:24 +0200
Subject: [PATCH 081/157] Fix dictionaries with keys of class types (#4576)

---
 include/verilated_types.h      |  4 ++++
 test_regress/t/t_class_dict.pl | 21 +++++++++++++++++++++
 test_regress/t/t_class_dict.v  | 30 ++++++++++++++++++++++++++++++
 3 files changed, 55 insertions(+)
 create mode 100755 test_regress/t/t_class_dict.pl
 create mode 100644 test_regress/t/t_class_dict.v

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 876a78511..b296689d9 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -1629,6 +1629,10 @@ public:
     bool operator!=(const VlClassRef<T_OtherClass>& rhs) const {
         return m_objp != rhs.m_objp;
     };
+    template <typename T_OtherClass>
+    bool operator<(const VlClassRef<T_OtherClass>& rhs) const {
+        return m_objp < rhs.m_objp;
+    };
 };
 
 template <typename T, typename U>
diff --git a/test_regress/t/t_class_dict.pl b/test_regress/t/t_class_dict.pl
new file mode 100755
index 000000000..aabcde63e
--- /dev/null
+++ b/test_regress/t/t_class_dict.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_dict.v b/test_regress/t/t_class_dict.v
new file mode 100644
index 000000000..5002474c8
--- /dev/null
+++ b/test_regress/t/t_class_dict.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class Cls;
+   int x;
+   function new(int a);
+      x = a;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   initial begin
+      int dict[Cls];
+      Cls c1 = new(1);
+      Cls c2 = new(2);
+      dict[c1] = 1;
+      dict[c2] = 2;
+      `checkh(dict[c1], 1);
+      `checkh(dict[c2], 2);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 431bb1ed165b0e3ec7731b17af4df84f83c79739 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 17 Oct 2023 22:49:28 -0400
Subject: [PATCH 082/157] Support compiling Verilator with gcc/clang
 precompiled headers (#4579)

---
 Changes                    |   1 +
 configure.ac               |  15 +++++
 src/Makefile_obj.in        | 126 +++++++++++++++++++++++--------------
 src/V3Active.cpp           |   7 +--
 src/V3ActiveTop.cpp        |   7 +--
 src/V3Assert.cpp           |   8 +--
 src/V3AssertPre.cpp        |   7 +--
 src/V3Ast.cpp              |   7 +--
 src/V3AstNodes.cpp         |   2 +
 src/V3Begin.cpp            |  10 +--
 src/V3Branch.cpp           |  10 +--
 src/V3Broken.cpp           |   6 +-
 src/V3CCtors.cpp           |   7 +--
 src/V3CUse.cpp             |  12 +---
 src/V3Case.cpp             |   9 +--
 src/V3Cast.cpp             |  10 +--
 src/V3Class.cpp            |   7 +--
 src/V3Clean.cpp            |  10 +--
 src/V3Clock.cpp            |   9 +--
 src/V3Combine.cpp          |   7 +--
 src/V3Common.cpp           |   7 +--
 src/V3Config.cpp           |   6 +-
 src/V3Coverage.cpp         |   9 +--
 src/V3CoverageJoin.cpp     |   6 +-
 src/V3Dead.cpp             |   9 +--
 src/V3Delayed.cpp          |   9 +--
 src/V3Depth.cpp            |   9 +--
 src/V3DepthBlock.cpp       |   9 +--
 src/V3Descope.cpp          |   9 +--
 src/V3Dfg.cpp              |   5 +-
 src/V3DfgAstToDfg.cpp      |   8 +--
 src/V3DfgDecomposition.cpp |   5 +-
 src/V3DfgDfgToAst.cpp      |   6 +-
 src/V3DfgOptimizer.cpp     |   8 +--
 src/V3DfgPasses.cpp        |   6 +-
 src/V3DfgPeephole.cpp      |   6 +-
 src/V3DupFinder.cpp        |   9 +--
 src/V3EmitCBase.cpp        |   3 +-
 src/V3EmitCConstPool.cpp   |   5 +-
 src/V3EmitCFunc.cpp        |   5 +-
 src/V3EmitCHeaders.cpp     |   5 +-
 src/V3EmitCImp.cpp         |   6 +-
 src/V3EmitCInlines.cpp     |   4 +-
 src/V3EmitCMain.cpp        |   6 +-
 src/V3EmitCMake.cpp        |   6 +-
 src/V3EmitCModel.cpp       |   6 +-
 src/V3EmitCSyms.cpp        |   6 +-
 src/V3EmitMk.cpp           |   6 +-
 src/V3EmitV.cpp            |   6 +-
 src/V3EmitXml.cpp          |   7 +--
 src/V3Expand.cpp           |   9 +--
 src/V3File.cpp             |   5 +-
 src/V3Force.cpp            |   7 +--
 src/V3Fork.cpp             |  10 +--
 src/V3Gate.cpp             |   8 +--
 src/V3Global.cpp           |   6 +-
 src/V3Hasher.cpp           |   3 +-
 src/V3HierBlock.cpp        |   4 +-
 src/V3Inline.cpp           |   9 +--
 src/V3Inst.cpp             |   9 +--
 src/V3InstrCount.cpp       |   7 +--
 src/V3Interface.cpp        |   8 +--
 src/V3Life.cpp             |   8 +--
 src/V3LifePost.cpp         |   7 +--
 src/V3LinkCells.cpp        |   9 +--
 src/V3LinkDot.cpp          |   9 +--
 src/V3LinkInc.cpp          |   8 +--
 src/V3LinkJump.cpp         |   8 +--
 src/V3LinkLValue.cpp       |  10 +--
 src/V3LinkLevel.cpp        |  10 +--
 src/V3LinkParse.cpp        |   9 +--
 src/V3LinkResolve.cpp      |  10 +--
 src/V3Localize.cpp         |   7 +--
 src/V3MergeCond.cpp        |   7 +--
 src/V3Name.cpp             |   7 +--
 src/V3Number.cpp           |   6 +-
 src/V3Options.cpp          |   4 +-
 src/V3Order.cpp            |   9 +--
 src/V3Param.cpp            |   8 +--
 src/V3Partition.cpp        |   6 +-
 src/V3PchAstMT.h           |  42 +++++++++++++
 src/V3PchAstNoMT.h         |  46 ++++++++++++++
 src/V3Premit.cpp           |   9 +--
 src/V3ProtectLib.cpp       |   6 +-
 src/V3Randomize.cpp        |   6 +-
 src/V3Reloop.cpp           |   9 +--
 src/V3Sched.cpp            |   6 +-
 src/V3SchedAcyclic.cpp     |   8 +--
 src/V3SchedPartition.cpp   |   8 +--
 src/V3SchedReplicate.cpp   |   7 +--
 src/V3SchedTiming.cpp      |   6 +-
 src/V3Scope.cpp            |  10 +--
 src/V3Scoreboard.cpp       |   5 +-
 src/V3Slice.cpp            |   8 +--
 src/V3Split.cpp            |   9 +--
 src/V3SplitAs.cpp          |   9 +--
 src/V3SplitVar.cpp         |   9 +--
 src/V3Stats.cpp            |   6 +-
 src/V3StatsReport.cpp      |   5 +-
 src/V3Subst.cpp            |   7 +--
 src/V3TSP.cpp              |   8 +--
 src/V3Table.cpp            |   7 +--
 src/V3Task.cpp             |   8 +--
 src/V3ThreadPool.h         |   2 +-
 src/V3Timing.cpp           |   7 +--
 src/V3Trace.cpp            |   7 +--
 src/V3TraceDecl.cpp        |   7 +--
 src/V3Tristate.cpp         |  10 +--
 src/V3Undriven.cpp         |   9 +--
 src/V3Unknown.cpp          |   9 +--
 src/V3Unroll.cpp           |   9 +--
 src/V3VariableOrder.cpp    |   8 +--
 src/V3Width.cpp            |   8 +--
 src/V3WidthCommit.cpp      |   2 +-
 src/V3WidthSel.cpp         |   7 +--
 115 files changed, 294 insertions(+), 736 deletions(-)
 create mode 100644 src/V3PchAstMT.h
 create mode 100644 src/V3PchAstNoMT.h

diff --git a/Changes b/Changes
index cc313c39f..54ec9600e 100644
--- a/Changes
+++ b/Changes
@@ -19,6 +19,7 @@ Verilator 5.017 devel
 * Support randc (#4349).
 * Support resizing function call inout arguments (#4467).
 * Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
+* Support compilation with precompiled headers with Make and GCC or CLang.
 * Change lint_off to not propagate upwards to files including where the lint_off is.
 * Optimize empty expression statements (#4544).
 * Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
diff --git a/configure.ac b/configure.ac
index c508bcfb9..f0c79da98 100644
--- a/configure.ac
+++ b/configure.ac
@@ -560,6 +560,21 @@ Verilator requires a C++11 or newer compiler.]])
 fi
 AC_SUBST(CFG_CXXFLAGS_STD)
 
+# Compiler precompiled header options (assumes either gcc or clang++)
+AC_MSG_CHECKING([for $CXX precompile header include option])
+if $CXX --help | grep include-pch >/dev/null 2>/dev/null ; then
+   # clang
+   CFG_CXXFLAGS_PCH_I=-include-pch
+   CFG_GCH_IF_CLANG=.gch
+else
+   # GCC
+   CFG_CXXFLAGS_PCH_I=-include
+   CFG_GCH_IF_CLANG=
+fi
+AC_MSG_RESULT($CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_CXXFLAGS_PCH_I)
+AC_SUBST(CFG_GCH_IF_CLANG)
+
 # Checks for library functions.
 AC_CHECK_MEMBER([struct stat.st_mtim.tv_nsec],
     [AC_DEFINE([HAVE_STAT_NSEC],[1],[Defined if struct stat has st_mtim.tv_nsec])],
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 36ae799bb..4efc14c87 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -67,6 +67,11 @@ CFG_CXXFLAGS_PARSER = @CFG_CXXFLAGS_PARSER@
 CFG_CXXFLAGS_WEXTRA = @CFG_CXXFLAGS_WEXTRA@
 CFG_LDFLAGS_SRC = @CFG_LDFLAGS_SRC@
 CFG_LIBS = @CFG_LIBS@
+CFG_CXXFLAGS_PCH = -x c++-header
+# Compiler option to put in front of filename to read precompiled header
+CFG_CXXFLAGS_PCH_I = @CFG_CXXFLAGS_PCH_I@
+# Compiler's filename prefix for precompiled headers, .gch if clang, empty if GCC
+CFG_GCH_IF_CLANG = @CFG_GCH_IF_CLANG@
 
 #### End of system configuration section. ####
 
@@ -129,6 +134,11 @@ BISONPRE = $(srcdir)/bisonpre
 FLEXFIX = $(srcdir)/flexfix
 VLCOVGEN = $(srcdir)/vlcovgen
 
+######################################################################
+# CCACHE flags (via environment as no command line option available)
+CCACHE_SLOPPINESS ?= pch_defines,time_macros
+export CCACHE_SLOPPINESS
+
 ######################################################################
 #### Top level
 
@@ -151,16 +161,54 @@ maintainer-copy::
 #### Top executable
 
 RAW_OBJS = \
+	V3Const__gen.o \
+	V3Error.o \
+	V3FileLine.o \
+	V3Graph.o \
+	V3GraphAcyc.o \
+	V3GraphAlg.o \
+	V3GraphPathChecker.o \
+	V3GraphTest.o \
+	V3Hash.o \
+	V3OptionParser.o \
+	V3Os.o \
+	V3ParseGrammar.o \
+	V3ParseImp.o \
+	V3ParseLex.o \
+	V3PreProc.o \
+	V3PreShell.o \
+	V3String.o \
+	V3ThreadPool.o \
+	V3Waiver.o \
 	Verilator.o \
+
+RAW_OBJS_PCH_ASTMT = \
+	V3Ast.o \
+	V3AstNodes.o \
+	V3Broken.o \
+	V3Config.o \
+	V3EmitCBase.o \
+	V3EmitCConstPool.o \
+	V3EmitCFunc.o \
+	V3EmitCHeaders.o \
+	V3EmitCImp.o \
+	V3EmitCInlines.o \
+	V3EmitV.o \
+	V3File.o \
+	V3Global.o \
+	V3Hasher.o \
+	V3Number.o \
+	V3Options.o \
+	V3Stats.o \
+	V3StatsReport.o \
+
+RAW_OBJS_PCH_ASTNOMT = \
 	V3Active.o \
 	V3ActiveTop.o \
 	V3Assert.o \
 	V3AssertPre.o \
-	V3Ast.o \
-	V3AstNodes.o \
 	V3Begin.o \
 	V3Branch.o \
-	V3Broken.o \
 	V3CCtors.o \
 	V3CUse.o \
 	V3Case.o \
@@ -170,8 +218,6 @@ RAW_OBJS = \
 	V3Clock.o \
 	V3Combine.o \
 	V3Common.o \
-	V3Config.o \
-	V3Const__gen.o \
 	V3Coverage.o \
 	V3CoverageJoin.o \
 	V3Dead.o \
@@ -187,34 +233,16 @@ RAW_OBJS = \
 	V3DfgPasses.o \
 	V3DfgPeephole.o \
 	V3DupFinder.o \
-	V3EmitCBase.o \
-	V3EmitCConstPool.o \
-	V3EmitCFunc.o \
-	V3EmitCHeaders.o \
-	V3EmitCImp.o \
-	V3EmitCInlines.o \
 	V3EmitCMain.o \
 	V3EmitCMake.o \
 	V3EmitCModel.o \
 	V3EmitCSyms.o \
 	V3EmitMk.o \
-	V3EmitV.o \
 	V3EmitXml.o \
-	V3Error.o \
 	V3Expand.o \
-	V3File.o \
-	V3FileLine.o \
 	V3Force.o \
 	V3Fork.o \
 	V3Gate.o \
-	V3Global.o \
-	V3Graph.o \
-	V3GraphAcyc.o \
-	V3GraphAlg.o \
-	V3GraphPathChecker.o \
-	V3GraphTest.o \
-	V3Hash.o \
-	V3Hasher.o \
 	V3HierBlock.o \
 	V3Inline.o \
 	V3Inst.o \
@@ -233,18 +261,9 @@ RAW_OBJS = \
 	V3Localize.o \
 	V3MergeCond.o \
 	V3Name.o \
-	V3Number.o \
-	V3OptionParser.o \
-	V3Options.o \
 	V3Order.o \
-	V3Os.o \
 	V3Param.o \
-	V3ParseGrammar.o \
-	V3ParseImp.o \
-	V3ParseLex.o \
 	V3Partition.o \
-	V3PreProc.o \
-	V3PreShell.o \
 	V3Premit.o \
 	V3ProtectLib.o \
 	V3Randomize.o \
@@ -260,14 +279,10 @@ RAW_OBJS = \
 	V3Split.o \
 	V3SplitAs.o \
 	V3SplitVar.o \
-	V3Stats.o \
-	V3StatsReport.o \
-	V3String.o \
 	V3Subst.o \
 	V3TSP.o \
 	V3Table.o \
 	V3Task.o \
-	V3ThreadPool.o \
 	V3Timing.o \
 	V3Trace.o \
 	V3TraceDecl.o \
@@ -276,7 +291,6 @@ RAW_OBJS = \
 	V3Unknown.o \
 	V3Unroll.o \
 	V3VariableOrder.o \
-	V3Waiver.o \
 	V3Width.o \
 	V3WidthCommit.o \
 	V3WidthSel.o \
@@ -286,21 +300,21 @@ VLCOV_OBJS = \
 	VlcMain.o \
 
 NON_STANDALONE_HEADERS = \
-	V3AstInlines.h  \
-	V3AstNodeDType.h  \
-	V3AstNodeExpr.h  \
-	V3AstNodeOther.h  \
-	V3DfgVertices.h  \
+	V3AstInlines.h \
+	V3AstNodeDType.h \
+	V3AstNodeExpr.h \
+	V3AstNodeOther.h \
+	V3DfgVertices.h \
 	V3ThreadPool.h \
 	V3WidthRemove.h \
 
 AST_DEFS := \
-  V3AstNodeDType.h \
-  V3AstNodeExpr.h \
-  V3AstNodeOther.h \
+	V3AstNodeDType.h \
+	V3AstNodeExpr.h \
+	V3AstNodeOther.h \
 
 DFG_DEFS := \
-  V3DfgVertices.h
+	V3DfgVertices.h
 
 #### astgen common flags
 
@@ -312,7 +326,7 @@ ASTGENFLAGS += $(foreach f,$(DFG_DEFS),--dfgdef $f)
 
 ifeq ($(VL_VLCOV),)
 PREDEP_H = V3Ast__gen_forward_class_decls.h
-OBJS += $(RAW_OBJS)
+OBJS += $(RAW_OBJS) $(RAW_OBJS_PCH_ASTMT) $(RAW_OBJS_PCH_ASTNOMT)
 else
 PREDEP_H =
 OBJS += $(VLCOV_OBJS)
@@ -332,6 +346,8 @@ V3Number_test: V3Number_test.o
 
 .SECONDARY:
 
+%.gch: %
+	$(OBJCACHE) ${CXX} ${CXXFLAGS} ${CPPFLAGSWALL} ${CFG_CXXFLAGS_PCH} $< -o $@
 %.o: %.cpp
 	$(OBJCACHE) ${CXX} ${CXXFLAGS} ${CPPFLAGSWALL} -c $< -o $@
 %.o: %.c
@@ -349,6 +365,22 @@ V3ParseImp.o: V3ParseImp.cpp V3ParseBison.c
 V3PreProc.o: V3PreProc.cpp V3PreLex.yy.cpp
 	$(OBJCACHE) ${CXX} ${CXXFLAGS} ${CPPFLAGSPARSER} -c $< -o $@
 
+define CXX_ASTMT_template
+$(1): $(basename $(1)).cpp V3PchAstMT.h.gch
+	$(OBJCACHE) ${CXX} ${CXXFLAGS} ${CPPFLAGSWALL} ${CFG_CXXFLAGS_PCH_I} V3PchAstMT.h${CFG_GCH_IF_CLANG} -c $(srcdir)/$(basename $(1)).cpp -o $(1)
+
+endef
+
+$(foreach obj,$(RAW_OBJS_PCH_ASTMT),$(eval $(call CXX_ASTMT_template,$(obj))))
+
+define CXX_ASTNOMT_template
+$(1): $(basename $(1)).cpp V3PchAstNoMT.h.gch
+	$(OBJCACHE) ${CXX} ${CXXFLAGS} ${CPPFLAGSWALL} ${CFG_CXXFLAGS_PCH_I} V3PchAstNoMT.h${CFG_GCH_IF_CLANG} -c $(srcdir)/$(basename $(1)).cpp -o $(1)
+
+endef
+
+$(foreach obj,$(RAW_OBJS_PCH_ASTNOMT),$(eval $(call CXX_ASTNOMT_template,$(obj))))
+
 #### Generated files
 
 # Target rule called before parallel build to make generated files
diff --git a/src/V3Active.cpp b/src/V3Active.cpp
index 857c34045..4930b9293 100644
--- a/src/V3Active.cpp
+++ b/src/V3Active.cpp
@@ -26,16 +26,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Active.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 
 #include <unordered_map>
diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp
index 4dc193116..4239525b9 100644
--- a/src/V3ActiveTop.cpp
+++ b/src/V3ActiveTop.cpp
@@ -23,16 +23,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3ActiveTop.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3SenTree.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index b13fae8c0..3f8278e5b 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -14,16 +14,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Assert.h"
 
-#include "V3Ast.h"
-#include "V3Error.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index bf416c276..d0689361f 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -19,16 +19,11 @@
 //      Transform clocking blocks into imperative logic
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3AssertPre.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Task.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 2c4353ffb..f7441655c 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -14,16 +14,11 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
+#include "V3PchAstMT.h"
 
 #include "V3Broken.h"
 #include "V3EmitV.h"
 #include "V3File.h"
-#include "V3Global.h"
-#include "V3String.h"
 
 #include <iomanip>
 #include <memory>
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index c48ef68ec..1c2519ad6 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "config_build.h"
 #include "verilatedos.h"
 
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index 1ff68713b..b4fa16a24 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -26,18 +26,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Begin.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp
index f24307808..e297f59a9 100644
--- a/src/V3Branch.cpp
+++ b/src/V3Branch.cpp
@@ -23,18 +23,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Branch.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <map>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp
index 54e761246..9ae17efb9 100644
--- a/src/V3Broken.cpp
+++ b/src/V3Broken.cpp
@@ -22,14 +22,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Broken.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 1727126ed..1f8abb5c3 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -24,17 +24,12 @@
 //      This transformation honors outputSplitCFuncs.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3CCtors.h"
 
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 
-#include <algorithm>
 #include <list>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 05215f5bc..748909c2e 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -22,20 +22,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3CUse.h"
 
-#include "V3Ast.h"
-#include "V3FileLine.h"
-#include "V3Global.h"
-
-#include <map>
-#include <utility>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 53cc524ce..89458cda8 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -34,19 +34,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Case.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 #define CASE_OVERLAP_WIDTH 16  // Maximum width we can check for overlaps in
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 4fb3b868e..0290c944e 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -37,18 +37,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Cast.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index e71de0dab..ef0eddf9b 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -20,15 +20,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Class.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3UniqueNames.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index 9023fadd7..00ddad214 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -23,18 +23,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Clean.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index 6a66f45e5..98596e135 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -27,19 +27,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Clock.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Sched.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp
index f6fcd3260..2b858de6c 100644
--- a/src/V3Combine.cpp
+++ b/src/V3Combine.cpp
@@ -19,17 +19,12 @@
 //      Also drop empty CFuncs
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Combine.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 #include <list>
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index d6e08d083..6288ccea9 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -20,16 +20,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Common.h"
 
-#include "V3Ast.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index a221f92e8..566021160 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -14,17 +14,13 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Config.h"
 
-#include "V3Global.h"
 #include "V3String.h"
 
-#include <map>
 #include <set>
-#include <string>
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 85c9af732..4d04e00cc 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -24,17 +24,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Coverage.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <map>
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp
index 58176cd69..76f0e7bdf 100644
--- a/src/V3CoverageJoin.cpp
+++ b/src/V3CoverageJoin.cpp
@@ -17,15 +17,11 @@
 //      If two COVERTOGGLEs have same VARSCOPE, combine them
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3CoverageJoin.h"
 
 #include "V3DupFinder.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index 428538e1c..768887b5f 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -33,17 +33,10 @@
 // here after scoping to allow more dead node removal.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Dead.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <map>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index eba736d48..3a829d22d 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -48,20 +48,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Delayed.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <algorithm>
 #include <deque>
-#include <map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index 7f1012f50..a459a26c7 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -23,19 +23,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Depth.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index b0e65d136..378f83d0c 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -20,18 +20,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3DepthBlock.h"
 
-#include "V3Ast.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
-
-#include <algorithm>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp
index 8b68ca011..c603204f0 100644
--- a/src/V3Descope.cpp
+++ b/src/V3Descope.cpp
@@ -22,18 +22,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Descope.h"
 
-#include "V3Ast.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
-
-#include <map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index 4e70c94ac..9cda7d02a 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -14,10 +14,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Dfg.h"
 
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index c4aa2d1be..3b23986ff 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -26,16 +26,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
-#include "V3Error.h"
-#include "V3Global.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3DfgDecomposition.cpp b/src/V3DfgDecomposition.cpp
index 31bb001ce..200d12610 100644
--- a/src/V3DfgDecomposition.cpp
+++ b/src/V3DfgDecomposition.cpp
@@ -18,10 +18,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Dfg.h"
 #include "V3File.h"
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index 43728cef9..a5d0a14a9 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -26,16 +26,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index 0a514723b..ea49de41e 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -18,19 +18,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3DfgOptimizer.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
-#include "V3Error.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 44026320e..f65b77897 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -14,9 +14,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3DfgPasses.h"
 
@@ -24,8 +22,6 @@
 #include "V3Global.h"
 #include "V3String.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 V3DfgCseContext::~V3DfgCseContext() {
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index c3d969a8e..f162c9ec9 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -21,18 +21,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3DfgPeephole.h"
 
-#include "V3Ast.h"
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
 #include "V3Stats.h"
 
-#include <algorithm>
 #include <cctype>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index f1e3ab956..58a889931 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -14,20 +14,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3DupFinder.h"
 
-#include "V3Ast.h"
 #include "V3File.h"
-#include "V3Global.h"
 
-#include <algorithm>
 #include <iomanip>
-#include <map>
 #include <memory>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp
index 5a173f38b..c382554c4 100644
--- a/src/V3EmitCBase.cpp
+++ b/src/V3EmitCBase.cpp
@@ -14,8 +14,7 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3EmitCBase.h"
 
diff --git a/src/V3EmitCConstPool.cpp b/src/V3EmitCConstPool.cpp
index 27503551c..656bffcd8 100644
--- a/src/V3EmitCConstPool.cpp
+++ b/src/V3EmitCConstPool.cpp
@@ -14,15 +14,12 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
 #include "V3File.h"
-#include "V3Global.h"
 #include "V3Stats.h"
-#include "V3String.h"
 
 #include <algorithm>
 #include <cinttypes>
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index deb4ceb61..461d6496e 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -14,13 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3EmitCFunc.h"
 
-#include "V3Global.h"
-#include "V3String.h"
 #include "V3TSP.h"
 
 #include <map>
diff --git a/src/V3EmitCHeaders.cpp b/src/V3EmitCHeaders.cpp
index 4f63aa5b0..8d9f71c8d 100644
--- a/src/V3EmitCHeaders.cpp
+++ b/src/V3EmitCHeaders.cpp
@@ -14,13 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
-#include "V3Ast.h"
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
-#include "V3Global.h"
 
 #include <algorithm>
 #include <cstdint>
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index f84e9442c..e640634c9 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
-#include "V3Ast.h"
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
-#include "V3Global.h"
-#include "V3String.h"
 #include "V3ThreadPool.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp
index e2603371e..6425a367c 100644
--- a/src/V3EmitCInlines.cpp
+++ b/src/V3EmitCInlines.cpp
@@ -14,12 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 #include <map>
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 873519d5d..4a9f9c496 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -14,16 +14,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitCMain.h"
 
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 
 #include <map>
 
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index bd065144d..ca548d68b 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -14,15 +14,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitCMake.h"
 
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
 
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 25a7368c0..53c5339fb 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
-#include "V3Global.h"
 #include "V3UniqueNames.h"
 
 #include <algorithm>
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 4a041d784..4642ac016 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3LanguageWords.h"
 #include "V3PartitionGraph.h"
 
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index bdf088c6a..e55ff26f5 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -14,15 +14,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitMk.h"
 
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
 
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 2f0e40351..38bca92ba 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -14,16 +14,12 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3EmitV.h"
 
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 
-#include <algorithm>
-#include <map>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 9065a24b7..d2cb7d621 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -14,16 +14,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitXml.h"
 
 #include "V3EmitCBase.h"
-#include "V3Global.h"
-#include "V3String.h"
 
 #include <map>
 #include <vector>
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 2bfe49c5a..af67ad82e 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -25,20 +25,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Expand.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3File.cpp b/src/V3File.cpp
index 7a669f30d..97a26d572 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -14,13 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3File.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Os.h"
 #include "V3String.h"
 
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index 51437482b..93a3d4a08 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -37,16 +37,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Force.h"
 
 #include "V3AstUserAllocator.h"
-#include "V3Error.h"
-#include "V3Global.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index bce03b9fa..098104d11 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -38,21 +38,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Fork.h"
 
-#include "V3Ast.h"
 #include "V3AstNodeExpr.h"
-#include "V3Error.h"
-#include "V3Global.h"
 #include "V3MemberMap.h"
 
-#include <algorithm>
-#include <map>
 #include <set>
 #include <vector>
 
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index a1594e185..0f0bb61cc 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -21,22 +21,16 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Gate.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3Const.h"
 #include "V3DupFinder.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Stats.h"
 
-#include <algorithm>
 #include <list>
 #include <unordered_map>
 #include <unordered_set>
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index 82dd6e584..f4ebc182a 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -14,12 +14,8 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
-#include "V3Global.h"
-
-#include "V3Ast.h"
 #include "V3File.h"
 #include "V3HierBlock.h"
 #include "V3LinkCells.h"
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index 0e13e18d5..e58dce546 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -14,8 +14,7 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Hasher.h"
 
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index 331c8cbc9..f1624493b 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -72,12 +72,10 @@
 //       Used for b) and c).
 //       This options is repeated for all instantiating hierarchical blocks.
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3HierBlock.h"
 
-#include "V3Ast.h"
-#include "V3Error.h"
 #include "V3File.h"
 #include "V3Os.h"
 #include "V3Stats.h"
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index 4735bc079..dbc3e7bb9 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -24,21 +24,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Inline.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
-#include "V3Global.h"
 #include "V3Inst.h"
 #include "V3Stats.h"
-#include "V3String.h"
 
-#include <algorithm>
 #include <unordered_set>
 #include <vector>
 
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index dd3e7e283..fa5b2da3c 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -21,18 +21,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Inst.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
-
-#include <algorithm>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 7e363ba17..95bbdaa06 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -15,15 +15,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3InstrCount.h"
 
-#include "V3Ast.h"
-
 #include <iomanip>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
index a0b641885..de504d25c 100644
--- a/src/V3Interface.cpp
+++ b/src/V3Interface.cpp
@@ -23,16 +23,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Interface.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 5fd69a27f..84ee05d60 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -23,19 +23,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Life.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <map>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index 35728e5de..6692a3ebf 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -24,15 +24,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LifePost.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3GraphPathChecker.h"
 #include "V3PartitionGraph.h"
 #include "V3Stats.h"
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 4d18030eb..14bcfee31 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -23,21 +23,14 @@
 //              Link to module that instantiates it
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkCells.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Parse.h"
 #include "V3SymTable.h"
 
-#include <algorithm>
-#include <map>
 #include <unordered_set>
 #include <vector>
 
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 3b129d741..473545166 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -61,22 +61,15 @@
 //      b          (VSymEnt->AstCell)
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkDot.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3MemberMap.h"
 #include "V3String.h"
 #include "V3SymTable.h"
 
-#include <algorithm>
-#include <map>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 4e2381ff7..d4a00861c 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -36,16 +36,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkInc.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 #include <algorithm>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index d0aa33e64..e777ac164 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -29,18 +29,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkJump.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
-#include "V3Global.h"
 
-#include <algorithm>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index 9431731a3..11a1e4499 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -18,18 +18,10 @@
 //          Set lvalue() attributes on appropriate VARREFs.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkLValue.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <map>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index dbb0631da..9c0500239 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -19,18 +19,10 @@
 //          Create new MODULE TOP with connections to below signals
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkLevel.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <algorithm>
-#include <map>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 5b863df9c..b3371c2a3 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -18,19 +18,12 @@
 //          Move some attributes around
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkParse.h"
 
-#include "V3Ast.h"
 #include "V3Config.h"
-#include "V3Global.h"
 
-#include <algorithm>
-#include <map>
 #include <set>
 #include <vector>
 
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index e3767407c..b0636a298 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -24,21 +24,13 @@
 //          SenItems: Convert pos/negedge of non-simple signals to temporaries
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3LinkResolve.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3String.h"
 #include "V3Task.h"
 
-#include <algorithm>
-#include <map>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index 16500e84d..d26a86175 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -22,16 +22,11 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Localize.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index 5598a5cdf..b9e08ea22 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -72,17 +72,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3MergeCond.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
-#include "V3Global.h"
 #include "V3Hasher.h"
 #include "V3Stats.h"
 
diff --git a/src/V3Name.cpp b/src/V3Name.cpp
index 56896ef58..9825a3bac 100644
--- a/src/V3Name.cpp
+++ b/src/V3Name.cpp
@@ -19,15 +19,10 @@
 //              Prepend __PVT__ to variable names
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Name.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3LanguageWords.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index b6d2a519c..acc6e6639 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Number.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 #include <algorithm>
 #include <cerrno>
 #include <cmath>
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 9b816f63d..554af3421 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -14,12 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Options.h"
 
-#include "V3Ast.h"
 #include "V3Error.h"
 #include "V3File.h"
 #include "V3Global.h"
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index c3ba10a93..b3af14abc 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -71,19 +71,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Order.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3Const.h"
 #include "V3EmitV.h"
 #include "V3File.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3GraphStream.h"
 #include "V3List.h"
@@ -96,10 +91,8 @@
 #include "V3SplitVar.h"
 #include "V3Stats.h"
 
-#include <algorithm>
 #include <deque>
 #include <iomanip>
-#include <map>
 #include <memory>
 #include <sstream>
 #include <unordered_map>
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 2479c7f0d..4133df59f 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -44,17 +44,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Param.h"
 
-#include "V3Ast.h"
 #include "V3Case.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Hasher.h"
 #include "V3Os.h"
 #include "V3Parse.h"
@@ -63,7 +58,6 @@
 
 #include <cctype>
 #include <deque>
-#include <map>
 #include <memory>
 #include <vector>
 
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index d2e27a85b..16e7d612c 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -14,10 +14,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Partition.h"
 
@@ -34,7 +31,6 @@
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>
 #include <array>
 #include <list>
 #include <memory>
diff --git a/src/V3PchAstMT.h b/src/V3PchAstMT.h
new file mode 100644
index 000000000..50590fd6a
--- /dev/null
+++ b/src/V3PchAstMT.h
@@ -0,0 +1,42 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// Code available from: https://verilator.org
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+// DESCRIPTION: Verilator: Precompilable header of V3Ast, multithreaded
+//
+//*************************************************************************
+
+#ifndef VERILATOR_V3PCHASTMT_H_
+#define VERILATOR_V3PCHASTMT_H_
+
+#ifdef VL_PCH_INCLUDED
+#error "Including multiple V3Pch*.h flavors"
+#endif
+#define VL_PCH_INCLUDED
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include <algorithm>
+
+#include "V3Ast.h"
+#include "V3Broken.h"
+#include "V3Error.h"
+#include "V3FileLine.h"
+#include "V3FunctionTraits.h"
+#include "V3Global.h"
+#include "V3Mutex.h"
+#include "V3Number.h"
+#include "V3Options.h"
+#include "V3StdFuture.h"
+#include "V3String.h"
+#include "V3ThreadSafety.h"
+
+#endif  // Guard
diff --git a/src/V3PchAstNoMT.h b/src/V3PchAstNoMT.h
new file mode 100644
index 000000000..0ac7907a8
--- /dev/null
+++ b/src/V3PchAstNoMT.h
@@ -0,0 +1,46 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// Code available from: https://verilator.org
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+// DESCRIPTION: Verilator: Precompilable header of V3Ast, non-multithreaded
+//
+//*************************************************************************
+
+#ifndef VERILATOR_V3PCHASTNOMT_H_
+#define VERILATOR_V3PCHASTNOMT_H_
+
+#ifdef VL_PCH_INCLUDED
+#error "Including multiple V3Pch*.h flavors"
+#endif
+#define VL_PCH_INCLUDED
+
+#define VL_MT_DISABLED_CODE_UNIT 1
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include <algorithm>
+#include <map>
+#include <utility>
+
+#include "V3Ast.h"
+#include "V3Broken.h"
+#include "V3Error.h"
+#include "V3FileLine.h"
+#include "V3FunctionTraits.h"
+#include "V3Global.h"
+#include "V3Mutex.h"
+#include "V3Number.h"
+#include "V3Options.h"
+#include "V3StdFuture.h"
+#include "V3String.h"
+#include "V3ThreadSafety.h"
+
+#endif  // Guard
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 57a5c3826..c6ebaacee 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -24,20 +24,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Premit.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 constexpr int STATIC_CONST_MIN_WIDTH = 256;  // Minimum size to extract to static constant
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index 08a415395..0fa0c4c2a 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3ProtectLib.h"
 
-#include "V3Global.h"
 #include "V3Hasher.h"
 #include "V3String.h"
 #include "V3Task.h"
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index b544690d1..5c39b78d2 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -24,14 +24,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Randomize.h"
 
-#include "V3Ast.h"
 #include "V3MemberMap.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index b50f21b67..55f07fe35 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -29,19 +29,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Reloop.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index b3849955d..a7012d151 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -35,14 +35,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Sched.h"
 
-#include "V3Ast.h"
 #include "V3EmitCBase.h"
 #include "V3EmitV.h"
 #include "V3Order.h"
diff --git a/src/V3SchedAcyclic.cpp b/src/V3SchedAcyclic.cpp
index d6d9d73ce..f70022350 100644
--- a/src/V3SchedAcyclic.cpp
+++ b/src/V3SchedAcyclic.cpp
@@ -33,14 +33,8 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
-#include "V3Error.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Sched.h"
 #include "V3SenTree.h"
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index c7c3fb29b..a5cbfd3c9 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -34,15 +34,9 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
 #include "V3EmitV.h"
-#include "V3Error.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Sched.h"
 
diff --git a/src/V3SchedReplicate.cpp b/src/V3SchedReplicate.cpp
index 037fd3593..9ef1fcdb0 100644
--- a/src/V3SchedReplicate.cpp
+++ b/src/V3SchedReplicate.cpp
@@ -34,13 +34,8 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
-#include "V3Error.h"
 #include "V3Graph.h"
 #include "V3Sched.h"
 
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index e072814e7..56a89ed24 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -24,13 +24,9 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3EmitCBase.h"
-#include "V3Error.h"
 #include "V3Sched.h"
 
 #include <unordered_map>
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index c60a8c935..4f6efb93e 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -21,18 +21,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Scope.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
-#include <algorithm>
-#include <map>
 #include <unordered_map>
 #include <unordered_set>
 
diff --git a/src/V3Scoreboard.cpp b/src/V3Scoreboard.cpp
index 5d25cdf76..1a26dbc2f 100644
--- a/src/V3Scoreboard.cpp
+++ b/src/V3Scoreboard.cpp
@@ -14,10 +14,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Scoreboard.h"
 
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 3df645406..0076094e0 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -35,16 +35,10 @@
 // simplified to look primarily for SLICESELs.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Slice.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //*************************************************************************
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index aa0ac31f0..c543aec1d 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -77,20 +77,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Split.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-#include <map>
 #include <unordered_map>
 #include <unordered_set>
 #include <vector>
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index 80be47d77..26898c676 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -21,19 +21,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3SplitAs.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <map>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index e940918b8..8711f4bc6 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -110,20 +110,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3SplitVar.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>  // sort
-#include <map>
 #include <set>
 #include <vector>
 
diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index f79da45e4..3f89004df 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -14,14 +14,10 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
 #include "V3Stats.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
-
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3StatsReport.cpp b/src/V3StatsReport.cpp
index c725a40f5..a41f116d6 100644
--- a/src/V3StatsReport.cpp
+++ b/src/V3StatsReport.cpp
@@ -14,17 +14,14 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
-#include "V3Ast.h"
 #include "V3File.h"
 #include "V3Global.h"
 #include "V3Os.h"
 #include "V3Stats.h"
 
 #include <iomanip>
-#include <map>
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index b214a860f..7c2465dad 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -22,15 +22,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Subst.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
 #include <algorithm>
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index cdc296c45..583db4ab4 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -19,19 +19,13 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3TSP.h"
 
-#include "V3Error.h"
 #include "V3File.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 
-#include <algorithm>
 #include <cmath>
 #include <list>
 #include <memory>
diff --git a/src/V3Table.cpp b/src/V3Table.cpp
index ec9bb4167..cfdc10717 100644
--- a/src/V3Table.cpp
+++ b/src/V3Table.cpp
@@ -21,15 +21,10 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Table.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 993ee99a5..a410f06a6 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -23,21 +23,15 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Task.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3LinkLValue.h"
 
-#include <map>
 #include <tuple>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3ThreadPool.h b/src/V3ThreadPool.h
index f2564710e..ccfa2f88c 100644
--- a/src/V3ThreadPool.h
+++ b/src/V3ThreadPool.h
@@ -17,7 +17,7 @@
 #ifndef _V3THREADPOOL_H_
 #define _V3THREADPOOL_H_ 1
 
-#if defined(VL_MT_DISABLED_CODE_UNIT)
+#ifdef VL_MT_DISABLED_CODE_UNIT
 #error "Source file has been declared as MT_DISABLED, threads use is prohibited."
 #endif
 
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 132d3d6bf..65948a526 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -60,17 +60,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Timing.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
 #include "V3EmitV.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3MemberMap.h"
 #include "V3SenExprBuilder.h"
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index c698e1f99..653ba6548 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -35,21 +35,16 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Trace.h"
 
 #include "V3DupFinder.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Stats.h"
 
 #include <limits>
-#include <map>
 #include <set>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index d7c69efc7..284936660 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -20,10 +20,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3TraceDecl.h"
 
@@ -31,10 +28,8 @@
 
 #include "V3Config.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 
-#include <algorithm>
 #include <functional>
 #include <limits>
 #include <vector>
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index 00e92e6e9..a584d1748 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -115,22 +115,14 @@
 // unsupported.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Tristate.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Inst.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-#include <map>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index ece583f21..09d6e5043 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -23,19 +23,12 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Undriven.h"
 
-#include "V3Ast.h"
-#include "V3Global.h"
 #include "V3Stats.h"
-#include "V3String.h"
 
-#include <algorithm>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 4ad6c78b9..625055393 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -28,21 +28,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Unknown.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp
index 59a6efa7b..f2a7af31b 100644
--- a/src/V3Unroll.cpp
+++ b/src/V3Unroll.cpp
@@ -24,21 +24,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Unroll.h"
 
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
-#include <algorithm>
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3VariableOrder.cpp b/src/V3VariableOrder.cpp
index 707a8d391..2fbea7c75 100644
--- a/src/V3VariableOrder.cpp
+++ b/src/V3VariableOrder.cpp
@@ -20,20 +20,14 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3VariableOrder.h"
 
-#include "V3Ast.h"
 #include "V3AstUserAllocator.h"
 #include "V3EmitCBase.h"
-#include "V3Global.h"
 #include "V3TSP.h"
 
-#include <algorithm>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 20d5d4954..f5f9c85e8 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -63,15 +63,11 @@
 // iterateSubtreeReturnEdits.
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
-
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Width.h"
 
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3MemberMap.h"
 #include "V3Number.h"
 #include "V3Randomize.h"
@@ -79,8 +75,6 @@
 #include "V3Task.h"
 #include "V3WidthCommit.h"
 
-#include <algorithm>
-
 // More code; this file was getting too large; see actions there
 #define VERILATOR_V3WIDTH_CPP_
 #include "V3WidthRemove.h"
diff --git a/src/V3WidthCommit.cpp b/src/V3WidthCommit.cpp
index 295d3be8d..abfb20bab 100644
--- a/src/V3WidthCommit.cpp
+++ b/src/V3WidthCommit.cpp
@@ -20,7 +20,7 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "config_build.h"
 #include "verilatedos.h"
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index c15d64add..8c8aa4bb4 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -26,14 +26,9 @@
 //
 //*************************************************************************
 
-#define VL_MT_DISABLED_CODE_UNIT 1
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Ast.h"
 #include "V3Const.h"
-#include "V3Global.h"
 #include "V3Width.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;

From 770cd24f27c1bff41f3b6a9e47f563413c5062eb Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Wed, 18 Oct 2023 02:50:27 +0000
Subject: [PATCH 083/157] Apply 'make format'

---
 src/V3Active.cpp           | 3 +--
 src/V3ActiveTop.cpp        | 3 +--
 src/V3Assert.cpp           | 3 +--
 src/V3AssertPre.cpp        | 3 +--
 src/V3Ast.cpp              | 3 +--
 src/V3AstNodes.cpp         | 3 +--
 src/V3Begin.cpp            | 4 ++--
 src/V3Branch.cpp           | 4 ++--
 src/V3Broken.cpp           | 4 ++--
 src/V3CCtors.cpp           | 3 +--
 src/V3CUse.cpp             | 4 ++--
 src/V3Case.cpp             | 3 +--
 src/V3Cast.cpp             | 4 ++--
 src/V3Class.cpp            | 3 +--
 src/V3Clean.cpp            | 4 ++--
 src/V3Clock.cpp            | 3 +--
 src/V3Combine.cpp          | 3 +--
 src/V3Common.cpp           | 3 +--
 src/V3Config.cpp           | 3 +--
 src/V3Coverage.cpp         | 4 ++--
 src/V3CoverageJoin.cpp     | 3 +--
 src/V3Dead.cpp             | 4 ++--
 src/V3Delayed.cpp          | 3 +--
 src/V3Depth.cpp            | 3 +--
 src/V3DepthBlock.cpp       | 3 +--
 src/V3Descope.cpp          | 3 +--
 src/V3Dfg.cpp              | 3 +--
 src/V3DfgAstToDfg.cpp      | 3 +--
 src/V3DfgDecomposition.cpp | 3 +--
 src/V3DfgDfgToAst.cpp      | 3 +--
 src/V3DfgOptimizer.cpp     | 3 +--
 src/V3DfgPasses.cpp        | 3 +--
 src/V3DfgPeephole.cpp      | 3 +--
 src/V3DupFinder.cpp        | 3 +--
 src/V3EmitCBase.cpp        | 3 +--
 src/V3EmitCConstPool.cpp   | 3 +--
 src/V3EmitCFunc.cpp        | 3 +--
 src/V3EmitCHeaders.cpp     | 3 +--
 src/V3EmitCImp.cpp         | 3 +--
 src/V3EmitCInlines.cpp     | 3 +--
 src/V3EmitCMain.cpp        | 3 +--
 src/V3EmitCMake.cpp        | 3 +--
 src/V3EmitCModel.cpp       | 3 +--
 src/V3EmitCSyms.cpp        | 3 +--
 src/V3EmitMk.cpp           | 3 +--
 src/V3EmitV.cpp            | 3 +--
 src/V3EmitXml.cpp          | 3 +--
 src/V3Expand.cpp           | 3 +--
 src/V3File.cpp             | 3 +--
 src/V3Force.cpp            | 3 +--
 src/V3Fork.cpp             | 3 +--
 src/V3Gate.cpp             | 3 +--
 src/V3Global.cpp           | 3 +--
 src/V3Hasher.cpp           | 4 ++--
 src/V3HierBlock.cpp        | 3 +--
 src/V3Inline.cpp           | 3 +--
 src/V3Inst.cpp             | 3 +--
 src/V3InstrCount.cpp       | 4 ++--
 src/V3Interface.cpp        | 4 ++--
 src/V3Life.cpp             | 3 +--
 src/V3LifePost.cpp         | 3 +--
 src/V3LinkCells.cpp        | 3 +--
 src/V3LinkDot.cpp          | 3 +--
 src/V3LinkInc.cpp          | 4 ++--
 src/V3LinkJump.cpp         | 3 +--
 src/V3LinkLValue.cpp       | 4 ++--
 src/V3LinkLevel.cpp        | 4 ++--
 src/V3LinkParse.cpp        | 3 +--
 src/V3LinkResolve.cpp      | 3 +--
 src/V3Localize.cpp         | 3 +--
 src/V3MergeCond.cpp        | 3 +--
 src/V3Name.cpp             | 3 +--
 src/V3Number.cpp           | 4 ++--
 src/V3Options.cpp          | 3 +--
 src/V3Order.cpp            | 3 +--
 src/V3Param.cpp            | 3 +--
 src/V3Partition.cpp        | 3 +--
 src/V3PchAstMT.h           | 4 ++--
 src/V3PchAstNoMT.h         | 8 ++++----
 src/V3Premit.cpp           | 3 +--
 src/V3ProtectLib.cpp       | 3 +--
 src/V3Randomize.cpp        | 3 +--
 src/V3Reloop.cpp           | 3 +--
 src/V3Sched.cpp            | 3 +--
 src/V3SchedAcyclic.cpp     | 3 +--
 src/V3SchedPartition.cpp   | 3 +--
 src/V3SchedReplicate.cpp   | 3 +--
 src/V3SchedTiming.cpp      | 3 +--
 src/V3Scope.cpp            | 4 ++--
 src/V3Scoreboard.cpp       | 4 ++--
 src/V3Slice.cpp            | 4 ++--
 src/V3Split.cpp            | 3 +--
 src/V3SplitAs.cpp          | 3 +--
 src/V3SplitVar.cpp         | 3 +--
 src/V3Stats.cpp            | 4 ++--
 src/V3StatsReport.cpp      | 3 +--
 src/V3Subst.cpp            | 3 +--
 src/V3TSP.cpp              | 3 +--
 src/V3Table.cpp            | 3 +--
 src/V3Task.cpp             | 3 +--
 src/V3Timing.cpp           | 3 +--
 src/V3Trace.cpp            | 3 +--
 src/V3TraceDecl.cpp        | 3 +--
 src/V3Tristate.cpp         | 3 +--
 src/V3Undriven.cpp         | 3 +--
 src/V3Unknown.cpp          | 3 +--
 src/V3Unroll.cpp           | 3 +--
 src/V3VariableOrder.cpp    | 3 +--
 src/V3Width.cpp            | 3 +--
 src/V3WidthCommit.cpp      | 4 ++--
 src/V3WidthSel.cpp         | 3 +--
 111 files changed, 135 insertions(+), 224 deletions(-)

diff --git a/src/V3Active.cpp b/src/V3Active.cpp
index 4930b9293..a49d9f0d9 100644
--- a/src/V3Active.cpp
+++ b/src/V3Active.cpp
@@ -26,12 +26,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Active.h"
 
 #include "V3Const.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <unordered_map>
 
diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp
index 4239525b9..b3e74bc17 100644
--- a/src/V3ActiveTop.cpp
+++ b/src/V3ActiveTop.cpp
@@ -23,11 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3ActiveTop.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenTree.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index 3f8278e5b..bab7e8a7a 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Assert.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index d0689361f..263fccf74 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -19,11 +19,10 @@
 //      Transform clocking blocks into imperative logic
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3AssertPre.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Task.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index f7441655c..6c14af667 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Broken.h"
 #include "V3EmitV.h"
 #include "V3File.h"
+#include "V3PchAstMT.h"
 
 #include <iomanip>
 #include <memory>
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 1c2519ad6..48e054209 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -14,8 +14,6 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "config_build.h"
 #include "verilatedos.h"
 
@@ -26,6 +24,7 @@
 #include "V3Graph.h"
 #include "V3Hasher.h"
 #include "V3PartitionGraph.h"  // Just for mtask dumping
+#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include "V3Ast__gen_macros.h"  // Generated by 'astgen'
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index b4fa16a24..5c7b9282c 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -26,10 +26,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Begin.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp
index e297f59a9..f57d980c5 100644
--- a/src/V3Branch.cpp
+++ b/src/V3Branch.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Branch.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp
index 9ae17efb9..7f861c694 100644
--- a/src/V3Broken.cpp
+++ b/src/V3Broken.cpp
@@ -22,10 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Broken.h"
 
+#include "V3PchAstMT.h"
+
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 1f8abb5c3..2c4eaa09d 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -24,11 +24,10 @@
 //      This transformation honors outputSplitCFuncs.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3CCtors.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <list>
 
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 748909c2e..5f6c77a68 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -22,10 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3CUse.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 89458cda8..8e44063c7 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -34,10 +34,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Case.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 0290c944e..edd77577b 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -37,10 +37,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Cast.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index ef0eddf9b..0712ae11f 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -20,10 +20,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Class.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index 00ddad214..cf175572b 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Clean.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index 98596e135..4e642fc39 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -27,10 +27,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Clock.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp
index 2b858de6c..0d73f7b29 100644
--- a/src/V3Combine.cpp
+++ b/src/V3Combine.cpp
@@ -19,12 +19,11 @@
 //      Also drop empty CFuncs
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Combine.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <list>
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index 6288ccea9..210d4c47c 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -20,11 +20,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Common.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 566021160..0ca224128 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Config.h"
 
+#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include <set>
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 4d04e00cc..55fa334ab 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -24,10 +24,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Coverage.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp
index 76f0e7bdf..6fe7cc7ed 100644
--- a/src/V3CoverageJoin.cpp
+++ b/src/V3CoverageJoin.cpp
@@ -17,11 +17,10 @@
 //      If two COVERTOGGLEs have same VARSCOPE, combine them
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3CoverageJoin.h"
 
 #include "V3DupFinder.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index 768887b5f..a4ab80abc 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -33,10 +33,10 @@
 // here after scoping to allow more dead node removal.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Dead.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 3a829d22d..7041da397 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -48,10 +48,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Delayed.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <deque>
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index a459a26c7..66aa89349 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -23,10 +23,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Depth.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index 378f83d0c..3ea035bfe 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -20,11 +20,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3DepthBlock.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp
index c603204f0..4576cabe0 100644
--- a/src/V3Descope.cpp
+++ b/src/V3Descope.cpp
@@ -22,11 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Descope.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index 9cda7d02a..ff6da033c 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Dfg.h"
 
 #include "V3File.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index 3b23986ff..3cf450615 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -26,10 +26,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3DfgDecomposition.cpp b/src/V3DfgDecomposition.cpp
index 200d12610..3a0e41ee9 100644
--- a/src/V3DfgDecomposition.cpp
+++ b/src/V3DfgDecomposition.cpp
@@ -18,10 +18,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Dfg.h"
 #include "V3File.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <deque>
 #include <unordered_map>
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index a5d0a14a9..056d747ad 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -26,10 +26,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <unordered_map>
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index ea49de41e..53cb79546 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -18,14 +18,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3DfgOptimizer.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <vector>
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index f65b77897..2616d5df0 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -14,12 +14,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3DfgPasses.h"
 
 #include "V3Dfg.h"
 #include "V3Global.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index f162c9ec9..206505a07 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -21,12 +21,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3DfgPeephole.h"
 
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <cctype>
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index 58a889931..e81092c3a 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3DupFinder.h"
 
 #include "V3File.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <iomanip>
 #include <memory>
diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp
index c382554c4..bb6e09ad2 100644
--- a/src/V3EmitCBase.cpp
+++ b/src/V3EmitCBase.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitCBase.h"
 
+#include "V3PchAstMT.h"
 #include "V3Task.h"
 
 //######################################################################
diff --git a/src/V3EmitCConstPool.cpp b/src/V3EmitCConstPool.cpp
index 656bffcd8..cabd546f6 100644
--- a/src/V3EmitCConstPool.cpp
+++ b/src/V3EmitCConstPool.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
 #include "V3File.h"
+#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <algorithm>
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 461d6496e..b033a4ccf 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitCFunc.h"
 
+#include "V3PchAstMT.h"
 #include "V3TSP.h"
 
 #include <map>
diff --git a/src/V3EmitCHeaders.cpp b/src/V3EmitCHeaders.cpp
index 8d9f71c8d..2861df5ad 100644
--- a/src/V3EmitCHeaders.cpp
+++ b/src/V3EmitCHeaders.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
+#include "V3PchAstMT.h"
 
 #include <algorithm>
 #include <cstdint>
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index e640634c9..34ec4ee16 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
+#include "V3PchAstMT.h"
 #include "V3ThreadPool.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp
index 6425a367c..64070760a 100644
--- a/src/V3EmitCInlines.cpp
+++ b/src/V3EmitCInlines.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
+#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <map>
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 4a9f9c496..67a9424e1 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -14,12 +14,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitCMain.h"
 
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <map>
 
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index ca548d68b..666a5f8d5 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -14,13 +14,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitCMake.h"
 
 #include "V3EmitCBase.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <memory>
 
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 53c5339fb..e025154eb 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -14,10 +14,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <algorithm>
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 4642ac016..1f3f9e80d 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -14,12 +14,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
 #include "V3LanguageWords.h"
 #include "V3PartitionGraph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <algorithm>
 #include <map>
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index e55ff26f5..d39cadee8 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -14,13 +14,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitMk.h"
 
 #include "V3EmitCBase.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 38bca92ba..3a272fa9c 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3EmitV.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstMT.h"
 
 #include <vector>
 
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index d2cb7d621..62db4f1c0 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitXml.h"
 
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <map>
 #include <vector>
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index af67ad82e..4cee48560 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -25,11 +25,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Expand.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3File.cpp b/src/V3File.cpp
index 97a26d572..c1fd8e59e 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3File.h"
 
 #include "V3Os.h"
+#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include <cerrno>
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index 93a3d4a08..af464e333 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -37,11 +37,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Force.h"
 
 #include "V3AstUserAllocator.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 098104d11..545605226 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -38,12 +38,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Fork.h"
 
 #include "V3AstNodeExpr.h"
 #include "V3MemberMap.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <set>
 #include <vector>
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index 0f0bb61cc..756d78625 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -21,14 +21,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Gate.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Const.h"
 #include "V3DupFinder.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <list>
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index f4ebc182a..4013f3097 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -14,13 +14,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3File.h"
 #include "V3HierBlock.h"
 #include "V3LinkCells.h"
 #include "V3Parse.h"
 #include "V3ParseSym.h"
+#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 //######################################################################
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index e58dce546..b9201c628 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Hasher.h"
 
+#include "V3PchAstMT.h"
+
 #include <functional>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index f1624493b..4e5371288 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -72,12 +72,11 @@
 //       Used for b) and c).
 //       This options is repeated for all instantiating hierarchical blocks.
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3HierBlock.h"
 
 #include "V3File.h"
 #include "V3Os.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3String.h"
 
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index dbc3e7bb9..afaf26507 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -24,12 +24,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Inline.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Inst.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <unordered_set>
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index fa5b2da3c..80c385968 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -21,11 +21,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Inst.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 95bbdaa06..23353c9b3 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -15,10 +15,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3InstrCount.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <iomanip>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
index de504d25c..63644c598 100644
--- a/src/V3Interface.cpp
+++ b/src/V3Interface.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Interface.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 84ee05d60..49e6d0f3b 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -23,11 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Life.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index 6692a3ebf..e908a8a8a 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -24,12 +24,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LifePost.h"
 
 #include "V3GraphPathChecker.h"
 #include "V3PartitionGraph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <memory>  // for std::unique_ptr -> auto_ptr or unique_ptr
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 14bcfee31..570b1d3ed 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -23,12 +23,11 @@
 //              Link to module that instantiates it
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkCells.h"
 
 #include "V3Graph.h"
 #include "V3Parse.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SymTable.h"
 
 #include <unordered_set>
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 473545166..490ca4d71 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -61,12 +61,11 @@
 //      b          (VSymEnt->AstCell)
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkDot.h"
 
 #include "V3Graph.h"
 #include "V3MemberMap.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3SymTable.h"
 
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index d4a00861c..79f31bb48 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -36,10 +36,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkInc.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <algorithm>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index e777ac164..7a62c06f9 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -29,11 +29,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkJump.h"
 
 #include "V3AstUserAllocator.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <vector>
 
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index 11a1e4499..5972b535c 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -18,10 +18,10 @@
 //          Set lvalue() attributes on appropriate VARREFs.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkLValue.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 9c0500239..dea26b2f2 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -19,10 +19,10 @@
 //          Create new MODULE TOP with connections to below signals
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkLevel.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index b3371c2a3..aa1cc7d82 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -18,11 +18,10 @@
 //          Move some attributes around
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkParse.h"
 
 #include "V3Config.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <set>
 #include <vector>
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index b0636a298..ba1eeaa06 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -24,10 +24,9 @@
 //          SenItems: Convert pos/negedge of non-simple signals to temporaries
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3LinkResolve.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3Task.h"
 
diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index d26a86175..aebd9f23c 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -22,11 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Localize.h"
 
 #include "V3AstUserAllocator.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index b9e08ea22..aab950d34 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -72,13 +72,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3MergeCond.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
 #include "V3Hasher.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <queue>
diff --git a/src/V3Name.cpp b/src/V3Name.cpp
index 9825a3bac..64574a5a4 100644
--- a/src/V3Name.cpp
+++ b/src/V3Name.cpp
@@ -19,11 +19,10 @@
 //              Prepend __PVT__ to variable names
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Name.h"
 
 #include "V3LanguageWords.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index acc6e6639..00551a50d 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Number.h"
 
+#include "V3PchAstMT.h"
+
 #include <algorithm>
 #include <cerrno>
 #include <cmath>
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 554af3421..d6ec1d0df 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -14,8 +14,6 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Options.h"
 
 #include "V3Error.h"
@@ -24,6 +22,7 @@
 #include "V3Mutex.h"
 #include "V3OptionParser.h"
 #include "V3Os.h"
+#include "V3PchAstMT.h"
 #include "V3PreShell.h"
 #include "V3String.h"
 
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index b3af14abc..c8b7dda5e 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -71,8 +71,6 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Order.h"
 
 #include "V3AstUserAllocator.h"
@@ -86,6 +84,7 @@
 #include "V3OrderMoveGraph.h"
 #include "V3Partition.h"
 #include "V3PartitionGraph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 #include "V3SenTree.h"
 #include "V3SplitVar.h"
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 4133df59f..acae4012b 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -44,8 +44,6 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Param.h"
 
 #include "V3Case.h"
@@ -53,6 +51,7 @@
 #include "V3Hasher.h"
 #include "V3Os.h"
 #include "V3Parse.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Unroll.h"
 #include "V3Width.h"
 
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index 16e7d612c..93ad86a9f 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -14,8 +14,6 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Partition.h"
 
 #include "V3Config.h"
@@ -27,6 +25,7 @@
 #include "V3Os.h"
 #include "V3PairingHeap.h"
 #include "V3PartitionGraph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Scoreboard.h"
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
diff --git a/src/V3PchAstMT.h b/src/V3PchAstMT.h
index 50590fd6a..af0c3b25a 100644
--- a/src/V3PchAstMT.h
+++ b/src/V3PchAstMT.h
@@ -24,8 +24,6 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
-#include <algorithm>
-
 #include "V3Ast.h"
 #include "V3Broken.h"
 #include "V3Error.h"
@@ -39,4 +37,6 @@
 #include "V3String.h"
 #include "V3ThreadSafety.h"
 
+#include <algorithm>
+
 #endif  // Guard
diff --git a/src/V3PchAstNoMT.h b/src/V3PchAstNoMT.h
index 0ac7907a8..2ecde3fd5 100644
--- a/src/V3PchAstNoMT.h
+++ b/src/V3PchAstNoMT.h
@@ -26,10 +26,6 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
-#include <algorithm>
-#include <map>
-#include <utility>
-
 #include "V3Ast.h"
 #include "V3Broken.h"
 #include "V3Error.h"
@@ -43,4 +39,8 @@
 #include "V3String.h"
 #include "V3ThreadSafety.h"
 
+#include <algorithm>
+#include <map>
+#include <utility>
+
 #endif  // Guard
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index c6ebaacee..9a6858352 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -24,10 +24,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Premit.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index 0fa0c4c2a..e85c70d84 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3ProtectLib.h"
 
 #include "V3Hasher.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3Task.h"
 
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 5c39b78d2..60cb72f0c 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -24,11 +24,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Randomize.h"
 
 #include "V3MemberMap.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index 55f07fe35..8dbc82dd8 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -29,10 +29,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Reloop.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index a7012d151..2aa86bd2b 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -35,13 +35,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Sched.h"
 
 #include "V3EmitCBase.h"
 #include "V3EmitV.h"
 #include "V3Order.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenExprBuilder.h"
 #include "V3Stats.h"
 
diff --git a/src/V3SchedAcyclic.cpp b/src/V3SchedAcyclic.cpp
index f70022350..4df41bb9c 100644
--- a/src/V3SchedAcyclic.cpp
+++ b/src/V3SchedAcyclic.cpp
@@ -33,9 +33,8 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 #include "V3SenTree.h"
 #include "V3SplitVar.h"
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index a5cbfd3c9..b9c0619fa 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -34,10 +34,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitV.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 #include <tuple>
diff --git a/src/V3SchedReplicate.cpp b/src/V3SchedReplicate.cpp
index 9ef1fcdb0..c37ae0c7d 100644
--- a/src/V3SchedReplicate.cpp
+++ b/src/V3SchedReplicate.cpp
@@ -34,9 +34,8 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index 56a89ed24..4c1523bd0 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -24,9 +24,8 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 #include <unordered_map>
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index 4f6efb93e..a5fb65652 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -21,10 +21,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Scope.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include <unordered_map>
 #include <unordered_set>
 
diff --git a/src/V3Scoreboard.cpp b/src/V3Scoreboard.cpp
index 1a26dbc2f..253b958cf 100644
--- a/src/V3Scoreboard.cpp
+++ b/src/V3Scoreboard.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Scoreboard.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 class ScoreboardTestElem;
 
 struct Key {
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 0076094e0..b63e5b71a 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -35,10 +35,10 @@
 // simplified to look primarily for SLICESELs.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Slice.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //*************************************************************************
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index c543aec1d..075259dd2 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -77,11 +77,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Split.h"
 
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <unordered_map>
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index 26898c676..98699725d 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -21,10 +21,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3SplitAs.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 8711f4bc6..01523c59b 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -110,10 +110,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3SplitVar.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index 3f89004df..fca92184a 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3Stats.h"
 
+#include "V3PchAstMT.h"
+
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3StatsReport.cpp b/src/V3StatsReport.cpp
index a41f116d6..d24c4bb23 100644
--- a/src/V3StatsReport.cpp
+++ b/src/V3StatsReport.cpp
@@ -14,11 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstMT.h"
-
 #include "V3File.h"
 #include "V3Global.h"
 #include "V3Os.h"
+#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <iomanip>
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 7c2465dad..3a43b05a8 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -22,10 +22,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Subst.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <algorithm>
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index 583db4ab4..85c2c575d 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -19,12 +19,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3TSP.h"
 
 #include "V3File.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <cmath>
 #include <list>
diff --git a/src/V3Table.cpp b/src/V3Table.cpp
index cfdc10717..30c0850db 100644
--- a/src/V3Table.cpp
+++ b/src/V3Table.cpp
@@ -21,10 +21,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Table.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index a410f06a6..ceeed9e00 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -23,14 +23,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Task.h"
 
 #include "V3Const.h"
 #include "V3EmitCBase.h"
 #include "V3Graph.h"
 #include "V3LinkLValue.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <tuple>
 
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 65948a526..a875d5dc3 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -60,14 +60,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Timing.h"
 
 #include "V3Const.h"
 #include "V3EmitV.h"
 #include "V3Graph.h"
 #include "V3MemberMap.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenExprBuilder.h"
 #include "V3SenTree.h"
 #include "V3UniqueNames.h"
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index 653ba6548..36a4bb0e3 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -35,13 +35,12 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Trace.h"
 
 #include "V3DupFinder.h"
 #include "V3EmitCBase.h"
 #include "V3Graph.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <limits>
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 284936660..7e287f5fe 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -20,14 +20,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3TraceDecl.h"
 
 #include "verilated_trace_defs.h"  // For VLT_TRACE_SCOPE_*
 
 #include "V3Config.h"
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <functional>
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index a584d1748..84788265b 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -115,12 +115,11 @@
 // unsupported.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Tristate.h"
 
 #include "V3Graph.h"
 #include "V3Inst.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index 09d6e5043..2c2df44ff 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -23,10 +23,9 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Undriven.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 625055393..3d429998e 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -28,11 +28,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Unknown.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp
index f2a7af31b..3a5beea92 100644
--- a/src/V3Unroll.cpp
+++ b/src/V3Unroll.cpp
@@ -24,11 +24,10 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Unroll.h"
 
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
diff --git a/src/V3VariableOrder.cpp b/src/V3VariableOrder.cpp
index 2fbea7c75..4275f5499 100644
--- a/src/V3VariableOrder.cpp
+++ b/src/V3VariableOrder.cpp
@@ -20,12 +20,11 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3VariableOrder.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3EmitCBase.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3TSP.h"
 
 #include <vector>
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index f5f9c85e8..533da7a26 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -63,13 +63,12 @@
 // iterateSubtreeReturnEdits.
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Width.h"
 
 #include "V3Const.h"
 #include "V3MemberMap.h"
 #include "V3Number.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Randomize.h"
 #include "V3String.h"
 #include "V3Task.h"
diff --git a/src/V3WidthCommit.cpp b/src/V3WidthCommit.cpp
index abfb20bab..16813f88a 100644
--- a/src/V3WidthCommit.cpp
+++ b/src/V3WidthCommit.cpp
@@ -20,13 +20,13 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "config_build.h"
 #include "verilatedos.h"
 
 #include "V3WidthCommit.h"
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index 8c8aa4bb4..f2c875738 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -26,9 +26,8 @@
 //
 //*************************************************************************
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 #include "V3Const.h"
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Width.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;

From 13989b965d259644303692db4127b0df10bf99f8 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 17 Oct 2023 20:50:40 -0400
Subject: [PATCH 084/157] Tests: Add --binary with split, to check parallel
 builds

---
 test_regress/t/t_flag_binary_parallel.pl | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100755 test_regress/t/t_flag_binary_parallel.pl

diff --git a/test_regress/t/t_flag_binary_parallel.pl b/test_regress/t/t_flag_binary_parallel.pl
new file mode 100755
index 000000000..0305abd74
--- /dev/null
+++ b/test_regress/t/t_flag_binary_parallel.pl
@@ -0,0 +1,30 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+top_filename("t/t_flag_main.v");
+
+compile(
+    verilator_flags => [# Custom as don't want -cc
+                        "-Mdir $Self->{obj_dir}",
+                        "--debug-check", ],
+    verilator_flags2 => ['--binary', '--output-split 1'],
+    verilator_make_cmake => 0,
+    verilator_make_gmake => 0,
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;

From 3914176bc4cef5279e2bf822b9642b4fd5373feb Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 06:06:00 -0400
Subject: [PATCH 085/157] Internals: Remove unused IGNORED to fix MSVC warning.
 No functional change intended.

---
 src/verilog.l | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/verilog.l b/src/verilog.l
index 102a43195..8bb6c07bd 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -82,7 +82,6 @@ static double lexParseDouble(FileLine* fl, const char* textp, size_t length) {
 %s ATTRMODE QQQ STRING TABLE
 %s VA5 SAX VLT
 %s SYSCHDR SYSCINT SYSCIMP SYSCIMPH SYSCCTOR SYSCDTOR
-%s IGNORE
 
 ws      [ \t\f\r]+
 wsnr    [ \t\f]+
@@ -1010,7 +1009,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   /* Common for all SYSC header states */
   /* OPTIMIZE: we return one per line, make it one for the entire block */
   /* If add to this list also add to V3LanguageWords.h */
-<V95,V01NC,V01C,V05,VA5,S05,S09,S12,S17,SAX,VLT,SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR,IGNORE>{
+<V95,V01NC,V01C,V05,VA5,S05,S09,S12,S17,SAX,VLT,SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR>{
   "`accelerate"                         { FL_FWD; FL_BRK; }  // Verilog-XL compatibility
   "`autoexpand_vectornets"              { FL_FWD; FL_BRK; }  // Verilog-XL compatibility
   "`celldefine"                         { FL_FWD; PARSEP->lexFileline()->celldefineOn(true); FL_BRK; }
@@ -1097,10 +1096,9 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
 <SYSCIMPH>[ \t]*[^` \t\n\r][^\n\r]*{crnl}       { FL; yylval.strp = PARSEP->newString(yytext); return yaSCIMPH; }
 <SYSCCTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl}       { FL; yylval.strp = PARSEP->newString(yytext); return yaSCCTOR; }
 <SYSCDTOR>[ \t]*[^` \t\n\r][^\n\r]*{crnl}       { FL; yylval.strp = PARSEP->newString(yytext); return yaSCDTOR; }
-<IGNORE>[ \t]*[^` \t\n\r][^\n\r]*{crnl}         { FL_FWD; FL_BRK; }
 
   /* Pick up text-type data */
-<SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR,IGNORE>{
+<SYSCHDR,SYSCINT,SYSCIMP,SYSCIMPH,SYSCCTOR,SYSCDTOR>{
   {wsnr}*               { yymore(); }
   {crnl}                { yymore(); }
 }

From 28625451dd2d5160f8fd121d72b9af593a381ca6 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 06:07:05 -0400
Subject: [PATCH 086/157] Fix MSVC makefile list (part of previous commit)

---
 src/CMakeLists.txt | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index b2fbf9f4d..a4b3fed12 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -44,9 +44,10 @@ set(HEADERS
     V3Begin.h
     V3Branch.h
     V3Broken.h
+    V3CCtors.h
+    V3CUse.h
     V3Case.h
     V3Cast.h
-    V3CCtors.h
     V3Class.h
     V3Clean.h
     V3Clock.h
@@ -56,7 +57,6 @@ set(HEADERS
     V3Const.h
     V3Coverage.h
     V3CoverageJoin.h
-    V3CUse.h
     V3Dead.h
     V3Delayed.h
     V3Depth.h
@@ -105,8 +105,8 @@ set(HEADERS
     V3LinkDot.h
     V3LinkInc.h
     V3LinkJump.h
-    V3LinkLevel.h
     V3LinkLValue.h
+    V3LinkLevel.h
     V3LinkParse.h
     V3LinkResolve.h
     V3List.h
@@ -127,10 +127,12 @@ set(HEADERS
     V3ParseSym.h
     V3Partition.h
     V3PartitionGraph.h
+    V3PchAstMT.h
+    V3PchAstNoMT.h
     V3PreLex.h
-    V3Premit.h
     V3PreProc.h
     V3PreShell.h
+    V3Premit.h
     V3ProtectLib.h
     V3Randomize.h
     V3Reloop.h
@@ -149,6 +151,7 @@ set(HEADERS
     V3String.h
     V3Subst.h
     V3SymTable.h
+    V3TSP.h
     V3Table.h
     V3Task.h
     V3ThreadPool.h
@@ -157,7 +160,6 @@ set(HEADERS
     V3Trace.h
     V3TraceDecl.h
     V3Tristate.h
-    V3TSP.h
     V3Undriven.h
     V3UniqueNames.h
     V3Unknown.h

From 51a18225adc6270701ce2be361e45ed3a8ff86db Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 06:37:38 -0400
Subject: [PATCH 087/157] cmake: Fix missing headers

---
 src/CMakeLists.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index a4b3fed12..f31871b65 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -111,7 +111,10 @@ set(HEADERS
     V3LinkResolve.h
     V3List.h
     V3Localize.h
+    V3MemberMap.h
     V3MergeCond.h
+    V3Mutex.h
+    V3Name.h
     V3Name.h
     V3Number.h
     V3OptionParser.h
@@ -136,6 +139,7 @@ set(HEADERS
     V3ProtectLib.h
     V3Randomize.h
     V3Reloop.h
+    V3Rtti.h
     V3Sched.h
     V3Scope.h
     V3Scoreboard.h

From b5828a7ce990de997aca40a573ef13cf05b9488a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 06:37:46 -0400
Subject: [PATCH 088/157] Fix header order botched by clang-format in recent
 commit.

---
 .clang-format              | 2 ++
 src/V3Active.cpp           | 3 ++-
 src/V3ActiveTop.cpp        | 3 ++-
 src/V3Assert.cpp           | 3 ++-
 src/V3AssertPre.cpp        | 3 ++-
 src/V3Ast.cpp              | 3 ++-
 src/V3AstNodes.cpp         | 6 +-----
 src/V3Begin.cpp            | 4 ++--
 src/V3Branch.cpp           | 4 ++--
 src/V3Broken.cpp           | 4 ++--
 src/V3CCtors.cpp           | 3 ++-
 src/V3CUse.cpp             | 4 ++--
 src/V3Case.cpp             | 3 ++-
 src/V3Cast.cpp             | 4 ++--
 src/V3Class.cpp            | 3 ++-
 src/V3Clean.cpp            | 4 ++--
 src/V3Clock.cpp            | 3 ++-
 src/V3Combine.cpp          | 3 ++-
 src/V3Common.cpp           | 3 ++-
 src/V3Config.cpp           | 3 ++-
 src/V3Coverage.cpp         | 4 ++--
 src/V3CoverageJoin.cpp     | 3 ++-
 src/V3Dead.cpp             | 4 ++--
 src/V3Delayed.cpp          | 3 ++-
 src/V3Depth.cpp            | 3 ++-
 src/V3DepthBlock.cpp       | 3 ++-
 src/V3Descope.cpp          | 3 ++-
 src/V3Dfg.cpp              | 3 ++-
 src/V3DfgAstToDfg.cpp      | 3 ++-
 src/V3DfgDecomposition.cpp | 3 ++-
 src/V3DfgDfgToAst.cpp      | 3 ++-
 src/V3DfgOptimizer.cpp     | 3 ++-
 src/V3DfgPasses.cpp        | 3 ++-
 src/V3DfgPeephole.cpp      | 3 ++-
 src/V3DupFinder.cpp        | 3 ++-
 src/V3EmitCBase.cpp        | 3 ++-
 src/V3EmitCConstPool.cpp   | 3 ++-
 src/V3EmitCFunc.cpp        | 3 ++-
 src/V3EmitCHeaders.cpp     | 3 ++-
 src/V3EmitCImp.cpp         | 3 ++-
 src/V3EmitCInlines.cpp     | 3 ++-
 src/V3EmitCMain.cpp        | 3 ++-
 src/V3EmitCMake.cpp        | 3 ++-
 src/V3EmitCModel.cpp       | 3 ++-
 src/V3EmitCSyms.cpp        | 3 ++-
 src/V3EmitMk.cpp           | 3 ++-
 src/V3EmitV.cpp            | 3 ++-
 src/V3EmitXml.cpp          | 3 ++-
 src/V3Expand.cpp           | 3 ++-
 src/V3File.cpp             | 3 ++-
 src/V3Force.cpp            | 3 ++-
 src/V3Fork.cpp             | 3 ++-
 src/V3Gate.cpp             | 3 ++-
 src/V3Global.cpp           | 3 ++-
 src/V3Hasher.cpp           | 4 ++--
 src/V3HierBlock.cpp        | 3 ++-
 src/V3Inline.cpp           | 3 ++-
 src/V3Inst.cpp             | 3 ++-
 src/V3InstrCount.cpp       | 4 ++--
 src/V3Interface.cpp        | 4 ++--
 src/V3Life.cpp             | 3 ++-
 src/V3LifePost.cpp         | 3 ++-
 src/V3LinkCells.cpp        | 3 ++-
 src/V3LinkDot.cpp          | 3 ++-
 src/V3LinkInc.cpp          | 4 ++--
 src/V3LinkJump.cpp         | 3 ++-
 src/V3LinkLValue.cpp       | 4 ++--
 src/V3LinkLevel.cpp        | 4 ++--
 src/V3LinkParse.cpp        | 3 ++-
 src/V3LinkResolve.cpp      | 3 ++-
 src/V3Localize.cpp         | 3 ++-
 src/V3MergeCond.cpp        | 3 ++-
 src/V3Name.cpp             | 3 ++-
 src/V3Number.cpp           | 4 ++--
 src/V3Options.cpp          | 3 ++-
 src/V3Order.cpp            | 3 ++-
 src/V3Param.cpp            | 3 ++-
 src/V3Partition.cpp        | 3 ++-
 src/V3Premit.cpp           | 3 ++-
 src/V3ProtectLib.cpp       | 3 ++-
 src/V3Randomize.cpp        | 3 ++-
 src/V3Reloop.cpp           | 3 ++-
 src/V3Sched.cpp            | 3 ++-
 src/V3SchedAcyclic.cpp     | 3 ++-
 src/V3SchedPartition.cpp   | 3 ++-
 src/V3SchedReplicate.cpp   | 3 ++-
 src/V3SchedTiming.cpp      | 3 ++-
 src/V3Scope.cpp            | 4 ++--
 src/V3Scoreboard.cpp       | 4 ++--
 src/V3Slice.cpp            | 4 ++--
 src/V3Split.cpp            | 3 ++-
 src/V3SplitAs.cpp          | 3 ++-
 src/V3SplitVar.cpp         | 3 ++-
 src/V3Stats.cpp            | 4 ++--
 src/V3StatsReport.cpp      | 3 ++-
 src/V3Subst.cpp            | 3 ++-
 src/V3TSP.cpp              | 3 ++-
 src/V3Table.cpp            | 3 ++-
 src/V3Task.cpp             | 3 ++-
 src/V3Timing.cpp           | 3 ++-
 src/V3Trace.cpp            | 3 ++-
 src/V3TraceDecl.cpp        | 3 ++-
 src/V3Tristate.cpp         | 3 ++-
 src/V3Undriven.cpp         | 3 ++-
 src/V3Unknown.cpp          | 3 ++-
 src/V3Unroll.cpp           | 3 ++-
 src/V3VariableOrder.cpp    | 3 ++-
 src/V3Width.cpp            | 3 ++-
 src/V3WidthCommit.cpp      | 4 ++--
 src/V3WidthSel.cpp         | 3 ++-
 110 files changed, 219 insertions(+), 133 deletions(-)

diff --git a/.clang-format b/.clang-format
index 3e8142bf7..8178613b6 100644
--- a/.clang-format
+++ b/.clang-format
@@ -63,6 +63,8 @@ ForEachMacros:
 SortIncludes:    true
 IncludeBlocks:   Regroup
 IncludeCategories:
+  - Regex:           '"V3Pch.*\.h"'
+    Priority:        -2 # Precompiled headers
   - Regex:           '"(config_build|verilated_config|verilatedos)\.h"'
     Priority:        -1 # Sepecials before main header
   - Regex:           '(<|")verilated.*'
diff --git a/src/V3Active.cpp b/src/V3Active.cpp
index a49d9f0d9..4930b9293 100644
--- a/src/V3Active.cpp
+++ b/src/V3Active.cpp
@@ -26,11 +26,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Active.h"
 
 #include "V3Const.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <unordered_map>
 
diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp
index b3e74bc17..4239525b9 100644
--- a/src/V3ActiveTop.cpp
+++ b/src/V3ActiveTop.cpp
@@ -23,10 +23,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3ActiveTop.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenTree.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index bab7e8a7a..3f8278e5b 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Assert.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index 263fccf74..d0689361f 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -19,10 +19,11 @@
 //      Transform clocking blocks into imperative logic
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3AssertPre.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Task.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 6c14af667..f7441655c 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3Broken.h"
 #include "V3EmitV.h"
 #include "V3File.h"
-#include "V3PchAstMT.h"
 
 #include <iomanip>
 #include <memory>
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 48e054209..5af783789 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -14,17 +14,13 @@
 //
 //*************************************************************************
 
-#include "config_build.h"
-#include "verilatedos.h"
+#include "V3PchAstMT.h"
 
-#include "V3Ast.h"
 #include "V3EmitCBase.h"
 #include "V3File.h"
-#include "V3Global.h"
 #include "V3Graph.h"
 #include "V3Hasher.h"
 #include "V3PartitionGraph.h"  // Just for mtask dumping
-#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include "V3Ast__gen_macros.h"  // Generated by 'astgen'
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index 5c7b9282c..b4fa16a24 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -26,10 +26,10 @@
 //
 //*************************************************************************
 
-#include "V3Begin.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Begin.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp
index f57d980c5..e297f59a9 100644
--- a/src/V3Branch.cpp
+++ b/src/V3Branch.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3Branch.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Branch.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp
index 7f861c694..9ae17efb9 100644
--- a/src/V3Broken.cpp
+++ b/src/V3Broken.cpp
@@ -22,10 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3Broken.h"
-
 #include "V3PchAstMT.h"
 
+#include "V3Broken.h"
+
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 2c4eaa09d..1f8abb5c3 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -24,10 +24,11 @@
 //      This transformation honors outputSplitCFuncs.
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3CCtors.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <list>
 
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 5f6c77a68..748909c2e 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -22,10 +22,10 @@
 //
 //*************************************************************************
 
-#include "V3CUse.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3CUse.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 8e44063c7..89458cda8 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -34,9 +34,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Case.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index edd77577b..0290c944e 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -37,10 +37,10 @@
 //
 //*************************************************************************
 
-#include "V3Cast.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Cast.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index 0712ae11f..ef0eddf9b 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -20,9 +20,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Class.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index cf175572b..00ddad214 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3Clean.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Clean.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index 4e642fc39..98596e135 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -27,9 +27,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Clock.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp
index 0d73f7b29..2b858de6c 100644
--- a/src/V3Combine.cpp
+++ b/src/V3Combine.cpp
@@ -19,11 +19,12 @@
 //      Also drop empty CFuncs
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Combine.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <list>
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index 210d4c47c..6288ccea9 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -20,10 +20,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Common.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 0ca224128..566021160 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3Config.h"
 
-#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include <set>
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 55fa334ab..4d04e00cc 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -24,10 +24,10 @@
 //
 //*************************************************************************
 
-#include "V3Coverage.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Coverage.h"
+
 #include <unordered_map>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp
index 6fe7cc7ed..76f0e7bdf 100644
--- a/src/V3CoverageJoin.cpp
+++ b/src/V3CoverageJoin.cpp
@@ -17,10 +17,11 @@
 //      If two COVERTOGGLEs have same VARSCOPE, combine them
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3CoverageJoin.h"
 
 #include "V3DupFinder.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index a4ab80abc..768887b5f 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -33,10 +33,10 @@
 // here after scoping to allow more dead node removal.
 //*************************************************************************
 
-#include "V3Dead.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Dead.h"
+
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 7041da397..3a829d22d 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -48,9 +48,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Delayed.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <deque>
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index 66aa89349..a459a26c7 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -23,9 +23,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Depth.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index 3ea035bfe..378f83d0c 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -20,10 +20,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3DepthBlock.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp
index 4576cabe0..c603204f0 100644
--- a/src/V3Descope.cpp
+++ b/src/V3Descope.cpp
@@ -22,10 +22,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Descope.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index ff6da033c..9cda7d02a 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Dfg.h"
 
 #include "V3File.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index 3cf450615..3b23986ff 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -26,9 +26,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3DfgDecomposition.cpp b/src/V3DfgDecomposition.cpp
index 3a0e41ee9..200d12610 100644
--- a/src/V3DfgDecomposition.cpp
+++ b/src/V3DfgDecomposition.cpp
@@ -18,9 +18,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Dfg.h"
 #include "V3File.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <deque>
 #include <unordered_map>
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index 056d747ad..a5d0a14a9 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -26,9 +26,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <unordered_map>
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index 53cb79546..ea49de41e 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -18,13 +18,14 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3DfgOptimizer.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <vector>
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 2616d5df0..f65b77897 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -14,11 +14,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3DfgPasses.h"
 
 #include "V3Dfg.h"
 #include "V3Global.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index 206505a07..f162c9ec9 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -21,11 +21,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3DfgPeephole.h"
 
 #include "V3Dfg.h"
 #include "V3DfgPasses.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <cctype>
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index e81092c3a..58a889931 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3DupFinder.h"
 
 #include "V3File.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <iomanip>
 #include <memory>
diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp
index bb6e09ad2..c382554c4 100644
--- a/src/V3EmitCBase.cpp
+++ b/src/V3EmitCBase.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitCBase.h"
 
-#include "V3PchAstMT.h"
 #include "V3Task.h"
 
 //######################################################################
diff --git a/src/V3EmitCConstPool.cpp b/src/V3EmitCConstPool.cpp
index cabd546f6..656bffcd8 100644
--- a/src/V3EmitCConstPool.cpp
+++ b/src/V3EmitCConstPool.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
 #include "V3File.h"
-#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <algorithm>
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index b033a4ccf..461d6496e 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitCFunc.h"
 
-#include "V3PchAstMT.h"
 #include "V3TSP.h"
 
 #include <map>
diff --git a/src/V3EmitCHeaders.cpp b/src/V3EmitCHeaders.cpp
index 2861df5ad..8d9f71c8d 100644
--- a/src/V3EmitCHeaders.cpp
+++ b/src/V3EmitCHeaders.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitC.h"
 #include "V3EmitCConstInit.h"
-#include "V3PchAstMT.h"
 
 #include <algorithm>
 #include <cstdint>
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index 34ec4ee16..e640634c9 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
-#include "V3PchAstMT.h"
 #include "V3ThreadPool.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp
index 64070760a..6425a367c 100644
--- a/src/V3EmitCInlines.cpp
+++ b/src/V3EmitCInlines.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
-#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <map>
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 67a9424e1..4a9f9c496 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -14,11 +14,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitCMain.h"
 
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <map>
 
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index 666a5f8d5..ca548d68b 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -14,12 +14,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitCMake.h"
 
 #include "V3EmitCBase.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <memory>
 
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index e025154eb..53c5339fb 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -14,9 +14,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitC.h"
 #include "V3EmitCFunc.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3UniqueNames.h"
 
 #include <algorithm>
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 1f3f9e80d..4642ac016 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -14,11 +14,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitC.h"
 #include "V3EmitCBase.h"
 #include "V3LanguageWords.h"
 #include "V3PartitionGraph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <algorithm>
 #include <map>
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index d39cadee8..e55ff26f5 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -14,12 +14,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitMk.h"
 
 #include "V3EmitCBase.h"
 #include "V3HierBlock.h"
 #include "V3Os.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 3a272fa9c..38bca92ba 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3EmitV.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstMT.h"
 
 #include <vector>
 
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 62db4f1c0..d2cb7d621 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitXml.h"
 
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <map>
 #include <vector>
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 4cee48560..af67ad82e 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -25,10 +25,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Expand.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3File.cpp b/src/V3File.cpp
index c1fd8e59e..97a26d572 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3File.h"
 
 #include "V3Os.h"
-#include "V3PchAstMT.h"
 #include "V3String.h"
 
 #include <cerrno>
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index af464e333..93a3d4a08 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -37,10 +37,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Force.h"
 
 #include "V3AstUserAllocator.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 545605226..098104d11 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -38,11 +38,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Fork.h"
 
 #include "V3AstNodeExpr.h"
 #include "V3MemberMap.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <set>
 #include <vector>
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index 756d78625..0f0bb61cc 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -21,13 +21,14 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Gate.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Const.h"
 #include "V3DupFinder.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <list>
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index 4013f3097..f4ebc182a 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -14,12 +14,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3File.h"
 #include "V3HierBlock.h"
 #include "V3LinkCells.h"
 #include "V3Parse.h"
 #include "V3ParseSym.h"
-#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 //######################################################################
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index b9201c628..e58dce546 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3Hasher.h"
-
 #include "V3PchAstMT.h"
 
+#include "V3Hasher.h"
+
 #include <functional>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index 4e5371288..f1624493b 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -72,11 +72,12 @@
 //       Used for b) and c).
 //       This options is repeated for all instantiating hierarchical blocks.
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3HierBlock.h"
 
 #include "V3File.h"
 #include "V3Os.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3String.h"
 
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index afaf26507..dbc3e7bb9 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -24,11 +24,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Inline.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3Inst.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <unordered_set>
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 80c385968..fa5b2da3c 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -21,10 +21,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Inst.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 23353c9b3..95bbdaa06 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -15,10 +15,10 @@
 //
 //*************************************************************************
 
-#include "V3InstrCount.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3InstrCount.h"
+
 #include <iomanip>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
index 63644c598..de504d25c 100644
--- a/src/V3Interface.cpp
+++ b/src/V3Interface.cpp
@@ -23,10 +23,10 @@
 //
 //*************************************************************************
 
-#include "V3Interface.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Interface.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 49e6d0f3b..84ee05d60 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -23,10 +23,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Life.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index e908a8a8a..6692a3ebf 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -24,11 +24,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LifePost.h"
 
 #include "V3GraphPathChecker.h"
 #include "V3PartitionGraph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <memory>  // for std::unique_ptr -> auto_ptr or unique_ptr
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 570b1d3ed..14bcfee31 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -23,11 +23,12 @@
 //              Link to module that instantiates it
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LinkCells.h"
 
 #include "V3Graph.h"
 #include "V3Parse.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SymTable.h"
 
 #include <unordered_set>
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 490ca4d71..473545166 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -61,11 +61,12 @@
 //      b          (VSymEnt->AstCell)
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LinkDot.h"
 
 #include "V3Graph.h"
 #include "V3MemberMap.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3SymTable.h"
 
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index 79f31bb48..d4a00861c 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -36,10 +36,10 @@
 //
 //*************************************************************************
 
-#include "V3LinkInc.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3LinkInc.h"
+
 #include <algorithm>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index 7a62c06f9..e777ac164 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -29,10 +29,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LinkJump.h"
 
 #include "V3AstUserAllocator.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <vector>
 
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index 5972b535c..11a1e4499 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -18,10 +18,10 @@
 //          Set lvalue() attributes on appropriate VARREFs.
 //*************************************************************************
 
-#include "V3LinkLValue.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3LinkLValue.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index dea26b2f2..9c0500239 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -19,10 +19,10 @@
 //          Create new MODULE TOP with connections to below signals
 //*************************************************************************
 
-#include "V3LinkLevel.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3LinkLevel.h"
+
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index aa1cc7d82..b3371c2a3 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -18,10 +18,11 @@
 //          Move some attributes around
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LinkParse.h"
 
 #include "V3Config.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <set>
 #include <vector>
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index ba1eeaa06..b0636a298 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -24,9 +24,10 @@
 //          SenItems: Convert pos/negedge of non-simple signals to temporaries
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3LinkResolve.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3Task.h"
 
diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index aebd9f23c..d26a86175 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -22,10 +22,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Localize.h"
 
 #include "V3AstUserAllocator.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index aab950d34..b9e08ea22 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -72,12 +72,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3MergeCond.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3DupFinder.h"
 #include "V3Hasher.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <queue>
diff --git a/src/V3Name.cpp b/src/V3Name.cpp
index 64574a5a4..9825a3bac 100644
--- a/src/V3Name.cpp
+++ b/src/V3Name.cpp
@@ -19,10 +19,11 @@
 //              Prepend __PVT__ to variable names
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Name.h"
 
 #include "V3LanguageWords.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 00551a50d..acc6e6639 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3Number.h"
-
 #include "V3PchAstMT.h"
 
+#include "V3Number.h"
+
 #include <algorithm>
 #include <cerrno>
 #include <cmath>
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index d6ec1d0df..554af3421 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3Options.h"
 
 #include "V3Error.h"
@@ -22,7 +24,6 @@
 #include "V3Mutex.h"
 #include "V3OptionParser.h"
 #include "V3Os.h"
-#include "V3PchAstMT.h"
 #include "V3PreShell.h"
 #include "V3String.h"
 
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index c8b7dda5e..b3af14abc 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -71,6 +71,8 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Order.h"
 
 #include "V3AstUserAllocator.h"
@@ -84,7 +86,6 @@
 #include "V3OrderMoveGraph.h"
 #include "V3Partition.h"
 #include "V3PartitionGraph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 #include "V3SenTree.h"
 #include "V3SplitVar.h"
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index acae4012b..4133df59f 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -44,6 +44,8 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Param.h"
 
 #include "V3Case.h"
@@ -51,7 +53,6 @@
 #include "V3Hasher.h"
 #include "V3Os.h"
 #include "V3Parse.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Unroll.h"
 #include "V3Width.h"
 
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index 93ad86a9f..16e7d612c 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -14,6 +14,8 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Partition.h"
 
 #include "V3Config.h"
@@ -25,7 +27,6 @@
 #include "V3Os.h"
 #include "V3PairingHeap.h"
 #include "V3PartitionGraph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Scoreboard.h"
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 9a6858352..c6ebaacee 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -24,9 +24,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Premit.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index e85c70d84..0fa0c4c2a 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3ProtectLib.h"
 
 #include "V3Hasher.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3String.h"
 #include "V3Task.h"
 
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 60cb72f0c..5c39b78d2 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -24,10 +24,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Randomize.h"
 
 #include "V3MemberMap.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index 8dbc82dd8..55f07fe35 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -29,9 +29,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Reloop.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 2aa86bd2b..a7012d151 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -35,12 +35,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Sched.h"
 
 #include "V3EmitCBase.h"
 #include "V3EmitV.h"
 #include "V3Order.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenExprBuilder.h"
 #include "V3Stats.h"
 
diff --git a/src/V3SchedAcyclic.cpp b/src/V3SchedAcyclic.cpp
index 4df41bb9c..f70022350 100644
--- a/src/V3SchedAcyclic.cpp
+++ b/src/V3SchedAcyclic.cpp
@@ -33,8 +33,9 @@
 //
 //*************************************************************************
 
-#include "V3Graph.h"
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
+#include "V3Graph.h"
 #include "V3Sched.h"
 #include "V3SenTree.h"
 #include "V3SplitVar.h"
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index b9c0619fa..a5cbfd3c9 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -34,9 +34,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3EmitV.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Sched.h"
 
 #include <tuple>
diff --git a/src/V3SchedReplicate.cpp b/src/V3SchedReplicate.cpp
index c37ae0c7d..9ef1fcdb0 100644
--- a/src/V3SchedReplicate.cpp
+++ b/src/V3SchedReplicate.cpp
@@ -34,8 +34,9 @@
 //
 //*************************************************************************
 
-#include "V3Graph.h"
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
+#include "V3Graph.h"
 #include "V3Sched.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index 4c1523bd0..56a89ed24 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -24,8 +24,9 @@
 //
 //*************************************************************************
 
-#include "V3EmitCBase.h"
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
+#include "V3EmitCBase.h"
 #include "V3Sched.h"
 
 #include <unordered_map>
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index a5fb65652..4f6efb93e 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -21,10 +21,10 @@
 //
 //*************************************************************************
 
-#include "V3Scope.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Scope.h"
+
 #include <unordered_map>
 #include <unordered_set>
 
diff --git a/src/V3Scoreboard.cpp b/src/V3Scoreboard.cpp
index 253b958cf..1a26dbc2f 100644
--- a/src/V3Scoreboard.cpp
+++ b/src/V3Scoreboard.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3Scoreboard.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Scoreboard.h"
+
 class ScoreboardTestElem;
 
 struct Key {
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index b63e5b71a..0076094e0 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -35,10 +35,10 @@
 // simplified to look primarily for SLICESELs.
 //*************************************************************************
 
-#include "V3Slice.h"
-
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
+#include "V3Slice.h"
+
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //*************************************************************************
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index 075259dd2..c543aec1d 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -77,10 +77,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Split.h"
 
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <unordered_map>
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index 98699725d..26898c676 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -21,9 +21,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3SplitAs.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 01523c59b..8711f4bc6 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -110,9 +110,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3SplitVar.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index fca92184a..3f89004df 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -14,10 +14,10 @@
 //
 //*************************************************************************
 
-#include "V3Stats.h"
-
 #include "V3PchAstMT.h"
 
+#include "V3Stats.h"
+
 // This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
 #include "V3AstConstOnly.h"
 
diff --git a/src/V3StatsReport.cpp b/src/V3StatsReport.cpp
index d24c4bb23..a41f116d6 100644
--- a/src/V3StatsReport.cpp
+++ b/src/V3StatsReport.cpp
@@ -14,10 +14,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstMT.h"
+
 #include "V3File.h"
 #include "V3Global.h"
 #include "V3Os.h"
-#include "V3PchAstMT.h"
 #include "V3Stats.h"
 
 #include <iomanip>
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 3a43b05a8..7c2465dad 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -22,9 +22,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Subst.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <algorithm>
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index 85c2c575d..583db4ab4 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -19,11 +19,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3TSP.h"
 
 #include "V3File.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <cmath>
 #include <list>
diff --git a/src/V3Table.cpp b/src/V3Table.cpp
index 30c0850db..cfdc10717 100644
--- a/src/V3Table.cpp
+++ b/src/V3Table.cpp
@@ -21,9 +21,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Table.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index ceeed9e00..a410f06a6 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -23,13 +23,14 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Task.h"
 
 #include "V3Const.h"
 #include "V3EmitCBase.h"
 #include "V3Graph.h"
 #include "V3LinkLValue.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include <tuple>
 
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index a875d5dc3..65948a526 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -60,13 +60,14 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Timing.h"
 
 #include "V3Const.h"
 #include "V3EmitV.h"
 #include "V3Graph.h"
 #include "V3MemberMap.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3SenExprBuilder.h"
 #include "V3SenTree.h"
 #include "V3UniqueNames.h"
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index 36a4bb0e3..653ba6548 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -35,12 +35,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Trace.h"
 
 #include "V3DupFinder.h"
 #include "V3EmitCBase.h"
 #include "V3Graph.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <limits>
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 7e287f5fe..284936660 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -20,13 +20,14 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3TraceDecl.h"
 
 #include "verilated_trace_defs.h"  // For VLT_TRACE_SCOPE_*
 
 #include "V3Config.h"
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <functional>
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index 84788265b..a584d1748 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -115,11 +115,12 @@
 // unsupported.
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Tristate.h"
 
 #include "V3Graph.h"
 #include "V3Inst.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index 2c2df44ff..09d6e5043 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -23,9 +23,10 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Undriven.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 
 #include <vector>
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 3d429998e..625055393 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -28,10 +28,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Unknown.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Stats.h"
 #include "V3UniqueNames.h"
 
diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp
index 3a5beea92..f2a7af31b 100644
--- a/src/V3Unroll.cpp
+++ b/src/V3Unroll.cpp
@@ -24,10 +24,11 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Unroll.h"
 
 #include "V3Const.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Simulate.h"
 #include "V3Stats.h"
 
diff --git a/src/V3VariableOrder.cpp b/src/V3VariableOrder.cpp
index 4275f5499..2fbea7c75 100644
--- a/src/V3VariableOrder.cpp
+++ b/src/V3VariableOrder.cpp
@@ -20,11 +20,12 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3VariableOrder.h"
 
 #include "V3AstUserAllocator.h"
 #include "V3EmitCBase.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3TSP.h"
 
 #include <vector>
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 533da7a26..f5f9c85e8 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -63,12 +63,13 @@
 // iterateSubtreeReturnEdits.
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "V3Width.h"
 
 #include "V3Const.h"
 #include "V3MemberMap.h"
 #include "V3Number.h"
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 #include "V3Randomize.h"
 #include "V3String.h"
 #include "V3Task.h"
diff --git a/src/V3WidthCommit.cpp b/src/V3WidthCommit.cpp
index 16813f88a..abfb20bab 100644
--- a/src/V3WidthCommit.cpp
+++ b/src/V3WidthCommit.cpp
@@ -20,13 +20,13 @@
 //
 //*************************************************************************
 
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
 #include "config_build.h"
 #include "verilatedos.h"
 
 #include "V3WidthCommit.h"
 
-#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
-
 VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index f2c875738..8c8aa4bb4 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -26,8 +26,9 @@
 //
 //*************************************************************************
 
-#include "V3Const.h"
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
+#include "V3Const.h"
 #include "V3Width.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;

From 8b44a54bb225257690748acbe046935849053085 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 08:08:15 -0400
Subject: [PATCH 089/157] Support Verilated precompiled header compilations
 (#4580)

---
 include/verilated.mk.in               | 56 +++++++++++++++-----
 src/CMakeLists.txt                    |  1 +
 src/Makefile_obj.in                   |  1 +
 src/V3EmitC.h                         |  3 +-
 src/V3EmitCBase.h                     |  7 +--
 src/V3EmitCImp.cpp                    |  5 +-
 src/V3EmitCModel.cpp                  |  6 +--
 src/V3EmitCPch.cpp                    | 73 +++++++++++++++++++++++++++
 src/V3EmitCSyms.cpp                   |  2 +-
 src/Verilator.cpp                     |  1 +
 test_regress/t/t_trace_noflag_bad.out |  2 +-
 11 files changed, 130 insertions(+), 27 deletions(-)
 create mode 100644 src/V3EmitCPch.cpp

diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index 4c97a82e4..49837598b 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -35,6 +35,12 @@ CFG_CXXFLAGS_NO_UNUSED = @CFG_CXXFLAGS_NO_UNUSED@
 CFG_CXXFLAGS_WEXTRA = @CFG_CXXFLAGS_WEXTRA@
 # Compiler flags that enable coroutine support
 CFG_CXXFLAGS_COROUTINES = @CFG_CXXFLAGS_COROUTINES@
+# Compiler flags when creating a precompiled header
+CFG_CXXFLAGS_PCH = -x c++-header
+# Compiler option to put in front of filename to read precompiled header
+CFG_CXXFLAGS_PCH_I = @CFG_CXXFLAGS_PCH_I@
+# Compiler's filename prefix for precompiled headers, .gch if clang, empty if GCC
+CFG_GCH_IF_CLANG = @CFG_GCH_IF_CLANG@
 # Linker flags
 CFG_LDFLAGS_VERILATED = @CFG_LDFLAGS_VERILATED@
 # Linker libraries for multithreading
@@ -47,6 +53,12 @@ VERILATOR_COVERAGE = $(PERL) $(VERILATOR_ROOT)/bin/verilator_coverage
 VERILATOR_INCLUDER = $(PYTHON3) $(VERILATOR_ROOT)/bin/verilator_includer
 VERILATOR_CCACHE_REPORT = $(PYTHON3) $(VERILATOR_ROOT)/bin/verilator_ccache_report
 
+######################################################################
+# CCACHE flags (via environment as no command line option available)
+
+CCACHE_SLOPPINESS ?= pch_defines,time_macros
+export CCACHE_SLOPPINESS
+
 ######################################################################
 # Make checks
 
@@ -166,11 +178,17 @@ endif
 VM_FAST += $(VM_CLASSES_FAST) $(VM_SUPPORT_FAST)
 VM_SLOW += $(VM_CLASSES_SLOW) $(VM_SUPPORT_SLOW)
 
+# Precompiled header filename
+VK_PCH_H = $(VM_PREFIX)__pch.h
+# Compiler read-a-precompiled-header option for precompiled header filename
+VK_PCH_I_FAST = $(CFG_CXXFLAGS_PCH_I) $(VM_PREFIX)__pch.h.fast$(CFG_GCH_IF_CLANG)
+VK_PCH_I_SLOW = $(CFG_CXXFLAGS_PCH_I) $(VM_PREFIX)__pch.h.slow$(CFG_GCH_IF_CLANG)
+
 #######################################################################
 ### Overall Objects Linking
 
-VK_FAST_OBJS = $(addsuffix .o, $(VM_FAST))
-VK_SLOW_OBJS = $(addsuffix .o, $(VM_SLOW))
+VK_OBJS_FAST = $(addsuffix .o, $(VM_FAST))
+VK_OBJS_SLOW = $(addsuffix .o, $(VM_SLOW))
 
 VK_USER_OBJS = $(addsuffix .o, $(VM_USER_CLASSES))
 
@@ -197,7 +215,7 @@ else
   # Parallel build: Each .cpp file by itself. This can be somewhat slower for
   # very small designs and examples, but is a lot faster for large designs.
 
-  VK_OBJS += $(VK_FAST_OBJS) $(VK_SLOW_OBJS)
+  VK_OBJS += $(VK_OBJS_FAST) $(VK_OBJS_SLOW)
 endif
 
 # When archiving just objects (.o), use single $(AR) run
@@ -241,18 +259,30 @@ $(VM_PREFIX)__ALL.a: $(VK_OBJS) $(VM_HIER_LIBS)
 ### Compile rules
 
 ifneq ($(VM_DEFAULT_RULES),0)
-# Anything not in $(VK_SLOW_OBJS) or $(VK_GLOBAL_OBJS), including verilated.o
+# Anything not in $(VK_OBJS_SLOW) or $(VK_GLOBAL_OBJS), including verilated.o
 # and user files passed on the Verilator command line use this rule.
 # We put OPT_FAST/OPT_SLOW/OPT_GLOBAL before the other flags to
 # allow USER_CPPFLAGS to override them
 %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
-$(VK_SLOW_OBJS): %.o: %.cpp
-	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
+$(VK_OBJS_FAST): %.o: %.cpp $(VK_PCH_H).fast.gch
+	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_FAST) -c -o $@ $<
+
+$(VK_OBJS_SLOW): %.o: %.cpp $(VK_PCH_H).slow.gch
+	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_SLOW) -c -o $@ $<
 
 $(VK_GLOBAL_OBJS): %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_GLOBAL) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
+
+# Precompile a header file
+# PCH's compiler flags must match exactly the fast/slow arguments used in the .cpp file,
+# or the PCH file won't be used.
+%.fast.gch: %
+	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
+%.slow.gch: %
+	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
+
 endif
 
 #Default rule embedded in make:
@@ -300,19 +330,21 @@ endif
 
 debug-make::
 	@echo
-	@echo CXXFLAGS: $(CXXFLAGS)
 	@echo CPPFLAGS: $(CPPFLAGS)
+	@echo CXXFLAGS: $(CXXFLAGS)
 	@echo OPT_FAST: $(OPT_FAST)
 	@echo OPT_SLOW: $(OPT_SLOW)
-	@echo VM_PREFIX:  $(VM_PREFIX)
-	@echo VM_PARALLEL_BUILDS:  $(VM_PARALLEL_BUILDS)
+	@echo VK_OBJS: $(VK_OBJS)
+	@echo VK_OBJS_FAST: $(VK_OBJS_FAST)
+	@echo VK_OBJS_SLOW: $(VK_OBJS_SLOW)
 	@echo VM_CLASSES_FAST: $(VM_CLASSES_FAST)
 	@echo VM_CLASSES_SLOW: $(VM_CLASSES_SLOW)
-	@echo VM_SUPPORT_FAST: $(VM_SUPPORT_FAST)
-	@echo VM_SUPPORT_SLOW: $(VM_SUPPORT_SLOW)
 	@echo VM_GLOBAL_FAST: $(VM_GLOBAL_FAST)
 	@echo VM_GLOBAL_SLOW: $(VM_GLOBAL_SLOW)
-	@echo VK_OBJS: $(VK_OBJS)
+	@echo VM_PARALLEL_BUILDS:  $(VM_PARALLEL_BUILDS)
+	@echo VM_PREFIX:  $(VM_PREFIX)
+	@echo VM_SUPPORT_FAST: $(VM_SUPPORT_FAST)
+	@echo VM_SUPPORT_SLOW: $(VM_SUPPORT_SLOW)
 	@echo
 
 ######################################################################
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index f31871b65..8124e0ee3 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -228,6 +228,7 @@ set(COMMON_SOURCES
     V3EmitCMain.cpp
     V3EmitCMake.cpp
     V3EmitCModel.cpp
+    V3EmitCPch.cpp
     V3EmitCSyms.cpp
     V3EmitMk.cpp
     V3EmitV.cpp
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 4efc14c87..8c79c0066 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -193,6 +193,7 @@ RAW_OBJS_PCH_ASTMT = \
 	V3EmitCHeaders.o \
 	V3EmitCImp.o \
 	V3EmitCInlines.o \
+	V3EmitCPch.o \
 	V3EmitV.o \
 	V3File.o \
 	V3Global.o \
diff --git a/src/V3EmitC.h b/src/V3EmitC.h
index 4ee9460cf..bbca3be0d 100644
--- a/src/V3EmitC.h
+++ b/src/V3EmitC.h
@@ -27,12 +27,13 @@
 class V3EmitC final {
 public:
     static void emitcConstPool() VL_MT_DISABLED;
+    static void emitcFiles() VL_MT_DISABLED;
     static void emitcHeaders() VL_MT_DISABLED;
     static void emitcImp();
     static void emitcInlines() VL_MT_DISABLED;
     static void emitcModel() VL_MT_DISABLED;
+    static void emitcPch() VL_MT_DISABLED;
     static void emitcSyms(bool dpiHdrOnly = false) VL_MT_DISABLED;
-    static void emitcFiles() VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3EmitCBase.h b/src/V3EmitCBase.h
index 5abf33271..7067f8ed6 100644
--- a/src/V3EmitCBase.h
+++ b/src/V3EmitCBase.h
@@ -55,6 +55,7 @@ public:
         return className + "* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<" + className
                + "*>(voidSelf);\n";
     }
+    static string pchClassName() VL_MT_STABLE { return v3Global.opt.prefix() + "__pch"; }
     static string symClassName() VL_MT_STABLE {
         return v3Global.opt.prefix() + "_" + VIdProtect::protect("_Syms");
     }
@@ -62,6 +63,9 @@ public:
     static string symClassAssign() {
         return symClassName() + "* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;\n";
     }
+    static string topClassName() VL_MT_SAFE {  // Return name of top wrapper module
+        return v3Global.opt.prefix();
+    }
     static string prefixNameProtect(const AstNode* nodep) {  // C++ name with prefix
         return v3Global.opt.modPrefix() + "_" + VIdProtect::protect(nodep->name());
     }
@@ -104,9 +108,6 @@ public:
         return v3Global.opt.protectIds() ? "" : in;
     }
     static string funcNameProtect(const AstCFunc* nodep, const AstNodeModule* modp = nullptr);
-    static string topClassName() VL_MT_SAFE {  // Return name of top wrapper module
-        return v3Global.opt.prefix();
-    }
     static AstCFile* newCFile(const string& filename, bool slow, bool source);
     static AstCFile* createCFile(const string& filename, bool slow, bool source) VL_MT_SAFE;
     string cFuncArgs(const AstCFunc* nodep);
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index e640634c9..e20320052 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -190,11 +190,8 @@ class EmitCImp final : EmitCFunc {
         puts("// DESCRIPTION: Verilator output: Design implementation internals\n");
         puts("// See " + topClassName() + ".h for the primary calling header\n");
 
-        // Include files
-        puts("\n#include \"verilated.h\"\n");
-        if (v3Global.dpi()) puts("#include \"verilated_dpi.h\"\n");
         puts("\n");
-        puts("#include \"" + symClassName() + ".h\"\n");
+        puts("#include \"" + pchClassName() + ".h\"\n");
         for (const string& name : headers) puts("#include \"" + name + ".h\"\n");
 
         emitTextSection(m_modp, VNType::atScImpHdr);
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 53c5339fb..5abad82d7 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -627,14 +627,10 @@ class EmitCModel final : public EmitCFunc {
              "Model implementation (design independent parts)\n");
 
         puts("\n");
-        puts("#include \"" + topClassName() + ".h\"\n");
-        puts("#include \"" + symClassName() + ".h\"\n");
+        puts("#include \"" + pchClassName() + ".h\"\n");
         if (v3Global.opt.trace()) {
             puts("#include \"" + v3Global.opt.traceSourceLang() + ".h\"\n");
         }
-        if (v3Global.dpi()) {  //
-            puts("#include \"verilated_dpi.h\"\n");
-        }
 
         emitConstructorImplementation(modp);
         emitDestructorImplementation();
diff --git a/src/V3EmitCPch.cpp b/src/V3EmitCPch.cpp
new file mode 100644
index 000000000..1cd6ed965
--- /dev/null
+++ b/src/V3EmitCPch.cpp
@@ -0,0 +1,73 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// Code available from: https://verilator.org
+//
+// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+// DESCRIPTION: Verilator: Emit C++ for precompiled header include
+//
+
+#include "V3PchAstMT.h"
+
+#include "V3EmitC.h"
+#include "V3EmitCBase.h"
+#include "V3File.h"
+
+VL_DEFINE_DEBUG_FUNCTIONS;
+
+//######################################################################
+// Precompiled header emitter
+
+class EmitCPch final : EmitCBase {
+public:
+    // METHODS
+
+    void emitPch() {
+        // Generate the makefile
+        V3OutCFile of{v3Global.opt.makeDir() + "/" + pchClassName() + ".h"};
+        of.putsHeader();
+        of.puts("// DESCRIPTION: Verilator output: Precompiled header\n");
+        of.puts("//\n");
+        of.puts("// Internal details; most user sources do not need this header,\n");
+        of.puts("// unless using verilator public meta comments.\n");
+        of.puts("// Suggest use " + topClassName() + ".h instead.\n");
+        of.puts("\n");
+
+        of.putsGuard();
+
+        of.puts("\n");
+        of.puts("// GCC and Clang only will precompile headers (PCH) for the first header.\n");
+        of.puts("// So, make sure this is the one and only PCH.\n");
+        of.puts("// If multiple module's includes are needed, use individual includes.\n");
+        of.puts("#ifdef VL_PCH_INCLUDED\n");
+        of.puts("# error \"Including multiple precompiled header files\"\n");
+        of.puts("#endif\n");
+        of.puts("#define VL_PCH_INCLUDED\n");
+
+        of.puts("\n");
+        of.puts("\n#include \"verilated.h\"\n");
+        if (v3Global.dpi()) of.puts("#include \"verilated_dpi.h\"\n");
+
+        of.puts("\n");
+        of.puts("#include \"" + symClassName() + ".h\"\n");
+        of.puts("#include \"" + topClassName() + ".h\"\n");
+
+        of.putsEndGuard();
+    }
+
+public:
+    explicit EmitCPch() { emitPch(); }
+};
+
+//######################################################################
+// EmitC static functions
+
+void V3EmitC::emitcPch() {
+    UINFO(2, __FUNCTION__ << ": " << endl);
+    EmitCPch{};
+}
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 4642ac016..8ac652a4b 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -606,7 +606,7 @@ void EmitCSyms::emitSymImpPreamble() {
     puts("\n");
 
     // Includes
-    puts("#include \"" + symClassName() + ".h\"\n");
+    puts("#include \"" + pchClassName() + ".h\"\n");
     puts("#include \"" + topClassName() + ".h\"\n");
     for (AstNodeModule* nodep = v3Global.rootp()->modulesp(); nodep;
          nodep = VN_AS(nodep->nextp(), NodeModule)) {
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index e5ba41c55..1a4c0bdc6 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -559,6 +559,7 @@ static void process() {
             V3EmitC::emitcSyms();
             V3EmitC::emitcConstPool();
             V3EmitC::emitcModel();
+            V3EmitC::emitcPch();
             V3EmitC::emitcHeaders();
         } else if (v3Global.opt.dpiHdrOnly()) {
             V3EmitC::emitcSyms(true);
diff --git a/test_regress/t/t_trace_noflag_bad.out b/test_regress/t/t_trace_noflag_bad.out
index e8156e0c9..66a2974a8 100644
--- a/test_regress/t/t_trace_noflag_bad.out
+++ b/test_regress/t/t_trace_noflag_bad.out
@@ -1,2 +1,2 @@
-%Error: Vt_trace_noflag_bad.cpp:106: 'Vt_trace_noflag_bad::trace()' called on model that was Verilated without --trace option
+%Error: Vt_trace_noflag_bad.cpp:105: 'Vt_trace_noflag_bad::trace()' called on model that was Verilated without --trace option
 Aborting...

From 493f1da2664c151aab135cf1d0783f011ffeb6e5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 08:09:42 -0400
Subject: [PATCH 090/157] Fix compile warning on unused member function
 variable (#4567).

---
 Changes                                   |  1 +
 configure.ac                              |  7 +++---
 test_regress/t/t_class_func_arg_unused.pl | 21 ++++++++++++++++
 test_regress/t/t_class_func_arg_unused.v  | 29 +++++++++++++++++++++++
 4 files changed, 55 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_class_func_arg_unused.pl
 create mode 100644 test_regress/t/t_class_func_arg_unused.v

diff --git a/Changes b/Changes
index 54ec9600e..c174db240 100644
--- a/Changes
+++ b/Changes
@@ -41,6 +41,7 @@ Verilator 5.017 devel
 * Fix broken link error for enum references (#4551). [Anthony Donlon]
 * Fix instance arrays connecting to array of structs (#4557). [raphmaster]
 * Fix shift to remove operation side effects (#4563).
+* Fix compile warning on unused member function variable (#4567).
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/configure.ac b/configure.ac
index f0c79da98..4620e3b47 100644
--- a/configure.ac
+++ b/configure.ac
@@ -443,14 +443,15 @@ m4_foreach([cflag],[
         [-Qunused-arguments],
         [-Wno-bool-operation],
         [-Wno-constant-logical-operand],
-        [-Wno-tautological-bitwise-compare],
         [-Wno-parentheses-equality],
+        [-Wno-shadow],
         [-Wno-sign-compare],
+        [-Wno-tautological-bitwise-compare],
         [-Wno-uninitialized],
+        [-Wno-unused-but-set-parameter],
         [-Wno-unused-but-set-variable],
         [-Wno-unused-parameter],
-        [-Wno-unused-variable],
-        [-Wno-shadow]],[
+        [-Wno-unused-variable]],[
     _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_NO_UNUSED,cflag)
     # CMake will test what flags work itself, so pass all flags through to it
     CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE cflag"
diff --git a/test_regress/t/t_class_func_arg_unused.pl b/test_regress/t/t_class_func_arg_unused.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_class_func_arg_unused.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_func_arg_unused.v b/test_regress/t/t_class_func_arg_unused.v
new file mode 100644
index 000000000..0907ebe33
--- /dev/null
+++ b/test_regress/t/t_class_func_arg_unused.v
@@ -0,0 +1,29 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+package uvm_pkg;
+
+class uvm_reg_field; // extends uvm_object;
+   function void configure(bit overde, bit is_rand);
+      if (overde) is_rand = 0;
+      if (!is_rand) ;   // value.rand_mode(0);
+      // See issue #4567
+   endfunction
+endclass
+
+endpackage
+
+module t(/*AUTOARG*/);
+
+   initial begin
+      uvm_pkg::uvm_reg_field c = new;
+      c.configure(1, 0);
+      c.configure(0, 0);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 263697e4914f64479bb7b00fdc07a369d91ac4f6 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 08:15:55 -0400
Subject: [PATCH 091/157] Commentary (#4580)

---
 include/verilated.mk.in | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index 49837598b..59a94486f 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -259,9 +259,11 @@ $(VM_PREFIX)__ALL.a: $(VK_OBJS) $(VM_HIER_LIBS)
 ### Compile rules
 
 ifneq ($(VM_DEFAULT_RULES),0)
-# Anything not in $(VK_OBJS_SLOW) or $(VK_GLOBAL_OBJS), including verilated.o
-# and user files passed on the Verilator command line use this rule.
-# We put OPT_FAST/OPT_SLOW/OPT_GLOBAL before the other flags to
+# Compilation rule for anything not in $(VK_OBJS_FAST), $(VK_OBJS_SLOW), or
+# $(VK_GLOBAL_OBJS) including verilated.o.  This typically means user files
+# passed on the Verilator command line.
+#
+# These rules put OPT_FAST/OPT_SLOW/OPT_GLOBAL before the other flags to
 # allow USER_CPPFLAGS to override them
 %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
@@ -276,8 +278,8 @@ $(VK_GLOBAL_OBJS): %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_GLOBAL) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
 # Precompile a header file
-# PCH's compiler flags must match exactly the fast/slow arguments used in the .cpp file,
-# or the PCH file won't be used.
+# PCH's compiler flags must match exactly the rules' above FAST/SLOW
+# arguments used for the .cpp files, or the PCH file won't be used.
 %.fast.gch: %
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
 %.slow.gch: %

From 8720841c487054b0f2ef37599f17ab1b5dd7ce6c Mon Sep 17 00:00:00 2001
From: Krzysztof Bieganski <kbieganski@antmicro.com>
Date: Wed, 18 Oct 2023 22:49:20 +0200
Subject: [PATCH 092/157] Fix to not remap local assign intravals in forks
 (#4583)

---
 src/V3SchedTiming.cpp              | 18 +++++++++++-------
 test_regress/t/t_fork_jumpblock.pl | 23 +++++++++++++++++++++++
 test_regress/t/t_fork_jumpblock.v  | 23 +++++++++++++++++++++++
 3 files changed, 57 insertions(+), 7 deletions(-)
 create mode 100755 test_regress/t/t_fork_jumpblock.pl
 create mode 100644 test_regress/t/t_fork_jumpblock.v

diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index 56a89ed24..3a8dd6b89 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -289,13 +289,17 @@ void transformForks(AstNetlist* const netlistp) {
                 AstVar* const varp = refp->varp();
                 AstBasicDType* const dtypep = varp->dtypep()->basicp();
                 bool passByValue = false;
-                if (VString::startsWith(varp->name(), "__Vintra")) {
-                    // Pass it by value to the new function, as otherwise there are issues with
-                    // -flocalize (see t_timing_intra_assign)
-                    passByValue = true;
-                } else if (!varp->user1() || !varp->isFuncLocal()) {
-                    // Not func local, or not declared before the fork. Their lifetime is longer
-                    // than the forked process. Skip
+                if (!varp->isFuncLocal()) {
+                    if (VString::startsWith(varp->name(), "__Vintra")) {
+                        // Pass it by value to the new function, as otherwise there are issues with
+                        // -flocalize (see t_timing_intra_assign)
+                        passByValue = true;
+                    } else {
+                        // Not func local. Its lifetime is longer than the forked process. Skip
+                        return;
+                    }
+                } else if (!varp->user1()) {
+                    // Not declared before the fork. It cannot outlive the forked process
                     return;
                 } else if (dtypep && dtypep->isForkSync()) {
                     // We can just pass it by value to the new function
diff --git a/test_regress/t/t_fork_jumpblock.pl b/test_regress/t/t_fork_jumpblock.pl
new file mode 100755
index 000000000..bc632ee01
--- /dev/null
+++ b/test_regress/t/t_fork_jumpblock.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_fork_jumpblock.v b/test_regress/t/t_fork_jumpblock.v
new file mode 100644
index 000000000..13ef8e9f3
--- /dev/null
+++ b/test_regress/t/t_fork_jumpblock.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class bar;
+    task foo(logic r);
+        int a, b;
+        if (r) return;
+        fork a = #1 b; join_none
+    endtask
+endclass
+
+module t;
+    bar b = new;
+
+    initial begin
+        b.foo(0);
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+endmodule

From b7233d063f788b8bc354cd2346160c50223436d2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 17:36:09 -0400
Subject: [PATCH 093/157] Internals: Fix same() called outside of sameTree
 (#4561).

---
 src/V3Ast.h        | 8 +++++++-
 src/V3AstNodes.cpp | 2 +-
 src/V3Const.cpp    | 2 +-
 src/V3Gate.cpp     | 2 +-
 src/V3Reloop.cpp   | 6 +++---
 src/V3Slice.cpp    | 2 +-
 6 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 8c6282876..2bc4fe06d 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1773,6 +1773,9 @@ protected:
         UASSERT_STATIC(s_cloneCntGbl, "Rollover");
     }
 
+    // Use instead isSame(), this is for each Ast* class, and assumes node is of same type
+    virtual bool same(const AstNode*) const { return true; }
+
 public:
     // ACCESSORS
     VNType type() const VL_MT_SAFE { return m_type; }
@@ -2137,7 +2140,10 @@ public:
     // statement is unlikely to be taken
     virtual bool isUnlikely() const { return false; }
     virtual int instrCount() const { return 0; }
-    virtual bool same(const AstNode*) const { return true; }
+    // Iff node is identical to anouther node
+    virtual bool isSame(const AstNode* samep) const {
+        return type() == samep->type() && same(samep);
+    }
     // Iff has a data type; dtype() must be non null
     virtual bool hasDType() const VL_MT_SAFE { return false; }
     // Iff has a non-null childDTypep(), as generic node function
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 5af783789..bddc62d9d 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1701,7 +1701,7 @@ AstNodeUOrStructDType* AstMemberDType::getChildStructp() const {
 
 bool AstMemberSel::same(const AstNode* samep) const {
     const AstMemberSel* const sp = VN_DBG_AS(samep, MemberSel);
-    return sp != nullptr && access() == sp->access() && fromp()->same(sp->fromp())
+    return sp != nullptr && access() == sp->access() && fromp()->isSame(sp->fromp())
            && name() == sp->name() && varp()->same(sp->varp());
 }
 
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index d42bb07b0..1e3685e5b 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1434,7 +1434,7 @@ private:
             // Avoid comparing widthMin's, which results in lost optimization attempts
             // If cleanup sameGateTree to be smarter, this can be restored.
             // return node1p->sameGateTree(node2p);
-            return node1p->same(node2p);
+            return node1p->isSame(node2p);
         } else {
             return false;
         }
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index 0f0bb61cc..a641b1e9f 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -1000,7 +1000,7 @@ static void eliminate(AstNode* logicp,
         // Substitute in the new tree
         UASSERT_OBJ(nodep->access().isReadOnly(), nodep,
                     "Can't replace lvalue assignments with const var");
-        UASSERT_OBJ(!(VN_IS(substp, NodeVarRef) && nodep->same(substp)),
+        UASSERT_OBJ(!(VN_IS(substp, NodeVarRef) && nodep->isSame(substp)),
                     // Prevent an infinite loop...
                     substp, "Replacing node with itself; perhaps circular logic?");
         // The replacement
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index 55f07fe35..9700bce27 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -207,10 +207,10 @@ private:
         if (m_mgSelLp) {  // Old merge
             if (m_mgCfuncp == m_cfuncp  // In same function
                 && m_mgNextp == nodep  // Consecutive node
-                && m_mgVarrefLp->same(lvarrefp)  // Same array on left hand side
+                && m_mgVarrefLp->isSame(lvarrefp)  // Same array on left hand side
                 && (m_mgConstRp  // On the right hand side either ...
-                        ? (rconstp && m_mgConstRp->same(rconstp))  // ... same constant
-                        : (rselp && m_mgVarrefRp->same(rvarrefp)))  // ... or same array
+                        ? (rconstp && m_mgConstRp->isSame(rconstp))  // ... same constant
+                        : (rselp && m_mgVarrefRp->isSame(rvarrefp)))  // ... or same array
                 && (lindex == m_mgIndexLo - 1 || lindex == m_mgIndexHi + 1)  // Left index +/- 1
                 && (m_mgConstRp || lindex == rindex + m_mgOffset)  // Same right index offset
             ) {
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 0076094e0..cc479b95c 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -135,7 +135,7 @@ class SliceVisitor final : public VNVisitor {
                     const AstUnpackArrayDType* const itemDTypep
                         = VN_CAST(itemRawDTypep, UnpackArrayDType);
                     if (!itemDTypep
-                        || !expectedItemDTypep->same(itemDTypep->subDTypep()->skipRefp())) {
+                        || !expectedItemDTypep->isSame(itemDTypep->subDTypep()->skipRefp())) {
                         if (!m_assignError) {
                             itemp->v3error("Item is incompatible with the array type.");
                         }

From 0c2bab1f69284afb8b6e744253a5dda098ecc26f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Oct 2023 17:51:25 -0400
Subject: [PATCH 094/157] Fix method narrowing conversion compiler error
 (#4568).

---
 Changes                              |  1 +
 src/V3Cast.cpp                       |  5 +++
 src/V3EmitCFunc.h                    |  4 ++
 test_regress/t/t_struct_cons_cast.pl | 21 ++++++++++
 test_regress/t/t_struct_cons_cast.v  | 57 ++++++++++++++++++++++++++++
 5 files changed, 88 insertions(+)
 create mode 100755 test_regress/t/t_struct_cons_cast.pl
 create mode 100644 test_regress/t/t_struct_cons_cast.v

diff --git a/Changes b/Changes
index c174db240..873f5d1c3 100644
--- a/Changes
+++ b/Changes
@@ -42,6 +42,7 @@ Verilator 5.017 devel
 * Fix instance arrays connecting to array of structs (#4557). [raphmaster]
 * Fix shift to remove operation side effects (#4563).
 * Fix compile warning on unused member function variable (#4567).
+* Fix method narrowing conversion compiler error (#4568).
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 0290c944e..871ba5b16 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -162,6 +162,11 @@ private:
         ensureLower32Cast(nodep);
         nodep->user1(1);
     }
+    void visit(AstConsPackMember* nodep) override {
+        iterateChildren(nodep);
+        if (VN_IS(nodep->rhsp()->dtypep()->skipRefp(), BasicDType)) ensureCast(nodep->rhsp());
+        nodep->user1(1);
+    }
     void visit(AstExprStmt* nodep) override {
         iterateChildren(nodep);
         nodep->user1(1);
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 871ec3624..0de6e001b 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -1130,6 +1130,10 @@ public:
         // Extending a value of the same word width is just a NOP.
         if (const AstClassRefDType* const classDtypep = VN_CAST(nodep->dtypep(), ClassRefDType)) {
             puts("(" + classDtypep->cType("", false, false) + ")(");
+        } else if (nodep->size() <= VL_BYTESIZE) {
+            puts("(CData)(");
+        } else if (nodep->size() <= VL_SHORTSIZE) {
+            puts("(SData)(");
         } else if (nodep->size() <= VL_IDATASIZE) {
             puts("(IData)(");
         } else {
diff --git a/test_regress/t/t_struct_cons_cast.pl b/test_regress/t/t_struct_cons_cast.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_struct_cons_cast.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_struct_cons_cast.v b/test_regress/t/t_struct_cons_cast.v
new file mode 100644
index 000000000..f821b2f33
--- /dev/null
+++ b/test_regress/t/t_struct_cons_cast.v
@@ -0,0 +1,57 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+class uvm_policy;
+   typedef enum {
+                 NEVER,
+                 STARTED,
+                 FINISHED
+                 } recursion_state_e;
+endclass
+
+typedef enum {
+              UVM_DEFAULT_POLICY = 0,
+              UVM_DEEP           = (1<<16),
+              UVM_SHALLOW        = (1<<17),
+              UVM_REFERENCE      = (1<<18)
+              } uvm_recursion_policy_enum;
+
+class Cls;
+   typedef struct {
+      uvm_policy::recursion_state_e state;
+      bit         ret_val;
+   } state_info_t;
+
+   state_info_t m_recur_states/*[uvm_object][uvm_object]*/[uvm_recursion_policy_enum];
+
+   automatic function uvm_recursion_policy_enum get_recursion_policy();
+      return UVM_DEEP;
+   endfunction
+
+   automatic function bit get_ret_val();
+      return $c(1);
+   endfunction
+
+   automatic function void test();
+      bit ret_val;
+      ret_val = $c1(1);
+      // See issue #4568
+      m_recur_states[get_recursion_policy()] = '{uvm_policy::FINISHED, ret_val};
+   endfunction
+
+endclass
+
+module t;
+
+   initial begin
+      Cls c;
+      c = new;
+      $display("%p", c);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 5af271cf3af2a2276530e347dfb1a03493fd8632 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 19 Oct 2023 18:33:58 -0400
Subject: [PATCH 095/157] Fix display optimization ignoring side effects
 (#4585).

---
 Changes                             |  1 +
 src/V3Ast.h                         |  2 ++
 src/V3Const.cpp                     |  2 ++
 test_regress/t/t_display_impure.out |  3 +++
 test_regress/t/t_display_impure.pl  | 24 ++++++++++++++++++++++++
 test_regress/t/t_display_impure.v   | 19 +++++++++++++++++++
 6 files changed, 51 insertions(+)
 create mode 100644 test_regress/t/t_display_impure.out
 create mode 100755 test_regress/t/t_display_impure.pl
 create mode 100644 test_regress/t/t_display_impure.v

diff --git a/Changes b/Changes
index 873f5d1c3..7ec977f93 100644
--- a/Changes
+++ b/Changes
@@ -43,6 +43,7 @@ Verilator 5.017 devel
 * Fix shift to remove operation side effects (#4563).
 * Fix compile warning on unused member function variable (#4567).
 * Fix method narrowing conversion compiler error (#4568).
+* Fix display optimization ignoring side effects (#4585).
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 2bc4fe06d..a17cc84e0 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2132,6 +2132,8 @@ public:
     virtual bool isPredictOptimizable() const { return !isTimingControl(); }
     // Else a $display, etc, that must be ordered with other displays
     virtual bool isPure() { return true; }
+    // Iff isPure on current node and any nextp()
+    bool isPureAndNext() { return isPure() && (!nextp() || nextp()->isPure()); }
     // Else a AstTime etc that can't be substituted out
     virtual bool isSubstOptimizable() const { return true; }
     // An event control, delay, wait, etc.
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 1e3685e5b..bb68a436b 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -3149,6 +3149,8 @@ private:
         // right line numbers, nor scopeNames as might be different scopes (late in process)
         if (!m_doCpp && pformatp->exprsp()) return false;
         if (!m_doCpp && nformatp->exprsp()) return false;
+        if (pformatp->exprsp() && !pformatp->exprsp()->isPureAndNext()) return false;
+        if (nformatp->exprsp() && !nformatp->exprsp()->isPureAndNext()) return false;
         // Avoid huge merges
         static constexpr int DISPLAY_MAX_MERGE_LENGTH = 500;
         if (pformatp->text().length() + nformatp->text().length() > DISPLAY_MAX_MERGE_LENGTH)
diff --git a/test_regress/t/t_display_impure.out b/test_regress/t/t_display_impure.out
new file mode 100644
index 000000000..fcf5005f5
--- /dev/null
+++ b/test_regress/t/t_display_impure.out
@@ -0,0 +1,3 @@
+          1
+          2
+*-* All Finished *-*
diff --git a/test_regress/t/t_display_impure.pl b/test_regress/t/t_display_impure.pl
new file mode 100755
index 000000000..61f6d3396
--- /dev/null
+++ b/test_regress/t/t_display_impure.pl
@@ -0,0 +1,24 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(linter => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_display_impure.v b/test_regress/t/t_display_impure.v
new file mode 100644
index 000000000..ad24975d3
--- /dev/null
+++ b/test_regress/t/t_display_impure.v
@@ -0,0 +1,19 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+function integer f;
+   static integer i = 0;
+   return ++i;
+endfunction
+
+module t;
+   initial begin
+      $display("%d", f());
+      $display("%d", f());
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From a773a525593a2a1dc8f90885230b68cc03a2223f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 19 Oct 2023 19:26:36 -0400
Subject: [PATCH 096/157] Cleanup some IEEE references

---
 docs/guide/warnings.rst                            |  2 +-
 include/verilated.cpp                              |  2 +-
 src/V3Assert.cpp                                   |  2 +-
 src/V3AssertPre.cpp                                |  2 +-
 src/V3LinkDot.cpp                                  |  2 +-
 src/V3LinkParse.cpp                                |  4 ++--
 src/V3Number.cpp                                   |  4 ++--
 test_regress/t/t_assert_disable_bad.v              |  2 +-
 test_regress/t/t_assert_procedural_clk.out         |  4 ++--
 test_regress/t/t_class_param_enum_bad.v            |  2 +-
 test_regress/t/t_event_copy.v                      |  2 +-
 test_regress/t/t_interface_import_param.v          |  2 +-
 test_regress/t/t_math_arith.v                      |  2 +-
 test_regress/t/t_param_array3.v                    |  2 +-
 test_regress/t/t_queue_method.v                    |  2 +-
 test_regress/t/t_stream_integer_type_unsup.v       |  2 +-
 test_regress/t/t_structu_dataType_assignment.v     | 10 +++++-----
 test_regress/t/t_structu_dataType_assignment_bad.v |  2 +-
 test_regress/t/t_sys_readmem_bad_end.out           |  2 +-
 19 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 2691e9acf..0a85765c7 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1174,7 +1174,7 @@ List Of Warnings
 
    Warns that a feature requires a newer standard of Verilog or SystemVerilog
    than the one specified by the :vlopt:`--language` option. For example, unsized
-   unbased literals (`'0`, `'1`, `'z`, `'x`) require 1800-2005 or later.
+   unbased literals (`'0`, `'1`, `'z`, `'x`) require IEEE 1800-2005 or later.
 
    To avoid this warning, use a Verilog or SystemVerilog standard that
    supports the feature. Alternatively, modify your code to use a different
diff --git a/include/verilated.cpp b/include/verilated.cpp
index 41a1df170..0794d4dd2 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -2094,7 +2094,7 @@ bool VlReadMem::get(QData& addrr, std::string& valuer) {
 
     if (VL_UNLIKELY(m_end != ~0ULL && m_addr <= m_end && !m_anyAddr)) {
         VL_WARN_MT(m_filename.c_str(), m_linenum, "",
-                   "$readmem file ended before specified final address (IEEE 2017 21.4)");
+                   "$readmem file ended before specified final address (IEEE 1800-2017 21.4)");
     }
 
     return false;  // EOF
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index 3f8278e5b..f99a9ced8 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -154,7 +154,7 @@ private:
             if (m_procedurep) {
                 // To support this need queue of asserts to activate
                 nodep->v3error("Unsupported: Procedural concurrent assertion with"
-                               " clocking event inside always (IEEE 1800-2917 16.14.6)");
+                               " clocking event inside always (IEEE 1800-2017 16.14.6)");
             }
         }
         //
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index d0689361f..c06f3b93f 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -15,7 +15,7 @@
 //*************************************************************************
 //  Pre steps:
 //      Attach clocks to each assertion
-//      Substitute property references by property body (IEEE Std 1800-2012, section 16.12.1).
+//      Substitute property references by property body (IEEE 1800-2012 16.12.1).
 //      Transform clocking blocks into imperative logic
 //*************************************************************************
 
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 473545166..a6f052659 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2127,7 +2127,7 @@ private:
                          new AstNew{fl, nullptr}};
         AstNodeStmt* const superNewStmtp = superNewp->makeStmt();
         for (AstNode* stmtp = nodep->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
-            // super.new shall be the first statement (section 8.15 of IEEE Std 1800-2017)
+            // super.new shall be the first statement (IEEE 1800-2017 8.15)
             // but some nodes (such as variable declarations and typedefs) should stay before
             if (VN_IS(stmtp, NodeStmt)) {
                 stmtp->addHereThisAsNext(superNewStmtp);
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index b3371c2a3..9c9b349e2 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -573,8 +573,8 @@ private:
         } else if (VN_IS(bracketp, SelLoopVars)) {
             // Ok
         } else {
-            nodep->v3error("Syntax error; foreach missing bracketed loop variable (IEEE "
-                           "1800-2017 12.7.3)");
+            nodep->v3error("Syntax error; foreach missing bracketed loop variable"
+                           " (IEEE 1800-2017 12.7.3)");
             VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
             return;
         }
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index acc6e6639..91403a532 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -252,8 +252,8 @@ void V3Number::create(const char* sourcep) {
                                 << width() << " bit number: " << sourcep << '\n'
                                 << ((!sized() && !warned++) ? (
                                         V3Error::warnMore() + "... As that number was unsized"
-                                        + " ('d...) it is limited to 32 bits (IEEE 1800-2017 "
-                                          "5.7.1)\n"
+                                        + " ('d...) it is limited to 32 bits"
+                                          " (IEEE 1800-2017 5.7.1)\n"
                                         + V3Error::warnMore() + "... Suggest adding a size to it.")
                                                             : ""));
                         while (*(cp + 1)) cp++;  // Skip ahead so don't get multiple warnings
diff --git a/test_regress/t/t_assert_disable_bad.v b/test_regress/t/t_assert_disable_bad.v
index cb0f84b7d..07b3bc342 100644
--- a/test_regress/t/t_assert_disable_bad.v
+++ b/test_regress/t/t_assert_disable_bad.v
@@ -23,6 +23,6 @@ module t (/*AUTOARG*/
    endproperty
 
    // Test should fail due to duplicated disable iff statements
-   // (IEEE Std 1800-2012, section 16.12.1).
+   // (IEEE 1800-2012 16.12.1).
    assert property (disable iff (val == 0) check(1, 1));
 endmodule
diff --git a/test_regress/t/t_assert_procedural_clk.out b/test_regress/t/t_assert_procedural_clk.out
index 98cbce1d6..365914727 100644
--- a/test_regress/t/t_assert_procedural_clk.out
+++ b/test_regress/t/t_assert_procedural_clk.out
@@ -1,8 +1,8 @@
-%Error: t/t_assert_procedural_clk.v:21:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2917 16.14.6)
+%Error: t/t_assert_procedural_clk.v:21:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2017 16.14.6)
                                          : ... note: In instance 't'
    21 |             assume property (@(posedge clk) cyc == 9);
       |             ^~~~~~
-%Error: t/t_assert_procedural_clk.v:22:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2917 16.14.6)
+%Error: t/t_assert_procedural_clk.v:22:13: Unsupported: Procedural concurrent assertion with clocking event inside always (IEEE 1800-2017 16.14.6)
                                          : ... note: In instance 't'
    22 |             assume property (@(negedge clk) cyc == 9);
       |             ^~~~~~
diff --git a/test_regress/t/t_class_param_enum_bad.v b/test_regress/t/t_class_param_enum_bad.v
index 55b5e824c..8a3fe88bb 100644
--- a/test_regress/t/t_class_param_enum_bad.v
+++ b/test_regress/t/t_class_param_enum_bad.v
@@ -15,7 +15,7 @@ endclass
 module t;
    initial begin
       Converter#(enum_t) conv1 = new;
-      // enum types does not match with other types (sections 6.22.1 and 6.22.4 of IEEE Std 1800-2017)
+      // enum types does not match with other types (IEEE 1800-2017 6.22.1 and 6.22.4)
       // The assignment and the function call should throw an error.
       Converter#(bit) conv2 = conv1;
       conv1.toInt(0);
diff --git a/test_regress/t/t_event_copy.v b/test_regress/t/t_event_copy.v
index 7a26fb3d9..88882259f 100644
--- a/test_regress/t/t_event_copy.v
+++ b/test_regress/t/t_event_copy.v
@@ -99,7 +99,7 @@ module t(/*AUTOARG*/
          // are ever pointed to by an EVENTREF.
          e4 = e3;  // Old handle to e4
          e3 = e2;  // Same event, also triggers e2
-         // IEEE 2017 15.5.5.1 says that this causes a merge, and the below
+         // IEEE 1800-2017 15.5.5.1 says that this causes a merge, and the below
          // should also activate the "old e3".  However we could not find any
          // simulator that actually does this.  Instead the "old e3" becomes
          // unreachable (via old handle), but is reachable by "e4" as assigned
diff --git a/test_regress/t/t_interface_import_param.v b/test_regress/t/t_interface_import_param.v
index 82969649d..043c9d184 100644
--- a/test_regress/t/t_interface_import_param.v
+++ b/test_regress/t/t_interface_import_param.v
@@ -1,7 +1,7 @@
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // A test that a package import declaration can preceed a parameter port list
-// in an interface declaration. See 25.3 of the 1800-2017 LRM.
+// in an interface declaration. See IEEE 1800-2017 25.3.
 //
 // This file ONLY is placed into the Public Domain, for any use,
 // without warranty, 2013 by Jeremy Bennett.
diff --git a/test_regress/t/t_math_arith.v b/test_regress/t/t_math_arith.v
index f2c1d366e..4477c931e 100644
--- a/test_regress/t/t_math_arith.v
+++ b/test_regress/t/t_math_arith.v
@@ -159,7 +159,7 @@ module t (/*AUTOARG*/
          if (bug764_p11 !== 4'b000x) $stop;
          if (~& bug764_p11 !== 1'b1) $stop;
          //verilator lint_on WIDTH
-         // However IEEE 2017 5.7.1 says for constants that smaller-sizes do extend
+         // However IEEE 1800-2017 5.7.1 says for constants that smaller-sizes do extend
          if (4'bx !== 4'bxxxx) $stop;
          if (4'bz !== 4'bzzzz) $stop;
          if (4'b1 !== 4'b0001) $stop;
diff --git a/test_regress/t/t_param_array3.v b/test_regress/t/t_param_array3.v
index 667276578..fe38c5ecd 100644
--- a/test_regress/t/t_param_array3.v
+++ b/test_regress/t/t_param_array3.v
@@ -25,7 +25,7 @@ module t;
       if (SUMS[1] != 4+3) $stop;
       if (SUMS[2] != 4+3+2) $stop;
       if (SUMS[3] != 4+3+2+1) $stop;
-      // According to section 13.4.3 of IEEE Std 1800-2017,
+      // According to IEEE 1800-2017 13.4.3
       // execution at elaboration has no effect on the initial values
       // of the variables used either at simulation time or among
       // multiple invocations of a function at elaboration time
diff --git a/test_regress/t/t_queue_method.v b/test_regress/t/t_queue_method.v
index 090ac5a9f..fb05890bb 100644
--- a/test_regress/t/t_queue_method.v
+++ b/test_regress/t/t_queue_method.v
@@ -81,7 +81,7 @@ module t (/*AUTOARG*/);
       string_qv = string_q.unique(s) with (s.toupper);
       `checkh(string_qv.size(), 2);
       qi = q.unique_index; qv.sort;
-      // According to 7.12.1 of IEEE Std 1800-2017, it is not specified which index of duplicated value should be returned
+      // According to IEEE 1800-2017 7.12.1, it is not specified which index of duplicated value should be returned
       `checkh(qi.size(), 4);
       qi.delete(1);
       v = $sformatf("%p", qi); `checks(v, "'{'h0, 'h3, 'h4} ");
diff --git a/test_regress/t/t_stream_integer_type_unsup.v b/test_regress/t/t_stream_integer_type_unsup.v
index bb7c94533..91dec557e 100644
--- a/test_regress/t/t_stream_integer_type_unsup.v
+++ b/test_regress/t/t_stream_integer_type_unsup.v
@@ -1,5 +1,5 @@
 // DESCRIPTION: Verilator: Verilog Test module
-// Ref. to  IEEE Std 1800-2017  11.4.14 & A.8.1
+// Ref. to IEEE 1800-2017 11.4.14 & A.8.1
 //
 // stream pack/unpack for integer_type only
 // slice_size ::= simple_type | constant_expression
diff --git a/test_regress/t/t_structu_dataType_assignment.v b/test_regress/t/t_structu_dataType_assignment.v
index 5839b375a..6f6a32d44 100644
--- a/test_regress/t/t_structu_dataType_assignment.v
+++ b/test_regress/t/t_structu_dataType_assignment.v
@@ -8,17 +8,17 @@
 
 module top();
 
-  typedef struct { // IEEE 1800-2017 SV CH:5.10
+  typedef struct { // IEEE 1800-2017 5.10
     int a;
     shortint b;
   } ab_struct;
 
-  typedef struct { // IEEE 1800-2017 SV CH:10.9.2
+  typedef struct { // IEEE 1800-2017 10.9.2
   int x;
   int y;
   } st_struct;
 
-  typedef struct { // IEEE 1800-2017 SV CH:10.9.2
+  typedef struct { // IEEE 1800-2017 10.9.2
     logic [7:0] a;
     bit b;
     bit signed [31:0] c;
@@ -26,7 +26,7 @@ module top();
   } sa_struct;
 
 
-  typedef struct { // IEEE 1800-2017 SV CH:10.9.2
+  typedef struct { // IEEE 1800-2017 10.9.2
     int A;
     struct {
     int B, C;
@@ -34,7 +34,7 @@ module top();
   } DEF_struct;
 
 
-  typedef struct { // IEEE 1800-2017 SV CH:10.9.2
+  typedef struct { // IEEE 1800-2017 10.9.2
     int A;
     struct {
       int B, C;
diff --git a/test_regress/t/t_structu_dataType_assignment_bad.v b/test_regress/t/t_structu_dataType_assignment_bad.v
index 6ab523bbf..4733d46ca 100644
--- a/test_regress/t/t_structu_dataType_assignment_bad.v
+++ b/test_regress/t/t_structu_dataType_assignment_bad.v
@@ -9,7 +9,7 @@
 module top();
 
 
-  typedef struct { // IEEE 1800-2017 SV CH:10.9.2
+  typedef struct { // IEEE 1800-2017 10.9.2
     int A;
     struct {
     int B, C;
diff --git a/test_regress/t/t_sys_readmem_bad_end.out b/test_regress/t/t_sys_readmem_bad_end.out
index 4c6aaf01f..a9de0a692 100644
--- a/test_regress/t/t_sys_readmem_bad_end.out
+++ b/test_regress/t/t_sys_readmem_bad_end.out
@@ -1,2 +1,2 @@
-%Warning: t/t_sys_readmem_bad_end.mem:12: $readmem file ended before specified final address (IEEE 2017 21.4)
+%Warning: t/t_sys_readmem_bad_end.mem:12: $readmem file ended before specified final address (IEEE 1800-2017 21.4)
 *-* All Finished *-*

From 4cc42133b51d294e66b22e68bfb93b349fd2b74d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 19 Oct 2023 20:13:27 -0400
Subject: [PATCH 097/157] Internals: Rename some parser rules. No functional
 change.

---
 src/verilog.y | 107 ++++++++++++++++++++++++--------------------------
 1 file changed, 52 insertions(+), 55 deletions(-)

diff --git a/src/verilog.y b/src/verilog.y
index cfc01f62a..3bd0218ab 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1758,7 +1758,7 @@ program_generate_item<nodep>:           // ==IEEE: program_generate_item
         |       generate_region                         { $$ = $1; }
                                 // not in IEEE, but presumed so can do yBEGIN ... yEND
         |       genItemBegin                            { $$ = $1; }
-        |       elaboration_system_task                 { $$ = $1; }
+        |       severity_system_task                    { $$ = $1; }
         ;
 
 extern_tf_declaration<nodep>:           // ==IEEE: extern_tf_declaration
@@ -2397,7 +2397,7 @@ data_declaration<nodep>:        // ==IEEE: data_declaration
         //                      // "yVIRTUAL yID yID" looks just like a data_declaration
         //                      // Therefore the virtual_interface_declaration term isn't used
         //                      // 1800-2009:
-        |       net_type_declaration                    { $$ = $1; }
+        |       nettype_declaration                     { $$ = $1; }
         |       vlTag                                   { $$ = nullptr; }
         ;
 
@@ -2489,15 +2489,15 @@ data_declarationVarFrontClass:  // IEEE: part of data_declaration (for class_pro
         //                      // = class_new is in variable_decl_assignment
         ;
 
-net_type_declaration<nodep>:  // IEEE: net_type_declaration
-                yNETTYPE data_type idAny/*net_type_identifier*/ ';'
+nettype_declaration<nodep>:  // IEEE: nettype_declaration/net_type_declaration
+                yNETTYPE data_type idAny/*nettype_identifier*/ ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: nettype"); }
         //                      // package_scope part of data_type
         |       yNETTYPE data_type idAny yWITH__ETC packageClassScopeE id/*tf_identifier*/ ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: nettype"); }
-        |       yNETTYPE packageClassScopeE id/*net_type_identifier*/ idAny/*net_type_identifier*/ ';'
+        |       yNETTYPE packageClassScopeE id/*nettype_identifier*/ idAny/*nettype_identifier*/ ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: nettype"); }
-        |       yNETTYPE packageClassScopeE id/*net_type_identifier*/ idAny/*net_type_identifier*/
+        |       yNETTYPE packageClassScopeE id/*nettype_identifier*/ idAny/*nettype_identifier*/
         /*cont*/   yWITH__ETC packageClassScopeE id/*tf_identifier*/ ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: nettype"); }
         ;
@@ -2653,7 +2653,7 @@ module_common_item<nodep>:      // ==IEEE: module_common_item
         |       always_construct                        { $$ = $1; }
         |       loop_generate_construct                 { $$ = $1; }
         |       conditional_generate_construct          { $$ = $1; }
-        |       elaboration_system_task                 { $$ = $1; }
+        |       severity_system_task                    { $$ = $1; }
         |       sigAttrScope                            { $$ = nullptr; }
         //
         |       error ';'                               { $$ = nullptr; }
@@ -3222,7 +3222,7 @@ cellpinListE<pinp>:
                 { VARRESET_LIST(UNKNOWN); } cellpinItListE   { $$ = $2; VARRESET_NONLIST(UNKNOWN); }
         ;
 
-cellparamItListE<pinp>:         // IEEE: list_of_parameter_assignmente
+cellparamItListE<pinp>:         // IEEE: list_of_parameter_value_assignments/list_of_parameter_assignments
                 cellparamItemE                          { $$ = $1; }
         |       cellparamItListE ',' cellparamItemE     { $$ = addNextNull($1, $3); }
         ;
@@ -3798,11 +3798,11 @@ case_itemList<caseItemp>:       // IEEE: { case_item + ... }
         |       case_itemList yDEFAULT colon stmtBlock          { $$ = $1->addNext(new AstCaseItem{$2, nullptr, $4}); }
         ;
 
-case_inside_itemList<caseItemp>:        // IEEE: { case_inside_item + open_range_list ... }
-                open_range_list colon stmtBlock                 { $$ = new AstCaseItem{$2, $1, $3}; }
+case_inside_itemList<caseItemp>:        // IEEE: { case_inside_item + range_list ... }
+                range_list colon stmtBlock                      { $$ = new AstCaseItem{$2, $1, $3}; }
         |       yDEFAULT colon stmtBlock                        { $$ = new AstCaseItem{$1, nullptr, $3}; }
         |       yDEFAULT stmtBlock                              { $$ = new AstCaseItem{$1, nullptr, $2}; }
-        |       case_inside_itemList open_range_list colon stmtBlock { $$ = $1->addNext(new AstCaseItem{$3, $2, $4}); }
+        |       case_inside_itemList range_list colon stmtBlock { $$ = $1->addNext(new AstCaseItem{$3, $2, $4}); }
         |       case_inside_itemList yDEFAULT stmtBlock         { $$ = $1->addNext(new AstCaseItem{$2, nullptr, $3}); }
         |       case_inside_itemList yDEFAULT colon stmtBlock   { $$ = $1->addNext(new AstCaseItem{$2, nullptr, $4}); }
         ;
@@ -3813,16 +3813,12 @@ rand_case_itemList<caseItemp>:       // IEEE: { rand_case_item + ... }
         |       rand_case_itemList expr colon stmtBlock         { $$ = $1->addNext(new AstCaseItem{$3, $2, $4}); }
         ;
 
-open_range_list<nodeExprp>:     // ==IEEE: open_range_list + open_value_range
-                open_value_range                        { $$ = $1; }
-        |       open_range_list ',' open_value_range    { $$ = $1->addNext($3); }
-        ;
-
-open_value_range<nodeExprp>:    // ==IEEE: open_value_range
+range_list<nodeExprp>:     // ==IEEE: range_list/open_range_list + value_range/open_value_range
                 value_range                             { $$ = $1; }
+        |       range_list ',' value_range              { $$ = $1->addNext($3); }
         ;
 
-value_range<nodeExprp>:         // ==IEEE: value_range
+value_range<nodeExprp>:         // ==IEEE: value_range/open_value_range
                 expr                                    { $$ = $1; }
         |       '[' expr ':' expr ']'                   { $$ = new AstInsideRange{$1, $2, $4}; }
         ;
@@ -4326,12 +4322,12 @@ system_f_call_or_t<nodeExprp>:      // IEEE: part of system_tf_call (can be task
         |       yD_VALUEPLUSARGS '(' expr ',' expr ')'  { $$ = new AstValuePlusArgs{$1, $3, $5}; }
         ;
 
-elaboration_system_task<nodep>: // IEEE: elaboration_system_task (1800-2009)
+severity_system_task<nodep>: // IEEE: severity_system_task/elaboration_severity_system_task (1800-2009)
         //                      // TODO: These currently just make initial statements, should instead give runtime error
-                elaboration_system_task_guts ';'        { $$ = new AstInitial{$<fl>1, $1}; }
+                severity_system_task_guts ';'           { $$ = new AstInitial{$<fl>1, $1}; }
         ;
 
-elaboration_system_task_guts<nodep>:    // IEEE: part of elaboration_system_task (1800-2009)
+severity_system_task_guts<nodep>:    // IEEE: part of severity_system_task (1800-2009)
         //                      // $fatal first argument is exit number, must be constant
                 yD_INFO parenE                          { $$ = new AstElabDisplay{$1, VDisplayType::DT_INFO, nullptr}; }
         |       yD_INFO '(' exprList ')'                { $$ = new AstElabDisplay{$1, VDisplayType::DT_INFO, $3}; }
@@ -4817,7 +4813,7 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
         |       ~l~expr '?' ~r~expr ':' ~r~expr         { $$ = new AstCond{$2, $1, $3, $5}; }
         //
         //                      // IEEE: inside_expression
-        |       ~l~expr yINSIDE '{' open_range_list '}' { $$ = new AstInside{$2, $1, $4}; }
+        |       ~l~expr yINSIDE '{' range_list '}'      { $$ = new AstInside{$2, $1, $4}; }
         //
         //                      // IEEE: tagged_union_expression
         //UNSUP yTAGGED id/*member*/ %prec prTAGGED             { UNSUP }
@@ -4833,7 +4829,8 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
         //
         //                      // IEEE: "... hierarchical_identifier select"  see below
         //
-        //                      // IEEE: empty_queue (IEEE 1800-2017 empty_unpacked_array_concatenation)
+        //                      // IEEE: empty_unpacked_array_concatenation
+        //                      // IEEE: (aka empty_queue, empty_unpacked_array_concatenation)
         |       '{' '}'                                 { $$ = new AstEmptyQueue{$1}; }
         //
         //                      // IEEE: concatenation/constant_concatenation
@@ -6325,7 +6322,7 @@ boolean_abbrev<nodeExprp>:  // ==IEEE: boolean_abbrev
         |       yP_BRAPLUSKET
                         { $$ = new AstConst{$1, AstConst::BitFalse{}};
                           BBUNSUP($<fl>1, "Unsupported: [+] boolean abbrev expression"); }
-        //                      // IEEE: non_consecutive_repetition
+        //                      // IEEE: nonconsecutive_repetition/non_consecutive_repetition
         |       yP_BRAEQ constExpr ']'
                         { $$ = $2; BBUNSUP($<fl>1, "Unsupported: [= boolean abbrev expression"); }
         |       yP_BRAEQ constExpr ':' constExpr ']'
@@ -6438,13 +6435,13 @@ bins_or_options<nodep>:  // ==IEEE: bins_or_options
         //                      // Superset of IEEE - we allow []'s in more places
                 coverage_option                         { $$ = $1; }
         //                      // Can't use wildcardE as results in conflicts
-        |       bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE
+        |       bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' range_list '}' iffE
                         { $$ = nullptr; BBUNSUP($<fl>4, "Unsupported: cover bin specification"); }
-        |       bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr '}' iffE
+        |       bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' range_list '}' yWITH__CUR '{' cgexpr '}' iffE
                         { $$ = nullptr; BBUNSUP($<fl>8, "Unsupported: cover bin 'with' specification"); }
-        |       yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE
+        |       yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' range_list '}' iffE
                         { $$ = nullptr; BBUNSUP($<fl>5, "Unsupported: cover bin 'wildcard' specification"); }
-        |       yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr '}' iffE
+        |       yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' range_list '}' yWITH__CUR '{' cgexpr '}' iffE
                         { $$ = nullptr; BBUNSUP($<fl>9, "Unsupported: cover bin 'wildcard' 'with' specification"); }
         //
         //                      // cgexpr part of trans_list
@@ -6623,51 +6620,51 @@ hierarchical_btf_identifier<nodep>:  // ==IEEE: hierarchical_btf_identifier
 // Randsequence
 
 randsequence_statement<nodep>:  // ==IEEE: randsequence_statement
-                yRANDSEQUENCE '(' ')' productionList yENDSEQUENCE
+                yRANDSEQUENCE '(' ')' rs_productionList yENDSEQUENCE
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence"); }
-        |       yRANDSEQUENCE '(' id/*production_identifier*/ ')' productionList yENDSEQUENCE
+        |       yRANDSEQUENCE '(' id/*rs_production_identifier*/ ')' rs_productionList yENDSEQUENCE
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence"); }
         ;
 
-productionList<nodep>:  // IEEE: production+
-                production                              { $$ = $1; }
-        |       productionList production               { $$ = addNextNull($1, $2); }
+rs_productionList<nodep>:  // IEEE: rs_production+
+                rs_production                           { $$ = $1; }
+        |       rs_productionList rs_production         { $$ = addNextNull($1, $2); }
         ;
 
-production<nodep>:  // ==IEEE: production
-                productionFront ':' rs_ruleList ';'
+rs_production<nodep>:  // ==IEEE: rs_production
+                rs_productionFront ':' rs_ruleList ';'
                         { // TODO makes a function, probably want a new Ast type instead
                           SYMP->popScope($$);
                           $$ = nullptr; BBUNSUP($<fl>2, "Unsupported: randsequence production"); }
         ;
 
-productionFront<nodeFTaskp>:  // IEEE: part of production
+rs_productionFront<nodeFTaskp>:  // IEEE: part of rs_production
                 funcId/*production_identifier*/         { $$ = $1; }
         |       funcId '(' tf_port_listE ')'            { $$ = $1; $$->addStmtsp($3); }
         ;
 
-rs_ruleList<nodep>:  // IEEE: rs_rule+ part of production
+rs_ruleList<nodep>:  // IEEE: rs_rule+ part of rs_production
                 rs_rule                                 { $$ = $1; }
         |       rs_ruleList '|' rs_rule                 { $$ = addNextNull($1, $3); }
         ;
 
 rs_rule<nodep>:  // ==IEEE: rs_rule
                 rs_production_list                      { $$ = $1; }
-        |       rs_production_list yP_COLONEQ weight_specification
+        |       rs_production_list yP_COLONEQ rs_weight_specification
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence rule"); }
-        |       rs_production_list yP_COLONEQ weight_specification rs_code_block
+        |       rs_production_list yP_COLONEQ rs_weight_specification rs_code_block
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence rule"); }
         ;
 
 rs_production_list<nodep>:  // ==IEEE: rs_production_list
                 rs_prodList                             { $$ = $1; }
-        |       yRAND yJOIN /**/         production_item production_itemList
+        |       yRAND yJOIN rs_production_item rs_production_itemList
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence production list"); }
-        |       yRAND yJOIN '(' expr ')' production_item production_itemList
+        |       yRAND yJOIN '(' expr ')' rs_production_item rs_production_itemList
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence production list"); }
         ;
 
-weight_specification<nodeExprp>:  // ==IEEE: weight_specification
+rs_weight_specification<nodeExprp>:  // ==IEEE: rs_weight_specification
                 intnumAsConst                           { $$ = $1; }
         |       idClassSel/*ps_identifier*/             { $$ = $1; }
         |       '(' expr ')'                            { $$ = $2; }
@@ -6694,27 +6691,27 @@ rs_prodList<nodep>:  // IEEE: rs_prod+
         ;
 
 rs_prod<nodep>:  // ==IEEE: rs_prod
-                production_item                         { $$ = $1; }
+                rs_production_item                       { $$ = $1; }
         |       rs_code_block                           { $$ = $1; }
         //                      // IEEE: rs_if_else
-        |       yIF '(' expr ')' production_item %prec prLOWER_THAN_ELSE
+        |       yIF '(' expr ')' rs_production_item %prec prLOWER_THAN_ELSE
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence if"); }
-        |       yIF '(' expr ')' production_item yELSE production_item
+        |       yIF '(' expr ')' rs_production_item yELSE rs_production_item
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence if"); }
         //                      // IEEE: rs_repeat
-        |       yREPEAT '(' expr ')' production_item
+        |       yREPEAT '(' expr ')' rs_production_item
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence repeat"); }
         //                      // IEEE: rs_case
         |       yCASE '(' expr ')' rs_case_itemList yENDCASE
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence case"); }
         ;
 
-production_itemList<nodep>:  // IEEE: production_item+
-                production_item                         { $$ = $1; }
-        |       production_itemList production_item     { $$ = addNextNull($1, $2); }
+rs_production_itemList<nodep>:  // IEEE: rs_production_item+
+                rs_production_item                         { $$ = $1; }
+        |       rs_production_itemList rs_production_item  { $$ = addNextNull($1, $2); }
         ;
 
-production_item<nodep>:  // ==IEEE: production_item
+rs_production_item<nodep>:  // ==IEEE: rs_production_item
                 id/*production_identifier*/
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence production id"); }
         |       id/*production_identifier*/ '(' list_of_argumentsE ')'
@@ -6727,11 +6724,11 @@ rs_case_itemList<nodep>:  // IEEE: rs_case_item+
         ;
 
 rs_case_item<nodep>:  // ==IEEE: rs_case_item
-                caseCondList ':' production_item ';'
+                caseCondList ':' rs_production_item ';'
                         { $$ = nullptr; BBUNSUP($<fl>2, "Unsupported: randsequence case item"); }
-        |       yDEFAULT production_item ';'
+        |       yDEFAULT rs_production_item ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence case item"); }
-        |       yDEFAULT ':' production_item ';'
+        |       yDEFAULT ':' rs_production_item ';'
                         { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: randsequence case item"); }
         ;
 
@@ -6813,7 +6810,7 @@ checker_generate_item<nodep>:  // ==IEEE: checker_generate_item
         |       c_conditional_generate_construct        { $$ = $1; }
         |       c_generate_region                       { $$ = $1; }
         //
-        |       elaboration_system_task                 { $$ = $1; }
+        |       severity_system_task                    { $$ = $1; }
         ;
 
 //UNSUPchecker_instantiation<nodep>:
@@ -7148,7 +7145,7 @@ constraint_expression<nodep>:  // ==IEEE: constraint_expression
         |       ySOFT expr/*expression_or_dist*/ ';'    { $$ = nullptr; /*UNSUP-no-UVM*/ }
         //                      // 1800-2012:
         //                      // IEEE: uniqueness_constraint ';'
-        |       yUNIQUE '{' open_range_list '}'         { $$ = nullptr; /*UNSUP-no-UVM*/ }
+        |       yUNIQUE '{' range_list '}'              { $$ = nullptr; /*UNSUP-no-UVM*/ }
         //                      // IEEE: expr yP_MINUSGT constraint_set
         //                      // Conflicts with expr:"expr yP_MINUSGT expr"; rule moved there
         //

From 05bb7fa821858e40dcc49d9fdc33c96ed6e77eb7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 20 Oct 2023 02:37:11 -0400
Subject: [PATCH 098/157] Tests: Use UVM with UVM_NO_DPI defined

---
 test_regress/t/t_uvm_all.v       |   2 +
 test_regress/t/t_uvm_pkg_all.vh  | 131 +++++++++++++++++++++----------
 test_regress/t/t_uvm_pkg_todo.vh | 131 +++++++++++++++++++++----------
 test_regress/t/t_uvm_todo.pl     |   1 +
 test_regress/t/t_uvm_todo.v      |   2 +
 5 files changed, 185 insertions(+), 82 deletions(-)

diff --git a/test_regress/t/t_uvm_all.v b/test_regress/t/t_uvm_all.v
index 32f1ff78c..594c95679 100644
--- a/test_regress/t/t_uvm_all.v
+++ b/test_regress/t/t_uvm_all.v
@@ -4,6 +4,8 @@
 // any use, without warranty, 2023 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+`define UVM_NO_DPI
+
 `include "t_uvm_pkg_all.vh"
 
 module t(/*AUTOARG*/);
diff --git a/test_regress/t/t_uvm_pkg_all.vh b/test_regress/t/t_uvm_pkg_all.vh
index a2fd611b6..2c97fecb3 100644
--- a/test_regress/t/t_uvm_pkg_all.vh
+++ b/test_regress/t/t_uvm_pkg_all.vh
@@ -35,39 +35,91 @@
 package uvm_pkg;
 parameter int UVM_HDL_MAX_WIDTH = 1024;
 typedef logic [UVM_HDL_MAX_WIDTH-1:0] uvm_hdl_data_t;
-  import "DPI-C" context function int uvm_hdl_check_path(string path);
-  import "DPI-C" context function int uvm_hdl_deposit(string path, uvm_hdl_data_t value);
-  import "DPI-C" context function int uvm_hdl_force(string path, uvm_hdl_data_t value);
-  task uvm_hdl_force_time(string path, uvm_hdl_data_t value, time force_time = 0);
-    if (force_time == 0) begin
-      void'(uvm_hdl_deposit(path, value));
-      return;
-    end
-    if (!uvm_hdl_force(path, value))
-      return;
-    #force_time;
-    void'(uvm_hdl_release_and_read(path, value));
+  function int uvm_hdl_check_path(string path);
+    uvm_report_fatal("UVM_HDL_CHECK_PATH",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_deposit(string path, uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_DEPOSIT",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_force(string path, uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_FORCE",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  task uvm_hdl_force_time(string path, uvm_hdl_data_t value, time force_time=0);
+    uvm_report_fatal("UVM_HDL_FORCE_TIME",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
   endtask
-  import "DPI-C" context function int uvm_hdl_release_and_read(string path, inout uvm_hdl_data_t value);
-  import "DPI-C" context function int uvm_hdl_release(string path);
-  import "DPI-C" context function int uvm_hdl_read(string path, output uvm_hdl_data_t value);
-import "DPI-C" function string uvm_dpi_get_next_arg_c (int init);
-import "DPI-C" function string uvm_dpi_get_tool_name_c ();
-import "DPI-C" function string uvm_dpi_get_tool_version_c ();
+  function int uvm_hdl_release(string path, output uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_RELEASE",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_read(string path, output uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_READ",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
 function string uvm_dpi_get_next_arg(int init=0);
-  return uvm_dpi_get_next_arg_c(init);
+  return "";
 endfunction
 function string uvm_dpi_get_tool_name();
-  return uvm_dpi_get_tool_name_c();
+  return "?";
 endfunction
 function string uvm_dpi_get_tool_version();
-  return uvm_dpi_get_tool_version_c();
+  return "?";
+endfunction
+function chandle uvm_dpi_regcomp(string regex); return null; endfunction
+function int uvm_dpi_regexec(chandle preg, string str); return 0; endfunction
+function void uvm_dpi_regfree(chandle preg); endfunction
+function int uvm_re_match(string re, string str);
+  int e, es, s, ss;
+  string tmp;
+  e  = 0; s  = 0;
+  es = 0; ss = 0;
+  if(re.len() == 0)
+    return 0;
+  if(re[0] == "^")
+    re = re.substr(1, re.len()-1);
+  while (s != str.len() && re.getc(e) != "*") begin
+    if ((re.getc(e) != str.getc(s)) && (re.getc(e) != "?"))
+      return 1;
+    e++; s++;
+  end
+  while (s != str.len()) begin
+    if (re.getc(e) == "*") begin
+      e++;
+      if (e == re.len()) begin
+        return 0;
+      end
+      es = e;
+      ss = s+1;
+    end
+    else if (re.getc(e) == str.getc(s) || re.getc(e) == "?") begin
+      e++;
+      s++;
+    end
+    else begin
+      e = es;
+      s = ss++;
+    end
+  end
+  while (e < re.len() && re.getc(e) == "*")
+    e++;
+  if(e == re.len()) begin
+    return 0;
+  end
+  else begin
+    return 1;
+  end
+endfunction
+function string uvm_glob_to_re(string glob);
+  return glob;
 endfunction
-import "DPI-C" function chandle uvm_dpi_regcomp(string regex);
-import "DPI-C" function int uvm_dpi_regexec(chandle preg, string str);
-import "DPI-C" function void uvm_dpi_regfree(chandle preg);
-import "DPI-C" context function int uvm_re_match(string re, string str);
-import "DPI-C" context function string uvm_glob_to_re(string glob);
   typedef class uvm_cmdline_processor;
 parameter string UVM_VERSION_STRING = "Accellera:1800.2-2017:UVM:1.0";
 function string uvm_revision_string();
@@ -12920,22 +12972,13 @@ task uvm_root::run_test(string test_name="");
         testname_plusarg = 0;
         uvm_objection::m_init_objections();
         m_do_dump_args();
-        test_name_count = clp.get_arg_values("+UVM_TESTNAME=", test_names);
-        if (test_name_count > 0) begin
-                test_name = test_names[0];
+        if ($value$plusargs("UVM_TESTNAME=%s", test_name)) begin
+   begin
+     if (uvm_report_enabled(UVM_NONE,UVM_INFO,"NO_DPI_TSTNAME"))
+       uvm_report_info ("NO_DPI_TSTNAME", "UVM_NO_DPI defined--getting UVM_TESTNAME directly, without DPI", UVM_NONE, "t/uvm/src/base/uvm_root.svh", 517, "", 1);
+   end
                 testname_plusarg = 1;
         end
-        if (test_name_count > 1) begin
-                string test_list;
-                string sep;
-                for (int i = 0; i < test_names.size(); i++) begin
-                        if (i != 0)
-                                sep = ", ";
-                        test_list = {test_list, sep, test_names[i]};
-                end
-                uvm_report_warning("MULTTST",
-                        $sformatf("Multiple (%0d) +UVM_TESTNAME arguments provided on the command line.  '%s' will be used.  Provided list: %s.", test_name_count, test_name, test_list), UVM_NONE);
-        end
         if (test_name != "") begin
                 if(m_children.exists("uvm_test_top")) begin
                         uvm_report_fatal("TTINST",
@@ -13308,7 +13351,9 @@ function void uvm_root::m_check_verbosity();
         int verb_count;
         int plusarg;
         int verbosity = UVM_MEDIUM;
-        verb_count = clp.get_arg_values("+UVM_VERBOSITY=", verb_settings);
+        verb_count = $value$plusargs("UVM_VERBOSITY=%s",verb_string);
+        if (verb_count)
+                verb_settings.push_back(verb_string);
         if (verb_count > 0) begin
                 verb_string = verb_settings[0];
                 plusarg = 1;
@@ -15425,6 +15470,10 @@ class uvm_component_name_check_visitor extends uvm_visitor#(uvm_component);
   virtual function void begin_v();
     uvm_coreservice_t cs = uvm_coreservice_t::get();
     _root =  cs.get_root();
+   begin
+     if (uvm_report_enabled(UVM_NONE,UVM_INFO,"UVM/COMP/NAMECHECK"))
+       uvm_report_info ("UVM/COMP/NAMECHECK", "This implementation of the component name checks requires DPI to be enabled", UVM_NONE, "t/uvm/src/base/uvm_traversal.svh", 289, "", 1);
+   end
   endfunction
 endclass
 virtual class uvm_set_get_dap_base#(type T=int) extends uvm_object;
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index 30f708ef3..0d71f3de3 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -35,39 +35,91 @@
 package uvm_pkg;
 parameter int UVM_HDL_MAX_WIDTH = 1024;
 typedef logic [UVM_HDL_MAX_WIDTH-1:0] uvm_hdl_data_t;
-  import "DPI-C" context function int uvm_hdl_check_path(string path);
-  import "DPI-C" context function int uvm_hdl_deposit(string path, uvm_hdl_data_t value);
-  import "DPI-C" context function int uvm_hdl_force(string path, uvm_hdl_data_t value);
-  task uvm_hdl_force_time(string path, uvm_hdl_data_t value, time force_time = 0);
-    if (force_time == 0) begin
-      void'(uvm_hdl_deposit(path, value));
-      return;
-    end
-    if (!uvm_hdl_force(path, value))
-      return;
-    #force_time;
-    void'(uvm_hdl_release_and_read(path, value));
+  function int uvm_hdl_check_path(string path);
+    uvm_report_fatal("UVM_HDL_CHECK_PATH",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_deposit(string path, uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_DEPOSIT",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_force(string path, uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_FORCE",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  task uvm_hdl_force_time(string path, uvm_hdl_data_t value, time force_time=0);
+    uvm_report_fatal("UVM_HDL_FORCE_TIME",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
   endtask
-  import "DPI-C" context function int uvm_hdl_release_and_read(string path, inout uvm_hdl_data_t value);
-  import "DPI-C" context function int uvm_hdl_release(string path);
-  import "DPI-C" context function int uvm_hdl_read(string path, output uvm_hdl_data_t value);
-import "DPI-C" function string uvm_dpi_get_next_arg_c (int init);
-import "DPI-C" function string uvm_dpi_get_tool_name_c ();
-import "DPI-C" function string uvm_dpi_get_tool_version_c ();
+  function int uvm_hdl_release(string path, output uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_RELEASE",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
+  function int uvm_hdl_read(string path, output uvm_hdl_data_t value);
+    uvm_report_fatal("UVM_HDL_READ",
+      $sformatf("uvm_hdl DPI routines are compiled off. Recompile without +define+UVM_HDL_NO_DPI"));
+    return 0;
+  endfunction
 function string uvm_dpi_get_next_arg(int init=0);
-  return uvm_dpi_get_next_arg_c(init);
+  return "";
 endfunction
 function string uvm_dpi_get_tool_name();
-  return uvm_dpi_get_tool_name_c();
+  return "?";
 endfunction
 function string uvm_dpi_get_tool_version();
-  return uvm_dpi_get_tool_version_c();
+  return "?";
+endfunction
+function chandle uvm_dpi_regcomp(string regex); return null; endfunction
+function int uvm_dpi_regexec(chandle preg, string str); return 0; endfunction
+function void uvm_dpi_regfree(chandle preg); endfunction
+function int uvm_re_match(string re, string str);
+  int e, es, s, ss;
+  string tmp;
+  e  = 0; s  = 0;
+  es = 0; ss = 0;
+  if(re.len() == 0)
+    return 0;
+  if(re[0] == "^")
+    re = re.substr(1, re.len()-1);
+  while (s != str.len() && re.getc(e) != "*") begin
+    if ((re.getc(e) != str.getc(s)) && (re.getc(e) != "?"))
+      return 1;
+    e++; s++;
+  end
+  while (s != str.len()) begin
+    if (re.getc(e) == "*") begin
+      e++;
+      if (e == re.len()) begin
+        return 0;
+      end
+      es = e;
+      ss = s+1;
+    end
+    else if (re.getc(e) == str.getc(s) || re.getc(e) == "?") begin
+      e++;
+      s++;
+    end
+    else begin
+      e = es;
+      s = ss++;
+    end
+  end
+  while (e < re.len() && re.getc(e) == "*")
+    e++;
+  if(e == re.len()) begin
+    return 0;
+  end
+  else begin
+    return 1;
+  end
+endfunction
+function string uvm_glob_to_re(string glob);
+  return glob;
 endfunction
-import "DPI-C" function chandle uvm_dpi_regcomp(string regex);
-import "DPI-C" function int uvm_dpi_regexec(chandle preg, string str);
-import "DPI-C" function void uvm_dpi_regfree(chandle preg);
-import "DPI-C" context function int uvm_re_match(string re, string str);
-import "DPI-C" context function string uvm_glob_to_re(string glob);
   typedef class uvm_cmdline_processor;
 parameter string UVM_VERSION_STRING = "Accellera:1800.2-2017:UVM:1.0";
 function string uvm_revision_string();
@@ -12926,22 +12978,13 @@ task uvm_root::run_test(string test_name="");
         testname_plusarg = 0;
         uvm_objection::m_init_objections();
         m_do_dump_args();
-        test_name_count = clp.get_arg_values("+UVM_TESTNAME=", test_names);
-        if (test_name_count > 0) begin
-                test_name = test_names[0];
+        if ($value$plusargs("UVM_TESTNAME=%s", test_name)) begin
+   begin
+     if (uvm_report_enabled(UVM_NONE,UVM_INFO,"NO_DPI_TSTNAME"))
+       uvm_report_info ("NO_DPI_TSTNAME", "UVM_NO_DPI defined--getting UVM_TESTNAME directly, without DPI", UVM_NONE, "t/uvm/src/base/uvm_root.svh", 517, "", 1);
+   end
                 testname_plusarg = 1;
         end
-        if (test_name_count > 1) begin
-                string test_list;
-                string sep;
-                for (int i = 0; i < test_names.size(); i++) begin
-                        if (i != 0)
-                                sep = ", ";
-                        test_list = {test_list, sep, test_names[i]};
-                end
-                uvm_report_warning("MULTTST",
-                        $sformatf("Multiple (%0d) +UVM_TESTNAME arguments provided on the command line.  '%s' will be used.  Provided list: %s.", test_name_count, test_name, test_list), UVM_NONE);
-        end
         if (test_name != "") begin
                 if(m_children.exists("uvm_test_top")) begin
                         uvm_report_fatal("TTINST",
@@ -13314,7 +13357,9 @@ function void uvm_root::m_check_verbosity();
         int verb_count;
         int plusarg;
         int verbosity = UVM_MEDIUM;
-        verb_count = clp.get_arg_values("+UVM_VERBOSITY=", verb_settings);
+        verb_count = $value$plusargs("UVM_VERBOSITY=%s",verb_string);
+        if (verb_count)
+                verb_settings.push_back(verb_string);
         if (verb_count > 0) begin
                 verb_string = verb_settings[0];
                 plusarg = 1;
@@ -15433,6 +15478,10 @@ class uvm_component_name_check_visitor extends uvm_visitor#(uvm_component);
   virtual function void begin_v();
     uvm_coreservice_t cs = uvm_coreservice_t::get();
     _root =  cs.get_root();
+   begin
+     if (uvm_report_enabled(UVM_NONE,UVM_INFO,"UVM/COMP/NAMECHECK"))
+       uvm_report_info ("UVM/COMP/NAMECHECK", "This implementation of the component name checks requires DPI to be enabled", UVM_NONE, "t/uvm/src/base/uvm_traversal.svh", 289, "", 1);
+   end
   endfunction
 endclass
 virtual class uvm_set_get_dap_base#(type T=int) extends uvm_object;
diff --git a/test_regress/t/t_uvm_todo.pl b/test_regress/t/t_uvm_todo.pl
index 9fb3de36f..5d005a5d2 100755
--- a/test_regress/t/t_uvm_todo.pl
+++ b/test_regress/t/t_uvm_todo.pl
@@ -17,6 +17,7 @@ compile(
                  "-Wno-REALCVT", # TODO note mostly related to $realtime - could suppress or fix upstream
                  "-Wno-ZERODLY", # TODO issue #4494, add support
                  ],
+    make_flags => '-k -j ' . ::max_procs(),
     verilator_make_gmake => 0,
     );
 
diff --git a/test_regress/t/t_uvm_todo.v b/test_regress/t/t_uvm_todo.v
index 20bd2827d..c702f39f3 100644
--- a/test_regress/t/t_uvm_todo.v
+++ b/test_regress/t/t_uvm_todo.v
@@ -4,6 +4,8 @@
 // any use, without warranty, 2023 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+`define UVM_NO_DPI
+
 `include "t_uvm_pkg_todo.vh"
 
 module t(/*AUTOARG*/);

From 83a0085c4d799292350254c437c834d3fa6d302b Mon Sep 17 00:00:00 2001
From: Aleksander Kiryk <akiryk@antmicro.com>
Date: Fri, 20 Oct 2023 13:13:57 +0200
Subject: [PATCH 099/157] Support `wait fork` (#4586)

---
 include/verilated_types.h        | 12 +++++++++---
 src/V3AstNodeExpr.h              |  1 +
 src/V3AstNodeOther.h             |  1 +
 src/V3EmitCFunc.h                |  2 +-
 src/V3EmitV.cpp                  |  2 +-
 src/V3Timing.cpp                 | 18 ++++++++++++++++--
 src/V3Width.cpp                  | 12 ++++++++++--
 test_regress/t/t_uvm_pkg_todo.vh |  4 +---
 test_regress/t/t_wait_fork.out   |  6 ------
 test_regress/t/t_wait_fork.pl    | 11 +++++++----
 test_regress/t/t_wait_fork.v     | 11 +++++++----
 11 files changed, 54 insertions(+), 26 deletions(-)
 delete mode 100644 test_regress/t/t_wait_fork.out

diff --git a/include/verilated_types.h b/include/verilated_types.h
index b296689d9..da517c372 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -120,15 +120,21 @@ public:
     void attach(VlProcess* childp) { m_children.insert(childp); }
     void detach(VlProcess* childp) { m_children.erase(childp); }
 
-    int state() { return m_state; }
+    int state() const { return m_state; }
     void state(int s) { m_state = s; }
     void disable() {
         state(KILLED);
-        disable_fork();
+        disableFork();
     }
-    void disable_fork() {
+    void disableFork() {
         for (VlProcess* childp : m_children) childp->disable();
     }
+    bool completed() const { return state() == FINISHED || state() == KILLED; }
+    bool completedFork() const {
+        for (const VlProcess* const childp : m_children)
+            if (!childp->completed()) return false;
+        return true;
+    }
 };
 
 inline std::string VL_TO_STRING(const VlProcessRef& p) { return std::string("process"); }
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 37a360170..f9de8e512 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -617,6 +617,7 @@ public:
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
     bool same(const AstNode* /*samep*/) const override { return true; }
+    bool isPure() override { return pure(); }
     bool pure() const { return m_pure; }
     void pure(bool flag) { m_pure = flag; }
 };
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 568a0f5b8..45946401b 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -3325,6 +3325,7 @@ public:
     explicit AstWaitFork(FileLine* fl)
         : ASTGEN_SUPER_WaitFork(fl) {}
     ASTGEN_MEMBERS_AstWaitFork;
+    bool isTimingControl() const override { return true; }
 };
 class AstWhile final : public AstNodeStmt {
     // @astgen op1 := precondsp : List[AstNode]
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 0de6e001b..dbf5026a0 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -613,7 +613,7 @@ public:
             puts("]);\n");
         }
     }
-    void visit(AstDisableFork* nodep) override { puts("vlProcess->disable_fork();\n"); }
+    void visit(AstDisableFork* nodep) override { puts("vlProcess->disableFork();\n"); }
     void visit(AstCReturn* nodep) override {
         puts("return (");
         iterateAndNextConstNull(nodep->lhsp());
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 38bca92ba..d8fc2b42e 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -408,7 +408,7 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst {
     void visit(AstCExpr* nodep) override {
         putfs(nodep, "$_CEXPR(");
         iterateAndNextConstNull(nodep->exprsp());
-        puts(");\n");
+        puts(")");
     }
     void visit(AstUCStmt* nodep) override {
         putfs(nodep, "$c(");
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 65948a526..ebeeb7fe9 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -275,6 +275,10 @@ private:
         visit(static_cast<AstNode*>(nodep));
         addFlags(m_procp, T_FORCES_PROC | T_NEEDS_PROC);
     }
+    void visit(AstWaitFork* nodep) override {
+        visit(static_cast<AstNode*>(nodep));
+        addFlags(m_procp, T_FORCES_PROC | T_NEEDS_PROC);
+    }
     void visit(AstCFunc* nodep) override {
         VL_RESTORER(m_procp);
         m_procp = nodep;
@@ -573,8 +577,11 @@ private:
     // Returns true if we are under a class or the given tree has any references to locals. These
     // are cases where static, globally-evaluated triggers are not suitable.
     bool needDynamicTrigger(AstNode* const nodep) const {
-        return m_classp || nodep->exists([](const AstNodeVarRef* const refp) {
-            return refp->varp()->isFuncLocal();
+        return m_classp || nodep->exists([](AstNode* const nodep) {
+            if (AstNodeVarRef* varp = VN_CAST(nodep, NodeVarRef)) {
+                return varp->varp()->isFuncLocal();
+            }
+            return !nodep->isPure();
         });
     }
     // Returns true if the given trigger expression needs a destructive post update after trigger
@@ -1050,6 +1057,13 @@ private:
         // var
         alwaysp->addNextHere(nodep);
     }
+    void visit(AstWaitFork* nodep) override {
+        AstCExpr* const exprp = new AstCExpr{nodep->fileline(), "vlProcess->completedFork()", 1};
+        exprp->pure(false);
+        AstWait* const waitp = new AstWait{nodep->fileline(), exprp, nullptr};
+        nodep->replaceWith(waitp);
+        VL_DO_DANGLING(nodep->deleteTree(), nodep);
+    }
     void visit(AstWait* nodep) override {
         // Wait on changed events related to the vars in the wait statement
         FileLine* const flp = nodep->fileline();
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index f5f9c85e8..30407d90d 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -693,6 +693,7 @@ private:
         if (nodep->fileline()->timingOn()) {
             if (v3Global.opt.timing().isSetFalse()) {
                 nodep->v3warn(E_NOTIMING, "Support for disable fork statement requires --timing");
+                VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
             } else if (!v3Global.opt.timing().isSetTrue()) {
                 nodep->v3warn(E_NEEDTIMINGOPT, "Use --timing or --no-timing to specify how "
                                                    << "disable fork should be handled");
@@ -700,8 +701,15 @@ private:
         }
     }
     void visit(AstWaitFork* nodep) override {
-        nodep->v3warn(E_UNSUPPORTED, "Unsupported: wait fork statements");
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        if (nodep->fileline()->timingOn()) {
+            if (v3Global.opt.timing().isSetFalse()) {
+                nodep->v3warn(E_NOTIMING, "Support for disable fork statement requires --timing");
+                VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+            } else if (!v3Global.opt.timing().isSetTrue()) {
+                nodep->v3warn(E_NEEDTIMINGOPT, "Use --timing or --no-timing to specify how "
+                                                   << "disable fork should be handled");
+            }
+        }
     }
     void visit(AstToLowerN* nodep) override {
         if (m_vup->prelim()) {
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index 0d71f3de3..c798374cc 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -14809,9 +14809,7 @@ class uvm_objection extends uvm_report_object;
       if (m_trace_mode)
         m_report(obj,source_obj,description,count,"all_dropped");
       all_dropped(obj,source_obj,description, count);
-//TODO issue #4465 - Support wait fork
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:14761:7: Unsupported: wait fork statements
-//TODO      wait fork;
+      wait fork;
       if (m_source_count.exists(obj) && m_source_count[obj] == 0)
         m_source_count.delete(obj);
       if (m_total_count.exists(obj) && m_total_count[obj] == 0)
diff --git a/test_regress/t/t_wait_fork.out b/test_regress/t/t_wait_fork.out
deleted file mode 100644
index b9cf141c8..000000000
--- a/test_regress/t/t_wait_fork.out
+++ /dev/null
@@ -1,6 +0,0 @@
-%Error-UNSUPPORTED: t/t_wait_fork.v:17:7: Unsupported: wait fork statements
-                                        : ... note: In instance 't'
-   17 |       wait fork;
-      |       ^~~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: Exiting due to
diff --git a/test_regress/t/t_wait_fork.pl b/test_regress/t/t_wait_fork.pl
index 0ca21a5ca..0db50fc52 100755
--- a/test_regress/t/t_wait_fork.pl
+++ b/test_regress/t/t_wait_fork.pl
@@ -10,10 +10,13 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 
 scenarios(linter => 1);
 
-lint(
-    verilator_flags2 => ['--lint-only --timing'],
-    fails => 1,
-    expect_filename => $Self->{golden_filename},
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
     );
 
 ok(1);
diff --git a/test_regress/t/t_wait_fork.v b/test_regress/t/t_wait_fork.v
index f404a53c2..65fbff20a 100644
--- a/test_regress/t/t_wait_fork.v
+++ b/test_regress/t/t_wait_fork.v
@@ -8,13 +8,16 @@ module t(/*AUTOARG*/);
 
    logic never;
 
+   integer n = 0;
+
    initial begin
-      fork
-         #10;
-         #10;
-      join_none
       disable fork;
+      fork
+         #10 if (n != 0) $stop; else n = 1;
+         #15 if (n != 1) $stop; else n = 2;
+      join_none
       wait fork;
+      if (n != 2) $stop;
       $write("*-* All Finished *-*\n");
       $finish;
    end

From c7a0613c57827f0f9267fbfb0a064b5133a76678 Mon Sep 17 00:00:00 2001
From: Mariusz Glebocki <mglb@arccos-1.net>
Date: Fri, 20 Oct 2023 21:47:09 +0200
Subject: [PATCH 100/157] Support Clang 16 (#4592)

---
 configure.ac              | 10 ++++++----
 include/verilated_types.h | 28 ++++++++++++++--------------
 2 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/configure.ac b/configure.ac
index 4620e3b47..ade69cf7a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -371,10 +371,9 @@ _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_WEXTRA,-Wthread-safety)
 AC_SUBST(CFG_CXXFLAGS_WEXTRA)
 
 # Flags for coroutine support for dynamic scheduling
-_MY_CXX_CHECK_IFELSE(
-  -fcoroutines-ts,
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines-ts"],
-  [CFG_CXXFLAGS_COROUTINES="-fcoroutines"])
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_COROUTINES,-fcoroutines-ts -Wno-deprecated-experimental-coroutine)
 AC_SUBST(CFG_CXXFLAGS_COROUTINES)
 
 # HAVE_COROUTINES
@@ -442,7 +441,10 @@ m4_foreach([cflag],[
         [-mno-cet],
         [-Qunused-arguments],
         [-Wno-bool-operation],
+        [-Wno-c++11-narrowing],
         [-Wno-constant-logical-operand],
+        [-Wno-non-pod-varargs],
+        [-Wno-overloaded-virtual],
         [-Wno-parentheses-equality],
         [-Wno-shadow],
         [-Wno-sign-compare],
diff --git a/include/verilated_types.h b/include/verilated_types.h
index da517c372..4dd4505d4 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -250,20 +250,6 @@ template <class T_Value, uint64_t T_numValues>
 class VlRandC final {
     T_Value m_remaining = 0;  // Number of values to pull before re-randomize
     T_Value m_lfsr = 1;  // LFSR state
-    // Polynomials are first listed at https://users.ece.cmu.edu/~koopman/lfsr/
-    static constexpr uint64_t s_polynomials[] = {
-        0x0ULL,  // 0 never used (constant, no randomization)
-        0x0ULL,  // 1
-        0x3ULL,        0x5ULL,       0x9ULL,        0x12ULL,       0x21ULL,
-        0x41ULL,       0x8eULL,      0x108ULL,      0x204ULL,      0x402ULL,
-        0x829ULL,      0x100dULL,    0x2015ULL,     0x4001ULL,
-        0x8016ULL,  // 16
-        0x10004ULL,    0x20040ULL,   0x40013ULL,    0x80004ULL,    0x100002ULL,
-        0x200001ULL,   0x400010ULL,  0x80000dULL,   0x1000004ULL,  0x2000023ULL,
-        0x4000013ULL,  0x8000004ULL, 0x10000002ULL, 0x20000029ULL, 0x40000004ULL,
-        0x80000057ULL,  // 32
-        0x100000029ULL  // 33
-    };
 
 public:
     // CONSTRUCTORS
@@ -274,6 +260,20 @@ public:
     // METHODS
     T_Value randomize(VlRNG& rngr) {
         if (VL_UNLIKELY(!m_remaining)) reseed(rngr);
+        // Polynomials are first listed at https://users.ece.cmu.edu/~koopman/lfsr/
+        static constexpr uint64_t s_polynomials[] = {
+            0x0ULL,  // 0 never used (constant, no randomization)
+            0x0ULL,  // 1
+            0x3ULL,        0x5ULL,       0x9ULL,        0x12ULL,       0x21ULL,
+            0x41ULL,       0x8eULL,      0x108ULL,      0x204ULL,      0x402ULL,
+            0x829ULL,      0x100dULL,    0x2015ULL,     0x4001ULL,
+            0x8016ULL,  // 16
+            0x10004ULL,    0x20040ULL,   0x40013ULL,    0x80004ULL,    0x100002ULL,
+            0x200001ULL,   0x400010ULL,  0x80000dULL,   0x1000004ULL,  0x2000023ULL,
+            0x4000013ULL,  0x8000004ULL, 0x10000002ULL, 0x20000029ULL, 0x40000004ULL,
+            0x80000057ULL,  // 32
+            0x100000029ULL  // 33
+        };
         constexpr uint32_t clogWidth = VL_CLOG2_CE_Q(T_numValues) + 1;
         constexpr uint32_t lfsrWidth = (clogWidth < 2) ? 2 : clogWidth;
         constexpr T_Value polynomial = static_cast<T_Value>(s_polynomials[lfsrWidth]);

From 7b12f6a1dd37632a3a6696d599d9947b0057ccf0 Mon Sep 17 00:00:00 2001
From: Krzysztof Bieganski <kbieganski@antmicro.com>
Date: Sat, 21 Oct 2023 02:01:45 +0200
Subject: [PATCH 101/157] Support NBAs in non-inlined functions/tasks (#4496)
 (#4572)

---
 src/V3AstNodeOther.h                          |   6 +
 src/V3AstNodes.cpp                            |   2 +
 src/V3Delayed.cpp                             |   8 +-
 src/V3Sched.cpp                               | 187 ++++++++++--------
 src/V3Timing.cpp                              |  69 ++++++-
 test_regress/t/t_assigndly_dynamic.pl         |  32 +++
 test_regress/t/t_assigndly_dynamic.v          |  55 ++++++
 .../t/t_assigndly_dynamic_notiming.out        |   6 +
 .../t/t_assigndly_dynamic_notiming.pl         |  20 ++
 test_regress/t/t_assigndly_dynamic_notiming.v |  12 ++
 test_regress/t/t_uvm_pkg_todo.vh              |   4 +-
 11 files changed, 306 insertions(+), 95 deletions(-)
 create mode 100755 test_regress/t/t_assigndly_dynamic.pl
 create mode 100644 test_regress/t/t_assigndly_dynamic.v
 create mode 100644 test_regress/t/t_assigndly_dynamic_notiming.out
 create mode 100755 test_regress/t/t_assigndly_dynamic_notiming.pl
 create mode 100644 test_regress/t/t_assigndly_dynamic_notiming.v

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 45946401b..61c66ba79 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1195,6 +1195,8 @@ class AstNetlist final : public AstNode {
     AstCFunc* m_evalNbap = nullptr;  // The '_eval__nba' function
     AstVarScope* m_dpiExportTriggerp = nullptr;  // The DPI export trigger variable
     AstVar* m_delaySchedulerp = nullptr;  // The delay scheduler variable
+    AstVarScope* m_nbaEventp = nullptr;  // The NBA event variable
+    AstVarScope* m_nbaEventTriggerp = nullptr;  // If set to 1, the NBA event should get triggered
     AstTopScope* m_topScopep = nullptr;  // The singleton AstTopScope under the top module
     VTimescale m_timeunit;  // Global time unit
     VTimescale m_timeprecision;  // Global time precision
@@ -1224,6 +1226,10 @@ public:
     void dpiExportTriggerp(AstVarScope* varScopep) { m_dpiExportTriggerp = varScopep; }
     AstVar* delaySchedulerp() const { return m_delaySchedulerp; }
     void delaySchedulerp(AstVar* const varScopep) { m_delaySchedulerp = varScopep; }
+    AstVarScope* nbaEventp() const { return m_nbaEventp; }
+    void nbaEventp(AstVarScope* const varScopep) { m_nbaEventp = varScopep; }
+    AstVarScope* nbaEventTriggerp() const { return m_nbaEventTriggerp; }
+    void nbaEventTriggerp(AstVarScope* const varScopep) { m_nbaEventTriggerp = varScopep; }
     void stdPackagep(AstPackage* const packagep) { m_stdPackagep = packagep; }
     AstPackage* stdPackagep() const { return m_stdPackagep; }
     AstTopScope* topScopep() const { return m_topScopep; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index bddc62d9d..09dd075c2 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1936,6 +1936,8 @@ const char* AstNetlist::broken() const {
     BROKEN_RTN(m_dpiExportTriggerp && !m_dpiExportTriggerp->brokeExists());
     BROKEN_RTN(m_topScopep && !m_topScopep->brokeExists());
     BROKEN_RTN(m_delaySchedulerp && !m_delaySchedulerp->brokeExists());
+    BROKEN_RTN(m_nbaEventp && !m_nbaEventp->brokeExists());
+    BROKEN_RTN(m_nbaEventTriggerp && !m_nbaEventTriggerp->brokeExists());
     return nullptr;
 }
 AstPackage* AstNetlist::dollarUnitPkgAddp() {
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 3a829d22d..35f18d0b0 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -520,8 +520,12 @@ private:
         m_nextDlyp
             = VN_CAST(nodep->nextp(), AssignDly);  // Next assignment in same block, maybe nullptr.
         if (m_cfuncp) {
-            nodep->v3warn(E_UNSUPPORTED,
-                          "Unsupported: Delayed assignment inside public function/task");
+            if (!v3Global.rootp()->nbaEventp()) {
+                nodep->v3warn(
+                    E_NOTIMING,
+                    "Delayed assignment in a non-inlined function/task requires --timing");
+            }
+            return;
         }
         UASSERT_OBJ(m_procp, nodep, "Delayed assignment not under process");
         const bool isArray = VN_IS(nodep->lhsp(), ArraySel)
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index a7012d151..2b40f2a16 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -587,18 +587,27 @@ const TriggerKit createTriggers(AstNetlist* netlistp, AstCFunc* const initFuncp,
     return {vscp, funcp, dumpp, map};
 }
 
+//============================================================================
+// EvalLoop contains elements of an evaluation loop created by makeEvalLoop()
+
+struct EvalLoop {
+    // Loop iteration counter for enforcing the converge limit
+    AstVarScope* counterp = nullptr;
+    // The loop condition
+    AstVarScope* continuep = nullptr;
+    // The loop itself and statements around it
+    AstNodeStmt* stmtsp = nullptr;
+};
+
 //============================================================================
 // Helpers to construct an evaluation loop.
 
-AstNodeStmt* buildLoop(AstNetlist* netlistp, const string& name,
-                       const std::function<void(AstVarScope*, AstWhile*)>& build)  //
+AstNodeStmt* buildLoop(AstNetlist* netlistp, AstVarScope* const condp,
+                       const std::function<void(AstWhile*)>& build)  //
 {
     AstTopScope* const topScopep = netlistp->topScopep();
     AstScope* const scopeTopp = topScopep->scopep();
     FileLine* const flp = scopeTopp->fileline();
-    // Create the loop condition variable
-    AstVarScope* const condp = scopeTopp->createTemp("__V" + name + "Continue", 1);
-    condp->varp()->noReset(true);
     // Initialize the loop condition variable to true
     AstNodeStmt* const resp = setVar(condp, 1);
     // Add the loop
@@ -607,16 +616,15 @@ AstNodeStmt* buildLoop(AstNetlist* netlistp, const string& name,
     // Clear the loop condition variable in the loop
     loopp->addStmtsp(setVar(condp, 0));
     // Build the body
-    build(condp, loopp);
+    build(loopp);
     // Done
     return resp;
 };
 
-std::pair<AstVarScope*, AstNodeStmt*> makeEvalLoop(AstNetlist* netlistp, const string& tag,
-                                                   const string& name, AstVarScope* trigVscp,
-                                                   AstCFunc* trigDumpp,
-                                                   std::function<AstNodeStmt*()> computeTriggers,
-                                                   std::function<AstNodeStmt*()> makeBody) {
+EvalLoop makeEvalLoop(AstNetlist* netlistp, const string& tag, const string& name,
+                      AstVarScope* trigVscp, AstCFunc* trigDumpp,
+                      std::function<AstNodeStmt*()> computeTriggers,
+                      std::function<AstNodeStmt*()> makeBody) {
     UASSERT_OBJ(trigVscp->dtypep()->basicp()->isTriggerVec(), trigVscp, "Not TRIGGERVEC");
     AstTopScope* const topScopep = netlistp->topScopep();
     AstScope* const scopeTopp = topScopep->scopep();
@@ -625,8 +633,11 @@ std::pair<AstVarScope*, AstNodeStmt*> makeEvalLoop(AstNetlist* netlistp, const s
     AstVarScope* const counterp = scopeTopp->createTemp("__V" + tag + "IterCount", 32);
     counterp->varp()->noReset(true);
 
+    AstVarScope* const continuep = scopeTopp->createTemp("__V" + tag + "Continue", 1);
+    continuep->varp()->noReset(true);
+
     AstNodeStmt* nodep = setVar(counterp, 0);
-    nodep->addNext(buildLoop(netlistp, tag, [&](AstVarScope* continuep, AstWhile* loopp) {
+    nodep->addNext(buildLoop(netlistp, continuep, [&](AstWhile* loopp) {
         // Compute triggers
         loopp->addStmtsp(computeTriggers());
         // Invoke body if triggered
@@ -678,7 +689,7 @@ std::pair<AstVarScope*, AstNodeStmt*> makeEvalLoop(AstNetlist* netlistp, const s
         }
     }));
 
-    return {counterp, nodep};
+    return {counterp, continuep, nodep};
 }
 
 //============================================================================
@@ -723,7 +734,7 @@ void createSettle(AstNetlist* netlistp, AstCFunc* const initFuncp, SenExprBuilde
     splitCheck(stlFuncp);
 
     // Create the eval loop
-    const auto& pair = makeEvalLoop(
+    const auto& loop = makeEvalLoop(
         netlistp, "stl", "Settle", trig.m_vscp, trig.m_dumpp,
         [&]() {  // Trigger
             AstCCall* const callp = new AstCCall{stlFuncp->fileline(), trig.m_funcp};
@@ -737,10 +748,10 @@ void createSettle(AstNetlist* netlistp, AstCFunc* const initFuncp, SenExprBuilde
         });
 
     // Add the first iteration trigger to the trigger computation function
-    trig.addFirstIterationTriggerAssignment(pair.first, firstIterationTrigger);
+    trig.addFirstIterationTriggerAssignment(loop.counterp, firstIterationTrigger);
 
     // Add the eval loop to the top function
-    funcp->addStmtsp(pair.second);
+    funcp->addStmtsp(loop.stmtsp);
 }
 
 //============================================================================
@@ -812,7 +823,7 @@ AstNode* createInputCombLoop(AstNetlist* netlistp, AstCFunc* const initFuncp,
     splitCheck(icoFuncp);
 
     // Create the eval loop
-    const auto& pair = makeEvalLoop(
+    const auto& loop = makeEvalLoop(
         netlistp, "ico", "Input combinational", trig.m_vscp, trig.m_dumpp,
         [&]() {  // Trigger
             AstCCall* const callp = new AstCCall{icoFuncp->fileline(), trig.m_funcp};
@@ -826,10 +837,10 @@ AstNode* createInputCombLoop(AstNetlist* netlistp, AstCFunc* const initFuncp,
         });
 
     // Add the first iteration trigger to the trigger computation function
-    trig.addFirstIterationTriggerAssignment(pair.first, firstIterationTrigger);
+    trig.addFirstIterationTriggerAssignment(loop.counterp, firstIterationTrigger);
 
     // Return the eval loop itself
-    return pair.second;
+    return loop.stmtsp;
 }
 
 //============================================================================
@@ -884,72 +895,86 @@ void createEval(AstNetlist* netlistp,  //
     if (icoLoop) funcp->addStmtsp(icoLoop);
 
     // Create the active eval loop
-    AstNodeStmt* const activeEvalLoopp
-        = makeEvalLoop(
-              netlistp, "act", "Active", actKit.m_vscp, actKit.m_dumpp,
-              [&]() {  // Trigger
-                  AstNodeStmt* resultp = nullptr;
+    const auto& activeEvalLoop = makeEvalLoop(
+        netlistp, "act", "Active", actKit.m_vscp, actKit.m_dumpp,
+        [&]() {  // Trigger
+            AstNodeStmt* resultp = nullptr;
 
-                  // Compute the current triggers
-                  {
-                      AstCCall* const trigsp = new AstCCall{flp, actKit.m_triggerComputep};
-                      trigsp->dtypeSetVoid();
-                      resultp = AstNode::addNext(resultp, trigsp->makeStmt());
-                  }
+            // Compute the current triggers
+            {
+                AstCCall* const trigsp = new AstCCall{flp, actKit.m_triggerComputep};
+                trigsp->dtypeSetVoid();
+                resultp = AstNode::addNext(resultp, trigsp->makeStmt());
+            }
 
-                  // Commit trigger awaits from the previous iteration
-                  if (AstCCall* const commitp = timingKit.createCommit(netlistp)) {
-                      resultp = AstNode::addNext(resultp, commitp->makeStmt());
-                  }
+            // Commit trigger awaits from the previous iteration
+            if (AstCCall* const commitp = timingKit.createCommit(netlistp)) {
+                resultp = AstNode::addNext(resultp, commitp->makeStmt());
+            }
 
-                  return resultp;
-              },
-              [&]() {  // Body
-                  // Compute the pre triggers
-                  AstNodeStmt* resultp
-                      = createTriggerAndNotCall(flp, preTrigsp, actKit.m_vscp, nbaKit.m_vscp);
-                  // Latch the active trigger flags under the NBA trigger flags
-                  resultp = AstNode::addNext(
-                      resultp, createTriggerSetCall(flp, nbaKit.m_vscp, actKit.m_vscp));
-                  // Resume triggered timing schedulers
-                  if (AstCCall* const resumep = timingKit.createResume(netlistp)) {
-                      resultp = AstNode::addNext(resultp, resumep->makeStmt());
-                  }
-                  // Invoke body function
-                  {
-                      AstCCall* const callp = new AstCCall{flp, actKit.m_funcp};
-                      callp->dtypeSetVoid();
-                      resultp = AstNode::addNext(resultp, callp->makeStmt());
-                  }
+            return resultp;
+        },
+        [&]() {  // Body
+            // Compute the pre triggers
+            AstNodeStmt* resultp
+                = createTriggerAndNotCall(flp, preTrigsp, actKit.m_vscp, nbaKit.m_vscp);
+            // Latch the active trigger flags under the NBA trigger flags
+            resultp = AstNode::addNext(resultp,
+                                       createTriggerSetCall(flp, nbaKit.m_vscp, actKit.m_vscp));
+            // Resume triggered timing schedulers
+            if (AstCCall* const resumep = timingKit.createResume(netlistp)) {
+                resultp = AstNode::addNext(resultp, resumep->makeStmt());
+            }
+            // Invoke body function
+            {
+                AstCCall* const callp = new AstCCall{flp, actKit.m_funcp};
+                callp->dtypeSetVoid();
+                resultp = AstNode::addNext(resultp, callp->makeStmt());
+            }
 
-                  return resultp;
-              })
-              .second;
+            return resultp;
+        });
 
     // Create the NBA eval loop. This uses the Active eval loop in the trigger section.
-    AstNodeStmt* topEvalLoopp
-        = makeEvalLoop(
-              netlistp, "nba", "NBA", nbaKit.m_vscp, nbaKit.m_dumpp,
-              [&]() {  // Trigger
-                  // Reset NBA triggers
-                  AstNodeStmt* resultp = createTriggerClearCall(flp, nbaKit.m_vscp);
-                  // Run the Active eval loop
-                  resultp = AstNode::addNext(resultp, activeEvalLoopp);
-                  return resultp;
-              },
-              [&]() {  // Body
-                  AstCCall* const callp = new AstCCall{flp, nbaKit.m_funcp};
-                  callp->dtypeSetVoid();
-                  AstNodeStmt* resultp = callp->makeStmt();
-                  // Latch the NBA trigger flags under the following region's trigger flags
-                  AstVarScope* const nextVscp = obsKit.m_vscp ? obsKit.m_vscp : reactKit.m_vscp;
-                  if (nextVscp) {
-                      resultp = AstNode::addNext(
-                          resultp, createTriggerSetCall(flp, nextVscp, nbaKit.m_vscp));
-                  }
-                  return resultp;
-              })
-              .second;
+    const auto& nbaEvalLoop = makeEvalLoop(
+        netlistp, "nba", "NBA", nbaKit.m_vscp, nbaKit.m_dumpp,
+        [&]() {  // Trigger
+            // Reset NBA triggers
+            AstNodeStmt* resultp = createTriggerClearCall(flp, nbaKit.m_vscp);
+            // Run the Active eval loop
+            resultp = AstNode::addNext(resultp, activeEvalLoop.stmtsp);
+            return resultp;
+        },
+        [&]() {  // Body
+            AstCCall* const callp = new AstCCall{flp, nbaKit.m_funcp};
+            callp->dtypeSetVoid();
+            AstNodeStmt* resultp = callp->makeStmt();
+            // Latch the NBA trigger flags under the following region's trigger flags
+            AstVarScope* const nextVscp = obsKit.m_vscp ? obsKit.m_vscp : reactKit.m_vscp;
+            if (nextVscp) {
+                resultp = AstNode::addNext(resultp,
+                                           createTriggerSetCall(flp, nextVscp, nbaKit.m_vscp));
+            }
+            return resultp;
+        });
+
+    // If the NBA event exists, trigger it in 'nba'
+    if (netlistp->nbaEventp()) {
+        UASSERT(netlistp->nbaEventTriggerp(), "NBA event trigger var should exist");
+        AstIf* const ifp
+            = new AstIf{flp, new AstVarRef{flp, netlistp->nbaEventTriggerp(), VAccess::READ}};
+        ifp->addThensp(setVar(nbaEvalLoop.continuep, 1));
+        ifp->addThensp(setVar(netlistp->nbaEventTriggerp(), 0));
+        AstCMethodHard* const firep = new AstCMethodHard{
+            flp, new AstVarRef{flp, netlistp->nbaEventp(), VAccess::WRITE}, "fire"};
+        firep->dtypeSetVoid();
+        ifp->addThensp(firep->makeStmt());
+        activeEvalLoop.stmtsp->addNext(ifp);
+        netlistp->nbaEventp(nullptr);
+        netlistp->nbaEventTriggerp(nullptr);
+    }
+
+    AstNodeStmt* topEvalLoopp = nbaEvalLoop.stmtsp;
 
     if (obsKit.m_funcp) {
         // Create the Observed eval loop. This uses the NBA eval loop in the trigger section.
@@ -974,7 +999,7 @@ void createEval(AstNetlist* netlistp,  //
                       }
                       return resultp;
                   })
-                  .second;
+                  .stmtsp;
     }
 
     if (reactKit.m_funcp) {
@@ -993,7 +1018,7 @@ void createEval(AstNetlist* netlistp,  //
                                callp->dtypeSetVoid();
                                return callp->makeStmt();
                            })
-                           .second;
+                           .stmtsp;
     }
     funcp->addStmtsp(topEvalLoopp);
 
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index ebeeb7fe9..0d170c90c 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -365,6 +365,10 @@ private:
         m_underFork |= F_MIGHT_NEED_PROC;
         iterateChildren(nodep);
     }
+    void visit(AstAssignDly* nodep) override {
+        if (!VN_IS(m_procp, NodeProcedure)) v3Global.setUsesTiming();
+        visit(static_cast<AstNode*>(nodep));
+    }
     void visit(AstNode* nodep) override {
         if (nodep->isTimingControl()) {
             v3Global.setUsesTiming();
@@ -451,8 +455,10 @@ private:
     double m_timescaleFactor = 1.0;  // Factor to scale delays by
     int m_forkCnt = 0;  // Number of forks inside a module
     bool m_underJumpBlock = false;  // True if we are inside of a jump-block
+    bool m_underProcedure = false;  // True if we are under an always or initial
 
     // Unique names
+    V3UniqueNames m_dlyforkNames{"__Vdlyfork"};  // Names for temp AssignW vars
     V3UniqueNames m_contAssignVarNames{"__VassignWtmp"};  // Names for temp AssignW vars
     V3UniqueNames m_intraValueNames{"__Vintraval"};  // Intra assign delay value var names
     V3UniqueNames m_intraIndexNames{"__Vintraidx"};  // Intra assign delay index var names
@@ -574,6 +580,31 @@ private:
         m_netlistp->topScopep()->addSenTreesp(m_dynamicSensesp);
         return m_dynamicSensesp;
     }
+    // Creates the event variable to trigger in NBA region
+    AstEventControl* createNbaEventControl(FileLine* flp) {
+        if (!m_netlistp->nbaEventp()) {
+            auto* const nbaEventDtp = new AstBasicDType{m_scopeTopp->fileline(),
+                                                        VBasicDTypeKwd::EVENT, VSigning::UNSIGNED};
+            m_netlistp->typeTablep()->addTypesp(nbaEventDtp);
+            m_netlistp->nbaEventp(m_scopeTopp->createTemp("__VnbaEvent", nbaEventDtp));
+            v3Global.setHasEvents();
+        }
+        return new AstEventControl{
+            flp,
+            new AstSenTree{
+                flp, new AstSenItem{flp, VEdgeType::ET_EVENT,
+                                    new AstVarRef{flp, m_netlistp->nbaEventp(), VAccess::READ}}},
+            nullptr};
+    }
+    // Creates the variable that, if set, causes the NBA event to be triggered
+    AstAssign* createNbaEventTriggerAssignment(FileLine* flp) {
+        if (!m_netlistp->nbaEventTriggerp()) {
+            m_netlistp->nbaEventTriggerp(m_scopeTopp->createTemp("__VnbaEventTrigger", 1));
+        }
+        return new AstAssign{flp,
+                             new AstVarRef{flp, m_netlistp->nbaEventTriggerp(), VAccess::WRITE},
+                             new AstConst{flp, AstConst::BitTrue{}}};
+    }
     // Returns true if we are under a class or the given tree has any references to locals. These
     // are cases where static, globally-evaluated triggers are not suitable.
     bool needDynamicTrigger(AstNode* const nodep) const {
@@ -755,6 +786,8 @@ private:
     void visit(AstNodeProcedure* nodep) override {
         VL_RESTORER(m_procp);
         m_procp = nodep;
+        VL_RESTORER(m_underProcedure);
+        m_underProcedure = true;
         iterateChildren(nodep);
         if (hasFlags(nodep, T_SUSPENDEE)) nodep->setSuspendable();
         if (hasFlags(nodep, T_HAS_PROC)) nodep->setNeedProcess();
@@ -775,7 +808,8 @@ private:
         if (nodep->user1SetOnce()) return;
         VL_RESTORER(m_procp);
         m_procp = nodep;
-
+        VL_RESTORER(m_underProcedure);
+        m_underProcedure = true;
         // Workaround for killing `always` processes (doing that is pretty much UB)
         // TODO: Disallow killing `always` at runtime (throw an error)
         if (hasFlags(nodep, T_HAS_PROC)) addFlags(nodep, T_SUSPENDEE);
@@ -981,20 +1015,37 @@ private:
     void visit(AstNodeAssign* nodep) override {
         // Only process once to avoid infinite loops (due to the net delay)
         if (nodep->user1SetOnce()) return;
-        AstNode* const controlp = factorOutTimingControl(nodep);
-        if (!controlp) return;
-        // Handle the intra assignment timing control
         FileLine* const flp = nodep->fileline();
-        if (VN_IS(nodep, AssignDly)) {
-            // If it's an NBA with an intra assignment delay, put it in a fork
+        AstNode* controlp = factorOutTimingControl(nodep);
+        const bool inAssignDly = VN_IS(nodep, AssignDly);
+        // Handle the intra assignment timing control
+        // Transform if:
+        // * there's a timing control in the assignment
+        // * the assignment is an AssignDly and it's in a non-inlined function
+        if (!controlp && (!inAssignDly || m_underProcedure)) return;
+        // Insert new vars before the timing control if we're in a function; in a process we can't
+        // do that. These intra-assignment vars will later be passed to forked processes by value.
+        AstNode* insertBeforep = m_underProcedure ? nullptr : controlp;
+        // Special case for NBA
+        if (inAssignDly) {
+            // Put it in a fork so it doesn't block
             auto* const forkp = new AstFork{flp, "", nullptr};
             forkp->joinType(VJoinType::JOIN_NONE);
+            if (!m_underProcedure) {
+                // If it's in a function, it won't be handled by V3Delayed
+                // Put it behind an additional named event that gets triggered in the NBA region
+                AstEventControl* const nbaEventControlp = createNbaEventControl(flp);
+                AstAssign* const trigAssignp = createNbaEventTriggerAssignment(flp);
+                nodep->replaceWith(trigAssignp);
+                trigAssignp->addNextHere(nbaEventControlp);
+                nbaEventControlp->addStmtsp(nodep);
+                insertBeforep = forkp;
+                if (!controlp) controlp = nbaEventControlp;
+            }
             controlp->replaceWith(forkp);
             forkp->addStmtsp(controlp);
         }
-        // Insert new vars before the timing control if we're in a function; in a process we can't
-        // do that. These intra-assignment vars will later be passed to forked processes by value.
-        AstNode* const insertBeforep = m_classp ? controlp : nullptr;
+        UASSERT_OBJ(nodep, controlp, "Assignment should have timing control");
         addCLocalScope(flp, insertBeforep);
         // Function for replacing values with intermediate variables
         const auto replaceWithIntermediate = [&](AstNodeExpr* const valuep,
diff --git a/test_regress/t/t_assigndly_dynamic.pl b/test_regress/t/t_assigndly_dynamic.pl
new file mode 100755
index 000000000..3576e3ffb
--- /dev/null
+++ b/test_regress/t/t_assigndly_dynamic.pl
@@ -0,0 +1,32 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+compile(
+    verilator_flags2 => ["--exe --main --timing +define+WITH_DELAY"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_assigndly_dynamic.v b/test_regress/t/t_assigndly_dynamic.v
new file mode 100644
index 000000000..9183eb767
--- /dev/null
+++ b/test_regress/t/t_assigndly_dynamic.v
@@ -0,0 +1,55 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+`ifdef WITH_DELAY
+`define DELAY #1
+`define TIME_AFTER_FIRST_WAIT 2
+`define TIME_AFTER_SECOND_WAIT 3
+`else
+`define DELAY
+`define TIME_AFTER_FIRST_WAIT 1
+`define TIME_AFTER_SECOND_WAIT 1
+`endif
+
+class nba_waiter;
+    // Task taken from UVM
+    task wait_for_nba_region;
+        int nba;
+        int next_nba;
+        next_nba++;
+        nba <= `DELAY next_nba;
+        @(nba);
+    endtask
+endclass
+
+module t;
+    nba_waiter waiter = new;
+    event e;
+    int cnt = 0;
+
+    initial begin
+        #1 ->e;
+        if (cnt != 0) $stop;
+        cnt++;
+        waiter.wait_for_nba_region;
+        ->e;
+        if (cnt != 2) $stop;
+        if ($time != `TIME_AFTER_FIRST_WAIT) $stop;
+        cnt++;
+        waiter.wait_for_nba_region;
+        if (cnt != 4) $stop;
+        if ($time != `TIME_AFTER_SECOND_WAIT) $stop;
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+
+    initial begin
+        @e if (cnt != 1) $stop;
+        cnt++;
+        @e if (cnt != 3) $stop;
+        cnt++;
+    end
+endmodule
diff --git a/test_regress/t/t_assigndly_dynamic_notiming.out b/test_regress/t/t_assigndly_dynamic_notiming.out
new file mode 100644
index 000000000..7fe77946a
--- /dev/null
+++ b/test_regress/t/t_assigndly_dynamic_notiming.out
@@ -0,0 +1,6 @@
+%Error-NOTIMING: t/t_assigndly_dynamic_notiming.v:10:13: Delayed assignment in a non-inlined function/task requires --timing
+                                                       : ... note: In instance '$unit::foo'
+   10 |         qux <= '1;
+      |             ^~
+                 ... For error description see https://verilator.org/warn/NOTIMING?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_assigndly_dynamic_notiming.pl b/test_regress/t/t_assigndly_dynamic_notiming.pl
new file mode 100755
index 000000000..1e658d937
--- /dev/null
+++ b/test_regress/t/t_assigndly_dynamic_notiming.pl
@@ -0,0 +1,20 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2019 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--no-timing"],
+    fails => 1,
+    expect_filename => $Self->{golden_filename},
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_assigndly_dynamic_notiming.v b/test_regress/t/t_assigndly_dynamic_notiming.v
new file mode 100644
index 000000000..f4b96c4de
--- /dev/null
+++ b/test_regress/t/t_assigndly_dynamic_notiming.v
@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class foo;
+    task bar;
+        int qux;
+        qux <= '1;
+    endtask
+endclass
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index c798374cc..edaf36b07 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -918,9 +918,7 @@ task uvm_wait_for_nba_region;
   int nba;
   int next_nba;
   next_nba++;
-//TODO issue #4496 - Delayed assignment inside public function/task
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:875:7: Unsupported: Delayed assignment inside public function/task
-//TODO  nba <= next_nba;
+  nba <= next_nba;
   @(nba);
 endtask
 function automatic void uvm_split_string (string str, byte sep, ref string values[$]);

From f8b7fb72b897f213306b97592e08a7fd49bee9e4 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 21 Oct 2023 02:36:29 -0400
Subject: [PATCH 102/157] Fix fault on empty clocking block (#4593).

---
 Changes                                  |  1 +
 src/V3SchedTiming.cpp                    |  6 +++++-
 test_regress/t/t_clocking_empty_block.pl | 23 +++++++++++++++++++++++
 test_regress/t/t_clocking_empty_block.v  | 21 +++++++++++++++++++++
 4 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_clocking_empty_block.pl
 create mode 100644 test_regress/t/t_clocking_empty_block.v

diff --git a/Changes b/Changes
index 7ec977f93..266dae696 100644
--- a/Changes
+++ b/Changes
@@ -44,6 +44,7 @@ Verilator 5.017 devel
 * Fix compile warning on unused member function variable (#4567).
 * Fix method narrowing conversion compiler error (#4568).
 * Fix display optimization ignoring side effects (#4585).
+* Fix fault on empty clocking block (#4593). [Alex Mykyta]
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index 3a8dd6b89..368201f05 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -395,7 +395,11 @@ void transformForks(AstNetlist* const netlistp) {
             } else {
                 // The begin has neither awaits nor a process::self call, just inline the
                 // statements
-                nodep->replaceWith(nodep->stmtsp()->unlinkFrBackWithNext());
+                if (nodep->stmtsp()) {
+                    nodep->replaceWith(nodep->stmtsp()->unlinkFrBackWithNext());
+                } else {
+                    nodep->unlinkFrBack();
+                }
             }
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
         }
diff --git a/test_regress/t/t_clocking_empty_block.pl b/test_regress/t/t_clocking_empty_block.pl
new file mode 100755
index 000000000..b8493bd06
--- /dev/null
+++ b/test_regress/t/t_clocking_empty_block.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_clocking_empty_block.v b/test_regress/t/t_clocking_empty_block.v
new file mode 100644
index 000000000..8210ffcfd
--- /dev/null
+++ b/test_regress/t/t_clocking_empty_block.v
@@ -0,0 +1,21 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Alex Mykyta.
+// SPDX-License-Identifier: CC0-1.0
+
+module t();
+   logic clk = 0;
+   logic x;
+   logic y;
+   always #1ns clk = ~clk;
+   clocking cb @(posedge clk);
+      output #1ns x;
+      input  #1step y;
+   endclocking
+   initial begin
+      repeat(10) @(posedge clk);
+      $display("*-* All Finished *-*");
+      $finish();
+   end
+endmodule

From 26e378596382e654f5e39e17e6bc61942feb55c2 Mon Sep 17 00:00:00 2001
From: Quentin Corradi <12198691+dwRchyngqxs@users.noreply.github.com>
Date: Sat, 21 Oct 2023 07:43:49 +0100
Subject: [PATCH 103/157] Fix PLI/DPI user defined system task/function grammar
 (#4587) (#4588)

According to 1800-2017 36.3, 1800-2017 A.9.3, 1364-2005 20.2 and 1364-2005 A.9.3, user defined system task and function identifiers can use the same character set for the second character as all the following characters.
---
 docs/CONTRIBUTORS | 1 +
 src/verilog.l     | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 09c1ae87b..80b58a622 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -137,6 +137,7 @@ Pierre-Henri Horrein
 Pieter Kapsenberg
 Piotr Binkowski
 Qingyao Sun
+Quentin Corradi
 Rafal Kapuscik
 Raynard Qiao
 Richard Myers
diff --git a/src/verilog.l b/src/verilog.l
index 8bb6c07bd..7d43128b0 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -630,7 +630,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
 
   /* Default PLI rule */
 <V95,V01NC,V01C,V05,VA5,S05,S09,S12,S17,SAX>{
-  "$"[a-zA-Z_$][a-zA-Z0-9_$]*   { const string str (yytext, yyleng);
+  "$"[a-zA-Z0-9_$]+     { const string str (yytext, yyleng);
                                   yylval.strp = PARSEP->newString(AstNode::encodeName(str));
                                   FL; return yaD_PLI;
                                 }

From cbc2f9eb328f7b99a5c6a12cf65c4e53b55f1867 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 11:34:36 +0100
Subject: [PATCH 104/157] Do not overwrite LD_LIBRARY_PATH in t_flag_ldflags

---
 test_regress/t/t_flag_ldflags.pl | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test_regress/t/t_flag_ldflags.pl b/test_regress/t/t_flag_ldflags.pl
index 8f5aa8958..33d73877b 100755
--- a/test_regress/t/t_flag_ldflags.pl
+++ b/test_regress/t/t_flag_ldflags.pl
@@ -45,7 +45,7 @@ if ($^O eq "darwin") {
 
 execute(
     check_finished => 1,
-    run_env => "LD_LIBRARY_PATH=$Self->{obj_dir}",
+    run_env => "LD_LIBRARY_PATH=$Self->{obj_dir}:$ENV{LD_LIBRARY_PATH}",
     );
 
 ok(1);

From d1c787540623ad22fc734a18d0cc896a8ca393cd Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 13:53:56 +0100
Subject: [PATCH 105/157] Fix conditionals on obsolete --threads 0

Since we removed --threads 0 support, the 'threads()' option always
returns a value >= 1. Remove corresponding dead code.

Some of the coverage counters appear to use atomics even if the model is
single threaded. I'm under the impression this was a bug originally so
those ones I changed to use threads() > 1 instead.
---
 src/V3EmitCFunc.h      | 2 +-
 src/V3EmitCHeaders.cpp | 2 +-
 src/V3EmitCImp.cpp     | 4 ++--
 src/V3EmitCMake.cpp    | 4 +---
 src/V3EmitCModel.cpp   | 4 ++--
 src/V3EmitCSyms.cpp    | 2 +-
 src/V3EmitMk.cpp       | 2 +-
 src/V3HierBlock.cpp    | 9 ++-------
 src/V3Options.cpp      | 8 ++++----
 src/V3Options.h        | 2 +-
 10 files changed, 16 insertions(+), 23 deletions(-)

diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index dbf5026a0..a90368ace 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -603,7 +603,7 @@ public:
         puts(");\n");
     }
     void visit(AstCoverInc* nodep) override {
-        if (v3Global.opt.threads()) {
+        if (v3Global.opt.threads() > 1) {
             puts("vlSymsp->__Vcoverage[");
             puts(cvtToStr(nodep->declp()->dataDeclThisp()->binNum()));
             puts("].fetch_add(1, std::memory_order_relaxed);\n");
diff --git a/src/V3EmitCHeaders.cpp b/src/V3EmitCHeaders.cpp
index 8d9f71c8d..df00d1bef 100644
--- a/src/V3EmitCHeaders.cpp
+++ b/src/V3EmitCHeaders.cpp
@@ -170,7 +170,7 @@ class EmitCHeader final : public EmitCConstInit {
         if (v3Global.opt.coverage() && !VN_IS(modp, Class)) {
             decorateFirst(first, section);
             puts("void __vlCoverInsert(");
-            puts(v3Global.opt.threads() ? "std::atomic<uint32_t>" : "uint32_t");
+            puts(v3Global.opt.threads() > 1 ? "std::atomic<uint32_t>" : "uint32_t");
             puts("* countp, bool enable, const char* filenamep, int lineno, int column,\n");
             puts("const char* hierp, const char* pagep, const char* commentp, const char* "
                  "linescovp);\n");
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index e20320052..7ec3acee9 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -307,12 +307,12 @@ class EmitCImp final : EmitCFunc {
             // function. This gets around gcc slowness constructing all of the template
             // arguments.
             puts("void " + prefixNameProtect(m_modp) + "::__vlCoverInsert(");
-            puts(v3Global.opt.threads() ? "std::atomic<uint32_t>" : "uint32_t");
+            puts(v3Global.opt.threads() > 1 ? "std::atomic<uint32_t>" : "uint32_t");
             puts("* countp, bool enable, const char* filenamep, int lineno, int column,\n");
             puts("const char* hierp, const char* pagep, const char* commentp, const char* "
                  "linescovp) "
                  "{\n");
-            if (v3Global.opt.threads()) {
+            if (v3Global.opt.threads() > 1) {
                 puts("assert(sizeof(uint32_t) == sizeof(std::atomic<uint32_t>));\n");
                 puts("uint32_t* count32p = reinterpret_cast<uint32_t*>(countp);\n");
             } else {
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index ca548d68b..1cf10b01c 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -160,9 +160,7 @@ class CMakeEmitter final {
         if (v3Global.usesTiming()) {
             global.emplace_back("${VERILATOR_ROOT}/include/verilated_timing.cpp");
         }
-        if (v3Global.opt.threads()) {
-            global.emplace_back("${VERILATOR_ROOT}/include/verilated_threads.cpp");
-        }
+        global.emplace_back("${VERILATOR_ROOT}/include/verilated_threads.cpp");
         if (v3Global.opt.usesProfiler()) {
             global.emplace_back("${VERILATOR_ROOT}/include/verilated_profiler.cpp");
         }
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 5abad82d7..b7caefa54 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -420,7 +420,7 @@ class EmitCModel final : public EmitCFunc {
         if (v3Global.opt.threads() == 1) {
             puts("Verilated::endOfThreadMTask(vlSymsp->__Vm_evalMsgQp);\n");
         }
-        if (v3Global.opt.threads()) puts("Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);\n");
+        puts("Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);\n");
 
         if (v3Global.opt.profExec()) puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).evalEnd();\n");
         puts("}\n");
@@ -482,7 +482,7 @@ class EmitCModel final : public EmitCFunc {
         puts("const char* " + topClassName() + "::modelName() const { return \"" + topClassName()
              + "\"; }\n");
         puts("unsigned " + topClassName() + "::threads() const { return "
-             + cvtToStr(std::max(1, v3Global.opt.threads())) + "; }\n");
+             + cvtToStr(v3Global.opt.threads()) + "; }\n");
         puts("void " + topClassName()
              + "::prepareClone() const { contextp()->prepareClone(); }\n");
         puts("void " + topClassName() + "::atClone() const {\n");
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 8ac652a4b..85ccaae23 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -489,7 +489,7 @@ void EmitCSyms::emitSymHdr() {
 
     if (m_coverBins) {
         puts("\n// COVERAGE\n");
-        puts(v3Global.opt.threads() ? "std::atomic<uint32_t>" : "uint32_t");
+        puts(v3Global.opt.threads() > 1 ? "std::atomic<uint32_t>" : "uint32_t");
         puts(" __Vcoverage[");
         puts(cvtToStr(m_coverBins));
         puts("];\n");
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index e55ff26f5..8bea8b362 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -106,7 +106,7 @@ public:
                     }
                     if (v3Global.usesProbDist()) putMakeClassEntry(of, "verilated_probdist.cpp");
                     if (v3Global.usesTiming()) putMakeClassEntry(of, "verilated_timing.cpp");
-                    if (v3Global.opt.threads()) putMakeClassEntry(of, "verilated_threads.cpp");
+                    putMakeClassEntry(of, "verilated_threads.cpp");
                     if (v3Global.opt.usesProfiler()) {
                         putMakeClassEntry(of, "verilated_profiler.cpp");
                     }
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index f1624493b..b21a6e099 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -159,7 +159,7 @@ V3StringList V3HierBlock::commandArgs(bool forCMake) const {
     opts.push_back(" --lib-create " + modp()->name());  // possibly mangled name
     if (v3Global.opt.protectKeyProvided())
         opts.push_back(" --protect-key " + v3Global.opt.protectKeyDefaulted());
-    opts.push_back(" --hierarchical-child " + cvtToStr(std::max(1, v3Global.opt.threads())));
+    opts.push_back(" --hierarchical-child " + cvtToStr(v3Global.opt.threads()));
 
     const StrGParams gparamsStr = stringifyParams(gparams(), true);
     for (StrGParams::const_iterator paramIt = gparamsStr.begin(); paramIt != gparamsStr.end();
@@ -227,9 +227,6 @@ void V3HierBlock::writeCommandArgsFile(bool forCMake) const {
     for (const string& opt : commandOpts) *of << opt << "\n";
     *of << hierBlockArgs().front() << "\n";
     for (const auto& hierblockp : m_children) *of << hierblockp->hierBlockArgs().front() << "\n";
-    // Hierarchical blocks should not use multi-threading,
-    // but needs to be thread safe when top is multi-threaded.
-    if (v3Global.opt.threads() > 0) *of << "--threads 1\n";
     *of << v3Global.opt.allArgsStringForHierBlock(false) << "\n";
 }
 
@@ -425,9 +422,7 @@ void V3HierBlockPlan::writeCommandArgsFiles(bool forCMake) const {
     if (v3Global.opt.protectKeyProvided()) {
         *of << "--protect-key " << v3Global.opt.protectKeyDefaulted() << "\n";
     }
-    if (v3Global.opt.threads() > 0) {
-        *of << "--threads " << cvtToStr(v3Global.opt.threads()) << "\n";
-    }
+    *of << "--threads " << cvtToStr(v3Global.opt.threads()) << "\n";
     *of << (v3Global.opt.systemC() ? "--sc" : "--cc") << "\n";
     *of << v3Global.opt.allArgsStringForHierBlock(true) << "\n";
 }
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 554af3421..d64519e07 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -875,11 +875,8 @@ void V3Options::notify() VL_MT_DISABLED {
     }
 
     if (trace()) {
-        // With --trace-fst, --trace-threads implies --threads 1 unless explicitly specified
-        if (traceFormat().fst() && traceThreads() && !threads()) m_threads = 1;
-
         // With --trace, --trace-threads is ignored
-        if (traceFormat().vcd()) m_traceThreads = threads() ? 1 : 0;
+        if (traceFormat().vcd()) m_traceThreads = 1;
     }
 
     UASSERT(!(useTraceParallel() && useTraceOffload()),
@@ -906,6 +903,9 @@ void V3Options::notify() VL_MT_DISABLED {
         m_dumpLevel["tree"] = m_dumpLevel["tree-dot"];
     }
 
+    // Sanity check of expected configuration
+    UASSERT(threads() >= 1, "'threads()' must return a value >= 1");
+
     // Preprocessor defines based on options used
     if (timing().isSetTrue()) V3PreShell::defineCmdLine("VERILATOR_TIMING", "1");
 }
diff --git a/src/V3Options.h b/src/V3Options.h
index 6378c8545..259462fe8 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -549,7 +549,7 @@ public:
     int traceThreads() const { return m_traceThreads; }
     bool useTraceOffload() const { return trace() && traceFormat().fst() && traceThreads() > 1; }
     bool useTraceParallel() const {
-        return trace() && traceFormat().vcd() && threads() && (threads() > 1 || hierChild() > 1);
+        return trace() && traceFormat().vcd() && (threads() > 1 || hierChild() > 1);
     }
     bool useFstWriterThread() const { return traceThreads() && traceFormat().fst(); }
     unsigned vmTraceThreads() const {

From 332a687aefb014c2e3d711ae86f9cf993967423e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 21 Oct 2023 10:35:07 -0400
Subject: [PATCH 106/157] Commentary

---
 ci/ci-ccache-maint.bash | 1 +
 ci/ci-script.bash       | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/ci/ci-ccache-maint.bash b/ci/ci-ccache-maint.bash
index 0c0cf00e6..ee0195a8d 100755
--- a/ci/ci-ccache-maint.bash
+++ b/ci/ci-ccache-maint.bash
@@ -26,4 +26,5 @@ if git log --format=%B -n 1 "$COMMIT" | grep -q -i '\[CI\s\+ccache\s\+clear\]';
 fi
 
 # Dump stats, then zero stats
+# 22.04: ccache -s -v -z
 ccache -s -z
diff --git a/ci/ci-script.bash b/ci/ci-script.bash
index 225c9b50c..1ce2da5e5 100755
--- a/ci/ci-script.bash
+++ b/ci/ci-script.bash
@@ -49,6 +49,7 @@ if [ "$CI_BUILD_STAGE_NAME" = "build" ]; then
     ./configure --enable-longtests --enable-ccwarn ${CI_M32:+--enable-m32}
     ccache -z
     "$MAKE" -j "$NPROC" -k
+    # 22.04: ccache -s -v
     ccache -s
     if [ "$CI_OS_NAME" = "osx" ]; then
       file bin/verilator_bin
@@ -180,6 +181,7 @@ elif [ "$CI_BUILD_STAGE_NAME" = "test" ]; then
       fatal "Unknown test: $TESTS"
       ;;
   esac
+  # 22.04: ccache -s -v
   ccache -s
 
   # Upload coverage data

From afaa02709cfe3379c973b6c056093299c217abb7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 21 Oct 2023 10:38:46 -0400
Subject: [PATCH 107/157] CI: Increase CCACHE_MAXSIZE (#4595)

---
 .github/workflows/build.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index ee8fc9162..ca68a4957 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -63,7 +63,7 @@ jobs:
       CC: ${{ matrix.compiler.cc }}
       CXX: ${{ matrix.compiler.cxx }}
       CACHE_BASE_KEY: build-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}
-      CCACHE_MAXSIZE: 250M # Per build matrix entry (2000M in total)
+      CCACHE_MAXSIZE: 1000M # Per build matrix entry (* 5 = 5000M in total)
       VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
     steps:
 
@@ -136,7 +136,7 @@ jobs:
       CC: ${{ matrix.compiler.cc }}
       CXX: ${{ matrix.compiler.cxx }}
       CACHE_BASE_KEY: test-${{ matrix.os }}-${{ matrix.compiler.cc }}-m32=${{ matrix.m32 }}-${{ matrix.suite }}
-      CCACHE_MAXSIZE: 64M # Per build matrix entry (2160M in total)
+      CCACHE_MAXSIZE: 100M # Per build per suite (* 5 * 5 = 2500M in total)
       VERILATOR_ARCHIVE: verilator-${{ github.sha }}-${{ matrix.os }}-${{ matrix.compiler.cc }}${{ matrix.m32 && '-m32' || '' }}.tar.gz
     steps:
 

From 1075b006b56e21646d11605eac4879fba53cd43a Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 14:48:20 +0100
Subject: [PATCH 108/157] Consider children of AstConcat in V3InstrCount

Previously V3InstrCount used to completely ignore an AstConcat,
including its children (see the rational in the comment). The problem is
the operands can be huge and expensive compound expressions (especially
since DFG), and not just a simple variable reference. This fix gains
some MT speed improvement.
---
 src/V3InstrCount.cpp | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 95bbdaa06..b7dfff1e1 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -146,11 +146,9 @@ private:
     }
     void visit(AstConcat* nodep) override {
         if (m_ignoreRemaining) return;
-        // Nop.
-        //
-        // Ignore concat. The problem with counting concat is that when we
-        // have many things concatted together, it's not a single
-        // operation, but this:
+        // Ignore the cost of the concat node itself. The problem with
+        // counting concat is that when we have many things concatted
+        // together, it's not a single operation, but this:
         //
         //  concat(a, concat(b, concat(c, concat(d, ... ))))
         //
@@ -162,7 +160,8 @@ private:
         // cost is linear with the size of the data. We don't need to count
         // the concat at all to reflect a linear cost; it's already there
         // in the width of the destination (which we count) and the sum of
-        // the widths of the operands (ignored here).
+        // the cost of the operands.
+        iterateChildrenConst(nodep);
         markCost(nodep);
     }
     void visit(AstNodeIf* nodep) override {

From eae942b91c3a88fc3cdaac671522a2c645521c07 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 21 Oct 2023 12:48:19 -0400
Subject: [PATCH 109/157] Internals: Fix some lint-py warnings

---
 docs/bin/vl_sphinx_extract    | 2 +-
 docs/guide/conf.py            | 2 +-
 examples/xml_py/vl_file_copy  | 4 ++--
 examples/xml_py/vl_hier_graph | 4 ++--
 nodist/code_coverage          | 2 +-
 nodist/install_test           | 2 +-
 src/astgen                    | 4 ++--
 7 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/docs/bin/vl_sphinx_extract b/docs/bin/vl_sphinx_extract
index 5c446a327..b607bd9d0 100755
--- a/docs/bin/vl_sphinx_extract
+++ b/docs/bin/vl_sphinx_extract
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0201,R0903
+# pylint: disable=C0112,C0114,C0115,C0116,C0209,C0301,R0903
 # -*- Python -*- See copyright, etc below
 ######################################################################
 
diff --git a/docs/guide/conf.py b/docs/guide/conf.py
index d022012c2..e8d5c0234 100644
--- a/docs/guide/conf.py
+++ b/docs/guide/conf.py
@@ -230,4 +230,4 @@ spelling_ignore_contributor_names = True
 
 breathe_projects = {"verilated": "_build/doxygen/verilated/xml/"}
 breathe_default_project = "verilated"
-breathe_default_members = ('members')
+breathe_default_members = 'members'
diff --git a/examples/xml_py/vl_file_copy b/examples/xml_py/vl_file_copy
index b221eba6a..b8ac1e34c 100755
--- a/examples/xml_py/vl_file_copy
+++ b/examples/xml_py/vl_file_copy
@@ -60,8 +60,8 @@ class VlFileCopy:
             print("\t%s " % command)
         status = subprocess.call(command, shell=True)
         if status != 0:
-            raise Exception("Command failed running Verilator with '" +
-                            command + "', stopped")
+            raise RuntimeError("Command failed running Verilator with '" +
+                               command + "', stopped")
 
 
 #######################################################################
diff --git a/examples/xml_py/vl_hier_graph b/examples/xml_py/vl_hier_graph
index a2e82fabd..faa79ed2d 100755
--- a/examples/xml_py/vl_hier_graph
+++ b/examples/xml_py/vl_hier_graph
@@ -83,8 +83,8 @@ class VlHierGraph:
             print("\t%s " % command)
         status = subprocess.call(command, shell=True)
         if status != 0:
-            raise Exception("Command failed running Verilator with '" +
-                            command + "', stopped")
+            raise RuntimeError("Command failed running Verilator with '" +
+                               command + "', stopped")
 
 
 #######################################################################
diff --git a/nodist/code_coverage b/nodist/code_coverage
index 2fe0d13ac..5eb472bc3 100755
--- a/nodist/code_coverage
+++ b/nodist/code_coverage
@@ -316,7 +316,7 @@ def run(command):
     print("\t%s" % command)
     status = subprocess.call(command, shell=True)
     if status < 0:
-        raise Exception("%Error: Command failed " + command + ", stopped")
+        raise RuntimeError("%Error: Command failed " + command + ", stopped")
 
 
 def unlink_ok(filename):
diff --git a/nodist/install_test b/nodist/install_test
index 423400c45..3929d825b 100755
--- a/nodist/install_test
+++ b/nodist/install_test
@@ -104,7 +104,7 @@ def run(command):
     os.system(command)
     status = subprocess.call(command, shell=True)
     if status < 0:
-        raise Exception("%Error: Command failed " + command + ", stopped")
+        raise RuntimeError("%Error: Command failed " + command + ", stopped")
 
 
 #######################################################################
diff --git a/src/astgen b/src/astgen
index 761313ee5..0ace3f347 100755
--- a/src/astgen
+++ b/src/astgen
@@ -350,7 +350,7 @@ class Cpt:
 
     def _exec_syms_recurse(self, aref):
         for sym in aref:
-            if type(sym) is list:
+            if isinstance(sym, list):
                 self._exec_syms_recurse(sym)
             elif re.search(r'^\$.*', sym):
                 if sym not in self._exec_syms:
@@ -365,7 +365,7 @@ class Cpt:
                 first = False
                 continue
             out += ", "
-            if type(sym) is list:
+            if isinstance(sym, list):
                 out += self._exec_new_recurse(sym)
             elif re.match(r'^\$.*', sym):
                 out += self._exec_syms[sym]

From b78ea0682956c580d72bdf28e29b72492cae0df4 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 15:29:18 +0100
Subject: [PATCH 110/157] Make VL_LOCK_SPINS configurable

It's unlikely one value fits all use case, so making VL_LOCK_SPINS
configurable at model build time.

For testing, we reduce the value as we expect high contention.
---
 include/verilated.h       | 2 ++
 test_regress/Makefile_obj | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/include/verilated.h b/include/verilated.h
index 250f4a83d..eb35276c2 100644
--- a/include/verilated.h
+++ b/include/verilated.h
@@ -164,7 +164,9 @@ inline constexpr size_t roundUpToMultipleOf(size_t value) {
 // Return current thread ID (or 0), not super fast, cache if needed
 extern uint32_t VL_THREAD_ID() VL_MT_SAFE;
 
+#ifndef VL_LOCK_SPINS
 #define VL_LOCK_SPINS 50000  /// Number of times to spin for a mutex before yielding
+#endif
 
 /// Mutex, wrapped to allow -fthread_safety checks
 class VL_CAPABILITY("mutex") VerilatedMutex final {
diff --git a/test_regress/Makefile_obj b/test_regress/Makefile_obj
index 237ab1224..297f3d560 100644
--- a/test_regress/Makefile_obj
+++ b/test_regress/Makefile_obj
@@ -39,6 +39,9 @@ CPPFLAGS += $(CPPFLAGS_DRIVER)
 CPPFLAGS += $(CPPFLAGS_DRIVER2)
 CPPFLAGS += $(CPPFLAGS_ADD)
 
+# Reduce spin count for faster testing
+CPPFLAGS += -DVL_LOCK_SPINS=10000
+
 ifeq ($(CFG_WITH_LONGTESTS),yes)
   ifeq ($(DRIVER_STD),newest)
     CPPFLAGS += $(CFG_CXXFLAGS_STD)

From 10d33238b9f970adcbfd66fe91e8f2297bde27d0 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 15:39:44 +0100
Subject: [PATCH 111/157] Do not merge entry/exit MTasks during coarsening

---
 src/V3Partition.cpp | 38 +++++++++++++++++++++++++++-----------
 src/V3Partition.h   |  4 ++++
 2 files changed, 31 insertions(+), 11 deletions(-)

diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index 16e7d612c..b1e2edb21 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -1256,12 +1256,18 @@ private:
     PartPropagateCp<GraphWay::FORWARD> m_forwardPropagator{m_slowAsserts};  // Forward propagator
     PartPropagateCp<GraphWay::REVERSE> m_reversePropagator{m_slowAsserts};  // Reverse propagator
 
+    LogicMTask* const m_entryMTaskp;  // Singular source vertex of the dependency graph
+    LogicMTask* const m_exitMTaskp;  // Singular sink vertex of the dependency graph
+
 public:
     // CONSTRUCTORS
-    PartContraction(V3Graph* mtasksp, uint32_t scoreLimit, bool slowAsserts)
+    PartContraction(V3Graph* mtasksp, uint32_t scoreLimit, LogicMTask* entryMTaskp,
+                    LogicMTask* exitMTaskp, bool slowAsserts)
         : m_mtasksp{mtasksp}
         , m_scoreLimit{scoreLimit}
-        , m_slowAsserts{slowAsserts} {}
+        , m_slowAsserts{slowAsserts}
+        , m_entryMTaskp{entryMTaskp}
+        , m_exitMTaskp{exitMTaskp} {}
 
     // METHODS
     void go() {
@@ -1377,6 +1383,16 @@ public:
                 continue;
             }
 
+            // Avoid merging the entry/exit nodes. This would create serialization, by forcing the
+            // merged MTask to run before/after everything else. Empirically this helps
+            // performance in a modest way by allowing other MTasks to start earlier.
+            if (MTaskEdge* const edgep = mergeCanp->toMTaskEdge()) {
+                if (edgep->fromp() == m_entryMTaskp || edgep->top() == m_exitMTaskp) {
+                    m_sb.remove(mergeCanp);
+                    continue;
+                }
+            }
+
             // Avoid merging any edge that would create a cycle.
             //
             // For example suppose we begin with vertices A, B, C and edges
@@ -1742,7 +1758,7 @@ private:
         // slowAsserts.
         PartContraction ec{&mtasks,
                            // Any CP limit >chain_len should work:
-                           chain_len * 2, false /* slowAsserts */};
+                           chain_len * 2, nullptr, nullptr, false /* slowAsserts */};
         ec.go();
 
         PartParallelismEst check{&mtasks};
@@ -1796,7 +1812,7 @@ private:
         }
 
         partInitCriticalPaths(&mtasks);
-        PartContraction{&mtasks, 20, true}.go();
+        PartContraction{&mtasks, 20, nullptr, nullptr, true}.go();
 
         PartParallelismEst check{&mtasks};
         check.traverse();
@@ -2644,7 +2660,7 @@ uint32_t V3Partition::setupMTaskDeps(V3Graph* mtasksp) {
     // Artificial single entry point vertex in the MTask graph to allow sibling merges.
     // This is required as otherwise disjoint sub-graphs could not be merged, but the
     // coarsening algorithm assumes that the graph is connected.
-    LogicMTask* const entryMTask = new LogicMTask{mtasksp, nullptr};
+    m_entryMTaskp = new LogicMTask{mtasksp, nullptr};
 
     // The V3InstrCount within LogicMTask will set user5 on each AST
     // node, to assert that we never count any node twice.
@@ -2665,7 +2681,7 @@ uint32_t V3Partition::setupMTaskDeps(V3Graph* mtasksp) {
 
     // Artificial single exit point vertex in the MTask graph to allow sibling merges.
     // this enables merging MTasks with no downstream dependents if that is the ideal merge.
-    LogicMTask* const exitMTask = new LogicMTask{mtasksp, nullptr};
+    m_exitMTaskp = new LogicMTask{mtasksp, nullptr};
 
     // Create the mtask->mtask dependency edges based on the dependencies between MTaskMoveVertex
     // vertices.
@@ -2674,7 +2690,7 @@ uint32_t V3Partition::setupMTaskDeps(V3Graph* mtasksp) {
         LogicMTask* const mtaskp = static_cast<LogicMTask*>(vtxp);
 
         // Entry and exit vertices handled separately
-        if (VL_UNLIKELY((mtaskp == entryMTask) || (mtaskp == exitMTask))) continue;
+        if (VL_UNLIKELY((mtaskp == m_entryMTaskp) || (mtaskp == m_exitMTaskp))) continue;
 
         // At this point, there should only be one MTaskMoveVertex per LogicMTask
         UASSERT_OBJ(mtaskp->vertexListp()->size() == 1, mtaskp, "Multiple MTaskMoveVertex");
@@ -2714,11 +2730,11 @@ uint32_t V3Partition::setupMTaskDeps(V3Graph* mtasksp) {
         nextp = vtxp->verticesNextp();
         LogicMTask* const mtaskp = static_cast<LogicMTask*>(vtxp);
 
-        if (VL_UNLIKELY((mtaskp == entryMTask) || (mtaskp == exitMTask))) continue;
+        if (VL_UNLIKELY((mtaskp == m_entryMTaskp) || (mtaskp == m_exitMTaskp))) continue;
 
         // Add the entry/exit edges
-        if (mtaskp->inEmpty()) new MTaskEdge{mtasksp, entryMTask, mtaskp, 1};
-        if (mtaskp->outEmpty()) new MTaskEdge{mtasksp, mtaskp, exitMTask, 1};
+        if (mtaskp->inEmpty()) new MTaskEdge{mtasksp, m_entryMTaskp, mtaskp, 1};
+        if (mtaskp->outEmpty()) new MTaskEdge{mtasksp, mtaskp, m_exitMTaskp, 1};
     }
 
     return totalGraphCost;
@@ -2786,7 +2802,7 @@ void V3Partition::go(V3Graph* mtasksp) {
     // Some tests disable this, hence the test on threadsCoarsen().
     // Coarsening is always enabled in production.
     if (v3Global.opt.threadsCoarsen()) {
-        PartContraction{mtasksp, cpLimit,
+        PartContraction{mtasksp, cpLimit, m_entryMTaskp, m_exitMTaskp,
                         // --debugPartition is used by tests
                         // to enable slow assertions.
                         v3Global.opt.debugPartition()}
diff --git a/src/V3Partition.h b/src/V3Partition.h
index caac97371..5aba6b009 100644
--- a/src/V3Partition.h
+++ b/src/V3Partition.h
@@ -41,6 +41,10 @@ class V3Partition final {
     // MEMBERS
     const OrderGraph* const m_orderGraphp;  // The OrderGraph
     const V3Graph* const m_fineDepsGraphp;  // Fine-grained dependency graph
+
+    LogicMTask* m_entryMTaskp = nullptr;  // Singular source vertex of the dependency graph
+    LogicMTask* m_exitMTaskp = nullptr;  // Singular sink vertex of the dependency graph
+
 public:
     // CONSTRUCTORS
     explicit V3Partition(const OrderGraph* orderGraphp, const V3Graph* fineDepsGraphp)

From a09506a0ad95b02168b4c733e94394c40f8543ca Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 18:01:45 +0100
Subject: [PATCH 112/157] Trivial simplification of V3EmitCModel

Still some remains of the --threads 0 mode. Remove unnecessary complexity
from V3EmitCModel. (Also don't pretend there is an MTask in single
threaded mode, when there really isn't.)
---
 include/verilated.cpp                 |  1 +
 include/verilated.h                   |  1 +
 src/V3EmitCModel.cpp                  | 10 ------
 test_regress/t/t_timing_debug1.out    | 45 ---------------------------
 test_regress/t/t_timing_debug2.out    | 21 -------------
 test_regress/t/t_trace_noflag_bad.out |  2 +-
 test_regress/t/t_verilated_debug.out  |  2 --
 7 files changed, 3 insertions(+), 79 deletions(-)

diff --git a/include/verilated.cpp b/include/verilated.cpp
index 0794d4dd2..dd574a93e 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -3024,6 +3024,7 @@ void Verilated::endOfEval(VerilatedEvalMsgQueue* evalMsgQp) VL_MT_SAFE {
     // It should be ok to call into endOfEvalGuts, it returns immediately
     // if there are no transactions.
     VL_DEBUG_IF(VL_DBG_MSGF("End-of-eval cleanup\n"););
+    VerilatedThreadMsgQueue::flush(evalMsgQp);
     evalMsgQp->process();
 }
 
diff --git a/include/verilated.h b/include/verilated.h
index eb35276c2..4e4503a8d 100644
--- a/include/verilated.h
+++ b/include/verilated.h
@@ -921,6 +921,7 @@ public:
 
     // Internal: Called at end of each thread mtask, before finishing eval
     static void endOfThreadMTask(VerilatedEvalMsgQueue* evalMsgQp) VL_MT_SAFE {
+        mtaskId(0);
         if (VL_UNLIKELY(t_s.t_endOfEvalReqd)) endOfThreadMTaskGuts(evalMsgQp);
     }
     // Internal: Called at end of eval loop
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index b7caefa54..ac2c5c316 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -401,13 +401,6 @@ class EmitCModel final : public EmitCFunc {
         puts(topModNameProtected + "__" + protect("_eval_settle") + "(&(vlSymsp->TOP));\n");
         puts("}\n");
 
-        if (v3Global.opt.threads() == 1) {
-            const uint32_t mtaskId = 0;
-            putsDecoration("// MTask " + cvtToStr(mtaskId) + " start\n");
-            puts("VL_DEBUG_IF(VL_DBG_MSGF(\"MTask" + cvtToStr(mtaskId) + " starting\\n\"););\n");
-            puts("Verilated::mtaskId(" + cvtToStr(mtaskId) + ");\n");
-        }
-
         if (v3Global.opt.profExec()) {
             puts("vlSymsp->__Vm_executionProfilerp->configure();\n");
             puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).evalBegin();\n");
@@ -417,9 +410,6 @@ class EmitCModel final : public EmitCFunc {
         puts(topModNameProtected + "__" + protect("_eval") + "(&(vlSymsp->TOP));\n");
 
         putsDecoration("// Evaluate cleanup\n");
-        if (v3Global.opt.threads() == 1) {
-            puts("Verilated::endOfThreadMTask(vlSymsp->__Vm_evalMsgQp);\n");
-        }
         puts("Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);\n");
 
         if (v3Global.opt.profExec()) puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).evalEnd();\n");
diff --git a/test_regress/t/t_timing_debug1.out b/test_regress/t/t_timing_debug1.out
index 337319d92..540f6e60d 100644
--- a/test_regress/t/t_timing_debug1.out
+++ b/test_regress/t/t_timing_debug1.out
@@ -32,7 +32,6 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__stl
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__stl
 -V{t#,#}         No triggers active
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -65,7 +64,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -125,7 +123,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -164,7 +161,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -198,7 +194,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -250,7 +245,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -315,7 +309,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -358,7 +351,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -391,7 +383,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -448,7 +439,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -486,7 +476,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -519,7 +508,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -570,7 +558,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -608,7 +595,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -646,7 +632,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -679,7 +664,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -730,7 +714,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -768,7 +751,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -801,7 +783,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -874,7 +855,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -908,7 +888,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -946,7 +925,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -979,7 +957,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1036,7 +1013,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1074,7 +1050,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1107,7 +1082,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1144,7 +1118,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1195,7 +1168,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1233,7 +1205,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1266,7 +1237,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1317,7 +1287,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1355,7 +1324,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1422,7 +1390,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1455,7 +1422,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1512,7 +1478,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1550,7 +1515,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1583,7 +1547,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1634,7 +1597,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1676,7 +1638,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1709,7 +1670,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1760,7 +1720,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1798,7 +1757,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1831,7 +1789,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1882,7 +1839,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
@@ -1945,7 +1901,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
diff --git a/test_regress/t/t_timing_debug2.out b/test_regress/t/t_timing_debug2.out
index 0e22dcd4e..02f53ec34 100644
--- a/test_regress/t/t_timing_debug2.out
+++ b/test_regress/t/t_timing_debug2.out
@@ -77,7 +77,6 @@
 -V{t#,#}+      Vt_timing_debug2_t___eval_initial__TOP__t__8
 -V{t#,#}+      Vt_timing_debug2_t___eval_initial__TOP__t__9
 -V{t#,#}+    Vt_timing_debug2___024root___eval_settle
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -93,7 +92,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -154,7 +152,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -206,7 +203,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -266,7 +262,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -352,7 +347,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -442,7 +436,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -515,7 +508,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -605,7 +597,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -695,7 +686,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -759,7 +749,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -803,7 +792,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -846,7 +834,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -908,7 +895,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -951,7 +937,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1018,7 +1003,6 @@
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aForkDelayClass::~
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aForkClass::~
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1052,7 +1036,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1088,7 +1071,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1121,7 +1103,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1155,7 +1136,6 @@
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aAssignDelayClass::~
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
@@ -1186,7 +1166,6 @@
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
diff --git a/test_regress/t/t_trace_noflag_bad.out b/test_regress/t/t_trace_noflag_bad.out
index 66a2974a8..658b49c8d 100644
--- a/test_regress/t/t_trace_noflag_bad.out
+++ b/test_regress/t/t_trace_noflag_bad.out
@@ -1,2 +1,2 @@
-%Error: Vt_trace_noflag_bad.cpp:105: 'Vt_trace_noflag_bad::trace()' called on model that was Verilated without --trace option
+%Error: Vt_trace_noflag_bad.cpp:101: 'Vt_trace_noflag_bad::trace()' called on model that was Verilated without --trace option
 Aborting...
diff --git a/test_regress/t/t_verilated_debug.out b/test_regress/t/t_verilated_debug.out
index 55cf9f490..ef9dbeddd 100644
--- a/test_regress/t/t_verilated_debug.out
+++ b/test_regress/t/t_verilated_debug.out
@@ -13,7 +13,6 @@ internalsDump:
 -V{t#,#}+    Vt_verilated_debug___024root___eval_initial__TOP
   Data: w96: 000000aa 000000bb 000000cc 
 -V{t#,#}+    Vt_verilated_debug___024root___eval_settle
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act
@@ -22,7 +21,6 @@ internalsDump:
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_verilated_debug::eval_step
 -V{t#,#}+    Vt_verilated_debug___024root___eval_debug_assertions
--V{t#,#}MTask0 starting
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act

From 52f2b9ef5886652fa8c12708cc10114ea2fc71e2 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 20:24:20 +0100
Subject: [PATCH 113/157] Remove pointless test

t_optm_if_cond was a test for a then non-existent optimization to merge
conditionals. V3MergeCond implements this and has its own tests.
---
 test_regress/t/t_optm_if_cond.pl | 22 ------------
 test_regress/t/t_optm_if_cond.v  | 57 --------------------------------
 2 files changed, 79 deletions(-)
 delete mode 100755 test_regress/t/t_optm_if_cond.pl
 delete mode 100644 test_regress/t/t_optm_if_cond.v

diff --git a/test_regress/t/t_optm_if_cond.pl b/test_regress/t/t_optm_if_cond.pl
deleted file mode 100755
index 3215fbf08..000000000
--- a/test_regress/t/t_optm_if_cond.pl
+++ /dev/null
@@ -1,22 +0,0 @@
-#!/usr/bin/env perl
-if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2019 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-scenarios(vlt => 1);
-
-compile(
-    verilator_flags2 => ['--stats', "-fno-merge-cond"],
-    );
-
-if ($Self->{vlt_all}) {
-    file_grep($Self->{stats}, qr/Node count, IF  +\d+ +\d+ +\d+ +\d+ +(\d+)/, 28);
-}
-
-ok(1);
-1;
diff --git a/test_regress/t/t_optm_if_cond.v b/test_regress/t/t_optm_if_cond.v
deleted file mode 100644
index f9509efad..000000000
--- a/test_regress/t/t_optm_if_cond.v
+++ /dev/null
@@ -1,57 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2020 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-module t(/*AUTOARG*/
-   // Outputs
-   q0, q1, q2, q3, q4,
-   // Inputs
-   clk, rst, en, i0, i1, i2, i3, i4
-   );
-   input clk;
-
-   input rst;
-   input en;
-   output int q0;   input int i0;
-   output int q1;   input int i1;
-   output int q2;   input int i2;
-   output int q3;   input int i3;
-   output int q4;   input int i4;
-
-   always @ (posedge clk) begin
-      if (rst) begin
-         if (en) q0 <= i0;
-      end
-      else q0 <= 0;
-
-      if (rst) begin
-         if (en) q1 <= i1;
-      end
-      else q1 <= 0;
-
-      if (rst) begin
-         if (en) q2 <= i2;
-      end
-      else q2 <= 0;
-
-      if (rst) begin
-         if (en) q3 <= i3;
-      end
-      else q3 <= 0;
-   end
-
-   always_comb begin
-      q4 = i4;
-      if (q4 == 0) begin
-         // Conflicts with condition
-         q4 = 1;
-      end
-      if (q4 == 0) begin
-         // Conflicts with condition
-         q4 = 2;
-      end
-   end
-
-endmodule

From 146cdc020d84db9a26aa65f82ca60d65c49a4032 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 20:30:02 +0100
Subject: [PATCH 114/157] Remove V3AstConstOnly.h

This is now redundant with the introduction of VNVisitorConst
---
 src/CMakeLists.txt   |  1 -
 src/V3AstConstOnly.h | 29 -----------------------------
 src/V3Broken.cpp     |  4 ----
 src/V3Stats.cpp      |  3 ---
 4 files changed, 37 deletions(-)
 delete mode 100644 src/V3AstConstOnly.h

diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 8124e0ee3..fdf215082 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -35,7 +35,6 @@ set(HEADERS
     V3Assert.h
     V3AssertPre.h
     V3Ast.h
-    V3AstConstOnly.h
     V3AstInlines.h
     V3AstNodeDType.h
     V3AstNodeExpr.h
diff --git a/src/V3AstConstOnly.h b/src/V3AstConstOnly.h
deleted file mode 100644
index f785a3239..000000000
--- a/src/V3AstConstOnly.h
+++ /dev/null
@@ -1,29 +0,0 @@
-// -*- mode: C++; c-file-style: "cc-mode" -*-
-//*************************************************************************
-// DESCRIPTION: Verilator: Ast node structure
-//
-// Code available from: https://verilator.org
-//
-//*************************************************************************
-//
-// Copyright 2003-2023 by Wilson Snyder. This program is free software; you
-// can redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License Version 3 or the Perl Artistic License
-// Version 2.0.
-// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-//
-//*************************************************************************
-
-#ifndef VERILATOR_V3ASTCONSTONLY_H_
-#define VERILATOR_V3ASTCONSTONLY_H_
-
-// Include only in visitors that do not not edit nodes, so should use constant iterators
-#define iterateAndNext error_use_iterateAndNextConst
-#define iterateChildren error_use_iterateChildrenConst
-
-#define addNext error_no_addNext_in_ConstOnlyVisitor
-#define replaceWith error_no_replaceWith_in_ConstOnlyVisitor
-#define deleteTree error_no_deleteTree_in_ConstOnlyVisitor
-#define unlinkFrBack error_no_unlinkFrBack_in_ConstOnlyVisitor
-
-#endif  // Guard
diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp
index 9ae17efb9..5daa4f5a8 100644
--- a/src/V3Broken.cpp
+++ b/src/V3Broken.cpp
@@ -26,10 +26,6 @@
 
 #include "V3Broken.h"
 
-// This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
-#include "V3AstConstOnly.h"
-
-#include <unordered_map>
 #include <unordered_set>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index 3f89004df..f79c8145a 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -18,9 +18,6 @@
 
 #include "V3Stats.h"
 
-// This visitor does not edit nodes, and is called at error-exit, so should use constant iterators
-#include "V3AstConstOnly.h"
-
 #include <iomanip>
 #include <map>
 

From 4c0edd2efb20309d8dd18d6ae355949918797c22 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Wed, 10 May 2023 12:12:34 +0100
Subject: [PATCH 115/157] Improve --prof-exec infrastructure and report

Again --prof-exec have bit-rotted a little with all the recent changes
to the structure of the generated code. This patch contains a few
improvements:
- Repalce the eval/evl_loop begin/end events with generic
  section_push/section_pop events, that can be arbitrarily sprinkled
  into the generate code (so long as they are matched correctly) to
  measure various sections. The report then contains a nested profile
  of the sections, and the VCD trace shows the section names.
- Better handling of exec graphs
- Clearer overall statistics
---
 bin/verilator_gantt                  | 615 +++++++++++++++------------
 docs/guide/exe_verilator_gantt.rst   |  14 +-
 include/verilated_profiler.cpp       |  23 +-
 include/verilated_profiler.h         |  24 +-
 src/V3EmitCModel.cpp                 |   4 +-
 src/V3Order.cpp                      |  12 +-
 src/V3Partition.cpp                  |   8 +
 src/V3Sched.cpp                      |  20 +-
 test_regress/t/t_gantt.pl            |   2 +-
 test_regress/t/t_gantt_io.dat        |  12 +-
 test_regress/t/t_gantt_io.out        |  49 ++-
 test_regress/t/t_gantt_io.vcd.out    | 320 +++++++-------
 test_regress/t/t_gantt_io_arm.dat    |   8 +-
 test_regress/t/t_gantt_io_arm.out    |  49 ++-
 test_regress/t/t_gantt_io_noproc.dat |  12 +-
 test_regress/t/t_gantt_io_noproc.out |  49 ++-
 test_regress/t/t_gantt_two.pl        |   2 +-
 17 files changed, 662 insertions(+), 561 deletions(-)

diff --git a/bin/verilator_gantt b/bin/verilator_gantt
index 0015cb57f..60814b209 100755
--- a/bin/verilator_gantt
+++ b/bin/verilator_gantt
@@ -1,33 +1,32 @@
 #!/usr/bin/env python3
-# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,eval-used
+# pylint: disable=C0103,C0114,C0116,C0209,C0301,R0914,R0912,R0915,W0511,W0603,eval-used
 ######################################################################
 
 import argparse
+import bisect
 import collections
 import math
 import re
 import statistics
 # from pprint import pprint
 
-Threads = collections.defaultdict(lambda: collections.defaultdict(lambda: {}))
-Mtasks = collections.defaultdict(lambda: {})
-Evals = collections.defaultdict(lambda: {})
-EvalLoops = collections.defaultdict(lambda: {})
+Sections = []
+LongestVcdStrValueLength = 0
+Threads = collections.defaultdict(lambda: [])  # List of records per thread id
+Mtasks = collections.defaultdict(lambda: {'elapsed': 0, 'end': 0})
+Cpus = collections.defaultdict(lambda: {'mtask_time': 0})
 Global = {
     'args': {},
     'cpuinfo': collections.defaultdict(lambda: {}),
-    'rdtsc_cycle_time': 0,
     'stats': {}
 }
+ElapsedTime = None  # total elapsed time
+ExecGraphTime = 0  # total elapsed time excuting an exec graph
+ExecGraphIntervals = []  # list of (start, end) pairs
 
 ######################################################################
 
 
-def process(filename):
-    read_data(filename)
-    report()
-
-
 def read_data(filename):
     with open(filename, "r", encoding="utf8") as fh:
         re_thread = re.compile(r'^VLPROFTHREAD (\d+)$')
@@ -39,14 +38,17 @@ def read_data(filename):
         re_arg1 = re.compile(r'VLPROF arg\s+(\S+)\+([0-9.]*)\s*')
         re_arg2 = re.compile(r'VLPROF arg\s+(\S+)\s+([0-9.]*)\s*$')
         re_stat = re.compile(r'VLPROF stat\s+(\S+)\s+([0-9.]+)')
-        re_time = re.compile(r'rdtsc time = (\d+) ticks')
         re_proc_cpu = re.compile(r'VLPROFPROC processor\s*:\s*(\d+)\s*$')
         re_proc_dat = re.compile(r'VLPROFPROC ([a-z_ ]+)\s*:\s*(.*)$')
         cpu = None
         thread = None
+        execGraphStart = None
 
-        lastEvalBeginTick = None
-        lastEvalLoopBeginTick = None
+        global LongestVcdStrValueLength
+        global ExecGraphTime
+
+        SectionStack = []
+        mTaskThread = {}
 
         for line in fh:
             recordMatch = re_record.match(line)
@@ -54,29 +56,31 @@ def read_data(filename):
                 kind, tick, payload = recordMatch.groups()
                 tick = int(tick)
                 payload = payload.strip()
-                if kind == "EVAL_BEGIN":
-                    Evals[tick]['start'] = tick
-                    lastEvalBeginTick = tick
-                elif kind == "EVAL_END":
-                    Evals[lastEvalBeginTick]['end'] = tick
-                    lastEvalBeginTick = None
-                elif kind == "EVAL_LOOP_BEGIN":
-                    EvalLoops[tick]['start'] = tick
-                    lastEvalLoopBeginTick = tick
-                elif kind == "EVAL_LOOP_END":
-                    EvalLoops[lastEvalLoopBeginTick]['end'] = tick
-                    lastEvalLoopBeginTick = None
+                if kind == "SECTION_PUSH":
+                    LongestVcdStrValueLength = max(LongestVcdStrValueLength,
+                                                   len(payload))
+                    SectionStack.append(payload)
+                    Sections.append((tick, tuple(SectionStack)))
+                elif kind == "SECTION_POP":
+                    assert SectionStack, "SECTION_POP without SECTION_PUSH"
+                    SectionStack.pop()
+                    Sections.append((tick, tuple(SectionStack)))
                 elif kind == "MTASK_BEGIN":
                     mtask, predict_start, ecpu = re_payload_mtaskBegin.match(
                         payload).groups()
                     mtask = int(mtask)
                     predict_start = int(predict_start)
                     ecpu = int(ecpu)
-                    Threads[thread][tick]['mtask'] = mtask
-                    Threads[thread][tick]['predict_start'] = predict_start
-                    Threads[thread][tick]['cpu'] = ecpu
-                    if 'elapsed' not in Mtasks[mtask]:
-                        Mtasks[mtask] = {'end': 0, 'elapsed': 0}
+                    mTaskThread[mtask] = thread
+                    records = Threads[thread]
+                    assert not records or records[-1]['start'] <= records[-1][
+                        'end'] <= tick
+                    records.append({
+                        'start': tick,
+                        'mtask': mtask,
+                        'predict_start': predict_start,
+                        'cpu': ecpu
+                    })
                     Mtasks[mtask]['begin'] = tick
                     Mtasks[mtask]['thread'] = thread
                     Mtasks[mtask]['predict_start'] = predict_start
@@ -86,11 +90,18 @@ def read_data(filename):
                     mtask = int(mtask)
                     predict_cost = int(predict_cost)
                     begin = Mtasks[mtask]['begin']
-                    Threads[thread][begin]['end'] = tick
-                    Threads[thread][begin]['predict_cost'] = predict_cost
+                    record = Threads[mTaskThread[mtask]][-1]
+                    record['end'] = tick
+                    record['predict_cost'] = predict_cost
                     Mtasks[mtask]['elapsed'] += tick - begin
                     Mtasks[mtask]['predict_cost'] = predict_cost
                     Mtasks[mtask]['end'] = max(Mtasks[mtask]['end'], tick)
+                elif kind == "EXEC_GRAPH_BEGIN":
+                    execGraphStart = tick
+                elif kind == "EXEC_GRAPH_END":
+                    ExecGraphTime += tick - execGraphStart
+                    ExecGraphIntervals.append((execGraphStart, tick))
+                    execGraphStart = None
                 elif Args.debug:
                     print("-Unknown execution trace record: %s" % line)
             elif re_thread.match(line):
@@ -109,7 +120,7 @@ def read_data(filename):
             elif re_proc_cpu.match(line):
                 match = re_proc_cpu.match(line)
                 cpu = int(match.group(1))
-            elif cpu and re_proc_dat.match(line):
+            elif cpu is not None and re_proc_dat.match(line):
                 match = re_proc_dat.match(line)
                 term = match.group(1)
                 value = match.group(2)
@@ -121,11 +132,6 @@ def read_data(filename):
                 pass
             elif Args.debug:
                 print("-Unk: %s" % line)
-            # TODO -- this is parsing text printed by a client.
-            # Really, verilator proper should generate this
-            # if it's useful...
-            if re_time.match(line):
-                Global['rdtsc_cycle_time'] = re_time.group(1)
 
 
 def re_match_result(regexp, line, result_to):
@@ -144,125 +150,33 @@ def report():
         plus = "+" if re.match(r'^\+', arg) else " "
         print("  %s%s%s" % (arg, plus, Global['args'][arg]))
 
+    for records in Threads.values():
+        for record in records:
+            cpu = record['cpu']
+            elapsed = record['end'] - record['start']
+            Cpus[cpu]['mtask_time'] += elapsed
+
+    global ElapsedTime
+    ElapsedTime = int(Global['stats']['ticks'])
     nthreads = int(Global['stats']['threads'])
-    Global['cpus'] = {}
-    for thread in Threads:
-        # Make potentially multiple characters per column
-        for start in Threads[thread]:
-            if not Threads[thread][start]:
-                continue
-            cpu = Threads[thread][start]['cpu']
-            elapsed = Threads[thread][start]['end'] - start
-            if cpu not in Global['cpus']:
-                Global['cpus'][cpu] = {'cpu_time': 0}
-            Global['cpus'][cpu]['cpu_time'] += elapsed
+    ncpus = max(len(Cpus), 1)
 
-    measured_mt_mtask_time = 0
-    predict_mt_mtask_time = 0
-    long_mtask_time = 0
-    measured_last_end = 0
-    predict_last_end = 0
-    for mtask in Mtasks:
-        measured_mt_mtask_time += Mtasks[mtask]['elapsed']
-        predict_mt_mtask_time += Mtasks[mtask]['predict_cost']
-        measured_last_end = max(measured_last_end, Mtasks[mtask]['end'])
-        predict_last_end = max(
-            predict_last_end,
-            Mtasks[mtask]['predict_start'] + Mtasks[mtask]['predict_cost'])
-        long_mtask_time = max(long_mtask_time, Mtasks[mtask]['elapsed'])
-    Global['measured_last_end'] = measured_last_end
-    Global['predict_last_end'] = predict_last_end
-
-    # If we know cycle time in the same (rdtsc) units,
-    # this will give us an actual utilization number,
-    # (how effectively we keep the cores busy.)
-    #
-    # It also gives us a number we can compare against
-    # serial mode, to estimate the overhead of data sharing,
-    # which will show up in the total elapsed time. (Overhead
-    # of synchronization and scheduling should not.)
-    print("\nAnalysis:")
-    print("  Total threads             = %d" % nthreads)
-    print("  Total mtasks              = %d" % len(Mtasks))
-    ncpus = max(len(Global['cpus']), 1)
-    print("  Total cpus used           = %d" % ncpus)
-    print("  Total yields              = %d" %
-          int(Global['stats'].get('yields', 0)))
-    print("  Total evals               = %d" % len(Evals))
-    print("  Total eval loops          = %d" % len(EvalLoops))
-    if Mtasks:
-        print("  Total eval time           = %d rdtsc ticks" %
-              Global['measured_last_end'])
-        print("  Longest mtask time        = %d rdtsc ticks" % long_mtask_time)
-        print("  All-thread mtask time     = %d rdtsc ticks" %
-              measured_mt_mtask_time)
-        long_efficiency = long_mtask_time / (Global.get(
-            'measured_last_end', 1) or 1)
-        print("  Longest-thread efficiency = %0.1f%%" %
-              (long_efficiency * 100.0))
-        mt_efficiency = measured_mt_mtask_time / (
-            Global.get('measured_last_end', 1) * nthreads or 1)
-        print("  All-thread efficiency     = %0.1f%%" %
-              (mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (mt_efficiency * nthreads))
-        if Global['rdtsc_cycle_time'] > 0:
-            ut = measured_mt_mtask_time / Global['rdtsc_cycle_time']
-            print("tot_mtask_cpu=" + measured_mt_mtask_time + " cyc=" +
-                  Global['rdtsc_cycle_time'] + " ut=" + ut)
-
-        predict_mt_efficiency = predict_mt_mtask_time / (
-            Global.get('predict_last_end', 1) * nthreads or 1)
-        print("\nPrediction (what Verilator used for scheduling):")
-        print("  All-thread efficiency     = %0.1f%%" %
-              (predict_mt_efficiency * 100.0))
-        print("  All-thread speedup        = %0.1f" %
-              (predict_mt_efficiency * nthreads))
-
-        p2e_ratios = []
-        min_p2e = 1000000
-        min_mtask = None
-        max_p2e = -1000000
-        max_mtask = None
-
-        for mtask in sorted(Mtasks.keys()):
-            if Mtasks[mtask]['elapsed'] > 0:
-                if Mtasks[mtask]['predict_cost'] == 0:
-                    Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
-                p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] /
-                                     Mtasks[mtask]['elapsed'])
-                p2e_ratios.append(p2e_ratio)
-
-                if p2e_ratio > max_p2e:
-                    max_p2e = p2e_ratio
-                    max_mtask = mtask
-                if p2e_ratio < min_p2e:
-                    min_p2e = p2e_ratio
-                    min_mtask = mtask
-
-        print("\nMTask statistics:")
-        print("  min log(p2e) = %0.3f" % min_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (min_mtask, Mtasks[min_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
-        print("  max log(p2e) = %0.3f" % max_p2e, end="")
-        print("  from mtask %d (predict %d," %
-              (max_mtask, Mtasks[max_mtask]['predict_cost']),
-              end="")
-        print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
-
-        stddev = statistics.pstdev(p2e_ratios)
-        mean = statistics.mean(p2e_ratios)
-        print("  mean = %0.3f" % mean)
-        print("  stddev = %0.3f" % stddev)
-        print("  e ^ stddev = %0.3f" % math.exp(stddev))
+    print("\nSummary:")
+    print("  Total elapsed time = {} rdtsc ticks".format(ElapsedTime))
+    print("  Parallelized code  = {:.2%} of elapsed time".format(
+        ExecGraphTime / ElapsedTime))
+    print("  Total threads      = %d" % nthreads)
+    print("  Total CPUs used    = %d" % ncpus)
+    print("  Total mtasks       = %d" % len(Mtasks))
+    print("  Total yields       = %d" % int(Global['stats'].get('yields', 0)))
 
+    report_mtasks()
     report_cpus()
+    report_sections()
 
     if nthreads > ncpus:
         print()
-        print("%%Warning: There were fewer CPUs (%d) then threads (%d)." %
+        print("%%Warning: There were fewer CPUs (%d) than threads (%d)." %
               (ncpus, nthreads))
         print("        : See docs on use of numactl.")
     else:
@@ -279,32 +193,130 @@ def report():
     print()
 
 
+def report_mtasks():
+    if not Mtasks:
+        return
+
+    nthreads = int(Global['stats']['threads'])
+
+    # If we know cycle time in the same (rdtsc) units,
+    # this will give us an actual utilization number,
+    # (how effectively we keep the cores busy.)
+    #
+    # It also gives us a number we can compare against
+    # serial mode, to estimate the overhead of data sharing,
+    # which will show up in the total elapsed time. (Overhead
+    # of synchronization and scheduling should not.)
+    total_mtask_time = 0
+    thread_mtask_time = collections.defaultdict(lambda: 0)
+    long_mtask_time = 0
+    long_mtask = None
+    predict_mtask_time = 0
+    predict_elapsed = 0
+    for mtaskId in Mtasks:
+        record = Mtasks[mtaskId]
+        predict_mtask_time += record['predict_cost']
+        total_mtask_time += record['elapsed']
+        thread_mtask_time[record['thread']] += record['elapsed']
+        predict_end = record['predict_start'] + record['predict_cost']
+        predict_elapsed = max(predict_elapsed, predict_end)
+        if record['elapsed'] > long_mtask_time:
+            long_mtask_time = record['elapsed']
+            long_mtask = mtaskId
+    Global['predict_last_end'] = predict_elapsed
+
+    serialTime = ElapsedTime - ExecGraphTime
+
+    def subReport(elapsed, work):
+        print("  Thread utilization = {:7.2%}".format(work /
+                                                      (elapsed * nthreads)))
+        print("  Speedup            = {:6.3}x".format(work / elapsed))
+
+    print("\nParallelized code, measured:")
+    subReport(ExecGraphTime, total_mtask_time)
+
+    print("\nParallelized code, predicted during static scheduling:")
+    subReport(predict_elapsed, predict_mtask_time)
+
+    print("\nAll code, measured:")
+    subReport(ElapsedTime, serialTime + total_mtask_time)
+
+    print("\nAll code, measured, scaled by predicted speedup:")
+    expectedParallelSpeedup = predict_mtask_time / predict_elapsed
+    scaledElapsed = serialTime + total_mtask_time / expectedParallelSpeedup
+    subReport(scaledElapsed, serialTime + total_mtask_time)
+
+    p2e_ratios = []
+    min_p2e = 1000000
+    min_mtask = None
+    max_p2e = -1000000
+    max_mtask = None
+
+    for mtask in sorted(Mtasks.keys()):
+        if Mtasks[mtask]['elapsed'] > 0:
+            if Mtasks[mtask]['predict_cost'] == 0:
+                Mtasks[mtask]['predict_cost'] = 1  # don't log(0) below
+            p2e_ratio = math.log(Mtasks[mtask]['predict_cost'] /
+                                 Mtasks[mtask]['elapsed'])
+            p2e_ratios.append(p2e_ratio)
+
+            if p2e_ratio > max_p2e:
+                max_p2e = p2e_ratio
+                max_mtask = mtask
+            if p2e_ratio < min_p2e:
+                min_p2e = p2e_ratio
+                min_mtask = mtask
+
+    print("\nMTask statistics:")
+    print("  Longest mtask id = {}".format(long_mtask))
+    print("  Longest mtask time = {:.2%} of time elapsed in parallelized code".
+          format(long_mtask_time / ExecGraphTime))
+    print("  min log(p2e) = %0.3f" % min_p2e, end="")
+
+    print("  from mtask %d (predict %d," %
+          (min_mtask, Mtasks[min_mtask]['predict_cost']),
+          end="")
+    print(" elapsed %d)" % Mtasks[min_mtask]['elapsed'])
+    print("  max log(p2e) = %0.3f" % max_p2e, end="")
+    print("  from mtask %d (predict %d," %
+          (max_mtask, Mtasks[max_mtask]['predict_cost']),
+          end="")
+    print(" elapsed %d)" % Mtasks[max_mtask]['elapsed'])
+
+    stddev = statistics.pstdev(p2e_ratios)
+    mean = statistics.mean(p2e_ratios)
+    print("  mean = %0.3f" % mean)
+    print("  stddev = %0.3f" % stddev)
+    print("  e ^ stddev = %0.3f" % math.exp(stddev))
+
+
 def report_cpus():
-    print("\nCPUs:")
+    print("\nCPU info:")
 
     Global['cpu_sockets'] = collections.defaultdict(lambda: 0)
     Global['cpu_socket_cores'] = collections.defaultdict(lambda: 0)
 
-    for cpu in sorted(Global['cpus'].keys()):
-        print("  cpu %d: " % cpu, end='')
-        print("cpu_time=%d" % Global['cpus'][cpu]['cpu_time'], end='')
-
-        socket = None
+    print("   Id | Time spent executing MTask | Socket | Core | Model")
+    print("      | % of elapsed ticks / ticks |        |      |")
+    print("  ====|============================|========|======|======")
+    for cpu in sorted(Cpus):
+        socket = ""
+        core = ""
+        model = ""
         if cpu in Global['cpuinfo']:
             cpuinfo = Global['cpuinfo'][cpu]
             if 'physical_id' in cpuinfo and 'core_id' in cpuinfo:
-                socket = int(cpuinfo['physical_id'])
+                socket = cpuinfo['physical_id']
                 Global['cpu_sockets'][socket] += 1
-                print(" socket=%d" % socket, end='')
-
-                core = int(cpuinfo['core_id'])
-                Global['cpu_socket_cores'][str(socket) + "__" + str(core)] += 1
-                print(" core=%d" % core, end='')
+                core = cpuinfo['core_id']
+                Global['cpu_socket_cores'][socket + "__" + core] += 1
 
             if 'model_name' in cpuinfo:
                 model = cpuinfo['model_name']
-                print("  %s" % model, end='')
-        print()
+
+        print("  {:3d} | {:7.2%} / {:16d} | {:>6s} | {:>4s} | {}".format(
+            cpu, Cpus[cpu]['mtask_time'] / ElapsedTime,
+            Cpus[cpu]['mtask_time'], socket, core, model))
 
     if len(Global['cpu_sockets']) > 1:
         Global['cpu_sockets_warning'] = True
@@ -313,25 +325,68 @@ def report_cpus():
                 Global['cpu_socket_cores_warning'] = True
 
 
+def report_sections():
+    if not Sections:
+        return
+    print("\nSection profile:")
+
+    totalTime = collections.defaultdict(lambda: 0)
+    selfTime = collections.defaultdict(lambda: 0)
+
+    sectionTree = [0, {}, 1]  # [selfTime, childTrees, numberOfTimesEntered]
+    prevTime = 0
+    prevStack = ()
+    for time, stack in Sections:
+        if len(stack) > len(prevStack):
+            scope = sectionTree
+            for item in stack:
+                scope = scope[1].setdefault(item, [0, {}, 0])
+            scope[2] += 1
+        dt = time - prevTime
+        scope = sectionTree
+        for item in prevStack:
+            scope = scope[1].setdefault(item, [0, {}, 0])
+        scope[0] += dt
+
+        if prevStack:
+            for name in prevStack:
+                totalTime[name] += dt
+            selfTime[prevStack[-1]] += dt
+        prevTime = time
+        prevStack = stack
+
+    def treeSum(tree):
+        n = tree[0]
+        for subTree in tree[1].values():
+            n += treeSum(subTree)
+        return n
+
+    # Make sure the tree sums to the elapsed time
+    sectionTree[0] += ElapsedTime - treeSum(sectionTree)
+
+    def printTree(prefix, name, entries, tree):
+        print("  {:7.2%} | {:7.2%} | {:8} | {:10.2f} | {}".format(
+            treeSum(tree) / ElapsedTime, tree[0] / ElapsedTime, tree[2],
+            tree[2] / entries, prefix + name))
+        for k in sorted(tree[1], key=lambda _: -treeSum(tree[1][_])):
+            printTree(prefix + "  ", k, tree[2], tree[1][k])
+
+    print(" Total    | Self    | Total    | Relative   | Section")
+    print(" time     | time    | entries  | entries    |  name  ")
+    print("==========|=========|==========|============|========")
+    printTree("", "*TOTAL*", 1, sectionTree)
+
+
 ######################################################################
 
 
 def write_vcd(filename):
     print("Writing %s" % filename)
     with open(filename, "w", encoding="utf8") as fh:
-        vcd = {
-            'values':
-            collections.defaultdict(lambda: {}),  # {<time>}{<code>} = value
-            'sigs': {
-                'predicted_threads': {},
-                'measured_threads': {},
-                'cpus': {},
-                'evals': {},
-                'mtasks': {},
-                'Stats': {}
-            }  # {<module>}{<sig}} = code
-        }
-        code = 0
+        # dict of dicts of hierarchy elements/signal name  -> (code, width)
+        scopeSigs = {}
+        # map from time -> code -> value
+        values = collections.defaultdict(lambda: {})
 
         parallelism = {
             'measured': collections.defaultdict(lambda: 0),
@@ -340,132 +395,139 @@ def write_vcd(filename):
         parallelism['measured'][0] = 0
         parallelism['predicted'][0] = 0
 
-        # Measured graph
-        for thread in sorted(Threads.keys()):
-            sig = "thread%d_mtask" % thread
-            if sig not in vcd['sigs']['measured_threads']:
-                vcd['sigs']['measured_threads'][sig] = code
-                code += 1
-            mcode = vcd['sigs']['measured_threads'][sig]
+        nextFreeCode = 0
 
-            for start in sorted(Threads[thread]):
-                mtask = Threads[thread][start]['mtask']
-                end = Threads[thread][start]['end']
-                cpu = Threads[thread][start]['cpu']
-                vcd['values'][start][mcode] = mtask
-                vcd['values'][end][mcode] = None
+        def getCode(width, *names):
+            nonlocal nextFreeCode
+            scope = scopeSigs
+            *path, name = names
+            for item in path:
+                scope = scope.setdefault(item, {})
+            code, oldWidth = scope.setdefault(name, (nextFreeCode, width))
+            assert oldWidth == width
+            if code == nextFreeCode:
+                nextFreeCode += 1
+            return code
+
+        def addValue(code, time, val):
+            if isinstance(val, str):
+                buf = ""
+                for c in val:
+                    buf += bin(ord(c))[2:].rjust(8, "0")
+                val = buf.ljust(LongestVcdStrValueLength * 8, "0")
+            values[time][code] = val
+
+        # Measured graph
+        for thread in sorted(Threads):
+            mcode = getCode(32, 'measured', 't%d_mtask' % thread)
+            for record in Threads[thread]:
+                start = record['start']
+                mtask = record['mtask']
+                end = record['end']
+                cpu = record['cpu']
+                addValue(mcode, start, mtask)
+                addValue(mcode, end, None)
                 parallelism['measured'][start] += 1
                 parallelism['measured'][end] -= 1
 
-                sig = "cpu%d_thread" % cpu
-                if sig not in vcd['sigs']['cpus']:
-                    vcd['sigs']['cpus'][sig] = code
-                    code += 1
-                ccode = vcd['sigs']['cpus'][sig]
-                vcd['values'][start][ccode] = thread
-                vcd['values'][end][ccode] = None
+                code = getCode(32, 'measured', 'cpu%d_thread' % cpu)
+                addValue(code, start, thread)
+                addValue(code, end, None)
 
-                sig = "mtask%d_cpu" % mtask
-                if sig not in vcd['sigs']['mtasks']:
-                    vcd['sigs']['mtasks'][sig] = code
-                    code += 1
-                ccode = vcd['sigs']['mtasks'][sig]
-                vcd['values'][start][ccode] = cpu
-                vcd['values'][end][ccode] = None
+                code = getCode(32, 'measured', 'cpu%d_mtask' % cpu)
+                addValue(code, start, mtask)
+                addValue(code, end, None)
 
-        # Eval graph
-        vcd['sigs']['evals']["eval"] = code
-        elcode = code
-        code += 1
-        n = 0
-        for eval_start in Evals:
-            eval_end = Evals[eval_start]['end']
-            n += 1
-            vcd['values'][eval_start][elcode] = n
-            vcd['values'][eval_end][elcode] = None
+        tStart = sorted(_['start'] for records in Threads.values()
+                        for _ in records)
+        tEnd = sorted(_['end'] for records in Threads.values()
+                      for _ in records)
 
-        # Eval_loop graph
-        vcd['sigs']['evals']["eval_loop"] = code
-        elcode = code
-        code += 1
-        n = 0
-        for eval_start in EvalLoops:
-            eval_end = EvalLoops[eval_start]['end']
-            n += 1
-            vcd['values'][eval_start][elcode] = n
-            vcd['values'][eval_end][elcode] = None
+        # Predicted graph
+        for start, end in ExecGraphIntervals:
+            # Find the earliest MTask start after the start point, and the
+            # latest MTask end before the end point, so we can scale to the
+            # same range
+            start = tStart[bisect.bisect_left(tStart, start)]
+            end = tEnd[bisect.bisect_right(tEnd, end) - 1]
+            # Compute scale so predicted graph is of same width as interval
+            measured_scaling = (end - start) / Global['predict_last_end']
+            # Predict mtasks that fill the time the execution occupied
+            for mtask in Mtasks:
+                thread = Mtasks[mtask]['thread']
+                pred_scaled_start = start + int(
+                    Mtasks[mtask]['predict_start'] * measured_scaling)
+                pred_scaled_end = start + int(
+                    (Mtasks[mtask]['predict_start'] +
+                     Mtasks[mtask]['predict_cost']) * measured_scaling)
+                if pred_scaled_start == pred_scaled_end:
+                    continue
 
-        if Mtasks:
-            # Predicted graph
-            for eval_start in EvalLoops:
-                eval_end = EvalLoops[eval_start]['end']
-                # Compute scale so predicted graph is of same width as eval
-                measured_scaling = (eval_end -
-                                    eval_start) / Global['predict_last_end']
-                # Predict mtasks that fill the time the eval occupied
-                for mtask in Mtasks:
-                    thread = Mtasks[mtask]['thread']
-                    pred_scaled_start = eval_start + int(
-                        Mtasks[mtask]['predict_start'] * measured_scaling)
-                    pred_scaled_end = eval_start + int(
-                        (Mtasks[mtask]['predict_start'] +
-                         Mtasks[mtask]['predict_cost']) * measured_scaling)
-                    if pred_scaled_start == pred_scaled_end:
-                        continue
+                mcode = getCode(32, 'predicted', 't%d_mtask' % thread)
+                addValue(mcode, pred_scaled_start, mtask)
+                addValue(mcode, pred_scaled_end, None)
 
-                    sig = "predicted_thread%d_mtask" % thread
-                    if sig not in vcd['sigs']['predicted_threads']:
-                        vcd['sigs']['predicted_threads'][sig] = code
-                        code += 1
-                    mcode = vcd['sigs']['predicted_threads'][sig]
+                parallelism['predicted'][pred_scaled_start] += 1
+                parallelism['predicted'][pred_scaled_end] -= 1
 
-                    vcd['values'][pred_scaled_start][mcode] = mtask
-                    vcd['values'][pred_scaled_end][mcode] = None
+        # Parallelism graph
+        for measpred in ('measured', 'predicted'):
+            pcode = getCode(32, 'stats', '%s_parallelism' % measpred)
+            value = 0
+            for time in sorted(parallelism[measpred].keys()):
+                value += parallelism[measpred][time]
+                addValue(pcode, time, value)
 
-                    parallelism['predicted'][pred_scaled_start] += 1
-                    parallelism['predicted'][pred_scaled_end] -= 1
-
-            # Parallelism graph
-            for measpred in ('measured', 'predicted'):
-                vcd['sigs']['Stats']["%s_parallelism" % measpred] = code
-                pcode = code
-                code += 1
-                value = 0
-                for time in sorted(parallelism[measpred].keys()):
-                    value += parallelism[measpred][time]
-                    vcd['values'][time][pcode] = value
+        # Section graph
+        if Sections:
+            scode = getCode(LongestVcdStrValueLength * 8, "section", "trace")
+            dcode = getCode(32, "section", "depth")
+            for time, stack in Sections:
+                addValue(scode, time, stack[-1] if stack else None)
+                addValue(dcode, time, len(stack))
 
         # Create output file
         fh.write("$version Generated by verilator_gantt $end\n")
         fh.write("$timescale 1ns $end\n")
         fh.write("\n")
 
-        all_codes = {}
+        all_codes = set()
+
+        def writeScope(scope):
+            assert isinstance(scope, dict)
+            for key in sorted(scope):
+                val = scope[key]
+                if isinstance(val, dict):
+                    fh.write("  $scope module %s $end\n" % key)
+                    writeScope(val)
+                    fh.write("  $upscope $end\n")
+                else:
+                    (code, width) = val
+                    all_codes.add(code)
+                    fh.write("   $var wire %d v%x %s [%d:0] $end\n" %
+                             (width, code, key, width - 1))
+
         fh.write(" $scope module gantt $end\n")
-        for module in sorted(vcd['sigs'].keys()):
-            fh.write("  $scope module %s $end\n" % module)
-            for sig in sorted(vcd['sigs'][module].keys()):
-                code = vcd['sigs'][module][sig]
-                fh.write("   $var wire 32 v%x %s [31:0] $end\n" % (code, sig))
-                all_codes[code] = 1
-            fh.write("  $upscope $end\n")
+        writeScope(scopeSigs)
         fh.write(" $upscope $end\n")
         fh.write("$enddefinitions $end\n")
         fh.write("\n")
 
         first = True
-        for time in sorted(vcd['values']):
+        for time in sorted(values):
             if first:
                 first = False
                 # Start with Z for any signals without time zero data
-                for code in sorted(all_codes.keys()):
-                    if code not in vcd['values'][time]:
-                        vcd['values'][time][code] = None
+                for code in sorted(all_codes):
+                    if code not in values[time]:
+                        addValue(code, time, None)
             fh.write("#%d\n" % time)
-            for code in sorted(vcd['values'][time].keys()):
-                value = vcd['values'][time][code]
+            for code in sorted(values[time]):
+                value = values[time][code]
                 if value is None:
                     fh.write("bz v%x\n" % code)
+                elif isinstance(value, str):
+                    fh.write("b%s v%x\n" % (value, code))
                 else:
                     fh.write("b%s v%x\n" % (format(value, 'b'), code))
 
@@ -504,7 +566,8 @@ parser.add_argument('filename',
 
 Args = parser.parse_args()
 
-process(Args.filename)
+read_data(Args.filename)
+report()
 if not Args.no_vcd:
     write_vcd(Args.vcd)
 
diff --git a/docs/guide/exe_verilator_gantt.rst b/docs/guide/exe_verilator_gantt.rst
index 59c570ebe..75fbe0e03 100644
--- a/docs/guide/exe_verilator_gantt.rst
+++ b/docs/guide/exe_verilator_gantt.rst
@@ -30,15 +30,13 @@ Gantt Chart VCD Signals
 In waveforms, there are the following signals. In GTKWave, use "decimal"
 data format to remove the leading zeros and make the traces easier to read.
 
-evals
-  Increments each time when eval_step was measured to be active.  This
-  allow visualization of how much time eval_step was active.
+trace/section
+  Shows the name of the current top of the execution section stack.
+  Set GTKWave data format to "ASCII".
 
-eval_loop
-  Increments each time when the evaluation loop within eval_step was
-  measured to be active.  For best performance, there is only a single
-  evaluation loop within each eval_step call; that is, the eval_loop
-  waveform looks identical to the evals waveform.
+trace/depth
+  Shows the depth of the execution section stack.
+  Set GTKWave data format to "Analog".
 
 measured_parallelism
   The number of mtasks active at this time, for best performance, this will
diff --git a/include/verilated_profiler.cpp b/include/verilated_profiler.cpp
index db721bbcc..d6301ec24 100644
--- a/include/verilated_profiler.cpp
+++ b/include/verilated_profiler.cpp
@@ -161,12 +161,18 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
 
     // TODO Perhaps merge with verilated_coverage output format, so can
     // have a common merging and reporting tool, etc.
-    fprintf(fp, "VLPROFVERSION 2.0 # Verilator execution profile version 2.0\n");
+    fprintf(fp, "VLPROFVERSION 2.1 # Verilator execution profile version 2.1\n");
     fprintf(fp, "VLPROF arg +verilator+prof+exec+start+%" PRIu64 "\n",
             Verilated::threadContextp()->profExecStart());
     fprintf(fp, "VLPROF arg +verilator+prof+exec+window+%u\n",
             Verilated::threadContextp()->profExecWindow());
-    const unsigned threads = static_cast<unsigned>(m_traceps.size());
+    // Note that VerilatedContext will by default create as many threads as there are hardware
+    // processors, but not all of them might be utilized. Report the actual number that has trace
+    // entries to avoid over-counting.
+    unsigned threads = 0;
+    for (const auto& pair : m_traceps) {
+        if (!pair.second->empty()) ++threads;
+    }
     fprintf(fp, "VLPROF stat threads %u\n", threads);
     fprintf(fp, "VLPROF stat yields %" PRIu64 "\n", VlMTaskVertex::yields());
 
@@ -183,6 +189,7 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
     for (const auto& pair : m_traceps) {
         const uint32_t threadId = pair.first;
         ExecutionTrace* const tracep = pair.second;
+        if (tracep->empty()) continue;
         fprintf(fp, "VLPROFTHREAD %" PRIu32 "\n", threadId);
 
         for (const VlExecutionRecord& er : *tracep) {
@@ -191,10 +198,9 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
             fprintf(fp, "VLPROFEXEC %s %" PRIu64, name, time);
 
             switch (er.m_type) {
-            case VlExecutionRecord::Type::EVAL_BEGIN:
-            case VlExecutionRecord::Type::EVAL_END:
-            case VlExecutionRecord::Type::EVAL_LOOP_BEGIN:
-            case VlExecutionRecord::Type::EVAL_LOOP_END:
+            case VlExecutionRecord::Type::SECTION_POP:
+            case VlExecutionRecord::Type::EXEC_GRAPH_BEGIN:
+            case VlExecutionRecord::Type::EXEC_GRAPH_END:
                 // No payload
                 fprintf(fp, "\n");
                 break;
@@ -209,6 +215,11 @@ void VlExecutionProfiler::dump(const char* filenamep, uint64_t tickEnd)
                 fprintf(fp, " id %u predictCost %u\n", payload.m_id, payload.m_predictCost);
                 break;
             }
+            case VlExecutionRecord::Type::SECTION_PUSH: {
+                const auto& payload = er.m_payload.sectionPush;
+                fprintf(fp, " %s\n", payload.m_name);
+                break;
+            }
             default: abort();  // LCOV_EXCL_LINE
             }
         }
diff --git a/include/verilated_profiler.h b/include/verilated_profiler.h
index b71194f44..7c0f1f886 100644
--- a/include/verilated_profiler.h
+++ b/include/verilated_profiler.h
@@ -58,12 +58,12 @@ VL_ATTR_ALWINLINE QData VL_CPU_TICK() {
 
 // clang-format off
 #define FOREACH_VlExecutionRecord_TYPE(macro) \
-    _VL_FOREACH_APPLY(macro, EVAL_BEGIN) \
-    _VL_FOREACH_APPLY(macro, EVAL_END) \
-    _VL_FOREACH_APPLY(macro, EVAL_LOOP_BEGIN) \
-    _VL_FOREACH_APPLY(macro, EVAL_LOOP_END) \
+    _VL_FOREACH_APPLY(macro, SECTION_PUSH) \
+    _VL_FOREACH_APPLY(macro, SECTION_POP) \
     _VL_FOREACH_APPLY(macro, MTASK_BEGIN) \
-    _VL_FOREACH_APPLY(macro, MTASK_END)
+    _VL_FOREACH_APPLY(macro, MTASK_END) \
+    _VL_FOREACH_APPLY(macro, EXEC_GRAPH_BEGIN) \
+    _VL_FOREACH_APPLY(macro, EXEC_GRAPH_END)
 // clang-format on
 
 class VlExecutionRecord final {
@@ -83,6 +83,9 @@ class VlExecutionRecord final {
     };
 
     union Payload {
+        struct {
+            const char* m_name;  // Name of section being entered
+        } sectionPush;
         struct {
             uint32_t m_id;  // MTask id
             uint32_t m_predictStart;  // Time scheduler predicted would start
@@ -109,10 +112,11 @@ public:
     VlExecutionRecord() = default;
 
     // METHODS
-    void evalBegin() { m_type = Type::EVAL_BEGIN; }
-    void evalEnd() { m_type = Type::EVAL_END; }
-    void evalLoopBegin() { m_type = Type::EVAL_LOOP_BEGIN; }
-    void evalLoopEnd() { m_type = Type::EVAL_LOOP_END; }
+    void sectionPush(const char* name) {
+        m_payload.sectionPush.m_name = name;
+        m_type = Type::SECTION_PUSH;
+    }
+    void sectionPop() { m_type = Type::SECTION_POP; }
     void mtaskBegin(uint32_t id, uint32_t predictStart) {
         m_payload.mtaskBegin.m_id = id;
         m_payload.mtaskBegin.m_predictStart = predictStart;
@@ -124,6 +128,8 @@ public:
         m_payload.mtaskEnd.m_predictCost = predictCost;
         m_type = Type::MTASK_END;
     }
+    void execGraphBegin() { m_type = Type::EXEC_GRAPH_BEGIN; }
+    void execGraphEnd() { m_type = Type::EXEC_GRAPH_END; }
 };
 
 static_assert(std::is_trivially_destructible<VlExecutionRecord>::value,
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index ac2c5c316..9346a64f3 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -403,7 +403,7 @@ class EmitCModel final : public EmitCFunc {
 
         if (v3Global.opt.profExec()) {
             puts("vlSymsp->__Vm_executionProfilerp->configure();\n");
-            puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).evalBegin();\n");
+            puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"eval\");\n");
         }
 
         puts("VL_DEBUG_IF(VL_DBG_MSGF(\"+ Eval\\n\"););\n");
@@ -412,7 +412,7 @@ class EmitCModel final : public EmitCFunc {
         putsDecoration("// Evaluate cleanup\n");
         puts("Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);\n");
 
-        if (v3Global.opt.profExec()) puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).evalEnd();\n");
+        if (v3Global.opt.profExec()) puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n");
         puts("}\n");
     }
 
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index b3af14abc..27df6913c 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -1473,7 +1473,8 @@ AstCFunc* order(AstNetlist* netlistp,  //
 
     // Create the result function
     AstScope* const scopeTopp = netlistp->topScopep()->scopep();
-    AstCFunc* const funcp = new AstCFunc{netlistp->fileline(), "_eval_" + tag, scopeTopp, ""};
+    FileLine* const flp = netlistp->fileline();
+    AstCFunc* const funcp = new AstCFunc{flp, "_eval_" + tag, scopeTopp, ""};
     funcp->dontCombine(true);
     funcp->isStatic(false);
     funcp->isLoose(true);
@@ -1482,9 +1483,18 @@ AstCFunc* order(AstNetlist* netlistp,  //
     funcp->declPrivate(true);
     scopeTopp->addBlocksp(funcp);
 
+    if (v3Global.opt.profExec()) {
+        funcp->addStmtsp(new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"func "
+                                               + tag + "\");\n"});
+    }
+
     // Add ordered statements to the result function
     for (AstNode* const nodep : nodeps) funcp->addStmtsp(nodep);
 
+    if (v3Global.opt.profExec()) {
+        funcp->addStmtsp(new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n"});
+    }
+
     // Dispose of the remnants of the inputs
     for (auto* const lbsp : logic) lbsp->deleteActives();
 
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index b1e2edb21..2a8c64993 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -3183,6 +3183,10 @@ static void addThreadStartToExecGraph(AstExecGraph* const execGraphp,
         execGraphp->addStmtsp(new AstText{fl, text, /* tracking: */ true});
     };
 
+    if (v3Global.opt.profExec()) {
+        addStrStmt("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).execGraphBegin();\n");
+    }
+
     addStrStmt("vlSymsp->__Vm_even_cycle__" + tag + " = !vlSymsp->__Vm_even_cycle__" + tag
                + ";\n");
 
@@ -3206,6 +3210,10 @@ static void addThreadStartToExecGraph(AstExecGraph* const execGraphp,
 
     addStrStmt("vlSelf->__Vm_mtaskstate_final__" + tag
                + ".waitUntilUpstreamDone(vlSymsp->__Vm_even_cycle__" + tag + ");\n");
+
+    if (v3Global.opt.profExec()) {
+        addStrStmt("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).execGraphEnd();\n");
+    }
 }
 
 static void implementExecGraph(AstExecGraph* const execGraphp) {
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 2b40f2a16..cab3165f9 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -399,6 +399,17 @@ AstSenTree* createTriggerSenTree(AstNetlist* netlistp, AstVarScope* const vscp,
     return resultp;
 }
 
+//============================================================================
+// Utility for creating profiling statements
+
+AstNodeStmt* profExecSectionPush(FileLine* flp, const string& name) {
+    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"" + name + "\");\n"};
+};
+
+AstNodeStmt* profExecSectionPop(FileLine* flp) {
+    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n"};
+};
+
 //============================================================================
 // Utility for extra trigger allocation
 
@@ -442,6 +453,7 @@ const TriggerKit createTriggers(AstNetlist* netlistp, AstCFunc* const initFuncp,
 
     // Create the trigger computation function
     AstCFunc* const funcp = makeSubFunction(netlistp, "_eval_triggers__" + name, slow);
+    if (v3Global.opt.profExec()) funcp->addStmtsp(profExecSectionPush(flp, "trig " + name));
 
     // Create the trigger dump function (for debugging, always 'slow')
     AstCFunc* const dumpp = makeSubFunction(netlistp, "_dump_triggers__" + name, true);
@@ -581,6 +593,8 @@ const TriggerKit createTriggers(AstNetlist* netlistp, AstCFunc* const initFuncp,
         add("#endif\n");
     }
 
+    if (v3Global.opt.profExec()) funcp->addStmtsp(profExecSectionPop(flp));
+
     // The debug code might leak signal names, so simply delete it when using --protect-ids
     if (v3Global.opt.protectIds()) dumpp->stmtsp()->unlinkFrBackWithNext()->deleteTree();
 
@@ -636,7 +650,9 @@ EvalLoop makeEvalLoop(AstNetlist* netlistp, const string& tag, const string& nam
     AstVarScope* const continuep = scopeTopp->createTemp("__V" + tag + "Continue", 1);
     continuep->varp()->noReset(true);
 
-    AstNodeStmt* nodep = setVar(counterp, 0);
+    AstNodeStmt* nodep = nullptr;
+    if (v3Global.opt.profExec()) nodep = profExecSectionPush(flp, "loop " + tag);
+    nodep = AstNode::addNext(nodep, setVar(counterp, 0));
     nodep->addNext(buildLoop(netlistp, continuep, [&](AstWhile* loopp) {
         // Compute triggers
         loopp->addStmtsp(computeTriggers());
@@ -689,6 +705,8 @@ EvalLoop makeEvalLoop(AstNetlist* netlistp, const string& tag, const string& nam
         }
     }));
 
+    if (v3Global.opt.profExec()) nodep->addNext(profExecSectionPop(flp));
+
     return {counterp, continuep, nodep};
 }
 
diff --git a/test_regress/t/t_gantt.pl b/test_regress/t/t_gantt.pl
index e1c1c93c3..30a0c599c 100755
--- a/test_regress/t/t_gantt.pl
+++ b/test_regress/t/t_gantt.pl
@@ -49,7 +49,7 @@ if ($Self->{vltmt}) {
     file_grep("$Self->{obj_dir}/gantt.log", qr/Total threads += 1/i);
     file_grep("$Self->{obj_dir}/gantt.log", qr/Total mtasks += 0/i);
 }
-file_grep("$Self->{obj_dir}/gantt.log", qr/Total evals += 2/i);
+file_grep("$Self->{obj_dir}/gantt.log", qr/\|\s+2\s+\|\s+2\.0+\s+\|\s+eval/i);
 
 # Diff to itself, just to check parsing
 vcd_identical("$Self->{obj_dir}/profile_exec.vcd", "$Self->{obj_dir}/profile_exec.vcd");
diff --git a/test_regress/t/t_gantt_io.dat b/test_regress/t/t_gantt_io.dat
index f31b9f7d5..7baa894b0 100644
--- a/test_regress/t/t_gantt_io.dat
+++ b/test_regress/t/t_gantt_io.dat
@@ -900,22 +900,18 @@ VLPROFPROC address sizes        : 43 bits physical, 48 bits virtual
 VLPROFPROC power management: ts ttp tm hwpstate cpb eff_freq_ro [13] [14]
 VLPROFPROC 
 VLPROFTHREAD 0
-VLPROFEXEC EVAL_BEGIN 595
-VLPROFEXEC EVAL_LOOP_BEGIN 945
+VLPROFEXEC EXEC_GRAPH_BEGIN 945
 VLPROFEXEC MTASK_BEGIN 2695 id 6 predictStart 0 cpu 19
 VLPROFEXEC MTASK_END 2905 id 6 predictCost 30
 VLPROFEXEC MTASK_BEGIN 9695 id 10 predictStart 196 cpu 19
 VLPROFEXEC MTASK_END 9870 id 10 predictCost 30
-VLPROFEXEC EVAL_LOOP_END 12180
-VLPROFEXEC EVAL_END 12250
-VLPROFEXEC EVAL_BEGIN 13720
-VLPROFEXEC EVAL_LOOP_BEGIN 14000
+VLPROFEXEC EXEC_GRAPH_END 12180
+VLPROFEXEC EXEC_GRAPH_BEGIN 14000
 VLPROFEXEC MTASK_BEGIN 15610 id 6 predictStart 0 cpu 19
 VLPROFEXEC MTASK_END 15820 id 6 predictCost 30
 VLPROFEXEC MTASK_BEGIN 21700 id 10 predictStart 196 cpu 19
 VLPROFEXEC MTASK_END 21875 id 10 predictCost 30
-VLPROFEXEC EVAL_LOOP_END 22085
-VLPROFEXEC EVAL_END 22330
+VLPROFEXEC EXEC_GRAPH_END 22085
 VLPROFTHREAD 1
 VLPROFEXEC MTASK_BEGIN 5495 id 5 predictStart 0 cpu 10
 VLPROFEXEC MTASK_END 6090 id 5 predictCost 30
diff --git a/test_regress/t/t_gantt_io.out b/test_regress/t/t_gantt_io.out
index 55a6f73a5..14e5fcf5c 100644
--- a/test_regress/t/t_gantt_io.out
+++ b/test_regress/t/t_gantt_io.out
@@ -4,33 +4,44 @@ Argument settings:
   +verilator+prof+exec+start+2
   +verilator+prof+exec+window+2
 
-Analysis:
-  Total threads             = 2
-  Total mtasks              = 7
-  Total cpus used           = 2
-  Total yields              = 0
-  Total evals               = 2
-  Total eval loops          = 2
-  Total eval time           = 21875 rdtsc ticks
-  Longest mtask time        = 1190 rdtsc ticks
-  All-thread mtask time     = 5495 rdtsc ticks
-  Longest-thread efficiency = 5.4%
-  All-thread efficiency     = 12.6%
-  All-thread speedup        = 0.3
+Summary:
+  Total elapsed time = 23415 rdtsc ticks
+  Parallelized code  = 82.51% of elapsed time
+  Total threads      = 2
+  Total CPUs used    = 2
+  Total mtasks       = 7
+  Total yields       = 0
 
-Prediction (what Verilator used for scheduling):
-  All-thread efficiency     = 63.2%
-  All-thread speedup        = 1.3
+Parallelized code, measured:
+  Thread utilization =  14.22%
+  Speedup            =  0.284x
+
+Parallelized code, predicted during static scheduling:
+  Thread utilization =  63.22%
+  Speedup            =   1.26x
+
+All code, measured:
+  Thread utilization =  20.48%
+  Speedup            =   0.41x
+
+All code, measured, scaled by predicted speedup:
+  Thread utilization =  56.80%
+  Speedup            =   1.14x
 
 MTask statistics:
+  Longest mtask id = 5
+  Longest mtask time = 6.16% of time elapsed in parallelized code
   min log(p2e) = -3.681  from mtask 5 (predict 30, elapsed 1190)
   max log(p2e) = -2.409  from mtask 8 (predict 107, elapsed 1190)
   mean = -2.992
   stddev = 0.459
   e ^ stddev = 1.583
 
-CPUs:
-  cpu 10: cpu_time=4725 socket=0 core=10  Test Ryzen 9 3950X 16-Core Processor
-  cpu 19: cpu_time=770 socket=0 core=3  Test Ryzen 9 3950X 16-Core Processor
+CPU info:
+   Id | Time spent executing MTask | Socket | Core | Model
+      | % of elapsed ticks / ticks |        |      |
+  ====|============================|========|======|======
+   10 |  20.18% /             4725 |      0 |   10 | Test Ryzen 9 3950X 16-Core Processor
+   19 |   3.29% /              770 |      0 |    3 | Test Ryzen 9 3950X 16-Core Processor
 
 Writing profile_exec.vcd
diff --git a/test_regress/t/t_gantt_io.vcd.out b/test_regress/t/t_gantt_io.vcd.out
index 7fc6ed26c..c95e55a4b 100644
--- a/test_regress/t/t_gantt_io.vcd.out
+++ b/test_regress/t/t_gantt_io.vcd.out
@@ -2,34 +2,21 @@ $version Generated by verilator_gantt $end
 $timescale 1ns $end
 
  $scope module gantt $end
-  $scope module Stats $end
-   $var wire 32 vf measured_parallelism [31:0] $end
-   $var wire 32 v10 predicted_parallelism [31:0] $end
-  $upscope $end
-  $scope module cpus $end
-   $var wire 32 v5 cpu10_thread [31:0] $end
+  $scope module measured $end
+   $var wire 32 v5 cpu10_mtask [31:0] $end
+   $var wire 32 v4 cpu10_thread [31:0] $end
+   $var wire 32 v2 cpu19_mtask [31:0] $end
    $var wire 32 v1 cpu19_thread [31:0] $end
+   $var wire 32 v0 t0_mtask [31:0] $end
+   $var wire 32 v3 t1_mtask [31:0] $end
   $upscope $end
-  $scope module evals $end
-   $var wire 32 vb eval [31:0] $end
-   $var wire 32 vc eval_loop [31:0] $end
+  $scope module predicted $end
+   $var wire 32 v6 t0_mtask [31:0] $end
+   $var wire 32 v7 t1_mtask [31:0] $end
   $upscope $end
-  $scope module measured_threads $end
-   $var wire 32 v0 thread0_mtask [31:0] $end
-   $var wire 32 v4 thread1_mtask [31:0] $end
-  $upscope $end
-  $scope module mtasks $end
-   $var wire 32 v3 mtask10_cpu [31:0] $end
-   $var wire 32 va mtask11_cpu [31:0] $end
-   $var wire 32 v6 mtask5_cpu [31:0] $end
-   $var wire 32 v2 mtask6_cpu [31:0] $end
-   $var wire 32 v7 mtask7_cpu [31:0] $end
-   $var wire 32 v8 mtask8_cpu [31:0] $end
-   $var wire 32 v9 mtask9_cpu [31:0] $end
-  $upscope $end
-  $scope module predicted_threads $end
-   $var wire 32 vd predicted_thread0_mtask [31:0] $end
-   $var wire 32 ve predicted_thread1_mtask [31:0] $end
+  $scope module stats $end
+   $var wire 32 v8 measured_parallelism [31:0] $end
+   $var wire 32 v9 predicted_parallelism [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
@@ -43,216 +30,193 @@ bz v4
 bz v5
 bz v6
 bz v7
-bz v8
-bz v9
-bz va
-bz vb
-bz vc
-bz vd
-bz ve
-b0 vf
-b0 v10
-#595
-b1 vb
-#945
-b1 vc
-b110 vd
-b101 ve
-b10 v10
-#2429
-bz vd
-b111 ve
-b1 v10
+b0 v8
+b0 v9
 #2695
 b110 v0
 b0 v1
-b10011 v2
-b1 vf
+b110 v2
+b110 v6
+b101 v7
+b1 v8
+b10 v9
 #2905
 bz v0
 bz v1
 bz v2
-b0 vf
-#3914
-b1000 ve
-b1 v10
-#5495
-b101 v4
-b1 v5
-b1010 v6
-b1 vf
-#6090
-bz v4
-bz v5
+b0 v8
+#3800
 bz v6
-b0 vf
+b111 v7
+b1 v9
+#4906
+b1000 v7
+b1 v9
+#5495
+b101 v3
+b1 v4
+b101 v5
+b1 v8
+#6090
+bz v3
+bz v4
+bz v5
+b0 v8
 #6300
-b111 v4
-b1 v5
-b1010 v7
-b1 vf
+b111 v3
+b1 v4
+b111 v5
+b1 v8
 #6895
+bz v3
 bz v4
 bz v5
-bz v7
-b0 vf
+b0 v8
 #7490
-b1000 v4
-b1 v5
-b1010 v8
-b1 vf
+b1000 v3
+b1 v4
+b1000 v5
+b1 v8
 #8540
+bz v3
 bz v4
 bz v5
-bz v8
-b0 vf
+b0 v8
+#8848
+b1001 v7
+b1 v9
 #9135
-b1001 v4
-b1 v5
-b1010 v9
-b1 vf
-#9210
-b1001 ve
-b1 v10
+b1001 v3
+b1 v4
+b1001 v5
+b1 v8
 #9695
 b1010 v0
 b0 v1
-b10011 v3
-b10 vf
+b1010 v2
+b10 v8
 #9730
+bz v3
 bz v4
 bz v5
-bz v9
-b1 vf
+b1 v8
 #9870
 bz v0
 bz v1
-bz v3
-b0 vf
+bz v2
+b0 v8
+#9917
+b1010 v6
+b10 v9
+#9954
+b1011 v7
+b10 v9
 #10255
-b1011 v4
-b1 v5
-b1010 va
-b1 vf
-#10645
-b1010 vd
-b10 v10
-#10695
-b1011 ve
-b10 v10
+b1011 v3
+b1 v4
+b1011 v5
+b1 v8
+#11023
+bz v6
+b1 v9
 #11060
+bz v3
 bz v4
 bz v5
-bz va
-b0 vf
-#12130
-bz vd
-b1 v10
-#12180
-bz vc
-bz ve
-b0 v10
-#12250
-bz vb
-#13720
-b10 vb
-#14000
-b10 vc
-b110 vd
-b101 ve
-b10 v10
-#15068
-bz vd
-b111 ve
-b1 v10
+bz v7
+b0 v8
+b0 v9
 #15610
 b110 v0
 b0 v1
-b10011 v2
-b1 vf
+b110 v2
+b110 v6
+b101 v7
+b1 v8
+b10 v9
 #15820
 bz v0
 bz v1
 bz v2
-b0 vf
-#16137
-b1000 ve
-b1 v10
-#18375
-b101 v4
-b1 v5
-b1010 v6
-b1 vf
-#18970
-bz v4
-bz v5
+b0 v8
+#16437
 bz v6
-b0 vf
+b111 v7
+b1 v9
+#17265
+b1000 v7
+b1 v9
+#18375
+b101 v3
+b1 v4
+b101 v5
+b1 v8
+#18970
+bz v3
+bz v4
+bz v5
+b0 v8
 #19145
-b111 v4
-b1 v5
-b1010 v7
-b1 vf
+b111 v3
+b1 v4
+b111 v5
+b1 v8
 #19320
+bz v3
 bz v4
 bz v5
-bz v7
-b0 vf
+b0 v8
 #19670
-b1000 v4
-b1 v5
-b1010 v8
-b1 vf
+b1000 v3
+b1 v4
+b1000 v5
+b1 v8
 #19810
+bz v3
 bz v4
 bz v5
-bz v8
-b0 vf
-#19947
-b1001 ve
-b1 v10
+b0 v8
+#20219
+b1001 v7
+b1 v9
 #20650
-b1001 v4
-b1 v5
-b1010 v9
-b1 vf
+b1001 v3
+b1 v4
+b1001 v5
+b1 v8
 #20720
+bz v3
 bz v4
 bz v5
-bz v9
-b0 vf
-#20980
-b1010 vd
-b10 v10
-#21016
-b1011 ve
-b10 v10
+b0 v8
+#21019
+b1010 v6
+b10 v9
+#21047
+b1011 v7
+b10 v9
 #21140
-b1011 v4
-b1 v5
-b1010 va
-b1 vf
+b1011 v3
+b1 v4
+b1011 v5
+b1 v8
 #21245
+bz v3
 bz v4
 bz v5
-bz va
-b0 vf
+b0 v8
 #21700
 b1010 v0
 b0 v1
-b10011 v3
-b1 vf
+b1010 v2
+b1 v8
+#21847
+bz v6
+b1 v9
 #21875
 bz v0
 bz v1
-bz v3
-b0 vf
-#22049
-bz vd
-b1 v10
-#22085
-bz vc
-bz ve
-b0 v10
-#22330
-bz vb
+bz v2
+bz v7
+b0 v8
+b0 v9
diff --git a/test_regress/t/t_gantt_io_arm.dat b/test_regress/t/t_gantt_io_arm.dat
index 7abda2023..04376808a 100644
--- a/test_regress/t/t_gantt_io_arm.dat
+++ b/test_regress/t/t_gantt_io_arm.dat
@@ -44,14 +44,12 @@ VLPROFPROC CPU part     : 0x663
 VLPROFPROC CPU revision : 3
 VLPROFPROC 
 VLPROFTHREAD 0
-VLPROFEXEC EVAL_BEGIN 57709
-VLPROFEXEC EVAL_LOOP_BEGIN 58532
+VLPROFEXEC EXEC_GRAPH_BEGIN 58532
 VLPROFEXEC MTASK_BEGIN 90465 id 85 predictStart 14315 cpu 2
 VLPROFEXEC MTASK_END 155034 id 85 predictCost 30533
 VLPROFEXEC MTASK_BEGIN 156555 id 79 predictStart 44848 cpu 2
 VLPROFEXEC MTASK_END 294309 id 79 predictCost 48001
-VLPROFEXEC EVAL_LOOP_END 18028850
-VLPROFEXEC EVAL_END 1803680
+VLPROFEXEC EXEC_GRAPH_END 300000
 VLPROFTHREAD 1
 VLPROFEXEC MTASK_BEGIN 77352 id 90 predictStart 14315 cpu 3
 VLPROFEXEC MTASK_END 78511 id 90 predictCost 21592
@@ -59,4 +57,4 @@ VLPROFEXEC MTASK_BEGIN 79799 id 81 predictStart 35907 cpu 3
 VLPROFEXEC MTASK_END 80667 id 81 predictCost 29215
 VLPROFEXEC MTASK_BEGIN 81746 id 87 predictStart 65147 cpu 3
 VLPROFEXEC MTASK_END 82633 id 87 predictCost 33809
-VLPROF stat ticks 180832
+VLPROF stat ticks 300000
diff --git a/test_regress/t/t_gantt_io_arm.out b/test_regress/t/t_gantt_io_arm.out
index 75c7738ea..533bcde25 100644
--- a/test_regress/t/t_gantt_io_arm.out
+++ b/test_regress/t/t_gantt_io_arm.out
@@ -4,33 +4,44 @@ Argument settings:
   +verilator+prof+exec+start+1
   +verilator+prof+exec+window+2
 
-Analysis:
-  Total threads             = 2
-  Total mtasks              = 5
-  Total cpus used           = 2
-  Total yields              = 51
-  Total evals               = 1
-  Total eval loops          = 1
-  Total eval time           = 294309 rdtsc ticks
-  Longest mtask time        = 137754 rdtsc ticks
-  All-thread mtask time     = 205237 rdtsc ticks
-  Longest-thread efficiency = 46.8%
-  All-thread efficiency     = 34.9%
-  All-thread speedup        = 0.7
+Summary:
+  Total elapsed time = 300000 rdtsc ticks
+  Parallelized code  = 80.49% of elapsed time
+  Total threads      = 2
+  Total CPUs used    = 2
+  Total mtasks       = 5
+  Total yields       = 51
 
-Prediction (what Verilator used for scheduling):
-  All-thread efficiency     = 82.4%
-  All-thread speedup        = 1.6
+Parallelized code, measured:
+  Thread utilization =  42.50%
+  Speedup            =   0.85x
+
+Parallelized code, predicted during static scheduling:
+  Thread utilization =  82.44%
+  Speedup            =   1.65x
+
+All code, measured:
+  Thread utilization =  43.96%
+  Speedup            =  0.879x
+
+All code, measured, scaled by predicted speedup:
+  Thread utilization =  72.06%
+  Speedup            =   1.44x
 
 MTask statistics:
+  Longest mtask id = 79
+  Longest mtask time = 57.05% of time elapsed in parallelized code
   min log(p2e) = -1.054  from mtask 79 (predict 48001, elapsed 137754)
   max log(p2e) = 3.641  from mtask 87 (predict 33809, elapsed 887)
   mean = 1.656
   stddev = 2.104
   e ^ stddev = 8.200
 
-CPUs:
-  cpu 2: cpu_time=202323  Phytium,FT-2500/128
-  cpu 3: cpu_time=2914  Phytium,FT-2500/128
+CPU info:
+   Id | Time spent executing MTask | Socket | Core | Model
+      | % of elapsed ticks / ticks |        |      |
+  ====|============================|========|======|======
+    2 |  67.44% /           202323 |        |      | Phytium,FT-2500/128
+    3 |   0.97% /             2914 |        |      | Phytium,FT-2500/128
 
 Writing profile_exec.vcd
diff --git a/test_regress/t/t_gantt_io_noproc.dat b/test_regress/t/t_gantt_io_noproc.dat
index a75accf62..02d2b3442 100644
--- a/test_regress/t/t_gantt_io_noproc.dat
+++ b/test_regress/t/t_gantt_io_noproc.dat
@@ -4,22 +4,18 @@ VLPROF arg +verilator+prof+exec+window+2
 VLPROF stat threads 2
 VLPROF stat yields 0
 VLPROFTHREAD 0
-VLPROFEXEC EVAL_BEGIN 595
-VLPROFEXEC EVAL_LOOP_BEGIN 945
+VLPROFEXEC EXEC_GRAPH_BEGIN 945
 VLPROFEXEC MTASK_BEGIN 2695 id 6 predictStart 0 cpu 19
 VLPROFEXEC MTASK_END 2905 id 6 predictCost 30
 VLPROFEXEC MTASK_BEGIN 9695 id 10 predictStart 196 cpu 19
 VLPROFEXEC MTASK_END 9870 id 10 predictCost 30
-VLPROFEXEC EVAL_LOOP_END 12180
-VLPROFEXEC EVAL_END 12250
-VLPROFEXEC EVAL_BEGIN 13720
-VLPROFEXEC EVAL_LOOP_BEGIN 14000
+VLPROFEXEC EXEC_GRAPH_END 12180
+VLPROFEXEC EXEC_GRAPH_BEGIN 14000
 VLPROFEXEC MTASK_BEGIN 15610 id 6 predictStart 0 cpu 19
 VLPROFEXEC MTASK_END 15820 id 6 predictCost 30
 VLPROFEXEC MTASK_BEGIN 21700 id 10 predictStart 196 cpu 19
 VLPROFEXEC MTASK_END 21875 id 10 predictCost 30
-VLPROFEXEC EVAL_LOOP_END 22085
-VLPROFEXEC EVAL_END 22330
+VLPROFEXEC EXEC_GRAPH_END 22085
 VLPROFTHREAD 1
 VLPROFEXEC MTASK_BEGIN 5495 id 5 predictStart 0 cpu 10
 VLPROFEXEC MTASK_END 6090 id 5 predictCost 30
diff --git a/test_regress/t/t_gantt_io_noproc.out b/test_regress/t/t_gantt_io_noproc.out
index 4fb6360b3..0f50cfc39 100644
--- a/test_regress/t/t_gantt_io_noproc.out
+++ b/test_regress/t/t_gantt_io_noproc.out
@@ -4,32 +4,43 @@ Argument settings:
   +verilator+prof+exec+start+2
   +verilator+prof+exec+window+2
 
-Analysis:
-  Total threads             = 2
-  Total mtasks              = 7
-  Total cpus used           = 2
-  Total yields              = 0
-  Total evals               = 2
-  Total eval loops          = 2
-  Total eval time           = 21875 rdtsc ticks
-  Longest mtask time        = 1190 rdtsc ticks
-  All-thread mtask time     = 5495 rdtsc ticks
-  Longest-thread efficiency = 5.4%
-  All-thread efficiency     = 12.6%
-  All-thread speedup        = 0.3
+Summary:
+  Total elapsed time = 23415 rdtsc ticks
+  Parallelized code  = 82.51% of elapsed time
+  Total threads      = 2
+  Total CPUs used    = 2
+  Total mtasks       = 7
+  Total yields       = 0
 
-Prediction (what Verilator used for scheduling):
-  All-thread efficiency     = 63.2%
-  All-thread speedup        = 1.3
+Parallelized code, measured:
+  Thread utilization =  14.22%
+  Speedup            =  0.284x
+
+Parallelized code, predicted during static scheduling:
+  Thread utilization =  63.22%
+  Speedup            =   1.26x
+
+All code, measured:
+  Thread utilization =  20.48%
+  Speedup            =   0.41x
+
+All code, measured, scaled by predicted speedup:
+  Thread utilization =  56.80%
+  Speedup            =   1.14x
 
 MTask statistics:
+  Longest mtask id = 5
+  Longest mtask time = 6.16% of time elapsed in parallelized code
   min log(p2e) = -3.681  from mtask 5 (predict 30, elapsed 1190)
   max log(p2e) = -2.409  from mtask 8 (predict 107, elapsed 1190)
   mean = -2.992
   stddev = 0.459
   e ^ stddev = 1.583
 
-CPUs:
-  cpu 10: cpu_time=4725
-  cpu 19: cpu_time=770
+CPU info:
+   Id | Time spent executing MTask | Socket | Core | Model
+      | % of elapsed ticks / ticks |        |      |
+  ====|============================|========|======|======
+   10 |  20.18% /             4725 |        |      | 
+   19 |   3.29% /              770 |        |      | 
 
diff --git a/test_regress/t/t_gantt_two.pl b/test_regress/t/t_gantt_two.pl
index 60d41117c..895a24c85 100755
--- a/test_regress/t/t_gantt_two.pl
+++ b/test_regress/t/t_gantt_two.pl
@@ -54,7 +54,7 @@ if ($Self->{vltmt}) {
     file_grep("$Self->{obj_dir}/gantt.log", qr/Total threads += 1/i);
     file_grep("$Self->{obj_dir}/gantt.log", qr/Total mtasks += 0/i);
 }
-file_grep("$Self->{obj_dir}/gantt.log", qr/Total evals += 4/i);
+file_grep("$Self->{obj_dir}/gantt.log", qr/\|\s+4\s+\|\s+4\.0+\s+\|\s+eval/i);
 
 # Diff to itself, just to check parsing
 vcd_identical("$Self->{obj_dir}/profile_exec.vcd", "$Self->{obj_dir}/profile_exec.vcd");

From d3301005424e0077e47d1cbeafe7ac416678b25c Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 17:20:36 +0100
Subject: [PATCH 116/157] Create implicit nets for inputs of gate primitives.

Prior to this we failed to create implicit nets for inputs of gate
primitives, which is required by the standard (IEEE 1800-2017 6.10).
Note: outputs were covered due to being modeled as the LHS of
assignments, which do create implicit nets.
---
 docs/CONTRIBUTORS                             |   1 +
 src/V3LinkDot.cpp                             |   2 +-
 src/verilog.y                                 |  46 +++--
 .../t/t_gate_primitives_implicit_net.out      | 166 ++++++++++++++++++
 .../t/t_gate_primitives_implicit_net.pl       |  23 +++
 .../t/t_gate_primitives_implicit_net.v        | 101 +++++++++++
 6 files changed, 324 insertions(+), 15 deletions(-)
 create mode 100755 test_regress/t/t_gate_primitives_implicit_net.out
 create mode 100755 test_regress/t/t_gate_primitives_implicit_net.pl
 create mode 100755 test_regress/t/t_gate_primitives_implicit_net.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 80b58a622..5c0e7cf46 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -183,5 +183,6 @@ Yuri Victorovich
 Yutetsu TAKATSUKASA
 Yves Mathieu
 Zhanglei Wang
+Zhou Shen
 Zixi Li
 أحمد المحمودي
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index a6f052659..df0028782 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -1679,7 +1679,7 @@ private:
     }
     void visit(AstImplicit* nodep) override {
         // Unsupported gates need implicit creation
-        pinImplicitExprRecurse(nodep);
+        pinImplicitExprRecurse(nodep->exprsp());
         // We're done with implicit gates
         VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
     }
diff --git a/src/verilog.y b/src/verilog.y
index 3bd0218ab..3d553f667 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -55,6 +55,7 @@
 #define DELAY_LIST(delayp, assignsp) \
     if (delayp) { \
         for (auto* nodep = assignsp; nodep; nodep = nodep->nextp()) { \
+            if (VN_IS(nodep, Implicit)) continue; \
             auto* const assignp = VN_AS(nodep, NodeAssign); \
             assignp->timingControlp(nodep == assignsp ? delayp : delayp->cloneTree(false)); \
         } \
@@ -373,6 +374,7 @@ int V3ParseGrammar::s_modTypeImpNum = 0;
     { \
         if (AstStrengthSpec* const specp = VN_CAST(strengthSpecNodep, StrengthSpec)) { \
             for (auto* nodep = beginp; nodep; nodep = nodep->nextp()) { \
+                if (VN_IS(nodep, Implicit)) continue; \
                 auto* const assignp = VN_AS(nodep, typeToCast); \
                 assignp->strengthSpecp(nodep == beginp ? specp : specp->cloneTree(false)); \
             } \
@@ -5347,7 +5349,8 @@ gateBuf<nodep>:
                 gateFront variable_lvalue ',' exprList ')'
                         { AstNodeExpr* inp = $4;
                           while (inp->nextp()) inp = VN_AS(inp->nextp(), NodeExpr);
-                          $$ = new AstAssignW{$<fl>1, $2, GRAMMARP->createGatePin(inp->cloneTree(false))};
+                          $$ = new AstImplicit{$<fl>1, inp->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, GRAMMARP->createGatePin(inp->cloneTree(false))});
                           for (AstNodeExpr* outp = $4; outp->nextp(); outp = VN_CAST(outp->nextp(), NodeExpr)) {
                               $$->addNext(new AstAssignW{$<fl>1, outp->cloneTree(false),
                                                          GRAMMARP->createGatePin(inp->cloneTree(false))});
@@ -5358,8 +5361,9 @@ gateNot<nodep>:
                 gateFront variable_lvalue ',' exprList ')'
                         { AstNodeExpr* inp = $4;
                           while (inp->nextp()) inp = VN_AS(inp->nextp(), NodeExpr);
-                          $$ = new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1,
-                                                                 GRAMMARP->createGatePin(inp->cloneTree(false))}};
+                          $$ = new AstImplicit{$<fl>1, inp->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1,
+                                                                 GRAMMARP->createGatePin(inp->cloneTree(false))}});
                           for (AstNodeExpr* outp = $4; outp->nextp(); outp = VN_CAST(outp->nextp(), NodeExpr)) {
                               $$->addNext(new AstAssignW{$<fl>1, outp->cloneTree(false),
                                                          new AstNot{$<fl>1,
@@ -5369,44 +5373,58 @@ gateNot<nodep>:
         ;
 gateBufif0<nodep>:
                 gateFront variable_lvalue ',' gatePinExpr ',' gatePinExpr ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, new AstNot{$<fl>1, $6}, $4}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $6->cloneTree(false)};
+                          $<implicitp>$->addExprsp($4->cloneTree(false));
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, new AstNot{$<fl>1, $6}, $4}}); DEL($1); }
         ;
 gateBufif1<nodep>:
                 gateFront variable_lvalue ',' gatePinExpr ',' gatePinExpr ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, $6, $4}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $6->cloneTree(false)};
+                          $<implicitp>$->addExprsp($4->cloneTree(false));
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, $6, $4}}); DEL($1); }
         ;
 gateNotif0<nodep>:
                 gateFront variable_lvalue ',' gatePinExpr ',' gatePinExpr ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, new AstNot{$<fl>1, $6},
-                                                                        new AstNot{$<fl>1, $4}}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $6->cloneTree(false)};
+                          $<implicitp>$->addExprsp($4->cloneTree(false));
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, new AstNot{$<fl>1, $6},
+                                                                        new AstNot{$<fl>1, $4}}}); DEL($1); }
         ;
 gateNotif1<nodep>:
                 gateFront variable_lvalue ',' gatePinExpr ',' gatePinExpr ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, $6, new AstNot{$<fl>1, $4}}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $6->cloneTree(false)};
+                          $<implicitp>$->addExprsp($4->cloneTree(false));
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstBufIf1{$<fl>1, $6, new AstNot{$<fl>1, $4}}}); DEL($1); }
         ;
 gateAnd<nodep>:
                 gateFront variable_lvalue ',' gateAndPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, $4}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, $4}); DEL($1); }
         ;
 gateNand<nodep>:
                 gateFront variable_lvalue ',' gateAndPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}); DEL($1); }
         ;
 gateOr<nodep>:
                 gateFront variable_lvalue ',' gateOrPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, $4}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, $4}); DEL($1); }
         ;
 gateNor<nodep>:
                 gateFront variable_lvalue ',' gateOrPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}); DEL($1); }
         ;
 gateXor<nodep>:
                 gateFront variable_lvalue ',' gateXorPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, $4}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, $4}); DEL($1); }
         ;
 gateXnor<nodep>:
                 gateFront variable_lvalue ',' gateXorPinList ')'
-                        { $$ = new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}; DEL($1); }
+                        { $$ = new AstImplicit{$<fl>1, $4->cloneTree(false)};
+                          $$->addNext(new AstAssignW{$<fl>1, $2, new AstNot{$<fl>1, $4}}); DEL($1); }
         ;
 gatePullup<nodep>:
                 gateFront variable_lvalue ')'           { $$ = new AstPull{$<fl>1, $2, true}; DEL($1); }
diff --git a/test_regress/t/t_gate_primitives_implicit_net.out b/test_regress/t/t_gate_primitives_implicit_net.out
new file mode 100755
index 000000000..3f41c1ff9
--- /dev/null
+++ b/test_regress/t/t_gate_primitives_implicit_net.out
@@ -0,0 +1,166 @@
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:15:21: Signal definition not found, creating implicitly: 'i_and1'
+   15 |    and g_and(o_and, i_and1, i_and2, i_and3);
+      |                     ^~~~~~
+                   ... For warning description see https://verilator.org/warn/IMPLICIT?v=latest
+                   ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message.
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:15:29: Signal definition not found, creating implicitly: 'i_and2'
+                                                           : ... Suggested alternative: 'i_and1'
+   15 |    and g_and(o_and, i_and1, i_and2, i_and3);
+      |                             ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:15:37: Signal definition not found, creating implicitly: 'i_and3'
+                                                           : ... Suggested alternative: 'i_and1'
+   15 |    and g_and(o_and, i_and1, i_and2, i_and3);
+      |                                     ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:15:14: Signal definition not found, creating implicitly: 'o_and'
+                                                           : ... Suggested alternative: 'i_and1'
+   15 |    and g_and(o_and, i_and1, i_and2, i_and3);
+      |              ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:16:30: Signal definition not found, creating implicitly: 'i_not1'
+   16 |    not g_not(o_not1, o_not2, i_not1);
+      |                              ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:16:14: Signal definition not found, creating implicitly: 'o_not1'
+                                                           : ... Suggested alternative: 'i_not1'
+   16 |    not g_not(o_not1, o_not2, i_not1);
+      |              ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:16:22: Signal definition not found, creating implicitly: 'o_not2'
+                                                           : ... Suggested alternative: 'o_not1'
+   16 |    not g_not(o_not1, o_not2, i_not1);
+      |                      ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:17:21: Signal definition not found, creating implicitly: 'i_nor1'
+                                                           : ... Suggested alternative: 'i_not1'
+   17 |    nor g_nor(o_nor, i_nor1, i_nor2, i_nor3);
+      |                     ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:17:29: Signal definition not found, creating implicitly: 'i_nor2'
+                                                           : ... Suggested alternative: 'i_nor1'
+   17 |    nor g_nor(o_nor, i_nor1, i_nor2, i_nor3);
+      |                             ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:17:37: Signal definition not found, creating implicitly: 'i_nor3'
+                                                           : ... Suggested alternative: 'i_nor1'
+   17 |    nor g_nor(o_nor, i_nor1, i_nor2, i_nor3);
+      |                                     ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:17:14: Signal definition not found, creating implicitly: 'o_nor'
+                                                           : ... Suggested alternative: 'i_nor1'
+   17 |    nor g_nor(o_nor, i_nor1, i_nor2, i_nor3);
+      |              ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:18:18: Signal definition not found, creating implicitly: 'i_or1'
+                                                           : ... Suggested alternative: 'i_nor1'
+   18 |    or g_or(o_or, i_or1, i_or2, i_or3);
+      |                  ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:18:25: Signal definition not found, creating implicitly: 'i_or2'
+                                                           : ... Suggested alternative: 'i_nor2'
+   18 |    or g_or(o_or, i_or1, i_or2, i_or3);
+      |                         ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:18:32: Signal definition not found, creating implicitly: 'i_or3'
+                                                           : ... Suggested alternative: 'i_nor3'
+   18 |    or g_or(o_or, i_or1, i_or2, i_or3);
+      |                                ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:18:12: Signal definition not found, creating implicitly: 'o_or'
+                                                           : ... Suggested alternative: 'o_nor'
+   18 |    or g_or(o_or, i_or1, i_or2, i_or3);
+      |            ^~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:19:24: Signal definition not found, creating implicitly: 'i_nand1'
+                                                           : ... Suggested alternative: 'i_and1'
+   19 |    nand g_nand(o_nand, i_nand1, i_nand2, i_nand3);
+      |                        ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:19:33: Signal definition not found, creating implicitly: 'i_nand2'
+                                                           : ... Suggested alternative: 'i_and2'
+   19 |    nand g_nand(o_nand, i_nand1, i_nand2, i_nand3);
+      |                                 ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:19:42: Signal definition not found, creating implicitly: 'i_nand3'
+                                                           : ... Suggested alternative: 'i_and3'
+   19 |    nand g_nand(o_nand, i_nand1, i_nand2, i_nand3);
+      |                                          ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:19:16: Signal definition not found, creating implicitly: 'o_nand'
+                                                           : ... Suggested alternative: 'o_and'
+   19 |    nand g_nand(o_nand, i_nand1, i_nand2, i_nand3);
+      |                ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:20:21: Signal definition not found, creating implicitly: 'i_xor1'
+                                                           : ... Suggested alternative: 'i_nor1'
+   20 |    xor g_xor(o_xor, i_xor1, i_xor2, i_xor3);
+      |                     ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:20:29: Signal definition not found, creating implicitly: 'i_xor2'
+                                                           : ... Suggested alternative: 'i_nor2'
+   20 |    xor g_xor(o_xor, i_xor1, i_xor2, i_xor3);
+      |                             ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:20:37: Signal definition not found, creating implicitly: 'i_xor3'
+                                                           : ... Suggested alternative: 'i_nor3'
+   20 |    xor g_xor(o_xor, i_xor1, i_xor2, i_xor3);
+      |                                     ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:20:14: Signal definition not found, creating implicitly: 'o_xor'
+                                                           : ... Suggested alternative: 'o_nor'
+   20 |    xor g_xor(o_xor, i_xor1, i_xor2, i_xor3);
+      |              ^~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:21:23: Signal definition not found, creating implicitly: 'i_xnor1'
+                                                           : ... Suggested alternative: 'i_nor1'
+   21 |    xnor g_xor(o_xnor, i_xnor1, i_xnor2, i_xnor3);
+      |                       ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:21:32: Signal definition not found, creating implicitly: 'i_xnor2'
+                                                           : ... Suggested alternative: 'i_nor2'
+   21 |    xnor g_xor(o_xnor, i_xnor1, i_xnor2, i_xnor3);
+      |                                ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:21:41: Signal definition not found, creating implicitly: 'i_xnor3'
+                                                           : ... Suggested alternative: 'i_nor3'
+   21 |    xnor g_xor(o_xnor, i_xnor1, i_xnor2, i_xnor3);
+      |                                         ^~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:21:15: Signal definition not found, creating implicitly: 'o_xnor'
+                                                           : ... Suggested alternative: 'o_nor'
+   21 |    xnor g_xor(o_xnor, i_xnor1, i_xnor2, i_xnor3);
+      |               ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:22:30: Signal definition not found, creating implicitly: 'i_buf1'
+   22 |    buf g_buf(o_buf1, o_buf2, i_buf1);
+      |                              ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:22:14: Signal definition not found, creating implicitly: 'o_buf1'
+                                                           : ... Suggested alternative: 'i_buf1'
+   22 |    buf g_buf(o_buf1, o_buf2, i_buf1);
+      |              ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:22:22: Signal definition not found, creating implicitly: 'o_buf2'
+                                                           : ... Suggested alternative: 'o_buf1'
+   22 |    buf g_buf(o_buf1, o_buf2, i_buf1);
+      |                      ^~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:23:41: Signal definition not found, creating implicitly: 'i_bufif02'
+   23 |    bufif0 g_bufif0(o_bufif0, i_bufif01, i_bufif02);
+      |                                         ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:23:30: Signal definition not found, creating implicitly: 'i_bufif01'
+                                                           : ... Suggested alternative: 'i_bufif02'
+   23 |    bufif0 g_bufif0(o_bufif0, i_bufif01, i_bufif02);
+      |                              ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:23:20: Signal definition not found, creating implicitly: 'o_bufif0'
+                                                           : ... Suggested alternative: 'i_bufif01'
+   23 |    bufif0 g_bufif0(o_bufif0, i_bufif01, i_bufif02);
+      |                    ^~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:24:41: Signal definition not found, creating implicitly: 'i_bufif12'
+                                                           : ... Suggested alternative: 'i_bufif02'
+   24 |    bufif1 g_bufif1(o_bufif1, i_bufif11, i_bufif12);
+      |                                         ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:24:30: Signal definition not found, creating implicitly: 'i_bufif11'
+                                                           : ... Suggested alternative: 'i_bufif01'
+   24 |    bufif1 g_bufif1(o_bufif1, i_bufif11, i_bufif12);
+      |                              ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:24:20: Signal definition not found, creating implicitly: 'o_bufif1'
+                                                           : ... Suggested alternative: 'o_bufif0'
+   24 |    bufif1 g_bufif1(o_bufif1, i_bufif11, i_bufif12);
+      |                    ^~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:25:41: Signal definition not found, creating implicitly: 'i_notif02'
+                                                           : ... Suggested alternative: 'i_bufif02'
+   25 |    notif0 g_notif0(o_notif0, i_notif01, i_notif02);
+      |                                         ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:25:30: Signal definition not found, creating implicitly: 'i_notif01'
+                                                           : ... Suggested alternative: 'i_notif02'
+   25 |    notif0 g_notif0(o_notif0, i_notif01, i_notif02);
+      |                              ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:25:20: Signal definition not found, creating implicitly: 'o_notif0'
+                                                           : ... Suggested alternative: 'i_notif01'
+   25 |    notif0 g_notif0(o_notif0, i_notif01, i_notif02);
+      |                    ^~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:26:41: Signal definition not found, creating implicitly: 'i_notif12'
+                                                           : ... Suggested alternative: 'i_notif02'
+   26 |    notif1 g_notif1(o_notif1, i_notif11, i_notif12);
+      |                                         ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:26:30: Signal definition not found, creating implicitly: 'i_notif11'
+                                                           : ... Suggested alternative: 'i_notif01'
+   26 |    notif1 g_notif1(o_notif1, i_notif11, i_notif12);
+      |                              ^~~~~~~~~
+%Warning-IMPLICIT: t/t_gate_primitives_implicit_net.v:26:20: Signal definition not found, creating implicitly: 'o_notif1'
+                                                           : ... Suggested alternative: 'o_notif0'
+   26 |    notif1 g_notif1(o_notif1, i_notif11, i_notif12);
+      |                    ^~~~~~~~
diff --git a/test_regress/t/t_gate_primitives_implicit_net.pl b/test_regress/t/t_gate_primitives_implicit_net.pl
new file mode 100755
index 000000000..922c66457
--- /dev/null
+++ b/test_regress/t/t_gate_primitives_implicit_net.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(vlt => 1);
+
+compile(
+    verilator_flags2 => ["-Wno-fatal --no-skip-identical"],
+    expect_filename => $Self->{golden_filename},
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_gate_primitives_implicit_net.v b/test_regress/t/t_gate_primitives_implicit_net.v
new file mode 100755
index 000000000..7c1308524
--- /dev/null
+++ b/test_regress/t/t_gate_primitives_implicit_net.v
@@ -0,0 +1,101 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+   int   cyc=1;
+
+   // Instantiate the primitive gates to be tested.
+   and g_and(o_and, i_and1, i_and2, i_and3);
+   not g_not(o_not1, o_not2, i_not1);
+   nor g_nor(o_nor, i_nor1, i_nor2, i_nor3);
+   or g_or(o_or, i_or1, i_or2, i_or3);
+   nand g_nand(o_nand, i_nand1, i_nand2, i_nand3);
+   xor g_xor(o_xor, i_xor1, i_xor2, i_xor3);
+   xnor g_xor(o_xnor, i_xnor1, i_xnor2, i_xnor3);
+   buf g_buf(o_buf1, o_buf2, i_buf1);
+   bufif0 g_bufif0(o_bufif0, i_bufif01, i_bufif02);
+   bufif1 g_bufif1(o_bufif1, i_bufif11, i_bufif12);
+   notif0 g_notif0(o_notif0, i_notif01, i_notif02);
+   notif1 g_notif1(o_notif1, i_notif11, i_notif12);
+
+   // Generate random data for inputs
+   reg   rd_data1, rd_data2, rd_data3;
+   always @(posedge clk) begin
+      rd_data1 = 1'($random);
+      rd_data2 = 1'($random);
+      rd_data3 = 1'($random);
+   end
+
+   // Assign the input of primitive gates.
+`default_nettype none
+   assign i_and1 = rd_data1;
+   assign i_and2 = rd_data2;
+   assign i_and3 = rd_data3;
+
+   assign i_not1 = rd_data1;
+
+   assign i_nor1 = rd_data1;
+   assign i_nor2 = rd_data2;
+   assign i_nor3 = rd_data3;
+
+   assign i_or1 = rd_data1;
+   assign i_or2 = rd_data2;
+   assign i_or3 = rd_data3;
+
+   assign i_nand1 = rd_data1;
+   assign i_nand2 = rd_data2;
+   assign i_nand3 = rd_data3;
+
+   assign i_xor1 = rd_data1;
+   assign i_xor2 = rd_data2;
+   assign i_xor3 = rd_data3;
+
+   assign i_xnor1 = rd_data1;
+   assign i_xnor2 = rd_data2;
+   assign i_xnor3 = rd_data3;
+
+   assign i_buf1 = rd_data1;
+
+   assign i_bufif01 = rd_data1;
+   assign i_bufif02 = rd_data2;
+
+   assign i_bufif11 = rd_data1;
+   assign i_bufif12 = rd_data2;
+
+   assign i_notif01 = rd_data1;
+   assign i_notif02 = rd_data2;
+
+   assign i_notif11 = rd_data1;
+   assign i_notif12 = rd_data2;
+
+   // Check the outputs of the gate instances
+   always @(negedge clk) begin
+      if (o_and !== (i_and1 & i_and2 & i_and3)) $stop;
+      if ((o_not1 !== ~i_not1) || (o_not2 != ~i_not1)) $stop;
+      if (o_nor !== !(i_nor1 | i_nor2 | i_nor3)) $stop;
+      if (o_or !== (i_or1 | i_or2 | i_or3)) $stop;
+      if (o_nand !== !(i_nand1 & i_nand2 & i_nand3)) $stop;
+      if (o_xor !== (i_xor1 ^ i_xor2 ^ i_xor3)) $stop;
+      if (o_xnor !== !(i_xnor1 ^ i_xnor2 ^ i_xnor3)) $stop;
+      if ((o_buf1 !== i_buf1) || (o_buf2 !== i_buf1)) $stop;
+      if (!(o_bufif0 == (i_bufif01 & !i_bufif02))) $stop;
+      if (!(o_bufif1 == (i_bufif11 & i_bufif12))) $stop;
+      if (!(o_notif0 == (!i_notif01 & !i_notif02))) $stop;
+      if (!(o_notif1 == (!i_notif11 & i_notif12))) $stop;
+   end
+
+   always @(posedge clk) begin
+      cyc = cyc + 1;
+      if (cyc == 100) begin
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+endmodule

From 978d900e3636ebc1760588c51ff3eb4cce6894d2 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 21 Oct 2023 14:45:30 +0100
Subject: [PATCH 117/157] Simplify and fix code stats

V3Stats for "fast" code have bit-rotted a little and is causing some
problems with tests that rely on stats outputs. The problem is that not
all code is necessarily reachable from eval() any more (due to the
complexity of some the features added over the past few years), so it
might miss some things, as for measuring the "fast" code, it is trying
to trace the execution paths via calls, starting from eval(). It also
appears the fast code can also contain calls to slow code in some
circumstances.

To avoid all that, removed trying to trace dynamic execution, and simply
report the static node counts, which is enough for testing.

Similarly, the variable counts are somewhat dubious, as they don't
include all data types, or all instances of a module in some stages.
Removing these as they are not widely used nor dependable. More specific
stats can be added if required and can be well defined.
---
 src/V3Stats.cpp | 296 ++++++++++++++----------------------------------
 src/V3Stats.h   |   2 +-
 2 files changed, 88 insertions(+), 210 deletions(-)

diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index f79c8145a..03d823d8b 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -27,246 +27,124 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 // Stats class functions
 
 class StatsVisitor final : public VNVisitorConst {
-private:
-    // NODE STATE/TYPES
-
-    using NameMap = std::map<const std::string, int>;  // Number of times a name appears
+    struct Counters final {
+        // Nodes of given type
+        uint64_t m_statTypeCount[VNType::_ENUM_END];
+        // Nodes of given type with given type immediate child
+        uint64_t m_statAbove[VNType::_ENUM_END][VNType::_ENUM_END];
+        // Prediction of given type
+        uint64_t m_statPred[VBranchPred::_ENUM_END];
+    };
 
     // STATE
-    const string m_stage;  // Name of the stage we are scanning
-    /// m_fast = true:  Counting only critical branch of fastpath
-    /// m_fast = false:  Counting every node, ignoring structure of program
-    const bool m_fast;
-
-    const AstCFunc* m_cfuncp;  // Current CFUNC
-    bool m_counting;  // Currently counting
-    double m_instrs;  // Current instr count (for determining branch direction)
-    bool m_tracingCall;  // Iterating into a CCall to a CFunc
-
-    std::vector<VDouble0> m_statTypeCount;  // Nodes of given type
-    VDouble0 m_statAbove[VNType::_ENUM_END][VNType::_ENUM_END];  // Nodes of given type
-    std::array<VDouble0, VBranchPred::_ENUM_END> m_statPred;  // Nodes of given type
-    VDouble0 m_statInstr;  // Instruction count
-    VDouble0 m_statInstrFast;  // Instruction count, non-slow() eval functions only
-    std::vector<VDouble0> m_statVarWidths;  // Variables of given width
-    std::vector<NameMap> m_statVarWidthNames;  // Var names of given width
-    VDouble0 m_statVarArray;  // Statistic tracking
-    VDouble0 m_statVarBytes;  // Statistic tracking
-    VDouble0 m_statVarClock;  // Statistic tracking
-    VDouble0 m_statVarScpBytes;  // Statistic tracking
+    const bool m_fastOnly;  // When true, consider only fast functions
+    const AstNodeExpr* m_parentExprp = nullptr;  // Parent expression
+    Counters m_counters;  // The actual counts we will display
+    Counters m_dumpster;  // Alternate buffer to make discarding parts of the tree easier
+    Counters* m_accump;  // The currently active accumulator
+    std::vector<uint64_t> m_statVarWidths;  // Variables of given width
+    std::vector<std::map<const std::string, uint32_t>>
+        m_statVarWidthNames;  // Var names of given width
 
     // METHODS
-
-    void allNodes(AstNode* nodep) {
-        m_instrs += nodep->instrCount();
-        if (m_counting) {
-            ++m_statTypeCount[nodep->type()];
-            if (nodep->firstAbovep()) {  // Grab only those above, not those "back"
-                ++m_statAbove[nodep->firstAbovep()->type()][nodep->type()];
-            }
-            m_statInstr += nodep->instrCount();
-            if (m_cfuncp && !m_cfuncp->slow()) m_statInstrFast += nodep->instrCount();
-        }
+    void countThenIterateChildren(AstNode* nodep) {
+        ++m_accump->m_statTypeCount[nodep->type()];
+        iterateChildrenConst(nodep);
     }
 
     // VISITORS
-    void visit(AstNodeModule* nodep) override {
-        allNodes(nodep);
-        if (!m_fast) {
-            // Count all CFuncs below this module
-            iterateChildrenConst(nodep);
-        }
-        // Else we recursively trace fast CFuncs from the top _eval
-        // func, see visit(AstNetlist*)
-    }
     void visit(AstVar* nodep) override {
-        allNodes(nodep);
-        iterateChildrenConst(nodep);
-        if (m_counting && nodep->dtypep()) {
-            if (nodep->isUsedClock()) ++m_statVarClock;
-            if (VN_IS(nodep->dtypeSkipRefp(), UnpackArrayDType)) {
-                ++m_statVarArray;
-            } else {
-                m_statVarBytes += nodep->dtypeSkipRefp()->widthTotalBytes();
-            }
-            if (int(m_statVarWidths.size()) <= nodep->width()) {
+        if (nodep->dtypep()) {
+            if (m_statVarWidths.size() <= static_cast<size_t>(nodep->width())) {
                 m_statVarWidths.resize(nodep->width() + 5);
-                if (v3Global.opt.statsVars()) m_statVarWidthNames.resize(nodep->width() + 5);
+                if (v3Global.opt.statsVars()) {  //
+                    m_statVarWidthNames.resize(nodep->width() + 5);
+                }
             }
             ++m_statVarWidths.at(nodep->width());
-            const string pn = nodep->prettyName();
             if (v3Global.opt.statsVars()) {
-                NameMap& nameMapr = m_statVarWidthNames.at(nodep->width());
-                if (nameMapr.find(pn) != nameMapr.end()) {
-                    nameMapr[pn]++;
-                } else {
-                    nameMapr[pn] = 1;
-                }
+                ++m_statVarWidthNames.at(nodep->width())[nodep->prettyName()];
             }
         }
-    }
-    void visit(AstVarScope* nodep) override {
-        allNodes(nodep);
-        iterateChildrenConst(nodep);
-        if (m_counting) {
-            if (VN_IS(nodep->varp()->dtypeSkipRefp(), BasicDType)) {
-                m_statVarScpBytes += nodep->varp()->dtypeSkipRefp()->widthTotalBytes();
-            }
-        }
-    }
-    void visit(AstNodeIf* nodep) override {
-        UINFO(4, "   IF i=" << m_instrs << " " << nodep << endl);
-        allNodes(nodep);
-        // Condition is part of cost allocated to PREVIOUS block
-        iterateAndNextConstNull(nodep->condp());
-        // Track prediction
-        if (m_counting) ++m_statPred[nodep->branchPred()];
-        if (!m_fast) {
-            // Count everything
-            iterateChildrenConst(nodep);
-        } else {
-            // See which path we want to take
-            // Need to do even if !m_counting because maybe determining upstream if/else
-            double ifInstrs = 0.0;
-            double elseInstrs = 0.0;
-            if (!nodep->branchPred().unlikely()) {  // Check if
-                VL_RESTORER(m_instrs);
-                VL_RESTORER(m_counting);
-                {
-                    m_counting = false;
-                    m_instrs = 0.0;
-                    iterateAndNextConstNull(nodep->thensp());
-                    ifInstrs = m_instrs;
-                }
-            }
-            if (!nodep->branchPred().likely()) {  // Check else
-                VL_RESTORER(m_instrs);
-                VL_RESTORER(m_counting);
-                {
-                    m_counting = false;
-                    m_instrs = 0.0;
-                    iterateAndNextConstNull(nodep->elsesp());
-                    elseInstrs = m_instrs;
-                }
-            }
-            // Now collect the stats
-            if (m_counting) {
-                if (ifInstrs >= elseInstrs) {
-                    iterateAndNextConstNull(nodep->thensp());
-                } else {
-                    iterateAndNextConstNull(nodep->elsesp());
-                }
-            }
-        }
-    }
-    // While's we assume evaluate once.
-    //  void visit(AstWhile* nodep) override {
 
-    void visit(AstNodeCCall* nodep) override {
-        allNodes(nodep);
-        iterateChildrenConst(nodep);
-        if (m_fast && !nodep->funcp()->entryPoint()) {
-            // Enter the function and trace it
-            m_tracingCall = true;
-            iterateConst(nodep->funcp());
-        }
+        countThenIterateChildren(nodep);
     }
+
+    void visit(AstNodeExpr* nodep) override {
+        // Count expression combinations
+        if (m_parentExprp) ++m_accump->m_statAbove[m_parentExprp->type()][nodep->type()];
+        VL_RESTORER(m_parentExprp);
+        m_parentExprp = nodep;
+        countThenIterateChildren(nodep);
+    }
+
+    void visit(AstNodeIf* nodep) override {
+        // Track prediction
+        ++m_accump->m_statPred[nodep->branchPred()];
+        countThenIterateChildren(nodep);
+    }
+
     void visit(AstCFunc* nodep) override {
-        if (m_fast) {
-            if (!m_tracingCall && !nodep->entryPoint()) return;
-            m_tracingCall = false;
-        }
-        VL_RESTORER(m_cfuncp);
-        {
-            m_cfuncp = nodep;
-            allNodes(nodep);
-            iterateChildrenConst(nodep);
-        }
-    }
-    void visit(AstNode* nodep) override {
-        allNodes(nodep);
-        iterateChildrenConst(nodep);
-    }
-    void visit(AstNetlist* nodep) override {
-        if (m_fast && nodep->evalp()) {
-            m_instrs = 0;
-            m_counting = true;
-            iterateChildrenConst(nodep->evalp());
-            m_counting = false;
-        }
-        allNodes(nodep);
-        iterateChildrenConst(nodep);
+        VL_RESTORER(m_accump);
+        if (m_fastOnly && !nodep->slow()) m_accump = &m_counters;
+        countThenIterateChildren(nodep);
     }
 
+    void visit(AstNode* nodep) override { countThenIterateChildren(nodep); }
+
 public:
     // CONSTRUCTORS
-    StatsVisitor(AstNetlist* nodep, const string& stage, bool fast)
-        : m_stage{stage}
-        , m_fast{fast} {
-        UINFO(9, "Starting stats, fast=" << fast << endl);
-        m_cfuncp = nullptr;
-        m_counting = !m_fast;
-        m_instrs = 0;
-        m_tracingCall = false;
-        // Initialize arrays
-        m_statTypeCount.resize(VNType::_ENUM_END);
-        // Process
+    StatsVisitor(AstNetlist* nodep, const std::string& stage, bool fastOnly)
+        : m_fastOnly{fastOnly}
+        , m_accump{fastOnly ? &m_dumpster : &m_counters} {
+        UINFO(9, "Starting stats, fastOnly=" << fastOnly << endl);
+        memset(&m_counters, 0, sizeof(m_counters));
+        memset(&m_dumpster, 0, sizeof(m_dumpster));
+
         iterateConst(nodep);
-    }
-    ~StatsVisitor() override {
-        // Done. Publish statistics
-        V3Stats::addStat(m_stage, "Instruction count, TOTAL", m_statInstr);
-        V3Stats::addStat(m_stage, "Instruction count, fast critical", m_statInstrFast);
-        // Vars
-        V3Stats::addStat(m_stage, "Vars, unpacked arrayed", m_statVarArray);
-        V3Stats::addStat(m_stage, "Vars, clock attribute", m_statVarClock);
-        V3Stats::addStat(m_stage, "Var space, non-arrays, bytes", m_statVarBytes);
-        if (m_statVarScpBytes != 0.0) {
-            V3Stats::addStat(m_stage, "Var space, scoped, bytes", m_statVarScpBytes);
-        }
+
+        // Shorthand
+        const auto addStat = [&](const std::string& name, double count) {  //
+            V3Stats::addStat(stage, name, count);
+        };
+
+        // Variable widths
         for (unsigned i = 0; i < m_statVarWidths.size(); i++) {
-            const double count{m_statVarWidths.at(i)};
-            if (count != 0.0) {
+            if (const uint64_t count = m_statVarWidths.at(i)) {
+                std::stringstream ss;
+                ss << "Vars, width " << std::setw(5) << std::dec << i;
+                const std::string prefix = ss.str();
                 if (v3Global.opt.statsVars()) {
-                    const NameMap& nameMapr = m_statVarWidthNames.at(i);
-                    for (const auto& itr : nameMapr) {
-                        std::ostringstream os;
-                        os << "Vars, width " << std::setw(5) << std::dec << i << " " << itr.first;
-                        V3Stats::addStat(m_stage, os.str(), itr.second);
+                    for (const auto& it : m_statVarWidthNames.at(i)) {
+                        addStat(prefix + " " + it.first, it.second);
                     }
                 } else {
-                    std::ostringstream os;
-                    os << "Vars, width " << std::setw(5) << std::dec << i;
-                    V3Stats::addStat(m_stage, os.str(), count);
+                    addStat(prefix, count);
                 }
             }
         }
+
         // Node types
-        for (int type = 0; type < VNType::_ENUM_END; type++) {
-            const double count{m_statTypeCount.at(type)};
-            if (count != 0.0) {
-                V3Stats::addStat(m_stage, std::string{"Node count, "} + VNType{type}.ascii(),
-                                 count);
+        const auto typeName = [](int type) { return std::string{VNType{type}.ascii()}; };
+        for (int t = 0; t < VNType::_ENUM_END; ++t) {
+            if (const uint64_t count = m_counters.m_statTypeCount[t]) {
+                addStat("Node count, " + typeName(t), count);
             }
         }
-        for (int type = 0; type < VNType::_ENUM_END; type++) {
-            for (int type2 = 0; type2 < VNType::_ENUM_END; type2++) {
-                const double count{m_statAbove[type][type2]};
-                if (count != 0.0) {
-                    V3Stats::addStat(m_stage,
-                                     (std::string{"Node pairs, "} + VNType{type}.ascii() + "_"
-                                      + VNType{type2}.ascii()),
-                                     count);
+
+        // Expression combinations
+        for (int t1 = 0; t1 < VNType::_ENUM_END; ++t1) {
+            for (int t2 = 0; t2 < VNType::_ENUM_END; ++t2) {
+                if (const uint64_t c = m_counters.m_statAbove[t1][t2]) {
+                    addStat("Expr combination, " + typeName(t1) + " over " + typeName(t2), c);
                 }
             }
         }
-        // Branch pred
-        for (int type = 0; type < VBranchPred::_ENUM_END; type++) {
-            const double count{m_statPred[type]};
-            if (count != 0.0) {
-                V3Stats::addStat(m_stage,
-                                 (std::string{"Branch prediction, "} + VBranchPred{type}.ascii()),
-                                 count);
+
+        // Branch predictions
+        for (int t = 0; t < VBranchPred::_ENUM_END; ++t) {
+            if (const uint64_t c = m_counters.m_statPred[t]) {
+                addStat(std::string{"Branch prediction, "} + VBranchPred{t}.ascii(), c);
             }
         }
     }
@@ -275,11 +153,11 @@ public:
 //######################################################################
 // Top Stats class
 
-void V3Stats::statsStageAll(AstNetlist* nodep, const string& stage, bool fast) {
-    { StatsVisitor{nodep, stage, fast}; }
+void V3Stats::statsStageAll(AstNetlist* nodep, const std::string& stage, bool fastOnly) {
+    StatsVisitor{nodep, stage, fastOnly};
 }
 
 void V3Stats::statsFinalAll(AstNetlist* nodep) {
-    statsStageAll(nodep, "Final");
-    statsStageAll(nodep, "Final_Fast", true);
+    statsStageAll(nodep, "Final all");
+    statsStageAll(nodep, "Final fast", true);
 }
diff --git a/src/V3Stats.h b/src/V3Stats.h
index 97c61050b..8fd207d28 100644
--- a/src/V3Stats.h
+++ b/src/V3Stats.h
@@ -117,7 +117,7 @@ public:
     /// Called each stage
     static void statsStage(const string& name);
     /// Called by the top level to collect statistics
-    static void statsStageAll(AstNetlist* nodep, const string& stage, bool fast = false);
+    static void statsStageAll(AstNetlist* nodep, const string& stage, bool fastOnly = false);
     static void statsFinalAll(AstNetlist* nodep);
     /// Called by the top level to dump the statistics
     static void statsReport();

From 82565690c7561d41a4f4d21c7f5d069766fdc928 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 22 Oct 2023 00:55:20 +0100
Subject: [PATCH 118/157] test driver.pl: don't redirect to STDOUT of
 interactive GDB

---
 test_regress/driver.pl | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/test_regress/driver.pl b/test_regress/driver.pl
index 05b4c2ed9..3e53a89d3 100755
--- a/test_regress/driver.pl
+++ b/test_regress/driver.pl
@@ -1658,10 +1658,14 @@ sub _run {
             $SIG{ALRM} = 'DEFAULT';
             $SIG{CHLD} = 'DEFAULT';
             # Logging
-            open(STDOUT, ">&CHILDWR") or croak "%Error: Can't redirect stdout, stopped";
-            open(STDERR, ">&STDOUT") or croak "%Error: Can't dup stdout, stopped";
-            autoflush STDOUT 1;
-            autoflush STDERR 1;
+            if (!$opt_gdb) {
+                # Redirecting the stdout of GDB prevents output syntax colors
+                # and the use of the TUI, so only redirect when not --gdb
+                open(STDOUT, ">&CHILDWR") or croak "%Error: Can't redirect stdout, stopped";
+                open(STDERR, ">&STDOUT") or croak "%Error: Can't dup stdout, stopped";
+                autoflush STDOUT 1;
+                autoflush STDERR 1;
+            }
             system "$command";
             my $status = $?;
             if (($status & 127) == 4  # SIGILL

From 5bda9011461840bd9f70302a9c1aa6c8285b97e9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 21 Oct 2023 20:56:24 -0400
Subject: [PATCH 119/157] Internals: Fix stats report to include main AstCFile
 made

---
 src/Verilator.cpp | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 1a4c0bdc6..2d23c0d5d 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -588,12 +588,11 @@ static void process() {
             V3EmitC::emitcFiles();
         }
 
-        if (v3Global.opt.stats()) V3Stats::statsStage("emit");
-
-        // Statistics
-        reportStatsIfEnabled();
-
         if (!v3Global.opt.lintOnly() && !v3Global.opt.xmlOnly() && !v3Global.opt.dpiHdrOnly()) {
+            if (v3Global.opt.main()) V3EmitCMain::emit();
+
+            // V3EmitMk/V3EmitCMake must be after all other emitters,
+            // as they and below code visits AstCFiles added earlier
             size_t src_f_cnt = 0;
             for (AstNode* nodep = v3Global.rootp()->filesp(); nodep; nodep = nodep->nextp()) {
                 if (const AstCFile* cfilep = VN_CAST(nodep, CFile))
@@ -601,12 +600,13 @@ static void process() {
             }
             if (src_f_cnt >= V3EmitMk::PARALLEL_FILE_CNT_THRESHOLD)
                 v3Global.useParallelBuild(true);
-
-            // Makefile must be after all other emitters
-            if (v3Global.opt.main()) V3EmitCMain::emit();
             if (v3Global.opt.cmake()) V3EmitCMake::emit();
             if (v3Global.opt.gmake()) V3EmitMk::emitmk();
         }
+
+        // Final statistics
+        if (v3Global.opt.stats()) V3Stats::statsStage("emit");
+        reportStatsIfEnabled();
     }
 }
 

From bcbe5059a912dd09ccf0cb56860ee5a437246f2a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 22 Oct 2023 09:50:38 -0400
Subject: [PATCH 120/157] Internal: V3Graph style cleanup. No functional change

---
 src/V3Graph.h      | 5 +++--
 src/V3GraphAlg.cpp | 8 +++-----
 2 files changed, 6 insertions(+), 7 deletions(-)

diff --git a/src/V3Graph.h b/src/V3Graph.h
index c8a01acfa..cd816bd32 100644
--- a/src/V3Graph.h
+++ b/src/V3Graph.h
@@ -300,6 +300,7 @@ public:
 std::ostream& operator<<(std::ostream& os, V3GraphVertex* vertexp) VL_MT_DISABLED;
 
 //============================================================================
+// TODO should we have a smaller edge structure when we don't need weight etc?
 
 class V3GraphEdge VL_NOT_FINAL {
     VL_RTTI_IMPL_BASE(V3GraphEdge)
@@ -313,8 +314,8 @@ protected:
     friend class GraphAcyc;
     friend class GraphAcycEdge;
 
-    V3ListEnt<V3GraphEdge*> m_outs;  // Next Outbound edge for same vertex (linked list)
-    V3ListEnt<V3GraphEdge*> m_ins;  // Next Inbound edge for same vertex (linked list)
+    V3ListEnt<V3GraphEdge*> m_outs;  // Next outbound edge for same vertex (linked list)
+    V3ListEnt<V3GraphEdge*> m_ins;  // Next inbound edge for same vertex (linked list)
     //
     V3GraphVertex* m_fromp;  // Vertices pointing to this edge
     V3GraphVertex* m_top;  // Vertices this edge points to
diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp
index 99b65dbc5..7f00a7067 100644
--- a/src/V3GraphAlg.cpp
+++ b/src/V3GraphAlg.cpp
@@ -33,7 +33,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 
 //######################################################################
 //######################################################################
-// Algorithms - weakly connected components
+// Algorithms - Remove redundancies
 
 class GraphRemoveRedundant final : GraphAlg<> {
     const bool m_sumWeights;  ///< Sum, rather then maximize weights
@@ -176,7 +176,7 @@ void V3Graph::weaklyConnected(V3EdgeFuncP edgeFuncp) { GraphAlgWeakly{this, edge
 
 class GraphAlgStrongly final : GraphAlg<> {
 private:
-    uint32_t m_currentDfs;  // DFS count
+    uint32_t m_currentDfs = 0;  // DFS count
     std::vector<V3GraphVertex*> m_callTrace;  // List of everything we hit processing so far
 
     void main() {
@@ -253,7 +253,6 @@ private:
 public:
     GraphAlgStrongly(V3Graph* graphp, V3EdgeFuncP edgeFuncp)
         : GraphAlg<>{graphp, edgeFuncp} {
-        m_currentDfs = 0;
         main();
     }
     ~GraphAlgStrongly() = default;
@@ -323,7 +322,7 @@ void V3Graph::rank(V3EdgeFuncP edgeFuncp) { GraphAlgRank{this, edgeFuncp}; }
 class GraphAlgRLoops final : GraphAlg<> {
 private:
     std::vector<V3GraphVertex*> m_callTrace;  // List of everything we hit processing so far
-    bool m_done;  // Exit algorithm
+    bool m_done = false;  // Exit algorithm
 
     void main(V3GraphVertex* vertexp) {
         // Vertex::m_user begin: 1 indicates processing, 2 indicates completed
@@ -360,7 +359,6 @@ private:
 public:
     GraphAlgRLoops(V3Graph* graphp, V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp)
         : GraphAlg<>{graphp, edgeFuncp} {
-        m_done = false;
         main(vertexp);
     }
     ~GraphAlgRLoops() = default;

From b83b9974ee153320273cd03dc4ff60d8716b0f2a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 22 Oct 2023 09:51:02 -0400
Subject: [PATCH 121/157] Fix gcc -O0 incompatible allocator warning

---
 src/V3SymTable.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index 534aedd3e..f1ba43274 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -103,6 +103,7 @@ public:
     }
 #if defined(VL_DEBUG) && !defined(VL_LEAK_CHECKS)
     // For testing, leak so above destructor 1 assignments work
+    void* operator new(size_t size) { return std::malloc(size); }
     void operator delete(void* objp, size_t size) {}
 #endif
     void fallbackp(VSymEnt* entp) { m_fallbackp = entp; }

From 33c5b5feb846bc7f1379845177f0f3632717f9b3 Mon Sep 17 00:00:00 2001
From: Marlon James <marlon.james@gmail.com>
Date: Sun, 22 Oct 2023 17:41:40 -0700
Subject: [PATCH 122/157] Add sv_vpi_user.h from IEEE 1800-2017 Annex M (#4606)

---
 include/verilated_vpi.h      |   4 +-
 include/vltstd/sv_vpi_user.h | 570 +++++++++++++++++++++++++++++++++++
 2 files changed, 572 insertions(+), 2 deletions(-)
 create mode 100644 include/vltstd/sv_vpi_user.h

diff --git a/include/verilated_vpi.h b/include/verilated_vpi.h
index 0d9679eb7..b642d46a1 100644
--- a/include/verilated_vpi.h
+++ b/include/verilated_vpi.h
@@ -30,9 +30,9 @@
 #include "verilated_syms.h"
 
 //======================================================================
-// From IEEE 1800-2009 annex K
+// From IEEE 1800-2017 annex M
 
-#include "vltstd/vpi_user.h"
+#include "vltstd/sv_vpi_user.h"
 
 //======================================================================
 
diff --git a/include/vltstd/sv_vpi_user.h b/include/vltstd/sv_vpi_user.h
new file mode 100644
index 000000000..56aaa24f5
--- /dev/null
+++ b/include/vltstd/sv_vpi_user.h
@@ -0,0 +1,570 @@
+/***************************************************************************
+* sv_vpi_user.h
+*
+* SystemVerilog VPI extensions.
+*
+* This file contains the constant definitions, structure definitions, and
+* routine declarations used by the SystemVerilog Verification Procedural
+* Interface (VPI) access routines.
+*
+**************************************************************************/
+
+/***************************************************************************
+* NOTE:
+* The constant values 600 through 999 are reserved for use in this file.
+* - the range 600-749 is reserved for SV VPI model extensions
+* - the range 750-779 is reserved for the Coverage VPI
+* - the range 800-899 is reserved for future use
+* Overlaps in the numerical ranges are permitted for different categories
+* of identifiers; e.g.
+* - object types
+* - properties
+* - callbacks
+**************************************************************************/
+
+#ifndef SV_VPI_USER_H
+#define SV_VPI_USER_H
+
+#include "vpi_user.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/****************************** OBJECT TYPES ******************************/
+#define vpiPackage                  600
+#define vpiInterface                601
+#define vpiProgram                  602
+#define vpiInterfaceArray           603
+#define vpiProgramArray             604
+#define vpiTypespec                 605
+#define vpiModport                  606
+#define vpiInterfaceTfDecl          607
+#define vpiRefObj                   608
+#define vpiTypeParameter            609
+
+/* variables */
+#define vpiVarBit                   vpiRegBit
+#define vpiLongIntVar               610
+#define vpiShortIntVar              611
+#define vpiIntVar                   612
+#define vpiShortRealVar             613
+#define vpiByteVar                  614
+#define vpiClassVar                 615
+#define vpiStringVar                616
+#define vpiEnumVar                  617
+#define vpiStructVar                618
+#define vpiUnionVar                 619
+#define vpiBitVar                   620
+#define vpiLogicVar                 vpiReg
+#define vpiArrayVar                 vpiRegArray
+#define vpiClassObj                 621
+#define vpiChandleVar               622
+#define vpiPackedArrayVar           623
+#define vpiVirtualInterfaceVar      728
+
+/* typespecs */
+#define vpiLongIntTypespec          625
+#define vpiShortRealTypespec        626
+#define vpiByteTypespec             627
+#define vpiShortIntTypespec         628
+#define vpiIntTypespec              629
+#define vpiClassTypespec            630
+#define vpiStringTypespec           631
+#define vpiChandleTypespec          632
+#define vpiEnumTypespec             633
+#define vpiEnumConst                634
+#define vpiIntegerTypespec          635
+#define vpiTimeTypespec             636
+#define vpiRealTypespec             637
+#define vpiStructTypespec           638
+#define vpiUnionTypespec            639
+#define vpiBitTypespec              640
+#define vpiLogicTypespec            641
+#define vpiArrayTypespec            642
+#define vpiVoidTypespec             643
+#define vpiTypespecMember           644
+#define vpiPackedArrayTypespec      692
+#define vpiSequenceTypespec         696
+#define vpiPropertyTypespec         697
+#define vpiEventTypespec            698
+#define vpiInterfaceTypespec        906
+
+#define vpiClockingBlock            650
+#define vpiClockingIODecl           651
+#define vpiClassDefn                652
+#define vpiConstraint               653
+#define vpiConstraintOrdering       654
+
+#define vpiDistItem                 645
+#define vpiAliasStmt                646
+#define vpiThread                   647
+#define vpiMethodFuncCall           648
+#define vpiMethodTaskCall           649
+
+/* concurrent assertions */
+#define vpiAssert                   686
+#define vpiAssume                   687
+#define vpiCover                    688
+#define vpiRestrict                 901
+
+#define vpiDisableCondition         689
+#define vpiClockingEvent            690
+/* property decl, spec */
+#define vpiPropertyDecl             655
+#define vpiPropertySpec             656
+#define vpiPropertyExpr             657
+#define vpiMulticlockSequenceExpr   658
+#define vpiClockedSeq               659
+#define vpiClockedProp              902
+#define vpiPropertyInst             660
+#define vpiSequenceDecl             661
+#define vpiCaseProperty             662 /* property case */
+#define vpiCasePropertyItem         905 /* property case item */
+#define vpiSequenceInst             664
+#define vpiImmediateAssert          665
+#define vpiImmediateAssume          694
+#define vpiImmediateCover           695
+#define vpiReturn                   666
+/* pattern */
+#define vpiAnyPattern               667
+#define vpiTaggedPattern            668
+#define vpiStructPattern            669
+/* do .. while */
+#define vpiDoWhile                  670
+/* waits */
+#define vpiOrderedWait              671
+#define vpiWaitFork                 672
+/* disables */
+#define vpiDisableFork              673
+#define vpiExpectStmt               674
+#define vpiForeachStmt              675
+#define vpiReturnStmt               691
+#define vpiFinal                    676
+#define vpiExtends                  677
+#define vpiDistribution             678
+#define vpiSeqFormalDecl            679
+#define vpiPropFormalDecl           699
+#define vpiArrayNet                 vpiNetArray
+#define vpiEnumNet                  680
+#define vpiIntegerNet               681
+#define vpiLogicNet                 vpiNet
+#define vpiTimeNet                  682
+#define vpiStructNet                683
+#define vpiBreak                    684
+#define vpiContinue                 685
+#define vpiPackedArrayNet           693
+#define vpiConstraintExpr           747
+#define vpiElseConst                748
+#define vpiImplication              749
+#define vpiConstrIf                 738
+#define vpiConstrIfElse             739
+#define vpiConstrForEach            736
+#define vpiSoftDisable              733
+#define vpiLetDecl                  903
+#define vpiLetExpr                  904
+
+/******************************** METHODS *********************************/
+/************* methods used to traverse 1 to 1 relationships **************/
+#define vpiActual                   700
+
+#define vpiTypedefAlias             701
+
+#define vpiIndexTypespec            702
+#define vpiBaseTypespec             703
+#define vpiElemTypespec             704
+
+#define vpiInputSkew                706
+#define vpiOutputSkew               707
+#define vpiGlobalClocking           708
+#define vpiDefaultClocking          709
+#define vpiDefaultDisableIff        710
+
+#define vpiOrigin                   713
+#define vpiPrefix                   714
+#define vpiWith                     715
+
+#define vpiProperty                 718
+
+#define vpiValueRange               720
+#define vpiPattern                  721
+#define vpiWeight                   722
+#define vpiConstraintItem           746
+
+/************ methods used to traverse 1 to many relationships ************/
+#define vpiTypedef                  725
+#define vpiImport                   726
+#define vpiDerivedClasses           727
+#define vpiInterfaceDecl    vpiVirtualInterfaceVar /* interface decl deprecated */
+
+#define vpiMethods                  730
+#define vpiSolveBefore              731
+#define vpiSolveAfter               732
+
+#define vpiWaitingProcesses         734
+
+#define vpiMessages                 735
+#define vpiLoopVars                 737
+
+#define vpiConcurrentAssertions     740
+#define vpiMatchItem                741
+#define vpiMember                   742
+#define vpiElement                  743
+
+/************* methods used to traverse 1 to many relationships ***************/
+#define vpiAssertion                744
+
+/*********** methods used to traverse both 1-1 and 1-many relations ***********/
+#define vpiInstance                 745
+
+
+/**************************************************************************/
+/************************ generic object properties ***********************/
+/**************************************************************************/
+#define vpiTop                      600
+
+#define vpiUnit                     602
+
+#define vpiJoinType                 603
+#define vpiJoin                 0
+#define vpiJoinNone             1
+#define vpiJoinAny              2
+
+#define vpiAccessType               604
+#define vpiForkJoinAcc          1
+#define vpiExternAcc            2
+#define vpiDPIExportAcc         3
+#define vpiDPIImportAcc         4
+
+#define vpiArrayType                606
+#define vpiStaticArray          1
+#define vpiDynamicArray         2
+#define vpiAssocArray           3
+#define vpiQueueArray           4
+#define vpiArrayMember              607
+
+#define vpiIsRandomized             608
+#define vpiLocalVarDecls            609
+#define vpiOpStrong                 656 /* strength of temporal operator */
+#define vpiRandType                 610
+#define vpiNotRand              1
+#define vpiRand                 2
+#define vpiRandC                3
+#define vpiPortType                 611
+#define vpiInterfacePort        1
+#define vpiModportPort          2
+/* vpiPort is also a port type. It is defined in vpi_user.h */
+
+
+#define vpiConstantVariable         612
+#define vpiStructUnionMember        615
+
+#define vpiVisibility               620
+#define vpiPublicVis            1
+#define vpiProtectedVis         2
+#define vpiLocalVis             3
+
+/* Return values for vpiConstType property */
+#define vpiOneStepConst         9
+#define vpiUnboundedConst       10
+#define vpiNullConst            11
+
+#define vpiAlwaysType               624
+#define vpiAlwaysComb           2
+#define vpiAlwaysFF             3
+#define vpiAlwaysLatch          4
+
+#define vpiDistType                 625
+#define vpiEqualDist            1 /* constraint equal distribution */
+#define vpiDivDist              2 /* constraint divided distribution */
+
+#define vpiPacked                   630
+#define vpiTagged                   632
+#define vpiRef                  6 /* Return value for vpiDirection property */
+#define vpiVirtual                  635
+#define vpiHasActual                636
+#define vpiIsConstraintEnabled      638
+#define vpiSoft                     639
+
+
+#define vpiClassType                640
+#define vpiMailboxClass         1
+#define vpiSemaphoreClass       2
+#define vpiUserDefinedClass     3
+#define vpiProcessClass         4
+
+#define vpiMethod                   645
+#define vpiIsClockInferred          649
+#define vpiIsDeferred               657
+#define vpiIsFinal                  670
+#define vpiIsCoverSequence          659
+#define vpiQualifier                650
+#define vpiNoQualifier          0
+#define vpiUniqueQualifier      1
+#define vpiPriorityQualifier    2
+#define vpiTaggedQualifier      4
+#define vpiRandQualifier        8
+#define vpiInsideQualifier      16
+
+#define vpiInputEdge                651 /* returns vpiNoEdge, vpiPosedge,
+                                           vpiNegedge */
+#define vpiOutputEdge               652 /* returns vpiNoEdge, vpiPosedge,
+                                           vpiNegedge */
+#define vpiGeneric                  653
+
+/* Compatibility-mode property and values (object argument == NULL) */
+#define vpiCompatibilityMode        654
+#define vpiMode1364v1995        1
+#define vpiMode1364v2001        2
+#define vpiMode1364v2005        3
+#define vpiMode1800v2005        4
+#define vpiMode1800v2009        5
+
+#define vpiPackedArrayMember        655
+#define vpiStartLine                661
+#define vpiColumn                   662
+#define vpiEndLine                  663
+#define vpiEndColumn                664
+
+/* memory allocation scheme for transient objects */
+#define vpiAllocScheme              658
+#define vpiAutomaticScheme      1
+#define vpiDynamicScheme        2
+#define vpiOtherScheme          3
+
+#define vpiObjId                    660
+
+#define vpiDPIPure                  665
+#define vpiDPIContext               666
+#define vpiDPICStr                  667
+#define vpiDPI                  1
+#define vpiDPIC                 2
+#define vpiDPICIdentifier           668
+#define vpiIsModPort                669
+
+/******************************** Operators *******************************/
+#define vpiImplyOp                  50 /* -> implication operator */
+#define vpiNonOverlapImplyOp        51 /* |=> nonoverlapped implication */
+#define vpiOverlapImplyOp           52 /* |-> overlapped implication operator */
+#define vpiAcceptOnOp               83 /* accept_on operator */
+#define vpiRejectOnOp               84 /* reject_on operator */
+#define vpiSyncAcceptOnOp           85 /* sync_accept_on operator */
+#define vpiSyncRejectOnOp           86 /* sync_reject_on operator */
+#define vpiOverlapFollowedByOp      87 /* overlapped followed_by operator */
+#define vpiNonOverlapFollowedByOp   88 /* nonoverlapped followed_by operator */
+#define vpiNexttimeOp               89 /* nexttime operator */
+#define vpiAlwaysOp                 90 /* always operator */
+#define vpiEventuallyOp             91 /* eventually operator */
+#define vpiUntilOp                  92 /* until operator */
+#define vpiUntilWithOp              93 /* until_with operator */
+
+#define vpiUnaryCycleDelayOp        53 /* binary cycle delay (##) operator */
+#define vpiCycleDelayOp             54 /* binary cycle delay (##) operator */
+#define vpiIntersectOp              55 /* intersection operator */
+#define vpiFirstMatchOp             56 /* first_match operator */
+#define vpiThroughoutOp             57 /* throughout operator */
+#define vpiWithinOp                 58 /* within operator */
+#define vpiRepeatOp                 59 /* [=] nonconsecutive repetition */
+#define vpiConsecutiveRepeatOp      60 /* [*] consecutive repetition */
+#define vpiGotoRepeatOp             61 /* [->] goto repetition */
+
+#define vpiPostIncOp                62 /* ++ post-increment */
+#define vpiPreIncOp                 63 /* ++ pre-increment */
+#define vpiPostDecOp                64 /* -- post-decrement */
+#define vpiPreDecOp                 65 /* -- pre-decrement */
+
+#define vpiMatchOp                  66 /* match() operator */
+#define vpiCastOp                   67 /* type'() operator */
+#define vpiIffOp                    68 /* iff operator */
+#define vpiWildEqOp                 69 /* ==? operator */
+#define vpiWildNeqOp                70 /* !=? operator */
+
+#define vpiStreamLROp               71 /* left-to-right streaming {>>} operator */
+#define vpiStreamRLOp               72 /* right-to-left streaming {<<} operator */
+
+#define vpiMatchedOp                73 /* the .matched sequence operation */
+#define vpiTriggeredOp              74 /* the .triggered sequence operation */
+#define vpiAssignmentPatternOp      75 /* '{} assignment pattern */
+#define vpiMultiAssignmentPatternOp 76 /* '{n{}} multi assignment pattern */
+#define vpiIfOp                     77 /* if operator */
+#define vpiIfElseOp                 78 /* if-else operator */
+#define vpiCompAndOp                79 /* Composite and operator */
+#define vpiCompOrOp                 80 /* Composite or operator */
+#define vpiImpliesOp                94 /* implies operator */
+#define vpiInsideOp                 95 /* inside operator */
+#define vpiTypeOp                   81 /* type operator */
+#define vpiAssignmentOp             82 /* Normal assignment */
+
+/*********************** task/function properties ***********************/
+#define vpiOtherFunc                6 /* returns other types; for property vpiFuncType */
+
+/* vpiValid and vpiValidUnknown were deprecated in 1800-2009 */
+/*********************** value for vpiValid *****************************/
+#define vpiValidUnknown             2 /* Validity of variable is unknown */
+
+/************************** STRUCTURE DEFINITIONS *************************/
+
+/***************************** structure *****************************/
+
+/**************************** CALLBACK REASONS ****************************/
+#define cbStartOfThread             600 /* callback on thread creation */
+#define cbEndOfThread               601 /* callback on thread termination */
+#define cbEnterThread               602 /* callback on reentering thread */
+#define cbStartOfFrame              603 /* callback on frame creation */
+#define cbEndOfFrame                604 /* callback on frame exit */
+#define cbSizeChange                605 /* callback on array variable size change */
+#define cbCreateObj                 700 /* callback on class object creation */
+#define cbReclaimObj                701 /* callback on class object reclaimed by
+                                           automatic memory management */
+#define cbEndOfObject               702 /* callback on transient object deletion */
+
+/************************* FUNCTION DECLARATIONS **************************/
+
+
+/**************************************************************************/
+/*************************** Coverage VPI *********************************/
+/**************************************************************************/
+
+/* coverage control */
+#define vpiCoverageStart            750
+#define vpiCoverageStop             751
+#define vpiCoverageReset            752
+#define vpiCoverageCheck            753
+#define vpiCoverageMerge            754
+#define vpiCoverageSave             755
+
+/* coverage type properties */
+#define vpiAssertCoverage           760
+#define vpiFsmStateCoverage         761
+#define vpiStatementCoverage        762
+#define vpiToggleCoverage           763
+
+/* coverage status properties */
+#define vpiCovered                  765
+#define vpiCoverMax                 766 /* preserved for backward compatibility */
+#define vpiCoveredMax               766
+#define vpiCoveredCount             767
+
+/* assertion-specific coverage status properties */
+#define vpiAssertAttemptCovered     770
+#define vpiAssertSuccessCovered     771
+#define vpiAssertFailureCovered     772
+#define vpiAssertVacuousSuccessCovered 773
+#define vpiAssertDisableCovered     774
+#define vpiAssertKillCovered        777
+
+/* FSM-specific coverage status properties */
+#define vpiFsmStates                775
+#define vpiFsmStateExpression       776
+
+/* FSM handle types */
+#define vpiFsm                      758
+#define vpiFsmHandle                759
+
+
+/***************************************************************************/
+/***************************** Assertion VPI *******************************/
+/***************************************************************************/
+
+/* assertion callback types */
+#define cbAssertionStart                        606
+#define cbAssertionSuccess                      607
+#define cbAssertionFailure                      608
+#define cbAssertionVacuousSuccess               657
+#define cbAssertionDisabledEvaluation           658
+#define cbAssertionStepSuccess                  609
+#define cbAssertionStepFailure                  610
+#define cbAssertionLock                         661
+#define cbAssertionUnlock                       662
+#define cbAssertionDisable                      611
+#define cbAssertionEnable                       612
+#define cbAssertionReset                        613
+#define cbAssertionKill                         614
+#define cbAssertionEnablePassAction             645
+#define cbAssertionEnableFailAction             646
+#define cbAssertionDisablePassAction            647
+#define cbAssertionDisableFailAction            648
+#define cbAssertionEnableNonvacuousAction       649
+#define cbAssertionDisableVacuousAction         650
+
+/* assertion "system" callback types */
+#define cbAssertionSysInitialized               615
+#define cbAssertionSysOn                        616
+#define cbAssertionSysOff                       617
+#define cbAssertionSysKill                      631
+#define cbAssertionSysLock                      659
+#define cbAssertionSysUnlock                    660
+#define cbAssertionSysEnd                       618
+#define cbAssertionSysReset                     619
+#define cbAssertionSysEnablePassAction          651
+#define cbAssertionSysEnableFailAction          652
+#define cbAssertionSysDisablePassAction         653
+#define cbAssertionSysDisableFailAction         654
+#define cbAssertionSysEnableNonvacuousAction    655
+#define cbAssertionSysDisableVacuousAction      656
+
+/* assertion control constants */
+#define vpiAssertionLock                        645
+#define vpiAssertionUnlock                      646
+#define vpiAssertionDisable                     620
+#define vpiAssertionEnable                      621
+#define vpiAssertionReset                       622
+#define vpiAssertionKill                        623
+#define vpiAssertionEnableStep                  624
+#define vpiAssertionDisableStep                 625
+#define vpiAssertionClockSteps                  626
+#define vpiAssertionSysLock                     647
+#define vpiAssertionSysUnlock                   648
+#define vpiAssertionSysOn                       627
+#define vpiAssertionSysOff                      628
+#define vpiAssertionSysKill                     632
+#define vpiAssertionSysEnd                      629
+#define vpiAssertionSysReset                    630
+#define vpiAssertionDisablePassAction           633
+#define vpiAssertionEnablePassAction            634
+#define vpiAssertionDisableFailAction           635
+#define vpiAssertionEnableFailAction            636
+#define vpiAssertionDisableVacuousAction        637
+#define vpiAssertionEnableNonvacuousAction      638
+#define vpiAssertionSysEnablePassAction         639
+#define vpiAssertionSysEnableFailAction         640
+#define vpiAssertionSysDisablePassAction        641
+#define vpiAssertionSysDisableFailAction        642
+#define vpiAssertionSysEnableNonvacuousAction   643
+#define vpiAssertionSysDisableVacuousAction     644
+
+typedef struct t_vpi_assertion_step_info {
+    PLI_INT32 matched_expression_count;
+    vpiHandle *matched_exprs;       /* array of expressions */
+    PLI_INT32 stateFrom, stateTo;   /* identify transition */
+} s_vpi_assertion_step_info, *p_vpi_assertion_step_info;
+
+typedef struct t_vpi_attempt_info {
+    union {
+        vpiHandle failExpr;
+        p_vpi_assertion_step_info step;
+    } detail;
+    s_vpi_time attemptStartTime;    /* Time attempt triggered */
+} s_vpi_attempt_info, *p_vpi_attempt_info;
+
+/* typedef for vpi_register_assertion_cb callback function */
+typedef PLI_INT32(vpi_assertion_callback_func)(
+    PLI_INT32 reason,               /* callback reason */
+    p_vpi_time cb_time,             /* callback time */
+    vpiHandle assertion,            /* handle to assertion */
+    p_vpi_attempt_info info,        /* attempt related information */
+    PLI_BYTE8 *user_data            /* user data entered upon registration */
+);
+
+vpiHandle vpi_register_assertion_cb(
+    vpiHandle assertion,            /* handle to assertion */
+    PLI_INT32 reason,               /* reason for which callbacks needed */
+    vpi_assertion_callback_func *cb_rtn,
+    PLI_BYTE8 *user_data            /* user data to be supplied to cb */
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

From 774c10396cf3c539cb439bce6edef45ced608924 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Mon, 23 Oct 2023 14:33:22 +0200
Subject: [PATCH 123/157] Fix try_put method of unbounded mailbox (#4608)

---
 include/verilated_std.sv              |  2 +-
 test_regress/t/t_mailbox_unbounded.pl | 23 ++++++++++++++++++++
 test_regress/t/t_mailbox_unbounded.v  | 30 +++++++++++++++++++++++++++
 3 files changed, 54 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_mailbox_unbounded.pl
 create mode 100644 test_regress/t/t_mailbox_unbounded.v

diff --git a/include/verilated_std.sv b/include/verilated_std.sv
index bb7fe1be8..88561db13 100644
--- a/include/verilated_std.sv
+++ b/include/verilated_std.sv
@@ -47,7 +47,7 @@ package std;
       endtask
 
       function int try_put(T message);
-         if (num() < m_bound) begin
+         if (m_bound == 0 || num() < m_bound) begin
             m_queue.push_back(message);
             return 1;
          end
diff --git a/test_regress/t/t_mailbox_unbounded.pl b/test_regress/t/t_mailbox_unbounded.pl
new file mode 100755
index 000000000..30306c8ce
--- /dev/null
+++ b/test_regress/t/t_mailbox_unbounded.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2020 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing -Wall"],
+    make_main => 0,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_mailbox_unbounded.v b/test_regress/t/t_mailbox_unbounded.v
new file mode 100644
index 000000000..94c9d03cc
--- /dev/null
+++ b/test_regress/t/t_mailbox_unbounded.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+// verilator lint_off DECLFILENAME
+
+module t(/*AUTOARG*/);
+   mailbox #(int) m;
+   int     msg = 0;
+   int     out = 0;
+
+   initial begin
+      m = new;
+      fork
+         begin
+            #10;  // So later then get() starts below
+            msg = 1;
+            if (m.try_put(msg) != 1) $stop;
+         end
+         begin
+            m.get(out);
+            if (out != 1) $stop;
+         end
+      join
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 165a2ef1b80342da9d65f2edf3931c20e8f9ca42 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 23 Oct 2023 11:36:24 +0100
Subject: [PATCH 124/157] Separate tracing of const values from non-const
 values

Some values emitted to the trace files are constant (e.g.: actual
parameter values), and never change. Previously we used to trace these
in the 'full' dumps, which also included all other truly variable
signals. This patch introduces a new generated trace function 'const',
to complement the 'full' and 'chg' flavour, and 'const' now only
contains the constant signals, while 'full' and 'chg' contain only the
truly variable signals. The generate 'full' and 'chg' trace functions
now have exactly the same shape. Note that 'const' signals are still
traced using the 'full*' dump methods of the trace buffers, so there is
no need for a third flavour of those.
---
 include/verilated_fst_c.cpp   |   1 +
 include/verilated_trace.h     |   6 +
 include/verilated_trace_imp.h |  17 +++
 include/verilated_vcd_c.cpp   |   1 +
 src/V3Ast.h                   |  42 ++++++-
 src/V3AstNodeOther.h          |   8 +-
 src/V3EmitCImp.cpp            |   8 +-
 src/V3Trace.cpp               | 231 +++++++++++++++++-----------------
 8 files changed, 188 insertions(+), 126 deletions(-)

diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp
index ed93bdf64..670b78b6b 100644
--- a/include/verilated_fst_c.cpp
+++ b/include/verilated_fst_c.cpp
@@ -104,6 +104,7 @@ void VerilatedFst::open(const char* filename) VL_MT_SAFE_EXCLUDES(m_mutex) {
     fstWriterSetPackType(m_fst, FST_WR_PT_LZ4);
     fstWriterSetTimescaleFromString(m_fst, timeResStr().c_str());  // lintok-begin-on-ref
     if (m_useFstWriterThread) fstWriterSetParallelMode(m_fst, 1);
+    constDump(true);  // First dump must contain the const signals
     fullDump(true);  // First dump must be full for fst
 
     m_curScope.clear();
diff --git a/include/verilated_trace.h b/include/verilated_trace.h
index 7e8694b70..6b053e776 100644
--- a/include/verilated_trace.h
+++ b/include/verilated_trace.h
@@ -212,11 +212,14 @@ protected:
 private:
     std::vector<bool> m_sigs_enabledVec;  // Staging for m_sigs_enabledp
     std::vector<CallbackRecord> m_initCbs;  // Routines to initialize tracing
+    std::vector<CallbackRecord> m_constCbs;  // Routines to perform const dump
+    std::vector<CallbackRecord> m_constOffloadCbs;  // Routines to perform offloaded const dump
     std::vector<CallbackRecord> m_fullCbs;  // Routines to perform full dump
     std::vector<CallbackRecord> m_fullOffloadCbs;  // Routines to perform offloaded full dump
     std::vector<CallbackRecord> m_chgCbs;  // Routines to perform incremental dump
     std::vector<CallbackRecord> m_chgOffloadCbs;  // Routines to perform offloaded incremental dump
     std::vector<CallbackRecord> m_cleanupCbs;  // Routines to call at the end of dump
+    bool m_constDump = true;  // Whether a const dump is required on the next call to 'dump'
     bool m_fullDump = true;  // Whether a full dump is required on the next call to 'dump'
     uint32_t m_nextCode = 0;  // Next code number to assign
     uint32_t m_numSignals = 0;  // Number of distinct signals
@@ -289,6 +292,7 @@ protected:
     uint32_t nextCode() const { return m_nextCode; }
     uint32_t numSignals() const { return m_numSignals; }
     uint32_t maxBits() const { return m_maxBits; }
+    void constDump(bool value) { m_constDump = value; }
     void fullDump(bool value) { m_fullDump = value; }
 
     double timeRes() const { return m_timeRes; }
@@ -359,6 +363,8 @@ public:
 
     void addModel(VerilatedModel*) VL_MT_SAFE_EXCLUDES(m_mutex);
     void addInitCb(initCb_t cb, void* userp) VL_MT_SAFE;
+    void addConstCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
+    void addConstCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE;
     void addFullCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
     void addFullCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE;
     void addChgCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index 9f5792127..2d473e905 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -610,6 +610,15 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::dump(uint64_t timeui) VL_MT_SAFE_EXCLUD
         }
     }
 
+    if (VL_UNLIKELY(m_constDump)) {
+        m_constDump = false;
+        if (offload()) {
+            runOffloadedCallbacks(m_constOffloadCbs);
+        } else {
+            runCallbacks(m_constCbs);
+        }
+    }
+
     for (uint32_t i = 0; i < m_cleanupCbs.size(); ++i) {
         const CallbackRecord& cbr = m_cleanupCbs[i];
         cbr.m_cleanupCb(cbr.m_userp, self());
@@ -695,6 +704,14 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addInitCb(initCb_t cb, void* userp) VL_
     addCallbackRecord(m_initCbs, CallbackRecord{cb, userp});
 }
 template <>
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpCb_t cb, void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_constCbs, CallbackRecord{cb, userp});
+}
+template <>
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_constOffloadCbs, CallbackRecord{cb, userp});
+}
+template <>
 void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addFullCb(dumpCb_t cb, void* userp) VL_MT_SAFE {
     addCallbackRecord(m_fullCbs, CallbackRecord{cb, userp});
 }
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index b05967c1b..fc0b438cb 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -164,6 +164,7 @@ void VerilatedVcd::openNextImp(bool incFilename) {
         }
     }
     m_isOpen = true;
+    constDump(true);  // First dump must containt the const signals
     fullDump(true);  // First dump must be full
     m_wroteBytes = 0;
 }
diff --git a/src/V3Ast.h b/src/V3Ast.h
index a17cc84e0..1a41b770e 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1247,6 +1247,38 @@ inline std::ostream& operator<<(std::ostream& os, const VUseType& rhs) {
     return os << rhs.ascii();
 }
 
+//######################################################################
+
+class VTraceType final {
+public:
+    enum en : uint8_t {
+        CONSTANT,  // Constant value dump (once at the beginning)
+        FULL,  // Full value dump (always emitted)
+        CHANGE  // Incremental value dump (emitted only if the value changed)
+    };
+    enum en m_e;
+    VTraceType()
+        : m_e{CONSTANT} {}
+    // cppcheck-suppress noExplicitConstructor
+    constexpr VTraceType(en _e)
+        : m_e{_e} {}
+    explicit VTraceType(int _e)
+        : m_e(static_cast<en>(_e)) {}  // Need () or GCC 4.8 false warning
+    constexpr operator en() const { return m_e; }
+    const char* ascii() const {
+        static const char* const names[] = {"CONSTANT", "FULL", "CHANGE"};
+        return names[m_e];
+    }
+};
+constexpr bool operator==(const VTraceType& lhs, const VTraceType& rhs) {
+    return lhs.m_e == rhs.m_e;
+}
+constexpr bool operator==(const VTraceType& lhs, VTraceType::en rhs) { return lhs.m_e == rhs; }
+constexpr bool operator==(VTraceType::en lhs, const VTraceType& rhs) { return lhs == rhs.m_e; }
+inline std::ostream& operator<<(std::ostream& os, const VTraceType& rhs) {
+    return os << rhs.ascii();
+}
+
 // ######################################################################
 
 class VCastable final {
@@ -2656,10 +2688,16 @@ public:
     template <typename U>
     // cppcheck-suppress noExplicitConstructor
     VNRef(U&& x)
-        : std::reference_wrapper<T_Node>{x} {}
+        : std::reference_wrapper<T_Node> {
+        x
+    }
+    {}
     // cppcheck-suppress noExplicitConstructor
     VNRef(const std::reference_wrapper<T_Node>& other)
-        : std::reference_wrapper<T_Node>{other} {}
+        : std::reference_wrapper<T_Node> {
+        other
+    }
+    {}
 };
 
 static_assert(sizeof(VNRef<AstNode>) == sizeof(std::reference_wrapper<AstNode>),
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 61c66ba79..25508a230 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -3243,14 +3243,14 @@ class AstTraceInc final : public AstNodeStmt {
 private:
     AstTraceDecl* m_declp;  // Pointer to declaration
     const uint32_t m_baseCode;  // Trace code base value in function containing this AstTraceInc
-    const bool m_full;  // Is this a full vs incremental dump
+    const VTraceType m_traceType;  // Is this a const/full/incremental dump
 
 public:
-    AstTraceInc(FileLine* fl, AstTraceDecl* declp, bool full, uint32_t baseCode = 0)
+    AstTraceInc(FileLine* fl, AstTraceDecl* declp, VTraceType traceType, uint32_t baseCode = 0)
         : ASTGEN_SUPER_TraceInc(fl)
         , m_declp{declp}
         , m_baseCode{baseCode}
-        , m_full{full} {
+        , m_traceType{traceType} {
         dtypeFrom(declp);
         this->valuep(
             declp->valuep()->cloneTree(true));  // TODO: maybe use reference to TraceDecl instead?
@@ -3274,7 +3274,7 @@ public:
     bool isOutputter() override { return true; }
     // but isPure()  true
     AstTraceDecl* declp() const { return m_declp; }
-    bool full() const { return m_full; }
+    VTraceType traceType() const { return m_traceType; }
     uint32_t baseCode() const { return m_baseCode; }
 };
 class AstTracePopNamePrefix final : public AstNodeStmt {
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index 7ec3acee9..6d2a6bca5 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -769,7 +769,8 @@ class EmitCTrace final : EmitCFunc {
 
     void emitTraceChangeOne(AstTraceInc* nodep, int arrayindex) {
         iterateAndNextConstNull(nodep->precondsp());
-        const string func = nodep->full() ? "full" : "chg";
+        // Note: Both VTraceType::CHANGE and VTraceType::FULL use the 'full' methods
+        const std::string func = nodep->traceType() == VTraceType::CHANGE ? "chg" : "full";
         bool emitWidth = true;
         if (nodep->dtypep()->basicp()->isDouble()) {
             puts("bufp->" + func + "Double");
@@ -794,7 +795,10 @@ class EmitCTrace final : EmitCFunc {
 
         const uint32_t offset = (arrayindex < 0) ? 0 : (arrayindex * nodep->declp()->widthWords());
         const uint32_t code = nodep->declp()->code() + offset;
-        puts(v3Global.opt.useTraceOffload() && !nodep->full() ? "(base+" : "(oldp+");
+        // Note: Both VTraceType::CHANGE and VTraceType::FULL use the 'full' methods
+        puts(v3Global.opt.useTraceOffload() && nodep->traceType() == VTraceType::CHANGE
+                 ? "(base+"
+                 : "(oldp+");
         puts(cvtToStr(code - nodep->baseCode()));
         puts(",");
         emitTraceValue(nodep, arrayindex);
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index 653ba6548..58cbad724 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -30,7 +30,7 @@
 //  Finally:
 //      Process graph to determine when traced variables can change, allocate
 //      activity flags, insert nodes to set activity flags, allocate signal
-//      numbers (codes), and construct the full and incremental trace
+//      numbers (codes), and construct the const, full and incremental trace
 //      functions, together with all other trace support functions.
 //
 //*************************************************************************
@@ -319,11 +319,10 @@ private:
         return activityNumber;
     }
 
-    void sortTraces(TraceVec& traces, uint32_t& nFullCodes, uint32_t& nChgCodes) {
+    void sortTraces(TraceVec& traces, uint32_t& nNonConstCodes) {
         // Populate sort structure
         traces.clear();
-        nFullCodes = 0;
-        nChgCodes = 0;
+        nNonConstCodes = 0;
         for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp = itp->verticesNextp()) {
             if (TraceTraceVertex* const vtxp = itp->cast<TraceTraceVertex>()) {
                 ActCodeSet actSet;
@@ -347,11 +346,8 @@ private:
                                 || actSet.size() == 1,
                             vtxp->nodep(), "Always active trace has further triggers");
                 // Count nodes
-                if (!vtxp->duplicatep()) {
-                    const uint32_t inc = vtxp->nodep()->codeInc();
-                    nFullCodes += inc;
-                    if (!actSet.empty()) nChgCodes += inc;
-                }
+                if (!vtxp->duplicatep() && !actSet.empty())
+                    nNonConstCodes += vtxp->nodep()->codeInc();
                 if (actSet.empty()) {
                     // If a trace doesn't have activity, it's constant, and we
                     // don't need to track changes on it.
@@ -374,8 +370,7 @@ private:
         // Sort the traces by activity sets
         TraceVec traces;
         uint32_t unused1;
-        uint32_t unused2;
-        sortTraces(traces, unused1, unused2);
+        sortTraces(traces, unused1);
 
         // For each activity set with only a small number of signals, make those
         // signals always traced, as it's cheaper to check a few value changes
@@ -482,54 +477,62 @@ private:
         }
     }
 
-    AstCFunc* newCFunc(bool full, AstCFunc* topFuncp, int& funcNump, uint32_t baseCode = 0) {
+    AstCFunc* newCFunc(VTraceType traceType, AstCFunc* topFuncp, unsigned funcNum,
+                       uint32_t baseCode = 0) {
         // Create new function
         const bool isTopFunc = topFuncp == nullptr;
-        const string baseName = full && isTopFunc ? "trace_full_top_"
-                                : full            ? "trace_full_sub_"
-                                : isTopFunc       ? "trace_chg_top_"
-                                                  : "trace_chg_sub_";
+        std::string baseName = "trace_";
+        if (traceType == VTraceType::CONSTANT) {
+            baseName += "const_";
+        } else if (traceType == VTraceType::FULL) {
+            baseName += "full_";
+        } else {
+            baseName += "chg_";
+        }
+        baseName += isTopFunc ? "top_" : "sub_";
 
         FileLine* const flp = m_topScopep->fileline();
-        AstCFunc* const funcp = new AstCFunc{flp, baseName + cvtToStr(funcNump++), m_topScopep};
+        AstCFunc* const funcp = new AstCFunc{flp, baseName + cvtToStr(funcNum), m_topScopep};
         funcp->isTrace(true);
         funcp->dontCombine(true);
         funcp->isLoose(true);
-        funcp->slow(full);
+        funcp->slow(traceType != VTraceType::CHANGE);
         funcp->isStatic(isTopFunc);
         // Add it to top scope
         m_topScopep->addBlocksp(funcp);
         const auto addInitStr = [funcp, flp](const string& str) -> void {
             funcp->addInitsp(new AstCStmt{flp, str});
         };
+        const std::string bufArg
+            = v3Global.opt.traceClassBase()
+              + "::" + (v3Global.opt.useTraceOffload() ? "OffloadBuffer" : "Buffer") + "* bufp";
         if (isTopFunc) {
             // Top functions
-            funcp->argTypes("void* voidSelf, " + v3Global.opt.traceClassBase()
-                            + "::" + (v3Global.opt.useTraceOffload() ? "OffloadBuffer" : "Buffer")
-                            + "* bufp");
+            funcp->argTypes("void* voidSelf, " + bufArg);
             addInitStr(EmitCBase::voidSelfAssign(m_topModp));
             addInitStr(EmitCBase::symClassAssign());
             // Add global activity check to change dump functions
-            if (!full) {  //
+            if (traceType == VTraceType::CHANGE) {  //
                 addInitStr("if (VL_UNLIKELY(!vlSymsp->__Vm_activity)) return;\n");
             }
             // Register function
-            if (full) {
-                m_regFuncp->addStmtsp(new AstText{flp, "tracep->addFullCb(", true});
+            std::string str;
+            if (traceType == VTraceType::CONSTANT) {
+                str = "tracep->addConstCb(";
+            } else if (traceType == VTraceType::FULL) {
+                str = "tracep->addFullCb(";
             } else {
-                m_regFuncp->addStmtsp(new AstText{flp, "tracep->addChgCb(", true});
+                str = "tracep->addChgCb(";
             }
+            m_regFuncp->addStmtsp(new AstText{flp, str, true});
             m_regFuncp->addStmtsp(new AstAddrOfCFunc{flp, funcp});
-            m_regFuncp->addStmtsp(new AstText{flp, ", vlSelf", true});
-            m_regFuncp->addStmtsp(new AstText{flp, ");\n", true});
+            m_regFuncp->addStmtsp(new AstText{flp, ", vlSelf);\n", true});
         } else {
             // Sub functions
-            funcp->argTypes(v3Global.opt.traceClassBase()
-                            + "::" + +(v3Global.opt.useTraceOffload() ? "OffloadBuffer" : "Buffer")
-                            + "* bufp");
+            funcp->argTypes(bufArg);
             // Setup base references. Note in rare occasions we can end up with an empty trace
             // sub function, hence the VL_ATTR_UNUSED attributes.
-            if (full) {
+            if (traceType != VTraceType::CHANGE) {
                 // Full dump sub function
                 addInitStr("uint32_t* const oldp VL_ATTR_UNUSED = "
                            "bufp->oldp(vlSymsp->__Vm_baseCode);\n");
@@ -557,104 +560,96 @@ private:
         return funcp;
     }
 
-    void createFullTraceFunction(const TraceVec& traces, uint32_t nAllCodes,
-                                 uint32_t parallelism) {
+    void createConstTraceFunctions(const TraceVec& traces) {
         const int splitLimit = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace()
                                                                 : std::numeric_limits<int>::max();
 
-        int topFuncNum = 0;
-        int subFuncNum = 0;
-        auto it = traces.cbegin();
-        while (it != traces.cend()) {
-            AstCFunc* topFuncp = nullptr;
-            AstCFunc* subFuncp = nullptr;
-            int subStmts = 0;
-            const uint32_t maxCodes = (nAllCodes + parallelism - 1) / parallelism;
-            uint32_t nCodes = 0;
-            for (; nCodes < maxCodes && it != traces.end(); ++it) {
-                const TraceTraceVertex* const vtxp = it->second;
-                AstTraceDecl* const declp = vtxp->nodep();
-                if (const TraceTraceVertex* const canonVtxp = vtxp->duplicatep()) {
-                    // This is a duplicate trace node. We will assign the signal
-                    // number to the canonical node, and emit this as an alias, so
-                    // no need to create a TraceInc node.
-                    const AstTraceDecl* const canonDeclp = canonVtxp->nodep();
-                    UASSERT_OBJ(!canonVtxp->duplicatep(), canonDeclp,
-                                "Canonical node is a duplicate");
-                    UASSERT_OBJ(canonDeclp->code() != 0, canonDeclp,
-                                "Canonical node should have code assigned already");
-                    declp->code(canonDeclp->code());
-                } else {
-                    // This is a canonical trace node. Assign signal number and
-                    // add a TraceInc node to the full dump function.
-                    UASSERT_OBJ(declp->code() == 0, declp,
-                                "Canonical node should not have code assigned yet");
-                    declp->code(m_code);
-                    m_code += declp->codeInc();
-                    m_statUniqCodes += declp->codeInc();
-                    ++m_statUniqSigs;
-
-                    // Create top function if not yet created
-                    if (!topFuncp) { topFuncp = newCFunc(/* full: */ true, nullptr, topFuncNum); }
-
-                    // Crate new sub function if required
-                    if (!subFuncp || subStmts > splitLimit) {
-                        subStmts = 0;
-                        subFuncp = newCFunc(/* full: */ true, topFuncp, subFuncNum);
-                    }
-
-                    // Add TraceInc node
-                    AstTraceInc* const incp
-                        = new AstTraceInc{declp->fileline(), declp, /* full: */ true};
-                    subFuncp->addStmtsp(incp);
-                    subStmts += incp->nodeCount();
-
-                    // Track partitioning
-                    nCodes += declp->codeInc();
-                }
+        AstCFunc* const topFuncp = newCFunc(VTraceType::CONSTANT, nullptr, 0);
+        unsigned subFuncNum = 0;
+        AstCFunc* subFuncp = nullptr;
+        int subStmts = 0;
+        for (auto it = traces.cbegin(); it != traces.end(); ++it) {
+            const TraceTraceVertex* const vtxp = it->second;
+            AstTraceDecl* const declp = vtxp->nodep();
+            if (const TraceTraceVertex* const canonVtxp = vtxp->duplicatep()) {
+                // This is a duplicate trace node. We will assign the signal
+                // number to the canonical node, and emit this as an alias, so
+                // no need to create a TraceInc node.
+                const AstTraceDecl* const canonDeclp = canonVtxp->nodep();
+                UASSERT_OBJ(!canonVtxp->duplicatep(), canonDeclp, "Canonical node is a duplicate");
+                UASSERT_OBJ(canonDeclp->code() != 0, canonDeclp,
+                            "Canonical node should have code assigned already");
+                declp->code(canonDeclp->code());
+                continue;
             }
-            if (topFuncp) {  // might be nullptr if all trailing entries were duplicates
-                UINFO(5, "trace_full_top" << topFuncNum - 1 << " codes: " << nCodes << "/"
-                                          << maxCodes << endl);
+
+            // This is a canonical trace node. Assign trace code (signal number).
+            UASSERT_OBJ(declp->code() == 0, declp,
+                        "Canonical node should not have code assigned yet");
+            declp->code(m_code);
+            m_code += declp->codeInc();
+            m_statUniqCodes += declp->codeInc();
+            ++m_statUniqSigs;
+
+            // If this is a const signal, add the AstTraceInc
+            const ActCodeSet& actSet = it->first;
+            if (actSet.count(TraceActivityVertex::ACTIVITY_NEVER)) {
+                // Crate new sub function if required
+                if (!subFuncp || subStmts > splitLimit) {
+                    subStmts = 0;
+                    subFuncp = newCFunc(VTraceType::CONSTANT, topFuncp, subFuncNum);
+                    ++subFuncNum;
+                }
+                FileLine* const flp = declp->fileline();
+                AstTraceInc* const incp = new AstTraceInc{flp, declp, VTraceType::CONSTANT};
+                subFuncp->addStmtsp(incp);
+                subStmts += incp->nodeCount();
             }
         }
     }
 
-    void createChgTraceFunctions(const TraceVec& traces, uint32_t nAllCodes,
-                                 uint32_t parallelism) {
+    void createNonConstTraceFunctions(const TraceVec& traces, uint32_t nAllCodes,
+                                      uint32_t parallelism) {
         const int splitLimit = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace()
                                                                 : std::numeric_limits<int>::max();
-        int topFuncNum = 0;
-        int subFuncNum = 0;
+        unsigned topFuncNum = 0;
+        unsigned subFuncNum = 0;
         TraceVec::const_iterator it = traces.begin();
         while (it != traces.end()) {
-            AstCFunc* topFuncp = nullptr;
-            AstCFunc* subFuncp = nullptr;
+            AstCFunc* topFulFuncp = nullptr;
+            AstCFunc* topChgFuncp = nullptr;
+            AstCFunc* subFulFuncp = nullptr;
+            AstCFunc* subChgFuncp = nullptr;
             int subStmts = 0;
-            uint32_t maxCodes = (nAllCodes + parallelism - 1) / parallelism;
-            if (maxCodes < 1) maxCodes = 1;
+            const uint32_t maxCodes = std::max((nAllCodes + parallelism - 1) / parallelism, 1U);
             uint32_t nCodes = 0;
             const ActCodeSet* prevActSet = nullptr;
             AstIf* ifp = nullptr;
             uint32_t baseCode = 0;
             for (; nCodes < maxCodes && it != traces.end(); ++it) {
                 const TraceTraceVertex* const vtxp = it->second;
-                // This is a duplicate decl, no need to add it to incremental dump
+                // This is a duplicate decl, no need to add it
                 if (vtxp->duplicatep()) continue;
                 const ActCodeSet& actSet = it->first;
-                // Traced value never changes, no need to add it to incremental dump
+                // Traced value never changes, no need to add it
                 if (actSet.count(TraceActivityVertex::ACTIVITY_NEVER)) continue;
 
                 AstTraceDecl* const declp = vtxp->nodep();
 
                 // Create top function if not yet created
-                if (!topFuncp) { topFuncp = newCFunc(/* full: */ false, nullptr, topFuncNum); }
+                if (!topFulFuncp) {
+                    topFulFuncp = newCFunc(VTraceType::FULL, nullptr, topFuncNum);
+                    topChgFuncp = newCFunc(VTraceType::CHANGE, nullptr, topFuncNum);
+                    ++topFuncNum;
+                }
 
                 // Create new sub function if required
-                if (!subFuncp || subStmts > splitLimit) {
+                if (!subFulFuncp || subStmts > splitLimit) {
                     baseCode = declp->code();
                     subStmts = 0;
-                    subFuncp = newCFunc(/* full: */ false, topFuncp, subFuncNum, baseCode);
+                    subFulFuncp = newCFunc(VTraceType::FULL, topFulFuncp, subFuncNum, baseCode);
+                    subChgFuncp = newCFunc(VTraceType::CHANGE, topChgFuncp, subFuncNum, baseCode);
+                    ++subFuncNum;
                     prevActSet = nullptr;
                     ifp = nullptr;
                 }
@@ -674,24 +669,27 @@ private:
                     }
                     ifp = new AstIf{flp, condp};
                     if (!always) ifp->branchPred(VBranchPred::BP_UNLIKELY);
-                    subFuncp->addStmtsp(ifp);
+                    subChgFuncp->addStmtsp(ifp);
                     subStmts += ifp->nodeCount();
                     prevActSet = &actSet;
                 }
 
-                // Add TraceInc node
-                AstTraceInc* const incp
-                    = new AstTraceInc{declp->fileline(), declp, /* full: */ false, baseCode};
-                ifp->addThensp(incp);
-                subStmts += incp->nodeCount();
+                // Add TraceInc nodes
+                FileLine* const flp = declp->fileline();
+                AstTraceInc* const incFulp = new AstTraceInc{flp, declp, VTraceType::FULL};
+                subFulFuncp->addStmtsp(incFulp);
+                AstTraceInc* const incChgp
+                    = new AstTraceInc{flp, declp, VTraceType::CHANGE, baseCode};
+                ifp->addThensp(incChgp);
+
+                // Track splitting due to size
+                UASSERT_OBJ(incFulp->nodeCount() == incChgp->nodeCount(), declp,
+                            "Should have equal cost");
+                subStmts += incChgp->nodeCount();
 
                 // Track partitioning
                 nCodes += declp->codeInc();
             }
-            if (topFuncp) {  // might be nullptr if all trailing entries were duplicates/constants
-                UINFO(5, "trace_chg_top" << topFuncNum - 1 << " codes: " << nCodes << "/"
-                                         << maxCodes << endl);
-            }
         }
     }
 
@@ -743,11 +741,8 @@ private:
         TraceVec traces;  // The sorted traces
         // We will split functions such that each have to dump roughly the same amount of data
         // for this we need to keep tack of the number of codes used by the trace functions.
-        uint32_t nFullCodes = 0;  // Number of non-duplicate codes (need to go into full* dump)
-        uint32_t nChgCodes = 0;  // Number of non-constant codes (need to go in to chg* dump)
-        sortTraces(traces, nFullCodes, nChgCodes);
-
-        UINFO(5, "nFullCodes: " << nFullCodes << " nChgCodes: " << nChgCodes << endl);
+        uint32_t nNonConstCodes = 0;
+        sortTraces(traces, nNonConstCodes);
 
         // Our keys are now sorted to have same activity number adjacent, then
         // by trace order. (Better would be execution order for cache
@@ -763,11 +758,11 @@ private:
         m_regFuncp->isLoose(true);
         m_topScopep->addBlocksp(m_regFuncp);
 
-        // Create the full dump functions, also allocates signal numbers
-        createFullTraceFunction(traces, nFullCodes, m_parallelism);
+        // Create the const dump functions. Also allocates trace codes.
+        createConstTraceFunctions(traces);
 
-        // Create the incremental dump functions
-        createChgTraceFunctions(traces, nChgCodes, m_parallelism);
+        // Create the full and incremental dump functions
+        createNonConstTraceFunctions(traces, nNonConstCodes, m_parallelism);
 
         // Remove refs to traced values from TraceDecl nodes, these have now moved under
         // TraceInc

From 1bd31742b953fec88bc2ec00a9b790e49d39e7e9 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Mon, 23 Oct 2023 12:49:33 +0000
Subject: [PATCH 125/157] Apply 'make format'

---
 src/V3Ast.h | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 1a41b770e..79fdfd3e3 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2688,16 +2688,10 @@ public:
     template <typename U>
     // cppcheck-suppress noExplicitConstructor
     VNRef(U&& x)
-        : std::reference_wrapper<T_Node> {
-        x
-    }
-    {}
+        : std::reference_wrapper<T_Node>{x} {}
     // cppcheck-suppress noExplicitConstructor
     VNRef(const std::reference_wrapper<T_Node>& other)
-        : std::reference_wrapper<T_Node> {
-        other
-    }
-    {}
+        : std::reference_wrapper<T_Node>{other} {}
 };
 
 static_assert(sizeof(VNRef<AstNode>) == sizeof(std::reference_wrapper<AstNode>),

From d1b6224c2bccee2db17fc648d0efc6bf7eb2e706 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 23 Oct 2023 16:01:55 +0100
Subject: [PATCH 126/157] Associate trace codes with function indices (#4610)

For each traced variable, also register the trace function index that
will write it.
---
 include/verilated_fst_c.cpp   | 29 +++++++++++---------
 include/verilated_fst_c.h     | 14 +++++-----
 include/verilated_trace.h     | 27 +++++++++++--------
 include/verilated_trace_imp.h | 41 +++++++++++++++-------------
 include/verilated_vcd_c.cpp   | 23 +++++++++-------
 include/verilated_vcd_c.h     | 17 +++++++-----
 src/V3AstNodeOther.h          |  5 +++-
 src/V3EmitCImp.cpp            |  2 ++
 src/V3Trace.cpp               | 50 ++++++++++++++++++++++++-----------
 9 files changed, 125 insertions(+), 83 deletions(-)

diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp
index 670b78b6b..62623dbd8 100644
--- a/include/verilated_fst_c.cpp
+++ b/include/verilated_fst_c.cpp
@@ -222,35 +222,38 @@ void VerilatedFst::declare(uint32_t code, const char* name, int dtypenum, fstVar
     }
 }
 
-void VerilatedFst::declEvent(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                             fstVarType vartype, bool array, int arraynum) {
+void VerilatedFst::declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                             fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
 }
-void VerilatedFst::declBit(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                           fstVarType vartype, bool array, int arraynum) {
+void VerilatedFst::declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                           fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
 }
-void VerilatedFst::declBus(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                           fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
+void VerilatedFst::declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                           fstVarDir vardir, fstVarType vartype, bool array, int arraynum, int msb,
+                           int lsb) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
-void VerilatedFst::declQuad(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                            fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
+void VerilatedFst::declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                            fstVarDir vardir, fstVarType vartype, bool array, int arraynum,
+                            int msb, int lsb) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
-void VerilatedFst::declArray(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                             fstVarType vartype, bool array, int arraynum, int msb, int lsb) {
+void VerilatedFst::declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                             fstVarDir vardir, fstVarType vartype, bool array, int arraynum,
+                             int msb, int lsb) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
 }
-void VerilatedFst::declDouble(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                              fstVarType vartype, bool array, int arraynum) {
+void VerilatedFst::declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                              fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
     declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 63, 0);
 }
 
 //=============================================================================
 // Get/commit trace buffer
 
-VerilatedFst::Buffer* VerilatedFst::getTraceBuffer() {
+VerilatedFst::Buffer* VerilatedFst::getTraceBuffer(uint32_t fidx) {
     if (offload()) return new OffloadBuffer{*this};
     return new Buffer{*this};
 }
diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h
index 57671e0d7..2f659db91 100644
--- a/include/verilated_fst_c.h
+++ b/include/verilated_fst_c.h
@@ -74,7 +74,7 @@ protected:
     bool preChangeDump() override { return isOpen(); }
 
     // Trace buffer management
-    Buffer* getTraceBuffer() override;
+    Buffer* getTraceBuffer(uint32_t fidx) override;
     void commitTraceBuffer(Buffer*) override;
 
     // Configure sub-class
@@ -101,17 +101,17 @@ public:
     //=========================================================================
     // Internal interface to Verilator generated code
 
-    void declEvent(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                    fstVarType vartype, bool array, int arraynum);
-    void declBit(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                  fstVarType vartype, bool array, int arraynum);
-    void declBus(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                  fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declQuad(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                   fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declArray(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                    fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declDouble(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
+    void declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
                     fstVarType vartype, bool array, int arraynum);
 
     void declDTypeEnum(int dtypenum, const char* name, uint32_t elements, unsigned int minValbits,
diff --git a/include/verilated_trace.h b/include/verilated_trace.h
index 6b053e776..61e52cdd5 100644
--- a/include/verilated_trace.h
+++ b/include/verilated_trace.h
@@ -162,24 +162,29 @@ private:
         // (the one in Ubuntu 14.04 with GCC 4.8.4 in particular) use the
         // assignment operator on inserting into collections, so they don't work
         // with const fields...
-        union {  // The callback
+        const union {  // The callback
             initCb_t m_initCb;
             dumpCb_t m_dumpCb;
             dumpOffloadCb_t m_dumpOffloadCb;
             cleanupCb_t m_cleanupCb;
         };
-        void* m_userp;  // The user pointer to pass to the callback (the symbol table)
+        const uint32_t m_fidx;  // The index of the tracing function
+        void* const m_userp;  // The user pointer to pass to the callback (the symbol table)
         CallbackRecord(initCb_t cb, void* userp)
             : m_initCb{cb}
+            , m_fidx{0}
             , m_userp{userp} {}
-        CallbackRecord(dumpCb_t cb, void* userp)
+        CallbackRecord(dumpCb_t cb, uint32_t fidx, void* userp)
             : m_dumpCb{cb}
+            , m_fidx{fidx}
             , m_userp{userp} {}
-        CallbackRecord(dumpOffloadCb_t cb, void* userp)
+        CallbackRecord(dumpOffloadCb_t cb, uint32_t fidx, void* userp)
             : m_dumpOffloadCb{cb}
+            , m_fidx{fidx}
             , m_userp{userp} {}
         CallbackRecord(cleanupCb_t cb, void* userp)
             : m_cleanupCb{cb}
+            , m_fidx{0}
             , m_userp{userp} {}
     };
 
@@ -329,7 +334,7 @@ protected:
     virtual bool preChangeDump() = 0;
 
     // Trace buffer management
-    virtual Buffer* getTraceBuffer() = 0;
+    virtual Buffer* getTraceBuffer(uint32_t fidx) = 0;
     virtual void commitTraceBuffer(Buffer*) = 0;
 
     // Configure sub-class
@@ -363,12 +368,12 @@ public:
 
     void addModel(VerilatedModel*) VL_MT_SAFE_EXCLUDES(m_mutex);
     void addInitCb(initCb_t cb, void* userp) VL_MT_SAFE;
-    void addConstCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
-    void addConstCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE;
-    void addFullCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
-    void addFullCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE;
-    void addChgCb(dumpCb_t cb, void* userp) VL_MT_SAFE;
-    void addChgCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE;
+    void addConstCb(dumpCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
+    void addConstCb(dumpOffloadCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
+    void addFullCb(dumpCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
+    void addFullCb(dumpOffloadCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
+    void addChgCb(dumpCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
+    void addChgCb(dumpOffloadCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
     void addCleanupCb(cleanupCb_t cb, void* userp) VL_MT_SAFE;
 
     void scopeEscape(char flag) { m_scopeEscape = flag; }
diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index 2d473e905..183117521 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -498,16 +498,15 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::runCallbacks(const std::vector<Callback
         // Main thread executes all jobs with index % threads == 0
         std::vector<ParallelWorkerData*> mainThreadWorkerData;
         // Enqueue all the jobs
-        for (unsigned i = 0; i < cbVec.size(); ++i) {
-            const CallbackRecord& cbr = cbVec[i];
+        for (const CallbackRecord& cbr : cbVec) {
             // Always get the trace buffer on the main thread
-            Buffer* const bufp = getTraceBuffer();
+            Buffer* const bufp = getTraceBuffer(cbr.m_fidx);
             // Create new work item
             workerData.emplace_back(cbr.m_dumpCb, cbr.m_userp, bufp);
             // Grab the new work item
             ParallelWorkerData* const itemp = &workerData.back();
             // Enqueue task to thread pool, or main thread
-            if (unsigned rem = i % threads) {
+            if (unsigned rem = cbr.m_fidx % threads) {
                 threadPoolp->workerp(rem - 1)->addTask(parallelWorkerTask, itemp);
             } else {
                 mainThreadWorkerData.push_back(itemp);
@@ -530,7 +529,7 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::runCallbacks(const std::vector<Callback
     }
     // Fall back on sequential execution
     for (const CallbackRecord& cbr : cbVec) {
-        Buffer* const traceBufferp = getTraceBuffer();
+        Buffer* const traceBufferp = getTraceBuffer(cbr.m_fidx);
         cbr.m_dumpCb(cbr.m_userp, traceBufferp);
         commitTraceBuffer(traceBufferp);
     }
@@ -541,7 +540,7 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::runOffloadedCallbacks(
     const std::vector<CallbackRecord>& cbVec) {
     // Fall back on sequential execution
     for (const CallbackRecord& cbr : cbVec) {
-        Buffer* traceBufferp = getTraceBuffer();
+        Buffer* traceBufferp = getTraceBuffer(cbr.m_fidx);
         cbr.m_dumpOffloadCb(cbr.m_userp, static_cast<OffloadBuffer*>(traceBufferp));
         commitTraceBuffer(traceBufferp);
     }
@@ -704,28 +703,34 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addInitCb(initCb_t cb, void* userp) VL_
     addCallbackRecord(m_initCbs, CallbackRecord{cb, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_constCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpCb_t cb, uint32_t fidx,
+                                                    void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_constCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_constOffloadCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addConstCb(dumpOffloadCb_t cb, uint32_t fidx,
+                                                    void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_constOffloadCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addFullCb(dumpCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_fullCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addFullCb(dumpCb_t cb, uint32_t fidx,
+                                                   void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_fullCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addFullCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_fullOffloadCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addFullCb(dumpOffloadCb_t cb, uint32_t fidx,
+                                                   void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_fullOffloadCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addChgCb(dumpCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_chgCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addChgCb(dumpCb_t cb, uint32_t fidx,
+                                                  void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_chgCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addChgCb(dumpOffloadCb_t cb, void* userp) VL_MT_SAFE {
-    addCallbackRecord(m_chgOffloadCbs, CallbackRecord{cb, userp});
+void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addChgCb(dumpOffloadCb_t cb, uint32_t fidx,
+                                                  void* userp) VL_MT_SAFE {
+    addCallbackRecord(m_chgOffloadCbs, CallbackRecord{cb, fidx, userp});
 }
 template <>
 void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addCleanupCb(cleanupCb_t cb, void* userp) VL_MT_SAFE {
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index fc0b438cb..282052528 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -520,32 +520,35 @@ void VerilatedVcd::declare(uint32_t code, const char* name, const char* wirep, b
     m_namemapp->emplace(hiername, decl);
 }
 
-void VerilatedVcd::declEvent(uint32_t code, const char* name, bool array, int arraynum) {
+void VerilatedVcd::declEvent(uint32_t code, uint32_t fidx, const char* name, bool array,
+                             int arraynum) {
     declare(code, name, "event", array, arraynum, false, false, 0, 0);
 }
-void VerilatedVcd::declBit(uint32_t code, const char* name, bool array, int arraynum) {
+void VerilatedVcd::declBit(uint32_t code, uint32_t fidx, const char* name, bool array,
+                           int arraynum) {
     declare(code, name, "wire", array, arraynum, false, false, 0, 0);
 }
-void VerilatedVcd::declBus(uint32_t code, const char* name, bool array, int arraynum, int msb,
-                           int lsb) {
+void VerilatedVcd::declBus(uint32_t code, uint32_t fidx, const char* name, bool array,
+                           int arraynum, int msb, int lsb) {
     declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
 }
-void VerilatedVcd::declQuad(uint32_t code, const char* name, bool array, int arraynum, int msb,
-                            int lsb) {
+void VerilatedVcd::declQuad(uint32_t code, uint32_t fidx, const char* name, bool array,
+                            int arraynum, int msb, int lsb) {
     declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
 }
-void VerilatedVcd::declArray(uint32_t code, const char* name, bool array, int arraynum, int msb,
-                             int lsb) {
+void VerilatedVcd::declArray(uint32_t code, uint32_t fidx, const char* name, bool array,
+                             int arraynum, int msb, int lsb) {
     declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
 }
-void VerilatedVcd::declDouble(uint32_t code, const char* name, bool array, int arraynum) {
+void VerilatedVcd::declDouble(uint32_t code, uint32_t fidx, const char* name, bool array,
+                              int arraynum) {
     declare(code, name, "real", array, arraynum, false, false, 63, 0);
 }
 
 //=============================================================================
 // Get/commit trace buffer
 
-VerilatedVcd::Buffer* VerilatedVcd::getTraceBuffer() {
+VerilatedVcd::Buffer* VerilatedVcd::getTraceBuffer(uint32_t fidx) {
     VerilatedVcd::Buffer* const bufp = new Buffer{*this};
     if (parallel()) {
         // Note: This is called from VerilatedVcd::dump, which already holds the lock
diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h
index 9ffceaa87..1e0ddcec4 100644
--- a/include/verilated_vcd_c.h
+++ b/include/verilated_vcd_c.h
@@ -107,7 +107,7 @@ protected:
     bool preChangeDump() override;
 
     // Trace buffer management
-    Buffer* getTraceBuffer() override;
+    Buffer* getTraceBuffer(uint32_t fidx) override;
     void commitTraceBuffer(Buffer*) override;
 
     // Configure sub-class
@@ -140,12 +140,15 @@ public:
     //=========================================================================
     // Internal interface to Verilator generated code
 
-    void declEvent(uint32_t code, const char* name, bool array, int arraynum);
-    void declBit(uint32_t code, const char* name, bool array, int arraynum);
-    void declBus(uint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
-    void declQuad(uint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
-    void declArray(uint32_t code, const char* name, bool array, int arraynum, int msb, int lsb);
-    void declDouble(uint32_t code, const char* name, bool array, int arraynum);
+    void declEvent(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
+    void declBit(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
+    void declBus(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum, int msb,
+                 int lsb);
+    void declQuad(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum,
+                  int msb, int lsb);
+    void declArray(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum,
+                   int msb, int lsb);
+    void declDouble(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
 };
 
 #ifndef DOXYGEN
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 25508a230..e8eabda41 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -3192,7 +3192,8 @@ class AstTraceDecl final : public AstNodeStmt {
     // Expression being traced - Moved to AstTraceInc by V3Trace
     // @astgen op1 := valuep : Optional[AstNodeExpr]
 private:
-    uint32_t m_code = 0;  // Trace identifier code; converted to ASCII by trace routines
+    uint32_t m_code{0};  // Trace identifier code
+    uint32_t m_fidx{0};  // Trace function index
     const string m_showname;  // Name of variable
     const VNumRange m_bitRange;  // Property of var the trace details
     const VNumRange m_arrayRange;  // Property of var the trace details
@@ -3228,6 +3229,8 @@ public:
     // Details on what we're tracing
     uint32_t code() const { return m_code; }
     void code(uint32_t code) { m_code = code; }
+    uint32_t fidx() const { return m_fidx; }
+    void fidx(uint32_t fidx) { m_fidx = fidx; }
     uint32_t codeInc() const { return m_codeInc; }
     const VNumRange& bitRange() const { return m_bitRange; }
     const VNumRange& arrayRange() const { return m_arrayRange; }
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index 6d2a6bca5..687af5568 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -649,6 +649,8 @@ class EmitCTrace final : EmitCFunc {
         puts("(c+" + cvtToStr(nodep->code()));
         if (nodep->arrayRange().ranged()) puts("+i*" + cvtToStr(nodep->widthWords()));
         puts(",");
+        puts(cvtToStr(nodep->fidx()));
+        puts(",");
         putsQuoted(VIdProtect::protectWordsIf(nodep->showname(), nodep->protect()));
         // Direction
         if (v3Global.opt.traceFormat().fst()) {
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index 58cbad724..a7bc4fa42 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -477,22 +477,28 @@ private:
         }
     }
 
-    AstCFunc* newCFunc(VTraceType traceType, AstCFunc* topFuncp, unsigned funcNum,
+    AstCFunc* newCFunc(VTraceType traceType, AstCFunc* topFuncp, uint32_t funcNum,
                        uint32_t baseCode = 0) {
         // Create new function
         const bool isTopFunc = topFuncp == nullptr;
-        std::string baseName = "trace_";
-        if (traceType == VTraceType::CONSTANT) {
-            baseName += "const_";
-        } else if (traceType == VTraceType::FULL) {
-            baseName += "full_";
+        std::string funcName;
+        if (isTopFunc) {
+            if (traceType == VTraceType::CONSTANT) {
+                funcName = "trace_const";
+            } else if (traceType == VTraceType::FULL) {
+                funcName = "trace_full";
+            } else {
+                funcName = "trace_chg";
+            }
         } else {
-            baseName += "chg_";
+            funcName = topFuncp->name();
+            funcName += "_sub";
         }
-        baseName += isTopFunc ? "top_" : "sub_";
+        funcName += "_";
+        funcName += cvtToStr(funcNum);
 
         FileLine* const flp = m_topScopep->fileline();
-        AstCFunc* const funcp = new AstCFunc{flp, baseName + cvtToStr(funcNum), m_topScopep};
+        AstCFunc* const funcp = new AstCFunc{flp, funcName, m_topScopep};
         funcp->isTrace(true);
         funcp->dontCombine(true);
         funcp->isLoose(true);
@@ -526,6 +532,8 @@ private:
             }
             m_regFuncp->addStmtsp(new AstText{flp, str, true});
             m_regFuncp->addStmtsp(new AstAddrOfCFunc{flp, funcp});
+            m_regFuncp->addStmtsp(new AstText{flp, ", ", true});
+            m_regFuncp->addStmtsp(new AstConst{flp, funcNum});
             m_regFuncp->addStmtsp(new AstText{flp, ", vlSelf);\n", true});
         } else {
             // Sub functions
@@ -565,7 +573,7 @@ private:
                                                                 : std::numeric_limits<int>::max();
 
         AstCFunc* const topFuncp = newCFunc(VTraceType::CONSTANT, nullptr, 0);
-        unsigned subFuncNum = 0;
+        uint32_t subFuncNum = 0;
         AstCFunc* subFuncp = nullptr;
         int subStmts = 0;
         for (auto it = traces.cbegin(); it != traces.end(); ++it) {
@@ -612,14 +620,16 @@ private:
                                       uint32_t parallelism) {
         const int splitLimit = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace()
                                                                 : std::numeric_limits<int>::max();
-        unsigned topFuncNum = 0;
-        unsigned subFuncNum = 0;
+
+        // pre-incremented, so starts at 0
+        uint32_t topFuncNum = std::numeric_limits<uint32_t>::max();
         TraceVec::const_iterator it = traces.begin();
         while (it != traces.end()) {
             AstCFunc* topFulFuncp = nullptr;
             AstCFunc* topChgFuncp = nullptr;
             AstCFunc* subFulFuncp = nullptr;
             AstCFunc* subChgFuncp = nullptr;
+            uint32_t subFuncNum = 0;
             int subStmts = 0;
             const uint32_t maxCodes = std::max((nAllCodes + parallelism - 1) / parallelism, 1U);
             uint32_t nCodes = 0;
@@ -627,20 +637,25 @@ private:
             AstIf* ifp = nullptr;
             uint32_t baseCode = 0;
             for (; nCodes < maxCodes && it != traces.end(); ++it) {
-                const TraceTraceVertex* const vtxp = it->second;
-                // This is a duplicate decl, no need to add it
-                if (vtxp->duplicatep()) continue;
                 const ActCodeSet& actSet = it->first;
                 // Traced value never changes, no need to add it
                 if (actSet.count(TraceActivityVertex::ACTIVITY_NEVER)) continue;
 
+                const TraceTraceVertex* const vtxp = it->second;
                 AstTraceDecl* const declp = vtxp->nodep();
 
+                // This is a duplicate decl, no need to add it, but must set the
+                // function index to the same as the canonical node.
+                if (const TraceTraceVertex* const canonVtxp = vtxp->duplicatep()) {
+                    declp->fidx(canonVtxp->nodep()->fidx());
+                    continue;
+                }
+
                 // Create top function if not yet created
                 if (!topFulFuncp) {
+                    ++topFuncNum;
                     topFulFuncp = newCFunc(VTraceType::FULL, nullptr, topFuncNum);
                     topChgFuncp = newCFunc(VTraceType::CHANGE, nullptr, topFuncNum);
-                    ++topFuncNum;
                 }
 
                 // Create new sub function if required
@@ -682,6 +697,9 @@ private:
                     = new AstTraceInc{flp, declp, VTraceType::CHANGE, baseCode};
                 ifp->addThensp(incChgp);
 
+                // Set the function index of the decl
+                declp->fidx(topFuncNum);
+
                 // Track splitting due to size
                 UASSERT_OBJ(incFulp->nodeCount() == incChgp->nodeCount(), declp,
                             "Should have equal cost");

From 17721aff556c387956c47485308f6a91c549d73a Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 24 Oct 2023 10:01:41 +0100
Subject: [PATCH 127/157] Remove unused IMPLICITWIRE var type

---
 src/V3Ast.h | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 79fdfd3e3..1f58b767f 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -822,7 +822,6 @@ public:
         SUPPLY1,
         WIRE,
         WREAL,
-        IMPLICITWIRE,
         TRIWIRE,
         TRI0,
         TRI1,
@@ -842,26 +841,25 @@ public:
         : m_e(static_cast<en>(_e)) {}  // Need () or GCC 4.8 false warning
     constexpr operator en() const { return m_e; }
     const char* ascii() const {
-        static const char* const names[] = {
-            "?",         "GPARAM",     "LPARAM",       "GENVAR",  "VAR",      "SUPPLY0", "SUPPLY1",
-            "WIRE",      "WREAL",      "IMPLICITWIRE", "TRIWIRE", "TRI0",     "TRI1",    "PORT",
-            "BLOCKTEMP", "MODULETEMP", "STMTTEMP",     "XTEMP",   "IFACEREF", "MEMBER"};
+        static const char* const names[]
+            = {"?",          "GPARAM",   "LPARAM",  "GENVAR",   "VAR",   "SUPPLY0", "SUPPLY1",
+               "WIRE",       "WREAL",    "TRIWIRE", "TRI0",     "TRI1",  "PORT",    "BLOCKTEMP",
+               "MODULETEMP", "STMTTEMP", "XTEMP",   "IFACEREF", "MEMBER"};
         return names[m_e];
     }
     bool isParam() const { return m_e == GPARAM || m_e == LPARAM; }
     bool isSignal() const {
-        return (m_e == WIRE || m_e == WREAL || m_e == IMPLICITWIRE || m_e == TRIWIRE || m_e == TRI0
-                || m_e == TRI1 || m_e == PORT || m_e == SUPPLY0 || m_e == SUPPLY1 || m_e == VAR);
+        return (m_e == WIRE || m_e == WREAL || m_e == TRIWIRE || m_e == TRI0 || m_e == TRI1
+                || m_e == PORT || m_e == SUPPLY0 || m_e == SUPPLY1 || m_e == VAR);
     }
     bool isNet() const {
-        return (m_e == WIRE || m_e == IMPLICITWIRE || m_e == TRIWIRE || m_e == TRI0 || m_e == TRI1
-                || m_e == SUPPLY0 || m_e == SUPPLY1);
+        return (m_e == WIRE || m_e == TRIWIRE || m_e == TRI0 || m_e == TRI1 || m_e == SUPPLY0
+                || m_e == SUPPLY1);
     }
     bool isContAssignable() const {  // In Verilog, always ok in SystemVerilog
-        return (m_e == SUPPLY0 || m_e == SUPPLY1 || m_e == WIRE || m_e == WREAL
-                || m_e == IMPLICITWIRE || m_e == TRIWIRE || m_e == TRI0 || m_e == TRI1
-                || m_e == PORT || m_e == BLOCKTEMP || m_e == MODULETEMP || m_e == STMTTEMP
-                || m_e == XTEMP || m_e == IFACEREF);
+        return (m_e == SUPPLY0 || m_e == SUPPLY1 || m_e == WIRE || m_e == WREAL || m_e == TRIWIRE
+                || m_e == TRI0 || m_e == TRI1 || m_e == PORT || m_e == BLOCKTEMP
+                || m_e == MODULETEMP || m_e == STMTTEMP || m_e == XTEMP || m_e == IFACEREF);
     }
     bool isProcAssignable() const {
         return (m_e == GPARAM || m_e == LPARAM || m_e == GENVAR || m_e == VAR || m_e == BLOCKTEMP

From 84125d7c9244f1c2b8d454f2550087e0299f7da2 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 24 Oct 2023 15:51:46 +0200
Subject: [PATCH 128/157] Fix virtual methods (#4616)

---
 src/V3AstNodeExpr.h              |  9 +++++++
 src/V3EmitCFunc.h                |  2 +-
 src/V3LinkDot.cpp                | 13 +++++++++-
 src/V3Randomize.cpp              |  1 +
 src/V3Task.cpp                   |  6 +++++
 test_regress/t/t_class_virtual.v | 43 ++++++++++++++++++++++++++++++++
 6 files changed, 72 insertions(+), 2 deletions(-)

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index f9de8e512..d026e5fcc 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -183,6 +183,7 @@ class AstNodeCCall VL_NOT_FINAL : public AstNodeExpr {
     // @astgen op2 := argsp : List[AstNodeExpr] // Note: op1 used by some sub-types only
     AstCFunc* m_funcp;
     string m_argTypes;
+    bool m_superReference = false;  // Called with super reference
 
 protected:
     AstNodeCCall(VNType t, FileLine* fl, AstCFunc* funcp, AstNodeExpr* argsp = nullptr)
@@ -213,6 +214,8 @@ public:
     string emitVerilog() final override { V3ERROR_NA_RETURN(""); }
     string emitC() final override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const final override { return true; }
+    bool superReference() const { return m_superReference; }
+    void superReference(bool flag) { m_superReference = flag; }
 };
 class AstNodeFTaskRef VL_NOT_FINAL : public AstNodeExpr {
     // A reference to a task (or function)
@@ -4198,12 +4201,15 @@ public:
 // === AstNodeFTaskRef ===
 class AstFuncRef final : public AstNodeFTaskRef {
     // A reference to a function
+    bool m_superReference = false;  // Called with super reference
 public:
     AstFuncRef(FileLine* fl, AstParseRef* namep, AstNodeExpr* pinsp)
         : ASTGEN_SUPER_FuncRef(fl, (AstNode*)namep, pinsp) {}
     AstFuncRef(FileLine* fl, const string& name, AstNodeExpr* pinsp)
         : ASTGEN_SUPER_FuncRef(fl, name, pinsp) {}
     ASTGEN_MEMBERS_AstFuncRef;
+    bool superReference() const { return m_superReference; }
+    void superReference(bool flag) { m_superReference = flag; }
 };
 class AstMethodCall final : public AstNodeFTaskRef {
     // A reference to a member task (or function)
@@ -4240,6 +4246,7 @@ public:
 };
 class AstTaskRef final : public AstNodeFTaskRef {
     // A reference to a task
+    bool m_superReference = false;  // Called with super reference
 public:
     AstTaskRef(FileLine* fl, AstParseRef* namep, AstNodeExpr* pinsp)
         : ASTGEN_SUPER_TaskRef(fl, (AstNode*)namep, pinsp) {
@@ -4250,6 +4257,8 @@ public:
         dtypeSetVoid();
     }
     ASTGEN_MEMBERS_AstTaskRef;
+    bool superReference() const { return m_superReference; }
+    void superReference(bool flag) { m_superReference = flag; }
 };
 
 // === AstNodePreSel ===
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index a90368ace..6c7ef5fb0 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -486,7 +486,7 @@ public:
             // Call static method via the containing class
             puts(prefixNameProtect(funcModp) + "::");
             puts(funcp->nameProtect());
-        } else if (VN_IS(funcModp, Class) && funcModp != m_modp) {
+        } else if (nodep->superReference()) {
             // Calling superclass method
             puts(prefixNameProtect(funcModp) + "::");
             puts(funcp->nameProtect());
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index df0028782..a3b5a350b 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2039,6 +2039,7 @@ private:
         DotPosition m_dotPos;  // Scope part of dotted resolution
         VSymEnt* m_dotSymp;  // SymEnt for dotted AstParse lookup
         const AstDot* m_dotp;  // Current dot
+        bool m_super;  // Starts with super reference
         bool m_unresolvedCell;  // Unresolved cell, needs help from V3Param
         bool m_unresolvedClass;  // Unresolved class reference, needs help from V3Param
         AstNode* m_unlinkedScopep;  // Unresolved scope, needs corresponding VarXRef
@@ -2050,6 +2051,7 @@ private:
             m_dotPos = DP_NONE;
             m_dotSymp = curSymp;
             m_dotp = nullptr;
+            m_super = false;
             m_dotErr = false;
             m_dotText = "";
             m_unresolvedCell = false;
@@ -2061,6 +2063,7 @@ private:
             std::ostringstream sstr;
             sstr << "ds=" << names[m_dotPos];
             sstr << "  dse" << cvtToHex(m_dotSymp);
+            sstr << "  sup=" << m_super;
             sstr << "  txt=" << m_dotText;
             sstr << "  unrCell=" << m_unresolvedCell;
             sstr << "  unrClass=" << m_unresolvedClass;
@@ -2462,6 +2465,7 @@ private:
                             const auto baseClassp = cextp->classp();
                             UASSERT_OBJ(baseClassp, nodep, "Bad superclass");
                             m_ds.m_dotSymp = m_statep->getNodeSym(baseClassp);
+                            m_ds.m_super = true;
                             UINFO(8, "     super. " << m_ds.ascii() << endl);
                         }
                     }
@@ -2538,7 +2542,6 @@ private:
         // Generally resolved during Primay, but might be at param time under AstUnlinkedRef
         UASSERT_OBJ(m_statep->forPrimary() || m_statep->forPrearray(), nodep,
                     "ParseRefs should no longer exist");
-        if (nodep->name() == "super") nodep->v3warn(E_UNSUPPORTED, "Unsupported: super");
         const DotStates lastStates = m_ds;
         const bool start = (m_ds.m_dotPos == DP_NONE);  // Save, as m_dotp will be changed
         if (start) {
@@ -3079,6 +3082,14 @@ private:
             iterateChildren(nodep);
         }
 
+        if (m_ds.m_super) {
+            if (AstFuncRef* const funcRefp = VN_CAST(nodep, FuncRef)) {
+                funcRefp->superReference(true);
+            } else if (AstTaskRef* const taskRefp = VN_CAST(nodep, TaskRef)) {
+                taskRefp->superReference(true);
+            }
+        }
+
         bool staticAccess = false;
         if (m_ds.m_unresolvedClass) {
             // Unable to link before V3Param
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 5c39b78d2..af72b95c0 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -310,6 +310,7 @@ private:
                 baseRandCallp->taskp(baseRandomizep);
                 baseRandCallp->dtypeFrom(baseRandomizep->dtypep());
                 baseRandCallp->classOrPackagep(nodep->extendsp()->classp());
+                baseRandCallp->superReference(true);
                 beginValp = baseRandCallp;
             }
         }
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index a410f06a6..9bd96ef03 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -638,6 +638,12 @@ private:
             beginp->addNext(ccallp->makeStmt());
         }
 
+        if (const AstFuncRef* const funcRefp = VN_CAST(refp, FuncRef)) {
+            ccallp->superReference(funcRefp->superReference());
+        } else if (const AstTaskRef* const taskRefp = VN_CAST(refp, TaskRef)) {
+            ccallp->superReference(taskRefp->superReference());
+        }
+
         // Convert complicated outputs to temp signals
         {
             const V3TaskConnects tconnects = V3Task::taskConnects(refp, refp->taskp()->stmtsp());
diff --git a/test_regress/t/t_class_virtual.v b/test_regress/t/t_class_virtual.v
index 9daf4cd65..5b2e9511d 100644
--- a/test_regress/t/t_class_virtual.v
+++ b/test_regress/t/t_class_virtual.v
@@ -22,12 +22,48 @@ class VB extends VBase;
    endfunction
 endclass
 
+virtual class uvm_phase;
+   virtual function int exec_func;
+      return 0;
+   endfunction
+endclass
+
+class uvm_topdown_phase extends uvm_phase;
+   function int get1;
+      return exec_func();
+   endfunction
+endclass
+
+class uvm_build_phase extends uvm_topdown_phase;
+   virtual function int exec_func;
+      return 1;
+   endfunction
+endclass
+
+virtual class Cls;
+   uvm_phase ph;
+endclass
+
+class ExtendsCls extends Cls;
+   function new;
+      uvm_build_phase bp = new;
+      ph = bp;
+   endfunction
+
+   function int get1;
+      return super.ph.exec_func();
+   endfunction
+endclass
+
 module t;
    initial begin
       VA va = new;
       VB vb = new;
       VBase b;
 
+      uvm_build_phase ph;
+      ExtendsCls ec;
+
       if (va.hello() != 2) $stop;
       if (vb.hello() != 3) $stop;
 
@@ -35,6 +71,13 @@ module t;
       if (b.hello() != 2) $stop;
       b = vb;
       if (b.hello() != 3) $stop;
+
+      ph = new;
+      if (ph.get1() != 1) $stop;
+
+      ec = new;
+      if (ec.get1() != 1) $stop;
+
       $write("*-* All Finished *-*\n");
       $finish;
    end

From 95c4ade718a21d51c661cbe37b252924c0a822cd Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 24 Oct 2023 16:33:29 +0100
Subject: [PATCH 129/157] Unify code generation for trace declarations in both
 trace formats (#4612)

This patch adds some abstract enums to pass to the trace decl* APIs, so
the VCD/FST specific code can be kept in verilated_{vcd,fst}_*.cc, and
removed from V3Emit*. It also reworks the generation of the trace init
functions (those that call 'decl*' for the signals) such that the scope
hierarchy is traversed precisely once during initialization, which
simplifies the FST writer. This later change also has the side effect of
fixing tracing of nested interfaces when traced via an interface
reference - see the change in the expected t_interface_ref_trace - which
previously were missed.
---
 include/verilated_fst_c.cpp                   |   205 +-
 include/verilated_fst_c.h                     |    56 +-
 include/verilated_trace.h                     |    73 +-
 include/verilated_trace_defs.h                |    42 -
 include/verilated_trace_imp.h                 |    19 +-
 include/verilated_vcd_c.cpp                   |   339 +-
 include/verilated_vcd_c.h                     |    48 +-
 src/V3Ast.h                                   |    98 +
 src/V3AstNodeOther.h                          |    44 +-
 src/V3EmitCImp.cpp                            |   118 +-
 src/V3EmitCModel.cpp                          |     7 +-
 src/V3Interface.cpp                           |    37 +-
 src/V3TraceDecl.cpp                           |   637 +-
 test_regress/t/t_clocker.out                  |   256 +-
 test_regress/t/t_cover_line_trace.out         |    94 +-
 test_regress/t/t_cover_sva_trace.out          |    72 +-
 test_regress/t/t_force_release_net_trace.out  |   281 +-
 test_regress/t/t_force_release_var_trace.out  |   277 +-
 test_regress/t/t_forceable_net_trace.vcd      |    13 +-
 test_regress/t/t_forceable_var_trace.vcd      |    13 +-
 test_regress/t/t_hier_block_sc_trace_fst.out  | 10162 +++++++-------
 test_regress/t/t_hier_block_sc_trace_vcd.out  | 11257 ++++++++-------
 test_regress/t/t_hier_block_trace_fst.out     | 10162 +++++++-------
 test_regress/t/t_hier_block_trace_vcd.out     | 11259 ++++++++--------
 test_regress/t/t_interface_ref_trace.out      |   431 +-
 test_regress/t/t_interface_ref_trace_fst.out  |   690 +-
 .../t/t_interface_ref_trace_fst_sc.out        |   690 +-
 .../t/t_interface_ref_trace_noinl.out         |   675 +
 test_regress/t/t_interface_ref_trace_noinl.pl |     4 +-
 test_regress/t/t_no_trace_top.out             |     2 +-
 test_regress/t/t_order_clkinst.out            |    74 +-
 test_regress/t/t_split_var_2_trace.out        |  2982 ++--
 test_regress/t/t_timing_trace.out             |    16 +-
 test_regress/t/t_trace_abort.out              |    10 +-
 test_regress/t/t_trace_array.out              |     5 +-
 test_regress/t/t_trace_ascendingrange.out     |    22 +-
 test_regress/t/t_trace_cat.out                |   580 +-
 test_regress/t/t_trace_cat_renew_0000.out     |   310 +-
 test_regress/t/t_trace_cat_renew_0100.out     |   280 +-
 test_regress/t/t_trace_cat_reopen_0000.out    |   310 +-
 test_regress/t/t_trace_cat_reopen_0100.out    |   280 +-
 test_regress/t/t_trace_complex.out            |   327 +-
 test_regress/t/t_trace_complex_fst.out        |   312 +-
 test_regress/t/t_trace_complex_fst_sc.out     |   310 +-
 test_regress/t/t_trace_complex_params.out     |   327 +-
 test_regress/t/t_trace_complex_params_fst.out |   312 +-
 .../t/t_trace_complex_params_fst_sc.out       |   310 +-
 test_regress/t/t_trace_complex_structs.out    |   123 +-
 .../t/t_trace_complex_structs_fst.out         |   370 +-
 .../t/t_trace_complex_structs_fst_sc.out      |   324 +-
 test_regress/t/t_trace_dumpvars_dyn_vcd_0.out |     5 +-
 test_regress/t/t_trace_empty.pl               |     2 -
 test_regress/t/t_trace_ena_cc.out             |    12 +-
 test_regress/t/t_trace_ena_sc.out             |   116 +-
 test_regress/t/t_trace_public.out             |    49 +-
 test_regress/t/t_trace_rollover.out           |     5 +-
 test_regress/t/t_trace_scope_vlt.out          |     5 +-
 test_regress/t/t_trace_timescale.out          |    78 +-
 test_regress/t/t_trace_timing1.out            |     5 +-
 test_regress/t/t_trace_two_dump_cc.out        |   123 +-
 test_regress/t/t_trace_two_dump_sc.out        |    58 +-
 test_regress/t/t_trace_two_hdr_cc.out         |   180 +-
 test_regress/t/t_trace_two_hdr_sc.out         |   134 +-
 test_regress/t/t_trace_two_port_cc.out        |   123 +-
 test_regress/t/t_trace_two_port_sc.out        |    58 +-
 test_regress/t/t_var_escape.out               |    31 +-
 test_regress/t/t_var_nonamebegin.out          |    12 +-
 test_regress/t/t_wrapper_context_trace0.out   |    21 +-
 test_regress/t/t_wrapper_context_trace1.out   |    21 +-
 69 files changed, 28535 insertions(+), 28148 deletions(-)
 delete mode 100644 include/verilated_trace_defs.h
 create mode 100644 test_regress/t/t_interface_ref_trace_noinl.out

diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp
index 62623dbd8..5e29ee806 100644
--- a/include/verilated_fst_c.cpp
+++ b/include/verilated_fst_c.cpp
@@ -23,7 +23,6 @@
 
 // clang-format off
 
-#define __STDC_LIMIT_MACROS  // UINT64_MAX
 #include "verilated.h"
 #include "verilated_fst_c.h"
 
@@ -40,6 +39,7 @@
 #include <algorithm>
 #include <iterator>
 #include <sstream>
+#include <type_traits>
 
 #if defined(_WIN32) && !defined(__MINGW32__) && !defined(__CYGWIN__)
 # include <io.h>
@@ -50,33 +50,10 @@
 // clang-format on
 
 //=============================================================================
-// Check that vltscope_t matches fstScopeType
+// Check that forward declared types matches the FST API types
 
-static_assert(static_cast<int>(FST_ST_VCD_MODULE) == static_cast<int>(VLT_TRACE_SCOPE_MODULE),
-              "VLT_TRACE_SCOPE_MODULE mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_TASK) == static_cast<int>(VLT_TRACE_SCOPE_TASK),
-              "VLT_TRACE_SCOPE_TASK mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_FUNCTION) == static_cast<int>(VLT_TRACE_SCOPE_FUNCTION),
-              "VLT_TRACE_SCOPE_FUNCTION mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_BEGIN) == static_cast<int>(VLT_TRACE_SCOPE_BEGIN),
-              "VLT_TRACE_SCOPE_BEGIN mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_FORK) == static_cast<int>(VLT_TRACE_SCOPE_FORK),
-              "VLT_TRACE_SCOPE_FORK mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_GENERATE) == static_cast<int>(VLT_TRACE_SCOPE_GENERATE),
-              "VLT_TRACE_SCOPE_GENERATE mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_STRUCT) == static_cast<int>(VLT_TRACE_SCOPE_STRUCT),
-              "VLT_TRACE_SCOPE_STRUCT mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_UNION) == static_cast<int>(VLT_TRACE_SCOPE_UNION),
-              "VLT_TRACE_SCOPE_UNION mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_CLASS) == static_cast<int>(VLT_TRACE_SCOPE_CLASS),
-              "VLT_TRACE_SCOPE_CLASS mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_INTERFACE)
-                  == static_cast<int>(VLT_TRACE_SCOPE_INTERFACE),
-              "VLT_TRACE_SCOPE_INTERFACE mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_PACKAGE) == static_cast<int>(VLT_TRACE_SCOPE_PACKAGE),
-              "VLT_TRACE_SCOPE_PACKAGE mismatches");
-static_assert(static_cast<int>(FST_ST_VCD_PROGRAM) == static_cast<int>(VLT_TRACE_SCOPE_PROGRAM),
-              "VLT_TRACE_SCOPE_PROGRAM mismatches");
+static_assert(std::is_same<vlFstHandle, fstHandle>::value, "vlFstHandle mismatch");
+static_assert(std::is_same<vlFstEnumHandle, fstEnumHandle>::value, "vlFstHandle mismatch");
 
 //=============================================================================
 // Specialization of the generics for this trace format
@@ -107,17 +84,8 @@ void VerilatedFst::open(const char* filename) VL_MT_SAFE_EXCLUDES(m_mutex) {
     constDump(true);  // First dump must contain the const signals
     fullDump(true);  // First dump must be full for fst
 
-    m_curScope.clear();
-
     Super::traceInit();
 
-    // Clear the scope stack
-    auto it = m_curScope.begin();
-    while (it != m_curScope.end()) {
-        fstWriterSetUpscope(m_fst);
-        it = m_curScope.erase(it);
-    }
-
     // convert m_code2symbol into an array for fast lookup
     if (!m_symbolp) {
         m_symbolp = new fstHandle[nextCode()]{0};
@@ -155,99 +123,136 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, uint32_t elemen
     m_local2fstdtype[dtypenum] = enumNum;
 }
 
-void VerilatedFst::declare(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                           fstVarType vartype, bool array, int arraynum, bool bussed, int msb,
-                           int lsb) {
+// TODO: should return std::optional<fstScopeType>, but I can't have C++17
+static std::pair<bool, fstScopeType> toFstScopeType(VerilatedTracePrefixType type) {
+    switch (type) {
+    case VerilatedTracePrefixType::SCOPE_MODULE: return {true, FST_ST_VCD_MODULE};
+    case VerilatedTracePrefixType::SCOPE_INTERFACE: return {true, FST_ST_VCD_INTERFACE};
+    case VerilatedTracePrefixType::STRUCT_PACKED:
+    case VerilatedTracePrefixType::STRUCT_UNPACKED: return {true, FST_ST_VCD_STRUCT};
+    case VerilatedTracePrefixType::UNION_PACKED: return {true, FST_ST_VCD_UNION};
+    default: return {false, /* unused so whatever, just need a value */ FST_ST_VCD_SCOPE};
+    }
+}
+
+void VerilatedFst::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
+    const std::string newPrefix = m_prefixStack.back().first + name;
+    const auto pair = toFstScopeType(type);
+    const bool properScope = pair.first;
+    const fstScopeType scopeType = pair.second;
+    m_prefixStack.emplace_back(newPrefix + (properScope ? " " : ""), type);
+    if (properScope) {
+        const std::string scopeName = lastWord(newPrefix);
+        fstWriterSetScope(m_fst, scopeType, scopeName.c_str(), nullptr);
+    }
+}
+
+void VerilatedFst::popPrefix() {
+    const bool properScope = toFstScopeType(m_prefixStack.back().second).first;
+    if (properScope) fstWriterSetUpscope(m_fst);
+    m_prefixStack.pop_back();
+    assert(!m_prefixStack.empty());
+}
+
+void VerilatedFst::declare(uint32_t code, const char* name, int dtypenum,
+                           VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                           VerilatedTraceSigType type, bool array, int arraynum, bool bussed,
+                           int msb, int lsb) {
     const int bits = ((msb > lsb) ? (msb - lsb) : (lsb - msb)) + 1;
 
-    const bool enabled = Super::declCode(code, name, bits, false);
+    const std::string hierarchicalName = m_prefixStack.back().first + name;
+
+    const bool enabled = Super::declCode(code, hierarchicalName, bits);
     if (!enabled) return;
 
-    std::string nameasstr = namePrefix() + name;
-    std::istringstream nameiss{nameasstr};
-    std::istream_iterator<std::string> beg(nameiss);
-    std::istream_iterator<std::string> end;
-    std::list<std::string> tokens(beg, end);  // Split name
-    std::string symbol_name{tokens.back()};
-    tokens.pop_back();  // Remove symbol name from hierarchy
-    std::string tmpModName;
-
-    // Find point where current and new scope diverge
-    auto cur_it = m_curScope.begin();
-    auto new_it = tokens.begin();
-    while (cur_it != m_curScope.end() && new_it != tokens.end()) {
-        if (*cur_it != *new_it) break;
-        ++cur_it;
-        ++new_it;
-    }
-
-    // Go back to the common point
-    while (cur_it != m_curScope.end()) {
-        fstWriterSetUpscope(m_fst);
-        cur_it = m_curScope.erase(cur_it);
-    }
-
-    // Follow the hierarchy of the new variable from the common scope point
-    while (new_it != tokens.end()) {
-        if ((new_it->back() & 0x80)) {
-            tmpModName = *new_it;
-            tmpModName.pop_back();
-            // If the scope ends with a non-ASCII character, it will be 0x80 + fstScopeType
-            fstWriterSetScope(m_fst, static_cast<fstScopeType>(new_it->back() & 0x7f),
-                              tmpModName.c_str(), nullptr);
-        } else {
-            fstWriterSetScope(m_fst, FST_ST_VCD_SCOPE, new_it->c_str(), nullptr);
-        }
-        m_curScope.push_back(*new_it);
-        new_it = tokens.erase(new_it);
-    }
-
+    assert(hierarchicalName.rfind(' ') != std::string::npos);
     std::stringstream name_ss;
-    name_ss << symbol_name;
+    name_ss << lastWord(hierarchicalName);
     if (array) name_ss << "[" << arraynum << "]";
     if (bussed) name_ss << " [" << msb << ":" << lsb << "]";
-    std::string name_str = name_ss.str();
+    const std::string name_str = name_ss.str();
 
-    if (dtypenum > 0) {
-        const fstEnumHandle enumNum = m_local2fstdtype[dtypenum];
-        fstWriterEmitEnumTableRef(m_fst, enumNum);
+    if (dtypenum > 0) fstWriterEmitEnumTableRef(m_fst, m_local2fstdtype[dtypenum]);
+
+    fstVarDir varDir;
+    switch (direction) {
+    case VerilatedTraceSigDirection::INOUT: varDir = FST_VD_INOUT; break;
+    case VerilatedTraceSigDirection::OUTPUT: varDir = FST_VD_OUTPUT; break;
+    case VerilatedTraceSigDirection::INPUT: varDir = FST_VD_INPUT; break;
+    case VerilatedTraceSigDirection::NONE: varDir = FST_VD_IMPLICIT; break;
     }
 
+    fstVarType varType;
+    // Doubles have special decoding properties, so must indicate if a double
+    if (type == VerilatedTraceSigType::DOUBLE) {
+        if (kind == VerilatedTraceSigKind::PARAMETER) {
+            varType = FST_VT_VCD_REAL_PARAMETER;
+        } else {
+            varType = FST_VT_VCD_REAL;
+        }
+    }
+    // clang-format off
+    else if (kind == VerilatedTraceSigKind::PARAMETER) varType = FST_VT_VCD_PARAMETER;
+    else if (kind == VerilatedTraceSigKind::SUPPLY0) varType = FST_VT_VCD_SUPPLY0;
+    else if (kind == VerilatedTraceSigKind::SUPPLY1) varType = FST_VT_VCD_SUPPLY1;
+    else if (kind == VerilatedTraceSigKind::TRI) varType = FST_VT_VCD_TRI;
+    else if (kind == VerilatedTraceSigKind::TRI0) varType = FST_VT_VCD_TRI0;
+    else if (kind == VerilatedTraceSigKind::TRI1) varType = FST_VT_VCD_TRI1;
+    else if (kind == VerilatedTraceSigKind::WIRE) varType = FST_VT_VCD_WIRE;
+    //
+    else if (type == VerilatedTraceSigType::INTEGER) varType = FST_VT_VCD_INTEGER;
+    else if (type == VerilatedTraceSigType::BIT) varType = FST_VT_SV_BIT;
+    else if (type == VerilatedTraceSigType::LOGIC) varType = FST_VT_SV_LOGIC;
+    else if (type == VerilatedTraceSigType::INT) varType = FST_VT_SV_INT;
+    else if (type == VerilatedTraceSigType::SHORTINT) varType = FST_VT_SV_SHORTINT;
+    else if (type == VerilatedTraceSigType::LONGINT) varType = FST_VT_SV_LONGINT;
+    else if (type == VerilatedTraceSigType::BYTE) varType = FST_VT_SV_BYTE;
+    else if (type == VerilatedTraceSigType::EVENT) varType = FST_VT_VCD_EVENT;
+    else if (type == VerilatedTraceSigType::TIME) varType = FST_VT_VCD_TIME;
+    else { assert(0); /* Unreachable */ }
+    // clang-format on
+
     const auto it = vlstd::as_const(m_code2symbol).find(code);
     if (it == m_code2symbol.end()) {  // New
         m_code2symbol[code]
-            = fstWriterCreateVar(m_fst, vartype, vardir, bits, name_str.c_str(), 0);
+            = fstWriterCreateVar(m_fst, varType, varDir, bits, name_str.c_str(), 0);
     } else {  // Alias
-        fstWriterCreateVar(m_fst, vartype, vardir, bits, name_str.c_str(), it->second);
+        fstWriterCreateVar(m_fst, varType, varDir, bits, name_str.c_str(), it->second);
     }
 }
 
 void VerilatedFst::declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                             fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
+                             VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                             VerilatedTraceSigType type, bool array, int arraynum) {
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, false, 0, 0);
 }
 void VerilatedFst::declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                           fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 0, 0);
+                           VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                           VerilatedTraceSigType type, bool array, int arraynum) {
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, false, 0, 0);
 }
 void VerilatedFst::declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                           fstVarDir vardir, fstVarType vartype, bool array, int arraynum, int msb,
+                           VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                           VerilatedTraceSigType type, bool array, int arraynum, int msb,
                            int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                            fstVarDir vardir, fstVarType vartype, bool array, int arraynum,
-                            int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
+                            VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                            VerilatedTraceSigType type, bool array, int arraynum, int msb,
+                            int lsb) {
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                             fstVarDir vardir, fstVarType vartype, bool array, int arraynum,
-                             int msb, int lsb) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, true, msb, lsb);
+                             VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                             VerilatedTraceSigType type, bool array, int arraynum, int msb,
+                             int lsb) {
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, true, msb, lsb);
 }
 void VerilatedFst::declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
-                              fstVarDir vardir, fstVarType vartype, bool array, int arraynum) {
-    declare(code, name, dtypenum, vardir, vartype, array, arraynum, false, 63, 0);
+                              VerilatedTraceSigDirection direction, VerilatedTraceSigKind kind,
+                              VerilatedTraceSigType type, bool array, int arraynum) {
+    declare(code, name, dtypenum, direction, kind, type, array, arraynum, false, 63, 0);
 }
 
 //=============================================================================
diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h
index 2f659db91..c4a65cfb2 100644
--- a/include/verilated_fst_c.h
+++ b/include/verilated_fst_c.h
@@ -24,13 +24,14 @@
 #include "verilated.h"
 #include "verilated_trace.h"
 
-#include "gtkwave/fstapi.h"
-
 #include <list>
 #include <map>
 #include <string>
 #include <vector>
 
+typedef uint32_t vlFstHandle;
+typedef uint32_t vlFstEnumHandle;
+
 class VerilatedFstBuffer;
 
 //=============================================================================
@@ -49,18 +50,22 @@ private:
     // FST specific internals
 
     void* m_fst = nullptr;
-    std::map<uint32_t, fstHandle> m_code2symbol;
-    std::map<int, fstEnumHandle> m_local2fstdtype;
-    std::list<std::string> m_curScope;
-    fstHandle* m_symbolp = nullptr;  // same as m_code2symbol, but as an array
+    std::map<uint32_t, vlFstHandle> m_code2symbol;
+    std::map<int, vlFstEnumHandle> m_local2fstdtype;
+    vlFstHandle* m_symbolp = nullptr;  // same as m_code2symbol, but as an array
     char* m_strbufp = nullptr;  // String buffer long enough to hold maxBits() chars
 
     bool m_useFstWriterThread = false;  // Whether to use the separate FST writer thread
 
+    // Prefixes to add to signal names/scope types
+    std::vector<std::pair<std::string, VerilatedTracePrefixType>> m_prefixStack{
+        {"", VerilatedTracePrefixType::SCOPE_MODULE}};
+
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedFst);
-    void declare(uint32_t code, const char* name, int dtypenum, fstVarDir vardir,
-                 fstVarType vartype, bool array, int arraynum, bool bussed, int msb, int lsb);
+    void declare(uint32_t code, const char* name, int dtypenum, VerilatedTraceSigDirection,
+                 VerilatedTraceSigKind, VerilatedTraceSigType, bool array, int arraynum,
+                 bool bussed, int msb, int lsb);
 
 protected:
     //=========================================================================
@@ -101,18 +106,27 @@ public:
     //=========================================================================
     // Internal interface to Verilator generated code
 
-    void declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                   fstVarType vartype, bool array, int arraynum);
-    void declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                 fstVarType vartype, bool array, int arraynum);
-    void declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                 fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                  fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                   fstVarType vartype, bool array, int arraynum, int msb, int lsb);
-    void declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum, fstVarDir vardir,
-                    fstVarType vartype, bool array, int arraynum);
+    void pushPrefix(const std::string&, VerilatedTracePrefixType);
+    void popPrefix();
+
+    void declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                   VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                   bool array, int arraynum);
+    void declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                 VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                 bool array, int arraynum);
+    void declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                 VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                 bool array, int arraynum, int msb, int lsb);
+    void declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                  VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                  bool array, int arraynum, int msb, int lsb);
+    void declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                   VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                   bool array, int arraynum, int msb, int lsb);
+    void declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                    VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                    bool array, int arraynum);
 
     void declDTypeEnum(int dtypenum, const char* name, uint32_t elements, unsigned int minValbits,
                        const char** itemNamesp, const char** itemValuesp);
@@ -149,7 +163,7 @@ class VerilatedFstBuffer VL_NOT_FINAL {
     // The FST file handle
     void* const m_fst = m_owner.m_fst;
     // code to fstHande map, as an array
-    const fstHandle* const m_symbolp = m_owner.m_symbolp;
+    const vlFstHandle* const m_symbolp = m_owner.m_symbolp;
     // String buffer long enough to hold maxBits() chars
     char* const m_strbufp = m_owner.m_strbufp;
 
diff --git a/include/verilated_trace.h b/include/verilated_trace.h
index 61e52cdd5..f810db099 100644
--- a/include/verilated_trace.h
+++ b/include/verilated_trace.h
@@ -25,7 +25,6 @@
 // clang-format off
 
 #include "verilated.h"
-#include "verilated_trace_defs.h"
 
 #include <bitset>
 #include <condition_variable>
@@ -46,6 +45,54 @@ class VerilatedTraceBuffer;
 template <class T_Buffer>
 class VerilatedTraceOffloadBuffer;
 
+//=============================================================================
+// Common enumerations
+
+enum class VerilatedTracePrefixType : uint32_t {
+    // Note: Entries must match VTracePrefixType (by name, not necessarily by value)
+    ARRAY_PACKED,
+    ARRAY_UNPACKED,
+    SCOPE_MODULE,
+    SCOPE_INTERFACE,
+    STRUCT_PACKED,
+    STRUCT_UNPACKED,
+    UNION_PACKED
+};
+
+// Direction attribute for ports
+enum class VerilatedTraceSigDirection : uint32_t {
+    NONE,
+    INPUT,
+    OUTPUT,
+    INOUT,
+};
+
+// Kind of signal. Similar to nettype but with a few more alternatives
+enum class VerilatedTraceSigKind : uint32_t {
+    PARAMETER,
+    SUPPLY0,
+    SUPPLY1,
+    TRI,
+    TRI0,
+    TRI1,
+    WIRE,
+    VAR,
+};
+
+// Base data type of signal
+enum class VerilatedTraceSigType : uint32_t {
+    DOUBLE,
+    INTEGER,
+    BIT,
+    LOGIC,
+    INT,
+    SHORTINT,
+    LONGINT,
+    BYTE,
+    EVENT,
+    TIME,
+};
+
 //=============================================================================
 // Offloaded tracing
 
@@ -229,9 +276,8 @@ private:
     uint32_t m_nextCode = 0;  // Next code number to assign
     uint32_t m_numSignals = 0;  // Number of distinct signals
     uint32_t m_maxBits = 0;  // Number of bits in the widest signal
-    std::vector<std::string> m_namePrefixStack{""};  // Path prefixes to add to signal names
+    // TODO: Should keep this as a Trie, that is how it's accessed all the time.
     std::vector<std::pair<int, std::string>> m_dumpvars;  // dumpvar() entries
-    char m_scopeEscape = '.';
     double m_timeRes = 1e-9;  // Time resolution (ns/ms etc)
     double m_timeUnit = 1e-0;  // Time units (ns/ms etc)
     uint64_t m_timeLastDump = 0;  // Last time we did a dump
@@ -307,14 +353,7 @@ protected:
     void traceInit() VL_MT_UNSAFE;
 
     // Declare new signal and return true if enabled
-    bool declCode(uint32_t code, const char* namep, uint32_t bits, bool tri);
-
-    // Is this an escape?
-    bool isScopeEscape(char c) { return std::isspace(c) || c == m_scopeEscape; }
-    // Character that splits scopes.  Note whitespace are ALWAYS escapes.
-    char scopeEscape() { return m_scopeEscape; }
-    // Prefix to assume in signal declarations
-    const std::string& namePrefix() const { return m_namePrefixStack.back(); }
+    bool declCode(uint32_t code, const std::string& declName, uint32_t bits);
 
     void closeBase();
     void flushBase();
@@ -322,6 +361,13 @@ protected:
     bool offload() const { return m_offload; }
     bool parallel() const { return m_parallel; }
 
+    // Return last ' ' separated word. Assumes string does not end in ' '.
+    static std::string lastWord(const std::string& str) {
+        const size_t idx = str.rfind(' ');
+        if (idx == std::string::npos) return str;
+        return str.substr(idx + 1);
+    }
+
     //=========================================================================
     // Virtual functions to be provided by the format specific implementation
 
@@ -375,11 +421,6 @@ public:
     void addChgCb(dumpCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
     void addChgCb(dumpOffloadCb_t cb, uint32_t fidx, void* userp) VL_MT_SAFE;
     void addCleanupCb(cleanupCb_t cb, void* userp) VL_MT_SAFE;
-
-    void scopeEscape(char flag) { m_scopeEscape = flag; }
-
-    void pushNamePrefix(const std::string&);
-    void popNamePrefix(unsigned count = 1);
 };
 
 //=============================================================================
diff --git a/include/verilated_trace_defs.h b/include/verilated_trace_defs.h
deleted file mode 100644
index ad3c62054..000000000
--- a/include/verilated_trace_defs.h
+++ /dev/null
@@ -1,42 +0,0 @@
-// -*- mode: C++; c-file-style: "cc-mode" -*-
-//=============================================================================
-//
-// Code available from: https://verilator.org
-//
-// Copyright 2001-2023 by Wilson Snyder. This program is free software; you
-// can redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License Version 3 or the Perl Artistic License
-// Version 2.0.
-// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-//
-//=============================================================================
-///
-/// \file
-/// \brief Verilated tracing types
-///
-/// This file is not part of the Verilated public-facing API.
-/// It is only for internal use by Verilated tracing routines.
-///
-//=============================================================================
-#ifndef VERILATOR_VERILATED_TRACE_DEFS_H_
-#define VERILATOR_VERILATED_TRACE_DEFS_H_
-
-// Verilator tracing scope types:
-// The values should match FST_ST_VCD_* from fstScopeType in gtkwave/fstapi.h
-// verilated_fst_c.cpp contains assertions to enforce this
-enum VltTraceScope {
-    VLT_TRACE_SCOPE_MODULE = 0,
-    VLT_TRACE_SCOPE_TASK = 1,
-    VLT_TRACE_SCOPE_FUNCTION = 2,
-    VLT_TRACE_SCOPE_BEGIN = 3,
-    VLT_TRACE_SCOPE_FORK = 4,
-    VLT_TRACE_SCOPE_GENERATE = 5,
-    VLT_TRACE_SCOPE_STRUCT = 6,
-    VLT_TRACE_SCOPE_UNION = 7,
-    VLT_TRACE_SCOPE_CLASS = 8,
-    VLT_TRACE_SCOPE_INTERFACE = 9,
-    VLT_TRACE_SCOPE_PACKAGE = 10,
-    VLT_TRACE_SCOPE_PROGRAM = 11
-};
-
-#endif  // guard
diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index 183117521..19dc1cb56 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -378,13 +378,12 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::traceInit() VL_MT_UNSAFE {
 }
 
 template <>
-bool VerilatedTrace<VL_SUB_T, VL_BUF_T>::declCode(uint32_t code, const char* namep, uint32_t bits,
-                                                  bool tri) {
+bool VerilatedTrace<VL_SUB_T, VL_BUF_T>::declCode(uint32_t code, const std::string& declName,
+                                                  uint32_t bits) {
     if (VL_UNCOVERABLE(!code)) {
         VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: internal trace problem, code 0 is illegal");
     }
     // To keep it simple, this is O(enables * signals), but we expect few enables
-    std::string declName = namePrefix() + namep;
     bool enabled = false;
     if (m_dumpvars.empty()) enabled = true;
     for (const auto& item : m_dumpvars) {
@@ -410,10 +409,7 @@ bool VerilatedTrace<VL_SUB_T, VL_BUF_T>::declCode(uint32_t code, const char* nam
         break;
     }
 
-    // Note: The tri-state flag is not used by Verilator, but is here for
-    // compatibility with some foreign code.
     int codesNeeded = VL_WORDS_I(bits);
-    if (tri) codesNeeded *= 2;
     m_nextCode = std::max(m_nextCode, code + codesNeeded);
     ++m_numSignals;
     m_maxBits = std::max(m_maxBits, bits);
@@ -737,17 +733,6 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::addCleanupCb(cleanupCb_t cb, void* user
     addCallbackRecord(m_cleanupCbs, CallbackRecord{cb, userp});
 }
 
-template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::pushNamePrefix(const std::string& prefix) {
-    m_namePrefixStack.push_back(m_namePrefixStack.back() + prefix);
-}
-
-template <>
-void VerilatedTrace<VL_SUB_T, VL_BUF_T>::popNamePrefix(unsigned count) {
-    while (count--) m_namePrefixStack.pop_back();
-    assert(!m_namePrefixStack.empty());
-}
-
 //=========================================================================
 // Primitives converting binary values to strings...
 
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index 282052528..8ac37eb1b 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -112,7 +112,19 @@ void VerilatedVcd::open(const char* filename) VL_MT_SAFE_EXCLUDES(m_mutex) {
     openNextImp(m_rolloverSize != 0);
     if (!isOpen()) return;
 
-    dumpHeader();
+    printStr("$version Generated by VerilatedVcd $end\n");
+    printStr("$timescale ");
+    printStr(timeResStr().c_str());  // lintok-begin-on-ref
+    printStr(" $end\n");
+
+    // Scope and signal definitions
+    assert(m_indent == 0);
+    ++m_indent;
+    Super::traceInit();
+    --m_indent;
+    assert(m_indent == 0);
+
+    printStr("$enddefinitions $end\n\n\n");
 
     // When using rollover, the first chunk contains the header only.
     if (m_rolloverSize) openNextImp(true);
@@ -176,49 +188,14 @@ bool VerilatedVcd::preChangeDump() {
 
 void VerilatedVcd::emitTimeChange(uint64_t timeui) {
     printStr("#");
-    printQuad(timeui);
+    const std::string str = std::to_string(timeui);
+    printStr(str.c_str());
     printStr("\n");
 }
 
-void VerilatedVcd::makeNameMap() {
-    // Take signal information from each module and build m_namemapp
-    deleteNameMap();
-    m_namemapp = new NameMap;
-
-    Super::traceInit();
-
-    // Though not speced, it's illegal to generate a vcd with signals
-    // not under any module - it crashes at least two viewers.
-    // If no scope was specified, prefix everything with a "top"
-    // This comes from user instantiations with no name - IE Vtop("").
-    bool nullScope = false;
-    for (const auto& i : *m_namemapp) {
-        const std::string& hiername = i.first;
-        if (!hiername.empty() && hiername[0] == '\t') nullScope = true;
-    }
-    if (nullScope) {
-        NameMap* const newmapp = new NameMap;
-        for (const auto& i : *m_namemapp) {
-            const std::string& hiername = i.first;
-            const std::string& decl = i.second;
-            std::string newname{"top"};
-            if (hiername[0] != '\t') newname += ' ';
-            newname += hiername;
-            newmapp->emplace(newname, decl);
-        }
-        deleteNameMap();
-        m_namemapp = newmapp;
-    }
-}
-
-void VerilatedVcd::deleteNameMap() {
-    if (m_namemapp) VL_DO_CLEAR(delete m_namemapp, m_namemapp = nullptr);
-}
-
 VerilatedVcd::~VerilatedVcd() {
     close();
     if (m_wrBufp) VL_DO_CLEAR(delete[] m_wrBufp, m_wrBufp = nullptr);
-    deleteNameMap();
     if (m_filep && m_fileNewed) VL_DO_CLEAR(delete m_filep, m_filep = nullptr);
     if (parallel()) {
         assert(m_numBuffers == m_freeBuffers.size());
@@ -271,13 +248,6 @@ void VerilatedVcd::printStr(const char* str) {
     }
 }
 
-void VerilatedVcd::printQuad(uint64_t n) {
-    constexpr size_t LEN_STR_QUAD = 40;
-    char buf[LEN_STR_QUAD];
-    VL_SNPRINTF(buf, LEN_STR_QUAD, "%" PRIu64, n);
-    printStr(buf);
-}
-
 void VerilatedVcd::bufferResize(size_t minsize) {
     // minsize is size of largest write.  We buffer at least 8 times as much data,
     // writing when we are 3/4 full (with thus 2*minsize remaining free)
@@ -326,127 +296,59 @@ void VerilatedVcd::bufferFlush() VL_MT_UNSAFE_ONE {
     m_writep = m_wrBufp;
 }
 
-//=============================================================================
-// VCD string code
-
-char* VerilatedVcd::writeCode(char* writep, uint32_t code) {
-    *writep++ = static_cast<char>('!' + code % 94);
-    code /= 94;
-    while (code) {
-        --code;
-        *writep++ = static_cast<char>('!' + code % 94);
-        code /= 94;
-    }
-    return writep;
-}
-
 //=============================================================================
 // Definitions
 
 void VerilatedVcd::printIndent(int level_change) {
-    if (level_change < 0) m_modDepth += level_change;
-    assert(m_modDepth >= 0);
-    for (int i = 0; i < m_modDepth; i++) printStr(" ");
-    if (level_change > 0) m_modDepth += level_change;
+    if (level_change < 0) m_indent += level_change;
+    for (int i = 0; i < m_indent; i++) printStr(" ");
+    if (level_change > 0) m_indent += level_change;
 }
 
-void VerilatedVcd::dumpHeader() {
-    printStr("$version Generated by VerilatedVcd $end\n");
-
-    // Verilator used to put in a $date here.  Although $date is shown in
-    // IEEE examples, and it is common in VCD writers, VCD readers don't
-    // seem to care about it.  Thus, we omit the $date so artifacts are
-    // more likely to be reproducible.  If use cases show up that require
-    // the $date command to be present, it could be re-added with support
-    // for the SOURCE_DATE_EPOCH hook.
-
-    printStr("$timescale ");
-    printStr(timeResStr().c_str());  // lintok-begin-on-ref
-    printStr(" $end\n");
-
-    makeNameMap();
-
-    // Signal header
-    assert(m_modDepth == 0);
-    printIndent(1);
-    printStr("\n");
-
-    // We detect the spaces in module names to determine hierarchy.  This
-    // allows signals to be declared without fixed ordering, which is
-    // required as Verilog signals might be separately declared from
-    // SC module signals.
-
-    // Print the signal names
-    const char* lastName = "";
-    for (const auto& i : *m_namemapp) {
-        const std::string& hiernamestr = i.first;
-        const std::string& decl = i.second;
-
-        // Determine difference between the old and new names
-        const char* const hiername = hiernamestr.c_str();
-        const char* lp = lastName;
-        const char* np = hiername;
-        lastName = hiername;
-
-        // Skip common prefix, it must break at a space or tab
-        for (; *np && (*np == *lp); np++, lp++) {}
-        while (np != hiername && *np && *np != ' ' && *np != '\t') {
-            --np;
-            --lp;
-        }
-        // printf("hier %s\n  lp=%s\n  np=%s\n",hiername,lp,np);
-
-        // Any extra spaces in last name are scope ups we need to do
-        bool first = true;
-        for (; *lp; lp++) {
-            if (*lp == ' ' || (first && *lp != '\t')) {
-                printIndent(-1);
-                printStr("$upscope $end\n");
-            }
-            first = false;
-        }
-
-        // Any new spaces are scope downs we need to do
-        while (*np) {
-            if (*np == ' ') np++;
-            if (*np == '\t') break;  // tab means signal name starts
-            printIndent(1);
-            printStr("$scope module ");
-
-            for (; *np && *np != ' ' && *np != '\t'; np++) {
-                if (*np == '[') {
-                    printStr("[");
-                } else if (*np == ']') {
-                    printStr("]");
-                } else {
-                    *m_writep++ = *np;
-                }
-            }
-            printStr(" $end\n");
-        }
-
-        printIndent(0);
-        printStr(decl.c_str());
+void VerilatedVcd::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
+    std::string newPrefix = m_prefixStack.back().first + name;
+    switch (type) {
+    case VerilatedTracePrefixType::SCOPE_MODULE:
+    case VerilatedTracePrefixType::SCOPE_INTERFACE:
+    case VerilatedTracePrefixType::STRUCT_PACKED:
+    case VerilatedTracePrefixType::STRUCT_UNPACKED:
+    case VerilatedTracePrefixType::UNION_PACKED: {
+        printIndent(1);
+        printStr("$scope module ");
+        const std::string n = lastWord(newPrefix);
+        printStr(n.c_str());
+        printStr(" $end\n");
+        newPrefix += ' ';
+        break;
     }
+    default: break;
+    }
+    m_prefixStack.emplace_back(newPrefix, type);
+}
 
-    while (m_modDepth > 1) {
+void VerilatedVcd::popPrefix() {
+    switch (m_prefixStack.back().second) {
+    case VerilatedTracePrefixType::SCOPE_MODULE:
+    case VerilatedTracePrefixType::SCOPE_INTERFACE:
+    case VerilatedTracePrefixType::STRUCT_PACKED:
+    case VerilatedTracePrefixType::STRUCT_UNPACKED:
+    case VerilatedTracePrefixType::UNION_PACKED:
         printIndent(-1);
         printStr("$upscope $end\n");
+        break;
+    default: break;
     }
-
-    printIndent(-1);
-    printStr("$enddefinitions $end\n\n\n");
-    assert(m_modDepth == 0);
-
-    // Reclaim storage
-    deleteNameMap();
+    m_prefixStack.pop_back();
+    assert(!m_prefixStack.empty());
 }
 
 void VerilatedVcd::declare(uint32_t code, const char* name, const char* wirep, bool array,
-                           int arraynum, bool tri, bool bussed, int msb, int lsb) {
+                           int arraynum, bool bussed, int msb, int lsb) {
     const int bits = ((msb > lsb) ? (msb - lsb) : (lsb - msb)) + 1;
 
-    const bool enabled = Super::declCode(code, name, bits, tri);
+    const std::string hierarchicalName = m_prefixStack.back().first + name;
+
+    const bool enabled = Super::declCode(code, hierarchicalName, bits);
 
     if (m_suffixes.size() <= nextCode() * VL_TRACE_SUFFIX_ENTRY_SIZE) {
         m_suffixes.resize(nextCode() * VL_TRACE_SUFFIX_ENTRY_SIZE * 2, 0);
@@ -459,90 +361,89 @@ void VerilatedVcd::declare(uint32_t code, const char* name, const char* wirep, b
 
     if (!enabled) return;
 
-    // Split name into basename
-    // Spaces and tabs aren't legal in VCD signal names, so:
-    // Space separates each level of scope
-    // Tab separates final scope from signal name
-    // Tab sorts before spaces, so signals nicely will print before scopes
-    // Note the hiername may be nothing, if so we'll add "\t{name}"
-    std::string nameasstr = namePrefix() + name;
-    std::string hiername;
-    std::string basename;
-    for (const char* cp = nameasstr.c_str(); *cp; cp++) {
-        if (isScopeEscape(*cp)) {
-            // Ahh, we've just read a scope, not a basename
-            if (!hiername.empty()) hiername += " ";
-            hiername += basename;
-            basename = "";
-        } else {
-            basename += *cp;
-        }
+    // Create the VCD code and build the suffix array entry
+    char vcdCode[VL_TRACE_SUFFIX_ENTRY_SIZE];
+    {
+        // Render the VCD code
+        char* vcdCodeWritep = vcdCode;
+        uint32_t codeEnc = code;
+        do {
+            *vcdCodeWritep++ = static_cast<char>('!' + codeEnc % 94);
+            codeEnc /= 94;
+        } while (codeEnc--);
+        *vcdCodeWritep = '\0';
+        const size_t vcdCodeLength = vcdCodeWritep - vcdCode;
+        assert(vcdCodeLength <= VL_TRACE_MAX_VCD_CODE_SIZE);
+        // Build suffix array entry
+        char* const entryBeginp = &m_suffixes[code * VL_TRACE_SUFFIX_ENTRY_SIZE];
+        entryBeginp[0] = ' ';  // Separator
+        // 1 bit values don't have a ' ' separator between value and string code
+        char* entryWritep = bits == 1 ? entryBeginp : entryBeginp + 1;
+        // Use memcpy as we know the size, and strcpy is flagged unsafe
+        std::memcpy(entryWritep, vcdCode, vcdCodeLength);
+        entryWritep += vcdCodeLength;
+        // Line terminator
+        *entryWritep++ = '\n';
+        // Set length of suffix (used to increment write pointer)
+        assert(entryWritep <= entryBeginp + VL_TRACE_SUFFIX_ENTRY_SIZE - 1);
+        entryBeginp[VL_TRACE_SUFFIX_ENTRY_SIZE - 1] = static_cast<char>(entryWritep - entryBeginp);
     }
-    hiername += "\t" + basename;
 
-    // Print reference
+    // Assemble the declaration
     std::string decl = "$var ";
-    decl += wirep;  // usually "wire"
-
-    constexpr size_t bufsize = 1000;
-    char buf[bufsize];
-    VL_SNPRINTF(buf, bufsize, " %2d ", bits);
-    decl += buf;
-    // Add string code to decl
-    char* const endp = writeCode(buf, code);
-    *endp = '\0';
-    decl += buf;
-    // Build suffix array entry
-    char* const entryp = &m_suffixes[code * VL_TRACE_SUFFIX_ENTRY_SIZE];
-    const size_t length = endp - buf;
-    assert(length <= VL_TRACE_MAX_VCD_CODE_SIZE);
-    // 1 bit values don't have a ' ' separator between value and string code
-    const bool isBit = bits == 1;
-    entryp[0] = ' ';  // Separator
-    // Use memcpy as we checked size above, and strcpy is flagged unsafe
-    std::memcpy(entryp + !isBit, buf,
-                std::strlen(buf));  // Code (overwrite separator if isBit)
-    entryp[length + !isBit] = '\n';  // Replace '\0' with line termination '\n'
-    // Set length of suffix (used to increment write pointer)
-    entryp[VL_TRACE_SUFFIX_ENTRY_SIZE - 1] = static_cast<char>(length + !isBit + 1);
-    decl += " ";
-    decl += basename;
+    decl += wirep;
+    decl += ' ';
+    decl += std::to_string(bits);
+    decl += ' ';
+    decl += vcdCode;
+    decl += ' ';
+    decl += lastWord(hierarchicalName);
     if (array) {
-        VL_SNPRINTF(buf, bufsize, "[%d]", arraynum);
-        decl += buf;
-        hiername += buf;
+        decl += '[';
+        decl += std::to_string(arraynum);
+        decl += ']';
     }
     if (bussed) {
-        VL_SNPRINTF(buf, bufsize, " [%d:%d]", msb, lsb);
-        decl += buf;
+        decl += " [";
+        decl += std::to_string(msb);
+        decl += ':';
+        decl += std::to_string(lsb);
+        decl += ']';
     }
     decl += " $end\n";
-    m_namemapp->emplace(hiername, decl);
+    printIndent(0);
+    printStr(decl.c_str());
 }
 
-void VerilatedVcd::declEvent(uint32_t code, uint32_t fidx, const char* name, bool array,
-                             int arraynum) {
-    declare(code, name, "event", array, arraynum, false, false, 0, 0);
+void VerilatedVcd::declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                             VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                             VerilatedTraceSigType, bool array, int arraynum) {
+    declare(code, name, "event", array, arraynum, false, 0, 0);
 }
-void VerilatedVcd::declBit(uint32_t code, uint32_t fidx, const char* name, bool array,
-                           int arraynum) {
-    declare(code, name, "wire", array, arraynum, false, false, 0, 0);
+void VerilatedVcd::declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                           VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                           VerilatedTraceSigType, bool array, int arraynum) {
+    declare(code, name, "wire", array, arraynum, false, 0, 0);
 }
-void VerilatedVcd::declBus(uint32_t code, uint32_t fidx, const char* name, bool array,
-                           int arraynum, int msb, int lsb) {
-    declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
+void VerilatedVcd::declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                           VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                           VerilatedTraceSigType, bool array, int arraynum, int msb, int lsb) {
+    declare(code, name, "wire", array, arraynum, true, msb, lsb);
 }
-void VerilatedVcd::declQuad(uint32_t code, uint32_t fidx, const char* name, bool array,
-                            int arraynum, int msb, int lsb) {
-    declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
+void VerilatedVcd::declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                            VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                            VerilatedTraceSigType, bool array, int arraynum, int msb, int lsb) {
+    declare(code, name, "wire", array, arraynum, true, msb, lsb);
 }
-void VerilatedVcd::declArray(uint32_t code, uint32_t fidx, const char* name, bool array,
-                             int arraynum, int msb, int lsb) {
-    declare(code, name, "wire", array, arraynum, false, true, msb, lsb);
+void VerilatedVcd::declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                             VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                             VerilatedTraceSigType, bool array, int arraynum, int msb, int lsb) {
+    declare(code, name, "wire", array, arraynum, true, msb, lsb);
 }
-void VerilatedVcd::declDouble(uint32_t code, uint32_t fidx, const char* name, bool array,
-                              int arraynum) {
-    declare(code, name, "real", array, arraynum, false, false, 63, 0);
+void VerilatedVcd::declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                              VerilatedTraceSigDirection, VerilatedTraceSigKind,
+                              VerilatedTraceSigType, bool array, int arraynum) {
+    declare(code, name, "real", array, arraynum, false, 63, 0);
 }
 
 //=============================================================================
diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h
index 1e0ddcec4..67b077364 100644
--- a/include/verilated_vcd_c.h
+++ b/include/verilated_vcd_c.h
@@ -24,7 +24,6 @@
 #include "verilated.h"
 #include "verilated_trace.h"
 
-#include <map>
 #include <string>
 #include <vector>
 
@@ -51,7 +50,7 @@ private:
     bool m_isOpen = false;  // True indicates open file
     std::string m_filename;  // Filename we're writing to (if open)
     uint64_t m_rolloverSize = 0;  // File size to rollover at
-    int m_modDepth = 0;  // Depth of module hierarchy
+    unsigned m_indent = 0;  // Indentation depth
 
     char* m_wrBufp;  // Output buffer
     char* m_wrFlushp;  // Output buffer flush trigger location
@@ -62,8 +61,9 @@ private:
 
     std::vector<char> m_suffixes;  // VCD line end string codes + metadata
 
-    using NameMap = std::map<const std::string, const std::string>;
-    NameMap* m_namemapp = nullptr;  // List of names for the header
+    // Prefixes to add to signal names/scope types
+    std::vector<std::pair<std::string, VerilatedTracePrefixType>> m_prefixStack{
+        {"", VerilatedTracePrefixType::SCOPE_MODULE}};
 
     // Vector of free trace buffers as (pointer, size) pairs.
     std::vector<std::pair<char*, size_t>> m_freeBuffers;
@@ -79,18 +79,10 @@ private:
     void openNextImp(bool incFilename);
     void closePrev();
     void closeErr();
-    void makeNameMap();
-    void deleteNameMap();
     void printIndent(int level_change);
     void printStr(const char* str);
-    void printQuad(uint64_t n);
-    void printTime(uint64_t timeui);
     void declare(uint32_t code, const char* name, const char* wirep, bool array, int arraynum,
-                 bool tri, bool bussed, int msb, int lsb);
-
-    void dumpHeader();
-
-    static char* writeCode(char* writep, uint32_t code);
+                 bool bussed, int msb, int lsb);
 
     // CONSTRUCTORS
     VL_UNCOPYABLE(VerilatedVcd);
@@ -140,15 +132,27 @@ public:
     //=========================================================================
     // Internal interface to Verilator generated code
 
-    void declEvent(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
-    void declBit(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
-    void declBus(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum, int msb,
-                 int lsb);
-    void declQuad(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum,
-                  int msb, int lsb);
-    void declArray(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum,
-                   int msb, int lsb);
-    void declDouble(uint32_t code, uint32_t fidx, const char* name, bool array, int arraynum);
+    void pushPrefix(const std::string&, VerilatedTracePrefixType);
+    void popPrefix();
+
+    void declEvent(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                   VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                   bool array, int arraynum);
+    void declBit(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                 VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                 bool array, int arraynum);
+    void declBus(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                 VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                 bool array, int arraynum, int msb, int lsb);
+    void declQuad(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                  VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                  bool array, int arraynum, int msb, int lsb);
+    void declArray(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                   VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                   bool array, int arraynum, int msb, int lsb);
+    void declDouble(uint32_t code, uint32_t fidx, const char* name, int dtypenum,
+                    VerilatedTraceSigDirection, VerilatedTraceSigKind, VerilatedTraceSigType,
+                    bool array, int arraynum);
 };
 
 #ifndef DOXYGEN
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 1f58b767f..75cd1e151 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -675,6 +675,39 @@ public:
         default: return false;
         }
     }
+
+    const char* traceSigType() const {
+        // VerilatedTraceSigType to used in trace signal declaration
+        static const char* const lut[] = {
+            /* UNKNOWN:                   */ "",  // Should not be traced
+            /* BIT:                       */ "BIT",
+            /* BYTE:                      */ "BYTE",
+            /* CHANDLE:                   */ "",
+            /* EVENT:                     */ "EVENT",
+            /* INT:                       */ "INT",
+            /* INTEGER:                   */ "INTEGER",
+            /* LOGIC:                     */ "LOGIC",
+            /* LONGINT:                   */ "LONGINT",
+            /* DOUBLE:                    */ "DOUBLE",
+            /* SHORTINT:                  */ "SHORTINT",
+            /* TIME:                      */ "TIME",
+            /* STRING:                    */ "",
+            /* UNTYPED:                   */ "",  // Should not be traced
+            /* SCOPEPTR:                  */ "",  // Should not be traced
+            /* CHARPTR:                   */ "",  // Should not be traced
+            /* MTASKSTATE:                */ "",  // Should not be traced
+            /* TRIGGERVEC:                */ "",  // Should not be traced
+            /* DELAY_SCHEDULER:           */ "",  // Should not be traced
+            /* TRIGGER_SCHEDULER:         */ "",  // Should not be traced
+            /* DYNAMIC_TRIGGER_SCHEDULER: */ "",  // Should not be traced
+            /* FORK_SYNC:                 */ "",  // Should not be traced
+            /* PROCESS_REFERENCE:         */ "",  // Should not be traced
+            /* UINT32:                    */ "BIT",
+            /* UINT64:                    */ "BIT",
+            /* LOGIC_IMPLICIT:            */ "",  // Should not be traced
+        };
+        return lut[m_e];
+    }
 };
 constexpr bool operator==(const VBasicDTypeKwd& lhs, const VBasicDTypeKwd& rhs) VL_MT_SAFE {
     return lhs.m_e == rhs.m_e;
@@ -873,6 +906,32 @@ public:
         return (m_e == VAR || m_e == GPARAM || m_e == LPARAM || m_e == PORT || m_e == WIRE
                 || m_e == TRI0 || m_e == TRI1);
     }
+
+    const char* traceSigKind() const {
+        // VerilatedTraceSigKind to used in trace signal declaration
+        static const char* const lut[] = {
+            /* UNKNOWN:      */ "",  // Should not be traced
+            /* GPARAM:       */ "PARAMETER",
+            /* LPARAM:       */ "PARAMETER",
+            /* GENVAR:       */ "PARAMETER",
+            /* VAR:          */ "VAR",
+            /* SUPPLY0:      */ "SUPPLY0",
+            /* SUPPLY1:      */ "SUPPLY1",
+            /* WIRE:         */ "WIRE",
+            /* WREAL:        */ "WIRE",
+            /* TRIWIRE:      */ "TRI",
+            /* TRI0:         */ "TRI0",
+            /* TRI1:         */ "TRI1",
+            /* PORT:         */ "WIRE",
+            /* BLOCKTEMP:    */ "VAR",
+            /* MODULETEMP:   */ "VAR",
+            /* STMTTEMP:     */ "VAR",
+            /* XTEMP:        */ "VAR",
+            /* IFACEREF:     */ "",  // Should not be traced directly
+            /* MEMBER:       */ "VAR",
+        };
+        return lut[m_e];
+    }
 };
 constexpr bool operator==(const VVarType& lhs, const VVarType& rhs) VL_MT_SAFE {
     return lhs.m_e == rhs.m_e;
@@ -1277,6 +1336,45 @@ inline std::ostream& operator<<(std::ostream& os, const VTraceType& rhs) {
     return os << rhs.ascii();
 }
 
+//######################################################################
+
+class VTracePrefixType final {
+public:
+    enum en : uint8_t {
+        // Note: Entries must match VerilatedTracePrefixType
+        ARRAY_PACKED,
+        ARRAY_UNPACKED,
+        SCOPE_MODULE,
+        SCOPE_INTERFACE,
+        STRUCT_PACKED,
+        STRUCT_UNPACKED,
+        UNION_PACKED,
+    };
+    enum en m_e;
+    // cppcheck-suppress noExplicitConstructor
+    constexpr VTracePrefixType(en _e)
+        : m_e{_e} {}
+    constexpr operator en() const { return m_e; }
+    const char* ascii() const {
+        static const char* const names[]
+            = {"ARRAY_PACKED",  "ARRAY_UNPACKED",  "SCOPE_MODULE", "SCOPE_INTERFACE",
+               "STRUCT_PACKED", "STRUCT_UNPACKED", "UNION_PACKED"};
+        return names[m_e];
+    }
+};
+constexpr bool operator==(const VTracePrefixType& lhs, const VTracePrefixType& rhs) {
+    return lhs.m_e == rhs.m_e;
+}
+constexpr bool operator==(const VTracePrefixType& lhs, VTracePrefixType::en rhs) {
+    return lhs.m_e == rhs;
+}
+constexpr bool operator==(VTracePrefixType::en lhs, const VTracePrefixType& rhs) {
+    return lhs == rhs.m_e;
+}
+inline std::ostream& operator<<(std::ostream& os, const VTracePrefixType& rhs) {
+    return os << rhs.ascii();
+}
+
 // ######################################################################
 
 class VCastable final {
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index e8eabda41..d3f0aee1e 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -773,7 +773,7 @@ class AstCell final : public AstNode {
     // @astgen op1 := pinsp : List[AstPin] // List of port assignments
     // @astgen op2 := paramsp : List[AstPin] // List of parameter assignments
     // @astgen op3 := rangep : Optional[AstRange] // Range for arrayed instances
-    // @astgen op4 := intfRefsp : List[AstIntfRef] // List of interface references
+    // @astgen op4 := intfRefsp : List[AstIntfRef] // List of interface references, for tracing
     FileLine* m_modNameFileline;  // Where module the cell instances token was
     string m_name;  // Cell name
     string m_origName;  // Original name before dot addition
@@ -1673,7 +1673,6 @@ class AstVar final : public AstNode {
     VVarType m_varType;  // Type of variable
     VDirection m_direction;  // Direction input/output etc
     VDirection m_declDirection;  // Declared direction input/output etc
-    VBasicDTypeKwd m_declKwd;  // Keyword at declaration time
     VLifetime m_lifetime;  // Lifetime
     VVarAttrClocker m_attrClocker;
     MTaskIdSet m_mtaskIds;  // MTaskID's that read or write this var
@@ -1780,11 +1779,6 @@ public:
         combineType(type);
         childDTypep(dtp);  // Only for parser
         dtypep(nullptr);  // V3Width will resolve
-        if (dtp->basicp()) {
-            m_declKwd = dtp->basicp()->keyword();
-        } else {
-            m_declKwd = VBasicDTypeKwd::LOGIC;
-        }
     }
     AstVar(FileLine* fl, VVarType type, const string& name, AstNodeDType* dtp)
         : ASTGEN_SUPER_Var(fl)
@@ -1794,11 +1788,6 @@ public:
         combineType(type);
         UASSERT(dtp, "AstVar created with no dtype");
         dtypep(dtp);
-        if (dtp->basicp()) {
-            m_declKwd = dtp->basicp()->keyword();
-        } else {
-            m_declKwd = VBasicDTypeKwd::LOGIC;
-        }
     }
     AstVar(FileLine* fl, VVarType type, const string& name, VFlagLogicPacked, int wantwidth)
         : ASTGEN_SUPER_Var(fl)
@@ -1807,7 +1796,6 @@ public:
         init();
         combineType(type);
         dtypeSetLogicSized(wantwidth, VSigning::UNSIGNED);
-        m_declKwd = VBasicDTypeKwd::LOGIC;
     }
     AstVar(FileLine* fl, VVarType type, const string& name, VFlagBitPacked, int wantwidth)
         : ASTGEN_SUPER_Var(fl)
@@ -1816,7 +1804,6 @@ public:
         init();
         combineType(type);
         dtypeSetBitSized(wantwidth, VSigning::UNSIGNED);
-        m_declKwd = VBasicDTypeKwd::BIT;
     }
     AstVar(FileLine* fl, VVarType type, const string& name, AstVar* examplep)
         : ASTGEN_SUPER_Var(fl)
@@ -1826,7 +1813,6 @@ public:
         combineType(type);
         if (examplep->childDTypep()) childDTypep(examplep->childDTypep()->cloneTree(true));
         dtypeFrom(examplep);
-        m_declKwd = examplep->declKwd();
     }
     ASTGEN_MEMBERS_AstVar;
     void dump(std::ostream& str) const override;
@@ -1854,7 +1840,6 @@ public:
         m_tristate = false;
         m_direction = VDirection::INPUT;
     }
-    VBasicDTypeKwd declKwd() const { return m_declKwd; }
     string scType() const;  // Return SysC type: bool, uint32_t, uint64_t, sc_bv
     // Return C /*public*/ type for argument: bool, uint32_t, uint64_t, etc.
     string cPubArgType(bool named, bool forReturn) const;
@@ -3199,7 +3184,6 @@ private:
     const VNumRange m_arrayRange;  // Property of var the trace details
     const uint32_t m_codeInc;  // Code increment
     const VVarType m_varType;  // Type of variable (for localparam vs. param)
-    const VBasicDTypeKwd m_declKwd;  // Keyword at declaration time
     const VDirection m_declDirection;  // Declared direction input/output etc
 public:
     AstTraceDecl(FileLine* fl, const string& showname,
@@ -3213,7 +3197,6 @@ public:
               ((arrayRange.ranged() ? arrayRange.elements() : 1) * valuep->dtypep()->widthWords()
                * (VL_EDATASIZE / 32)))  // A code is always 32-bits
         , m_varType{varp->varType()}
-        , m_declKwd{varp->declKwd()}
         , m_declDirection{varp->declDirection()} {
         dtypeFrom(valuep);
         this->valuep(valuep);
@@ -3235,7 +3218,6 @@ public:
     const VNumRange& bitRange() const { return m_bitRange; }
     const VNumRange& arrayRange() const { return m_arrayRange; }
     VVarType varType() const { return m_varType; }
-    VBasicDTypeKwd declKwd() const { return m_declKwd; }
     VDirection declDirection() const { return m_declDirection; }
 };
 class AstTraceInc final : public AstNodeStmt {
@@ -3280,25 +3262,25 @@ public:
     VTraceType traceType() const { return m_traceType; }
     uint32_t baseCode() const { return m_baseCode; }
 };
-class AstTracePopNamePrefix final : public AstNodeStmt {
-    const unsigned m_count;  // How many levels to pop
+class AstTracePopPrefix final : public AstNodeStmt {
 public:
-    AstTracePopNamePrefix(FileLine* fl, unsigned count)
-        : ASTGEN_SUPER_TracePopNamePrefix(fl)
-        , m_count{count} {}
-    ASTGEN_MEMBERS_AstTracePopNamePrefix;
+    AstTracePopPrefix(FileLine* fl)
+        : ASTGEN_SUPER_TracePopPrefix(fl) {}
+    ASTGEN_MEMBERS_AstTracePopPrefix;
     bool same(const AstNode* samep) const override { return false; }
-    unsigned count() const { return m_count; }
 };
-class AstTracePushNamePrefix final : public AstNodeStmt {
+class AstTracePushPrefix final : public AstNodeStmt {
     const string m_prefix;  // Prefix to add to signal names
+    const VTracePrefixType m_prefixType;  // Type of prefix being pushed
 public:
-    AstTracePushNamePrefix(FileLine* fl, const string& prefix)
-        : ASTGEN_SUPER_TracePushNamePrefix(fl)
-        , m_prefix{prefix} {}
-    ASTGEN_MEMBERS_AstTracePushNamePrefix;
+    AstTracePushPrefix(FileLine* fl, const string& prefix, VTracePrefixType prefixType)
+        : ASTGEN_SUPER_TracePushPrefix(fl)
+        , m_prefix{prefix}
+        , m_prefixType{prefixType} {}
+    ASTGEN_MEMBERS_AstTracePushPrefix;
     bool same(const AstNode* samep) const override { return false; }
     string prefix() const { return m_prefix; }
+    VTracePrefixType prefixType() const { return m_prefixType; }
 };
 class AstUCStmt final : public AstNodeStmt {
     // User $c statement
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index 687af5568..ea1ee4f7f 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -633,97 +633,67 @@ class EmitCTrace final : EmitCFunc {
 
     void emitTraceInitOne(AstTraceDecl* nodep, int enumNum) {
         if (nodep->dtypep()->basicp()->isDouble()) {
-            puts("tracep->declDouble");
+            puts("tracep->declDouble(");
         } else if (nodep->isWide()) {
-            puts("tracep->declArray");
+            puts("tracep->declArray(");
         } else if (nodep->isQuad()) {
-            puts("tracep->declQuad");
+            puts("tracep->declQuad(");
         } else if (nodep->bitRange().ranged()) {
-            puts("tracep->declBus");
+            puts("tracep->declBus(");
         } else if (nodep->dtypep()->basicp()->isEvent()) {
-            puts("tracep->declEvent");
+            puts("tracep->declEvent(");
         } else {
-            puts("tracep->declBit");
+            puts("tracep->declBit(");
         }
 
-        puts("(c+" + cvtToStr(nodep->code()));
+        // Code
+        puts("c+" + cvtToStr(nodep->code()));
         if (nodep->arrayRange().ranged()) puts("+i*" + cvtToStr(nodep->widthWords()));
+
+        // Function index
         puts(",");
         puts(cvtToStr(nodep->fidx()));
+
+        // Name
         puts(",");
         putsQuoted(VIdProtect::protectWordsIf(nodep->showname(), nodep->protect()));
+
+        // Enum number
+        puts("," + cvtToStr(enumNum));
+
         // Direction
-        if (v3Global.opt.traceFormat().fst()) {
-            puts("," + cvtToStr(enumNum));
-            // fstVarDir
-            if (nodep->declDirection().isInoutish()) {
-                puts(",FST_VD_INOUT");
-            } else if (nodep->declDirection().isWritable()) {
-                puts(",FST_VD_OUTPUT");
-            } else if (nodep->declDirection().isNonOutput()) {
-                puts(",FST_VD_INPUT");
-            } else {
-                puts(", FST_VD_IMPLICIT");
-            }
-            //
-            // fstVarType
-            const VVarType vartype = nodep->varType();
-            const VBasicDTypeKwd kwd = nodep->declKwd();
-            string fstvt;
-            // Doubles have special decoding properties, so must indicate if a double
-            if (nodep->dtypep()->basicp()->isDouble()) {
-                if (vartype.isParam()) {
-                    fstvt = "FST_VT_VCD_REAL_PARAMETER";
-                } else {
-                    fstvt = "FST_VT_VCD_REAL";
-                }
-            }
-            // clang-format off
-            else if (vartype == VVarType::GPARAM) {  fstvt = "FST_VT_VCD_PARAMETER"; }
-            else if (vartype == VVarType::LPARAM) {  fstvt = "FST_VT_VCD_PARAMETER"; }
-            else if (vartype == VVarType::SUPPLY0) { fstvt = "FST_VT_VCD_SUPPLY0"; }
-            else if (vartype == VVarType::SUPPLY1) { fstvt = "FST_VT_VCD_SUPPLY1"; }
-            else if (vartype == VVarType::TRI0) {    fstvt = "FST_VT_VCD_TRI0"; }
-            else if (vartype == VVarType::TRI1) {    fstvt = "FST_VT_VCD_TRI1"; }
-            else if (vartype == VVarType::TRIWIRE) { fstvt = "FST_VT_VCD_TRI"; }
-            else if (vartype == VVarType::WIRE) {    fstvt = "FST_VT_VCD_WIRE"; }
-            else if (vartype == VVarType::PORT) {    fstvt = "FST_VT_VCD_WIRE"; }
-            //
-            else if (kwd == VBasicDTypeKwd::INTEGER) {  fstvt = "FST_VT_VCD_INTEGER"; }
-            else if (kwd == VBasicDTypeKwd::BIT) {      fstvt = "FST_VT_SV_BIT"; }
-            else if (kwd == VBasicDTypeKwd::LOGIC) {    fstvt = "FST_VT_SV_LOGIC"; }
-            else if (kwd == VBasicDTypeKwd::INT) {      fstvt = "FST_VT_SV_INT"; }
-            else if (kwd == VBasicDTypeKwd::SHORTINT) { fstvt = "FST_VT_SV_SHORTINT"; }
-            else if (kwd == VBasicDTypeKwd::LONGINT) {  fstvt = "FST_VT_SV_LONGINT"; }
-            else if (kwd == VBasicDTypeKwd::BYTE) {     fstvt = "FST_VT_SV_BYTE"; }
-            else if (kwd == VBasicDTypeKwd::EVENT) {     fstvt = "FST_VT_VCD_EVENT"; }
-            else { fstvt = "FST_VT_SV_BIT"; }
-            // clang-format on
-            //
-            // Not currently supported
-            // FST_VT_VCD_PORT
-            // FST_VT_VCD_SHORTREAL
-            // FST_VT_VCD_REALTIME
-            // FST_VT_VCD_SPARRAY
-            // FST_VT_VCD_TRIAND
-            // FST_VT_VCD_TRIOR
-            // FST_VT_VCD_TRIREG
-            // FST_VT_VCD_WAND
-            // FST_VT_VCD_WOR
-            // FST_VT_SV_ENUM
-            // FST_VT_GEN_STRING
-            puts("," + fstvt);
+        if (nodep->declDirection().isInoutish()) {
+            puts(", VerilatedTraceSigDirection::INOUT");
+        } else if (nodep->declDirection().isWritable()) {
+            puts(", VerilatedTraceSigDirection::OUTPUT");
+        } else if (nodep->declDirection().isNonOutput()) {
+            puts(", VerilatedTraceSigDirection::INPUT");
+        } else {
+            puts(", VerilatedTraceSigDirection::NONE");
         }
-        // Range
+
+        // Kind
+        puts(", VerilatedTraceSigKind::");
+        puts(nodep->varType().traceSigKind());
+
+        // Type
+        puts(", VerilatedTraceSigType::");
+        puts(nodep->dtypep()->basicp()->keyword().traceSigType());
+
+        // Array range
         if (nodep->arrayRange().ranged()) {
             puts(", true,(i+" + cvtToStr(nodep->arrayRange().lo()) + ")");
         } else {
             puts(", false,-1");
         }
+
+        // Bit range
         if (!nodep->dtypep()->basicp()->isDouble() && nodep->bitRange().ranged()) {
             puts(", " + cvtToStr(nodep->bitRange().left()) + ","
                  + cvtToStr(nodep->bitRange().right()));
         }
+
+        //
         puts(");");
     }
 
@@ -861,15 +831,15 @@ class EmitCTrace final : EmitCFunc {
 
         EmitCFunc::visit(nodep);
     }
-    void visit(AstTracePushNamePrefix* nodep) override {
-        puts("tracep->pushNamePrefix(");
+    void visit(AstTracePushPrefix* nodep) override {
+        puts("tracep->pushPrefix(");
         putsQuoted(VIdProtect::protectWordsIf(nodep->prefix(), nodep->protect()));
+        puts(", VerilatedTracePrefixType::");
+        puts(nodep->prefixType().ascii());
         puts(");\n");
     }
-    void visit(AstTracePopNamePrefix* nodep) override {  //
-        puts("tracep->popNamePrefix(");
-        puts(cvtToStr(nodep->count()));
-        puts(");\n");
+    void visit(AstTracePopPrefix* nodep) override {  //
+        puts("tracep->popPrefix();\n");
     }
     void visit(AstTraceDecl* nodep) override {
         const int enumNum = emitTraceDeclDType(nodep->dtypep());
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 9346a64f3..6946ed68f 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -517,11 +517,10 @@ class EmitCModel final : public EmitCFunc {
              "0.\");\n");
         puts("}\n");
         puts("vlSymsp->__Vm_baseCode = code;\n");
-        puts("tracep->scopeEscape(' ');\n");
-        puts("tracep->pushNamePrefix(std::string{vlSymsp->name()} + ' ');\n");
+        puts("tracep->pushPrefix(std::string{vlSymsp->name()}, "
+             "VerilatedTracePrefixType::SCOPE_MODULE);\n");
         puts(topModNameProtected + "__" + protect("trace_init_top") + "(vlSelf, tracep);\n");
-        puts("tracep->popNamePrefix();\n");
-        puts("tracep->scopeEscape('.');\n");  // Restore so later traced files won't break
+        puts("tracep->popPrefix();\n");
         puts("}\n");
 
         // Forward declaration
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
index de504d25c..005fdc57b 100644
--- a/src/V3Interface.cpp
+++ b/src/V3Interface.cpp
@@ -51,30 +51,25 @@ private:
             m_scope += "__DOT__" + nodep->name();
         }
 
-        if (VN_IS(nodep->modp(), Iface)) {
-            nodep->addIntfRefsp(new AstIntfRef{nodep->fileline(), m_scope});
-        }
-        {
-            AstNodeModule* const modp = nodep->modp();
-            // Pass Cell pointers down to the next module
-            for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
-                AstVar* const varp = pinp->modVarp();
-                const AstVarRef* const varrefp = VN_CAST(pinp->exprp(), VarRef);
-                if (!varrefp) continue;
-                const AstVar* const fromVarp = varrefp->varp();
-                const AstIfaceRefDType* const irdtp = VN_CAST(fromVarp->dtypep(), IfaceRefDType);
-                if (!irdtp) continue;
+        AstNodeModule* const modp = nodep->modp();
+        // Pass Cell pointers down to the next module
+        for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
+            AstVar* const varp = pinp->modVarp();
+            const AstVarRef* const varrefp = VN_CAST(pinp->exprp(), VarRef);
+            if (!varrefp) continue;
+            const AstVar* const fromVarp = varrefp->varp();
+            const AstIfaceRefDType* const irdtp = VN_CAST(fromVarp->dtypep(), IfaceRefDType);
+            if (!irdtp) continue;
 
-                AstCell* cellp;
-                if ((cellp = VN_CAST(fromVarp->user1p(), Cell)) || (cellp = irdtp->cellp())) {
-                    varp->user1p(cellp);
-                    const string alias = m_scope + "__DOT__" + pinp->name();
-                    cellp->addIntfRefsp(new AstIntfRef{pinp->fileline(), alias});
-                }
+            AstCell* cellp;
+            if ((cellp = VN_CAST(fromVarp->user1p(), Cell)) || (cellp = irdtp->cellp())) {
+                varp->user1p(cellp);
+                const string alias = m_scope + "__DOT__" + pinp->name();
+                cellp->addIntfRefsp(new AstIntfRef{pinp->fileline(), alias});
             }
-
-            iterateChildren(modp);
         }
+
+        iterateChildren(modp);
     }
     void visit(AstAssignVarScope* nodep) override {
         // Reference
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 284936660..17aa40860 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -24,14 +24,13 @@
 
 #include "V3TraceDecl.h"
 
-#include "verilated_trace_defs.h"  // For VLT_TRACE_SCOPE_*
-
 #include "V3Config.h"
 #include "V3EmitCBase.h"
 #include "V3Stats.h"
 
 #include <functional>
 #include <limits>
+#include <tuple>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
@@ -59,7 +58,7 @@ public:
             ++toPop;
             m_stack.pop_back();
         }
-        if (toPop) m_emit(new AstTracePopNamePrefix{m_flp, toPop});
+        while (toPop--) m_emit(new AstTracePopPrefix{m_flp});
         // Move down, one path element at a time
         if (newPath != m_stack.back()) {
             const string& extraPrefix = newPath.substr(m_stack.back().size());
@@ -67,14 +66,14 @@ public:
             while (true) {
                 const size_t end = extraPrefix.find(SEPARATOR, begin);
                 if (end == string::npos) break;
-                const string& extra = extraPrefix.substr(begin, end + 1 - begin);
-                m_emit(new AstTracePushNamePrefix{m_flp, extra});
-                m_stack.push_back(m_stack.back() + extra);
+                const string& extra = extraPrefix.substr(begin, end - begin);
+                m_emit(new AstTracePushPrefix{m_flp, extra, VTracePrefixType::SCOPE_MODULE});
+                m_stack.push_back(m_stack.back() + extra + SEPARATOR);
                 begin = end + 1;
             }
             const string& extra = extraPrefix.substr(begin);
             if (!extra.empty()) {
-                m_emit(new AstTracePushNamePrefix{m_flp, extra + SEPARATOR});
+                m_emit(new AstTracePushPrefix{m_flp, extra, VTracePrefixType::SCOPE_MODULE});
                 m_stack.push_back(m_stack.back() + extra);
             }
         }
@@ -82,8 +81,8 @@ public:
 
     // Emit Prefix adjustments to unwind the path back to its original state
     void unwind() {
-        const unsigned toPop = m_stack.size() - 1;
-        if (toPop) m_emit(new AstTracePopNamePrefix{m_flp, toPop});
+        unsigned toPop = m_stack.size() - 1;
+        while (toPop--) m_emit(new AstTracePopPrefix{m_flp});
     }
 };
 
@@ -105,25 +104,58 @@ private:
     const int m_funcSizeLimit  // Maximum size of a function
         = v3Global.opt.outputSplitCTrace() ? v3Global.opt.outputSplitCTrace()
                                            : std::numeric_limits<int>::max();
-    // Trace init sub functions to invoke for path names in the hierarchy. Note path names and
-    // AstScope instances are not one to one due to the presence of AstIntfRef.
-    std::map<std::string, std::vector<AstCFunc*>> m_scopeSubFuncps;
+    // Trace init functions to for each scope
+    std::unordered_map<const AstScope*, std::vector<AstCFunc*>> m_scopeInitFuncps;
+    // Map from hierarchical scope name to the corresponding AstScope. Note that
+    // this is a many-to-one mapping for interfaces, due to interface refs.
+    std::unordered_map<std::string, const AstScope*> m_pathToScopep;
+    // Cell initialization placeholders:
+    // (parent scope, cell under parent scope, statement)
+    std::vector<std::tuple<AstScope*, AstCell*, AstNodeStmt*>> m_cellInitPlaceholders;
+    // Interface refs initialization placeholders:
+    // (Interface ref variable, placeholder statement)
+    std::vector<std::tuple<AstVarScope*, AstNodeStmt*>> m_ifaceRefInitPlaceholders;
 
-    struct Signal final {
-        AstVarScope* m_vscp;  // AstVarScope being traced (non const to allow copy during sorting)
-        std::string m_path;  // Path to enclosing module in hierarchy
-        std::string m_name;  // Name of signal
-        explicit Signal(AstVarScope* vscp)
-            : m_vscp{vscp} {
-            // Compute path in hierarchy and signal name
-            const string& vcdName = AstNode::vcdName(vscp->varp()->name());
+    // A trace entry under a scope is either:
+    // - A variable (including interface references)
+    // - A sub scope (stored as the cell corresponding to the sub scope)
+    // Note: members are non-const to allow copy during sorting
+    class TraceEntry final {
+        // AstVarScope under scope being traced
+        AstVarScope* m_vscp{nullptr};
+        // Sub scope (as AstCell) under scope being traced
+        AstCell* m_cellp{nullptr};
+        // Path to enclosing module in original hierarchy (non-trivail due to inlining)
+        std::string m_path;
+        // Name of signal/subscope
+        std::string m_name;
+
+        void init(const std::string& name) {
+            // Compute path in hierarchy and item name
+            const std::string& vcdName = AstNode::vcdName(name);
             const size_t pos = vcdName.rfind(' ');
-            const size_t pathLen = pos == string::npos ? 0 : pos + 1;
+            const size_t pathLen = pos == std::string::npos ? 0 : pos + 1;
             m_path = vcdName.substr(0, pathLen);
             m_name = vcdName.substr(pathLen);
         }
+
+    public:
+        explicit TraceEntry(AstVarScope* vscp)
+            : m_vscp{vscp} {
+            init(vscp->varp()->name());
+        }
+        explicit TraceEntry(AstCell* cellp)
+            : m_cellp{cellp} {
+            init(cellp->name());
+        }
+
+        AstVarScope* vscp() const { return m_vscp; }
+        AstCell* cellp() const { return m_cellp; }
+        const std::string& path() const { return m_path; }
+        const std::string& name() const { return m_name; }
+        FileLine& fileline() const { return m_vscp ? *m_vscp->fileline() : *m_cellp->fileline(); }
     };
-    std::vector<Signal> m_signals;  // Signals under current scope
+    std::vector<TraceEntry> m_entries;  // Trace entries under current scope
     AstVarScope* m_traVscp = nullptr;  // Current AstVarScope we are constructing AstTraceDecls for
     AstNodeExpr* m_traValuep = nullptr;  // Value expression for current signal
     string m_traName;  // Name component for current signal
@@ -192,35 +224,6 @@ private:
         m_subFuncSize += stmtp->nodeCount();
     }
 
-    std::string getScopeChar(VltTraceScope sct) {
-        if (v3Global.opt.traceFormat().fst()) {
-            return std::string(1, static_cast<char>(0x80 + sct));
-        } else {
-            return std::string();
-        }
-    }
-
-    std::string addAboveInterface(const std::string& scopeName) {
-        std::string out;
-        // Hierarchical interfaces didn't know if interface vs module
-        // above them. so convert a scope string to have the interface character.
-        // Uses list of scopes to see what's an interface above.
-        size_t begin = 0;
-        while (true) {
-            const size_t end = scopeName.find(' ', begin);
-            if (end == string::npos) break;
-            const string& extra = scopeName.substr(begin, end - begin);
-            out += extra;
-            if (m_scopeSubFuncps.count(out + getScopeChar(VLT_TRACE_SCOPE_INTERFACE) + " ")) {
-                out += getScopeChar(VLT_TRACE_SCOPE_INTERFACE) + " ";
-            } else {
-                out += " ";
-            }
-            begin = end + 1;
-        }
-        return out;
-    }
-
     void addTraceDecl(const VNumRange& arrayRange,
                       int widthOverride) {  // If !=0, is packed struct/array where basicp size
                                             // misreflects one element
@@ -240,97 +243,202 @@ private:
         ++m_statIgnSigs;
         std::string cmt = std::string{"Tracing: "} + m_traName + " // Ignored: " + why;
         if (debug() > 3 && m_traVscp) std::cout << "- " << m_traVscp->fileline() << cmt << endl;
-        addToSubFunc(new AstComment{m_traVscp->fileline(), cmt, true});
+    }
+
+    void fixupPlaceholder(const std::string& path, AstNodeStmt* placeholderp) {
+        // Find the scope for the path. As we are working based on cell names,
+        // it is possible there is no corresponding scope (e.g.: for an empty
+        // module).
+        const auto it = m_pathToScopep.find(path);
+        if (it != m_pathToScopep.end()) {
+            const AstScope* const scopep = it->second;
+            FileLine* const flp = placeholderp->fileline();
+
+            // Pick up the last path element. The prefixes have already been pushed
+            // when building the initialization functions
+            const size_t pos = path.rfind('.');
+            const std::string name = path.substr(pos == string::npos ? 0 : pos + 1);
+
+            // Compute the type of the scope beign fixed up
+            AstNodeModule* const modp = scopep->aboveCellp()->modp();
+            const VTracePrefixType scopeType = VN_IS(modp, Iface)
+                                                   ? VTracePrefixType::SCOPE_INTERFACE
+                                                   : VTracePrefixType::SCOPE_MODULE;
+
+            // Push the scope prefix
+            AstNodeStmt* const pushp = new AstTracePushPrefix{flp, name, scopeType};
+
+            // Call the initialization functions for the scope
+            for (AstCFunc* const subFuncp : m_scopeInitFuncps.at(scopep)) {
+                AstCCall* const callp = new AstCCall{flp, subFuncp};
+                callp->dtypeSetVoid();
+                callp->argTypes("tracep");
+                pushp->addNext(callp->makeStmt());
+            }
+
+            // Pop the scope prefix
+            pushp->addNext(new AstTracePopPrefix{flp});
+
+            // Add after the placeholder
+            placeholderp->addNextHere(pushp);
+        }
+        // Delete the placeholder
+        placeholderp->unlinkFrBack();
+        VL_DO_DANGLING(placeholderp->deleteTree(), placeholderp);
+    }
+
+    void fixupPlaceholders() {
+        // Fix up cell initialization placehodlers
+        for (const auto& item : m_cellInitPlaceholders) {
+            const AstScope* const parentp = std::get<0>(item);
+            const AstCell* const cellp = std::get<1>(item);
+            AstNodeStmt* const placeholderp = std::get<2>(item);
+            const std::string path = AstNode::prettyName(parentp->name() + "." + cellp->name());
+            fixupPlaceholder(path, placeholderp);
+        }
+
+        // Fix up interface reference initialization placeholders
+        for (const auto& item : m_ifaceRefInitPlaceholders) {
+            const AstVarScope* const vscp = std::get<0>(item);
+            AstNodeStmt* const placeholderp = std::get<1>(item);
+            const std::string path = vscp->prettyName();
+            fixupPlaceholder(path, placeholderp);
+        }
+    }
+
+    void removeRedundantPrefixPushPop() {
+        for (const auto& pair : m_scopeInitFuncps) {
+            for (AstCFunc* const funcp : pair.second) {
+                AstNode* prevp = nullptr;
+                AstNode* currp = funcp->stmtsp();
+                while (true) {
+                    AstNode* const nextp = currp->nextp();
+                    if (VN_IS(prevp, TracePushPrefix) && VN_IS(currp, TracePopPrefix)) {
+                        VL_DO_DANGLING(prevp->unlinkFrBack()->deleteTree(), prevp);
+                        VL_DO_DANGLING(currp->unlinkFrBack()->deleteTree(), currp);
+                    }
+                    if (!nextp) break;
+                    prevp = nextp->backp();
+                    currp = nextp;
+                }
+            }
+        }
     }
 
     // VISITORS
     void visit(AstScope* nodep) override {
         UASSERT_OBJ(!m_currScopep, nodep, "Should not nest");
         UASSERT_OBJ(m_subFuncps.empty(), nodep, "Should not nest");
-        UASSERT_OBJ(m_signals.empty(), nodep, "Should not nest");
+        UASSERT_OBJ(m_entries.empty(), nodep, "Should not nest");
         UASSERT_OBJ(!m_traVscp, nodep, "Should not nest");
+        UASSERT_OBJ(!m_traValuep, nodep, "Should not nest");
         UASSERT_OBJ(m_traName.empty(), nodep, "Should not nest");
 
         VL_RESTORER(m_currScopep);
         m_currScopep = nodep;
 
-        // Gather all signals under this AstScope
+        // Gather signals under this scope
         iterateChildrenConst(nodep);
 
-        // If nothing to trace in this scope, then job done
-        if (m_signals.empty()) return;
-
-        // Sort signals, first by enclosing instance, then by source location, then by name
-        std::stable_sort(m_signals.begin(), m_signals.end(), [](const Signal& a, const Signal& b) {
-            if (const int cmp = a.m_path.compare(b.m_path)) return cmp < 0;
-            const FileLine* const aflp = a.m_vscp->fileline();
-            const FileLine* const bflp = b.m_vscp->fileline();
-            if (const int cmp = aflp->operatorCompare(*bflp)) return cmp < 0;
-            return a.m_name < b.m_name;
-        });
-
-        // Build trace initialization functions for this AstScope
-        FileLine* const flp = nodep->fileline();
-        PathAdjustor pathAdjustor{flp, [&](AstNodeStmt* stmtp) { addToSubFunc(stmtp); }};
-        for (const Signal& signal : m_signals) {
-            // Adjust name prefix based on path in hierarchy
-            pathAdjustor.adjust(signal.m_path);
-
-            // Build AstTraceDecl for this signal
-            m_traVscp = signal.m_vscp;
-            m_traName = signal.m_name;
-            if (const char* const ignoreReasonp = vscIgnoreTrace(m_traVscp)) {
-                addIgnore(ignoreReasonp);
-            } else {
-                ++m_statSigs;
-                m_traValuep = new AstVarRef{m_traVscp->fileline(), m_traVscp, VAccess::READ};
-                // Recurse into data type of the signal. The visit methods will add AstTraceDecls.
-                iterate(m_traVscp->varp()->dtypep()->skipRefToEnump());
-                // Cleanup
-                if (m_traValuep) VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
-            }
+        // Gather cells under this scope
+        for (AstNode* stmtp = nodep->modp()->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
+            if (AstCell* const cellp = VN_CAST(stmtp, Cell)) { m_entries.emplace_back(cellp); }
         }
-        pathAdjustor.unwind();
-        m_traVscp = nullptr;
-        m_traName.clear();
-        UASSERT_OBJ(!m_traValuep, nodep, "Should have been deleted");
-        m_signals.clear();
 
-        // Add sub functions to m_scopeSubFuncps
+        if (!m_entries.empty()) {
+            // Sort trace entries, first by enclosing instance (necessary for
+            // single traversal of hierarchy during initialization), then by
+            // source location, then by name.
+            std::stable_sort(m_entries.begin(), m_entries.end(),
+                             [](const TraceEntry& a, const TraceEntry& b) {
+                                 if (const int cmp = a.path().compare(b.path())) return cmp < 0;
+                                 if (const int cmp = a.fileline().operatorCompare(b.fileline()))
+                                     return cmp < 0;
+                                 return a.name() < b.name();
+                             });
+
+            // Build trace initialization functions for this AstScope
+            FileLine* const flp = nodep->fileline();
+            PathAdjustor pathAdjustor{flp, [&](AstNodeStmt* stmtp) { addToSubFunc(stmtp); }};
+            for (const TraceEntry& entry : m_entries) {
+                // Adjust name prefix based on path in hierarchy
+                pathAdjustor.adjust(entry.path());
+
+                m_traName = entry.name();
+
+                if (AstVarScope* const vscp = entry.vscp()) {
+                    // This is a signal: build AstTraceDecl for it
+                    m_traVscp = vscp;
+                    if (const char* const ignoreReasonp = vscIgnoreTrace(m_traVscp)) {
+                        addIgnore(ignoreReasonp);
+                    } else {
+                        ++m_statSigs;
+                        // Create reference to whole signal. We will operate on this during the
+                        // traversal.
+                        m_traValuep
+                            = new AstVarRef{m_traVscp->fileline(), m_traVscp, VAccess::READ};
+                        // Recurse into data type of the signal. The visit methods will add
+                        // AstTraceDecls.
+                        iterate(m_traVscp->varp()->dtypep()->skipRefToEnump());
+                        // Delete reference created above. Traversal cloned it as required.
+                        if (m_traValuep) {
+                            VL_DO_DANGLING(m_traValuep->deleteTree(), m_traValuep);
+                            // Note: Sometimes VL_DANGLING is a no-op, but we have assertions
+                            // on m_traValuep being nullptr, so make sure it is.
+                            m_traValuep = nullptr;
+                        }
+                    }
+                } else {
+                    // This is a subscope: insert a placeholder to be fixed up later
+                    AstCell* const cellp = entry.cellp();
+                    FileLine* const flp = cellp->fileline();
+                    AstNodeStmt* const stmtp
+                        = new AstComment{flp, "Cell init for: " + cellp->prettyName()};
+                    addToSubFunc(stmtp);
+                    m_cellInitPlaceholders.emplace_back(nodep, cellp, stmtp);
+                }
+            }
+            pathAdjustor.unwind();
+            m_traVscp = nullptr;
+            m_traName.clear();
+            UASSERT_OBJ(!m_traValuep, nodep, "Should have been deleted");
+            m_entries.clear();
+        }
+
+        // Save the initialization functions of this scope
+        m_scopeInitFuncps.emplace(nodep, std::move(m_subFuncps));
+
+        // Save the hierarchical name of this scope
+        const std::string path = nodep->prettyName();
+        m_pathToScopep.emplace(path, nodep);
+
+        // Save the hierarchical names of interface references that reference this scope
         const AstCell* const cellp = nodep->aboveCellp();
         if (cellp && VN_IS(cellp->modp(), Iface)) {
-            string scopeName = nodep->prettyName();
-            const size_t lastDot = scopeName.find_last_of('.');
+            const size_t lastDot = path.find_last_of('.');
             UASSERT_OBJ(lastDot != string::npos, nodep,
                         "Expected an interface scope name to have at least one dot");
-            scopeName = scopeName.substr(0, lastDot + 1);
-            const size_t scopeLen = scopeName.length();
+            const std::string parentPath = path.substr(0, lastDot + 1);
 
-            UASSERT_OBJ(cellp->intfRefsp(), cellp, "Interface without tracing reference");
-            for (AstIntfRef *irp = cellp->intfRefsp(), *nextIrp; irp; irp = nextIrp) {
-                nextIrp = VN_AS(irp->nextp(), IntfRef);
+            for (AstIntfRef *intfRefp = cellp->intfRefsp(), *nextp; intfRefp; intfRefp = nextp) {
+                nextp = VN_AS(intfRefp->nextp(), IntfRef);
 
-                const string irpName = irp->prettyName();
-                if (scopeLen > irpName.length()) continue;
-                const string intfScopeName = irpName.substr(0, scopeLen);
-                if (scopeName != intfScopeName) continue;
+                const std::string refName = intfRefp->prettyName();
 
-                string iscopeName = AstNode::vcdName(irp->name());
-                if (iscopeName.substr(0, 4) == "TOP ") iscopeName.erase(0, 4);
-                // Note this insert doesn't know what above is interfaces.
-                // Perhaps all scopes should be changed to include the VLT_TRACE_SCOPE characters.
-                // Instead we fix up when printing m_scopeSubFuncps
-                iscopeName += getScopeChar(VLT_TRACE_SCOPE_INTERFACE) + ' ';
-                m_scopeSubFuncps.emplace(iscopeName, m_subFuncps);
+                // Assume only references under the same parent scope reference
+                // the same interface.
+                // TODO: This is not actually correct. An inteface can propagate
+                //       upwards and sideways when passed to a port via a downward
+                //       hierarchical reference, which we will miss here.
+                if (!VString::startsWith(refName, parentPath)) continue;
 
-                VL_DO_DANGLING(irp->unlinkFrBack(), irp);
+                // Save the mapping from the path of the reference to the scope
+                m_pathToScopep.emplace(refName, nodep);
+
+                // No more need for AstIntfRef
+                intfRefp->unlinkFrBack();
+                VL_DO_DANGLING(intfRefp->deleteTree(), intfRefp);
             }
-
-            m_subFuncps.clear();
-        } else {
-            string scopeName = AstNode::vcdName(nodep->name()) + ' ';
-            if (VString::startsWith(scopeName, "TOP ")) scopeName.erase(0, 4);
-            m_scopeSubFuncps.emplace(scopeName, std::move(m_subFuncps));
         }
     }
     void visit(AstVarScope* nodep) override {
@@ -344,142 +452,174 @@ private:
         if (nodep->varp()->isFuncLocal()) return;
 
         // Add to traced signal list
-        m_signals.emplace_back(nodep);
+        m_entries.emplace_back(nodep);
     }
 
     // VISITORS - Data types when tracing
     void visit(AstConstDType* nodep) override {
-        if (m_traVscp) iterate(nodep->subDTypep()->skipRefToEnump());
+        if (!m_traVscp) return;
+        iterate(nodep->subDTypep()->skipRefToEnump());
     }
     void visit(AstRefDType* nodep) override {
-        if (m_traVscp) iterate(nodep->subDTypep()->skipRefToEnump());
+        if (!m_traVscp) return;
+        iterate(nodep->subDTypep()->skipRefToEnump());
+    }
+    void visit(AstIfaceRefDType* nodep) override {
+        if (!m_traVscp) return;
+        // Insert a placeholder to be fixed up later
+        FileLine* const flp = m_traVscp->fileline();
+        AstNodeStmt* const stmtp
+            = new AstComment{flp, "Interface ref init for: " + m_traVscp->prettyName()};
+        addToSubFunc(stmtp);
+        m_ifaceRefInitPlaceholders.emplace_back(m_traVscp, stmtp);
     }
     void visit(AstUnpackArrayDType* nodep) override {
         // Note more specific dtypes above
-        if (m_traVscp) {
-            if (static_cast<int>(nodep->arrayUnpackedElements()) > v3Global.opt.traceMaxArray()) {
-                addIgnore("Wide memory > --trace-max-array ents");
-            } else if (VN_IS(nodep->subDTypep()->skipRefToEnump(),
-                             BasicDType)  // Nothing lower than this array
-                       && m_traVscp->dtypep()->skipRefToEnump()
-                              == nodep) {  // Nothing above this array
-                // Simple 1-D array, use existing V3EmitC runtime loop rather than unrolling
-                // This will put "(index)" at end of signal name for us
-                if (m_traVscp->dtypep()->skipRefToEnump()->isString()) {
-                    addIgnore("Unsupported: strings");
-                } else {
-                    addTraceDecl(nodep->declRange(), 0);
-                }
+        if (!m_traVscp) return;
+
+        if (static_cast<int>(nodep->arrayUnpackedElements()) > v3Global.opt.traceMaxArray()) {
+            addIgnore("Wide memory > --trace-max-array ents");
+            return;
+        }
+
+        VL_RESTORER(m_traName);
+        FileLine* const flp = nodep->fileline();
+
+        addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::ARRAY_UNPACKED});
+
+        if (VN_IS(nodep->subDTypep()->skipRefToEnump(),
+                  BasicDType)  // Nothing lower than this array
+            && m_traVscp->dtypep()->skipRefToEnump() == nodep) {  // Nothing above this array
+            // Simple 1-D array, use existing V3EmitC runtime loop rather than unrolling
+            // This will put "(index)" at end of signal name for us
+            if (m_traVscp->dtypep()->skipRefToEnump()->isString()) {
+                addIgnore("Unsupported: strings");
             } else {
-                // Unroll now, as have no other method to get right signal names
-                FileLine* const flp = nodep->fileline();
-                AstNodeDType* const subtypep = nodep->subDTypep()->skipRefToEnump();
-                VL_RESTORER(m_traName);
-                addToSubFunc(new AstTracePushNamePrefix{flp, m_traName});
-                for (int i = nodep->lo(); i <= nodep->hi(); ++i) {
-                    VL_RESTORER(m_traValuep);
-                    m_traName = std::string{"["} + cvtToStr(i) + std::string{"]"};
-                    m_traValuep = m_traValuep->cloneTree(false);
-                    m_traValuep = new AstArraySel{flp, m_traValuep, i - nodep->lo()};
-                    m_traValuep->dtypep(subtypep);
-                    iterate(subtypep);
-                    VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
-                }
-                addToSubFunc(new AstTracePopNamePrefix{flp, 1});
+                m_traName = "";
+                addTraceDecl(nodep->declRange(), 0);
+            }
+        } else {
+            AstNodeDType* const subtypep = nodep->subDTypep()->skipRefToEnump();
+            for (int i = nodep->lo(); i <= nodep->hi(); ++i) {
+                VL_RESTORER(m_traValuep);
+                m_traName = '[' + std::to_string(i) + ']';
+                m_traValuep = m_traValuep->cloneTree(false);
+                m_traValuep = new AstArraySel{flp, m_traValuep, i - nodep->lo()};
+                m_traValuep->dtypep(subtypep);
+                iterate(subtypep);
+                VL_DO_DANGLING(m_traValuep->deleteTree(), m_traValuep);
             }
         }
+
+        addToSubFunc(new AstTracePopPrefix{flp});
     }
     void visit(AstPackArrayDType* nodep) override {
-        if (m_traVscp) {
-            if (!v3Global.opt.traceStructs()) {
-                // Everything downstream is packed, so deal with as one trace unit.
-                // This may not be the nicest for user presentation, but is
-                // a much faster way to trace
-                addTraceDecl(VNumRange{}, nodep->width());
-            } else {
-                FileLine* const flp = nodep->fileline();
-                AstNodeDType* const subtypep = nodep->subDTypep()->skipRefToEnump();
-                VL_RESTORER(m_traName);
-                addToSubFunc(new AstTracePushNamePrefix{flp, m_traName});
-                for (int i = nodep->lo(); i <= nodep->hi(); ++i) {
-                    VL_RESTORER(m_traValuep);
-                    m_traName = std::string{"["} + cvtToStr(i) + std::string{"]"};
-                    const int lsb = (i - nodep->lo()) * subtypep->width();
-                    m_traValuep = m_traValuep->cloneTree(false);
-                    m_traValuep = new AstSel{flp, m_traValuep, lsb, subtypep->width()};
-                    m_traValuep->dtypep(subtypep);
-                    iterate(subtypep);
-                    VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
-                }
-                addToSubFunc(new AstTracePopNamePrefix{flp, 1});
+        if (!m_traVscp) return;
+
+        if (!v3Global.opt.traceStructs()) {
+            // Everything downstream is packed, so deal with as one trace unit.
+            // This may not be the nicest for user presentation, but is
+            // a much faster way to trace
+            addTraceDecl(VNumRange{}, nodep->width());
+            return;
+        }
+
+        VL_RESTORER(m_traName);
+        FileLine* const flp = nodep->fileline();
+        addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::ARRAY_PACKED});
+
+        AstNodeDType* const subtypep = nodep->subDTypep()->skipRefToEnump();
+        for (int i = nodep->lo(); i <= nodep->hi(); ++i) {
+            VL_RESTORER(m_traValuep);
+            m_traName = '[' + std::to_string(i) + ']';
+            const int lsb = (i - nodep->lo()) * subtypep->width();
+            m_traValuep = m_traValuep->cloneTree(false);
+            m_traValuep = new AstSel{flp, m_traValuep, lsb, subtypep->width()};
+            m_traValuep->dtypep(subtypep);
+            iterate(subtypep);
+            VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
+        }
+
+        addToSubFunc(new AstTracePopPrefix{flp});
+    }
+    void visit(AstStructDType* nodep) override {
+        if (!m_traVscp) return;
+
+        if (nodep->packed() && !v3Global.opt.traceStructs()) {
+            // Everything downstream is packed, so deal with as one trace unit
+            // This may not be the nicest for user presentation, but is
+            // a much faster way to trace
+            addTraceDecl(VNumRange{}, nodep->width());
+            return;
+        }
+
+        VL_RESTORER(m_traName);
+        FileLine* const flp = nodep->fileline();
+
+        if (!nodep->packed()) {
+            addToSubFunc(
+                new AstTracePushPrefix{flp, m_traName, VTracePrefixType::STRUCT_UNPACKED});
+            for (const AstMemberDType *itemp = nodep->membersp(), *nextp; itemp; itemp = nextp) {
+                nextp = VN_AS(itemp->nextp(), MemberDType);
+                AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump();
+                m_traName = itemp->prettyName();
+                VL_RESTORER(m_traValuep);
+                m_traValuep = m_traValuep->cloneTree(false);
+                m_traValuep = new AstStructSel{flp, m_traValuep, itemp->name()};
+                m_traValuep->dtypep(subtypep);
+                iterate(subtypep);
+                VL_DO_DANGLING(m_traValuep->deleteTree(), m_traValuep);
             }
+            addToSubFunc(new AstTracePopPrefix{flp});
+        } else {
+            addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::STRUCT_PACKED});
+            for (const AstMemberDType *itemp = nodep->membersp(), *nextp; itemp; itemp = nextp) {
+                nextp = VN_AS(itemp->nextp(), MemberDType);
+                AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump();
+                m_traName = itemp->prettyName();
+                VL_RESTORER(m_traValuep);
+                m_traValuep = m_traValuep->cloneTree(false);
+                m_traValuep = new AstSel{flp, m_traValuep, itemp->lsb(), subtypep->width()};
+                m_traValuep->dtypep(subtypep);
+                iterate(subtypep);
+                VL_DO_DANGLING(m_traValuep->deleteTree(), m_traValuep);
+            }
+            addToSubFunc(new AstTracePopPrefix{flp});
         }
     }
-    void visit(AstNodeUOrStructDType* nodep) override {
-        if (m_traVscp) {
-            if (nodep->packed() && !v3Global.opt.traceStructs()) {
-                // Everything downstream is packed, so deal with as one trace unit
-                // This may not be the nicest for user presentation, but is
-                // a much faster way to trace
-                addTraceDecl(VNumRange{}, nodep->width());
-            } else if (!nodep->packed()) {
-                if (VN_IS(nodep, UnionDType)) {
-                    addIgnore("Unsupported: Unpacked union");
-                } else {
-                    FileLine* const flp = nodep->fileline();
-                    VL_RESTORER(m_traName);
-                    string prefix{m_traName};
-                    prefix += getScopeChar(VLT_TRACE_SCOPE_STRUCT);
-                    addToSubFunc(new AstTracePushNamePrefix{flp, prefix + ' '});
-                    for (const AstMemberDType* itemp = nodep->membersp(); itemp;
-                         itemp = VN_AS(itemp->nextp(), MemberDType)) {
-                        AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump();
-                        m_traName = itemp->prettyName();
-                        VL_RESTORER(m_traValuep);
-                        m_traValuep = m_traValuep->cloneTree(false);
-                        m_traName = itemp->prettyName();
-                        m_traValuep = new AstStructSel{flp, m_traValuep, itemp->name()};
-                        m_traValuep->dtypep(subtypep);
-                        iterate(subtypep);
-                        VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
-                    }
-                    addToSubFunc(new AstTracePopNamePrefix{flp, 1});
-                }
-            } else {
-                FileLine* const flp = nodep->fileline();
-                const bool isStruct = VN_IS(nodep, StructDType);  // Otherwise union
-                VL_RESTORER(m_traName);
-                string prefix{m_traName};
-                prefix += isStruct ? getScopeChar(VLT_TRACE_SCOPE_STRUCT)  // Mark scope type
-                                   : getScopeChar(VLT_TRACE_SCOPE_UNION);
-                addToSubFunc(new AstTracePushNamePrefix{flp, prefix + ' '});
-                for (const AstMemberDType* itemp = nodep->membersp(); itemp;
-                     itemp = VN_AS(itemp->nextp(), MemberDType)) {
-                    AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump();
-                    m_traName = itemp->prettyName();
-                    if (isStruct) {
-                        VL_RESTORER(m_traValuep);
-                        m_traValuep = m_traValuep->cloneTree(false);
-                        m_traValuep
-                            = new AstSel{flp, m_traValuep, itemp->lsb(), subtypep->width()};
-                        m_traValuep->dtypep(subtypep);
-                        iterate(subtypep);
-                        VL_DO_CLEAR(m_traValuep->deleteTree(), m_traValuep = nullptr);
-                    } else {  // Else union, replicate fields
-                        iterate(subtypep);
-                    }
-                }
-                addToSubFunc(new AstTracePopNamePrefix{flp, 1});
+    void visit(AstUnionDType* nodep) override {
+        if (!m_traVscp) return;
+
+        if (nodep->packed() && !v3Global.opt.traceStructs()) {
+            // Everything downstream is packed, so deal with as one trace unit
+            // This may not be the nicest for user presentation, but is
+            // a much faster way to trace
+            addTraceDecl(VNumRange{}, nodep->width());
+            return;
+        }
+
+        VL_RESTORER(m_traName);
+        FileLine* const flp = nodep->fileline();
+
+        if (!nodep->packed()) {
+            addIgnore("Unsupported: Unpacked union");
+        } else {
+            addToSubFunc(new AstTracePushPrefix{flp, m_traName, VTracePrefixType::UNION_PACKED});
+            for (const AstMemberDType *itemp = nodep->membersp(), *nextp; itemp; itemp = nextp) {
+                nextp = VN_AS(itemp->nextp(), MemberDType);
+                AstNodeDType* const subtypep = itemp->subDTypep()->skipRefToEnump();
+                m_traName = itemp->prettyName();
+                iterate(subtypep);
             }
+            addToSubFunc(new AstTracePopPrefix{flp});
         }
     }
     void visit(AstBasicDType* nodep) override {
-        if (m_traVscp) {
-            if (nodep->isString()) {
-                addIgnore("Unsupported: strings");
-            } else {
-                addTraceDecl(VNumRange{}, 0);
-            }
+        if (!m_traVscp) return;
+        if (nodep->isString()) {
+            addIgnore("Unsupported: strings");
+        } else {
+            addTraceDecl(VNumRange{}, 0);
         }
     }
     void visit(AstEnumDType* nodep) override { iterate(nodep->skipRefp()); }
@@ -498,26 +638,27 @@ public:
         : m_topScopep{nodep->topScopep()} {
         FileLine* const flp = nodep->fileline();
 
-        // Iterate modules to build per scope initialization sub functions
+        // Iterate modules to build per scope initialization functions
         iterateAndNextConstNull(nodep->modulesp());
         UASSERT_OBJ(m_subFuncps.empty(), nodep, "Should have been emptied");
 
-        // Build top level trace initialization functions
-        PathAdjustor pathAdjustor{flp, [&](AstNodeStmt* stmtp) { addToTopFunc(stmtp); }};
-        for (const auto& item : m_scopeSubFuncps) {
-            const std::string scopeName = item.first;
-            const std::string scopeNameInterfaced = addAboveInterface(scopeName);
-            // Adjust name prefix based on path in hierarchy
-            pathAdjustor.adjust(scopeNameInterfaced);
-            // Call all sub functions for this path
-            for (AstCFunc* const subFuncp : item.second) {
-                AstCCall* const callp = new AstCCall{flp, subFuncp};
-                callp->dtypeSetVoid();
-                callp->argTypes("tracep");
-                addToTopFunc(callp->makeStmt());
-            }
+        // Fix up the placeholders in the initialization functions
+        fixupPlaceholders();
+
+        // Now that we have everything ready, remove redundant pushPrefix/popPrefix
+        // pairs. While functionally this is not really necessary (the trace files
+        // might have some empty scope declarations), we do it to preserve previous
+        // behaviour. Note: unfortunately generating these without the redundant
+        // push/pop pairs is a bit hard. It is cleaner to remove them.
+        removeRedundantPrefixPushPop();
+
+        // Call the initialization functions of the root scope from the top function
+        for (AstCFunc* const funcp : m_scopeInitFuncps.at(m_topScopep->scopep())) {
+            AstCCall* const callp = new AstCCall{flp, funcp};
+            callp->dtypeSetVoid();
+            callp->argTypes("tracep");
+            addToTopFunc(callp->makeStmt());
         }
-        pathAdjustor.unwind();
 
         // Ensure a top function exists, in case there was nothing to trace at all
         if (m_topFuncps.empty()) addToTopFunc(new AstComment{flp, "Empty"});
diff --git a/test_regress/t/t_clocker.out b/test_regress/t/t_clocker.out
index 61a98ebaa..d6623fe9f 100644
--- a/test_regress/t/t_clocker.out
+++ b/test_regress/t/t_clocker.out
@@ -1,174 +1,172 @@
 $version Generated by VerilatedVcd $end
-$date Fri Jun 22 19:23:24 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
-  $var wire  1 % res $end
-  $var wire 16 ' res16 [15:0] $end
-  $var wire  8 & res8 [7:0] $end
   $scope module $unit $end
    $var wire 32 + ID_MSB [31:0] $end
   $upscope $end
+  $var wire 1 # clk $end
+  $var wire 1 $ res $end
+  $var wire 8 % res8 [7:0] $end
+  $var wire 16 & res16 [15:0] $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire  8 ( clkSet [7:0] $end
-   $var wire  1 $ clk_1 $end
-   $var wire  3 ) clk_3 [2:0] $end
-   $var wire  4 * clk_4 [3:0] $end
-   $var wire  1 $ clk_final $end
-   $var wire  8 # count [7:0] $end
-   $var wire  1 % res $end
-   $var wire 16 ' res16 [15:0] $end
-   $var wire  8 & res8 [7:0] $end
+   $var wire 1 # clk $end
+   $var wire 1 $ res $end
+   $var wire 8 % res8 [7:0] $end
+   $var wire 16 & res16 [15:0] $end
+   $var wire 8 ' clkSet [7:0] $end
+   $var wire 1 # clk_1 $end
+   $var wire 3 ( clk_3 [2:0] $end
+   $var wire 4 ) clk_4 [3:0] $end
+   $var wire 1 # clk_final $end
+   $var wire 8 * count [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-b00000000 #
+0#
 0$
-0%
-b00000000 &
-b0000000000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000000000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00000000 *
 b00000000000000000000000000000001 +
 #10
-b00000001 #
+1#
 1$
-1%
-b11101111 &
-b0000000111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000000111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00000001 *
 #15
-b00000010 #
+0#
 0$
-0%
-b00000000 &
-b0000001000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000001000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00000010 *
 #20
-b00000011 #
+1#
 1$
-1%
-b11101111 &
-b0000001111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000001111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00000011 *
 #25
-b00000100 #
+0#
 0$
-0%
-b00000000 &
-b0000010000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000010000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00000100 *
 #30
-b00000101 #
+1#
 1$
-1%
-b11101111 &
-b0000010111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000010111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00000101 *
 #35
-b00000110 #
+0#
 0$
-0%
-b00000000 &
-b0000011000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000011000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00000110 *
 #40
-b00000111 #
+1#
 1$
-1%
-b11101111 &
-b0000011111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000011111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00000111 *
 #45
-b00001000 #
+0#
 0$
-0%
-b00000000 &
-b0000100000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000100000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00001000 *
 #50
-b00001001 #
+1#
 1$
-1%
-b11101111 &
-b0000100111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000100111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00001001 *
 #55
-b00001010 #
+0#
 0$
-0%
-b00000000 &
-b0000101000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000101000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00001010 *
 #60
-b00001011 #
+1#
 1$
-1%
-b11101111 &
-b0000101111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000101111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00001011 *
 #65
-b00001100 #
+0#
 0$
-0%
-b00000000 &
-b0000110000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000110000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00001100 *
 #70
-b00001101 #
+1#
 1$
-1%
-b11101111 &
-b0000110111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000110111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00001101 *
 #75
-b00001110 #
+0#
 0$
-0%
-b00000000 &
-b0000111000000000 '
-b00000000 (
-b000 )
-b0000 *
+b00000000 %
+b0000111000000000 &
+b00000000 '
+b000 (
+b0000 )
+b00001110 *
 #80
-b00001111 #
+1#
 1$
-1%
-b11101111 &
-b0000111111111111 '
-b11111111 (
-b111 )
-b1111 *
+b11101111 %
+b0000111111111111 &
+b11111111 '
+b111 (
+b1111 )
+b00001111 *
diff --git a/test_regress/t/t_cover_line_trace.out b/test_regress/t/t_cover_line_trace.out
index e32c0cd15..be7140138 100644
--- a/test_regress/t/t_cover_line_trace.out
+++ b/test_regress/t/t_cover_line_trace.out
@@ -2,19 +2,44 @@ $version Generated by VerilatedVcd $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 X clk $end
   $scope module t $end
-   $var wire  1 X clk $end
-   $var wire 32 ' cyc [31:0] $end
-   $var wire  8 ( cyc_copy [7:0] $end
-   $var wire  1 & toggle $end
-   $var wire 32 < vlCoverageLineTrace_t_cover_line__102_elsif [31:0] $end
-   $var wire 32 = vlCoverageLineTrace_t_cover_line__105_elsif [31:0] $end
-   $var wire 32 > vlCoverageLineTrace_t_cover_line__112_else [31:0] $end
-   $var wire 32 ? vlCoverageLineTrace_t_cover_line__112_if [31:0] $end
-   $var wire 32 Y vlCoverageLineTrace_t_cover_line__119_block [31:0] $end
+   $var wire 1 X clk $end
+   $var wire 1 & toggle $end
    $var wire 32 # vlCoverageLineTrace_t_cover_line__15_block [31:0] $end
+   $var wire 32 ' cyc [31:0] $end
    $var wire 32 $ vlCoverageLineTrace_t_cover_line__18_block [31:0] $end
+   $var wire 8 ( cyc_copy [7:0] $end
+   $scope module b1 $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
+    $var wire 32 L vlCoverageLineTrace_t_cover_line__156_block [31:0] $end
+    $var wire 32 M vlCoverageLineTrace_t_cover_line__158_else [31:0] $end
+    $var wire 32 c vlCoverageLineTrace_t_cover_line__158_if [31:0] $end
+    $var wire 32 N vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
+    $var wire 32 O vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
+    $var wire 32 P vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
+   $upscope $end
+   $scope module b2 $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
+    $var wire 32 Q vlCoverageLineTrace_t_cover_line__156_block [31:0] $end
+    $var wire 32 R vlCoverageLineTrace_t_cover_line__158_else [31:0] $end
+    $var wire 32 d vlCoverageLineTrace_t_cover_line__158_if [31:0] $end
+    $var wire 32 S vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
+    $var wire 32 T vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
+    $var wire 32 U vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
+   $upscope $end
+   $scope module t1 $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
+    $var wire 32 V vlCoverageLineTrace_t_cover_line__207_block [31:0] $end
+    $var wire 32 Z vlCoverageLineTrace_t_cover_line__211_block [31:0] $end
+    $var wire 32 [ vlCoverageLineTrace_t_cover_line__214_else [31:0] $end
+    $var wire 32 \ vlCoverageLineTrace_t_cover_line__214_if [31:0] $end
+    $var wire 32 W vlCoverageLineTrace_t_cover_line__217_else [31:0] $end
+    $var wire 32 ] vlCoverageLineTrace_t_cover_line__217_if [31:0] $end
+    $var wire 32 % vlCoverageLineTrace_t_cover_line__222_block [31:0] $end
+   $upscope $end
    $var wire 32 ) vlCoverageLineTrace_t_cover_line__47_block [31:0] $end
    $var wire 32 * vlCoverageLineTrace_t_cover_line__48_else [31:0] $end
    $var wire 32 + vlCoverageLineTrace_t_cover_line__48_if [31:0] $end
@@ -38,63 +63,38 @@ $timescale 1ps $end
    $var wire 32 _ vlCoverageLineTrace_t_cover_line__93_block [31:0] $end
    $var wire 32 ` vlCoverageLineTrace_t_cover_line__96_block [31:0] $end
    $var wire 32 a vlCoverageLineTrace_t_cover_line__97_block [31:0] $end
+   $var wire 32 < vlCoverageLineTrace_t_cover_line__102_elsif [31:0] $end
+   $var wire 32 = vlCoverageLineTrace_t_cover_line__105_elsif [31:0] $end
+   $var wire 32 > vlCoverageLineTrace_t_cover_line__112_else [31:0] $end
+   $var wire 32 ? vlCoverageLineTrace_t_cover_line__112_if [31:0] $end
+   $var wire 32 Y vlCoverageLineTrace_t_cover_line__119_block [31:0] $end
    $scope module a1 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
     $var wire 32 @ vlCoverageLineTrace_t_cover_line__132_block [31:0] $end
     $var wire 32 A vlCoverageLineTrace_t_cover_line__133_else [31:0] $end
     $var wire 32 B vlCoverageLineTrace_t_cover_line__133_if [31:0] $end
     $var wire 32 C vlCoverageLineTrace_t_cover_line__137_else [31:0] $end
    $upscope $end
    $scope module a2 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
     $var wire 32 D vlCoverageLineTrace_t_cover_line__132_block [31:0] $end
     $var wire 32 E vlCoverageLineTrace_t_cover_line__133_else [31:0] $end
     $var wire 32 F vlCoverageLineTrace_t_cover_line__133_if [31:0] $end
     $var wire 32 G vlCoverageLineTrace_t_cover_line__137_else [31:0] $end
    $upscope $end
-   $scope module b1 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
-    $var wire 32 L vlCoverageLineTrace_t_cover_line__156_block [31:0] $end
-    $var wire 32 M vlCoverageLineTrace_t_cover_line__158_else [31:0] $end
-    $var wire 32 c vlCoverageLineTrace_t_cover_line__158_if [31:0] $end
-    $var wire 32 N vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
-    $var wire 32 O vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
-    $var wire 32 P vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
-   $upscope $end
-   $scope module b2 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
-    $var wire 32 Q vlCoverageLineTrace_t_cover_line__156_block [31:0] $end
-    $var wire 32 R vlCoverageLineTrace_t_cover_line__158_else [31:0] $end
-    $var wire 32 d vlCoverageLineTrace_t_cover_line__158_if [31:0] $end
-    $var wire 32 S vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
-    $var wire 32 T vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
-    $var wire 32 U vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
-   $upscope $end
    $scope module o1 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
+    $var wire 1 X clk $end
+    $var wire 1 & toggle $end
     $var wire 32 H vlCoverageLineTrace_t_cover_line__245_block [31:0] $end
     $var wire 32 I vlCoverageLineTrace_t_cover_line__246_else [31:0] $end
     $var wire 32 J vlCoverageLineTrace_t_cover_line__246_if [31:0] $end
     $var wire 32 K vlCoverageLineTrace_t_cover_line__249_else [31:0] $end
     $var wire 32 b vlCoverageLineTrace_t_cover_line__249_if [31:0] $end
    $upscope $end
-   $scope module t1 $end
-    $var wire  1 X clk $end
-    $var wire  1 & toggle $end
-    $var wire 32 V vlCoverageLineTrace_t_cover_line__207_block [31:0] $end
-    $var wire 32 Z vlCoverageLineTrace_t_cover_line__211_block [31:0] $end
-    $var wire 32 [ vlCoverageLineTrace_t_cover_line__214_else [31:0] $end
-    $var wire 32 \ vlCoverageLineTrace_t_cover_line__214_if [31:0] $end
-    $var wire 32 W vlCoverageLineTrace_t_cover_line__217_else [31:0] $end
-    $var wire 32 ] vlCoverageLineTrace_t_cover_line__217_if [31:0] $end
-    $var wire 32 % vlCoverageLineTrace_t_cover_line__222_block [31:0] $end
-   $upscope $end
   $upscope $end
+  $var wire 1 X clk $end
  $upscope $end
 $enddefinitions $end
 
diff --git a/test_regress/t/t_cover_sva_trace.out b/test_regress/t/t_cover_sva_trace.out
index b51a11853..411432c80 100644
--- a/test_regress/t/t_cover_sva_trace.out
+++ b/test_regress/t/t_cover_sva_trace.out
@@ -1,31 +1,29 @@
 $version Generated by VerilatedVcd $end
-$date Thu Oct 24 09:44:07 2019
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 ) clk $end
+  $var wire 1 ) clk $end
   $scope module t $end
-   $var wire  1 ) clk $end
-   $var wire 32 # cyc [31:0] $end
-   $var wire  1 % toggle $end
+   $var wire 1 ) clk $end
+   $var wire 1 # toggle $end
+   $var wire 32 $ cyc [31:0] $end
    $scope module suba $end
-    $var wire  1 ) clk $end
-    $var wire 32 $ cyc [31:0] $end
+    $var wire 1 ) clk $end
+    $var wire 1 # toggle $end
+    $var wire 32 % cyc [31:0] $end
     $var wire 32 & cyc_eq_5_vlCoverageUserTrace [31:0] $end
-    $var wire  1 % toggle $end
    $upscope $end
    $scope module subb $end
-    $var wire  1 ) clk $end
-    $var wire 32 $ cyc [31:0] $end
+    $var wire 1 ) clk $end
+    $var wire 1 # toggle $end
+    $var wire 32 % cyc [31:0] $end
     $var wire 32 ' cyc_eq_5_vlCoverageUserTrace [31:0] $end
-    $var wire  1 % toggle $end
    $upscope $end
    $scope module subc $end
-    $var wire  1 ) clk $end
-    $var wire 32 $ cyc [31:0] $end
+    $var wire 1 ) clk $end
+    $var wire 1 # toggle $end
+    $var wire 32 % cyc [31:0] $end
     $var wire 32 ( cyc_eq_5_vlCoverageUserTrace [31:0] $end
-    $var wire  1 % toggle $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -33,44 +31,44 @@ $enddefinitions $end
 
 
 #0
-b00000000000000000000000000000001 #
+0#
 b00000000000000000000000000000001 $
-0%
+b00000000000000000000000000000001 %
 b00000000000000000000000000000000 &
 b00000000000000000000000000000000 '
 b00000000000000000000000000000000 (
 0)
 #10
-b00000000000000000000000000000010 #
 b00000000000000000000000000000010 $
+b00000000000000000000000000000010 %
 1)
 #15
 0)
 #20
-b00000000000000000000000000000011 #
+1#
 b00000000000000000000000000000011 $
-1%
+b00000000000000000000000000000011 %
 1)
 #25
 0)
 #30
-b00000000000000000000000000000100 #
+0#
 b00000000000000000000000000000100 $
-0%
+b00000000000000000000000000000100 %
 1)
 #35
 0)
 #40
-b00000000000000000000000000000101 #
+1#
 b00000000000000000000000000000101 $
-1%
+b00000000000000000000000000000101 %
 1)
 #45
 0)
 #50
-b00000000000000000000000000000110 #
+0#
 b00000000000000000000000000000110 $
-0%
+b00000000000000000000000000000110 %
 b00000000000000000000000000000001 &
 b00000000000000000000000000000001 '
 b00000000000000000000000000000001 (
@@ -78,35 +76,35 @@ b00000000000000000000000000000001 (
 #55
 0)
 #60
-b00000000000000000000000000000111 #
+1#
 b00000000000000000000000000000111 $
-1%
+b00000000000000000000000000000111 %
 1)
 #65
 0)
 #70
-b00000000000000000000000000001000 #
+0#
 b00000000000000000000000000001000 $
-0%
+b00000000000000000000000000001000 %
 1)
 #75
 0)
 #80
-b00000000000000000000000000001001 #
+1#
 b00000000000000000000000000001001 $
-1%
+b00000000000000000000000000001001 %
 1)
 #85
 0)
 #90
-b00000000000000000000000000001010 #
+0#
 b00000000000000000000000000001010 $
-0%
+b00000000000000000000000000001010 %
 1)
 #95
 0)
 #100
-b00000000000000000000000000001011 #
+1#
 b00000000000000000000000000001011 $
-1%
+b00000000000000000000000000001011 %
 1)
diff --git a/test_regress/t/t_force_release_net_trace.out b/test_regress/t/t_force_release_net_trace.out
index 8e4f066fc..d82ca7e15 100644
--- a/test_regress/t/t_force_release_net_trace.out
+++ b/test_regress/t/t_force_release_net_trace.out
@@ -1,213 +1,212 @@
 $version Generated by VerilatedVcd $end
-$date Sun Dec 19 14:44:51 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 & clk $end
   $scope module t $end
-   $var wire  1 # clk $end
-   $var wire 32 $ cyc [31:0] $end
-   $var wire  1 % net_1 $end
-   $var wire  8 & net_8 [7:0] $end
+   $var wire 1 & clk $end
+   $var wire 32 # cyc [31:0] $end
+   $var wire 1 $ net_1 $end
+   $var wire 8 % net_8 [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-0#
-b00000000000000000000000000000000 $
-1%
-b11111111 &
+b00000000000000000000000000000000 #
+1$
+b11111111 %
+0&
 #10
-1#
-b00000000000000000000000000000001 $
-0%
+b00000000000000000000000000000001 #
+0$
+1&
 #15
-0#
+0&
 #20
-1#
-b00000000000000000000000000000010 $
-1%
-b11111110 &
+b00000000000000000000000000000010 #
+1$
+b11111110 %
+1&
 #25
-0#
+0&
 #30
-1#
-b00000000000000000000000000000011 $
-0%
+b00000000000000000000000000000011 #
+0$
+1&
 #35
-0#
+0&
 #40
-1#
-b00000000000000000000000000000100 $
-b11111101 &
+b00000000000000000000000000000100 #
+b11111101 %
+1&
 #45
-0#
+0&
 #50
-1#
-b00000000000000000000000000000101 $
-b01011111 &
+b00000000000000000000000000000101 #
+b01011111 %
+1&
 #55
-0#
+0&
 #60
-1#
-b00000000000000000000000000000110 $
-1%
+b00000000000000000000000000000110 #
+1$
+1&
 #65
-0#
+0&
 #70
-1#
-b00000000000000000000000000000111 $
-b11110101 &
+b00000000000000000000000000000111 #
+b11110101 %
+1&
 #75
-0#
+0&
 #80
-1#
-b00000000000000000000000000001000 $
+b00000000000000000000000000001000 #
+1&
 #85
-0#
+0&
 #90
-1#
-b00000000000000000000000000001001 $
-0%
+b00000000000000000000000000001001 #
+0$
+1&
 #95
-0#
+0&
 #100
-1#
-b00000000000000000000000000001010 $
-1%
-b11111010 &
+b00000000000000000000000000001010 #
+1$
+b11111010 %
+1&
 #105
-0#
+0&
 #110
-1#
-b00000000000000000000000000001011 $
-b01011010 &
+b00000000000000000000000000001011 #
+b01011010 %
+1&
 #115
-0#
+0&
 #120
-1#
-b00000000000000000000000000001100 $
+b00000000000000000000000000001100 #
+1&
 #125
-0#
+0&
 #130
-1#
-b00000000000000000000000000001101 $
-0%
-b10100101 &
+b00000000000000000000000000001101 #
+0$
+b10100101 %
+1&
 #135
-0#
+0&
 #140
-1#
-b00000000000000000000000000001110 $
+b00000000000000000000000000001110 #
+1&
 #145
-0#
+0&
 #150
-1#
-b00000000000000000000000000001111 $
-b11111000 &
+b00000000000000000000000000001111 #
+b11111000 %
+1&
 #155
-0#
+0&
 #160
-1#
-b00000000000000000000000000010000 $
-1%
-b11110111 &
+b00000000000000000000000000010000 #
+1$
+b11110111 %
+1&
 #165
-0#
+0&
 #170
-1#
-b00000000000000000000000000010001 $
-0%
+b00000000000000000000000000010001 #
+0$
+1&
 #175
-0#
+0&
 #180
-1#
-b00000000000000000000000000010010 $
-1%
-b11110110 &
+b00000000000000000000000000010010 #
+1$
+b11110110 %
+1&
 #185
-0#
+0&
 #190
-1#
-b00000000000000000000000000010011 $
-0%
+b00000000000000000000000000010011 #
+0$
+1&
 #195
-0#
+0&
 #200
-1#
-b00000000000000000000000000010100 $
-1%
-b11110101 &
+b00000000000000000000000000010100 #
+1$
+b11110101 %
+1&
 #205
-0#
+0&
 #210
-1#
-b00000000000000000000000000010101 $
-0%
+b00000000000000000000000000010101 #
+0$
+1&
 #215
-0#
+0&
 #220
-1#
-b00000000000000000000000000010110 $
-1%
-b11110100 &
+b00000000000000000000000000010110 #
+1$
+b11110100 %
+1&
 #225
-0#
+0&
 #230
-1#
-b00000000000000000000000000010111 $
-0%
+b00000000000000000000000000010111 #
+0$
+1&
 #235
-0#
+0&
 #240
-1#
-b00000000000000000000000000011000 $
-1%
-b11110011 &
+b00000000000000000000000000011000 #
+1$
+b11110011 %
+1&
 #245
-0#
+0&
 #250
-1#
-b00000000000000000000000000011001 $
-0%
+b00000000000000000000000000011001 #
+0$
+1&
 #255
-0#
+0&
 #260
-1#
-b00000000000000000000000000011010 $
-1%
-b11110010 &
+b00000000000000000000000000011010 #
+1$
+b11110010 %
+1&
 #265
-0#
+0&
 #270
-1#
-b00000000000000000000000000011011 $
-0%
+b00000000000000000000000000011011 #
+0$
+1&
 #275
-0#
+0&
 #280
-1#
-b00000000000000000000000000011100 $
-1%
-b11110001 &
+b00000000000000000000000000011100 #
+1$
+b11110001 %
+1&
 #285
-0#
+0&
 #290
-1#
-b00000000000000000000000000011101 $
-0%
+b00000000000000000000000000011101 #
+0$
+1&
 #295
-0#
+0&
 #300
-1#
-b00000000000000000000000000011110 $
-1%
-b11110000 &
+b00000000000000000000000000011110 #
+1$
+b11110000 %
+1&
 #305
-0#
+0&
 #310
-1#
-b00000000000000000000000000011111 $
-0%
+b00000000000000000000000000011111 #
+0$
+1&
diff --git a/test_regress/t/t_force_release_var_trace.out b/test_regress/t/t_force_release_var_trace.out
index 42d114f66..6ee8f010d 100644
--- a/test_regress/t/t_force_release_var_trace.out
+++ b/test_regress/t/t_force_release_var_trace.out
@@ -1,211 +1,210 @@
 $version Generated by VerilatedVcd $end
-$date Sun Dec 19 14:45:16 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 & clk $end
   $scope module t $end
-   $var wire  1 # clk $end
-   $var wire 32 $ cyc [31:0] $end
-   $var wire  1 % var_1 $end
-   $var wire  8 & var_8 [7:0] $end
+   $var wire 1 & clk $end
+   $var wire 32 # cyc [31:0] $end
+   $var wire 1 $ var_1 $end
+   $var wire 8 % var_8 [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-0#
-b00000000000000000000000000000000 $
-0%
-b00000000 &
+b00000000000000000000000000000000 #
+0$
+b00000000 %
+0&
 #10
-1#
-b00000000000000000000000000000001 $
+b00000000000000000000000000000001 #
+1&
 #15
-0#
+0&
 #20
-1#
-b00000000000000000000000000000010 $
-1%
+b00000000000000000000000000000010 #
+1$
+1&
 #25
-0#
+0&
 #30
-1#
-b00000000000000000000000000000011 $
-0%
-b00000001 &
+b00000000000000000000000000000011 #
+0$
+b00000001 %
+1&
 #35
-0#
+0&
 #40
-1#
-b00000000000000000000000000000100 $
-1%
+b00000000000000000000000000000100 #
+1$
+1&
 #45
-0#
+0&
 #50
-1#
-b00000000000000000000000000000101 $
-0%
-b00000010 &
+b00000000000000000000000000000101 #
+0$
+b00000010 %
+1&
 #55
-0#
+0&
 #60
-1#
-b00000000000000000000000000000110 $
-1%
+b00000000000000000000000000000110 #
+1$
+1&
 #65
-0#
+0&
 #70
-1#
-b00000000000000000000000000000111 $
-0%
-b00000011 &
+b00000000000000000000000000000111 #
+0$
+b00000011 %
+1&
 #75
-0#
+0&
 #80
-1#
-b00000000000000000000000000001000 $
-1%
+b00000000000000000000000000001000 #
+1$
+1&
 #85
-0#
+0&
 #90
-1#
-b00000000000000000000000000001001 $
-0%
-b00000100 &
+b00000000000000000000000000001001 #
+0$
+b00000100 %
+1&
 #95
-0#
+0&
 #100
-1#
-b00000000000000000000000000001010 $
-1%
+b00000000000000000000000000001010 #
+1$
+1&
 #105
-0#
+0&
 #110
-1#
-b00000000000000000000000000001011 $
-0%
-b00000101 &
+b00000000000000000000000000001011 #
+0$
+b00000101 %
+1&
 #115
-0#
+0&
 #120
-1#
-b00000000000000000000000000001100 $
-1%
+b00000000000000000000000000001100 #
+1$
+1&
 #125
-0#
+0&
 #130
-1#
-b00000000000000000000000000001101 $
-0%
-b00000110 &
+b00000000000000000000000000001101 #
+0$
+b00000110 %
+1&
 #135
-0#
+0&
 #140
-1#
-b00000000000000000000000000001110 $
-1%
+b00000000000000000000000000001110 #
+1$
+1&
 #145
-0#
+0&
 #150
-1#
-b00000000000000000000000000001111 $
-b11110101 &
+b00000000000000000000000000001111 #
+b11110101 %
+1&
 #155
-0#
+0&
 #160
-1#
-b00000000000000000000000000010000 $
-0%
+b00000000000000000000000000010000 #
+0$
+1&
 #165
-0#
+0&
 #170
-1#
-b00000000000000000000000000010001 $
-b01011111 &
+b00000000000000000000000000010001 #
+b01011111 %
+1&
 #175
-0#
+0&
 #180
-1#
-b00000000000000000000000000010010 $
+b00000000000000000000000000010010 #
+1&
 #185
-0#
+0&
 #190
-1#
-b00000000000000000000000000010011 $
+b00000000000000000000000000010011 #
+1&
 #195
-0#
+0&
 #200
-1#
-b00000000000000000000000000010100 $
-1%
-b00001001 &
+b00000000000000000000000000010100 #
+1$
+b00001001 %
+1&
 #205
-0#
+0&
 #210
-1#
-b00000000000000000000000000010101 $
-b01011010 &
+b00000000000000000000000000010101 #
+b01011010 %
+1&
 #215
-0#
+0&
 #220
-1#
-b00000000000000000000000000010110 $
+b00000000000000000000000000010110 #
+1&
 #225
-0#
+0&
 #230
-1#
-b00000000000000000000000000010111 $
-0%
-b10100101 &
+b00000000000000000000000000010111 #
+0$
+b10100101 %
+1&
 #235
-0#
+0&
 #240
-1#
-b00000000000000000000000000011000 $
+b00000000000000000000000000011000 #
+1&
 #245
-0#
+0&
 #250
-1#
-b00000000000000000000000000011001 $
-b00001100 &
+b00000000000000000000000000011001 #
+b00001100 %
+1&
 #255
-0#
+0&
 #260
-1#
-b00000000000000000000000000011010 $
-1%
+b00000000000000000000000000011010 #
+1$
+1&
 #265
-0#
+0&
 #270
-1#
-b00000000000000000000000000011011 $
-0%
-b00001101 &
+b00000000000000000000000000011011 #
+0$
+b00001101 %
+1&
 #275
-0#
+0&
 #280
-1#
-b00000000000000000000000000011100 $
-1%
+b00000000000000000000000000011100 #
+1$
+1&
 #285
-0#
+0&
 #290
-1#
-b00000000000000000000000000011101 $
-0%
-b00001110 &
+b00000000000000000000000000011101 #
+0$
+b00001110 %
+1&
 #295
-0#
+0&
 #300
-1#
-b00000000000000000000000000011110 $
-1%
+b00000000000000000000000000011110 #
+1$
+1&
 #305
-0#
+0&
 #310
-1#
-b00000000000000000000000000011111 $
-0%
-b00001111 &
+b00000000000000000000000000011111 #
+0$
+b00001111 %
+1&
diff --git a/test_regress/t/t_forceable_net_trace.vcd b/test_regress/t/t_forceable_net_trace.vcd
index faef0833b..23a870d1e 100644
--- a/test_regress/t/t_forceable_net_trace.vcd
+++ b/test_regress/t/t_forceable_net_trace.vcd
@@ -1,17 +1,16 @@
 $version Generated by VerilatedVcd $end
-$date Sun Dec 19 19:39:17 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 # clk $end
+  $var wire 1 $ rst $end
   $var wire 32 % cyc [31:0] $end
-  $var wire  1 $ rst $end
   $scope module t $end
-   $var wire  1 # clk $end
+   $var wire 1 # clk $end
+   $var wire 1 $ rst $end
    $var wire 32 % cyc [31:0] $end
-   $var wire  1 & net_1 $end
-   $var wire  8 ' net_8 [7:0] $end
-   $var wire  1 $ rst $end
+   $var wire 1 & net_1 $end
+   $var wire 8 ' net_8 [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_forceable_var_trace.vcd b/test_regress/t/t_forceable_var_trace.vcd
index 2aaaa7dac..1e5824fa2 100644
--- a/test_regress/t/t_forceable_var_trace.vcd
+++ b/test_regress/t/t_forceable_var_trace.vcd
@@ -1,17 +1,16 @@
 $version Generated by VerilatedVcd $end
-$date Sun Dec 19 19:26:33 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 # clk $end
+  $var wire 1 $ rst $end
   $var wire 32 % cyc [31:0] $end
-  $var wire  1 $ rst $end
   $scope module t $end
-   $var wire  1 # clk $end
+   $var wire 1 # clk $end
+   $var wire 1 $ rst $end
    $var wire 32 % cyc [31:0] $end
-   $var wire  1 $ rst $end
-   $var wire  1 & var_1 $end
-   $var wire  8 ' var_8 [7:0] $end
+   $var wire 1 & var_1 $end
+   $var wire 8 ' var_8 [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_hier_block_sc_trace_fst.out b/test_regress/t/t_hier_block_sc_trace_fst.out
index 0371854fe..d483bed92 100644
--- a/test_regress/t/t_hier_block_sc_trace_fst.out
+++ b/test_regress/t/t_hier_block_sc_trace_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Nov 10 20:17:06 2022
+	Mon Oct 23 12:15:09 2023
 
 $end
 $version
@@ -148,7 +148,23 @@ $var wire 1 D clk $end
 $var wire 8 E in [7:0] $end
 $var wire 8 F out [7:0] $end
 $var logic 8 G ff [7:0] $end
+$scope interface in_ifs $end
+$var wire 1 D clk $end
+$var logic 8 G data [7:0] $end
+$upscope $end
+$scope interface out_ifs $end
+$var wire 1 D clk $end
+$var logic 8 H data [7:0] $end
+$upscope $end
 $scope module i_sub3 $end
+$scope interface in $end
+$var wire 1 D clk $end
+$var logic 8 G data [7:0] $end
+$upscope $end
+$scope interface out $end
+$var wire 1 D clk $end
+$var logic 8 H data [7:0] $end
+$upscope $end
 $var wire 8 G in_wire [7:0] $end
 $var wire 8 H out_1 [7:0] $end
 $var wire 8 I out_2 [7:0] $end
@@ -162,22 +178,6 @@ $var wire 1 D clk $end
 $var wire 8 G in [7:0] $end
 $var wire 8 I out [7:0] $end
 $upscope $end
-$scope interface in $end
-$var wire 1 D clk $end
-$var logic 8 G data [7:0] $end
-$upscope $end
-$scope interface out $end
-$var wire 1 D clk $end
-$var logic 8 H data [7:0] $end
-$upscope $end
-$upscope $end
-$scope interface in_ifs $end
-$var wire 1 D clk $end
-$var logic 8 G data [7:0] $end
-$upscope $end
-$scope interface out_ifs $end
-$var wire 1 D clk $end
-$var logic 8 H data [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -194,1328 +194,1289 @@ $var wire 1 J clk $end
 $var wire 8 K in [7:0] $end
 $var wire 8 L out [7:0] $end
 $var logic 8 Q ff [7:0] $end
-$var wire 8 R out4 [7:0] $end
-$var wire 8 S out4_2 [7:0] $end
+$var wire 8 L out4 [7:0] $end
+$var wire 8 R out4_2 [7:0] $end
 $scope module i_sub4_0 $end
 $var wire 1 J clk $end
 $var wire 8 Q in [7:0] $end
-$var wire 8 R out [7:0] $end
+$var wire 8 L out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
 $var wire 1 J clk $end
 $var wire 8 Q in [7:0] $end
-$var wire 8 S out [7:0] $end
+$var wire 8 R out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0 $end
-$var wire 1 T clk $end
-$var wire 8 U in [7:0] $end
-$var wire 8 V out [7:0] $end
+$var wire 1 S clk $end
+$var wire 8 T in [7:0] $end
+$var wire 8 U out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 W P0 [31:0] $end
-$var real_parameter 64 X P1 $end
-$var real_parameter 64 Y P3 $end
-$var wire 1 T clk $end
-$var wire 8 U in [7:0] $end
-$var wire 8 V out [7:0] $end
-$var logic 8 Z ff [7:0] $end
-$var logic 128 [ sub5_in[0][0] [127:0] $end
-$var logic 128 \ sub5_in[0][1] [127:0] $end
-$var logic 128 ] sub5_in[0][2] [127:0] $end
-$var logic 128 ^ sub5_in[1][0] [127:0] $end
-$var logic 128 _ sub5_in[1][1] [127:0] $end
-$var logic 128 ` sub5_in[1][2] [127:0] $end
-$var wire 8 a sub5_out[0][0] [7:0] $end
-$var wire 8 b sub5_out[0][1] [7:0] $end
-$var wire 8 c sub5_out[0][2] [7:0] $end
-$var wire 8 d sub5_out[1][0] [7:0] $end
-$var wire 8 e sub5_out[1][1] [7:0] $end
-$var wire 8 f sub5_out[1][2] [7:0] $end
-$var int 32 g count [31:0] $end
+$var parameter 32 V P0 [31:0] $end
+$var real_parameter 64 W P1 $end
+$var real_parameter 64 X P3 $end
+$var wire 1 S clk $end
+$var wire 8 T in [7:0] $end
+$var wire 8 U out [7:0] $end
+$var logic 8 Y ff [7:0] $end
+$var logic 128 Z sub5_in[0][0] [127:0] $end
+$var logic 128 [ sub5_in[0][1] [127:0] $end
+$var logic 128 \ sub5_in[0][2] [127:0] $end
+$var logic 128 ] sub5_in[1][0] [127:0] $end
+$var logic 128 ^ sub5_in[1][1] [127:0] $end
+$var logic 128 _ sub5_in[1][2] [127:0] $end
+$var wire 8 ` sub5_out[0][0] [7:0] $end
+$var wire 8 a sub5_out[0][1] [7:0] $end
+$var wire 8 b sub5_out[0][2] [7:0] $end
+$var wire 8 c sub5_out[1][0] [7:0] $end
+$var wire 8 d sub5_out[1][1] [7:0] $end
+$var wire 8 e sub5_out[1][2] [7:0] $end
+$var int 32 f count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 T clk $end
-$var wire 128 h in[0][0] [127:0] $end
-$var wire 128 i in[0][1] [127:0] $end
-$var wire 128 j in[0][2] [127:0] $end
-$var wire 128 k in[1][0] [127:0] $end
-$var wire 128 l in[1][1] [127:0] $end
-$var wire 128 m in[1][2] [127:0] $end
-$var wire 8 n out[0][0] [7:0] $end
-$var wire 8 o out[0][1] [7:0] $end
-$var wire 8 p out[0][2] [7:0] $end
-$var wire 8 q out[1][0] [7:0] $end
-$var wire 8 r out[1][1] [7:0] $end
-$var wire 8 s out[1][2] [7:0] $end
+$var wire 1 S clk $end
+$var wire 128 g in[0][0] [127:0] $end
+$var wire 128 h in[0][1] [127:0] $end
+$var wire 128 i in[0][2] [127:0] $end
+$var wire 128 j in[1][0] [127:0] $end
+$var wire 128 k in[1][1] [127:0] $end
+$var wire 128 l in[1][2] [127:0] $end
+$var wire 8 m out[0][0] [7:0] $end
+$var wire 8 n out[0][1] [7:0] $end
+$var wire 8 o out[0][2] [7:0] $end
+$var wire 8 p out[1][0] [7:0] $end
+$var wire 8 q out[1][1] [7:0] $end
+$var wire 8 r out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 t i [31:0] $end
+$var int 32 s i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 u j [31:0] $end
+$var int 32 t j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 v exp [7:0] $end
+$var byte 8 u exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 w clk $end
-$var wire 128 x in[0][0] [127:0] $end
-$var wire 128 y in[0][1] [127:0] $end
-$var wire 128 z in[0][2] [127:0] $end
-$var wire 128 { in[1][0] [127:0] $end
-$var wire 128 | in[1][1] [127:0] $end
-$var wire 128 } in[1][2] [127:0] $end
-$var wire 8 ~ out[0][0] [7:0] $end
-$var wire 8 !! out[0][1] [7:0] $end
-$var wire 8 "! out[0][2] [7:0] $end
-$var wire 8 #! out[1][0] [7:0] $end
-$var wire 8 $! out[1][1] [7:0] $end
-$var wire 8 %! out[1][2] [7:0] $end
+$var wire 1 v clk $end
+$var wire 128 w in[0][0] [127:0] $end
+$var wire 128 x in[0][1] [127:0] $end
+$var wire 128 y in[0][2] [127:0] $end
+$var wire 128 z in[1][0] [127:0] $end
+$var wire 128 { in[1][1] [127:0] $end
+$var wire 128 | in[1][2] [127:0] $end
+$var wire 8 } out[0][0] [7:0] $end
+$var wire 8 ~ out[0][1] [7:0] $end
+$var wire 8 !! out[0][2] [7:0] $end
+$var wire 8 "! out[1][0] [7:0] $end
+$var wire 8 #! out[1][1] [7:0] $end
+$var wire 8 $! out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 w clk $end
-$var wire 128 x in[0][0] [127:0] $end
-$var wire 128 y in[0][1] [127:0] $end
-$var wire 128 z in[0][2] [127:0] $end
-$var wire 128 { in[1][0] [127:0] $end
-$var wire 128 | in[1][1] [127:0] $end
-$var wire 128 } in[1][2] [127:0] $end
-$var wire 8 ~ out[0][0] [7:0] $end
-$var wire 8 !! out[0][1] [7:0] $end
-$var wire 8 "! out[0][2] [7:0] $end
-$var wire 8 #! out[1][0] [7:0] $end
-$var wire 8 $! out[1][1] [7:0] $end
-$var wire 8 %! out[1][2] [7:0] $end
-$var int 32 &! count [31:0] $end
-$var wire 8 '! val0[0] [7:0] $end
-$var wire 8 (! val0[1] [7:0] $end
-$var wire 8 )! val1[0] [7:0] $end
-$var wire 8 *! val1[1] [7:0] $end
-$var wire 8 +! val2[0] [7:0] $end
-$var wire 8 ,! val2[1] [7:0] $end
-$var wire 8 -! val3[0] [7:0] $end
-$var wire 8 .! val3[1] [7:0] $end
+$var wire 1 v clk $end
+$var wire 128 w in[0][0] [127:0] $end
+$var wire 128 x in[0][1] [127:0] $end
+$var wire 128 y in[0][2] [127:0] $end
+$var wire 128 z in[1][0] [127:0] $end
+$var wire 128 { in[1][1] [127:0] $end
+$var wire 128 | in[1][2] [127:0] $end
+$var wire 8 } out[0][0] [7:0] $end
+$var wire 8 ~ out[0][1] [7:0] $end
+$var wire 8 !! out[0][2] [7:0] $end
+$var wire 8 "! out[1][0] [7:0] $end
+$var wire 8 #! out[1][1] [7:0] $end
+$var wire 8 $! out[1][2] [7:0] $end
+$var int 32 %! count [31:0] $end
+$var wire 8 &! val0[0] [7:0] $end
+$var wire 8 '! val0[1] [7:0] $end
+$var wire 8 (! val1[0] [7:0] $end
+$var wire 8 )! val1[1] [7:0] $end
+$var wire 8 *! val2[0] [7:0] $end
+$var wire 8 +! val2[1] [7:0] $end
+$var wire 8 ,! val3[0] [7:0] $end
+$var wire 8 -! val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 1! out[0] [7:0] $end
-$var wire 8 2! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 &! out[0] [7:0] $end
+$var wire 8 '! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 3! out[0] [7:0] $end
-$var wire 8 4! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 (! out[0] [7:0] $end
+$var wire 8 )! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 5! out[0] [7:0] $end
-$var wire 8 6! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 *! out[0] [7:0] $end
+$var wire 8 +! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 7! out[0] [7:0] $end
-$var wire 8 8! out[1] [7:0] $end
+$var wire 8 0! out[0] [7:0] $end
+$var wire 8 1! out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 9! i [31:0] $end
+$var int 32 2! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 :! j [31:0] $end
+$var int 32 3! j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 ;! exp [127:0] $end
+$var bit 128 4! exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 <! out[0] [7:0] $end
-$var wire 8 =! out[1] [7:0] $end
+$var wire 8 5! out[0] [7:0] $end
+$var wire 8 6! out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 >! P0 [31:0] $end
-$var parameter 32 ?! P1 [31:0] $end
-$var wire 8 <! out[0] [7:0] $end
-$var wire 8 =! out[1] [7:0] $end
+$var parameter 32 7! P0 [31:0] $end
+$var parameter 32 8! P1 [31:0] $end
+$var wire 8 5! out[0] [7:0] $end
+$var wire 8 6! out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1 $end
-$var wire 1 @! clk $end
-$var wire 8 A! in [7:0] $end
-$var wire 8 B! out [7:0] $end
+$var wire 1 9! clk $end
+$var wire 8 :! in [7:0] $end
+$var wire 8 ;! out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 C! P0 [31:0] $end
-$var real_parameter 64 D! P1 $end
-$var real_parameter 64 E! P3 $end
-$var wire 1 @! clk $end
-$var wire 8 A! in [7:0] $end
-$var wire 8 B! out [7:0] $end
-$var logic 8 F! ff [7:0] $end
-$var logic 128 G! sub5_in[0][0] [127:0] $end
-$var logic 128 H! sub5_in[0][1] [127:0] $end
-$var logic 128 I! sub5_in[0][2] [127:0] $end
-$var logic 128 J! sub5_in[1][0] [127:0] $end
-$var logic 128 K! sub5_in[1][1] [127:0] $end
-$var logic 128 L! sub5_in[1][2] [127:0] $end
-$var wire 8 M! sub5_out[0][0] [7:0] $end
-$var wire 8 N! sub5_out[0][1] [7:0] $end
-$var wire 8 O! sub5_out[0][2] [7:0] $end
-$var wire 8 P! sub5_out[1][0] [7:0] $end
-$var wire 8 Q! sub5_out[1][1] [7:0] $end
-$var wire 8 R! sub5_out[1][2] [7:0] $end
-$var int 32 S! count [31:0] $end
+$var parameter 32 <! P0 [31:0] $end
+$var real_parameter 64 =! P1 $end
+$var real_parameter 64 >! P3 $end
+$var wire 1 9! clk $end
+$var wire 8 :! in [7:0] $end
+$var wire 8 ;! out [7:0] $end
+$var logic 8 ?! ff [7:0] $end
+$var logic 128 @! sub5_in[0][0] [127:0] $end
+$var logic 128 A! sub5_in[0][1] [127:0] $end
+$var logic 128 B! sub5_in[0][2] [127:0] $end
+$var logic 128 C! sub5_in[1][0] [127:0] $end
+$var logic 128 D! sub5_in[1][1] [127:0] $end
+$var logic 128 E! sub5_in[1][2] [127:0] $end
+$var wire 8 F! sub5_out[0][0] [7:0] $end
+$var wire 8 G! sub5_out[0][1] [7:0] $end
+$var wire 8 H! sub5_out[0][2] [7:0] $end
+$var wire 8 I! sub5_out[1][0] [7:0] $end
+$var wire 8 J! sub5_out[1][1] [7:0] $end
+$var wire 8 K! sub5_out[1][2] [7:0] $end
+$var int 32 L! count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 @! clk $end
-$var wire 128 T! in[0][0] [127:0] $end
-$var wire 128 U! in[0][1] [127:0] $end
-$var wire 128 V! in[0][2] [127:0] $end
-$var wire 128 W! in[1][0] [127:0] $end
-$var wire 128 X! in[1][1] [127:0] $end
-$var wire 128 Y! in[1][2] [127:0] $end
-$var wire 8 Z! out[0][0] [7:0] $end
-$var wire 8 [! out[0][1] [7:0] $end
-$var wire 8 \! out[0][2] [7:0] $end
-$var wire 8 ]! out[1][0] [7:0] $end
-$var wire 8 ^! out[1][1] [7:0] $end
-$var wire 8 _! out[1][2] [7:0] $end
+$var wire 1 9! clk $end
+$var wire 128 M! in[0][0] [127:0] $end
+$var wire 128 N! in[0][1] [127:0] $end
+$var wire 128 O! in[0][2] [127:0] $end
+$var wire 128 P! in[1][0] [127:0] $end
+$var wire 128 Q! in[1][1] [127:0] $end
+$var wire 128 R! in[1][2] [127:0] $end
+$var wire 8 S! out[0][0] [7:0] $end
+$var wire 8 T! out[0][1] [7:0] $end
+$var wire 8 U! out[0][2] [7:0] $end
+$var wire 8 V! out[1][0] [7:0] $end
+$var wire 8 W! out[1][1] [7:0] $end
+$var wire 8 X! out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 `! i [31:0] $end
+$var int 32 Y! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 a! j [31:0] $end
+$var int 32 Z! j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 b! exp [7:0] $end
+$var byte 8 [! exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 c! clk $end
-$var wire 128 d! in[0][0] [127:0] $end
-$var wire 128 e! in[0][1] [127:0] $end
-$var wire 128 f! in[0][2] [127:0] $end
-$var wire 128 g! in[1][0] [127:0] $end
-$var wire 128 h! in[1][1] [127:0] $end
-$var wire 128 i! in[1][2] [127:0] $end
-$var wire 8 j! out[0][0] [7:0] $end
-$var wire 8 k! out[0][1] [7:0] $end
-$var wire 8 l! out[0][2] [7:0] $end
-$var wire 8 m! out[1][0] [7:0] $end
-$var wire 8 n! out[1][1] [7:0] $end
-$var wire 8 o! out[1][2] [7:0] $end
+$var wire 1 \! clk $end
+$var wire 128 ]! in[0][0] [127:0] $end
+$var wire 128 ^! in[0][1] [127:0] $end
+$var wire 128 _! in[0][2] [127:0] $end
+$var wire 128 `! in[1][0] [127:0] $end
+$var wire 128 a! in[1][1] [127:0] $end
+$var wire 128 b! in[1][2] [127:0] $end
+$var wire 8 c! out[0][0] [7:0] $end
+$var wire 8 d! out[0][1] [7:0] $end
+$var wire 8 e! out[0][2] [7:0] $end
+$var wire 8 f! out[1][0] [7:0] $end
+$var wire 8 g! out[1][1] [7:0] $end
+$var wire 8 h! out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 c! clk $end
-$var wire 128 d! in[0][0] [127:0] $end
-$var wire 128 e! in[0][1] [127:0] $end
-$var wire 128 f! in[0][2] [127:0] $end
-$var wire 128 g! in[1][0] [127:0] $end
-$var wire 128 h! in[1][1] [127:0] $end
-$var wire 128 i! in[1][2] [127:0] $end
-$var wire 8 j! out[0][0] [7:0] $end
-$var wire 8 k! out[0][1] [7:0] $end
-$var wire 8 l! out[0][2] [7:0] $end
-$var wire 8 m! out[1][0] [7:0] $end
-$var wire 8 n! out[1][1] [7:0] $end
-$var wire 8 o! out[1][2] [7:0] $end
-$var int 32 p! count [31:0] $end
-$var wire 8 q! val0[0] [7:0] $end
-$var wire 8 r! val0[1] [7:0] $end
-$var wire 8 s! val1[0] [7:0] $end
-$var wire 8 t! val1[1] [7:0] $end
-$var wire 8 u! val2[0] [7:0] $end
-$var wire 8 v! val2[1] [7:0] $end
-$var wire 8 w! val3[0] [7:0] $end
-$var wire 8 x! val3[1] [7:0] $end
+$var wire 1 \! clk $end
+$var wire 128 ]! in[0][0] [127:0] $end
+$var wire 128 ^! in[0][1] [127:0] $end
+$var wire 128 _! in[0][2] [127:0] $end
+$var wire 128 `! in[1][0] [127:0] $end
+$var wire 128 a! in[1][1] [127:0] $end
+$var wire 128 b! in[1][2] [127:0] $end
+$var wire 8 c! out[0][0] [7:0] $end
+$var wire 8 d! out[0][1] [7:0] $end
+$var wire 8 e! out[0][2] [7:0] $end
+$var wire 8 f! out[1][0] [7:0] $end
+$var wire 8 g! out[1][1] [7:0] $end
+$var wire 8 h! out[1][2] [7:0] $end
+$var int 32 i! count [31:0] $end
+$var wire 8 j! val0[0] [7:0] $end
+$var wire 8 k! val0[1] [7:0] $end
+$var wire 8 l! val1[0] [7:0] $end
+$var wire 8 m! val1[1] [7:0] $end
+$var wire 8 n! val2[0] [7:0] $end
+$var wire 8 o! val2[1] [7:0] $end
+$var wire 8 p! val3[0] [7:0] $end
+$var wire 8 q! val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 {! out[0] [7:0] $end
-$var wire 8 |! out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 j! out[0] [7:0] $end
+$var wire 8 k! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 }! out[0] [7:0] $end
-$var wire 8 ~! out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 l! out[0] [7:0] $end
+$var wire 8 m! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 !" out[0] [7:0] $end
-$var wire 8 "" out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 n! out[0] [7:0] $end
+$var wire 8 o! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 #" out[0] [7:0] $end
-$var wire 8 $" out[1] [7:0] $end
+$var wire 8 t! out[0] [7:0] $end
+$var wire 8 u! out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 %" i [31:0] $end
+$var int 32 v! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 &" j [31:0] $end
+$var int 32 w! j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 '" exp [127:0] $end
+$var bit 128 x! exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-$var wire 8 (" out[0] [7:0] $end
-$var wire 8 )" out[1] [7:0] $end
+$var wire 8 y! out[0] [7:0] $end
+$var wire 8 z! out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 *" P0 [31:0] $end
-$var parameter 32 +" P1 [31:0] $end
-$var wire 8 (" out[0] [7:0] $end
-$var wire 8 )" out[1] [7:0] $end
+$var parameter 32 {! P0 [31:0] $end
+$var parameter 32 |! P1 [31:0] $end
+$var wire 8 y! out[0] [7:0] $end
+$var wire 8 z! out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2 $end
-$var wire 1 ," clk $end
-$var wire 8 -" in [7:0] $end
-$var wire 8 ." out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 ~! in [7:0] $end
+$var wire 8 !" out [7:0] $end
 $scope module sub3_2 $end
-$var parameter 8 /" P0 [7:0] $end
-$var parameter 32 0" UNPACKED_ARRAY[0] [31:0] $end
-$var parameter 32 1" UNPACKED_ARRAY[1] [31:0] $end
-$var parameter 16 2" UNUSED [15:0] $end
-$var wire 1 ," clk $end
-$var wire 8 -" in [7:0] $end
-$var wire 8 ." out [7:0] $end
-$var logic 8 3" ff [7:0] $end
-$var wire 8 4" out4 [7:0] $end
-$var wire 8 5" out4_2 [7:0] $end
+$var parameter 8 "" P0 [7:0] $end
+$var parameter 32 #" UNPACKED_ARRAY[0] [31:0] $end
+$var parameter 32 $" UNPACKED_ARRAY[1] [31:0] $end
+$var parameter 16 %" UNUSED [15:0] $end
+$var wire 1 }! clk $end
+$var wire 8 ~! in [7:0] $end
+$var wire 8 !" out [7:0] $end
+$var logic 8 &" ff [7:0] $end
+$var wire 8 !" out4 [7:0] $end
+$var wire 8 '" out4_2 [7:0] $end
 $scope module i_sub4_0 $end
-$var wire 1 ," clk $end
-$var wire 8 3" in [7:0] $end
-$var wire 8 4" out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 &" in [7:0] $end
+$var wire 8 !" out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
-$var wire 1 ," clk $end
-$var wire 8 3" in [7:0] $end
-$var wire 8 5" out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 &" in [7:0] $end
+$var wire 8 '" out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0 $end
-$var wire 1 6" clk $end
-$var wire 8 7" in [7:0] $end
-$var wire 8 8" out [7:0] $end
+$var wire 1 (" clk $end
+$var wire 8 )" in [7:0] $end
+$var wire 8 *" out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 9" P0 [31:0] $end
-$var real_parameter 64 :" P1 $end
-$var real_parameter 64 ;" P3 $end
-$var wire 1 6" clk $end
-$var wire 8 7" in [7:0] $end
-$var wire 8 8" out [7:0] $end
-$var logic 8 <" ff [7:0] $end
-$var logic 128 =" sub5_in[0][0] [127:0] $end
-$var logic 128 >" sub5_in[0][1] [127:0] $end
-$var logic 128 ?" sub5_in[0][2] [127:0] $end
-$var logic 128 @" sub5_in[1][0] [127:0] $end
-$var logic 128 A" sub5_in[1][1] [127:0] $end
-$var logic 128 B" sub5_in[1][2] [127:0] $end
-$var wire 8 C" sub5_out[0][0] [7:0] $end
-$var wire 8 D" sub5_out[0][1] [7:0] $end
-$var wire 8 E" sub5_out[0][2] [7:0] $end
-$var wire 8 F" sub5_out[1][0] [7:0] $end
-$var wire 8 G" sub5_out[1][1] [7:0] $end
-$var wire 8 H" sub5_out[1][2] [7:0] $end
-$var int 32 I" count [31:0] $end
+$var parameter 32 +" P0 [31:0] $end
+$var real_parameter 64 ," P1 $end
+$var real_parameter 64 -" P3 $end
+$var wire 1 (" clk $end
+$var wire 8 )" in [7:0] $end
+$var wire 8 *" out [7:0] $end
+$var logic 8 ." ff [7:0] $end
+$var logic 128 /" sub5_in[0][0] [127:0] $end
+$var logic 128 0" sub5_in[0][1] [127:0] $end
+$var logic 128 1" sub5_in[0][2] [127:0] $end
+$var logic 128 2" sub5_in[1][0] [127:0] $end
+$var logic 128 3" sub5_in[1][1] [127:0] $end
+$var logic 128 4" sub5_in[1][2] [127:0] $end
+$var wire 8 5" sub5_out[0][0] [7:0] $end
+$var wire 8 6" sub5_out[0][1] [7:0] $end
+$var wire 8 7" sub5_out[0][2] [7:0] $end
+$var wire 8 8" sub5_out[1][0] [7:0] $end
+$var wire 8 9" sub5_out[1][1] [7:0] $end
+$var wire 8 :" sub5_out[1][2] [7:0] $end
+$var int 32 ;" count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 6" clk $end
-$var wire 128 J" in[0][0] [127:0] $end
-$var wire 128 K" in[0][1] [127:0] $end
-$var wire 128 L" in[0][2] [127:0] $end
-$var wire 128 M" in[1][0] [127:0] $end
-$var wire 128 N" in[1][1] [127:0] $end
-$var wire 128 O" in[1][2] [127:0] $end
-$var wire 8 P" out[0][0] [7:0] $end
-$var wire 8 Q" out[0][1] [7:0] $end
-$var wire 8 R" out[0][2] [7:0] $end
-$var wire 8 S" out[1][0] [7:0] $end
-$var wire 8 T" out[1][1] [7:0] $end
-$var wire 8 U" out[1][2] [7:0] $end
+$var wire 1 (" clk $end
+$var wire 128 <" in[0][0] [127:0] $end
+$var wire 128 =" in[0][1] [127:0] $end
+$var wire 128 >" in[0][2] [127:0] $end
+$var wire 128 ?" in[1][0] [127:0] $end
+$var wire 128 @" in[1][1] [127:0] $end
+$var wire 128 A" in[1][2] [127:0] $end
+$var wire 8 B" out[0][0] [7:0] $end
+$var wire 8 C" out[0][1] [7:0] $end
+$var wire 8 D" out[0][2] [7:0] $end
+$var wire 8 E" out[1][0] [7:0] $end
+$var wire 8 F" out[1][1] [7:0] $end
+$var wire 8 G" out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 V" i [31:0] $end
+$var int 32 H" i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 W" j [31:0] $end
+$var int 32 I" j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 X" exp [7:0] $end
+$var byte 8 J" exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 Y" clk $end
-$var wire 128 Z" in[0][0] [127:0] $end
-$var wire 128 [" in[0][1] [127:0] $end
-$var wire 128 \" in[0][2] [127:0] $end
-$var wire 128 ]" in[1][0] [127:0] $end
-$var wire 128 ^" in[1][1] [127:0] $end
-$var wire 128 _" in[1][2] [127:0] $end
-$var wire 8 `" out[0][0] [7:0] $end
-$var wire 8 a" out[0][1] [7:0] $end
-$var wire 8 b" out[0][2] [7:0] $end
-$var wire 8 c" out[1][0] [7:0] $end
-$var wire 8 d" out[1][1] [7:0] $end
-$var wire 8 e" out[1][2] [7:0] $end
+$var wire 1 K" clk $end
+$var wire 128 L" in[0][0] [127:0] $end
+$var wire 128 M" in[0][1] [127:0] $end
+$var wire 128 N" in[0][2] [127:0] $end
+$var wire 128 O" in[1][0] [127:0] $end
+$var wire 128 P" in[1][1] [127:0] $end
+$var wire 128 Q" in[1][2] [127:0] $end
+$var wire 8 R" out[0][0] [7:0] $end
+$var wire 8 S" out[0][1] [7:0] $end
+$var wire 8 T" out[0][2] [7:0] $end
+$var wire 8 U" out[1][0] [7:0] $end
+$var wire 8 V" out[1][1] [7:0] $end
+$var wire 8 W" out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 Y" clk $end
-$var wire 128 Z" in[0][0] [127:0] $end
-$var wire 128 [" in[0][1] [127:0] $end
-$var wire 128 \" in[0][2] [127:0] $end
-$var wire 128 ]" in[1][0] [127:0] $end
-$var wire 128 ^" in[1][1] [127:0] $end
-$var wire 128 _" in[1][2] [127:0] $end
-$var wire 8 `" out[0][0] [7:0] $end
-$var wire 8 a" out[0][1] [7:0] $end
-$var wire 8 b" out[0][2] [7:0] $end
-$var wire 8 c" out[1][0] [7:0] $end
-$var wire 8 d" out[1][1] [7:0] $end
-$var wire 8 e" out[1][2] [7:0] $end
-$var int 32 f" count [31:0] $end
-$var wire 8 g" val0[0] [7:0] $end
-$var wire 8 h" val0[1] [7:0] $end
-$var wire 8 i" val1[0] [7:0] $end
-$var wire 8 j" val1[1] [7:0] $end
-$var wire 8 k" val2[0] [7:0] $end
-$var wire 8 l" val2[1] [7:0] $end
-$var wire 8 m" val3[0] [7:0] $end
-$var wire 8 n" val3[1] [7:0] $end
+$var wire 1 K" clk $end
+$var wire 128 L" in[0][0] [127:0] $end
+$var wire 128 M" in[0][1] [127:0] $end
+$var wire 128 N" in[0][2] [127:0] $end
+$var wire 128 O" in[1][0] [127:0] $end
+$var wire 128 P" in[1][1] [127:0] $end
+$var wire 128 Q" in[1][2] [127:0] $end
+$var wire 8 R" out[0][0] [7:0] $end
+$var wire 8 S" out[0][1] [7:0] $end
+$var wire 8 T" out[0][2] [7:0] $end
+$var wire 8 U" out[1][0] [7:0] $end
+$var wire 8 V" out[1][1] [7:0] $end
+$var wire 8 W" out[1][2] [7:0] $end
+$var int 32 X" count [31:0] $end
+$var wire 8 Y" val0[0] [7:0] $end
+$var wire 8 Z" val0[1] [7:0] $end
+$var wire 8 [" val1[0] [7:0] $end
+$var wire 8 \" val1[1] [7:0] $end
+$var wire 8 ]" val2[0] [7:0] $end
+$var wire 8 ^" val2[1] [7:0] $end
+$var wire 8 _" val3[0] [7:0] $end
+$var wire 8 `" val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 q" out[0] [7:0] $end
-$var wire 8 r" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 Y" out[0] [7:0] $end
+$var wire 8 Z" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 s" out[0] [7:0] $end
-$var wire 8 t" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 [" out[0] [7:0] $end
+$var wire 8 \" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 u" out[0] [7:0] $end
-$var wire 8 v" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 ]" out[0] [7:0] $end
+$var wire 8 ^" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 w" out[0] [7:0] $end
-$var wire 8 x" out[1] [7:0] $end
+$var wire 8 c" out[0] [7:0] $end
+$var wire 8 d" out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 y" i [31:0] $end
+$var int 32 e" i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 z" j [31:0] $end
+$var int 32 f" j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 {" exp [127:0] $end
+$var bit 128 g" exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 |" out[0] [7:0] $end
-$var wire 8 }" out[1] [7:0] $end
+$var wire 8 h" out[0] [7:0] $end
+$var wire 8 i" out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 ~" P0 [31:0] $end
-$var parameter 32 !# P1 [31:0] $end
-$var wire 8 |" out[0] [7:0] $end
-$var wire 8 }" out[1] [7:0] $end
+$var parameter 32 j" P0 [31:0] $end
+$var parameter 32 k" P1 [31:0] $end
+$var wire 8 h" out[0] [7:0] $end
+$var wire 8 i" out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1 $end
-$var wire 1 "# clk $end
-$var wire 8 ## in [7:0] $end
-$var wire 8 $# out [7:0] $end
+$var wire 1 l" clk $end
+$var wire 8 m" in [7:0] $end
+$var wire 8 n" out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 %# P0 [31:0] $end
-$var real_parameter 64 &# P1 $end
-$var real_parameter 64 '# P3 $end
-$var wire 1 "# clk $end
-$var wire 8 ## in [7:0] $end
-$var wire 8 $# out [7:0] $end
-$var logic 8 (# ff [7:0] $end
-$var logic 128 )# sub5_in[0][0] [127:0] $end
-$var logic 128 *# sub5_in[0][1] [127:0] $end
-$var logic 128 +# sub5_in[0][2] [127:0] $end
-$var logic 128 ,# sub5_in[1][0] [127:0] $end
-$var logic 128 -# sub5_in[1][1] [127:0] $end
-$var logic 128 .# sub5_in[1][2] [127:0] $end
-$var wire 8 /# sub5_out[0][0] [7:0] $end
-$var wire 8 0# sub5_out[0][1] [7:0] $end
-$var wire 8 1# sub5_out[0][2] [7:0] $end
-$var wire 8 2# sub5_out[1][0] [7:0] $end
-$var wire 8 3# sub5_out[1][1] [7:0] $end
-$var wire 8 4# sub5_out[1][2] [7:0] $end
-$var int 32 5# count [31:0] $end
+$var parameter 32 o" P0 [31:0] $end
+$var real_parameter 64 p" P1 $end
+$var real_parameter 64 q" P3 $end
+$var wire 1 l" clk $end
+$var wire 8 m" in [7:0] $end
+$var wire 8 n" out [7:0] $end
+$var logic 8 r" ff [7:0] $end
+$var logic 128 s" sub5_in[0][0] [127:0] $end
+$var logic 128 t" sub5_in[0][1] [127:0] $end
+$var logic 128 u" sub5_in[0][2] [127:0] $end
+$var logic 128 v" sub5_in[1][0] [127:0] $end
+$var logic 128 w" sub5_in[1][1] [127:0] $end
+$var logic 128 x" sub5_in[1][2] [127:0] $end
+$var wire 8 y" sub5_out[0][0] [7:0] $end
+$var wire 8 z" sub5_out[0][1] [7:0] $end
+$var wire 8 {" sub5_out[0][2] [7:0] $end
+$var wire 8 |" sub5_out[1][0] [7:0] $end
+$var wire 8 }" sub5_out[1][1] [7:0] $end
+$var wire 8 ~" sub5_out[1][2] [7:0] $end
+$var int 32 !# count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 "# clk $end
-$var wire 128 6# in[0][0] [127:0] $end
-$var wire 128 7# in[0][1] [127:0] $end
-$var wire 128 8# in[0][2] [127:0] $end
-$var wire 128 9# in[1][0] [127:0] $end
-$var wire 128 :# in[1][1] [127:0] $end
-$var wire 128 ;# in[1][2] [127:0] $end
-$var wire 8 <# out[0][0] [7:0] $end
-$var wire 8 =# out[0][1] [7:0] $end
-$var wire 8 ># out[0][2] [7:0] $end
-$var wire 8 ?# out[1][0] [7:0] $end
-$var wire 8 @# out[1][1] [7:0] $end
-$var wire 8 A# out[1][2] [7:0] $end
+$var wire 1 l" clk $end
+$var wire 128 "# in[0][0] [127:0] $end
+$var wire 128 ## in[0][1] [127:0] $end
+$var wire 128 $# in[0][2] [127:0] $end
+$var wire 128 %# in[1][0] [127:0] $end
+$var wire 128 &# in[1][1] [127:0] $end
+$var wire 128 '# in[1][2] [127:0] $end
+$var wire 8 (# out[0][0] [7:0] $end
+$var wire 8 )# out[0][1] [7:0] $end
+$var wire 8 *# out[0][2] [7:0] $end
+$var wire 8 +# out[1][0] [7:0] $end
+$var wire 8 ,# out[1][1] [7:0] $end
+$var wire 8 -# out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 B# i [31:0] $end
+$var int 32 .# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 C# j [31:0] $end
+$var int 32 /# j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 D# exp [7:0] $end
+$var byte 8 0# exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 E# clk $end
-$var wire 128 F# in[0][0] [127:0] $end
-$var wire 128 G# in[0][1] [127:0] $end
-$var wire 128 H# in[0][2] [127:0] $end
-$var wire 128 I# in[1][0] [127:0] $end
-$var wire 128 J# in[1][1] [127:0] $end
-$var wire 128 K# in[1][2] [127:0] $end
-$var wire 8 L# out[0][0] [7:0] $end
-$var wire 8 M# out[0][1] [7:0] $end
-$var wire 8 N# out[0][2] [7:0] $end
-$var wire 8 O# out[1][0] [7:0] $end
-$var wire 8 P# out[1][1] [7:0] $end
-$var wire 8 Q# out[1][2] [7:0] $end
+$var wire 1 1# clk $end
+$var wire 128 2# in[0][0] [127:0] $end
+$var wire 128 3# in[0][1] [127:0] $end
+$var wire 128 4# in[0][2] [127:0] $end
+$var wire 128 5# in[1][0] [127:0] $end
+$var wire 128 6# in[1][1] [127:0] $end
+$var wire 128 7# in[1][2] [127:0] $end
+$var wire 8 8# out[0][0] [7:0] $end
+$var wire 8 9# out[0][1] [7:0] $end
+$var wire 8 :# out[0][2] [7:0] $end
+$var wire 8 ;# out[1][0] [7:0] $end
+$var wire 8 <# out[1][1] [7:0] $end
+$var wire 8 =# out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 E# clk $end
-$var wire 128 F# in[0][0] [127:0] $end
-$var wire 128 G# in[0][1] [127:0] $end
-$var wire 128 H# in[0][2] [127:0] $end
-$var wire 128 I# in[1][0] [127:0] $end
-$var wire 128 J# in[1][1] [127:0] $end
-$var wire 128 K# in[1][2] [127:0] $end
-$var wire 8 L# out[0][0] [7:0] $end
-$var wire 8 M# out[0][1] [7:0] $end
-$var wire 8 N# out[0][2] [7:0] $end
-$var wire 8 O# out[1][0] [7:0] $end
-$var wire 8 P# out[1][1] [7:0] $end
-$var wire 8 Q# out[1][2] [7:0] $end
-$var int 32 R# count [31:0] $end
-$var wire 8 S# val0[0] [7:0] $end
-$var wire 8 T# val0[1] [7:0] $end
-$var wire 8 U# val1[0] [7:0] $end
-$var wire 8 V# val1[1] [7:0] $end
-$var wire 8 W# val2[0] [7:0] $end
-$var wire 8 X# val2[1] [7:0] $end
-$var wire 8 Y# val3[0] [7:0] $end
-$var wire 8 Z# val3[1] [7:0] $end
+$var wire 1 1# clk $end
+$var wire 128 2# in[0][0] [127:0] $end
+$var wire 128 3# in[0][1] [127:0] $end
+$var wire 128 4# in[0][2] [127:0] $end
+$var wire 128 5# in[1][0] [127:0] $end
+$var wire 128 6# in[1][1] [127:0] $end
+$var wire 128 7# in[1][2] [127:0] $end
+$var wire 8 8# out[0][0] [7:0] $end
+$var wire 8 9# out[0][1] [7:0] $end
+$var wire 8 :# out[0][2] [7:0] $end
+$var wire 8 ;# out[1][0] [7:0] $end
+$var wire 8 <# out[1][1] [7:0] $end
+$var wire 8 =# out[1][2] [7:0] $end
+$var int 32 ># count [31:0] $end
+$var wire 8 ?# val0[0] [7:0] $end
+$var wire 8 @# val0[1] [7:0] $end
+$var wire 8 A# val1[0] [7:0] $end
+$var wire 8 B# val1[1] [7:0] $end
+$var wire 8 C# val2[0] [7:0] $end
+$var wire 8 D# val2[1] [7:0] $end
+$var wire 8 E# val3[0] [7:0] $end
+$var wire 8 F# val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 ]# out[0] [7:0] $end
-$var wire 8 ^# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 ?# out[0] [7:0] $end
+$var wire 8 @# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 _# out[0] [7:0] $end
-$var wire 8 `# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 A# out[0] [7:0] $end
+$var wire 8 B# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 a# out[0] [7:0] $end
-$var wire 8 b# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 C# out[0] [7:0] $end
+$var wire 8 D# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 c# out[0] [7:0] $end
-$var wire 8 d# out[1] [7:0] $end
+$var wire 8 I# out[0] [7:0] $end
+$var wire 8 J# out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 e# i [31:0] $end
+$var int 32 K# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 f# j [31:0] $end
+$var int 32 L# j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 g# exp [127:0] $end
+$var bit 128 M# exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-$var wire 8 h# out[0] [7:0] $end
-$var wire 8 i# out[1] [7:0] $end
+$var wire 8 N# out[0] [7:0] $end
+$var wire 8 O# out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 j# P0 [31:0] $end
-$var parameter 32 k# P1 [31:0] $end
-$var wire 8 h# out[0] [7:0] $end
-$var wire 8 i# out[1] [7:0] $end
+$var parameter 32 P# P0 [31:0] $end
+$var parameter 32 Q# P1 [31:0] $end
+$var wire 8 N# out[0] [7:0] $end
+$var wire 8 O# out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3 $end
-$var wire 1 l# clk $end
-$var wire 8 m# in [7:0] $end
-$var wire 8 n# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 S# in [7:0] $end
+$var wire 8 T# out [7:0] $end
 $scope module sub3_d $end
-$var parameter 8 o# P0 [7:0] $end
-$var parameter 32 p# UNPACKED_ARRAY[0] [31:0] $end
-$var parameter 32 q# UNPACKED_ARRAY[1] [31:0] $end
-$var parameter 16 r# UNUSED [15:0] $end
-$var wire 1 l# clk $end
-$var wire 8 m# in [7:0] $end
-$var wire 8 n# out [7:0] $end
-$var logic 8 s# ff [7:0] $end
-$var wire 8 t# out4 [7:0] $end
-$var wire 8 u# out4_2 [7:0] $end
+$var parameter 8 U# P0 [7:0] $end
+$var parameter 32 V# UNPACKED_ARRAY[0] [31:0] $end
+$var parameter 32 W# UNPACKED_ARRAY[1] [31:0] $end
+$var parameter 16 X# UNUSED [15:0] $end
+$var wire 1 R# clk $end
+$var wire 8 S# in [7:0] $end
+$var wire 8 T# out [7:0] $end
+$var logic 8 Y# ff [7:0] $end
+$var wire 8 T# out4 [7:0] $end
+$var wire 8 Z# out4_2 [7:0] $end
 $scope module i_sub4_0 $end
-$var wire 1 l# clk $end
-$var wire 8 s# in [7:0] $end
-$var wire 8 t# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 Y# in [7:0] $end
+$var wire 8 T# out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
-$var wire 1 l# clk $end
-$var wire 8 s# in [7:0] $end
-$var wire 8 u# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 Y# in [7:0] $end
+$var wire 8 Z# out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
-$var wire 1 v# clk $end
-$var wire 8 w# in [7:0] $end
-$var wire 8 x# out [7:0] $end
+$var wire 1 [# clk $end
+$var wire 8 \# in [7:0] $end
+$var wire 8 ]# out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 y# P0 [31:0] $end
-$var real_parameter 64 z# P1 $end
-$var real_parameter 64 {# P3 $end
-$var wire 1 v# clk $end
-$var wire 8 w# in [7:0] $end
-$var wire 8 x# out [7:0] $end
-$var logic 8 |# ff [7:0] $end
-$var logic 128 }# sub5_in[0][0] [127:0] $end
-$var logic 128 ~# sub5_in[0][1] [127:0] $end
-$var logic 128 !$ sub5_in[0][2] [127:0] $end
-$var logic 128 "$ sub5_in[1][0] [127:0] $end
-$var logic 128 #$ sub5_in[1][1] [127:0] $end
-$var logic 128 $$ sub5_in[1][2] [127:0] $end
-$var wire 8 %$ sub5_out[0][0] [7:0] $end
-$var wire 8 &$ sub5_out[0][1] [7:0] $end
-$var wire 8 '$ sub5_out[0][2] [7:0] $end
-$var wire 8 ($ sub5_out[1][0] [7:0] $end
-$var wire 8 )$ sub5_out[1][1] [7:0] $end
-$var wire 8 *$ sub5_out[1][2] [7:0] $end
-$var int 32 +$ count [31:0] $end
+$var parameter 32 ^# P0 [31:0] $end
+$var real_parameter 64 _# P1 $end
+$var real_parameter 64 `# P3 $end
+$var wire 1 [# clk $end
+$var wire 8 \# in [7:0] $end
+$var wire 8 ]# out [7:0] $end
+$var logic 8 a# ff [7:0] $end
+$var logic 128 b# sub5_in[0][0] [127:0] $end
+$var logic 128 c# sub5_in[0][1] [127:0] $end
+$var logic 128 d# sub5_in[0][2] [127:0] $end
+$var logic 128 e# sub5_in[1][0] [127:0] $end
+$var logic 128 f# sub5_in[1][1] [127:0] $end
+$var logic 128 g# sub5_in[1][2] [127:0] $end
+$var wire 8 h# sub5_out[0][0] [7:0] $end
+$var wire 8 i# sub5_out[0][1] [7:0] $end
+$var wire 8 j# sub5_out[0][2] [7:0] $end
+$var wire 8 k# sub5_out[1][0] [7:0] $end
+$var wire 8 l# sub5_out[1][1] [7:0] $end
+$var wire 8 m# sub5_out[1][2] [7:0] $end
+$var int 32 n# count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 v# clk $end
-$var wire 128 ,$ in[0][0] [127:0] $end
-$var wire 128 -$ in[0][1] [127:0] $end
-$var wire 128 .$ in[0][2] [127:0] $end
-$var wire 128 /$ in[1][0] [127:0] $end
-$var wire 128 0$ in[1][1] [127:0] $end
-$var wire 128 1$ in[1][2] [127:0] $end
-$var wire 8 2$ out[0][0] [7:0] $end
-$var wire 8 3$ out[0][1] [7:0] $end
-$var wire 8 4$ out[0][2] [7:0] $end
-$var wire 8 5$ out[1][0] [7:0] $end
-$var wire 8 6$ out[1][1] [7:0] $end
-$var wire 8 7$ out[1][2] [7:0] $end
+$var wire 1 [# clk $end
+$var wire 128 o# in[0][0] [127:0] $end
+$var wire 128 p# in[0][1] [127:0] $end
+$var wire 128 q# in[0][2] [127:0] $end
+$var wire 128 r# in[1][0] [127:0] $end
+$var wire 128 s# in[1][1] [127:0] $end
+$var wire 128 t# in[1][2] [127:0] $end
+$var wire 8 u# out[0][0] [7:0] $end
+$var wire 8 v# out[0][1] [7:0] $end
+$var wire 8 w# out[0][2] [7:0] $end
+$var wire 8 x# out[1][0] [7:0] $end
+$var wire 8 y# out[1][1] [7:0] $end
+$var wire 8 z# out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 8$ i [31:0] $end
+$var int 32 {# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 9$ j [31:0] $end
+$var int 32 |# j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 :$ exp [7:0] $end
+$var byte 8 }# exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 ;$ clk $end
-$var wire 128 <$ in[0][0] [127:0] $end
-$var wire 128 =$ in[0][1] [127:0] $end
-$var wire 128 >$ in[0][2] [127:0] $end
-$var wire 128 ?$ in[1][0] [127:0] $end
-$var wire 128 @$ in[1][1] [127:0] $end
-$var wire 128 A$ in[1][2] [127:0] $end
-$var wire 8 B$ out[0][0] [7:0] $end
-$var wire 8 C$ out[0][1] [7:0] $end
-$var wire 8 D$ out[0][2] [7:0] $end
-$var wire 8 E$ out[1][0] [7:0] $end
-$var wire 8 F$ out[1][1] [7:0] $end
-$var wire 8 G$ out[1][2] [7:0] $end
+$var wire 1 ~# clk $end
+$var wire 128 !$ in[0][0] [127:0] $end
+$var wire 128 "$ in[0][1] [127:0] $end
+$var wire 128 #$ in[0][2] [127:0] $end
+$var wire 128 $$ in[1][0] [127:0] $end
+$var wire 128 %$ in[1][1] [127:0] $end
+$var wire 128 &$ in[1][2] [127:0] $end
+$var wire 8 '$ out[0][0] [7:0] $end
+$var wire 8 ($ out[0][1] [7:0] $end
+$var wire 8 )$ out[0][2] [7:0] $end
+$var wire 8 *$ out[1][0] [7:0] $end
+$var wire 8 +$ out[1][1] [7:0] $end
+$var wire 8 ,$ out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 ;$ clk $end
-$var wire 128 <$ in[0][0] [127:0] $end
-$var wire 128 =$ in[0][1] [127:0] $end
-$var wire 128 >$ in[0][2] [127:0] $end
-$var wire 128 ?$ in[1][0] [127:0] $end
-$var wire 128 @$ in[1][1] [127:0] $end
-$var wire 128 A$ in[1][2] [127:0] $end
-$var wire 8 B$ out[0][0] [7:0] $end
-$var wire 8 C$ out[0][1] [7:0] $end
-$var wire 8 D$ out[0][2] [7:0] $end
-$var wire 8 E$ out[1][0] [7:0] $end
-$var wire 8 F$ out[1][1] [7:0] $end
-$var wire 8 G$ out[1][2] [7:0] $end
-$var int 32 H$ count [31:0] $end
-$var wire 8 I$ val0[0] [7:0] $end
-$var wire 8 J$ val0[1] [7:0] $end
-$var wire 8 K$ val1[0] [7:0] $end
-$var wire 8 L$ val1[1] [7:0] $end
-$var wire 8 M$ val2[0] [7:0] $end
-$var wire 8 N$ val2[1] [7:0] $end
-$var wire 8 O$ val3[0] [7:0] $end
-$var wire 8 P$ val3[1] [7:0] $end
+$var wire 1 ~# clk $end
+$var wire 128 !$ in[0][0] [127:0] $end
+$var wire 128 "$ in[0][1] [127:0] $end
+$var wire 128 #$ in[0][2] [127:0] $end
+$var wire 128 $$ in[1][0] [127:0] $end
+$var wire 128 %$ in[1][1] [127:0] $end
+$var wire 128 &$ in[1][2] [127:0] $end
+$var wire 8 '$ out[0][0] [7:0] $end
+$var wire 8 ($ out[0][1] [7:0] $end
+$var wire 8 )$ out[0][2] [7:0] $end
+$var wire 8 *$ out[1][0] [7:0] $end
+$var wire 8 +$ out[1][1] [7:0] $end
+$var wire 8 ,$ out[1][2] [7:0] $end
+$var int 32 -$ count [31:0] $end
+$var wire 8 .$ val0[0] [7:0] $end
+$var wire 8 /$ val0[1] [7:0] $end
+$var wire 8 0$ val1[0] [7:0] $end
+$var wire 8 1$ val1[1] [7:0] $end
+$var wire 8 2$ val2[0] [7:0] $end
+$var wire 8 3$ val2[1] [7:0] $end
+$var wire 8 4$ val3[0] [7:0] $end
+$var wire 8 5$ val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 S$ out[0] [7:0] $end
-$var wire 8 T$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 .$ out[0] [7:0] $end
+$var wire 8 /$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 U$ out[0] [7:0] $end
-$var wire 8 V$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 0$ out[0] [7:0] $end
+$var wire 8 1$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 W$ out[0] [7:0] $end
-$var wire 8 X$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 2$ out[0] [7:0] $end
+$var wire 8 3$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 Y$ out[0] [7:0] $end
-$var wire 8 Z$ out[1] [7:0] $end
+$var wire 8 8$ out[0] [7:0] $end
+$var wire 8 9$ out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 [$ i [31:0] $end
+$var int 32 :$ i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 \$ j [31:0] $end
+$var int 32 ;$ j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 ]$ exp [127:0] $end
+$var bit 128 <$ exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 ^$ out[0] [7:0] $end
-$var wire 8 _$ out[1] [7:0] $end
+$var wire 8 =$ out[0] [7:0] $end
+$var wire 8 >$ out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 `$ P0 [31:0] $end
-$var parameter 32 a$ P1 [31:0] $end
-$var wire 8 ^$ out[0] [7:0] $end
-$var wire 8 _$ out[1] [7:0] $end
+$var parameter 32 ?$ P0 [31:0] $end
+$var parameter 32 @$ P1 [31:0] $end
+$var wire 8 =$ out[0] [7:0] $end
+$var wire 8 >$ out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
-$var wire 1 b$ clk $end
-$var wire 8 c$ in [7:0] $end
-$var wire 8 d$ out [7:0] $end
+$var wire 1 A$ clk $end
+$var wire 8 B$ in [7:0] $end
+$var wire 8 C$ out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 e$ P0 [31:0] $end
-$var real_parameter 64 f$ P1 $end
-$var real_parameter 64 g$ P3 $end
-$var wire 1 b$ clk $end
-$var wire 8 c$ in [7:0] $end
-$var wire 8 d$ out [7:0] $end
-$var logic 8 h$ ff [7:0] $end
-$var logic 128 i$ sub5_in[0][0] [127:0] $end
-$var logic 128 j$ sub5_in[0][1] [127:0] $end
-$var logic 128 k$ sub5_in[0][2] [127:0] $end
-$var logic 128 l$ sub5_in[1][0] [127:0] $end
-$var logic 128 m$ sub5_in[1][1] [127:0] $end
-$var logic 128 n$ sub5_in[1][2] [127:0] $end
-$var wire 8 o$ sub5_out[0][0] [7:0] $end
-$var wire 8 p$ sub5_out[0][1] [7:0] $end
-$var wire 8 q$ sub5_out[0][2] [7:0] $end
-$var wire 8 r$ sub5_out[1][0] [7:0] $end
-$var wire 8 s$ sub5_out[1][1] [7:0] $end
-$var wire 8 t$ sub5_out[1][2] [7:0] $end
-$var int 32 u$ count [31:0] $end
+$var parameter 32 D$ P0 [31:0] $end
+$var real_parameter 64 E$ P1 $end
+$var real_parameter 64 F$ P3 $end
+$var wire 1 A$ clk $end
+$var wire 8 B$ in [7:0] $end
+$var wire 8 C$ out [7:0] $end
+$var logic 8 G$ ff [7:0] $end
+$var logic 128 H$ sub5_in[0][0] [127:0] $end
+$var logic 128 I$ sub5_in[0][1] [127:0] $end
+$var logic 128 J$ sub5_in[0][2] [127:0] $end
+$var logic 128 K$ sub5_in[1][0] [127:0] $end
+$var logic 128 L$ sub5_in[1][1] [127:0] $end
+$var logic 128 M$ sub5_in[1][2] [127:0] $end
+$var wire 8 N$ sub5_out[0][0] [7:0] $end
+$var wire 8 O$ sub5_out[0][1] [7:0] $end
+$var wire 8 P$ sub5_out[0][2] [7:0] $end
+$var wire 8 Q$ sub5_out[1][0] [7:0] $end
+$var wire 8 R$ sub5_out[1][1] [7:0] $end
+$var wire 8 S$ sub5_out[1][2] [7:0] $end
+$var int 32 T$ count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 b$ clk $end
-$var wire 128 v$ in[0][0] [127:0] $end
-$var wire 128 w$ in[0][1] [127:0] $end
-$var wire 128 x$ in[0][2] [127:0] $end
-$var wire 128 y$ in[1][0] [127:0] $end
-$var wire 128 z$ in[1][1] [127:0] $end
-$var wire 128 {$ in[1][2] [127:0] $end
-$var wire 8 |$ out[0][0] [7:0] $end
-$var wire 8 }$ out[0][1] [7:0] $end
-$var wire 8 ~$ out[0][2] [7:0] $end
-$var wire 8 !% out[1][0] [7:0] $end
-$var wire 8 "% out[1][1] [7:0] $end
-$var wire 8 #% out[1][2] [7:0] $end
+$var wire 1 A$ clk $end
+$var wire 128 U$ in[0][0] [127:0] $end
+$var wire 128 V$ in[0][1] [127:0] $end
+$var wire 128 W$ in[0][2] [127:0] $end
+$var wire 128 X$ in[1][0] [127:0] $end
+$var wire 128 Y$ in[1][1] [127:0] $end
+$var wire 128 Z$ in[1][2] [127:0] $end
+$var wire 8 [$ out[0][0] [7:0] $end
+$var wire 8 \$ out[0][1] [7:0] $end
+$var wire 8 ]$ out[0][2] [7:0] $end
+$var wire 8 ^$ out[1][0] [7:0] $end
+$var wire 8 _$ out[1][1] [7:0] $end
+$var wire 8 `$ out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 $% i [31:0] $end
+$var int 32 a$ i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 %% j [31:0] $end
+$var int 32 b$ j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 &% exp [7:0] $end
+$var byte 8 c$ exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 '% clk $end
-$var wire 128 (% in[0][0] [127:0] $end
-$var wire 128 )% in[0][1] [127:0] $end
-$var wire 128 *% in[0][2] [127:0] $end
-$var wire 128 +% in[1][0] [127:0] $end
-$var wire 128 ,% in[1][1] [127:0] $end
-$var wire 128 -% in[1][2] [127:0] $end
-$var wire 8 .% out[0][0] [7:0] $end
-$var wire 8 /% out[0][1] [7:0] $end
-$var wire 8 0% out[0][2] [7:0] $end
-$var wire 8 1% out[1][0] [7:0] $end
-$var wire 8 2% out[1][1] [7:0] $end
-$var wire 8 3% out[1][2] [7:0] $end
+$var wire 1 d$ clk $end
+$var wire 128 e$ in[0][0] [127:0] $end
+$var wire 128 f$ in[0][1] [127:0] $end
+$var wire 128 g$ in[0][2] [127:0] $end
+$var wire 128 h$ in[1][0] [127:0] $end
+$var wire 128 i$ in[1][1] [127:0] $end
+$var wire 128 j$ in[1][2] [127:0] $end
+$var wire 8 k$ out[0][0] [7:0] $end
+$var wire 8 l$ out[0][1] [7:0] $end
+$var wire 8 m$ out[0][2] [7:0] $end
+$var wire 8 n$ out[1][0] [7:0] $end
+$var wire 8 o$ out[1][1] [7:0] $end
+$var wire 8 p$ out[1][2] [7:0] $end
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+$var parameter 32 z$ P0 [31:0] $end
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+$var parameter 32 z$ P0 [31:0] $end
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 $upscope $end
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 b00011101 $
 b00011101 F
 b00011101 H
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 b00010101 (
 b00010101 4
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@@ -6951,20 +6869,18 @@ b00011011 %
 b00011011 &
 b00011011 +
 b00011011 =
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 b00011011 ."
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+b00011011 C$
+b00011011 G$
 b00011001 E
 b00011001 C
 b00011001 B
diff --git a/test_regress/t/t_hier_block_sc_trace_vcd.out b/test_regress/t/t_hier_block_sc_trace_vcd.out
index aa5149eb5..92595318b 100644
--- a/test_regress/t/t_hier_block_sc_trace_vcd.out
+++ b/test_regress/t/t_hier_block_sc_trace_vcd.out
@@ -1,110 +1,109 @@
 $version Generated by VerilatedVcd $end
-$date Thu Nov 10 20:17:32 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
   $scope module t $end
-   $var wire  1 * clk $end
+   $var wire 1 * clk $end
+   $var wire 8 # out0 [7:0] $end
+   $var wire 8 $ out1 [7:0] $end
+   $var wire 8 % out2 [7:0] $end
+   $var wire 8 & out3 [7:0] $end
+   $var wire 8 ' out3_2 [7:0] $end
+   $var wire 8 ( out5 [7:0] $end
+   $var wire 8 ) out6 [7:0] $end
    $var wire 32 + count [31:0] $end
-   $var wire  8 # out0 [7:0] $end
-   $var wire  8 $ out1 [7:0] $end
-   $var wire  8 % out2 [7:0] $end
-   $var wire  8 & out3 [7:0] $end
-   $var wire  8 ' out3_2 [7:0] $end
-   $var wire  8 ( out5 [7:0] $end
-   $var wire  8 ) out6 [7:0] $end
    $scope module i_delay0 $end
-    $var wire  1 * clk $end
-    $var wire  8 & in [7:0] $end
-    $var wire  8 ( out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 & in [7:0] $end
+    $var wire 8 ( out [7:0] $end
    $upscope $end
    $scope module i_delay1 $end
-    $var wire  1 * clk $end
-    $var wire  8 ( in [7:0] $end
-    $var wire  8 ) out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 ( in [7:0] $end
+    $var wire 8 ) out [7:0] $end
    $upscope $end
    $scope module i_sub0 $end
-    $var wire  1 * clk $end
-    $var wire  8 & in [7:0] $end
-    $var wire  8 # out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 & in [7:0] $end
+    $var wire 8 # out [7:0] $end
     $scope module i_sub0 $end
-     $var wire  1 * clk $end
-     $var wire  8 & in [7:0] $end
-     $var wire  8 # out [7:0] $end
+     $var wire 1 * clk $end
+     $var wire 8 & in [7:0] $end
+     $var wire 8 # out [7:0] $end
     $upscope $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire  1 * clk $end
-    $var wire  8 # in [11:4] $end
-    $var wire  8 $ out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 # in [11:4] $end
+    $var wire 8 $ out [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire  1 * clk $end
-    $var wire  8 $ in [7:0] $end
-    $var wire  8 % out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 $ in [7:0] $end
+    $var wire 8 % out [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  1 * clk $end
-    $var wire  8 % in [7:0] $end
-    $var wire  8 & out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 % in [7:0] $end
+    $var wire 8 & out [7:0] $end
    $upscope $end
    $scope module i_sub3_2 $end
-    $var wire  1 * clk $end
-    $var wire  8 % in [7:0] $end
-    $var wire  8 ' out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 % in [7:0] $end
+    $var wire 8 ' out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_delay0 $end
-  $var wire  1 - clk $end
-  $var wire  8 . in [7:0] $end
-  $var wire  8 / out [7:0] $end
+  $var wire 1 - clk $end
+  $var wire 8 . in [7:0] $end
+  $var wire 8 / out [7:0] $end
   $scope module delay_2 $end
    $var wire 32 2 N [31:0] $end
    $var wire 32 3 WIDTH [31:0] $end
-   $var wire  1 - clk $end
-   $var wire  8 . in [7:0] $end
-   $var wire  8 / out [7:0] $end
-   $var wire  8 0 tmp [7:0] $end
+   $var wire 1 - clk $end
+   $var wire 8 . in [7:0] $end
+   $var wire 8 / out [7:0] $end
+   $var wire 8 0 tmp [7:0] $end
    $scope module genblk1 $end
     $scope module i_delay $end
      $var wire 32 4 N [31:0] $end
      $var wire 32 3 WIDTH [31:0] $end
-     $var wire  1 - clk $end
-     $var wire  8 0 in [7:0] $end
-     $var wire  8 / out [7:0] $end
-     $var wire  8 1 tmp [7:0] $end
+     $var wire 1 - clk $end
+     $var wire 8 0 in [7:0] $end
+     $var wire 8 / out [7:0] $end
+     $var wire 8 1 tmp [7:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_delay1 $end
-  $var wire  1 9 clk $end
-  $var wire  8 : in [7:0] $end
-  $var wire  8 ; out [7:0] $end
+  $var wire 1 9 clk $end
+  $var wire 8 : in [7:0] $end
+  $var wire 8 ; out [7:0] $end
   $scope module delay_9 $end
    $var wire 32 < N [31:0] $end
    $var wire 32 = WIDTH [31:0] $end
-   $var wire  1 9 clk $end
-   $var wire  8 : in [7:0] $end
-   $var wire  8 ; out [7:0] $end
-   $var wire  8 6 tmp [7:0] $end
+   $var wire 1 9 clk $end
+   $var wire 8 : in [7:0] $end
+   $var wire 8 ; out [7:0] $end
+   $var wire 8 6 tmp [7:0] $end
    $scope module genblk1 $end
     $scope module i_delay $end
      $var wire 32 > N [31:0] $end
      $var wire 32 = WIDTH [31:0] $end
-     $var wire  1 9 clk $end
-     $var wire  8 6 in [7:0] $end
-     $var wire  8 ; out [7:0] $end
-     $var wire  8 7 tmp [7:0] $end
+     $var wire 1 9 clk $end
+     $var wire 8 6 in [7:0] $end
+     $var wire 8 ; out [7:0] $end
+     $var wire 8 7 tmp [7:0] $end
      $scope module genblk1 $end
       $scope module i_delay $end
        $var wire 32 ? N [31:0] $end
        $var wire 32 = WIDTH [31:0] $end
-       $var wire  1 9 clk $end
-       $var wire  8 7 in [7:0] $end
-       $var wire  8 ; out [7:0] $end
-       $var wire  8 8 tmp [7:0] $end
+       $var wire 1 9 clk $end
+       $var wire 8 7 in [7:0] $end
+       $var wire 8 ; out [7:0] $end
+       $var wire 8 8 tmp [7:0] $end
       $upscope $end
      $upscope $end
     $upscope $end
@@ -112,934 +111,934 @@ $timescale 1ps $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub0.i_sub0 $end
-  $var wire  1 A clk $end
-  $var wire  8 B in [7:0] $end
-  $var wire  8 C out [7:0] $end
+  $var wire 1 A clk $end
+  $var wire 8 B in [7:0] $end
+  $var wire 8 C out [7:0] $end
   $scope module sub0 $end
-   $var wire  1 A clk $end
-   $var wire  8 D ff [7:0] $end
-   $var wire  8 B in [7:0] $end
-   $var wire  8 C out [7:0] $end
+   $var wire 1 A clk $end
+   $var wire 8 B in [7:0] $end
+   $var wire 8 C out [7:0] $end
+   $var wire 8 D ff [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub1 $end
-  $var wire  1 F clk $end
-  $var wire  8 G in [11:4] $end
-  $var wire  8 H out [7:0] $end
+  $var wire 1 F clk $end
+  $var wire 8 G in [11:4] $end
+  $var wire 8 H out [7:0] $end
   $scope module sub1 $end
-   $var wire  1 F clk $end
-   $var wire  8 I ff [7:0] $end
-   $var wire  8 G in [11:4] $end
-   $var wire  8 H out [7:0] $end
+   $var wire 1 F clk $end
+   $var wire 8 G in [11:4] $end
+   $var wire 8 H out [7:0] $end
+   $var wire 8 I ff [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2 $end
-  $var wire  1 K clk $end
-  $var wire  8 L in [7:0] $end
-  $var wire  8 M out [7:0] $end
+  $var wire 1 K clk $end
+  $var wire 8 L in [7:0] $end
+  $var wire 8 M out [7:0] $end
   $scope module sub2 $end
-   $var wire  1 K clk $end
-   $var wire  8 N ff [7:0] $end
-   $var wire  8 L in [7:0] $end
-   $var wire  8 M out [7:0] $end
-   $scope module i_sub3 $end
-    $var wire  8 N in_wire [7:0] $end
-    $var wire  8 O out_1 [7:0] $end
-    $var wire  8 P out_2 [7:0] $end
-    $scope module i_sub3 $end
-     $var wire  1 K clk $end
-     $var wire  8 N in [7:0] $end
-     $var wire  8 O out [7:0] $end
-    $upscope $end
-    $scope module i_sub3_2 $end
-     $var wire  1 K clk $end
-     $var wire  8 N in [7:0] $end
-     $var wire  8 P out [7:0] $end
-    $upscope $end
-    $scope module in $end
-     $var wire  1 K clk $end
-     $var wire  8 N data [7:0] $end
-    $upscope $end
-    $scope module out $end
-     $var wire  1 K clk $end
-     $var wire  8 O data [7:0] $end
-    $upscope $end
-   $upscope $end
+   $var wire 1 K clk $end
+   $var wire 8 L in [7:0] $end
+   $var wire 8 M out [7:0] $end
+   $var wire 8 N ff [7:0] $end
    $scope module in_ifs $end
-    $var wire  1 K clk $end
-    $var wire  8 N data [7:0] $end
+    $var wire 1 K clk $end
+    $var wire 8 N data [7:0] $end
    $upscope $end
    $scope module out_ifs $end
-    $var wire  1 K clk $end
-    $var wire  8 O data [7:0] $end
+    $var wire 1 K clk $end
+    $var wire 8 O data [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $scope module in $end
+     $var wire 1 K clk $end
+     $var wire 8 N data [7:0] $end
+    $upscope $end
+    $scope module out $end
+     $var wire 1 K clk $end
+     $var wire 8 O data [7:0] $end
+    $upscope $end
+    $var wire 8 N in_wire [7:0] $end
+    $var wire 8 O out_1 [7:0] $end
+    $var wire 8 P out_2 [7:0] $end
+    $scope module i_sub3 $end
+     $var wire 1 K clk $end
+     $var wire 8 N in [7:0] $end
+     $var wire 8 O out [7:0] $end
+    $upscope $end
+    $scope module i_sub3_2 $end
+     $var wire 1 K clk $end
+     $var wire 8 N in [7:0] $end
+     $var wire 8 P out [7:0] $end
+    $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3 $end
-  $var wire  1 R clk $end
-  $var wire  8 S in [7:0] $end
-  $var wire  8 T out [7:0] $end
+  $var wire 1 R clk $end
+  $var wire 8 S in [7:0] $end
+  $var wire 8 T out [7:0] $end
   $scope module sub3_c $end
-   $var wire  8 X P0 [7:0] $end
-   $var wire 32 Y UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 Z UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 [ UNUSED [15:0] $end
-   $var wire  1 R clk $end
-   $var wire  8 U ff [7:0] $end
-   $var wire  8 S in [7:0] $end
-   $var wire  8 T out [7:0] $end
-   $var wire  8 V out4 [7:0] $end
-   $var wire  8 W out4_2 [7:0] $end
+   $var wire 8 W P0 [7:0] $end
+   $var wire 32 X UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 Y UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 Z UNUSED [15:0] $end
+   $var wire 1 R clk $end
+   $var wire 8 S in [7:0] $end
+   $var wire 8 T out [7:0] $end
+   $var wire 8 U ff [7:0] $end
+   $var wire 8 T out4 [7:0] $end
+   $var wire 8 V out4_2 [7:0] $end
    $scope module i_sub4_0 $end
-    $var wire  1 R clk $end
-    $var wire  8 U in [7:0] $end
-    $var wire  8 V out [7:0] $end
+    $var wire 1 R clk $end
+    $var wire 8 U in [7:0] $end
+    $var wire 8 T out [7:0] $end
    $upscope $end
    $scope module i_sub4_1 $end
-    $var wire  1 R clk $end
-    $var wire  8 U in [7:0] $end
-    $var wire  8 W out [7:0] $end
+    $var wire 1 R clk $end
+    $var wire 8 U in [7:0] $end
+    $var wire 8 V out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0 $end
-  $var wire  1 @! clk $end
-  $var wire  8 A! in [7:0] $end
-  $var wire  8 B! out [7:0] $end
+  $var wire 1 ?! clk $end
+  $var wire 8 @! in [7:0] $end
+  $var wire 8 A! out [7:0] $end
   $scope module sub4_2 $end
-   $var wire 32 C! P0 [31:0] $end
-   $var real 64 D! P1 $end
-   $var real 64 F! P3 $end
-   $var wire  1 @! clk $end
-   $var wire 32 v count [31:0] $end
-   $var wire  8 ] ff [7:0] $end
-   $var wire  8 A! in [7:0] $end
-   $var wire  8 B! out [7:0] $end
-   $var wire 128 ^ sub5_in[0][0] [127:0] $end
-   $var wire 128 b sub5_in[0][1] [127:0] $end
-   $var wire 128 f sub5_in[0][2] [127:0] $end
-   $var wire 128 j sub5_in[1][0] [127:0] $end
-   $var wire 128 n sub5_in[1][1] [127:0] $end
-   $var wire 128 r sub5_in[1][2] [127:0] $end
-   $var wire  8 4! sub5_out[0][0] [7:0] $end
-   $var wire  8 5! sub5_out[0][1] [7:0] $end
-   $var wire  8 6! sub5_out[0][2] [7:0] $end
-   $var wire  8 7! sub5_out[1][0] [7:0] $end
-   $var wire  8 8! sub5_out[1][1] [7:0] $end
-   $var wire  8 9! sub5_out[1][2] [7:0] $end
+   $var wire 32 B! P0 [31:0] $end
+   $var real 64 C! P1 $end
+   $var real 64 E! P3 $end
+   $var wire 1 ?! clk $end
+   $var wire 8 @! in [7:0] $end
+   $var wire 8 A! out [7:0] $end
+   $var wire 8 \ ff [7:0] $end
+   $var wire 128 ] sub5_in[0][0] [127:0] $end
+   $var wire 128 a sub5_in[0][1] [127:0] $end
+   $var wire 128 e sub5_in[0][2] [127:0] $end
+   $var wire 128 i sub5_in[1][0] [127:0] $end
+   $var wire 128 m sub5_in[1][1] [127:0] $end
+   $var wire 128 q sub5_in[1][2] [127:0] $end
+   $var wire 8 3! sub5_out[0][0] [7:0] $end
+   $var wire 8 4! sub5_out[0][1] [7:0] $end
+   $var wire 8 5! sub5_out[0][2] [7:0] $end
+   $var wire 8 6! sub5_out[1][0] [7:0] $end
+   $var wire 8 7! sub5_out[1][1] [7:0] $end
+   $var wire 8 8! sub5_out[1][2] [7:0] $end
+   $var wire 32 u count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 @! clk $end
-    $var wire 128 z in[0][0] [127:0] $end
-    $var wire 128 ~ in[0][1] [127:0] $end
-    $var wire 128 $! in[0][2] [127:0] $end
-    $var wire 128 (! in[1][0] [127:0] $end
-    $var wire 128 ,! in[1][1] [127:0] $end
-    $var wire 128 0! in[1][2] [127:0] $end
-    $var wire  8 :! out[0][0] [7:0] $end
-    $var wire  8 ;! out[0][1] [7:0] $end
-    $var wire  8 <! out[0][2] [7:0] $end
-    $var wire  8 =! out[1][0] [7:0] $end
-    $var wire  8 >! out[1][1] [7:0] $end
-    $var wire  8 ?! out[1][2] [7:0] $end
+    $var wire 1 ?! clk $end
+    $var wire 128 y in[0][0] [127:0] $end
+    $var wire 128 } in[0][1] [127:0] $end
+    $var wire 128 #! in[0][2] [127:0] $end
+    $var wire 128 '! in[1][0] [127:0] $end
+    $var wire 128 +! in[1][1] [127:0] $end
+    $var wire 128 /! in[1][2] [127:0] $end
+    $var wire 8 9! out[0][0] [7:0] $end
+    $var wire 8 :! out[0][1] [7:0] $end
+    $var wire 8 ;! out[0][2] [7:0] $end
+    $var wire 8 <! out[1][0] [7:0] $end
+    $var wire 8 =! out[1][1] [7:0] $end
+    $var wire 8 >! out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 w i [31:0] $end
+    $var wire 32 v i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 x j [31:0] $end
+     $var wire 32 w j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 y exp [7:0] $end
+      $var wire 8 x exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 `! clk $end
-  $var wire 128 a! in[0][0] [127:0] $end
-  $var wire 128 e! in[0][1] [127:0] $end
-  $var wire 128 i! in[0][2] [127:0] $end
-  $var wire 128 m! in[1][0] [127:0] $end
-  $var wire 128 q! in[1][1] [127:0] $end
-  $var wire 128 u! in[1][2] [127:0] $end
-  $var wire  8 y! out[0][0] [7:0] $end
-  $var wire  8 z! out[0][1] [7:0] $end
-  $var wire  8 {! out[0][2] [7:0] $end
-  $var wire  8 |! out[1][0] [7:0] $end
-  $var wire  8 }! out[1][1] [7:0] $end
-  $var wire  8 ~! out[1][2] [7:0] $end
+  $var wire 1 Y! clk $end
+  $var wire 128 Z! in[0][0] [127:0] $end
+  $var wire 128 ^! in[0][1] [127:0] $end
+  $var wire 128 b! in[0][2] [127:0] $end
+  $var wire 128 f! in[1][0] [127:0] $end
+  $var wire 128 j! in[1][1] [127:0] $end
+  $var wire 128 n! in[1][2] [127:0] $end
+  $var wire 8 r! out[0][0] [7:0] $end
+  $var wire 8 s! out[0][1] [7:0] $end
+  $var wire 8 t! out[0][2] [7:0] $end
+  $var wire 8 u! out[1][0] [7:0] $end
+  $var wire 8 v! out[1][1] [7:0] $end
+  $var wire 8 w! out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 `! clk $end
-   $var wire 32 Y! count [31:0] $end
-   $var wire 128 a! in[0][0] [127:0] $end
-   $var wire 128 e! in[0][1] [127:0] $end
-   $var wire 128 i! in[0][2] [127:0] $end
-   $var wire 128 m! in[1][0] [127:0] $end
-   $var wire 128 q! in[1][1] [127:0] $end
-   $var wire 128 u! in[1][2] [127:0] $end
-   $var wire  8 y! out[0][0] [7:0] $end
-   $var wire  8 z! out[0][1] [7:0] $end
-   $var wire  8 {! out[0][2] [7:0] $end
-   $var wire  8 |! out[1][0] [7:0] $end
-   $var wire  8 }! out[1][1] [7:0] $end
-   $var wire  8 ~! out[1][2] [7:0] $end
-   $var wire  8 I! val0[0] [7:0] $end
-   $var wire  8 J! val0[1] [7:0] $end
-   $var wire  8 K! val1[0] [7:0] $end
-   $var wire  8 L! val1[1] [7:0] $end
-   $var wire  8 M! val2[0] [7:0] $end
-   $var wire  8 N! val2[1] [7:0] $end
-   $var wire  8 O! val3[0] [7:0] $end
-   $var wire  8 P! val3[1] [7:0] $end
+   $var wire 1 Y! clk $end
+   $var wire 128 Z! in[0][0] [127:0] $end
+   $var wire 128 ^! in[0][1] [127:0] $end
+   $var wire 128 b! in[0][2] [127:0] $end
+   $var wire 128 f! in[1][0] [127:0] $end
+   $var wire 128 j! in[1][1] [127:0] $end
+   $var wire 128 n! in[1][2] [127:0] $end
+   $var wire 8 r! out[0][0] [7:0] $end
+   $var wire 8 s! out[0][1] [7:0] $end
+   $var wire 8 t! out[0][2] [7:0] $end
+   $var wire 8 u! out[1][0] [7:0] $end
+   $var wire 8 v! out[1][1] [7:0] $end
+   $var wire 8 w! out[1][2] [7:0] $end
+   $var wire 32 R! count [31:0] $end
+   $var wire 8 H! val0[0] [7:0] $end
+   $var wire 8 I! val0[1] [7:0] $end
+   $var wire 8 J! val1[0] [7:0] $end
+   $var wire 8 K! val1[1] [7:0] $end
+   $var wire 8 L! val2[0] [7:0] $end
+   $var wire 8 M! val2[1] [7:0] $end
+   $var wire 8 N! val3[0] [7:0] $end
+   $var wire 8 O! val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 Q! out[0] [7:0] $end
-    $var wire  8 R! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 H! out[0] [7:0] $end
+    $var wire 8 I! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 S! out[0] [7:0] $end
-    $var wire  8 T! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 J! out[0] [7:0] $end
+    $var wire 8 K! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 U! out[0] [7:0] $end
-    $var wire  8 V! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 L! out[0] [7:0] $end
+    $var wire 8 M! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 W! out[0] [7:0] $end
-    $var wire  8 X! out[1] [7:0] $end
+    $var wire 8 P! out[0] [7:0] $end
+    $var wire 8 Q! out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 Z! i [31:0] $end
+    $var wire 32 S! i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 [! j [31:0] $end
+     $var wire 32 T! j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 \! exp [127:0] $end
+      $var wire 128 U! exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 $" out[0] [7:0] $end
-  $var wire  8 %" out[1] [7:0] $end
+  $var wire 8 {! out[0] [7:0] $end
+  $var wire 8 |! out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 &" P0 [31:0] $end
-   $var wire 32 '" P1 [31:0] $end
-   $var wire  8 $" out[0] [7:0] $end
-   $var wire  8 %" out[1] [7:0] $end
+   $var wire 32 }! P0 [31:0] $end
+   $var wire 32 ~! P1 [31:0] $end
+   $var wire 8 {! out[0] [7:0] $end
+   $var wire 8 |! out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1 $end
-  $var wire  1 j" clk $end
-  $var wire  8 k" in [7:0] $end
-  $var wire  8 l" out [7:0] $end
+  $var wire 1 c" clk $end
+  $var wire 8 d" in [7:0] $end
+  $var wire 8 e" out [7:0] $end
   $scope module sub4_b $end
-   $var wire 32 m" P0 [31:0] $end
-   $var real 64 n" P1 $end
-   $var real 64 p" P3 $end
-   $var wire  1 j" clk $end
-   $var wire 32 B" count [31:0] $end
-   $var wire  8 )" ff [7:0] $end
-   $var wire  8 k" in [7:0] $end
-   $var wire  8 l" out [7:0] $end
-   $var wire 128 *" sub5_in[0][0] [127:0] $end
-   $var wire 128 ." sub5_in[0][1] [127:0] $end
-   $var wire 128 2" sub5_in[0][2] [127:0] $end
-   $var wire 128 6" sub5_in[1][0] [127:0] $end
-   $var wire 128 :" sub5_in[1][1] [127:0] $end
-   $var wire 128 >" sub5_in[1][2] [127:0] $end
-   $var wire  8 ^" sub5_out[0][0] [7:0] $end
-   $var wire  8 _" sub5_out[0][1] [7:0] $end
-   $var wire  8 `" sub5_out[0][2] [7:0] $end
-   $var wire  8 a" sub5_out[1][0] [7:0] $end
-   $var wire  8 b" sub5_out[1][1] [7:0] $end
-   $var wire  8 c" sub5_out[1][2] [7:0] $end
+   $var wire 32 f" P0 [31:0] $end
+   $var real 64 g" P1 $end
+   $var real 64 i" P3 $end
+   $var wire 1 c" clk $end
+   $var wire 8 d" in [7:0] $end
+   $var wire 8 e" out [7:0] $end
+   $var wire 8 "" ff [7:0] $end
+   $var wire 128 #" sub5_in[0][0] [127:0] $end
+   $var wire 128 '" sub5_in[0][1] [127:0] $end
+   $var wire 128 +" sub5_in[0][2] [127:0] $end
+   $var wire 128 /" sub5_in[1][0] [127:0] $end
+   $var wire 128 3" sub5_in[1][1] [127:0] $end
+   $var wire 128 7" sub5_in[1][2] [127:0] $end
+   $var wire 8 W" sub5_out[0][0] [7:0] $end
+   $var wire 8 X" sub5_out[0][1] [7:0] $end
+   $var wire 8 Y" sub5_out[0][2] [7:0] $end
+   $var wire 8 Z" sub5_out[1][0] [7:0] $end
+   $var wire 8 [" sub5_out[1][1] [7:0] $end
+   $var wire 8 \" sub5_out[1][2] [7:0] $end
+   $var wire 32 ;" count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 j" clk $end
-    $var wire 128 F" in[0][0] [127:0] $end
-    $var wire 128 J" in[0][1] [127:0] $end
-    $var wire 128 N" in[0][2] [127:0] $end
-    $var wire 128 R" in[1][0] [127:0] $end
-    $var wire 128 V" in[1][1] [127:0] $end
-    $var wire 128 Z" in[1][2] [127:0] $end
-    $var wire  8 d" out[0][0] [7:0] $end
-    $var wire  8 e" out[0][1] [7:0] $end
-    $var wire  8 f" out[0][2] [7:0] $end
-    $var wire  8 g" out[1][0] [7:0] $end
-    $var wire  8 h" out[1][1] [7:0] $end
-    $var wire  8 i" out[1][2] [7:0] $end
+    $var wire 1 c" clk $end
+    $var wire 128 ?" in[0][0] [127:0] $end
+    $var wire 128 C" in[0][1] [127:0] $end
+    $var wire 128 G" in[0][2] [127:0] $end
+    $var wire 128 K" in[1][0] [127:0] $end
+    $var wire 128 O" in[1][1] [127:0] $end
+    $var wire 128 S" in[1][2] [127:0] $end
+    $var wire 8 ]" out[0][0] [7:0] $end
+    $var wire 8 ^" out[0][1] [7:0] $end
+    $var wire 8 _" out[0][2] [7:0] $end
+    $var wire 8 `" out[1][0] [7:0] $end
+    $var wire 8 a" out[1][1] [7:0] $end
+    $var wire 8 b" out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 C" i [31:0] $end
+    $var wire 32 <" i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 D" j [31:0] $end
+     $var wire 32 =" j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 E" exp [7:0] $end
+      $var wire 8 >" exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 ,# clk $end
-  $var wire 128 -# in[0][0] [127:0] $end
-  $var wire 128 1# in[0][1] [127:0] $end
-  $var wire 128 5# in[0][2] [127:0] $end
-  $var wire 128 9# in[1][0] [127:0] $end
-  $var wire 128 =# in[1][1] [127:0] $end
-  $var wire 128 A# in[1][2] [127:0] $end
-  $var wire  8 E# out[0][0] [7:0] $end
-  $var wire  8 F# out[0][1] [7:0] $end
-  $var wire  8 G# out[0][2] [7:0] $end
-  $var wire  8 H# out[1][0] [7:0] $end
-  $var wire  8 I# out[1][1] [7:0] $end
-  $var wire  8 J# out[1][2] [7:0] $end
+  $var wire 1 }" clk $end
+  $var wire 128 ~" in[0][0] [127:0] $end
+  $var wire 128 $# in[0][1] [127:0] $end
+  $var wire 128 (# in[0][2] [127:0] $end
+  $var wire 128 ,# in[1][0] [127:0] $end
+  $var wire 128 0# in[1][1] [127:0] $end
+  $var wire 128 4# in[1][2] [127:0] $end
+  $var wire 8 8# out[0][0] [7:0] $end
+  $var wire 8 9# out[0][1] [7:0] $end
+  $var wire 8 :# out[0][2] [7:0] $end
+  $var wire 8 ;# out[1][0] [7:0] $end
+  $var wire 8 <# out[1][1] [7:0] $end
+  $var wire 8 =# out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 ,# clk $end
-   $var wire 32 %# count [31:0] $end
-   $var wire 128 -# in[0][0] [127:0] $end
-   $var wire 128 1# in[0][1] [127:0] $end
-   $var wire 128 5# in[0][2] [127:0] $end
-   $var wire 128 9# in[1][0] [127:0] $end
-   $var wire 128 =# in[1][1] [127:0] $end
-   $var wire 128 A# in[1][2] [127:0] $end
-   $var wire  8 E# out[0][0] [7:0] $end
-   $var wire  8 F# out[0][1] [7:0] $end
-   $var wire  8 G# out[0][2] [7:0] $end
-   $var wire  8 H# out[1][0] [7:0] $end
-   $var wire  8 I# out[1][1] [7:0] $end
-   $var wire  8 J# out[1][2] [7:0] $end
-   $var wire  8 s" val0[0] [7:0] $end
-   $var wire  8 t" val0[1] [7:0] $end
-   $var wire  8 u" val1[0] [7:0] $end
-   $var wire  8 v" val1[1] [7:0] $end
-   $var wire  8 w" val2[0] [7:0] $end
-   $var wire  8 x" val2[1] [7:0] $end
-   $var wire  8 y" val3[0] [7:0] $end
-   $var wire  8 z" val3[1] [7:0] $end
+   $var wire 1 }" clk $end
+   $var wire 128 ~" in[0][0] [127:0] $end
+   $var wire 128 $# in[0][1] [127:0] $end
+   $var wire 128 (# in[0][2] [127:0] $end
+   $var wire 128 ,# in[1][0] [127:0] $end
+   $var wire 128 0# in[1][1] [127:0] $end
+   $var wire 128 4# in[1][2] [127:0] $end
+   $var wire 8 8# out[0][0] [7:0] $end
+   $var wire 8 9# out[0][1] [7:0] $end
+   $var wire 8 :# out[0][2] [7:0] $end
+   $var wire 8 ;# out[1][0] [7:0] $end
+   $var wire 8 <# out[1][1] [7:0] $end
+   $var wire 8 =# out[1][2] [7:0] $end
+   $var wire 32 v" count [31:0] $end
+   $var wire 8 l" val0[0] [7:0] $end
+   $var wire 8 m" val0[1] [7:0] $end
+   $var wire 8 n" val1[0] [7:0] $end
+   $var wire 8 o" val1[1] [7:0] $end
+   $var wire 8 p" val2[0] [7:0] $end
+   $var wire 8 q" val2[1] [7:0] $end
+   $var wire 8 r" val3[0] [7:0] $end
+   $var wire 8 s" val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 {" out[0] [7:0] $end
-    $var wire  8 |" out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 l" out[0] [7:0] $end
+    $var wire 8 m" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 }" out[0] [7:0] $end
-    $var wire  8 ~" out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 n" out[0] [7:0] $end
+    $var wire 8 o" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 !# out[0] [7:0] $end
-    $var wire  8 "# out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 p" out[0] [7:0] $end
+    $var wire 8 q" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 ## out[0] [7:0] $end
-    $var wire  8 $# out[1] [7:0] $end
+    $var wire 8 t" out[0] [7:0] $end
+    $var wire 8 u" out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 &# i [31:0] $end
+    $var wire 32 w" i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 '# j [31:0] $end
+     $var wire 32 x" j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 (# exp [127:0] $end
+      $var wire 128 y" exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 N# out[0] [7:0] $end
-  $var wire  8 O# out[1] [7:0] $end
+  $var wire 8 A# out[0] [7:0] $end
+  $var wire 8 B# out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 P# P0 [31:0] $end
-   $var wire 32 Q# P1 [31:0] $end
-   $var wire  8 N# out[0] [7:0] $end
-   $var wire  8 O# out[1] [7:0] $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3 $end
-  $var wire  1 T& clk $end
-  $var wire  8 U& in [7:0] $end
-  $var wire  8 V& out [7:0] $end
-  $scope module sub3_d $end
-   $var wire  8 Z& P0 [7:0] $end
-   $var wire 32 [& UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 \& UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 ]& UNUSED [15:0] $end
-   $var wire  1 T& clk $end
-   $var wire  8 W& ff [7:0] $end
-   $var wire  8 U& in [7:0] $end
-   $var wire  8 V& out [7:0] $end
-   $var wire  8 X& out4 [7:0] $end
-   $var wire  8 Y& out4_2 [7:0] $end
-   $scope module i_sub4_0 $end
-    $var wire  1 T& clk $end
-    $var wire  8 W& in [7:0] $end
-    $var wire  8 X& out [7:0] $end
-   $upscope $end
-   $scope module i_sub4_1 $end
-    $var wire  1 T& clk $end
-    $var wire  8 W& in [7:0] $end
-    $var wire  8 Y& out [7:0] $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
-  $var wire  1 B' clk $end
-  $var wire  8 C' in [7:0] $end
-  $var wire  8 D' out [7:0] $end
-  $scope module sub4_2 $end
-   $var wire 32 E' P0 [31:0] $end
-   $var real 64 F' P1 $end
-   $var real 64 H' P3 $end
-   $var wire  1 B' clk $end
-   $var wire 32 x& count [31:0] $end
-   $var wire  8 _& ff [7:0] $end
-   $var wire  8 C' in [7:0] $end
-   $var wire  8 D' out [7:0] $end
-   $var wire 128 `& sub5_in[0][0] [127:0] $end
-   $var wire 128 d& sub5_in[0][1] [127:0] $end
-   $var wire 128 h& sub5_in[0][2] [127:0] $end
-   $var wire 128 l& sub5_in[1][0] [127:0] $end
-   $var wire 128 p& sub5_in[1][1] [127:0] $end
-   $var wire 128 t& sub5_in[1][2] [127:0] $end
-   $var wire  8 6' sub5_out[0][0] [7:0] $end
-   $var wire  8 7' sub5_out[0][1] [7:0] $end
-   $var wire  8 8' sub5_out[0][2] [7:0] $end
-   $var wire  8 9' sub5_out[1][0] [7:0] $end
-   $var wire  8 :' sub5_out[1][1] [7:0] $end
-   $var wire  8 ;' sub5_out[1][2] [7:0] $end
-   $scope module i_sub5 $end
-    $var wire  1 B' clk $end
-    $var wire 128 |& in[0][0] [127:0] $end
-    $var wire 128 "' in[0][1] [127:0] $end
-    $var wire 128 &' in[0][2] [127:0] $end
-    $var wire 128 *' in[1][0] [127:0] $end
-    $var wire 128 .' in[1][1] [127:0] $end
-    $var wire 128 2' in[1][2] [127:0] $end
-    $var wire  8 <' out[0][0] [7:0] $end
-    $var wire  8 =' out[0][1] [7:0] $end
-    $var wire  8 >' out[0][2] [7:0] $end
-    $var wire  8 ?' out[1][0] [7:0] $end
-    $var wire  8 @' out[1][1] [7:0] $end
-    $var wire  8 A' out[1][2] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 y& i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 z& j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire  8 {& exp [7:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 b' clk $end
-  $var wire 128 c' in[0][0] [127:0] $end
-  $var wire 128 g' in[0][1] [127:0] $end
-  $var wire 128 k' in[0][2] [127:0] $end
-  $var wire 128 o' in[1][0] [127:0] $end
-  $var wire 128 s' in[1][1] [127:0] $end
-  $var wire 128 w' in[1][2] [127:0] $end
-  $var wire  8 {' out[0][0] [7:0] $end
-  $var wire  8 |' out[0][1] [7:0] $end
-  $var wire  8 }' out[0][2] [7:0] $end
-  $var wire  8 ~' out[1][0] [7:0] $end
-  $var wire  8 !( out[1][1] [7:0] $end
-  $var wire  8 "( out[1][2] [7:0] $end
-  $scope module sub5 $end
-   $var wire  1 b' clk $end
-   $var wire 32 [' count [31:0] $end
-   $var wire 128 c' in[0][0] [127:0] $end
-   $var wire 128 g' in[0][1] [127:0] $end
-   $var wire 128 k' in[0][2] [127:0] $end
-   $var wire 128 o' in[1][0] [127:0] $end
-   $var wire 128 s' in[1][1] [127:0] $end
-   $var wire 128 w' in[1][2] [127:0] $end
-   $var wire  8 {' out[0][0] [7:0] $end
-   $var wire  8 |' out[0][1] [7:0] $end
-   $var wire  8 }' out[0][2] [7:0] $end
-   $var wire  8 ~' out[1][0] [7:0] $end
-   $var wire  8 !( out[1][1] [7:0] $end
-   $var wire  8 "( out[1][2] [7:0] $end
-   $var wire  8 K' val0[0] [7:0] $end
-   $var wire  8 L' val0[1] [7:0] $end
-   $var wire  8 M' val1[0] [7:0] $end
-   $var wire  8 N' val1[1] [7:0] $end
-   $var wire  8 O' val2[0] [7:0] $end
-   $var wire  8 P' val2[1] [7:0] $end
-   $var wire  8 Q' val3[0] [7:0] $end
-   $var wire  8 R' val3[1] [7:0] $end
-   $scope module i_sub0 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 S' out[0] [7:0] $end
-    $var wire  8 T' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub1 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 U' out[0] [7:0] $end
-    $var wire  8 V' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub2 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 W' out[0] [7:0] $end
-    $var wire  8 X' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub3 $end
-    $var wire  8 Y' out[0] [7:0] $end
-    $var wire  8 Z' out[1] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 \' i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 ]' j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire 128 ^' exp [127:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 &( out[0] [7:0] $end
-  $var wire  8 '( out[1] [7:0] $end
-  $scope module sub6_9 $end
-   $var wire 32 (( P0 [31:0] $end
-   $var wire 32 )( P1 [31:0] $end
-   $var wire  8 &( out[0] [7:0] $end
-   $var wire  8 '( out[1] [7:0] $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
-  $var wire  1 l( clk $end
-  $var wire  8 m( in [7:0] $end
-  $var wire  8 n( out [7:0] $end
-  $scope module sub4_b $end
-   $var wire 32 o( P0 [31:0] $end
-   $var real 64 p( P1 $end
-   $var real 64 r( P3 $end
-   $var wire  1 l( clk $end
-   $var wire 32 D( count [31:0] $end
-   $var wire  8 +( ff [7:0] $end
-   $var wire  8 m( in [7:0] $end
-   $var wire  8 n( out [7:0] $end
-   $var wire 128 ,( sub5_in[0][0] [127:0] $end
-   $var wire 128 0( sub5_in[0][1] [127:0] $end
-   $var wire 128 4( sub5_in[0][2] [127:0] $end
-   $var wire 128 8( sub5_in[1][0] [127:0] $end
-   $var wire 128 <( sub5_in[1][1] [127:0] $end
-   $var wire 128 @( sub5_in[1][2] [127:0] $end
-   $var wire  8 `( sub5_out[0][0] [7:0] $end
-   $var wire  8 a( sub5_out[0][1] [7:0] $end
-   $var wire  8 b( sub5_out[0][2] [7:0] $end
-   $var wire  8 c( sub5_out[1][0] [7:0] $end
-   $var wire  8 d( sub5_out[1][1] [7:0] $end
-   $var wire  8 e( sub5_out[1][2] [7:0] $end
-   $scope module i_sub5 $end
-    $var wire  1 l( clk $end
-    $var wire 128 H( in[0][0] [127:0] $end
-    $var wire 128 L( in[0][1] [127:0] $end
-    $var wire 128 P( in[0][2] [127:0] $end
-    $var wire 128 T( in[1][0] [127:0] $end
-    $var wire 128 X( in[1][1] [127:0] $end
-    $var wire 128 \( in[1][2] [127:0] $end
-    $var wire  8 f( out[0][0] [7:0] $end
-    $var wire  8 g( out[0][1] [7:0] $end
-    $var wire  8 h( out[0][2] [7:0] $end
-    $var wire  8 i( out[1][0] [7:0] $end
-    $var wire  8 j( out[1][1] [7:0] $end
-    $var wire  8 k( out[1][2] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 E( i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 F( j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire  8 G( exp [7:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 .) clk $end
-  $var wire 128 /) in[0][0] [127:0] $end
-  $var wire 128 3) in[0][1] [127:0] $end
-  $var wire 128 7) in[0][2] [127:0] $end
-  $var wire 128 ;) in[1][0] [127:0] $end
-  $var wire 128 ?) in[1][1] [127:0] $end
-  $var wire 128 C) in[1][2] [127:0] $end
-  $var wire  8 G) out[0][0] [7:0] $end
-  $var wire  8 H) out[0][1] [7:0] $end
-  $var wire  8 I) out[0][2] [7:0] $end
-  $var wire  8 J) out[1][0] [7:0] $end
-  $var wire  8 K) out[1][1] [7:0] $end
-  $var wire  8 L) out[1][2] [7:0] $end
-  $scope module sub5 $end
-   $var wire  1 .) clk $end
-   $var wire 32 ') count [31:0] $end
-   $var wire 128 /) in[0][0] [127:0] $end
-   $var wire 128 3) in[0][1] [127:0] $end
-   $var wire 128 7) in[0][2] [127:0] $end
-   $var wire 128 ;) in[1][0] [127:0] $end
-   $var wire 128 ?) in[1][1] [127:0] $end
-   $var wire 128 C) in[1][2] [127:0] $end
-   $var wire  8 G) out[0][0] [7:0] $end
-   $var wire  8 H) out[0][1] [7:0] $end
-   $var wire  8 I) out[0][2] [7:0] $end
-   $var wire  8 J) out[1][0] [7:0] $end
-   $var wire  8 K) out[1][1] [7:0] $end
-   $var wire  8 L) out[1][2] [7:0] $end
-   $var wire  8 u( val0[0] [7:0] $end
-   $var wire  8 v( val0[1] [7:0] $end
-   $var wire  8 w( val1[0] [7:0] $end
-   $var wire  8 x( val1[1] [7:0] $end
-   $var wire  8 y( val2[0] [7:0] $end
-   $var wire  8 z( val2[1] [7:0] $end
-   $var wire  8 {( val3[0] [7:0] $end
-   $var wire  8 |( val3[1] [7:0] $end
-   $scope module i_sub0 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 }( out[0] [7:0] $end
-    $var wire  8 ~( out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub1 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 !) out[0] [7:0] $end
-    $var wire  8 ") out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub2 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 #) out[0] [7:0] $end
-    $var wire  8 $) out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub3 $end
-    $var wire  8 %) out[0] [7:0] $end
-    $var wire  8 &) out[1] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 () i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 )) j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire 128 *) exp [127:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 P) out[0] [7:0] $end
-  $var wire  8 Q) out[1] [7:0] $end
-  $scope module sub6_9 $end
-   $var wire 32 R) P0 [31:0] $end
-   $var wire 32 S) P1 [31:0] $end
-   $var wire  8 P) out[0] [7:0] $end
-   $var wire  8 Q) out[1] [7:0] $end
+   $var wire 32 C# P0 [31:0] $end
+   $var wire 32 D# P1 [31:0] $end
+   $var wire 8 A# out[0] [7:0] $end
+   $var wire 8 B# out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2 $end
-  $var wire  1 S# clk $end
-  $var wire  8 T# in [7:0] $end
-  $var wire  8 U# out [7:0] $end
+  $var wire 1 F# clk $end
+  $var wire 8 G# in [7:0] $end
+  $var wire 8 H# out [7:0] $end
   $scope module sub3_2 $end
-   $var wire  8 Y# P0 [7:0] $end
-   $var wire 32 Z# UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 [# UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 \# UNUSED [15:0] $end
-   $var wire  1 S# clk $end
-   $var wire  8 V# ff [7:0] $end
-   $var wire  8 T# in [7:0] $end
-   $var wire  8 U# out [7:0] $end
-   $var wire  8 W# out4 [7:0] $end
-   $var wire  8 X# out4_2 [7:0] $end
+   $var wire 8 K# P0 [7:0] $end
+   $var wire 32 L# UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 M# UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 N# UNUSED [15:0] $end
+   $var wire 1 F# clk $end
+   $var wire 8 G# in [7:0] $end
+   $var wire 8 H# out [7:0] $end
+   $var wire 8 I# ff [7:0] $end
+   $var wire 8 H# out4 [7:0] $end
+   $var wire 8 J# out4_2 [7:0] $end
    $scope module i_sub4_0 $end
-    $var wire  1 S# clk $end
-    $var wire  8 V# in [7:0] $end
-    $var wire  8 W# out [7:0] $end
+    $var wire 1 F# clk $end
+    $var wire 8 I# in [7:0] $end
+    $var wire 8 H# out [7:0] $end
    $upscope $end
    $scope module i_sub4_1 $end
-    $var wire  1 S# clk $end
-    $var wire  8 V# in [7:0] $end
-    $var wire  8 X# out [7:0] $end
+    $var wire 1 F# clk $end
+    $var wire 8 I# in [7:0] $end
+    $var wire 8 J# out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0 $end
-  $var wire  1 A$ clk $end
-  $var wire  8 B$ in [7:0] $end
-  $var wire  8 C$ out [7:0] $end
+  $var wire 1 3$ clk $end
+  $var wire 8 4$ in [7:0] $end
+  $var wire 8 5$ out [7:0] $end
   $scope module sub4_2 $end
-   $var wire 32 D$ P0 [31:0] $end
-   $var real 64 E$ P1 $end
-   $var real 64 G$ P3 $end
-   $var wire  1 A$ clk $end
-   $var wire 32 w# count [31:0] $end
-   $var wire  8 ^# ff [7:0] $end
-   $var wire  8 B$ in [7:0] $end
-   $var wire  8 C$ out [7:0] $end
-   $var wire 128 _# sub5_in[0][0] [127:0] $end
-   $var wire 128 c# sub5_in[0][1] [127:0] $end
-   $var wire 128 g# sub5_in[0][2] [127:0] $end
-   $var wire 128 k# sub5_in[1][0] [127:0] $end
-   $var wire 128 o# sub5_in[1][1] [127:0] $end
-   $var wire 128 s# sub5_in[1][2] [127:0] $end
-   $var wire  8 5$ sub5_out[0][0] [7:0] $end
-   $var wire  8 6$ sub5_out[0][1] [7:0] $end
-   $var wire  8 7$ sub5_out[0][2] [7:0] $end
-   $var wire  8 8$ sub5_out[1][0] [7:0] $end
-   $var wire  8 9$ sub5_out[1][1] [7:0] $end
-   $var wire  8 :$ sub5_out[1][2] [7:0] $end
+   $var wire 32 6$ P0 [31:0] $end
+   $var real 64 7$ P1 $end
+   $var real 64 9$ P3 $end
+   $var wire 1 3$ clk $end
+   $var wire 8 4$ in [7:0] $end
+   $var wire 8 5$ out [7:0] $end
+   $var wire 8 P# ff [7:0] $end
+   $var wire 128 Q# sub5_in[0][0] [127:0] $end
+   $var wire 128 U# sub5_in[0][1] [127:0] $end
+   $var wire 128 Y# sub5_in[0][2] [127:0] $end
+   $var wire 128 ]# sub5_in[1][0] [127:0] $end
+   $var wire 128 a# sub5_in[1][1] [127:0] $end
+   $var wire 128 e# sub5_in[1][2] [127:0] $end
+   $var wire 8 '$ sub5_out[0][0] [7:0] $end
+   $var wire 8 ($ sub5_out[0][1] [7:0] $end
+   $var wire 8 )$ sub5_out[0][2] [7:0] $end
+   $var wire 8 *$ sub5_out[1][0] [7:0] $end
+   $var wire 8 +$ sub5_out[1][1] [7:0] $end
+   $var wire 8 ,$ sub5_out[1][2] [7:0] $end
+   $var wire 32 i# count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 A$ clk $end
-    $var wire 128 {# in[0][0] [127:0] $end
-    $var wire 128 !$ in[0][1] [127:0] $end
-    $var wire 128 %$ in[0][2] [127:0] $end
-    $var wire 128 )$ in[1][0] [127:0] $end
-    $var wire 128 -$ in[1][1] [127:0] $end
-    $var wire 128 1$ in[1][2] [127:0] $end
-    $var wire  8 ;$ out[0][0] [7:0] $end
-    $var wire  8 <$ out[0][1] [7:0] $end
-    $var wire  8 =$ out[0][2] [7:0] $end
-    $var wire  8 >$ out[1][0] [7:0] $end
-    $var wire  8 ?$ out[1][1] [7:0] $end
-    $var wire  8 @$ out[1][2] [7:0] $end
+    $var wire 1 3$ clk $end
+    $var wire 128 m# in[0][0] [127:0] $end
+    $var wire 128 q# in[0][1] [127:0] $end
+    $var wire 128 u# in[0][2] [127:0] $end
+    $var wire 128 y# in[1][0] [127:0] $end
+    $var wire 128 }# in[1][1] [127:0] $end
+    $var wire 128 #$ in[1][2] [127:0] $end
+    $var wire 8 -$ out[0][0] [7:0] $end
+    $var wire 8 .$ out[0][1] [7:0] $end
+    $var wire 8 /$ out[0][2] [7:0] $end
+    $var wire 8 0$ out[1][0] [7:0] $end
+    $var wire 8 1$ out[1][1] [7:0] $end
+    $var wire 8 2$ out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 x# i [31:0] $end
+    $var wire 32 j# i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 y# j [31:0] $end
+     $var wire 32 k# j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 z# exp [7:0] $end
+      $var wire 8 l# exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 a$ clk $end
-  $var wire 128 b$ in[0][0] [127:0] $end
-  $var wire 128 f$ in[0][1] [127:0] $end
-  $var wire 128 j$ in[0][2] [127:0] $end
-  $var wire 128 n$ in[1][0] [127:0] $end
-  $var wire 128 r$ in[1][1] [127:0] $end
-  $var wire 128 v$ in[1][2] [127:0] $end
-  $var wire  8 z$ out[0][0] [7:0] $end
-  $var wire  8 {$ out[0][1] [7:0] $end
-  $var wire  8 |$ out[0][2] [7:0] $end
-  $var wire  8 }$ out[1][0] [7:0] $end
-  $var wire  8 ~$ out[1][1] [7:0] $end
-  $var wire  8 !% out[1][2] [7:0] $end
+  $var wire 1 M$ clk $end
+  $var wire 128 N$ in[0][0] [127:0] $end
+  $var wire 128 R$ in[0][1] [127:0] $end
+  $var wire 128 V$ in[0][2] [127:0] $end
+  $var wire 128 Z$ in[1][0] [127:0] $end
+  $var wire 128 ^$ in[1][1] [127:0] $end
+  $var wire 128 b$ in[1][2] [127:0] $end
+  $var wire 8 f$ out[0][0] [7:0] $end
+  $var wire 8 g$ out[0][1] [7:0] $end
+  $var wire 8 h$ out[0][2] [7:0] $end
+  $var wire 8 i$ out[1][0] [7:0] $end
+  $var wire 8 j$ out[1][1] [7:0] $end
+  $var wire 8 k$ out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 a$ clk $end
-   $var wire 32 Z$ count [31:0] $end
-   $var wire 128 b$ in[0][0] [127:0] $end
-   $var wire 128 f$ in[0][1] [127:0] $end
-   $var wire 128 j$ in[0][2] [127:0] $end
-   $var wire 128 n$ in[1][0] [127:0] $end
-   $var wire 128 r$ in[1][1] [127:0] $end
-   $var wire 128 v$ in[1][2] [127:0] $end
-   $var wire  8 z$ out[0][0] [7:0] $end
-   $var wire  8 {$ out[0][1] [7:0] $end
-   $var wire  8 |$ out[0][2] [7:0] $end
-   $var wire  8 }$ out[1][0] [7:0] $end
-   $var wire  8 ~$ out[1][1] [7:0] $end
-   $var wire  8 !% out[1][2] [7:0] $end
-   $var wire  8 J$ val0[0] [7:0] $end
-   $var wire  8 K$ val0[1] [7:0] $end
-   $var wire  8 L$ val1[0] [7:0] $end
-   $var wire  8 M$ val1[1] [7:0] $end
-   $var wire  8 N$ val2[0] [7:0] $end
-   $var wire  8 O$ val2[1] [7:0] $end
-   $var wire  8 P$ val3[0] [7:0] $end
-   $var wire  8 Q$ val3[1] [7:0] $end
+   $var wire 1 M$ clk $end
+   $var wire 128 N$ in[0][0] [127:0] $end
+   $var wire 128 R$ in[0][1] [127:0] $end
+   $var wire 128 V$ in[0][2] [127:0] $end
+   $var wire 128 Z$ in[1][0] [127:0] $end
+   $var wire 128 ^$ in[1][1] [127:0] $end
+   $var wire 128 b$ in[1][2] [127:0] $end
+   $var wire 8 f$ out[0][0] [7:0] $end
+   $var wire 8 g$ out[0][1] [7:0] $end
+   $var wire 8 h$ out[0][2] [7:0] $end
+   $var wire 8 i$ out[1][0] [7:0] $end
+   $var wire 8 j$ out[1][1] [7:0] $end
+   $var wire 8 k$ out[1][2] [7:0] $end
+   $var wire 32 F$ count [31:0] $end
+   $var wire 8 <$ val0[0] [7:0] $end
+   $var wire 8 =$ val0[1] [7:0] $end
+   $var wire 8 >$ val1[0] [7:0] $end
+   $var wire 8 ?$ val1[1] [7:0] $end
+   $var wire 8 @$ val2[0] [7:0] $end
+   $var wire 8 A$ val2[1] [7:0] $end
+   $var wire 8 B$ val3[0] [7:0] $end
+   $var wire 8 C$ val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 R$ out[0] [7:0] $end
-    $var wire  8 S$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 <$ out[0] [7:0] $end
+    $var wire 8 =$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 T$ out[0] [7:0] $end
-    $var wire  8 U$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 >$ out[0] [7:0] $end
+    $var wire 8 ?$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 V$ out[0] [7:0] $end
-    $var wire  8 W$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 @$ out[0] [7:0] $end
+    $var wire 8 A$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 X$ out[0] [7:0] $end
-    $var wire  8 Y$ out[1] [7:0] $end
+    $var wire 8 D$ out[0] [7:0] $end
+    $var wire 8 E$ out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 [$ i [31:0] $end
+    $var wire 32 G$ i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 \$ j [31:0] $end
+     $var wire 32 H$ j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 ]$ exp [127:0] $end
+      $var wire 128 I$ exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 %% out[0] [7:0] $end
-  $var wire  8 &% out[1] [7:0] $end
+  $var wire 8 o$ out[0] [7:0] $end
+  $var wire 8 p$ out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 '% P0 [31:0] $end
-   $var wire 32 (% P1 [31:0] $end
-   $var wire  8 %% out[0] [7:0] $end
-   $var wire  8 &% out[1] [7:0] $end
+   $var wire 32 q$ P0 [31:0] $end
+   $var wire 32 r$ P1 [31:0] $end
+   $var wire 8 o$ out[0] [7:0] $end
+   $var wire 8 p$ out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1 $end
-  $var wire  1 k% clk $end
-  $var wire  8 l% in [7:0] $end
-  $var wire  8 m% out [7:0] $end
+  $var wire 1 W% clk $end
+  $var wire 8 X% in [7:0] $end
+  $var wire 8 Y% out [7:0] $end
   $scope module sub4_b $end
-   $var wire 32 n% P0 [31:0] $end
-   $var real 64 o% P1 $end
-   $var real 64 q% P3 $end
-   $var wire  1 k% clk $end
-   $var wire 32 C% count [31:0] $end
-   $var wire  8 *% ff [7:0] $end
-   $var wire  8 l% in [7:0] $end
-   $var wire  8 m% out [7:0] $end
-   $var wire 128 +% sub5_in[0][0] [127:0] $end
-   $var wire 128 /% sub5_in[0][1] [127:0] $end
-   $var wire 128 3% sub5_in[0][2] [127:0] $end
-   $var wire 128 7% sub5_in[1][0] [127:0] $end
-   $var wire 128 ;% sub5_in[1][1] [127:0] $end
-   $var wire 128 ?% sub5_in[1][2] [127:0] $end
-   $var wire  8 _% sub5_out[0][0] [7:0] $end
-   $var wire  8 `% sub5_out[0][1] [7:0] $end
-   $var wire  8 a% sub5_out[0][2] [7:0] $end
-   $var wire  8 b% sub5_out[1][0] [7:0] $end
-   $var wire  8 c% sub5_out[1][1] [7:0] $end
-   $var wire  8 d% sub5_out[1][2] [7:0] $end
+   $var wire 32 Z% P0 [31:0] $end
+   $var real 64 [% P1 $end
+   $var real 64 ]% P3 $end
+   $var wire 1 W% clk $end
+   $var wire 8 X% in [7:0] $end
+   $var wire 8 Y% out [7:0] $end
+   $var wire 8 t$ ff [7:0] $end
+   $var wire 128 u$ sub5_in[0][0] [127:0] $end
+   $var wire 128 y$ sub5_in[0][1] [127:0] $end
+   $var wire 128 }$ sub5_in[0][2] [127:0] $end
+   $var wire 128 #% sub5_in[1][0] [127:0] $end
+   $var wire 128 '% sub5_in[1][1] [127:0] $end
+   $var wire 128 +% sub5_in[1][2] [127:0] $end
+   $var wire 8 K% sub5_out[0][0] [7:0] $end
+   $var wire 8 L% sub5_out[0][1] [7:0] $end
+   $var wire 8 M% sub5_out[0][2] [7:0] $end
+   $var wire 8 N% sub5_out[1][0] [7:0] $end
+   $var wire 8 O% sub5_out[1][1] [7:0] $end
+   $var wire 8 P% sub5_out[1][2] [7:0] $end
+   $var wire 32 /% count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 k% clk $end
-    $var wire 128 G% in[0][0] [127:0] $end
-    $var wire 128 K% in[0][1] [127:0] $end
-    $var wire 128 O% in[0][2] [127:0] $end
-    $var wire 128 S% in[1][0] [127:0] $end
-    $var wire 128 W% in[1][1] [127:0] $end
-    $var wire 128 [% in[1][2] [127:0] $end
-    $var wire  8 e% out[0][0] [7:0] $end
-    $var wire  8 f% out[0][1] [7:0] $end
-    $var wire  8 g% out[0][2] [7:0] $end
-    $var wire  8 h% out[1][0] [7:0] $end
-    $var wire  8 i% out[1][1] [7:0] $end
-    $var wire  8 j% out[1][2] [7:0] $end
+    $var wire 1 W% clk $end
+    $var wire 128 3% in[0][0] [127:0] $end
+    $var wire 128 7% in[0][1] [127:0] $end
+    $var wire 128 ;% in[0][2] [127:0] $end
+    $var wire 128 ?% in[1][0] [127:0] $end
+    $var wire 128 C% in[1][1] [127:0] $end
+    $var wire 128 G% in[1][2] [127:0] $end
+    $var wire 8 Q% out[0][0] [7:0] $end
+    $var wire 8 R% out[0][1] [7:0] $end
+    $var wire 8 S% out[0][2] [7:0] $end
+    $var wire 8 T% out[1][0] [7:0] $end
+    $var wire 8 U% out[1][1] [7:0] $end
+    $var wire 8 V% out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 D% i [31:0] $end
+    $var wire 32 0% i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 E% j [31:0] $end
+     $var wire 32 1% j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 F% exp [7:0] $end
+      $var wire 8 2% exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 -& clk $end
-  $var wire 128 .& in[0][0] [127:0] $end
-  $var wire 128 2& in[0][1] [127:0] $end
-  $var wire 128 6& in[0][2] [127:0] $end
-  $var wire 128 :& in[1][0] [127:0] $end
-  $var wire 128 >& in[1][1] [127:0] $end
-  $var wire 128 B& in[1][2] [127:0] $end
-  $var wire  8 F& out[0][0] [7:0] $end
-  $var wire  8 G& out[0][1] [7:0] $end
-  $var wire  8 H& out[0][2] [7:0] $end
-  $var wire  8 I& out[1][0] [7:0] $end
-  $var wire  8 J& out[1][1] [7:0] $end
-  $var wire  8 K& out[1][2] [7:0] $end
+  $var wire 1 q% clk $end
+  $var wire 128 r% in[0][0] [127:0] $end
+  $var wire 128 v% in[0][1] [127:0] $end
+  $var wire 128 z% in[0][2] [127:0] $end
+  $var wire 128 ~% in[1][0] [127:0] $end
+  $var wire 128 $& in[1][1] [127:0] $end
+  $var wire 128 (& in[1][2] [127:0] $end
+  $var wire 8 ,& out[0][0] [7:0] $end
+  $var wire 8 -& out[0][1] [7:0] $end
+  $var wire 8 .& out[0][2] [7:0] $end
+  $var wire 8 /& out[1][0] [7:0] $end
+  $var wire 8 0& out[1][1] [7:0] $end
+  $var wire 8 1& out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 -& clk $end
-   $var wire 32 && count [31:0] $end
-   $var wire 128 .& in[0][0] [127:0] $end
-   $var wire 128 2& in[0][1] [127:0] $end
-   $var wire 128 6& in[0][2] [127:0] $end
-   $var wire 128 :& in[1][0] [127:0] $end
-   $var wire 128 >& in[1][1] [127:0] $end
-   $var wire 128 B& in[1][2] [127:0] $end
-   $var wire  8 F& out[0][0] [7:0] $end
-   $var wire  8 G& out[0][1] [7:0] $end
-   $var wire  8 H& out[0][2] [7:0] $end
-   $var wire  8 I& out[1][0] [7:0] $end
-   $var wire  8 J& out[1][1] [7:0] $end
-   $var wire  8 K& out[1][2] [7:0] $end
-   $var wire  8 t% val0[0] [7:0] $end
-   $var wire  8 u% val0[1] [7:0] $end
-   $var wire  8 v% val1[0] [7:0] $end
-   $var wire  8 w% val1[1] [7:0] $end
-   $var wire  8 x% val2[0] [7:0] $end
-   $var wire  8 y% val2[1] [7:0] $end
-   $var wire  8 z% val3[0] [7:0] $end
-   $var wire  8 {% val3[1] [7:0] $end
+   $var wire 1 q% clk $end
+   $var wire 128 r% in[0][0] [127:0] $end
+   $var wire 128 v% in[0][1] [127:0] $end
+   $var wire 128 z% in[0][2] [127:0] $end
+   $var wire 128 ~% in[1][0] [127:0] $end
+   $var wire 128 $& in[1][1] [127:0] $end
+   $var wire 128 (& in[1][2] [127:0] $end
+   $var wire 8 ,& out[0][0] [7:0] $end
+   $var wire 8 -& out[0][1] [7:0] $end
+   $var wire 8 .& out[0][2] [7:0] $end
+   $var wire 8 /& out[1][0] [7:0] $end
+   $var wire 8 0& out[1][1] [7:0] $end
+   $var wire 8 1& out[1][2] [7:0] $end
+   $var wire 32 j% count [31:0] $end
+   $var wire 8 `% val0[0] [7:0] $end
+   $var wire 8 a% val0[1] [7:0] $end
+   $var wire 8 b% val1[0] [7:0] $end
+   $var wire 8 c% val1[1] [7:0] $end
+   $var wire 8 d% val2[0] [7:0] $end
+   $var wire 8 e% val2[1] [7:0] $end
+   $var wire 8 f% val3[0] [7:0] $end
+   $var wire 8 g% val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 |% out[0] [7:0] $end
-    $var wire  8 }% out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 `% out[0] [7:0] $end
+    $var wire 8 a% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 ~% out[0] [7:0] $end
-    $var wire  8 !& out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 b% out[0] [7:0] $end
+    $var wire 8 c% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 "& out[0] [7:0] $end
-    $var wire  8 #& out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 d% out[0] [7:0] $end
+    $var wire 8 e% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 $& out[0] [7:0] $end
-    $var wire  8 %& out[1] [7:0] $end
+    $var wire 8 h% out[0] [7:0] $end
+    $var wire 8 i% out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 '& i [31:0] $end
+    $var wire 32 k% i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 (& j [31:0] $end
+     $var wire 32 l% j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 )& exp [127:0] $end
+      $var wire 128 m% exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 O& out[0] [7:0] $end
-  $var wire  8 P& out[1] [7:0] $end
+  $var wire 8 5& out[0] [7:0] $end
+  $var wire 8 6& out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 Q& P0 [31:0] $end
-   $var wire 32 R& P1 [31:0] $end
-   $var wire  8 O& out[0] [7:0] $end
-   $var wire  8 P& out[1] [7:0] $end
+   $var wire 32 7& P0 [31:0] $end
+   $var wire 32 8& P1 [31:0] $end
+   $var wire 8 5& out[0] [7:0] $end
+   $var wire 8 6& out[1] [7:0] $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3 $end
+  $var wire 1 :& clk $end
+  $var wire 8 ;& in [7:0] $end
+  $var wire 8 <& out [7:0] $end
+  $scope module sub3_d $end
+   $var wire 8 ?& P0 [7:0] $end
+   $var wire 32 @& UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 A& UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 B& UNUSED [15:0] $end
+   $var wire 1 :& clk $end
+   $var wire 8 ;& in [7:0] $end
+   $var wire 8 <& out [7:0] $end
+   $var wire 8 =& ff [7:0] $end
+   $var wire 8 <& out4 [7:0] $end
+   $var wire 8 >& out4_2 [7:0] $end
+   $scope module i_sub4_0 $end
+    $var wire 1 :& clk $end
+    $var wire 8 =& in [7:0] $end
+    $var wire 8 <& out [7:0] $end
+   $upscope $end
+   $scope module i_sub4_1 $end
+    $var wire 1 :& clk $end
+    $var wire 8 =& in [7:0] $end
+    $var wire 8 >& out [7:0] $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
+  $var wire 1 '' clk $end
+  $var wire 8 (' in [7:0] $end
+  $var wire 8 )' out [7:0] $end
+  $scope module sub4_2 $end
+   $var wire 32 *' P0 [31:0] $end
+   $var real 64 +' P1 $end
+   $var real 64 -' P3 $end
+   $var wire 1 '' clk $end
+   $var wire 8 (' in [7:0] $end
+   $var wire 8 )' out [7:0] $end
+   $var wire 8 D& ff [7:0] $end
+   $var wire 128 E& sub5_in[0][0] [127:0] $end
+   $var wire 128 I& sub5_in[0][1] [127:0] $end
+   $var wire 128 M& sub5_in[0][2] [127:0] $end
+   $var wire 128 Q& sub5_in[1][0] [127:0] $end
+   $var wire 128 U& sub5_in[1][1] [127:0] $end
+   $var wire 128 Y& sub5_in[1][2] [127:0] $end
+   $var wire 8 y& sub5_out[0][0] [7:0] $end
+   $var wire 8 z& sub5_out[0][1] [7:0] $end
+   $var wire 8 {& sub5_out[0][2] [7:0] $end
+   $var wire 8 |& sub5_out[1][0] [7:0] $end
+   $var wire 8 }& sub5_out[1][1] [7:0] $end
+   $var wire 8 ~& sub5_out[1][2] [7:0] $end
+   $var wire 32 ]& count [31:0] $end
+   $scope module i_sub5 $end
+    $var wire 1 '' clk $end
+    $var wire 128 a& in[0][0] [127:0] $end
+    $var wire 128 e& in[0][1] [127:0] $end
+    $var wire 128 i& in[0][2] [127:0] $end
+    $var wire 128 m& in[1][0] [127:0] $end
+    $var wire 128 q& in[1][1] [127:0] $end
+    $var wire 128 u& in[1][2] [127:0] $end
+    $var wire 8 !' out[0][0] [7:0] $end
+    $var wire 8 "' out[0][1] [7:0] $end
+    $var wire 8 #' out[0][2] [7:0] $end
+    $var wire 8 $' out[1][0] [7:0] $end
+    $var wire 8 %' out[1][1] [7:0] $end
+    $var wire 8 &' out[1][2] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 ^& i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 _& j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 8 `& exp [7:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
+  $var wire 1 A' clk $end
+  $var wire 128 B' in[0][0] [127:0] $end
+  $var wire 128 F' in[0][1] [127:0] $end
+  $var wire 128 J' in[0][2] [127:0] $end
+  $var wire 128 N' in[1][0] [127:0] $end
+  $var wire 128 R' in[1][1] [127:0] $end
+  $var wire 128 V' in[1][2] [127:0] $end
+  $var wire 8 Z' out[0][0] [7:0] $end
+  $var wire 8 [' out[0][1] [7:0] $end
+  $var wire 8 \' out[0][2] [7:0] $end
+  $var wire 8 ]' out[1][0] [7:0] $end
+  $var wire 8 ^' out[1][1] [7:0] $end
+  $var wire 8 _' out[1][2] [7:0] $end
+  $scope module sub5 $end
+   $var wire 1 A' clk $end
+   $var wire 128 B' in[0][0] [127:0] $end
+   $var wire 128 F' in[0][1] [127:0] $end
+   $var wire 128 J' in[0][2] [127:0] $end
+   $var wire 128 N' in[1][0] [127:0] $end
+   $var wire 128 R' in[1][1] [127:0] $end
+   $var wire 128 V' in[1][2] [127:0] $end
+   $var wire 8 Z' out[0][0] [7:0] $end
+   $var wire 8 [' out[0][1] [7:0] $end
+   $var wire 8 \' out[0][2] [7:0] $end
+   $var wire 8 ]' out[1][0] [7:0] $end
+   $var wire 8 ^' out[1][1] [7:0] $end
+   $var wire 8 _' out[1][2] [7:0] $end
+   $var wire 32 :' count [31:0] $end
+   $var wire 8 0' val0[0] [7:0] $end
+   $var wire 8 1' val0[1] [7:0] $end
+   $var wire 8 2' val1[0] [7:0] $end
+   $var wire 8 3' val1[1] [7:0] $end
+   $var wire 8 4' val2[0] [7:0] $end
+   $var wire 8 5' val2[1] [7:0] $end
+   $var wire 8 6' val3[0] [7:0] $end
+   $var wire 8 7' val3[1] [7:0] $end
+   $scope module i_sub0 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 0' out[0] [7:0] $end
+    $var wire 8 1' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub1 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 2' out[0] [7:0] $end
+    $var wire 8 3' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub2 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 4' out[0] [7:0] $end
+    $var wire 8 5' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $var wire 8 8' out[0] [7:0] $end
+    $var wire 8 9' out[1] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 ;' i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 <' j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 128 =' exp [127:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
+  $var wire 8 c' out[0] [7:0] $end
+  $var wire 8 d' out[1] [7:0] $end
+  $scope module sub6_9 $end
+   $var wire 32 e' P0 [31:0] $end
+   $var wire 32 f' P1 [31:0] $end
+   $var wire 8 c' out[0] [7:0] $end
+   $var wire 8 d' out[1] [7:0] $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
+  $var wire 1 K( clk $end
+  $var wire 8 L( in [7:0] $end
+  $var wire 8 M( out [7:0] $end
+  $scope module sub4_b $end
+   $var wire 32 N( P0 [31:0] $end
+   $var real 64 O( P1 $end
+   $var real 64 Q( P3 $end
+   $var wire 1 K( clk $end
+   $var wire 8 L( in [7:0] $end
+   $var wire 8 M( out [7:0] $end
+   $var wire 8 h' ff [7:0] $end
+   $var wire 128 i' sub5_in[0][0] [127:0] $end
+   $var wire 128 m' sub5_in[0][1] [127:0] $end
+   $var wire 128 q' sub5_in[0][2] [127:0] $end
+   $var wire 128 u' sub5_in[1][0] [127:0] $end
+   $var wire 128 y' sub5_in[1][1] [127:0] $end
+   $var wire 128 }' sub5_in[1][2] [127:0] $end
+   $var wire 8 ?( sub5_out[0][0] [7:0] $end
+   $var wire 8 @( sub5_out[0][1] [7:0] $end
+   $var wire 8 A( sub5_out[0][2] [7:0] $end
+   $var wire 8 B( sub5_out[1][0] [7:0] $end
+   $var wire 8 C( sub5_out[1][1] [7:0] $end
+   $var wire 8 D( sub5_out[1][2] [7:0] $end
+   $var wire 32 #( count [31:0] $end
+   $scope module i_sub5 $end
+    $var wire 1 K( clk $end
+    $var wire 128 '( in[0][0] [127:0] $end
+    $var wire 128 +( in[0][1] [127:0] $end
+    $var wire 128 /( in[0][2] [127:0] $end
+    $var wire 128 3( in[1][0] [127:0] $end
+    $var wire 128 7( in[1][1] [127:0] $end
+    $var wire 128 ;( in[1][2] [127:0] $end
+    $var wire 8 E( out[0][0] [7:0] $end
+    $var wire 8 F( out[0][1] [7:0] $end
+    $var wire 8 G( out[0][2] [7:0] $end
+    $var wire 8 H( out[1][0] [7:0] $end
+    $var wire 8 I( out[1][1] [7:0] $end
+    $var wire 8 J( out[1][2] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 $( i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 %( j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 8 &( exp [7:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
+  $var wire 1 e( clk $end
+  $var wire 128 f( in[0][0] [127:0] $end
+  $var wire 128 j( in[0][1] [127:0] $end
+  $var wire 128 n( in[0][2] [127:0] $end
+  $var wire 128 r( in[1][0] [127:0] $end
+  $var wire 128 v( in[1][1] [127:0] $end
+  $var wire 128 z( in[1][2] [127:0] $end
+  $var wire 8 ~( out[0][0] [7:0] $end
+  $var wire 8 !) out[0][1] [7:0] $end
+  $var wire 8 ") out[0][2] [7:0] $end
+  $var wire 8 #) out[1][0] [7:0] $end
+  $var wire 8 $) out[1][1] [7:0] $end
+  $var wire 8 %) out[1][2] [7:0] $end
+  $scope module sub5 $end
+   $var wire 1 e( clk $end
+   $var wire 128 f( in[0][0] [127:0] $end
+   $var wire 128 j( in[0][1] [127:0] $end
+   $var wire 128 n( in[0][2] [127:0] $end
+   $var wire 128 r( in[1][0] [127:0] $end
+   $var wire 128 v( in[1][1] [127:0] $end
+   $var wire 128 z( in[1][2] [127:0] $end
+   $var wire 8 ~( out[0][0] [7:0] $end
+   $var wire 8 !) out[0][1] [7:0] $end
+   $var wire 8 ") out[0][2] [7:0] $end
+   $var wire 8 #) out[1][0] [7:0] $end
+   $var wire 8 $) out[1][1] [7:0] $end
+   $var wire 8 %) out[1][2] [7:0] $end
+   $var wire 32 ^( count [31:0] $end
+   $var wire 8 T( val0[0] [7:0] $end
+   $var wire 8 U( val0[1] [7:0] $end
+   $var wire 8 V( val1[0] [7:0] $end
+   $var wire 8 W( val1[1] [7:0] $end
+   $var wire 8 X( val2[0] [7:0] $end
+   $var wire 8 Y( val2[1] [7:0] $end
+   $var wire 8 Z( val3[0] [7:0] $end
+   $var wire 8 [( val3[1] [7:0] $end
+   $scope module i_sub0 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 T( out[0] [7:0] $end
+    $var wire 8 U( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub1 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 V( out[0] [7:0] $end
+    $var wire 8 W( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub2 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 X( out[0] [7:0] $end
+    $var wire 8 Y( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $var wire 8 \( out[0] [7:0] $end
+    $var wire 8 ]( out[1] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 _( i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 `( j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 128 a( exp [127:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
+  $var wire 8 )) out[0] [7:0] $end
+  $var wire 8 *) out[1] [7:0] $end
+  $scope module sub6_9 $end
+   $var wire 32 +) P0 [31:0] $end
+   $var wire 32 ,) P1 [31:0] $end
+   $var wire 8 )) out[0] [7:0] $end
+   $var wire 8 *) out[1] [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
@@ -1060,19 +1059,12 @@ b00000000 .
 b00000000 /
 b00000000 0
 b00000000 1
-b00000000000000000000000000000010 2
-b00000000000000000000000000001000 3
-b00000000000000000000000000000001 4
 b00000000 6
 b00000000 7
 b00000000 8
 09
 b00000000 :
 b00000000 ;
-b00000000000000000000000000000011 <
-b00000000000000000000000000001000 =
-b00000000000000000000000000000010 >
-b00000000000000000000000000000001 ?
 0A
 b00000000 B
 b00000000 C
@@ -1092,28 +1084,24 @@ b00000000 S
 b00000000 T
 b00000000 U
 b00000000 V
-b00000000 W
-b00000011 X
-b00000000000000000000000000000000 Y
-b00000000000000000000000000000001 Z
-b1111111111111101 [
-b00000000 ]
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ^
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 b
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 f
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 j
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 n
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 r
+b00000000 \
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ]
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 a
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 e
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 i
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 m
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 q
+b00000000000000000000000000000000 u
 b00000000000000000000000000000000 v
 b00000000000000000000000000000000 w
-b00000000000000000000000000000000 x
-b00000000 y
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 z
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ~
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 $!
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 (!
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ,!
-b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 0!
+b00000000 x
+b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 y
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 #161
 #162
 #163
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 #166
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 #168
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 #171
 #172
 #173
diff --git a/test_regress/t/t_hier_block_trace_fst.out b/test_regress/t/t_hier_block_trace_fst.out
index c675422c2..743c3853a 100644
--- a/test_regress/t/t_hier_block_trace_fst.out
+++ b/test_regress/t/t_hier_block_trace_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Nov 10 20:17:52 2022
+	Mon Oct 23 12:13:57 2023
 
 $end
 $version
@@ -149,7 +149,23 @@ $var wire 1 D clk $end
 $var wire 8 E in [7:0] $end
 $var wire 8 F out [7:0] $end
 $var logic 8 G ff [7:0] $end
+$scope interface in_ifs $end
+$var wire 1 D clk $end
+$var logic 8 G data [7:0] $end
+$upscope $end
+$scope interface out_ifs $end
+$var wire 1 D clk $end
+$var logic 8 H data [7:0] $end
+$upscope $end
 $scope module i_sub3 $end
+$scope interface in $end
+$var wire 1 D clk $end
+$var logic 8 G data [7:0] $end
+$upscope $end
+$scope interface out $end
+$var wire 1 D clk $end
+$var logic 8 H data [7:0] $end
+$upscope $end
 $var wire 8 G in_wire [7:0] $end
 $var wire 8 H out_1 [7:0] $end
 $var wire 8 I out_2 [7:0] $end
@@ -163,22 +179,6 @@ $var wire 1 D clk $end
 $var wire 8 G in [7:0] $end
 $var wire 8 I out [7:0] $end
 $upscope $end
-$scope interface in $end
-$var wire 1 D clk $end
-$var logic 8 G data [7:0] $end
-$upscope $end
-$scope interface out $end
-$var wire 1 D clk $end
-$var logic 8 H data [7:0] $end
-$upscope $end
-$upscope $end
-$scope interface in_ifs $end
-$var wire 1 D clk $end
-$var logic 8 G data [7:0] $end
-$upscope $end
-$scope interface out_ifs $end
-$var wire 1 D clk $end
-$var logic 8 H data [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -195,1328 +195,1289 @@ $var wire 1 J clk $end
 $var wire 8 K in [7:0] $end
 $var wire 8 L out [7:0] $end
 $var logic 8 Q ff [7:0] $end
-$var wire 8 R out4 [7:0] $end
-$var wire 8 S out4_2 [7:0] $end
+$var wire 8 L out4 [7:0] $end
+$var wire 8 R out4_2 [7:0] $end
 $scope module i_sub4_0 $end
 $var wire 1 J clk $end
 $var wire 8 Q in [7:0] $end
-$var wire 8 R out [7:0] $end
+$var wire 8 L out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
 $var wire 1 J clk $end
 $var wire 8 Q in [7:0] $end
-$var wire 8 S out [7:0] $end
+$var wire 8 R out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0 $end
-$var wire 1 T clk $end
-$var wire 8 U in [7:0] $end
-$var wire 8 V out [7:0] $end
+$var wire 1 S clk $end
+$var wire 8 T in [7:0] $end
+$var wire 8 U out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 W P0 [31:0] $end
-$var real_parameter 64 X P1 $end
-$var real_parameter 64 Y P3 $end
-$var wire 1 T clk $end
-$var wire 8 U in [7:0] $end
-$var wire 8 V out [7:0] $end
-$var logic 8 Z ff [7:0] $end
-$var logic 128 [ sub5_in[0][0] [127:0] $end
-$var logic 128 \ sub5_in[0][1] [127:0] $end
-$var logic 128 ] sub5_in[0][2] [127:0] $end
-$var logic 128 ^ sub5_in[1][0] [127:0] $end
-$var logic 128 _ sub5_in[1][1] [127:0] $end
-$var logic 128 ` sub5_in[1][2] [127:0] $end
-$var wire 8 a sub5_out[0][0] [7:0] $end
-$var wire 8 b sub5_out[0][1] [7:0] $end
-$var wire 8 c sub5_out[0][2] [7:0] $end
-$var wire 8 d sub5_out[1][0] [7:0] $end
-$var wire 8 e sub5_out[1][1] [7:0] $end
-$var wire 8 f sub5_out[1][2] [7:0] $end
-$var int 32 g count [31:0] $end
+$var parameter 32 V P0 [31:0] $end
+$var real_parameter 64 W P1 $end
+$var real_parameter 64 X P3 $end
+$var wire 1 S clk $end
+$var wire 8 T in [7:0] $end
+$var wire 8 U out [7:0] $end
+$var logic 8 Y ff [7:0] $end
+$var logic 128 Z sub5_in[0][0] [127:0] $end
+$var logic 128 [ sub5_in[0][1] [127:0] $end
+$var logic 128 \ sub5_in[0][2] [127:0] $end
+$var logic 128 ] sub5_in[1][0] [127:0] $end
+$var logic 128 ^ sub5_in[1][1] [127:0] $end
+$var logic 128 _ sub5_in[1][2] [127:0] $end
+$var wire 8 ` sub5_out[0][0] [7:0] $end
+$var wire 8 a sub5_out[0][1] [7:0] $end
+$var wire 8 b sub5_out[0][2] [7:0] $end
+$var wire 8 c sub5_out[1][0] [7:0] $end
+$var wire 8 d sub5_out[1][1] [7:0] $end
+$var wire 8 e sub5_out[1][2] [7:0] $end
+$var int 32 f count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 T clk $end
-$var wire 128 h in[0][0] [127:0] $end
-$var wire 128 i in[0][1] [127:0] $end
-$var wire 128 j in[0][2] [127:0] $end
-$var wire 128 k in[1][0] [127:0] $end
-$var wire 128 l in[1][1] [127:0] $end
-$var wire 128 m in[1][2] [127:0] $end
-$var wire 8 n out[0][0] [7:0] $end
-$var wire 8 o out[0][1] [7:0] $end
-$var wire 8 p out[0][2] [7:0] $end
-$var wire 8 q out[1][0] [7:0] $end
-$var wire 8 r out[1][1] [7:0] $end
-$var wire 8 s out[1][2] [7:0] $end
+$var wire 1 S clk $end
+$var wire 128 g in[0][0] [127:0] $end
+$var wire 128 h in[0][1] [127:0] $end
+$var wire 128 i in[0][2] [127:0] $end
+$var wire 128 j in[1][0] [127:0] $end
+$var wire 128 k in[1][1] [127:0] $end
+$var wire 128 l in[1][2] [127:0] $end
+$var wire 8 m out[0][0] [7:0] $end
+$var wire 8 n out[0][1] [7:0] $end
+$var wire 8 o out[0][2] [7:0] $end
+$var wire 8 p out[1][0] [7:0] $end
+$var wire 8 q out[1][1] [7:0] $end
+$var wire 8 r out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 t i [31:0] $end
+$var int 32 s i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 u j [31:0] $end
+$var int 32 t j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 v exp [7:0] $end
+$var byte 8 u exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 w clk $end
-$var wire 128 x in[0][0] [127:0] $end
-$var wire 128 y in[0][1] [127:0] $end
-$var wire 128 z in[0][2] [127:0] $end
-$var wire 128 { in[1][0] [127:0] $end
-$var wire 128 | in[1][1] [127:0] $end
-$var wire 128 } in[1][2] [127:0] $end
-$var wire 8 ~ out[0][0] [7:0] $end
-$var wire 8 !! out[0][1] [7:0] $end
-$var wire 8 "! out[0][2] [7:0] $end
-$var wire 8 #! out[1][0] [7:0] $end
-$var wire 8 $! out[1][1] [7:0] $end
-$var wire 8 %! out[1][2] [7:0] $end
+$var wire 1 v clk $end
+$var wire 128 w in[0][0] [127:0] $end
+$var wire 128 x in[0][1] [127:0] $end
+$var wire 128 y in[0][2] [127:0] $end
+$var wire 128 z in[1][0] [127:0] $end
+$var wire 128 { in[1][1] [127:0] $end
+$var wire 128 | in[1][2] [127:0] $end
+$var wire 8 } out[0][0] [7:0] $end
+$var wire 8 ~ out[0][1] [7:0] $end
+$var wire 8 !! out[0][2] [7:0] $end
+$var wire 8 "! out[1][0] [7:0] $end
+$var wire 8 #! out[1][1] [7:0] $end
+$var wire 8 $! out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 w clk $end
-$var wire 128 x in[0][0] [127:0] $end
-$var wire 128 y in[0][1] [127:0] $end
-$var wire 128 z in[0][2] [127:0] $end
-$var wire 128 { in[1][0] [127:0] $end
-$var wire 128 | in[1][1] [127:0] $end
-$var wire 128 } in[1][2] [127:0] $end
-$var wire 8 ~ out[0][0] [7:0] $end
-$var wire 8 !! out[0][1] [7:0] $end
-$var wire 8 "! out[0][2] [7:0] $end
-$var wire 8 #! out[1][0] [7:0] $end
-$var wire 8 $! out[1][1] [7:0] $end
-$var wire 8 %! out[1][2] [7:0] $end
-$var int 32 &! count [31:0] $end
-$var wire 8 '! val0[0] [7:0] $end
-$var wire 8 (! val0[1] [7:0] $end
-$var wire 8 )! val1[0] [7:0] $end
-$var wire 8 *! val1[1] [7:0] $end
-$var wire 8 +! val2[0] [7:0] $end
-$var wire 8 ,! val2[1] [7:0] $end
-$var wire 8 -! val3[0] [7:0] $end
-$var wire 8 .! val3[1] [7:0] $end
+$var wire 1 v clk $end
+$var wire 128 w in[0][0] [127:0] $end
+$var wire 128 x in[0][1] [127:0] $end
+$var wire 128 y in[0][2] [127:0] $end
+$var wire 128 z in[1][0] [127:0] $end
+$var wire 128 { in[1][1] [127:0] $end
+$var wire 128 | in[1][2] [127:0] $end
+$var wire 8 } out[0][0] [7:0] $end
+$var wire 8 ~ out[0][1] [7:0] $end
+$var wire 8 !! out[0][2] [7:0] $end
+$var wire 8 "! out[1][0] [7:0] $end
+$var wire 8 #! out[1][1] [7:0] $end
+$var wire 8 $! out[1][2] [7:0] $end
+$var int 32 %! count [31:0] $end
+$var wire 8 &! val0[0] [7:0] $end
+$var wire 8 '! val0[1] [7:0] $end
+$var wire 8 (! val1[0] [7:0] $end
+$var wire 8 )! val1[1] [7:0] $end
+$var wire 8 *! val2[0] [7:0] $end
+$var wire 8 +! val2[1] [7:0] $end
+$var wire 8 ,! val3[0] [7:0] $end
+$var wire 8 -! val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 1! out[0] [7:0] $end
-$var wire 8 2! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 &! out[0] [7:0] $end
+$var wire 8 '! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 3! out[0] [7:0] $end
-$var wire 8 4! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 (! out[0] [7:0] $end
+$var wire 8 )! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 /! P0 [31:0] $end
-$var parameter 32 0! P1 [31:0] $end
-$var wire 8 5! out[0] [7:0] $end
-$var wire 8 6! out[1] [7:0] $end
+$var parameter 32 .! P0 [31:0] $end
+$var parameter 32 /! P1 [31:0] $end
+$var wire 8 *! out[0] [7:0] $end
+$var wire 8 +! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 7! out[0] [7:0] $end
-$var wire 8 8! out[1] [7:0] $end
+$var wire 8 0! out[0] [7:0] $end
+$var wire 8 1! out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 9! i [31:0] $end
+$var int 32 2! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 :! j [31:0] $end
+$var int 32 3! j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 ;! exp [127:0] $end
+$var bit 128 4! exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 <! out[0] [7:0] $end
-$var wire 8 =! out[1] [7:0] $end
+$var wire 8 5! out[0] [7:0] $end
+$var wire 8 6! out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 >! P0 [31:0] $end
-$var parameter 32 ?! P1 [31:0] $end
-$var wire 8 <! out[0] [7:0] $end
-$var wire 8 =! out[1] [7:0] $end
+$var parameter 32 7! P0 [31:0] $end
+$var parameter 32 8! P1 [31:0] $end
+$var wire 8 5! out[0] [7:0] $end
+$var wire 8 6! out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1 $end
-$var wire 1 @! clk $end
-$var wire 8 A! in [7:0] $end
-$var wire 8 B! out [7:0] $end
+$var wire 1 9! clk $end
+$var wire 8 :! in [7:0] $end
+$var wire 8 ;! out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 C! P0 [31:0] $end
-$var real_parameter 64 D! P1 $end
-$var real_parameter 64 E! P3 $end
-$var wire 1 @! clk $end
-$var wire 8 A! in [7:0] $end
-$var wire 8 B! out [7:0] $end
-$var logic 8 F! ff [7:0] $end
-$var logic 128 G! sub5_in[0][0] [127:0] $end
-$var logic 128 H! sub5_in[0][1] [127:0] $end
-$var logic 128 I! sub5_in[0][2] [127:0] $end
-$var logic 128 J! sub5_in[1][0] [127:0] $end
-$var logic 128 K! sub5_in[1][1] [127:0] $end
-$var logic 128 L! sub5_in[1][2] [127:0] $end
-$var wire 8 M! sub5_out[0][0] [7:0] $end
-$var wire 8 N! sub5_out[0][1] [7:0] $end
-$var wire 8 O! sub5_out[0][2] [7:0] $end
-$var wire 8 P! sub5_out[1][0] [7:0] $end
-$var wire 8 Q! sub5_out[1][1] [7:0] $end
-$var wire 8 R! sub5_out[1][2] [7:0] $end
-$var int 32 S! count [31:0] $end
+$var parameter 32 <! P0 [31:0] $end
+$var real_parameter 64 =! P1 $end
+$var real_parameter 64 >! P3 $end
+$var wire 1 9! clk $end
+$var wire 8 :! in [7:0] $end
+$var wire 8 ;! out [7:0] $end
+$var logic 8 ?! ff [7:0] $end
+$var logic 128 @! sub5_in[0][0] [127:0] $end
+$var logic 128 A! sub5_in[0][1] [127:0] $end
+$var logic 128 B! sub5_in[0][2] [127:0] $end
+$var logic 128 C! sub5_in[1][0] [127:0] $end
+$var logic 128 D! sub5_in[1][1] [127:0] $end
+$var logic 128 E! sub5_in[1][2] [127:0] $end
+$var wire 8 F! sub5_out[0][0] [7:0] $end
+$var wire 8 G! sub5_out[0][1] [7:0] $end
+$var wire 8 H! sub5_out[0][2] [7:0] $end
+$var wire 8 I! sub5_out[1][0] [7:0] $end
+$var wire 8 J! sub5_out[1][1] [7:0] $end
+$var wire 8 K! sub5_out[1][2] [7:0] $end
+$var int 32 L! count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 @! clk $end
-$var wire 128 T! in[0][0] [127:0] $end
-$var wire 128 U! in[0][1] [127:0] $end
-$var wire 128 V! in[0][2] [127:0] $end
-$var wire 128 W! in[1][0] [127:0] $end
-$var wire 128 X! in[1][1] [127:0] $end
-$var wire 128 Y! in[1][2] [127:0] $end
-$var wire 8 Z! out[0][0] [7:0] $end
-$var wire 8 [! out[0][1] [7:0] $end
-$var wire 8 \! out[0][2] [7:0] $end
-$var wire 8 ]! out[1][0] [7:0] $end
-$var wire 8 ^! out[1][1] [7:0] $end
-$var wire 8 _! out[1][2] [7:0] $end
+$var wire 1 9! clk $end
+$var wire 128 M! in[0][0] [127:0] $end
+$var wire 128 N! in[0][1] [127:0] $end
+$var wire 128 O! in[0][2] [127:0] $end
+$var wire 128 P! in[1][0] [127:0] $end
+$var wire 128 Q! in[1][1] [127:0] $end
+$var wire 128 R! in[1][2] [127:0] $end
+$var wire 8 S! out[0][0] [7:0] $end
+$var wire 8 T! out[0][1] [7:0] $end
+$var wire 8 U! out[0][2] [7:0] $end
+$var wire 8 V! out[1][0] [7:0] $end
+$var wire 8 W! out[1][1] [7:0] $end
+$var wire 8 X! out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 `! i [31:0] $end
+$var int 32 Y! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 a! j [31:0] $end
+$var int 32 Z! j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 b! exp [7:0] $end
+$var byte 8 [! exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 c! clk $end
-$var wire 128 d! in[0][0] [127:0] $end
-$var wire 128 e! in[0][1] [127:0] $end
-$var wire 128 f! in[0][2] [127:0] $end
-$var wire 128 g! in[1][0] [127:0] $end
-$var wire 128 h! in[1][1] [127:0] $end
-$var wire 128 i! in[1][2] [127:0] $end
-$var wire 8 j! out[0][0] [7:0] $end
-$var wire 8 k! out[0][1] [7:0] $end
-$var wire 8 l! out[0][2] [7:0] $end
-$var wire 8 m! out[1][0] [7:0] $end
-$var wire 8 n! out[1][1] [7:0] $end
-$var wire 8 o! out[1][2] [7:0] $end
+$var wire 1 \! clk $end
+$var wire 128 ]! in[0][0] [127:0] $end
+$var wire 128 ^! in[0][1] [127:0] $end
+$var wire 128 _! in[0][2] [127:0] $end
+$var wire 128 `! in[1][0] [127:0] $end
+$var wire 128 a! in[1][1] [127:0] $end
+$var wire 128 b! in[1][2] [127:0] $end
+$var wire 8 c! out[0][0] [7:0] $end
+$var wire 8 d! out[0][1] [7:0] $end
+$var wire 8 e! out[0][2] [7:0] $end
+$var wire 8 f! out[1][0] [7:0] $end
+$var wire 8 g! out[1][1] [7:0] $end
+$var wire 8 h! out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 c! clk $end
-$var wire 128 d! in[0][0] [127:0] $end
-$var wire 128 e! in[0][1] [127:0] $end
-$var wire 128 f! in[0][2] [127:0] $end
-$var wire 128 g! in[1][0] [127:0] $end
-$var wire 128 h! in[1][1] [127:0] $end
-$var wire 128 i! in[1][2] [127:0] $end
-$var wire 8 j! out[0][0] [7:0] $end
-$var wire 8 k! out[0][1] [7:0] $end
-$var wire 8 l! out[0][2] [7:0] $end
-$var wire 8 m! out[1][0] [7:0] $end
-$var wire 8 n! out[1][1] [7:0] $end
-$var wire 8 o! out[1][2] [7:0] $end
-$var int 32 p! count [31:0] $end
-$var wire 8 q! val0[0] [7:0] $end
-$var wire 8 r! val0[1] [7:0] $end
-$var wire 8 s! val1[0] [7:0] $end
-$var wire 8 t! val1[1] [7:0] $end
-$var wire 8 u! val2[0] [7:0] $end
-$var wire 8 v! val2[1] [7:0] $end
-$var wire 8 w! val3[0] [7:0] $end
-$var wire 8 x! val3[1] [7:0] $end
+$var wire 1 \! clk $end
+$var wire 128 ]! in[0][0] [127:0] $end
+$var wire 128 ^! in[0][1] [127:0] $end
+$var wire 128 _! in[0][2] [127:0] $end
+$var wire 128 `! in[1][0] [127:0] $end
+$var wire 128 a! in[1][1] [127:0] $end
+$var wire 128 b! in[1][2] [127:0] $end
+$var wire 8 c! out[0][0] [7:0] $end
+$var wire 8 d! out[0][1] [7:0] $end
+$var wire 8 e! out[0][2] [7:0] $end
+$var wire 8 f! out[1][0] [7:0] $end
+$var wire 8 g! out[1][1] [7:0] $end
+$var wire 8 h! out[1][2] [7:0] $end
+$var int 32 i! count [31:0] $end
+$var wire 8 j! val0[0] [7:0] $end
+$var wire 8 k! val0[1] [7:0] $end
+$var wire 8 l! val1[0] [7:0] $end
+$var wire 8 m! val1[1] [7:0] $end
+$var wire 8 n! val2[0] [7:0] $end
+$var wire 8 o! val2[1] [7:0] $end
+$var wire 8 p! val3[0] [7:0] $end
+$var wire 8 q! val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 {! out[0] [7:0] $end
-$var wire 8 |! out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 j! out[0] [7:0] $end
+$var wire 8 k! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 }! out[0] [7:0] $end
-$var wire 8 ~! out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 l! out[0] [7:0] $end
+$var wire 8 m! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 y! P0 [31:0] $end
-$var parameter 32 z! P1 [31:0] $end
-$var wire 8 !" out[0] [7:0] $end
-$var wire 8 "" out[1] [7:0] $end
+$var parameter 32 r! P0 [31:0] $end
+$var parameter 32 s! P1 [31:0] $end
+$var wire 8 n! out[0] [7:0] $end
+$var wire 8 o! out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 #" out[0] [7:0] $end
-$var wire 8 $" out[1] [7:0] $end
+$var wire 8 t! out[0] [7:0] $end
+$var wire 8 u! out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 %" i [31:0] $end
+$var int 32 v! i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 &" j [31:0] $end
+$var int 32 w! j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 '" exp [127:0] $end
+$var bit 128 x! exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-$var wire 8 (" out[0] [7:0] $end
-$var wire 8 )" out[1] [7:0] $end
+$var wire 8 y! out[0] [7:0] $end
+$var wire 8 z! out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 *" P0 [31:0] $end
-$var parameter 32 +" P1 [31:0] $end
-$var wire 8 (" out[0] [7:0] $end
-$var wire 8 )" out[1] [7:0] $end
+$var parameter 32 {! P0 [31:0] $end
+$var parameter 32 |! P1 [31:0] $end
+$var wire 8 y! out[0] [7:0] $end
+$var wire 8 z! out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2 $end
-$var wire 1 ," clk $end
-$var wire 8 -" in [7:0] $end
-$var wire 8 ." out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 ~! in [7:0] $end
+$var wire 8 !" out [7:0] $end
 $scope module sub3_2 $end
-$var parameter 8 /" P0 [7:0] $end
-$var parameter 32 0" UNPACKED_ARRAY[0] [31:0] $end
-$var parameter 32 1" UNPACKED_ARRAY[1] [31:0] $end
-$var parameter 16 2" UNUSED [15:0] $end
-$var wire 1 ," clk $end
-$var wire 8 -" in [7:0] $end
-$var wire 8 ." out [7:0] $end
-$var logic 8 3" ff [7:0] $end
-$var wire 8 4" out4 [7:0] $end
-$var wire 8 5" out4_2 [7:0] $end
+$var parameter 8 "" P0 [7:0] $end
+$var parameter 32 #" UNPACKED_ARRAY[0] [31:0] $end
+$var parameter 32 $" UNPACKED_ARRAY[1] [31:0] $end
+$var parameter 16 %" UNUSED [15:0] $end
+$var wire 1 }! clk $end
+$var wire 8 ~! in [7:0] $end
+$var wire 8 !" out [7:0] $end
+$var logic 8 &" ff [7:0] $end
+$var wire 8 !" out4 [7:0] $end
+$var wire 8 '" out4_2 [7:0] $end
 $scope module i_sub4_0 $end
-$var wire 1 ," clk $end
-$var wire 8 3" in [7:0] $end
-$var wire 8 4" out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 &" in [7:0] $end
+$var wire 8 !" out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
-$var wire 1 ," clk $end
-$var wire 8 3" in [7:0] $end
-$var wire 8 5" out [7:0] $end
+$var wire 1 }! clk $end
+$var wire 8 &" in [7:0] $end
+$var wire 8 '" out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0 $end
-$var wire 1 6" clk $end
-$var wire 8 7" in [7:0] $end
-$var wire 8 8" out [7:0] $end
+$var wire 1 (" clk $end
+$var wire 8 )" in [7:0] $end
+$var wire 8 *" out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 9" P0 [31:0] $end
-$var real_parameter 64 :" P1 $end
-$var real_parameter 64 ;" P3 $end
-$var wire 1 6" clk $end
-$var wire 8 7" in [7:0] $end
-$var wire 8 8" out [7:0] $end
-$var logic 8 <" ff [7:0] $end
-$var logic 128 =" sub5_in[0][0] [127:0] $end
-$var logic 128 >" sub5_in[0][1] [127:0] $end
-$var logic 128 ?" sub5_in[0][2] [127:0] $end
-$var logic 128 @" sub5_in[1][0] [127:0] $end
-$var logic 128 A" sub5_in[1][1] [127:0] $end
-$var logic 128 B" sub5_in[1][2] [127:0] $end
-$var wire 8 C" sub5_out[0][0] [7:0] $end
-$var wire 8 D" sub5_out[0][1] [7:0] $end
-$var wire 8 E" sub5_out[0][2] [7:0] $end
-$var wire 8 F" sub5_out[1][0] [7:0] $end
-$var wire 8 G" sub5_out[1][1] [7:0] $end
-$var wire 8 H" sub5_out[1][2] [7:0] $end
-$var int 32 I" count [31:0] $end
+$var parameter 32 +" P0 [31:0] $end
+$var real_parameter 64 ," P1 $end
+$var real_parameter 64 -" P3 $end
+$var wire 1 (" clk $end
+$var wire 8 )" in [7:0] $end
+$var wire 8 *" out [7:0] $end
+$var logic 8 ." ff [7:0] $end
+$var logic 128 /" sub5_in[0][0] [127:0] $end
+$var logic 128 0" sub5_in[0][1] [127:0] $end
+$var logic 128 1" sub5_in[0][2] [127:0] $end
+$var logic 128 2" sub5_in[1][0] [127:0] $end
+$var logic 128 3" sub5_in[1][1] [127:0] $end
+$var logic 128 4" sub5_in[1][2] [127:0] $end
+$var wire 8 5" sub5_out[0][0] [7:0] $end
+$var wire 8 6" sub5_out[0][1] [7:0] $end
+$var wire 8 7" sub5_out[0][2] [7:0] $end
+$var wire 8 8" sub5_out[1][0] [7:0] $end
+$var wire 8 9" sub5_out[1][1] [7:0] $end
+$var wire 8 :" sub5_out[1][2] [7:0] $end
+$var int 32 ;" count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 6" clk $end
-$var wire 128 J" in[0][0] [127:0] $end
-$var wire 128 K" in[0][1] [127:0] $end
-$var wire 128 L" in[0][2] [127:0] $end
-$var wire 128 M" in[1][0] [127:0] $end
-$var wire 128 N" in[1][1] [127:0] $end
-$var wire 128 O" in[1][2] [127:0] $end
-$var wire 8 P" out[0][0] [7:0] $end
-$var wire 8 Q" out[0][1] [7:0] $end
-$var wire 8 R" out[0][2] [7:0] $end
-$var wire 8 S" out[1][0] [7:0] $end
-$var wire 8 T" out[1][1] [7:0] $end
-$var wire 8 U" out[1][2] [7:0] $end
+$var wire 1 (" clk $end
+$var wire 128 <" in[0][0] [127:0] $end
+$var wire 128 =" in[0][1] [127:0] $end
+$var wire 128 >" in[0][2] [127:0] $end
+$var wire 128 ?" in[1][0] [127:0] $end
+$var wire 128 @" in[1][1] [127:0] $end
+$var wire 128 A" in[1][2] [127:0] $end
+$var wire 8 B" out[0][0] [7:0] $end
+$var wire 8 C" out[0][1] [7:0] $end
+$var wire 8 D" out[0][2] [7:0] $end
+$var wire 8 E" out[1][0] [7:0] $end
+$var wire 8 F" out[1][1] [7:0] $end
+$var wire 8 G" out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 V" i [31:0] $end
+$var int 32 H" i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 W" j [31:0] $end
+$var int 32 I" j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 X" exp [7:0] $end
+$var byte 8 J" exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 Y" clk $end
-$var wire 128 Z" in[0][0] [127:0] $end
-$var wire 128 [" in[0][1] [127:0] $end
-$var wire 128 \" in[0][2] [127:0] $end
-$var wire 128 ]" in[1][0] [127:0] $end
-$var wire 128 ^" in[1][1] [127:0] $end
-$var wire 128 _" in[1][2] [127:0] $end
-$var wire 8 `" out[0][0] [7:0] $end
-$var wire 8 a" out[0][1] [7:0] $end
-$var wire 8 b" out[0][2] [7:0] $end
-$var wire 8 c" out[1][0] [7:0] $end
-$var wire 8 d" out[1][1] [7:0] $end
-$var wire 8 e" out[1][2] [7:0] $end
+$var wire 1 K" clk $end
+$var wire 128 L" in[0][0] [127:0] $end
+$var wire 128 M" in[0][1] [127:0] $end
+$var wire 128 N" in[0][2] [127:0] $end
+$var wire 128 O" in[1][0] [127:0] $end
+$var wire 128 P" in[1][1] [127:0] $end
+$var wire 128 Q" in[1][2] [127:0] $end
+$var wire 8 R" out[0][0] [7:0] $end
+$var wire 8 S" out[0][1] [7:0] $end
+$var wire 8 T" out[0][2] [7:0] $end
+$var wire 8 U" out[1][0] [7:0] $end
+$var wire 8 V" out[1][1] [7:0] $end
+$var wire 8 W" out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 Y" clk $end
-$var wire 128 Z" in[0][0] [127:0] $end
-$var wire 128 [" in[0][1] [127:0] $end
-$var wire 128 \" in[0][2] [127:0] $end
-$var wire 128 ]" in[1][0] [127:0] $end
-$var wire 128 ^" in[1][1] [127:0] $end
-$var wire 128 _" in[1][2] [127:0] $end
-$var wire 8 `" out[0][0] [7:0] $end
-$var wire 8 a" out[0][1] [7:0] $end
-$var wire 8 b" out[0][2] [7:0] $end
-$var wire 8 c" out[1][0] [7:0] $end
-$var wire 8 d" out[1][1] [7:0] $end
-$var wire 8 e" out[1][2] [7:0] $end
-$var int 32 f" count [31:0] $end
-$var wire 8 g" val0[0] [7:0] $end
-$var wire 8 h" val0[1] [7:0] $end
-$var wire 8 i" val1[0] [7:0] $end
-$var wire 8 j" val1[1] [7:0] $end
-$var wire 8 k" val2[0] [7:0] $end
-$var wire 8 l" val2[1] [7:0] $end
-$var wire 8 m" val3[0] [7:0] $end
-$var wire 8 n" val3[1] [7:0] $end
+$var wire 1 K" clk $end
+$var wire 128 L" in[0][0] [127:0] $end
+$var wire 128 M" in[0][1] [127:0] $end
+$var wire 128 N" in[0][2] [127:0] $end
+$var wire 128 O" in[1][0] [127:0] $end
+$var wire 128 P" in[1][1] [127:0] $end
+$var wire 128 Q" in[1][2] [127:0] $end
+$var wire 8 R" out[0][0] [7:0] $end
+$var wire 8 S" out[0][1] [7:0] $end
+$var wire 8 T" out[0][2] [7:0] $end
+$var wire 8 U" out[1][0] [7:0] $end
+$var wire 8 V" out[1][1] [7:0] $end
+$var wire 8 W" out[1][2] [7:0] $end
+$var int 32 X" count [31:0] $end
+$var wire 8 Y" val0[0] [7:0] $end
+$var wire 8 Z" val0[1] [7:0] $end
+$var wire 8 [" val1[0] [7:0] $end
+$var wire 8 \" val1[1] [7:0] $end
+$var wire 8 ]" val2[0] [7:0] $end
+$var wire 8 ^" val2[1] [7:0] $end
+$var wire 8 _" val3[0] [7:0] $end
+$var wire 8 `" val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 q" out[0] [7:0] $end
-$var wire 8 r" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 Y" out[0] [7:0] $end
+$var wire 8 Z" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 s" out[0] [7:0] $end
-$var wire 8 t" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 [" out[0] [7:0] $end
+$var wire 8 \" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 o" P0 [31:0] $end
-$var parameter 32 p" P1 [31:0] $end
-$var wire 8 u" out[0] [7:0] $end
-$var wire 8 v" out[1] [7:0] $end
+$var parameter 32 a" P0 [31:0] $end
+$var parameter 32 b" P1 [31:0] $end
+$var wire 8 ]" out[0] [7:0] $end
+$var wire 8 ^" out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 w" out[0] [7:0] $end
-$var wire 8 x" out[1] [7:0] $end
+$var wire 8 c" out[0] [7:0] $end
+$var wire 8 d" out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 y" i [31:0] $end
+$var int 32 e" i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 z" j [31:0] $end
+$var int 32 f" j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 {" exp [127:0] $end
+$var bit 128 g" exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 |" out[0] [7:0] $end
-$var wire 8 }" out[1] [7:0] $end
+$var wire 8 h" out[0] [7:0] $end
+$var wire 8 i" out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 ~" P0 [31:0] $end
-$var parameter 32 !# P1 [31:0] $end
-$var wire 8 |" out[0] [7:0] $end
-$var wire 8 }" out[1] [7:0] $end
+$var parameter 32 j" P0 [31:0] $end
+$var parameter 32 k" P1 [31:0] $end
+$var wire 8 h" out[0] [7:0] $end
+$var wire 8 i" out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1 $end
-$var wire 1 "# clk $end
-$var wire 8 ## in [7:0] $end
-$var wire 8 $# out [7:0] $end
+$var wire 1 l" clk $end
+$var wire 8 m" in [7:0] $end
+$var wire 8 n" out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 %# P0 [31:0] $end
-$var real_parameter 64 &# P1 $end
-$var real_parameter 64 '# P3 $end
-$var wire 1 "# clk $end
-$var wire 8 ## in [7:0] $end
-$var wire 8 $# out [7:0] $end
-$var logic 8 (# ff [7:0] $end
-$var logic 128 )# sub5_in[0][0] [127:0] $end
-$var logic 128 *# sub5_in[0][1] [127:0] $end
-$var logic 128 +# sub5_in[0][2] [127:0] $end
-$var logic 128 ,# sub5_in[1][0] [127:0] $end
-$var logic 128 -# sub5_in[1][1] [127:0] $end
-$var logic 128 .# sub5_in[1][2] [127:0] $end
-$var wire 8 /# sub5_out[0][0] [7:0] $end
-$var wire 8 0# sub5_out[0][1] [7:0] $end
-$var wire 8 1# sub5_out[0][2] [7:0] $end
-$var wire 8 2# sub5_out[1][0] [7:0] $end
-$var wire 8 3# sub5_out[1][1] [7:0] $end
-$var wire 8 4# sub5_out[1][2] [7:0] $end
-$var int 32 5# count [31:0] $end
+$var parameter 32 o" P0 [31:0] $end
+$var real_parameter 64 p" P1 $end
+$var real_parameter 64 q" P3 $end
+$var wire 1 l" clk $end
+$var wire 8 m" in [7:0] $end
+$var wire 8 n" out [7:0] $end
+$var logic 8 r" ff [7:0] $end
+$var logic 128 s" sub5_in[0][0] [127:0] $end
+$var logic 128 t" sub5_in[0][1] [127:0] $end
+$var logic 128 u" sub5_in[0][2] [127:0] $end
+$var logic 128 v" sub5_in[1][0] [127:0] $end
+$var logic 128 w" sub5_in[1][1] [127:0] $end
+$var logic 128 x" sub5_in[1][2] [127:0] $end
+$var wire 8 y" sub5_out[0][0] [7:0] $end
+$var wire 8 z" sub5_out[0][1] [7:0] $end
+$var wire 8 {" sub5_out[0][2] [7:0] $end
+$var wire 8 |" sub5_out[1][0] [7:0] $end
+$var wire 8 }" sub5_out[1][1] [7:0] $end
+$var wire 8 ~" sub5_out[1][2] [7:0] $end
+$var int 32 !# count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 "# clk $end
-$var wire 128 6# in[0][0] [127:0] $end
-$var wire 128 7# in[0][1] [127:0] $end
-$var wire 128 8# in[0][2] [127:0] $end
-$var wire 128 9# in[1][0] [127:0] $end
-$var wire 128 :# in[1][1] [127:0] $end
-$var wire 128 ;# in[1][2] [127:0] $end
-$var wire 8 <# out[0][0] [7:0] $end
-$var wire 8 =# out[0][1] [7:0] $end
-$var wire 8 ># out[0][2] [7:0] $end
-$var wire 8 ?# out[1][0] [7:0] $end
-$var wire 8 @# out[1][1] [7:0] $end
-$var wire 8 A# out[1][2] [7:0] $end
+$var wire 1 l" clk $end
+$var wire 128 "# in[0][0] [127:0] $end
+$var wire 128 ## in[0][1] [127:0] $end
+$var wire 128 $# in[0][2] [127:0] $end
+$var wire 128 %# in[1][0] [127:0] $end
+$var wire 128 &# in[1][1] [127:0] $end
+$var wire 128 '# in[1][2] [127:0] $end
+$var wire 8 (# out[0][0] [7:0] $end
+$var wire 8 )# out[0][1] [7:0] $end
+$var wire 8 *# out[0][2] [7:0] $end
+$var wire 8 +# out[1][0] [7:0] $end
+$var wire 8 ,# out[1][1] [7:0] $end
+$var wire 8 -# out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 B# i [31:0] $end
+$var int 32 .# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 C# j [31:0] $end
+$var int 32 /# j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 D# exp [7:0] $end
+$var byte 8 0# exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 E# clk $end
-$var wire 128 F# in[0][0] [127:0] $end
-$var wire 128 G# in[0][1] [127:0] $end
-$var wire 128 H# in[0][2] [127:0] $end
-$var wire 128 I# in[1][0] [127:0] $end
-$var wire 128 J# in[1][1] [127:0] $end
-$var wire 128 K# in[1][2] [127:0] $end
-$var wire 8 L# out[0][0] [7:0] $end
-$var wire 8 M# out[0][1] [7:0] $end
-$var wire 8 N# out[0][2] [7:0] $end
-$var wire 8 O# out[1][0] [7:0] $end
-$var wire 8 P# out[1][1] [7:0] $end
-$var wire 8 Q# out[1][2] [7:0] $end
+$var wire 1 1# clk $end
+$var wire 128 2# in[0][0] [127:0] $end
+$var wire 128 3# in[0][1] [127:0] $end
+$var wire 128 4# in[0][2] [127:0] $end
+$var wire 128 5# in[1][0] [127:0] $end
+$var wire 128 6# in[1][1] [127:0] $end
+$var wire 128 7# in[1][2] [127:0] $end
+$var wire 8 8# out[0][0] [7:0] $end
+$var wire 8 9# out[0][1] [7:0] $end
+$var wire 8 :# out[0][2] [7:0] $end
+$var wire 8 ;# out[1][0] [7:0] $end
+$var wire 8 <# out[1][1] [7:0] $end
+$var wire 8 =# out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 E# clk $end
-$var wire 128 F# in[0][0] [127:0] $end
-$var wire 128 G# in[0][1] [127:0] $end
-$var wire 128 H# in[0][2] [127:0] $end
-$var wire 128 I# in[1][0] [127:0] $end
-$var wire 128 J# in[1][1] [127:0] $end
-$var wire 128 K# in[1][2] [127:0] $end
-$var wire 8 L# out[0][0] [7:0] $end
-$var wire 8 M# out[0][1] [7:0] $end
-$var wire 8 N# out[0][2] [7:0] $end
-$var wire 8 O# out[1][0] [7:0] $end
-$var wire 8 P# out[1][1] [7:0] $end
-$var wire 8 Q# out[1][2] [7:0] $end
-$var int 32 R# count [31:0] $end
-$var wire 8 S# val0[0] [7:0] $end
-$var wire 8 T# val0[1] [7:0] $end
-$var wire 8 U# val1[0] [7:0] $end
-$var wire 8 V# val1[1] [7:0] $end
-$var wire 8 W# val2[0] [7:0] $end
-$var wire 8 X# val2[1] [7:0] $end
-$var wire 8 Y# val3[0] [7:0] $end
-$var wire 8 Z# val3[1] [7:0] $end
+$var wire 1 1# clk $end
+$var wire 128 2# in[0][0] [127:0] $end
+$var wire 128 3# in[0][1] [127:0] $end
+$var wire 128 4# in[0][2] [127:0] $end
+$var wire 128 5# in[1][0] [127:0] $end
+$var wire 128 6# in[1][1] [127:0] $end
+$var wire 128 7# in[1][2] [127:0] $end
+$var wire 8 8# out[0][0] [7:0] $end
+$var wire 8 9# out[0][1] [7:0] $end
+$var wire 8 :# out[0][2] [7:0] $end
+$var wire 8 ;# out[1][0] [7:0] $end
+$var wire 8 <# out[1][1] [7:0] $end
+$var wire 8 =# out[1][2] [7:0] $end
+$var int 32 ># count [31:0] $end
+$var wire 8 ?# val0[0] [7:0] $end
+$var wire 8 @# val0[1] [7:0] $end
+$var wire 8 A# val1[0] [7:0] $end
+$var wire 8 B# val1[1] [7:0] $end
+$var wire 8 C# val2[0] [7:0] $end
+$var wire 8 D# val2[1] [7:0] $end
+$var wire 8 E# val3[0] [7:0] $end
+$var wire 8 F# val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 ]# out[0] [7:0] $end
-$var wire 8 ^# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 ?# out[0] [7:0] $end
+$var wire 8 @# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 _# out[0] [7:0] $end
-$var wire 8 `# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 A# out[0] [7:0] $end
+$var wire 8 B# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 [# P0 [31:0] $end
-$var parameter 32 \# P1 [31:0] $end
-$var wire 8 a# out[0] [7:0] $end
-$var wire 8 b# out[1] [7:0] $end
+$var parameter 32 G# P0 [31:0] $end
+$var parameter 32 H# P1 [31:0] $end
+$var wire 8 C# out[0] [7:0] $end
+$var wire 8 D# out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 c# out[0] [7:0] $end
-$var wire 8 d# out[1] [7:0] $end
+$var wire 8 I# out[0] [7:0] $end
+$var wire 8 J# out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 e# i [31:0] $end
+$var int 32 K# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 f# j [31:0] $end
+$var int 32 L# j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 g# exp [127:0] $end
+$var bit 128 M# exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-$var wire 8 h# out[0] [7:0] $end
-$var wire 8 i# out[1] [7:0] $end
+$var wire 8 N# out[0] [7:0] $end
+$var wire 8 O# out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 j# P0 [31:0] $end
-$var parameter 32 k# P1 [31:0] $end
-$var wire 8 h# out[0] [7:0] $end
-$var wire 8 i# out[1] [7:0] $end
+$var parameter 32 P# P0 [31:0] $end
+$var parameter 32 Q# P1 [31:0] $end
+$var wire 8 N# out[0] [7:0] $end
+$var wire 8 O# out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3 $end
-$var wire 1 l# clk $end
-$var wire 8 m# in [7:0] $end
-$var wire 8 n# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 S# in [7:0] $end
+$var wire 8 T# out [7:0] $end
 $scope module sub3_d $end
-$var parameter 8 o# P0 [7:0] $end
-$var parameter 32 p# UNPACKED_ARRAY[0] [31:0] $end
-$var parameter 32 q# UNPACKED_ARRAY[1] [31:0] $end
-$var parameter 16 r# UNUSED [15:0] $end
-$var wire 1 l# clk $end
-$var wire 8 m# in [7:0] $end
-$var wire 8 n# out [7:0] $end
-$var logic 8 s# ff [7:0] $end
-$var wire 8 t# out4 [7:0] $end
-$var wire 8 u# out4_2 [7:0] $end
+$var parameter 8 U# P0 [7:0] $end
+$var parameter 32 V# UNPACKED_ARRAY[0] [31:0] $end
+$var parameter 32 W# UNPACKED_ARRAY[1] [31:0] $end
+$var parameter 16 X# UNUSED [15:0] $end
+$var wire 1 R# clk $end
+$var wire 8 S# in [7:0] $end
+$var wire 8 T# out [7:0] $end
+$var logic 8 Y# ff [7:0] $end
+$var wire 8 T# out4 [7:0] $end
+$var wire 8 Z# out4_2 [7:0] $end
 $scope module i_sub4_0 $end
-$var wire 1 l# clk $end
-$var wire 8 s# in [7:0] $end
-$var wire 8 t# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 Y# in [7:0] $end
+$var wire 8 T# out [7:0] $end
 $upscope $end
 $scope module i_sub4_1 $end
-$var wire 1 l# clk $end
-$var wire 8 s# in [7:0] $end
-$var wire 8 u# out [7:0] $end
+$var wire 1 R# clk $end
+$var wire 8 Y# in [7:0] $end
+$var wire 8 Z# out [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
-$var wire 1 v# clk $end
-$var wire 8 w# in [7:0] $end
-$var wire 8 x# out [7:0] $end
+$var wire 1 [# clk $end
+$var wire 8 \# in [7:0] $end
+$var wire 8 ]# out [7:0] $end
 $scope module sub4_2 $end
-$var parameter 32 y# P0 [31:0] $end
-$var real_parameter 64 z# P1 $end
-$var real_parameter 64 {# P3 $end
-$var wire 1 v# clk $end
-$var wire 8 w# in [7:0] $end
-$var wire 8 x# out [7:0] $end
-$var logic 8 |# ff [7:0] $end
-$var logic 128 }# sub5_in[0][0] [127:0] $end
-$var logic 128 ~# sub5_in[0][1] [127:0] $end
-$var logic 128 !$ sub5_in[0][2] [127:0] $end
-$var logic 128 "$ sub5_in[1][0] [127:0] $end
-$var logic 128 #$ sub5_in[1][1] [127:0] $end
-$var logic 128 $$ sub5_in[1][2] [127:0] $end
-$var wire 8 %$ sub5_out[0][0] [7:0] $end
-$var wire 8 &$ sub5_out[0][1] [7:0] $end
-$var wire 8 '$ sub5_out[0][2] [7:0] $end
-$var wire 8 ($ sub5_out[1][0] [7:0] $end
-$var wire 8 )$ sub5_out[1][1] [7:0] $end
-$var wire 8 *$ sub5_out[1][2] [7:0] $end
-$var int 32 +$ count [31:0] $end
+$var parameter 32 ^# P0 [31:0] $end
+$var real_parameter 64 _# P1 $end
+$var real_parameter 64 `# P3 $end
+$var wire 1 [# clk $end
+$var wire 8 \# in [7:0] $end
+$var wire 8 ]# out [7:0] $end
+$var logic 8 a# ff [7:0] $end
+$var logic 128 b# sub5_in[0][0] [127:0] $end
+$var logic 128 c# sub5_in[0][1] [127:0] $end
+$var logic 128 d# sub5_in[0][2] [127:0] $end
+$var logic 128 e# sub5_in[1][0] [127:0] $end
+$var logic 128 f# sub5_in[1][1] [127:0] $end
+$var logic 128 g# sub5_in[1][2] [127:0] $end
+$var wire 8 h# sub5_out[0][0] [7:0] $end
+$var wire 8 i# sub5_out[0][1] [7:0] $end
+$var wire 8 j# sub5_out[0][2] [7:0] $end
+$var wire 8 k# sub5_out[1][0] [7:0] $end
+$var wire 8 l# sub5_out[1][1] [7:0] $end
+$var wire 8 m# sub5_out[1][2] [7:0] $end
+$var int 32 n# count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 v# clk $end
-$var wire 128 ,$ in[0][0] [127:0] $end
-$var wire 128 -$ in[0][1] [127:0] $end
-$var wire 128 .$ in[0][2] [127:0] $end
-$var wire 128 /$ in[1][0] [127:0] $end
-$var wire 128 0$ in[1][1] [127:0] $end
-$var wire 128 1$ in[1][2] [127:0] $end
-$var wire 8 2$ out[0][0] [7:0] $end
-$var wire 8 3$ out[0][1] [7:0] $end
-$var wire 8 4$ out[0][2] [7:0] $end
-$var wire 8 5$ out[1][0] [7:0] $end
-$var wire 8 6$ out[1][1] [7:0] $end
-$var wire 8 7$ out[1][2] [7:0] $end
+$var wire 1 [# clk $end
+$var wire 128 o# in[0][0] [127:0] $end
+$var wire 128 p# in[0][1] [127:0] $end
+$var wire 128 q# in[0][2] [127:0] $end
+$var wire 128 r# in[1][0] [127:0] $end
+$var wire 128 s# in[1][1] [127:0] $end
+$var wire 128 t# in[1][2] [127:0] $end
+$var wire 8 u# out[0][0] [7:0] $end
+$var wire 8 v# out[0][1] [7:0] $end
+$var wire 8 w# out[0][2] [7:0] $end
+$var wire 8 x# out[1][0] [7:0] $end
+$var wire 8 y# out[1][1] [7:0] $end
+$var wire 8 z# out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 8$ i [31:0] $end
+$var int 32 {# i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 9$ j [31:0] $end
+$var int 32 |# j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 :$ exp [7:0] $end
+$var byte 8 }# exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
-$var wire 1 ;$ clk $end
-$var wire 128 <$ in[0][0] [127:0] $end
-$var wire 128 =$ in[0][1] [127:0] $end
-$var wire 128 >$ in[0][2] [127:0] $end
-$var wire 128 ?$ in[1][0] [127:0] $end
-$var wire 128 @$ in[1][1] [127:0] $end
-$var wire 128 A$ in[1][2] [127:0] $end
-$var wire 8 B$ out[0][0] [7:0] $end
-$var wire 8 C$ out[0][1] [7:0] $end
-$var wire 8 D$ out[0][2] [7:0] $end
-$var wire 8 E$ out[1][0] [7:0] $end
-$var wire 8 F$ out[1][1] [7:0] $end
-$var wire 8 G$ out[1][2] [7:0] $end
+$var wire 1 ~# clk $end
+$var wire 128 !$ in[0][0] [127:0] $end
+$var wire 128 "$ in[0][1] [127:0] $end
+$var wire 128 #$ in[0][2] [127:0] $end
+$var wire 128 $$ in[1][0] [127:0] $end
+$var wire 128 %$ in[1][1] [127:0] $end
+$var wire 128 &$ in[1][2] [127:0] $end
+$var wire 8 '$ out[0][0] [7:0] $end
+$var wire 8 ($ out[0][1] [7:0] $end
+$var wire 8 )$ out[0][2] [7:0] $end
+$var wire 8 *$ out[1][0] [7:0] $end
+$var wire 8 +$ out[1][1] [7:0] $end
+$var wire 8 ,$ out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 ;$ clk $end
-$var wire 128 <$ in[0][0] [127:0] $end
-$var wire 128 =$ in[0][1] [127:0] $end
-$var wire 128 >$ in[0][2] [127:0] $end
-$var wire 128 ?$ in[1][0] [127:0] $end
-$var wire 128 @$ in[1][1] [127:0] $end
-$var wire 128 A$ in[1][2] [127:0] $end
-$var wire 8 B$ out[0][0] [7:0] $end
-$var wire 8 C$ out[0][1] [7:0] $end
-$var wire 8 D$ out[0][2] [7:0] $end
-$var wire 8 E$ out[1][0] [7:0] $end
-$var wire 8 F$ out[1][1] [7:0] $end
-$var wire 8 G$ out[1][2] [7:0] $end
-$var int 32 H$ count [31:0] $end
-$var wire 8 I$ val0[0] [7:0] $end
-$var wire 8 J$ val0[1] [7:0] $end
-$var wire 8 K$ val1[0] [7:0] $end
-$var wire 8 L$ val1[1] [7:0] $end
-$var wire 8 M$ val2[0] [7:0] $end
-$var wire 8 N$ val2[1] [7:0] $end
-$var wire 8 O$ val3[0] [7:0] $end
-$var wire 8 P$ val3[1] [7:0] $end
+$var wire 1 ~# clk $end
+$var wire 128 !$ in[0][0] [127:0] $end
+$var wire 128 "$ in[0][1] [127:0] $end
+$var wire 128 #$ in[0][2] [127:0] $end
+$var wire 128 $$ in[1][0] [127:0] $end
+$var wire 128 %$ in[1][1] [127:0] $end
+$var wire 128 &$ in[1][2] [127:0] $end
+$var wire 8 '$ out[0][0] [7:0] $end
+$var wire 8 ($ out[0][1] [7:0] $end
+$var wire 8 )$ out[0][2] [7:0] $end
+$var wire 8 *$ out[1][0] [7:0] $end
+$var wire 8 +$ out[1][1] [7:0] $end
+$var wire 8 ,$ out[1][2] [7:0] $end
+$var int 32 -$ count [31:0] $end
+$var wire 8 .$ val0[0] [7:0] $end
+$var wire 8 /$ val0[1] [7:0] $end
+$var wire 8 0$ val1[0] [7:0] $end
+$var wire 8 1$ val1[1] [7:0] $end
+$var wire 8 2$ val2[0] [7:0] $end
+$var wire 8 3$ val2[1] [7:0] $end
+$var wire 8 4$ val3[0] [7:0] $end
+$var wire 8 5$ val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 S$ out[0] [7:0] $end
-$var wire 8 T$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 .$ out[0] [7:0] $end
+$var wire 8 /$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 U$ out[0] [7:0] $end
-$var wire 8 V$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 0$ out[0] [7:0] $end
+$var wire 8 1$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 Q$ P0 [31:0] $end
-$var parameter 32 R$ P1 [31:0] $end
-$var wire 8 W$ out[0] [7:0] $end
-$var wire 8 X$ out[1] [7:0] $end
+$var parameter 32 6$ P0 [31:0] $end
+$var parameter 32 7$ P1 [31:0] $end
+$var wire 8 2$ out[0] [7:0] $end
+$var wire 8 3$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 Y$ out[0] [7:0] $end
-$var wire 8 Z$ out[1] [7:0] $end
+$var wire 8 8$ out[0] [7:0] $end
+$var wire 8 9$ out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 [$ i [31:0] $end
+$var int 32 :$ i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 \$ j [31:0] $end
+$var int 32 ;$ j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 ]$ exp [127:0] $end
+$var bit 128 <$ exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-$var wire 8 ^$ out[0] [7:0] $end
-$var wire 8 _$ out[1] [7:0] $end
+$var wire 8 =$ out[0] [7:0] $end
+$var wire 8 >$ out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 `$ P0 [31:0] $end
-$var parameter 32 a$ P1 [31:0] $end
-$var wire 8 ^$ out[0] [7:0] $end
-$var wire 8 _$ out[1] [7:0] $end
+$var parameter 32 ?$ P0 [31:0] $end
+$var parameter 32 @$ P1 [31:0] $end
+$var wire 8 =$ out[0] [7:0] $end
+$var wire 8 >$ out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
-$var wire 1 b$ clk $end
-$var wire 8 c$ in [7:0] $end
-$var wire 8 d$ out [7:0] $end
+$var wire 1 A$ clk $end
+$var wire 8 B$ in [7:0] $end
+$var wire 8 C$ out [7:0] $end
 $scope module sub4_b $end
-$var parameter 32 e$ P0 [31:0] $end
-$var real_parameter 64 f$ P1 $end
-$var real_parameter 64 g$ P3 $end
-$var wire 1 b$ clk $end
-$var wire 8 c$ in [7:0] $end
-$var wire 8 d$ out [7:0] $end
-$var logic 8 h$ ff [7:0] $end
-$var logic 128 i$ sub5_in[0][0] [127:0] $end
-$var logic 128 j$ sub5_in[0][1] [127:0] $end
-$var logic 128 k$ sub5_in[0][2] [127:0] $end
-$var logic 128 l$ sub5_in[1][0] [127:0] $end
-$var logic 128 m$ sub5_in[1][1] [127:0] $end
-$var logic 128 n$ sub5_in[1][2] [127:0] $end
-$var wire 8 o$ sub5_out[0][0] [7:0] $end
-$var wire 8 p$ sub5_out[0][1] [7:0] $end
-$var wire 8 q$ sub5_out[0][2] [7:0] $end
-$var wire 8 r$ sub5_out[1][0] [7:0] $end
-$var wire 8 s$ sub5_out[1][1] [7:0] $end
-$var wire 8 t$ sub5_out[1][2] [7:0] $end
-$var int 32 u$ count [31:0] $end
+$var parameter 32 D$ P0 [31:0] $end
+$var real_parameter 64 E$ P1 $end
+$var real_parameter 64 F$ P3 $end
+$var wire 1 A$ clk $end
+$var wire 8 B$ in [7:0] $end
+$var wire 8 C$ out [7:0] $end
+$var logic 8 G$ ff [7:0] $end
+$var logic 128 H$ sub5_in[0][0] [127:0] $end
+$var logic 128 I$ sub5_in[0][1] [127:0] $end
+$var logic 128 J$ sub5_in[0][2] [127:0] $end
+$var logic 128 K$ sub5_in[1][0] [127:0] $end
+$var logic 128 L$ sub5_in[1][1] [127:0] $end
+$var logic 128 M$ sub5_in[1][2] [127:0] $end
+$var wire 8 N$ sub5_out[0][0] [7:0] $end
+$var wire 8 O$ sub5_out[0][1] [7:0] $end
+$var wire 8 P$ sub5_out[0][2] [7:0] $end
+$var wire 8 Q$ sub5_out[1][0] [7:0] $end
+$var wire 8 R$ sub5_out[1][1] [7:0] $end
+$var wire 8 S$ sub5_out[1][2] [7:0] $end
+$var int 32 T$ count [31:0] $end
 $scope module i_sub5 $end
-$var wire 1 b$ clk $end
-$var wire 128 v$ in[0][0] [127:0] $end
-$var wire 128 w$ in[0][1] [127:0] $end
-$var wire 128 x$ in[0][2] [127:0] $end
-$var wire 128 y$ in[1][0] [127:0] $end
-$var wire 128 z$ in[1][1] [127:0] $end
-$var wire 128 {$ in[1][2] [127:0] $end
-$var wire 8 |$ out[0][0] [7:0] $end
-$var wire 8 }$ out[0][1] [7:0] $end
-$var wire 8 ~$ out[0][2] [7:0] $end
-$var wire 8 !% out[1][0] [7:0] $end
-$var wire 8 "% out[1][1] [7:0] $end
-$var wire 8 #% out[1][2] [7:0] $end
+$var wire 1 A$ clk $end
+$var wire 128 U$ in[0][0] [127:0] $end
+$var wire 128 V$ in[0][1] [127:0] $end
+$var wire 128 W$ in[0][2] [127:0] $end
+$var wire 128 X$ in[1][0] [127:0] $end
+$var wire 128 Y$ in[1][1] [127:0] $end
+$var wire 128 Z$ in[1][2] [127:0] $end
+$var wire 8 [$ out[0][0] [7:0] $end
+$var wire 8 \$ out[0][1] [7:0] $end
+$var wire 8 ]$ out[0][2] [7:0] $end
+$var wire 8 ^$ out[1][0] [7:0] $end
+$var wire 8 _$ out[1][1] [7:0] $end
+$var wire 8 `$ out[1][2] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 $% i [31:0] $end
+$var int 32 a$ i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 %% j [31:0] $end
+$var int 32 b$ j [31:0] $end
 $scope module unnamedblk3 $end
-$var byte 8 &% exp [7:0] $end
+$var byte 8 c$ exp [7:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
-$var wire 1 '% clk $end
-$var wire 128 (% in[0][0] [127:0] $end
-$var wire 128 )% in[0][1] [127:0] $end
-$var wire 128 *% in[0][2] [127:0] $end
-$var wire 128 +% in[1][0] [127:0] $end
-$var wire 128 ,% in[1][1] [127:0] $end
-$var wire 128 -% in[1][2] [127:0] $end
-$var wire 8 .% out[0][0] [7:0] $end
-$var wire 8 /% out[0][1] [7:0] $end
-$var wire 8 0% out[0][2] [7:0] $end
-$var wire 8 1% out[1][0] [7:0] $end
-$var wire 8 2% out[1][1] [7:0] $end
-$var wire 8 3% out[1][2] [7:0] $end
+$var wire 1 d$ clk $end
+$var wire 128 e$ in[0][0] [127:0] $end
+$var wire 128 f$ in[0][1] [127:0] $end
+$var wire 128 g$ in[0][2] [127:0] $end
+$var wire 128 h$ in[1][0] [127:0] $end
+$var wire 128 i$ in[1][1] [127:0] $end
+$var wire 128 j$ in[1][2] [127:0] $end
+$var wire 8 k$ out[0][0] [7:0] $end
+$var wire 8 l$ out[0][1] [7:0] $end
+$var wire 8 m$ out[0][2] [7:0] $end
+$var wire 8 n$ out[1][0] [7:0] $end
+$var wire 8 o$ out[1][1] [7:0] $end
+$var wire 8 p$ out[1][2] [7:0] $end
 $scope module sub5 $end
-$var wire 1 '% clk $end
-$var wire 128 (% in[0][0] [127:0] $end
-$var wire 128 )% in[0][1] [127:0] $end
-$var wire 128 *% in[0][2] [127:0] $end
-$var wire 128 +% in[1][0] [127:0] $end
-$var wire 128 ,% in[1][1] [127:0] $end
-$var wire 128 -% in[1][2] [127:0] $end
-$var wire 8 .% out[0][0] [7:0] $end
-$var wire 8 /% out[0][1] [7:0] $end
-$var wire 8 0% out[0][2] [7:0] $end
-$var wire 8 1% out[1][0] [7:0] $end
-$var wire 8 2% out[1][1] [7:0] $end
-$var wire 8 3% out[1][2] [7:0] $end
-$var int 32 4% count [31:0] $end
-$var wire 8 5% val0[0] [7:0] $end
-$var wire 8 6% val0[1] [7:0] $end
-$var wire 8 7% val1[0] [7:0] $end
-$var wire 8 8% val1[1] [7:0] $end
-$var wire 8 9% val2[0] [7:0] $end
-$var wire 8 :% val2[1] [7:0] $end
-$var wire 8 ;% val3[0] [7:0] $end
-$var wire 8 <% val3[1] [7:0] $end
+$var wire 1 d$ clk $end
+$var wire 128 e$ in[0][0] [127:0] $end
+$var wire 128 f$ in[0][1] [127:0] $end
+$var wire 128 g$ in[0][2] [127:0] $end
+$var wire 128 h$ in[1][0] [127:0] $end
+$var wire 128 i$ in[1][1] [127:0] $end
+$var wire 128 j$ in[1][2] [127:0] $end
+$var wire 8 k$ out[0][0] [7:0] $end
+$var wire 8 l$ out[0][1] [7:0] $end
+$var wire 8 m$ out[0][2] [7:0] $end
+$var wire 8 n$ out[1][0] [7:0] $end
+$var wire 8 o$ out[1][1] [7:0] $end
+$var wire 8 p$ out[1][2] [7:0] $end
+$var int 32 q$ count [31:0] $end
+$var wire 8 r$ val0[0] [7:0] $end
+$var wire 8 s$ val0[1] [7:0] $end
+$var wire 8 t$ val1[0] [7:0] $end
+$var wire 8 u$ val1[1] [7:0] $end
+$var wire 8 v$ val2[0] [7:0] $end
+$var wire 8 w$ val2[1] [7:0] $end
+$var wire 8 x$ val3[0] [7:0] $end
+$var wire 8 y$ val3[1] [7:0] $end
 $scope module i_sub0 $end
-$var parameter 32 =% P0 [31:0] $end
-$var parameter 32 >% P1 [31:0] $end
-$var wire 8 ?% out[0] [7:0] $end
-$var wire 8 @% out[1] [7:0] $end
+$var parameter 32 z$ P0 [31:0] $end
+$var parameter 32 {$ P1 [31:0] $end
+$var wire 8 r$ out[0] [7:0] $end
+$var wire 8 s$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub1 $end
-$var parameter 32 =% P0 [31:0] $end
-$var parameter 32 >% P1 [31:0] $end
-$var wire 8 A% out[0] [7:0] $end
-$var wire 8 B% out[1] [7:0] $end
+$var parameter 32 z$ P0 [31:0] $end
+$var parameter 32 {$ P1 [31:0] $end
+$var wire 8 t$ out[0] [7:0] $end
+$var wire 8 u$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub2 $end
-$var parameter 32 =% P0 [31:0] $end
-$var parameter 32 >% P1 [31:0] $end
-$var wire 8 C% out[0] [7:0] $end
-$var wire 8 D% out[1] [7:0] $end
+$var parameter 32 z$ P0 [31:0] $end
+$var parameter 32 {$ P1 [31:0] $end
+$var wire 8 v$ out[0] [7:0] $end
+$var wire 8 w$ out[1] [7:0] $end
 $upscope $end
 $scope module i_sub3 $end
-$var wire 8 E% out[0] [7:0] $end
-$var wire 8 F% out[1] [7:0] $end
+$var wire 8 |$ out[0] [7:0] $end
+$var wire 8 }$ out[1] [7:0] $end
 $upscope $end
 $scope module unnamedblk1 $end
-$var int 32 G% i [31:0] $end
+$var int 32 ~$ i [31:0] $end
 $scope module unnamedblk2 $end
-$var int 32 H% j [31:0] $end
+$var int 32 !% j [31:0] $end
 $scope module unnamedblk3 $end
-$var bit 128 I% exp [127:0] $end
+$var bit 128 "% exp [127:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-$var wire 8 J% out[0] [7:0] $end
-$var wire 8 K% out[1] [7:0] $end
+$var wire 8 #% out[0] [7:0] $end
+$var wire 8 $% out[1] [7:0] $end
 $scope module sub6_9 $end
-$var parameter 32 L% P0 [31:0] $end
-$var parameter 32 M% P1 [31:0] $end
-$var wire 8 J% out[0] [7:0] $end
-$var wire 8 K% out[1] [7:0] $end
+$var parameter 32 %% P0 [31:0] $end
+$var parameter 32 &% P1 [31:0] $end
+$var wire 8 #% out[0] [7:0] $end
+$var wire 8 $% out[1] [7:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
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+b00000000000000000000000000010001 q$
+b00000001 u
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+b00000001 c$
 b00011101 $
 b00011101 F
 b00011101 H
 b00011101 I
 b00011101 L
 b00011101 R
-b00011101 S
-b00011101 V
-b00011101 Z
-b00011101 B!
-b00011101 F!
-b00011101 -"
-b00011101 m#
+b00011101 U
+b00011101 Y
+b00011101 ;!
+b00011101 ?!
+b00011101 ~!
+b00011101 S#
 b00010101 (
 b00010101 4
 b00010101 ;
@@ -6824,20 +6742,18 @@ b00011011 %
 b00011011 &
 b00011011 +
 b00011011 =
+b00011011 !"
+b00011011 '"
+b00011011 *"
 b00011011 ."
-b00011011 4"
-b00011011 5"
-b00011011 8"
-b00011011 <"
-b00011011 $#
-b00011011 (#
-b00011011 n#
-b00011011 t#
-b00011011 u#
-b00011011 x#
-b00011011 |#
-b00011011 d$
-b00011011 h$
+b00011011 n"
+b00011011 r"
+b00011011 T#
+b00011011 Z#
+b00011011 ]#
+b00011011 a#
+b00011011 C$
+b00011011 G$
 b00011001 E
 b00011001 C
 b00011001 B
diff --git a/test_regress/t/t_hier_block_trace_vcd.out b/test_regress/t/t_hier_block_trace_vcd.out
index 2e89a537a..a3c3edfbb 100644
--- a/test_regress/t/t_hier_block_trace_vcd.out
+++ b/test_regress/t/t_hier_block_trace_vcd.out
@@ -1,111 +1,110 @@
 $version Generated by VerilatedVcd $end
-$date Thu Nov 10 20:18:10 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 * clk $end
+  $var wire 1 * clk $end
   $scope module t $end
-   $var wire  1 * clk $end
+   $var wire 1 * clk $end
+   $var wire 8 # out0 [7:0] $end
+   $var wire 8 $ out1 [7:0] $end
+   $var wire 8 % out2 [7:0] $end
+   $var wire 8 & out3 [7:0] $end
+   $var wire 8 ' out3_2 [7:0] $end
+   $var wire 8 ( out5 [7:0] $end
+   $var wire 8 ) out6 [7:0] $end
    $var wire 32 + count [31:0] $end
-   $var wire  8 # out0 [7:0] $end
-   $var wire  8 $ out1 [7:0] $end
-   $var wire  8 % out2 [7:0] $end
-   $var wire  8 & out3 [7:0] $end
-   $var wire  8 ' out3_2 [7:0] $end
-   $var wire  8 ( out5 [7:0] $end
-   $var wire  8 ) out6 [7:0] $end
    $scope module i_delay0 $end
-    $var wire  1 * clk $end
-    $var wire  8 & in [7:0] $end
-    $var wire  8 ( out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 & in [7:0] $end
+    $var wire 8 ( out [7:0] $end
    $upscope $end
    $scope module i_delay1 $end
-    $var wire  1 * clk $end
-    $var wire  8 ( in [7:0] $end
-    $var wire  8 ) out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 ( in [7:0] $end
+    $var wire 8 ) out [7:0] $end
    $upscope $end
    $scope module i_sub0 $end
-    $var wire  1 * clk $end
-    $var wire  8 & in [7:0] $end
-    $var wire  8 # out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 & in [7:0] $end
+    $var wire 8 # out [7:0] $end
     $scope module i_sub0 $end
-     $var wire  1 * clk $end
-     $var wire  8 & in [7:0] $end
-     $var wire  8 # out [7:0] $end
+     $var wire 1 * clk $end
+     $var wire 8 & in [7:0] $end
+     $var wire 8 # out [7:0] $end
     $upscope $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire  1 * clk $end
-    $var wire  8 # in [11:4] $end
-    $var wire  8 $ out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 # in [11:4] $end
+    $var wire 8 $ out [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire  1 * clk $end
-    $var wire  8 $ in [7:0] $end
-    $var wire  8 % out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 $ in [7:0] $end
+    $var wire 8 % out [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  1 * clk $end
-    $var wire  8 % in [7:0] $end
-    $var wire  8 & out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 % in [7:0] $end
+    $var wire 8 & out [7:0] $end
    $upscope $end
    $scope module i_sub3_2 $end
-    $var wire  1 * clk $end
-    $var wire  8 % in [7:0] $end
-    $var wire  8 ' out [7:0] $end
+    $var wire 1 * clk $end
+    $var wire 8 % in [7:0] $end
+    $var wire 8 ' out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_delay0 $end
-  $var wire  1 - clk $end
-  $var wire  8 . in [7:0] $end
-  $var wire  8 / out [7:0] $end
+  $var wire 1 - clk $end
+  $var wire 8 . in [7:0] $end
+  $var wire 8 / out [7:0] $end
   $scope module delay_2 $end
    $var wire 32 2 N [31:0] $end
    $var wire 32 3 WIDTH [31:0] $end
-   $var wire  1 - clk $end
-   $var wire  8 . in [7:0] $end
-   $var wire  8 / out [7:0] $end
-   $var wire  8 0 tmp [7:0] $end
+   $var wire 1 - clk $end
+   $var wire 8 . in [7:0] $end
+   $var wire 8 / out [7:0] $end
+   $var wire 8 0 tmp [7:0] $end
    $scope module genblk1 $end
     $scope module i_delay $end
      $var wire 32 4 N [31:0] $end
      $var wire 32 3 WIDTH [31:0] $end
-     $var wire  1 - clk $end
-     $var wire  8 0 in [7:0] $end
-     $var wire  8 / out [7:0] $end
-     $var wire  8 1 tmp [7:0] $end
+     $var wire 1 - clk $end
+     $var wire 8 0 in [7:0] $end
+     $var wire 8 / out [7:0] $end
+     $var wire 8 1 tmp [7:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_delay1 $end
-  $var wire  1 9 clk $end
-  $var wire  8 : in [7:0] $end
-  $var wire  8 ; out [7:0] $end
+  $var wire 1 9 clk $end
+  $var wire 8 : in [7:0] $end
+  $var wire 8 ; out [7:0] $end
   $scope module delay_9 $end
    $var wire 32 < N [31:0] $end
    $var wire 32 = WIDTH [31:0] $end
-   $var wire  1 9 clk $end
-   $var wire  8 : in [7:0] $end
-   $var wire  8 ; out [7:0] $end
-   $var wire  8 6 tmp [7:0] $end
+   $var wire 1 9 clk $end
+   $var wire 8 : in [7:0] $end
+   $var wire 8 ; out [7:0] $end
+   $var wire 8 6 tmp [7:0] $end
    $scope module genblk1 $end
     $scope module i_delay $end
      $var wire 32 > N [31:0] $end
      $var wire 32 = WIDTH [31:0] $end
-     $var wire  1 9 clk $end
-     $var wire  8 6 in [7:0] $end
-     $var wire  8 ; out [7:0] $end
-     $var wire  8 7 tmp [7:0] $end
+     $var wire 1 9 clk $end
+     $var wire 8 6 in [7:0] $end
+     $var wire 8 ; out [7:0] $end
+     $var wire 8 7 tmp [7:0] $end
      $scope module genblk1 $end
       $scope module i_delay $end
        $var wire 32 ? N [31:0] $end
        $var wire 32 = WIDTH [31:0] $end
-       $var wire  1 9 clk $end
-       $var wire  8 7 in [7:0] $end
-       $var wire  8 ; out [7:0] $end
-       $var wire  8 8 tmp [7:0] $end
+       $var wire 1 9 clk $end
+       $var wire 8 7 in [7:0] $end
+       $var wire 8 ; out [7:0] $end
+       $var wire 8 8 tmp [7:0] $end
       $upscope $end
      $upscope $end
     $upscope $end
@@ -113,934 +112,934 @@ $timescale 1ps $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub0.i_sub0 $end
-  $var wire  1 A clk $end
-  $var wire  8 B in [7:0] $end
-  $var wire  8 C out [7:0] $end
+  $var wire 1 A clk $end
+  $var wire 8 B in [7:0] $end
+  $var wire 8 C out [7:0] $end
   $scope module sub0 $end
-   $var wire  1 A clk $end
-   $var wire  8 D ff [7:0] $end
-   $var wire  8 B in [7:0] $end
-   $var wire  8 C out [7:0] $end
+   $var wire 1 A clk $end
+   $var wire 8 B in [7:0] $end
+   $var wire 8 C out [7:0] $end
+   $var wire 8 D ff [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub1 $end
-  $var wire  1 F clk $end
-  $var wire  8 G in [11:4] $end
-  $var wire  8 H out [7:0] $end
+  $var wire 1 F clk $end
+  $var wire 8 G in [11:4] $end
+  $var wire 8 H out [7:0] $end
   $scope module sub1 $end
-   $var wire  1 F clk $end
-   $var wire  8 I ff [7:0] $end
-   $var wire  8 G in [11:4] $end
-   $var wire  8 H out [7:0] $end
+   $var wire 1 F clk $end
+   $var wire 8 G in [11:4] $end
+   $var wire 8 H out [7:0] $end
+   $var wire 8 I ff [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2 $end
-  $var wire  1 K clk $end
-  $var wire  8 L in [7:0] $end
-  $var wire  8 M out [7:0] $end
+  $var wire 1 K clk $end
+  $var wire 8 L in [7:0] $end
+  $var wire 8 M out [7:0] $end
   $scope module sub2 $end
-   $var wire  1 K clk $end
-   $var wire  8 N ff [7:0] $end
-   $var wire  8 L in [7:0] $end
-   $var wire  8 M out [7:0] $end
-   $scope module i_sub3 $end
-    $var wire  8 N in_wire [7:0] $end
-    $var wire  8 O out_1 [7:0] $end
-    $var wire  8 P out_2 [7:0] $end
-    $scope module i_sub3 $end
-     $var wire  1 K clk $end
-     $var wire  8 N in [7:0] $end
-     $var wire  8 O out [7:0] $end
-    $upscope $end
-    $scope module i_sub3_2 $end
-     $var wire  1 K clk $end
-     $var wire  8 N in [7:0] $end
-     $var wire  8 P out [7:0] $end
-    $upscope $end
-    $scope module in $end
-     $var wire  1 K clk $end
-     $var wire  8 N data [7:0] $end
-    $upscope $end
-    $scope module out $end
-     $var wire  1 K clk $end
-     $var wire  8 O data [7:0] $end
-    $upscope $end
-   $upscope $end
+   $var wire 1 K clk $end
+   $var wire 8 L in [7:0] $end
+   $var wire 8 M out [7:0] $end
+   $var wire 8 N ff [7:0] $end
    $scope module in_ifs $end
-    $var wire  1 K clk $end
-    $var wire  8 N data [7:0] $end
+    $var wire 1 K clk $end
+    $var wire 8 N data [7:0] $end
    $upscope $end
    $scope module out_ifs $end
-    $var wire  1 K clk $end
-    $var wire  8 O data [7:0] $end
+    $var wire 1 K clk $end
+    $var wire 8 O data [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $scope module in $end
+     $var wire 1 K clk $end
+     $var wire 8 N data [7:0] $end
+    $upscope $end
+    $scope module out $end
+     $var wire 1 K clk $end
+     $var wire 8 O data [7:0] $end
+    $upscope $end
+    $var wire 8 N in_wire [7:0] $end
+    $var wire 8 O out_1 [7:0] $end
+    $var wire 8 P out_2 [7:0] $end
+    $scope module i_sub3 $end
+     $var wire 1 K clk $end
+     $var wire 8 N in [7:0] $end
+     $var wire 8 O out [7:0] $end
+    $upscope $end
+    $scope module i_sub3_2 $end
+     $var wire 1 K clk $end
+     $var wire 8 N in [7:0] $end
+     $var wire 8 P out [7:0] $end
+    $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3 $end
-  $var wire  1 R clk $end
-  $var wire  8 S in [7:0] $end
-  $var wire  8 T out [7:0] $end
+  $var wire 1 R clk $end
+  $var wire 8 S in [7:0] $end
+  $var wire 8 T out [7:0] $end
   $scope module sub3_c $end
-   $var wire  8 X P0 [7:0] $end
-   $var wire 32 Y UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 Z UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 [ UNUSED [15:0] $end
-   $var wire  1 R clk $end
-   $var wire  8 U ff [7:0] $end
-   $var wire  8 S in [7:0] $end
-   $var wire  8 T out [7:0] $end
-   $var wire  8 V out4 [7:0] $end
-   $var wire  8 W out4_2 [7:0] $end
+   $var wire 8 W P0 [7:0] $end
+   $var wire 32 X UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 Y UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 Z UNUSED [15:0] $end
+   $var wire 1 R clk $end
+   $var wire 8 S in [7:0] $end
+   $var wire 8 T out [7:0] $end
+   $var wire 8 U ff [7:0] $end
+   $var wire 8 T out4 [7:0] $end
+   $var wire 8 V out4_2 [7:0] $end
    $scope module i_sub4_0 $end
-    $var wire  1 R clk $end
-    $var wire  8 U in [7:0] $end
-    $var wire  8 V out [7:0] $end
+    $var wire 1 R clk $end
+    $var wire 8 U in [7:0] $end
+    $var wire 8 T out [7:0] $end
    $upscope $end
    $scope module i_sub4_1 $end
-    $var wire  1 R clk $end
-    $var wire  8 U in [7:0] $end
-    $var wire  8 W out [7:0] $end
+    $var wire 1 R clk $end
+    $var wire 8 U in [7:0] $end
+    $var wire 8 V out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0 $end
-  $var wire  1 @! clk $end
-  $var wire  8 A! in [7:0] $end
-  $var wire  8 B! out [7:0] $end
+  $var wire 1 ?! clk $end
+  $var wire 8 @! in [7:0] $end
+  $var wire 8 A! out [7:0] $end
   $scope module sub4_2 $end
-   $var wire 32 C! P0 [31:0] $end
-   $var real 64 D! P1 $end
-   $var real 64 F! P3 $end
-   $var wire  1 @! clk $end
-   $var wire 32 v count [31:0] $end
-   $var wire  8 ] ff [7:0] $end
-   $var wire  8 A! in [7:0] $end
-   $var wire  8 B! out [7:0] $end
-   $var wire 128 ^ sub5_in[0][0] [127:0] $end
-   $var wire 128 b sub5_in[0][1] [127:0] $end
-   $var wire 128 f sub5_in[0][2] [127:0] $end
-   $var wire 128 j sub5_in[1][0] [127:0] $end
-   $var wire 128 n sub5_in[1][1] [127:0] $end
-   $var wire 128 r sub5_in[1][2] [127:0] $end
-   $var wire  8 4! sub5_out[0][0] [7:0] $end
-   $var wire  8 5! sub5_out[0][1] [7:0] $end
-   $var wire  8 6! sub5_out[0][2] [7:0] $end
-   $var wire  8 7! sub5_out[1][0] [7:0] $end
-   $var wire  8 8! sub5_out[1][1] [7:0] $end
-   $var wire  8 9! sub5_out[1][2] [7:0] $end
+   $var wire 32 B! P0 [31:0] $end
+   $var real 64 C! P1 $end
+   $var real 64 E! P3 $end
+   $var wire 1 ?! clk $end
+   $var wire 8 @! in [7:0] $end
+   $var wire 8 A! out [7:0] $end
+   $var wire 8 \ ff [7:0] $end
+   $var wire 128 ] sub5_in[0][0] [127:0] $end
+   $var wire 128 a sub5_in[0][1] [127:0] $end
+   $var wire 128 e sub5_in[0][2] [127:0] $end
+   $var wire 128 i sub5_in[1][0] [127:0] $end
+   $var wire 128 m sub5_in[1][1] [127:0] $end
+   $var wire 128 q sub5_in[1][2] [127:0] $end
+   $var wire 8 3! sub5_out[0][0] [7:0] $end
+   $var wire 8 4! sub5_out[0][1] [7:0] $end
+   $var wire 8 5! sub5_out[0][2] [7:0] $end
+   $var wire 8 6! sub5_out[1][0] [7:0] $end
+   $var wire 8 7! sub5_out[1][1] [7:0] $end
+   $var wire 8 8! sub5_out[1][2] [7:0] $end
+   $var wire 32 u count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 @! clk $end
-    $var wire 128 z in[0][0] [127:0] $end
-    $var wire 128 ~ in[0][1] [127:0] $end
-    $var wire 128 $! in[0][2] [127:0] $end
-    $var wire 128 (! in[1][0] [127:0] $end
-    $var wire 128 ,! in[1][1] [127:0] $end
-    $var wire 128 0! in[1][2] [127:0] $end
-    $var wire  8 :! out[0][0] [7:0] $end
-    $var wire  8 ;! out[0][1] [7:0] $end
-    $var wire  8 <! out[0][2] [7:0] $end
-    $var wire  8 =! out[1][0] [7:0] $end
-    $var wire  8 >! out[1][1] [7:0] $end
-    $var wire  8 ?! out[1][2] [7:0] $end
+    $var wire 1 ?! clk $end
+    $var wire 128 y in[0][0] [127:0] $end
+    $var wire 128 } in[0][1] [127:0] $end
+    $var wire 128 #! in[0][2] [127:0] $end
+    $var wire 128 '! in[1][0] [127:0] $end
+    $var wire 128 +! in[1][1] [127:0] $end
+    $var wire 128 /! in[1][2] [127:0] $end
+    $var wire 8 9! out[0][0] [7:0] $end
+    $var wire 8 :! out[0][1] [7:0] $end
+    $var wire 8 ;! out[0][2] [7:0] $end
+    $var wire 8 <! out[1][0] [7:0] $end
+    $var wire 8 =! out[1][1] [7:0] $end
+    $var wire 8 >! out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 w i [31:0] $end
+    $var wire 32 v i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 x j [31:0] $end
+     $var wire 32 w j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 y exp [7:0] $end
+      $var wire 8 x exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 `! clk $end
-  $var wire 128 a! in[0][0] [127:0] $end
-  $var wire 128 e! in[0][1] [127:0] $end
-  $var wire 128 i! in[0][2] [127:0] $end
-  $var wire 128 m! in[1][0] [127:0] $end
-  $var wire 128 q! in[1][1] [127:0] $end
-  $var wire 128 u! in[1][2] [127:0] $end
-  $var wire  8 y! out[0][0] [7:0] $end
-  $var wire  8 z! out[0][1] [7:0] $end
-  $var wire  8 {! out[0][2] [7:0] $end
-  $var wire  8 |! out[1][0] [7:0] $end
-  $var wire  8 }! out[1][1] [7:0] $end
-  $var wire  8 ~! out[1][2] [7:0] $end
+  $var wire 1 Y! clk $end
+  $var wire 128 Z! in[0][0] [127:0] $end
+  $var wire 128 ^! in[0][1] [127:0] $end
+  $var wire 128 b! in[0][2] [127:0] $end
+  $var wire 128 f! in[1][0] [127:0] $end
+  $var wire 128 j! in[1][1] [127:0] $end
+  $var wire 128 n! in[1][2] [127:0] $end
+  $var wire 8 r! out[0][0] [7:0] $end
+  $var wire 8 s! out[0][1] [7:0] $end
+  $var wire 8 t! out[0][2] [7:0] $end
+  $var wire 8 u! out[1][0] [7:0] $end
+  $var wire 8 v! out[1][1] [7:0] $end
+  $var wire 8 w! out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 `! clk $end
-   $var wire 32 Y! count [31:0] $end
-   $var wire 128 a! in[0][0] [127:0] $end
-   $var wire 128 e! in[0][1] [127:0] $end
-   $var wire 128 i! in[0][2] [127:0] $end
-   $var wire 128 m! in[1][0] [127:0] $end
-   $var wire 128 q! in[1][1] [127:0] $end
-   $var wire 128 u! in[1][2] [127:0] $end
-   $var wire  8 y! out[0][0] [7:0] $end
-   $var wire  8 z! out[0][1] [7:0] $end
-   $var wire  8 {! out[0][2] [7:0] $end
-   $var wire  8 |! out[1][0] [7:0] $end
-   $var wire  8 }! out[1][1] [7:0] $end
-   $var wire  8 ~! out[1][2] [7:0] $end
-   $var wire  8 I! val0[0] [7:0] $end
-   $var wire  8 J! val0[1] [7:0] $end
-   $var wire  8 K! val1[0] [7:0] $end
-   $var wire  8 L! val1[1] [7:0] $end
-   $var wire  8 M! val2[0] [7:0] $end
-   $var wire  8 N! val2[1] [7:0] $end
-   $var wire  8 O! val3[0] [7:0] $end
-   $var wire  8 P! val3[1] [7:0] $end
+   $var wire 1 Y! clk $end
+   $var wire 128 Z! in[0][0] [127:0] $end
+   $var wire 128 ^! in[0][1] [127:0] $end
+   $var wire 128 b! in[0][2] [127:0] $end
+   $var wire 128 f! in[1][0] [127:0] $end
+   $var wire 128 j! in[1][1] [127:0] $end
+   $var wire 128 n! in[1][2] [127:0] $end
+   $var wire 8 r! out[0][0] [7:0] $end
+   $var wire 8 s! out[0][1] [7:0] $end
+   $var wire 8 t! out[0][2] [7:0] $end
+   $var wire 8 u! out[1][0] [7:0] $end
+   $var wire 8 v! out[1][1] [7:0] $end
+   $var wire 8 w! out[1][2] [7:0] $end
+   $var wire 32 R! count [31:0] $end
+   $var wire 8 H! val0[0] [7:0] $end
+   $var wire 8 I! val0[1] [7:0] $end
+   $var wire 8 J! val1[0] [7:0] $end
+   $var wire 8 K! val1[1] [7:0] $end
+   $var wire 8 L! val2[0] [7:0] $end
+   $var wire 8 M! val2[1] [7:0] $end
+   $var wire 8 N! val3[0] [7:0] $end
+   $var wire 8 O! val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 Q! out[0] [7:0] $end
-    $var wire  8 R! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 H! out[0] [7:0] $end
+    $var wire 8 I! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 S! out[0] [7:0] $end
-    $var wire  8 T! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 J! out[0] [7:0] $end
+    $var wire 8 K! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 !" P0 [31:0] $end
-    $var wire 32 "" P1 [31:0] $end
-    $var wire  8 U! out[0] [7:0] $end
-    $var wire  8 V! out[1] [7:0] $end
+    $var wire 32 x! P0 [31:0] $end
+    $var wire 32 y! P1 [31:0] $end
+    $var wire 8 L! out[0] [7:0] $end
+    $var wire 8 M! out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 W! out[0] [7:0] $end
-    $var wire  8 X! out[1] [7:0] $end
+    $var wire 8 P! out[0] [7:0] $end
+    $var wire 8 Q! out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 Z! i [31:0] $end
+    $var wire 32 S! i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 [! j [31:0] $end
+     $var wire 32 T! j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 \! exp [127:0] $end
+      $var wire 128 U! exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 $" out[0] [7:0] $end
-  $var wire  8 %" out[1] [7:0] $end
+  $var wire 8 {! out[0] [7:0] $end
+  $var wire 8 |! out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 &" P0 [31:0] $end
-   $var wire 32 '" P1 [31:0] $end
-   $var wire  8 $" out[0] [7:0] $end
-   $var wire  8 %" out[1] [7:0] $end
+   $var wire 32 }! P0 [31:0] $end
+   $var wire 32 ~! P1 [31:0] $end
+   $var wire 8 {! out[0] [7:0] $end
+   $var wire 8 |! out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1 $end
-  $var wire  1 j" clk $end
-  $var wire  8 k" in [7:0] $end
-  $var wire  8 l" out [7:0] $end
+  $var wire 1 c" clk $end
+  $var wire 8 d" in [7:0] $end
+  $var wire 8 e" out [7:0] $end
   $scope module sub4_b $end
-   $var wire 32 m" P0 [31:0] $end
-   $var real 64 n" P1 $end
-   $var real 64 p" P3 $end
-   $var wire  1 j" clk $end
-   $var wire 32 B" count [31:0] $end
-   $var wire  8 )" ff [7:0] $end
-   $var wire  8 k" in [7:0] $end
-   $var wire  8 l" out [7:0] $end
-   $var wire 128 *" sub5_in[0][0] [127:0] $end
-   $var wire 128 ." sub5_in[0][1] [127:0] $end
-   $var wire 128 2" sub5_in[0][2] [127:0] $end
-   $var wire 128 6" sub5_in[1][0] [127:0] $end
-   $var wire 128 :" sub5_in[1][1] [127:0] $end
-   $var wire 128 >" sub5_in[1][2] [127:0] $end
-   $var wire  8 ^" sub5_out[0][0] [7:0] $end
-   $var wire  8 _" sub5_out[0][1] [7:0] $end
-   $var wire  8 `" sub5_out[0][2] [7:0] $end
-   $var wire  8 a" sub5_out[1][0] [7:0] $end
-   $var wire  8 b" sub5_out[1][1] [7:0] $end
-   $var wire  8 c" sub5_out[1][2] [7:0] $end
+   $var wire 32 f" P0 [31:0] $end
+   $var real 64 g" P1 $end
+   $var real 64 i" P3 $end
+   $var wire 1 c" clk $end
+   $var wire 8 d" in [7:0] $end
+   $var wire 8 e" out [7:0] $end
+   $var wire 8 "" ff [7:0] $end
+   $var wire 128 #" sub5_in[0][0] [127:0] $end
+   $var wire 128 '" sub5_in[0][1] [127:0] $end
+   $var wire 128 +" sub5_in[0][2] [127:0] $end
+   $var wire 128 /" sub5_in[1][0] [127:0] $end
+   $var wire 128 3" sub5_in[1][1] [127:0] $end
+   $var wire 128 7" sub5_in[1][2] [127:0] $end
+   $var wire 8 W" sub5_out[0][0] [7:0] $end
+   $var wire 8 X" sub5_out[0][1] [7:0] $end
+   $var wire 8 Y" sub5_out[0][2] [7:0] $end
+   $var wire 8 Z" sub5_out[1][0] [7:0] $end
+   $var wire 8 [" sub5_out[1][1] [7:0] $end
+   $var wire 8 \" sub5_out[1][2] [7:0] $end
+   $var wire 32 ;" count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 j" clk $end
-    $var wire 128 F" in[0][0] [127:0] $end
-    $var wire 128 J" in[0][1] [127:0] $end
-    $var wire 128 N" in[0][2] [127:0] $end
-    $var wire 128 R" in[1][0] [127:0] $end
-    $var wire 128 V" in[1][1] [127:0] $end
-    $var wire 128 Z" in[1][2] [127:0] $end
-    $var wire  8 d" out[0][0] [7:0] $end
-    $var wire  8 e" out[0][1] [7:0] $end
-    $var wire  8 f" out[0][2] [7:0] $end
-    $var wire  8 g" out[1][0] [7:0] $end
-    $var wire  8 h" out[1][1] [7:0] $end
-    $var wire  8 i" out[1][2] [7:0] $end
+    $var wire 1 c" clk $end
+    $var wire 128 ?" in[0][0] [127:0] $end
+    $var wire 128 C" in[0][1] [127:0] $end
+    $var wire 128 G" in[0][2] [127:0] $end
+    $var wire 128 K" in[1][0] [127:0] $end
+    $var wire 128 O" in[1][1] [127:0] $end
+    $var wire 128 S" in[1][2] [127:0] $end
+    $var wire 8 ]" out[0][0] [7:0] $end
+    $var wire 8 ^" out[0][1] [7:0] $end
+    $var wire 8 _" out[0][2] [7:0] $end
+    $var wire 8 `" out[1][0] [7:0] $end
+    $var wire 8 a" out[1][1] [7:0] $end
+    $var wire 8 b" out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 C" i [31:0] $end
+    $var wire 32 <" i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 D" j [31:0] $end
+     $var wire 32 =" j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 E" exp [7:0] $end
+      $var wire 8 >" exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 ,# clk $end
-  $var wire 128 -# in[0][0] [127:0] $end
-  $var wire 128 1# in[0][1] [127:0] $end
-  $var wire 128 5# in[0][2] [127:0] $end
-  $var wire 128 9# in[1][0] [127:0] $end
-  $var wire 128 =# in[1][1] [127:0] $end
-  $var wire 128 A# in[1][2] [127:0] $end
-  $var wire  8 E# out[0][0] [7:0] $end
-  $var wire  8 F# out[0][1] [7:0] $end
-  $var wire  8 G# out[0][2] [7:0] $end
-  $var wire  8 H# out[1][0] [7:0] $end
-  $var wire  8 I# out[1][1] [7:0] $end
-  $var wire  8 J# out[1][2] [7:0] $end
+  $var wire 1 }" clk $end
+  $var wire 128 ~" in[0][0] [127:0] $end
+  $var wire 128 $# in[0][1] [127:0] $end
+  $var wire 128 (# in[0][2] [127:0] $end
+  $var wire 128 ,# in[1][0] [127:0] $end
+  $var wire 128 0# in[1][1] [127:0] $end
+  $var wire 128 4# in[1][2] [127:0] $end
+  $var wire 8 8# out[0][0] [7:0] $end
+  $var wire 8 9# out[0][1] [7:0] $end
+  $var wire 8 :# out[0][2] [7:0] $end
+  $var wire 8 ;# out[1][0] [7:0] $end
+  $var wire 8 <# out[1][1] [7:0] $end
+  $var wire 8 =# out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 ,# clk $end
-   $var wire 32 %# count [31:0] $end
-   $var wire 128 -# in[0][0] [127:0] $end
-   $var wire 128 1# in[0][1] [127:0] $end
-   $var wire 128 5# in[0][2] [127:0] $end
-   $var wire 128 9# in[1][0] [127:0] $end
-   $var wire 128 =# in[1][1] [127:0] $end
-   $var wire 128 A# in[1][2] [127:0] $end
-   $var wire  8 E# out[0][0] [7:0] $end
-   $var wire  8 F# out[0][1] [7:0] $end
-   $var wire  8 G# out[0][2] [7:0] $end
-   $var wire  8 H# out[1][0] [7:0] $end
-   $var wire  8 I# out[1][1] [7:0] $end
-   $var wire  8 J# out[1][2] [7:0] $end
-   $var wire  8 s" val0[0] [7:0] $end
-   $var wire  8 t" val0[1] [7:0] $end
-   $var wire  8 u" val1[0] [7:0] $end
-   $var wire  8 v" val1[1] [7:0] $end
-   $var wire  8 w" val2[0] [7:0] $end
-   $var wire  8 x" val2[1] [7:0] $end
-   $var wire  8 y" val3[0] [7:0] $end
-   $var wire  8 z" val3[1] [7:0] $end
+   $var wire 1 }" clk $end
+   $var wire 128 ~" in[0][0] [127:0] $end
+   $var wire 128 $# in[0][1] [127:0] $end
+   $var wire 128 (# in[0][2] [127:0] $end
+   $var wire 128 ,# in[1][0] [127:0] $end
+   $var wire 128 0# in[1][1] [127:0] $end
+   $var wire 128 4# in[1][2] [127:0] $end
+   $var wire 8 8# out[0][0] [7:0] $end
+   $var wire 8 9# out[0][1] [7:0] $end
+   $var wire 8 :# out[0][2] [7:0] $end
+   $var wire 8 ;# out[1][0] [7:0] $end
+   $var wire 8 <# out[1][1] [7:0] $end
+   $var wire 8 =# out[1][2] [7:0] $end
+   $var wire 32 v" count [31:0] $end
+   $var wire 8 l" val0[0] [7:0] $end
+   $var wire 8 m" val0[1] [7:0] $end
+   $var wire 8 n" val1[0] [7:0] $end
+   $var wire 8 o" val1[1] [7:0] $end
+   $var wire 8 p" val2[0] [7:0] $end
+   $var wire 8 q" val2[1] [7:0] $end
+   $var wire 8 r" val3[0] [7:0] $end
+   $var wire 8 s" val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 {" out[0] [7:0] $end
-    $var wire  8 |" out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 l" out[0] [7:0] $end
+    $var wire 8 m" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 }" out[0] [7:0] $end
-    $var wire  8 ~" out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 n" out[0] [7:0] $end
+    $var wire 8 o" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 K# P0 [31:0] $end
-    $var wire 32 L# P1 [31:0] $end
-    $var wire  8 !# out[0] [7:0] $end
-    $var wire  8 "# out[1] [7:0] $end
+    $var wire 32 ># P0 [31:0] $end
+    $var wire 32 ?# P1 [31:0] $end
+    $var wire 8 p" out[0] [7:0] $end
+    $var wire 8 q" out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 ## out[0] [7:0] $end
-    $var wire  8 $# out[1] [7:0] $end
+    $var wire 8 t" out[0] [7:0] $end
+    $var wire 8 u" out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 &# i [31:0] $end
+    $var wire 32 w" i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 '# j [31:0] $end
+     $var wire 32 x" j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 (# exp [127:0] $end
+      $var wire 128 y" exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub2.sub2.i_sub3.i_sub3.sub3_c.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 N# out[0] [7:0] $end
-  $var wire  8 O# out[1] [7:0] $end
+  $var wire 8 A# out[0] [7:0] $end
+  $var wire 8 B# out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 P# P0 [31:0] $end
-   $var wire 32 Q# P1 [31:0] $end
-   $var wire  8 N# out[0] [7:0] $end
-   $var wire  8 O# out[1] [7:0] $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3 $end
-  $var wire  1 T& clk $end
-  $var wire  8 U& in [7:0] $end
-  $var wire  8 V& out [7:0] $end
-  $scope module sub3_d $end
-   $var wire  8 Z& P0 [7:0] $end
-   $var wire 32 [& UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 \& UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 ]& UNUSED [15:0] $end
-   $var wire  1 T& clk $end
-   $var wire  8 W& ff [7:0] $end
-   $var wire  8 U& in [7:0] $end
-   $var wire  8 V& out [7:0] $end
-   $var wire  8 X& out4 [7:0] $end
-   $var wire  8 Y& out4_2 [7:0] $end
-   $scope module i_sub4_0 $end
-    $var wire  1 T& clk $end
-    $var wire  8 W& in [7:0] $end
-    $var wire  8 X& out [7:0] $end
-   $upscope $end
-   $scope module i_sub4_1 $end
-    $var wire  1 T& clk $end
-    $var wire  8 W& in [7:0] $end
-    $var wire  8 Y& out [7:0] $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
-  $var wire  1 B' clk $end
-  $var wire  8 C' in [7:0] $end
-  $var wire  8 D' out [7:0] $end
-  $scope module sub4_2 $end
-   $var wire 32 E' P0 [31:0] $end
-   $var real 64 F' P1 $end
-   $var real 64 H' P3 $end
-   $var wire  1 B' clk $end
-   $var wire 32 x& count [31:0] $end
-   $var wire  8 _& ff [7:0] $end
-   $var wire  8 C' in [7:0] $end
-   $var wire  8 D' out [7:0] $end
-   $var wire 128 `& sub5_in[0][0] [127:0] $end
-   $var wire 128 d& sub5_in[0][1] [127:0] $end
-   $var wire 128 h& sub5_in[0][2] [127:0] $end
-   $var wire 128 l& sub5_in[1][0] [127:0] $end
-   $var wire 128 p& sub5_in[1][1] [127:0] $end
-   $var wire 128 t& sub5_in[1][2] [127:0] $end
-   $var wire  8 6' sub5_out[0][0] [7:0] $end
-   $var wire  8 7' sub5_out[0][1] [7:0] $end
-   $var wire  8 8' sub5_out[0][2] [7:0] $end
-   $var wire  8 9' sub5_out[1][0] [7:0] $end
-   $var wire  8 :' sub5_out[1][1] [7:0] $end
-   $var wire  8 ;' sub5_out[1][2] [7:0] $end
-   $scope module i_sub5 $end
-    $var wire  1 B' clk $end
-    $var wire 128 |& in[0][0] [127:0] $end
-    $var wire 128 "' in[0][1] [127:0] $end
-    $var wire 128 &' in[0][2] [127:0] $end
-    $var wire 128 *' in[1][0] [127:0] $end
-    $var wire 128 .' in[1][1] [127:0] $end
-    $var wire 128 2' in[1][2] [127:0] $end
-    $var wire  8 <' out[0][0] [7:0] $end
-    $var wire  8 =' out[0][1] [7:0] $end
-    $var wire  8 >' out[0][2] [7:0] $end
-    $var wire  8 ?' out[1][0] [7:0] $end
-    $var wire  8 @' out[1][1] [7:0] $end
-    $var wire  8 A' out[1][2] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 y& i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 z& j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire  8 {& exp [7:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 b' clk $end
-  $var wire 128 c' in[0][0] [127:0] $end
-  $var wire 128 g' in[0][1] [127:0] $end
-  $var wire 128 k' in[0][2] [127:0] $end
-  $var wire 128 o' in[1][0] [127:0] $end
-  $var wire 128 s' in[1][1] [127:0] $end
-  $var wire 128 w' in[1][2] [127:0] $end
-  $var wire  8 {' out[0][0] [7:0] $end
-  $var wire  8 |' out[0][1] [7:0] $end
-  $var wire  8 }' out[0][2] [7:0] $end
-  $var wire  8 ~' out[1][0] [7:0] $end
-  $var wire  8 !( out[1][1] [7:0] $end
-  $var wire  8 "( out[1][2] [7:0] $end
-  $scope module sub5 $end
-   $var wire  1 b' clk $end
-   $var wire 32 [' count [31:0] $end
-   $var wire 128 c' in[0][0] [127:0] $end
-   $var wire 128 g' in[0][1] [127:0] $end
-   $var wire 128 k' in[0][2] [127:0] $end
-   $var wire 128 o' in[1][0] [127:0] $end
-   $var wire 128 s' in[1][1] [127:0] $end
-   $var wire 128 w' in[1][2] [127:0] $end
-   $var wire  8 {' out[0][0] [7:0] $end
-   $var wire  8 |' out[0][1] [7:0] $end
-   $var wire  8 }' out[0][2] [7:0] $end
-   $var wire  8 ~' out[1][0] [7:0] $end
-   $var wire  8 !( out[1][1] [7:0] $end
-   $var wire  8 "( out[1][2] [7:0] $end
-   $var wire  8 K' val0[0] [7:0] $end
-   $var wire  8 L' val0[1] [7:0] $end
-   $var wire  8 M' val1[0] [7:0] $end
-   $var wire  8 N' val1[1] [7:0] $end
-   $var wire  8 O' val2[0] [7:0] $end
-   $var wire  8 P' val2[1] [7:0] $end
-   $var wire  8 Q' val3[0] [7:0] $end
-   $var wire  8 R' val3[1] [7:0] $end
-   $scope module i_sub0 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 S' out[0] [7:0] $end
-    $var wire  8 T' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub1 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 U' out[0] [7:0] $end
-    $var wire  8 V' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub2 $end
-    $var wire 32 #( P0 [31:0] $end
-    $var wire 32 $( P1 [31:0] $end
-    $var wire  8 W' out[0] [7:0] $end
-    $var wire  8 X' out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub3 $end
-    $var wire  8 Y' out[0] [7:0] $end
-    $var wire  8 Z' out[1] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 \' i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 ]' j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire 128 ^' exp [127:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 &( out[0] [7:0] $end
-  $var wire  8 '( out[1] [7:0] $end
-  $scope module sub6_9 $end
-   $var wire 32 (( P0 [31:0] $end
-   $var wire 32 )( P1 [31:0] $end
-   $var wire  8 &( out[0] [7:0] $end
-   $var wire  8 '( out[1] [7:0] $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
-  $var wire  1 l( clk $end
-  $var wire  8 m( in [7:0] $end
-  $var wire  8 n( out [7:0] $end
-  $scope module sub4_b $end
-   $var wire 32 o( P0 [31:0] $end
-   $var real 64 p( P1 $end
-   $var real 64 r( P3 $end
-   $var wire  1 l( clk $end
-   $var wire 32 D( count [31:0] $end
-   $var wire  8 +( ff [7:0] $end
-   $var wire  8 m( in [7:0] $end
-   $var wire  8 n( out [7:0] $end
-   $var wire 128 ,( sub5_in[0][0] [127:0] $end
-   $var wire 128 0( sub5_in[0][1] [127:0] $end
-   $var wire 128 4( sub5_in[0][2] [127:0] $end
-   $var wire 128 8( sub5_in[1][0] [127:0] $end
-   $var wire 128 <( sub5_in[1][1] [127:0] $end
-   $var wire 128 @( sub5_in[1][2] [127:0] $end
-   $var wire  8 `( sub5_out[0][0] [7:0] $end
-   $var wire  8 a( sub5_out[0][1] [7:0] $end
-   $var wire  8 b( sub5_out[0][2] [7:0] $end
-   $var wire  8 c( sub5_out[1][0] [7:0] $end
-   $var wire  8 d( sub5_out[1][1] [7:0] $end
-   $var wire  8 e( sub5_out[1][2] [7:0] $end
-   $scope module i_sub5 $end
-    $var wire  1 l( clk $end
-    $var wire 128 H( in[0][0] [127:0] $end
-    $var wire 128 L( in[0][1] [127:0] $end
-    $var wire 128 P( in[0][2] [127:0] $end
-    $var wire 128 T( in[1][0] [127:0] $end
-    $var wire 128 X( in[1][1] [127:0] $end
-    $var wire 128 \( in[1][2] [127:0] $end
-    $var wire  8 f( out[0][0] [7:0] $end
-    $var wire  8 g( out[0][1] [7:0] $end
-    $var wire  8 h( out[0][2] [7:0] $end
-    $var wire  8 i( out[1][0] [7:0] $end
-    $var wire  8 j( out[1][1] [7:0] $end
-    $var wire  8 k( out[1][2] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 E( i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 F( j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire  8 G( exp [7:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 .) clk $end
-  $var wire 128 /) in[0][0] [127:0] $end
-  $var wire 128 3) in[0][1] [127:0] $end
-  $var wire 128 7) in[0][2] [127:0] $end
-  $var wire 128 ;) in[1][0] [127:0] $end
-  $var wire 128 ?) in[1][1] [127:0] $end
-  $var wire 128 C) in[1][2] [127:0] $end
-  $var wire  8 G) out[0][0] [7:0] $end
-  $var wire  8 H) out[0][1] [7:0] $end
-  $var wire  8 I) out[0][2] [7:0] $end
-  $var wire  8 J) out[1][0] [7:0] $end
-  $var wire  8 K) out[1][1] [7:0] $end
-  $var wire  8 L) out[1][2] [7:0] $end
-  $scope module sub5 $end
-   $var wire  1 .) clk $end
-   $var wire 32 ') count [31:0] $end
-   $var wire 128 /) in[0][0] [127:0] $end
-   $var wire 128 3) in[0][1] [127:0] $end
-   $var wire 128 7) in[0][2] [127:0] $end
-   $var wire 128 ;) in[1][0] [127:0] $end
-   $var wire 128 ?) in[1][1] [127:0] $end
-   $var wire 128 C) in[1][2] [127:0] $end
-   $var wire  8 G) out[0][0] [7:0] $end
-   $var wire  8 H) out[0][1] [7:0] $end
-   $var wire  8 I) out[0][2] [7:0] $end
-   $var wire  8 J) out[1][0] [7:0] $end
-   $var wire  8 K) out[1][1] [7:0] $end
-   $var wire  8 L) out[1][2] [7:0] $end
-   $var wire  8 u( val0[0] [7:0] $end
-   $var wire  8 v( val0[1] [7:0] $end
-   $var wire  8 w( val1[0] [7:0] $end
-   $var wire  8 x( val1[1] [7:0] $end
-   $var wire  8 y( val2[0] [7:0] $end
-   $var wire  8 z( val2[1] [7:0] $end
-   $var wire  8 {( val3[0] [7:0] $end
-   $var wire  8 |( val3[1] [7:0] $end
-   $scope module i_sub0 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 }( out[0] [7:0] $end
-    $var wire  8 ~( out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub1 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 !) out[0] [7:0] $end
-    $var wire  8 ") out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub2 $end
-    $var wire 32 M) P0 [31:0] $end
-    $var wire 32 N) P1 [31:0] $end
-    $var wire  8 #) out[0] [7:0] $end
-    $var wire  8 $) out[1] [7:0] $end
-   $upscope $end
-   $scope module i_sub3 $end
-    $var wire  8 %) out[0] [7:0] $end
-    $var wire  8 &) out[1] [7:0] $end
-   $upscope $end
-   $scope module unnamedblk1 $end
-    $var wire 32 () i [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 )) j [31:0] $end
-     $scope module unnamedblk3 $end
-      $var wire 128 *) exp [127:0] $end
-     $upscope $end
-    $upscope $end
-   $upscope $end
-  $upscope $end
- $upscope $end
- $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 P) out[0] [7:0] $end
-  $var wire  8 Q) out[1] [7:0] $end
-  $scope module sub6_9 $end
-   $var wire 32 R) P0 [31:0] $end
-   $var wire 32 S) P1 [31:0] $end
-   $var wire  8 P) out[0] [7:0] $end
-   $var wire  8 Q) out[1] [7:0] $end
+   $var wire 32 C# P0 [31:0] $end
+   $var wire 32 D# P1 [31:0] $end
+   $var wire 8 A# out[0] [7:0] $end
+   $var wire 8 B# out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2 $end
-  $var wire  1 S# clk $end
-  $var wire  8 T# in [7:0] $end
-  $var wire  8 U# out [7:0] $end
+  $var wire 1 F# clk $end
+  $var wire 8 G# in [7:0] $end
+  $var wire 8 H# out [7:0] $end
   $scope module sub3_2 $end
-   $var wire  8 Y# P0 [7:0] $end
-   $var wire 32 Z# UNPACKED_ARRAY[0] [31:0] $end
-   $var wire 32 [# UNPACKED_ARRAY[1] [31:0] $end
-   $var wire 16 \# UNUSED [15:0] $end
-   $var wire  1 S# clk $end
-   $var wire  8 V# ff [7:0] $end
-   $var wire  8 T# in [7:0] $end
-   $var wire  8 U# out [7:0] $end
-   $var wire  8 W# out4 [7:0] $end
-   $var wire  8 X# out4_2 [7:0] $end
+   $var wire 8 K# P0 [7:0] $end
+   $var wire 32 L# UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 M# UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 N# UNUSED [15:0] $end
+   $var wire 1 F# clk $end
+   $var wire 8 G# in [7:0] $end
+   $var wire 8 H# out [7:0] $end
+   $var wire 8 I# ff [7:0] $end
+   $var wire 8 H# out4 [7:0] $end
+   $var wire 8 J# out4_2 [7:0] $end
    $scope module i_sub4_0 $end
-    $var wire  1 S# clk $end
-    $var wire  8 V# in [7:0] $end
-    $var wire  8 W# out [7:0] $end
+    $var wire 1 F# clk $end
+    $var wire 8 I# in [7:0] $end
+    $var wire 8 H# out [7:0] $end
    $upscope $end
    $scope module i_sub4_1 $end
-    $var wire  1 S# clk $end
-    $var wire  8 V# in [7:0] $end
-    $var wire  8 X# out [7:0] $end
+    $var wire 1 F# clk $end
+    $var wire 8 I# in [7:0] $end
+    $var wire 8 J# out [7:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0 $end
-  $var wire  1 A$ clk $end
-  $var wire  8 B$ in [7:0] $end
-  $var wire  8 C$ out [7:0] $end
+  $var wire 1 3$ clk $end
+  $var wire 8 4$ in [7:0] $end
+  $var wire 8 5$ out [7:0] $end
   $scope module sub4_2 $end
-   $var wire 32 D$ P0 [31:0] $end
-   $var real 64 E$ P1 $end
-   $var real 64 G$ P3 $end
-   $var wire  1 A$ clk $end
-   $var wire 32 w# count [31:0] $end
-   $var wire  8 ^# ff [7:0] $end
-   $var wire  8 B$ in [7:0] $end
-   $var wire  8 C$ out [7:0] $end
-   $var wire 128 _# sub5_in[0][0] [127:0] $end
-   $var wire 128 c# sub5_in[0][1] [127:0] $end
-   $var wire 128 g# sub5_in[0][2] [127:0] $end
-   $var wire 128 k# sub5_in[1][0] [127:0] $end
-   $var wire 128 o# sub5_in[1][1] [127:0] $end
-   $var wire 128 s# sub5_in[1][2] [127:0] $end
-   $var wire  8 5$ sub5_out[0][0] [7:0] $end
-   $var wire  8 6$ sub5_out[0][1] [7:0] $end
-   $var wire  8 7$ sub5_out[0][2] [7:0] $end
-   $var wire  8 8$ sub5_out[1][0] [7:0] $end
-   $var wire  8 9$ sub5_out[1][1] [7:0] $end
-   $var wire  8 :$ sub5_out[1][2] [7:0] $end
+   $var wire 32 6$ P0 [31:0] $end
+   $var real 64 7$ P1 $end
+   $var real 64 9$ P3 $end
+   $var wire 1 3$ clk $end
+   $var wire 8 4$ in [7:0] $end
+   $var wire 8 5$ out [7:0] $end
+   $var wire 8 P# ff [7:0] $end
+   $var wire 128 Q# sub5_in[0][0] [127:0] $end
+   $var wire 128 U# sub5_in[0][1] [127:0] $end
+   $var wire 128 Y# sub5_in[0][2] [127:0] $end
+   $var wire 128 ]# sub5_in[1][0] [127:0] $end
+   $var wire 128 a# sub5_in[1][1] [127:0] $end
+   $var wire 128 e# sub5_in[1][2] [127:0] $end
+   $var wire 8 '$ sub5_out[0][0] [7:0] $end
+   $var wire 8 ($ sub5_out[0][1] [7:0] $end
+   $var wire 8 )$ sub5_out[0][2] [7:0] $end
+   $var wire 8 *$ sub5_out[1][0] [7:0] $end
+   $var wire 8 +$ sub5_out[1][1] [7:0] $end
+   $var wire 8 ,$ sub5_out[1][2] [7:0] $end
+   $var wire 32 i# count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 A$ clk $end
-    $var wire 128 {# in[0][0] [127:0] $end
-    $var wire 128 !$ in[0][1] [127:0] $end
-    $var wire 128 %$ in[0][2] [127:0] $end
-    $var wire 128 )$ in[1][0] [127:0] $end
-    $var wire 128 -$ in[1][1] [127:0] $end
-    $var wire 128 1$ in[1][2] [127:0] $end
-    $var wire  8 ;$ out[0][0] [7:0] $end
-    $var wire  8 <$ out[0][1] [7:0] $end
-    $var wire  8 =$ out[0][2] [7:0] $end
-    $var wire  8 >$ out[1][0] [7:0] $end
-    $var wire  8 ?$ out[1][1] [7:0] $end
-    $var wire  8 @$ out[1][2] [7:0] $end
+    $var wire 1 3$ clk $end
+    $var wire 128 m# in[0][0] [127:0] $end
+    $var wire 128 q# in[0][1] [127:0] $end
+    $var wire 128 u# in[0][2] [127:0] $end
+    $var wire 128 y# in[1][0] [127:0] $end
+    $var wire 128 }# in[1][1] [127:0] $end
+    $var wire 128 #$ in[1][2] [127:0] $end
+    $var wire 8 -$ out[0][0] [7:0] $end
+    $var wire 8 .$ out[0][1] [7:0] $end
+    $var wire 8 /$ out[0][2] [7:0] $end
+    $var wire 8 0$ out[1][0] [7:0] $end
+    $var wire 8 1$ out[1][1] [7:0] $end
+    $var wire 8 2$ out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 x# i [31:0] $end
+    $var wire 32 j# i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 y# j [31:0] $end
+     $var wire 32 k# j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 z# exp [7:0] $end
+      $var wire 8 l# exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5 $end
-  $var wire  1 a$ clk $end
-  $var wire 128 b$ in[0][0] [127:0] $end
-  $var wire 128 f$ in[0][1] [127:0] $end
-  $var wire 128 j$ in[0][2] [127:0] $end
-  $var wire 128 n$ in[1][0] [127:0] $end
-  $var wire 128 r$ in[1][1] [127:0] $end
-  $var wire 128 v$ in[1][2] [127:0] $end
-  $var wire  8 z$ out[0][0] [7:0] $end
-  $var wire  8 {$ out[0][1] [7:0] $end
-  $var wire  8 |$ out[0][2] [7:0] $end
-  $var wire  8 }$ out[1][0] [7:0] $end
-  $var wire  8 ~$ out[1][1] [7:0] $end
-  $var wire  8 !% out[1][2] [7:0] $end
+  $var wire 1 M$ clk $end
+  $var wire 128 N$ in[0][0] [127:0] $end
+  $var wire 128 R$ in[0][1] [127:0] $end
+  $var wire 128 V$ in[0][2] [127:0] $end
+  $var wire 128 Z$ in[1][0] [127:0] $end
+  $var wire 128 ^$ in[1][1] [127:0] $end
+  $var wire 128 b$ in[1][2] [127:0] $end
+  $var wire 8 f$ out[0][0] [7:0] $end
+  $var wire 8 g$ out[0][1] [7:0] $end
+  $var wire 8 h$ out[0][2] [7:0] $end
+  $var wire 8 i$ out[1][0] [7:0] $end
+  $var wire 8 j$ out[1][1] [7:0] $end
+  $var wire 8 k$ out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 a$ clk $end
-   $var wire 32 Z$ count [31:0] $end
-   $var wire 128 b$ in[0][0] [127:0] $end
-   $var wire 128 f$ in[0][1] [127:0] $end
-   $var wire 128 j$ in[0][2] [127:0] $end
-   $var wire 128 n$ in[1][0] [127:0] $end
-   $var wire 128 r$ in[1][1] [127:0] $end
-   $var wire 128 v$ in[1][2] [127:0] $end
-   $var wire  8 z$ out[0][0] [7:0] $end
-   $var wire  8 {$ out[0][1] [7:0] $end
-   $var wire  8 |$ out[0][2] [7:0] $end
-   $var wire  8 }$ out[1][0] [7:0] $end
-   $var wire  8 ~$ out[1][1] [7:0] $end
-   $var wire  8 !% out[1][2] [7:0] $end
-   $var wire  8 J$ val0[0] [7:0] $end
-   $var wire  8 K$ val0[1] [7:0] $end
-   $var wire  8 L$ val1[0] [7:0] $end
-   $var wire  8 M$ val1[1] [7:0] $end
-   $var wire  8 N$ val2[0] [7:0] $end
-   $var wire  8 O$ val2[1] [7:0] $end
-   $var wire  8 P$ val3[0] [7:0] $end
-   $var wire  8 Q$ val3[1] [7:0] $end
+   $var wire 1 M$ clk $end
+   $var wire 128 N$ in[0][0] [127:0] $end
+   $var wire 128 R$ in[0][1] [127:0] $end
+   $var wire 128 V$ in[0][2] [127:0] $end
+   $var wire 128 Z$ in[1][0] [127:0] $end
+   $var wire 128 ^$ in[1][1] [127:0] $end
+   $var wire 128 b$ in[1][2] [127:0] $end
+   $var wire 8 f$ out[0][0] [7:0] $end
+   $var wire 8 g$ out[0][1] [7:0] $end
+   $var wire 8 h$ out[0][2] [7:0] $end
+   $var wire 8 i$ out[1][0] [7:0] $end
+   $var wire 8 j$ out[1][1] [7:0] $end
+   $var wire 8 k$ out[1][2] [7:0] $end
+   $var wire 32 F$ count [31:0] $end
+   $var wire 8 <$ val0[0] [7:0] $end
+   $var wire 8 =$ val0[1] [7:0] $end
+   $var wire 8 >$ val1[0] [7:0] $end
+   $var wire 8 ?$ val1[1] [7:0] $end
+   $var wire 8 @$ val2[0] [7:0] $end
+   $var wire 8 A$ val2[1] [7:0] $end
+   $var wire 8 B$ val3[0] [7:0] $end
+   $var wire 8 C$ val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 R$ out[0] [7:0] $end
-    $var wire  8 S$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 <$ out[0] [7:0] $end
+    $var wire 8 =$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 T$ out[0] [7:0] $end
-    $var wire  8 U$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 >$ out[0] [7:0] $end
+    $var wire 8 ?$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 "% P0 [31:0] $end
-    $var wire 32 #% P1 [31:0] $end
-    $var wire  8 V$ out[0] [7:0] $end
-    $var wire  8 W$ out[1] [7:0] $end
+    $var wire 32 l$ P0 [31:0] $end
+    $var wire 32 m$ P1 [31:0] $end
+    $var wire 8 @$ out[0] [7:0] $end
+    $var wire 8 A$ out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 X$ out[0] [7:0] $end
-    $var wire  8 Y$ out[1] [7:0] $end
+    $var wire 8 D$ out[0] [7:0] $end
+    $var wire 8 E$ out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 [$ i [31:0] $end
+    $var wire 32 G$ i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 \$ j [31:0] $end
+     $var wire 32 H$ j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 ]$ exp [127:0] $end
+      $var wire 128 I$ exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
-  $var wire  8 %% out[0] [7:0] $end
-  $var wire  8 &% out[1] [7:0] $end
+  $var wire 8 o$ out[0] [7:0] $end
+  $var wire 8 p$ out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 '% P0 [31:0] $end
-   $var wire 32 (% P1 [31:0] $end
-   $var wire  8 %% out[0] [7:0] $end
-   $var wire  8 &% out[1] [7:0] $end
+   $var wire 32 q$ P0 [31:0] $end
+   $var wire 32 r$ P1 [31:0] $end
+   $var wire 8 o$ out[0] [7:0] $end
+   $var wire 8 p$ out[1] [7:0] $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1 $end
-  $var wire  1 k% clk $end
-  $var wire  8 l% in [7:0] $end
-  $var wire  8 m% out [7:0] $end
+  $var wire 1 W% clk $end
+  $var wire 8 X% in [7:0] $end
+  $var wire 8 Y% out [7:0] $end
   $scope module sub4_b $end
-   $var wire 32 n% P0 [31:0] $end
-   $var real 64 o% P1 $end
-   $var real 64 q% P3 $end
-   $var wire  1 k% clk $end
-   $var wire 32 C% count [31:0] $end
-   $var wire  8 *% ff [7:0] $end
-   $var wire  8 l% in [7:0] $end
-   $var wire  8 m% out [7:0] $end
-   $var wire 128 +% sub5_in[0][0] [127:0] $end
-   $var wire 128 /% sub5_in[0][1] [127:0] $end
-   $var wire 128 3% sub5_in[0][2] [127:0] $end
-   $var wire 128 7% sub5_in[1][0] [127:0] $end
-   $var wire 128 ;% sub5_in[1][1] [127:0] $end
-   $var wire 128 ?% sub5_in[1][2] [127:0] $end
-   $var wire  8 _% sub5_out[0][0] [7:0] $end
-   $var wire  8 `% sub5_out[0][1] [7:0] $end
-   $var wire  8 a% sub5_out[0][2] [7:0] $end
-   $var wire  8 b% sub5_out[1][0] [7:0] $end
-   $var wire  8 c% sub5_out[1][1] [7:0] $end
-   $var wire  8 d% sub5_out[1][2] [7:0] $end
+   $var wire 32 Z% P0 [31:0] $end
+   $var real 64 [% P1 $end
+   $var real 64 ]% P3 $end
+   $var wire 1 W% clk $end
+   $var wire 8 X% in [7:0] $end
+   $var wire 8 Y% out [7:0] $end
+   $var wire 8 t$ ff [7:0] $end
+   $var wire 128 u$ sub5_in[0][0] [127:0] $end
+   $var wire 128 y$ sub5_in[0][1] [127:0] $end
+   $var wire 128 }$ sub5_in[0][2] [127:0] $end
+   $var wire 128 #% sub5_in[1][0] [127:0] $end
+   $var wire 128 '% sub5_in[1][1] [127:0] $end
+   $var wire 128 +% sub5_in[1][2] [127:0] $end
+   $var wire 8 K% sub5_out[0][0] [7:0] $end
+   $var wire 8 L% sub5_out[0][1] [7:0] $end
+   $var wire 8 M% sub5_out[0][2] [7:0] $end
+   $var wire 8 N% sub5_out[1][0] [7:0] $end
+   $var wire 8 O% sub5_out[1][1] [7:0] $end
+   $var wire 8 P% sub5_out[1][2] [7:0] $end
+   $var wire 32 /% count [31:0] $end
    $scope module i_sub5 $end
-    $var wire  1 k% clk $end
-    $var wire 128 G% in[0][0] [127:0] $end
-    $var wire 128 K% in[0][1] [127:0] $end
-    $var wire 128 O% in[0][2] [127:0] $end
-    $var wire 128 S% in[1][0] [127:0] $end
-    $var wire 128 W% in[1][1] [127:0] $end
-    $var wire 128 [% in[1][2] [127:0] $end
-    $var wire  8 e% out[0][0] [7:0] $end
-    $var wire  8 f% out[0][1] [7:0] $end
-    $var wire  8 g% out[0][2] [7:0] $end
-    $var wire  8 h% out[1][0] [7:0] $end
-    $var wire  8 i% out[1][1] [7:0] $end
-    $var wire  8 j% out[1][2] [7:0] $end
+    $var wire 1 W% clk $end
+    $var wire 128 3% in[0][0] [127:0] $end
+    $var wire 128 7% in[0][1] [127:0] $end
+    $var wire 128 ;% in[0][2] [127:0] $end
+    $var wire 128 ?% in[1][0] [127:0] $end
+    $var wire 128 C% in[1][1] [127:0] $end
+    $var wire 128 G% in[1][2] [127:0] $end
+    $var wire 8 Q% out[0][0] [7:0] $end
+    $var wire 8 R% out[0][1] [7:0] $end
+    $var wire 8 S% out[0][2] [7:0] $end
+    $var wire 8 T% out[1][0] [7:0] $end
+    $var wire 8 U% out[1][1] [7:0] $end
+    $var wire 8 V% out[1][2] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 D% i [31:0] $end
+    $var wire 32 0% i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 E% j [31:0] $end
+     $var wire 32 1% j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire  8 F% exp [7:0] $end
+      $var wire 8 2% exp [7:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5 $end
-  $var wire  1 -& clk $end
-  $var wire 128 .& in[0][0] [127:0] $end
-  $var wire 128 2& in[0][1] [127:0] $end
-  $var wire 128 6& in[0][2] [127:0] $end
-  $var wire 128 :& in[1][0] [127:0] $end
-  $var wire 128 >& in[1][1] [127:0] $end
-  $var wire 128 B& in[1][2] [127:0] $end
-  $var wire  8 F& out[0][0] [7:0] $end
-  $var wire  8 G& out[0][1] [7:0] $end
-  $var wire  8 H& out[0][2] [7:0] $end
-  $var wire  8 I& out[1][0] [7:0] $end
-  $var wire  8 J& out[1][1] [7:0] $end
-  $var wire  8 K& out[1][2] [7:0] $end
+  $var wire 1 q% clk $end
+  $var wire 128 r% in[0][0] [127:0] $end
+  $var wire 128 v% in[0][1] [127:0] $end
+  $var wire 128 z% in[0][2] [127:0] $end
+  $var wire 128 ~% in[1][0] [127:0] $end
+  $var wire 128 $& in[1][1] [127:0] $end
+  $var wire 128 (& in[1][2] [127:0] $end
+  $var wire 8 ,& out[0][0] [7:0] $end
+  $var wire 8 -& out[0][1] [7:0] $end
+  $var wire 8 .& out[0][2] [7:0] $end
+  $var wire 8 /& out[1][0] [7:0] $end
+  $var wire 8 0& out[1][1] [7:0] $end
+  $var wire 8 1& out[1][2] [7:0] $end
   $scope module sub5 $end
-   $var wire  1 -& clk $end
-   $var wire 32 && count [31:0] $end
-   $var wire 128 .& in[0][0] [127:0] $end
-   $var wire 128 2& in[0][1] [127:0] $end
-   $var wire 128 6& in[0][2] [127:0] $end
-   $var wire 128 :& in[1][0] [127:0] $end
-   $var wire 128 >& in[1][1] [127:0] $end
-   $var wire 128 B& in[1][2] [127:0] $end
-   $var wire  8 F& out[0][0] [7:0] $end
-   $var wire  8 G& out[0][1] [7:0] $end
-   $var wire  8 H& out[0][2] [7:0] $end
-   $var wire  8 I& out[1][0] [7:0] $end
-   $var wire  8 J& out[1][1] [7:0] $end
-   $var wire  8 K& out[1][2] [7:0] $end
-   $var wire  8 t% val0[0] [7:0] $end
-   $var wire  8 u% val0[1] [7:0] $end
-   $var wire  8 v% val1[0] [7:0] $end
-   $var wire  8 w% val1[1] [7:0] $end
-   $var wire  8 x% val2[0] [7:0] $end
-   $var wire  8 y% val2[1] [7:0] $end
-   $var wire  8 z% val3[0] [7:0] $end
-   $var wire  8 {% val3[1] [7:0] $end
+   $var wire 1 q% clk $end
+   $var wire 128 r% in[0][0] [127:0] $end
+   $var wire 128 v% in[0][1] [127:0] $end
+   $var wire 128 z% in[0][2] [127:0] $end
+   $var wire 128 ~% in[1][0] [127:0] $end
+   $var wire 128 $& in[1][1] [127:0] $end
+   $var wire 128 (& in[1][2] [127:0] $end
+   $var wire 8 ,& out[0][0] [7:0] $end
+   $var wire 8 -& out[0][1] [7:0] $end
+   $var wire 8 .& out[0][2] [7:0] $end
+   $var wire 8 /& out[1][0] [7:0] $end
+   $var wire 8 0& out[1][1] [7:0] $end
+   $var wire 8 1& out[1][2] [7:0] $end
+   $var wire 32 j% count [31:0] $end
+   $var wire 8 `% val0[0] [7:0] $end
+   $var wire 8 a% val0[1] [7:0] $end
+   $var wire 8 b% val1[0] [7:0] $end
+   $var wire 8 c% val1[1] [7:0] $end
+   $var wire 8 d% val2[0] [7:0] $end
+   $var wire 8 e% val2[1] [7:0] $end
+   $var wire 8 f% val3[0] [7:0] $end
+   $var wire 8 g% val3[1] [7:0] $end
    $scope module i_sub0 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 |% out[0] [7:0] $end
-    $var wire  8 }% out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 `% out[0] [7:0] $end
+    $var wire 8 a% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub1 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 ~% out[0] [7:0] $end
-    $var wire  8 !& out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 b% out[0] [7:0] $end
+    $var wire 8 c% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub2 $end
-    $var wire 32 L& P0 [31:0] $end
-    $var wire 32 M& P1 [31:0] $end
-    $var wire  8 "& out[0] [7:0] $end
-    $var wire  8 #& out[1] [7:0] $end
+    $var wire 32 2& P0 [31:0] $end
+    $var wire 32 3& P1 [31:0] $end
+    $var wire 8 d% out[0] [7:0] $end
+    $var wire 8 e% out[1] [7:0] $end
    $upscope $end
    $scope module i_sub3 $end
-    $var wire  8 $& out[0] [7:0] $end
-    $var wire  8 %& out[1] [7:0] $end
+    $var wire 8 h% out[0] [7:0] $end
+    $var wire 8 i% out[1] [7:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 '& i [31:0] $end
+    $var wire 32 k% i [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 (& j [31:0] $end
+     $var wire 32 l% j [31:0] $end
      $scope module unnamedblk3 $end
-      $var wire 128 )& exp [127:0] $end
+      $var wire 128 m% exp [127:0] $end
      $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module top.t.i_sub3_2.sub3_2.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
-  $var wire  8 O& out[0] [7:0] $end
-  $var wire  8 P& out[1] [7:0] $end
+  $var wire 8 5& out[0] [7:0] $end
+  $var wire 8 6& out[1] [7:0] $end
   $scope module sub6_9 $end
-   $var wire 32 Q& P0 [31:0] $end
-   $var wire 32 R& P1 [31:0] $end
-   $var wire  8 O& out[0] [7:0] $end
-   $var wire  8 P& out[1] [7:0] $end
+   $var wire 32 7& P0 [31:0] $end
+   $var wire 32 8& P1 [31:0] $end
+   $var wire 8 5& out[0] [7:0] $end
+   $var wire 8 6& out[1] [7:0] $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3 $end
+  $var wire 1 :& clk $end
+  $var wire 8 ;& in [7:0] $end
+  $var wire 8 <& out [7:0] $end
+  $scope module sub3_d $end
+   $var wire 8 ?& P0 [7:0] $end
+   $var wire 32 @& UNPACKED_ARRAY[0] [31:0] $end
+   $var wire 32 A& UNPACKED_ARRAY[1] [31:0] $end
+   $var wire 16 B& UNUSED [15:0] $end
+   $var wire 1 :& clk $end
+   $var wire 8 ;& in [7:0] $end
+   $var wire 8 <& out [7:0] $end
+   $var wire 8 =& ff [7:0] $end
+   $var wire 8 <& out4 [7:0] $end
+   $var wire 8 >& out4_2 [7:0] $end
+   $scope module i_sub4_0 $end
+    $var wire 1 :& clk $end
+    $var wire 8 =& in [7:0] $end
+    $var wire 8 <& out [7:0] $end
+   $upscope $end
+   $scope module i_sub4_1 $end
+    $var wire 1 :& clk $end
+    $var wire 8 =& in [7:0] $end
+    $var wire 8 >& out [7:0] $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0 $end
+  $var wire 1 '' clk $end
+  $var wire 8 (' in [7:0] $end
+  $var wire 8 )' out [7:0] $end
+  $scope module sub4_2 $end
+   $var wire 32 *' P0 [31:0] $end
+   $var real 64 +' P1 $end
+   $var real 64 -' P3 $end
+   $var wire 1 '' clk $end
+   $var wire 8 (' in [7:0] $end
+   $var wire 8 )' out [7:0] $end
+   $var wire 8 D& ff [7:0] $end
+   $var wire 128 E& sub5_in[0][0] [127:0] $end
+   $var wire 128 I& sub5_in[0][1] [127:0] $end
+   $var wire 128 M& sub5_in[0][2] [127:0] $end
+   $var wire 128 Q& sub5_in[1][0] [127:0] $end
+   $var wire 128 U& sub5_in[1][1] [127:0] $end
+   $var wire 128 Y& sub5_in[1][2] [127:0] $end
+   $var wire 8 y& sub5_out[0][0] [7:0] $end
+   $var wire 8 z& sub5_out[0][1] [7:0] $end
+   $var wire 8 {& sub5_out[0][2] [7:0] $end
+   $var wire 8 |& sub5_out[1][0] [7:0] $end
+   $var wire 8 }& sub5_out[1][1] [7:0] $end
+   $var wire 8 ~& sub5_out[1][2] [7:0] $end
+   $var wire 32 ]& count [31:0] $end
+   $scope module i_sub5 $end
+    $var wire 1 '' clk $end
+    $var wire 128 a& in[0][0] [127:0] $end
+    $var wire 128 e& in[0][1] [127:0] $end
+    $var wire 128 i& in[0][2] [127:0] $end
+    $var wire 128 m& in[1][0] [127:0] $end
+    $var wire 128 q& in[1][1] [127:0] $end
+    $var wire 128 u& in[1][2] [127:0] $end
+    $var wire 8 !' out[0][0] [7:0] $end
+    $var wire 8 "' out[0][1] [7:0] $end
+    $var wire 8 #' out[0][2] [7:0] $end
+    $var wire 8 $' out[1][0] [7:0] $end
+    $var wire 8 %' out[1][1] [7:0] $end
+    $var wire 8 &' out[1][2] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 ^& i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 _& j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 8 `& exp [7:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5 $end
+  $var wire 1 A' clk $end
+  $var wire 128 B' in[0][0] [127:0] $end
+  $var wire 128 F' in[0][1] [127:0] $end
+  $var wire 128 J' in[0][2] [127:0] $end
+  $var wire 128 N' in[1][0] [127:0] $end
+  $var wire 128 R' in[1][1] [127:0] $end
+  $var wire 128 V' in[1][2] [127:0] $end
+  $var wire 8 Z' out[0][0] [7:0] $end
+  $var wire 8 [' out[0][1] [7:0] $end
+  $var wire 8 \' out[0][2] [7:0] $end
+  $var wire 8 ]' out[1][0] [7:0] $end
+  $var wire 8 ^' out[1][1] [7:0] $end
+  $var wire 8 _' out[1][2] [7:0] $end
+  $scope module sub5 $end
+   $var wire 1 A' clk $end
+   $var wire 128 B' in[0][0] [127:0] $end
+   $var wire 128 F' in[0][1] [127:0] $end
+   $var wire 128 J' in[0][2] [127:0] $end
+   $var wire 128 N' in[1][0] [127:0] $end
+   $var wire 128 R' in[1][1] [127:0] $end
+   $var wire 128 V' in[1][2] [127:0] $end
+   $var wire 8 Z' out[0][0] [7:0] $end
+   $var wire 8 [' out[0][1] [7:0] $end
+   $var wire 8 \' out[0][2] [7:0] $end
+   $var wire 8 ]' out[1][0] [7:0] $end
+   $var wire 8 ^' out[1][1] [7:0] $end
+   $var wire 8 _' out[1][2] [7:0] $end
+   $var wire 32 :' count [31:0] $end
+   $var wire 8 0' val0[0] [7:0] $end
+   $var wire 8 1' val0[1] [7:0] $end
+   $var wire 8 2' val1[0] [7:0] $end
+   $var wire 8 3' val1[1] [7:0] $end
+   $var wire 8 4' val2[0] [7:0] $end
+   $var wire 8 5' val2[1] [7:0] $end
+   $var wire 8 6' val3[0] [7:0] $end
+   $var wire 8 7' val3[1] [7:0] $end
+   $scope module i_sub0 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 0' out[0] [7:0] $end
+    $var wire 8 1' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub1 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 2' out[0] [7:0] $end
+    $var wire 8 3' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub2 $end
+    $var wire 32 `' P0 [31:0] $end
+    $var wire 32 a' P1 [31:0] $end
+    $var wire 8 4' out[0] [7:0] $end
+    $var wire 8 5' out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $var wire 8 8' out[0] [7:0] $end
+    $var wire 8 9' out[1] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 ;' i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 <' j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 128 =' exp [127:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_0.sub4_2.i_sub5.sub5.i_sub3 $end
+  $var wire 8 c' out[0] [7:0] $end
+  $var wire 8 d' out[1] [7:0] $end
+  $scope module sub6_9 $end
+   $var wire 32 e' P0 [31:0] $end
+   $var wire 32 f' P1 [31:0] $end
+   $var wire 8 c' out[0] [7:0] $end
+   $var wire 8 d' out[1] [7:0] $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1 $end
+  $var wire 1 K( clk $end
+  $var wire 8 L( in [7:0] $end
+  $var wire 8 M( out [7:0] $end
+  $scope module sub4_b $end
+   $var wire 32 N( P0 [31:0] $end
+   $var real 64 O( P1 $end
+   $var real 64 Q( P3 $end
+   $var wire 1 K( clk $end
+   $var wire 8 L( in [7:0] $end
+   $var wire 8 M( out [7:0] $end
+   $var wire 8 h' ff [7:0] $end
+   $var wire 128 i' sub5_in[0][0] [127:0] $end
+   $var wire 128 m' sub5_in[0][1] [127:0] $end
+   $var wire 128 q' sub5_in[0][2] [127:0] $end
+   $var wire 128 u' sub5_in[1][0] [127:0] $end
+   $var wire 128 y' sub5_in[1][1] [127:0] $end
+   $var wire 128 }' sub5_in[1][2] [127:0] $end
+   $var wire 8 ?( sub5_out[0][0] [7:0] $end
+   $var wire 8 @( sub5_out[0][1] [7:0] $end
+   $var wire 8 A( sub5_out[0][2] [7:0] $end
+   $var wire 8 B( sub5_out[1][0] [7:0] $end
+   $var wire 8 C( sub5_out[1][1] [7:0] $end
+   $var wire 8 D( sub5_out[1][2] [7:0] $end
+   $var wire 32 #( count [31:0] $end
+   $scope module i_sub5 $end
+    $var wire 1 K( clk $end
+    $var wire 128 '( in[0][0] [127:0] $end
+    $var wire 128 +( in[0][1] [127:0] $end
+    $var wire 128 /( in[0][2] [127:0] $end
+    $var wire 128 3( in[1][0] [127:0] $end
+    $var wire 128 7( in[1][1] [127:0] $end
+    $var wire 128 ;( in[1][2] [127:0] $end
+    $var wire 8 E( out[0][0] [7:0] $end
+    $var wire 8 F( out[0][1] [7:0] $end
+    $var wire 8 G( out[0][2] [7:0] $end
+    $var wire 8 H( out[1][0] [7:0] $end
+    $var wire 8 I( out[1][1] [7:0] $end
+    $var wire 8 J( out[1][2] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 $( i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 %( j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 8 &( exp [7:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5 $end
+  $var wire 1 e( clk $end
+  $var wire 128 f( in[0][0] [127:0] $end
+  $var wire 128 j( in[0][1] [127:0] $end
+  $var wire 128 n( in[0][2] [127:0] $end
+  $var wire 128 r( in[1][0] [127:0] $end
+  $var wire 128 v( in[1][1] [127:0] $end
+  $var wire 128 z( in[1][2] [127:0] $end
+  $var wire 8 ~( out[0][0] [7:0] $end
+  $var wire 8 !) out[0][1] [7:0] $end
+  $var wire 8 ") out[0][2] [7:0] $end
+  $var wire 8 #) out[1][0] [7:0] $end
+  $var wire 8 $) out[1][1] [7:0] $end
+  $var wire 8 %) out[1][2] [7:0] $end
+  $scope module sub5 $end
+   $var wire 1 e( clk $end
+   $var wire 128 f( in[0][0] [127:0] $end
+   $var wire 128 j( in[0][1] [127:0] $end
+   $var wire 128 n( in[0][2] [127:0] $end
+   $var wire 128 r( in[1][0] [127:0] $end
+   $var wire 128 v( in[1][1] [127:0] $end
+   $var wire 128 z( in[1][2] [127:0] $end
+   $var wire 8 ~( out[0][0] [7:0] $end
+   $var wire 8 !) out[0][1] [7:0] $end
+   $var wire 8 ") out[0][2] [7:0] $end
+   $var wire 8 #) out[1][0] [7:0] $end
+   $var wire 8 $) out[1][1] [7:0] $end
+   $var wire 8 %) out[1][2] [7:0] $end
+   $var wire 32 ^( count [31:0] $end
+   $var wire 8 T( val0[0] [7:0] $end
+   $var wire 8 U( val0[1] [7:0] $end
+   $var wire 8 V( val1[0] [7:0] $end
+   $var wire 8 W( val1[1] [7:0] $end
+   $var wire 8 X( val2[0] [7:0] $end
+   $var wire 8 Y( val2[1] [7:0] $end
+   $var wire 8 Z( val3[0] [7:0] $end
+   $var wire 8 [( val3[1] [7:0] $end
+   $scope module i_sub0 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 T( out[0] [7:0] $end
+    $var wire 8 U( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub1 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 V( out[0] [7:0] $end
+    $var wire 8 W( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub2 $end
+    $var wire 32 &) P0 [31:0] $end
+    $var wire 32 ') P1 [31:0] $end
+    $var wire 8 X( out[0] [7:0] $end
+    $var wire 8 Y( out[1] [7:0] $end
+   $upscope $end
+   $scope module i_sub3 $end
+    $var wire 8 \( out[0] [7:0] $end
+    $var wire 8 ]( out[1] [7:0] $end
+   $upscope $end
+   $scope module unnamedblk1 $end
+    $var wire 32 _( i [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 `( j [31:0] $end
+     $scope module unnamedblk3 $end
+      $var wire 128 a( exp [127:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+ $upscope $end
+ $scope module top.t.i_sub3.sub3_d.i_sub4_1.sub4_b.i_sub5.sub5.i_sub3 $end
+  $var wire 8 )) out[0] [7:0] $end
+  $var wire 8 *) out[1] [7:0] $end
+  $scope module sub6_9 $end
+   $var wire 32 +) P0 [31:0] $end
+   $var wire 32 ,) P1 [31:0] $end
+   $var wire 8 )) out[0] [7:0] $end
+   $var wire 8 *) out[1] [7:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
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diff --git a/test_regress/t/t_interface_ref_trace.out b/test_regress/t/t_interface_ref_trace.out
index 9f59e314d..6cf55743f 100644
--- a/test_regress/t/t_interface_ref_trace.out
+++ b/test_regress/t/t_interface_ref_trace.out
@@ -1,234 +1,297 @@
 $version Generated by VerilatedVcd $end
-$date Thu Apr 14 07:06:40 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 0 clk $end
+  $var wire 1 0 clk $end
   $scope module t $end
-   $var wire  1 0 clk $end
+   $var wire 1 0 clk $end
    $var wire 32 # cyc [31:0] $end
-   $scope module a $end
-    $scope module ac1 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 $ value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 % val100 [31:0] $end
-       $var wire 32 & val200 [31:0] $end
-      $upscope $end
-     $upscope $end
+   $scope module intf_1 $end
+    $var wire 1 0 clk $end
+    $var wire 32 # cyc [31:0] $end
+    $var wire 32 $ value [31:0] $end
+    $scope module the_struct $end
+     $var wire 32 % val100 [31:0] $end
+     $var wire 32 & val200 [31:0] $end
     $upscope $end
-    $scope module ac2 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 ' value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 ( val100 [31:0] $end
-       $var wire 32 ) val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module ac3 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 * value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 + val100 [31:0] $end
-       $var wire 32 , val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module as3 $end
-     $scope module intf_for_struct $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 * value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 + val100 [31:0] $end
-       $var wire 32 , val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_in_sub_all $end
-     $var wire  1 0 clk $end
+    $scope module inner $end
      $var wire 32 # cyc [31:0] $end
-     $var wire 32 * value [31:0] $end
-     $scope module inner $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 3 value [31:0] $end
-     $upscope $end
-     $scope module the_struct $end
-      $var wire 32 + val100 [31:0] $end
-      $var wire 32 , val200 [31:0] $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_one $end
-     $var wire  1 0 clk $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 $ value [31:0] $end
-     $scope module the_struct $end
-      $var wire 32 % val100 [31:0] $end
-      $var wire 32 & val200 [31:0] $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_two $end
-     $var wire  1 0 clk $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 ' value [31:0] $end
-     $scope module the_struct $end
-      $var wire 32 ( val100 [31:0] $end
-      $var wire 32 ) val200 [31:0] $end
-     $upscope $end
+     $var wire 32 1 value [31:0] $end
     $upscope $end
    $upscope $end
-   $scope module abcdefghijklmnopqrstuvwxyz $end
-    $scope module ac1 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 ' value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 ( val100 [31:0] $end
-       $var wire 32 ) val200 [31:0] $end
-      $upscope $end
-     $upscope $end
+   $scope module intf_2 $end
+    $var wire 1 0 clk $end
+    $var wire 32 # cyc [31:0] $end
+    $var wire 32 ' value [31:0] $end
+    $scope module the_struct $end
+     $var wire 32 ( val100 [31:0] $end
+     $var wire 32 ) val200 [31:0] $end
     $upscope $end
-    $scope module ac2 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 $ value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 % val100 [31:0] $end
-       $var wire 32 & val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module ac3 $end
-     $scope module intf_for_check $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 - value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 . val100 [31:0] $end
-       $var wire 32 / val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module as3 $end
-     $scope module intf_for_struct $end
-      $var wire  1 0 clk $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 - value [31:0] $end
-      $scope module the_struct $end
-       $var wire 32 . val100 [31:0] $end
-       $var wire 32 / val200 [31:0] $end
-      $upscope $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_in_sub_all $end
-     $var wire  1 0 clk $end
+    $scope module inner $end
      $var wire 32 # cyc [31:0] $end
-     $var wire 32 - value [31:0] $end
-     $scope module inner $end
-      $var wire 32 # cyc [31:0] $end
-      $var wire 32 4 value [31:0] $end
-     $upscope $end
-     $scope module the_struct $end
-      $var wire 32 . val100 [31:0] $end
-      $var wire 32 / val200 [31:0] $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_one $end
-     $var wire  1 0 clk $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 ' value [31:0] $end
-     $scope module the_struct $end
-      $var wire 32 ( val100 [31:0] $end
-      $var wire 32 ) val200 [31:0] $end
-     $upscope $end
-    $upscope $end
-    $scope module intf_two $end
-     $var wire  1 0 clk $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 $ value [31:0] $end
-     $scope module the_struct $end
-      $var wire 32 % val100 [31:0] $end
-      $var wire 32 & val200 [31:0] $end
-     $upscope $end
+     $var wire 32 2 value [31:0] $end
     $upscope $end
    $upscope $end
    $scope module c1 $end
     $scope module intf_for_check $end
-     $var wire  1 0 clk $end
+     $var wire 1 0 clk $end
      $var wire 32 # cyc [31:0] $end
      $var wire 32 $ value [31:0] $end
      $scope module the_struct $end
       $var wire 32 % val100 [31:0] $end
       $var wire 32 & val200 [31:0] $end
      $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
     $upscope $end
    $upscope $end
    $scope module c2 $end
     $scope module intf_for_check $end
-     $var wire  1 0 clk $end
+     $var wire 1 0 clk $end
      $var wire 32 # cyc [31:0] $end
      $var wire 32 ' value [31:0] $end
      $scope module the_struct $end
       $var wire 32 ( val100 [31:0] $end
       $var wire 32 ) val200 [31:0] $end
      $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
     $upscope $end
    $upscope $end
-   $scope module intf_1 $end
-    $var wire  1 0 clk $end
-    $var wire 32 # cyc [31:0] $end
-    $var wire 32 $ value [31:0] $end
-    $scope module inner $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 1 value [31:0] $end
-    $upscope $end
-    $scope module the_struct $end
-     $var wire 32 % val100 [31:0] $end
-     $var wire 32 & val200 [31:0] $end
-    $upscope $end
-   $upscope $end
-   $scope module intf_2 $end
-    $var wire  1 0 clk $end
-    $var wire 32 # cyc [31:0] $end
-    $var wire 32 ' value [31:0] $end
-    $scope module inner $end
-     $var wire 32 # cyc [31:0] $end
-     $var wire 32 2 value [31:0] $end
-    $upscope $end
-    $scope module the_struct $end
-     $var wire 32 ( val100 [31:0] $end
-     $var wire 32 ) val200 [31:0] $end
-    $upscope $end
-   $upscope $end
-   $scope module s1 $end
-    $scope module intf_for_struct $end
-     $var wire  1 0 clk $end
+   $scope module a $end
+    $scope module intf_one $end
+     $var wire 1 0 clk $end
      $var wire 32 # cyc [31:0] $end
      $var wire 32 $ value [31:0] $end
      $scope module the_struct $end
       $var wire 32 % val100 [31:0] $end
       $var wire 32 & val200 [31:0] $end
      $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
     $upscope $end
-   $upscope $end
-   $scope module s2 $end
-    $scope module intf_for_struct $end
-     $var wire  1 0 clk $end
+    $scope module intf_two $end
+     $var wire 1 0 clk $end
      $var wire 32 # cyc [31:0] $end
      $var wire 32 ' value [31:0] $end
      $scope module the_struct $end
       $var wire 32 ( val100 [31:0] $end
       $var wire 32 ) val200 [31:0] $end
      $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_in_sub_all $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 * value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 + val100 [31:0] $end
+      $var wire 32 , val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 3 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module ac1 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 $ value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 % val100 [31:0] $end
+       $var wire 32 & val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 1 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac2 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 ' value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 ( val100 [31:0] $end
+       $var wire 32 ) val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 2 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac3 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 * value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 + val100 [31:0] $end
+       $var wire 32 , val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 3 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module as3 $end
+     $scope module intf_for_struct $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 * value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 + val100 [31:0] $end
+       $var wire 32 , val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 3 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module abcdefghijklmnopqrstuvwxyz $end
+    $scope module intf_one $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_two $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_in_sub_all $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 - value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 . val100 [31:0] $end
+      $var wire 32 / val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 4 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module ac1 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 ' value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 ( val100 [31:0] $end
+       $var wire 32 ) val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 2 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac2 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 $ value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 % val100 [31:0] $end
+       $var wire 32 & val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 1 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac3 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 - value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 . val100 [31:0] $end
+       $var wire 32 / val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 4 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module as3 $end
+     $scope module intf_for_struct $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 - value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 . val100 [31:0] $end
+       $var wire 32 / val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 4 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module s1 $end
+    $scope module intf_for_struct $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module s2 $end
+    $scope module intf_for_struct $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
     $upscope $end
    $upscope $end
   $upscope $end
diff --git a/test_regress/t/t_interface_ref_trace_fst.out b/test_regress/t/t_interface_ref_trace_fst.out
index 858d03801..c56f4b6c7 100644
--- a/test_regress/t/t_interface_ref_trace_fst.out
+++ b/test_regress/t/t_interface_ref_trace_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Apr 14 07:06:50 2022
+	Tue Oct 24 11:00:16 2023
 
 $end
 $version
@@ -13,15 +13,84 @@ $var wire 1 ! clk $end
 $scope module t $end
 $var wire 1 ! clk $end
 $var integer 32 " cyc [31:0] $end
+$scope interface intf_1 $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_2 $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module a $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 + value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 . value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module ac1 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -29,10 +98,14 @@ $scope module ac2 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -40,10 +113,14 @@ $scope module ac3 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
+$var integer 32 + value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 . value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -51,54 +128,70 @@ $scope module as3 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
+$var integer 32 + value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_in_sub_all $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 , value [31:0] $end
+$var integer 32 . value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_two $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module abcdefghijklmnopqrstuvwxyz $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 / value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 2 value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module ac1 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -108,8 +201,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -117,10 +214,14 @@ $scope module ac3 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
+$var integer 32 / value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 2 value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -128,42 +229,15 @@ $scope module as3 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
+$var integer 32 / value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_in_sub_all $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 0 value [31:0] $end
+$var integer 32 2 value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_two $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -173,8 +247,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -182,37 +260,15 @@ $scope module c2 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_1 $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 1 value [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_2 $end
-$scope interface inner $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 2 value [31:0] $end
-$upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $scope module s1 $end
@@ -221,8 +277,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -230,10 +290,14 @@ $scope module s2 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -243,18 +307,18 @@ $enddefinitions $end
 #0
 $dumpvars
 b00000000000000000000000000000000 2
-b00000000000000000000000000000000 1
-b00000000000000000000000000000000 0
-b00000000000000000000010010110010 /
-b00000000000000000000010001001110 .
-b00000000000000000000001111101010 -
-b00000000000000000000000000000000 ,
-b00000000000000000000010010110001 +
-b00000000000000000000010001001101 *
-b00000000000000000000001111101001 )
-b00000000000000000000000011001010 (
-b00000000000000000000000001100110 '
-b00000000000000000000000000000010 &
+b00000000000000000000010010110010 1
+b00000000000000000000010001001110 0
+b00000000000000000000001111101010 /
+b00000000000000000000000000000000 .
+b00000000000000000000010010110001 -
+b00000000000000000000010001001101 ,
+b00000000000000000000001111101001 +
+b00000000000000000000000000000000 *
+b00000000000000000000000011001010 )
+b00000000000000000000000001100110 (
+b00000000000000000000000000000010 '
+b00000000000000000000000000000000 &
 b00000000000000000000000011001001 %
 b00000000000000000000000001100101 $
 b00000000000000000000000000000001 #
@@ -267,28 +331,28 @@ b00000000000000000000000000000001 "
 b00000000000000000000000000000010 #
 b00000000000000000000000001100110 $
 b00000000000000000000000011001010 %
-b00000000000000000000000000000011 &
-b00000000000000000000000001100111 '
-b00000000000000000000000011001011 (
-b00000000000000000000001111101010 )
-b00000000000000000000010001001110 *
-b00000000000000000000010010110010 +
-b00000000000000000000001111101011 -
-b00000000000000000000010001001111 .
-b00000000000000000000010010110011 /
+b00000000000000000000000000000011 '
+b00000000000000000000000001100111 (
+b00000000000000000000000011001011 )
+b00000000000000000000001111101010 +
+b00000000000000000000010001001110 ,
+b00000000000000000000010010110010 -
+b00000000000000000000001111101011 /
+b00000000000000000000010001001111 0
+b00000000000000000000010010110011 1
 #15
 0!
 #20
 1!
-b00000000000000000000010010110100 /
-b00000000000000000000010001010000 .
-b00000000000000000000001111101100 -
-b00000000000000000000010010110011 +
-b00000000000000000000010001001111 *
-b00000000000000000000001111101011 )
-b00000000000000000000000011001100 (
-b00000000000000000000000001101000 '
-b00000000000000000000000000000100 &
+b00000000000000000000010010110100 1
+b00000000000000000000010001010000 0
+b00000000000000000000001111101100 /
+b00000000000000000000010010110011 -
+b00000000000000000000010001001111 ,
+b00000000000000000000001111101011 +
+b00000000000000000000000011001100 )
+b00000000000000000000000001101000 (
+b00000000000000000000000000000100 '
 b00000000000000000000000011001011 %
 b00000000000000000000000001100111 $
 b00000000000000000000000000000011 #
@@ -301,28 +365,28 @@ b00000000000000000000000000000011 "
 b00000000000000000000000000000100 #
 b00000000000000000000000001101000 $
 b00000000000000000000000011001100 %
-b00000000000000000000000000000101 &
-b00000000000000000000000001101001 '
-b00000000000000000000000011001101 (
-b00000000000000000000001111101100 )
-b00000000000000000000010001010000 *
-b00000000000000000000010010110100 +
-b00000000000000000000001111101101 -
-b00000000000000000000010001010001 .
-b00000000000000000000010010110101 /
+b00000000000000000000000000000101 '
+b00000000000000000000000001101001 (
+b00000000000000000000000011001101 )
+b00000000000000000000001111101100 +
+b00000000000000000000010001010000 ,
+b00000000000000000000010010110100 -
+b00000000000000000000001111101101 /
+b00000000000000000000010001010001 0
+b00000000000000000000010010110101 1
 #35
 0!
 #40
 1!
-b00000000000000000000010010110110 /
-b00000000000000000000010001010010 .
-b00000000000000000000001111101110 -
-b00000000000000000000010010110101 +
-b00000000000000000000010001010001 *
-b00000000000000000000001111101101 )
-b00000000000000000000000011001110 (
-b00000000000000000000000001101010 '
-b00000000000000000000000000000110 &
+b00000000000000000000010010110110 1
+b00000000000000000000010001010010 0
+b00000000000000000000001111101110 /
+b00000000000000000000010010110101 -
+b00000000000000000000010001010001 ,
+b00000000000000000000001111101101 +
+b00000000000000000000000011001110 )
+b00000000000000000000000001101010 (
+b00000000000000000000000000000110 '
 b00000000000000000000000011001101 %
 b00000000000000000000000001101001 $
 b00000000000000000000000000000101 #
@@ -335,28 +399,28 @@ b00000000000000000000000000000101 "
 b00000000000000000000000000000110 #
 b00000000000000000000000001101010 $
 b00000000000000000000000011001110 %
-b00000000000000000000000000000111 &
-b00000000000000000000000001101011 '
-b00000000000000000000000011001111 (
-b00000000000000000000001111101110 )
-b00000000000000000000010001010010 *
-b00000000000000000000010010110110 +
-b00000000000000000000001111101111 -
-b00000000000000000000010001010011 .
-b00000000000000000000010010110111 /
+b00000000000000000000000000000111 '
+b00000000000000000000000001101011 (
+b00000000000000000000000011001111 )
+b00000000000000000000001111101110 +
+b00000000000000000000010001010010 ,
+b00000000000000000000010010110110 -
+b00000000000000000000001111101111 /
+b00000000000000000000010001010011 0
+b00000000000000000000010010110111 1
 #55
 0!
 #60
 1!
-b00000000000000000000010010111000 /
-b00000000000000000000010001010100 .
-b00000000000000000000001111110000 -
-b00000000000000000000010010110111 +
-b00000000000000000000010001010011 *
-b00000000000000000000001111101111 )
-b00000000000000000000000011010000 (
-b00000000000000000000000001101100 '
-b00000000000000000000000000001000 &
+b00000000000000000000010010111000 1
+b00000000000000000000010001010100 0
+b00000000000000000000001111110000 /
+b00000000000000000000010010110111 -
+b00000000000000000000010001010011 ,
+b00000000000000000000001111101111 +
+b00000000000000000000000011010000 )
+b00000000000000000000000001101100 (
+b00000000000000000000000000001000 '
 b00000000000000000000000011001111 %
 b00000000000000000000000001101011 $
 b00000000000000000000000000000111 #
@@ -369,28 +433,28 @@ b00000000000000000000000000000111 "
 b00000000000000000000000000001000 #
 b00000000000000000000000001101100 $
 b00000000000000000000000011010000 %
-b00000000000000000000000000001001 &
-b00000000000000000000000001101101 '
-b00000000000000000000000011010001 (
-b00000000000000000000001111110000 )
-b00000000000000000000010001010100 *
-b00000000000000000000010010111000 +
-b00000000000000000000001111110001 -
-b00000000000000000000010001010101 .
-b00000000000000000000010010111001 /
+b00000000000000000000000000001001 '
+b00000000000000000000000001101101 (
+b00000000000000000000000011010001 )
+b00000000000000000000001111110000 +
+b00000000000000000000010001010100 ,
+b00000000000000000000010010111000 -
+b00000000000000000000001111110001 /
+b00000000000000000000010001010101 0
+b00000000000000000000010010111001 1
 #75
 0!
 #80
 1!
-b00000000000000000000010010111010 /
-b00000000000000000000010001010110 .
-b00000000000000000000001111110010 -
-b00000000000000000000010010111001 +
-b00000000000000000000010001010101 *
-b00000000000000000000001111110001 )
-b00000000000000000000000011010010 (
-b00000000000000000000000001101110 '
-b00000000000000000000000000001010 &
+b00000000000000000000010010111010 1
+b00000000000000000000010001010110 0
+b00000000000000000000001111110010 /
+b00000000000000000000010010111001 -
+b00000000000000000000010001010101 ,
+b00000000000000000000001111110001 +
+b00000000000000000000000011010010 )
+b00000000000000000000000001101110 (
+b00000000000000000000000000001010 '
 b00000000000000000000000011010001 %
 b00000000000000000000000001101101 $
 b00000000000000000000000000001001 #
@@ -403,28 +467,28 @@ b00000000000000000000000000001001 "
 b00000000000000000000000000001010 #
 b00000000000000000000000001101110 $
 b00000000000000000000000011010010 %
-b00000000000000000000000000001011 &
-b00000000000000000000000001101111 '
-b00000000000000000000000011010011 (
-b00000000000000000000001111110010 )
-b00000000000000000000010001010110 *
-b00000000000000000000010010111010 +
-b00000000000000000000001111110011 -
-b00000000000000000000010001010111 .
-b00000000000000000000010010111011 /
+b00000000000000000000000000001011 '
+b00000000000000000000000001101111 (
+b00000000000000000000000011010011 )
+b00000000000000000000001111110010 +
+b00000000000000000000010001010110 ,
+b00000000000000000000010010111010 -
+b00000000000000000000001111110011 /
+b00000000000000000000010001010111 0
+b00000000000000000000010010111011 1
 #95
 0!
 #100
 1!
-b00000000000000000000010010111100 /
-b00000000000000000000010001011000 .
-b00000000000000000000001111110100 -
-b00000000000000000000010010111011 +
-b00000000000000000000010001010111 *
-b00000000000000000000001111110011 )
-b00000000000000000000000011010100 (
-b00000000000000000000000001110000 '
-b00000000000000000000000000001100 &
+b00000000000000000000010010111100 1
+b00000000000000000000010001011000 0
+b00000000000000000000001111110100 /
+b00000000000000000000010010111011 -
+b00000000000000000000010001010111 ,
+b00000000000000000000001111110011 +
+b00000000000000000000000011010100 )
+b00000000000000000000000001110000 (
+b00000000000000000000000000001100 '
 b00000000000000000000000011010011 %
 b00000000000000000000000001101111 $
 b00000000000000000000000000001011 #
@@ -437,28 +501,28 @@ b00000000000000000000000000001011 "
 b00000000000000000000000000001100 #
 b00000000000000000000000001110000 $
 b00000000000000000000000011010100 %
-b00000000000000000000000000001101 &
-b00000000000000000000000001110001 '
-b00000000000000000000000011010101 (
-b00000000000000000000001111110100 )
-b00000000000000000000010001011000 *
-b00000000000000000000010010111100 +
-b00000000000000000000001111110101 -
-b00000000000000000000010001011001 .
-b00000000000000000000010010111101 /
+b00000000000000000000000000001101 '
+b00000000000000000000000001110001 (
+b00000000000000000000000011010101 )
+b00000000000000000000001111110100 +
+b00000000000000000000010001011000 ,
+b00000000000000000000010010111100 -
+b00000000000000000000001111110101 /
+b00000000000000000000010001011001 0
+b00000000000000000000010010111101 1
 #115
 0!
 #120
 1!
-b00000000000000000000010010111110 /
-b00000000000000000000010001011010 .
-b00000000000000000000001111110110 -
-b00000000000000000000010010111101 +
-b00000000000000000000010001011001 *
-b00000000000000000000001111110101 )
-b00000000000000000000000011010110 (
-b00000000000000000000000001110010 '
-b00000000000000000000000000001110 &
+b00000000000000000000010010111110 1
+b00000000000000000000010001011010 0
+b00000000000000000000001111110110 /
+b00000000000000000000010010111101 -
+b00000000000000000000010001011001 ,
+b00000000000000000000001111110101 +
+b00000000000000000000000011010110 )
+b00000000000000000000000001110010 (
+b00000000000000000000000000001110 '
 b00000000000000000000000011010101 %
 b00000000000000000000000001110001 $
 b00000000000000000000000000001101 #
@@ -471,28 +535,28 @@ b00000000000000000000000000001101 "
 b00000000000000000000000000001110 #
 b00000000000000000000000001110010 $
 b00000000000000000000000011010110 %
-b00000000000000000000000000001111 &
-b00000000000000000000000001110011 '
-b00000000000000000000000011010111 (
-b00000000000000000000001111110110 )
-b00000000000000000000010001011010 *
-b00000000000000000000010010111110 +
-b00000000000000000000001111110111 -
-b00000000000000000000010001011011 .
-b00000000000000000000010010111111 /
+b00000000000000000000000000001111 '
+b00000000000000000000000001110011 (
+b00000000000000000000000011010111 )
+b00000000000000000000001111110110 +
+b00000000000000000000010001011010 ,
+b00000000000000000000010010111110 -
+b00000000000000000000001111110111 /
+b00000000000000000000010001011011 0
+b00000000000000000000010010111111 1
 #135
 0!
 #140
 1!
-b00000000000000000000010011000000 /
-b00000000000000000000010001011100 .
-b00000000000000000000001111111000 -
-b00000000000000000000010010111111 +
-b00000000000000000000010001011011 *
-b00000000000000000000001111110111 )
-b00000000000000000000000011011000 (
-b00000000000000000000000001110100 '
-b00000000000000000000000000010000 &
+b00000000000000000000010011000000 1
+b00000000000000000000010001011100 0
+b00000000000000000000001111111000 /
+b00000000000000000000010010111111 -
+b00000000000000000000010001011011 ,
+b00000000000000000000001111110111 +
+b00000000000000000000000011011000 )
+b00000000000000000000000001110100 (
+b00000000000000000000000000010000 '
 b00000000000000000000000011010111 %
 b00000000000000000000000001110011 $
 b00000000000000000000000000001111 #
@@ -505,28 +569,28 @@ b00000000000000000000000000001111 "
 b00000000000000000000000000010000 #
 b00000000000000000000000001110100 $
 b00000000000000000000000011011000 %
-b00000000000000000000000000010001 &
-b00000000000000000000000001110101 '
-b00000000000000000000000011011001 (
-b00000000000000000000001111111000 )
-b00000000000000000000010001011100 *
-b00000000000000000000010011000000 +
-b00000000000000000000001111111001 -
-b00000000000000000000010001011101 .
-b00000000000000000000010011000001 /
+b00000000000000000000000000010001 '
+b00000000000000000000000001110101 (
+b00000000000000000000000011011001 )
+b00000000000000000000001111111000 +
+b00000000000000000000010001011100 ,
+b00000000000000000000010011000000 -
+b00000000000000000000001111111001 /
+b00000000000000000000010001011101 0
+b00000000000000000000010011000001 1
 #155
 0!
 #160
 1!
-b00000000000000000000010011000010 /
-b00000000000000000000010001011110 .
-b00000000000000000000001111111010 -
-b00000000000000000000010011000001 +
-b00000000000000000000010001011101 *
-b00000000000000000000001111111001 )
-b00000000000000000000000011011010 (
-b00000000000000000000000001110110 '
-b00000000000000000000000000010010 &
+b00000000000000000000010011000010 1
+b00000000000000000000010001011110 0
+b00000000000000000000001111111010 /
+b00000000000000000000010011000001 -
+b00000000000000000000010001011101 ,
+b00000000000000000000001111111001 +
+b00000000000000000000000011011010 )
+b00000000000000000000000001110110 (
+b00000000000000000000000000010010 '
 b00000000000000000000000011011001 %
 b00000000000000000000000001110101 $
 b00000000000000000000000000010001 #
@@ -539,28 +603,28 @@ b00000000000000000000000000010001 "
 b00000000000000000000000000010010 #
 b00000000000000000000000001110110 $
 b00000000000000000000000011011010 %
-b00000000000000000000000000010011 &
-b00000000000000000000000001110111 '
-b00000000000000000000000011011011 (
-b00000000000000000000001111111010 )
-b00000000000000000000010001011110 *
-b00000000000000000000010011000010 +
-b00000000000000000000001111111011 -
-b00000000000000000000010001011111 .
-b00000000000000000000010011000011 /
+b00000000000000000000000000010011 '
+b00000000000000000000000001110111 (
+b00000000000000000000000011011011 )
+b00000000000000000000001111111010 +
+b00000000000000000000010001011110 ,
+b00000000000000000000010011000010 -
+b00000000000000000000001111111011 /
+b00000000000000000000010001011111 0
+b00000000000000000000010011000011 1
 #175
 0!
 #180
 1!
-b00000000000000000000010011000100 /
-b00000000000000000000010001100000 .
-b00000000000000000000001111111100 -
-b00000000000000000000010011000011 +
-b00000000000000000000010001011111 *
-b00000000000000000000001111111011 )
-b00000000000000000000000011011100 (
-b00000000000000000000000001111000 '
-b00000000000000000000000000010100 &
+b00000000000000000000010011000100 1
+b00000000000000000000010001100000 0
+b00000000000000000000001111111100 /
+b00000000000000000000010011000011 -
+b00000000000000000000010001011111 ,
+b00000000000000000000001111111011 +
+b00000000000000000000000011011100 )
+b00000000000000000000000001111000 (
+b00000000000000000000000000010100 '
 b00000000000000000000000011011011 %
 b00000000000000000000000001110111 $
 b00000000000000000000000000010011 #
@@ -573,28 +637,28 @@ b00000000000000000000000000010011 "
 b00000000000000000000000000010100 #
 b00000000000000000000000001111000 $
 b00000000000000000000000011011100 %
-b00000000000000000000000000010101 &
-b00000000000000000000000001111001 '
-b00000000000000000000000011011101 (
-b00000000000000000000001111111100 )
-b00000000000000000000010001100000 *
-b00000000000000000000010011000100 +
-b00000000000000000000001111111101 -
-b00000000000000000000010001100001 .
-b00000000000000000000010011000101 /
+b00000000000000000000000000010101 '
+b00000000000000000000000001111001 (
+b00000000000000000000000011011101 )
+b00000000000000000000001111111100 +
+b00000000000000000000010001100000 ,
+b00000000000000000000010011000100 -
+b00000000000000000000001111111101 /
+b00000000000000000000010001100001 0
+b00000000000000000000010011000101 1
 #195
 0!
 #200
 1!
-b00000000000000000000010011000110 /
-b00000000000000000000010001100010 .
-b00000000000000000000001111111110 -
-b00000000000000000000010011000101 +
-b00000000000000000000010001100001 *
-b00000000000000000000001111111101 )
-b00000000000000000000000011011110 (
-b00000000000000000000000001111010 '
-b00000000000000000000000000010110 &
+b00000000000000000000010011000110 1
+b00000000000000000000010001100010 0
+b00000000000000000000001111111110 /
+b00000000000000000000010011000101 -
+b00000000000000000000010001100001 ,
+b00000000000000000000001111111101 +
+b00000000000000000000000011011110 )
+b00000000000000000000000001111010 (
+b00000000000000000000000000010110 '
 b00000000000000000000000011011101 %
 b00000000000000000000000001111001 $
 b00000000000000000000000000010101 #
@@ -607,12 +671,12 @@ b00000000000000000000000000010101 "
 b00000000000000000000000000010110 #
 b00000000000000000000000001111010 $
 b00000000000000000000000011011110 %
-b00000000000000000000000000010111 &
-b00000000000000000000000001111011 '
-b00000000000000000000000011011111 (
-b00000000000000000000001111111110 )
-b00000000000000000000010001100010 *
-b00000000000000000000010011000110 +
-b00000000000000000000001111111111 -
-b00000000000000000000010001100011 .
-b00000000000000000000010011000111 /
+b00000000000000000000000000010111 '
+b00000000000000000000000001111011 (
+b00000000000000000000000011011111 )
+b00000000000000000000001111111110 +
+b00000000000000000000010001100010 ,
+b00000000000000000000010011000110 -
+b00000000000000000000001111111111 /
+b00000000000000000000010001100011 0
+b00000000000000000000010011000111 1
diff --git a/test_regress/t/t_interface_ref_trace_fst_sc.out b/test_regress/t/t_interface_ref_trace_fst_sc.out
index 7131845ae..b6e4d463d 100644
--- a/test_regress/t/t_interface_ref_trace_fst_sc.out
+++ b/test_regress/t/t_interface_ref_trace_fst_sc.out
@@ -1,5 +1,5 @@
 $date
-	Thu Apr 14 07:06:59 2022
+	Tue Oct 24 11:06:23 2023
 
 $end
 $version
@@ -12,15 +12,84 @@ $scope module top $end
 $scope module t $end
 $var wire 1 ! clk $end
 $var integer 32 " cyc [31:0] $end
+$scope interface intf_1 $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_2 $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module a $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 + value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 . value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module ac1 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -28,10 +97,14 @@ $scope module ac2 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -39,10 +112,14 @@ $scope module ac3 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
+$var integer 32 + value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 . value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -50,54 +127,70 @@ $scope module as3 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
+$var integer 32 + value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
+$var integer 32 , val100 [31:0] $end
+$var integer 32 - val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_in_sub_all $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 , value [31:0] $end
+$var integer 32 . value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 ) value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 * val100 [31:0] $end
-$var logic 32 + val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_two $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
 $scope module abcdefghijklmnopqrstuvwxyz $end
+$scope interface intf_one $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 ' value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_two $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 # value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
+$upscope $end
+$upscope $end
+$scope interface intf_in_sub_all $end
+$var wire 1 ! clk $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 / value [31:0] $end
+$scope struct the_struct $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 2 value [31:0] $end
+$upscope $end
+$upscope $end
 $scope module ac1 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -107,8 +200,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -116,10 +213,14 @@ $scope module ac3 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
+$var integer 32 / value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 2 value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -127,42 +228,15 @@ $scope module as3 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
+$var integer 32 / value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
+$var integer 32 0 val100 [31:0] $end
+$var integer 32 1 val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_in_sub_all $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 0 value [31:0] $end
+$var integer 32 2 value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 - value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 . val100 [31:0] $end
-$var logic 32 / val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_one $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_two $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -172,8 +246,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -181,37 +259,15 @@ $scope module c2 $end
 $scope interface intf_for_check $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
 $upscope $end
-$upscope $end
-$upscope $end
-$scope interface intf_1 $end
 $scope interface inner $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 1 value [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 # value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
-$upscope $end
-$upscope $end
-$scope interface intf_2 $end
-$scope interface inner $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 2 value [31:0] $end
-$upscope $end
-$var wire 1 ! clk $end
-$var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
-$scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
 $upscope $end
 $upscope $end
 $scope module s1 $end
@@ -220,8 +276,12 @@ $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
 $var integer 32 # value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 $ val100 [31:0] $end
-$var logic 32 % val200 [31:0] $end
+$var integer 32 $ val100 [31:0] $end
+$var integer 32 % val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 & value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -229,10 +289,14 @@ $scope module s2 $end
 $scope interface intf_for_struct $end
 $var wire 1 ! clk $end
 $var wire 32 " cyc [31:0] $end
-$var integer 32 & value [31:0] $end
+$var integer 32 ' value [31:0] $end
 $scope struct the_struct $end
-$var logic 32 ' val100 [31:0] $end
-$var logic 32 ( val200 [31:0] $end
+$var integer 32 ( val100 [31:0] $end
+$var integer 32 ) val200 [31:0] $end
+$upscope $end
+$scope interface inner $end
+$var wire 32 " cyc [31:0] $end
+$var integer 32 * value [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
@@ -242,18 +306,18 @@ $enddefinitions $end
 #0
 $dumpvars
 b00000000000000000000000000000000 2
-b00000000000000000000000000000000 1
-b00000000000000000000000000000000 0
-b00000000000000000000010010110010 /
-b00000000000000000000010001001110 .
-b00000000000000000000001111101010 -
-b00000000000000000000000000000000 ,
-b00000000000000000000010010110001 +
-b00000000000000000000010001001101 *
-b00000000000000000000001111101001 )
-b00000000000000000000000011001010 (
-b00000000000000000000000001100110 '
-b00000000000000000000000000000010 &
+b00000000000000000000010010110010 1
+b00000000000000000000010001001110 0
+b00000000000000000000001111101010 /
+b00000000000000000000000000000000 .
+b00000000000000000000010010110001 -
+b00000000000000000000010001001101 ,
+b00000000000000000000001111101001 +
+b00000000000000000000000000000000 *
+b00000000000000000000000011001010 )
+b00000000000000000000000001100110 (
+b00000000000000000000000000000010 '
+b00000000000000000000000000000000 &
 b00000000000000000000000011001001 %
 b00000000000000000000000001100101 $
 b00000000000000000000000000000001 #
@@ -266,15 +330,15 @@ b00000000000000000000000000000001 "
 b00000000000000000000000000000010 #
 b00000000000000000000000001100110 $
 b00000000000000000000000011001010 %
-b00000000000000000000000000000011 &
-b00000000000000000000000001100111 '
-b00000000000000000000000011001011 (
-b00000000000000000000001111101010 )
-b00000000000000000000010001001110 *
-b00000000000000000000010010110010 +
-b00000000000000000000001111101011 -
-b00000000000000000000010001001111 .
-b00000000000000000000010010110011 /
+b00000000000000000000000000000011 '
+b00000000000000000000000001100111 (
+b00000000000000000000000011001011 )
+b00000000000000000000001111101010 +
+b00000000000000000000010001001110 ,
+b00000000000000000000010010110010 -
+b00000000000000000000001111101011 /
+b00000000000000000000010001001111 0
+b00000000000000000000010010110011 1
 #11
 #12
 #13
@@ -287,15 +351,15 @@ b00000000000000000000010010110011 /
 #19
 #20
 1!
-b00000000000000000000010010110100 /
-b00000000000000000000010001010000 .
-b00000000000000000000001111101100 -
-b00000000000000000000010010110011 +
-b00000000000000000000010001001111 *
-b00000000000000000000001111101011 )
-b00000000000000000000000011001100 (
-b00000000000000000000000001101000 '
-b00000000000000000000000000000100 &
+b00000000000000000000010010110100 1
+b00000000000000000000010001010000 0
+b00000000000000000000001111101100 /
+b00000000000000000000010010110011 -
+b00000000000000000000010001001111 ,
+b00000000000000000000001111101011 +
+b00000000000000000000000011001100 )
+b00000000000000000000000001101000 (
+b00000000000000000000000000000100 '
 b00000000000000000000000011001011 %
 b00000000000000000000000001100111 $
 b00000000000000000000000000000011 #
@@ -316,15 +380,15 @@ b00000000000000000000000000000011 "
 b00000000000000000000000000000100 #
 b00000000000000000000000001101000 $
 b00000000000000000000000011001100 %
-b00000000000000000000000000000101 &
-b00000000000000000000000001101001 '
-b00000000000000000000000011001101 (
-b00000000000000000000001111101100 )
-b00000000000000000000010001010000 *
-b00000000000000000000010010110100 +
-b00000000000000000000001111101101 -
-b00000000000000000000010001010001 .
-b00000000000000000000010010110101 /
+b00000000000000000000000000000101 '
+b00000000000000000000000001101001 (
+b00000000000000000000000011001101 )
+b00000000000000000000001111101100 +
+b00000000000000000000010001010000 ,
+b00000000000000000000010010110100 -
+b00000000000000000000001111101101 /
+b00000000000000000000010001010001 0
+b00000000000000000000010010110101 1
 #31
 #32
 #33
@@ -337,15 +401,15 @@ b00000000000000000000010010110101 /
 #39
 #40
 1!
-b00000000000000000000010010110110 /
-b00000000000000000000010001010010 .
-b00000000000000000000001111101110 -
-b00000000000000000000010010110101 +
-b00000000000000000000010001010001 *
-b00000000000000000000001111101101 )
-b00000000000000000000000011001110 (
-b00000000000000000000000001101010 '
-b00000000000000000000000000000110 &
+b00000000000000000000010010110110 1
+b00000000000000000000010001010010 0
+b00000000000000000000001111101110 /
+b00000000000000000000010010110101 -
+b00000000000000000000010001010001 ,
+b00000000000000000000001111101101 +
+b00000000000000000000000011001110 )
+b00000000000000000000000001101010 (
+b00000000000000000000000000000110 '
 b00000000000000000000000011001101 %
 b00000000000000000000000001101001 $
 b00000000000000000000000000000101 #
@@ -366,15 +430,15 @@ b00000000000000000000000000000101 "
 b00000000000000000000000000000110 #
 b00000000000000000000000001101010 $
 b00000000000000000000000011001110 %
-b00000000000000000000000000000111 &
-b00000000000000000000000001101011 '
-b00000000000000000000000011001111 (
-b00000000000000000000001111101110 )
-b00000000000000000000010001010010 *
-b00000000000000000000010010110110 +
-b00000000000000000000001111101111 -
-b00000000000000000000010001010011 .
-b00000000000000000000010010110111 /
+b00000000000000000000000000000111 '
+b00000000000000000000000001101011 (
+b00000000000000000000000011001111 )
+b00000000000000000000001111101110 +
+b00000000000000000000010001010010 ,
+b00000000000000000000010010110110 -
+b00000000000000000000001111101111 /
+b00000000000000000000010001010011 0
+b00000000000000000000010010110111 1
 #51
 #52
 #53
@@ -387,15 +451,15 @@ b00000000000000000000010010110111 /
 #59
 #60
 1!
-b00000000000000000000010010111000 /
-b00000000000000000000010001010100 .
-b00000000000000000000001111110000 -
-b00000000000000000000010010110111 +
-b00000000000000000000010001010011 *
-b00000000000000000000001111101111 )
-b00000000000000000000000011010000 (
-b00000000000000000000000001101100 '
-b00000000000000000000000000001000 &
+b00000000000000000000010010111000 1
+b00000000000000000000010001010100 0
+b00000000000000000000001111110000 /
+b00000000000000000000010010110111 -
+b00000000000000000000010001010011 ,
+b00000000000000000000001111101111 +
+b00000000000000000000000011010000 )
+b00000000000000000000000001101100 (
+b00000000000000000000000000001000 '
 b00000000000000000000000011001111 %
 b00000000000000000000000001101011 $
 b00000000000000000000000000000111 #
@@ -416,15 +480,15 @@ b00000000000000000000000000000111 "
 b00000000000000000000000000001000 #
 b00000000000000000000000001101100 $
 b00000000000000000000000011010000 %
-b00000000000000000000000000001001 &
-b00000000000000000000000001101101 '
-b00000000000000000000000011010001 (
-b00000000000000000000001111110000 )
-b00000000000000000000010001010100 *
-b00000000000000000000010010111000 +
-b00000000000000000000001111110001 -
-b00000000000000000000010001010101 .
-b00000000000000000000010010111001 /
+b00000000000000000000000000001001 '
+b00000000000000000000000001101101 (
+b00000000000000000000000011010001 )
+b00000000000000000000001111110000 +
+b00000000000000000000010001010100 ,
+b00000000000000000000010010111000 -
+b00000000000000000000001111110001 /
+b00000000000000000000010001010101 0
+b00000000000000000000010010111001 1
 #71
 #72
 #73
@@ -437,15 +501,15 @@ b00000000000000000000010010111001 /
 #79
 #80
 1!
-b00000000000000000000010010111010 /
-b00000000000000000000010001010110 .
-b00000000000000000000001111110010 -
-b00000000000000000000010010111001 +
-b00000000000000000000010001010101 *
-b00000000000000000000001111110001 )
-b00000000000000000000000011010010 (
-b00000000000000000000000001101110 '
-b00000000000000000000000000001010 &
+b00000000000000000000010010111010 1
+b00000000000000000000010001010110 0
+b00000000000000000000001111110010 /
+b00000000000000000000010010111001 -
+b00000000000000000000010001010101 ,
+b00000000000000000000001111110001 +
+b00000000000000000000000011010010 )
+b00000000000000000000000001101110 (
+b00000000000000000000000000001010 '
 b00000000000000000000000011010001 %
 b00000000000000000000000001101101 $
 b00000000000000000000000000001001 #
@@ -466,15 +530,15 @@ b00000000000000000000000000001001 "
 b00000000000000000000000000001010 #
 b00000000000000000000000001101110 $
 b00000000000000000000000011010010 %
-b00000000000000000000000000001011 &
-b00000000000000000000000001101111 '
-b00000000000000000000000011010011 (
-b00000000000000000000001111110010 )
-b00000000000000000000010001010110 *
-b00000000000000000000010010111010 +
-b00000000000000000000001111110011 -
-b00000000000000000000010001010111 .
-b00000000000000000000010010111011 /
+b00000000000000000000000000001011 '
+b00000000000000000000000001101111 (
+b00000000000000000000000011010011 )
+b00000000000000000000001111110010 +
+b00000000000000000000010001010110 ,
+b00000000000000000000010010111010 -
+b00000000000000000000001111110011 /
+b00000000000000000000010001010111 0
+b00000000000000000000010010111011 1
 #91
 #92
 #93
@@ -487,15 +551,15 @@ b00000000000000000000010010111011 /
 #99
 #100
 1!
-b00000000000000000000010010111100 /
-b00000000000000000000010001011000 .
-b00000000000000000000001111110100 -
-b00000000000000000000010010111011 +
-b00000000000000000000010001010111 *
-b00000000000000000000001111110011 )
-b00000000000000000000000011010100 (
-b00000000000000000000000001110000 '
-b00000000000000000000000000001100 &
+b00000000000000000000010010111100 1
+b00000000000000000000010001011000 0
+b00000000000000000000001111110100 /
+b00000000000000000000010010111011 -
+b00000000000000000000010001010111 ,
+b00000000000000000000001111110011 +
+b00000000000000000000000011010100 )
+b00000000000000000000000001110000 (
+b00000000000000000000000000001100 '
 b00000000000000000000000011010011 %
 b00000000000000000000000001101111 $
 b00000000000000000000000000001011 #
@@ -516,15 +580,15 @@ b00000000000000000000000000001011 "
 b00000000000000000000000000001100 #
 b00000000000000000000000001110000 $
 b00000000000000000000000011010100 %
-b00000000000000000000000000001101 &
-b00000000000000000000000001110001 '
-b00000000000000000000000011010101 (
-b00000000000000000000001111110100 )
-b00000000000000000000010001011000 *
-b00000000000000000000010010111100 +
-b00000000000000000000001111110101 -
-b00000000000000000000010001011001 .
-b00000000000000000000010010111101 /
+b00000000000000000000000000001101 '
+b00000000000000000000000001110001 (
+b00000000000000000000000011010101 )
+b00000000000000000000001111110100 +
+b00000000000000000000010001011000 ,
+b00000000000000000000010010111100 -
+b00000000000000000000001111110101 /
+b00000000000000000000010001011001 0
+b00000000000000000000010010111101 1
 #111
 #112
 #113
@@ -537,15 +601,15 @@ b00000000000000000000010010111101 /
 #119
 #120
 1!
-b00000000000000000000010010111110 /
-b00000000000000000000010001011010 .
-b00000000000000000000001111110110 -
-b00000000000000000000010010111101 +
-b00000000000000000000010001011001 *
-b00000000000000000000001111110101 )
-b00000000000000000000000011010110 (
-b00000000000000000000000001110010 '
-b00000000000000000000000000001110 &
+b00000000000000000000010010111110 1
+b00000000000000000000010001011010 0
+b00000000000000000000001111110110 /
+b00000000000000000000010010111101 -
+b00000000000000000000010001011001 ,
+b00000000000000000000001111110101 +
+b00000000000000000000000011010110 )
+b00000000000000000000000001110010 (
+b00000000000000000000000000001110 '
 b00000000000000000000000011010101 %
 b00000000000000000000000001110001 $
 b00000000000000000000000000001101 #
@@ -566,15 +630,15 @@ b00000000000000000000000000001101 "
 b00000000000000000000000000001110 #
 b00000000000000000000000001110010 $
 b00000000000000000000000011010110 %
-b00000000000000000000000000001111 &
-b00000000000000000000000001110011 '
-b00000000000000000000000011010111 (
-b00000000000000000000001111110110 )
-b00000000000000000000010001011010 *
-b00000000000000000000010010111110 +
-b00000000000000000000001111110111 -
-b00000000000000000000010001011011 .
-b00000000000000000000010010111111 /
+b00000000000000000000000000001111 '
+b00000000000000000000000001110011 (
+b00000000000000000000000011010111 )
+b00000000000000000000001111110110 +
+b00000000000000000000010001011010 ,
+b00000000000000000000010010111110 -
+b00000000000000000000001111110111 /
+b00000000000000000000010001011011 0
+b00000000000000000000010010111111 1
 #131
 #132
 #133
@@ -587,15 +651,15 @@ b00000000000000000000010010111111 /
 #139
 #140
 1!
-b00000000000000000000010011000000 /
-b00000000000000000000010001011100 .
-b00000000000000000000001111111000 -
-b00000000000000000000010010111111 +
-b00000000000000000000010001011011 *
-b00000000000000000000001111110111 )
-b00000000000000000000000011011000 (
-b00000000000000000000000001110100 '
-b00000000000000000000000000010000 &
+b00000000000000000000010011000000 1
+b00000000000000000000010001011100 0
+b00000000000000000000001111111000 /
+b00000000000000000000010010111111 -
+b00000000000000000000010001011011 ,
+b00000000000000000000001111110111 +
+b00000000000000000000000011011000 )
+b00000000000000000000000001110100 (
+b00000000000000000000000000010000 '
 b00000000000000000000000011010111 %
 b00000000000000000000000001110011 $
 b00000000000000000000000000001111 #
@@ -616,15 +680,15 @@ b00000000000000000000000000001111 "
 b00000000000000000000000000010000 #
 b00000000000000000000000001110100 $
 b00000000000000000000000011011000 %
-b00000000000000000000000000010001 &
-b00000000000000000000000001110101 '
-b00000000000000000000000011011001 (
-b00000000000000000000001111111000 )
-b00000000000000000000010001011100 *
-b00000000000000000000010011000000 +
-b00000000000000000000001111111001 -
-b00000000000000000000010001011101 .
-b00000000000000000000010011000001 /
+b00000000000000000000000000010001 '
+b00000000000000000000000001110101 (
+b00000000000000000000000011011001 )
+b00000000000000000000001111111000 +
+b00000000000000000000010001011100 ,
+b00000000000000000000010011000000 -
+b00000000000000000000001111111001 /
+b00000000000000000000010001011101 0
+b00000000000000000000010011000001 1
 #151
 #152
 #153
@@ -637,15 +701,15 @@ b00000000000000000000010011000001 /
 #159
 #160
 1!
-b00000000000000000000010011000010 /
-b00000000000000000000010001011110 .
-b00000000000000000000001111111010 -
-b00000000000000000000010011000001 +
-b00000000000000000000010001011101 *
-b00000000000000000000001111111001 )
-b00000000000000000000000011011010 (
-b00000000000000000000000001110110 '
-b00000000000000000000000000010010 &
+b00000000000000000000010011000010 1
+b00000000000000000000010001011110 0
+b00000000000000000000001111111010 /
+b00000000000000000000010011000001 -
+b00000000000000000000010001011101 ,
+b00000000000000000000001111111001 +
+b00000000000000000000000011011010 )
+b00000000000000000000000001110110 (
+b00000000000000000000000000010010 '
 b00000000000000000000000011011001 %
 b00000000000000000000000001110101 $
 b00000000000000000000000000010001 #
@@ -666,15 +730,15 @@ b00000000000000000000000000010001 "
 b00000000000000000000000000010010 #
 b00000000000000000000000001110110 $
 b00000000000000000000000011011010 %
-b00000000000000000000000000010011 &
-b00000000000000000000000001110111 '
-b00000000000000000000000011011011 (
-b00000000000000000000001111111010 )
-b00000000000000000000010001011110 *
-b00000000000000000000010011000010 +
-b00000000000000000000001111111011 -
-b00000000000000000000010001011111 .
-b00000000000000000000010011000011 /
+b00000000000000000000000000010011 '
+b00000000000000000000000001110111 (
+b00000000000000000000000011011011 )
+b00000000000000000000001111111010 +
+b00000000000000000000010001011110 ,
+b00000000000000000000010011000010 -
+b00000000000000000000001111111011 /
+b00000000000000000000010001011111 0
+b00000000000000000000010011000011 1
 #171
 #172
 #173
@@ -687,15 +751,15 @@ b00000000000000000000010011000011 /
 #179
 #180
 1!
-b00000000000000000000010011000100 /
-b00000000000000000000010001100000 .
-b00000000000000000000001111111100 -
-b00000000000000000000010011000011 +
-b00000000000000000000010001011111 *
-b00000000000000000000001111111011 )
-b00000000000000000000000011011100 (
-b00000000000000000000000001111000 '
-b00000000000000000000000000010100 &
+b00000000000000000000010011000100 1
+b00000000000000000000010001100000 0
+b00000000000000000000001111111100 /
+b00000000000000000000010011000011 -
+b00000000000000000000010001011111 ,
+b00000000000000000000001111111011 +
+b00000000000000000000000011011100 )
+b00000000000000000000000001111000 (
+b00000000000000000000000000010100 '
 b00000000000000000000000011011011 %
 b00000000000000000000000001110111 $
 b00000000000000000000000000010011 #
@@ -716,15 +780,15 @@ b00000000000000000000000000010011 "
 b00000000000000000000000000010100 #
 b00000000000000000000000001111000 $
 b00000000000000000000000011011100 %
-b00000000000000000000000000010101 &
-b00000000000000000000000001111001 '
-b00000000000000000000000011011101 (
-b00000000000000000000001111111100 )
-b00000000000000000000010001100000 *
-b00000000000000000000010011000100 +
-b00000000000000000000001111111101 -
-b00000000000000000000010001100001 .
-b00000000000000000000010011000101 /
+b00000000000000000000000000010101 '
+b00000000000000000000000001111001 (
+b00000000000000000000000011011101 )
+b00000000000000000000001111111100 +
+b00000000000000000000010001100000 ,
+b00000000000000000000010011000100 -
+b00000000000000000000001111111101 /
+b00000000000000000000010001100001 0
+b00000000000000000000010011000101 1
 #191
 #192
 #193
@@ -737,15 +801,15 @@ b00000000000000000000010011000101 /
 #199
 #200
 1!
-b00000000000000000000010011000110 /
-b00000000000000000000010001100010 .
-b00000000000000000000001111111110 -
-b00000000000000000000010011000101 +
-b00000000000000000000010001100001 *
-b00000000000000000000001111111101 )
-b00000000000000000000000011011110 (
-b00000000000000000000000001111010 '
-b00000000000000000000000000010110 &
+b00000000000000000000010011000110 1
+b00000000000000000000010001100010 0
+b00000000000000000000001111111110 /
+b00000000000000000000010011000101 -
+b00000000000000000000010001100001 ,
+b00000000000000000000001111111101 +
+b00000000000000000000000011011110 )
+b00000000000000000000000001111010 (
+b00000000000000000000000000010110 '
 b00000000000000000000000011011101 %
 b00000000000000000000000001111001 $
 b00000000000000000000000000010101 #
@@ -766,15 +830,15 @@ b00000000000000000000000000010101 "
 b00000000000000000000000000010110 #
 b00000000000000000000000001111010 $
 b00000000000000000000000011011110 %
-b00000000000000000000000000010111 &
-b00000000000000000000000001111011 '
-b00000000000000000000000011011111 (
-b00000000000000000000001111111110 )
-b00000000000000000000010001100010 *
-b00000000000000000000010011000110 +
-b00000000000000000000001111111111 -
-b00000000000000000000010001100011 .
-b00000000000000000000010011000111 /
+b00000000000000000000000000010111 '
+b00000000000000000000000001111011 (
+b00000000000000000000000011011111 )
+b00000000000000000000001111111110 +
+b00000000000000000000010001100010 ,
+b00000000000000000000010011000110 -
+b00000000000000000000001111111111 /
+b00000000000000000000010001100011 0
+b00000000000000000000010011000111 1
 #211
 #212
 #213
diff --git a/test_regress/t/t_interface_ref_trace_noinl.out b/test_regress/t/t_interface_ref_trace_noinl.out
new file mode 100644
index 000000000..a3bd6bbac
--- /dev/null
+++ b/test_regress/t/t_interface_ref_trace_noinl.out
@@ -0,0 +1,675 @@
+$version Generated by VerilatedVcd $end
+$timescale 1ps $end
+
+ $scope module top $end
+  $scope module t $end
+   $var wire 1 0 clk $end
+   $var wire 32 # cyc [31:0] $end
+   $scope module intf_1 $end
+    $var wire 1 0 clk $end
+    $var wire 32 # cyc [31:0] $end
+    $var wire 32 $ value [31:0] $end
+    $scope module the_struct $end
+     $var wire 32 % val100 [31:0] $end
+     $var wire 32 & val200 [31:0] $end
+    $upscope $end
+    $scope module inner $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 1 value [31:0] $end
+    $upscope $end
+   $upscope $end
+   $scope module intf_2 $end
+    $var wire 1 0 clk $end
+    $var wire 32 # cyc [31:0] $end
+    $var wire 32 ' value [31:0] $end
+    $scope module the_struct $end
+     $var wire 32 ( val100 [31:0] $end
+     $var wire 32 ) val200 [31:0] $end
+    $upscope $end
+    $scope module inner $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 2 value [31:0] $end
+    $upscope $end
+   $upscope $end
+   $scope module s1 $end
+    $scope module intf_for_struct $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module s2 $end
+    $scope module intf_for_struct $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module c1 $end
+    $scope module intf_for_check $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module c2 $end
+    $scope module intf_for_check $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module a $end
+    $scope module intf_one $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_two $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_in_sub_all $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 * value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 + val100 [31:0] $end
+      $var wire 32 , val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 3 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module ac1 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 $ value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 % val100 [31:0] $end
+       $var wire 32 & val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 1 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac2 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 ' value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 ( val100 [31:0] $end
+       $var wire 32 ) val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 2 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module as3 $end
+     $scope module intf_for_struct $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 * value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 + val100 [31:0] $end
+       $var wire 32 , val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 3 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac3 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 * value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 + val100 [31:0] $end
+       $var wire 32 , val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 3 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+   $scope module abcdefghijklmnopqrstuvwxyz $end
+    $scope module intf_one $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 ' value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 ( val100 [31:0] $end
+      $var wire 32 ) val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 2 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_two $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 $ value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 % val100 [31:0] $end
+      $var wire 32 & val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 1 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module intf_in_sub_all $end
+     $var wire 1 0 clk $end
+     $var wire 32 # cyc [31:0] $end
+     $var wire 32 - value [31:0] $end
+     $scope module the_struct $end
+      $var wire 32 . val100 [31:0] $end
+      $var wire 32 / val200 [31:0] $end
+     $upscope $end
+     $scope module inner $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 4 value [31:0] $end
+     $upscope $end
+    $upscope $end
+    $scope module ac1 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 ' value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 ( val100 [31:0] $end
+       $var wire 32 ) val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 2 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac2 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 $ value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 % val100 [31:0] $end
+       $var wire 32 & val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 1 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module as3 $end
+     $scope module intf_for_struct $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 - value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 . val100 [31:0] $end
+       $var wire 32 / val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 4 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+    $scope module ac3 $end
+     $scope module intf_for_check $end
+      $var wire 1 0 clk $end
+      $var wire 32 # cyc [31:0] $end
+      $var wire 32 - value [31:0] $end
+      $scope module the_struct $end
+       $var wire 32 . val100 [31:0] $end
+       $var wire 32 / val200 [31:0] $end
+      $upscope $end
+      $scope module inner $end
+       $var wire 32 # cyc [31:0] $end
+       $var wire 32 4 value [31:0] $end
+      $upscope $end
+     $upscope $end
+    $upscope $end
+   $upscope $end
+  $upscope $end
+  $var wire 1 0 clk $end
+ $upscope $end
+$enddefinitions $end
+
+
+#0
+b00000000000000000000000000000000 #
+b00000000000000000000000000000001 $
+b00000000000000000000000001100101 %
+b00000000000000000000000011001001 &
+b00000000000000000000000000000010 '
+b00000000000000000000000001100110 (
+b00000000000000000000000011001010 )
+b00000000000000000000001111101001 *
+b00000000000000000000010001001101 +
+b00000000000000000000010010110001 ,
+b00000000000000000000001111101010 -
+b00000000000000000000010001001110 .
+b00000000000000000000010010110010 /
+00
+b00000000000000000000000000000000 1
+b00000000000000000000000000000000 2
+b00000000000000000000000000000000 3
+b00000000000000000000000000000000 4
+#10
+b00000000000000000000000000000001 #
+b00000000000000000000000000000010 $
+b00000000000000000000000001100110 %
+b00000000000000000000000011001010 &
+b00000000000000000000000000000011 '
+b00000000000000000000000001100111 (
+b00000000000000000000000011001011 )
+b00000000000000000000001111101010 *
+b00000000000000000000010001001110 +
+b00000000000000000000010010110010 ,
+b00000000000000000000001111101011 -
+b00000000000000000000010001001111 .
+b00000000000000000000010010110011 /
+10
+#15
+00
+#20
+b00000000000000000000000000000010 #
+b00000000000000000000000000000011 $
+b00000000000000000000000001100111 %
+b00000000000000000000000011001011 &
+b00000000000000000000000000000100 '
+b00000000000000000000000001101000 (
+b00000000000000000000000011001100 )
+b00000000000000000000001111101011 *
+b00000000000000000000010001001111 +
+b00000000000000000000010010110011 ,
+b00000000000000000000001111101100 -
+b00000000000000000000010001010000 .
+b00000000000000000000010010110100 /
+10
+#25
+00
+#30
+b00000000000000000000000000000011 #
+b00000000000000000000000000000100 $
+b00000000000000000000000001101000 %
+b00000000000000000000000011001100 &
+b00000000000000000000000000000101 '
+b00000000000000000000000001101001 (
+b00000000000000000000000011001101 )
+b00000000000000000000001111101100 *
+b00000000000000000000010001010000 +
+b00000000000000000000010010110100 ,
+b00000000000000000000001111101101 -
+b00000000000000000000010001010001 .
+b00000000000000000000010010110101 /
+10
+#35
+00
+#40
+b00000000000000000000000000000100 #
+b00000000000000000000000000000101 $
+b00000000000000000000000001101001 %
+b00000000000000000000000011001101 &
+b00000000000000000000000000000110 '
+b00000000000000000000000001101010 (
+b00000000000000000000000011001110 )
+b00000000000000000000001111101101 *
+b00000000000000000000010001010001 +
+b00000000000000000000010010110101 ,
+b00000000000000000000001111101110 -
+b00000000000000000000010001010010 .
+b00000000000000000000010010110110 /
+10
+#45
+00
+#50
+b00000000000000000000000000000101 #
+b00000000000000000000000000000110 $
+b00000000000000000000000001101010 %
+b00000000000000000000000011001110 &
+b00000000000000000000000000000111 '
+b00000000000000000000000001101011 (
+b00000000000000000000000011001111 )
+b00000000000000000000001111101110 *
+b00000000000000000000010001010010 +
+b00000000000000000000010010110110 ,
+b00000000000000000000001111101111 -
+b00000000000000000000010001010011 .
+b00000000000000000000010010110111 /
+10
+#55
+00
+#60
+b00000000000000000000000000000110 #
+b00000000000000000000000000000111 $
+b00000000000000000000000001101011 %
+b00000000000000000000000011001111 &
+b00000000000000000000000000001000 '
+b00000000000000000000000001101100 (
+b00000000000000000000000011010000 )
+b00000000000000000000001111101111 *
+b00000000000000000000010001010011 +
+b00000000000000000000010010110111 ,
+b00000000000000000000001111110000 -
+b00000000000000000000010001010100 .
+b00000000000000000000010010111000 /
+10
+#65
+00
+#70
+b00000000000000000000000000000111 #
+b00000000000000000000000000001000 $
+b00000000000000000000000001101100 %
+b00000000000000000000000011010000 &
+b00000000000000000000000000001001 '
+b00000000000000000000000001101101 (
+b00000000000000000000000011010001 )
+b00000000000000000000001111110000 *
+b00000000000000000000010001010100 +
+b00000000000000000000010010111000 ,
+b00000000000000000000001111110001 -
+b00000000000000000000010001010101 .
+b00000000000000000000010010111001 /
+10
+#75
+00
+#80
+b00000000000000000000000000001000 #
+b00000000000000000000000000001001 $
+b00000000000000000000000001101101 %
+b00000000000000000000000011010001 &
+b00000000000000000000000000001010 '
+b00000000000000000000000001101110 (
+b00000000000000000000000011010010 )
+b00000000000000000000001111110001 *
+b00000000000000000000010001010101 +
+b00000000000000000000010010111001 ,
+b00000000000000000000001111110010 -
+b00000000000000000000010001010110 .
+b00000000000000000000010010111010 /
+10
+#85
+00
+#90
+b00000000000000000000000000001001 #
+b00000000000000000000000000001010 $
+b00000000000000000000000001101110 %
+b00000000000000000000000011010010 &
+b00000000000000000000000000001011 '
+b00000000000000000000000001101111 (
+b00000000000000000000000011010011 )
+b00000000000000000000001111110010 *
+b00000000000000000000010001010110 +
+b00000000000000000000010010111010 ,
+b00000000000000000000001111110011 -
+b00000000000000000000010001010111 .
+b00000000000000000000010010111011 /
+10
+#95
+00
+#100
+b00000000000000000000000000001010 #
+b00000000000000000000000000001011 $
+b00000000000000000000000001101111 %
+b00000000000000000000000011010011 &
+b00000000000000000000000000001100 '
+b00000000000000000000000001110000 (
+b00000000000000000000000011010100 )
+b00000000000000000000001111110011 *
+b00000000000000000000010001010111 +
+b00000000000000000000010010111011 ,
+b00000000000000000000001111110100 -
+b00000000000000000000010001011000 .
+b00000000000000000000010010111100 /
+10
+#105
+00
+#110
+b00000000000000000000000000001011 #
+b00000000000000000000000000001100 $
+b00000000000000000000000001110000 %
+b00000000000000000000000011010100 &
+b00000000000000000000000000001101 '
+b00000000000000000000000001110001 (
+b00000000000000000000000011010101 )
+b00000000000000000000001111110100 *
+b00000000000000000000010001011000 +
+b00000000000000000000010010111100 ,
+b00000000000000000000001111110101 -
+b00000000000000000000010001011001 .
+b00000000000000000000010010111101 /
+10
+#115
+00
+#120
+b00000000000000000000000000001100 #
+b00000000000000000000000000001101 $
+b00000000000000000000000001110001 %
+b00000000000000000000000011010101 &
+b00000000000000000000000000001110 '
+b00000000000000000000000001110010 (
+b00000000000000000000000011010110 )
+b00000000000000000000001111110101 *
+b00000000000000000000010001011001 +
+b00000000000000000000010010111101 ,
+b00000000000000000000001111110110 -
+b00000000000000000000010001011010 .
+b00000000000000000000010010111110 /
+10
+#125
+00
+#130
+b00000000000000000000000000001101 #
+b00000000000000000000000000001110 $
+b00000000000000000000000001110010 %
+b00000000000000000000000011010110 &
+b00000000000000000000000000001111 '
+b00000000000000000000000001110011 (
+b00000000000000000000000011010111 )
+b00000000000000000000001111110110 *
+b00000000000000000000010001011010 +
+b00000000000000000000010010111110 ,
+b00000000000000000000001111110111 -
+b00000000000000000000010001011011 .
+b00000000000000000000010010111111 /
+10
+#135
+00
+#140
+b00000000000000000000000000001110 #
+b00000000000000000000000000001111 $
+b00000000000000000000000001110011 %
+b00000000000000000000000011010111 &
+b00000000000000000000000000010000 '
+b00000000000000000000000001110100 (
+b00000000000000000000000011011000 )
+b00000000000000000000001111110111 *
+b00000000000000000000010001011011 +
+b00000000000000000000010010111111 ,
+b00000000000000000000001111111000 -
+b00000000000000000000010001011100 .
+b00000000000000000000010011000000 /
+10
+#145
+00
+#150
+b00000000000000000000000000001111 #
+b00000000000000000000000000010000 $
+b00000000000000000000000001110100 %
+b00000000000000000000000011011000 &
+b00000000000000000000000000010001 '
+b00000000000000000000000001110101 (
+b00000000000000000000000011011001 )
+b00000000000000000000001111111000 *
+b00000000000000000000010001011100 +
+b00000000000000000000010011000000 ,
+b00000000000000000000001111111001 -
+b00000000000000000000010001011101 .
+b00000000000000000000010011000001 /
+10
+#155
+00
+#160
+b00000000000000000000000000010000 #
+b00000000000000000000000000010001 $
+b00000000000000000000000001110101 %
+b00000000000000000000000011011001 &
+b00000000000000000000000000010010 '
+b00000000000000000000000001110110 (
+b00000000000000000000000011011010 )
+b00000000000000000000001111111001 *
+b00000000000000000000010001011101 +
+b00000000000000000000010011000001 ,
+b00000000000000000000001111111010 -
+b00000000000000000000010001011110 .
+b00000000000000000000010011000010 /
+10
+#165
+00
+#170
+b00000000000000000000000000010001 #
+b00000000000000000000000000010010 $
+b00000000000000000000000001110110 %
+b00000000000000000000000011011010 &
+b00000000000000000000000000010011 '
+b00000000000000000000000001110111 (
+b00000000000000000000000011011011 )
+b00000000000000000000001111111010 *
+b00000000000000000000010001011110 +
+b00000000000000000000010011000010 ,
+b00000000000000000000001111111011 -
+b00000000000000000000010001011111 .
+b00000000000000000000010011000011 /
+10
+#175
+00
+#180
+b00000000000000000000000000010010 #
+b00000000000000000000000000010011 $
+b00000000000000000000000001110111 %
+b00000000000000000000000011011011 &
+b00000000000000000000000000010100 '
+b00000000000000000000000001111000 (
+b00000000000000000000000011011100 )
+b00000000000000000000001111111011 *
+b00000000000000000000010001011111 +
+b00000000000000000000010011000011 ,
+b00000000000000000000001111111100 -
+b00000000000000000000010001100000 .
+b00000000000000000000010011000100 /
+10
+#185
+00
+#190
+b00000000000000000000000000010011 #
+b00000000000000000000000000010100 $
+b00000000000000000000000001111000 %
+b00000000000000000000000011011100 &
+b00000000000000000000000000010101 '
+b00000000000000000000000001111001 (
+b00000000000000000000000011011101 )
+b00000000000000000000001111111100 *
+b00000000000000000000010001100000 +
+b00000000000000000000010011000100 ,
+b00000000000000000000001111111101 -
+b00000000000000000000010001100001 .
+b00000000000000000000010011000101 /
+10
+#195
+00
+#200
+b00000000000000000000000000010100 #
+b00000000000000000000000000010101 $
+b00000000000000000000000001111001 %
+b00000000000000000000000011011101 &
+b00000000000000000000000000010110 '
+b00000000000000000000000001111010 (
+b00000000000000000000000011011110 )
+b00000000000000000000001111111101 *
+b00000000000000000000010001100001 +
+b00000000000000000000010011000101 ,
+b00000000000000000000001111111110 -
+b00000000000000000000010001100010 .
+b00000000000000000000010011000110 /
+10
+#205
+00
+#210
+b00000000000000000000000000010101 #
+b00000000000000000000000000010110 $
+b00000000000000000000000001111010 %
+b00000000000000000000000011011110 &
+b00000000000000000000000000010111 '
+b00000000000000000000000001111011 (
+b00000000000000000000000011011111 )
+b00000000000000000000001111111110 *
+b00000000000000000000010001100010 +
+b00000000000000000000010011000110 ,
+b00000000000000000000001111111111 -
+b00000000000000000000010001100011 .
+b00000000000000000000010011000111 /
+10
diff --git a/test_regress/t/t_interface_ref_trace_noinl.pl b/test_regress/t/t_interface_ref_trace_noinl.pl
index f183f40d1..5a6d2ef82 100755
--- a/test_regress/t/t_interface_ref_trace_noinl.pl
+++ b/test_regress/t/t_interface_ref_trace_noinl.pl
@@ -11,7 +11,9 @@ if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); di
 scenarios(simulator => 1);
 
 top_filename("t/t_interface_ref_trace.v");
-golden_filename("t/t_interface_ref_trace.out");
+# Should be the same as the inlined version, but might have declarations
+# in a different order. Sadly vcddiff can't check equivalence
+# golden_filename("t/t_interface_ref_trace.out");
 
 compile(
     verilator_flags2 => ['-fno-inline --trace-structs --trace'],
diff --git a/test_regress/t/t_no_trace_top.out b/test_regress/t/t_no_trace_top.out
index 0d64685ff..5acb36c38 100644
--- a/test_regress/t/t_no_trace_top.out
+++ b/test_regress/t/t_no_trace_top.out
@@ -3,7 +3,7 @@ $timescale 1ps $end
 
  $scope module top $end
   $scope module t $end
-   $var wire  1 # clk $end
+   $var wire 1 # clk $end
    $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
diff --git a/test_regress/t/t_order_clkinst.out b/test_regress/t/t_order_clkinst.out
index 9e56d1ba0..f538b04f3 100644
--- a/test_regress/t/t_order_clkinst.out
+++ b/test_regress/t/t_order_clkinst.out
@@ -1,36 +1,34 @@
 $version Generated by VerilatedVcd $end
-$date Fri Jun 22 19:27:45 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 / clk $end
+  $var wire 1 # clk $end
   $scope module t $end
+   $var wire 1 # clk $end
+   $var wire 1 $ c1_start $end
    $var wire 32 % c1_count [31:0] $end
-   $var wire  1 # c1_start $end
-   $var wire 32 ( c3_count [31:0] $end
-   $var wire  1 ' c3_start $end
-   $var wire  1 / clk $end
-   $var wire  8 $ cyc [7:0] $end
+   $var wire 1 $ s2_start $end
    $var wire 32 & s2_count [31:0] $end
-   $var wire  1 # s2_start $end
+   $var wire 1 ' c3_start $end
+   $var wire 32 ( c3_count [31:0] $end
+   $var wire 8 ) cyc [7:0] $end
    $scope module c1 $end
+    $var wire 1 $ start $end
     $var wire 32 % count [31:0] $end
-    $var wire 32 * runner [31:0] $end
-    $var wire 32 ) runnerm1 [31:0] $end
-    $var wire  1 # start $end
+    $var wire 32 * runnerm1 [31:0] $end
+    $var wire 32 + runner [31:0] $end
    $upscope $end
    $scope module c3 $end
+    $var wire 1 ' start $end
     $var wire 32 ( count [31:0] $end
-    $var wire 32 . runner [31:0] $end
-    $var wire 32 - runnerm1 [31:0] $end
-    $var wire  1 ' start $end
+    $var wire 32 , runnerm1 [31:0] $end
+    $var wire 32 - runner [31:0] $end
    $upscope $end
    $scope module s2 $end
+    $var wire 1 $ start $end
     $var wire 32 & count [31:0] $end
-    $var wire 32 , runner [31:0] $end
-    $var wire 32 + runnerm1 [31:0] $end
-    $var wire  1 # start $end
+    $var wire 32 . runnerm1 [31:0] $end
+    $var wire 32 / runner [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -39,38 +37,38 @@ $enddefinitions $end
 
 #0
 0#
-b00000000 $
+0$
 b00000000000000000000000000000000 %
 b00000000000000000000000000000000 &
 0'
 b00000000000000000000000000000000 (
-b11111111111111111111111111111111 )
-b00000000000000000000000000000000 *
-b11111111111111111111111111111111 +
-b00000000000000000000000000000000 ,
-b11111111111111111111111111111111 -
-b00000000000000000000000000000000 .
-0/
+b00000000 )
+b11111111111111111111111111111111 *
+b00000000000000000000000000000000 +
+b11111111111111111111111111111111 ,
+b00000000000000000000000000000000 -
+b11111111111111111111111111111111 .
+b00000000000000000000000000000000 /
 #10
-b00000001 $
-1/
+1#
+b00000001 )
 #15
-0/
+0#
 #20
 1#
-b00000010 $
+1$
 b00000000000000000000000000000011 %
 b00000000000000000000000000000011 &
 1'
 b00000000000000000000000000000011 (
-1/
+b00000010 )
 #25
-0/
+0#
 #30
-b00000011 $
-1/
+1#
+b00000011 )
 #35
-0/
+0#
 #40
-1/
-b00000100 $
+1#
+b00000100 )
diff --git a/test_regress/t/t_split_var_2_trace.out b/test_regress/t/t_split_var_2_trace.out
index f03a9303f..6debe3788 100644
--- a/test_regress/t/t_split_var_2_trace.out
+++ b/test_regress/t/t_split_var_2_trace.out
@@ -1,388 +1,387 @@
 $version Generated by VerilatedVcd $end
-$date Wed Aug 11 12:35:42 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 T" clk $end
+  $var wire 1 E" clk $end
   $scope module t $end
-   $var wire 32 U" DEPTH [31:0] $end
-   $var wire 32 W" NUMSUB [31:0] $end
-   $var wire 32 V" WIDTH [31:0] $end
-   $var wire  1 T" clk $end
-   $var wire 64 Y" expc [63:0] $end
-   $var wire  8 X" in [7:0] $end
-   $var wire  8 w! out[0] [7:0] $end
-   $var wire  8 x! out[1] [7:0] $end
-   $var wire  8 y! out[2] [7:0] $end
-   $var wire  8 z! out[3] [7:0] $end
-   $var wire  8 {! out[4] [7:0] $end
-   $var wire  8 |! out[5] [7:0] $end
-   $var wire  8 }! out[6] [7:0] $end
-   $var wire  8 ~! out[7] [7:0] $end
-   $var wire  8 !" out[8] [7:0] $end
-   $var wire  3 - shift [2:0] $end
-   $var wire  8 #" through_tmp [7:0] $end
+   $var wire 1 E" clk $end
+   $var wire 32 F" DEPTH [31:0] $end
+   $var wire 32 G" WIDTH [31:0] $end
+   $var wire 32 H" NUMSUB [31:0] $end
+   $var wire 8 I" in [7:0] $end
+   $var wire 8 - out[0] [7:0] $end
+   $var wire 8 . out[1] [7:0] $end
+   $var wire 8 / out[2] [7:0] $end
+   $var wire 8 0 out[3] [7:0] $end
+   $var wire 8 1 out[4] [7:0] $end
+   $var wire 8 2 out[5] [7:0] $end
+   $var wire 8 3 out[6] [7:0] $end
+   $var wire 8 4 out[7] [7:0] $end
+   $var wire 8 5 out[8] [7:0] $end
+   $var wire 8 N through_tmp [7:0] $end
+   $var wire 3 O shift [2:0] $end
+   $var wire 64 J" expc [63:0] $end
    $scope module always_block $end
-    $var wire  1 . failed $end
+    $var wire 1 P failed $end
     $scope module unnamedblk1 $end
-     $var wire 32 / i [31:0] $end
+     $var wire 32 Q i [31:0] $end
     $upscope $end
    $upscope $end
    $scope module delay0 $end
-    $var wire 32 t! c [31:0] $end
-    $var wire  1 T" clk $end
-    $var wire  1 y" unpack_sig0(10) $end
-    $var wire  1 z" unpack_sig0(11) $end
-    $var wire  1 {" unpack_sig0(12) $end
-    $var wire  1 d! unpack_sig0(13) $end
-    $var wire  1 e! unpack_sig0(14) $end
-    $var wire  1 f! unpack_sig0(15) $end
-    $var wire  1 g! unpack_sig0(16) $end
-    $var wire  1 h! unpack_sig1(13) $end
-    $var wire  1 i! unpack_sig1(14) $end
-    $var wire  1 j! unpack_sig1(15) $end
-    $var wire  1 k! unpack_sig1(16) $end
-    $var wire  1 |" unpack_sig2(10) $end
-    $var wire  1 }" unpack_sig2(11) $end
-    $var wire  1 ~" unpack_sig2(12) $end
-    $var wire  1 l! unpack_sig2(13) $end
-    $var wire  1 m! unpack_sig2(14) $end
-    $var wire  1 n! unpack_sig2(15) $end
-    $var wire  1 o! unpack_sig2(16) $end
-    $var wire  1 p! unpack_sig3(13) $end
-    $var wire  1 q! unpack_sig3(14) $end
-    $var wire  1 r! unpack_sig3(15) $end
-    $var wire  1 s! unpack_sig3(16) $end
+    $var wire 1 E" clk $end
+    $var wire 1 L" unpack_sig0(10) $end
+    $var wire 1 M" unpack_sig0(11) $end
+    $var wire 1 N" unpack_sig0(12) $end
+    $var wire 1 R unpack_sig0(13) $end
+    $var wire 1 S unpack_sig0(14) $end
+    $var wire 1 T unpack_sig0(15) $end
+    $var wire 1 U unpack_sig0(16) $end
+    $var wire 1 V unpack_sig1(13) $end
+    $var wire 1 W unpack_sig1(14) $end
+    $var wire 1 X unpack_sig1(15) $end
+    $var wire 1 Y unpack_sig1(16) $end
+    $var wire 1 O" unpack_sig2(10) $end
+    $var wire 1 P" unpack_sig2(11) $end
+    $var wire 1 Q" unpack_sig2(12) $end
+    $var wire 1 Z unpack_sig2(13) $end
+    $var wire 1 [ unpack_sig2(14) $end
+    $var wire 1 \ unpack_sig2(15) $end
+    $var wire 1 ] unpack_sig2(16) $end
+    $var wire 1 ^ unpack_sig3(13) $end
+    $var wire 1 _ unpack_sig3(14) $end
+    $var wire 1 ` unpack_sig3(15) $end
+    $var wire 1 a unpack_sig3(16) $end
+    $var wire 32 b c [31:0] $end
    $upscope $end
    $scope module i_t_array_rev $end
-    $var wire  1 ' arrd(0) $end
-    $var wire  1 ( arrd(1) $end
-    $var wire  1 T" clk $end
-    $var wire 32 !# cyc [31:0] $end
-    $var wire  1 u! localbkw(0) $end
-    $var wire  1 v! localbkw(1) $end
-    $var wire  1 ) y0 $end
-    $var wire  1 * y1 $end
+    $var wire 1 E" clk $end
+    $var wire 32 R" cyc [31:0] $end
+    $var wire 1 # arrd(0) $end
+    $var wire 1 $ arrd(1) $end
+    $var wire 1 % y0 $end
+    $var wire 1 & y1 $end
+    $var wire 1 c localbkw(0) $end
+    $var wire 1 d localbkw(1) $end
     $scope module arr_rev_u $end
-     $var wire  1 + arrbkw[0] $end
-     $var wire  1 , arrbkw[1] $end
-     $var wire  1 ) y0 $end
-     $var wire  1 * y1 $end
+     $var wire 1 ' arrbkw[0] $end
+     $var wire 1 ( arrbkw[1] $end
+     $var wire 1 % y0 $end
+     $var wire 1 & y1 $end
     $upscope $end
    $upscope $end
    $scope module i_var_decl_with_init $end
-    $var wire 32 # var0 [-1:30] $end
-    $var wire 32 % var1 [30:-1] $end
-    $var wire 32 $ var2 [-1:30] $end
-    $var wire 32 & var3 [30:-1] $end
+    $var wire 32 ) var0 [-1:30] $end
+    $var wire 32 * var2 [-1:30] $end
+    $var wire 32 + var1 [30:-1] $end
+    $var wire 32 , var3 [30:-1] $end
    $upscope $end
    $scope module shifter0 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 [" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 0 out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire  8 2 tmp(-1) [7:0] $end
-    $var wire  8 1 tmp(-2) [7:0] $end
-    $var wire  8 X" tmp(-3) [7:0] $end
-    $var wire  8 0 tmp(0) [7:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 e out [7:0] $end
+    $var wire 32 S" OFFSET [31:0] $end
+    $var wire 8 f tmp(-1) [7:0] $end
+    $var wire 8 g tmp(-2) [7:0] $end
+    $var wire 8 I" tmp(-3) [7:0] $end
+    $var wire 8 e tmp(0) [7:0] $end
    $upscope $end
    $scope module shifter1 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 [" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 3 out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire  8 4 tmp(-1) [7:0] $end
-    $var wire  8 1 tmp(-2) [7:0] $end
-    $var wire  8 X" tmp(-3) [7:0] $end
-    $var wire  8 3 tmp(0) [7:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 e out [7:0] $end
+    $var wire 32 S" OFFSET [31:0] $end
+    $var wire 8 f tmp(-1) [7:0] $end
+    $var wire 8 g tmp(-2) [7:0] $end
+    $var wire 8 I" tmp(-3) [7:0] $end
+    $var wire 8 e tmp(0) [7:0] $end
    $upscope $end
    $scope module shifter2 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 \" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 5 out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire  8 X" tmp(1) [7:0] $end
-    $var wire  8 6 tmp(2) [7:0] $end
-    $var wire  8 7 tmp(3) [7:0] $end
-    $var wire  8 5 tmp(4) [7:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 e out [7:0] $end
+    $var wire 32 T" OFFSET [31:0] $end
+    $var wire 8 I" tmp(1) [7:0] $end
+    $var wire 8 g tmp(2) [7:0] $end
+    $var wire 8 f tmp(3) [7:0] $end
+    $var wire 8 e tmp(4) [7:0] $end
    $upscope $end
    $scope module shifter3 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 U" N [31:0] $end
-    $var wire 32 \" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 $" out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire  8 X" tmp0(1)(1) [7:0] $end
-    $var wire  8 X" tmp0(1)(2) [7:0] $end
-    $var wire  8 X" tmp0(1)(3) [7:0] $end
-    $var wire  8 1 tmp0(2)(1) [7:0] $end
-    $var wire  8 1 tmp0(2)(2) [7:0] $end
-    $var wire  8 1 tmp0(2)(3) [7:0] $end
-    $var wire  8 8 tmp0(3)(1) [7:0] $end
-    $var wire  8 9 tmp0(3)(2) [7:0] $end
-    $var wire  8 : tmp0(3)(3) [7:0] $end
-    $var wire  8 ; tmp0(4)(1) [7:0] $end
-    $var wire  8 < tmp0(4)(2) [7:0] $end
-    $var wire  8 = tmp0(4)(3) [7:0] $end
-    $var wire  8 > tmp1(1)(1) [7:0] $end
-    $var wire  8 ? tmp1(1)(2) [7:0] $end
-    $var wire  8 @ tmp1(1)(3) [7:0] $end
-    $var wire  8 A tmp1(2)(1) [7:0] $end
-    $var wire  8 B tmp1(2)(2) [7:0] $end
-    $var wire  8 C tmp1(2)(3) [7:0] $end
-    $var wire  8 D tmp1(3)(1) [7:0] $end
-    $var wire  8 E tmp1(3)(2) [7:0] $end
-    $var wire  8 F tmp1(3)(3) [7:0] $end
-    $var wire  8 G tmp1(4)(1) [7:0] $end
-    $var wire  8 H tmp1(4)(2) [7:0] $end
-    $var wire  8 I tmp1(4)(3) [7:0] $end
-    $var wire  8 L! tmp10(1)(1) [7:0] $end
-    $var wire  8 M! tmp10(1)(2) [7:0] $end
-    $var wire  8 N! tmp10(1)(3) [7:0] $end
-    $var wire  8 O! tmp10(2)(1) [7:0] $end
-    $var wire  8 P! tmp10(2)(2) [7:0] $end
-    $var wire  8 Q! tmp10(2)(3) [7:0] $end
-    $var wire  8 R! tmp10(3)(1) [7:0] $end
-    $var wire  8 S! tmp10(3)(2) [7:0] $end
-    $var wire  8 T! tmp10(3)(3) [7:0] $end
-    $var wire  8 U! tmp10(4)(1) [7:0] $end
-    $var wire  8 V! tmp10(4)(2) [7:0] $end
-    $var wire  8 W! tmp10(4)(3) [7:0] $end
-    $var wire  8 %" tmp12(-1)(1)(1) [7:0] $end
-    $var wire  8 &" tmp12(-1)(1)(2) [7:0] $end
-    $var wire  8 '" tmp12(-1)(1)(3) [7:0] $end
-    $var wire  8 (" tmp12(-1)(2)(1) [7:0] $end
-    $var wire  8 )" tmp12(-1)(2)(2) [7:0] $end
-    $var wire  8 *" tmp12(-1)(2)(3) [7:0] $end
-    $var wire  8 +" tmp12(-1)(3)(1) [7:0] $end
-    $var wire  8 ," tmp12(-1)(3)(2) [7:0] $end
-    $var wire  8 -" tmp12(-1)(3)(3) [7:0] $end
-    $var wire  8 $" tmp12(-1)(4)(1) [7:0] $end
-    $var wire  8 ." tmp12(-1)(4)(2) [7:0] $end
-    $var wire  8 /" tmp12(-1)(4)(3) [7:0] $end
-    $var wire  8 0" tmp12(0)(1)(1) [7:0] $end
-    $var wire  8 1" tmp12(0)(1)(2) [7:0] $end
-    $var wire  8 2" tmp12(0)(1)(3) [7:0] $end
-    $var wire  8 3" tmp12(0)(2)(1) [7:0] $end
-    $var wire  8 4" tmp12(0)(2)(2) [7:0] $end
-    $var wire  8 5" tmp12(0)(2)(3) [7:0] $end
-    $var wire  8 6" tmp12(0)(3)(1) [7:0] $end
-    $var wire  8 7" tmp12(0)(3)(2) [7:0] $end
-    $var wire  8 8" tmp12(0)(3)(3) [7:0] $end
-    $var wire  8 9" tmp12(0)(4)(1) [7:0] $end
-    $var wire  8 :" tmp12(0)(4)(2) [7:0] $end
-    $var wire  8 ;" tmp12(0)(4)(3) [7:0] $end
-    $var wire  8 i" tmp13(1)(1) [7:0] $end
-    $var wire  8 j" tmp13(1)(2) [7:0] $end
-    $var wire  8 k" tmp13(1)(3) [7:0] $end
-    $var wire  8 l" tmp13(2)(1) [7:0] $end
-    $var wire  8 m" tmp13(2)(2) [7:0] $end
-    $var wire  8 n" tmp13(2)(3) [7:0] $end
-    $var wire  8 o" tmp13(3)(1) [7:0] $end
-    $var wire  8 p" tmp13(3)(2) [7:0] $end
-    $var wire  8 q" tmp13(3)(3) [7:0] $end
-    $var wire  8 r" tmp13(4)(1) [7:0] $end
-    $var wire  8 s" tmp13(4)(2) [7:0] $end
-    $var wire  8 t" tmp13(4)(3) [7:0] $end
-    $var wire  8 J tmp2[1][1] [7:0] $end
-    $var wire  8 K tmp2[1][2] [7:0] $end
-    $var wire  8 L tmp2[1][3] [7:0] $end
-    $var wire  8 M tmp2[2][1] [7:0] $end
-    $var wire  8 N tmp2[2][2] [7:0] $end
-    $var wire  8 O tmp2[2][3] [7:0] $end
-    $var wire  8 P tmp2[3][1] [7:0] $end
-    $var wire  8 Q tmp2[3][2] [7:0] $end
-    $var wire  8 R tmp2[3][3] [7:0] $end
-    $var wire  8 S tmp2[4][1] [7:0] $end
-    $var wire  8 T tmp2[4][2] [7:0] $end
-    $var wire  8 U tmp2[4][3] [7:0] $end
-    $var wire  8 V tmp3(1)(1) [7:0] $end
-    $var wire  8 W tmp3(1)(2) [7:0] $end
-    $var wire  8 X tmp3(1)(3) [7:0] $end
-    $var wire  8 Y tmp3(2)(1) [7:0] $end
-    $var wire  8 Z tmp3(2)(2) [7:0] $end
-    $var wire  8 [ tmp3(2)(3) [7:0] $end
-    $var wire  8 \ tmp3(3)(1) [7:0] $end
-    $var wire  8 ] tmp3(3)(2) [7:0] $end
-    $var wire  8 ^ tmp3(3)(3) [7:0] $end
-    $var wire  8 _ tmp3(4)(1) [7:0] $end
-    $var wire  8 ` tmp3(4)(2) [7:0] $end
-    $var wire  8 a tmp3(4)(3) [7:0] $end
-    $var wire  8 b tmp4(1)(1) [7:0] $end
-    $var wire  8 c tmp4(1)(2) [7:0] $end
-    $var wire  8 d tmp4(1)(3) [7:0] $end
-    $var wire  8 e tmp4(2)(1) [7:0] $end
-    $var wire  8 f tmp4(2)(2) [7:0] $end
-    $var wire  8 g tmp4(2)(3) [7:0] $end
-    $var wire  8 h tmp4(3)(1) [7:0] $end
-    $var wire  8 i tmp4(3)(2) [7:0] $end
-    $var wire  8 j tmp4(3)(3) [7:0] $end
-    $var wire  8 k tmp4(4)(1) [7:0] $end
-    $var wire  8 l tmp4(4)(2) [7:0] $end
-    $var wire  8 m tmp4(4)(3) [7:0] $end
-    $var wire  8 n tmp5[1][1] [7:0] $end
-    $var wire  8 o tmp5[1][2] [7:0] $end
-    $var wire  8 p tmp5[1][3] [7:0] $end
-    $var wire  8 q tmp5[2][1] [7:0] $end
-    $var wire  8 r tmp5[2][2] [7:0] $end
-    $var wire  8 s tmp5[2][3] [7:0] $end
-    $var wire  8 t tmp5[3][1] [7:0] $end
-    $var wire  8 u tmp5[3][2] [7:0] $end
-    $var wire  8 v tmp5[3][3] [7:0] $end
-    $var wire  8 w tmp5[4][1] [7:0] $end
-    $var wire  8 x tmp5[4][2] [7:0] $end
-    $var wire  8 y tmp5[4][3] [7:0] $end
-    $var wire  8 z tmp6(1)(1) [7:0] $end
-    $var wire  8 { tmp6(1)(2) [7:0] $end
-    $var wire  8 | tmp6(1)(3) [7:0] $end
-    $var wire  8 } tmp6(2)(1) [7:0] $end
-    $var wire  8 ~ tmp6(2)(2) [7:0] $end
-    $var wire  8 !! tmp6(2)(3) [7:0] $end
-    $var wire  8 "! tmp6(3)(1) [7:0] $end
-    $var wire  8 #! tmp6(3)(2) [7:0] $end
-    $var wire  8 $! tmp6(3)(3) [7:0] $end
-    $var wire  8 %! tmp6(4)(1) [7:0] $end
-    $var wire  8 &! tmp6(4)(2) [7:0] $end
-    $var wire  8 '! tmp6(4)(3) [7:0] $end
-    $var wire  8 (! tmp7(2)(1) [7:0] $end
-    $var wire  8 )! tmp7(2)(2) [7:0] $end
-    $var wire  8 *! tmp7(2)(3) [7:0] $end
-    $var wire  8 +! tmp7(3)(1) [7:0] $end
-    $var wire  8 ,! tmp7(3)(2) [7:0] $end
-    $var wire  8 -! tmp7(3)(3) [7:0] $end
-    $var wire  8 .! tmp7(4)(1) [7:0] $end
-    $var wire  8 /! tmp7(4)(2) [7:0] $end
-    $var wire  8 0! tmp7(4)(3) [7:0] $end
-    $var wire  8 1! tmp7(5)(1) [7:0] $end
-    $var wire  8 2! tmp7(5)(2) [7:0] $end
-    $var wire  8 3! tmp7(5)(3) [7:0] $end
-    $var wire  8 ]" tmp8(0)(1) [7:0] $end
-    $var wire  8 ^" tmp8(0)(2) [7:0] $end
-    $var wire  8 _" tmp8(0)(3) [7:0] $end
-    $var wire  8 `" tmp8(1)(1) [7:0] $end
-    $var wire  8 a" tmp8(1)(2) [7:0] $end
-    $var wire  8 b" tmp8(1)(3) [7:0] $end
-    $var wire  8 4! tmp8(2)(1) [7:0] $end
-    $var wire  8 5! tmp8(2)(2) [7:0] $end
-    $var wire  8 6! tmp8(2)(3) [7:0] $end
-    $var wire  8 7! tmp8(3)(1) [7:0] $end
-    $var wire  8 8! tmp8(3)(2) [7:0] $end
-    $var wire  8 9! tmp8(3)(3) [7:0] $end
-    $var wire  8 :! tmp8(4)(1) [7:0] $end
-    $var wire  8 ;! tmp8(4)(2) [7:0] $end
-    $var wire  8 <! tmp8(4)(3) [7:0] $end
-    $var wire  8 =! tmp8(5)(1) [7:0] $end
-    $var wire  8 >! tmp8(5)(2) [7:0] $end
-    $var wire  8 ?! tmp8(5)(3) [7:0] $end
-    $var wire  8 c" tmp8(6)(1) [7:0] $end
-    $var wire  8 d" tmp8(6)(2) [7:0] $end
-    $var wire  8 e" tmp8(6)(3) [7:0] $end
-    $var wire  8 f" tmp8(7)(1) [7:0] $end
-    $var wire  8 g" tmp8(7)(2) [7:0] $end
-    $var wire  8 h" tmp8(7)(3) [7:0] $end
-    $var wire  8 @! tmp9(4)(1) [7:0] $end
-    $var wire  8 A! tmp9(4)(2) [7:0] $end
-    $var wire  8 B! tmp9(4)(3) [7:0] $end
-    $var wire  8 C! tmp9(5)(1) [7:0] $end
-    $var wire  8 D! tmp9(5)(2) [7:0] $end
-    $var wire  8 E! tmp9(5)(3) [7:0] $end
-    $var wire  8 F! tmp9(6)(1) [7:0] $end
-    $var wire  8 G! tmp9(6)(2) [7:0] $end
-    $var wire  8 H! tmp9(6)(3) [7:0] $end
-    $var wire  8 I! tmp9(7)(1) [7:0] $end
-    $var wire  8 J! tmp9(7)(2) [7:0] $end
-    $var wire  8 K! tmp9(7)(3) [7:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 6 out [7:0] $end
+    $var wire 32 T" OFFSET [31:0] $end
+    $var wire 32 F" N [31:0] $end
+    $var wire 8 I" tmp0(1)(1) [7:0] $end
+    $var wire 8 I" tmp0(1)(2) [7:0] $end
+    $var wire 8 I" tmp0(1)(3) [7:0] $end
+    $var wire 8 g tmp0(2)(1) [7:0] $end
+    $var wire 8 g tmp0(2)(2) [7:0] $end
+    $var wire 8 g tmp0(2)(3) [7:0] $end
+    $var wire 8 f tmp0(3)(1) [7:0] $end
+    $var wire 8 f tmp0(3)(2) [7:0] $end
+    $var wire 8 f tmp0(3)(3) [7:0] $end
+    $var wire 8 e tmp0(4)(1) [7:0] $end
+    $var wire 8 e tmp0(4)(2) [7:0] $end
+    $var wire 8 e tmp0(4)(3) [7:0] $end
+    $var wire 8 h tmp1(1)(1) [7:0] $end
+    $var wire 8 i tmp1(1)(2) [7:0] $end
+    $var wire 8 j tmp1(1)(3) [7:0] $end
+    $var wire 8 k tmp1(2)(1) [7:0] $end
+    $var wire 8 l tmp1(2)(2) [7:0] $end
+    $var wire 8 m tmp1(2)(3) [7:0] $end
+    $var wire 8 n tmp1(3)(1) [7:0] $end
+    $var wire 8 o tmp1(3)(2) [7:0] $end
+    $var wire 8 p tmp1(3)(3) [7:0] $end
+    $var wire 8 q tmp1(4)(1) [7:0] $end
+    $var wire 8 r tmp1(4)(2) [7:0] $end
+    $var wire 8 s tmp1(4)(3) [7:0] $end
+    $var wire 8 t tmp2[1][1] [7:0] $end
+    $var wire 8 u tmp2[1][2] [7:0] $end
+    $var wire 8 v tmp2[1][3] [7:0] $end
+    $var wire 8 w tmp2[2][1] [7:0] $end
+    $var wire 8 x tmp2[2][2] [7:0] $end
+    $var wire 8 y tmp2[2][3] [7:0] $end
+    $var wire 8 z tmp2[3][1] [7:0] $end
+    $var wire 8 { tmp2[3][2] [7:0] $end
+    $var wire 8 | tmp2[3][3] [7:0] $end
+    $var wire 8 } tmp2[4][1] [7:0] $end
+    $var wire 8 ~ tmp2[4][2] [7:0] $end
+    $var wire 8 !! tmp2[4][3] [7:0] $end
+    $var wire 8 "! tmp3(1)(1) [7:0] $end
+    $var wire 8 #! tmp3(1)(2) [7:0] $end
+    $var wire 8 $! tmp3(1)(3) [7:0] $end
+    $var wire 8 %! tmp3(2)(1) [7:0] $end
+    $var wire 8 &! tmp3(2)(2) [7:0] $end
+    $var wire 8 '! tmp3(2)(3) [7:0] $end
+    $var wire 8 (! tmp3(3)(1) [7:0] $end
+    $var wire 8 )! tmp3(3)(2) [7:0] $end
+    $var wire 8 *! tmp3(3)(3) [7:0] $end
+    $var wire 8 +! tmp3(4)(1) [7:0] $end
+    $var wire 8 ,! tmp3(4)(2) [7:0] $end
+    $var wire 8 -! tmp3(4)(3) [7:0] $end
+    $var wire 8 .! tmp4(1)(1) [7:0] $end
+    $var wire 8 /! tmp4(1)(2) [7:0] $end
+    $var wire 8 0! tmp4(1)(3) [7:0] $end
+    $var wire 8 1! tmp4(2)(1) [7:0] $end
+    $var wire 8 2! tmp4(2)(2) [7:0] $end
+    $var wire 8 3! tmp4(2)(3) [7:0] $end
+    $var wire 8 4! tmp4(3)(1) [7:0] $end
+    $var wire 8 5! tmp4(3)(2) [7:0] $end
+    $var wire 8 6! tmp4(3)(3) [7:0] $end
+    $var wire 8 7! tmp4(4)(1) [7:0] $end
+    $var wire 8 8! tmp4(4)(2) [7:0] $end
+    $var wire 8 9! tmp4(4)(3) [7:0] $end
+    $var wire 8 :! tmp5[1][1] [7:0] $end
+    $var wire 8 ;! tmp5[1][2] [7:0] $end
+    $var wire 8 <! tmp5[1][3] [7:0] $end
+    $var wire 8 =! tmp5[2][1] [7:0] $end
+    $var wire 8 >! tmp5[2][2] [7:0] $end
+    $var wire 8 ?! tmp5[2][3] [7:0] $end
+    $var wire 8 @! tmp5[3][1] [7:0] $end
+    $var wire 8 A! tmp5[3][2] [7:0] $end
+    $var wire 8 B! tmp5[3][3] [7:0] $end
+    $var wire 8 C! tmp5[4][1] [7:0] $end
+    $var wire 8 D! tmp5[4][2] [7:0] $end
+    $var wire 8 E! tmp5[4][3] [7:0] $end
+    $var wire 8 F! tmp6(1)(1) [7:0] $end
+    $var wire 8 G! tmp6(1)(2) [7:0] $end
+    $var wire 8 H! tmp6(1)(3) [7:0] $end
+    $var wire 8 I! tmp6(2)(1) [7:0] $end
+    $var wire 8 J! tmp6(2)(2) [7:0] $end
+    $var wire 8 K! tmp6(2)(3) [7:0] $end
+    $var wire 8 L! tmp6(3)(1) [7:0] $end
+    $var wire 8 M! tmp6(3)(2) [7:0] $end
+    $var wire 8 N! tmp6(3)(3) [7:0] $end
+    $var wire 8 O! tmp6(4)(1) [7:0] $end
+    $var wire 8 P! tmp6(4)(2) [7:0] $end
+    $var wire 8 Q! tmp6(4)(3) [7:0] $end
+    $var wire 8 R! tmp7(2)(1) [7:0] $end
+    $var wire 8 S! tmp7(2)(2) [7:0] $end
+    $var wire 8 T! tmp7(2)(3) [7:0] $end
+    $var wire 8 U! tmp7(3)(1) [7:0] $end
+    $var wire 8 V! tmp7(3)(2) [7:0] $end
+    $var wire 8 W! tmp7(3)(3) [7:0] $end
+    $var wire 8 X! tmp7(4)(1) [7:0] $end
+    $var wire 8 Y! tmp7(4)(2) [7:0] $end
+    $var wire 8 Z! tmp7(4)(3) [7:0] $end
+    $var wire 8 [! tmp7(5)(1) [7:0] $end
+    $var wire 8 \! tmp7(5)(2) [7:0] $end
+    $var wire 8 ]! tmp7(5)(3) [7:0] $end
+    $var wire 8 U" tmp8(0)(1) [7:0] $end
+    $var wire 8 V" tmp8(0)(2) [7:0] $end
+    $var wire 8 W" tmp8(0)(3) [7:0] $end
+    $var wire 8 X" tmp8(1)(1) [7:0] $end
+    $var wire 8 Y" tmp8(1)(2) [7:0] $end
+    $var wire 8 Z" tmp8(1)(3) [7:0] $end
+    $var wire 8 ^! tmp8(2)(1) [7:0] $end
+    $var wire 8 _! tmp8(2)(2) [7:0] $end
+    $var wire 8 `! tmp8(2)(3) [7:0] $end
+    $var wire 8 a! tmp8(3)(1) [7:0] $end
+    $var wire 8 b! tmp8(3)(2) [7:0] $end
+    $var wire 8 c! tmp8(3)(3) [7:0] $end
+    $var wire 8 d! tmp8(4)(1) [7:0] $end
+    $var wire 8 e! tmp8(4)(2) [7:0] $end
+    $var wire 8 f! tmp8(4)(3) [7:0] $end
+    $var wire 8 g! tmp8(5)(1) [7:0] $end
+    $var wire 8 h! tmp8(5)(2) [7:0] $end
+    $var wire 8 i! tmp8(5)(3) [7:0] $end
+    $var wire 8 [" tmp8(6)(1) [7:0] $end
+    $var wire 8 \" tmp8(6)(2) [7:0] $end
+    $var wire 8 ]" tmp8(6)(3) [7:0] $end
+    $var wire 8 ^" tmp8(7)(1) [7:0] $end
+    $var wire 8 _" tmp8(7)(2) [7:0] $end
+    $var wire 8 `" tmp8(7)(3) [7:0] $end
+    $var wire 8 j! tmp9(4)(1) [7:0] $end
+    $var wire 8 k! tmp9(4)(2) [7:0] $end
+    $var wire 8 l! tmp9(4)(3) [7:0] $end
+    $var wire 8 m! tmp9(5)(1) [7:0] $end
+    $var wire 8 n! tmp9(5)(2) [7:0] $end
+    $var wire 8 o! tmp9(5)(3) [7:0] $end
+    $var wire 8 p! tmp9(6)(1) [7:0] $end
+    $var wire 8 q! tmp9(6)(2) [7:0] $end
+    $var wire 8 r! tmp9(6)(3) [7:0] $end
+    $var wire 8 s! tmp9(7)(1) [7:0] $end
+    $var wire 8 t! tmp9(7)(2) [7:0] $end
+    $var wire 8 u! tmp9(7)(3) [7:0] $end
+    $var wire 8 v! tmp10(1)(1) [7:0] $end
+    $var wire 8 w! tmp10(1)(2) [7:0] $end
+    $var wire 8 x! tmp10(1)(3) [7:0] $end
+    $var wire 8 y! tmp10(2)(1) [7:0] $end
+    $var wire 8 z! tmp10(2)(2) [7:0] $end
+    $var wire 8 {! tmp10(2)(3) [7:0] $end
+    $var wire 8 |! tmp10(3)(1) [7:0] $end
+    $var wire 8 }! tmp10(3)(2) [7:0] $end
+    $var wire 8 ~! tmp10(3)(3) [7:0] $end
+    $var wire 8 !" tmp10(4)(1) [7:0] $end
+    $var wire 8 "" tmp10(4)(2) [7:0] $end
+    $var wire 8 #" tmp10(4)(3) [7:0] $end
+    $var wire 8 7 tmp12(-1)(1)(1) [7:0] $end
+    $var wire 8 8 tmp12(-1)(1)(2) [7:0] $end
+    $var wire 8 9 tmp12(-1)(1)(3) [7:0] $end
+    $var wire 8 : tmp12(-1)(2)(1) [7:0] $end
+    $var wire 8 ; tmp12(-1)(2)(2) [7:0] $end
+    $var wire 8 < tmp12(-1)(2)(3) [7:0] $end
+    $var wire 8 = tmp12(-1)(3)(1) [7:0] $end
+    $var wire 8 > tmp12(-1)(3)(2) [7:0] $end
+    $var wire 8 ? tmp12(-1)(3)(3) [7:0] $end
+    $var wire 8 6 tmp12(-1)(4)(1) [7:0] $end
+    $var wire 8 @ tmp12(-1)(4)(2) [7:0] $end
+    $var wire 8 A tmp12(-1)(4)(3) [7:0] $end
+    $var wire 8 B tmp12(0)(1)(1) [7:0] $end
+    $var wire 8 C tmp12(0)(1)(2) [7:0] $end
+    $var wire 8 D tmp12(0)(1)(3) [7:0] $end
+    $var wire 8 E tmp12(0)(2)(1) [7:0] $end
+    $var wire 8 F tmp12(0)(2)(2) [7:0] $end
+    $var wire 8 G tmp12(0)(2)(3) [7:0] $end
+    $var wire 8 H tmp12(0)(3)(1) [7:0] $end
+    $var wire 8 I tmp12(0)(3)(2) [7:0] $end
+    $var wire 8 J tmp12(0)(3)(3) [7:0] $end
+    $var wire 8 K tmp12(0)(4)(1) [7:0] $end
+    $var wire 8 L tmp12(0)(4)(2) [7:0] $end
+    $var wire 8 M tmp12(0)(4)(3) [7:0] $end
+    $var wire 8 a" tmp13(1)(1) [7:0] $end
+    $var wire 8 b" tmp13(1)(2) [7:0] $end
+    $var wire 8 c" tmp13(1)(3) [7:0] $end
+    $var wire 8 d" tmp13(2)(1) [7:0] $end
+    $var wire 8 e" tmp13(2)(2) [7:0] $end
+    $var wire 8 f" tmp13(2)(3) [7:0] $end
+    $var wire 8 g" tmp13(3)(1) [7:0] $end
+    $var wire 8 h" tmp13(3)(2) [7:0] $end
+    $var wire 8 i" tmp13(3)(3) [7:0] $end
+    $var wire 8 j" tmp13(4)(1) [7:0] $end
+    $var wire 8 k" tmp13(4)(2) [7:0] $end
+    $var wire 8 l" tmp13(4)(3) [7:0] $end
    $upscope $end
    $scope module shifter4 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 u" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 X! out [7:0] $end
-    $var wire 24 w" pad [23:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire 32 v" tmp(2) [31:0] $end
-    $var wire 32 Y! tmp(3) [31:0] $end
-    $var wire 32 Z! tmp(4) [31:0] $end
-    $var wire 32 [! tmp(5) [31:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 $" out [7:0] $end
+    $var wire 32 m" OFFSET [31:0] $end
+    $var wire 32 n" tmp(2) [31:0] $end
+    $var wire 32 %" tmp(3) [31:0] $end
+    $var wire 32 &" tmp(4) [31:0] $end
+    $var wire 32 '" tmp(5) [31:0] $end
+    $var wire 24 o" pad [23:0] $end
    $upscope $end
    $scope module shifter5 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 x" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 \! out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire 32 ]! tmp [31:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 (" out [7:0] $end
+    $var wire 32 p" OFFSET [31:0] $end
+    $var wire 32 )" tmp [31:0] $end
    $upscope $end
    $scope module shifter6 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 x" OFFSET [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 ^! out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire 32 _! tmp [31:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 *" out [7:0] $end
+    $var wire 32 p" OFFSET [31:0] $end
+    $var wire 32 +" tmp [31:0] $end
    $upscope $end
    $scope module shifter7 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 `! out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire 32 a! tmp [31:0] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 e out [7:0] $end
+    $var wire 32 ," tmp [31:0] $end
    $upscope $end
    $scope module shifter8 $end
-    $var wire 32 U" DEPTH [31:0] $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 X" in [7:0] $end
-    $var wire  8 b! out [7:0] $end
-    $var wire  3 - shift [2:0] $end
-    $var wire 32 c! tmp [0:31] $end
+    $var wire 32 F" DEPTH [31:0] $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 I" in [7:0] $end
+    $var wire 3 O shift [2:0] $end
+    $var wire 8 e out [7:0] $end
+    $var wire 32 ," tmp [0:31] $end
    $upscope $end
    $scope module though0 $end
-    $var wire 32 V" WIDTH [31:0] $end
-    $var wire  8 "" in [7:0] $end
-    $var wire  8 #" out [7:0] $end
-    $var wire  1 <" unpack_tmp(0) $end
-    $var wire  1 =" unpack_tmp(1) $end
-    $var wire  1 >" unpack_tmp(2) $end
-    $var wire  1 ?" unpack_tmp(3) $end
-    $var wire  1 @" unpack_tmp(4) $end
-    $var wire  1 A" unpack_tmp(5) $end
-    $var wire  1 B" unpack_tmp(6) $end
-    $var wire  1 C" unpack_tmp(7) $end
+    $var wire 32 G" WIDTH [31:0] $end
+    $var wire 8 e in [7:0] $end
+    $var wire 8 N out [7:0] $end
+    $var wire 1 -" unpack_tmp(0) $end
+    $var wire 1 ." unpack_tmp(1) $end
+    $var wire 1 /" unpack_tmp(2) $end
+    $var wire 1 0" unpack_tmp(3) $end
+    $var wire 1 1" unpack_tmp(4) $end
+    $var wire 1 2" unpack_tmp(5) $end
+    $var wire 1 3" unpack_tmp(6) $end
+    $var wire 1 4" unpack_tmp(7) $end
     $scope module i_pack2unpack $end
-     $var wire 32 V" WIDTH [31:0] $end
-     $var wire  8 "" in [7:0] $end
-     $var wire  1 D" out[0] $end
-     $var wire  1 E" out[1] $end
-     $var wire  1 F" out[2] $end
-     $var wire  1 G" out[3] $end
-     $var wire  1 H" out[4] $end
-     $var wire  1 I" out[5] $end
-     $var wire  1 J" out[6] $end
-     $var wire  1 K" out[7] $end
+     $var wire 32 G" WIDTH [31:0] $end
+     $var wire 8 e in [7:0] $end
+     $var wire 1 5" out[0] $end
+     $var wire 1 6" out[1] $end
+     $var wire 1 7" out[2] $end
+     $var wire 1 8" out[3] $end
+     $var wire 1 9" out[4] $end
+     $var wire 1 :" out[5] $end
+     $var wire 1 ;" out[6] $end
+     $var wire 1 <" out[7] $end
     $upscope $end
     $scope module i_unpack2pack $end
-     $var wire 32 V" WIDTH [31:0] $end
-     $var wire  1 L" in[0] $end
-     $var wire  1 M" in[1] $end
-     $var wire  1 N" in[2] $end
-     $var wire  1 O" in[3] $end
-     $var wire  1 P" in[4] $end
-     $var wire  1 Q" in[5] $end
-     $var wire  1 R" in[6] $end
-     $var wire  1 S" in[7] $end
-     $var wire  8 #" out [7:0] $end
+     $var wire 32 G" WIDTH [31:0] $end
+     $var wire 1 =" in[0] $end
+     $var wire 1 >" in[1] $end
+     $var wire 1 ?" in[2] $end
+     $var wire 1 @" in[3] $end
+     $var wire 1 A" in[4] $end
+     $var wire 1 B" in[5] $end
+     $var wire 1 C" in[6] $end
+     $var wire 1 D" in[7] $end
+     $var wire 8 N out [7:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
@@ -391,19 +390,19 @@ $enddefinitions $end
 
 
 #0
-b00000001001000110100010101100111 #
-b00100000000000000000000000000000 $
-b00000001001000110100000000100111 %
-b00000000000000000000000000000011 &
-1'
-0(
-0)
-1*
-0+
-1,
-b000 -
-0.
-b00000000000000000000000000000000 /
+1#
+0$
+0%
+1&
+0'
+1(
+b00000001001000110100010101100111 )
+b00100000000000000000000000000000 *
+b00000001001000110100000000100111 +
+b00000000000000000000000000000011 ,
+b10001110 -
+b10001110 .
+b10001110 /
 b10001110 0
 b10001110 1
 b10001110 2
@@ -435,28 +434,28 @@ b10001110 K
 b10001110 L
 b10001110 M
 b10001110 N
-b10001110 O
-b10001110 P
-b10001110 Q
-b10001110 R
-b10001110 S
-b10001110 T
-b10001110 U
-b10001110 V
-b10001110 W
-b10001110 X
-b10001110 Y
-b10001110 Z
-b10001110 [
-b10001110 \
-b10001110 ]
-b10001110 ^
-b10001110 _
-b10001110 `
-b10001110 a
-b10001110 b
-b10001110 c
-b10001110 d
+b000 O
+0P
+b00000000000000000000000000000000 Q
+0R
+0S
+0T
+0U
+0V
+0W
+0X
+0Y
+0Z
+0[
+0\
+0]
+0^
+0_
+0`
+0a
+b00000000000000000000000000000000 b
+0c
+0d
 b10001110 e
 b10001110 f
 b10001110 g
@@ -539,36 +538,36 @@ b10001110 U!
 b10001110 V!
 b10001110 W!
 b10001110 X!
-b00000000000000000000000010001110 Y!
-b00000000000000000000000010001110 Z!
-b00000000000000000000000010001110 [!
+b10001110 Y!
+b10001110 Z!
+b10001110 [!
 b10001110 \!
-b10001110100011101000111010001110 ]!
+b10001110 ]!
 b10001110 ^!
-b10001110100011101000111010001110 _!
+b10001110 _!
 b10001110 `!
-b10001110100011101000111010001110 a!
+b10001110 a!
 b10001110 b!
-b10001110100011101000111010001110 c!
-0d!
-0e!
-0f!
-0g!
-0h!
-0i!
-0j!
-0k!
-0l!
-0m!
-0n!
-0o!
-0p!
-0q!
-0r!
-0s!
-b00000000000000000000000000000000 t!
-0u!
-0v!
+b10001110 c!
+b10001110 d!
+b10001110 e!
+b10001110 f!
+b10001110 g!
+b10001110 h!
+b10001110 i!
+b10001110 j!
+b10001110 k!
+b10001110 l!
+b10001110 m!
+b10001110 n!
+b10001110 o!
+b10001110 p!
+b10001110 q!
+b10001110 r!
+b10001110 s!
+b10001110 t!
+b10001110 u!
+b10001110 v!
 b10001110 w!
 b10001110 x!
 b10001110 y!
@@ -581,61 +580,61 @@ b10001110 !"
 b10001110 ""
 b10001110 #"
 b10001110 $"
-b10001110 %"
-b10001110 &"
-b10001110 '"
+b00000000000000000000000010001110 %"
+b00000000000000000000000010001110 &"
+b00000000000000000000000010001110 '"
 b10001110 ("
-b10001110 )"
+b10001110100011101000111010001110 )"
 b10001110 *"
-b10001110 +"
-b10001110 ,"
-b10001110 -"
-b10001110 ."
-b10001110 /"
-b10001110 0"
-b10001110 1"
-b10001110 2"
-b10001110 3"
-b10001110 4"
-b10001110 5"
-b10001110 6"
-b10001110 7"
-b10001110 8"
-b10001110 9"
-b10001110 :"
-b10001110 ;"
+b10001110100011101000111010001110 +"
+b10001110100011101000111010001110 ,"
+1-"
+0."
+0/"
+00"
+11"
+12"
+13"
+04"
+05"
+16"
+17"
+18"
+09"
+0:"
+0;"
 1<"
 0="
-0>"
-0?"
+1>"
+1?"
 1@"
-1A"
-1B"
+0A"
+0B"
 0C"
-0D"
-1E"
-1F"
-1G"
-0H"
-0I"
-0J"
-1K"
+1D"
+0E"
+b00000000000000000000000000000011 F"
+b00000000000000000000000000001000 G"
+b00000000000000000000000000001001 H"
+b10001110 I"
+b1000111001000111101000111101000111101000011101000011101000011101 J"
 0L"
-1M"
-1N"
-1O"
+0M"
+0N"
+0O"
 0P"
 0Q"
-0R"
-1S"
-0T"
-b00000000000000000000000000000011 U"
-b00000000000000000000000000001000 V"
-b00000000000000000000000000001001 W"
-b10001110 X"
-b1000111001000111101000111101000111101000011101000011101000011101 Y"
-b11111111111111111111111111111101 ["
-b00000000000000000000000000000001 \"
+b00000000000000000000000000000000 R"
+b11111111111111111111111111111101 S"
+b00000000000000000000000000000001 T"
+b00000000 U"
+b00000000 V"
+b00000000 W"
+b00000000 X"
+b00000000 Y"
+b00000000 Z"
+b00000000 ["
+b00000000 \"
 b00000000 ]"
 b00000000 ^"
 b00000000 _"
@@ -652,28 +651,14 @@ b00000000 i"
 b00000000 j"
 b00000000 k"
 b00000000 l"
-b00000000 m"
-b00000000 n"
-b00000000 o"
-b00000000 p"
-b00000000 q"
-b00000000 r"
-b00000000 s"
-b00000000 t"
-b00000000000000000000000000000010 u"
-b00000000000000000000000010001110 v"
-b000000000000000000000000 w"
-b11111111111111111111111111111110 x"
-0y"
-0z"
-0{"
-0|"
-0}"
-0~"
-b00000000000000000000000000000000 !#
+b00000000000000000000000000000010 m"
+b00000000000000000000000010001110 n"
+b000000000000000000000000 o"
+b11111111111111111111111111111110 p"
 #10
-b001 -
-b00000000000000000000000000001001 /
+b01000111 -
+b01000111 .
+b01000111 /
 b01000111 0
 b01000111 1
 b01000111 2
@@ -681,123 +666,116 @@ b01000111 3
 b01000111 4
 b01000111 5
 b01000111 6
-b01000111 7
-b01000111 8
-b01000111 9
 b01000111 :
 b01000111 ;
 b01000111 <
 b01000111 =
+b01000111 >
+b01000111 ?
+b01000111 @
 b01000111 A
-b01000111 B
-b01000111 C
-b01000111 D
 b01000111 E
 b01000111 F
 b01000111 G
 b01000111 H
 b01000111 I
+b01000111 J
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+b01000111 L
 b01000111 M
 b01000111 N
-b01000111 O
-b01000111 P
-b01000111 Q
-b01000111 R
-b01000111 S
-b01000111 T
-b01000111 U
-b01000111 Y
-b01000111 Z
-b01000111 [
-b01000111 \
-b01000111 ]
-b01000111 ^
-b01000111 _
-b01000111 `
-b01000111 a
+b001 O
+b00000000000000000000000000001001 Q
+1R
+1V
+1Z
+1^
+b00000000000000000000000000000001 b
+1d
 b01000111 e
 b01000111 f
 b01000111 g
-b01000111 h
-b01000111 i
-b01000111 j
 b01000111 k
 b01000111 l
 b01000111 m
+b01000111 n
+b01000111 o
+b01000111 p
 b01000111 q
 b01000111 r
 b01000111 s
-b01000111 t
-b01000111 u
-b01000111 v
 b01000111 w
 b01000111 x
 b01000111 y
+b01000111 z
+b01000111 {
+b01000111 |
 b01000111 }
 b01000111 ~
 b01000111 !!
-b01000111 "!
-b01000111 #!
-b01000111 $!
 b01000111 %!
 b01000111 &!
 b01000111 '!
+b01000111 (!
+b01000111 )!
+b01000111 *!
 b01000111 +!
 b01000111 ,!
 b01000111 -!
-b01000111 .!
-b01000111 /!
-b01000111 0!
 b01000111 1!
 b01000111 2!
 b01000111 3!
+b01000111 4!
+b01000111 5!
+b01000111 6!
 b01000111 7!
 b01000111 8!
 b01000111 9!
-b01000111 :!
-b01000111 ;!
-b01000111 <!
 b01000111 =!
 b01000111 >!
 b01000111 ?!
+b01000111 @!
+b01000111 A!
+b01000111 B!
 b01000111 C!
 b01000111 D!
 b01000111 E!
-b01000111 F!
-b01000111 G!
-b01000111 H!
 b01000111 I!
 b01000111 J!
 b01000111 K!
+b01000111 L!
+b01000111 M!
+b01000111 N!
 b01000111 O!
 b01000111 P!
 b01000111 Q!
-b01000111 R!
-b01000111 S!
-b01000111 T!
 b01000111 U!
 b01000111 V!
 b01000111 W!
 b01000111 X!
-b00000000000000000000000001000111 Y!
-b00000000000000000000000001000111 Z!
-b00000000000000000000000001000111 [!
+b01000111 Y!
+b01000111 Z!
+b01000111 [!
 b01000111 \!
-b10001110010001110100011101000111 ]!
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+b10001110 6!
 b10001110 7!
 b10001110 8!
 b10001110 9!
-b10001110 :!
-b10001110 ;!
-b10001110 <!
 b10001110 =!
 b10001110 >!
 b10001110 ?!
+b10001110 @!
+b10001110 A!
+b10001110 B!
 b10001110 C!
 b10001110 D!
 b10001110 E!
-b10001110 F!
-b10001110 G!
-b10001110 H!
 b10001110 I!
 b10001110 J!
 b10001110 K!
+b10001110 L!
+b10001110 M!
+b10001110 N!
 b10001110 O!
 b10001110 P!
 b10001110 Q!
-b10001110 R!
-b10001110 S!
-b10001110 T!
 b10001110 U!
 b10001110 V!
 b10001110 W!
 b10001110 X!
-b00000000000000000000000010001110 Y!
-b00000000000000000000000010001110 Z!
-b00000000000000000000000010001110 [!
+b10001110 Y!
+b10001110 Z!
+b10001110 [!
 b10001110 \!
-b10001110100011101000111010001110 ]!
-b10001110 ^!
-b10001110100011101000111010001110 _!
-b10001110 `!
-b10001110100011101000111010001110 a!
+b10001110 ]!
+b10001110 a!
 b10001110 b!
-b10001110100011101000111010001110 c!
-b00000000000000000000000000001000 t!
-b10001110 w!
-b10001110 x!
+b10001110 c!
+b10001110 d!
+b10001110 e!
+b10001110 f!
+b10001110 g!
+b10001110 h!
+b10001110 i!
+b10001110 m!
+b10001110 n!
+b10001110 o!
+b10001110 p!
+b10001110 q!
+b10001110 r!
+b10001110 s!
+b10001110 t!
+b10001110 u!
 b10001110 y!
 b10001110 z!
 b10001110 {!
@@ -1961,33 +1834,24 @@ b10001110 !"
 b10001110 ""
 b10001110 #"
 b10001110 $"
+b00000000000000000000000010001110 %"
+b00000000000000000000000010001110 &"
+b00000000000000000000000010001110 '"
 b10001110 ("
-b10001110 )"
+b10001110100011101000111010001110 )"
 b10001110 *"
-b10001110 +"
-b10001110 ,"
-b10001110 -"
-b10001110 ."
-b10001110 /"
-b10001110 3"
-b10001110 4"
-b10001110 5"
-b10001110 6"
-b10001110 7"
-b10001110 8"
-b10001110 9"
-b10001110 :"
-b10001110 ;"
+b10001110100011101000111010001110 +"
+b10001110100011101000111010001110 ,"
+1-"
+00"
+13"
+04"
+05"
+16"
+09"
 1<"
-0?"
-1B"
-0C"
-0D"
+0="
+1>"
+0A"
+1D"
 1E"
-0H"
-1K"
-0L"
-1M"
-0P"
-1S"
-1T"
diff --git a/test_regress/t/t_timing_trace.out b/test_regress/t/t_timing_trace.out
index 9328aceca..015cb9eae 100644
--- a/test_regress/t/t_timing_trace.out
+++ b/test_regress/t/t_timing_trace.out
@@ -3,15 +3,15 @@ $timescale 1ps $end
 
  $scope module TOP $end
   $scope module t $end
-   $var wire 32 + CLK_HALF_PERIOD [31:0] $end
    $var wire 32 * CLK_PERIOD [31:0] $end
-   $var wire  1 $ a $end
-   $var wire  1 ) b $end
-   $var wire  1 % c $end
-   $var wire  1 ( clk $end
-   $var wire  1 & d $end
-   $var event  1 ' ev $end
-   $var wire  1 # rst $end
+   $var wire 32 + CLK_HALF_PERIOD [31:0] $end
+   $var wire 1 # rst $end
+   $var wire 1 ( clk $end
+   $var wire 1 $ a $end
+   $var wire 1 ) b $end
+   $var wire 1 % c $end
+   $var wire 1 & d $end
+   $var event 1 ' ev $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_trace_abort.out b/test_regress/t/t_trace_abort.out
index b25a07948..9601161a6 100644
--- a/test_regress/t/t_trace_abort.out
+++ b/test_regress/t/t_trace_abort.out
@@ -1,13 +1,11 @@
 $version Generated by VerilatedVcd $end
-$date Wed Jun 10 17:27:15 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 # clk $end
-   $var wire  3 $ cyc [2:0] $end
+   $var wire 1 # clk $end
+   $var wire 3 $ cyc [2:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_trace_array.out b/test_regress/t/t_trace_array.out
index 15d934b35..f6705a583 100644
--- a/test_regress/t/t_trace_array.out
+++ b/test_regress/t/t_trace_array.out
@@ -1,11 +1,10 @@
 $version Generated by VerilatedVcd $end
-$date Thu Jul  1 22:52:39 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 ]b# clk $end
+  $var wire 1 ]b# clk $end
   $scope module t $end
-   $var wire  1 ]b# clk $end
+   $var wire 1 ]b# clk $end
    $var wire 32 # cyc [31:0] $end
    $scope module biggie $end
     $var wire 1048577 $ d [1048576:0] $end
diff --git a/test_regress/t/t_trace_ascendingrange.out b/test_regress/t/t_trace_ascendingrange.out
index c51c5e99e..bc405f1eb 100644
--- a/test_regress/t/t_trace_ascendingrange.out
+++ b/test_regress/t/t_trace_ascendingrange.out
@@ -1,19 +1,17 @@
 $version Generated by VerilatedVcd $end
-$date Sun May  3 21:38:46 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 } clk $end
+  $var wire 1 } clk $end
   $scope module t $end
-   $var wire  8 ~ P [0:7] $end
-   $var wire  8 !! Q [0:7] $end
-   $var wire  1 } clk $end
+   $var wire 8 ~ P [0:7] $end
+   $var wire 1 } clk $end
    $var wire 32 # cyc [31:0] $end
-   $var wire  1 $ v_a [0:0] $end
-   $var wire  2 % v_b [0:1] $end
-   $var wire  8 & v_c [0:7] $end
-   $var wire  9 ' v_d [0:8] $end
+   $var wire 8 !! Q [0:7] $end
+   $var wire 1 $ v_a [0:0] $end
+   $var wire 2 % v_b [0:1] $end
+   $var wire 8 & v_c [0:7] $end
+   $var wire 9 ' v_d [0:8] $end
    $var wire 16 ( v_e [0:15] $end
    $var wire 17 ) v_f [0:16] $end
    $var wire 32 * v_g [0:31] $end
@@ -25,7 +23,7 @@ $timescale   1ps $end
    $var wire 256 ; v_m [0:255] $end
    $var wire 257 C v_n [0:256] $end
    $var wire 512 L v_o [0:511] $end
-   $var wire  3 \ v_p [-1:1] $end
+   $var wire 3 \ v_p [-1:1] $end
    $var wire 15 ] v_q [-7:7] $end
    $var wire 31 ^ v_r [-15:15] $end
    $var wire 63 _ v_s [-31:31] $end
diff --git a/test_regress/t/t_trace_cat.out b/test_regress/t/t_trace_cat.out
index 729783918..b564e6bde 100644
--- a/test_regress/t/t_trace_cat.out
+++ b/test_regress/t/t_trace_cat.out
@@ -1,490 +1,488 @@
 $version Generated by VerilatedVcd $end
-$date Thu Aug 30 16:11:10 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
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diff --git a/test_regress/t/t_trace_cat_renew_0000.out b/test_regress/t/t_trace_cat_renew_0000.out
index c4408f6e9..4243f33b4 100644
--- a/test_regress/t/t_trace_cat_renew_0000.out
+++ b/test_regress/t/t_trace_cat_renew_0000.out
@@ -1,265 +1,263 @@
 $version Generated by VerilatedVcd $end
-$date Thu Aug 30 16:11:06 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
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 #19
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 #20
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 #21
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 #22
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 #23
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 #24
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 #25
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 #26
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 #27
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 #28
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 #29
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 #30
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 #31
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 #32
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 #33
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 #34
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 #35
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 #36
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 #37
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 #38
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 #39
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 #40
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 #41
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 #42
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 #43
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 #44
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 #45
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 #46
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 #47
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 #48
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 #49
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 #50
-b00000000000000000000000000011001 #
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 #51
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 #52
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 #53
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 #54
-b00000000000000000000000000011011 #
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 #55
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 #56
-b00000000000000000000000000011100 #
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 #57
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 #58
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 #59
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 #60
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 #61
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 #62
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 #63
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 #64
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 #65
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 #66
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 #67
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 #68
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 #69
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 #70
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 #71
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 #72
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 #73
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 #74
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 #75
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 #76
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 #77
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 #78
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 #79
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 #80
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 #81
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 #82
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 #83
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 #84
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 #85
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 #86
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 #87
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 #88
-b00000000000000000000000000101100 #
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 #89
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 #90
-b00000000000000000000000000101101 #
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 #91
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 #92
-b00000000000000000000000000101110 #
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 #93
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 #94
-b00000000000000000000000000101111 #
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 #95
-0$
+0#
 #96
-b00000000000000000000000000110000 #
-1$
+1#
+b00000000000000000000000000110000 $
 #97
-0$
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 #98
-b00000000000000000000000000110001 #
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+b00000000000000000000000000110001 $
 #99
-0$
+0#
diff --git a/test_regress/t/t_trace_cat_renew_0100.out b/test_regress/t/t_trace_cat_renew_0100.out
index 8222df3e2..de350d664 100644
--- a/test_regress/t/t_trace_cat_renew_0100.out
+++ b/test_regress/t/t_trace_cat_renew_0100.out
@@ -1,240 +1,238 @@
 $version Generated by VerilatedVcd $end
-$date Thu Aug 30 16:11:06 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #100
-b00000000000000000000000000110010 #
-1$
+1#
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 #101
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 #102
-b00000000000000000000000000110011 #
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 #103
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 #104
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 #105
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 #106
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 #107
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 #108
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 #109
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 #110
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 #111
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 #112
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 #113
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 #114
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 #115
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 #116
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 #117
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 #118
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 #119
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 #120
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 #121
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 #122
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 #123
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 #124
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 #125
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 #126
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 #127
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 #128
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 #129
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 #130
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 #131
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 #132
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 #133
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 #134
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 #135
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 #136
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 #137
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 #138
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 #139
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 #140
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 #141
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 #142
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 #143
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 #144
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 #145
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 #146
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 #147
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 #148
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 #149
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 #150
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 #151
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 #152
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 #153
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 #154
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+1#
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 #155
-0$
+0#
 #156
-b00000000000000000000000001001110 #
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 #157
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 #158
-b00000000000000000000000001001111 #
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 #159
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 #160
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 #161
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 #162
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 #163
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 #164
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 #165
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 #166
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 #167
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 #168
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 #169
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 #170
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 #171
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 #172
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 #173
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 #174
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 #175
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 #176
-b00000000000000000000000001011000 #
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 #177
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 #178
-b00000000000000000000000001011001 #
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 #179
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 #180
-b00000000000000000000000001011010 #
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+1#
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 #181
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 #182
-b00000000000000000000000001011011 #
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 #183
-0$
+0#
 #184
-b00000000000000000000000001011100 #
-1$
+1#
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 #185
-0$
+0#
 #186
-b00000000000000000000000001011101 #
-1$
+1#
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 #187
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 #188
-b00000000000000000000000001011110 #
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+1#
+b00000000000000000000000001011110 $
 #189
-0$
+0#
diff --git a/test_regress/t/t_trace_cat_reopen_0000.out b/test_regress/t/t_trace_cat_reopen_0000.out
index 5042b17c3..4243f33b4 100644
--- a/test_regress/t/t_trace_cat_reopen_0000.out
+++ b/test_regress/t/t_trace_cat_reopen_0000.out
@@ -1,265 +1,263 @@
 $version Generated by VerilatedVcd $end
-$date Thu Aug 30 16:10:58 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-b00000000000000000000000000000000 #
-1$
+1#
+b00000000000000000000000000000000 $
 #1
-0$
+0#
 #2
-b00000000000000000000000000000001 #
-1$
+1#
+b00000000000000000000000000000001 $
 #3
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+0#
 #4
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 #5
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 #6
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 #7
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 #8
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 #9
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 #10
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 #11
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 #12
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 #13
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 #14
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 #15
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 #16
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 #17
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 #18
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 #19
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 #20
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 #21
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 #22
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 #23
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 #24
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 #25
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 #26
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 #27
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 #28
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 #29
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 #30
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 #31
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 #32
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 #33
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 #34
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 #35
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 #36
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 #37
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 #38
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 #39
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 #40
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 #41
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 #42
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 #43
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 #44
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 #45
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 #46
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 #47
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 #48
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 #49
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 #50
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 #51
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 #52
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 #53
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 #54
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 #55
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 #56
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 #57
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 #58
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 #59
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 #60
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 #61
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 #62
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 #63
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 #64
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 #65
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 #66
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 #67
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 #68
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 #69
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 #70
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 #71
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 #72
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 #73
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 #74
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 #75
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 #76
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 #77
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 #78
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 #79
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 #80
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 #81
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 #82
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 #83
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 #84
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 #85
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 #86
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 #87
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 #88
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 #89
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 #90
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 #91
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 #92
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 #93
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 #94
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 #95
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 #96
-b00000000000000000000000000110000 #
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 #97
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 #98
-b00000000000000000000000000110001 #
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 #99
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diff --git a/test_regress/t/t_trace_cat_reopen_0100.out b/test_regress/t/t_trace_cat_reopen_0100.out
index 466b4c6d9..de350d664 100644
--- a/test_regress/t/t_trace_cat_reopen_0100.out
+++ b/test_regress/t/t_trace_cat_reopen_0100.out
@@ -1,240 +1,238 @@
 $version Generated by VerilatedVcd $end
-$date Thu Aug 30 16:10:58 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 $ clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #100
-b00000000000000000000000000110010 #
-1$
+1#
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 #101
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+0#
 #102
-b00000000000000000000000000110011 #
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 #103
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 #104
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 #105
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 #106
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 #107
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 #108
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 #109
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 #110
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 #111
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 #112
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 #113
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 #114
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 #115
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 #116
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 #117
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 #118
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 #119
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 #120
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 #121
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 #122
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 #123
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 #124
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 #125
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 #126
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 #127
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 #128
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 #129
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 #130
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 #131
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 #132
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 #133
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 #134
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 #135
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 #136
-b00000000000000000000000001000100 #
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 #137
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+0#
 #138
-b00000000000000000000000001000101 #
-1$
+1#
+b00000000000000000000000001000101 $
 #139
-0$
+0#
 #140
-b00000000000000000000000001000110 #
-1$
+1#
+b00000000000000000000000001000110 $
 #141
-0$
+0#
 #142
-b00000000000000000000000001000111 #
-1$
+1#
+b00000000000000000000000001000111 $
 #143
-0$
+0#
 #144
-b00000000000000000000000001001000 #
-1$
+1#
+b00000000000000000000000001001000 $
 #145
-0$
+0#
 #146
-b00000000000000000000000001001001 #
-1$
+1#
+b00000000000000000000000001001001 $
 #147
-0$
+0#
 #148
-b00000000000000000000000001001010 #
-1$
+1#
+b00000000000000000000000001001010 $
 #149
-0$
+0#
 #150
-b00000000000000000000000001001011 #
-1$
+1#
+b00000000000000000000000001001011 $
 #151
-0$
+0#
 #152
-b00000000000000000000000001001100 #
-1$
+1#
+b00000000000000000000000001001100 $
 #153
-0$
+0#
 #154
-b00000000000000000000000001001101 #
-1$
+1#
+b00000000000000000000000001001101 $
 #155
-0$
+0#
 #156
-b00000000000000000000000001001110 #
-1$
+1#
+b00000000000000000000000001001110 $
 #157
-0$
+0#
 #158
-b00000000000000000000000001001111 #
-1$
+1#
+b00000000000000000000000001001111 $
 #159
-0$
+0#
 #160
-b00000000000000000000000001010000 #
-1$
+1#
+b00000000000000000000000001010000 $
 #161
-0$
+0#
 #162
-b00000000000000000000000001010001 #
-1$
+1#
+b00000000000000000000000001010001 $
 #163
-0$
+0#
 #164
-b00000000000000000000000001010010 #
-1$
+1#
+b00000000000000000000000001010010 $
 #165
-0$
+0#
 #166
-b00000000000000000000000001010011 #
-1$
+1#
+b00000000000000000000000001010011 $
 #167
-0$
+0#
 #168
-b00000000000000000000000001010100 #
-1$
+1#
+b00000000000000000000000001010100 $
 #169
-0$
+0#
 #170
-b00000000000000000000000001010101 #
-1$
+1#
+b00000000000000000000000001010101 $
 #171
-0$
+0#
 #172
-b00000000000000000000000001010110 #
-1$
+1#
+b00000000000000000000000001010110 $
 #173
-0$
+0#
 #174
-b00000000000000000000000001010111 #
-1$
+1#
+b00000000000000000000000001010111 $
 #175
-0$
+0#
 #176
-b00000000000000000000000001011000 #
-1$
+1#
+b00000000000000000000000001011000 $
 #177
-0$
+0#
 #178
-b00000000000000000000000001011001 #
-1$
+1#
+b00000000000000000000000001011001 $
 #179
-0$
+0#
 #180
-b00000000000000000000000001011010 #
-1$
+1#
+b00000000000000000000000001011010 $
 #181
-0$
+0#
 #182
-b00000000000000000000000001011011 #
-1$
+1#
+b00000000000000000000000001011011 $
 #183
-0$
+0#
 #184
-b00000000000000000000000001011100 #
-1$
+1#
+b00000000000000000000000001011100 $
 #185
-0$
+0#
 #186
-b00000000000000000000000001011101 #
-1$
+1#
+b00000000000000000000000001011101 $
 #187
-0$
+0#
 #188
-b00000000000000000000000001011110 #
-1$
+1#
+b00000000000000000000000001011110 $
 #189
-0$
+0#
diff --git a/test_regress/t/t_trace_complex.out b/test_regress/t/t_trace_complex.out
index 0bff7fdc8..8a49fc90c 100644
--- a/test_regress/t/t_trace_complex.out
+++ b/test_regress/t/t_trace_complex.out
@@ -1,43 +1,42 @@
 $version Generated by VerilatedVcd $end
-$date Sun May  8 19:00:11 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
   $scope module $unit $end
-   $var wire  1 # global_bit $end
+   $var wire 1 # global_bit $end
   $upscope $end
+  $var wire 1 = clk $end
   $scope module t $end
-   $var wire  1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-   $var wire  1 $ clk $end
-   $var wire 32 % cyc [31:0] $end
-   $var wire  8 E unpacked_array[-1] [7:0] $end
-   $var wire  8 D unpacked_array[-2] [7:0] $end
-   $var wire  8 F unpacked_array[0] [7:0] $end
-   $var real 64 2 v_arr_real[0] $end
-   $var real 64 4 v_arr_real[1] $end
-   $var wire  2 ) v_arrp [2:1] $end
-   $var wire  4 * v_arrp_arrp [3:0] $end
-   $var wire  4 + v_arrp_strp [3:0] $end
-   $var wire  1 > v_arru[1] $end
-   $var wire  1 ? v_arru[2] $end
-   $var wire  2 , v_arru_arrp[3] [2:1] $end
-   $var wire  2 - v_arru_arrp[4] [2:1] $end
-   $var wire  1 @ v_arru_arru[3][1] $end
-   $var wire  1 A v_arru_arru[3][2] $end
-   $var wire  1 B v_arru_arru[4][1] $end
-   $var wire  1 C v_arru_arru[4][2] $end
-   $var wire  2 . v_arru_strp[3] [1:0] $end
-   $var wire  2 / v_arru_strp[4] [1:0] $end
-   $var wire  3 : v_enumb [2:0] $end
-   $var wire  6 ; v_enumb2_str [5:0] $end
-   $var wire 32 8 v_enumed [31:0] $end
-   $var wire 32 9 v_enumed2 [31:0] $end
-   $var real 64 0 v_real $end
-   $var wire 64 6 v_str32x2 [63:0] $end
-   $var wire  2 & v_strp [1:0] $end
-   $var wire  4 ' v_strp_strp [3:0] $end
-   $var wire  2 ( v_unip_strp [1:0] $end
+   $var wire 1 = clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 2 % v_strp [1:0] $end
+   $var wire 4 & v_strp_strp [3:0] $end
+   $var wire 2 ' v_unip_strp [1:0] $end
+   $var wire 2 ( v_arrp [2:1] $end
+   $var wire 4 ) v_arrp_arrp [3:0] $end
+   $var wire 4 * v_arrp_strp [3:0] $end
+   $var wire 1 > v_arru[1] $end
+   $var wire 1 ? v_arru[2] $end
+   $var wire 1 @ v_arru_arru[3][1] $end
+   $var wire 1 A v_arru_arru[3][2] $end
+   $var wire 1 B v_arru_arru[4][1] $end
+   $var wire 1 C v_arru_arru[4][2] $end
+   $var wire 2 + v_arru_arrp[3] [2:1] $end
+   $var wire 2 , v_arru_arrp[4] [2:1] $end
+   $var wire 2 - v_arru_strp[3] [1:0] $end
+   $var wire 2 . v_arru_strp[4] [1:0] $end
+   $var real 64 / v_real $end
+   $var real 64 1 v_arr_real[0] $end
+   $var real 64 3 v_arr_real[1] $end
+   $var wire 64 5 v_str32x2 [63:0] $end
+   $var wire 32 7 v_enumed [31:0] $end
+   $var wire 32 8 v_enumed2 [31:0] $end
+   $var wire 3 9 v_enumb [2:0] $end
+   $var wire 6 : v_enumb2_str [5:0] $end
+   $var wire 8 D unpacked_array[-2] [7:0] $end
+   $var wire 8 E unpacked_array[-1] [7:0] $end
+   $var wire 8 F unpacked_array[0] [7:0] $end
+   $var wire 1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
    $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
     $var wire 32 H PARAM [31:0] $end
    $upscope $end
@@ -48,9 +47,9 @@ $timescale 1ps $end
     $var wire 32 J PARAM [31:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 < b [31:0] $end
+    $var wire 32 ; b [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 = a [31:0] $end
+     $var wire 32 < a [31:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
@@ -60,28 +59,28 @@ $enddefinitions $end
 
 #0
 1#
-0$
-b00000000000000000000000000000000 %
-b00 &
-b0000 '
+b00000000000000000000000000000000 $
+b00 %
+b0000 &
+b00 '
 b00 (
-b00 )
+b0000 )
 b0000 *
-b0000 +
+b00 +
 b00 ,
 b00 -
 b00 .
-b00 /
-r0 0
-r0 2
-r0 4
-b0000000000000000000000000000000000000000000000000000000011111111 6
+r0 /
+r0 1
+r0 3
+b0000000000000000000000000000000000000000000000000000000011111111 5
+b00000000000000000000000000000000 7
 b00000000000000000000000000000000 8
-b00000000000000000000000000000000 9
-b000 :
-b000000 ;
+b000 9
+b000000 :
+b00000000000000000000000000000000 ;
 b00000000000000000000000000000000 <
-b00000000000000000000000000000000 =
+0=
 0>
 0?
 0@
@@ -96,139 +95,139 @@ b00000000000000000000000000000100 H
 b00000000000000000000000000000010 I
 b00000000000000000000000000000011 J
 #10
-1$
-b00000000000000000000000000000001 %
-b11 &
-b1111 '
+b00000000000000000000000000000001 $
+b11 %
+b1111 &
+b11 '
 b11 (
-b11 )
+b1111 )
 b1111 *
-b1111 +
+b11 +
 b11 ,
 b11 -
 b11 .
-b11 /
-r0.1 0
-r0.2 2
-r0.3 4
-b0000000000000000000000000000000100000000000000000000000011111110 6
-b00000000000000000000000000000001 8
-b00000000000000000000000000000010 9
-b111 :
-b00000000000000000000000000000101 <
-b00000000000000000000000000000101 =
-#15
-0$
-#20
-1$
-b00000000000000000000000000000010 %
-b00 &
-b0000 '
-b00 (
-b00 )
-b0000 *
-b0000 +
-b00 ,
-b00 -
-b00 .
-b00 /
-r0.2 0
-r0.4 2
-r0.6 4
-b0000000000000000000000000000001000000000000000000000000011111101 6
+r0.1 /
+r0.2 1
+r0.3 3
+b0000000000000000000000000000000100000000000000000000000011111110 5
+b00000000000000000000000000000001 7
 b00000000000000000000000000000010 8
-b00000000000000000000000000000100 9
-b110 :
-b111111 ;
-#25
-0$
-#30
-1$
-b00000000000000000000000000000011 %
-b11 &
-b1111 '
-b11 (
-b11 )
-b1111 *
-b1111 +
-b11 ,
-b11 -
-b11 .
-b11 /
-r0.3 0
-r0.6000000000000001 2
-r0.8999999999999999 4
-b0000000000000000000000000000001100000000000000000000000011111100 6
-b00000000000000000000000000000011 8
-b00000000000000000000000000000110 9
-b101 :
-b110110 ;
-#35
-0$
-#40
-1$
-b00000000000000000000000000000100 %
-b00 &
-b0000 '
+b111 9
+b00000000000000000000000000000101 ;
+b00000000000000000000000000000101 <
+1=
+#15
+0=
+#20
+b00000000000000000000000000000010 $
+b00 %
+b0000 &
+b00 '
 b00 (
-b00 )
+b0000 )
 b0000 *
-b0000 +
+b00 +
 b00 ,
 b00 -
 b00 .
-b00 /
-r0.4 0
-r0.8 2
-r1.2 4
-b0000000000000000000000000000010000000000000000000000000011111011 6
+r0.2 /
+r0.4 1
+r0.6 3
+b0000000000000000000000000000001000000000000000000000000011111101 5
+b00000000000000000000000000000010 7
 b00000000000000000000000000000100 8
-b00000000000000000000000000001000 9
-b100 :
-b101101 ;
-#45
-0$
-#50
-1$
-b00000000000000000000000000000101 %
-b11 &
-b1111 '
+b110 9
+b111111 :
+1=
+#25
+0=
+#30
+b00000000000000000000000000000011 $
+b11 %
+b1111 &
+b11 '
 b11 (
-b11 )
+b1111 )
 b1111 *
-b1111 +
+b11 +
 b11 ,
 b11 -
 b11 .
-b11 /
-r0.5 0
-r1 2
-r1.5 4
-b0000000000000000000000000000010100000000000000000000000011111010 6
-b00000000000000000000000000000101 8
-b00000000000000000000000000001010 9
-b011 :
-b100100 ;
-#55
-0$
-#60
-1$
-b00000000000000000000000000000110 %
-b00 &
-b0000 '
+r0.3 /
+r0.6000000000000001 1
+r0.8999999999999999 3
+b0000000000000000000000000000001100000000000000000000000011111100 5
+b00000000000000000000000000000011 7
+b00000000000000000000000000000110 8
+b101 9
+b110110 :
+1=
+#35
+0=
+#40
+b00000000000000000000000000000100 $
+b00 %
+b0000 &
+b00 '
 b00 (
-b00 )
+b0000 )
 b0000 *
-b0000 +
+b00 +
 b00 ,
 b00 -
 b00 .
-b00 /
-r0.6 0
-r1.2 2
-r1.8 4
-b0000000000000000000000000000011000000000000000000000000011111001 6
-b00000000000000000000000000000110 8
-b00000000000000000000000000001100 9
-b010 :
-b011011 ;
+r0.4 /
+r0.8 1
+r1.2 3
+b0000000000000000000000000000010000000000000000000000000011111011 5
+b00000000000000000000000000000100 7
+b00000000000000000000000000001000 8
+b100 9
+b101101 :
+1=
+#45
+0=
+#50
+b00000000000000000000000000000101 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
+b1111 *
+b11 +
+b11 ,
+b11 -
+b11 .
+r0.5 /
+r1 1
+r1.5 3
+b0000000000000000000000000000010100000000000000000000000011111010 5
+b00000000000000000000000000000101 7
+b00000000000000000000000000001010 8
+b011 9
+b100100 :
+1=
+#55
+0=
+#60
+b00000000000000000000000000000110 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
+b0000 *
+b00 +
+b00 ,
+b00 -
+b00 .
+r0.6 /
+r1.2 1
+r1.8 3
+b0000000000000000000000000000011000000000000000000000000011111001 5
+b00000000000000000000000000000110 7
+b00000000000000000000000000001100 8
+b010 9
+b011011 :
+1=
diff --git a/test_regress/t/t_trace_complex_fst.out b/test_regress/t/t_trace_complex_fst.out
index b5109253a..39236fad4 100644
--- a/test_regress/t/t_trace_complex_fst.out
+++ b/test_regress/t/t_trace_complex_fst.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:04 2022
+	Tue Oct 24 11:00:03 2023
 
 $end
 $version
@@ -9,237 +9,237 @@ $timescale
 	1ps
 $end
 $scope module top $end
-$var wire 1 ! clk $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
+$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
-$var logic 2 # v_strp [1:0] $end
-$var logic 4 $ v_strp_strp [3:0] $end
-$var logic 2 % v_unip_strp [1:0] $end
-$var logic 2 & v_arrp [2:1] $end
-$var logic 4 ' v_arrp_arrp [3:0] $end
-$var logic 4 ( v_arrp_strp [3:0] $end
-$var logic 1 ) v_arru[1] $end
-$var logic 1 * v_arru[2] $end
-$var logic 1 + v_arru_arru[3][1] $end
-$var logic 1 , v_arru_arru[3][2] $end
-$var logic 1 - v_arru_arru[4][1] $end
-$var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] [2:1] $end
-$var logic 2 0 v_arru_arrp[4] [2:1] $end
-$var logic 2 1 v_arru_strp[3] [1:0] $end
-$var logic 2 2 v_arru_strp[4] [1:0] $end
-$var real 64 3 v_real $end
-$var real 64 4 v_arr_real[0] $end
-$var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 [63:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
+$var bit 2 $ v_strp [1:0] $end
+$var bit 4 % v_strp_strp [3:0] $end
+$var bit 2 & v_unip_strp [1:0] $end
+$var bit 2 ' v_arrp [2:1] $end
+$var bit 4 ( v_arrp_arrp [3:0] $end
+$var bit 4 ) v_arrp_strp [3:0] $end
+$var bit 1 * v_arru[1] $end
+$var bit 1 + v_arru[2] $end
+$var bit 1 , v_arru_arru[3][1] $end
+$var bit 1 - v_arru_arru[3][2] $end
+$var bit 1 . v_arru_arru[4][1] $end
+$var bit 1 / v_arru_arru[4][2] $end
+$var bit 2 0 v_arru_arrp[3] [2:1] $end
+$var bit 2 1 v_arru_arrp[4] [2:1] $end
+$var bit 2 2 v_arru_strp[3] [1:0] $end
+$var bit 2 3 v_arru_strp[4] [1:0] $end
+$var real 64 4 v_real $end
+$var real 64 5 v_arr_real[0] $end
+$var real 64 6 v_arr_real[1] $end
+$var logic 64 7 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed [31:0] $end
+$var int 32 8 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 [31:0] $end
+$var int 32 9 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb [2:0] $end
-$var logic 6 : v_enumb2_str [5:0] $end
-$var logic 8 ; unpacked_array[-2] [7:0] $end
-$var logic 8 < unpacked_array[-1] [7:0] $end
-$var logic 8 = unpacked_array[0] [7:0] $end
-$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 3 : v_enumb [2:0] $end
+$var logic 6 ; v_enumb2_str [5:0] $end
+$var logic 8 < unpacked_array[-2] [7:0] $end
+$var logic 8 = unpacked_array[-1] [7:0] $end
+$var logic 8 > unpacked_array[0] [7:0] $end
+$var bit 1 ? LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 ? PARAM [31:0] $end
-$upscope $end
-$scope module p2 $end
 $var parameter 32 @ PARAM [31:0] $end
 $upscope $end
-$scope module p3 $end
+$scope module p2 $end
 $var parameter 32 A PARAM [31:0] $end
 $upscope $end
+$scope module p3 $end
+$var parameter 32 B PARAM [31:0] $end
+$upscope $end
 $scope module unnamedblk1 $end
-$var integer 32 B b [31:0] $end
+$var integer 32 C b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 C a [31:0] $end
+$var integer 32 D a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 D global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1D
+b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000000000011 A
-b00000000000000000000000000000010 @
-b00000000000000000000000000000100 ?
-0>
+b00000000000000000000000000000011 B
+b00000000000000000000000000000010 A
+b00000000000000000000000000000100 @
+0?
+b00000000 >
 b00000000 =
 b00000000 <
-b00000000 ;
-b000000 :
-b000 9
+b000000 ;
+b000 :
+b00000000000000000000000000000000 9
 b00000000000000000000000000000000 8
-b00000000000000000000000000000000 7
-b0000000000000000000000000000000000000000000000000000000011111111 6
+b0000000000000000000000000000000000000000000000000000000011111111 7
+r0 6
 r0 5
 r0 4
-r0 3
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+0/
 0.
 0-
 0,
 0+
 0*
-0)
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000000 "
-0!
+b0000 %
+b00 $
+b00000000000000000000000000000000 #
+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-b11 #
-b1111 $
-b11 %
+1"
+b00000000000000000000000000000001 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.1 3
-r0.2 4
-r0.3 5
-b0000000000000000000000000000000100000000000000000000000011111110 6
-b00000000000000000000000000000001 7
-b00000000000000000000000000000010 8
-b111 9
-b00000000000000000000000000000101 B
+b11 3
+r0.1 4
+r0.2 5
+r0.3 6
+b0000000000000000000000000000000100000000000000000000000011111110 7
+b00000000000000000000000000000001 8
+b00000000000000000000000000000010 9
+b111 :
 b00000000000000000000000000000101 C
+b00000000000000000000000000000101 D
 #15
-0!
+0"
 #20
-1!
-b110 9
-b00000000000000000000000000000100 8
-b00000000000000000000000000000010 7
-b0000000000000000000000000000001000000000000000000000000011111101 6
-r0.6 5
-r0.4 4
-r0.2 3
+1"
+b110 :
+b00000000000000000000000000000100 9
+b00000000000000000000000000000010 8
+b0000000000000000000000000000001000000000000000000000000011111101 7
+r0.6 6
+r0.4 5
+r0.2 4
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000010 "
-b111111 :
+b0000 %
+b00 $
+b00000000000000000000000000000010 #
+b111111 ;
 #25
-0!
+0"
 #30
-1!
-b110110 :
-b00000000000000000000000000000011 "
-b11 #
-b1111 $
-b11 %
+1"
+b110110 ;
+b00000000000000000000000000000011 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.3 3
-r0.6000000000000001 4
-r0.8999999999999999 5
-b0000000000000000000000000000001100000000000000000000000011111100 6
-b00000000000000000000000000000011 7
-b00000000000000000000000000000110 8
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+b101 :
 #35
-0!
+0"
 #40
-1!
-b100 9
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-r1.2 5
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-r0.4 3
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 b00 2
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-b00 /
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 b0000 (
-b0000 '
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 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000100 "
-b101101 :
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 #45
-0!
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 #50
-1!
-b100100 :
-b00000000000000000000000000000101 "
-b11 #
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+b100100 ;
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 b11 &
-b1111 '
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 b1111 (
-b11 /
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 b11 0
 b11 1
 b11 2
-r0.5 3
-r1 4
-r1.5 5
-b0000000000000000000000000000010100000000000000000000000011111010 6
-b00000000000000000000000000000101 7
-b00000000000000000000000000001010 8
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+b0000000000000000000000000000010100000000000000000000000011111010 7
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+b00000000000000000000000000001010 9
+b011 :
 #55
-0!
+0"
 #60
-1!
-b010 9
-b00000000000000000000000000001100 8
-b00000000000000000000000000000110 7
-b0000000000000000000000000000011000000000000000000000000011111001 6
-r1.8 5
-r1.2 4
-r0.6 3
+1"
+b010 :
+b00000000000000000000000000001100 9
+b00000000000000000000000000000110 8
+b0000000000000000000000000000011000000000000000000000000011111001 7
+r1.8 6
+r1.2 5
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+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000110 "
-b011011 :
+b0000 %
+b00 $
+b00000000000000000000000000000110 #
+b011011 ;
diff --git a/test_regress/t/t_trace_complex_fst_sc.out b/test_regress/t/t_trace_complex_fst_sc.out
index c77a06772..ceef7646a 100644
--- a/test_regress/t/t_trace_complex_fst_sc.out
+++ b/test_regress/t/t_trace_complex_fst_sc.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:09 2022
+	Tue Oct 24 11:09:24 2023
 
 $end
 $version
@@ -9,279 +9,279 @@ $timescale
 	1ps
 $end
 $scope module top $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
-$var logic 2 # v_strp [1:0] $end
-$var logic 4 $ v_strp_strp [3:0] $end
-$var logic 2 % v_unip_strp [1:0] $end
-$var logic 2 & v_arrp [2:1] $end
-$var logic 4 ' v_arrp_arrp [3:0] $end
-$var logic 4 ( v_arrp_strp [3:0] $end
-$var logic 1 ) v_arru[1] $end
-$var logic 1 * v_arru[2] $end
-$var logic 1 + v_arru_arru[3][1] $end
-$var logic 1 , v_arru_arru[3][2] $end
-$var logic 1 - v_arru_arru[4][1] $end
-$var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] [2:1] $end
-$var logic 2 0 v_arru_arrp[4] [2:1] $end
-$var logic 2 1 v_arru_strp[3] [1:0] $end
-$var logic 2 2 v_arru_strp[4] [1:0] $end
-$var real 64 3 v_real $end
-$var real 64 4 v_arr_real[0] $end
-$var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 [63:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
+$var bit 2 $ v_strp [1:0] $end
+$var bit 4 % v_strp_strp [3:0] $end
+$var bit 2 & v_unip_strp [1:0] $end
+$var bit 2 ' v_arrp [2:1] $end
+$var bit 4 ( v_arrp_arrp [3:0] $end
+$var bit 4 ) v_arrp_strp [3:0] $end
+$var bit 1 * v_arru[1] $end
+$var bit 1 + v_arru[2] $end
+$var bit 1 , v_arru_arru[3][1] $end
+$var bit 1 - v_arru_arru[3][2] $end
+$var bit 1 . v_arru_arru[4][1] $end
+$var bit 1 / v_arru_arru[4][2] $end
+$var bit 2 0 v_arru_arrp[3] [2:1] $end
+$var bit 2 1 v_arru_arrp[4] [2:1] $end
+$var bit 2 2 v_arru_strp[3] [1:0] $end
+$var bit 2 3 v_arru_strp[4] [1:0] $end
+$var real 64 4 v_real $end
+$var real 64 5 v_arr_real[0] $end
+$var real 64 6 v_arr_real[1] $end
+$var logic 64 7 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed [31:0] $end
+$var int 32 8 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 [31:0] $end
+$var int 32 9 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb [2:0] $end
-$var logic 6 : v_enumb2_str [5:0] $end
-$var logic 8 ; unpacked_array[-2] [7:0] $end
-$var logic 8 < unpacked_array[-1] [7:0] $end
-$var logic 8 = unpacked_array[0] [7:0] $end
-$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 3 : v_enumb [2:0] $end
+$var logic 6 ; v_enumb2_str [5:0] $end
+$var logic 8 < unpacked_array[-2] [7:0] $end
+$var logic 8 = unpacked_array[-1] [7:0] $end
+$var logic 8 > unpacked_array[0] [7:0] $end
+$var bit 1 ? LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 ? PARAM [31:0] $end
-$upscope $end
-$scope module p2 $end
 $var parameter 32 @ PARAM [31:0] $end
 $upscope $end
-$scope module p3 $end
+$scope module p2 $end
 $var parameter 32 A PARAM [31:0] $end
 $upscope $end
+$scope module p3 $end
+$var parameter 32 B PARAM [31:0] $end
+$upscope $end
 $scope module unnamedblk1 $end
-$var integer 32 B b [31:0] $end
+$var integer 32 C b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 C a [31:0] $end
+$var integer 32 D a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 D global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1D
+b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000000000011 A
-b00000000000000000000000000000010 @
-b00000000000000000000000000000100 ?
-0>
+b00000000000000000000000000000011 B
+b00000000000000000000000000000010 A
+b00000000000000000000000000000100 @
+0?
+b00000000 >
 b00000000 =
 b00000000 <
-b00000000 ;
-b000000 :
-b000 9
+b000000 ;
+b000 :
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 b00000000000000000000000000000000 8
-b00000000000000000000000000000000 7
-b0000000000000000000000000000000000000000000000000000000011111111 6
+b0000000000000000000000000000000000000000000000000000000011111111 7
+r0 6
 r0 5
 r0 4
-r0 3
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 b00 2
 b00 1
 b00 0
-b00 /
+0/
 0.
 0-
 0,
 0+
 0*
-0)
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000000 "
-0!
+b0000 %
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+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-b11 #
-b1111 $
-b11 %
+1"
+b00000000000000000000000000000001 #
+b11 $
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 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.1 3
-r0.2 4
-r0.3 5
-b0000000000000000000000000000000100000000000000000000000011111110 6
-b00000000000000000000000000000001 7
-b00000000000000000000000000000010 8
-b111 9
-b00000000000000000000000000000101 B
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+b0000000000000000000000000000000100000000000000000000000011111110 7
+b00000000000000000000000000000001 8
+b00000000000000000000000000000010 9
+b111 :
 b00000000000000000000000000000101 C
+b00000000000000000000000000000101 D
 #11
 #12
 #13
 #14
 #15
-0!
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 #16
 #17
 #18
 #19
 #20
-1!
-b110 9
-b00000000000000000000000000000100 8
-b00000000000000000000000000000010 7
-b0000000000000000000000000000001000000000000000000000000011111101 6
-r0.6 5
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+1"
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 b00 2
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-b00 /
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-b0000 '
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 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000010 "
-b111111 :
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+b00000000000000000000000000000010 #
+b111111 ;
 #21
 #22
 #23
 #24
 #25
-0!
+0"
 #26
 #27
 #28
 #29
 #30
-1!
-b110110 :
-b00000000000000000000000000000011 "
-b11 #
-b1111 $
-b11 %
+1"
+b110110 ;
+b00000000000000000000000000000011 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.3 3
-r0.6000000000000001 4
-r0.8999999999999999 5
-b0000000000000000000000000000001100000000000000000000000011111100 6
-b00000000000000000000000000000011 7
-b00000000000000000000000000000110 8
-b101 9
+b11 3
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+r0.6000000000000001 5
+r0.8999999999999999 6
+b0000000000000000000000000000001100000000000000000000000011111100 7
+b00000000000000000000000000000011 8
+b00000000000000000000000000000110 9
+b101 :
 #31
 #32
 #33
 #34
 #35
-0!
+0"
 #36
 #37
 #38
 #39
 #40
-1!
-b100 9
-b00000000000000000000000000001000 8
-b00000000000000000000000000000100 7
-b0000000000000000000000000000010000000000000000000000000011111011 6
-r1.2 5
-r0.8 4
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+1"
+b100 :
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 b00 2
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 b00 0
-b00 /
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 b0000 (
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 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000100 "
-b101101 :
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+b00000000000000000000000000000100 #
+b101101 ;
 #41
 #42
 #43
 #44
 #45
-0!
+0"
 #46
 #47
 #48
 #49
 #50
-1!
-b100100 :
-b00000000000000000000000000000101 "
-b11 #
-b1111 $
-b11 %
+1"
+b100100 ;
+b00000000000000000000000000000101 #
+b11 $
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 b11 &
-b1111 '
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 b1111 (
-b11 /
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 b11 0
 b11 1
 b11 2
-r0.5 3
-r1 4
-r1.5 5
-b0000000000000000000000000000010100000000000000000000000011111010 6
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+b011 :
 #51
 #52
 #53
 #54
 #55
-0!
+0"
 #56
 #57
 #58
 #59
 #60
-1!
-b010 9
-b00000000000000000000000000001100 8
-b00000000000000000000000000000110 7
-b0000000000000000000000000000011000000000000000000000000011111001 6
-r1.8 5
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 b00 2
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 b00 0
-b00 /
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 b0000 (
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 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000110 "
-b011011 :
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+b00000000000000000000000000000110 #
+b011011 ;
 #61
 #62
 #63
diff --git a/test_regress/t/t_trace_complex_params.out b/test_regress/t/t_trace_complex_params.out
index 96cca0314..8a49fc90c 100644
--- a/test_regress/t/t_trace_complex_params.out
+++ b/test_regress/t/t_trace_complex_params.out
@@ -1,43 +1,42 @@
 $version Generated by VerilatedVcd $end
-$date Sun May  8 19:00:32 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 $ clk $end
   $scope module $unit $end
-   $var wire  1 # global_bit $end
+   $var wire 1 # global_bit $end
   $upscope $end
+  $var wire 1 = clk $end
   $scope module t $end
-   $var wire  1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-   $var wire  1 $ clk $end
-   $var wire 32 % cyc [31:0] $end
-   $var wire  8 E unpacked_array[-1] [7:0] $end
-   $var wire  8 D unpacked_array[-2] [7:0] $end
-   $var wire  8 F unpacked_array[0] [7:0] $end
-   $var real 64 2 v_arr_real[0] $end
-   $var real 64 4 v_arr_real[1] $end
-   $var wire  2 ) v_arrp [2:1] $end
-   $var wire  4 * v_arrp_arrp [3:0] $end
-   $var wire  4 + v_arrp_strp [3:0] $end
-   $var wire  1 > v_arru[1] $end
-   $var wire  1 ? v_arru[2] $end
-   $var wire  2 , v_arru_arrp[3] [2:1] $end
-   $var wire  2 - v_arru_arrp[4] [2:1] $end
-   $var wire  1 @ v_arru_arru[3][1] $end
-   $var wire  1 A v_arru_arru[3][2] $end
-   $var wire  1 B v_arru_arru[4][1] $end
-   $var wire  1 C v_arru_arru[4][2] $end
-   $var wire  2 . v_arru_strp[3] [1:0] $end
-   $var wire  2 / v_arru_strp[4] [1:0] $end
-   $var wire  3 : v_enumb [2:0] $end
-   $var wire  6 ; v_enumb2_str [5:0] $end
-   $var wire 32 8 v_enumed [31:0] $end
-   $var wire 32 9 v_enumed2 [31:0] $end
-   $var real 64 0 v_real $end
-   $var wire 64 6 v_str32x2 [63:0] $end
-   $var wire  2 & v_strp [1:0] $end
-   $var wire  4 ' v_strp_strp [3:0] $end
-   $var wire  2 ( v_unip_strp [1:0] $end
+   $var wire 1 = clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 2 % v_strp [1:0] $end
+   $var wire 4 & v_strp_strp [3:0] $end
+   $var wire 2 ' v_unip_strp [1:0] $end
+   $var wire 2 ( v_arrp [2:1] $end
+   $var wire 4 ) v_arrp_arrp [3:0] $end
+   $var wire 4 * v_arrp_strp [3:0] $end
+   $var wire 1 > v_arru[1] $end
+   $var wire 1 ? v_arru[2] $end
+   $var wire 1 @ v_arru_arru[3][1] $end
+   $var wire 1 A v_arru_arru[3][2] $end
+   $var wire 1 B v_arru_arru[4][1] $end
+   $var wire 1 C v_arru_arru[4][2] $end
+   $var wire 2 + v_arru_arrp[3] [2:1] $end
+   $var wire 2 , v_arru_arrp[4] [2:1] $end
+   $var wire 2 - v_arru_strp[3] [1:0] $end
+   $var wire 2 . v_arru_strp[4] [1:0] $end
+   $var real 64 / v_real $end
+   $var real 64 1 v_arr_real[0] $end
+   $var real 64 3 v_arr_real[1] $end
+   $var wire 64 5 v_str32x2 [63:0] $end
+   $var wire 32 7 v_enumed [31:0] $end
+   $var wire 32 8 v_enumed2 [31:0] $end
+   $var wire 3 9 v_enumb [2:0] $end
+   $var wire 6 : v_enumb2_str [5:0] $end
+   $var wire 8 D unpacked_array[-2] [7:0] $end
+   $var wire 8 E unpacked_array[-1] [7:0] $end
+   $var wire 8 F unpacked_array[0] [7:0] $end
+   $var wire 1 G LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
    $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
     $var wire 32 H PARAM [31:0] $end
    $upscope $end
@@ -48,9 +47,9 @@ $timescale 1ps $end
     $var wire 32 J PARAM [31:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 < b [31:0] $end
+    $var wire 32 ; b [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 = a [31:0] $end
+     $var wire 32 < a [31:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
@@ -60,28 +59,28 @@ $enddefinitions $end
 
 #0
 1#
-0$
-b00000000000000000000000000000000 %
-b00 &
-b0000 '
+b00000000000000000000000000000000 $
+b00 %
+b0000 &
+b00 '
 b00 (
-b00 )
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 b0000 *
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 b00 ,
 b00 -
 b00 .
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-b0000000000000000000000000000000000000000000000000000000011111111 6
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 b00000000000000000000000000000000 8
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-b000 :
-b000000 ;
+b000 9
+b000000 :
+b00000000000000000000000000000000 ;
 b00000000000000000000000000000000 <
-b00000000000000000000000000000000 =
+0=
 0>
 0?
 0@
@@ -96,139 +95,139 @@ b00000000000000000000000000000100 H
 b00000000000000000000000000000010 I
 b00000000000000000000000000000011 J
 #10
-1$
-b00000000000000000000000000000001 %
-b11 &
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+b00000000000000000000000000000001 $
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 b1111 *
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-b0000000000000000000000000000001000000000000000000000000011111101 6
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 b11 (
-b11 )
+b1111 )
 b1111 *
-b1111 +
+b11 +
 b11 ,
 b11 -
 b11 .
-b11 /
-r0.5 0
-r1 2
-r1.5 4
-b0000000000000000000000000000010100000000000000000000000011111010 6
-b00000000000000000000000000000101 8
-b00000000000000000000000000001010 9
-b011 :
-b100100 ;
-#55
-0$
-#60
-1$
-b00000000000000000000000000000110 %
-b00 &
-b0000 '
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+r0.8999999999999999 3
+b0000000000000000000000000000001100000000000000000000000011111100 5
+b00000000000000000000000000000011 7
+b00000000000000000000000000000110 8
+b101 9
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+#35
+0=
+#40
+b00000000000000000000000000000100 $
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 b00 (
-b00 )
+b0000 )
 b0000 *
-b0000 +
+b00 +
 b00 ,
 b00 -
 b00 .
-b00 /
-r0.6 0
-r1.2 2
-r1.8 4
-b0000000000000000000000000000011000000000000000000000000011111001 6
-b00000000000000000000000000000110 8
-b00000000000000000000000000001100 9
-b010 :
-b011011 ;
+r0.4 /
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+b0000000000000000000000000000010000000000000000000000000011111011 5
+b00000000000000000000000000000100 7
+b00000000000000000000000000001000 8
+b100 9
+b101101 :
+1=
+#45
+0=
+#50
+b00000000000000000000000000000101 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
+b1111 *
+b11 +
+b11 ,
+b11 -
+b11 .
+r0.5 /
+r1 1
+r1.5 3
+b0000000000000000000000000000010100000000000000000000000011111010 5
+b00000000000000000000000000000101 7
+b00000000000000000000000000001010 8
+b011 9
+b100100 :
+1=
+#55
+0=
+#60
+b00000000000000000000000000000110 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
+b0000 *
+b00 +
+b00 ,
+b00 -
+b00 .
+r0.6 /
+r1.2 1
+r1.8 3
+b0000000000000000000000000000011000000000000000000000000011111001 5
+b00000000000000000000000000000110 7
+b00000000000000000000000000001100 8
+b010 9
+b011011 :
+1=
diff --git a/test_regress/t/t_trace_complex_params_fst.out b/test_regress/t/t_trace_complex_params_fst.out
index 24ad40d1b..803d49c16 100644
--- a/test_regress/t/t_trace_complex_params_fst.out
+++ b/test_regress/t/t_trace_complex_params_fst.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:11 2022
+	Tue Oct 24 11:02:57 2023
 
 $end
 $version
@@ -9,237 +9,237 @@ $timescale
 	1ps
 $end
 $scope module top $end
-$var wire 1 ! clk $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
+$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
-$var logic 2 # v_strp [1:0] $end
-$var logic 4 $ v_strp_strp [3:0] $end
-$var logic 2 % v_unip_strp [1:0] $end
-$var logic 2 & v_arrp [2:1] $end
-$var logic 4 ' v_arrp_arrp [3:0] $end
-$var logic 4 ( v_arrp_strp [3:0] $end
-$var logic 1 ) v_arru[1] $end
-$var logic 1 * v_arru[2] $end
-$var logic 1 + v_arru_arru[3][1] $end
-$var logic 1 , v_arru_arru[3][2] $end
-$var logic 1 - v_arru_arru[4][1] $end
-$var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] [2:1] $end
-$var logic 2 0 v_arru_arrp[4] [2:1] $end
-$var logic 2 1 v_arru_strp[3] [1:0] $end
-$var logic 2 2 v_arru_strp[4] [1:0] $end
-$var real 64 3 v_real $end
-$var real 64 4 v_arr_real[0] $end
-$var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 [63:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
+$var bit 2 $ v_strp [1:0] $end
+$var bit 4 % v_strp_strp [3:0] $end
+$var bit 2 & v_unip_strp [1:0] $end
+$var bit 2 ' v_arrp [2:1] $end
+$var bit 4 ( v_arrp_arrp [3:0] $end
+$var bit 4 ) v_arrp_strp [3:0] $end
+$var bit 1 * v_arru[1] $end
+$var bit 1 + v_arru[2] $end
+$var bit 1 , v_arru_arru[3][1] $end
+$var bit 1 - v_arru_arru[3][2] $end
+$var bit 1 . v_arru_arru[4][1] $end
+$var bit 1 / v_arru_arru[4][2] $end
+$var bit 2 0 v_arru_arrp[3] [2:1] $end
+$var bit 2 1 v_arru_arrp[4] [2:1] $end
+$var bit 2 2 v_arru_strp[3] [1:0] $end
+$var bit 2 3 v_arru_strp[4] [1:0] $end
+$var real 64 4 v_real $end
+$var real 64 5 v_arr_real[0] $end
+$var real 64 6 v_arr_real[1] $end
+$var logic 64 7 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed [31:0] $end
+$var int 32 8 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 [31:0] $end
+$var int 32 9 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb [2:0] $end
-$var logic 6 : v_enumb2_str [5:0] $end
-$var logic 8 ; unpacked_array[-2] [7:0] $end
-$var logic 8 < unpacked_array[-1] [7:0] $end
-$var logic 8 = unpacked_array[0] [7:0] $end
-$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 3 : v_enumb [2:0] $end
+$var logic 6 ; v_enumb2_str [5:0] $end
+$var logic 8 < unpacked_array[-2] [7:0] $end
+$var logic 8 = unpacked_array[-1] [7:0] $end
+$var logic 8 > unpacked_array[0] [7:0] $end
+$var bit 1 ? LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 ? PARAM [31:0] $end
-$upscope $end
-$scope module p2 $end
 $var parameter 32 @ PARAM [31:0] $end
 $upscope $end
-$scope module p3 $end
+$scope module p2 $end
 $var parameter 32 A PARAM [31:0] $end
 $upscope $end
+$scope module p3 $end
+$var parameter 32 B PARAM [31:0] $end
+$upscope $end
 $scope module unnamedblk1 $end
-$var integer 32 B b [31:0] $end
+$var integer 32 C b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 C a [31:0] $end
+$var integer 32 D a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 D global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1D
+b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000000000011 A
-b00000000000000000000000000000010 @
-b00000000000000000000000000000100 ?
-0>
+b00000000000000000000000000000011 B
+b00000000000000000000000000000010 A
+b00000000000000000000000000000100 @
+0?
+b00000000 >
 b00000000 =
 b00000000 <
-b00000000 ;
-b000000 :
-b000 9
+b000000 ;
+b000 :
+b00000000000000000000000000000000 9
 b00000000000000000000000000000000 8
-b00000000000000000000000000000000 7
-b0000000000000000000000000000000000000000000000000000000011111111 6
+b0000000000000000000000000000000000000000000000000000000011111111 7
+r0 6
 r0 5
 r0 4
-r0 3
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+0/
 0.
 0-
 0,
 0+
 0*
-0)
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000000 "
-0!
+b0000 %
+b00 $
+b00000000000000000000000000000000 #
+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-b11 #
-b1111 $
-b11 %
+1"
+b00000000000000000000000000000001 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.1 3
-r0.2 4
-r0.3 5
-b0000000000000000000000000000000100000000000000000000000011111110 6
-b00000000000000000000000000000001 7
-b00000000000000000000000000000010 8
-b111 9
-b00000000000000000000000000000101 B
+b11 3
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+r0.2 5
+r0.3 6
+b0000000000000000000000000000000100000000000000000000000011111110 7
+b00000000000000000000000000000001 8
+b00000000000000000000000000000010 9
+b111 :
 b00000000000000000000000000000101 C
+b00000000000000000000000000000101 D
 #15
-0!
+0"
 #20
-1!
-b110 9
-b00000000000000000000000000000100 8
-b00000000000000000000000000000010 7
-b0000000000000000000000000000001000000000000000000000000011111101 6
-r0.6 5
-r0.4 4
-r0.2 3
+1"
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+b00000000000000000000000000000010 8
+b0000000000000000000000000000001000000000000000000000000011111101 7
+r0.6 6
+r0.4 5
+r0.2 4
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
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 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000010 "
-b111111 :
+b0000 %
+b00 $
+b00000000000000000000000000000010 #
+b111111 ;
 #25
-0!
+0"
 #30
-1!
-b110110 :
-b00000000000000000000000000000011 "
-b11 #
-b1111 $
-b11 %
+1"
+b110110 ;
+b00000000000000000000000000000011 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.3 3
-r0.6000000000000001 4
-r0.8999999999999999 5
-b0000000000000000000000000000001100000000000000000000000011111100 6
-b00000000000000000000000000000011 7
-b00000000000000000000000000000110 8
-b101 9
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+r0.8999999999999999 6
+b0000000000000000000000000000001100000000000000000000000011111100 7
+b00000000000000000000000000000011 8
+b00000000000000000000000000000110 9
+b101 :
 #35
-0!
+0"
 #40
-1!
-b100 9
-b00000000000000000000000000001000 8
-b00000000000000000000000000000100 7
-b0000000000000000000000000000010000000000000000000000000011111011 6
-r1.2 5
-r0.8 4
-r0.4 3
+1"
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+b00000000000000000000000000000100 8
+b0000000000000000000000000000010000000000000000000000000011111011 7
+r1.2 6
+r0.8 5
+r0.4 4
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 b00 2
 b00 1
 b00 0
-b00 /
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 b0000 (
-b0000 '
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 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000100 "
-b101101 :
+b0000 %
+b00 $
+b00000000000000000000000000000100 #
+b101101 ;
 #45
-0!
+0"
 #50
-1!
-b100100 :
-b00000000000000000000000000000101 "
-b11 #
-b1111 $
-b11 %
+1"
+b100100 ;
+b00000000000000000000000000000101 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.5 3
-r1 4
-r1.5 5
-b0000000000000000000000000000010100000000000000000000000011111010 6
-b00000000000000000000000000000101 7
-b00000000000000000000000000001010 8
-b011 9
+b11 3
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+r1.5 6
+b0000000000000000000000000000010100000000000000000000000011111010 7
+b00000000000000000000000000000101 8
+b00000000000000000000000000001010 9
+b011 :
 #55
-0!
+0"
 #60
-1!
-b010 9
-b00000000000000000000000000001100 8
-b00000000000000000000000000000110 7
-b0000000000000000000000000000011000000000000000000000000011111001 6
-r1.8 5
-r1.2 4
-r0.6 3
+1"
+b010 :
+b00000000000000000000000000001100 9
+b00000000000000000000000000000110 8
+b0000000000000000000000000000011000000000000000000000000011111001 7
+r1.8 6
+r1.2 5
+r0.6 4
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000110 "
-b011011 :
+b0000 %
+b00 $
+b00000000000000000000000000000110 #
+b011011 ;
diff --git a/test_regress/t/t_trace_complex_params_fst_sc.out b/test_regress/t/t_trace_complex_params_fst_sc.out
index 43f3c9ed6..46e0911c9 100644
--- a/test_regress/t/t_trace_complex_params_fst_sc.out
+++ b/test_regress/t/t_trace_complex_params_fst_sc.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:18 2022
+	Tue Oct 24 11:09:58 2023
 
 $end
 $version
@@ -9,279 +9,279 @@ $timescale
 	1ps
 $end
 $scope module top $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
-$var logic 2 # v_strp [1:0] $end
-$var logic 4 $ v_strp_strp [3:0] $end
-$var logic 2 % v_unip_strp [1:0] $end
-$var logic 2 & v_arrp [2:1] $end
-$var logic 4 ' v_arrp_arrp [3:0] $end
-$var logic 4 ( v_arrp_strp [3:0] $end
-$var logic 1 ) v_arru[1] $end
-$var logic 1 * v_arru[2] $end
-$var logic 1 + v_arru_arru[3][1] $end
-$var logic 1 , v_arru_arru[3][2] $end
-$var logic 1 - v_arru_arru[4][1] $end
-$var logic 1 . v_arru_arru[4][2] $end
-$var logic 2 / v_arru_arrp[3] [2:1] $end
-$var logic 2 0 v_arru_arrp[4] [2:1] $end
-$var logic 2 1 v_arru_strp[3] [1:0] $end
-$var logic 2 2 v_arru_strp[4] [1:0] $end
-$var real 64 3 v_real $end
-$var real 64 4 v_arr_real[0] $end
-$var real 64 5 v_arr_real[1] $end
-$var logic 64 6 v_str32x2 [63:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
+$var bit 2 $ v_strp [1:0] $end
+$var bit 4 % v_strp_strp [3:0] $end
+$var bit 2 & v_unip_strp [1:0] $end
+$var bit 2 ' v_arrp [2:1] $end
+$var bit 4 ( v_arrp_arrp [3:0] $end
+$var bit 4 ) v_arrp_strp [3:0] $end
+$var bit 1 * v_arru[1] $end
+$var bit 1 + v_arru[2] $end
+$var bit 1 , v_arru_arru[3][1] $end
+$var bit 1 - v_arru_arru[3][2] $end
+$var bit 1 . v_arru_arru[4][1] $end
+$var bit 1 / v_arru_arru[4][2] $end
+$var bit 2 0 v_arru_arrp[3] [2:1] $end
+$var bit 2 1 v_arru_arrp[4] [2:1] $end
+$var bit 2 2 v_arru_strp[3] [1:0] $end
+$var bit 2 3 v_arru_strp[4] [1:0] $end
+$var real 64 4 v_real $end
+$var real 64 5 v_arr_real[0] $end
+$var real 64 6 v_arr_real[1] $end
+$var logic 64 7 v_str32x2 [63:0] $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 7 v_enumed [31:0] $end
+$var int 32 8 v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 8 v_enumed2 [31:0] $end
+$var int 32 9 v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 9 v_enumb [2:0] $end
-$var logic 6 : v_enumb2_str [5:0] $end
-$var logic 8 ; unpacked_array[-2] [7:0] $end
-$var logic 8 < unpacked_array[-1] [7:0] $end
-$var logic 8 = unpacked_array[0] [7:0] $end
-$var bit 1 > LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 3 : v_enumb [2:0] $end
+$var logic 6 ; v_enumb2_str [5:0] $end
+$var logic 8 < unpacked_array[-2] [7:0] $end
+$var logic 8 = unpacked_array[-1] [7:0] $end
+$var logic 8 > unpacked_array[0] [7:0] $end
+$var bit 1 ? LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module a_module_instantiation_with_a_very_long_name_that_once_its_signals_get_concatenated_and_inlined_will_almost_certainly_result_in_them_getting_hashed $end
-$var parameter 32 ? PARAM [31:0] $end
-$upscope $end
-$scope module p2 $end
 $var parameter 32 @ PARAM [31:0] $end
 $upscope $end
-$scope module p3 $end
+$scope module p2 $end
 $var parameter 32 A PARAM [31:0] $end
 $upscope $end
+$scope module p3 $end
+$var parameter 32 B PARAM [31:0] $end
+$upscope $end
 $scope module unnamedblk1 $end
-$var integer 32 B b [31:0] $end
+$var integer 32 C b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 C a [31:0] $end
+$var integer 32 D a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 D global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1D
+b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000000000011 A
-b00000000000000000000000000000010 @
-b00000000000000000000000000000100 ?
-0>
+b00000000000000000000000000000011 B
+b00000000000000000000000000000010 A
+b00000000000000000000000000000100 @
+0?
+b00000000 >
 b00000000 =
 b00000000 <
-b00000000 ;
-b000000 :
-b000 9
+b000000 ;
+b000 :
+b00000000000000000000000000000000 9
 b00000000000000000000000000000000 8
-b00000000000000000000000000000000 7
-b0000000000000000000000000000000000000000000000000000000011111111 6
+b0000000000000000000000000000000000000000000000000000000011111111 7
+r0 6
 r0 5
 r0 4
-r0 3
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+0/
 0.
 0-
 0,
 0+
 0*
-0)
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000000 "
-0!
+b0000 %
+b00 $
+b00000000000000000000000000000000 #
+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-b11 #
-b1111 $
-b11 %
+1"
+b00000000000000000000000000000001 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.1 3
-r0.2 4
-r0.3 5
-b0000000000000000000000000000000100000000000000000000000011111110 6
-b00000000000000000000000000000001 7
-b00000000000000000000000000000010 8
-b111 9
-b00000000000000000000000000000101 B
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+r0.3 6
+b0000000000000000000000000000000100000000000000000000000011111110 7
+b00000000000000000000000000000001 8
+b00000000000000000000000000000010 9
+b111 :
 b00000000000000000000000000000101 C
+b00000000000000000000000000000101 D
 #11
 #12
 #13
 #14
 #15
-0!
+0"
 #16
 #17
 #18
 #19
 #20
-1!
-b110 9
-b00000000000000000000000000000100 8
-b00000000000000000000000000000010 7
-b0000000000000000000000000000001000000000000000000000000011111101 6
-r0.6 5
-r0.4 4
-r0.2 3
+1"
+b110 :
+b00000000000000000000000000000100 9
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+b0000000000000000000000000000001000000000000000000000000011111101 7
+r0.6 6
+r0.4 5
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+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000010 "
-b111111 :
+b0000 %
+b00 $
+b00000000000000000000000000000010 #
+b111111 ;
 #21
 #22
 #23
 #24
 #25
-0!
+0"
 #26
 #27
 #28
 #29
 #30
-1!
-b110110 :
-b00000000000000000000000000000011 "
-b11 #
-b1111 $
-b11 %
+1"
+b110110 ;
+b00000000000000000000000000000011 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.3 3
-r0.6000000000000001 4
-r0.8999999999999999 5
-b0000000000000000000000000000001100000000000000000000000011111100 6
-b00000000000000000000000000000011 7
-b00000000000000000000000000000110 8
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+b0000000000000000000000000000001100000000000000000000000011111100 7
+b00000000000000000000000000000011 8
+b00000000000000000000000000000110 9
+b101 :
 #31
 #32
 #33
 #34
 #35
-0!
+0"
 #36
 #37
 #38
 #39
 #40
-1!
-b100 9
-b00000000000000000000000000001000 8
-b00000000000000000000000000000100 7
-b0000000000000000000000000000010000000000000000000000000011111011 6
-r1.2 5
-r0.8 4
-r0.4 3
+1"
+b100 :
+b00000000000000000000000000001000 9
+b00000000000000000000000000000100 8
+b0000000000000000000000000000010000000000000000000000000011111011 7
+r1.2 6
+r0.8 5
+r0.4 4
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000100 "
-b101101 :
+b0000 %
+b00 $
+b00000000000000000000000000000100 #
+b101101 ;
 #41
 #42
 #43
 #44
 #45
-0!
+0"
 #46
 #47
 #48
 #49
 #50
-1!
-b100100 :
-b00000000000000000000000000000101 "
-b11 #
-b1111 $
-b11 %
+1"
+b100100 ;
+b00000000000000000000000000000101 #
+b11 $
+b1111 %
 b11 &
-b1111 '
+b11 '
 b1111 (
-b11 /
+b1111 )
 b11 0
 b11 1
 b11 2
-r0.5 3
-r1 4
-r1.5 5
-b0000000000000000000000000000010100000000000000000000000011111010 6
-b00000000000000000000000000000101 7
-b00000000000000000000000000001010 8
-b011 9
+b11 3
+r0.5 4
+r1 5
+r1.5 6
+b0000000000000000000000000000010100000000000000000000000011111010 7
+b00000000000000000000000000000101 8
+b00000000000000000000000000001010 9
+b011 :
 #51
 #52
 #53
 #54
 #55
-0!
+0"
 #56
 #57
 #58
 #59
 #60
-1!
-b010 9
-b00000000000000000000000000001100 8
-b00000000000000000000000000000110 7
-b0000000000000000000000000000011000000000000000000000000011111001 6
-r1.8 5
-r1.2 4
-r0.6 3
+1"
+b010 :
+b00000000000000000000000000001100 9
+b00000000000000000000000000000110 8
+b0000000000000000000000000000011000000000000000000000000011111001 7
+r1.8 6
+r1.2 5
+r0.6 4
+b00 3
 b00 2
 b00 1
 b00 0
-b00 /
+b0000 )
 b0000 (
-b0000 '
+b00 '
 b00 &
-b00 %
-b0000 $
-b00 #
-b00000000000000000000000000000110 "
-b011011 :
+b0000 %
+b00 $
+b00000000000000000000000000000110 #
+b011011 ;
 #61
 #62
 #63
diff --git a/test_regress/t/t_trace_complex_structs.out b/test_regress/t/t_trace_complex_structs.out
index 8b5d5f780..c22d5430e 100644
--- a/test_regress/t/t_trace_complex_structs.out
+++ b/test_regress/t/t_trace_complex_structs.out
@@ -1,90 +1,89 @@
 $version Generated by VerilatedVcd $end
-$date Wed Aug 11 12:41:22 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 I clk $end
   $scope module $unit $end
-   $var wire  1 # global_bit $end
+   $var wire 1 # global_bit $end
   $upscope $end
+  $var wire 1 I clk $end
   $scope module t $end
-   $var wire  1 S LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
-   $var wire  1 I clk $end
+   $var wire 1 I clk $end
    $var wire 32 $ cyc [31:0] $end
-   $var wire  8 Q unpacked_array[-1] [7:0] $end
-   $var wire  8 P unpacked_array[-2] [7:0] $end
-   $var wire  8 R unpacked_array[0] [7:0] $end
-   $var real 64 < v_arr_real[0] $end
-   $var real 64 > v_arr_real[1] $end
-   $var wire  2 - v_arrp [2:1] $end
-   $var wire  2 . v_arrp_arrp[3] [2:1] $end
-   $var wire  2 / v_arrp_arrp[4] [2:1] $end
-   $var wire  1 J v_arru[1] $end
-   $var wire  1 K v_arru[2] $end
-   $var wire  2 4 v_arru_arrp[3] [2:1] $end
-   $var wire  2 5 v_arru_arrp[4] [2:1] $end
-   $var wire  1 L v_arru_arru[3][1] $end
-   $var wire  1 M v_arru_arru[3][2] $end
-   $var wire  1 N v_arru_arru[4][1] $end
-   $var wire  1 O v_arru_arru[4][2] $end
-   $var wire  3 D v_enumb [2:0] $end
-   $var wire 32 B v_enumed [31:0] $end
-   $var wire 32 C v_enumed2 [31:0] $end
-   $var real 64 : v_real $end
-   $scope module unnamedblk1 $end
-    $var wire 32 G b [31:0] $end
-    $scope module unnamedblk2 $end
-     $var wire 32 H a [31:0] $end
+   $scope module v_strp $end
+    $var wire 1 % b1 $end
+    $var wire 1 & b0 $end
+   $upscope $end
+   $scope module v_strp_strp $end
+    $scope module x1 $end
+     $var wire 1 ' b1 $end
+     $var wire 1 ( b0 $end
+    $upscope $end
+    $scope module x0 $end
+     $var wire 1 ) b1 $end
+     $var wire 1 * b0 $end
     $upscope $end
    $upscope $end
+   $scope module v_unip_strp $end
+    $scope module x1 $end
+     $var wire 1 + b1 $end
+     $var wire 1 , b0 $end
+    $upscope $end
+    $scope module x0 $end
+     $var wire 1 + b1 $end
+     $var wire 1 , b0 $end
+    $upscope $end
+   $upscope $end
+   $var wire 2 - v_arrp [2:1] $end
+   $var wire 2 . v_arrp_arrp[3] [2:1] $end
+   $var wire 2 / v_arrp_arrp[4] [2:1] $end
    $scope module v_arrp_strp[3] $end
-    $var wire  1 1 b0 $end
-    $var wire  1 0 b1 $end
+    $var wire 1 0 b1 $end
+    $var wire 1 1 b0 $end
    $upscope $end
    $scope module v_arrp_strp[4] $end
-    $var wire  1 3 b0 $end
-    $var wire  1 2 b1 $end
+    $var wire 1 2 b1 $end
+    $var wire 1 3 b0 $end
    $upscope $end
+   $var wire 1 J v_arru[1] $end
+   $var wire 1 K v_arru[2] $end
+   $var wire 1 L v_arru_arru[3][1] $end
+   $var wire 1 M v_arru_arru[3][2] $end
+   $var wire 1 N v_arru_arru[4][1] $end
+   $var wire 1 O v_arru_arru[4][2] $end
+   $var wire 2 4 v_arru_arrp[3] [2:1] $end
+   $var wire 2 5 v_arru_arrp[4] [2:1] $end
    $scope module v_arru_strp[3] $end
-    $var wire  1 7 b0 $end
-    $var wire  1 6 b1 $end
+    $var wire 1 6 b1 $end
+    $var wire 1 7 b0 $end
    $upscope $end
    $scope module v_arru_strp[4] $end
-    $var wire  1 9 b0 $end
-    $var wire  1 8 b1 $end
-   $upscope $end
-   $scope module v_enumb2_str $end
-    $var wire  3 E a [2:0] $end
-    $var wire  3 F b [2:0] $end
+    $var wire 1 8 b1 $end
+    $var wire 1 9 b0 $end
    $upscope $end
+   $var real 64 : v_real $end
+   $var real 64 < v_arr_real[0] $end
+   $var real 64 > v_arr_real[1] $end
    $scope module v_str32x2[0] $end
     $var wire 32 @ data [31:0] $end
    $upscope $end
    $scope module v_str32x2[1] $end
     $var wire 32 A data [31:0] $end
    $upscope $end
-   $scope module v_strp_strp $end
-    $scope module x0 $end
-     $var wire  1 * b0 $end
-     $var wire  1 ) b1 $end
-    $upscope $end
-    $scope module x1 $end
-     $var wire  1 ( b0 $end
-     $var wire  1 ' b1 $end
-    $upscope $end
+   $var wire 32 B v_enumed [31:0] $end
+   $var wire 32 C v_enumed2 [31:0] $end
+   $var wire 3 D v_enumb [2:0] $end
+   $scope module v_enumb2_str $end
+    $var wire 3 E a [2:0] $end
+    $var wire 3 F b [2:0] $end
    $upscope $end
-   $scope module v_strp $end
-    $var wire  1 & b0 $end
-    $var wire  1 % b1 $end
-   $upscope $end
-   $scope module v_unip_strp $end
-    $scope module x0 $end
-     $var wire  1 , b0 $end
-     $var wire  1 + b1 $end
-    $upscope $end
-    $scope module x1 $end
-     $var wire  1 , b0 $end
-     $var wire  1 + b1 $end
+   $var wire 8 P unpacked_array[-2] [7:0] $end
+   $var wire 8 Q unpacked_array[-1] [7:0] $end
+   $var wire 8 R unpacked_array[0] [7:0] $end
+   $var wire 1 S LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+   $scope module unnamedblk1 $end
+    $var wire 32 G b [31:0] $end
+    $scope module unnamedblk2 $end
+     $var wire 32 H a [31:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
diff --git a/test_regress/t/t_trace_complex_structs_fst.out b/test_regress/t/t_trace_complex_structs_fst.out
index c827fdd9b..81ae0ea36 100644
--- a/test_regress/t/t_trace_complex_structs_fst.out
+++ b/test_regress/t/t_trace_complex_structs_fst.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:19 2022
+	Tue Oct 24 11:01:27 2023
 
 $end
 $version
@@ -9,125 +9,125 @@ $timescale
 	1ps
 $end
 $scope module top $end
-$var wire 1 ! clk $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
+$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
 $scope struct v_strp $end
-$var logic 1 # b1 $end
-$var logic 1 $ b0 $end
+$var bit 1 $ b1 $end
+$var bit 1 % b0 $end
 $upscope $end
 $scope struct v_strp_strp $end
 $scope struct x1 $end
-$var logic 1 % b1 $end
-$var logic 1 & b0 $end
+$var bit 1 & b1 $end
+$var bit 1 ' b0 $end
 $upscope $end
 $scope struct x0 $end
-$var logic 1 ' b1 $end
-$var logic 1 ( b0 $end
+$var bit 1 ( b1 $end
+$var bit 1 ) b0 $end
 $upscope $end
 $upscope $end
 $scope union v_unip_strp $end
 $scope struct x1 $end
-$var logic 1 ) b1 $end
-$var logic 1 * b0 $end
+$var bit 1 * b1 $end
+$var bit 1 + b0 $end
 $upscope $end
 $scope struct x0 $end
-$var logic 1 ) b1 $end
-$var logic 1 * b0 $end
+$var bit 1 * b1 $end
+$var bit 1 + b0 $end
 $upscope $end
 $upscope $end
-$var logic 2 + v_arrp [2:1] $end
-$var logic 2 , v_arrp_arrp[3] [2:1] $end
-$var logic 2 - v_arrp_arrp[4] [2:1] $end
+$var bit 2 , v_arrp [2:1] $end
+$var bit 2 - v_arrp_arrp[3] [2:1] $end
+$var bit 2 . v_arrp_arrp[4] [2:1] $end
 $scope struct v_arrp_strp[3] $end
-$var logic 1 . b1 $end
-$var logic 1 / b0 $end
+$var bit 1 / b1 $end
+$var bit 1 0 b0 $end
 $upscope $end
 $scope struct v_arrp_strp[4] $end
-$var logic 1 0 b1 $end
-$var logic 1 1 b0 $end
+$var bit 1 1 b1 $end
+$var bit 1 2 b0 $end
 $upscope $end
-$var logic 1 2 v_arru[1] $end
-$var logic 1 3 v_arru[2] $end
-$var logic 1 4 v_arru_arru[3][1] $end
-$var logic 1 5 v_arru_arru[3][2] $end
-$var logic 1 6 v_arru_arru[4][1] $end
-$var logic 1 7 v_arru_arru[4][2] $end
-$var logic 2 8 v_arru_arrp[3] [2:1] $end
-$var logic 2 9 v_arru_arrp[4] [2:1] $end
+$var bit 1 3 v_arru[1] $end
+$var bit 1 4 v_arru[2] $end
+$var bit 1 5 v_arru_arru[3][1] $end
+$var bit 1 6 v_arru_arru[3][2] $end
+$var bit 1 7 v_arru_arru[4][1] $end
+$var bit 1 8 v_arru_arru[4][2] $end
+$var bit 2 9 v_arru_arrp[3] [2:1] $end
+$var bit 2 : v_arru_arrp[4] [2:1] $end
 $scope struct v_arru_strp[3] $end
-$var logic 1 : b1 $end
-$var logic 1 ; b0 $end
+$var bit 1 ; b1 $end
+$var bit 1 < b0 $end
 $upscope $end
 $scope struct v_arru_strp[4] $end
-$var logic 1 < b1 $end
-$var logic 1 = b0 $end
+$var bit 1 = b1 $end
+$var bit 1 > b0 $end
 $upscope $end
-$var real 64 > v_real $end
-$var real 64 ? v_arr_real[0] $end
-$var real 64 @ v_arr_real[1] $end
+$var real 64 ? v_real $end
+$var real 64 @ v_arr_real[0] $end
+$var real 64 A v_arr_real[1] $end
 $scope struct v_str32x2[0] $end
-$var logic 32 A data [31:0] $end
+$var logic 32 B data [31:0] $end
 $upscope $end
 $scope struct v_str32x2[1] $end
-$var logic 32 B data [31:0] $end
-$attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
+$var logic 32 C data [31:0] $end
 $upscope $end
+$attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 C v_enumed [31:0] $end
+$var int 32 D v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 D v_enumed2 [31:0] $end
+$var int 32 E v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 E v_enumb [2:0] $end
+$var logic 3 F v_enumb [2:0] $end
 $scope struct v_enumb2_str $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 F a [2:0] $end
+$var logic 3 G a [2:0] $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 G b [2:0] $end
+$var logic 3 H b [2:0] $end
 $upscope $end
-$var logic 8 H unpacked_array[-2] [7:0] $end
-$var logic 8 I unpacked_array[-1] [7:0] $end
-$var logic 8 J unpacked_array[0] [7:0] $end
-$var bit 1 K LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 8 I unpacked_array[-2] [7:0] $end
+$var logic 8 J unpacked_array[-1] [7:0] $end
+$var logic 8 K unpacked_array[0] [7:0] $end
+$var bit 1 L LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module unnamedblk1 $end
-$var integer 32 L b [31:0] $end
+$var integer 32 M b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 M a [31:0] $end
+$var integer 32 N a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 N global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1N
+b00000000000000000000000000000000 N
 b00000000000000000000000000000000 M
-b00000000000000000000000000000000 L
-0K
+0L
+b00000000 K
 b00000000 J
 b00000000 I
-b00000000 H
+b000 H
 b000 G
 b000 F
-b000 E
+b00000000000000000000000000000000 E
 b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000011111111 A
+b00000000000000000000000011111111 B
+r0 A
 r0 @
 r0 ?
-r0 >
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+08
 07
 06
 05
@@ -137,10 +137,10 @@ b00 8
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -148,14 +148,13 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000000 "
-0!
+b00000000000000000000000000000000 #
+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-1#
+1"
+b00000000000000000000000000000001 #
 1$
 1%
 1&
@@ -163,73 +162,73 @@ b00000000000000000000000000000001 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.1 >
-r0.2 ?
-r0.3 @
-b00000000000000000000000011111110 A
-b00000000000000000000000000000001 B
+1>
+r0.1 ?
+r0.2 @
+r0.3 A
+b00000000000000000000000011111110 B
 b00000000000000000000000000000001 C
-b00000000000000000000000000000010 D
-b111 E
-b00000000000000000000000000000101 L
-b00000000000000000000000000000101 M
-#15
-0!
-#20
-1!
-b110 E
-b00000000000000000000000000000100 D
-b00000000000000000000000000000010 C
-b00000000000000000000000000000010 B
-b00000000000000000000000011111101 A
-r0.6 @
-r0.4 ?
-r0.2 >
-0=
-0<
-0;
-0:
-b00 9
-b00 8
-01
-00
-0/
-0.
-b00 -
-b00 ,
-b00 +
-0*
-0)
-0(
-0'
-0&
-0%
-0$
-0#
-b00000000000000000000000000000010 "
+b00000000000000000000000000000001 D
+b00000000000000000000000000000010 E
 b111 F
-b111 G
-#25
-0!
-#30
-1!
-b110 G
+b00000000000000000000000000000101 M
+b00000000000000000000000000000101 N
+#15
+0"
+#20
+1"
 b110 F
-b00000000000000000000000000000011 "
-1#
+b00000000000000000000000000000100 E
+b00000000000000000000000000000010 D
+b00000000000000000000000000000010 C
+b00000000000000000000000011111101 B
+r0.6 A
+r0.4 @
+r0.2 ?
+0>
+0=
+0<
+0;
+b00 :
+b00 9
+02
+01
+00
+0/
+b00 .
+b00 -
+b00 ,
+0+
+0*
+0)
+0(
+0'
+0&
+0%
+0$
+b00000000000000000000000000000010 #
+b111 G
+b111 H
+#25
+0"
+#30
+1"
+b110 H
+b110 G
+b00000000000000000000000000000011 #
 1$
 1%
 1&
@@ -237,52 +236,54 @@ b00000000000000000000000000000011 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.3 >
-r0.6000000000000001 ?
-r0.8999999999999999 @
-b00000000000000000000000011111100 A
-b00000000000000000000000000000011 B
+1>
+r0.3 ?
+r0.6000000000000001 @
+r0.8999999999999999 A
+b00000000000000000000000011111100 B
 b00000000000000000000000000000011 C
-b00000000000000000000000000000110 D
-b101 E
+b00000000000000000000000000000011 D
+b00000000000000000000000000000110 E
+b101 F
 #35
-0!
+0"
 #40
-1!
-b100 E
-b00000000000000000000000000001000 D
+1"
+b100 F
+b00000000000000000000000000001000 E
+b00000000000000000000000000000100 D
 b00000000000000000000000000000100 C
-b00000000000000000000000000000100 B
-b00000000000000000000000011111011 A
-r1.2 @
-r0.8 ?
-r0.4 >
+b00000000000000000000000011111011 B
+r1.2 A
+r0.8 @
+r0.4 ?
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+02
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -290,18 +291,16 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000100 "
-b101 F
+b00000000000000000000000000000100 #
 b101 G
+b101 H
 #45
-0!
+0"
 #50
-1!
+1"
+b100 H
 b100 G
-b100 F
-b00000000000000000000000000000101 "
-1#
+b00000000000000000000000000000101 #
 1$
 1%
 1&
@@ -309,52 +308,54 @@ b00000000000000000000000000000101 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.5 >
-r1 ?
-r1.5 @
-b00000000000000000000000011111010 A
-b00000000000000000000000000000101 B
+1>
+r0.5 ?
+r1 @
+r1.5 A
+b00000000000000000000000011111010 B
 b00000000000000000000000000000101 C
-b00000000000000000000000000001010 D
-b011 E
+b00000000000000000000000000000101 D
+b00000000000000000000000000001010 E
+b011 F
 #55
-0!
+0"
 #60
-1!
-b010 E
-b00000000000000000000000000001100 D
+1"
+b010 F
+b00000000000000000000000000001100 E
+b00000000000000000000000000000110 D
 b00000000000000000000000000000110 C
-b00000000000000000000000000000110 B
-b00000000000000000000000011111001 A
-r1.8 @
-r1.2 ?
-r0.6 >
+b00000000000000000000000011111001 B
+r1.8 A
+r1.2 @
+r0.6 ?
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+02
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -362,7 +363,6 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000110 "
-b011 F
+b00000000000000000000000000000110 #
 b011 G
+b011 H
diff --git a/test_regress/t/t_trace_complex_structs_fst_sc.out b/test_regress/t/t_trace_complex_structs_fst_sc.out
index 81696e302..8bfcf9b29 100644
--- a/test_regress/t/t_trace_complex_structs_fst_sc.out
+++ b/test_regress/t/t_trace_complex_structs_fst_sc.out
@@ -1,5 +1,5 @@
 $date
-	Wed Feb 23 00:01:26 2022
+	Tue Oct 24 11:01:32 2023
 
 $end
 $version
@@ -9,124 +9,124 @@ $timescale
 	1ps
 $end
 $scope module top $end
+$scope module $unit $end
+$var bit 1 ! global_bit $end
+$upscope $end
 $scope module t $end
-$var wire 1 ! clk $end
-$var integer 32 " cyc [31:0] $end
+$var wire 1 " clk $end
+$var integer 32 # cyc [31:0] $end
 $scope struct v_strp $end
-$var logic 1 # b1 $end
-$var logic 1 $ b0 $end
+$var bit 1 $ b1 $end
+$var bit 1 % b0 $end
 $upscope $end
 $scope struct v_strp_strp $end
 $scope struct x1 $end
-$var logic 1 % b1 $end
-$var logic 1 & b0 $end
+$var bit 1 & b1 $end
+$var bit 1 ' b0 $end
 $upscope $end
 $scope struct x0 $end
-$var logic 1 ' b1 $end
-$var logic 1 ( b0 $end
+$var bit 1 ( b1 $end
+$var bit 1 ) b0 $end
 $upscope $end
 $upscope $end
 $scope union v_unip_strp $end
 $scope struct x1 $end
-$var logic 1 ) b1 $end
-$var logic 1 * b0 $end
+$var bit 1 * b1 $end
+$var bit 1 + b0 $end
 $upscope $end
 $scope struct x0 $end
-$var logic 1 ) b1 $end
-$var logic 1 * b0 $end
+$var bit 1 * b1 $end
+$var bit 1 + b0 $end
 $upscope $end
 $upscope $end
-$var logic 2 + v_arrp [2:1] $end
-$var logic 2 , v_arrp_arrp[3] [2:1] $end
-$var logic 2 - v_arrp_arrp[4] [2:1] $end
+$var bit 2 , v_arrp [2:1] $end
+$var bit 2 - v_arrp_arrp[3] [2:1] $end
+$var bit 2 . v_arrp_arrp[4] [2:1] $end
 $scope struct v_arrp_strp[3] $end
-$var logic 1 . b1 $end
-$var logic 1 / b0 $end
+$var bit 1 / b1 $end
+$var bit 1 0 b0 $end
 $upscope $end
 $scope struct v_arrp_strp[4] $end
-$var logic 1 0 b1 $end
-$var logic 1 1 b0 $end
+$var bit 1 1 b1 $end
+$var bit 1 2 b0 $end
 $upscope $end
-$var logic 1 2 v_arru[1] $end
-$var logic 1 3 v_arru[2] $end
-$var logic 1 4 v_arru_arru[3][1] $end
-$var logic 1 5 v_arru_arru[3][2] $end
-$var logic 1 6 v_arru_arru[4][1] $end
-$var logic 1 7 v_arru_arru[4][2] $end
-$var logic 2 8 v_arru_arrp[3] [2:1] $end
-$var logic 2 9 v_arru_arrp[4] [2:1] $end
+$var bit 1 3 v_arru[1] $end
+$var bit 1 4 v_arru[2] $end
+$var bit 1 5 v_arru_arru[3][1] $end
+$var bit 1 6 v_arru_arru[3][2] $end
+$var bit 1 7 v_arru_arru[4][1] $end
+$var bit 1 8 v_arru_arru[4][2] $end
+$var bit 2 9 v_arru_arrp[3] [2:1] $end
+$var bit 2 : v_arru_arrp[4] [2:1] $end
 $scope struct v_arru_strp[3] $end
-$var logic 1 : b1 $end
-$var logic 1 ; b0 $end
+$var bit 1 ; b1 $end
+$var bit 1 < b0 $end
 $upscope $end
 $scope struct v_arru_strp[4] $end
-$var logic 1 < b1 $end
-$var logic 1 = b0 $end
+$var bit 1 = b1 $end
+$var bit 1 > b0 $end
 $upscope $end
-$var real 64 > v_real $end
-$var real 64 ? v_arr_real[0] $end
-$var real 64 @ v_arr_real[1] $end
+$var real 64 ? v_real $end
+$var real 64 @ v_arr_real[0] $end
+$var real 64 A v_arr_real[1] $end
 $scope struct v_str32x2[0] $end
-$var logic 32 A data [31:0] $end
+$var logic 32 B data [31:0] $end
 $upscope $end
 $scope struct v_str32x2[1] $end
-$var logic 32 B data [31:0] $end
-$attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
+$var logic 32 C data [31:0] $end
 $upscope $end
+$attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 C v_enumed [31:0] $end
+$var int 32 D v_enumed [31:0] $end
 $attrbegin misc 07 "" 1 $end
-$var logic 32 D v_enumed2 [31:0] $end
+$var int 32 E v_enumed2 [31:0] $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 E v_enumb [2:0] $end
+$var logic 3 F v_enumb [2:0] $end
 $scope struct v_enumb2_str $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 F a [2:0] $end
+$var logic 3 G a [2:0] $end
 $attrbegin misc 07 "" 2 $end
-$var logic 3 G b [2:0] $end
+$var logic 3 H b [2:0] $end
 $upscope $end
-$var logic 8 H unpacked_array[-2] [7:0] $end
-$var logic 8 I unpacked_array[-1] [7:0] $end
-$var logic 8 J unpacked_array[0] [7:0] $end
-$var bit 1 K LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
+$var logic 8 I unpacked_array[-2] [7:0] $end
+$var logic 8 J unpacked_array[-1] [7:0] $end
+$var logic 8 K unpacked_array[0] [7:0] $end
+$var bit 1 L LONGSTART_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_a_very_long_name_which_will_get_hashed_LONGEND $end
 $scope module unnamedblk1 $end
-$var integer 32 L b [31:0] $end
+$var integer 32 M b [31:0] $end
 $scope module unnamedblk2 $end
-$var integer 32 M a [31:0] $end
+$var integer 32 N a [31:0] $end
 $upscope $end
 $upscope $end
 $upscope $end
-$scope module $unit $end
-$var bit 1 N global_bit $end
-$upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-1N
+b00000000000000000000000000000000 N
 b00000000000000000000000000000000 M
-b00000000000000000000000000000000 L
-0K
+0L
+b00000000 K
 b00000000 J
 b00000000 I
-b00000000 H
+b000 H
 b000 G
 b000 F
-b000 E
+b00000000000000000000000000000000 E
 b00000000000000000000000000000000 D
 b00000000000000000000000000000000 C
-b00000000000000000000000000000000 B
-b00000000000000000000000011111111 A
+b00000000000000000000000011111111 B
+r0 A
 r0 @
 r0 ?
-r0 >
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+08
 07
 06
 05
@@ -136,10 +136,10 @@ b00 8
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -147,14 +147,13 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000000 "
-0!
+b00000000000000000000000000000000 #
+0"
+1!
 $end
 #10
-1!
-b00000000000000000000000000000001 "
-1#
+1"
+b00000000000000000000000000000001 #
 1$
 1%
 1&
@@ -162,62 +161,64 @@ b00000000000000000000000000000001 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.1 >
-r0.2 ?
-r0.3 @
-b00000000000000000000000011111110 A
-b00000000000000000000000000000001 B
+1>
+r0.1 ?
+r0.2 @
+r0.3 A
+b00000000000000000000000011111110 B
 b00000000000000000000000000000001 C
-b00000000000000000000000000000010 D
-b111 E
-b00000000000000000000000000000101 L
+b00000000000000000000000000000001 D
+b00000000000000000000000000000010 E
+b111 F
 b00000000000000000000000000000101 M
+b00000000000000000000000000000101 N
 #11
 #12
 #13
 #14
 #15
-0!
+0"
 #16
 #17
 #18
 #19
 #20
-1!
-b110 E
-b00000000000000000000000000000100 D
+1"
+b110 F
+b00000000000000000000000000000100 E
+b00000000000000000000000000000010 D
 b00000000000000000000000000000010 C
-b00000000000000000000000000000010 B
-b00000000000000000000000011111101 A
-r0.6 @
-r0.4 ?
-r0.2 >
+b00000000000000000000000011111101 B
+r0.6 A
+r0.4 @
+r0.2 ?
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+02
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -225,26 +226,24 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000010 "
-b111 F
+b00000000000000000000000000000010 #
 b111 G
+b111 H
 #21
 #22
 #23
 #24
 #25
-0!
+0"
 #26
 #27
 #28
 #29
 #30
-1!
+1"
+b110 H
 b110 G
-b110 F
-b00000000000000000000000000000011 "
-1#
+b00000000000000000000000000000011 #
 1$
 1%
 1&
@@ -252,60 +251,62 @@ b00000000000000000000000000000011 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.3 >
-r0.6000000000000001 ?
-r0.8999999999999999 @
-b00000000000000000000000011111100 A
-b00000000000000000000000000000011 B
+1>
+r0.3 ?
+r0.6000000000000001 @
+r0.8999999999999999 A
+b00000000000000000000000011111100 B
 b00000000000000000000000000000011 C
-b00000000000000000000000000000110 D
-b101 E
+b00000000000000000000000000000011 D
+b00000000000000000000000000000110 E
+b101 F
 #31
 #32
 #33
 #34
 #35
-0!
+0"
 #36
 #37
 #38
 #39
 #40
-1!
-b100 E
-b00000000000000000000000000001000 D
+1"
+b100 F
+b00000000000000000000000000001000 E
+b00000000000000000000000000000100 D
 b00000000000000000000000000000100 C
-b00000000000000000000000000000100 B
-b00000000000000000000000011111011 A
-r1.2 @
-r0.8 ?
-r0.4 >
+b00000000000000000000000011111011 B
+r1.2 A
+r0.8 @
+r0.4 ?
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+02
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -313,26 +314,24 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000100 "
-b101 F
+b00000000000000000000000000000100 #
 b101 G
+b101 H
 #41
 #42
 #43
 #44
 #45
-0!
+0"
 #46
 #47
 #48
 #49
 #50
-1!
+1"
+b100 H
 b100 G
-b100 F
-b00000000000000000000000000000101 "
-1#
+b00000000000000000000000000000101 #
 1$
 1%
 1&
@@ -340,60 +339,62 @@ b00000000000000000000000000000101 "
 1(
 1)
 1*
-b11 +
+1+
 b11 ,
 b11 -
-1.
+b11 .
 1/
 10
 11
-b11 8
+12
 b11 9
-1:
+b11 :
 1;
 1<
 1=
-r0.5 >
-r1 ?
-r1.5 @
-b00000000000000000000000011111010 A
-b00000000000000000000000000000101 B
+1>
+r0.5 ?
+r1 @
+r1.5 A
+b00000000000000000000000011111010 B
 b00000000000000000000000000000101 C
-b00000000000000000000000000001010 D
-b011 E
+b00000000000000000000000000000101 D
+b00000000000000000000000000001010 E
+b011 F
 #51
 #52
 #53
 #54
 #55
-0!
+0"
 #56
 #57
 #58
 #59
 #60
-1!
-b010 E
-b00000000000000000000000000001100 D
+1"
+b010 F
+b00000000000000000000000000001100 E
+b00000000000000000000000000000110 D
 b00000000000000000000000000000110 C
-b00000000000000000000000000000110 B
-b00000000000000000000000011111001 A
-r1.8 @
-r1.2 ?
-r0.6 >
+b00000000000000000000000011111001 B
+r1.8 A
+r1.2 @
+r0.6 ?
+0>
 0=
 0<
 0;
-0:
+b00 :
 b00 9
-b00 8
+02
 01
 00
 0/
-0.
+b00 .
 b00 -
 b00 ,
-b00 +
+0+
 0*
 0)
 0(
@@ -401,10 +402,9 @@ b00 +
 0&
 0%
 0$
-0#
-b00000000000000000000000000000110 "
-b011 F
+b00000000000000000000000000000110 #
 b011 G
+b011 H
 #61
 #62
 #63
diff --git a/test_regress/t/t_trace_dumpvars_dyn_vcd_0.out b/test_regress/t/t_trace_dumpvars_dyn_vcd_0.out
index c19393619..48e248b3d 100644
--- a/test_regress/t/t_trace_dumpvars_dyn_vcd_0.out
+++ b/test_regress/t/t_trace_dumpvars_dyn_vcd_0.out
@@ -1,11 +1,10 @@
 $version Generated by VerilatedVcd $end
-$date Sat Mar  5 13:48:47 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 , clk $end
+  $var wire 1 , clk $end
   $scope module t $end
-   $var wire  1 , clk $end
+   $var wire 1 , clk $end
    $var wire 32 # cyc [31:0] $end
    $scope module sub1a $end
     $var wire 32 - ADD [31:0] $end
diff --git a/test_regress/t/t_trace_empty.pl b/test_regress/t/t_trace_empty.pl
index 314b65d45..fae46614d 100755
--- a/test_regress/t/t_trace_empty.pl
+++ b/test_regress/t/t_trace_empty.pl
@@ -18,8 +18,6 @@ execute(
     check_finished => 1,
     );
 
-file_grep_not("$Self->{obj_dir}/simx.vcd", qr/scope/);
-file_grep_not("$Self->{obj_dir}/simx.vcd", qr/upscope/);
 file_grep_not("$Self->{obj_dir}/simx.vcd", qr/var/);
 
 ok(1);
diff --git a/test_regress/t/t_trace_ena_cc.out b/test_regress/t/t_trace_ena_cc.out
index 15693b267..928abceac 100644
--- a/test_regress/t/t_trace_ena_cc.out
+++ b/test_regress/t/t_trace_ena_cc.out
@@ -1,14 +1,12 @@
 $version Generated by VerilatedVcd $end
-$date Sat Jan 27 15:03:24 2018
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 ' clk $end
+  $var wire 1 ' clk $end
   $scope module t $end
-   $var wire 32 $ c_trace_on [31:0] $end
-   $var wire  1 ' clk $end
+   $var wire 1 ' clk $end
    $var wire 32 # cyc [31:0] $end
+   $var wire 32 $ c_trace_on [31:0] $end
    $var real 64 % r $end
   $upscope $end
  $upscope $end
@@ -83,7 +81,7 @@ r0.8999999999999999 %
 #95
 0'
 #100
-1'
 b00000000000000000000000000001011 #
 b00000000000000000000000000001001 $
 r0.9999999999999999 %
+1'
diff --git a/test_regress/t/t_trace_ena_sc.out b/test_regress/t/t_trace_ena_sc.out
index 1553a9196..78864c041 100644
--- a/test_regress/t/t_trace_ena_sc.out
+++ b/test_regress/t/t_trace_ena_sc.out
@@ -1,163 +1,161 @@
 $version Generated by VerilatedVcd $end
-$date Tue Apr  7 19:56:41 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module top $end
   $scope module t $end
-   $var wire 32 3 c_trace_on [31:0] $end
-   $var wire  1 # clk $end
-   $var wire 32 + cyc [31:0] $end
-   $var real 64 ; r $end
+   $var wire 1 ' clk $end
+   $var wire 32 # cyc [31:0] $end
+   $var wire 32 $ c_trace_on [31:0] $end
+   $var real 64 % r $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-0#
-b00000000000000000000000000000001 +
-b00000000000000000000000000000000 3
-r0 ;
+b00000000000000000000000000000001 #
+b00000000000000000000000000000000 $
+r0 %
+0'
 #10
-1#
-b00000000000000000000000000000010 +
-r0.1 ;
+b00000000000000000000000000000010 #
+r0.1 %
+1'
 #11
 #12
 #13
 #14
 #15
-0#
+0'
 #16
 #17
 #18
 #19
 #20
-1#
-b00000000000000000000000000000011 +
-b00000000000000000000000000000001 3
-r0.2 ;
+b00000000000000000000000000000011 #
+b00000000000000000000000000000001 $
+r0.2 %
+1'
 #21
 #22
 #23
 #24
 #25
-0#
+0'
 #26
 #27
 #28
 #29
 #30
-1#
-b00000000000000000000000000000100 +
-b00000000000000000000000000000010 3
-r0.3 ;
+b00000000000000000000000000000100 #
+b00000000000000000000000000000010 $
+r0.3 %
+1'
 #31
 #32
 #33
 #34
 #35
-0#
+0'
 #36
 #37
 #38
 #39
 #40
-1#
-b00000000000000000000000000000101 +
-b00000000000000000000000000000011 3
-r0.4 ;
+b00000000000000000000000000000101 #
+b00000000000000000000000000000011 $
+r0.4 %
+1'
 #41
 #42
 #43
 #44
 #45
-0#
+0'
 #46
 #47
 #48
 #49
 #50
-1#
-b00000000000000000000000000000110 +
-b00000000000000000000000000000100 3
-r0.5 ;
+b00000000000000000000000000000110 #
+b00000000000000000000000000000100 $
+r0.5 %
+1'
 #51
 #52
 #53
 #54
 #55
-0#
+0'
 #56
 #57
 #58
 #59
 #60
-1#
-b00000000000000000000000000000111 +
-b00000000000000000000000000000101 3
-r0.6 ;
+b00000000000000000000000000000111 #
+b00000000000000000000000000000101 $
+r0.6 %
+1'
 #61
 #62
 #63
 #64
 #65
-0#
+0'
 #66
 #67
 #68
 #69
 #70
-1#
-b00000000000000000000000000001000 +
-b00000000000000000000000000000110 3
-r0.7 ;
+b00000000000000000000000000001000 #
+b00000000000000000000000000000110 $
+r0.7 %
+1'
 #71
 #72
 #73
 #74
 #75
-0#
+0'
 #76
 #77
 #78
 #79
 #80
-1#
-b00000000000000000000000000001001 +
-b00000000000000000000000000000111 3
-r0.7999999999999999 ;
+b00000000000000000000000000001001 #
+b00000000000000000000000000000111 $
+r0.7999999999999999 %
+1'
 #81
 #82
 #83
 #84
 #85
-0#
+0'
 #86
 #87
 #88
 #89
 #90
-1#
-b00000000000000000000000000001010 +
-b00000000000000000000000000001000 3
-r0.8999999999999999 ;
+b00000000000000000000000000001010 #
+b00000000000000000000000000001000 $
+r0.8999999999999999 %
+1'
 #91
 #92
 #93
 #94
 #95
-0#
+0'
 #96
 #97
 #98
 #99
 #100
-1#
-b00000000000000000000000000001011 +
-b00000000000000000000000000001001 3
-r0.9999999999999999 ;
+b00000000000000000000000000001011 #
+b00000000000000000000000000001001 $
+r0.9999999999999999 %
+1'
 #101
 #102
 #103
diff --git a/test_regress/t/t_trace_public.out b/test_regress/t/t_trace_public.out
index e9ef906b0..80592b6e8 100644
--- a/test_regress/t/t_trace_public.out
+++ b/test_regress/t/t_trace_public.out
@@ -1,32 +1,31 @@
 $version Generated by VerilatedVcd $end
-$date Tue Aug 10 15:49:51 2021 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 5 CLK $end
-  $var wire  1 6 RESET $end
   $scope module t $end
-   $var wire  1 5 CLK $end
-   $var wire  1 # RESET $end
-   $var wire 32 & val [31:0] $end
-   $var wire  2 $ vec[3] [2:1] $end
-   $var wire  2 % vec[4] [2:1] $end
+   $var wire 1 5 CLK $end
+   $var wire 1 # RESET $end
    $scope module glbl $end
-    $var wire  1 7 GSR $end
+    $var wire 1 7 GSR $end
    $upscope $end
+   $var wire 2 $ vec[3] [2:1] $end
+   $var wire 2 % vec[4] [2:1] $end
+   $var wire 32 & val [31:0] $end
    $scope module little $end
-    $var wire  1 5 clk $end
-    $var wire 128 1 i128 [63:190] $end
-    $var wire 49 / i48 [1:49] $end
-    $var wire  8 . i8 [0:7] $end
+    $var wire 1 5 clk $end
+    $var wire 8 ' i8 [0:7] $end
+    $var wire 49 ( i48 [1:49] $end
+    $var wire 128 * i128 [63:190] $end
    $upscope $end
    $scope module neg $end
-    $var wire  1 5 clk $end
-    $var wire 128 * i128 [63:-64] $end
-    $var wire 48 ( i48 [-1:-48] $end
-    $var wire  8 ' i8 [0:-7] $end
+    $var wire 1 5 clk $end
+    $var wire 8 . i8 [0:-7] $end
+    $var wire 48 / i48 [-1:-48] $end
+    $var wire 128 1 i128 [63:-64] $end
    $upscope $end
   $upscope $end
+  $var wire 1 5 CLK $end
+  $var wire 1 6 RESET $end
  $upscope $end
 $enddefinitions $end
 
@@ -37,10 +36,10 @@ b00 $
 b00 %
 b00000000000000000000000000000000 &
 b00000000 '
-b000000000000000000000000000000000000000000000000 (
+b0000000000000000000000000000000000000000000000000 (
 b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 *
 b00000000 .
-b0000000000000000000000000000000000000000000000000 /
+b000000000000000000000000000000000000000000000000 /
 b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 1
 05
 16
@@ -49,10 +48,10 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
 #2
 #3
 b11111111 '
-b111111111111111111111111111111111111111111111111 (
+b1111111111111111111111111111111111111111111111111 (
 b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 *
 b11111111 .
-b1111111111111111111111111111111111111111111111111 /
+b111111111111111111111111111111111111111111111111 /
 b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 1
 15
 #4
@@ -65,10 +64,10 @@ b1111111111111111111111111111111111111111111111111111111111111111111111111111111
 #9
 0#
 b00000000 '
-b000000000000000000000000000000000000000000000000 (
+b0000000000000000000000000000000000000000000000000 (
 b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 *
 b00000000 .
-b0000000000000000000000000000000000000000000000000 /
+b000000000000000000000000000000000000000000000000 /
 b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 1
 15
 06
@@ -81,10 +80,10 @@ b0000000000000000000000000000000000000000000000000000000000000000000000000000000
 #15
 b00000000000000000000000000000001 &
 b11111111 '
-b111111111111111111111111111111111111111111111111 (
+b1111111111111111111111111111111111111111111111111 (
 b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 *
 b11111111 .
-b1111111111111111111111111111111111111111111111111 /
+b111111111111111111111111111111111111111111111111 /
 b11111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 1
 15
 #16
diff --git a/test_regress/t/t_trace_rollover.out b/test_regress/t/t_trace_rollover.out
index 155fedd1b..9f8b917f8 100644
--- a/test_regress/t/t_trace_rollover.out
+++ b/test_regress/t/t_trace_rollover.out
@@ -1,11 +1,10 @@
 $version Generated by VerilatedVcd $end
-$date Sun Aug 28 08:18:01 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 # clk $end
+   $var wire 1 # clk $end
    $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
diff --git a/test_regress/t/t_trace_scope_vlt.out b/test_regress/t/t_trace_scope_vlt.out
index 94628f611..72e07b491 100644
--- a/test_regress/t/t_trace_scope_vlt.out
+++ b/test_regress/t/t_trace_scope_vlt.out
@@ -1,11 +1,10 @@
 $version Generated by VerilatedVcd $end
-$date Thu May 12 22:13:21 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 ) clk $end
+  $var wire 1 ) clk $end
   $scope module t $end
-   $var wire  1 ) clk $end
+   $var wire 1 ) clk $end
    $scope module sub1a $end
     $var wire 32 * ADD [31:0] $end
     $var wire 32 # cyc [31:0] $end
diff --git a/test_regress/t/t_trace_timescale.out b/test_regress/t/t_trace_timescale.out
index 34791f485..02f18ab14 100644
--- a/test_regress/t/t_trace_timescale.out
+++ b/test_regress/t/t_trace_timescale.out
@@ -1,71 +1,69 @@
 $version Generated by VerilatedVcd $end
-$date Tue Apr  7 21:19:07 2020
- $end
-$timescale   1ms $end
+$timescale 1ms $end
 
  $scope module top $end
-  $var wire  1 + clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire  1 + clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
 
 
 #0
-b00000000000000000000000000000000 #
-0+
+0#
+b00000000000000000000000000000000 $
 #10
-b00000000000000000000000000000001 #
-1+
+1#
+b00000000000000000000000000000001 $
 #15
-0+
+0#
 #20
-b00000000000000000000000000000010 #
-1+
+1#
+b00000000000000000000000000000010 $
 #25
-0+
+0#
 #30
-b00000000000000000000000000000011 #
-1+
+1#
+b00000000000000000000000000000011 $
 #35
-0+
+0#
 #40
-b00000000000000000000000000000100 #
-1+
+1#
+b00000000000000000000000000000100 $
 #45
-0+
+0#
 #50
-b00000000000000000000000000000101 #
-1+
+1#
+b00000000000000000000000000000101 $
 #55
-0+
+0#
 #60
-b00000000000000000000000000000110 #
-1+
+1#
+b00000000000000000000000000000110 $
 #65
-0+
+0#
 #70
-b00000000000000000000000000000111 #
-1+
+1#
+b00000000000000000000000000000111 $
 #75
-0+
+0#
 #80
-b00000000000000000000000000001000 #
-1+
+1#
+b00000000000000000000000000001000 $
 #85
-0+
+0#
 #90
-b00000000000000000000000000001001 #
-1+
+1#
+b00000000000000000000000000001001 $
 #95
-0+
+0#
 #100
-b00000000000000000000000000001010 #
-1+
+1#
+b00000000000000000000000000001010 $
 #105
-0+
+0#
 #110
-1+
-b00000000000000000000000000001011 #
+1#
+b00000000000000000000000000001011 $
diff --git a/test_regress/t/t_trace_timing1.out b/test_regress/t/t_trace_timing1.out
index 1cd5d550c..5d7ee2f0d 100644
--- a/test_regress/t/t_trace_timing1.out
+++ b/test_regress/t/t_trace_timing1.out
@@ -1,12 +1,11 @@
 $version Generated by VerilatedVcd $end
-$date Sat Oct 15 13:17:45 2022 $end
 $timescale 1ps $end
 
  $scope module TOP $end
   $scope module t $end
    $var wire 32 % CLOCK_CYCLE [31:0] $end
-   $var wire  1 $ clk $end
-   $var wire  1 # rst $end
+   $var wire 1 # rst $end
+   $var wire 1 $ clk $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_trace_two_dump_cc.out b/test_regress/t/t_trace_two_dump_cc.out
index 46be29d26..f14f4193b 100644
--- a/test_regress/t/t_trace_two_dump_cc.out
+++ b/test_regress/t/t_trace_two_dump_cc.out
@@ -1,16 +1,14 @@
 $version Generated by VerilatedVcd $end
-$date Sat Mar  7 18:39:02 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
-  $var wire  1 3 clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire 32 + c_trace_on [31:0] $end
-   $var wire  1 3 clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -18,88 +16,67 @@ $enddefinitions $end
 
 
 #10
-b00000000000000000000000000000001 #
-b00000000000000000000000000000000 +
-13
-b00000000000000000000000000000001 ;
-#10
+1#
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+b00000000000000000000000000000001 &
 #15
-#15
-03
+0#
 #20
-#20
-b00000000000000000000000000000010 #
-b00000000000000000000000000000011 +
-13
+1#
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
 #25
-#25
-03
+0#
 #30
-#30
-b00000000000000000000000000000011 #
-b00000000000000000000000000000100 +
-13
+1#
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
 #35
-#35
-03
+0#
 #40
-#40
-b00000000000000000000000000000100 #
-b00000000000000000000000000000101 +
-13
+1#
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
 #45
-#45
-03
+0#
 #50
-#50
-b00000000000000000000000000000101 #
-b00000000000000000000000000000110 +
-13
+1#
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
 #55
-#55
-03
+0#
 #60
-#60
-b00000000000000000000000000000110 #
-b00000000000000000000000000000111 +
-13
+1#
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
 #65
-#65
-03
+0#
 #70
-#70
-b00000000000000000000000000000111 #
-b00000000000000000000000000001000 +
-13
+1#
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
 #75
-#75
-03
+0#
 #80
-#80
-b00000000000000000000000000001000 #
-b00000000000000000000000000001001 +
-13
+1#
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
 #85
-#85
-03
+0#
 #90
-#90
-b00000000000000000000000000001001 #
-b00000000000000000000000000001010 +
-13
+1#
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
 #95
-#95
-03
+0#
 #100
-#100
-b00000000000000000000000000001010 #
-b00000000000000000000000000001011 +
-13
+1#
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
 #105
-#105
-03
+0#
 #110
-#110
-13
-b00000000000000000000000000001011 #
-b00000000000000000000000000001100 +
+1#
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
diff --git a/test_regress/t/t_trace_two_dump_sc.out b/test_regress/t/t_trace_two_dump_sc.out
index a9f2fe8aa..c21a352d4 100644
--- a/test_regress/t/t_trace_two_dump_sc.out
+++ b/test_regress/t/t_trace_two_dump_sc.out
@@ -1,15 +1,13 @@
 $version Generated by VerilatedVcd $end
-$date Sun Mar  1 20:49:13 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
   $scope module t $end
-   $var wire 32 3 c_trace_on [31:0] $end
-   $var wire  1 # clk $end
-   $var wire 32 + cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -18,64 +16,64 @@ $enddefinitions $end
 
 #0
 0#
-b00000000000000000000000000000001 +
-b00000000000000000000000000000000 3
-b00000000000000000000000000000001 ;
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+b00000000000000000000000000000001 &
 #10000
 1#
-b00000000000000000000000000000010 +
-b00000000000000000000000000000011 3
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
 #15000
 0#
 #20000
 1#
-b00000000000000000000000000000011 +
-b00000000000000000000000000000100 3
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
 #25000
 0#
 #30000
 1#
-b00000000000000000000000000000100 +
-b00000000000000000000000000000101 3
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
 #35000
 0#
 #40000
 1#
-b00000000000000000000000000000101 +
-b00000000000000000000000000000110 3
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
 #45000
 0#
 #50000
 1#
-b00000000000000000000000000000110 +
-b00000000000000000000000000000111 3
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
 #55000
 0#
 #60000
 1#
-b00000000000000000000000000000111 +
-b00000000000000000000000000001000 3
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
 #65000
 0#
 #70000
 1#
-b00000000000000000000000000001000 +
-b00000000000000000000000000001001 3
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
 #75000
 0#
 #80000
 1#
-b00000000000000000000000000001001 +
-b00000000000000000000000000001010 3
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
 #85000
 0#
 #90000
 1#
-b00000000000000000000000000001010 +
-b00000000000000000000000000001011 3
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
 #95000
 0#
 #100000
 1#
-b00000000000000000000000000001011 +
-b00000000000000000000000000001100 3
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
diff --git a/test_regress/t/t_trace_two_hdr_cc.out b/test_regress/t/t_trace_two_hdr_cc.out
index 3d0809dda..bbff00b3e 100644
--- a/test_regress/t/t_trace_two_hdr_cc.out
+++ b/test_regress/t/t_trace_two_hdr_cc.out
@@ -1,28 +1,26 @@
 $version Generated by VerilatedVcd $end
-$date Sat Feb 29 09:09:40 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
-  $var wire  1 3 clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire 32 + c_trace_on [31:0] $end
-   $var wire  1 3 clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module topb $end
-  $var wire  1 N clk $end
+  $var wire 1 ( clk $end
   $scope module t $end
-   $var wire 32 ^ c_trace_on [31:0] $end
-   $var wire  1 N clk $end
-   $var wire 32 V cyc [31:0] $end
-   $var real 64 > r $end
+   $var wire 1 ( clk $end
+   $var wire 32 + cyc [31:0] $end
+   $var wire 32 , c_trace_on [31:0] $end
+   $var real 64 ) r $end
    $scope module sub $end
-    $var wire 32 f inside_sub_a [31:0] $end
+    $var wire 32 - inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -30,99 +28,99 @@ $enddefinitions $end
 
 
 #0
-b00000000000000000000000000000001 #
-b00000000000000000000000000000000 +
-03
-b00000000000000000000000000000001 ;
-r0 >
-0N
-b00000000000000000000000000000001 V
-b00000000000000000000000000000000 ^
-b00000000000000000000000000000010 f
+0#
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+0(
+r0 )
+b00000000000000000000000000000001 &
+b00000000000000000000000000000001 +
+b00000000000000000000000000000000 ,
+b00000000000000000000000000000010 -
 #10
-b00000000000000000000000000000010 #
-b00000000000000000000000000000011 +
-13
-r0.1 >
-1N
+1#
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
+1(
+r0.1 )
 #15
-03
-0N
+0#
+0(
 #20
-b00000000000000000000000000000011 #
-b00000000000000000000000000000100 +
-13
-r0.2 >
-1N
+1#
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
+1(
+r0.2 )
 #25
-03
-0N
+0#
+0(
 #30
-b00000000000000000000000000000100 #
-b00000000000000000000000000000101 +
-13
-r0.3 >
-1N
+1#
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
+1(
+r0.3 )
 #35
-03
-0N
+0#
+0(
 #40
-b00000000000000000000000000000101 #
-b00000000000000000000000000000110 +
-13
-r0.4 >
-1N
+1#
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
+1(
+r0.4 )
 #45
-03
-0N
+0#
+0(
 #50
-b00000000000000000000000000000110 #
-b00000000000000000000000000000111 +
-13
-r0.5 >
-1N
+1#
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
+1(
+r0.5 )
 #55
-03
-0N
+0#
+0(
 #60
-b00000000000000000000000000000111 #
-b00000000000000000000000000001000 +
-13
-r0.6 >
-1N
+1#
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
+1(
+r0.6 )
 #65
-03
-0N
+0#
+0(
 #70
-b00000000000000000000000000001000 #
-b00000000000000000000000000001001 +
-13
-r0.7 >
-1N
+1#
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
+1(
+r0.7 )
 #75
-03
-0N
+0#
+0(
 #80
-b00000000000000000000000000001001 #
-b00000000000000000000000000001010 +
-13
-r0.7999999999999999 >
-1N
+1#
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
+1(
+r0.7999999999999999 )
 #85
-03
-0N
+0#
+0(
 #90
-b00000000000000000000000000001010 #
-b00000000000000000000000000001011 +
-13
-r0.8999999999999999 >
-1N
+1#
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
+1(
+r0.8999999999999999 )
 #95
-03
-0N
+0#
+0(
 #100
-b00000000000000000000000000001011 #
-b00000000000000000000000000001100 +
-13
-r0.9999999999999999 >
-1N
+1#
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
+1(
+r0.9999999999999999 )
diff --git a/test_regress/t/t_trace_two_hdr_sc.out b/test_regress/t/t_trace_two_hdr_sc.out
index 46befffe5..43f14b6ce 100644
--- a/test_regress/t/t_trace_two_hdr_sc.out
+++ b/test_regress/t/t_trace_two_hdr_sc.out
@@ -1,26 +1,24 @@
 $version Generated by VerilatedVcd $end
-$date Sat Feb 29 09:18:19 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
   $scope module t $end
-   $var wire 32 3 c_trace_on [31:0] $end
-   $var wire  1 # clk $end
-   $var wire 32 + cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
  $scope module topb $end
   $scope module t $end
-   $var wire 32 ^ c_trace_on [31:0] $end
-   $var wire  1 > clk $end
-   $var wire 32 V cyc [31:0] $end
-   $var real 64 F r $end
+   $var wire 1 ( clk $end
+   $var wire 32 + cyc [31:0] $end
+   $var wire 32 , c_trace_on [31:0] $end
+   $var real 64 ) r $end
    $scope module sub $end
-    $var wire 32 f inside_sub_a [31:0] $end
+    $var wire 32 - inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -29,98 +27,98 @@ $enddefinitions $end
 
 #0
 0#
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+0(
+r0 )
+b00000000000000000000000000000001 &
 b00000000000000000000000000000001 +
-b00000000000000000000000000000000 3
-b00000000000000000000000000000001 ;
-0>
-r0 F
-b00000000000000000000000000000001 V
-b00000000000000000000000000000000 ^
-b00000000000000000000000000000010 f
+b00000000000000000000000000000000 ,
+b00000000000000000000000000000010 -
 #10000
 1#
-b00000000000000000000000000000010 +
-b00000000000000000000000000000011 3
-1>
-r0.1 F
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
+1(
+r0.1 )
 #15000
 0#
-0>
+0(
 #20000
 1#
-b00000000000000000000000000000011 +
-b00000000000000000000000000000100 3
-1>
-r0.2 F
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
+1(
+r0.2 )
 #25000
 0#
-0>
+0(
 #30000
 1#
-b00000000000000000000000000000100 +
-b00000000000000000000000000000101 3
-1>
-r0.3 F
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
+1(
+r0.3 )
 #35000
 0#
-0>
+0(
 #40000
 1#
-b00000000000000000000000000000101 +
-b00000000000000000000000000000110 3
-1>
-r0.4 F
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
+1(
+r0.4 )
 #45000
 0#
-0>
+0(
 #50000
 1#
-b00000000000000000000000000000110 +
-b00000000000000000000000000000111 3
-1>
-r0.5 F
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
+1(
+r0.5 )
 #55000
 0#
-0>
+0(
 #60000
 1#
-b00000000000000000000000000000111 +
-b00000000000000000000000000001000 3
-1>
-r0.6 F
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
+1(
+r0.6 )
 #65000
 0#
-0>
+0(
 #70000
 1#
-b00000000000000000000000000001000 +
-b00000000000000000000000000001001 3
-1>
-r0.7 F
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
+1(
+r0.7 )
 #75000
 0#
-0>
+0(
 #80000
 1#
-b00000000000000000000000000001001 +
-b00000000000000000000000000001010 3
-1>
-r0.7999999999999999 F
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
+1(
+r0.7999999999999999 )
 #85000
 0#
-0>
+0(
 #90000
 1#
-b00000000000000000000000000001010 +
-b00000000000000000000000000001011 3
-1>
-r0.8999999999999999 F
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
+1(
+r0.8999999999999999 )
 #95000
 0#
-0>
+0(
 #100000
 1#
-1>
-b00000000000000000000000000001011 +
-b00000000000000000000000000001100 3
-r0.9999999999999999 F
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
+1(
+r0.9999999999999999 )
diff --git a/test_regress/t/t_trace_two_port_cc.out b/test_regress/t/t_trace_two_port_cc.out
index 9858cf941..f14f4193b 100644
--- a/test_regress/t/t_trace_two_port_cc.out
+++ b/test_regress/t/t_trace_two_port_cc.out
@@ -1,16 +1,14 @@
 $version Generated by VerilatedVcd $end
-$date Sat Mar  7 18:38:11 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
-  $var wire  1 3 clk $end
+  $var wire 1 # clk $end
   $scope module t $end
-   $var wire 32 + c_trace_on [31:0] $end
-   $var wire  1 3 clk $end
-   $var wire 32 # cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -18,88 +16,67 @@ $enddefinitions $end
 
 
 #10
-b00000000000000000000000000000001 #
-b00000000000000000000000000000000 +
-13
-b00000000000000000000000000000001 ;
-#10
+1#
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+b00000000000000000000000000000001 &
 #15
-#15
-03
+0#
 #20
-#20
-b00000000000000000000000000000010 #
-b00000000000000000000000000000011 +
-13
+1#
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
 #25
-#25
-03
+0#
 #30
-#30
-b00000000000000000000000000000011 #
-b00000000000000000000000000000100 +
-13
+1#
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
 #35
-#35
-03
+0#
 #40
-#40
-b00000000000000000000000000000100 #
-b00000000000000000000000000000101 +
-13
+1#
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
 #45
-#45
-03
+0#
 #50
-#50
-b00000000000000000000000000000101 #
-b00000000000000000000000000000110 +
-13
+1#
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
 #55
-#55
-03
+0#
 #60
-#60
-b00000000000000000000000000000110 #
-b00000000000000000000000000000111 +
-13
+1#
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
 #65
-#65
-03
+0#
 #70
-#70
-b00000000000000000000000000000111 #
-b00000000000000000000000000001000 +
-13
+1#
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
 #75
-#75
-03
+0#
 #80
-#80
-b00000000000000000000000000001000 #
-b00000000000000000000000000001001 +
-13
+1#
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
 #85
-#85
-03
+0#
 #90
-#90
-b00000000000000000000000000001001 #
-b00000000000000000000000000001010 +
-13
+1#
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
 #95
-#95
-03
+0#
 #100
-#100
-b00000000000000000000000000001010 #
-b00000000000000000000000000001011 +
-13
+1#
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
 #105
-#105
-03
+0#
 #110
-#110
-13
-b00000000000000000000000000001011 #
-b00000000000000000000000000001100 +
+1#
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
diff --git a/test_regress/t/t_trace_two_port_sc.out b/test_regress/t/t_trace_two_port_sc.out
index af8668106..c21a352d4 100644
--- a/test_regress/t/t_trace_two_port_sc.out
+++ b/test_regress/t/t_trace_two_port_sc.out
@@ -1,15 +1,13 @@
 $version Generated by VerilatedVcd $end
-$date Sun Mar  1 21:32:22 2020
- $end
-$timescale   1ps $end
+$timescale 1ps $end
 
  $scope module topa $end
   $scope module t $end
-   $var wire 32 3 c_trace_on [31:0] $end
-   $var wire  1 # clk $end
-   $var wire 32 + cyc [31:0] $end
+   $var wire 1 # clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 32 % c_trace_on [31:0] $end
    $scope module sub $end
-    $var wire 32 ; inside_sub_a [31:0] $end
+    $var wire 32 & inside_sub_a [31:0] $end
    $upscope $end
   $upscope $end
  $upscope $end
@@ -18,64 +16,64 @@ $enddefinitions $end
 
 #0
 0#
-b00000000000000000000000000000001 +
-b00000000000000000000000000000000 3
-b00000000000000000000000000000001 ;
+b00000000000000000000000000000001 $
+b00000000000000000000000000000000 %
+b00000000000000000000000000000001 &
 #10000
 1#
-b00000000000000000000000000000010 +
-b00000000000000000000000000000011 3
+b00000000000000000000000000000010 $
+b00000000000000000000000000000011 %
 #15000
 0#
 #20000
 1#
-b00000000000000000000000000000011 +
-b00000000000000000000000000000100 3
+b00000000000000000000000000000011 $
+b00000000000000000000000000000100 %
 #25000
 0#
 #30000
 1#
-b00000000000000000000000000000100 +
-b00000000000000000000000000000101 3
+b00000000000000000000000000000100 $
+b00000000000000000000000000000101 %
 #35000
 0#
 #40000
 1#
-b00000000000000000000000000000101 +
-b00000000000000000000000000000110 3
+b00000000000000000000000000000101 $
+b00000000000000000000000000000110 %
 #45000
 0#
 #50000
 1#
-b00000000000000000000000000000110 +
-b00000000000000000000000000000111 3
+b00000000000000000000000000000110 $
+b00000000000000000000000000000111 %
 #55000
 0#
 #60000
 1#
-b00000000000000000000000000000111 +
-b00000000000000000000000000001000 3
+b00000000000000000000000000000111 $
+b00000000000000000000000000001000 %
 #65000
 0#
 #70000
 1#
-b00000000000000000000000000001000 +
-b00000000000000000000000000001001 3
+b00000000000000000000000000001000 $
+b00000000000000000000000000001001 %
 #75000
 0#
 #80000
 1#
-b00000000000000000000000000001001 +
-b00000000000000000000000000001010 3
+b00000000000000000000000000001001 $
+b00000000000000000000000000001010 %
 #85000
 0#
 #90000
 1#
-b00000000000000000000000000001010 +
-b00000000000000000000000000001011 3
+b00000000000000000000000000001010 $
+b00000000000000000000000000001011 %
 #95000
 0#
 #100000
 1#
-b00000000000000000000000000001011 +
-b00000000000000000000000000001100 3
+b00000000000000000000000000001011 $
+b00000000000000000000000000001100 %
diff --git a/test_regress/t/t_var_escape.out b/test_regress/t/t_var_escape.out
index 3cf2f0549..48b83ad17 100644
--- a/test_regress/t/t_var_escape.out
+++ b/test_regress/t/t_var_escape.out
@@ -1,26 +1,25 @@
 $version Generated by VerilatedVcd $end
-$date Thu Sep 22 13:02:07 2022 $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 & 9num $end
-  $var wire  1 ' bra[ket]slash/dash-colon:9backslash\done $end
-  $var wire  1 # clk $end
-  $var wire  1 % double__underscore $end
-  $var wire  1 $ escaped_normal $end
+  $var wire 1 # clk $end
+  $var wire 1 $ escaped_normal $end
+  $var wire 1 % double__underscore $end
+  $var wire 1 & 9num $end
+  $var wire 1 ' bra[ket]slash/dash-colon:9backslash\done $end
   $scope module t $end
-   $var wire  1 $ 9num $end
-   $var wire 32 * a0.cyc [31:0] $end
-   $var wire  1 $ bra[ket]slash/dash-colon:9backslash\done $end
-   $var wire  1 $ check:alias $end
-   $var wire  1 ) check;alias $end
-   $var wire  1 $ check_alias $end
-   $var wire  1 # clk $end
+   $var wire 1 # clk $end
    $var wire 32 ( cyc [31:0] $end
-   $var wire  1 $ double__underscore $end
-   $var wire  1 $ escaped_normal $end
+   $var wire 1 $ escaped_normal $end
+   $var wire 1 $ double__underscore $end
+   $var wire 1 $ 9num $end
+   $var wire 1 $ bra[ket]slash/dash-colon:9backslash\done $end
+   $var wire 1 $ wire $end
+   $var wire 1 $ check_alias $end
+   $var wire 1 $ check:alias $end
+   $var wire 1 ) check;alias $end
+   $var wire 32 * a0.cyc [31:0] $end
    $var wire 32 * other.cyc [31:0] $end
-   $var wire  1 $ wire $end
    $scope module a0 $end
     $var wire 32 ( cyc [31:0] $end
    $upscope $end
diff --git a/test_regress/t/t_var_nonamebegin.out b/test_regress/t/t_var_nonamebegin.out
index 9e7795564..2a14cc556 100644
--- a/test_regress/t/t_var_nonamebegin.out
+++ b/test_regress/t/t_var_nonamebegin.out
@@ -1,16 +1,14 @@
 $version Generated by VerilatedVcd $end
-$date Tue Jul 24 18:46:01 2012
- $end
 $timescale 1ps $end
 
  $scope module top $end
-  $var wire  1 # clk $end
-  $var wire  1 $ reset_l $end
+  $var wire 1 # clk $end
+  $var wire 1 $ reset_l $end
   $scope module t $end
-   $var wire  1 # clk $end
-   $var wire  1 % inmod $end
+   $var wire 1 # clk $end
+   $var wire 1 $ reset_l $end
+   $var wire 1 % inmod $end
    $var wire 32 & rawmod [31:0] $end
-   $var wire  1 $ reset_l $end
    $scope module genblk1 $end
     $var wire 32 ' ingen [31:0] $end
    $upscope $end
diff --git a/test_regress/t/t_wrapper_context_trace0.out b/test_regress/t/t_wrapper_context_trace0.out
index cc90048e5..7fd30cc6b 100644
--- a/test_regress/t/t_wrapper_context_trace0.out
+++ b/test_regress/t/t_wrapper_context_trace0.out
@@ -1,21 +1,20 @@
 $version Generated by VerilatedVcd $end
-$date Sat Mar  6 21:09:45 2021 $end
 $timescale 1ps $end
 
  $scope module top1 $end
-  $var wire  1 # clk $end
-  $var wire 32 ' counter [31:0] $end
-  $var wire  1 ( done_o $end
-  $var wire  1 $ rst $end
-  $var wire  1 & stop $end
+  $var wire 1 # clk $end
+  $var wire 1 $ rst $end
   $var wire 32 % trace_number [31:0] $end
+  $var wire 1 & stop $end
+  $var wire 32 ' counter [31:0] $end
+  $var wire 1 ( done_o $end
   $scope module top $end
-   $var wire  1 # clk $end
-   $var wire 32 ' counter [31:0] $end
-   $var wire  1 ( done_o $end
-   $var wire  1 $ rst $end
-   $var wire  1 & stop $end
+   $var wire 1 # clk $end
+   $var wire 1 $ rst $end
    $var wire 32 % trace_number [31:0] $end
+   $var wire 1 & stop $end
+   $var wire 32 ' counter [31:0] $end
+   $var wire 1 ( done_o $end
   $upscope $end
  $upscope $end
 $enddefinitions $end
diff --git a/test_regress/t/t_wrapper_context_trace1.out b/test_regress/t/t_wrapper_context_trace1.out
index 3fa5258a3..9f754f10a 100644
--- a/test_regress/t/t_wrapper_context_trace1.out
+++ b/test_regress/t/t_wrapper_context_trace1.out
@@ -1,21 +1,20 @@
 $version Generated by VerilatedVcd $end
-$date Sat Mar  6 21:09:47 2021 $end
 $timescale 1ps $end
 
  $scope module top0 $end
-  $var wire  1 # clk $end
-  $var wire 32 ' counter [31:0] $end
-  $var wire  1 ( done_o $end
-  $var wire  1 $ rst $end
-  $var wire  1 & stop $end
+  $var wire 1 # clk $end
+  $var wire 1 $ rst $end
   $var wire 32 % trace_number [31:0] $end
+  $var wire 1 & stop $end
+  $var wire 32 ' counter [31:0] $end
+  $var wire 1 ( done_o $end
   $scope module top $end
-   $var wire  1 # clk $end
-   $var wire 32 ' counter [31:0] $end
-   $var wire  1 ( done_o $end
-   $var wire  1 $ rst $end
-   $var wire  1 & stop $end
+   $var wire 1 # clk $end
+   $var wire 1 $ rst $end
    $var wire 32 % trace_number [31:0] $end
+   $var wire 1 & stop $end
+   $var wire 32 ' counter [31:0] $end
+   $var wire 1 ( done_o $end
   $upscope $end
  $upscope $end
 $enddefinitions $end

From cf6e362972e9c832e9cd23ab323635b617dea723 Mon Sep 17 00:00:00 2001
From: Marlon James <marlon.james@gmail.com>
Date: Tue, 24 Oct 2023 17:46:20 -0700
Subject: [PATCH 130/157] Support VPI variables of real and string data types
 (#4594)

---
 include/verilated.h            |   3 +-
 include/verilated_vpi.cpp      | 263 +++++++++++++++++++++++++++++++--
 src/V3AstNodes.cpp             |   2 +
 test_regress/t/TestCheck.h     |  10 ++
 test_regress/t/TestSimulator.h |   4 +-
 test_regress/t/t_vpi_var.cpp   |  66 +++++++--
 test_regress/t/t_vpi_var.v     |   9 ++
 test_regress/t/t_vpi_var2.v    |  11 ++
 8 files changed, 344 insertions(+), 24 deletions(-)

diff --git a/include/verilated.h b/include/verilated.h
index 4e4503a8d..77deeefb1 100644
--- a/include/verilated.h
+++ b/include/verilated.h
@@ -133,7 +133,8 @@ enum VerilatedVarType : uint8_t {
     VLVT_UINT32,  // AKA IData
     VLVT_UINT64,  // AKA QData
     VLVT_WDATA,  // AKA WData
-    VLVT_STRING  // C++ string
+    VLVT_STRING,  // C++ string
+    VLVT_REAL  // AKA double
 };
 
 enum VerilatedVarFlags {
diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp
index 2e021f2c5..7e01fe5d2 100644
--- a/include/verilated_vpi.cpp
+++ b/include/verilated_vpi.cpp
@@ -303,7 +303,13 @@ public:
     uint32_t entSize() const { return m_entSize; }
     uint32_t index() const { return m_index; }
     uint32_t type() const override {
-        return (varp()->dims() > 1) ? vpiMemory : vpiReg;  // but might be wire, logic
+        uint32_t type = vpiReg;
+        switch (varp()->vltype()) {
+        case VLVT_REAL: type = vpiRealVar; break;
+        case VLVT_STRING: type = vpiStringVar; break;
+        default: break;
+        }
+        return (varp()->dims() > 1) ? vpiMemory : type;  // but might be wire, logic
     }
     void* prevDatap() const { return m_prevDatap; }
     void* varDatap() const { return m_varDatap; }
@@ -985,9 +991,117 @@ const char* VerilatedVpiError::strFromVpiObjType(PLI_INT32 vpiVal) VL_PURE {
         "vpiGenVar",
         "vpiAutomatics"
     };
+    static const char* const sv_names1[] = {
+        "vpiPackage",
+        "vpiInterface",
+        "vpiProgram",
+        "vpiInterfaceArray",
+        "vpiProgramArray",
+        "vpiTypespec",
+        "vpiModport",
+        "vpiInterfaceTfDecl",
+        "vpiRefObj",
+        "vpiTypeParameter",
+        "vpiLongIntVar",
+        "vpiShortIntVar",
+        "vpiIntVar",
+        "vpiShortRealVar",
+        "vpiByteVar",
+        "vpiClassVar",
+        "vpiStringVar",
+        "vpiEnumVar",
+        "vpiStructVar",
+        "vpiUnionVar",
+        "vpiBitVar",
+        "vpiClassObj",
+        "vpiChandleVar",
+        "vpiPackedArrayVar",
+        "*undefined*",  // 624 is not defined for object types
+        "vpiLongIntTypespec",
+        "vpiShortRealTypespec",
+        "vpiByteTypespec",
+        "vpiShortIntTypespec",
+        "vpiIntTypespec",
+        "vpiClassTypespec",
+        "vpiStringTypespec",
+        "vpiChandleTypespec",
+        "vpiEnumTypespec",
+        "vpiEnumConst",
+        "vpiIntegerTypespec",
+        "vpiTimeTypespec",
+        "vpiRealTypespec",
+        "vpiStructTypespec",
+        "vpiUnionTypespec",
+        "vpiBitTypespec",
+        "vpiLogicTypespec",
+        "vpiArrayTypespec",
+        "vpiVoidTypespec",
+        "vpiTypespecMember",
+        "vpiDistItem",
+        "vpiAliasStmt",
+        "vpiThread",
+        "vpiMethodFuncCall",
+        "vpiMethodTaskCall",
+        "vpiClockingBlock",
+        "vpiClockingIODecl",
+        "vpiClassDefn",
+        "vpiConstraint",
+        "vpiConstraintOrdering",
+        "vpiPropertyDecl",
+        "vpiPropertySpec",
+        "vpiPropertyExpr",
+        "vpiMulticlockSequenceExpr",
+        "vpiClockedSeq",
+        "vpiPropertyInst",
+        "vpiSequenceDecl",
+        "vpiCaseProperty",
+        "*undefined*", // 663 is not defined for object types
+        "vpiSequenceInst",
+        "vpiImmediateAssert",
+        "vpiReturn",
+        "vpiAnyPattern",
+        "vpiTaggedPattern",
+        "vpiStructPattern",
+        "vpiDoWhile",
+        "vpiOrderedWait",
+        "vpiWaitFork",
+        "vpiDisableFork",
+        "vpiExpectStmt",
+        "vpiForeachStmt",
+        "vpiFinal",
+        "vpiExtends",
+        "vpiDistribution",
+        "vpiSeqFormalDecl",
+        "vpiEnumNet",
+        "vpiIntegerNet",
+        "vpiTimeNet",
+        "vpiStructNet",
+        "vpiBreak",
+        "vpiContinue",
+        "vpiAssert",
+        "vpiAssume",
+        "vpiCover",
+        "vpiDisableCondition",
+        "vpiClockingEvent",
+        "vpiReturnStmt",
+        "vpiPackedArrayTypespec",
+        "vpiPackedArrayNet",
+        "vpiImmediateAssume",
+        "vpiImmediateCover",
+        "vpiSequenceTypespec",
+        "vpiPropertyTypespec",
+        "vpiEventTypespec",
+        "vpiPropFormalDecl",
+    };
     // clang-format on
-    if (VL_UNCOVERABLE(vpiVal < 0)) return names[0];
-    return names[(vpiVal <= vpiAutomatics) ? vpiVal : 0];
+    if (VL_UNCOVERABLE(vpiVal < 0))
+        return names[0];
+    else if (vpiVal <= vpiAutomatics)
+        return names[vpiVal];
+    else if (vpiVal >= vpiPackage && vpiVal <= vpiPropFormalDecl)
+        return sv_names1[(vpiVal - vpiPackage)];
+    else
+        return names[0];
 }
 const char* VerilatedVpiError::strFromVpiMethod(PLI_INT32 vpiVal) VL_PURE {
     // clang-format off
@@ -1313,6 +1427,104 @@ void VerilatedVpiError::selfTest() VL_MT_UNSAFE_ONE {
     SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiGenScope);
     SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiGenVar);
     SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiAutomatics);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPackage);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiInterface);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiProgram);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiInterfaceArray);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiProgramArray);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiModport);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiInterfaceTfDecl);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiRefObj);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTypeParameter);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiLongIntVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiShortIntVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiIntVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiShortRealVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiByteVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClassVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStringVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiEnumVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStructVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiUnionVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiBitVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClassObj);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiChandleVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPackedArrayVar);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiLongIntTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiShortRealTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiByteTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiShortIntTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiIntTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClassTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStringTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiChandleTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiEnumTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiEnumConst);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiIntegerTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTimeTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiRealTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStructTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiUnionTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiBitTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiLogicTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiArrayTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiVoidTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTypespecMember);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiDistItem);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiAliasStmt);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiThread);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiMethodFuncCall);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiMethodTaskCall);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClockingBlock);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClockingIODecl);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClassDefn);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiConstraint);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiConstraintOrdering);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropertyDecl);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropertySpec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropertyExpr);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiMulticlockSequenceExpr);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClockedSeq);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropertyInst);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiSequenceDecl);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiCaseProperty);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiSequenceInst);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiImmediateAssert);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiReturn);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiAnyPattern);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTaggedPattern);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStructPattern);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiDoWhile);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiOrderedWait);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiWaitFork);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiDisableFork);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiExpectStmt);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiForeachStmt);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiFinal);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiExtends);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiDistribution);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiSeqFormalDecl);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiEnumNet);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiIntegerNet);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiTimeNet);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiStructNet);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiBreak);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiContinue);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiAssert);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiAssume);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiCover);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiDisableCondition);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiClockingEvent);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiReturnStmt);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPackedArrayTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPackedArrayNet);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiImmediateAssume);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiImmediateCover);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiSequenceTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropertyTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiEventTypespec);
+    SELF_CHECK_ENUM_STR(strFromVpiObjType, vpiPropFormalDecl);
 
     SELF_CHECK_ENUM_STR(strFromVpiMethod, vpiCondition);
     SELF_CHECK_ENUM_STR(strFromVpiMethod, vpiStmt);
@@ -1734,7 +1946,8 @@ bool vl_check_format(const VerilatedVar* varp, const p_vpi_value valuep, const c
         case VLVT_UINT64:
         case VLVT_WDATA: return status;
         case VLVT_STRING:
-            if (isGetValue) {
+            // string parameter values can't be changed
+            if (isGetValue || !varp->isParam()) {
                 return status;
             } else {
                 status = false;
@@ -1749,6 +1962,11 @@ bool vl_check_format(const VerilatedVar* varp, const p_vpi_value valuep, const c
         case VLVT_UINT32: return status;
         default: status = false;
         }
+    } else if (valuep->format == vpiRealVal) {
+        switch (varp->vltype()) {
+        case VLVT_REAL: return status;
+        default: status = false;
+        }
     } else if (valuep->format == vpiSuppressVal) {
         return status;
     } else {
@@ -1766,6 +1984,8 @@ void vl_get_value(const VerilatedVar* varp, void* varDatap, p_vpi_value valuep,
     static thread_local char t_outStr[VL_VALUE_STRING_MAX_WORDS * VL_EDATASIZE + 1];
     // cppcheck-suppress variableScope
     static const thread_local int t_outStrSz = sizeof(t_outStr) - 1;
+    // string data type is dynamic and may vary in size during simulation
+    static thread_local std::string t_outDynamicStr;
     // We used to presume vpiValue.format = vpiIntVal or if single bit vpiScalarVal
     // This may cause backward compatibility issues with older code.
     if (valuep->format == vpiVectorVal) {
@@ -1918,8 +2138,14 @@ void vl_get_value(const VerilatedVar* varp, void* varDatap, p_vpi_value valuep,
         return;
     } else if (valuep->format == vpiStringVal) {
         if (varp->vltype() == VLVT_STRING) {
-            valuep->value.str = reinterpret_cast<char*>(varDatap);
-            return;
+            if (varp->isParam()) {
+                valuep->value.str = reinterpret_cast<char*>(varDatap);
+                return;
+            } else {
+                t_outDynamicStr = *(reinterpret_cast<std::string*>(varDatap));
+                valuep->value.str = const_cast<char*>(t_outDynamicStr.c_str());
+                return;
+            }
         } else {
             valuep->value.str = t_outStr;
             int bytes = VL_BYTES_I(varp->packed().elements());
@@ -1954,6 +2180,9 @@ void vl_get_value(const VerilatedVar* varp, void* varDatap, p_vpi_value valuep,
             valuep->value.integer = *(reinterpret_cast<IData*>(varDatap));
             return;
         }
+    } else if (valuep->format == vpiRealVal) {
+        valuep->value.real = *(reinterpret_cast<double*>(varDatap));
+        return;
     } else if (valuep->format == vpiSuppressVal) {
         return;
     }
@@ -2171,12 +2400,17 @@ vpiHandle vpi_put_value(vpiHandle object, p_vpi_value valuep, p_vpi_time /*time_
             datap[(chars - 1) >> 1] &= vop->mask_byte((chars - 1) >> 1);
             return object;
         } else if (valuep->format == vpiStringVal) {
-            const int bytes = VL_BYTES_I(vop->varp()->packed().elements());
-            const int len = std::strlen(valuep->value.str);
-            CData* const datap = (reinterpret_cast<CData*>(vop->varDatap()));
-            for (int i = 0; i < bytes; ++i) {
-                // prepend with 0 values before placing string the least significant bytes
-                datap[i] = (i < len) ? valuep->value.str[len - i - 1] : 0;
+            if (vop->varp()->vltype() == VLVT_STRING) {
+                *(reinterpret_cast<std::string*>(vop->varDatap())) = valuep->value.str;
+                return object;
+            } else {
+                const int bytes = VL_BYTES_I(vop->varp()->packed().elements());
+                const int len = std::strlen(valuep->value.str);
+                CData* const datap = (reinterpret_cast<CData*>(vop->varDatap()));
+                for (int i = 0; i < bytes; ++i) {
+                    // prepend with 0 values before placing string the least significant bytes
+                    datap[i] = (i < len) ? valuep->value.str[len - i - 1] : 0;
+                }
             }
             return object;
         } else if (valuep->format == vpiIntVal) {
@@ -2190,6 +2424,11 @@ vpiHandle vpi_put_value(vpiHandle object, p_vpi_value valuep, p_vpi_time /*time_
                 *(reinterpret_cast<IData*>(vop->varDatap())) = vop->mask() & valuep->value.integer;
                 return object;
             }
+        } else if (valuep->format == vpiRealVal) {
+            if (vop->varp()->vltype() == VLVT_REAL) {
+                *(reinterpret_cast<double*>(vop->varDatap())) = valuep->value.real;
+                return object;
+            }
         }
         VL_VPI_ERROR_(__FILE__, __LINE__, "%s: Unsupported format (%s) as requested for %s",
                       __func__, VerilatedVpiError::strFromVpiVal(valuep->format), vop->fullname());
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 09dd075c2..3de6c9571 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -466,6 +466,8 @@ string AstVar::vlEnumType() const {
         return "VLVT_PTR";
     } else if (strtype) {
         arg += "VLVT_STRING";
+    } else if (isDouble()) {
+        arg += "VLVT_REAL";
     } else if (widthMin() <= 8) {
         arg += "VLVT_UINT8";
     } else if (widthMin() <= 16) {
diff --git a/test_regress/t/TestCheck.h b/test_regress/t/TestCheck.h
index c9b054b6c..17a25accb 100644
--- a/test_regress/t/TestCheck.h
+++ b/test_regress/t/TestCheck.h
@@ -72,6 +72,16 @@ static const bool verbose = false;
         } \
     } while (0)
 
+#define TEST_CHECK_REAL_EQ(got, exp, delta) \
+    do { \
+        if (std::fabs(got - exp) > delta) { \
+            std::cout << std::dec << "%Error: " << __FILE__ << ":" << __LINE__ << std::showpoint \
+                      << ": GOT=" << (got) << "   EXP=" << (exp) << " +/- " << (delta) \
+                      << std::endl; \
+            ++errors; \
+        } \
+    } while (0)
+
 //======================================================================
 
 #define TEST_VERBOSE_PRINTF(format, ...) \
diff --git a/test_regress/t/TestSimulator.h b/test_regress/t/TestSimulator.h
index 0f3659440..b7c1acb14 100644
--- a/test_regress/t/TestSimulator.h
+++ b/test_regress/t/TestSimulator.h
@@ -31,7 +31,7 @@ public:
         vpi_get_vlog_info(&m_info);
         if (0 == std::strcmp(m_info.product, "Verilator")) {
             m_simulators.verilator = true;
-        } else if (0 == std::strcmp(m_info.product, "Verilator")) {
+        } else if (0 == std::strcmp(m_info.product, "Icarus Verilog")) {
             m_simulators.icarus = true;
         } else if (0
                    == strncmp(m_info.product, "Chronologic Simulation VCS",
@@ -64,7 +64,7 @@ public:
     static bool has_get_scalar() { return !simulators().icarus; }
     // return test level scope
     static const char* top() {
-        if (simulators().verilator) {
+        if (simulators().verilator || simulators().icarus) {
             return "t";
         } else {
             return "top.t";
diff --git a/test_regress/t/t_vpi_var.cpp b/test_regress/t/t_vpi_var.cpp
index 0281fb367..f7db91da2 100644
--- a/test_regress/t/t_vpi_var.cpp
+++ b/test_regress/t/t_vpi_var.cpp
@@ -11,7 +11,7 @@
 
 #ifdef IS_VPI
 
-#include "vpi_user.h"
+#include "sv_vpi_user.h"
 
 #else
 
@@ -31,12 +31,14 @@
 
 #endif
 
+#include <cmath>
 #include <cstdio>
 #include <cstdlib>
 #include <cstring>
 #include <iostream>
 
 // These require the above. Comment prevents clang-format moving them
+#include "TestCheck.h"
 #include "TestSimulator.h"
 #include "TestVpi.h"
 
@@ -56,12 +58,6 @@ unsigned int callback_count_strs_max = 500;
 
 //======================================================================
 
-#ifdef TEST_VERBOSE
-bool verbose = true;
-#else
-bool verbose = false;
-#endif
-
 #define CHECK_RESULT_VH(got, exp) \
     if ((got) != (exp)) { \
         printf("%%Error: %s:%d: GOT = %p   EXP = %p\n", FILENM, __LINE__, (got), (exp)); \
@@ -379,7 +375,33 @@ int _mon_check_var() {
         CHECK_RESULT_CSTR(p, "vpiConstant");
     }
 
-    return 0;
+    // non-integer variables
+    tmpValue.format = vpiRealVal;
+    {
+        TestVpiHandle vh101 = VPI_HANDLE("real1");
+        CHECK_RESULT_NZ(vh101);
+        d = vpi_get(vpiType, vh101);
+        CHECK_RESULT(d, vpiRealVar);
+        vpi_get_value(vh101, &tmpValue);
+        TEST_CHECK_REAL_EQ(tmpValue.value.real, 1.0, 0.0005);
+        p = vpi_get_str(vpiType, vh101);
+        CHECK_RESULT_CSTR(p, "vpiRealVar");
+    }
+
+    // string variable
+    tmpValue.format = vpiStringVal;
+    {
+        TestVpiHandle vh101 = VPI_HANDLE("str1");
+        CHECK_RESULT_NZ(vh101);
+        d = vpi_get(vpiType, vh101);
+        CHECK_RESULT(d, vpiStringVar);
+        vpi_get_value(vh101, &tmpValue);
+        CHECK_RESULT_CSTR(tmpValue.value.str, "hello");
+        p = vpi_get_str(vpiType, vh101);
+        CHECK_RESULT_CSTR(p, "vpiStringVar");
+    }
+
+    return errors;
 }
 
 int _mon_check_varlist() {
@@ -443,7 +465,33 @@ int _mon_check_getput() {
     vpi_get_value(vh2, &v);
     CHECK_RESULT(v.value.integer, 1);
 
-    return 0;
+    // real
+    TestVpiHandle vh3 = VPI_HANDLE("real1");
+    CHECK_RESULT_NZ(vh3);
+    v.format = vpiRealVal;
+    vpi_get_value(vh3, &v);
+    TEST_CHECK_REAL_EQ(v.value.real, 1.0, 0.0005);
+
+    v.value.real = 123456.789;
+    vpi_put_value(vh3, &v, &t, vpiNoDelay);
+    v.value.real = 0.0f;
+    vpi_get_value(vh3, &v);
+    TEST_CHECK_REAL_EQ(v.value.real, 123456.789, 0.0005);
+
+    // string
+    TestVpiHandle vh4 = VPI_HANDLE("str1");
+    CHECK_RESULT_NZ(vh4);
+    v.format = vpiStringVal;
+    vpi_get_value(vh4, &v);
+    CHECK_RESULT_CSTR(v.value.str, "hello");
+
+    v.value.str = const_cast<char*>("something a lot longer than hello");
+    vpi_put_value(vh4, &v, &t, vpiNoDelay);
+    v.value.str = 0;
+    vpi_get_value(vh4, &v);
+    TEST_CHECK_CSTR(v.value.str, "something a lot longer than hello");
+
+    return errors;
 }
 
 int _mon_check_var_long_name() {
diff --git a/test_regress/t/t_vpi_var.v b/test_regress/t/t_vpi_var.v
index 80188af11..495abb1f5 100644
--- a/test_regress/t/t_vpi_var.v
+++ b/test_regress/t/t_vpi_var.v
@@ -45,6 +45,9 @@ extern "C" int mon_check();
 
    integer        status;
 
+   real           real1          /*verilator public_flat_rw */;
+   string         str1           /*verilator public_flat_rw */;
+
    sub sub();
 
    // Test loop
@@ -57,6 +60,10 @@ extern "C" int mon_check();
       text_word = "Word";
       text_long = "Long64b";
       text = "Verilog Test module";
+
+      real1 = 1.0;
+      str1 = "hello";
+
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
@@ -79,6 +86,8 @@ extern "C" int mon_check();
       if (text_word != "Tree") $stop;
       if (text_long != "44Four44") $stop;
       if (text != "lorem ipsum") $stop;
+      if (str1 != "something a lot longer than hello") $stop;
+      if (real1 > 123456.7895 || real1 < 123456.7885 ) $stop;
    end
 
    always @(posedge clk) begin
diff --git a/test_regress/t/t_vpi_var2.v b/test_regress/t/t_vpi_var2.v
index dc04a1c7f..6726f7a9b 100644
--- a/test_regress/t/t_vpi_var2.v
+++ b/test_regress/t/t_vpi_var2.v
@@ -60,6 +60,11 @@ extern "C" int mon_check();
 /*verilator public_off*/
    integer        status;
 
+/*verilator public_flat_rw_on*/
+   real           real1;
+   string         str1;
+/*verilator public_off*/
+
    sub sub();
 
    // Test loop
@@ -72,6 +77,10 @@ extern "C" int mon_check();
       text_word = "Word";
       text_long = "Long64b";
       text = "Verilog Test module";
+
+      real1 = 1.0;
+      str1 = "hello";
+
 `ifdef VERILATOR
       status = $c32("mon_check()");
 `endif
@@ -94,6 +103,8 @@ extern "C" int mon_check();
       if (text_word != "Tree") $stop;
       if (text_long != "44Four44") $stop;
       if (text != "lorem ipsum") $stop;
+      if (str1 != "something a lot longer than hello") $stop;
+      if (real1 > 123456.7895 || real1 < 123456.7885 ) $stop;
    end
 
    always @(posedge clk) begin

From f91259f46d33f972a5b9df3ef1b971fe15b4b9aa Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Krzysztof=20Boro=C5=84ski?=
 <94375110+kboronski-ant@users.noreply.github.com>
Date: Wed, 25 Oct 2023 17:41:28 +0200
Subject: [PATCH 131/157] Fix insertion at queue's end (#4619)

Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
Co-authored-by: Wilson Snyder <wsnyder@wsnyder.org>
---
 include/verilated_types.h               |  2 +-
 test_regress/t/t_queue_insert_at_end.pl | 21 +++++++++++++++++++++
 test_regress/t/t_queue_insert_at_end.v  | 23 +++++++++++++++++++++++
 3 files changed, 45 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_queue_insert_at_end.pl
 create mode 100644 test_regress/t/t_queue_insert_at_end.v

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 4dd4505d4..0f9ea4a02 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -545,7 +545,7 @@ public:
 
     // function void q.insert(index, value);
     void insert(int32_t index, const T_Value& value) {
-        if (VL_UNLIKELY(index < 0 || index >= m_deque.size())) return;
+        if (VL_UNLIKELY(index < 0 || index > m_deque.size())) return;
         m_deque.insert(m_deque.begin() + index, value);
     }
 
diff --git a/test_regress/t/t_queue_insert_at_end.pl b/test_regress/t/t_queue_insert_at_end.pl
new file mode 100755
index 000000000..859050d63
--- /dev/null
+++ b/test_regress/t/t_queue_insert_at_end.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_queue_insert_at_end.v b/test_regress/t/t_queue_insert_at_end.v
new file mode 100644
index 000000000..6ed3c006f
--- /dev/null
+++ b/test_regress/t/t_queue_insert_at_end.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+module t();
+  initial begin
+    int queue[$];
+
+    queue.insert(0, 0);
+    if (queue.size() != 1) $stop;
+
+    queue.insert(1, 1);
+    if (queue.size() != 2) $stop;
+
+    if (queue[0] != 0) $stop;
+    if (queue[1] != 1) $stop;
+
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
+endmodule

From 34708bbba100d7006dcfe1da5e8af7881f7ac095 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Wed, 25 Oct 2023 16:50:22 +0100
Subject: [PATCH 132/157] Respect --dump-tree-addrids in tree dumps

---
 src/V3AstNodes.cpp | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 3de6c9571..5545aa324 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1455,7 +1455,7 @@ const char* AstCell::broken() const {
 void AstCellInline::dump(std::ostream& str) const {
     this->AstNode::dump(str);
     str << " -> " << origModName();
-    str << " [scopep=" << reinterpret_cast<const void*>(scopep()) << "]";
+    str << " [scopep=" << nodeAddr(scopep()) << "]";
 }
 const char* AstCellInline::broken() const {
     BROKEN_RTN(m_scopep && !m_scopep->brokeExists());
@@ -1624,7 +1624,7 @@ void AstInitArray::dump(std::ostream& str) const {
             str << " ...";
             break;
         }
-        str << " [" << itr.first << "]=" << reinterpret_cast<const void*>(itr.second);
+        str << " [" << itr.first << "]=" << nodeAddr(itr.second);
     }
 }
 const char* AstInitArray::broken() const {
@@ -2038,7 +2038,7 @@ void AstTypeTable::dump(std::ostream& str) const {
 }
 void AstAssocArrayDType::dumpSmall(std::ostream& str) const {
     this->AstNodeDType::dumpSmall(str);
-    str << "[assoc-" << reinterpret_cast<const void*>(keyDTypep()) << "]";
+    str << "[assoc-" << nodeAddr(keyDTypep()) << "]";
 }
 string AstAssocArrayDType::prettyDTypeName() const {
     return subDTypep()->prettyDTypeName() + "[" + keyDTypep()->prettyDTypeName() + "]";
@@ -2106,7 +2106,7 @@ void AstStreamDType::dumpSmall(std::ostream& str) const {
 void AstVarScope::dump(std::ostream& str) const {
     this->AstNode::dump(str);
     if (isTrace()) str << " [T]";
-    if (scopep()) str << " [scopep=" << reinterpret_cast<const void*>(scopep()) << "]";
+    if (scopep()) str << " [scopep=" << nodeAddr(scopep()) << "]";
     if (varp()) {
         str << " -> ";
         varp()->dump(str);
@@ -2195,9 +2195,9 @@ bool AstVar::same(const AstNode* samep) const {
 }
 void AstScope::dump(std::ostream& str) const {
     this->AstNode::dump(str);
-    str << " [abovep=" << reinterpret_cast<const void*>(aboveScopep()) << "]";
-    str << " [cellp=" << reinterpret_cast<const void*>(aboveCellp()) << "]";
-    str << " [modp=" << reinterpret_cast<const void*>(modp()) << "]";
+    str << " [abovep=" << nodeAddr(aboveScopep()) << "]";
+    str << " [cellp=" << nodeAddr(aboveCellp()) << "]";
+    str << " [modp=" << nodeAddr(modp()) << "]";
 }
 bool AstScope::same(const AstNode* samep) const {
     const AstScope* const asamep = VN_DBG_AS(samep, Scope);

From a87fb576564f0a1223b88e541ceb33344e6aba60 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Krzysztof=20Boro=C5=84ski?=
 <94375110+kboronski-ant@users.noreply.github.com>
Date: Thu, 26 Oct 2023 16:38:47 +0200
Subject: [PATCH 133/157] Allow assigning events (#4403)

Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
---
 include/verilated_fst_c.cpp              |  2 +-
 include/verilated_fst_c.h                |  2 +-
 include/verilated_trace.h                |  8 +--
 include/verilated_trace_imp.h            |  4 +-
 include/verilated_types.h                | 56 ++++++++++++++++---
 include/verilated_vcd_c.cpp              |  4 +-
 include/verilated_vcd_c.h                |  2 +-
 src/V3Ast.h                              |  3 +-
 src/V3AstInlines.h                       |  4 ++
 src/V3AstNodes.cpp                       |  2 +-
 src/V3Cast.cpp                           |  2 +-
 src/V3EmitCImp.cpp                       |  1 +
 src/V3EmitCSyms.cpp                      | 26 +++++++--
 src/V3Error.h                            |  4 +-
 src/V3Global.h                           |  3 ++
 src/V3Width.cpp                          | 56 ++++++++++++++++---
 src/verilog.y                            |  4 +-
 test_regress/t/t_event_control_assign.pl | 25 +++++++++
 test_regress/t/t_event_control_assign.v  | 68 ++++++++++++++++++++++++
 test_regress/t/t_event_control_pass.pl   | 24 +++++++++
 test_regress/t/t_event_control_pass.v    | 51 ++++++++++++++++++
 test_regress/t/t_event_copy.out          | 14 ++++-
 test_regress/t/t_event_copy.pl           |  1 +
 test_regress/t/t_uvm_pkg_todo.vh         |  8 +--
 24 files changed, 331 insertions(+), 43 deletions(-)
 create mode 100755 test_regress/t/t_event_control_assign.pl
 create mode 100644 test_regress/t/t_event_control_assign.v
 create mode 100755 test_regress/t/t_event_control_pass.pl
 create mode 100644 test_regress/t/t_event_control_pass.v

diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp
index 5e29ee806..5dc3a2b11 100644
--- a/include/verilated_fst_c.cpp
+++ b/include/verilated_fst_c.cpp
@@ -293,7 +293,7 @@ void VerilatedFst::configure(const VerilatedTraceConfig& config) {
 // so always inline them.
 
 VL_ATTR_ALWINLINE
-void VerilatedFstBuffer::emitEvent(uint32_t code, VlEvent newval) {
+void VerilatedFstBuffer::emitEvent(uint32_t code, const VlEventBase* newval) {
     VL_DEBUG_IFDEF(assert(m_symbolp[code]););
     fstWriterEmitValueChange(m_fst, m_symbolp[code], "1");
 }
diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h
index c4a65cfb2..0331ca5e9 100644
--- a/include/verilated_fst_c.h
+++ b/include/verilated_fst_c.h
@@ -177,7 +177,7 @@ class VerilatedFstBuffer VL_NOT_FINAL {
 
     // Implementations of duck-typed methods for VerilatedTraceBuffer. These are
     // called from only one place (the full* methods), so always inline them.
-    VL_ATTR_ALWINLINE void emitEvent(uint32_t code, VlEvent newval);
+    VL_ATTR_ALWINLINE void emitEvent(uint32_t code, const VlEventBase* newval);
     VL_ATTR_ALWINLINE void emitBit(uint32_t code, CData newval);
     VL_ATTR_ALWINLINE void emitCData(uint32_t code, CData newval, int bits);
     VL_ATTR_ALWINLINE void emitSData(uint32_t code, SData newval, int bits);
diff --git a/include/verilated_trace.h b/include/verilated_trace.h
index f810db099..d9af41174 100644
--- a/include/verilated_trace.h
+++ b/include/verilated_trace.h
@@ -475,7 +475,7 @@ public:
     void fullQData(uint32_t* oldp, QData newval, int bits);
     void fullWData(uint32_t* oldp, const WData* newvalp, int bits);
     void fullDouble(uint32_t* oldp, double newval);
-    void fullEvent(uint32_t* oldp, VlEvent newval);
+    void fullEvent(uint32_t* oldp, const VlEventBase* newval);
 
     // In non-offload mode, these are called directly by the trace callbacks,
     // and are called chg*. In offload mode, they are called by the worker
@@ -512,7 +512,9 @@ public:
             }
         }
     }
-    VL_ATTR_ALWINLINE void chgEvent(uint32_t* oldp, VlEvent newval) { fullEvent(oldp, newval); }
+    VL_ATTR_ALWINLINE void chgEvent(uint32_t* oldp, const VlEventBase* newval) {
+        fullEvent(oldp, newval);
+    }
     VL_ATTR_ALWINLINE void chgDouble(uint32_t* oldp, double newval) {
         double old;
         std::memcpy(&old, oldp, sizeof(old));
@@ -591,7 +593,7 @@ public:
         m_offloadBufferWritep += 4;
         VL_DEBUG_IF(assert(m_offloadBufferWritep <= m_offloadBufferEndp););
     }
-    void chgEvent(uint32_t code, VlEvent newval) {
+    void chgEvent(uint32_t code, const VlEventBase* newval) {
         m_offloadBufferWritep[0] = VerilatedTraceOffloadCommand::CHG_EVENT;
         m_offloadBufferWritep[1] = code;
         m_offloadBufferWritep += 2;
diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index 19dc1cb56..62516432f 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -185,7 +185,7 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::offloadWorkerThreadMain() {
                 continue;
             case VerilatedTraceOffloadCommand::CHG_EVENT:
                 VL_TRACE_OFFLOAD_DEBUG("Command CHG_EVENT " << top);
-                traceBufp->chgEvent(oldp, *reinterpret_cast<const VlEvent*>(readp));
+                traceBufp->chgEvent(oldp, reinterpret_cast<const VlEventBase*>(readp));
                 continue;
 
                 //===
@@ -846,7 +846,7 @@ void VerilatedTraceBuffer<VL_BUF_T>::fullBit(uint32_t* oldp, CData newval) {
 }
 
 template <>
-void VerilatedTraceBuffer<VL_BUF_T>::fullEvent(uint32_t* oldp, VlEvent newval) {
+void VerilatedTraceBuffer<VL_BUF_T>::fullEvent(uint32_t* oldp, const VlEventBase* newval) {
     const uint32_t code = oldp - m_sigs_oldvalp;
     *oldp = 1;  // Do we really store an "event" ?
     emitEvent(code, newval);
diff --git a/include/verilated_types.h b/include/verilated_types.h
index 0f9ea4a02..0a92725a9 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -33,6 +33,7 @@
 #include <atomic>
 #include <deque>
 #include <map>
+#include <memory>
 #include <set>
 #include <string>
 #include <unordered_set>
@@ -191,7 +192,18 @@ public:
 //===================================================================
 // SystemVerilog event type
 
-class VlEvent final {
+class VlEventBase VL_NOT_FINAL {
+public:
+    virtual ~VlEventBase() = default;
+
+    virtual void fire() = 0;
+    virtual bool isFired() const = 0;
+    virtual bool isTriggered() const = 0;
+    virtual void clearFired() = 0;
+    virtual void clearTriggered() = 0;
+};
+
+class VlEvent final : public VlEventBase {
     // MEMBERS
     bool m_fired = false;  // Fired on this scheduling iteration
     bool m_triggered = false;  // Triggered state of event persisting until next time step
@@ -199,20 +211,50 @@ class VlEvent final {
 public:
     // CONSTRUCTOR
     VlEvent() = default;
-    ~VlEvent() = default;
+    ~VlEvent() override = default;
 
+    friend std::string VL_TO_STRING(const VlEvent& e);
+    friend class VlAssignableEvent;
     // METHODS
-    void fire() { m_fired = m_triggered = true; }
-    bool isFired() const { return m_fired; }
-    bool isTriggered() const { return m_triggered; }
-    void clearFired() { m_fired = false; }
-    void clearTriggered() { m_triggered = false; }
+    void fire() override { m_fired = m_triggered = true; }
+    bool isFired() const override { return m_fired; }
+    bool isTriggered() const override { return m_triggered; }
+    void clearFired() override { m_fired = false; }
+    void clearTriggered() override { m_triggered = false; }
 };
 
+class VlAssignableEvent final : public std::shared_ptr<VlEvent>, public VlEventBase {
+public:
+    // Constructor
+    VlAssignableEvent()
+        : std::shared_ptr<VlEvent>(new VlEvent) {}
+    ~VlAssignableEvent() override = default;
+
+    // METHODS
+    void fire() override { (*this)->m_fired = (*this)->m_triggered = true; }
+    bool isFired() const override { return (*this)->m_fired; }
+    bool isTriggered() const override { return (*this)->m_triggered; }
+    void clearFired() override { (*this)->m_fired = false; }
+    void clearTriggered() override { (*this)->m_triggered = false; }
+};
+
+inline std::string VL_TO_STRING(const VlEventBase& e);
+
 inline std::string VL_TO_STRING(const VlEvent& e) {
     return std::string{"triggered="} + (e.isTriggered() ? "true" : "false");
 }
 
+inline std::string VL_TO_STRING(const VlAssignableEvent& e) {
+    return "&{ " + VL_TO_STRING(*e) + " }";
+}
+
+inline std::string VL_TO_STRING(const VlEventBase& e) {
+    if (const VlAssignableEvent& assignable = dynamic_cast<const VlAssignableEvent&>(e)) {
+        return VL_TO_STRING(assignable);
+    }
+    return std::string{"triggered="} + (e.isTriggered() ? "true" : "false");
+}
+
 //===================================================================
 // Random
 
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index 8ac37eb1b..e96840b2e 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -574,8 +574,8 @@ void VerilatedVcdBuffer::finishLine(uint32_t code, char* writep) {
 // so always inline them.
 
 VL_ATTR_ALWINLINE
-void VerilatedVcdBuffer::emitEvent(uint32_t code, VlEvent newval) {
-    const bool triggered = newval.isTriggered();
+void VerilatedVcdBuffer::emitEvent(uint32_t code, const VlEventBase* newval) {
+    const bool triggered = newval->isTriggered();
     // TODO : It seems that untriggered events are not filtered
     // should be tested before this last step
     if (triggered) {
diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h
index 67b077364..a81bae28a 100644
--- a/include/verilated_vcd_c.h
+++ b/include/verilated_vcd_c.h
@@ -214,7 +214,7 @@ class VerilatedVcdBuffer VL_NOT_FINAL {
     // Implementation of VerilatedTraceBuffer interface
     // Implementations of duck-typed methods for VerilatedTraceBuffer. These are
     // called from only one place (the full* methods), so always inline them.
-    VL_ATTR_ALWINLINE void emitEvent(uint32_t code, VlEvent newval);
+    VL_ATTR_ALWINLINE void emitEvent(uint32_t code, const VlEventBase* newval);
     VL_ATTR_ALWINLINE void emitBit(uint32_t code, CData newval);
     VL_ATTR_ALWINLINE void emitCData(uint32_t code, CData newval, int bits);
     VL_ATTR_ALWINLINE void emitSData(uint32_t code, SData newval, int bits);
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 75cd1e151..3adf9580b 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -324,7 +324,7 @@ public:
         ET_BOTHEDGE,  // POSEDGE | NEGEDGE (i.e.: 'edge' in Verilog)
         ET_POSEDGE,
         ET_NEGEDGE,
-        ET_EVENT,  // VlEvent::isFired
+        ET_EVENT,  // VlEventBase::isFired
         // Involving an expression
         ET_TRUE,
         //
@@ -2016,6 +2016,7 @@ public:
     inline bool isDouble() const VL_MT_STABLE;
     inline bool isSigned() const VL_MT_STABLE;
     inline bool isString() const VL_MT_STABLE;
+    inline bool isEvent() const VL_MT_STABLE;
 
     // clang-format off
     VNUser user1u() const VL_MT_STABLE {
diff --git a/src/V3AstInlines.h b/src/V3AstInlines.h
index 3c40963b2..f47aa7be8 100644
--- a/src/V3AstInlines.h
+++ b/src/V3AstInlines.h
@@ -39,6 +39,10 @@ bool AstNode::isDouble() const VL_MT_STABLE {
 bool AstNode::isString() const VL_MT_STABLE {
     return dtypep() && dtypep()->basicp() && dtypep()->basicp()->isString();
 }
+bool AstNode::isEvent() const VL_MT_STABLE {
+    return dtypep() && dtypep()->basicp() && dtypep()->basicp()->isEvent();
+}
+
 bool AstNode::isSigned() const VL_MT_STABLE { return dtypep() && dtypep()->isSigned(); }
 
 bool AstNode::isClassHandleValue() const {
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 5545aa324..3ab69db0f 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -829,7 +829,7 @@ AstNodeDType::CTypeRecursed AstNodeDType::cTypeRecurse(bool compound) const {
         } else if (bdtypep->isProcessRef()) {
             info.m_type = "VlProcessRef";
         } else if (bdtypep->isEvent()) {
-            info.m_type = "VlEvent";
+            info.m_type = v3Global.assignsEvents() ? "VlAssignableEvent" : "VlEvent";
         } else if (dtypep->widthMin() <= 8) {  // Handle unpacked arrays; not bdtypep->width
             info.m_type = "CData" + bitvec;
         } else if (dtypep->widthMin() <= 16) {
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 871ba5b16..c8181a118 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -190,7 +190,7 @@ private:
             && !VN_IS(backp, ArraySel) && !VN_IS(backp, StructSel) && !VN_IS(backp, RedXor)
             && (nodep->varp()->basicp() && !nodep->varp()->basicp()->isTriggerVec()
                 && !nodep->varp()->basicp()->isForkSync()
-                && !nodep->varp()->basicp()->isProcessRef())
+                && !nodep->varp()->basicp()->isProcessRef() && !nodep->varp()->basicp()->isEvent())
             && backp->width() && castSize(nodep) != castSize(nodep->varp())) {
             // Cast vars to IData first, else below has upper bits wrongly set
             //  CData x=3; out = (QData)(x<<30);
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index ea1ee4f7f..678cef81c 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -781,6 +781,7 @@ class EmitCTrace final : EmitCFunc {
     void emitTraceValue(AstTraceInc* nodep, int arrayindex) {
         if (AstVarRef* const varrefp = VN_CAST(nodep->valuep(), VarRef)) {
             AstVar* const varp = varrefp->varp();
+            if (varp->isEvent()) { puts("&"); }
             puts("(");
             if (emitTraceIsScBigUint(nodep)) {
                 puts("(uint32_t*)");
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 85ccaae23..93d027a42 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -460,7 +460,13 @@ void EmitCSyms::emitSymHdr() {
         puts("uint32_t __Vm_baseCode = 0;"
              "  ///< Used by trace routines when tracing multiple models\n");
     }
-    if (v3Global.hasEvents()) puts("std::vector<VlEvent*> __Vm_triggeredEvents;\n");
+    if (v3Global.hasEvents()) {
+        if (v3Global.assignsEvents()) {
+            puts("std::vector<VlAssignableEvent> __Vm_triggeredEvents;\n");
+        } else {
+            puts("std::vector<VlEvent*> __Vm_triggeredEvents;\n");
+        }
+    }
     if (v3Global.hasClasses()) puts("VlDeleter __Vm_deleter;\n");
     puts("bool __Vm_didInit = false;\n");
 
@@ -528,17 +534,29 @@ void EmitCSyms::emitSymHdr() {
     puts("const char* name() { return TOP.name(); }\n");
 
     if (v3Global.hasEvents()) {
-        puts("void enqueueTriggeredEventForClearing(VlEvent& event) {\n");
+        if (v3Global.assignsEvents()) {
+            puts("void enqueueTriggeredEventForClearing(VlAssignableEvent& event) {\n");
+        } else {
+            puts("void enqueueTriggeredEventForClearing(VlEvent& event) {\n");
+        }
         puts("#ifdef VL_DEBUG\n");
         puts("if (VL_UNLIKELY(!event.isTriggered())) {\n");
         puts("VL_FATAL_MT(__FILE__, __LINE__, __FILE__, \"event passed to "
              "'enqueueTriggeredEventForClearing' was not triggered\");\n");
         puts("}\n");
         puts("#endif\n");
-        puts("__Vm_triggeredEvents.push_back(&event);\n");
+        if (v3Global.assignsEvents()) {
+            puts("__Vm_triggeredEvents.push_back(event);\n");
+        } else {
+            puts("__Vm_triggeredEvents.push_back(&event);\n");
+        }
         puts("}\n");
         puts("void clearTriggeredEvents() {\n");
-        puts("for (const auto eventp : __Vm_triggeredEvents) eventp->clearTriggered();\n");
+        if (v3Global.assignsEvents()) {
+            puts("for (auto& event : __Vm_triggeredEvents) event.clearTriggered();\n");
+        } else {
+            puts("for (const auto eventp : __Vm_triggeredEvents) eventp->clearTriggered();\n");
+        }
         puts("__Vm_triggeredEvents.clear();\n");
         puts("}\n");
     }
diff --git a/src/V3Error.h b/src/V3Error.h
index 3513c3902..acebf7e6b 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -195,8 +195,8 @@ public:
             "CASEINCOMPLETE", "CASEOVERLAP", "CASEWITHX", "CASEX", "CASTCONST", "CDCRSTLOGIC", "CLKDATA",
             "CMPCONST", "COLONPLUS", "COMBDLY", "CONSTRAINTIGN", "CONTASSREG",
             "DECLFILENAME", "DEFPARAM", "DEPRECATED",
-            "ENCAPSULATED", "ENDLABEL", "ENUMVALUE", "EOFNEWLINE", "GENCLK", "GENUNNAMED",
-            "HIERBLOCK",
+            "ENCAPSULATED", "ENDLABEL", "ENUMVALUE", "EOFNEWLINE", "GENCLK",
+            "GENUNNAMED", "HIERBLOCK",
             "IFDEPTH", "IGNOREDRETURN",
             "IMPERFECTSCH", "IMPLICIT", "IMPLICITSTATIC", "IMPORTSTAR", "IMPURE",
             "INCABSPATH", "INFINITELOOP", "INITIALDLY", "INSECURE",
diff --git a/src/V3Global.h b/src/V3Global.h
index 126392ad9..036a5515e 100644
--- a/src/V3Global.h
+++ b/src/V3Global.h
@@ -105,6 +105,7 @@ class V3Global final {
     std::atomic_int m_debugFileNumber{0};  // Number to append to debug files created
     bool m_assertDTypesResolved = false;  // Tree should have dtypep()'s
     bool m_assertScoped = false;  // Tree is scoped
+    bool m_assignsEvents = false;  // Design uses assignments on SystemVerilog Events
     bool m_constRemoveXs = false;  // Const needs to strip any Xs
     // Experimenting with always requiring heavy, see issue #2701
     bool m_needTraceDumper = false;  // Need __Vm_dumperp in symbols
@@ -155,6 +156,8 @@ public:
     void needTraceDumper(bool flag) { m_needTraceDumper = flag; }
     bool dpi() const VL_MT_SAFE { return m_dpi; }
     void dpi(bool flag) { m_dpi = flag; }
+    bool assignsEvents() const { return m_assignsEvents; }
+    void setAssignsEvents() { m_assignsEvents = true; }
     bool hasEvents() const { return m_hasEvents; }
     void setHasEvents() { m_hasEvents = true; }
     bool hasClasses() const { return m_hasClasses; }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 30407d90d..57804cfb5 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -68,6 +68,8 @@
 #include "V3Width.h"
 
 #include "V3Const.h"
+#include "V3Error.h"
+#include "V3Global.h"
 #include "V3MemberMap.h"
 #include "V3Number.h"
 #include "V3Randomize.h"
@@ -4319,6 +4321,47 @@ private:
         return valuep;
     }
 
+    static void checkEventAssignement(const AstNodeAssign* const asgnp) {
+        string unsupEvtAsgn;
+        if (!usesDynamicScheduler(asgnp->lhsp())) unsupEvtAsgn = "to";
+        if (asgnp->rhsp()->dtypep()->isEvent() && !usesDynamicScheduler(asgnp->rhsp())) {
+            unsupEvtAsgn += (unsupEvtAsgn.empty() ? "from" : " and from");
+        }
+        if (!unsupEvtAsgn.empty()) {
+            asgnp->v3warn(E_UNSUPPORTED, "Assignement "
+                                             << unsupEvtAsgn
+                                             << " event in statically scheduled context.\n"
+                                             << asgnp->warnMore()
+                                             << "Static event "
+                                                "scheduling won't be able to handle this.\n"
+                                             << asgnp->warnMore()
+                                             << "... Suggest move the event into a "
+                                                "completely dynamic context, eg. a class,  and "
+                                                "reference it only from such context.");
+        }
+    }
+
+    static bool usesDynamicScheduler(AstNode* nodep) {
+        UASSERT_OBJ(nodep->dtypep()->isEvent(), nodep, "Node does not have an event dtype");
+
+        AstVarRef* vrefp;
+        while (true) {
+            vrefp = VN_CAST(nodep, VarRef);
+            if (vrefp) return usesDynamicScheduler(vrefp);
+            if (VN_IS(nodep, MemberSel)) {
+                return true;
+            } else if (AstNodeSel* selp = VN_CAST(nodep, NodeSel)) {
+                nodep = selp->fromp();
+            } else {
+                return false;
+            }
+        }
+    }
+
+    static bool usesDynamicScheduler(AstVarRef* vrefp) {
+        return VN_IS(vrefp->classOrPackagep(), Class) || vrefp->varp()->isFuncLocal();
+    }
+
     void visit(AstPatMember* nodep) override {
         AstNodeDType* const vdtypep = m_vup->dtypeNullp();
         UASSERT_OBJ(vdtypep, nodep, "Pattern member type not assigned by AstPattern visitor");
@@ -4713,12 +4756,6 @@ private:
             iterateCheckAssign(nodep, "Assign RHS", nodep->rhsp(), FINAL, lhsDTypep);
             // if (debug()) nodep->dumpTree("-  AssignOut: ");
         }
-        if (const AstBasicDType* const basicp = nodep->rhsp()->dtypep()->basicp()) {
-            if (basicp->isEvent()) {
-                // see t_event_copy.v for commentary on the mess involved
-                nodep->v3warn(E_UNSUPPORTED, "Unsupported: assignment of event data type");
-            }
-        }
         if (auto* const controlp = nodep->timingControlp()) {
             if (VN_IS(m_ftaskp, Func)) {
                 controlp->v3error("Timing controls are not legal in functions. Suggest use a task "
@@ -4773,7 +4810,12 @@ private:
             newp->dtypeSetVoid();
             nodep->replaceWith(newp->makeStmt());
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
-            // return;
+            return;
+        }
+
+        if (nodep->hasDType() && nodep->dtypep()->isEvent()) {
+            checkEventAssignement(nodep);
+            v3Global.setAssignsEvents();
         }
     }
 
diff --git a/src/verilog.y b/src/verilog.y
index 3d553f667..78c40b5c2 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -3586,9 +3586,9 @@ statement_item<nodep>:          // IEEE: statement_item
         |       yDISABLE idAny '.' idDotted ';'
                         { $$ = nullptr; BBUNSUP($4, "Unsupported: disable with '.'"); }
         //                      // IEEE: event_trigger
-        |       yP_MINUSGT idDotted/*hierarchical_identifier-event*/ ';'
+        |       yP_MINUSGT expr ';'
                         { $$ = new AstFireEvent{$1, $2, false}; }
-        |       yP_MINUSGTGT delay_or_event_controlE idDotted/*hierarchical_identifier-event*/ ';'
+        |       yP_MINUSGTGT delay_or_event_controlE expr ';'
                         { $$ = new AstFireEvent{$1, $3, true}; }
         //
         //                      // IEEE: loop_statement
diff --git a/test_regress/t/t_event_control_assign.pl b/test_regress/t/t_event_control_assign.pl
new file mode 100755
index 000000000..06ac175ad
--- /dev/null
+++ b/test_regress/t/t_event_control_assign.pl
@@ -0,0 +1,25 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    # Multithreading would cause a warning on event assignments
+    threads => 1,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_event_control_assign.v b/test_regress/t/t_event_control_assign.v
new file mode 100644
index 000000000..980bd9ef8
--- /dev/null
+++ b/test_regress/t/t_event_control_assign.v
@@ -0,0 +1,68 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+
+int evt_recv_cnt;
+int new_evt_recv_cnt;
+
+module t();
+
+  class Foo;
+    event evt1;
+
+    task automatic send_evt();
+      fork
+        #10 begin ->evt1; end
+        begin
+          event new_event;
+          #20;
+          // This should cause an event merge but for now we don't support that.
+          evt1 = new_event;
+        end
+        #30 begin
+          @evt1 $display("Received a new event");
+          new_evt_recv_cnt++;
+        end
+      join_none
+    endtask
+
+    task wait_for_event();
+      fork begin
+        @evt1 $display("Received evt1");
+        evt_recv_cnt++;
+      end join_none
+    endtask
+
+  endclass
+
+  initial begin
+    Foo foo1;
+    foo1 = new;
+
+    evt_recv_cnt = 0;
+    new_evt_recv_cnt = 0;
+
+    for (int i = 0; i < 4; i++) begin
+      foo1.wait_for_event();
+      #10;
+      foo1.send_evt();
+      #90;
+      $display("- end of iteration -");
+      if (evt_recv_cnt != i + 1)
+        $stop;
+      if (new_evt_recv_cnt != i)
+        $stop;
+    end
+
+    if (evt_recv_cnt != 4)
+      $stop;
+    if (new_evt_recv_cnt != 3)
+      $stop;
+
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
+endmodule
diff --git a/test_regress/t/t_event_control_pass.pl b/test_regress/t/t_event_control_pass.pl
new file mode 100755
index 000000000..2f8329791
--- /dev/null
+++ b/test_regress/t/t_event_control_pass.pl
@@ -0,0 +1,24 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2023 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    verilator_flags2 => ["--exe --main --timing"],
+    make_main => 0,
+    threads => 1,
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_event_control_pass.v b/test_regress/t/t_event_control_pass.v
new file mode 100644
index 000000000..5304a829b
--- /dev/null
+++ b/test_regress/t/t_event_control_pass.v
@@ -0,0 +1,51 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+class Bar;
+  event evt;
+
+  task automatic wait_for_event();
+    @evt;
+  endtask
+
+  function automatic event get_event();
+    return evt;
+  endfunction
+endclass
+
+class Foo;
+  task automatic send_event(Bar b);
+    ->b.get_event();
+  endtask
+endclass
+
+bit got_event;
+
+module t();
+
+  initial begin
+    Bar bar;
+    Foo foo;
+    foo = new;
+    bar = new;
+    got_event = 0;
+
+    fork
+      begin
+        bar.wait_for_event();
+        $display("Got the event!");
+        got_event = 1;
+      end
+      #10 foo.send_event(bar);
+    join
+
+    #99;
+    if (!got_event)
+      $stop;
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
+endmodule
diff --git a/test_regress/t/t_event_copy.out b/test_regress/t/t_event_copy.out
index 6be6494fe..8784c2883 100644
--- a/test_regress/t/t_event_copy.out
+++ b/test_regress/t/t_event_copy.out
@@ -1,10 +1,20 @@
-%Error-UNSUPPORTED: t/t_event_copy.v:100:13: Unsupported: assignment of event data type
+%Error-UNSUPPORTED: t/t_event_copy.v:100:13: Assignement to and from event in statically scheduled context.
                                            : ... note: In instance 't'
+                                           : Static event scheduling won't be able to handle this.
+                                           : ... Suggest move the event into a completely dynamic context, eg. a class,  and reference it only from such context.
   100 |          e4 = e3;   
       |             ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error-UNSUPPORTED: t/t_event_copy.v:101:13: Unsupported: assignment of event data type
+%Error-UNSUPPORTED: t/t_event_copy.v:101:13: Assignement to and from event in statically scheduled context.
                                            : ... note: In instance 't'
+                                           : Static event scheduling won't be able to handle this.
+                                           : ... Suggest move the event into a completely dynamic context, eg. a class,  and reference it only from such context.
   101 |          e3 = e2;   
       |             ^
+%Error-UNSUPPORTED: t/t_event_copy.v:128:13: Assignement to event in statically scheduled context.
+                                           : ... note: In instance 't'
+                                           : Static event scheduling won't be able to handle this.
+                                           : ... Suggest move the event into a completely dynamic context, eg. a class,  and reference it only from such context.
+  128 |          e3 = null;
+      |             ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_event_copy.pl b/test_regress/t/t_event_copy.pl
index be66c40e6..bce8f74ca 100755
--- a/test_regress/t/t_event_copy.pl
+++ b/test_regress/t/t_event_copy.pl
@@ -13,6 +13,7 @@ scenarios(simulator => 1);
 compile(
     fails => $Self->{vlt_all},
     expect_filename => $Self->{golden_filename},
+    threads => 1,
     );
 
 execute(
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index edaf36b07..a2a4c6ff7 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -7524,9 +7524,7 @@ virtual class uvm_event_base extends uvm_object;
                 event e;
                 if (wakeup)
                         ->m_event;
-//TODO issue #4468 - Fix UVM assignment of event data types
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:7477:25: Unsupported: assignment of event data type
-//TODO                m_event = e;
+                m_event = e;
                 num_waiters = 0;
                 on = 0;
                 trigger_time = 0;
@@ -7547,9 +7545,7 @@ virtual class uvm_event_base extends uvm_object;
                 uvm_event_base e;
                 super.do_copy(rhs);
                 if(!$cast(e, rhs) || (e==null)) return;
-//TODO issue #4468 - Fix UVM assignment of event data types
-//TODO  %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:7498:25: Unsupported: assignment of event data type
-//TODO                m_event = e.m_event;
+                m_event = e.m_event;
                 num_waiters = e.num_waiters;
                 on = e.on;
                 trigger_time = e.trigger_time;

From 98252634fc394b7f2c525daa6ad4b2a42b29e534 Mon Sep 17 00:00:00 2001
From: Chih-Mao Chen <PkmX.tw@gmail.com>
Date: Fri, 27 Oct 2023 02:36:18 +0800
Subject: [PATCH 134/157] Include systemc instead of systemc.h in model header
 files (#4622) (#4623)

This may require that SystemC programs add:
using namespace sc_core;
using namespace sc_dt;
---
 docs/CONTRIBUTORS                            |  1 +
 examples/make_tracing_sc/sc_main.cpp         |  3 +-
 include/verilated_funcs.h                    | 10 ++---
 src/V3AstNodes.cpp                           |  7 ++--
 src/V3EmitCBase.cpp                          |  8 ++--
 src/V3EmitCModel.cpp                         |  9 +++--
 src/V3File.h                                 |  2 +-
 test_regress/t/t_mem_multi_io2.cpp           |  1 +
 test_regress/t/t_sc_names.cpp                |  2 +
 test_regress/t/t_var_pins_sc1.pl             | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc2.pl             | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc32.pl            | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc64.pl            | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc_biguint.pl      | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc_uint.pl         | 40 ++++++++++----------
 test_regress/t/t_var_pins_sc_uint_biguint.pl | 40 ++++++++++----------
 test_regress/t/t_var_pins_scui.pl            | 32 ++++++++--------
 test_regress/t/t_var_sc_bv.cpp               |  3 ++
 18 files changed, 184 insertions(+), 174 deletions(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 5c0e7cf46..a29698484 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -19,6 +19,7 @@ Anthony Donlon
 Arkadiusz Kozdra
 Aylon Chaim Porat
 Cameron Kirk
+Chih-Mao Chen
 Chris Randall
 Chuxuan Wang
 Conor McCullough
diff --git a/examples/make_tracing_sc/sc_main.cpp b/examples/make_tracing_sc/sc_main.cpp
index 44e69c7f0..59f1a55a4 100644
--- a/examples/make_tracing_sc/sc_main.cpp
+++ b/examples/make_tracing_sc/sc_main.cpp
@@ -24,6 +24,7 @@
 #include "Vtop.h"
 
 using namespace sc_core;
+using namespace sc_dt;
 
 int sc_main(int argc, char* argv[]) {
     // This is a more complicated example, please also see the simpler examples/make_hello_c.
@@ -52,7 +53,7 @@ int sc_main(int argc, char* argv[]) {
     Verilated::commandArgs(argc, argv);
 
     // General logfile
-    ios::sync_with_stdio();
+    std::ios::sync_with_stdio();
 
     // Define clocks
     sc_clock clk{"clk", 10, SC_NS, 0.5, 3, SC_NS, true};
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index db24cfe9c..673cf822a 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -449,7 +449,7 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
 #define VL_ASSIGN_WSB(obits, owp, svar) \
     { \
         const int words = VL_WORDS_I(obits); \
-        sc_biguint<(obits)> _butemp = (svar).read(); \
+        sc_dt::sc_biguint<(obits)> _butemp = (svar).read(); \
         uint32_t* chunkp = _butemp.get_raw(); \
         int32_t lsb = 0; \
         while (lsb < obits - BITS_PER_DIGIT) { \
@@ -475,20 +475,20 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
 
 #define VL_ASSIGN_SWI(obits, svar, rd) \
     { \
-        sc_bv<(obits)> _bvtemp; \
+        sc_dt::sc_bv<(obits)> _bvtemp; \
         _bvtemp.set_word(0, (rd)); \
         (svar).write(_bvtemp); \
     }
 #define VL_ASSIGN_SWQ(obits, svar, rd) \
     { \
-        sc_bv<(obits)> _bvtemp; \
+        sc_dt::sc_bv<(obits)> _bvtemp; \
         _bvtemp.set_word(0, static_cast<IData>(rd)); \
         _bvtemp.set_word(1, static_cast<IData>((rd) >> VL_IDATASIZE)); \
         (svar).write(_bvtemp); \
     }
 #define VL_ASSIGN_SWW(obits, svar, rwp) \
     { \
-        sc_bv<(obits)> _bvtemp; \
+        sc_dt::sc_bv<(obits)> _bvtemp; \
         for (int i = 0; i < VL_WORDS_I(obits); ++i) _bvtemp.set_word(i, (rwp)[i]); \
         (svar).write(_bvtemp); \
     }
@@ -504,7 +504,7 @@ static inline void VL_ASSIGNBIT_WO(int bit, WDataOutP owp) VL_MT_SAFE {
 #define VL_SC_BITS_PER_DIGIT 30  // This comes from sc_nbdefs.h BITS_PER_DIGIT
 #define VL_ASSIGN_SBW(obits, svar, rwp) \
     { \
-        sc_biguint<(obits)> _butemp; \
+        sc_dt::sc_biguint<(obits)> _butemp; \
         int32_t lsb = 0; \
         uint32_t* chunkp = _butemp.get_raw(); \
         while (lsb + VL_SC_BITS_PER_DIGIT < (obits)) { \
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 3ab69db0f..4fd19133c 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -688,13 +688,14 @@ string AstVar::dpiTmpVarType(const string& varName) const {
 
 string AstVar::scType() const {
     if (isScBigUint()) {
-        return (string{"sc_biguint<"} + cvtToStr(widthMin())
+        return (string{"sc_dt::sc_biguint<"} + cvtToStr(widthMin())
                 + "> ");  // Keep the space so don't get >>
     } else if (isScUint()) {
-        return (string{"sc_uint<"} + cvtToStr(widthMin())
+        return (string{"sc_dt::sc_uint<"} + cvtToStr(widthMin())
                 + "> ");  // Keep the space so don't get >>
     } else if (isScBv()) {
-        return (string{"sc_bv<"} + cvtToStr(widthMin()) + "> ");  // Keep the space so don't get >>
+        return (string{"sc_dt::sc_bv<"} + cvtToStr(widthMin())
+                + "> ");  // Keep the space so don't get >>
     } else if (widthMin() == 1) {
         return "bool";
     } else if (widthMin() <= VL_IDATASIZE) {
diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp
index c382554c4..be8871a8a 100644
--- a/src/V3EmitCBase.cpp
+++ b/src/V3EmitCBase.cpp
@@ -153,14 +153,14 @@ void EmitCBaseVisitorConst::emitVarDecl(const AstVar* nodep, bool asRef) {
     if (nodep->isIO() && nodep->isSc()) {
         UASSERT_OBJ(basicp, nodep, "Unimplemented: Outputting this data type");
         if (nodep->attrScClocked() && nodep->isReadOnly()) {
-            puts("sc_in_clk ");
+            puts("sc_core::sc_in_clk ");
         } else {
             if (nodep->isInoutish()) {
-                puts("sc_inout<");
+                puts("sc_core::sc_inout<");
             } else if (nodep->isWritable()) {
-                puts("sc_out<");
+                puts("sc_core::sc_out<");
             } else if (nodep->isNonOutput()) {
-                puts("sc_in<");
+                puts("sc_core::sc_in<");
             } else {
                 nodep->v3fatalSrc("Unknown type");
             }
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 6946ed68f..a3e3838f0 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -112,7 +112,7 @@ class EmitCModel final : public EmitCFunc {
                 }
             }
         }
-        if (optSystemC() && v3Global.usesTiming()) puts("sc_event trigger_eval;\n");
+        if (optSystemC() && v3Global.usesTiming()) puts("sc_core::sc_event trigger_eval;\n");
 
         // Cells instantiated by the top level (for access to /* verilator public */)
         puts("\n// CELLS\n"
@@ -200,7 +200,7 @@ class EmitCModel final : public EmitCFunc {
         }
         if (v3Global.opt.trace() && optSystemC()) {
             puts("/// SC tracing; avoid overloaded virtual function lint warning\n");
-            puts("void trace(sc_trace_file* tfp) const override { "
+            puts("void trace(sc_core::sc_trace_file* tfp) const override { "
                  "::sc_core::sc_module::trace(tfp); }\n");
         }
 
@@ -255,7 +255,7 @@ class EmitCModel final : public EmitCFunc {
         puts("\n");
         puts(topClassName() + "::" + topClassName());
         if (optSystemC()) {
-            puts("(sc_module_name /* unused */)\n");
+            puts("(sc_core::sc_module_name /* unused */)\n");
             puts("    : VerilatedModel{*Verilated::threadContextp()}\n");
             puts("    , vlSymsp{new " + symClassName() + "(contextp(), name(), this)}\n");
         } else {
@@ -364,7 +364,8 @@ class EmitCModel final : public EmitCFunc {
             puts("\nvoid " + topClassName() + "::eval() {\n");
             puts("eval_step();\n");
             puts("if (eventsPending()) {\n");
-            puts("sc_time dt = sc_time::from_value(nextTimeSlot() - contextp()->time());\n");
+            puts("sc_core::sc_time dt = sc_core::sc_time::from_value(nextTimeSlot() - "
+                 "contextp()->time());\n");
             puts("next_trigger(dt, trigger_eval);\n");
             puts("} else {\n");
             puts("next_trigger(trigger_eval);\n");
diff --git a/src/V3File.h b/src/V3File.h
index 3f1cbebc2..00b9ef1aa 100644
--- a/src/V3File.h
+++ b/src/V3File.h
@@ -275,7 +275,7 @@ public:
     void putsHeader() override { puts("// Verilated -*- SystemC -*-\n"); }
     void putsIntTopInclude() override {
         putsForceIncs();
-        puts("#include \"systemc.h\"\n");
+        puts("#include \"systemc\"\n");
         puts("#include \"verilated_sc.h\"\n");
     }
 };
diff --git a/test_regress/t/t_mem_multi_io2.cpp b/test_regress/t/t_mem_multi_io2.cpp
index 24269b14c..56d37c58f 100644
--- a/test_regress/t/t_mem_multi_io2.cpp
+++ b/test_regress/t/t_mem_multi_io2.cpp
@@ -28,6 +28,7 @@ int main()
     tb = new VM_PREFIX{"tb"};
 
 #ifdef SYSTEMC_VERSION
+    using namespace sc_core;
     sc_signal<uint32_t> i3;
     sc_signal<uint32_t> o3;
     sc_signal<uint32_t> i34[4];
diff --git a/test_regress/t/t_sc_names.cpp b/test_regress/t/t_sc_names.cpp
index 6f73c4c1d..4380c8064 100644
--- a/test_regress/t/t_sc_names.cpp
+++ b/test_regress/t/t_sc_names.cpp
@@ -6,6 +6,8 @@
 #include VM_PREFIX_INCLUDE
 #include "Vt_sc_names.h"
 
+using namespace sc_core;
+
 VM_PREFIX* tb = nullptr;
 
 int sc_main(int argc, char* argv[]) {
diff --git a/test_regress/t/t_var_pins_sc1.pl b/test_regress/t/t_var_pins_sc1.pl
index 88e6143c4..0c84b2e84 100755
--- a/test_regress/t/t_var_pins_sc1.pl
+++ b/test_regress/t/t_var_pins_sc1.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 if ($Self->{vlt_all}) {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<8>\s> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<32>\s> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<64>\s> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<8>\s> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<32>\s> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<64>\s> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16_vlt;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<8>\s> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<32>\s> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<64>\s> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<8>\s> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<32>\s> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<64>\s> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16_vlt;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc2.pl b/test_regress/t/t_var_pins_sc2.pl
index 9cb732256..9bc19ebcd 100755
--- a/test_regress/t/t_var_pins_sc2.pl
+++ b/test_regress/t/t_var_pins_sc2.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<8>\s> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<32>\s> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<64>\s> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<8>\s> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<32>\s> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<64>\s> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16_vlt;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<8>\s> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<32>\s> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<64>\s> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<8>\s> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<32>\s> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<64>\s> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16_vlt;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc32.pl b/test_regress/t/t_var_pins_sc32.pl
index f3b956e98..491a10919 100755
--- a/test_regress/t/t_var_pins_sc32.pl
+++ b/test_regress/t/t_var_pins_sc32.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<64>\s> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<64>\s> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16_vlt;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<64>\s> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<64>\s> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16_vlt;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc64.pl b/test_regress/t/t_var_pins_sc64.pl
index 370dc90a3..2eebd0958 100755
--- a/test_regress/t/t_var_pins_sc64.pl
+++ b/test_regress/t/t_var_pins_sc64.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 if ($Self->{vlt_all}) {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint64_t> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint64_t> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16_vlt;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint64_t> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1_vlt;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint64_t> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1_vlt;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16_vlt;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc_biguint.pl b/test_regress/t/t_var_pins_sc_biguint.pl
index 226882081..bd1895f16 100755
--- a/test_regress/t/t_var_pins_sc_biguint.pl
+++ b/test_regress/t/t_var_pins_sc_biguint.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 if ($Self->{vlt_all}) {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint64_t> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_biguint<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_biguint<128>\s> \s+ &i128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<513>\s> \s+ &i513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint64_t> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_biguint<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_biguint<128>\s> \s+ &i128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<513>\s> \s+ &i513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint64_t> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_biguint<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_biguint<128>\s> \s+ &o128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<513>\s> \s+ &o513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint64_t> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_biguint<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_biguint<128>\s> \s+ &o128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<513>\s> \s+ &o513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc_uint.pl b/test_regress/t/t_var_pins_sc_uint.pl
index 4a60aed89..6b23397d3 100755
--- a/test_regress/t/t_var_pins_sc_uint.pl
+++ b/test_regress/t/t_var_pins_sc_uint.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<8>\s> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<16>\s> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<32>\s> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<64>\s> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<128>\s> \s+ &i128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<513>\s> \s+ &i513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<8>\s> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<16>\s> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<32>\s> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<64>\s> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<128>\s> \s+ &i128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<513>\s> \s+ &i513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<8>\s> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<16>\s> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<32>\s> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<64>\s> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<128>\s> \s+ &o128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<513>\s> \s+ &o513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<8>\s> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<16>\s> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<32>\s> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<64>\s> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<128>\s> \s+ &o128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<513>\s> \s+ &o513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_sc_uint_biguint.pl b/test_regress/t/t_var_pins_sc_uint_biguint.pl
index 1aae8b505..3b0e9729d 100755
--- a/test_regress/t/t_var_pins_sc_uint_biguint.pl
+++ b/test_regress/t/t_var_pins_sc_uint_biguint.pl
@@ -18,27 +18,27 @@ compile(
     );
 
 {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<8>\s> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<16>\s> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<32>\s> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_uint<64>\s> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_biguint<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_biguint<128>\s> \s+ &i128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<513>\s> \s+ &i513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<8>\s> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<16>\s> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<32>\s> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_uint<64>\s> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_biguint<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_biguint<128>\s> \s+ &i128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<513>\s> \s+ &i513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<8>\s> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<16>\s> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<32>\s> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_uint<64>\s> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_biguint<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_biguint<128>\s> \s+ &o128;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<513>\s> \s+ &o513;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<8>\s> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<16>\s> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<32>\s> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_uint<64>\s> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_biguint<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_biguint<128>\s> \s+ &o128;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<513>\s> \s+ &o513;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_pins_scui.pl b/test_regress/t/t_var_pins_scui.pl
index 6162561fd..34a1424d5 100755
--- a/test_regress/t/t_var_pins_scui.pl
+++ b/test_regress/t/t_var_pins_scui.pl
@@ -18,23 +18,23 @@ compile(
     );
 
 if ($Self->{vlt_all}) {
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<bool> \s+ &i1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint8_t> \s+ &i8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint16_t> \s+ &i16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint32_t> \s+ &i32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<uint64_t> \s+ &i64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<65>\s> \s+ &i65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<1>\s> \s+ &ibv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_in<sc_bv<16>\s> \s+ &ibv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<bool> \s+ &i1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint8_t> \s+ &i8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint16_t> \s+ &i16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint32_t> \s+ &i32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<uint64_t> \s+ &i64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<65>\s> \s+ &i65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<1>\s> \s+ &ibv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_in<sc_dt::sc_bv<16>\s> \s+ &ibv16;/x);
 
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<bool> \s+ &o1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint8_t> \s+ &o8;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint16_t> \s+ &o16;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint32_t> \s+ &o32;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<uint64_t> \s+ &o64;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<65>\s> \s+ &o65;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<1>\s> \s+ &obv1;/x);
-    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_out<sc_bv<16>\s> \s+ &obv16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<bool> \s+ &o1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint8_t> \s+ &o8;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint16_t> \s+ &o16;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint32_t> \s+ &o32;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<uint64_t> \s+ &o64;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<65>\s> \s+ &o65;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<1>\s> \s+ &obv1;/x);
+    file_grep("$Self->{obj_dir}/$Self->{vm_prefix}.h", qr/sc_core::sc_out<sc_dt::sc_bv<16>\s> \s+ &obv16;/x);
 }
 
 execute();
diff --git a/test_regress/t/t_var_sc_bv.cpp b/test_regress/t/t_var_sc_bv.cpp
index cb0b93ed2..3d54391ef 100644
--- a/test_regress/t/t_var_sc_bv.cpp
+++ b/test_regress/t/t_var_sc_bv.cpp
@@ -6,6 +6,9 @@
 
 #include VM_PREFIX_INCLUDE
 
+using namespace sc_core;
+using namespace sc_dt;
+
 VM_PREFIX* tb = nullptr;
 bool pass = true;
 

From 64af83161a6206dded99cbee812dd7991070d057 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Thu, 26 Oct 2023 23:17:23 +0200
Subject: [PATCH 135/157] Fix rand fields of reference types (#4627)

---
 src/V3Randomize.cpp                 |  5 +++--
 test_regress/t/t_randomize_method.v | 16 ++++++++++++++++
 test_regress/t/t_uvm_pkg_todo.vh    | 20 +++++++++++++++-----
 3 files changed, 34 insertions(+), 7 deletions(-)

diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index af72b95c0..31f72fc1e 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -55,7 +55,8 @@ private:
             for (auto* memberp = classp->stmtsp(); memberp; memberp = memberp->nextp()) {
                 // If member is rand and of class type, mark its class
                 if (VN_IS(memberp, Var) && VN_AS(memberp, Var)->isRand()) {
-                    if (const auto* const classRefp = VN_CAST(memberp->dtypep(), ClassRefDType)) {
+                    if (const auto* const classRefp
+                        = VN_CAST(memberp->dtypep()->skipRefp(), ClassRefDType)) {
                         auto* const rclassp = classRefp->classp();
                         if (!rclassp->user1()) {
                             rclassp->user1(true);
@@ -100,7 +101,7 @@ private:
         iterateChildrenConst(nodep);
         if (nodep->name() != "randomize") return;
         if (const AstClassRefDType* const classRefp
-            = VN_CAST(nodep->fromp()->dtypep(), ClassRefDType)) {
+            = VN_CAST(nodep->fromp()->dtypep()->skipRefp(), ClassRefDType)) {
             AstClass* const classp = classRefp->classp();
             classp->user1(true);
             markMembers(classp);
diff --git a/test_regress/t/t_randomize_method.v b/test_regress/t/t_randomize_method.v
index dc3fa9561..69868eb48 100644
--- a/test_regress/t/t_randomize_method.v
+++ b/test_regress/t/t_randomize_method.v
@@ -113,6 +113,19 @@ class DeriveAndContainClsWithInt extends ClsWithInt;
    endfunction
 endclass
 
+class ClsUsedOnlyHere;
+   rand int a;
+endclass
+
+typedef ClsUsedOnlyHere cls_used_only_here_t;
+
+class ClsContainUsedOnlyHere;
+   rand cls_used_only_here_t c;
+   function new;
+      c = new;
+   endfunction
+endclass
+
 module t (/*AUTOARG*/);
 
    DerivedCls derived;
@@ -121,6 +134,7 @@ module t (/*AUTOARG*/);
    ContainsNull cont;
    DeriveClsWithInt der_int;
    DeriveAndContainClsWithInt der_contain;
+   ClsContainUsedOnlyHere cls_cont_used;
 
    initial begin
       int rand_result;
@@ -130,6 +144,7 @@ module t (/*AUTOARG*/);
       der_int = new;
       der_contain = new;
       base = derived;
+      cls_cont_used = new;
       for (int i = 0; i < 10; i++) begin
          rand_result = base.randomize();
          rand_result = other.randomize();
@@ -166,6 +181,7 @@ module t (/*AUTOARG*/);
       `check_rand(der_int, der_int.a);
       `check_rand(der_contain, der_contain.cls1.a);
       `check_rand(der_contain, der_contain.a);
+      `check_rand(cls_cont_used, cls_cont_used.c.a);
 
       $write("*-* All Finished *-*\n");
       $finish;
diff --git a/test_regress/t/t_uvm_pkg_todo.vh b/test_regress/t/t_uvm_pkg_todo.vh
index a2a4c6ff7..58823aa81 100644
--- a/test_regress/t/t_uvm_pkg_todo.vh
+++ b/test_regress/t/t_uvm_pkg_todo.vh
@@ -21074,15 +21074,21 @@ typedef class uvm_tlm_extension_base;
 class uvm_tlm_generic_payload extends uvm_sequence_item;
    rand bit [63:0]             m_address;
    rand uvm_tlm_command_e          m_command;
-   rand byte unsigned             m_data[];
+   //TODO issue-4625 - Rand fields of dynamic array types
+   //TODO %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:21081:35: Unsupported: random member variable with type 'byte[]'
+   /*TODO rand*/ byte unsigned             m_data[];
    rand int unsigned           m_length;
    rand uvm_tlm_response_status_e  m_response_status;
    bit m_dmi;
-   rand byte unsigned          m_byte_enable[];
+   //TODO issue-4625 - Rand fields of dynamic array types
+   //TODO %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:21081:35: Unsupported: random member variable with type 'byte[]'
+   /*TODO rand*/ byte unsigned          m_byte_enable[];
    rand int unsigned m_byte_enable_length;
    rand int unsigned m_streaming_width;
    protected uvm_tlm_extension_base m_extensions [uvm_tlm_extension_base];
-   local rand uvm_tlm_extension_base m_rand_exts[];
+   //TODO issue-4625 - Rand fields of dynamic array types
+   //TODO %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:21081:35: Unsupported: random member variable with type 'CLASSREFDTYPE 'uvm_tlm_extension_base'[]'
+   local /*rand*/ uvm_tlm_extension_base m_rand_exts[];
    typedef uvm_object_registry#(uvm_tlm_generic_payload,"uvm_tlm_generic_payload") type_id;
    static function uvm_tlm_generic_payload type_id_create (string name="",
                                      uvm_component parent=null,
@@ -22446,7 +22452,9 @@ class uvm_reg_item extends uvm_sequence_item;
   uvm_elem_kind_e element_kind;
   uvm_object element;
   rand uvm_access_e kind;
-  rand uvm_reg_data_t value[];
+  //TODO issue-4625 - Rand fields of dynamic array types
+  //TODO %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:21081:35: Unsupported: random member variable with type 'bit[]'
+  /*rand*/ uvm_reg_data_t value[];
   constraint max_values { value.size() > 0 && value.size() < 1000; }
   rand uvm_reg_addr_t offset;
   uvm_status_e status;
@@ -26866,7 +26874,9 @@ class uvm_reg_fifo extends uvm_reg;
     local uvm_reg_field value;
     local int m_set_cnt;
     local int unsigned m_size;
-    rand uvm_reg_data_t fifo[$];
+    //TODO issue-4625 - Rand fields of dynamic array types
+    //TODO %Error-UNSUPPORTED: t/t_uvm_pkg_todo.vh:21081:35: Unsupported: random member variable with type 'bit[$]'
+    /*rand*/ uvm_reg_data_t fifo[$];
     constraint valid_fifo_size {
       fifo.size() <= m_size;
     }

From 739521333c541845b262fcd0757d885efc4d433c Mon Sep 17 00:00:00 2001
From: Kamil Rakoczy <krakoczy@antmicro.com>
Date: Fri, 27 Oct 2023 14:24:27 +0200
Subject: [PATCH 136/157] Tests: Fix clang_check_attributes missing dataclass
 decorator (#4604) (#4611)

---
 nodist/clang_check_attributes | 1 +
 1 file changed, 1 insertion(+)

diff --git a/nodist/clang_check_attributes b/nodist/clang_check_attributes
index cedb1655b..8fd0f8ea7 100755
--- a/nodist/clang_check_attributes
+++ b/nodist/clang_check_attributes
@@ -955,6 +955,7 @@ def run_analysis(ccl: Iterable[CompileCommand], pccl: Iterable[CompileCommand],
                                          compile_command.directory)
 
 
+@dataclass
 class ParallelAnalysisProcess:
     cav: Optional[CallAnnotationsValidator] = None
     diags: set[Diagnostic] = dataclasses.field(default_factory=set)

From e6135981a56782a4650902c66e5c93eb569cd78e Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 27 Oct 2023 15:58:40 +0200
Subject: [PATCH 137/157] Fix dynamic casts of null values (#4631)

---
 include/verilated_types.h  | 10 ++++++++++
 test_regress/t/t_castdyn.v | 16 ++++++++++++++++
 2 files changed, 26 insertions(+)

diff --git a/include/verilated_types.h b/include/verilated_types.h
index 0a92725a9..be2914d70 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -1685,6 +1685,10 @@ public:
 
 template <typename T, typename U>
 static inline bool VL_CAST_DYNAMIC(VlClassRef<T> in, VlClassRef<U>& outr) {
+    if (!in) {
+        outr = VlNull{};
+        return true;
+    }
     VlClassRef<U> casted = in.template dynamicCast<U>();
     if (VL_LIKELY(casted)) {
         outr = casted;
@@ -1694,6 +1698,12 @@ static inline bool VL_CAST_DYNAMIC(VlClassRef<T> in, VlClassRef<U>& outr) {
     }
 }
 
+template <typename T>
+static inline bool VL_CAST_DYNAMIC(VlNull in, VlClassRef<T>& outr) {
+    outr = VlNull{};
+    return true;
+}
+
 //=============================================================================
 // VlSampleQueue stores samples for input clockvars in clocking blocks. At a clocking event,
 // samples from this queue should be written to the correct input clockvar.
diff --git a/test_regress/t/t_castdyn.v b/test_regress/t/t_castdyn.v
index 9ccb19dc8..faa7d7542 100644
--- a/test_regress/t/t_castdyn.v
+++ b/test_regress/t/t_castdyn.v
@@ -9,6 +9,10 @@ endclass
 class BasedA extends Base;
 endclass
 class BasedB extends Base;
+   static function BasedB getBasedB(bit getNull);
+      BasedB b = new;
+      return getNull ? null : b;
+   endfunction
 endclass
 
 module t (/*AUTOARG*/);
@@ -55,6 +59,18 @@ module t (/*AUTOARG*/);
       if (i != 1) $stop;
       if (b != bb) $stop;
 
+      bb = null;
+      b = bb;
+      i = $cast(bbo, b);
+      if (i != 1) $stop;
+      if (b != bb) $stop;
+
+      bb = BasedB::getBasedB(1);
+      b = bb;
+      i = $cast(bbo, b);
+      if (i != 1) $stop;
+      if (b != bb) $stop;
+
       bb = new;
       b = bb;
       bao = ba;

From 89743aae5da3a6ff29eada45be0183d451697129 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Krzysztof=20Boro=C5=84ski?=
 <94375110+kboronski-ant@users.noreply.github.com>
Date: Fri, 27 Oct 2023 21:08:02 +0200
Subject: [PATCH 138/157] Fix stable name generation in V3Fork (#4615) (#4624)

---
 src/V3Fork.cpp | 43 +++++++++++++++++++++++++------------------
 1 file changed, 25 insertions(+), 18 deletions(-)

diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 098104d11..09d12e4f4 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -67,17 +67,20 @@ private:
     AstNode* const m_procp;  // Procedure/block associated with that dynscope
     std::set<AstVar*> m_captures;  // Variables to be moved into the dynscope
     ForkDynScopeInstance m_instance;  // Nodes to be injected into the AST to create the dynscope
+    const size_t m_class_id;  // Dynscope class ID
+    const size_t m_id;  // Dynscope ID
 
 public:
-    ForkDynScopeFrame(AstNodeModule* modp, AstNode* procp)
+    ForkDynScopeFrame(AstNodeModule* modp, AstNode* procp, size_t class_id, size_t id)
         : m_modp{modp}
-        , m_procp{procp} {}
+        , m_procp{procp}
+        , m_class_id{class_id}
+        , m_id{id} {}
 
     ForkDynScopeInstance& createInstancePrototype() {
         UASSERT_OBJ(!m_instance.initialized(), m_procp, "Dynamic scope already instantiated.");
 
-        m_instance.m_classp
-            = new AstClass{m_procp->fileline(), generateDynScopeClassName(m_procp)};
+        m_instance.m_classp = new AstClass{m_procp->fileline(), generateDynScopeClassName()};
         m_instance.m_refDTypep
             = new AstClassRefDType{m_procp->fileline(), m_instance.m_classp, nullptr};
         v3Global.rootp()->typeTablep()->addTypesp(m_instance.m_refDTypep);
@@ -203,7 +206,7 @@ private:
 
         AstBegin* const beginp = new AstBegin{
             forkp->fileline(),
-            "_Vwrapped_" + (forkp->name().empty() ? cvtToHex(forkp) : forkp->name()),
+            "_Vwrapped_" + (forkp->name().empty() ? "" : forkp->name() + "_") + cvtToStr(m_id),
             m_instance.m_handlep, false, true};
         forkHandle.relink(beginp);
 
@@ -223,14 +226,11 @@ private:
         m_modp->addStmtsp(m_instance.m_classp);
     }
 
-    static string generateDynScopeClassName(const AstNode* fromp) {
-        string n = "__VDynScope__" + (!fromp->name().empty() ? (fromp->name() + "__") : "ANON__")
-                   + cvtToHex(fromp);
-        return n;
-    }
+    string generateDynScopeClassName() { return "__VDynScope_" + cvtToStr(m_class_id); }
 
-    static string generateDynScopeHandleName(const AstNode* fromp) {
-        return "__VDynScope_" + (fromp->name().empty() ? cvtToHex(fromp) : fromp->name());
+    string generateDynScopeHandleName(const AstNode* fromp) {
+        return "__VDynScope_" + (!fromp->name().empty() ? (fromp->name() + "_") : "ANON_")
+               + cvtToStr(m_id);
     }
 
     AstNode* getProcStmts() {
@@ -270,6 +270,8 @@ private:
     int m_forkDepth = 0;  // Number of asynchronous forks we are currently under
     bool m_afterTimingControl = false;  // A timing control might've be executed in the current
                                         // process
+    size_t m_id;  // Unique ID for a frame
+    size_t m_class_id;  // Unique ID for a frame class
 
     // METHODS
 
@@ -286,7 +288,8 @@ private:
     }
 
     ForkDynScopeFrame* pushDynScopeFrame(AstNode* procp) {
-        ForkDynScopeFrame* const framep = new ForkDynScopeFrame{m_modp, procp};
+        ForkDynScopeFrame* const framep
+            = new ForkDynScopeFrame{m_modp, procp, m_class_id++, m_id++};
         auto r = m_frames.emplace(std::make_pair(procp, framep));
         UASSERT_OBJ(r.second, m_modp, "Procedure already contains a frame");
         return framep;
@@ -336,6 +339,7 @@ private:
     void visit(AstNodeModule* nodep) override {
         VL_RESTORER(m_modp);
         if (!VN_IS(nodep, Class)) m_modp = nodep;
+        m_id = 0;
         iterateChildren(nodep);
     }
     void visit(AstNodeFTask* nodep) override {
@@ -463,6 +467,7 @@ private:
     AstVar* m_capturedVarsp = nullptr;  // Local copies of captured variables
     std::set<AstVar*> m_forkLocalsp;  // Variables local to a given fork
     AstArg* m_capturedVarRefsp = nullptr;  // References to captured variables (as args)
+    size_t m_id = 0;  // Unique ID for a task
 
     // METHODS
 
@@ -492,8 +497,8 @@ private:
     }
 
     string generateTaskName(AstNode* fromp, const string& kind) {
-        return "__V" + kind + (!fromp->name().empty() ? (fromp->name() + "__") : "UNNAMED__")
-               + cvtToHex(fromp);
+        return "__V" + kind + "_" + (!fromp->name().empty() ? (fromp->name() + "__") : "_")
+               + cvtToStr(m_id++);
     }
 
     void visitTaskifiable(AstNode* nodep) {
@@ -527,16 +532,16 @@ private:
 
         if (AstBegin* beginp = VN_CAST(nodep, Begin)) {
             UASSERT(beginp->stmtsp(), "No stmtsp\n");
-            const string taskName = generateTaskName(beginp, "__FORK_BEGIN_");
+            const string taskName = generateTaskName(beginp, "fork_begin");
             taskp
                 = makeTask(beginp->fileline(), beginp->stmtsp()->unlinkFrBackWithNext(), taskName);
             beginp->unlinkFrBack(&handle);
             VL_DO_DANGLING(beginp->deleteTree(), beginp);
         } else if (AstNodeStmt* stmtp = VN_CAST(nodep, NodeStmt)) {
-            const string taskName = generateTaskName(stmtp, "__FORK_STMT_");
+            const string taskName = generateTaskName(stmtp, "fork_stmt");
             taskp = makeTask(stmtp->fileline(), stmtp->unlinkFrBack(&handle), taskName);
         } else if (AstFork* forkp = VN_CAST(nodep, Fork)) {
-            const string taskName = generateTaskName(forkp, "__FORK_NESTED_");
+            const string taskName = generateTaskName(forkp, "fork_nested");
             taskp = makeTask(forkp->fileline(), forkp->unlinkFrBack(&handle), taskName);
         }
 
@@ -614,7 +619,9 @@ private:
     void visit(AstThisRef* nodep) override { return; }
     void visit(AstNodeModule* nodep) override {
         VL_RESTORER(m_modp);
+        VL_RESTORER(m_id);
         m_modp = nodep;
+        m_id = 0;
         iterateChildren(nodep);
     }
     void visit(AstNode* nodep) override {

From 2cba167634c23bacc97e0be566859bc2d64e02cb Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 08:14:38 +0100
Subject: [PATCH 139/157] Make eval loop construction more unified and the
 output more readable

---
 src/V3EmitCModel.cpp                 |   6 +-
 src/V3Sched.cpp                      | 623 ++++++++++++++-------------
 test_regress/t/t_protect_ids_key.out |   4 +
 test_regress/t/t_timing_debug1.out   | 278 ++++++++++++
 test_regress/t/t_timing_debug2.out   | 111 +++++
 test_regress/t/t_verilated_debug.out |   7 +
 test_regress/t/t_xml_debugcheck.out  | 230 +++++-----
 7 files changed, 853 insertions(+), 406 deletions(-)

diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index a3e3838f0..326aa21a9 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -402,10 +402,7 @@ class EmitCModel final : public EmitCFunc {
         puts(topModNameProtected + "__" + protect("_eval_settle") + "(&(vlSymsp->TOP));\n");
         puts("}\n");
 
-        if (v3Global.opt.profExec()) {
-            puts("vlSymsp->__Vm_executionProfilerp->configure();\n");
-            puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"eval\");\n");
-        }
+        if (v3Global.opt.profExec()) puts("vlSymsp->__Vm_executionProfilerp->configure();\n");
 
         puts("VL_DEBUG_IF(VL_DBG_MSGF(\"+ Eval\\n\"););\n");
         puts(topModNameProtected + "__" + protect("_eval") + "(&(vlSymsp->TOP));\n");
@@ -413,7 +410,6 @@ class EmitCModel final : public EmitCFunc {
         putsDecoration("// Evaluate cleanup\n");
         puts("Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);\n");
 
-        if (v3Global.opt.profExec()) puts("VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n");
         puts("}\n");
     }
 
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index cab3165f9..7dabae60f 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -87,14 +87,6 @@ std::vector<const AstSenTree*> getSenTreesUsedBy(const std::vector<const LogicBy
     return result;
 }
 
-AstAssign* setVar(AstVarScope* vscp, uint32_t val) {
-    FileLine* const flp = vscp->fileline();
-    AstVarRef* const refp = new AstVarRef{flp, vscp, VAccess::WRITE};
-    AstConst* const valp = new AstConst{flp, AstConst::DTyped{}, vscp->dtypep()};
-    valp->num().setLong(val);
-    return new AstAssign{flp, refp, valp};
-};
-
 void remapSensitivities(const LogicByScope& lbs,
                         std::unordered_map<const AstSenTree*, AstSenTree*> senTreeMap) {
     for (const auto& pair : lbs) {
@@ -114,6 +106,175 @@ void invertAndMergeSenTreeMap(
     }
 }
 
+//============================================================================
+// Code generation utility functions
+
+AstAssign* setVar(AstVarScope* vscp, uint32_t val) {
+    FileLine* const flp = vscp->fileline();
+    AstVarRef* const refp = new AstVarRef{flp, vscp, VAccess::WRITE};
+    AstConst* const valp = new AstConst{flp, AstConst::DTyped{}, vscp->dtypep()};
+    valp->num().setLong(val);
+    return new AstAssign{flp, refp, valp};
+}
+
+AstNodeStmt* incrementVar(AstVarScope* vscp) {
+    FileLine* const flp = vscp->fileline();
+    AstVarRef* const wrefp = new AstVarRef{flp, vscp, VAccess::WRITE};
+    AstVarRef* const rrefp = new AstVarRef{flp, vscp, VAccess::READ};
+    AstConst* const onep = new AstConst{flp, AstConst::DTyped{}, vscp->dtypep()};
+    onep->num().setLong(1);
+    return new AstAssign{flp, wrefp, new AstAdd{flp, rrefp, onep}};
+}
+
+AstNodeStmt* callVoidFunc(AstCFunc* funcp) {
+    AstCCall* const callp = new AstCCall{funcp->fileline(), funcp};
+    callp->dtypeSetVoid();
+    return callp->makeStmt();
+}
+
+AstNodeStmt* checkIterationLimit(AstNetlist* netlistp, const string& name, AstVarScope* counterp,
+                                 AstCFunc* trigDumpp) {
+    FileLine* const flp = netlistp->fileline();
+
+    // If we exceeded the iteration limit, die
+    const uint32_t limit = v3Global.opt.convergeLimit();
+    AstVarRef* const counterRefp = new AstVarRef{flp, counterp, VAccess::READ};
+    AstConst* const constp = new AstConst{flp, AstConst::DTyped{}, counterp->dtypep()};
+    constp->num().setLong(limit);
+    AstNodeExpr* const condp = new AstGt{flp, counterRefp, constp};
+    AstIf* const ifp = new AstIf{flp, condp};
+    ifp->branchPred(VBranchPred::BP_UNLIKELY);
+    AstTextBlock* const blockp = new AstTextBlock{flp};
+    ifp->addThensp(blockp);
+    FileLine* const locp = netlistp->topModulep()->fileline();
+    const string& file = VIdProtect::protect(locp->filename());
+    const string& line = cvtToStr(locp->lineno());
+    const auto add = [&](const string& text) { blockp->addText(flp, text, true); };
+    add("#ifdef VL_DEBUG\n");
+    blockp->addNodesp(callVoidFunc(trigDumpp));
+    add("#endif\n");
+    add("VL_FATAL_MT(\"" + V3OutFormatter::quoteNameControls(file) + "\", " + line + ", \"\", ");
+    add("\"" + name + " region did not converge.\");\n");
+
+    return ifp;
+}
+
+AstNodeStmt* profExecSectionPush(FileLine* flp, const string& name) {
+    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"" + name + "\");\n"};
+}
+
+AstNodeStmt* profExecSectionPop(FileLine* flp) {
+    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n"};
+}
+
+struct EvalLoop {
+    // Flag set to true during the first iteration of the loop
+    AstVarScope* firstIterp;
+    // The loop continuation flag (set to true to loop again)
+    AstVarScope* continuep = nullptr;
+    // The loop itself and statements around it
+    AstNodeStmt* stmtsp = nullptr;
+};
+
+// Create an eval loop with all the trimmings.
+EvalLoop createEvalLoop(AstNetlist* netlistp,  //
+                        const std::string& tag,  // Tag for current phase
+                        const string& name,  // Name of current phase
+                        bool slow,  // Should create slow functions
+                        AstVarScope* trigp,  // The trigger vector
+                        AstCFunc* dumpFuncp,  // Trigger dump function for debugging only
+                        AstNodeStmt* innerp,  // The inner loop, if any
+                        AstNodeStmt* phasePrepp,  // Prep statements run before checking triggers
+                        AstNodeStmt* phaseWorkp  // The work to do if anything triggered
+) {
+    const std::string varPrefix = "__V" + tag;
+    AstScope* const scopeTopp = netlistp->topScopep()->scopep();
+    FileLine* const flp = netlistp->fileline();
+
+    // We wrap the prep/cond/work in a function for readability
+    AstCFunc* const phaseFuncp = makeTopFunction(netlistp, "_eval_phase__" + tag, slow);
+    {
+        // The execute flag
+        AstVarScope* const executeFlagp = scopeTopp->createTemp(varPrefix + "Execute", 1);
+        executeFlagp->varp()->noReset(true);
+
+        // Add the preparatory statements
+        phaseFuncp->addStmtsp(phasePrepp);
+
+        // Check if any triggers are fired, save the result
+        AstCMethodHard* const callp
+            = new AstCMethodHard{flp, new AstVarRef{flp, trigp, VAccess::READ}, "any"};
+        callp->dtypeSetBit();
+        phaseFuncp->addStmtsp(
+            new AstAssign{flp, new AstVarRef{flp, executeFlagp, VAccess::WRITE}, callp});
+
+        // Add the work
+        AstIf* const ifp = new AstIf{flp, new AstVarRef{flp, executeFlagp, VAccess::READ}};
+        ifp->addThensp(phaseWorkp);
+        phaseFuncp->addStmtsp(ifp);
+
+        // The function returns ture iff it did run the work
+        phaseFuncp->rtnType("bool");
+        phaseFuncp->addStmtsp(
+            new AstCReturn{flp, new AstVarRef{flp, executeFlagp, VAccess::READ}});
+    }
+
+    // The result statements
+    AstNodeStmt* stmtps = nullptr;
+
+    // Prof-exec section push
+    if (v3Global.opt.profExec()) stmtps = profExecSectionPush(flp, "loop " + tag);
+
+    const auto addVar = [&](const std::string& name, int width, uint32_t initVal) {
+        AstVarScope* const vscp = scopeTopp->createTemp("__V" + tag + name, width);
+        vscp->varp()->noReset(true);
+        stmtps = AstNode::addNext(stmtps, setVar(vscp, initVal));
+        return vscp;
+    };
+
+    // The iteration counter
+    AstVarScope* const counterp = addVar("IterCount", 32, 0);
+    // The first iteration flag
+    AstVarScope* const firstIterFlagp = addVar("FirstIteration", 1, 1);
+    // The continuation flag
+    AstVarScope* const continueFlagp = addVar("Continue", 1, 1);
+
+    // The loop
+    {
+        AstWhile* const loopp
+            = new AstWhile{flp, new AstVarRef{flp, continueFlagp, VAccess::READ}};
+
+        // Check the iteration limit (aborts if exceeded)
+        loopp->addStmtsp(checkIterationLimit(netlistp, name, counterp, dumpFuncp));
+        // Increment the iteration counter
+        loopp->addStmtsp(incrementVar(counterp));
+
+        // Reset continuation flag
+        loopp->addStmtsp(setVar(continueFlagp, 0));
+
+        // Execute the inner loop
+        loopp->addStmtsp(innerp);
+
+        // Call the phase function to execute the current work. If we did
+        // work, then need to loop again, so set the continuation flag
+        AstCCall* const callp = new AstCCall{flp, phaseFuncp};
+        callp->dtypeSetBit();
+        AstIf* const ifp = new AstIf{flp, callp};
+        ifp->addThensp(setVar(continueFlagp, 1));
+        loopp->addStmtsp(ifp);
+
+        // Clear the first iteration flag
+        loopp->addStmtsp(setVar(firstIterFlagp, 0));
+
+        stmtps->addNext(loopp);
+    }
+
+    // Prof-exec section pop
+    if (v3Global.opt.profExec()) stmtps->addNext(profExecSectionPop(flp));
+
+    return {firstIterFlagp, continueFlagp, stmtps};
+}
+
 //============================================================================
 // Split large function according to --output-split-cfuncs
 
@@ -249,9 +410,7 @@ void orderSequentially(AstCFunc* funcp, const LogicByScope& lbs) {
         subFuncp->slow(funcp->slow());
         scopep->addBlocksp(subFuncp);
         // Call it from the top function
-        AstCCall* const callp = new AstCCall{scopep->fileline(), subFuncp};
-        callp->dtypeSetVoid();
-        funcp->addStmtsp(callp->makeStmt());
+        funcp->addStmtsp(callVoidFunc(subFuncp));
         return subFuncp;
     };
     const VNUser1InUse user1InUse;  // AstScope -> AstCFunc: the sub-function for the scope
@@ -340,13 +499,12 @@ struct TriggerKit {
     // No VL_UNCOPYABLE(TriggerKit) as causes C++20 errors on MSVC
 
     // Utility that assigns the given index trigger to fire when the given variable is zero
-    void addFirstIterationTriggerAssignment(AstVarScope* counterp, uint32_t index) const {
-        FileLine* const flp = counterp->fileline();
+    void addFirstIterationTriggerAssignment(AstVarScope* flagp, uint32_t index) const {
+        FileLine* const flp = flagp->fileline();
         AstVarRef* const vrefp = new AstVarRef{flp, m_vscp, VAccess::WRITE};
         AstCMethodHard* const callp = new AstCMethodHard{flp, vrefp, "set"};
         callp->addPinsp(new AstConst{flp, index});
-        callp->addPinsp(
-            new AstEq{flp, new AstVarRef{flp, counterp, VAccess::READ}, new AstConst{flp, 0}});
+        callp->addPinsp(new AstVarRef{flp, flagp, VAccess::READ});
         callp->dtypeSetVoid();
         m_funcp->stmtsp()->addHereThisAsNext(callp->makeStmt());
     }
@@ -378,6 +536,8 @@ struct EvalKit {
     AstCFunc* const m_dumpp = nullptr;
     // The AstCFunc that evaluates the region's logic
     AstCFunc* const m_funcp = nullptr;
+    // Is this kit used/required?
+    bool empty() const { return !m_funcp; }
 };
 
 // Create an AstSenTree that is sensitive to the given trigger index. Must not exist yet!
@@ -399,17 +559,6 @@ AstSenTree* createTriggerSenTree(AstNetlist* netlistp, AstVarScope* const vscp,
     return resultp;
 }
 
-//============================================================================
-// Utility for creating profiling statements
-
-AstNodeStmt* profExecSectionPush(FileLine* flp, const string& name) {
-    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPush(\"" + name + "\");\n"};
-};
-
-AstNodeStmt* profExecSectionPop(FileLine* flp) {
-    return new AstCStmt{flp, "VL_EXEC_TRACE_ADD_RECORD(vlSymsp).sectionPop();\n"};
-};
-
 //============================================================================
 // Utility for extra trigger allocation
 
@@ -586,9 +735,7 @@ const TriggerKit createTriggers(AstNetlist* netlistp, AstCFunc* const initFuncp,
         const auto add = [&](const string& text) { blockp->addText(flp, text, true); };
         add("#ifdef VL_DEBUG\n");
         add("if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {\n");
-        AstCCall* const callp = new AstCCall{flp, dumpp};
-        callp->dtypeSetVoid();
-        blockp->addNodesp(callp->makeStmt());
+        blockp->addNodesp(callVoidFunc(dumpp));
         add("}\n");
         add("#endif\n");
     }
@@ -601,116 +748,6 @@ const TriggerKit createTriggers(AstNetlist* netlistp, AstCFunc* const initFuncp,
     return {vscp, funcp, dumpp, map};
 }
 
-//============================================================================
-// EvalLoop contains elements of an evaluation loop created by makeEvalLoop()
-
-struct EvalLoop {
-    // Loop iteration counter for enforcing the converge limit
-    AstVarScope* counterp = nullptr;
-    // The loop condition
-    AstVarScope* continuep = nullptr;
-    // The loop itself and statements around it
-    AstNodeStmt* stmtsp = nullptr;
-};
-
-//============================================================================
-// Helpers to construct an evaluation loop.
-
-AstNodeStmt* buildLoop(AstNetlist* netlistp, AstVarScope* const condp,
-                       const std::function<void(AstWhile*)>& build)  //
-{
-    AstTopScope* const topScopep = netlistp->topScopep();
-    AstScope* const scopeTopp = topScopep->scopep();
-    FileLine* const flp = scopeTopp->fileline();
-    // Initialize the loop condition variable to true
-    AstNodeStmt* const resp = setVar(condp, 1);
-    // Add the loop
-    AstWhile* const loopp = new AstWhile{flp, new AstVarRef{flp, condp, VAccess::READ}};
-    resp->addNext(loopp);
-    // Clear the loop condition variable in the loop
-    loopp->addStmtsp(setVar(condp, 0));
-    // Build the body
-    build(loopp);
-    // Done
-    return resp;
-};
-
-EvalLoop makeEvalLoop(AstNetlist* netlistp, const string& tag, const string& name,
-                      AstVarScope* trigVscp, AstCFunc* trigDumpp,
-                      std::function<AstNodeStmt*()> computeTriggers,
-                      std::function<AstNodeStmt*()> makeBody) {
-    UASSERT_OBJ(trigVscp->dtypep()->basicp()->isTriggerVec(), trigVscp, "Not TRIGGERVEC");
-    AstTopScope* const topScopep = netlistp->topScopep();
-    AstScope* const scopeTopp = topScopep->scopep();
-    FileLine* const flp = scopeTopp->fileline();
-
-    AstVarScope* const counterp = scopeTopp->createTemp("__V" + tag + "IterCount", 32);
-    counterp->varp()->noReset(true);
-
-    AstVarScope* const continuep = scopeTopp->createTemp("__V" + tag + "Continue", 1);
-    continuep->varp()->noReset(true);
-
-    AstNodeStmt* nodep = nullptr;
-    if (v3Global.opt.profExec()) nodep = profExecSectionPush(flp, "loop " + tag);
-    nodep = AstNode::addNext(nodep, setVar(counterp, 0));
-    nodep->addNext(buildLoop(netlistp, continuep, [&](AstWhile* loopp) {
-        // Compute triggers
-        loopp->addStmtsp(computeTriggers());
-        // Invoke body if triggered
-        {
-            AstVarRef* const refp = new AstVarRef{flp, trigVscp, VAccess::READ};
-            AstCMethodHard* const callp = new AstCMethodHard{flp, refp, "any"};
-            callp->dtypeSetBit();
-            AstIf* const ifp = new AstIf{flp, callp};
-            loopp->addStmtsp(ifp);
-            ifp->addThensp(setVar(continuep, 1));
-
-            // If we exceeded the iteration limit, die
-            {
-                const uint32_t limit = v3Global.opt.convergeLimit();
-                AstVarRef* const counterRefp = new AstVarRef{flp, counterp, VAccess::READ};
-                AstConst* const constp = new AstConst{flp, AstConst::DTyped{}, counterp->dtypep()};
-                constp->num().setLong(limit);
-                AstNodeExpr* const condp = new AstGt{flp, counterRefp, constp};
-                AstIf* const failp = new AstIf{flp, condp};
-                failp->branchPred(VBranchPred::BP_UNLIKELY);
-                ifp->addThensp(failp);
-                AstTextBlock* const blockp = new AstTextBlock{flp};
-                failp->addThensp(blockp);
-                FileLine* const locp = netlistp->topModulep()->fileline();
-                const string& file = VIdProtect::protect(locp->filename());
-                const string& line = cvtToStr(locp->lineno());
-                const auto add = [&](const string& text) { blockp->addText(flp, text, true); };
-                add("#ifdef VL_DEBUG\n");
-                AstCCall* const newcallp = new AstCCall{flp, trigDumpp};
-                newcallp->dtypeSetVoid();
-                blockp->addNodesp(newcallp->makeStmt());
-                add("#endif\n");
-                add("VL_FATAL_MT(\"" + V3OutFormatter::quoteNameControls(file) + "\", " + line
-                    + ", \"\", ");
-                add("\"" + name + " region did not converge.\");\n");
-            }
-
-            // Increment iteration count
-            {
-                AstVarRef* const wrefp = new AstVarRef{flp, counterp, VAccess::WRITE};
-                AstVarRef* const rrefp = new AstVarRef{flp, counterp, VAccess::READ};
-                AstConst* const onep = new AstConst{flp, AstConst::DTyped{}, counterp->dtypep()};
-                onep->num().setLong(1);
-                ifp->addThensp(new AstAssign{flp, wrefp, new AstAdd{flp, rrefp, onep}});
-            }
-
-            // Add body
-            ifp->addThensp(makeBody());
-        }
-    }));
-
-    if (v3Global.opt.profExec()) nodep->addNext(profExecSectionPop(flp));
-
-    return {counterp, continuep, nodep};
-}
-
-//============================================================================
 // Order the combinational logic to create the settle loop
 
 void createSettle(AstNetlist* netlistp, AstCFunc* const initFuncp, SenExprBuilder& senExprBulider,
@@ -752,24 +789,20 @@ void createSettle(AstNetlist* netlistp, AstCFunc* const initFuncp, SenExprBuilde
     splitCheck(stlFuncp);
 
     // Create the eval loop
-    const auto& loop = makeEvalLoop(
-        netlistp, "stl", "Settle", trig.m_vscp, trig.m_dumpp,
-        [&]() {  // Trigger
-            AstCCall* const callp = new AstCCall{stlFuncp->fileline(), trig.m_funcp};
-            callp->dtypeSetVoid();
-            return callp->makeStmt();
-        },
-        [&]() {  // Body
-            AstCCall* const callp = new AstCCall{stlFuncp->fileline(), stlFuncp};
-            callp->dtypeSetVoid();
-            return callp->makeStmt();
-        });
+    const EvalLoop stlLoop = createEvalLoop(  //
+        netlistp, "stl", "Settle", /* slow: */ true, trig.m_vscp, trig.m_dumpp,
+        // Inner loop statements
+        nullptr,
+        // Prep statements: Compute the current 'stl' triggers
+        callVoidFunc(trig.m_funcp),
+        // Work statements: Invoke the 'stl' function
+        callVoidFunc(stlFuncp));
 
     // Add the first iteration trigger to the trigger computation function
-    trig.addFirstIterationTriggerAssignment(loop.counterp, firstIterationTrigger);
+    trig.addFirstIterationTriggerAssignment(stlLoop.firstIterp, firstIterationTrigger);
 
     // Add the eval loop to the top function
-    funcp->addStmtsp(loop.stmtsp);
+    funcp->addStmtsp(stlLoop.stmtsp);
 }
 
 //============================================================================
@@ -841,24 +874,19 @@ AstNode* createInputCombLoop(AstNetlist* netlistp, AstCFunc* const initFuncp,
     splitCheck(icoFuncp);
 
     // Create the eval loop
-    const auto& loop = makeEvalLoop(
-        netlistp, "ico", "Input combinational", trig.m_vscp, trig.m_dumpp,
-        [&]() {  // Trigger
-            AstCCall* const callp = new AstCCall{icoFuncp->fileline(), trig.m_funcp};
-            callp->dtypeSetVoid();
-            return callp->makeStmt();
-        },
-        [&]() {  // Body
-            AstCCall* const callp = new AstCCall{icoFuncp->fileline(), icoFuncp};
-            callp->dtypeSetVoid();
-            return callp->makeStmt();
-        });
+    const EvalLoop icoLoop = createEvalLoop(  //
+        netlistp, "ico", "Input combinational", /* slow: */ false, trig.m_vscp, trig.m_dumpp,
+        // Inner loop statements
+        nullptr,
+        // Prep statements: Compute the current 'ico' triggers
+        callVoidFunc(trig.m_funcp),
+        // Work statements: Invoke the 'ico' function
+        callVoidFunc(icoFuncp));
 
     // Add the first iteration trigger to the trigger computation function
-    trig.addFirstIterationTriggerAssignment(loop.counterp, firstIterationTrigger);
+    trig.addFirstIterationTriggerAssignment(icoLoop.firstIterp, firstIterationTrigger);
 
-    // Return the eval loop itself
-    return loop.stmtsp;
+    return icoLoop.stmtsp;
 }
 
 //============================================================================
@@ -906,146 +934,139 @@ void createEval(AstNetlist* netlistp,  //
 ) {
     FileLine* const flp = netlistp->fileline();
 
+    // Create the active eval loop
+    const EvalLoop actLoop = createEvalLoop(  //
+        netlistp, "act", "Active", /* slow: */ false, actKit.m_vscp, actKit.m_dumpp,
+        // Inner loop statements
+        nullptr,
+        // Prep statements
+        [&]() {
+            // Compute the current 'act' triggers
+            AstNodeStmt* const stmtsp = callVoidFunc(actKit.m_triggerComputep);
+            // Commit trigger awaits from the previous iteration
+            if (AstCCall* const commitp = timingKit.createCommit(netlistp)) {
+                stmtsp->addNext(commitp->makeStmt());
+            }
+            //
+            return stmtsp;
+        }(),
+        // Work statements
+        [&]() {
+            // Compute the 'pre' triggers
+            AstNodeStmt* const workp
+                = createTriggerAndNotCall(flp, preTrigsp, actKit.m_vscp, nbaKit.m_vscp);
+            // Latch the 'act' triggers under the 'nba' triggers
+            workp->addNext(createTriggerSetCall(flp, nbaKit.m_vscp, actKit.m_vscp));
+            // Resume triggered timing schedulers
+            if (AstCCall* const resumep = timingKit.createResume(netlistp)) {
+                workp->addNext(resumep->makeStmt());
+            }
+            // Invoke the 'act' function
+            workp->addNext(callVoidFunc(actKit.m_funcp));
+            //
+            return workp;
+        }());
+
+    // Create the NBA eval loop, which is the default top level loop.
+    EvalLoop topLoop = createEvalLoop(  //
+        netlistp, "nba", "NBA", /* slow: */ false, nbaKit.m_vscp, nbaKit.m_dumpp,
+        // Inner loop statements
+        actLoop.stmtsp,
+        // Prep statements
+        nullptr,
+        // Work statements
+        [&]() {
+            AstNodeStmt* workp = nullptr;
+            // Latch the 'nba' trigger flags under the following region's trigger flags
+            if (!obsKit.empty()) {
+                workp = createTriggerSetCall(flp, obsKit.m_vscp, nbaKit.m_vscp);
+            } else if (!reactKit.empty()) {
+                workp = createTriggerSetCall(flp, reactKit.m_vscp, nbaKit.m_vscp);
+            }
+            // Invoke the 'nba' function
+            workp = AstNode::addNext(workp, callVoidFunc(nbaKit.m_funcp));
+            // Clear the 'nba' triggers
+            workp->addNext(createTriggerClearCall(flp, nbaKit.m_vscp));
+            //
+            return workp;
+        }());
+
+    // If the NBA event exists, trigger it in 'nba'
+    if (AstVarScope* const nbaEventp = netlistp->nbaEventp()) {
+        AstVarScope* const nbaEventTriggerp = netlistp->nbaEventTriggerp();
+        UASSERT(nbaEventTriggerp, "NBA event trigger var should exist");
+        netlistp->nbaEventp(nullptr);
+        netlistp->nbaEventTriggerp(nullptr);
+
+        AstIf* const ifp = new AstIf{flp, new AstVarRef{flp, nbaEventTriggerp, VAccess::READ}};
+        ifp->addThensp(setVar(topLoop.continuep, 1));
+        ifp->addThensp(setVar(nbaEventTriggerp, 0));
+        AstCMethodHard* const firep
+            = new AstCMethodHard{flp, new AstVarRef{flp, nbaEventp, VAccess::WRITE}, "fire"};
+        firep->dtypeSetVoid();
+        ifp->addThensp(firep->makeStmt());
+        // actLoop.stmtsp happens to be the head of the loop body inside the NBA loop...
+        actLoop.stmtsp->addNext(ifp);
+    }
+
+    if (!obsKit.empty()) {
+        // Create the Observed eval loop, which becomes the top level loop.
+        topLoop = createEvalLoop(  //
+            netlistp, "obs", "Observed", /* slow: */ false, obsKit.m_vscp, obsKit.m_dumpp,
+            // Inner loop statements
+            topLoop.stmtsp,
+            // Prep statements
+            nullptr,
+            // Work statements
+            [&]() {
+                AstNodeStmt* workp = nullptr;
+                // Latch the Observed trigger flags under the Reactive trigger flags
+                if (!reactKit.empty()) {
+                    workp = createTriggerSetCall(flp, reactKit.m_vscp, obsKit.m_vscp);
+                }
+                // Invoke the 'obs' function
+                workp = AstNode::addNext(workp, callVoidFunc(obsKit.m_funcp));
+                // Clear the 'obs' triggers
+                workp->addNext(createTriggerClearCall(flp, obsKit.m_vscp));
+                //
+                return workp;
+            }());
+    }
+
+    if (!reactKit.empty()) {
+        // Create the Reactive eval loop, which becomes the top level loop.
+        topLoop = createEvalLoop(  //
+            netlistp, "react", "Reactive", /* slow: */ false, reactKit.m_vscp, reactKit.m_dumpp,
+            // Inner loop statements
+            topLoop.stmtsp,
+            // Prep statements
+            nullptr,
+            // Work statements
+            [&]() {
+                // Invoke the 'react' function
+                AstNodeStmt* const workp = callVoidFunc(reactKit.m_funcp);
+                // Clear the 'react' triggers
+                workp->addNext(createTriggerClearCall(flp, reactKit.m_vscp));
+                return workp;
+            }());
+    }
+
+    // Now that we have build the loops, create the main 'eval' function
     AstCFunc* const funcp = makeTopFunction(netlistp, "_eval", false);
     netlistp->evalp(funcp);
 
+    if (v3Global.opt.profExec()) funcp->addStmtsp(profExecSectionPush(flp, "eval"));
+
     // Start with the ico loop, if any
     if (icoLoop) funcp->addStmtsp(icoLoop);
 
-    // Create the active eval loop
-    const auto& activeEvalLoop = makeEvalLoop(
-        netlistp, "act", "Active", actKit.m_vscp, actKit.m_dumpp,
-        [&]() {  // Trigger
-            AstNodeStmt* resultp = nullptr;
-
-            // Compute the current triggers
-            {
-                AstCCall* const trigsp = new AstCCall{flp, actKit.m_triggerComputep};
-                trigsp->dtypeSetVoid();
-                resultp = AstNode::addNext(resultp, trigsp->makeStmt());
-            }
-
-            // Commit trigger awaits from the previous iteration
-            if (AstCCall* const commitp = timingKit.createCommit(netlistp)) {
-                resultp = AstNode::addNext(resultp, commitp->makeStmt());
-            }
-
-            return resultp;
-        },
-        [&]() {  // Body
-            // Compute the pre triggers
-            AstNodeStmt* resultp
-                = createTriggerAndNotCall(flp, preTrigsp, actKit.m_vscp, nbaKit.m_vscp);
-            // Latch the active trigger flags under the NBA trigger flags
-            resultp = AstNode::addNext(resultp,
-                                       createTriggerSetCall(flp, nbaKit.m_vscp, actKit.m_vscp));
-            // Resume triggered timing schedulers
-            if (AstCCall* const resumep = timingKit.createResume(netlistp)) {
-                resultp = AstNode::addNext(resultp, resumep->makeStmt());
-            }
-            // Invoke body function
-            {
-                AstCCall* const callp = new AstCCall{flp, actKit.m_funcp};
-                callp->dtypeSetVoid();
-                resultp = AstNode::addNext(resultp, callp->makeStmt());
-            }
-
-            return resultp;
-        });
-
-    // Create the NBA eval loop. This uses the Active eval loop in the trigger section.
-    const auto& nbaEvalLoop = makeEvalLoop(
-        netlistp, "nba", "NBA", nbaKit.m_vscp, nbaKit.m_dumpp,
-        [&]() {  // Trigger
-            // Reset NBA triggers
-            AstNodeStmt* resultp = createTriggerClearCall(flp, nbaKit.m_vscp);
-            // Run the Active eval loop
-            resultp = AstNode::addNext(resultp, activeEvalLoop.stmtsp);
-            return resultp;
-        },
-        [&]() {  // Body
-            AstCCall* const callp = new AstCCall{flp, nbaKit.m_funcp};
-            callp->dtypeSetVoid();
-            AstNodeStmt* resultp = callp->makeStmt();
-            // Latch the NBA trigger flags under the following region's trigger flags
-            AstVarScope* const nextVscp = obsKit.m_vscp ? obsKit.m_vscp : reactKit.m_vscp;
-            if (nextVscp) {
-                resultp = AstNode::addNext(resultp,
-                                           createTriggerSetCall(flp, nextVscp, nbaKit.m_vscp));
-            }
-            return resultp;
-        });
-
-    // If the NBA event exists, trigger it in 'nba'
-    if (netlistp->nbaEventp()) {
-        UASSERT(netlistp->nbaEventTriggerp(), "NBA event trigger var should exist");
-        AstIf* const ifp
-            = new AstIf{flp, new AstVarRef{flp, netlistp->nbaEventTriggerp(), VAccess::READ}};
-        ifp->addThensp(setVar(nbaEvalLoop.continuep, 1));
-        ifp->addThensp(setVar(netlistp->nbaEventTriggerp(), 0));
-        AstCMethodHard* const firep = new AstCMethodHard{
-            flp, new AstVarRef{flp, netlistp->nbaEventp(), VAccess::WRITE}, "fire"};
-        firep->dtypeSetVoid();
-        ifp->addThensp(firep->makeStmt());
-        activeEvalLoop.stmtsp->addNext(ifp);
-        netlistp->nbaEventp(nullptr);
-        netlistp->nbaEventTriggerp(nullptr);
-    }
-
-    AstNodeStmt* topEvalLoopp = nbaEvalLoop.stmtsp;
-
-    if (obsKit.m_funcp) {
-        // Create the Observed eval loop. This uses the NBA eval loop in the trigger section.
-        topEvalLoopp
-            = makeEvalLoop(
-                  netlistp, "obs", "Observed", obsKit.m_vscp, obsKit.m_dumpp,
-                  [&]() {  // Trigger
-                      // Reset Observed triggers
-                      AstNodeStmt* resultp = createTriggerClearCall(flp, obsKit.m_vscp);
-                      // Run the NBA eval loop
-                      resultp = AstNode::addNext(resultp, topEvalLoopp);
-                      return resultp;
-                  },
-                  [&]() {  // Body
-                      AstCCall* const callp = new AstCCall{flp, obsKit.m_funcp};
-                      callp->dtypeSetVoid();
-                      AstNodeStmt* resultp = callp->makeStmt();
-                      // Latch the Observed trigger flags under the Reactive trigger flags
-                      if (reactKit.m_vscp) {
-                          resultp = AstNode::addNext(
-                              resultp, createTriggerSetCall(flp, reactKit.m_vscp, obsKit.m_vscp));
-                      }
-                      return resultp;
-                  })
-                  .stmtsp;
-    }
-
-    if (reactKit.m_funcp) {
-        // Create the Reactive eval loop. This uses the previous eval loop in the trigger section.
-        topEvalLoopp = makeEvalLoop(
-                           netlistp, "react", "Reactive", reactKit.m_vscp, reactKit.m_dumpp,
-                           [&]() {  // Trigger
-                               // Reset Reactive triggers
-                               AstNodeStmt* resultp = createTriggerClearCall(flp, reactKit.m_vscp);
-                               // Run the previous eval loop
-                               resultp = AstNode::addNext(resultp, topEvalLoopp);
-                               return resultp;
-                           },
-                           [&]() {  // Body
-                               auto* const callp = new AstCCall{flp, reactKit.m_funcp};
-                               callp->dtypeSetVoid();
-                               return callp->makeStmt();
-                           })
-                           .stmtsp;
-    }
-    funcp->addStmtsp(topEvalLoopp);
+    // Execute the top level eval loop
+    funcp->addStmtsp(topLoop.stmtsp);
 
     // Add the Postponed eval call
-    if (postponedFuncp) {
-        AstCCall* const callp = new AstCCall{flp, postponedFuncp};
-        callp->dtypeSetVoid();
-        funcp->addStmtsp(callp->makeStmt());
-    }
+    if (postponedFuncp) funcp->addStmtsp(callVoidFunc(postponedFuncp));
+
+    if (v3Global.opt.profExec()) funcp->addStmtsp(profExecSectionPop(flp));
 }
 
 }  // namespace
@@ -1061,7 +1082,7 @@ void schedule(AstNetlist* netlistp) {
     };
 
     // Step 0. Prepare timing-related logic and external domains
-    auto timingKit = prepareTiming(netlistp);
+    TimingKit timingKit = prepareTiming(netlistp);
 
     // Step 1. Gather and classify all logic in the design
     LogicClasses logicClasses = gatherLogicClasses(netlistp);
diff --git a/test_regress/t/t_protect_ids_key.out b/test_regress/t/t_protect_ids_key.out
index 117c4a728..2c815ea62 100644
--- a/test_regress/t/t_protect_ids_key.out
+++ b/test_regress/t/t_protect_ids_key.out
@@ -12,6 +12,7 @@
   <map from="PStVCQ" to="__PVT__secret_r"/>
   <map from="PSfqS0" to="__PVT__t__DOT__secret_inst"/>
   <map from="PSS0mv" to="__VactContinue"/>
+  <map from="PSb9ZF" to="__VactExecute"/>
   <map from="PSF5NB" to="__VactIterCount"/>
   <map from="PSScAO" to="__VactTriggered"/>
   <map from="PSx9Nt" to="__Vconfigure"/>
@@ -23,6 +24,7 @@
   <map from="PSIv2l" to="__Vdpiimwrap_dpii_a_task_TOP__t__DOT__secret_inst"/>
   <map from="PS76My" to="__Vfunc_dpii_a_func__0__Vfuncout"/>
   <map from="PSPVnC" to="__VnbaContinue"/>
+  <map from="PSo9XV" to="__VnbaExecute"/>
   <map from="PSEtOH" to="__VnbaIterCount"/>
   <map from="PSmzsT" to="__VnbaTriggered"/>
   <map from="PSHzgK" to="__VpreTriggered"/>
@@ -38,6 +40,8 @@
   <map from="PSEZzj" to="_eval_final"/>
   <map from="PSABAY" to="_eval_initial"/>
   <map from="PSjoVa" to="_eval_nba"/>
+  <map from="PS0BBP" to="_eval_phase__act"/>
+  <map from="PSfNDT" to="_eval_phase__nba"/>
   <map from="PSBUJ6" to="_eval_settle"/>
   <map from="PS0mmd" to="_eval_static"/>
   <map from="PS9gCw" to="_eval_triggers__act"/>
diff --git a/test_regress/t/t_timing_debug1.out b/test_regress/t/t_timing_debug1.out
index 540f6e60d..446a374ed 100644
--- a/test_regress/t/t_timing_debug1.out
+++ b/test_regress/t/t_timing_debug1.out
@@ -14,6 +14,7 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_initial__TOP__3
 -V{t#,#}+    Vt_timing_debug1___024root___eval_settle
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__stl
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__stl
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__stl
 -V{t#,#}         'stl' region trigger index 0 is active: Internal 'stl' trigger - first iteration
@@ -29,11 +30,13 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
 -V{t#,#}+    Vt_timing_debug1___024root___stl_comb__TOP__2
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__stl
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__stl
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__stl
 -V{t#,#}         No triggers active
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -52,20 +55,25 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -82,6 +90,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -90,6 +99,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -107,24 +117,29 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:18
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -140,6 +155,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -148,21 +164,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -179,23 +200,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -210,6 +236,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -218,6 +245,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -231,22 +259,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -263,6 +296,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:13
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 1 is active: @([hybrid] __VassignWtmp_t.clk2__0)
@@ -271,6 +305,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 5 is active: @(posedge t.clk2)
@@ -287,6 +322,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 2 is active: @([hybrid] t.c1)
@@ -296,21 +332,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___timing_resume
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -328,6 +369,7 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -338,21 +380,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -368,23 +415,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -398,6 +450,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -406,6 +459,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -423,24 +477,29 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:18
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -455,6 +514,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -463,21 +523,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -493,23 +558,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -523,6 +593,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -531,6 +602,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -544,22 +616,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -574,6 +651,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:13
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 1 is active: @([hybrid] __VassignWtmp_t.clk2__0)
@@ -582,21 +660,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -611,6 +694,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -619,21 +703,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -649,23 +738,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -679,6 +773,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -687,6 +782,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -700,22 +796,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -730,6 +831,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -738,21 +840,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -768,23 +875,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -799,6 +911,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -810,6 +923,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -832,6 +946,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 2 is active: @([hybrid] t.c1)
@@ -841,22 +956,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___timing_resume
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -873,23 +993,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:50
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -904,6 +1029,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -912,21 +1038,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -942,23 +1073,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -972,6 +1108,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -980,6 +1117,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -997,24 +1135,29 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:18
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1029,6 +1172,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1037,21 +1181,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1067,23 +1216,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1097,6 +1251,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:13
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 1 is active: @([hybrid] __VassignWtmp_t.clk2__0)
@@ -1105,21 +1260,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1133,6 +1293,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1141,6 +1302,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1154,22 +1316,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1184,6 +1351,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1192,21 +1360,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1222,23 +1395,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1252,6 +1430,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1260,6 +1439,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1273,22 +1453,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1303,6 +1488,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1311,21 +1497,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1342,6 +1533,7 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 1 is active: @([hybrid] __VassignWtmp_t.clk2__0)
@@ -1352,6 +1544,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 5 is active: @(posedge t.clk2)
@@ -1368,6 +1561,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 2 is active: @([hybrid] t.c1)
@@ -1377,21 +1571,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___timing_resume
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1407,23 +1606,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:50
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1437,6 +1641,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1445,6 +1650,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1462,24 +1668,29 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk2):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:18
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1494,6 +1705,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1502,21 +1714,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1532,23 +1749,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1562,6 +1784,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1570,6 +1793,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1583,22 +1807,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1614,6 +1843,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1625,21 +1855,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1655,23 +1890,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1685,6 +1925,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1693,6 +1934,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1706,22 +1948,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1736,6 +1983,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1744,21 +1992,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1774,23 +2027,28 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk1) at t/t_timing_sched.v:17
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @(posedge t.clk1):
 -V{t#,#}           - Process waiting at t/t_timing_sched.v:17
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1804,6 +2062,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1812,6 +2071,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 3 is active: @(posedge t.clk1)
@@ -1825,22 +2085,27 @@
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___nba_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1855,6 +2120,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:13
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 1 is active: @([hybrid] __VassignWtmp_t.clk2__0)
@@ -1863,6 +2129,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__1____Vfork_2__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 5 is active: @(posedge t.clk2)
@@ -1879,6 +2146,7 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__1
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 2 is active: @([hybrid] t.c1)
@@ -1888,21 +2156,26 @@
 -V{t#,#}+    Vt_timing_debug1___024root___timing_resume
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__2
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug1::eval_step
 -V{t#,#}+    Vt_timing_debug1___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug1___024root___eval
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 4 is active: @([true] __VdlySched.awaitingCurrentTime())
@@ -1922,6 +2195,7 @@
 -V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] __VassignWtmp_t.clk1__0)
@@ -1932,15 +2206,19 @@
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0____Vfork_1__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug1___024root___eval_nba
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug1___024root___eval_triggers__act
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug1___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+    Vt_timing_debug1___024root___eval_final
diff --git a/test_regress/t/t_timing_debug2.out b/test_regress/t/t_timing_debug2.out
index 02f53ec34..763d17a89 100644
--- a/test_regress/t/t_timing_debug2.out
+++ b/test_regress/t/t_timing_debug2.out
@@ -79,6 +79,7 @@
 -V{t#,#}+    Vt_timing_debug2___024root___eval_settle
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:97
@@ -89,11 +90,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
 -V{t#,#}         Committing processes waiting for @([event] t.ec.e):
 -V{t#,#}           - Process waiting at t/t_timing_class.v:111
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:97
@@ -118,6 +121,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:97
@@ -132,6 +136,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:97
 -V{t#,#}         Suspending process waiting for @(posedge t::ClkClass.clk) at t/t_timing_class.v:98
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -140,7 +145,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -149,11 +156,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -183,6 +192,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -191,7 +201,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -200,11 +212,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -228,6 +242,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:98
@@ -242,6 +257,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:98
 -V{t#,#}         Suspending process waiting for @(posedge t::ClkClass.clk) at t/t_timing_class.v:99
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -250,7 +266,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -259,11 +277,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -293,6 +313,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -309,6 +330,7 @@
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aEventClass::__VnoInFunc_sleep
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -325,9 +347,11 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
 -V{t#,#}+      Vt_timing_debug2_t___nba_sequent__TOP__t__0
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aEventClass::__VnoInFunc_inc_trig_count
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -344,11 +368,13 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -378,6 +404,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:99
@@ -400,6 +427,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:99
 -V{t#,#}         Suspending process waiting for @(posedge t::ClkClass.clk) at t/t_timing_class.v:100
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:37
@@ -416,7 +444,9 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -433,11 +463,13 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -472,6 +504,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:257
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aForkDelayClass::__VnoInFunc_do_delay
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -488,7 +521,9 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -505,11 +540,13 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -539,6 +576,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:100
@@ -561,6 +599,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:100
 -V{t#,#}         Suspending process waiting for @(posedge t::ClkClass.clk) at t/t_timing_class.v:101
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:37
@@ -577,7 +616,9 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -594,11 +635,13 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:37
 -V{t#,#}         Suspending process waiting for @([event] t::EventClass.e) at t/t_timing_class.v:37
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -629,6 +672,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -656,6 +700,7 @@
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aWaitClass::__VnoInFunc_await
 -V{t#,#}         Suspending process waiting for @([true] ((32'sh4 == t::WaitClass.a) & (32'sh10 < t::WaitClass.b))) at t/t_timing_class.v:58
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -668,9 +713,11 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
 -V{t#,#}+      Vt_timing_debug2_t___nba_sequent__TOP__t__0
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aEventClass::__VnoInFunc_inc_trig_count
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -683,11 +730,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -712,6 +761,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
@@ -729,6 +779,7 @@
 -V{t#,#}           - Process waiting at t/t_timing_class.v:101
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:101
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -737,7 +788,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -746,11 +799,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -772,6 +827,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -780,7 +836,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -789,11 +847,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -814,6 +874,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -822,7 +883,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -831,11 +894,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -857,6 +922,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:58
@@ -875,6 +941,7 @@
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aLocalWaitClass::__VnoInFunc_await____Vfork_1__1
 -V{t#,#}             Awaiting join of fork at: t/t_timing_class.v:74
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -883,7 +950,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -892,11 +961,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -917,6 +988,7 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -925,7 +997,9 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -934,11 +1008,13 @@
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -972,6 +1048,7 @@
 -V{t#,#}+      Vt_timing_debug2_t___eval_initial__TOP__t__6____Vfork_1__0
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aAssignDelayClass::__VnoInFunc_do_assign
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         Suspended processes waiting for dynamic trigger evaluation:
 -V{t#,#}           - Process waiting at t/t_timing_class.v:75
@@ -987,17 +1064,21 @@
 -V{t#,#}             Process forked at t/t_timing_class.v:75 finished
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:74
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
@@ -1005,6 +1086,7 @@
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aForkClass::~
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1022,22 +1104,27 @@
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:224
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1057,22 +1144,27 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1089,22 +1181,27 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1121,23 +1218,28 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aAssignDelayClass::~
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1152,22 +1254,27 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_timing_debug2::eval_step
 -V{t#,#}+    Vt_timing_debug2___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_timing_debug2___024root___eval
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
@@ -1184,17 +1291,21 @@
 -V{t#,#}             Resuming: Process waiting at t/t_timing_class.v:131
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aClkClass::__VnoInFunc_flip
 -V{t#,#}+    Vt_timing_debug2___024root___eval_act
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}+    Vt_timing_debug2___024root___eval_nba
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__act
 -V{t#,#}+    Vt_timing_debug2___024root___eval_triggers__act
 -V{t#,#}         No suspended processes waiting for dynamic trigger evaluation
 -V{t#,#}+    Vt_timing_debug2___024root___dump_triggers__act
 -V{t#,#}         No triggers active
 -V{t#,#}+    Vt_timing_debug2___024root___timing_commit
+-V{t#,#}+    Vt_timing_debug2___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+    Vt_timing_debug2___024root___eval_final
 -V{t#,#}+        Vt_timing_debug2_t__03a__03aDelay40::~
diff --git a/test_regress/t/t_verilated_debug.out b/test_regress/t/t_verilated_debug.out
index ef9dbeddd..910da3565 100644
--- a/test_regress/t/t_verilated_debug.out
+++ b/test_regress/t/t_verilated_debug.out
@@ -15,26 +15,33 @@ internalsDump:
 -V{t#,#}+    Vt_verilated_debug___024root___eval_settle
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__act
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act
 -V{t#,#}+    Vt_verilated_debug___024root___dump_triggers__act
 -V{t#,#}         No triggers active
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+++++TOP Evaluate Vt_verilated_debug::eval_step
 -V{t#,#}+    Vt_verilated_debug___024root___eval_debug_assertions
 -V{t#,#}+ Eval
 -V{t#,#}+    Vt_verilated_debug___024root___eval
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__act
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act
 -V{t#,#}+    Vt_verilated_debug___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @(posedge clk)
 -V{t#,#}+    Vt_verilated_debug___024root___eval_act
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__act
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act
 -V{t#,#}+    Vt_verilated_debug___024root___dump_triggers__act
 -V{t#,#}         No triggers active
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__nba
 -V{t#,#}+    Vt_verilated_debug___024root___eval_nba
 -V{t#,#}+    Vt_verilated_debug___024root___nba_sequent__TOP__0
 *-* All Finished *-*
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__act
 -V{t#,#}+    Vt_verilated_debug___024root___eval_triggers__act
 -V{t#,#}+    Vt_verilated_debug___024root___dump_triggers__act
 -V{t#,#}         No triggers active
+-V{t#,#}+    Vt_verilated_debug___024root___eval_phase__nba
 -V{t#,#}End-of-eval cleanup
 -V{t#,#}+    Vt_verilated_debug___024root___eval_final
diff --git a/test_regress/t/t_xml_debugcheck.out b/test_regress/t/t_xml_debugcheck.out
index b50189df9..18f3dbde7 100644
--- a/test_regress/t/t_xml_debugcheck.out
+++ b/test_regress/t/t_xml_debugcheck.out
@@ -625,8 +625,8 @@
         <textblock loc="d,10,8,10,9">
           <text loc="d,10,8,10,9"/>
           <text loc="d,10,8,10,9"/>
-          <stmtexpr loc="d,10,8,10,9">
-            <ccall loc="d,10,8,10,9" dtype_id="7" func="_dump_triggers__act"/>
+          <stmtexpr loc="a,0,0,0,0">
+            <ccall loc="a,0,0,0,0" dtype_id="7" func="_dump_triggers__act"/>
           </stmtexpr>
           <text loc="d,10,8,10,9"/>
           <text loc="d,10,8,10,9"/>
@@ -1527,8 +1527,69 @@
           </begin>
         </if>
       </cfunc>
-      <cfunc loc="a,0,0,0,0" name="_eval">
+      <cfunc loc="a,0,0,0,0" name="_eval_phase__act">
         <var loc="d,10,8,10,9" name="__VpreTriggered" dtype_id="6" vartype="VlTriggerVec" origName="__VpreTriggered"/>
+        <var loc="d,10,8,10,9" name="__VactExecute" dtype_id="3" vartype="bit" origName="__VactExecute"/>
+        <stmtexpr loc="a,0,0,0,0">
+          <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_triggers__act"/>
+        </stmtexpr>
+        <assign loc="a,0,0,0,0" dtype_id="9">
+          <cmethodhard loc="a,0,0,0,0" name="any" dtype_id="9">
+            <varref loc="a,0,0,0,0" name="__VactTriggered" dtype_id="9"/>
+          </cmethodhard>
+          <varref loc="a,0,0,0,0" name="__VactExecute" dtype_id="9"/>
+        </assign>
+        <if loc="a,0,0,0,0">
+          <varref loc="a,0,0,0,0" name="__VactExecute" dtype_id="9"/>
+          <begin>
+            <stmtexpr loc="a,0,0,0,0">
+              <cmethodhard loc="a,0,0,0,0" name="andNot" dtype_id="7">
+                <varref loc="a,0,0,0,0" name="__VpreTriggered" dtype_id="9"/>
+                <varref loc="a,0,0,0,0" name="__VactTriggered" dtype_id="9"/>
+                <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
+              </cmethodhard>
+            </stmtexpr>
+            <stmtexpr loc="a,0,0,0,0">
+              <cmethodhard loc="a,0,0,0,0" name="thisOr" dtype_id="7">
+                <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
+                <varref loc="a,0,0,0,0" name="__VactTriggered" dtype_id="9"/>
+              </cmethodhard>
+            </stmtexpr>
+            <stmtexpr loc="a,0,0,0,0">
+              <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_act"/>
+            </stmtexpr>
+          </begin>
+        </if>
+        <creturn loc="a,0,0,0,0">
+          <varref loc="a,0,0,0,0" name="__VactExecute" dtype_id="9"/>
+        </creturn>
+      </cfunc>
+      <cfunc loc="a,0,0,0,0" name="_eval_phase__nba">
+        <var loc="d,10,8,10,9" name="__VnbaExecute" dtype_id="3" vartype="bit" origName="__VnbaExecute"/>
+        <assign loc="a,0,0,0,0" dtype_id="9">
+          <cmethodhard loc="a,0,0,0,0" name="any" dtype_id="9">
+            <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
+          </cmethodhard>
+          <varref loc="a,0,0,0,0" name="__VnbaExecute" dtype_id="9"/>
+        </assign>
+        <if loc="a,0,0,0,0">
+          <varref loc="a,0,0,0,0" name="__VnbaExecute" dtype_id="9"/>
+          <begin>
+            <stmtexpr loc="a,0,0,0,0">
+              <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_nba"/>
+            </stmtexpr>
+            <stmtexpr loc="a,0,0,0,0">
+              <cmethodhard loc="a,0,0,0,0" name="clear" dtype_id="7">
+                <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
+              </cmethodhard>
+            </stmtexpr>
+          </begin>
+        </if>
+        <creturn loc="a,0,0,0,0">
+          <varref loc="a,0,0,0,0" name="__VnbaExecute" dtype_id="9"/>
+        </creturn>
+      </cfunc>
+      <cfunc loc="a,0,0,0,0" name="_eval">
         <var loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5" vartype="bit" origName="__VnbaIterCount"/>
         <var loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="3" vartype="bit" origName="__VnbaContinue"/>
         <assign loc="d,10,8,10,9" dtype_id="5">
@@ -1539,22 +1600,43 @@
           <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
           <varref loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="9"/>
         </assign>
-        <while loc="d,10,8,10,9">
+        <while loc="a,0,0,0,0">
           <begin>
           </begin>
           <begin>
-            <varref loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="9"/>
+            <varref loc="a,0,0,0,0" name="__VnbaContinue" dtype_id="9"/>
           </begin>
           <begin>
+            <if loc="a,0,0,0,0">
+              <lt loc="a,0,0,0,0" dtype_id="9">
+                <const loc="a,0,0,0,0" name="32&apos;h64" dtype_id="14"/>
+                <varref loc="a,0,0,0,0" name="__VnbaIterCount" dtype_id="5"/>
+              </lt>
+              <begin>
+                <textblock loc="a,0,0,0,0">
+                  <text loc="a,0,0,0,0"/>
+                  <stmtexpr loc="a,0,0,0,0">
+                    <ccall loc="a,0,0,0,0" dtype_id="7" func="_dump_triggers__nba"/>
+                  </stmtexpr>
+                  <text loc="a,0,0,0,0"/>
+                  <text loc="a,0,0,0,0"/>
+                  <text loc="a,0,0,0,0"/>
+                </textblock>
+              </begin>
+            </if>
+            <assign loc="d,10,8,10,9" dtype_id="5">
+              <add loc="d,10,8,10,9" dtype_id="5">
+                <ccast loc="d,10,8,10,9" dtype_id="14">
+                  <const loc="d,10,8,10,9" name="32&apos;h1" dtype_id="14"/>
+                </ccast>
+                <varref loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5"/>
+              </add>
+              <varref loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5"/>
+            </assign>
             <assign loc="d,10,8,10,9" dtype_id="9">
               <const loc="d,10,8,10,9" name="1&apos;h0" dtype_id="9"/>
               <varref loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="9"/>
             </assign>
-            <stmtexpr loc="a,0,0,0,0">
-              <cmethodhard loc="a,0,0,0,0" name="clear" dtype_id="7">
-                <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
-              </cmethodhard>
-            </stmtexpr>
             <assign loc="d,10,8,10,9" dtype_id="5">
               <const loc="d,10,8,10,9" name="32&apos;h0" dtype_id="14"/>
               <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
@@ -1563,98 +1645,27 @@
               <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
               <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
             </assign>
-            <while loc="d,10,8,10,9">
+            <while loc="a,0,0,0,0">
               <begin>
               </begin>
               <begin>
-                <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
+                <varref loc="a,0,0,0,0" name="__VactContinue" dtype_id="9"/>
               </begin>
               <begin>
-                <assign loc="d,10,8,10,9" dtype_id="9">
-                  <const loc="d,10,8,10,9" name="1&apos;h0" dtype_id="9"/>
-                  <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
-                </assign>
-                <stmtexpr loc="a,0,0,0,0">
-                  <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_triggers__act"/>
-                </stmtexpr>
-                <if loc="d,10,8,10,9">
-                  <cmethodhard loc="d,10,8,10,9" name="any" dtype_id="9">
-                    <varref loc="d,10,8,10,9" name="__VactTriggered" dtype_id="9"/>
-                  </cmethodhard>
-                  <begin>
-                    <assign loc="d,10,8,10,9" dtype_id="9">
-                      <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
-                      <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
-                    </assign>
-                    <if loc="d,10,8,10,9">
-                      <lt loc="d,10,8,10,9" dtype_id="9">
-                        <const loc="d,10,8,10,9" name="32&apos;h64" dtype_id="14"/>
-                        <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
-                      </lt>
-                      <begin>
-                        <textblock loc="d,10,8,10,9">
-                          <text loc="d,10,8,10,9"/>
-                          <stmtexpr loc="d,10,8,10,9">
-                            <ccall loc="d,10,8,10,9" dtype_id="7" func="_dump_triggers__act"/>
-                          </stmtexpr>
-                          <text loc="d,10,8,10,9"/>
-                          <text loc="d,10,8,10,9"/>
-                          <text loc="d,10,8,10,9"/>
-                        </textblock>
-                      </begin>
-                    </if>
-                    <assign loc="d,10,8,10,9" dtype_id="5">
-                      <add loc="d,10,8,10,9" dtype_id="5">
-                        <ccast loc="d,10,8,10,9" dtype_id="14">
-                          <const loc="d,10,8,10,9" name="32&apos;h1" dtype_id="14"/>
-                        </ccast>
-                        <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
-                      </add>
-                      <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
-                    </assign>
-                    <stmtexpr loc="a,0,0,0,0">
-                      <cmethodhard loc="a,0,0,0,0" name="andNot" dtype_id="7">
-                        <varref loc="a,0,0,0,0" name="__VpreTriggered" dtype_id="9"/>
-                        <varref loc="a,0,0,0,0" name="__VactTriggered" dtype_id="9"/>
-                        <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
-                      </cmethodhard>
-                    </stmtexpr>
-                    <stmtexpr loc="a,0,0,0,0">
-                      <cmethodhard loc="a,0,0,0,0" name="thisOr" dtype_id="7">
-                        <varref loc="a,0,0,0,0" name="__VnbaTriggered" dtype_id="9"/>
-                        <varref loc="a,0,0,0,0" name="__VactTriggered" dtype_id="9"/>
-                      </cmethodhard>
-                    </stmtexpr>
-                    <stmtexpr loc="a,0,0,0,0">
-                      <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_act"/>
-                    </stmtexpr>
-                  </begin>
-                </if>
-              </begin>
-            </while>
-            <if loc="d,10,8,10,9">
-              <cmethodhard loc="d,10,8,10,9" name="any" dtype_id="9">
-                <varref loc="d,10,8,10,9" name="__VnbaTriggered" dtype_id="9"/>
-              </cmethodhard>
-              <begin>
-                <assign loc="d,10,8,10,9" dtype_id="9">
-                  <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
-                  <varref loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="9"/>
-                </assign>
-                <if loc="d,10,8,10,9">
-                  <lt loc="d,10,8,10,9" dtype_id="9">
-                    <const loc="d,10,8,10,9" name="32&apos;h64" dtype_id="14"/>
-                    <varref loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5"/>
+                <if loc="a,0,0,0,0">
+                  <lt loc="a,0,0,0,0" dtype_id="9">
+                    <const loc="a,0,0,0,0" name="32&apos;h64" dtype_id="14"/>
+                    <varref loc="a,0,0,0,0" name="__VactIterCount" dtype_id="5"/>
                   </lt>
                   <begin>
-                    <textblock loc="d,10,8,10,9">
-                      <text loc="d,10,8,10,9"/>
-                      <stmtexpr loc="d,10,8,10,9">
-                        <ccall loc="d,10,8,10,9" dtype_id="7" func="_dump_triggers__nba"/>
+                    <textblock loc="a,0,0,0,0">
+                      <text loc="a,0,0,0,0"/>
+                      <stmtexpr loc="a,0,0,0,0">
+                        <ccall loc="a,0,0,0,0" dtype_id="7" func="_dump_triggers__act"/>
                       </stmtexpr>
-                      <text loc="d,10,8,10,9"/>
-                      <text loc="d,10,8,10,9"/>
-                      <text loc="d,10,8,10,9"/>
+                      <text loc="a,0,0,0,0"/>
+                      <text loc="a,0,0,0,0"/>
+                      <text loc="a,0,0,0,0"/>
                     </textblock>
                   </begin>
                 </if>
@@ -1663,13 +1674,32 @@
                     <ccast loc="d,10,8,10,9" dtype_id="14">
                       <const loc="d,10,8,10,9" name="32&apos;h1" dtype_id="14"/>
                     </ccast>
-                    <varref loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5"/>
+                    <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
                   </add>
-                  <varref loc="d,10,8,10,9" name="__VnbaIterCount" dtype_id="5"/>
+                  <varref loc="d,10,8,10,9" name="__VactIterCount" dtype_id="5"/>
+                </assign>
+                <assign loc="d,10,8,10,9" dtype_id="9">
+                  <const loc="d,10,8,10,9" name="1&apos;h0" dtype_id="9"/>
+                  <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
+                </assign>
+                <if loc="a,0,0,0,0">
+                  <ccall loc="a,0,0,0,0" dtype_id="9" func="_eval_phase__act"/>
+                  <begin>
+                    <assign loc="d,10,8,10,9" dtype_id="9">
+                      <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
+                      <varref loc="d,10,8,10,9" name="__VactContinue" dtype_id="9"/>
+                    </assign>
+                  </begin>
+                </if>
+              </begin>
+            </while>
+            <if loc="a,0,0,0,0">
+              <ccall loc="a,0,0,0,0" dtype_id="9" func="_eval_phase__nba"/>
+              <begin>
+                <assign loc="d,10,8,10,9" dtype_id="9">
+                  <const loc="d,10,8,10,9" name="1&apos;h1" dtype_id="9"/>
+                  <varref loc="d,10,8,10,9" name="__VnbaContinue" dtype_id="9"/>
                 </assign>
-                <stmtexpr loc="a,0,0,0,0">
-                  <ccall loc="a,0,0,0,0" dtype_id="7" func="_eval_nba"/>
-                </stmtexpr>
               </begin>
             </if>
           </begin>
@@ -1812,8 +1842,8 @@
       <basicdtype loc="d,10,8,10,9" id="6" name="VlTriggerVec"/>
       <basicdtype loc="d,10,8,10,9" id="18" name="QData" left="63" right="0"/>
       <basicdtype loc="d,10,8,10,9" id="17" name="logic" left="63" right="0"/>
-      <basicdtype loc="d,10,8,10,9" id="5" name="bit" left="31" right="0"/>
       <basicdtype loc="d,10,8,10,9" id="3" name="bit"/>
+      <basicdtype loc="d,10,8,10,9" id="5" name="bit" left="31" right="0"/>
       <basicdtype loc="d,60,22,60,25" id="9" name="logic" left="31" right="0"/>
       <basicdtype loc="d,31,11,31,14" id="11" name="logic" left="31" right="0"/>
       <basicdtype loc="d,37,17,37,21" id="13" name="logic" left="31" right="0"/>

From a5951babfc2687b42c495406a8d2afe31eb84661 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 10:36:21 +0100
Subject: [PATCH 140/157] test: make output deterministic

---
 test_regress/t/t_dist_attributes_bad.pl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test_regress/t/t_dist_attributes_bad.pl b/test_regress/t/t_dist_attributes_bad.pl
index d7c45df75..bd24d66eb 100755
--- a/test_regress/t/t_dist_attributes_bad.pl
+++ b/test_regress/t/t_dist_attributes_bad.pl
@@ -21,6 +21,7 @@ if ($ENV{VERILATOR_TEST_NO_ATTRIBUTES}) {
 
 sub gen_compile_commands_json {
     my $json = JSON::PP->new->utf8->pretty;
+    $json->canonical();  # Sort hash keys on ouptut
 
     my $root_dir = abs_path("..");
     my $srcs_dir = abs_path("./t/t_dist_attributes");

From d8420413b78df67098eaf646ee5e1a28e223eeae Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 10:39:56 +0100
Subject: [PATCH 141/157] test: fix FST trace file names

---
 test_regress/t/t_trace_dumpvars_dyn.cpp      | 7 ++++++-
 test_regress/t/t_trace_dumpvars_dyn_fst_0.pl | 2 +-
 test_regress/t/t_trace_dumpvars_dyn_fst_1.pl | 2 +-
 3 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/test_regress/t/t_trace_dumpvars_dyn.cpp b/test_regress/t/t_trace_dumpvars_dyn.cpp
index 57df372be..1d3fbfab3 100644
--- a/test_regress/t/t_trace_dumpvars_dyn.cpp
+++ b/test_regress/t/t_trace_dumpvars_dyn.cpp
@@ -7,8 +7,13 @@
 // SPDX-License-Identifier: CC0-1.0
 
 #include <verilated.h>
+#if VM_TRACE_FST
 #include <verilated_fst_c.h>
+#define TRACE_FILE_NAME "simx.fst"
+#elif VM_TRACE_VCD
 #include <verilated_vcd_c.h>
+#define TRACE_FILE_NAME "simx.vcd"
+#endif
 
 #include <memory>
 
@@ -46,7 +51,7 @@ int main(int argc, char** argv) {
 #endif
 
     top->trace(tfp.get(), 99);
-    tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd");
+    tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/" TRACE_FILE_NAME);
     top->clk = 0;
 
     while (main_time <= 20) {
diff --git a/test_regress/t/t_trace_dumpvars_dyn_fst_0.pl b/test_regress/t/t_trace_dumpvars_dyn_fst_0.pl
index 2e62f1f44..d22208347 100755
--- a/test_regress/t/t_trace_dumpvars_dyn_fst_0.pl
+++ b/test_regress/t/t_trace_dumpvars_dyn_fst_0.pl
@@ -21,7 +21,7 @@ execute(
     check_finished => 1,
     );
 
-fst_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename});
+fst_identical("$Self->{obj_dir}/simx.fst", $Self->{golden_filename});
 
 ok(1);
 1;
diff --git a/test_regress/t/t_trace_dumpvars_dyn_fst_1.pl b/test_regress/t/t_trace_dumpvars_dyn_fst_1.pl
index 2e62f1f44..d22208347 100755
--- a/test_regress/t/t_trace_dumpvars_dyn_fst_1.pl
+++ b/test_regress/t/t_trace_dumpvars_dyn_fst_1.pl
@@ -21,7 +21,7 @@ execute(
     check_finished => 1,
     );
 
-fst_identical("$Self->{obj_dir}/simx.vcd", $Self->{golden_filename});
+fst_identical("$Self->{obj_dir}/simx.fst", $Self->{golden_filename});
 
 ok(1);
 1;

From 30318a6654f171b405f0f9e81a02498145e168f4 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 11:24:04 +0100
Subject: [PATCH 142/157] C++11 cleanup

---
 include/verilated_trace_imp.h |  2 +-
 include/verilated_vpi.cpp     |  6 ++----
 src/V3Class.cpp               | 18 +++++++-----------
 src/V3Config.cpp              |  2 +-
 src/V3EmitCSyms.cpp           | 35 ++++++++++++++++-------------------
 src/V3Fork.cpp                |  4 ++--
 src/V3Global.cpp              |  2 +-
 src/V3HierBlock.cpp           |  2 +-
 src/V3LinkDot.cpp             |  2 +-
 src/V3LinkParse.cpp           |  3 +--
 src/V3Options.cpp             |  2 +-
 src/V3Order.cpp               |  2 +-
 src/V3Param.cpp               |  5 ++---
 src/V3Randomize.cpp           |  2 +-
 src/V3Sched.cpp               | 10 ++++------
 src/V3SplitVar.cpp            | 17 ++++++++---------
 src/V3Task.cpp                | 10 ++++------
 src/V3UniqueNames.h           |  2 +-
 src/VlcSource.h               |  5 ++---
 19 files changed, 57 insertions(+), 74 deletions(-)

diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index 62516432f..1bdef1291 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -453,7 +453,7 @@ void VerilatedTrace<VL_SUB_T, VL_BUF_T>::dumpvars(int level, const std::string&
         for (auto& i : hierSpaced) {
             if (i == '.') i = ' ';
         }
-        m_dumpvars.push_back(std::make_pair(level, hierSpaced));
+        m_dumpvars.emplace_back(level, hierSpaced);
     }
 }
 
diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp
index 7e01fe5d2..3bab69be0 100644
--- a/include/verilated_vpi.cpp
+++ b/include/verilated_vpi.cpp
@@ -542,8 +542,7 @@ public:
         VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d id=%" PRId64 " time=%" PRIu64
                                     " obj=%p\n",
                                     cb_data_p->reason, id, time, cb_data_p->obj););
-        s().m_futureCbs.emplace(std::piecewise_construct,
-                                std::forward_as_tuple(std::make_pair(time, id)),
+        s().m_futureCbs.emplace(std::piecewise_construct, std::forward_as_tuple(time, id),
                                 std::forward_as_tuple(id, cb_data_p, nullptr));
     }
     static void cbNextAdd(uint64_t id, const s_cb_data* cb_data_p, QData time) {
@@ -551,8 +550,7 @@ public:
         VL_DEBUG_IF_PLI(VL_DBG_MSGF("- vpi: vpi_register_cb reason=%d(NEXT) id=%" PRId64
                                     " time=%" PRIu64 " obj=%p\n",
                                     cb_data_p->reason, id, time, cb_data_p->obj););
-        s().m_nextCbs.emplace(std::piecewise_construct,
-                              std::forward_as_tuple(std::make_pair(time, id)),
+        s().m_nextCbs.emplace(std::piecewise_construct, std::forward_as_tuple(time, id),
                               std::forward_as_tuple(id, cb_data_p, nullptr));
     }
     static void cbReasonRemove(uint64_t id, uint32_t reason, QData time) {
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index ef0eddf9b..ba2b0ade5 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -122,13 +122,13 @@ private:
                 // Move later, or we wouldn't keep iterating the class
                 // We're really moving the VarScope but we might not
                 // have a pointer to it yet
-                m_toScopeMoves.emplace_back(std::make_pair(nodep, m_packageScopep));
+                m_toScopeMoves.emplace_back(nodep, m_packageScopep);
             }
             if (!m_ftaskp && nodep->lifetime().isStatic()) {
-                m_toPackageMoves.emplace_back(std::make_pair(nodep, m_classPackagep));
+                m_toPackageMoves.emplace_back(nodep, m_classPackagep);
                 // We're really moving the VarScope but we might not
                 // have a pointer to it yet
-                m_toScopeMoves.emplace_back(std::make_pair(nodep, m_packageScopep));
+                m_toScopeMoves.emplace_back(nodep, m_packageScopep);
             }
         }
     }
@@ -144,7 +144,7 @@ private:
             m_ftaskp = nodep;
             iterateChildren(nodep);
             if (m_packageScopep && nodep->lifetime().isStatic()) {
-                m_toScopeMoves.emplace_back(std::make_pair(nodep, m_packageScopep));
+                m_toScopeMoves.emplace_back(nodep, m_packageScopep);
             }
         }
     }
@@ -153,7 +153,7 @@ private:
         // Don't move now, or wouldn't keep iterating the class
         // TODO move function statics only
         // if (m_classScopep) {
-        //    m_toScopeMoves.push_back(std::make_pair(nodep, m_classScopep));
+        //    m_toScopeMoves.emplace_back(nodep, m_classScopep);
         //}
     }
     void visit(AstCoverDecl* nodep) override {
@@ -164,16 +164,12 @@ private:
     void visit(AstInitial* nodep) override {
         // But not AstInitialAutomatic, which remains under the class
         iterateChildren(nodep);
-        if (m_packageScopep) {
-            m_toScopeMoves.emplace_back(std::make_pair(nodep, m_packageScopep));
-        }
+        if (m_packageScopep) { m_toScopeMoves.emplace_back(nodep, m_packageScopep); }
     }
     void visit(AstInitialStatic* nodep) override {
         // But not AstInitialAutomatic, which remains under the class
         iterateChildren(nodep);
-        if (m_packageScopep) {
-            m_toScopeMoves.emplace_back(std::make_pair(nodep, m_packageScopep));
-        }
+        if (m_packageScopep) { m_toScopeMoves.emplace_back(nodep, m_packageScopep); }
     }
 
     void setStructModulep(AstNodeUOrStructDType* const dtypep) {
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 566021160..82aea8a9f 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -300,7 +300,7 @@ public:
         m_lastIgnore.it = m_ignLines.begin();
     }
     void addIgnoreMatch(V3ErrorCode code, const string& match) {
-        m_waivers.push_back(std::make_pair(code, match));
+        m_waivers.emplace_back(code, match);
     }
 
     void applyBlock(AstNodeBlock* nodep) {
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 93d027a42..79c12b996 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -240,12 +240,11 @@ class EmitCSyms final : EmitCBaseVisitorConst {
                     // << scpSym << endl);
                     if (v3Global.opt.vpi()) varHierarchyScopes(scpName);
                     if (m_scopeNames.find(scpSym) == m_scopeNames.end()) {
-                        m_scopeNames.insert(std::make_pair(
-                            scpSym, ScopeData{scpSym, scpPretty, 0, "SCOPE_OTHER"}));
+                        m_scopeNames.emplace(scpSym,
+                                             ScopeData{scpSym, scpPretty, 0, "SCOPE_OTHER"});
                     }
-                    m_scopeVars.insert(
-                        std::make_pair(scpSym + " " + varp->name(),
-                                       ScopeVarData{scpSym, varBasePretty, varp, modp, scopep}));
+                    m_scopeVars.emplace(scpSym + " " + varp->name(),
+                                        ScopeVarData{scpSym, varBasePretty, varp, modp, scopep});
                 }
             }
         }
@@ -312,24 +311,24 @@ class EmitCSyms final : EmitCBaseVisitorConst {
             const string name = nodep->scopep()->shortName() + "__DOT__" + nodep->name();
             const string name_pretty = AstNode::vpiName(name);
             const int timeunit = m_modp->timeunit().powerOfTen();
-            m_vpiScopeCandidates.insert(
-                std::make_pair(scopeSymString(name),
-                               ScopeData{scopeSymString(name), name_pretty, timeunit, type}));
+            m_vpiScopeCandidates.emplace(
+                scopeSymString(name),
+                ScopeData{scopeSymString(name), name_pretty, timeunit, type});
         }
     }
     void visit(AstScope* nodep) override {
         if (VN_IS(m_modp, Class)) return;  // The ClassPackage is what is visible
         nameCheck(nodep);
 
-        m_scopes.emplace_back(std::make_pair(nodep, m_modp));
+        m_scopes.emplace_back(nodep, m_modp);
 
         if (v3Global.opt.vpi() && !nodep->isTop()) {
             const string type = VN_IS(nodep->modp(), Package) ? "SCOPE_OTHER" : "SCOPE_MODULE";
             const string name_pretty = AstNode::vpiName(nodep->shortName());
             const int timeunit = m_modp->timeunit().powerOfTen();
-            m_vpiScopeCandidates.insert(std::make_pair(
+            m_vpiScopeCandidates.emplace(
                 scopeSymString(nodep->name()),
-                ScopeData{scopeSymString(nodep->name()), name_pretty, timeunit, type}));
+                ScopeData{scopeSymString(nodep->name()), name_pretty, timeunit, type});
         }
     }
     void visit(AstScopeName* nodep) override {
@@ -341,22 +340,20 @@ class EmitCSyms final : EmitCBaseVisitorConst {
             name, ScopeData{name, nodep->scopePrettySymName(), timeunit, "SCOPE_OTHER"});
         if (nodep->dpiExport()) {
             UASSERT_OBJ(m_cfuncp, nodep, "ScopeName not under DPI function");
-            m_scopeFuncs.insert(std::make_pair(name + " " + m_cfuncp->name(),
-                                               ScopeFuncData(nodep, m_cfuncp, m_modp)));
+            m_scopeFuncs.emplace(name + " " + m_cfuncp->name(),
+                                 ScopeFuncData(nodep, m_cfuncp, m_modp));
         } else {
             if (m_scopeNames.find(nodep->scopeDpiName()) == m_scopeNames.end()) {
-                m_scopeNames.insert(
-                    std::make_pair(nodep->scopeDpiName(),
-                                   ScopeData{nodep->scopeDpiName(), nodep->scopePrettyDpiName(),
-                                             timeunit, "SCOPE_OTHER"}));
+                m_scopeNames.emplace(nodep->scopeDpiName(),
+                                     ScopeData{nodep->scopeDpiName(), nodep->scopePrettyDpiName(),
+                                               timeunit, "SCOPE_OTHER"});
             }
         }
     }
     void visit(AstVar* nodep) override {
         nameCheck(nodep);
         iterateChildrenConst(nodep);
-        if (nodep->isSigUserRdPublic() && !m_cfuncp)
-            m_modVars.emplace_back(std::make_pair(m_modp, nodep));
+        if (nodep->isSigUserRdPublic() && !m_cfuncp) m_modVars.emplace_back(m_modp, nodep);
     }
     void visit(AstCoverDecl* nodep) override {
         // Assign numbers to all bins, so we know how big of an array to use
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 09d12e4f4..a271874ae 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -290,7 +290,7 @@ private:
     ForkDynScopeFrame* pushDynScopeFrame(AstNode* procp) {
         ForkDynScopeFrame* const framep
             = new ForkDynScopeFrame{m_modp, procp, m_class_id++, m_id++};
-        auto r = m_frames.emplace(std::make_pair(procp, framep));
+        auto r = m_frames.emplace(procp, framep);
         UASSERT_OBJ(r.second, m_modp, "Procedure already contains a frame");
         return framep;
     }
@@ -321,7 +321,7 @@ private:
     }
 
     void bindNodeToDynScope(AstNode* nodep, ForkDynScopeFrame* frame) {
-        m_frames.emplace(std::make_pair(nodep, frame));
+        m_frames.emplace(nodep, frame);
     }
 
     bool needsDynScope(const AstVarRef* refp) const {
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index f4ebc182a..905b2e63d 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -125,7 +125,7 @@ const std::string& V3Global::ptrToId(const void* p) {
         } else {
             os << "0";
         }
-        it = m_ptrToId.insert(std::make_pair(p, os.str())).first;
+        it = m_ptrToId.emplace(p, os.str()).first;
     }
     return it->second;
 }
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index b21a6e099..e59a8cb36 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -134,7 +134,7 @@ V3HierBlock::StrGParams V3HierBlock::stringifyParams(const GParams& gparams, boo
                 s = constp->num().ascii(true, true);
                 s = VString::quoteAny(s, '\'', '\\');
             }
-            strParams.push_back(std::make_pair(gparam->name(), s));
+            strParams.emplace_back(gparam->name(), s);
         }
     }
     return strParams;
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index a3b5a350b..2726f2e97 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -442,7 +442,7 @@ public:
 
     // Track and later recurse interface modules
     void insertIfaceModSym(AstIface* nodep, VSymEnt* symp) {
-        m_ifaceModSyms.push_back(std::make_pair(nodep, symp));
+        m_ifaceModSyms.emplace_back(nodep, symp);
     }
     void computeIfaceModSyms();
 
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 9c9b349e2..0f7fa35ac 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -534,8 +534,7 @@ private:
             } else {
                 defp = new AstTypedef{nodep->fileline(), nodep->name(), nullptr, VFlagChildDType{},
                                       dtypep};
-                m_implTypedef.insert(
-                    std::make_pair(std::make_pair(nodep->containerp(), defp->name()), defp));
+                m_implTypedef.emplace(std::make_pair(nodep->containerp(), defp->name()), defp);
                 backp->addNextHere(defp);
             }
         }
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index d64519e07..983e8243b 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -221,7 +221,7 @@ V3HierarchicalBlockOption::V3HierarchicalBlockOption(const string& opts) {
         cmdfl.v3error(hierBlock + " requires at least two comma-separated values");
     }
     for (size_t i = 2; i + 1 < vals.size(); i += 2) {
-        const bool inserted = m_parameters.insert(std::make_pair(vals[i], vals[i + 1])).second;
+        const bool inserted = m_parameters.emplace(vals[i], vals[i + 1]).second;
         if (!inserted) {
             cmdfl.v3error("Module name '" + vals[i] + "' is duplicated in " + hierBlock);
         }
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index 27df6913c..3c8a3b86f 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -856,7 +856,7 @@ class OrderProcess final {
         string name = "_" + m_tag;
         name += domainp->isMulti() ? "_comb" : "_sequent";
         name = name + "__" + scopep->nameDotless();
-        const unsigned funcnum = m_funcNums.emplace(std::make_pair(modp, name), 0).first->second++;
+        const unsigned funcnum = m_funcNums[{modp, name}]++;
         name = name + "__" + cvtToStr(funcnum);
         if (v3Global.opt.profCFuncs()) {
             name += "__PROF__" + forWhatp->fileline()->profileFuncname();
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 4133df59f..dc7aed79c 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -90,8 +90,7 @@ class ParameterizedHierBlocks final {
 public:
     ParameterizedHierBlocks(const V3HierBlockOptSet& hierOpts, AstNetlist* nodep) {
         for (const auto& hierOpt : hierOpts) {
-            m_hierBlockOptsByOrigName.insert(
-                std::make_pair(hierOpt.second.origName(), &hierOpt.second));
+            m_hierBlockOptsByOrigName.emplace(hierOpt.second.origName(), &hierOpt.second);
             const V3HierarchicalBlockOption::ParamStrMap& params = hierOpt.second.params();
             ParamConstMap& consts = m_hierParams[&hierOpt.second];
             for (V3HierarchicalBlockOption::ParamStrMap::const_iterator pIt = params.begin();
@@ -807,7 +806,7 @@ class ParamProcessor final {
                         longnamer += ("_" + paramSmallName(srcModp, pinp->modVarp())
                                       + paramValueNumber(pinIrefp));
                         any_overridesr = true;
-                        ifaceRefRefs.push_back(std::make_pair(portIrefp, pinIrefp));
+                        ifaceRefRefs.emplace_back(portIrefp, pinIrefp);
                         if (portIrefp->ifacep() != pinIrefp->ifacep()
                             // Might be different only due to param cloning, so check names too
                             && portIrefp->ifaceName() != pinIrefp->ifaceName()) {
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 31f72fc1e..18eb63df2 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -182,7 +182,7 @@ private:
         if (it != m_randcDtypes.end()) return it->second;
         AstCDType* newp = new AstCDType{fl, name};
         v3Global.rootp()->typeTablep()->addTypesp(newp);
-        m_randcDtypes.emplace(std::make_pair(name, newp));
+        m_randcDtypes.emplace(name, newp);
         return newp;
     }
 
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 7dabae60f..926379d97 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -278,13 +278,11 @@ EvalLoop createEvalLoop(AstNetlist* netlistp,  //
 //============================================================================
 // Split large function according to --output-split-cfuncs
 
-std::map<AstCFunc*, int> s_funcNums;  // What split number to attach to a function
-
 AstCFunc* splitCheckCreateNewSubFunc(AstCFunc* ofuncp) {
-    auto funcNumItMatch = s_funcNums.emplace(std::make_pair(ofuncp, 0));
-    AstCFunc* const subFuncp = new AstCFunc{
-        ofuncp->fileline(), ofuncp->name() + "__" + cvtToStr(funcNumItMatch.first->second++),
-        ofuncp->scopep()};
+    static std::map<AstCFunc*, uint32_t> funcNums;  // What split number to attach to a function
+    const uint32_t funcNum = funcNums[ofuncp]++;
+    const std::string name = ofuncp->name() + "__" + cvtToStr(funcNum);
+    AstCFunc* const subFuncp = new AstCFunc{ofuncp->fileline(), name, ofuncp->scopep()};
     subFuncp->dontCombine(true);
     subFuncp->isStatic(false);
     subFuncp->isLoose(true);
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 8711f4bc6..54e6d5e76 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -317,8 +317,7 @@ private:
 public:
     // Register a variable to split
     void registerVar(AstVar* varp) {
-        const bool inserted
-            = m_map.insert(std::make_pair(varp, MapType::value_type::second_type())).second;
+        const bool inserted = m_map.emplace(varp, MapType::value_type::second_type()).second;
         UASSERT_OBJ(inserted, varp, "already registered");
     }
     // Register the location where a variable is used.
@@ -907,8 +906,8 @@ public:
         std::vector<std::pair<int, bool>> points;  // <bit location, is end>
         points.reserve(m_lhs.size() * 2 + 2);  // 2 points will be added per one PackedVarRefEntry
         for (const PackedVarRefEntry& ref : m_lhs) {
-            points.emplace_back(std::make_pair(ref.lsb(), false));  // Start of a region
-            points.emplace_back(std::make_pair(ref.msb() + 1, true));  // End of a region
+            points.emplace_back(ref.lsb(), false);  // Start of a region
+            points.emplace_back(ref.msb() + 1, true);  // End of a region
         }
         if (skipUnused && !m_rhs.empty()) {  // Range to be read must be kept, so add points here
             int lsb = m_basicp->hi() + 1;
@@ -918,12 +917,12 @@ public:
                 msb = std::max(msb, ref.msb());
             }
             UASSERT_OBJ(lsb <= msb, m_basicp, "lsb:" << lsb << " msb:" << msb << " are wrong");
-            points.emplace_back(std::make_pair(lsb, false));
-            points.emplace_back(std::make_pair(msb + 1, true));
+            points.emplace_back(lsb, false);
+            points.emplace_back(msb + 1, true);
         }
         if (!skipUnused) {  // All bits are necessary
-            points.emplace_back(std::make_pair(m_basicp->lo(), false));
-            points.emplace_back(std::make_pair(m_basicp->hi() + 1, true));
+            points.emplace_back(m_basicp->lo(), false);
+            points.emplace_back(m_basicp->hi() + 1, true);
         }
         std::sort(points.begin(), points.end(), SortByFirst());
 
@@ -960,7 +959,7 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             warnNoSplit(nodep, nodep, reason);
             nodep->attrSplitVar(false);
         } else {  // Finally find a good candidate
-            const bool inserted = m_refs.insert(std::make_pair(nodep, PackedVarRef{nodep})).second;
+            const bool inserted = m_refs.emplace(nodep, PackedVarRef{nodep}).second;
             if (inserted) UINFO(3, nodep->prettyNameQ() << " is added to candidate list.\n");
         }
     }
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 9bd96ef03..0bfa6cea0 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -174,8 +174,7 @@ private:
             if (AstVarScope* const vscp = VN_CAST(stmtp, VarScope)) {
                 if (vscp->varp()->isFuncLocal() || vscp->varp()->isUsedLoopIdx()) {
                     UINFO(9, "   funcvsc " << vscp << endl);
-                    m_varToScopeMap.insert(
-                        std::make_pair(std::make_pair(nodep, vscp->varp()), vscp));
+                    m_varToScopeMap.emplace(std::make_pair(nodep, vscp->varp()), vscp);
                 }
             }
         }
@@ -1623,9 +1622,8 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
     for (AstNode* stmtp = taskStmtsp; stmtp; stmtp = stmtp->nextp()) {
         if (AstVar* const portp = VN_CAST(stmtp, Var)) {
             if (portp->isIO()) {
-                tconnects.push_back(std::make_pair(portp, static_cast<AstArg*>(nullptr)));
-                nameToIndex.insert(
-                    std::make_pair(portp->name(), tpinnum));  // For name based connections
+                tconnects.emplace_back(portp, static_cast<AstArg*>(nullptr));
+                nameToIndex.emplace(portp->name(), tpinnum);  // For name based connections
                 tpinnum++;
                 if (portp->attrSFormat()) {
                     sformatp = portp;
@@ -1665,7 +1663,7 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
         } else {  // By pin number
             if (ppinnum >= tpinnum) {
                 if (sformatp) {
-                    tconnects.push_back(std::make_pair(sformatp, static_cast<AstArg*>(nullptr)));
+                    tconnects.emplace_back(sformatp, static_cast<AstArg*>(nullptr));
                     tconnects[ppinnum].second = argp;
                     tpinnum++;
                 } else {
diff --git a/src/V3UniqueNames.h b/src/V3UniqueNames.h
index 7c4aa4af2..30d4cd2fa 100644
--- a/src/V3UniqueNames.h
+++ b/src/V3UniqueNames.h
@@ -45,7 +45,7 @@ public:
     // Return argument, prepended with the prefix if any, then appended with a unique suffix each
     // time we are called with the same argument.
     std::string get(const std::string& name) {
-        const unsigned num = m_multiplicity.emplace(name, 0).first->second++;
+        const unsigned num = m_multiplicity[name]++;
         std::string result;
         if (!m_prefix.empty()) {
             result += m_prefix;
diff --git a/src/VlcSource.h b/src/VlcSource.h
index 788945787..523b60861 100644
--- a/src/VlcSource.h
+++ b/src/VlcSource.h
@@ -95,8 +95,7 @@ public:
     // METHODS
     void lineIncCount(int lineno, uint64_t count, bool ok, const VlcPoint* pointp) {
         auto lit = m_lines.find(lineno);
-        if (lit == m_lines.end())
-            lit = m_lines.emplace(std::make_pair(lineno, VlcSourceCount{lineno})).first;
+        if (lit == m_lines.end()) lit = m_lines.emplace(lineno, VlcSourceCount{lineno}).first;
         VlcSourceCount& sc = lit->second;
         sc.incCount(count, ok);
         sc.insertPoint(pointp);
@@ -131,7 +130,7 @@ public:
         if (iter != m_sources.end()) {
             return iter->second;
         } else {
-            iter = m_sources.insert(std::make_pair(name, VlcSource{name})).first;
+            iter = m_sources.emplace(name, VlcSource{name}).first;
             return iter->second;
         }
     }

From d60f180f43333f1ea9a02a9ae18fbe9724e6d8d5 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 13:38:02 +0100
Subject: [PATCH 143/157] Avoid double traversal of maps

The typical find/if-not-exists-insert pattern can be achieved with 1
lookup instead of 2 using emplace with a sentinel value. Also maps value
initialize their values when inserted with the [] operator, this is
defined and so there is no need to explicitly insert zeroes for integer
values.
---
 src/V3AstNodes.cpp       |  19 ++--
 src/V3Config.cpp         |  10 +-
 src/V3Coverage.cpp       |  11 +-
 src/V3Delayed.cpp        |  24 ++--
 src/V3DupFinder.cpp      |   8 +-
 src/V3EmitCSyms.cpp      |   9 +-
 src/V3File.cpp           |  13 +--
 src/V3Global.cpp         |   8 +-
 src/V3HierBlock.cpp      |   6 +-
 src/V3Life.cpp           |  48 +++-----
 src/V3LinkLevel.cpp      |  12 +-
 src/V3Order.cpp          |  11 +-
 src/V3Param.cpp          |  27 ++---
 src/V3Partition.h        |   7 +-
 src/V3Randomize.cpp      |  13 ++-
 src/V3SchedPartition.cpp |   9 +-
 src/V3SenExprBuilder.h   |   8 +-
 src/V3SplitVar.cpp       |   2 +-
 src/V3SymTable.h         |   6 +-
 src/V3TSP.cpp            |   6 +-
 src/V3Task.cpp           |  25 ++---
 src/V3Tristate.cpp       |  13 +--
 src/V3Width.cpp          | 234 ++++++++++++++++++++-------------------
 src/VlcPoint.h           |  16 +--
 src/VlcSource.h          |   6 +-
 25 files changed, 240 insertions(+), 311 deletions(-)

diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 4fd19133c..37b16324e 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1178,13 +1178,10 @@ AstBasicDType* AstTypeTable::findLogicBitDType(FileLine* fl, VBasicDTypeKwd kwd,
 AstBasicDType* AstTypeTable::findInsertSameDType(AstBasicDType* nodep) {
     const VBasicTypeKey key{nodep->width(), nodep->widthMin(), nodep->numeric(), nodep->keyword(),
                             nodep->nrange()};
-    DetailedMap& mapr = m_detailedMap;
-    const auto it = mapr.find(key);
-    if (it != mapr.end()) return it->second;
-    mapr.emplace(key, nodep);
-    nodep->generic(true);
+    auto pair = m_detailedMap.emplace(key, nodep);
+    if (pair.second) nodep->generic(true);
     // No addTypesp; the upper function that called new() is responsible for adding
-    return nodep;
+    return pair.first->second;
 }
 
 AstConstPool::AstConstPool(FileLine* fl)
@@ -1641,13 +1638,13 @@ void AstInitArray::cloneRelink() {
     }
 }
 void AstInitArray::addIndexValuep(uint64_t index, AstNodeExpr* newp) {
-    const auto it = m_map.find(index);
-    if (it != m_map.end()) {
-        it->second->valuep(newp);
-    } else {
+    const auto pair = m_map.emplace(index, nullptr);
+    if (pair.second) {
         AstInitItem* const itemp = new AstInitItem{fileline(), newp};
-        m_map.emplace(index, itemp);
+        pair.first->second = itemp;
         addInitsp(itemp);
+    } else {
+        pair.first->second->valuep(newp);
     }
 }
 AstNodeExpr* AstInitArray::getIndexValuep(uint64_t index) const {
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 82aea8a9f..69a55e7fc 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -400,12 +400,10 @@ public:
 
     bool getEntryMatch(const V3ConfigScopeTraceEntry* entp, const string& scopepart) {
         // Return if a entry matches the scopepart, with memoization
-        const auto& key = V3ConfigScopeTraceEntryMatch{entp, scopepart};
-        const auto& it = m_matchCache.find(key);
-        if (it != m_matchCache.end()) return it->second;  // Cached
-        const bool matched = VString::wildmatch(scopepart, entp->m_scope);
-        m_matchCache.emplace(key, matched);
-        return matched;
+        const V3ConfigScopeTraceEntryMatch key{entp, scopepart};
+        const auto pair = m_matchCache.emplace(key, false);
+        if (pair.second) pair.first->second = VString::wildmatch(scopepart, entp->m_scope);
+        return pair.first->second;
     }
 
     bool getScopeTraceOn(const string& scope) {
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 4d04e00cc..c1a5bed9f 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -77,7 +77,8 @@ private:
     CheckState m_state;  // State save-restored on each new coverage scope/block
     AstNodeModule* m_modp = nullptr;  // Current module to add statement to
     bool m_inToggleOff = false;  // In function/task etc
-    std::unordered_map<std::string, int> m_varnames;  // Uniquification of inserted variable names
+    // Uniquification of inserted variable names
+    std::unordered_map<std::string, uint32_t> m_varnames;
     string m_beginHier;  // AstBegin hier name for user coverage points
     std::unordered_map<int, LinenoSet>
         m_handleLines;  // All line numbers for a given m_stateHandle
@@ -141,13 +142,7 @@ private:
     string traceNameForLine(AstNode* nodep, const string& type) {
         string name = "vlCoverageLineTrace_" + nodep->fileline()->filebasenameNoExt() + "__"
                       + cvtToStr(nodep->fileline()->lineno()) + "_" + type;
-        const auto it = m_varnames.find(name);
-        if (it == m_varnames.end()) {
-            m_varnames.emplace(name, 1);
-        } else {
-            const int suffix = (it->second)++;
-            name += "_" + cvtToStr(suffix);
-        }
+        if (const uint32_t suffix = m_varnames[name]++) name += "_" + cvtToStr(suffix);
         return name;
     }
 
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 35f18d0b0..0b4450376 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -145,30 +145,26 @@ private:
                              int width /*0==fromoldvar*/, AstNodeDType* newdtypep) {
         // Because we've already scoped it, we may need to add both the AstVar and the AstVarScope
         UASSERT_OBJ(oldvarscp->scopep(), oldvarscp, "Var unscoped");
-        AstVar* varp;
+        FileLine* const flp = oldvarscp->fileline();
         AstNodeModule* const addmodp = oldvarscp->scopep()->modp();
         // We need a new AstVar, but only one for all scopes, to match the new AstVarScope
-        const auto it = m_modVarMap.find(std::make_pair(addmodp, name));
-        if (it != m_modVarMap.end()) {
-            // Created module's AstVar earlier under some other scope
-            varp = it->second;
-        } else {
+        const auto pair = m_modVarMap.emplace(std::make_pair(addmodp, name), nullptr);
+        if (pair.second) {
+            AstVar* varp = nullptr;
             if (newdtypep) {
-                varp = new AstVar{oldvarscp->fileline(), VVarType::BLOCKTEMP, name, newdtypep};
+                varp = new AstVar{flp, VVarType::BLOCKTEMP, name, newdtypep};
             } else if (width == 0) {
-                varp = new AstVar{oldvarscp->fileline(), VVarType::BLOCKTEMP, name,
-                                  oldvarscp->varp()};
+                varp = new AstVar{flp, VVarType::BLOCKTEMP, name, oldvarscp->varp()};
                 varp->dtypeFrom(oldvarscp);
             } else {  // Used for vset and dimensions, so can zero init
-                varp = new AstVar{oldvarscp->fileline(), VVarType::BLOCKTEMP, name,
-                                  VFlagBitPacked{}, width};
+                varp = new AstVar{flp, VVarType::BLOCKTEMP, name, VFlagBitPacked{}, width};
             }
             addmodp->addStmtsp(varp);
-            m_modVarMap.emplace(std::make_pair(addmodp, name), varp);
+            pair.first->second = varp;
         }
+        AstVar* const varp = pair.first->second;
 
-        AstVarScope* const varscp
-            = new AstVarScope{oldvarscp->fileline(), oldvarscp->scopep(), varp};
+        AstVarScope* const varscp = new AstVarScope{flp, oldvarscp->scopep(), varp};
         oldvarscp->scopep()->addVarsp(varscp);
         return varscp;
     }
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index 58a889931..c58859b0a 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -63,13 +63,7 @@ void V3DupFinder::dumpFile(const string& filename, bool tree) {
     for (auto it = cbegin(); true; ++it) {
         if (it == cend() || lasthash != it->first) {
             if (it != cend()) lasthash = it->first;
-            if (num_in_bucket) {
-                if (dist.find(num_in_bucket) == dist.end()) {
-                    dist.emplace(num_in_bucket, 1);
-                } else {
-                    ++dist[num_in_bucket];
-                }
-            }
+            if (num_in_bucket) ++dist[num_in_bucket];
             num_in_bucket = 0;
         }
         if (it == cend()) break;
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 79c12b996..fc197d784 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -187,12 +187,9 @@ class EmitCSyms final : EmitCBaseVisitorConst {
             const auto scpit = m_vpiScopeCandidates.find(scopeSymString(scp));
             if ((scpit != m_vpiScopeCandidates.end())
                 && (m_scopeNames.find(scp) == m_scopeNames.end())) {
-                const auto scopeNameit = m_scopeNames.find(scpit->second.m_symName);
-                if (scopeNameit == m_scopeNames.end()) {
-                    m_scopeNames.emplace(scpit->second.m_symName, scpit->second);
-                } else {
-                    scopeNameit->second.m_type = scpit->second.m_type;
-                }
+                // If not in m_scopeNames, add it, otherwise just update m_type
+                const auto pair = m_scopeNames.emplace(scpit->second.m_symName, scpit->second);
+                if (!pair.second) pair.first->second.m_type = scpit->second.m_type;
             }
             string::size_type pos = scp.rfind("__DOT__");
             if (pos == string::npos) {
diff --git a/src/V3File.cpp b/src/V3File.cpp
index 97a26d572..a51372f8f 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -991,10 +991,8 @@ public:
     string protectIf(const string& old, bool doIt) VL_MT_SAFE_EXCLUDES(m_mutex) {
         if (!v3Global.opt.protectIds() || old.empty() || !doIt) return old;
         const V3LockGuard lock{m_mutex};
-        const auto it = m_nameMap.find(old);
-        if (it != m_nameMap.end()) {
-            return it->second;
-        } else {
+        const auto pair = m_nameMap.emplace(old, "");
+        if (pair.second) {
             string out;
             if (v3Global.opt.debugProtect()) {
                 // This lets us see the symbol being protected to debug cases
@@ -1009,16 +1007,15 @@ public:
                 // See if we can shrink the digest symbol to something smaller
                 for (size_t len = 6; len < out.size() - 3; len += 3) {
                     const string tryout = out.substr(0, len);
-                    if (m_newIdSet.find(tryout) == m_newIdSet.end()) {
+                    if (m_newIdSet.insert(tryout).second) {
                         out = tryout;
                         break;
                     }
                 }
             }
-            m_nameMap.emplace(old, out);
-            m_newIdSet.insert(out);
-            return out;
+            pair.first->second = out;
         }
+        return pair.first->second;
     }
     string protectWordsIf(const string& old, bool doIt) VL_MT_SAFE {
         // Split at " " (for traces), "." (for scopes), "->", "(", "&", ")" (for self pointers)
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index 905b2e63d..454787fe9 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -114,8 +114,8 @@ void V3Global::dumpCheckGlobalTree(const string& stagename, int newNumber, bool
 }
 
 const std::string& V3Global::ptrToId(const void* p) {
-    auto it = m_ptrToId.find(p);
-    if (it == m_ptrToId.end()) {
+    const auto pair = m_ptrToId.emplace(p, "");
+    if (pair.second) {
         std::ostringstream os;
         if (p) {
             os << "(";
@@ -125,7 +125,7 @@ const std::string& V3Global::ptrToId(const void* p) {
         } else {
             os << "0";
         }
-        it = m_ptrToId.emplace(p, os.str()).first;
+        pair.first->second = os.str();
     }
-    return it->second;
+    return pair.first->second;
 }
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index e59a8cb36..294613e18 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -306,12 +306,12 @@ public:
 //######################################################################
 
 void V3HierBlockPlan::add(const AstNodeModule* modp, const std::vector<AstVar*>& gparams) {
-    const iterator it = m_blocks.find(modp);
-    if (it == m_blocks.end()) {
+    const auto pair = m_blocks.emplace(modp, nullptr);
+    if (pair.second) {
         V3HierBlock* hblockp = new V3HierBlock{modp, gparams};
         UINFO(3, "Add " << modp->prettyNameQ() << " with " << gparams.size() << " parameters"
                         << std::endl);
-        m_blocks.emplace(modp, hblockp);
+        pair.first->second = hblockp;
     }
 }
 
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 84ee05d60..821365623 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -157,31 +157,27 @@ public:
         // Do we have a old assignment we can nuke?
         UINFO(4, "     ASSIGNof: " << nodep << endl);
         UINFO(7, "       new: " << assp << endl);
-        const auto it = m_map.find(nodep);
-        if (it != m_map.end()) {
-            checkRemoveAssign(it);
-            it->second.simpleAssign(assp);
-        } else {
-            m_map.emplace(nodep, LifeVarEntry{LifeVarEntry::SIMPLEASSIGN{}, assp});
+        const auto pair = m_map.emplace(std::piecewise_construct,  //
+                                        std::forward_as_tuple(nodep),
+                                        std::forward_as_tuple(LifeVarEntry::SIMPLEASSIGN{}, assp));
+        if (!pair.second) {
+            checkRemoveAssign(pair.first);
+            pair.first->second.simpleAssign(assp);
         }
         // lifeDump();
     }
     void complexAssign(AstVarScope* nodep) {
         UINFO(4, "     clearof: " << nodep << endl);
-        const auto it = m_map.find(nodep);
-        if (it != m_map.end()) {
-            it->second.complexAssign();
-        } else {
-            m_map.emplace(nodep, LifeVarEntry{LifeVarEntry::COMPLEXASSIGN{}});
-        }
+        const auto pair = m_map.emplace(nodep, LifeVarEntry::COMPLEXASSIGN{});
+        if (!pair.second) pair.first->second.complexAssign();
     }
     void clearReplaced() { m_replacedVref = false; }
     bool replaced() const { return m_replacedVref; }
     void varUsageReplace(AstVarScope* nodep, AstVarRef* varrefp) {
         // Variable rvalue.  If it references a constant, we can replace it
-        const auto it = m_map.find(nodep);
-        if (it != m_map.end()) {
-            if (AstConst* const constp = it->second.constNodep()) {
+        const auto pair = m_map.emplace(nodep, LifeVarEntry::CONSUMED{});
+        if (!pair.second) {
+            if (AstConst* const constp = pair.first->second.constNodep()) {
                 if (!varrefp->varp()->isSigPublic() && !varrefp->varp()->isUsedVirtIface()) {
                     // Aha, variable is constant; substitute in.
                     // We'll later constant propagate
@@ -194,27 +190,19 @@ public:
                 }
             }
             UINFO(4, "     usage: " << nodep << endl);
-            it->second.consumed();
-        } else {
-            m_map.emplace(nodep, LifeVarEntry{LifeVarEntry::CONSUMED{}});
+            pair.first->second.consumed();
         }
     }
     void complexAssignFind(AstVarScope* nodep) {
-        const auto it = m_map.find(nodep);
-        if (it != m_map.end()) {
-            UINFO(4, "     casfind: " << it->first << endl);
-            it->second.complexAssign();
-        } else {
-            m_map.emplace(nodep, LifeVarEntry{LifeVarEntry::COMPLEXASSIGN{}});
+        const auto pair = m_map.emplace(nodep, LifeVarEntry::COMPLEXASSIGN{});
+        if (!pair.second) {
+            UINFO(4, "     casfind: " << pair.first->first << endl);
+            pair.first->second.complexAssign();
         }
     }
     void consumedFind(AstVarScope* nodep) {
-        const auto it = m_map.find(nodep);
-        if (it != m_map.end()) {
-            it->second.consumed();
-        } else {
-            m_map.emplace(nodep, LifeVarEntry{LifeVarEntry::CONSUMED{}});
-        }
+        const auto pair = m_map.emplace(nodep, LifeVarEntry::CONSUMED{});
+        if (!pair.second) pair.first->second.consumed();
     }
     void lifeToAbove() {
         // Any varrefs under a if/else branch affect statements outside and after the if/else
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 9c0500239..f784f0707 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -195,22 +195,18 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
         for (AstNode* subnodep = oldmodp->stmtsp(); subnodep; subnodep = subnodep->nextp()) {
             if (AstVar* const oldvarp = VN_CAST(subnodep, Var)) {
                 if (oldvarp->isIO()) {
-                    if (ioNames.find(oldvarp->name()) != ioNames.end()) {
+                    if (!ioNames.insert(oldvarp->name()).second) {
                         // UINFO(8, "Multitop dup I/O found: " << oldvarp << endl);
                         dupNames.insert(oldvarp->name());
-                    } else {
-                        ioNames.insert(oldvarp->name());
                     }
                 } else if (v3Global.opt.topIfacesSupported() && oldvarp->isIfaceRef()) {
                     const AstNodeDType* const subtypep = oldvarp->subDTypep();
                     if (VN_IS(subtypep, IfaceRefDType)) {
                         const AstIfaceRefDType* const ifacerefp = VN_AS(subtypep, IfaceRefDType);
                         if (!ifacerefp->cellp()) {
-                            if (ioNames.find(oldvarp->name()) != ioNames.end()) {
+                            if (!ioNames.insert(oldvarp->name()).second) {
                                 // UINFO(8, "Multitop dup interface found: " << oldvarp << endl);
                                 dupNames.insert(oldvarp->name());
-                            } else {
-                                ioNames.insert(oldvarp->name());
                             }
                         }
                     }
@@ -221,12 +217,10 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
                             const AstIfaceRefDType* const ifacerefp
                                 = VN_AS(arrsubtypep, IfaceRefDType);
                             if (!ifacerefp->cellp()) {
-                                if (ioNames.find(oldvarp->name()) != ioNames.end()) {
+                                if (!ioNames.insert(oldvarp->name()).second) {
                                     // UINFO(8, "Multitop dup interface array found: " << oldvarp
                                     // << endl);
                                     dupNames.insert(oldvarp->name());
-                                } else {
-                                    ioNames.insert(oldvarp->name());
                                 }
                             }
                         }
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index 3c8a3b86f..415505c0d 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -495,14 +495,9 @@ public:
     V3List<OrderMoveVertex*>& readyVertices() { return m_readyVertices; }
     static OrderMoveDomScope* findCreate(const AstSenTree* domainp, const AstScope* scopep) {
         const DomScopeKey key = std::make_pair(domainp, scopep);
-        const auto iter = s_dsMap.find(key);
-        if (iter != s_dsMap.end()) {
-            return iter->second;
-        } else {
-            OrderMoveDomScope* domScopep = new OrderMoveDomScope{domainp, scopep};
-            s_dsMap.emplace(key, domScopep);
-            return domScopep;
-        }
+        const auto pair = s_dsMap.emplace(key, nullptr);
+        if (pair.second) pair.first->second = new OrderMoveDomScope{domainp, scopep};
+        return pair.first->second;
     }
     string name() const {
         return string{"MDS:"} + " d=" + cvtToHex(domainp()) + " s=" + cvtToHex(scopep());
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index dc7aed79c..53c01c77c 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -356,27 +356,22 @@ class ParamProcessor final {
         // cppcheck-has-bug-suppress unreadVariable
         if (VL_UNLIKELY(v3Global.opt.debugCollision())) hash = V3Hash{paramStr};
         int num;
-        const auto it = m_valueMap.find(hash);
-        if (it != m_valueMap.end()) {
-            num = it->second;
-        } else {
-            num = m_nextValue++;
-            m_valueMap[hash] = num;
-        }
+        const auto pair = m_valueMap.emplace(hash, 0);
+        if (pair.second) pair.first->second = m_nextValue++;
+        num = pair.first->second;
         return std::string{"z"} + cvtToStr(num);
     }
     string moduleCalcName(const AstNodeModule* srcModp, const string& longname) {
         string newname = longname;
         if (longname.length() > 30) {
-            const auto iter = m_longMap.find(longname);
-            if (iter != m_longMap.end()) {
-                newname = iter->second;
-            } else {
+            const auto pair = m_longMap.emplace(longname, "");
+            if (pair.second) {
                 newname = srcModp->name();
                 // We use all upper case above, so lower here can't conflict
                 newname += "__pi" + cvtToStr(++m_longId);
-                m_longMap.emplace(longname, newname);
+                pair.first->second = newname;
             }
+            newname = pair.first->second;
         }
         UINFO(4, "Name: " << srcModp->name() << "->" << longname << "->" << newname << endl);
         return newname;
@@ -496,8 +491,9 @@ class ParamProcessor final {
             }
         }
 
-        auto paramsIt = m_defaultParameterValues.find(modp);
-        if (paramsIt == m_defaultParameterValues.end()) {  // Not cached yet, so check parameters
+        const auto pair = m_defaultParameterValues.emplace(
+            std::piecewise_construct, std::forward_as_tuple(modp), std::forward_as_tuple());
+        if (pair.second) {  // Not cached yet, so check parameters
             // Using map with key=string so that we can scan it in deterministic order
             DefaultValueMap params;
             for (AstNode* stmtp = modp->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
@@ -511,8 +507,9 @@ class ParamProcessor final {
                     }
                 }
             }
-            paramsIt = m_defaultParameterValues.emplace(modp, std::move(params)).first;
+            pair.first->second = std::move(params);
         }
+        const auto paramsIt = pair.first;
         if (paramsIt->second.empty()) return modp->name();  // modp has no parameter
 
         string longname = modp->name();
diff --git a/src/V3Partition.h b/src/V3Partition.h
index 5aba6b009..72d4e5b92 100644
--- a/src/V3Partition.h
+++ b/src/V3Partition.h
@@ -93,10 +93,9 @@ public:
     PartPtrIdMap() = default;
     // METHODS
     uint64_t findId(const void* ptrp) const {
-        const auto it = m_id.find(ptrp);
-        if (it != m_id.end()) return it->second;
-        m_id[ptrp] = m_nextId;
-        return m_nextId++;
+        const auto pair = m_id.emplace(ptrp, m_nextId);
+        if (pair.second) ++m_nextId;
+        return pair.first->second;
     }
 };
 
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 18eb63df2..755e13fb4 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -178,12 +178,13 @@ private:
         const std::string type = AstCDType::typeToHold(items);
         const std::string name = "VlRandC<" + type + ", " + cvtToStr(items) + "ULL>";
         // Create or reuse (to avoid duplicates) randomization object dtype
-        auto it = m_randcDtypes.find(name);
-        if (it != m_randcDtypes.end()) return it->second;
-        AstCDType* newp = new AstCDType{fl, name};
-        v3Global.rootp()->typeTablep()->addTypesp(newp);
-        m_randcDtypes.emplace(name, newp);
-        return newp;
+        const auto pair = m_randcDtypes.emplace(name, nullptr);
+        if (pair.second) {
+            AstCDType* newp = new AstCDType{fl, name};
+            v3Global.rootp()->typeTablep()->addTypesp(newp);
+            pair.first->second = newp;
+        }
+        return pair.first->second;
     }
 
     AstVar* newRandcVarsp(AstVar* varp) {
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index a5cbfd3c9..e381b2727 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -155,10 +155,9 @@ class SchedGraphBuilder final : public VNVisitor {
             // rst), so we use a hash map to get the unique SchedSenVertex. (Note: This creates
             // separate vertices for ET_CHANGED and ET_HYBRID over the same expression, but that is
             // OK for now).
-            auto it = m_senVertices.find(*senItemp);
-
+            const auto pair = m_senVertices.emplace(*senItemp, nullptr);
             // If it does not exist, create it
-            if (it == m_senVertices.end()) {
+            if (pair.second) {
                 // Create the vertex
                 SchedSenVertex* const vtxp = new SchedSenVertex{m_graphp, senItemp};
 
@@ -168,11 +167,11 @@ class SchedGraphBuilder final : public VNVisitor {
                 });
 
                 // Store back to hash map so we can find it next time
-                it = m_senVertices.emplace(*senItemp, vtxp).first;
+                pair.first->second = vtxp;
             }
 
             // Cache sensitivity vertex
-            senItemp->user1p(it->second);
+            senItemp->user1p(pair.first->second);
         }
         return senItemp->user1u().to<SchedSenVertex*>();
     }
diff --git a/src/V3SenExprBuilder.h b/src/V3SenExprBuilder.h
index 3928c7ea5..70a981696 100644
--- a/src/V3SenExprBuilder.h
+++ b/src/V3SenExprBuilder.h
@@ -96,8 +96,8 @@ class SenExprBuilder final {
         AstNode* scopeExprp = exprp;
         if (AstVarRef* const refp = VN_CAST(exprp, VarRef)) scopeExprp = refp->varScopep();
         // Create the 'previous value' variable
-        auto it = m_prev.find(*scopeExprp);
-        if (it == m_prev.end()) {
+        const auto pair = m_prev.emplace(*scopeExprp, nullptr);
+        if (pair.second) {
             AstVarScope* prevp;
             if (m_scopep->isTop()) {
                 // For readability, use the scoped signal name if the trigger is a simple AstVarRef
@@ -118,7 +118,7 @@ class SenExprBuilder final {
                 prevp = new AstVarScope{flp, m_scopep, varp};
                 m_scopep->addVarsp(prevp);
             }
-            it = m_prev.emplace(*scopeExprp, prevp).first;
+            pair.first->second = prevp;
 
             // Add the initializer init
             AstAssign* const initp = new AstAssign{flp, new AstVarRef{flp, prevp, VAccess::WRITE},
@@ -126,7 +126,7 @@ class SenExprBuilder final {
             m_inits.push_back(initp);
         }
 
-        AstVarScope* const prevp = it->second;
+        AstVarScope* const prevp = pair.first->second;
 
         const auto wrPrev = [=]() { return new AstVarRef{flp, prevp, VAccess::WRITE}; };
 
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 54e6d5e76..adfc8e8c6 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -310,7 +310,7 @@ private:
         UASSERT_OBJ(varp->attrSplitVar(), varp, " no split_var metacomment");
         const MapIt it = m_map.find(varp);
         if (it == m_map.end()) return false;  // Not registered
-        const bool ok = m_map[varp].insert(ref).second;
+        const bool ok = it->second.insert(ref).second;
         return ok;
     }
 
diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index f1ba43274..3fcdabb90 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -71,12 +71,10 @@ public:
         if (m_symPrefix != "") os << "  symPrefix=" << m_symPrefix;
         os << "  n=" << nodep();
         os << '\n';
-        if (VL_UNCOVERABLE(doneSymsr.find(this) != doneSymsr.end())) {
+        if (VL_UNCOVERABLE(!doneSymsr.insert(this).second)) {
             os << indent << "| ^ duplicate, so no children printed\n";  // LCOV_EXCL_LINE
         } else {
-            doneSymsr.insert(this);
-            for (IdNameMap::const_iterator it = m_idNameMap.begin(); it != m_idNameMap.end();
-                 ++it) {
+            for (auto it = m_idNameMap.begin(); it != m_idNameMap.end(); ++it) {
                 if (numLevels >= 1) {
                     it->second->dumpIterate(os, doneSymsr, indent + "| ", numLevels - 1,
                                             it->first);
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index 583db4ab4..916e95d0d 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -85,10 +85,8 @@ public:
 
     // METHODS
     void addVertex(const T_Key& key) {
-        const auto itr = m_vertices.find(key);
-        UASSERT(itr == m_vertices.end(), "Vertex already exists with same key");
-        Vertex* v = new Vertex{this, key};
-        m_vertices[key] = v;
+        const bool newEntry = m_vertices.emplace(key, new Vertex{this, key}).second;
+        UASSERT(newEntry, "Vertex already exists with same key");
     }
 
     // For purposes of TSP, we are using non-directional graphs.
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 0bfa6cea0..9bf42e04d 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -971,19 +971,21 @@ private:
         // Only create one DPI Import prototype or DPI Export entry point for each unique cname as
         // it is illegal for the user to attach multiple tasks with different signatures to one DPI
         // cname.
-        const auto it = m_dpiNames.find(nodep->cname());
-        if (it == m_dpiNames.end()) {
+        const auto pair = m_dpiNames.emplace(std::piecewise_construct,  //
+                                             std::forward_as_tuple(nodep->cname()),
+                                             std::forward_as_tuple(nodep, signature, nullptr));
+        if (pair.second) {
             // First time encountering this cname. Create Import prototype / Export entry point
             AstCFunc* const funcp = nodep->dpiExport() ? makeDpiExportDispatcher(nodep, rtnvarp)
                                                        : makeDpiImportPrototype(nodep, rtnvarp);
-            m_dpiNames.emplace(nodep->cname(), std::make_tuple(nodep, signature, funcp));
+            std::get<2>(pair.first->second) = funcp;
             return funcp;
         } else {
             // Seen this cname import before. Check if it's the same prototype.
             const AstNodeFTask* firstNodep;
             string firstSignature;
             AstCFunc* firstFuncp;
-            std::tie(firstNodep, firstSignature, firstFuncp) = it->second;
+            std::tie(firstNodep, firstSignature, firstFuncp) = pair.first->second;
             if (signature != firstSignature) {
                 // Different signature, so error.
                 nodep->v3error("Duplicate declaration of DPI function with different signature: '"
@@ -1779,16 +1781,13 @@ void V3Task::taskConnectWrap(AstNodeFTaskRef* nodep, const V3TaskConnects& tconn
     // Make wrapper name such that is same iff same args are defaulted
     std::string newname = nodep->name() + "__Vtcwrap";
     for (const AstVar* varp : argWrap) newname += "_" + cvtToStr(varp->pinNum());
-    const auto namekey = std::make_pair(nodep->taskp(), newname);
-    auto& wrapMapr = statep->wrapMap();
-    const auto it = wrapMapr.find(namekey);
-    AstNodeFTask* newTaskp;
-    if (it != wrapMapr.end()) {
-        newTaskp = it->second;
-    } else {
-        newTaskp = taskConnectWrapNew(nodep->taskp(), newname, tconnects, argWrap);
-        wrapMapr.emplace(namekey, newTaskp);
+    const auto pair = statep->wrapMap().emplace(std::piecewise_construct,
+                                                std::forward_as_tuple(nodep->taskp(), newname),
+                                                std::forward_as_tuple(nullptr));
+    if (pair.second) {
+        pair.first->second = taskConnectWrapNew(nodep->taskp(), newname, tconnects, argWrap);
     }
+    AstNodeFTask* const newTaskp = pair.first->second;
 
     // Remove the defaulted arguments from original outside call
     for (const auto& tconnect : tconnects) {
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index a584d1748..444a49ebc 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -549,16 +549,11 @@ class TristateVisitor final : public TristateBaseVisitor {
     }
 
     void mapInsertLhsVarRef(AstVarRef* nodep) {
-        AstVar* const key = nodep->varp();
-        const auto it = m_lhsmap.find(key);
         UINFO(9, "    mapInsertLhsVarRef " << nodep << endl);
-        if (it == m_lhsmap.end()) {  // Not found
-            RefStrengthVec* const refsp = new RefStrengthVec;
-            refsp->push_back(RefStrength{nodep, m_currentStrength});
-            m_lhsmap.emplace(key, refsp);
-        } else {
-            it->second->push_back(RefStrength{nodep, m_currentStrength});
-        }
+        AstVar* const key = nodep->varp();
+        const auto pair = m_lhsmap.emplace(key, nullptr);
+        if (pair.second) pair.first->second = new RefStrengthVec;
+        pair.first->second->push_back(RefStrength{nodep, m_currentStrength});
     }
 
     AstNodeExpr* newEnableDeposit(AstSel* selp, AstNodeExpr* enp) {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 57804cfb5..8c653c2eb 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2296,15 +2296,14 @@ private:
             }
             num.opAssign(constp->num());
             // Look for duplicates
-            if (inits.find(num) != inits.end()) {  // IEEE says illegal
-                const AstNode* const otherp = inits.find(num)->second;
+            const auto pair = inits.emplace(num, itemp);
+            if (!pair.second) {  // IEEE says illegal
+                const AstNode* const otherp = pair.first->second;
                 itemp->v3error("Overlapping enumeration value: "
                                << itemp->prettyNameQ() << '\n'
                                << itemp->warnContextPrimary() << '\n'
                                << otherp->warnOther() << "... Location of original declaration\n"
                                << otherp->warnContextSecondary());
-            } else {
-                inits.emplace(num, itemp);
             }
             num.opAdd(one, constp->num());
         }
@@ -3985,12 +3984,10 @@ private:
                                    = VN_CAST(patp->keyp(), NodeDType)) {
                             // data_type: default_value
                             const string dtype = nodedtypep->dtypep()->prettyDTypeName();
-                            auto it = dtypemap.find(dtype);
-                            if (it == dtypemap.end()) {
-                                dtypemap.emplace(dtype, patp);
-                            } else {
+                            const auto pair = dtypemap.emplace(dtype, patp);
+                            if (!pair.second) {
                                 // Override stored default_value
-                                it->second = patp->cloneTree(false);
+                                pair.first->second = patp->cloneTree(false);
                             }
                         } else {
                             // Undefined pattern
@@ -7192,30 +7189,33 @@ private:
     }
     AstVar* dimensionVarp(AstNodeDType* nodep, VAttrType attrType, uint32_t msbdim) {
         // Return a variable table which has specified dimension properties for this variable
-        const auto pos = m_tableMap.find(std::make_pair(nodep, attrType));
-        if (pos != m_tableMap.end()) return pos->second;
-        AstNodeArrayDType* const vardtypep
-            = new AstUnpackArrayDType{nodep->fileline(), nodep->findSigned32DType(),
-                                      new AstRange(nodep->fileline(), msbdim, 0)};
-        AstInitArray* const initp = new AstInitArray{nodep->fileline(), vardtypep, nullptr};
-        v3Global.rootp()->typeTablep()->addTypesp(vardtypep);
-        AstVar* const varp = new AstVar{nodep->fileline(), VVarType::MODULETEMP,
-                                        "__Vdimtab_" + VString::downcase(attrType.ascii())
-                                            + cvtToStr(m_dtTables++),
-                                        vardtypep};
-        varp->isConst(true);
-        varp->isStatic(true);
-        varp->valuep(initp);
-        // Add to root, as don't know module we are in, and aids later structure sharing
-        v3Global.rootp()->dollarUnitPkgAddp()->addStmtsp(varp);
-        // Element 0 is a non-index and has speced values
-        initp->addValuep(dimensionValue(nodep->fileline(), nodep, attrType, 0));
-        for (unsigned i = 1; i < msbdim + 1; ++i) {
-            initp->addValuep(dimensionValue(nodep->fileline(), nodep, attrType, i));
+        const auto pair = m_tableMap.emplace(std::piecewise_construct,  //
+                                             std::forward_as_tuple(nodep, attrType),
+                                             std::forward_as_tuple(nullptr));
+        if (pair.second) {
+            AstNodeArrayDType* const vardtypep
+                = new AstUnpackArrayDType{nodep->fileline(), nodep->findSigned32DType(),
+                                          new AstRange(nodep->fileline(), msbdim, 0)};
+            AstInitArray* const initp = new AstInitArray{nodep->fileline(), vardtypep, nullptr};
+            v3Global.rootp()->typeTablep()->addTypesp(vardtypep);
+            AstVar* const varp = new AstVar{nodep->fileline(), VVarType::MODULETEMP,
+                                            "__Vdimtab_" + VString::downcase(attrType.ascii())
+                                                + cvtToStr(m_dtTables++),
+                                            vardtypep};
+            varp->isConst(true);
+            varp->isStatic(true);
+            varp->valuep(initp);
+            // Add to root, as don't know module we are in, and aids later structure sharing
+            v3Global.rootp()->dollarUnitPkgAddp()->addStmtsp(varp);
+            // Element 0 is a non-index and has speced values
+            initp->addValuep(dimensionValue(nodep->fileline(), nodep, attrType, 0));
+            for (unsigned i = 1; i < msbdim + 1; ++i) {
+                initp->addValuep(dimensionValue(nodep->fileline(), nodep, attrType, i));
+            }
+            userIterate(varp, nullptr);  // May have already done $unit so must do this var
+            pair.first->second = varp;
         }
-        userIterate(varp, nullptr);  // May have already done $unit so must do this var
-        m_tableMap.emplace(std::make_pair(nodep, attrType), varp);
-        return varp;
+        return pair.first->second;
     }
     uint64_t enumMaxValue(const AstNode* errNodep, const AstEnumDType* adtypep) {
         // Most enums unless overridden are 32 bits, so we size array
@@ -7237,94 +7237,97 @@ private:
         }
         return maxval;
     }
-    AstVar* enumVarp(AstEnumDType* nodep, VAttrType attrType, bool assoc, uint32_t msbdim) {
+    AstVar* enumVarp(AstEnumDType* const nodep, VAttrType attrType, bool assoc, uint32_t msbdim) {
         // Return a variable table which has specified dimension properties for this variable
-        const auto& tableMapr = nodep->tableMap();
-        const auto pos = tableMapr.find(attrType);
-        if (pos != tableMapr.end()) return pos->second;
-        UINFO(9, "Construct Venumtab attr=" << attrType.ascii() << " assoc=" << assoc
-                                            << " max=" << msbdim << " for " << nodep << endl);
-        AstNodeDType* basep;
-        if (attrType == VAttrType::ENUM_NAME) {
-            basep = nodep->findStringDType();
-        } else if (attrType == VAttrType::ENUM_VALID) {
-            // TODO in theory we could bit-pack the bits in the table, but
-            // would require additional operations to extract, so only
-            // would be worth it for larger tables which perhaps could be
-            // better handled with equation generation?
-            basep = nodep->findBitDType();
-        } else {
-            basep = nodep->dtypep();
-        }
-        AstNodeDType* vardtypep;
-        if (assoc) {
-            vardtypep = new AstAssocArrayDType{nodep->fileline(), basep, nodep};
-        } else {
-            vardtypep = new AstUnpackArrayDType{nodep->fileline(), basep,
-                                                new AstRange(nodep->fileline(), msbdim, 0)};
-        }
-        AstInitArray* const initp = new AstInitArray{nodep->fileline(), vardtypep, nullptr};
-        v3Global.rootp()->typeTablep()->addTypesp(vardtypep);
-        AstVar* const varp = new AstVar{nodep->fileline(), VVarType::MODULETEMP,
-                                        "__Venumtab_" + VString::downcase(attrType.ascii())
-                                            + cvtToStr(m_dtTables++),
-                                        vardtypep};
-        varp->lifetime(VLifetime::STATIC);
-        varp->isConst(true);
-        varp->isStatic(true);
-        varp->valuep(initp);
-        // Add to root, as don't know module we are in, and aids later structure sharing
-        v3Global.rootp()->dollarUnitPkgAddp()->addStmtsp(varp);
+        const auto pair = nodep->tableMap().emplace(attrType, nullptr);
+        if (pair.second) {
+            UINFO(9, "Construct Venumtab attr=" << attrType.ascii() << " assoc=" << assoc
+                                                << " max=" << msbdim << " for " << nodep << endl);
+            AstNodeDType* basep;
+            if (attrType == VAttrType::ENUM_NAME) {
+                basep = nodep->findStringDType();
+            } else if (attrType == VAttrType::ENUM_VALID) {
+                // TODO in theory we could bit-pack the bits in the table, but
+                // would require additional operations to extract, so only
+                // would be worth it for larger tables which perhaps could be
+                // better handled with equation generation?
+                basep = nodep->findBitDType();
+            } else {
+                basep = nodep->dtypep();
+            }
+            AstNodeDType* vardtypep;
+            if (assoc) {
+                vardtypep = new AstAssocArrayDType{nodep->fileline(), basep, nodep};
+            } else {
+                vardtypep = new AstUnpackArrayDType{nodep->fileline(), basep,
+                                                    new AstRange(nodep->fileline(), msbdim, 0)};
+            }
+            AstInitArray* const initp = new AstInitArray{nodep->fileline(), vardtypep, nullptr};
+            v3Global.rootp()->typeTablep()->addTypesp(vardtypep);
+            AstVar* const varp = new AstVar{nodep->fileline(), VVarType::MODULETEMP,
+                                            "__Venumtab_" + VString::downcase(attrType.ascii())
+                                                + cvtToStr(m_dtTables++),
+                                            vardtypep};
+            varp->lifetime(VLifetime::STATIC);
+            varp->isConst(true);
+            varp->isStatic(true);
+            varp->valuep(initp);
+            // Add to root, as don't know module we are in, and aids later structure sharing
+            v3Global.rootp()->dollarUnitPkgAddp()->addStmtsp(varp);
 
-        // Default for all unspecified values
-        if (attrType == VAttrType::ENUM_NAME) {
-            initp->defaultp(new AstConst{nodep->fileline(), AstConst::String{}, ""});
-        } else if (attrType == VAttrType::ENUM_NEXT || attrType == VAttrType::ENUM_PREV) {
-            initp->defaultp(new AstConst{nodep->fileline(), V3Number{nodep, nodep->width(), 0}});
-        } else if (attrType == VAttrType::ENUM_VALID) {
-            initp->defaultp(new AstConst{nodep->fileline(), AstConst::BitFalse{}});
-        } else {
-            nodep->v3fatalSrc("Bad case");
-        }
+            // Default for all unspecified values
+            if (attrType == VAttrType::ENUM_NAME) {
+                initp->defaultp(new AstConst{nodep->fileline(), AstConst::String{}, ""});
+            } else if (attrType == VAttrType::ENUM_NEXT || attrType == VAttrType::ENUM_PREV) {
+                initp->defaultp(
+                    new AstConst{nodep->fileline(), V3Number{nodep, nodep->width(), 0}});
+            } else if (attrType == VAttrType::ENUM_VALID) {
+                initp->defaultp(new AstConst{nodep->fileline(), AstConst::BitFalse{}});
+            } else {
+                nodep->v3fatalSrc("Bad case");
+            }
 
-        // Find valid values and populate
-        UASSERT_OBJ(nodep->itemsp(), nodep, "enum without items");
-        std::map<uint64_t, AstNodeExpr*> values;
-        {
-            AstEnumItem* const firstp = nodep->itemsp();
-            const AstEnumItem* prevp = firstp;  // Prev must start with last item
-            while (prevp->nextp()) prevp = VN_AS(prevp->nextp(), EnumItem);
-            for (AstEnumItem* itemp = firstp; itemp;) {
-                AstEnumItem* const nextp = VN_AS(itemp->nextp(), EnumItem);
-                const AstConst* const vconstp = VN_AS(itemp->valuep(), Const);
-                UASSERT_OBJ(vconstp, nodep, "Enum item without constified value");
-                const uint64_t i = vconstp->toUQuad();
-                if (attrType == VAttrType::ENUM_NAME) {
-                    values[i] = new AstConst{nodep->fileline(), AstConst::String{}, itemp->name()};
-                } else if (attrType == VAttrType::ENUM_NEXT) {
-                    values[i] = (nextp ? nextp : firstp)->valuep()->cloneTree(false);  // A const
-                } else if (attrType == VAttrType::ENUM_PREV) {
-                    values[i] = prevp->valuep()->cloneTree(false);  // A const
-                } else if (attrType == VAttrType::ENUM_VALID) {
-                    values[i] = new AstConst{nodep->fileline(), AstConst::BitTrue{}};
-                } else {
-                    nodep->v3fatalSrc("Bad case");
+            // Find valid values and populate
+            UASSERT_OBJ(nodep->itemsp(), nodep, "enum without items");
+            std::map<uint64_t, AstNodeExpr*> values;
+            {
+                AstEnumItem* const firstp = nodep->itemsp();
+                const AstEnumItem* prevp = firstp;  // Prev must start with last item
+                while (prevp->nextp()) prevp = VN_AS(prevp->nextp(), EnumItem);
+                for (AstEnumItem* itemp = firstp; itemp;) {
+                    AstEnumItem* const nextp = VN_AS(itemp->nextp(), EnumItem);
+                    const AstConst* const vconstp = VN_AS(itemp->valuep(), Const);
+                    UASSERT_OBJ(vconstp, nodep, "Enum item without constified value");
+                    const uint64_t i = vconstp->toUQuad();
+                    if (attrType == VAttrType::ENUM_NAME) {
+                        values[i]
+                            = new AstConst{nodep->fileline(), AstConst::String{}, itemp->name()};
+                    } else if (attrType == VAttrType::ENUM_NEXT) {
+                        values[i]
+                            = (nextp ? nextp : firstp)->valuep()->cloneTree(false);  // A const
+                    } else if (attrType == VAttrType::ENUM_PREV) {
+                        values[i] = prevp->valuep()->cloneTree(false);  // A const
+                    } else if (attrType == VAttrType::ENUM_VALID) {
+                        values[i] = new AstConst{nodep->fileline(), AstConst::BitTrue{}};
+                    } else {
+                        nodep->v3fatalSrc("Bad case");
+                    }
+                    prevp = itemp;
+                    itemp = nextp;
                 }
-                prevp = itemp;
-                itemp = nextp;
             }
-        }
-        // Add all specified values to table
-        if (assoc) {
-            for (const auto& itr : values) initp->addIndexValuep(itr.first, itr.second);
-        } else {
-            for (uint64_t i = 0; i < (msbdim + 1); ++i) {
-                if (values[i]) initp->addIndexValuep(i, values[i]);
+            // Add all specified values to table
+            if (assoc) {
+                for (const auto& itr : values) initp->addIndexValuep(itr.first, itr.second);
+            } else {
+                for (uint64_t i = 0; i < (msbdim + 1); ++i) {
+                    if (values[i]) initp->addIndexValuep(i, values[i]);
+                }
             }
+            userIterate(varp, nullptr);  // May have already done $unit so must do this var
+            pair.first->second = varp;
         }
-        userIterate(varp, nullptr);  // May have already done $unit so must do this var
-        nodep->tableMap().emplace(attrType, varp);
-        return varp;
+        return pair.first->second;
     }
 
     PatVecMap patVectorMap(AstPattern* nodep, const VNumRange& range) {
@@ -7340,10 +7343,9 @@ private:
                                           << patp->keyp()->prettyTypeName());
                 }
             }
-            if (patmap.find(element) != patmap.end()) {
+            const bool newEntry = patmap.emplace(element, patp).second;
+            if (!newEntry) {
                 patp->v3error("Assignment pattern key used multiple times: " << element);
-            } else {
-                patmap.emplace(element, patp);
             }
             element += range.leftToRightInc();
         }
diff --git a/src/VlcPoint.h b/src/VlcPoint.h
index 5c51b7adf..a4618daea 100644
--- a/src/VlcPoint.h
+++ b/src/VlcPoint.h
@@ -139,18 +139,10 @@ public:
     }
     VlcPoint& pointNumber(uint64_t num) { return m_points[num]; }
     uint64_t findAddPoint(const string& name, uint64_t count) {
-        uint64_t pointnum;
-        const auto iter = m_nameMap.find(name);
-        if (iter != m_nameMap.end()) {
-            pointnum = iter->second;
-            m_points[pointnum].countInc(count);
-        } else {
-            pointnum = m_numPoints++;
-            VlcPoint point{name, pointnum};
-            point.countInc(count);
-            m_points.push_back(point);
-            m_nameMap.emplace(point.name(), point.pointNum());
-        }
+        const auto pair = m_nameMap.emplace(name, m_numPoints);
+        if (pair.second) m_points.emplace_back(name, m_numPoints++);
+        const uint64_t pointnum = pair.first->second;
+        m_points[pointnum].countInc(count);
         return pointnum;
     }
 };
diff --git a/src/VlcSource.h b/src/VlcSource.h
index 523b60861..74584be63 100644
--- a/src/VlcSource.h
+++ b/src/VlcSource.h
@@ -36,7 +36,7 @@ private:
     using PointsSet = std::set<const VlcPoint*>;
 
     // MEMBERS
-    int m_lineno;  ///< Line number
+    const int m_lineno;  ///< Line number
     uint64_t m_count = 0;  ///< Count
     bool m_ok = false;  ///< Coverage is above threshold
     PointsSet m_points;  // Points on this line
@@ -94,9 +94,7 @@ public:
 
     // METHODS
     void lineIncCount(int lineno, uint64_t count, bool ok, const VlcPoint* pointp) {
-        auto lit = m_lines.find(lineno);
-        if (lit == m_lines.end()) lit = m_lines.emplace(lineno, VlcSourceCount{lineno}).first;
-        VlcSourceCount& sc = lit->second;
+        VlcSourceCount& sc = m_lines.emplace(lineno, lineno).first->second;
         sc.incCount(count, ok);
         sc.insertPoint(pointp);
     }

From de4c6065dc11032dac6d77513b2b1f05970866c2 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 15:58:29 +0100
Subject: [PATCH 144/157] make: add test-snap/test-diff targets (#4635)

---
 .gitignore            |  1 +
 Makefile.in           |  4 ++++
 docs/internals.rst    | 13 +++++++++++++
 test_regress/Makefile | 42 ++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 60 insertions(+)

diff --git a/.gitignore b/.gitignore
index e7e3d788a..c04dcedeb 100644
--- a/.gitignore
+++ b/.gitignore
@@ -43,3 +43,4 @@ verilator-config-version.cmake
 /.vscode/
 /.idea/
 /cmake-build-*/
+/test_regress/snapshot/
diff --git a/Makefile.in b/Makefile.in
index 358823411..5cb2b29e7 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -173,6 +173,10 @@ smoke-test: all_nomsg
 test_regress: all_nomsg
 	$(MAKE) -C test_regress
 
+.PHONY: test-snap test-diff
+test-snap test-diff:
+	$(MAKE) -C test_regress $@
+
 examples: all_nomsg
 	for p in $(EXAMPLES) ; do \
 	  $(MAKE) -C $$p VERILATOR_ROOT=`pwd` || exit 10; \
diff --git a/docs/internals.rst b/docs/internals.rst
index d03eebd17..fba09bd72 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1462,6 +1462,19 @@ There are some traps to avoid when running regression tests
   system-dependent, but on Fedora Linux it would require editing the
   ``/etc/security/limits.conf`` file as root.
 
+Diffing generated code after changes
+------------------------------------
+
+When making a change in the code generation area that should not change the
+actual emitted code, it is useful to perform a diff to make sure the emitted
+code really did not change. To do this, the top level Makefile provides the
+*test-snap* and *test-diff* targets:
+
+- Run the test suite with ``make test``
+- Take a snapshot with ``make test-snap``
+- Apply your changes
+- Run the test suite again with ``make test``
+- See the changes in the output with ``make test-diff``
 
 Continuous Integration
 ----------------------
diff --git a/test_regress/Makefile b/test_regress/Makefile
index b148f7bdc..57b804818 100644
--- a/test_regress/Makefile
+++ b/test_regress/Makefile
@@ -89,3 +89,45 @@ maintainer-copy::
 clean mostlyclean distclean maintainer-clean::
 	-rm -rf obj_* simv* simx* csrc cov_work INCA_libs *.log *.key logs vc_hdrs.h
 	-rm -rf t/obj_*
+
+distclean::
+	-rm -rf snapshot
+
+######################################################################
+# Generated code snapshot and diff for tests
+
+# Can be overridden for multiple snapshots
+TEST_SNAP_DIR ?= snapshot
+
+# Command to diff directories
+TEST_DIFF_TOOL ?= $(if $(shell which icdiff), icdiff -N -r, diff -r)
+
+TEST_SNAP_IGNORE := *.status *.log *.dat *.d *.o *.a *.so *stats.txt *.html \
+                    *.includecache *.out *.fst *.fst.vcd  *.tree *.dot \
+                    *.csv *.xml *.hash *.cmake gmon.out.* CMakeFiles \
+                    profile_exec.vcd t_pgo_threads
+
+define TEST_SNAP_template
+mkdir -p $(TEST_SNAP_DIR)
+rm -rf $(TEST_SNAP_DIR)/obj_$(1)
+cp -r obj_$(1) $(TEST_SNAP_DIR)/
+find $(TEST_SNAP_DIR)/obj_$(1) \( $(TEST_SNAP_IGNORE:%=-name "%" -o) \
+  -type f -executable \) -prune | xargs rm -r
+endef
+
+.PHONY: test-snap
+test-snap:
+	$(call TEST_SNAP_template,vlt)
+	$(call TEST_SNAP_template,vltmt)
+	$(call TEST_SNAP_template,dist)
+
+.PHONY: impl-test-diff
+impl-test-diff:
+	$(TEST_DIFF_TOOL) $(TEST_SNAP_DIR)/obj_vlt   obj_vlt
+	$(TEST_DIFF_TOOL) $(TEST_SNAP_DIR)/obj_vltmt obj_vltmt
+	$(TEST_DIFF_TOOL) $(TEST_SNAP_DIR)/obj_dist  obj_dist
+
+.PHONY: test-diff
+test-diff:
+	$(MAKE) impl-test-diff | grep -v "Only in obj_" | \
+    $$(git config --default less --global --get core.pager)

From e708670f9a7c055e043c095f5433c814cf5bfd7f Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Oct 2023 20:31:52 +0100
Subject: [PATCH 145/157] Minor memory optimizatoin of AstUser*Allocator

---
 src/V3AstUserAllocator.h | 11 +++--------
 1 file changed, 3 insertions(+), 8 deletions(-)

diff --git a/src/V3AstUserAllocator.h b/src/V3AstUserAllocator.h
index c3b0d1dc2..521b0b1f6 100644
--- a/src/V3AstUserAllocator.h
+++ b/src/V3AstUserAllocator.h
@@ -33,7 +33,7 @@ class AstUserAllocatorBase VL_NOT_FINAL {
     static_assert(std::is_base_of<AstNode, T_Node>::value, "T_Node must be an AstNode type");
 
 private:
-    std::vector<T_Data*> m_allocated;
+    std::deque<T_Data> m_allocated;
 
     T_Data* getUserp(const T_Node* nodep) const {
         if VL_CONSTEXPR_CXX17 (T_UserN == 1) {
@@ -83,11 +83,6 @@ protected:
         }
     }
 
-    virtual ~AstUserAllocatorBase() {
-        // Delete all allocated data structures
-        for (T_Data* const p : m_allocated) { delete p; }
-    }
-
     VL_UNCOPYABLE(AstUserAllocatorBase);
 
 public:
@@ -96,8 +91,8 @@ public:
     T_Data& operator()(T_Node* nodep, Args&&... args) {
         T_Data* userp = getUserp(nodep);
         if (!userp) {
-            userp = new T_Data{std::forward<Args>(args)...};
-            m_allocated.push_back(userp);
+            m_allocated.emplace_back(std::forward<Args>(args)...);
+            userp = &m_allocated.back();
             setUserp(nodep, userp);
         }
         return *userp;

From 7ba6647c4f30a4c5198289fb26b10b4c48a4ccdf Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Oct 2023 20:11:28 -0400
Subject: [PATCH 146/157] Internals: Cleanup some V3Graph constructors/funcs
 and docs. No functional change.

---
 src/V3EmitCSyms.cpp |  2 +-
 src/V3Graph.cpp     |  5 +++--
 src/V3Graph.h       | 31 +++++++++++++++++++++----------
 src/V3GraphAcyc.cpp |  2 +-
 src/V3GraphAlg.cpp  | 18 ++++++++++++------
 src/V3LinkCells.cpp |  2 +-
 src/V3LinkDot.cpp   |  2 +-
 src/V3Order.cpp     |  8 ++++----
 src/V3Partition.cpp |  4 ++--
 src/V3Split.cpp     |  4 ++--
 src/V3Trace.cpp     |  4 ++--
 11 files changed, 50 insertions(+), 32 deletions(-)

diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index fc197d784..bf020e06c 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -1119,5 +1119,5 @@ void EmitCSyms::emitDpiImp() {
 
 void V3EmitC::emitcSyms(bool dpiHdrOnly) {
     UINFO(2, __FUNCTION__ << ": " << endl);
-    EmitCSyms(v3Global.rootp(), dpiHdrOnly);
+    EmitCSyms{v3Global.rootp(), dpiHdrOnly};
 }
diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp
index e8ab00441..f77f1d056 100644
--- a/src/V3Graph.cpp
+++ b/src/V3Graph.cpp
@@ -266,7 +266,7 @@ void V3Graph::loopsVertexCb(V3GraphVertex* vertexp) {
     if (debug()) std::cerr << "-Info-Loop: " << cvtToHex(vertexp) << " " << vertexp << endl;
 }
 
-void V3Graph::dump(std::ostream& os) {
+void V3Graph::dump(std::ostream& os) const {
     // This generates a file used by graphviz, https://www.graphviz.org
     os << " Graph:\n";
     // Print vertices
@@ -284,7 +284,8 @@ void V3Graph::dump(std::ostream& os) {
     }
 }
 
-void V3Graph::dumpEdge(std::ostream& os, const V3GraphVertex* vertexp, const V3GraphEdge* edgep) {
+void V3Graph::dumpEdge(std::ostream& os, const V3GraphVertex* vertexp,
+                       const V3GraphEdge* edgep) const {
     if (edgep->weight() && (edgep->fromp() == vertexp || edgep->top() == vertexp)) {
         os << "\t\t";
         if (edgep->fromp() == vertexp) os << "-> " << edgep->top()->name();
diff --git a/src/V3Graph.h b/src/V3Graph.h
index cd816bd32..c2973cae7 100644
--- a/src/V3Graph.h
+++ b/src/V3Graph.h
@@ -91,7 +91,7 @@ protected:
     // METHODS
     double orderDFSIterate(V3GraphVertex* vertexp) VL_MT_DISABLED;
     void dumpEdge(std::ostream& os, const V3GraphVertex* vertexp,
-                  const V3GraphEdge* edgep) VL_MT_DISABLED;
+                  const V3GraphEdge* edgep) const VL_MT_DISABLED;
     void verticesUnlink() { m_vertices.reset(); }
     // ACCESSORS
 
@@ -102,13 +102,14 @@ public:
 
     // METHODS
     void clear() VL_MT_DISABLED;  // Empty it of all vertices/edges, as if making a new object
-    void clearColors() VL_MT_DISABLED;
     bool empty() const { return m_vertices.empty(); }
-
     V3GraphVertex* verticesBeginp() const { return m_vertices.begin(); }
 
     // METHODS - ALGORITHMS
 
+    /// Clears color
+    void clearColors() VL_MT_DISABLED;
+
     /// Assign same color to all vertices in the same weakly connected component
     /// Thus different color if there's no edges between the two subgraphs
     void weaklyConnected(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
@@ -116,10 +117,12 @@ public:
     /// Assign same color to all vertices that are strongly connected
     /// Thus different color if there's no directional circuit within the subgraphs.
     /// (I.E. all loops will occur within each color, not between them.)
+    /// Side-effect: changes user()
     void stronglyConnected(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Assign an ordering number to all vertexes in a tree.
     /// All nodes with no inputs will get rank 1
+    /// Side-effect: changes user()
     void rank(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
     void rank() VL_MT_DISABLED;
 
@@ -131,20 +134,24 @@ public:
     /// Order all vertices by rank and fanout, lowest first
     /// Sort all vertices by rank and fanout, lowest first
     /// Sort all edges by weight, lowest first
-    /// Side-effect: assigns ranks to every node.
+    /// Side-effect: assigns ranks to every node, and changes user()
     void order() VL_MT_DISABLED;
 
-    // Similar to order() but does not assign ranks. Caller must
-    // ensure that the graph has been ranked ahead of the call.
+    /// Similar to order() but does not assign ranks. Caller must
+    /// ensure that the graph has been ranked ahead of the call.
+    /// Side-effect: assigns ranks to every node, and changes user()
     void orderPreRanked() VL_MT_DISABLED;
 
     /// Make acyclical (into a tree) by breaking a minimal subset of cutable edges.
+    /// Side-effect: changes rank(), changes user()
     void acyclic(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any redundant edges, weights become MAX of any other weight
-    void removeRedundantEdges(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
+    /// Side-effect: changes user()
+    void removeRedundantEdgesMax(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any redundant edges, weights become SUM of any other weight
+    /// Side-effect: changes user()
     void removeRedundantEdgesSum(V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
 
     /// Remove any transitive edges.  E.g. if have edges A->B, B->C, and A->C
@@ -154,21 +161,25 @@ public:
     void removeTransitiveEdges() VL_MT_DISABLED;
 
     /// Call loopsVertexCb on any one loop starting where specified
+    /// Side-effect: changes user()
     void reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) VL_MT_DISABLED;
 
     /// Build a subgraph of all loops starting where specified
+    /// Side-effect: changes user()
     void subtreeLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp,
                       V3Graph* loopGraphp) VL_MT_DISABLED;
 
+    /// Clear user()
+    void userClearVertices() VL_MT_DISABLED;
+    void userClearEdges() VL_MT_DISABLED;
+
     /// Debugging
-    void dump(std::ostream& os = std::cout) VL_MT_DISABLED;
+    void dump(std::ostream& os = std::cout) const VL_MT_DISABLED;
     void dumpDotFile(const string& filename, bool colorAsSubgraph) const VL_MT_DISABLED;
     void dumpDotFilePrefixed(const string& nameComment,
                              bool colorAsSubgraph = false) const VL_MT_DISABLED;
     void dumpDotFilePrefixedAlways(const string& nameComment,
                                    bool colorAsSubgraph = false) const VL_MT_DISABLED;
-    void userClearVertices() VL_MT_DISABLED;
-    void userClearEdges() VL_MT_DISABLED;
     static void selfTest() VL_MT_DISABLED;
 
     // CALLBACKS
diff --git a/src/V3GraphAcyc.cpp b/src/V3GraphAcyc.cpp
index 968efd38b..4bf46a495 100644
--- a/src/V3GraphAcyc.cpp
+++ b/src/V3GraphAcyc.cpp
@@ -574,7 +574,7 @@ void GraphAcyc::main() {
 
 void V3Graph::acyclic(V3EdgeFuncP edgeFuncp) {
     UINFO(4, "Acyclic\n");
-    GraphAcyc acyc(this, edgeFuncp);
+    GraphAcyc acyc{this, edgeFuncp};
     acyc.main();
     UINFO(4, "Acyclic done\n");
 }
diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp
index 7f00a7067..43edcb9e0 100644
--- a/src/V3GraphAlg.cpp
+++ b/src/V3GraphAlg.cpp
@@ -34,6 +34,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 //######################################################################
 //######################################################################
 // Algorithms - Remove redundancies
+// Changes user() and weight()
 
 class GraphRemoveRedundant final : GraphAlg<> {
     const bool m_sumWeights;  ///< Sum, rather then maximize weights
@@ -92,11 +93,11 @@ public:
     ~GraphRemoveRedundant() = default;
 };
 
-void V3Graph::removeRedundantEdges(V3EdgeFuncP edgeFuncp) {
-    GraphRemoveRedundant(this, edgeFuncp, false);
+void V3Graph::removeRedundantEdgesMax(V3EdgeFuncP edgeFuncp) {
+    GraphRemoveRedundant{this, edgeFuncp, false};
 }
 void V3Graph::removeRedundantEdgesSum(V3EdgeFuncP edgeFuncp) {
-    GraphRemoveRedundant(this, edgeFuncp, true);
+    GraphRemoveRedundant{this, edgeFuncp, true};
 }
 
 //######################################################################
@@ -132,6 +133,7 @@ void V3Graph::removeTransitiveEdges() { GraphAlgRemoveTransitiveEdges{this}.go()
 //######################################################################
 //######################################################################
 // Algorithms - weakly connected components
+// Changes color()
 
 class GraphAlgWeakly final : GraphAlg<> {
 private:
@@ -173,6 +175,7 @@ void V3Graph::weaklyConnected(V3EdgeFuncP edgeFuncp) { GraphAlgWeakly{this, edge
 //######################################################################
 //######################################################################
 // Algorithms - strongly connected components
+// Changes user() and color()
 
 class GraphAlgStrongly final : GraphAlg<> {
 private:
@@ -263,6 +266,7 @@ void V3Graph::stronglyConnected(V3EdgeFuncP edgeFuncp) { GraphAlgStrongly{this,
 //######################################################################
 //######################################################################
 // Algorithms - ranking
+// Changes user() and rank()
 
 class GraphAlgRank final : GraphAlg<> {
 private:
@@ -317,7 +321,8 @@ void V3Graph::rank(V3EdgeFuncP edgeFuncp) { GraphAlgRank{this, edgeFuncp}; }
 
 //######################################################################
 //######################################################################
-// Algorithms - ranking
+// Algorithms - report loops
+// Changes user()
 
 class GraphAlgRLoops final : GraphAlg<> {
 private:
@@ -365,12 +370,13 @@ public:
 };
 
 void V3Graph::reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) {
-    GraphAlgRLoops(this, edgeFuncp, vertexp);
+    GraphAlgRLoops{this, edgeFuncp, vertexp};
 }
 
 //######################################################################
 //######################################################################
 // Algorithms - subtrees
+// Changes user()
 
 class GraphAlgSubtrees final : GraphAlg<> {
 private:
@@ -414,7 +420,7 @@ public:
 
 //! Report the entire connected graph with a loop or loops
 void V3Graph::subtreeLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp, V3Graph* loopGraphp) {
-    GraphAlgSubtrees(this, loopGraphp, edgeFuncp, vertexp);
+    GraphAlgSubtrees{this, loopGraphp, edgeFuncp, vertexp};
 }
 
 //######################################################################
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 14bcfee31..60647c7d2 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -164,7 +164,7 @@ private:
         readModNames();
         iterateChildren(nodep);
         // Find levels in graph
-        m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+        m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
         if (dumpGraphLevel()) m_graph.dumpDotFilePrefixed("linkcells");
         m_graph.rank();
         for (V3GraphVertex* itp = m_graph.verticesBeginp(); itp; itp = itp->verticesNextp()) {
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 2726f2e97..3e53ce387 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3749,7 +3749,7 @@ void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
     if (debug() >= 5 || dumpTreeLevel() >= 9) {
         v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot.tree"));
     }
-    LinkDotState state(rootp, step);
+    LinkDotState state{rootp, step};
     const LinkDotFindVisitor visitor{rootp, &state};
     if (debug() >= 5 || dumpTreeLevel() >= 9) {
         v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-find.tree"));
diff --git a/src/V3Order.cpp b/src/V3Order.cpp
index 415505c0d..7b59511fc 100644
--- a/src/V3Order.cpp
+++ b/src/V3Order.cpp
@@ -1291,12 +1291,12 @@ void OrderProcess::processMTasks() {
     mtask_pmbg.build();
 
     // Needed? We do this for m_pomGraph in serial mode, so do it here too:
-    logicGraph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+    logicGraph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
 
     // Partition logicGraph into LogicMTask's. The partitioner will annotate
     // each vertex in logicGraph with a 'color' which is really an mtask ID
     // in this context.
-    V3Partition partitioner(&m_graph, &logicGraph);
+    V3Partition partitioner{&m_graph, &logicGraph};
     V3Graph mtasks;
     partitioner.go(&mtasks);
 
@@ -1307,7 +1307,7 @@ void OrderProcess::processMTasks() {
     // This is the order we'll execute logic nodes within the MTask.
     //
     // MTasks may span scopes and domains, so sort by both here:
-    GraphStream<OrderVerticesByDomainThenScope> emit_logic(&logicGraph);
+    GraphStream<OrderVerticesByDomainThenScope> emit_logic{&logicGraph};
     const V3GraphVertex* moveVxp;
     while ((moveVxp = emit_logic.nextp())) {
         const MTaskMoveVertex* const movep = static_cast<const MTaskMoveVertex*>(moveVxp);
@@ -1435,7 +1435,7 @@ void OrderProcess::process(bool multiThreaded) {
         processMoveBuildGraph();
         // Different prefix (ordermv) as it's not the same graph
         if (dumpGraphLevel() >= 4) m_pomGraph.dumpDotFilePrefixed(m_tag + "_ordermv_start");
-        m_pomGraph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+        m_pomGraph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
         if (dumpGraphLevel() >= 4) m_pomGraph.dumpDotFilePrefixed(m_tag + "_ordermv_simpl");
 
         UINFO(2, "  Move...\n");
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index 2a8c64993..26403446d 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -2586,7 +2586,7 @@ void V3Partition::debugMTaskGraphStats(const V3Graph* graphp, const string& stag
     // Look only at the cost of each mtask, neglect communication cost.
     // This will show us how much parallelism we expect, assuming cache-miss
     // costs are minor and the cost of running logic is the dominant cost.
-    PartParallelismEst vertexParEst(graphp);
+    PartParallelismEst vertexParEst{graphp};
     vertexParEst.traverse();
     vertexParEst.statsReport(stage);
     if (debug() >= 4) {
@@ -3047,7 +3047,7 @@ static void finalizeCosts(V3Graph* execMTaskGraphp) {
 
     // Record summary stats for final m_tasks graph.
     // (More verbose stats are available with --debugi-V3Partition >= 3.)
-    PartParallelismEst parEst(execMTaskGraphp);
+    PartParallelismEst parEst{execMTaskGraphp};
     parEst.traverse();
     parEst.statsReport("final");
     if (debug() >= 3) {
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index c543aec1d..08d39bc18 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -456,7 +456,7 @@ protected:
     void cleanupBlockGraph(AstNode* nodep) {
         // Transform the graph into what we need
         UINFO(5, "ReorderBlock " << nodep << endl);
-        m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+        m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
 
         if (dumpGraphLevel() >= 9) m_graph.dumpDotFilePrefixed("reorderg_nodup", false);
 
@@ -893,7 +893,7 @@ protected:
     void colorAlwaysGraph() {
         // Color the graph to indicate subsets, each of which
         // we can split into its own always block.
-        m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+        m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
 
         // Some vars are primary inputs to the always block; prune
         // edges on those vars. Reasoning: if two statements both depend
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index a7bc4fa42..070092cd9 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -254,7 +254,7 @@ private:
             // Remove multiple variables connecting funcs to traces
             // We do this twice, as then we have fewer edges to multiply out in the below
             // expansion.
-            m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+            m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
             // Remove all Cfunc nodes
             for (V3GraphVertex *nextp, *itp = m_graph.verticesBeginp(); itp; itp = nextp) {
                 nextp = itp->verticesNextp();
@@ -266,7 +266,7 @@ private:
         }
 
         // Remove multiple variables connecting funcs to traces
-        m_graph.removeRedundantEdges(&V3GraphEdge::followAlwaysTrue);
+        m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
 
         // If there are any edges from a always, keep only the always
         for (const V3GraphVertex* itp = m_graph.verticesBeginp(); itp;

From 3c144ada530419e6ee29675819a6b4c70f0fd968 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 29 Oct 2023 01:12:27 +0100
Subject: [PATCH 147/157] Delete AstNode user5 (#4638)

This saves about 5% memory. V3AstUserAllocator is appropriate for most use
cases, performance is marginally up as we are mostly D-cache bound on
large designs.
---
 docs/internals.rst       |  6 ++--
 src/V3Ast.cpp            |  3 --
 src/V3Ast.h              | 27 ----------------
 src/V3AstNodes.cpp       |  1 -
 src/V3AstUserAllocator.h | 19 ++++-------
 src/V3Delayed.cpp        | 60 +++++++++++++++++++----------------
 src/V3Gate.cpp           | 64 +++++++++++++++++++++++--------------
 src/V3Inline.cpp         | 11 +++----
 src/V3InstrCount.cpp     | 26 +++++++--------
 src/V3InstrCount.h       |  2 +-
 src/V3LinkDot.cpp        | 24 +++++++-------
 src/V3MergeCond.cpp      | 21 ++++++-------
 src/V3Param.cpp          | 58 +++++++++++++++++-----------------
 src/V3Partition.cpp      |  4 +--
 src/V3Simulate.h         | 68 ++++++++++++++++++++++------------------
 src/V3Timing.cpp         |  6 ++--
 src/V3Tristate.cpp       | 59 +++++++++++++++++++---------------
 17 files changed, 226 insertions(+), 233 deletions(-)

diff --git a/docs/internals.rst b/docs/internals.rst
index fba09bd72..30a27bb5e 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1222,9 +1222,9 @@ There are three ways data is passed between visitor functions.
 
 2. User attributes. Each ``AstNode`` (**Note.** The AST node, not the
    visitor) has five user attributes, which may be accessed as an
-   integer using the ``user1()`` through ``user5()`` methods, or as a
+   integer using the ``user1()`` through ``user4()`` methods, or as a
    pointer (of type ``AstNUser``) using the ``user1p()`` through
-   ``user5p()`` methods (a common technique lifted from graph traversal
+   ``user4p()`` methods (a common technique lifted from graph traversal
    packages).
 
    A visitor first clears the one it wants to use by calling
@@ -1653,7 +1653,7 @@ Source file and line
    file is ``a``, the 26th is ``z``, the 27th is ``aa``, and so on.
 
 User pointers
-   Shows the value of the node's user1p...user5p, if non-NULL.
+   Shows the value of the node's user1p...user4p, if non-NULL.
 
 Data type
    Many nodes have an explicit data type. "@dt=0x..." indicates the
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index f7441655c..973814442 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -41,13 +41,11 @@ uint32_t VNUser1InUse::s_userCntGbl = 0;  // Hot cache line, leave adjacent
 uint32_t VNUser2InUse::s_userCntGbl = 0;  // Hot cache line, leave adjacent
 uint32_t VNUser3InUse::s_userCntGbl = 0;  // Hot cache line, leave adjacent
 uint32_t VNUser4InUse::s_userCntGbl = 0;  // Hot cache line, leave adjacent
-uint32_t VNUser5InUse::s_userCntGbl = 0;  // Hot cache line, leave adjacent
 
 bool VNUser1InUse::s_userBusy = false;
 bool VNUser2InUse::s_userBusy = false;
 bool VNUser3InUse::s_userBusy = false;
 bool VNUser4InUse::s_userBusy = false;
-bool VNUser5InUse::s_userBusy = false;
 
 int AstNodeDType::s_uniqueNum = 0;
 
@@ -1235,7 +1233,6 @@ void AstNode::dumpPtrs(std::ostream& os) const {
     if (user2p()) os << " user2p=" << cvtToHex(user2p());
     if (user3p()) os << " user3p=" << cvtToHex(user3p());
     if (user4p()) os << " user4p=" << cvtToHex(user4p());
-    if (user5p()) os << " user5p=" << cvtToHex(user5p());
     if (m_iterpp) {
         os << " iterpp=" << cvtToHex(m_iterpp);
         // This may cause address sanitizer failures as iterpp can be stale
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 3adf9580b..d2bb7068f 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1611,17 +1611,6 @@ public:
     static void clear() { clearcnt(4, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
     static void check() { checkcnt(4, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
 };
-class VNUser5InUse final : VNUserInUseBase {
-protected:
-    friend class AstNode;
-    static uint32_t s_userCntGbl;  // Count of which usage of userp() this is
-    static bool s_userBusy;  // Count is in use
-public:
-    VNUser5InUse()      { allocate(5, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
-    ~VNUser5InUse()     { free    (5, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
-    static void clear() { clearcnt(5, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
-    static void check() { checkcnt(5, s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
-};
 // clang-format on
 
 //######################################################################
@@ -1825,8 +1814,6 @@ class AstNode VL_NOT_FINAL {
     uint32_t m_user3Cnt = 0;  // Mark of when userp was set
     uint32_t m_user4Cnt = 0;  // Mark of when userp was set
     VNUser m_user4u{0};  // Contains any information the user iteration routine wants
-    VNUser m_user5u{0};  // Contains any information the user iteration routine wants
-    uint32_t m_user5Cnt = 0;  // Mark of when userp was set
 
     // METHODS
     void op1p(AstNode* nodep) {
@@ -2074,20 +2061,6 @@ public:
     int user4Inc(int val = 1) { int v = user4(); user4(v + val); return v; }
     int user4SetOnce() { int v = user4(); if (!v) user4(1); return v; }  // Better for cache than user4Inc()
     static void user4ClearTree() { VNUser4InUse::clear(); }  // Clear userp()'s across the entire tree
-
-    VNUser user5u() const VL_MT_STABLE {
-        // Slows things down measurably, so disabled by default
-        //UASSERT_STATIC(VNUser5InUse::s_userBusy, "user5p used without AstUserInUse");
-        return ((m_user5Cnt == VNUser5InUse::s_userCntGbl) ? m_user5u : VNUser{0});
-    }
-    AstNode* user5p() const VL_MT_STABLE { return user5u().toNodep(); }
-    void user5u(const VNUser& user) { m_user5u = user; m_user5Cnt = VNUser5InUse::s_userCntGbl; }
-    void user5p(void* userp) { user5u(VNUser{userp}); }
-    void user5(int val) { user5u(VNUser{val}); }
-    int user5() const { return user5u().toInt(); }
-    int user5Inc(int val = 1) { int v = user5(); user5(v + val); return v; }
-    int user5SetOnce() { int v = user5(); if (!v) user5(1); return v; }  // Better for cache than user5Inc()
-    static void user5ClearTree() { VNUser5InUse::clear(); }  // Clear userp()'s across the entire tree
     // clang-format on
 
 #ifdef VL_DEBUG
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 37b16324e..d9cef86c2 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1379,7 +1379,6 @@ void AstNode::dump(std::ostream& str) const {
     if (user2p()) str << " u2=" << nodeAddr(user2p());
     if (user3p()) str << " u3=" << nodeAddr(user3p());
     if (user4p()) str << " u4=" << nodeAddr(user4p());
-    if (user5p()) str << " u5=" << nodeAddr(user5p());
     if (hasDType()) {
         // Final @ so less likely to by accident read it as a nodep
         if (dtypep() == this) {
diff --git a/src/V3AstUserAllocator.h b/src/V3AstUserAllocator.h
index 521b0b1f6..a30917a71 100644
--- a/src/V3AstUserAllocator.h
+++ b/src/V3AstUserAllocator.h
@@ -29,7 +29,7 @@
 
 template <class T_Node, class T_Data, int T_UserN>
 class AstUserAllocatorBase VL_NOT_FINAL {
-    static_assert(1 <= T_UserN && T_UserN <= 5, "Wrong user pointer number");
+    static_assert(1 <= T_UserN && T_UserN <= 4, "Wrong user pointer number");
     static_assert(std::is_base_of<AstNode, T_Node>::value, "T_Node must be an AstNode type");
 
 private:
@@ -45,11 +45,8 @@ private:
         } else if VL_CONSTEXPR_CXX17 (T_UserN == 3) {
             const VNUser user = nodep->user3u();
             return user.to<T_Data*>();
-        } else if VL_CONSTEXPR_CXX17 (T_UserN == 4) {
-            const VNUser user = nodep->user4u();
-            return user.to<T_Data*>();
         } else {
-            const VNUser user = nodep->user5u();
+            const VNUser user = nodep->user4u();
             return user.to<T_Data*>();
         }
     }
@@ -61,10 +58,8 @@ private:
             nodep->user2u(VNUser{userp});
         } else if VL_CONSTEXPR_CXX17 (T_UserN == 3) {
             nodep->user3u(VNUser{userp});
-        } else if VL_CONSTEXPR_CXX17 (T_UserN == 4) {
-            nodep->user4u(VNUser{userp});
         } else {
-            nodep->user5u(VNUser{userp});
+            nodep->user4u(VNUser{userp});
         }
     }
 
@@ -76,10 +71,8 @@ protected:
             VNUser2InUse::check();
         } else if VL_CONSTEXPR_CXX17 (T_UserN == 3) {
             VNUser3InUse::check();
-        } else if VL_CONSTEXPR_CXX17 (T_UserN == 4) {
-            VNUser4InUse::check();
         } else {
-            VNUser5InUse::check();
+            VNUser4InUse::check();
         }
     }
 
@@ -107,6 +100,8 @@ public:
 
     // Get a pointer to the user data if exists, otherwise nullptr
     T_Data* tryGet(const T_Node* nodep) { return getUserp(nodep); }
+
+    void clear() { m_allocated.clear(); }
 };
 
 // User pointer allocator classes. T_Node is the type of node the allocator should be applied to
@@ -120,7 +115,5 @@ template <class T_Node, class T_Data>
 class AstUser3Allocator final : public AstUserAllocatorBase<T_Node, T_Data, 3> {};
 template <class T_Node, class T_Data>
 class AstUser4Allocator final : public AstUserAllocatorBase<T_Node, T_Data, 4> {};
-template <class T_Node, class T_Data>
-class AstUser5Allocator final : public AstUserAllocatorBase<T_Node, T_Data, 5> {};
 
 #endif  // Guard
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 0b4450376..da769536e 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -52,6 +52,7 @@
 
 #include "V3Delayed.h"
 
+#include "V3AstUserAllocator.h"
 #include "V3Stats.h"
 
 #include <deque>
@@ -65,27 +66,33 @@ class DelayedVisitor final : public VNVisitor {
 private:
     // NODE STATE
     // Cleared each module:
-    //  AstVarScope::user1p()   -> AstVarScope*.  Points to temp var created.
-    //  AstVarScope::user2p()   -> AstActive*.  Points to activity block of signal
-    //                                       (valid when AstVarScope::user1p is valid)
-    //  AstVarScope::user3p()   -> AstAlwaysPost*.  Post block for this variable used for
-    //                                              AssignDlys in suspendable processes
-    //  AstVarScope::user4p()   -> AstAlwaysPost*.  Post block for this variable
-    //  AstVarScope::user5p()   -> AstVarRef*. Last blocking or non-blocking reference
+    //  AstVarScope::user1p()   -> aux
     //  AstVar::user2()         -> bool.  Set true if already made warning
+    //  AstVarRef::user1()      -> bool.  Set true if was blocking reference
     //  AstVarRef::user2()      -> bool.  Set true if already processed
-    //  AstVarRef::user5()      -> bool.  Set true if was blocking reference
+    //  AstAlwaysPost::user1()  -> AstIf*.  Last IF (__Vdlyvset__) created under this AlwaysPost
     //  AstAlwaysPost::user2()  -> ActActive*.  Points to activity block of signal
     //                                      (valid when AstAlwaysPost::user4p is valid)
-    //  AstAlwaysPost::user4()  -> AstIf*.  Last IF (__Vdlyvset__) created under this AlwaysPost
     // Cleared each scope/active:
     //  AstAssignDly::user3()   -> AstVarScope*.  __Vdlyvset__ created for this assign
     //  AstAlwaysPost::user3()  -> AstVarScope*.  __Vdlyvset__ last referenced in IF
     const VNUser1InUse m_inuser1;
     const VNUser2InUse m_inuser2;
     const VNUser3InUse m_inuser3;
-    const VNUser4InUse m_inuser4;
-    const VNUser5InUse m_inuser5;
+
+    struct AuxAstVarScope final {
+        // Points to temp (shadow) variable created.
+        AstVarScope* delayVscp = nullptr;
+        // Points to activity block of signal (valid when AstVarScope::user1p is valid)
+        AstActive* activep = nullptr;
+        // Post block for this variable used for AssignDlys in suspendable processes
+        AstAlwaysPost* suspFinalp = nullptr;
+        // Post block for this variable
+        AstAlwaysPost* finalp = nullptr;
+        // Last blocking or non-blocking reference
+        AstNodeVarRef* lastRefp = nullptr;
+    };
+    AstUser1Allocator<AstVarScope, AuxAstVarScope> m_vscpAux;
 
     // STATE - across all visitors
     std::unordered_map<const AstVarScope*, int> m_scopeVecMap;  // Next var number for each scope
@@ -116,14 +123,14 @@ private:
         // Ignore if warning is disabled on this reference (used by V3Force).
         if (nodep->fileline()->warnIsOff(V3ErrorCode::BLKANDNBLK)) return;
         if (m_ignoreBlkAndNBlk) return;
-        if (blocking) nodep->user5(true);
+        if (blocking) nodep->user1(true);
         AstVarScope* const vscp = nodep->varScopep();
         // UINFO(4, " MVU " << blocking << " " << nodep << endl);
-        const AstNode* const lastrefp = vscp->user5p();
+        const AstNode* const lastrefp = m_vscpAux(vscp).lastRefp;
         if (!lastrefp) {
-            vscp->user5p(nodep);
+            m_vscpAux(vscp).lastRefp = nodep;
         } else {
-            const bool last_was_blocking = lastrefp->user5();
+            const bool last_was_blocking = lastrefp->user1();
             if (last_was_blocking != blocking) {
                 const AstNode* nonblockingp = blocking ? nodep : lastrefp;
                 if (const AstNode* np = containingAssignment(nonblockingp)) nonblockingp = np;
@@ -351,7 +358,7 @@ private:
         UINFO(9, "     & " << varrefp << endl);
         AstAlwaysPost* finalp = nullptr;
         if (m_inSuspendableOrFork) {
-            finalp = VN_AS(varrefp->varScopep()->user3p(), AlwaysPost);
+            finalp = m_vscpAux(varrefp->varScopep()).suspFinalp;
             if (!finalp) {
                 FileLine* const flp = nodep->fileline();
                 finalp = new AstAlwaysPost{flp, nullptr, nullptr};
@@ -359,13 +366,13 @@ private:
                 if (!m_procp->user3p()) {
                     AstActive* const newactp = createActive(varrefp);
                     m_procp->user3p(newactp);
-                    varrefp->varScopep()->user3p(finalp);
+                    m_vscpAux(varrefp->varScopep()).suspFinalp = finalp;
                 }
                 AstActive* const actp = VN_AS(m_procp->user3p(), Active);
                 actp->addStmtsp(finalp);
             }
         } else {
-            finalp = VN_AS(varrefp->varScopep()->user4p(), AlwaysPost);
+            finalp = m_vscpAux(varrefp->varScopep()).finalp;
             if (finalp) {
                 AstActive* const oldactivep = VN_AS(finalp->user2p(), Active);
                 checkActivePost(varrefp, oldactivep);
@@ -375,7 +382,7 @@ private:
                 UINFO(9, "     Created " << finalp << endl);
                 AstActive* const newactp = createActive(varrefp);
                 newactp->addStmtsp(finalp);
-                varrefp->varScopep()->user4p(finalp);
+                m_vscpAux(varrefp->varScopep()).finalp = finalp;
                 finalp->user2p(newactp);
                 if (setinitp) newactp->addStmtsp(setinitp);
             }
@@ -384,7 +391,7 @@ private:
         if (finalp->user3p() == setvscp) {
             // Optimize as above; if sharing Vdlyvset *ON SAME VARIABLE*,
             // we can share the IF statement too
-            postLogicp = VN_AS(finalp->user4p(), If);
+            postLogicp = VN_AS(finalp->user1p(), If);
             UASSERT_OBJ(postLogicp, nodep,
                         "Delayed assignment misoptimized; prev var found w/o associated IF");
         } else {
@@ -393,7 +400,7 @@ private:
             UINFO(9, "     Created " << postLogicp << endl);
             finalp->addStmtsp(postLogicp);
             finalp->user3p(setvscp);  // Remember IF's vset variable
-            finalp->user4p(postLogicp);  // and the associated IF, as we may be able to reuse it
+            finalp->user1p(postLogicp);  // and the associated IF, as we may be able to reuse it
         }
         postLogicp->addThensp(new AstAssign{nodep->fileline(), selectsp, valreadp});
         if (m_inSuspendableOrFork) {
@@ -565,12 +572,11 @@ private:
                 }
                 AstVarScope* const oldvscp = nodep->varScopep();
                 UASSERT_OBJ(oldvscp, nodep, "Var didn't get varscoped in V3Scope.cpp");
-                AstVarScope* dlyvscp = VN_AS(oldvscp->user1p(), VarScope);
+                AstVarScope* dlyvscp = m_vscpAux(oldvscp).delayVscp;
                 if (dlyvscp) {  // Multiple use of delayed variable
-                    AstActive* const oldactivep = VN_AS(dlyvscp->user2p(), Active);
+                    AstActive* const oldactivep = m_vscpAux(dlyvscp).activep;
                     checkActivePost(nodep, oldactivep);
-                }
-                if (!dlyvscp) {  // First use of this delayed variable
+                } else {  // First use of this delayed variable
                     const string newvarname = string{"__Vdly__"} + nodep->varp()->shortName();
                     dlyvscp = createVarSc(oldvscp, newvarname, 0, nullptr);
                     AstNodeAssign* const prep = new AstAssignPre{
@@ -582,10 +588,10 @@ private:
                         new AstVarRef{nodep->fileline(), oldvscp, VAccess::WRITE},
                         new AstVarRef{nodep->fileline(), dlyvscp, VAccess::READ}};
                     postp->lhsp()->user2(true);  // Don't detect this assignment
-                    oldvscp->user1p(dlyvscp);  // So we can find it later
+                    m_vscpAux(oldvscp).delayVscp = dlyvscp;  // So we can find it later
                     // Make new ACTIVE with identical sensitivity tree
                     AstActive* const newactp = createActive(nodep);
-                    dlyvscp->user2p(newactp);
+                    m_vscpAux(dlyvscp).activep = newactp;
                     newactp->addStmtsp(prep);  // Add to FRONT of statements
                     newactp->addStmtsp(postp);
                 }
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index a641b1e9f..df38ef6df 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -766,15 +766,22 @@ class GateDedupeHash final : public V3DupFinderUserSame {
 private:
     // NODE STATE
     // Ast*::user2p     -> parent AstNodeAssign* for this rhsp
-    // Ast*::user3p     -> AstActive* of assign, for isSame() in test for duplicate
-    //                     Set to nullptr if this assign's tree was later replaced
-    // Ast*::user5p     -> AstNode* of assign if condition, for isSame() in test for duplicate
-    //                     Set to nullptr if this assign's tree was later replaced
+    // AstNodeExpr::user3p -> see AuxAstNodeExpr via m_aux
     // VNUser1InUse    m_inuser1;      (Allocated for use in GateVisitor)
     // VNUser2InUse    m_inuser2;      (Allocated for use in GateVisitor)
     const VNUser3InUse m_inuser3;
     // VNUser4InUse    m_inuser4;      (Allocated for use in V3Hasher via V3DupFinder)
-    const VNUser5InUse m_inuser5;
+
+    struct AuxAstNodeExpr final {
+        // AstActive* of assign, for isSame() in test for duplicate. Set to nullptr if this
+        // assign's tree was later replaced
+        AstActive* activep = nullptr;
+        // AstNodeExpr* of assign if condition, for isSame() in test for duplicate. Set to nullptr
+        // if this assign's tree was later replaced
+        AstNodeExpr* condp = nullptr;
+    };
+
+    AstUser3Allocator<AstNodeExpr, AuxAstNodeExpr> m_auxNodeExpr;
 
     V3DupFinder m_dupFinder;  // Duplicate finder for rhs of assigns
     std::unordered_set<AstNode*> m_nodeDeleteds;  // Any node in this hash was deleted
@@ -814,41 +821,49 @@ public:
     // or could be a rhs variable in a tree we're not replacing (or not yet anyways)
     void hashReplace(AstNode* oldp, AstNode* newp) {
         UINFO(9, "replacing " << (void*)oldp << " with " << (void*)newp << endl);
-        // We could update the user3p and user5p but the resulting node
+        // We could update the activep and condp but the resulting node
         // still has incorrect hash.  We really need to remove all hash on
         // the whole hash entry tree involving the replaced node and
         // rehash.  That's complicated and this is rare, so just remove it
         // from consideration.
         m_nodeDeleteds.insert(oldp);
     }
-    bool isReplaced(AstNode* nodep) {
+    bool isReplaced(AstNodeExpr* nodep) {
         // Assignment may have been hashReplaced, if so consider non-match (effectively removed)
-        UASSERT_OBJ(!VN_IS(nodep, NodeAssign), nodep, "Dedup attempt on non-assign");
-        AstNode* const extra1p = nodep->user3p();
-        AstNode* const extra2p = nodep->user5p();
-        return ((extra1p && m_nodeDeleteds.find(extra1p) != m_nodeDeleteds.end())
-                || (extra2p && m_nodeDeleteds.find(extra2p) != m_nodeDeleteds.end()));
+        const auto& aux = m_auxNodeExpr(nodep);
+        AstActive* const activep = aux.activep;
+        AstNodeExpr* const condp = aux.condp;
+        return (activep && m_nodeDeleteds.count(activep))
+               || (condp && m_nodeDeleteds.count(condp));
     }
 
     // Callback from V3DupFinder::findDuplicate
     bool isSame(AstNode* node1p, AstNode* node2p) override {
+        AstNodeExpr* const expr1p = VN_AS(node1p, NodeExpr);
+        AstNodeExpr* const expr2p = VN_AS(node2p, NodeExpr);
+
         // Assignment may have been hashReplaced, if so consider non-match (effectively removed)
-        if (isReplaced(node1p) || isReplaced(node2p)) {
+        if (isReplaced(expr1p) || isReplaced(expr2p)) {
             // UINFO(9, "isSame hit on replaced "<<(void*)node1p<<" "<<(void*)node2p<<endl);
             return false;
         }
-        return same(node1p->user3p(), node2p->user3p()) && same(node1p->user5p(), node2p->user5p())
+
+        const auto& aux1 = m_auxNodeExpr(expr1p);
+        const auto& aux2 = m_auxNodeExpr(expr2p);
+
+        return same(aux1.activep, aux2.activep) && same(aux1.condp, aux2.condp)
                && node1p->user2p()->type() == node2p->user2p()->type();
     }
 
-    const AstNodeAssign* hashAndFindDupe(AstNodeAssign* assignp, AstNode* extra1p,
-                                         AstNode* extra2p) {
+    const AstNodeAssign* hashAndFindDupe(AstNodeAssign* assignp, AstActive* extra1p,
+                                         AstNodeExpr* extra2p) {
         // Legal for extra1p/2p to be nullptr, we'll compare with other assigns with extras also
         // nullptr
-        AstNode* const rhsp = assignp->rhsp();
+        AstNodeExpr* const rhsp = assignp->rhsp();
         rhsp->user2p(assignp);
-        rhsp->user3p(extra1p);
-        rhsp->user5p(extra2p);
+        auto& aux = m_auxNodeExpr(rhsp);
+        aux.activep = extra1p;
+        aux.condp = extra2p;
 
         const auto inserted = m_dupFinder.insert(rhsp);
         const auto dupit = m_dupFinder.findDuplicate(rhsp, this);
@@ -865,13 +880,14 @@ public:
 
     void check() {
         for (const auto& itr : m_dupFinder) {
-            AstNode* const nodep = itr.second;
-            const AstNode* const activep = nodep->user3p();
-            const AstNode* const condVarp = nodep->user5p();
+            AstNodeExpr* const nodep = VN_AS(itr.second, NodeExpr);
+            const auto& aux = m_auxNodeExpr(nodep);
+            const AstActive* const activep = aux.activep;
+            const AstNodeExpr* const condVarp = aux.condp;
             if (!isReplaced(nodep)) {
                 // This class won't break if activep isn't an active, or
                 // ifVar isn't a var, but this is checking the caller's construction.
-                UASSERT_OBJ(!activep || (!VN_DELETED(activep) && VN_IS(activep, Active)), nodep,
+                UASSERT_OBJ(!activep || (!VN_DELETED(activep)), nodep,
                             "V3DupFinder check failed, lost active pointer");
                 UASSERT_OBJ(!condVarp || !VN_DELETED(condVarp), nodep,
                             "V3DupFinder check failed, lost if pointer");
@@ -899,7 +915,7 @@ private:
     // STATE
     GateDedupeHash m_ghash;  // Hash used to find dupes of rhs of assign
     AstNodeAssign* m_assignp = nullptr;  // Assign found for dedupe
-    AstNode* m_ifCondp = nullptr;  // IF condition that assign is under
+    AstNodeExpr* m_ifCondp = nullptr;  // IF condition that assign is under
     bool m_always = false;  // Assign is under an always
     bool m_dedupable = true;  // Determined the assign to be dedupable
 
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index dbc3e7bb9..ec3b52149 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -343,8 +343,8 @@ private:
                     newdp->cellName(newcellp->name());
                     // Tag the old ifacerefp to ensure it leaves no stale
                     // reference to the inlined cell.
-                    newdp->user5(false);
-                    ifacerefp->user5(true);
+                    newdp->user1(false);
+                    ifacerefp->user1(true);
                 }
             }
         }
@@ -454,8 +454,8 @@ class InlineVisitor final : public VNVisitor {
 private:
     // NODE STATE
     // Cleared entire netlist
-    //  AstIfaceRefDType::user5p()  // Whether the cell pointed to by this
-    //                              // AstIfaceRefDType has been inlined
+    //  AstIfaceRefDType::user1()  // Whether the cell pointed to by this
+    //                             // AstIfaceRefDType has been inlined
     //  Input:
     //   AstNodeModule::user1p()    // ModuleState instance (via m_moduleState)
     // Cleared each cell
@@ -464,7 +464,6 @@ private:
     //   AstVar::user3()        // bool    Don't alias the user2, keep it as signal
     //   AstCell::user4         // AstCell* of the created clone
     const VNUser4InUse m_inuser4;
-    const VNUser5InUse m_inuser5;
 
     ModuleStateUser1Allocator& m_moduleState;
 
@@ -586,7 +585,7 @@ private:
         m_modp = nullptr;
     }
     void visit(AstIfaceRefDType* nodep) override {
-        if (nodep->user5()) {
+        if (nodep->user1()) {
             // The cell has been removed so let's make sure we don't leave a reference to it
             // This dtype may still be in use by the AstAssignVarScope created earlier
             // but that'll get cleared up later
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index b7dfff1e1..1881d2fff 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -32,9 +32,9 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 class InstrCountVisitor final : public VNVisitorConst {
 private:
     // NODE STATE
-    //  AstNode::user4()        -> int.  Path cost + 1, 0 means don't dump
-    //  AstNode::user5()        -> bool. Processed if assertNoDups
-    const VNUser4InUse m_inuser4;
+    //  AstNode::user1()        -> bool. Processed if assertNoDups
+    //  AstNode::user2()        -> int.  Path cost + 1, 0 means don't dump
+    const VNUser2InUse m_inuser2;
 
     // MEMBERS
     uint32_t m_instrCount = 0;  // Running count of instructions
@@ -99,10 +99,10 @@ private:
             // (which at the V3Order stage represent verilog tasks, not to
             // the CFuncs that V3Order will generate.) So don't check for
             // collisions in CFuncs.
-            UASSERT_OBJ(!nodep->user5p(), nodep,
+            UASSERT_OBJ(!nodep->user1p(), nodep,
                         "Node originally inserted below logic vertex "
-                            << static_cast<AstNode*>(nodep->user5p()));
-            nodep->user5p(const_cast<void*>(reinterpret_cast<const void*>(m_startNodep)));
+                            << static_cast<AstNode*>(nodep->user1p()));
+            nodep->user1p(const_cast<void*>(reinterpret_cast<const void*>(m_startNodep)));
         }
 
         // Save the count, and add it back in during ~VisitBase This allows
@@ -118,7 +118,7 @@ private:
         if (!m_ignoreRemaining) m_instrCount += savedCount;
     }
     void markCost(AstNode* nodep) {
-        if (m_osp) nodep->user4(m_instrCount + 1);  // Else don't mark to avoid writeback
+        if (m_osp) nodep->user2(m_instrCount + 1);  // Else don't mark to avoid writeback
     }
 
     // VISITORS
@@ -185,10 +185,10 @@ private:
         reset();
         if (ifCount >= elseCount) {
             m_instrCount = savedCount + ifCount;
-            if (nodep->elsesp()) nodep->elsesp()->user4(0);  // Don't dump it
+            if (nodep->elsesp()) nodep->elsesp()->user2(0);  // Don't dump it
         } else {
             m_instrCount = savedCount + elseCount;
-            if (nodep->thensp()) nodep->thensp()->user4(0);  // Don't dump it
+            if (nodep->thensp()) nodep->thensp()->user2(0);  // Don't dump it
         }
     }
     void visit(AstNodeCond* nodep) override {
@@ -212,10 +212,10 @@ private:
         reset();
         if (ifCount < elseCount) {
             m_instrCount = savedCount + elseCount;
-            if (nodep->thenp()) nodep->thenp()->user4(0);  // Don't dump it
+            if (nodep->thenp()) nodep->thenp()->user2(0);  // Don't dump it
         } else {
             m_instrCount = savedCount + ifCount;
-            if (nodep->elsep()) nodep->elsep()->user4(0);  // Don't dump it
+            if (nodep->elsep()) nodep->elsep()->user2(0);  // Don't dump it
         }
     }
     void visit(AstCAwait* nodep) override {
@@ -289,7 +289,7 @@ private:
 class InstrCountDumpVisitor final : public VNVisitorConst {
 private:
     // NODE STATE
-    //  AstNode::user4()        -> int.  Path cost, 0 means don't dump
+    //  AstNode::user2()        -> int.  Path cost, 0 means don't dump
 
     // MEMBERS
     std::ostream* const m_osp;  // Dump file
@@ -310,7 +310,7 @@ private:
     string indent() const { return string(m_depth, ':') + " "; }
     void visit(AstNode* nodep) override {
         ++m_depth;
-        if (unsigned costPlus1 = nodep->user4()) {
+        if (unsigned costPlus1 = nodep->user2()) {
             *m_osp << "  " << indent() << "cost " << std::setw(6) << std::left << (costPlus1 - 1)
                    << "  " << nodep << '\n';
             iterateChildrenConst(nodep);
diff --git a/src/V3InstrCount.h b/src/V3InstrCount.h
index fc4978439..d50da1708 100644
--- a/src/V3InstrCount.h
+++ b/src/V3InstrCount.h
@@ -36,7 +36,7 @@ public:
     // If nodep is an AstActive, returns 0.
     // If nodep contains nested AstActives, raises an error.
     //
-    // If assertNoDups is true, marks user5 on each AstNode scanned.  Then
+    // If assertNoDups is true, marks user1 on each AstNode scanned.  Then
     // if we see the same node twice (across more than one call to count,
     // potentially) raises an error.
     // Optional osp is stream to dump critical path to.
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 3e53ce387..0652060fd 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2004,10 +2004,7 @@ private:
     //  *::user2p()             -> See LinkDotState
     //  *::user3()              // bool. Processed
     //  *::user4()              -> See LinkDotState
-    // Cleared on Cell
-    //  AstVar::user5()         // bool. True if pin used in this cell
     const VNUser3InUse m_inuser3;
-    const VNUser5InUse m_inuser5;
 
     // TYPES
     enum DotPosition : uint8_t {
@@ -2034,6 +2031,7 @@ private:
                                          // They are added to the set only in linkDotPrimary.
     bool m_insideClassExtParam = false;  // Inside a class from m_extendsParam
     bool m_explicitSuperNew = false;  // Hit a "super.new" call inside a "new" function
+    std::map<AstNode*, AstPin*> m_usedPins;  // Pin used in this cell, map to duplicate
 
     struct DotStates {
         DotPosition m_dotPos;  // Scope part of dotted resolution
@@ -2162,15 +2160,15 @@ private:
         UASSERT_OBJ(ifaceTopVarp, nodep, "Can't find interface var ref: " << findName);
         return ifaceTopVarp;
     }
-    void markAndCheckPinDup(AstNode* nodep, AstNode* refp, const char* whatp) {
-        if (refp->user5p() && refp->user5p() != nodep) {
+    void markAndCheckPinDup(AstPin* nodep, AstNode* refp, const char* whatp) {
+        const auto pair = m_usedPins.emplace(refp, nodep);
+        if (!pair.second) {
+            AstNode* const origp = pair.first->second;
             nodep->v3error("Duplicate " << whatp << " connection: " << nodep->prettyNameQ() << '\n'
                                         << nodep->warnContextPrimary() << '\n'
-                                        << refp->user5p()->warnOther()
-                                        << "... Location of original " << whatp << " connection\n"
-                                        << refp->user5p()->warnContextSecondary());
-        } else {
-            refp->user5p(nodep);
+                                        << origp->warnOther() << "... Location of original "
+                                        << whatp << " connection\n"
+                                        << origp->warnContextSecondary());
         }
     }
     VSymEnt* getCreateClockingEventSymEnt(AstClocking* clockingp) {
@@ -2314,7 +2312,7 @@ private:
     void visit(AstCell* nodep) override {
         // Cell: Recurse inside or cleanup not founds
         checkNoDot(nodep);
-        AstNode::user5ClearTree();
+        m_usedPins.clear();
         UASSERT_OBJ(nodep->modp(), nodep,
                     "Cell has unlinked module");  // V3LinkCell should have errored out
         VL_RESTORER(m_cellp);
@@ -2343,7 +2341,7 @@ private:
     void visit(AstClassRefDType* nodep) override {
         // Cell: Recurse inside or cleanup not founds
         checkNoDot(nodep);
-        AstNode::user5ClearTree();
+        m_usedPins.clear();
         UASSERT_OBJ(nodep->classp(), nodep, "ClassRef has unlinked class");
         UASSERT_OBJ(m_statep->forPrimary() || !nodep->paramsp(), nodep,
                     "class reference parameter not removed by V3Param");
@@ -2905,7 +2903,7 @@ private:
     void visit(AstClassOrPackageRef* nodep) override {
         // Class: Recurse inside or cleanup not founds
         // checkNoDot not appropriate, can be under a dot
-        AstNode::user5ClearTree();
+        m_usedPins.clear();
         UASSERT_OBJ(m_statep->forPrimary() || VN_IS(nodep->classOrPackageNodep(), ParamTypeDType)
                         || nodep->classOrPackagep(),
                     nodep, "ClassRef has unlinked class");
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index b9e08ea22..e5b078daa 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -159,11 +159,10 @@ class CodeMotionAnalysisVisitor final : public VNVisitorConst {
     // NODE STATE
     // AstNodeStmt::user3   -> StmtProperties (accessed via m_stmtProperties, managed externally,
     //                         see MergeCondVisitor::process)
+    // AstNodeExpr::user3   -> AstNodeStmt*: Set on a condition node, points to the last
+    //                         conditional with that condition so far encountered in the same
+    //                         AstNode list
     // AstNode::user4       -> Used by V3Hasher
-    // AstNode::user5       -> AstNode*: Set on a condition node, points to the last conditional
-    //                         with that condition so far encountered in the same AstNode list
-
-    VNUser5InUse m_user5InUse;
 
     StmtPropertiesAllocator& m_stmtProperties;
 
@@ -212,14 +211,14 @@ class CodeMotionAnalysisVisitor final : public VNVisitorConst {
                     // First time seeing this condition in the current list
                     dupFinder.insert(condp);
                     // Remember last statement with this condition (which is this statement)
-                    condp->user5p(nodep);
+                    condp->user3p(nodep);
                 } else {
                     // Seen a conditional with the same condition earlier in the current list
-                    AstNode* const firstp = dit->second;
+                    AstNodeExpr* const firstp = VN_AS(dit->second, NodeExpr);
                     // Add to properties for easy retrieval during optimization
-                    m_propsp->m_prevWithSameCondp = static_cast<AstNodeStmt*>(firstp->user5p());
+                    m_propsp->m_prevWithSameCondp = static_cast<AstNodeStmt*>(firstp->user3p());
                     // Remember last statement with this condition (which is this statement)
-                    firstp->user5p(nodep);
+                    firstp->user3p(nodep);
                 }
             }
         }
@@ -430,13 +429,13 @@ private:
     // NODE STATE
     // AstVar::user1        -> bool: Set for variables referenced by m_mgCondp
     //                         (Only below MergeCondVisitor::process).
-    // AstNode::user2       -> bool: Marking node as included in merge because cheap to
-    //                         duplicate
+    // AstNode::user2       -> bool: Marking node as included in merge because cheap to duplicate
     //                         (Only below MergeCondVisitor::process).
     // AstNodeStmt::user3   -> StmtProperties
     //                         (Only below MergeCondVisitor::process).
+    // AstNodeExpr::user3   -> See CodeMotionAnalysisVisitor
+    //                         (Only below MergeCondVisitor::process).
     // AstNode::user4       -> See CodeMotionAnalysisVisitor/CodeMotionOptimizeVisitor
-    // AstNode::user5       -> See CodeMotionAnalysisVisitor
 
     // STATE
     VDouble0 m_statMerges;  // Statistic tracking
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 53c01c77c..ffe79fa1f 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -218,21 +218,21 @@ public:
 
 class ParamProcessor final {
     // NODE STATE - Local
-    //   AstVar::user4()        // int    Global parameter number (for naming new module)
+    //   AstVar::user3()        // int    Global parameter number (for naming new module)
     //                          //        (0=not processed, 1=iterated, but no number,
     //                          //         65+ parameter numbered)
     // NODE STATE - Shared with ParamVisitor
-    //   AstClass::user4p()     // AstClass* Unchanged copy of the parameterized class node.
+    //   AstClass::user3p()     // AstClass* Unchanged copy of the parameterized class node.
     //                                    The class node may be modified according to parameter
     //                                    values and an unchanged copy is needed to instantiate
     //                                    classes with different parameters.
-    //   AstNodeModule::user5() // bool   True if processed
-    //   AstGenFor::user5()     // bool   True if processed
-    //   AstVar::user5()        // bool   True if constant propagated
-    //   AstCell::user5p()      // string* Generate portion of hierarchical name
-    const VNUser4InUse m_inuser4;
-    const VNUser5InUse m_inuser5;
-    // User1/2/3 used by constant function simulations
+    //   AstNodeModule::user2() // bool   True if processed
+    //   AstGenFor::user2()     // bool   True if processed
+    //   AstVar::user2()        // bool   True if constant propagated
+    //   AstCell::user2p()      // string* Generate portion of hierarchical name
+    const VNUser2InUse m_inuser2;
+    const VNUser3InUse m_inuser3;
+    // User1 used by constant function simulations
 
     // TYPES
     // Note may have duplicate entries
@@ -284,20 +284,20 @@ class ParamProcessor final {
                     char ch = varp->name()[0];
                     ch = std::toupper(ch);
                     if (ch < 'A' || ch > 'Z') ch = 'Z';
-                    varp->user4(usedLetter[static_cast<int>(ch)] * 256 + ch);
+                    varp->user3(usedLetter[static_cast<int>(ch)] * 256 + ch);
                     usedLetter[static_cast<int>(ch)]++;
                 }
             } else if (AstParamTypeDType* const typep = VN_CAST(stmtp, ParamTypeDType)) {
                 const char ch = 'T';
-                typep->user4(usedLetter[static_cast<int>(ch)] * 256 + ch);
+                typep->user3(usedLetter[static_cast<int>(ch)] * 256 + ch);
                 usedLetter[static_cast<int>(ch)]++;
             }
         }
     }
     static string paramSmallName(AstNodeModule* modp, AstNode* varp) {
-        if (varp->user4() <= 1) makeSmallNames(modp);
-        int index = varp->user4() / 256;
-        const char ch = varp->user4() & 255;
+        if (varp->user3() <= 1) makeSmallNames(modp);
+        int index = varp->user3() / 256;
+        const char ch = varp->user3() & 255;
         string st = cvtToStr(ch);
         while (index) {
             st += cvtToStr(char((index % 25) + 'A'));
@@ -571,8 +571,8 @@ class ParamProcessor final {
         // Note all module internal variables will be re-linked to the new modules by clone
         // However links outside the module (like on the upper cells) will not.
         AstNodeModule* newmodp;
-        if (srcModp->user4p()) {
-            newmodp = VN_CAST(srcModp->user4p()->cloneTree(false), NodeModule);
+        if (srcModp->user3p()) {
+            newmodp = VN_CAST(srcModp->user3p()->cloneTree(false), NodeModule);
         } else {
             newmodp = srcModp->cloneTree(false);
         }
@@ -583,7 +583,7 @@ class ParamProcessor final {
         }
 
         newmodp->name(newname);
-        newmodp->user5(false);  // We need to re-recurse this module once changed
+        newmodp->user2(false);  // We need to re-recurse this module once changed
         newmodp->recursive(false);
         newmodp->recursiveClone(false);
         // Only the first generation of clone holds this property
@@ -614,7 +614,7 @@ class ParamProcessor final {
         // Grab all I/O so we can remap our pins later
         // Note we allow multiple users of a parameterized model,
         // thus we need to stash this info.
-        collectPins(clonemapp, newmodp, srcModp->user4p());
+        collectPins(clonemapp, newmodp, srcModp->user3p());
         // Relink parameter vars to the new module
         relinkPins(clonemapp, paramsp);
         // Fix any interface references
@@ -853,14 +853,14 @@ class ParamProcessor final {
 
         if (!any_overrides) {
             UINFO(8, "Cell parameters all match original values, skipping expansion.\n");
-            // If it's the first use of the default instance, create a copy and store it in user4p.
-            // user4p will also be used to check if the default instance is used.
-            if (!srcModpr->user4p() && VN_IS(srcModpr, Class)) {
+            // If it's the first use of the default instance, create a copy and store it in user3p.
+            // user3p will also be used to check if the default instance is used.
+            if (!srcModpr->user3p() && VN_IS(srcModpr, Class)) {
                 AstClass* classCopyp = VN_AS(srcModpr, Class)->cloneTree(false);
                 // It is a temporary copy of the original class node, stored in order to create
                 // another instances. It is needed only during class instantiation.
                 m_deleter.pushDeletep(classCopyp);
-                srcModpr->user4p(classCopyp);
+                srcModpr->user3p(classCopyp);
                 storeOriginalParams(classCopyp);
             }
         } else if (AstNodeModule* const paramedModp
@@ -1002,9 +1002,9 @@ class ParamVisitor final : public VNVisitor {
             AstNodeModule* const modp = itm->second;
             workQueue.erase(itm);
 
-            // Process once; note user5 will be cleared on specialization, so we will do the
+            // Process once; note user2 will be cleared on specialization, so we will do the
             // specialized module if needed
-            if (!modp->user5SetOnce()) {
+            if (!modp->user2SetOnce()) {
 
                 // TODO: this really should be an assert, but classes and hier_blocks are
                 // special...
@@ -1040,9 +1040,9 @@ class ParamVisitor final : public VNVisitor {
 
                 // Update path
                 string someInstanceName(modp->someInstanceName());
-                if (const string* const genHierNamep = cellp->user5u().to<string*>()) {
+                if (const string* const genHierNamep = cellp->user2u().to<string*>()) {
                     someInstanceName += *genHierNamep;
-                    cellp->user5p(nullptr);
+                    cellp->user2p(nullptr);
                     VL_DO_DANGLING(delete genHierNamep, genHierNamep);
                 }
 
@@ -1077,7 +1077,7 @@ class ParamVisitor final : public VNVisitor {
     void visitCellOrClassRef(AstNode* nodep, bool isIface) {
         // Must do ifaces first, so push to list and do in proper order
         string* const genHierNamep = new std::string{m_generateHierName};
-        nodep->user5p(genHierNamep);
+        nodep->user2p(genHierNamep);
         // Visit parameters in the instantiation.
         iterateChildren(nodep);
         m_cellps.emplace(!isIface, nodep);
@@ -1133,7 +1133,7 @@ class ParamVisitor final : public VNVisitor {
 
     // Make sure all parameters are constantified
     void visit(AstVar* nodep) override {
-        if (nodep->user5SetOnce()) return;  // Process once
+        if (nodep->user2SetOnce()) return;  // Process once
         iterateChildren(nodep);
         if (nodep->isParam()) {
             if (!nodep->valuep() && !VN_IS(m_modp, Class)) {
@@ -1428,7 +1428,7 @@ public:
             for (AstNodeModule* const modp : modps) netlistp->addModulesp(modp);
 
             for (AstClass* const classp : m_paramClasses) {
-                if (!classp->user4p()) {
+                if (!classp->user3p()) {
                     // The default value isn't referenced, so it can be removed
                     VL_DO_DANGLING(pushDeletep(classp->unlinkFrBack()), classp);
                 } else {
diff --git a/src/V3Partition.cpp b/src/V3Partition.cpp
index 26403446d..a1a502a06 100644
--- a/src/V3Partition.cpp
+++ b/src/V3Partition.cpp
@@ -2662,9 +2662,9 @@ uint32_t V3Partition::setupMTaskDeps(V3Graph* mtasksp) {
     // coarsening algorithm assumes that the graph is connected.
     m_entryMTaskp = new LogicMTask{mtasksp, nullptr};
 
-    // The V3InstrCount within LogicMTask will set user5 on each AST
+    // The V3InstrCount within LogicMTask will set user1 on each AST
     // node, to assert that we never count any node twice.
-    const VNUser5InUse user5inUse;
+    const VNUser1InUse user1inUse;
 
     // Create the LogicMTasks for each MTaskMoveVertex
     for (V3GraphVertex *vtxp = m_fineDepsGraphp->verticesBeginp(), *nextp; vtxp; vtxp = nextp) {
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index bc36bf0d7..5343af244 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -36,6 +36,7 @@
 #include "verilatedos.h"
 
 #include "V3Ast.h"
+#include "V3AstUserAllocator.h"
 #include "V3Error.h"
 #include "V3Task.h"
 #include "V3Width.h"
@@ -76,19 +77,25 @@ private:
     // NODE STATE
     // Cleared on each always/assignw
     const VNUser1InUse m_inuser1;
-    const VNUser2InUse m_inuser2;
-    const VNUser3InUse m_inuser3;
 
-    // Checking:
-    //  AstVar(Scope)::user1()  -> VarUsage.  Set true to indicate tracking as lvalue/rvalue
-    // Simulating:
-    //  AstConst::user2()       -> bool. This AstConst (allocated by this class) is in use
-    //  AstVar(Scope)::user3()  -> AstConst*. Input value of variable or node
-    //    (and output for non-delayed assignments)
-    //  AstVar(Scope)::user2()  -> AstCont*. Output value of variable (delayed assignments)
+    // AstVar/AstVarScope::user1p()     -> See AuxAstVar via m_varAux
+    // AstConst::user1()    -> bool. This AstConst (allocated by this class) is in use
 
     enum VarUsage : uint8_t { VU_NONE = 0, VU_LV = 1, VU_RV = 2, VU_LVDLY = 4 };
 
+    struct AuxVariable final {
+        // Checking:
+        //  Set true to indicate tracking as lvalue/rvalue
+        uint8_t usage = VU_NONE;
+        // Simulating:
+        //  Output value of variable (delayed assignments)
+        AstNodeExpr* outValuep = nullptr;
+        //  Input value of variable or node (and output for non-delayed assignments)
+        AstNodeExpr* valuep = nullptr;
+    };
+
+    AstUser1Allocator<AstNode, AuxVariable> m_varAux;
+
     // STATE
     // Major mode
     bool m_checkOnly;  ///< Checking only (no simulation) mode
@@ -223,14 +230,14 @@ private:
         bool allocNewConst = true;
         if (!freeList.empty()) {
             constp = freeList.front();
-            if (!constp->user2()) {
+            if (!constp->user1()) {
                 // Front of free list is free, reuse it (otherwise allocate new node)
                 allocNewConst = false;  // No need to allocate
                 // Mark the AstConst node as used, and move it to the back of the free list. This
                 // ensures that when all AstConst instances within the list are used, then the
                 // front of the list will be marked as used, in which case the enclosing 'if' will
                 // fail and we fall back to allocation.
-                constp->user2(1);
+                constp->user1(1);
                 freeList.pop_front();
                 freeList.push_back(constp);
                 // configure const
@@ -241,7 +248,7 @@ private:
             // Need to allocate new constant
             constp = new AstConst{nodep->fileline(), AstConst::DTyped{}, nodep->dtypep()};
             // Mark as in use, add to free list for later reuse
-            constp->user2(1);
+            constp->user1(1);
             freeList.push_back(constp);
         }
         return constp;
@@ -273,7 +280,7 @@ private:
     }
     AstConst* newConst(AstNode* nodep) {
         // Set a constant value for this node
-        if (!VN_IS(nodep->user3p(), Const)) {
+        if (!VN_IS(m_varAux(nodep).valuep, Const)) {
             AstConst* const constp = allocConst(nodep);
             setValue(nodep, constp);
             return constp;
@@ -283,7 +290,7 @@ private:
     }
     AstConst* newOutConst(AstNode* nodep) {
         // Set a var-output constant value for this node
-        if (!VN_IS(nodep->user2p(), Const)) {
+        if (!VN_IS(m_varAux(nodep).outValuep, Const)) {
             AstConst* const constp = allocConst(nodep);
             setOutValue(nodep, constp);
             return constp;
@@ -293,10 +300,10 @@ private:
     }
 
 public:
-    AstNodeExpr* fetchValueNull(AstNode* nodep) { return VN_AS(nodep->user3p(), NodeExpr); }
+    AstNodeExpr* fetchValueNull(AstNode* nodep) { return m_varAux(nodep).valuep; }
 
 private:
-    AstNodeExpr* fetchOutValueNull(AstNode* nodep) { return VN_AS(nodep->user2p(), NodeExpr); }
+    AstNodeExpr* fetchOutValueNull(AstNode* nodep) { return m_varAux(nodep).outValuep; }
     AstConst* fetchConstNull(AstNode* nodep) { return VN_CAST(fetchValueNull(nodep), Const); }
     AstConst* fetchOutConstNull(AstNode* nodep) {
         return VN_CAST(fetchOutValueNull(nodep), Const);
@@ -332,15 +339,15 @@ public:
     }
 
 private:
-    void setValue(AstNode* nodep, const AstNodeExpr* valuep) {
+    void setValue(AstNode* nodep, AstNodeExpr* valuep) {
         UASSERT_OBJ(valuep, nodep, "Simulate setting null value");
         UINFO(9, "     set val " << valuep->name() << " on " << nodep << endl);
-        nodep->user3p((void*)valuep);
+        m_varAux(nodep).valuep = valuep;
     }
-    void setOutValue(AstNode* nodep, const AstNodeExpr* valuep) {
+    void setOutValue(AstNode* nodep, AstNodeExpr* valuep) {
         UASSERT_OBJ(valuep, nodep, "Simulate setting null value");
         UINFO(9, "     set oval " << valuep->name() << " on " << nodep << endl);
-        nodep->user2p((void*)valuep);
+        m_varAux(nodep).outValuep = valuep;
     }
 
     void checkNodeInfo(AstNode* nodep, bool ignorePredict = false) {
@@ -429,26 +436,26 @@ private:
             clearOptimizable(nodep, "Array references/not basic");
         if (nodep->access().isWriteOrRW()) {
             if (m_inDlyAssign) {
-                if (!(vscp->user1() & VU_LVDLY)) {
-                    vscp->user1(vscp->user1() | VU_LVDLY);
+                if (!(m_varAux(vscp).usage & VU_LVDLY)) {
+                    m_varAux(vscp).usage |= VU_LVDLY;
                     if (m_checkOnly) varRefCb(nodep);
                 }
             } else {  // nondly asn
-                if (!(vscp->user1() & VU_LV)) {
-                    if (!m_params && (vscp->user1() & VU_RV)) {
+                if (!(m_varAux(vscp).usage & VU_LV)) {
+                    if (!m_params && (m_varAux(vscp).usage & VU_RV)) {
                         clearOptimizable(nodep, "Var read & write");
                     }
-                    vscp->user1(vscp->user1() | VU_LV);
+                    m_varAux(vscp).usage |= VarUsage::VU_LV;
                     if (m_checkOnly) varRefCb(nodep);
                 }
             }
         }
         if (nodep->access().isReadOrRW()) {
-            if (!(vscp->user1() & VU_RV)) {
-                if (!m_params && (vscp->user1() & VU_LV)) {
+            if (!(m_varAux(vscp).usage & VU_RV)) {
+                if (!m_params && (m_varAux(vscp).usage & VU_LV)) {
                     clearOptimizable(nodep, "Var write & read");
                 }
-                vscp->user1(vscp->user1() | VU_RV);
+                m_varAux(vscp).usage |= VU_RV;
                 const bool isConst = (nodep->varp()->isConst() || nodep->varp()->isParam())
                                      && nodep->varp()->valuep();
                 AstNodeExpr* const valuep
@@ -717,7 +724,7 @@ private:
             AstNodeExpr* const valuep = newTrackedClone(fetchValue(nodep->rhsp()));
             UINFO(9, "     set val[" << index << "] = " << valuep << endl);
             // Values are in the "real" tree under the InitArray so can eventually extract it,
-            // Not in the usual setValue (pointed to by user2/3p)
+            // Not in the usual setValue (via m_varAux)
             initp->addIndexValuep(index, valuep);
             if (debug() >= 9) initp->dumpTree("-  array: ");
             assignOutValue(nodep, vscp, initp);
@@ -1224,8 +1231,7 @@ public:
         m_jumpp = nullptr;
 
         AstNode::user1ClearTree();
-        AstNode::user2ClearTree();  // Also marks all elements in m_constps as free
-        AstNode::user3ClearTree();
+        m_varAux.clear();
     }
     void mainTableCheck(AstNode* nodep) {
         setMode(true /*scoped*/, true /*checking*/, false /*params*/);
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 0d170c90c..6484a7247 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -183,7 +183,7 @@ private:
     const VNUser1InUse m_user1InUse;
     const VNUser2InUse m_user2InUse;
     const VNUser3InUse m_user3InUse;
-    const VNUser5InUse m_user5InUse;
+    const VNUser4InUse m_user4InUse;
 
     // STATE
     VMemberMap m_memberMap;  // Member names cached for fast lookup
@@ -214,8 +214,8 @@ private:
                 classp = VN_CAST(funcp->scopep()->modp(), Class);
             }
         }
-        if (!nodep->user5p()) nodep->user5p(new NeedsProcDepVtx{&m_procGraph, nodep, classp});
-        return nodep->user5u().to<NeedsProcDepVtx*>();
+        if (!nodep->user4p()) nodep->user4p(new NeedsProcDepVtx{&m_procGraph, nodep, classp});
+        return nodep->user4u().to<NeedsProcDepVtx*>();
     }
     // Pass timing flag between nodes
     bool passFlag(const AstNode* from, AstNode* to, NodeFlag flag) {
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index 444a49ebc..4807365af 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -119,6 +119,7 @@
 
 #include "V3Tristate.h"
 
+#include "V3AstUserAllocator.h"
 #include "V3Graph.h"
 #include "V3Inst.h"
 #include "V3Stats.h"
@@ -176,8 +177,8 @@ public:
 
 class TristateGraph final {
     // NODE STATE
-    //   AstVar::user5p         -> TristateVertex* for variable being built
-    // VNUser5InUse     m_inuser5;   // In visitor below
+    //   AstVar::user4p         -> TristateVertex* for variable being built
+    // VNUser4InUse     m_inuser4;   // In visitor below
 
     // TYPES
 public:
@@ -197,11 +198,11 @@ private:
     // METHODS
 
     TristateVertex* makeVertex(AstNode* nodep) {
-        TristateVertex* vertexp = reinterpret_cast<TristateVertex*>(nodep->user5p());
+        TristateVertex* vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
         if (!vertexp) {
             UINFO(6, "         New vertex " << nodep << endl);
             vertexp = new TristateVertex{&m_graph, nodep};
-            nodep->user5p(vertexp);
+            nodep->user4p(vertexp);
         }
         return vertexp;
     }
@@ -279,7 +280,7 @@ public:
             }
         }
         m_graph.clear();
-        AstNode::user5ClearTree();  // Wipe all node user5p's that point to vertexes
+        AstNode::user4ClearTree();  // Wipe all node user4p's that point to vertexes
     }
     void graphWalk(AstNodeModule* nodep) {
         UINFO(9, " Walking " << nodep << endl);
@@ -298,7 +299,7 @@ public:
         if (!nodep) return;
         // Skip vars, because they may be connected to more than one varref
         if (!VN_IS(nodep, Var)) {
-            TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user5p());
+            TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
             if (vertexp) vertexp->unlinkDelete(&m_graph);
         }
         deleteVerticesFromSubtreeRecurse(nodep->op1p());
@@ -308,15 +309,15 @@ public:
     }
     void setTristate(AstNode* nodep) { makeVertex(nodep)->isTristate(true); }
     bool isTristate(AstNode* nodep) {
-        const TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user5p());
+        const TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
         return vertexp && vertexp->isTristate();
     }
     bool feedsTri(AstNode* nodep) {
-        const TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user5p());
+        const TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
         return vertexp && vertexp->feedsTri();
     }
     void didProcess(AstNode* nodep) {
-        TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user5p());
+        TristateVertex* const vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
         if (!vertexp) {
             // Not v3errorSrc as no reason to stop the world
             nodep->v3error("Unsupported tristate construct (not in propagation graph): "
@@ -390,16 +391,21 @@ class TristateVisitor final : public TristateBaseVisitor {
     // NODE STATE
     //   *::user1p              -> pointer to output enable __en expressions
     //   *::user2               -> int - already visited, see U2_ enum
-    //   AstVar::user3p         -> AstPull* pullup/pulldown direction (input Var's user3p)
-    //   AstVar::user4p         -> AstVar* pointer to output __out var (input Var's user2p)
+    //   AstVar::user3p         -> See AuxAstVar via m_varAux
     // See TristateGraph:
-    //   AstVar::user5p         -> TristateVertex* for variable being built
-    //   AstStmt*::user5p       -> TristateVertex* for this statement
+    //   AstVar::user4p         -> TristateVertex* for variable being built
+    //   AstStmt::user4p        -> TristateVertex* for this statement
     const VNUser1InUse m_inuser1;
     const VNUser2InUse m_inuser2;
     const VNUser3InUse m_inuser3;
     const VNUser4InUse m_inuser4;
-    const VNUser5InUse m_inuser5;
+
+    struct AuxAstVar final {
+        AstPull* pullp = nullptr;  // pullup/pulldown direction
+        AstVar* outVarp = nullptr;  // output __out var
+    };
+
+    AstUser3Allocator<AstVar, AuxAstVar> m_varAux;
 
     // TYPES
     struct RefStrength {
@@ -531,14 +537,14 @@ class TristateVisitor final : public TristateBaseVisitor {
     }
     AstVar* getCreateOutVarp(AstVar* invarp) {
         // Return the master __out for the specified input variable
-        if (!invarp->user4p()) {
+        if (!m_varAux(invarp).outVarp) {
             AstVar* const newp = new AstVar{invarp->fileline(), VVarType::MODULETEMP,
                                             invarp->name() + "__out", invarp};
             UINFO(9, "       newout " << newp << endl);
             modAddStmtp(invarp, newp);
-            invarp->user4p(newp);  // find outvar given invarp
+            m_varAux(invarp).outVarp = newp;  // find outvar given invarp
         }
-        return VN_AS(invarp->user4p(), Var);
+        return m_varAux(invarp).outVarp;
     }
     AstVar* getCreateUnconnVarp(AstNode* fromp, AstNodeDType* dtypep) {
         AstVar* const newp = new AstVar{fromp->fileline(), VVarType::MODULETEMP,
@@ -566,9 +572,9 @@ class TristateVisitor final : public TristateBaseVisitor {
     }
 
     void setPullDirection(AstVar* varp, AstPull* pullp) {
-        const AstPull* const oldpullp = static_cast<AstPull*>(varp->user3p());
+        const AstPull* const oldpullp = m_varAux(varp).pullp;
         if (!oldpullp) {
-            varp->user3p(pullp);  // save off to indicate the pull direction
+            m_varAux(varp).pullp = pullp;  // save off to indicate the pull direction
         } else {
             if (oldpullp->direction() != pullp->direction()) {
                 pullp->v3warn(E_UNSUPPORTED, "Unsupported: Conflicting pull directions.\n"
@@ -725,8 +731,8 @@ class TristateVisitor final : public TristateBaseVisitor {
             envarp = getCreateEnVarp(invarp);  // direction will be sen in visit(AstPin*)
             //
             outvarp->user1p(envarp);
-            outvarp->user3p(invarp->user3p());  // AstPull* propagation
-            if (invarp->user3p()) UINFO(9, "propagate pull to " << outvarp << endl);
+            m_varAux(outvarp).pullp = m_varAux(invarp).pullp;  // AstPull* propagation
+            if (m_varAux(invarp).pullp) UINFO(9, "propagate pull to " << outvarp << endl);
         } else if (invarp->user1p()) {
             envarp = VN_AS(invarp->user1p(), Var);  // From CASEEQ, foo === 1'bz
         }
@@ -784,7 +790,7 @@ class TristateVisitor final : public TristateBaseVisitor {
         if (!outvarp) {
             // This is the final pre-forced resolution of the tristate, so we apply
             // the pull direction to any undriven pins.
-            const AstPull* const pullp = static_cast<AstPull*>(lhsp->user3p());
+            const AstPull* const pullp = m_varAux(lhsp).pullp;
             bool pull1 = pullp && pullp->direction() == 1;  // Else default is down
 
             AstNodeExpr* undrivenp;
@@ -1435,7 +1441,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 associateLogic(nodep, varrefp->varp());
             } else {
                 // Replace any pullup/pulldowns with assignw logic and set the
-                // direction of the pull in the user3() data on the var.  Given
+                // direction of the pull in the var aux data.  Given
                 // the complexity of merging tristate drivers at any level, the
                 // current limitation of this implementation is that a pullup/down
                 // gets applied to all bits of a bus and a bus cannot have drivers
@@ -1448,7 +1454,8 @@ class TristateVisitor final : public TristateBaseVisitor {
         }
         if (!m_graphing) {
             nodep->unlinkFrBack();
-            VL_DO_DANGLING(pushDeletep(nodep), nodep);  // Node must persist as user3p points to it
+            // Node must persist as var aux data points to it
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
 
@@ -1563,7 +1570,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             // Create new output pin
             const AstAssignW* outAssignp = nullptr;  // If reconnected, the related assignment
             AstPin* outpinp = nullptr;
-            AstVar* const outModVarp = static_cast<AstVar*>(nodep->modVarp()->user4p());
+            AstVar* const outModVarp = m_varAux(nodep->modVarp()).outVarp;
             if (!outModVarp) {
                 // At top, no need for __out as might be input only. Otherwise resolvable.
                 if (!m_modp->isTop()) {
@@ -1638,7 +1645,7 @@ class TristateVisitor final : public TristateBaseVisitor {
 
             // Propagate any pullups/pulldowns upwards if necessary
             if (exprrefp) {
-                if (AstPull* const pullp = static_cast<AstPull*>(nodep->modVarp()->user3p())) {
+                if (AstPull* const pullp = m_varAux(nodep->modVarp()).pullp) {
                     UINFO(9, "propagate pull on " << exprrefp << endl);
                     setPullDirection(exprrefp->varp(), pullp);
                 }

From 3c6b755352d59d0eb9e83117477691780dd50004 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 29 Oct 2023 09:42:52 -0400
Subject: [PATCH 148/157] Tests: Rename t_opt_dead

---
 test_regress/t/{t_class_dead.pl => t_opt_dead.pl} | 0
 test_regress/t/{t_class_dead.v => t_opt_dead.v}   | 0
 2 files changed, 0 insertions(+), 0 deletions(-)
 rename test_regress/t/{t_class_dead.pl => t_opt_dead.pl} (100%)
 rename test_regress/t/{t_class_dead.v => t_opt_dead.v} (100%)

diff --git a/test_regress/t/t_class_dead.pl b/test_regress/t/t_opt_dead.pl
similarity index 100%
rename from test_regress/t/t_class_dead.pl
rename to test_regress/t/t_opt_dead.pl
diff --git a/test_regress/t/t_class_dead.v b/test_regress/t/t_opt_dead.v
similarity index 100%
rename from test_regress/t/t_class_dead.v
rename to test_regress/t/t_opt_dead.v

From 1da15181da318a9849479edbf983f2048ae13ad8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=8Dcaro=20Lima?= <icarodantas.lima@gmail.com>
Date: Sun, 29 Oct 2023 16:44:42 -0400
Subject: [PATCH 149/157] Update CONTRIBUTORS (#4641)

---
 docs/CONTRIBUTORS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index a29698484..44dfd678c 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -59,6 +59,7 @@ Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
+Ícaro Lima
 Ilya Barkov
 Iru Cai
 Ivan Vnučec

From 15046c6c5976b276c5d34590861e0312d0e0a9ce Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 30 Oct 2023 08:01:12 -0400
Subject: [PATCH 150/157] Commentary: Icarus URL (#4639)

---
 README.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index 2c3d98961..d6fed5975 100644
--- a/README.rst
+++ b/README.rst
@@ -150,7 +150,7 @@ the terms of either the GNU Lesser General Public License Version 3 or the
 Perl Artistic License Version 2.0. See the documentation for more details.
 
 .. _CHIPS Alliance: https://chipsalliance.org
-.. _Icarus Verilog: http://iverilog.icarus.com
+.. _Icarus Verilog: https://steveicarus.github.io/iverilog
 .. _Linux Foundation: https://www.linuxfoundation.org
 .. |Logo| image:: https://www.veripool.org/img/verilator_256_200_min.png
 .. |verilator multithreaded performance| image:: https://www.veripool.org/img/verilator_multithreaded_performance_bg-min.png

From c1c8b30a354f6157a9fc70cd85be1994ba90991d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 30 Oct 2023 08:02:54 -0400
Subject: [PATCH 151/157] CI: Add lint-py action (#4640)

---
 .github/workflows/lint.yaml | 53 +++++++++++++++++++++++++++++++++++++
 Makefile.in                 | 10 +++++--
 2 files changed, 61 insertions(+), 2 deletions(-)
 create mode 100644 .github/workflows/lint.yaml

diff --git a/.github/workflows/lint.yaml b/.github/workflows/lint.yaml
new file mode 100644
index 000000000..cb64707f4
--- /dev/null
+++ b/.github/workflows/lint.yaml
@@ -0,0 +1,53 @@
+# DESCRIPTION: Github actions config
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+name: lint
+
+on:
+  push:
+  pull_request:
+  workflow_dispatch:
+  schedule:
+  - cron: '0 0 * * 0' # weekly
+
+env:
+  CI_OS_NAME: linux
+  CI_COMMIT: ${{ github.sha }}
+
+defaults:
+  run:
+    shell: bash
+    working-directory: repo
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  cancel-in-progress: true
+
+jobs:
+
+  lint-py:
+    runs-on: ubuntu-22.04
+    name: Lint Python
+    env:
+      CI_BUILD_STAGE_NAME: build
+      CI_RUNS_ON: ubuntu-22.04
+      CI_M32: 0
+    steps:
+    - name: Checkout
+      uses: actions/checkout@v3
+      with:
+        path: repo
+
+    - name: Install packages for build
+      run: ./ci/ci-install.bash
+
+    # We use specific version numbers, otherwise a Python package
+    # update may add a warning and break our build
+    - name: Install packages for lint
+      run: sudo pip3 install pylint==3.0.2 ruff==0.1.3 clang sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+
+    - name: Configure
+      run: autoconf && ./configure --enable-longtests --enable-ccwarn
+
+    - name: Lint
+      run: make -k lint-py
diff --git a/Makefile.in b/Makefile.in
index 5cb2b29e7..8eb581f1e 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -434,9 +434,15 @@ PYLINT_FLAGS = --score=n --disable=R0801
 RUFF = ruff
 RUFF_FLAGS = check --ignore=E402,E501,E701
 
+# "make -k" so can see all tool result errors
 lint-py:
-	-$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)
-	-$(RUFF) $(RUFF_FLAGS) $(PY_PROGRAMS)
+	$(MAKE) -k lint-py-pylint lint-py-ruff
+
+lint-py-pylint:
+	$(PYLINT) $(PYLINT_FLAGS) $(PY_PROGRAMS)
+
+lint-py-ruff:
+	$(RUFF) $(RUFF_FLAGS) $(PY_PROGRAMS)
 
 format-pl-exec:
 	-chmod a+x test_regress/t/*.pl

From f789d28277aefb599302a5f99eae42c0da84ffab Mon Sep 17 00:00:00 2001
From: Krzysztof Bieganski <kbieganski@antmicro.com>
Date: Tue, 31 Oct 2023 02:26:46 +0100
Subject: [PATCH 152/157] Fix signals read via virtual iface optimized out
 (#4645)

Signed-off-by: Krzysztof Bieganski <kbieganski@antmicro.com>
---
 src/V3Gate.cpp                            |  5 +++
 test_regress/t/t_interface_virtual_opt.pl | 21 ++++++++++++
 test_regress/t/t_interface_virtual_opt.v  | 42 +++++++++++++++++++++++
 3 files changed, 68 insertions(+)
 create mode 100755 test_regress/t/t_interface_virtual_opt.pl
 create mode 100644 test_regress/t/t_interface_virtual_opt.v

diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index df38ef6df..6560dc054 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -372,6 +372,11 @@ private:
             UINFO(6, "New vertex " << varscp << endl);
             vertexp = new GateVarVertex{&m_graph, m_scopep, varscp};
             varscp->user1p(vertexp);
+            if (varscp->varp()->isUsedVirtIface()) {
+                // Can be used in a class method, which cannot be tracked statically
+                vertexp->clearReducibleAndDedupable("VirtIface");
+                vertexp->setConsumed("VirtIface");
+            }
             if (varscp->varp()->isSigPublic()) {
                 // Public signals shouldn't be changed, pli code might be messing with them
                 vertexp->clearReducibleAndDedupable("SigPublic");
diff --git a/test_regress/t/t_interface_virtual_opt.pl b/test_regress/t/t_interface_virtual_opt.pl
new file mode 100755
index 000000000..b46d46042
--- /dev/null
+++ b/test_regress/t/t_interface_virtual_opt.pl
@@ -0,0 +1,21 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    );
+
+execute(
+    check_finished => 1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_interface_virtual_opt.v b/test_regress/t/t_interface_virtual_opt.v
new file mode 100644
index 000000000..d538fc009
--- /dev/null
+++ b/test_regress/t/t_interface_virtual_opt.v
@@ -0,0 +1,42 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2023 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+interface Bus;
+   logic [7:0] data;
+endinterface
+
+class Cls;
+   virtual Bus vbus;
+
+   function void check(logic [7:0] data);
+       if (vbus.data != data) $stop;
+   endfunction
+endclass
+
+module t (clk);
+   input clk;
+   int cyc = 0;
+
+   Bus bus();
+   virtual Bus vbus;
+   Cls obj;
+
+   assign bus.data = 'hFA;
+
+   always @(posedge clk) begin
+      cyc <= cyc + 1;
+      if (cyc == 1) begin
+         obj = new;
+         vbus = bus;
+         obj.vbus = bus;
+      end
+      else if (cyc == 2) begin
+         obj.check('hFA);
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+endmodule

From c241ec90ec9a3454678cec1b4e9cde08bed05158 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 30 Oct 2023 22:10:03 -0400
Subject: [PATCH 153/157] Commentary: Changes update

---
 Changes           | 39 +++++++++++++++++++++++++++++++++++++--
 docs/spelling.txt |  6 ++++++
 2 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/Changes b/Changes
index 266dae696..a68c18512 100644
--- a/Changes
+++ b/Changes
@@ -11,17 +11,35 @@ contributors that suggested a given feature are shown in []. Thanks!
 Verilator 5.017 devel
 ==========================
 
+**Major:**
+
+* Support compilation with precompiled headers with Make and GCC or CLang.
+* Change include of systemc instead of systemc.h (#4622) (#4623). [Chih-Mao Chen]
+  This may require that SystemC programs add 'using namespace sc_core', 'using namespace sc_dt'.
+
 **Minor:**
 
 * Add SIDEEFFECT warning on mishandled side effect cases.
 * Add trace() API even when Verilated without --trace (#4462). [phelter]
 * Add warning on interface instantiation without parens (#4094). [Gökçe Aydos]
-* Support randc (#4349).
+* Add sv_vpi_user.h from IEEE 1800-2017 Annex M (#4606). [Marlon James]
+* Support 'disable fork' (#4125) (#4569). [Aleksander Kiryk, Antmicro Ltd.]
+* Support 'wait fork' (#4586). [Aleksander Kiryk, Antmicro Ltd.]
+* Support 'randc' (#4349).
+* Support assigning events (#4403). [Krzysztof Boroński]
 * Support resizing function call inout arguments (#4467).
+* Support NBAs in non-inlined functions/tasks (#4496) (#4572). [Krzysztof Bieganski, Antmicro Ltd.]
 * Support converting parameters inside modules to localparams (#4511). [Anthony Donlon]
-* Support compilation with precompiled headers with Make and GCC or CLang.
+* Support concatenation of unpacked arrays (#4558). [Yutetsu TAKATSUKASA]
+* Support Clang 16 (#4592). [Mariusz Glebocki]
+* Support VPI variables of real and string data types (#4594). [Marlon James]
+* Support making VL_LOCK_SPINS configurable (#4599). [Geza Lore]
+* Change code --stats output (#4597). [Geza Lore]
+* Change --prof-exec infrastructure and report (#4602). [Geza Lore]
 * Change lint_off to not propagate upwards to files including where the lint_off is.
 * Optimize empty expression statements (#4544).
+* Optimize trace internals (#4610) (#4612). [Geza Lore]
+* Optimize internal performance issues (#4638). [Geza Lore]
 * Fix conversion of impure logical expressions to bit expressions (#487 partial) (#4437). [Ryszard Rozak, Antmicro Ltd.]
 * Fix enum functions in localparams (#3999). [Andrew Nolte]
 * Fix passing arguments by reference (#3385 partial) (#4489). [Ryszard Rozak, Antmicro Ltd.]
@@ -39,12 +57,29 @@ Verilator 5.017 devel
 * Fix object destruction after a copy constructor (#4540) (#4541). [Ryszard Rozak, Antmicro Ltd.]
 * Fix inlining of real functions miscasting (#4543). [Andrew Nolte]
 * Fix broken link error for enum references (#4551). [Anthony Donlon]
+* Fix logical expressions with class objects - caching in v3Const (#4552). [Ryszard Rozak, Antmicro Ltd.]
+* Fix using functions/tasks following class definition inside module (#4553). [Anthony Donlon]
+* Fix large constant buffer overflow (#4556). [Varun Koyyalagunta]
 * Fix instance arrays connecting to array of structs (#4557). [raphmaster]
+* Fix error message for invalid parameter overrides (#4559). [Anthony Donlon]
 * Fix shift to remove operation side effects (#4563).
 * Fix compile warning on unused member function variable (#4567).
 * Fix method narrowing conversion compiler error (#4568).
+* Fix interface comparison (#4570). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix dynamic triggers for named events (#4571). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix dictionaries with keys of class types (#4576). [Ryszard Rozak, Antmicro Ltd.]
+* Fix to not remap local assign intervals in forks (#4583). [Krzysztof Bieganski, Antmicro Ltd.]
 * Fix display optimization ignoring side effects (#4585).
+* Fix PLI/DPI user defined system task/function grammar (#4587) (#4588). [Quentin Corradi]
 * Fix fault on empty clocking block (#4593). [Alex Mykyta]
+* Fix creating implicit nets for inputs of gate primitives (#4603). [Geza Lore]
+* Fix try_put method of unbounded mailbox (#4608). [Ryszard Rozak, Antmicro Ltd.]
+* Fix stable name generation in V3Fork (#4615) (#4624). [Krzysztof Boroński]
+* Fix virtual methods (#4616). [Ryszard Rozak, Antmicro Ltd.]
+* Fix insertion at queue end (#4619). [Krzysztof Boroński]
+* Fix rand fields of reference types (#4627). [Ryszard Rozak, Antmicro Ltd.]
+* Fix dynamic casts of null values (#4631). [Ryszard Rozak, Antmicro Ltd.]
+* Fix signals read via virtual interfaces being misoptimized (#4645). [Krzysztof Bieganski, Antmicro Ltd.]
 * Fix preprocessor to show `line 2 on resumed file.
 
 
diff --git a/docs/spelling.txt b/docs/spelling.txt
index a0321e494..0cfdd2f23 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -35,11 +35,13 @@ Briquet
 Brownlee
 Buckenmaier
 Bybell
+CLang
 CMake
 Cai
 Cavium
 Cfuncs
 Chandan
+Chih
 Chitlesh
 Christophe
 Cochrane
@@ -231,6 +233,7 @@ Mong
 Muhlestein
 Multithreaded
 Multithreading
+Mykyta
 NOUNOPTFLAT
 NaN
 Nalbantis
@@ -522,6 +525,7 @@ doxygen
 dpiGetContext
 dpic
 dsvf
+dt
 dtor
 dumpall
 dumpfile
@@ -780,6 +784,7 @@ pragma
 pragmas
 pre
 precisions
+precompiled
 predefines
 prepareClone
 prepend
@@ -809,6 +814,7 @@ radix
 randc
 randcase
 randstate
+raphmaster
 rarr
 rdtsc
 reStructuredText

From a27abab65f427507258b142862bcb7e28a90adc3 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 31 Oct 2023 08:10:41 -0400
Subject: [PATCH 154/157] Fix PCH to recompile on version change

---
 configure.ac            | 4 ++++
 src/config_package.h.in | 8 ++++++++
 2 files changed, 12 insertions(+)

diff --git a/configure.ac b/configure.ac
index ade69cf7a..ab5c9f98a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -24,6 +24,10 @@ AC_SUBST(PACKAGE_VERSION_NUMBER)
 AC_DEFINE_UNQUOTED([PACKAGE_VERSION_NUMBER_STRING],["$PACKAGE_VERSION_NUMBER"],[Package version as a number])
 VERILATOR_VERSION_INTEGER=`AS_ECHO("$PACKAGE_VERSION") | [sed 's/\([0-9]\)\.\([0-9][0-9][0-9]\) .*/\1\2000/g']`
 AC_SUBST(VERILATOR_VERSION_INTEGER)
+AC_DEFINE_UNQUOTED([PACKAGE_VERSION_STRING_CHAR],
+        [static const char* const PACKAGE_STRING_UNUSED = "$PACKAGE_STRING";],
+        [Package version as a number])
+AC_SUBST(PACKAGE_VERSION_STRING_CHAR)
 
 # Ignore automake flags passed by Ubuntu builds
 AC_ARG_ENABLE([dependency-tracking],
diff --git a/src/config_package.h.in b/src/config_package.h.in
index 25ccf8816..4588746aa 100644
--- a/src/config_package.h.in
+++ b/src/config_package.h.in
@@ -19,6 +19,14 @@
 #define PACKAGE_VERSION_NUMBER_STRING "0.000"
 // Otherwise Autoheader generates it (with all the same macros and more)
 
+// Force ccache recompilation on PACKAGE_STRING change
+#ifndef VL_CPPCHECK
+#ifndef PACKAGE_VERSION_STRING_CHAR
+#define PACKAGE_VERSION_STRING_CHAR
+PACKAGE_VERSION_STRING_CHAR
+#endif
+#endif
+
 //**********************************************************************
 //**** Configure-discovered library options
 

From a764c70b4a60aeb5eb2190b7e09ce2c473187c8a Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 31 Oct 2023 13:15:54 +0100
Subject: [PATCH 155/157] Fix handling of static keyword in methods (#4649)

---
 src/V3AstNodeOther.h                 |  6 +++++-
 src/V3Class.cpp                      |  4 ++--
 src/V3LinkDot.cpp                    |  3 ++-
 src/V3LinkParse.cpp                  | 17 ++++-------------
 src/V3ParseImp.h                     |  7 ++-----
 src/V3Task.cpp                       |  2 +-
 src/V3Width.cpp                      |  2 +-
 src/verilog.y                        |  2 --
 test_regress/t/t_class_unsup_bad.out |  4 ++--
 test_regress/t/t_class_unsup_bad.v   |  1 -
 test_regress/t/t_func_defaults.v     |  2 +-
 test_regress/t/t_struct_cons_cast.v  |  6 +++---
 test_regress/t/t_var_local.v         | 22 +++++++++++++++++++++-
 test_regress/t/t_var_static.v        | 16 ++++++++++++++++
 14 files changed, 60 insertions(+), 34 deletions(-)

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index d3f0aee1e..23aaadb2a 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -84,10 +84,11 @@ private:
     bool m_dpiPure : 1;  // DPI import pure (vs. virtual pure)
     bool m_pureVirtual : 1;  // Pure virtual
     bool m_recursive : 1;  // Recursive or part of recursion
+    bool m_static : 1;  // Static method in class
     bool m_underGenerate : 1;  // Under generate (for warning)
     bool m_virtual : 1;  // Virtual method in class
     bool m_needProcess : 1;  // Needs access to VlProcess of the caller
-    VLifetime m_lifetime;  // Lifetime
+    VLifetime m_lifetime;  // Default lifetime of local vars
     VIsCached m_purity;  // Pure state
 
 protected:
@@ -112,6 +113,7 @@ protected:
         , m_dpiPure{false}
         , m_pureVirtual{false}
         , m_recursive{false}
+        , m_static{false}
         , m_underGenerate{false}
         , m_virtual{false}
         , m_needProcess{false} {
@@ -173,6 +175,8 @@ public:
     bool pureVirtual() const { return m_pureVirtual; }
     void recursive(bool flag) { m_recursive = flag; }
     bool recursive() const { return m_recursive; }
+    void isStatic(bool flag) { m_static = flag; }
+    bool isStatic() const { return m_static; }
     void underGenerate(bool flag) { m_underGenerate = flag; }
     bool underGenerate() const { return m_underGenerate; }
     void isVirtual(bool flag) { m_virtual = flag; }
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index ba2b0ade5..3ca8fedbf 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -118,7 +118,7 @@ private:
     void visit(AstVar* nodep) override {
         iterateChildren(nodep);
         if (m_packageScopep) {
-            if (m_ftaskp && m_ftaskp->lifetime().isStatic()) {
+            if (m_ftaskp && m_ftaskp->isStatic()) {
                 // Move later, or we wouldn't keep iterating the class
                 // We're really moving the VarScope but we might not
                 // have a pointer to it yet
@@ -143,7 +143,7 @@ private:
         {
             m_ftaskp = nodep;
             iterateChildren(nodep);
-            if (m_packageScopep && nodep->lifetime().isStatic()) {
+            if (m_packageScopep && nodep->isStatic()) {
                 m_toScopeMoves.emplace_back(nodep, m_packageScopep);
             }
         }
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 0652060fd..b7c04c4b5 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3185,7 +3185,7 @@ private:
             AstNodeFTask* const taskp
                 = foundp ? VN_CAST(foundp->nodep(), NodeFTask) : nullptr;  // Maybe nullptr
             if (taskp) {
-                if (staticAccess && !taskp->lifetime().isStatic()) {
+                if (staticAccess && !taskp->isStatic()) {
                     // TODO bug4077
                     // nodep->v3error("Static access to non-static task/function "
                     //                << taskp->prettyNameQ() << endl);
@@ -3358,6 +3358,7 @@ private:
                 // External definition cannot have any specifiers, so no value will be overwritten.
                 nodep->isHideLocal(funcProtop->isHideLocal());
                 nodep->isHideProtected(funcProtop->isHideProtected());
+                nodep->isStatic(funcProtop->isStatic());
                 nodep->isVirtual(funcProtop->isVirtual());
                 nodep->lifetime(funcProtop->lifetime());
             } else {
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 0f7fa35ac..baf66d3f7 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -292,19 +292,10 @@ private:
             nodep->v3warn(STATICVAR, "Static variable with assignment declaration declared in a "
                                      "loop converted to automatic");
         }
-        if (m_ftaskp) {
-            bool classMethod = m_ftaskp->classMethod();
-            if (!classMethod) {
-                AstClassOrPackageRef* const pkgrefp
-                    = VN_CAST(m_ftaskp->classOrPackagep(), ClassOrPackageRef);
-                if (pkgrefp && VN_IS(pkgrefp->classOrPackagep(), Class)) classMethod = true;
-            }
-            if (classMethod && nodep->lifetime().isNone()) {
-                nodep->lifetime(VLifetime::AUTOMATIC);
-            }
-        }
-        if (nodep->lifetime().isNone() && nodep->varType() != VVarType::PORT) {
-            nodep->lifetime(m_lifetime);
+        if (nodep->varType() != VVarType::PORT) {
+            if (nodep->lifetime().isNone()) nodep->lifetime(m_lifetime);
+        } else if (m_ftaskp) {
+            nodep->lifetime(VLifetime::AUTOMATIC);
         }
 
         if (nodep->isGParam() && !nodep->isAnsi()) {  // shadow some parameters into localparams
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 439edf510..345c118e1 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -54,9 +54,8 @@ struct VMemberQualifiers {
             uint32_t m_rand : 1;  // Rand property/member qualifier
             uint32_t m_randc : 1;  // Randc property/member qualifier (ignored until supported)
             uint32_t m_virtual : 1;  // Virtual property/method qualifier
-            uint32_t m_automatic : 1;  // Automatic property/method qualifier
             uint32_t m_const : 1;  // Const property/method qualifier
-            uint32_t m_static : 1;  // Static class method
+            uint32_t m_static : 1;  // Static class member
         };
     };
     static VMemberQualifiers none() {
@@ -73,9 +72,8 @@ struct VMemberQualifiers {
         for (AstNodeFTask* nodep = nodesp; nodep; nodep = VN_AS(nodep->nextp(), NodeFTask)) {
             if (m_local) nodep->isHideLocal(true);
             if (m_protected) nodep->isHideProtected(true);
+            if (m_static) nodep->isStatic(true);
             if (m_virtual) nodep->isVirtual(true);
-            if (m_automatic) nodep->lifetime(VLifetime::AUTOMATIC);
-            if (m_static) nodep->lifetime(VLifetime::STATIC);
             if (m_const || m_rand || m_randc) {
                 nodep->v3error("Syntax error: 'const'/'rand'/'randc' not allowed before "
                                "function/task declaration");
@@ -88,7 +86,6 @@ struct VMemberQualifiers {
             if (m_randc) nodep->isRandC(true);
             if (m_local) nodep->isHideLocal(true);
             if (m_protected) nodep->isHideProtected(true);
-            if (m_automatic) nodep->lifetime(VLifetime::AUTOMATIC);
             if (m_static) nodep->lifetime(VLifetime::STATIC);
             if (m_const) nodep->isConst(true);
             if (m_virtual) {
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 9bf42e04d..f0b3d5fba 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -1693,7 +1693,7 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
                 newvaluep = new AstConst{nodep->fileline(), AstConst::Unsized32{}, 0};
             } else if (AstFuncRef* const funcRefp = VN_CAST(portp->valuep(), FuncRef)) {
                 const AstNodeFTask* const funcp = funcRefp->taskp();
-                if (funcp->classMethod() && funcp->lifetime().isStatic()) newvaluep = funcRefp;
+                if (funcp->classMethod() && funcp->isStatic()) newvaluep = funcRefp;
             } else if (AstConst* const constp = VN_CAST(portp->valuep(), Const)) {
                 newvaluep = constp;
             }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 8c653c2eb..a9922e57c 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -3529,7 +3529,7 @@ private:
             if (AstNodeFTask* const ftaskp
                 = VN_CAST(m_memberMap.findMember(classp, nodep->name()), NodeFTask)) {
                 userIterate(ftaskp, nullptr);
-                if (ftaskp->lifetime().isStatic()) {
+                if (ftaskp->isStatic()) {
                     AstNodeExpr* argsp = nullptr;
                     if (nodep->pinsp()) argsp = nodep->pinsp()->unlinkFrBackWithNext();
                     AstNodeFTaskRef* newp = nullptr;
diff --git a/src/verilog.y b/src/verilog.y
index 78c40b5c2..3a274eba3 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -7100,8 +7100,6 @@ memberQualOne<qualifiers>:                      // IEEE: property_qualifier + me
         |       yVIRTUAL__ETC                           { $$ = VMemberQualifiers::none(); $$.m_virtual = true; }
         //                      // Part of property_qualifier only
         |       random_qualifier                        { $$ = $1; }
-        //                      // Part of lifetime, but here as ySTATIC can be in different positions
-        |       yAUTOMATIC                              { $$ = VMemberQualifiers::none(); $$.m_automatic = true; }
         //                      // Part of data_declaration, but not in data_declarationVarFrontClass
         |       yCONST__ETC                             { $$ = VMemberQualifiers::none(); $$.m_const = true; }
         ;
diff --git a/test_regress/t/t_class_unsup_bad.out b/test_regress/t/t_class_unsup_bad.out
index 4e3bc999f..a3f592e5c 100644
--- a/test_regress/t/t_class_unsup_bad.out
+++ b/test_regress/t/t_class_unsup_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_class_unsup_bad.v:29:24: Syntax error: 'const'/'rand'/'randc' not allowed before function/task declaration
-   29 |    const function void func_const; endfunction
+%Error: t/t_class_unsup_bad.v:28:24: Syntax error: 'const'/'rand'/'randc' not allowed before function/task declaration
+   28 |    const function void func_const; endfunction
       |                        ^~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_class_unsup_bad.v b/test_regress/t/t_class_unsup_bad.v
index dbfdbf310..dd5fd639b 100644
--- a/test_regress/t/t_class_unsup_bad.v
+++ b/test_regress/t/t_class_unsup_bad.v
@@ -25,7 +25,6 @@ class C #(parameter P=1);
    function int classfunc; endfunction
    virtual function void func_virtual; endfunction
    pure virtual function void func_pure_virtual;
-   automatic function void func_automatic; endfunction
    const function void func_const; endfunction
    extern task exttask;
 endclass
diff --git a/test_regress/t/t_func_defaults.v b/test_regress/t/t_func_defaults.v
index 3d360fa7a..6728ce654 100644
--- a/test_regress/t/t_func_defaults.v
+++ b/test_regress/t/t_func_defaults.v
@@ -21,7 +21,7 @@ endfunction
 
 class Foo;
    static int x;
-   function static int get_x;
+   static function int get_x;
       return x;
    endfunction
 endclass
diff --git a/test_regress/t/t_struct_cons_cast.v b/test_regress/t/t_struct_cons_cast.v
index f821b2f33..1c07b1bf8 100644
--- a/test_regress/t/t_struct_cons_cast.v
+++ b/test_regress/t/t_struct_cons_cast.v
@@ -27,15 +27,15 @@ class Cls;
 
    state_info_t m_recur_states/*[uvm_object][uvm_object]*/[uvm_recursion_policy_enum];
 
-   automatic function uvm_recursion_policy_enum get_recursion_policy();
+   function uvm_recursion_policy_enum get_recursion_policy();
       return UVM_DEEP;
    endfunction
 
-   automatic function bit get_ret_val();
+   function bit get_ret_val();
       return $c(1);
    endfunction
 
-   automatic function void test();
+   function void test();
       bit ret_val;
       ret_val = $c1(1);
       // See issue #4568
diff --git a/test_regress/t/t_var_local.v b/test_regress/t/t_var_local.v
index c6871625d..be0e1042f 100644
--- a/test_regress/t/t_var_local.v
+++ b/test_regress/t/t_var_local.v
@@ -4,6 +4,21 @@
 // any use, without warranty, 2003 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+class cls;
+  static task automatic tsk1;
+     integer task_assign = 1;
+     if (task_assign != 1) $stop;
+     task_assign = 2;
+     if (task_assign != 2) $stop;
+  endtask
+  static task tsk2;
+     integer task_assign = 1;
+     if (task_assign != 1) $stop;
+     task_assign = 2;
+     if (task_assign != 2) $stop;
+  endtask
+endclass
+
 module t;
 
    integer top;
@@ -43,8 +58,13 @@ module t;
             end
          end
       end
+      // Repeat task calls to ensure we reinit the initial value
       tsk;
-      tsk; // Second time to ensure we reinit the initial value
+      tsk;
+      cls::tsk1();
+      cls::tsk1();
+      cls::tsk2();
+      cls::tsk2();
       $write("*-* All Finished *-*\n");
       $finish;
    end
diff --git a/test_regress/t/t_var_static.v b/test_regress/t/t_var_static.v
index 7eec192a5..47e293f61 100644
--- a/test_regress/t/t_var_static.v
+++ b/test_regress/t/t_var_static.v
@@ -16,6 +16,17 @@ package my_pkg;
    endfunction
 endpackage
 
+class my_cls;
+   static function int get_cnt1;
+      static int cnt = 0;
+      return ++cnt;
+   endfunction
+   static function static int get_cnt2;
+      int cnt = 0;
+      return ++cnt;
+   endfunction
+endclass
+
 module t (/*AUTOARG*/
    // Inputs
    clk
@@ -89,6 +100,11 @@ module t (/*AUTOARG*/
       v = my_pkg::f_no_st_pkg(); `checkh(v, 1);
       v = my_pkg::f_no_st_pkg(); `checkh(v,   2);
       //
+      v = my_cls::get_cnt1(); `checkh(v,   1);
+      v = my_cls::get_cnt1(); `checkh(v,   2);
+      v = my_cls::get_cnt2(); `checkh(v,   1);
+      v = my_cls::get_cnt2(); `checkh(v,   2);
+      //
    end
 
    int cyc = 0;

From 590188820de6e643c661a2a6f9e6f8ba05d3adde Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 31 Oct 2023 19:49:40 -0400
Subject: [PATCH 156/157] Commentary: Changes update

---
 Changes | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Changes b/Changes
index a68c18512..603ba5ca4 100644
--- a/Changes
+++ b/Changes
@@ -80,6 +80,7 @@ Verilator 5.017 devel
 * Fix rand fields of reference types (#4627). [Ryszard Rozak, Antmicro Ltd.]
 * Fix dynamic casts of null values (#4631). [Ryszard Rozak, Antmicro Ltd.]
 * Fix signals read via virtual interfaces being misoptimized (#4645). [Krzysztof Bieganski, Antmicro Ltd.]
+* Fix handling of static keyword in methods (#4649). [Ryszard Rozak, Antmicro Ltd.]
 * Fix preprocessor to show `line 2 on resumed file.
 
 

From 67dfa37c560385827218350ea936eb1baf604240 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 31 Oct 2023 19:50:01 -0400
Subject: [PATCH 157/157] Version bump

---
 CMakeLists.txt | 2 +-
 Changes        | 2 +-
 configure.ac   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 87a695c0b..63510641a 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -15,7 +15,7 @@
 cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(Verilator
-    VERSION 5.017
+    VERSION 5.018
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )
diff --git a/Changes b/Changes
index 603ba5ca4..ee1167e6f 100644
--- a/Changes
+++ b/Changes
@@ -8,7 +8,7 @@ The changes in each Verilator version are described below.  The
 contributors that suggested a given feature are shown in []. Thanks!
 
 
-Verilator 5.017 devel
+Verilator 5.018 2023-10-30
 ==========================
 
 **Major:**
diff --git a/configure.ac b/configure.ac
index ab5c9f98a..17c4b15d9 100644
--- a/configure.ac
+++ b/configure.ac
@@ -10,7 +10,7 @@
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.017 devel],
+AC_INIT([Verilator],[5.018 2023-10-30],
         [https://verilator.org],
         [verilator],[https://verilator.org])