From eb5676366bd0451d667cdc7c83e224e64fe6dcee Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 27 Apr 2025 13:06:34 -0400
Subject: [PATCH 001/211] devel release

---
 CMakeLists.txt | 2 +-
 Changes        | 6 ++++++
 configure.ac   | 2 +-
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 705e8e4cf..8e17aece0 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -16,7 +16,7 @@ cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(
     Verilator
-    VERSION 5.036
+    VERSION 5.037
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )
diff --git a/Changes b/Changes
index 90604dccc..69deeb0ef 100644
--- a/Changes
+++ b/Changes
@@ -8,6 +8,12 @@ The changes in each Verilator version are described below.  The
 contributors that suggested a given feature are shown in []. Thanks!
 
 
+Verilator 5.037 devel
+==========================
+
+**Other:**
+
+
 Verilator 5.036 2025-04-27
 ==========================
 
diff --git a/configure.ac b/configure.ac
index e6c608eee..7ea13e2cd 100644
--- a/configure.ac
+++ b/configure.ac
@@ -10,7 +10,7 @@
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.036 2025-04-27],
+AC_INIT([Verilator],[5.037 devel],
         [https://verilator.org],
         [verilator],[https://verilator.org])
 

From cb1661f9d05e1354a69810357aa5a4c2d04c9e5e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 27 Apr 2025 14:17:24 -0400
Subject: [PATCH 002/211] Internals: Cleanups (from parse branch). No
 functional change intended.

---
 src/V3AstNodes.cpp   | 4 ++--
 src/V3CCtors.cpp     | 2 +-
 src/V3Clean.cpp      | 2 +-
 src/V3Clock.cpp      | 7 ++++---
 src/V3Depth.cpp      | 8 +++++++-
 src/V3DepthBlock.cpp | 6 +++---
 src/V3LifePost.cpp   | 1 +
 src/V3LinkCells.cpp  | 2 +-
 src/V3Sampled.cpp    | 3 ++-
 src/V3SenTree.h      | 2 +-
 src/V3Subst.cpp      | 4 ++--
 11 files changed, 25 insertions(+), 16 deletions(-)

diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 9ad85e30a..0353a1317 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1861,10 +1861,10 @@ void AstIfaceRefDType::dump(std::ostream& str) const {
     if (ifaceName() != "") str << " if=" << ifaceName();
     if (modportName() != "") str << " mp=" << modportName();
     if (cellp()) {
-        str << " -> ";
+        str << " c-> ";
         cellp()->dump(str);
     } else if (ifacep()) {
-        str << " -> ";
+        str << " i-> ";
         ifacep()->dump(str);
     } else {
         str << " -> UNLINKED";
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 101841229..92728f867 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -132,7 +132,7 @@ private:
 class CCtorsVisitor final : public VNVisitor {
     // NODE STATE
 
-    // STATE
+    // STATE - for current visit position (use VL_RESTORER)
     AstNodeModule* m_modp = nullptr;  // Current module
     AstCFunc* m_cfuncp = nullptr;  // Current function
     V3CCtorsBuilder* m_varResetp = nullptr;  // Builder of _ctor_var_reset
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index ca3a16246..970675062 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -45,7 +45,7 @@ class CleanVisitor final : public VNVisitor {
     // TYPES
     enum CleanState : uint8_t { CS_UNKNOWN, CS_CLEAN, CS_DIRTY };
 
-    // STATE
+    // STATE - for current visit position (use VL_RESTORER)
     const AstNodeModule* m_modp = nullptr;
 
     // METHODS
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index a813f7b80..ec6d8bf21 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -68,8 +68,9 @@ public:
 
 class ClockVisitor final : public VNVisitor {
     // NODE STATE
+
     // STATE
-    AstCFunc* m_evalp = nullptr;  // The '_eval' function
+    AstCFunc* const m_evalp = nullptr;  // The '_eval' function
     AstSenTree* m_lastSenp = nullptr;  // Last sensitivity match, so we can detect duplicates.
     AstIf* m_lastIfp = nullptr;  // Last sensitivity if active to add more under
 
@@ -174,8 +175,8 @@ class ClockVisitor final : public VNVisitor {
 
 public:
     // CONSTRUCTORS
-    explicit ClockVisitor(AstNetlist* netlistp) {
-        m_evalp = netlistp->evalp();
+    explicit ClockVisitor(AstNetlist* netlistp)
+        : m_evalp{netlistp->evalp()} {
         // Simplify all SenTrees
         for (AstSenTree* senTreep = netlistp->topScopep()->senTreesp(); senTreep;
              senTreep = VN_AS(senTreep->nextp(), SenTree)) {
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index d28db344d..4d7803fef 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -36,7 +36,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 class DepthVisitor final : public VNVisitor {
     // NODE STATE
 
-    // STATE
+    // STATE - for current visit position (use VL_RESTORER)
     AstCFunc* m_cfuncp = nullptr;  // Current block
     AstMTaskBody* m_mtaskbodyp = nullptr;  // Current mtaskbody
     AstNode* m_stmtp = nullptr;  // Current statement
@@ -71,6 +71,8 @@ class DepthVisitor final : public VNVisitor {
     void visit(AstCFunc* nodep) override {
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_mtaskbodyp);
+        VL_RESTORER(m_depth);
+        VL_RESTORER(m_maxdepth);
         m_cfuncp = nodep;
         m_mtaskbodyp = nullptr;
         m_depth = 0;
@@ -81,6 +83,8 @@ class DepthVisitor final : public VNVisitor {
     void visit(AstMTaskBody* nodep) override {
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_mtaskbodyp);
+        VL_RESTORER(m_depth);
+        VL_RESTORER(m_maxdepth);
         m_cfuncp = nullptr;
         m_mtaskbodyp = nodep;
         m_depth = 0;
@@ -90,6 +94,8 @@ class DepthVisitor final : public VNVisitor {
     }
     void visitStmt(AstNodeStmt* nodep) {
         VL_RESTORER(m_stmtp);
+        VL_RESTORER(m_depth);
+        VL_RESTORER(m_maxdepth);
         m_stmtp = nodep;
         m_depth = 0;
         m_maxdepth = 0;
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index 21b30e411..8c31fc7df 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -33,7 +33,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 class DepthBlockVisitor final : public VNVisitor {
     // NODE STATE
 
-    // STATE
+    // STATE - for current visit position (use VL_RESTORER)
     const AstNodeModule* m_modp = nullptr;  // Current module
     const AstCFunc* m_cfuncp = nullptr;  // Current function
     int m_depth = 0;  // How deep in an expression
@@ -85,7 +85,7 @@ class DepthBlockVisitor final : public VNVisitor {
     void visit(AstStmtExpr* nodep) override {}  // Stop recursion after introducing new function
     void visit(AstJumpBlock*) override {}  // Stop recursion as can't break up across a jump
     void visit(AstNodeStmt* nodep) override {
-        m_depth++;
+        ++m_depth;
         if (m_depth > v3Global.opt.compLimitBlocks()) {  // Already done
             UINFO(4, "DeepBlocks " << m_depth << " " << nodep << endl);
             const AstNode* const backp = nodep->backp();  // Only for debug
@@ -97,7 +97,7 @@ class DepthBlockVisitor final : public VNVisitor {
         } else {
             iterateChildren(nodep);
         }
-        m_depth--;
+        --m_depth;
     }
 
     void visit(AstNodeExpr*) override {}  // Accelerate
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index e5b9851b1..2a8f8792d 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -47,6 +47,7 @@ class LifePostElimVisitor final : public VNVisitor {
     // INPUT:
     //  AstVarScope::user4p()   -> AstVarScope*, If set, replace this
     //                             varscope with specified new one
+
     // STATE
 
     // VISITORS
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 3bd67bdef..3542be191 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -125,7 +125,7 @@ class LinkCellsVisitor final : public VNVisitor {
         return nodep->user1u().toGraphVertex();
     }
     void newEdge(V3GraphVertex* fromp, V3GraphVertex* top, int weight, bool cuttable) {
-        V3GraphEdge* const edgep = new V3GraphEdge{&m_graph, fromp, top, weight, cuttable};
+        const V3GraphEdge* const edgep = new V3GraphEdge{&m_graph, fromp, top, weight, cuttable};
         UINFO(9, "    newEdge " << edgep << " " << fromp->name() << " -> " << top->name() << endl);
     }
 
diff --git a/src/V3Sampled.cpp b/src/V3Sampled.cpp
index 8058fa683..45fdbfafc 100644
--- a/src/V3Sampled.cpp
+++ b/src/V3Sampled.cpp
@@ -35,7 +35,8 @@ class SampledVisitor final : public VNVisitor {
     //  AstVarScope::user1()  -> AstVarScope*. The VarScope that stores sampled value
     //  AstVarRef::user1()    -> bool. Whether already converted
     const VNUser1InUse m_user1InUse;
-    // STATE
+
+    // STATE - for current visit position (use VL_RESTORER)
     AstScope* m_scopep = nullptr;  // Current scope
     bool m_inSampled = false;  // True inside a sampled expression
 
diff --git a/src/V3SenTree.h b/src/V3SenTree.h
index 77ff33514..2556b1138 100644
--- a/src/V3SenTree.h
+++ b/src/V3SenTree.h
@@ -32,7 +32,7 @@
 // And provide functions to find/add a new one
 
 class SenTreeFinder final {
-    // STATE
+    // STATE - across all visitors
     AstTopScope* const m_topScopep;  // Top scope to add global SenTrees to
     std::unordered_set<VNRef<AstSenTree>> m_trees;  // Set of global SenTrees
     AstSenTree* m_combop = nullptr;  // The unique combinational domain SenTree
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index f5745a277..08af8a416 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -170,8 +170,8 @@ public:
 class SubstUseVisitor final : public VNVisitorConst {
     // NODE STATE
     // See SubstVisitor
-    //
-    // STATE
+
+    // STATE - across all visitors
     const int m_origStep;  // Step number where subst was recorded
     bool m_ok = true;  // No misassignments found
 

From 4c4a39a1158929bfd150371c5ec1b915d1c90a27 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 27 Apr 2025 16:52:26 -0400
Subject: [PATCH 003/211] Internals: Refactor V3LinkDot dump and comments. No
 functional change intended.

---
 src/V3LinkDot.cpp | 160 ++++++++++++++++++++++------------------------
 src/V3LinkDot.h   |   1 +
 2 files changed, 79 insertions(+), 82 deletions(-)

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 825da71d1..ba749b975 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -153,7 +153,7 @@ private:
     static LinkDotState* s_errorThisp;  // Last self, for error reporting only
 
     // MEMBERS
-    VSymGraph m_syms;  // Symbol table
+    VSymGraph m_syms;  // Symbol table by hierarchy
     VSymEnt* m_dunitEntp = nullptr;  // $unit entry
     std::multimap<std::string, VSymEnt*>
         m_nameScopeSymMap;  // Map of scope referenced by non-pretty textual name
@@ -847,7 +847,7 @@ class LinkDotFindVisitor final : public VNVisitor {
     }
 
     // VISITORS
-    void visit(AstNetlist* nodep) override {
+    void visit(AstNetlist* nodep) override {  // FindVisitor::
         // Process $unit or other packages
         // Not needed - dotted references not allowed from inside packages
         // for (AstNodeModule* nodep = v3Global.rootp()->modulesp();
@@ -922,9 +922,9 @@ class LinkDotFindVisitor final : public VNVisitor {
             m_curSymp = m_modSymp = nullptr;
         }
     }
-    void visit(AstTypeTable*) override {}
-    void visit(AstConstPool*) override {}
-    void visit(AstNodeModule* nodep) override {
+    void visit(AstTypeTable*) override {}  // FindVisitor::
+    void visit(AstConstPool*) override {}  // FindVisitor::
+    void visit(AstNodeModule* nodep) override {  // FindVisitor::
         // Called on top module from Netlist, other modules from the cell creating them,
         // and packages
         UINFO(8, "   " << nodep << endl);
@@ -1007,7 +1007,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         }
     }
 
-    void visit(AstClass* nodep) override {
+    void visit(AstClass* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_curSymp, nodep, "Class not under module/package/$unit");
         UINFO(8, "   " << nodep << endl);
         VL_RESTORER(m_scope);
@@ -1042,18 +1042,18 @@ class LinkDotFindVisitor final : public VNVisitor {
             if (!m_explicitNew && m_statep->forPrimary()) makeImplicitNew(nodep);
         }
     }
-    void visit(AstClassOrPackageRef* nodep) override {
+    void visit(AstClassOrPackageRef* nodep) override {  // FindVisitor::
         if (!nodep->classOrPackageNodep() && nodep->name() == "$unit") {
             nodep->classOrPackageNodep(v3Global.rootp()->dollarUnitPkgAddp());
         }
         iterateChildren(nodep);
     }
-    void visit(AstScope* nodep) override {
+    void visit(AstScope* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_statep->forScopeCreation(), nodep,
                     "Scopes should only exist right after V3Scope");
         // Ignored.  Processed in next step
     }
-    void visit(AstCell* nodep) override {
+    void visit(AstCell* nodep) override {  // FindVisitor::
         UINFO(5, "   CELL under " << m_scope << " is " << nodep << endl);
         // Process XREFs/etc inside pins
         if (nodep->recursive() && m_inRecursion) return;
@@ -1089,7 +1089,7 @@ class LinkDotFindVisitor final : public VNVisitor {
             if (nodep->modp()) iterate(nodep->modp());
         }
     }
-    void visit(AstCellInline* nodep) override {
+    void visit(AstCellInline* nodep) override {  // FindVisitor::
         UINFO(5, "   CELLINLINE under " << m_scope << " is " << nodep << endl);
         VSymEnt* aboveSymp = m_curSymp;
         // If baz__DOT__foo__DOT__bar, we need to find baz__DOT__foo and add bar to it.
@@ -1110,11 +1110,11 @@ class LinkDotFindVisitor final : public VNVisitor {
             m_statep->insertInline(aboveSymp, m_modSymp, nodep, nodep->name());
         }
     }
-    void visit(AstDefParam* nodep) override {
+    void visit(AstDefParam* nodep) override {  // FindVisitor::
         nodep->user1p(m_curSymp);
         iterateChildren(nodep);
     }
-    void visit(AstNodeBlock* nodep) override {
+    void visit(AstNodeBlock* nodep) override {  // FindVisitor::
         UINFO(5, "   " << nodep << endl);
         if (nodep->name() == "" && nodep->unnamed()) {
             // Unnamed blocks are only important when they contain var
@@ -1153,7 +1153,7 @@ class LinkDotFindVisitor final : public VNVisitor {
             }
         }
     }
-    void visit(AstNodeFTask* nodep) override {
+    void visit(AstNodeFTask* nodep) override {  // FindVisitor::
         // NodeTask: Remember its name for later resolution
         UINFO(5, "   " << nodep << endl);
         UASSERT_OBJ(m_curSymp && m_modSymp, nodep, "Function/Task not under module?");
@@ -1271,7 +1271,7 @@ class LinkDotFindVisitor final : public VNVisitor {
             iterateChildren(nodep);
         }
     }
-    void visit(AstClocking* nodep) override {
+    void visit(AstClocking* nodep) override {  // FindVisitor::
         VL_RESTORER(m_clockingp);
         m_clockingp = nodep;
         iterate(nodep->sensesp());
@@ -1295,7 +1295,7 @@ class LinkDotFindVisitor final : public VNVisitor {
             iterateAndNextNull(nodep->itemsp());
         }
     }
-    void visit(AstClockingItem* nodep) override {
+    void visit(AstClockingItem* nodep) override {  // FindVisitor::
         if (nodep->varp()) {
             if (m_curSymp->nodep() == m_clockingp) iterate(nodep->varp());
             return;
@@ -1327,7 +1327,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         nodep->varp(newvarp);
         iterate(nodep->exprp());
     }
-    void visit(AstConstraint* nodep) override {
+    void visit(AstConstraint* nodep) override {  // FindVisitor::
         VL_RESTORER(m_curSymp);
         // Change to appropriate package if extern declaration (vs definition)
         VSymEnt* upSymp = m_curSymp;
@@ -1360,7 +1360,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         m_curSymp = m_statep->insertBlock(upSymp, name, nodep, m_classOrPackagep);
         iterateChildren(nodep);
     }
-    void visit(AstVar* nodep) override {
+    void visit(AstVar* nodep) override {  // FindVisitor::
         // Var: Remember its name for later resolution
         UASSERT_OBJ(m_curSymp && m_modSymp, nodep, "Var not under module?");
         iterateChildren(nodep);
@@ -1513,18 +1513,18 @@ class LinkDotFindVisitor final : public VNVisitor {
             }
         }
     }
-    void visit(AstTypedef* nodep) override {
+    void visit(AstTypedef* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_curSymp, nodep, "Typedef not under module/package/$unit");
         iterateChildren(nodep);
         m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
     }
-    void visit(AstTypedefFwd* nodep) override {
+    void visit(AstTypedefFwd* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_curSymp, nodep, "Typedef not under module/package/$unit");
         iterateChildren(nodep);
         // No need to insert, only the real typedef matters, but need to track for errors
         nodep->user1p(m_curSymp);
     }
-    void visit(AstParamTypeDType* nodep) override {
+    void visit(AstParamTypeDType* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_curSymp, nodep, "Parameter type not under module/package/$unit");
 
         // Replace missing param types with provided hierarchical type params.
@@ -1558,11 +1558,11 @@ class LinkDotFindVisitor final : public VNVisitor {
             symp->exported(false);
         }
     }
-    void visit(AstCFunc* nodep) override {
+    void visit(AstCFunc* nodep) override {  // FindVisitor::
         // For dotted resolution, ignore all AstVars under functions, otherwise shouldn't exist
         UASSERT_OBJ(!m_statep->forScopeCreation(), nodep, "No CFuncs expected in tree yet");
     }
-    void visit(AstEnumItem* nodep) override {
+    void visit(AstEnumItem* nodep) override {  // FindVisitor::
         // EnumItem: Remember its name for later resolution
         iterateChildren(nodep);
         // Find under either a task or the module's vars
@@ -1601,7 +1601,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         }
         if (ins) m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
     }
-    void visit(AstPackageImport* nodep) override {
+    void visit(AstPackageImport* nodep) override {  // FindVisitor::
         UINFO(4, "  Link: " << nodep << endl);
         if (!nodep->packagep()) return;  // Errored in V3LinkCells
         VSymEnt* const srcp = m_statep->getNodeSym(nodep->packagep());
@@ -1620,7 +1620,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         UINFO(9, "    Link Done: " << nodep << endl);
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
-    void visit(AstPackageExport* nodep) override {
+    void visit(AstPackageExport* nodep) override {  // FindVisitor::
         UINFO(9, "  Link: " << nodep << endl);
         if (!nodep->packagep()) return;  // Errored in V3LinkCells
         VSymEnt* const srcp = m_statep->getNodeSym(nodep->packagep());
@@ -1635,13 +1635,13 @@ class LinkDotFindVisitor final : public VNVisitor {
         UINFO(9, "    Link Done: " << nodep << endl);
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
-    void visit(AstPackageExportStarStar* nodep) override {
+    void visit(AstPackageExportStarStar* nodep) override {  // FindVisitor::
         UINFO(4, "  Link: " << nodep << endl);
         m_curSymp->exportStarStar(m_statep->symsp());
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
 
-    void visit(AstNodeForeach* nodep) override {
+    void visit(AstNodeForeach* nodep) override {  // FindVisitor::
         // Symbol table needs nodep->name() as the index variable's name
         VL_RESTORER(m_curSymp);
         {
@@ -1692,7 +1692,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         }
     }
 
-    void visit(AstWithParse* nodep) override {
+    void visit(AstWithParse* nodep) override {  // FindVisitor::
         // Change WITHPARSE(FUNCREF, equation) to FUNCREF(WITH(equation))
         AstNodeFTaskRef* funcrefp = VN_CAST(nodep->funcrefp(), NodeFTaskRef);
         if (const AstDot* const dotp = VN_CAST(nodep->funcrefp(), Dot))
@@ -1726,7 +1726,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         nodep->replaceWith(nodep->funcrefp()->unlinkFrBack());
         VL_DO_DANGLING(nodep->deleteTree(), nodep);
     }
-    void visit(AstWith* nodep) override {
+    void visit(AstWith* nodep) override {  // FindVisitor::
         // Symbol table needs nodep->name() as the index variable's name
         // Iteration will pickup the AstVar we made under AstWith
         VL_RESTORER(m_curSymp);
@@ -1744,7 +1744,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         }
     }
 
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }  // FindVisitor::
 
 public:
     // CONSTRUCTORS
@@ -1792,9 +1792,9 @@ class LinkDotParamVisitor final : public VNVisitor {
     }
 
     // VISITORS
-    void visit(AstTypeTable*) override {}
-    void visit(AstConstPool*) override {}
-    void visit(AstNodeModule* nodep) override {
+    void visit(AstTypeTable*) override {}  // ParamVisitor::
+    void visit(AstConstPool*) override {}  // ParamVisitor::
+    void visit(AstNodeModule* nodep) override {  // ParamVisitor::
         UINFO(5, "   " << nodep << endl);
         if ((nodep->dead() || !nodep->user4()) && !nodep->hierParams()) {
             UINFO(4, "Mark dead module " << nodep << endl);
@@ -1811,7 +1811,7 @@ class LinkDotParamVisitor final : public VNVisitor {
         m_modp = nodep;
         iterateChildren(nodep);
     }
-    void visit(AstPin* nodep) override {
+    void visit(AstPin* nodep) override {  // ParamVisitor::
         // Pin: Link to submodule's port
         // Deal with implicit definitions - do before Resolve visitor as may
         // be referenced above declaration
@@ -1820,7 +1820,7 @@ class LinkDotParamVisitor final : public VNVisitor {
             pinImplicitExprRecurse(nodep->exprp());
         }
     }
-    void visit(AstDefParam* nodep) override {
+    void visit(AstDefParam* nodep) override {  // ParamVisitor::
         iterateChildren(nodep);
         nodep->v3warn(DEFPARAM, "defparam is deprecated (IEEE 1800-2023 C.4.1)\n"
                                     << nodep->warnMore()
@@ -1843,7 +1843,7 @@ class LinkDotParamVisitor final : public VNVisitor {
         }
         VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
     }
-    void visit(AstPort* nodep) override {
+    void visit(AstPort* nodep) override {  // ParamVisitor::
         // Port: Stash the pin number
         // Need to set pin numbers after varnames are created
         // But before we do the final resolution based on names
@@ -1876,14 +1876,14 @@ class LinkDotParamVisitor final : public VNVisitor {
         // Ports not needed any more
         VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
     }
-    void visit(AstAssignW* nodep) override {
+    void visit(AstAssignW* nodep) override {  // ParamVisitor::
         // Deal with implicit definitions
         // We used to nodep->allowImplicit() here, but it turns out
         // normal "assigns" can also make implicit wires.  Yuk.
         pinImplicitExprRecurse(nodep->lhsp());
         iterateChildren(nodep);
     }
-    void visit(AstAssignAlias* nodep) override {
+    void visit(AstAssignAlias* nodep) override {  // ParamVisitor::
         // tran gates need implicit creation
         // As VarRefs don't exist in forPrimary, sanity check
         UASSERT_OBJ(!m_statep->forPrimary(), nodep, "Assign aliases unexpected pre-dot");
@@ -1895,13 +1895,13 @@ class LinkDotParamVisitor final : public VNVisitor {
         }
         iterateChildren(nodep);
     }
-    void visit(AstImplicit* nodep) override {
+    void visit(AstImplicit* nodep) override {  // ParamVisitor::
         // Unsupported gates need implicit creation
         pinImplicitExprRecurse(nodep->exprsp());
         // We're done with implicit gates
         VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
     }
-    void visit(AstClassOrPackageRef* nodep) override {
+    void visit(AstClassOrPackageRef* nodep) override {  // ParamVisitor::
         if (auto* const fwdp = VN_CAST(nodep->classOrPackageNodep(), TypedefFwd)) {
             // Relink forward definitions to the "real" definition
             VSymEnt* const foundp = m_statep->getNodeSym(fwdp)->findIdFallback(fwdp->name());
@@ -1923,14 +1923,14 @@ class LinkDotParamVisitor final : public VNVisitor {
         }
         iterateChildren(nodep);
     }
-    void visit(AstPull* nodep) override {
+    void visit(AstPull* nodep) override {  // ParamVisitor::
         // Deal with implicit definitions
         // We used to nodep->allowImplicit() here, but it turns out
         // normal "assigns" can also make implicit wires.  Yuk.
         pinImplicitExprRecurse(nodep->lhsp());
         iterateChildren(nodep);
     }
-    void visit(AstTypedefFwd* nodep) override {
+    void visit(AstTypedefFwd* nodep) override {  // ParamVisitor::
         VSymEnt* const foundp = m_statep->getNodeSym(nodep)->findIdFallback(nodep->name());
         if (!foundp && v3Global.opt.pedantic()
             && nodep->name() != "process") {  // Process is dangling as isn't implemented yet
@@ -1946,7 +1946,7 @@ class LinkDotParamVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
 
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }  // ParamVisitor::
 
 public:
     // CONSTRUCTORS
@@ -1968,12 +1968,12 @@ class LinkDotScopeVisitor final : public VNVisitor {
     VSymEnt* m_modSymp = nullptr;  // Symbol entry for current module
 
     // VISITORS
-    void visit(AstNetlist* nodep) override {
+    void visit(AstNetlist* nodep) override {  // ScopeVisitor::
         // Recurse..., backward as must do packages before using packages
         iterateChildrenBackwardsConst(nodep);
     }
-    void visit(AstConstPool*) override {}
-    void visit(AstScope* nodep) override {
+    void visit(AstConstPool*) override {}  // ScopeVisitor::
+    void visit(AstScope* nodep) override {  // ScopeVisitor::
         UINFO(8, "  SCOPE " << nodep << endl);
         UASSERT_OBJ(m_statep->forScopeCreation(), nodep,
                     "Scopes should only exist right after V3Scope");
@@ -1985,7 +1985,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
         m_scopep = nodep;
         iterateChildren(nodep);
     }
-    void visit(AstVarScope* nodep) override {
+    void visit(AstVarScope* nodep) override {  // ScopeVisitor::
         if (!nodep->varp()->isFuncLocal() && !nodep->varp()->isClassMember()) {
             VSymEnt* const varSymp
                 = m_statep->insertSym(m_modSymp, nodep->varp()->name(), nodep, nullptr);
@@ -2023,23 +2023,25 @@ class LinkDotScopeVisitor final : public VNVisitor {
             }
         }
     }
-    void visit(AstNodeFTask* nodep) override {
+    void visit(AstNodeFTask* nodep) override {  // ScopeVisitor::
         VSymEnt* const symp = m_statep->insertBlock(m_modSymp, nodep->name(), nodep, nullptr);
         symp->fallbackp(m_modSymp);
         iterateChildren(nodep);
     }
-    void visit(AstNodeForeach* nodep) override {
+    void visit(AstNodeForeach* nodep) override {  // ScopeVisitor::
         VSymEnt* const symp = m_statep->insertBlock(m_modSymp, nodep->name(), nodep, nullptr);
         symp->fallbackp(m_modSymp);
         // No recursion, we don't want to pick up variables
     }
-    void visit(AstConstraintForeach* nodep) override { iterateChildren(nodep); }
-    void visit(AstWith* nodep) override {
+    void visit(AstConstraintForeach* nodep) override {  // ScopeVisitor::
+        iterateChildren(nodep);
+    }
+    void visit(AstWith* nodep) override {  // ScopeVisitor::
         VSymEnt* const symp = m_statep->insertBlock(m_modSymp, nodep->name(), nodep, nullptr);
         symp->fallbackp(m_modSymp);
         // No recursion, we don't want to pick up variables
     }
-    void visit(AstAssignAlias* nodep) override {
+    void visit(AstAssignAlias* nodep) override {  // ScopeVisitor::
         // Track aliases created by V3Inline; if we get a VARXREF(aliased_from)
         // we'll need to replace it with a VARXREF(aliased_to)
         if (debug() >= 9) nodep->dumpTree("-    alias: ");
@@ -2049,7 +2051,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
         fromVscp->user2p(toVscp);
         iterateChildren(nodep);
     }
-    void visit(AstAssignVarScope* nodep) override {
+    void visit(AstAssignVarScope* nodep) override {  // ScopeVisitor::
         UINFO(5, "ASSIGNVARSCOPE  " << nodep << endl);
         if (debug() >= 9) nodep->dumpTree("-    avs: ");
         VSymEnt* rhsSymp;
@@ -2109,9 +2111,9 @@ class LinkDotScopeVisitor final : public VNVisitor {
     }
     // For speed, don't recurse things that can't have scope
     // Note we allow AstNodeStmt's as generates may be under them
-    void visit(AstCell*) override {}
-    void visit(AstVar*) override {}
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+    void visit(AstCell*) override {}  // ScopeVisitor::
+    void visit(AstVar*) override {}  // ScopeVisitor::
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }  // ScopeVisitor::
 
 public:
     // CONSTRUCTORS
@@ -2132,7 +2134,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
     VSymEnt* m_curSymp;  // Symbol Entry for current table, where to lookup/insert
 
     // VISITORS
-    void visit(AstModport* nodep) override {
+    void visit(AstModport* nodep) override {  // IfaceVisitor::
         // Modport: Remember its name for later resolution
         UINFO(5, "   fiv: " << nodep << endl);
         VL_RESTORER(m_curSymp);
@@ -2143,7 +2145,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
             iterateChildren(nodep);
         }
     }
-    void visit(AstModportFTaskRef* nodep) override {
+    void visit(AstModportFTaskRef* nodep) override {  // IfaceVisitor::
         UINFO(5, "   fif: " << nodep << endl);
         iterateChildren(nodep);
         if (nodep->isExport()) nodep->v3warn(E_UNSUPPORTED, "Unsupported: modport export");
@@ -2166,7 +2168,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
-    void visit(AstModportVarRef* nodep) override {
+    void visit(AstModportVarRef* nodep) override {  // IfaceVisitor::
         UINFO(5, "   fiv: " << nodep << endl);
         iterateChildren(nodep);
         VSymEnt* const symp = m_curSymp->findIdFallback(nodep->name());
@@ -2191,7 +2193,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
-    void visit(AstNode* nodep) override { iterateChildren(nodep); }
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }  // IfaceVisitor::
 
 public:
     // CONSTRUCTORS
@@ -4434,39 +4436,33 @@ public:
 //######################################################################
 // Link class functions
 
+void V3LinkDot::dumpSubstep(const string& name) {
+    if (dumpTreeEitherLevel() >= 9) {
+        V3Global::dumpCheckGlobalTree(name);
+    } else if (debug() >= 5) {  // on high dbg level, dump even if not explicitly told to
+        v3Global.rootp()->dumpTreeFile(v3Global.debugFilename(name + ".tree"));
+    }
+}
+
 void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
     VIsCached::clearCacheTree();  // Avoid using any stale isPure
-    if (dumpTreeEitherLevel() >= 9) {
-        V3Global::dumpCheckGlobalTree("prelinkdot");
-    } else if (debug() >= 5) {  // on high dbg level, dump even if not explicitly told to
-        v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot.tree"));
-    }
+    dumpSubstep("prelinkdot");
     LinkDotState state{rootp, step};
-    const LinkDotFindVisitor visitor{rootp, &state};
-    if (dumpTreeEitherLevel() >= 9) {
-        V3Global::dumpCheckGlobalTree("prelinkdot-find");
-    } else if (debug() >= 5) {
-        v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-find.tree"));
-    }
+
+    { LinkDotFindVisitor{rootp, &state}; }
+    dumpSubstep("prelinkdot-find");
+
     if (step == LDS_PRIMARY || step == LDS_PARAMED) {
         // Initial link stage, resolve parameters and interfaces
-        const LinkDotParamVisitor visitors{rootp, &state};
-        if (dumpTreeEitherLevel() >= 9) {
-            V3Global::dumpCheckGlobalTree("prelinkdot-param");
-        } else if (debug() >= 5) {
-            v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-param.tree"));
-        }
+        { LinkDotParamVisitor{rootp, &state}; }
+        dumpSubstep("prelinkdot-param");
     } else if (step == LDS_ARRAYED) {
     } else if (step == LDS_SCOPED) {
         // Well after the initial link when we're ready to operate on the flat design,
         // process AstScope's.  This needs to be separate pass after whole hierarchy graph created.
-        const LinkDotScopeVisitor visitors{rootp, &state};
+        { LinkDotScopeVisitor{rootp, &state}; }
         v3Global.assertScoped(true);
-        if (dumpTreeEitherLevel() >= 9) {
-            V3Global::dumpCheckGlobalTree("prelinkdot-scoped");
-        } else if (debug() >= 5) {
-            v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("prelinkdot-scoped.tree"));
-        }
+        dumpSubstep("prelinkdot-scoped");
     } else {
         v3fatalSrc("Bad case");
     }
diff --git a/src/V3LinkDot.h b/src/V3LinkDot.h
index 943baceda..6af7665ef 100644
--- a/src/V3LinkDot.h
+++ b/src/V3LinkDot.h
@@ -28,6 +28,7 @@
 enum VLinkDotStep : uint8_t { LDS_PRIMARY, LDS_PARAMED, LDS_ARRAYED, LDS_SCOPED };
 
 class V3LinkDot final {
+    static void dumpSubstep(const string& name) VL_MT_DISABLED;
     static void linkDotGuts(AstNetlist* rootp, VLinkDotStep step) VL_MT_DISABLED;
 
 public:

From f983ce4875272d4a4997659cfb4741e80c2b62cb Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 27 Apr 2025 22:11:28 -0400
Subject: [PATCH 004/211] Internals: Defer DTypeRef versus IfaceDTypeRef
 determination into V3LinkDot, in preparation for future parser

---
 src/V3LinkCells.cpp                        |  16 +--
 src/V3LinkDot.cpp                          | 121 +++++++++++++++++++--
 src/verilog.y                              |   6 +-
 test_regress/t/t_interface_missing_bad.out |  10 +-
 test_regress/t/t_interface_param_genblk.v  |   2 +-
 5 files changed, 132 insertions(+), 23 deletions(-)

diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 3542be191..f1cf0deb3 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -131,11 +131,7 @@ class LinkCellsVisitor final : public VNVisitor {
 
     AstNodeModule* findModuleSym(const string& modName) {
         const VSymEnt* const foundp = m_mods.rootp()->findIdFallback(modName);
-        if (!foundp) {
-            return nullptr;
-        } else {
-            return VN_AS(foundp->nodep(), NodeModule);
-        }
+        return foundp ? VN_AS(foundp->nodep(), NodeModule) : nullptr;
     }
 
     AstNodeModule* resolveModule(AstNode* nodep, const string& modName) {
@@ -534,8 +530,14 @@ class LinkCellsVisitor final : public VNVisitor {
             if (pinp->name() == "") pinp->name("__paramNumber" + cvtToStr(pinp->pinNum()));
         }
         if (m_varp) {  // Parser didn't know what was interface, resolve now
-            const AstNodeModule* const varModp = findModuleSym(nodep->name());
-            if (VN_IS(varModp, Iface)) m_varp->setIfaceRef();
+            AstNodeModule* const varModp = findModuleSym(nodep->name());
+            if (AstIface* const ifacep = VN_CAST(varModp, Iface)) {
+                // Might be an interface, but might also not really be due to interface being
+                // hidden by another declaration.  Assume it is relevant and order as-if.
+                // This is safe because an interface cannot instantiate a module, so false
+                // module->interface edges are harmless.
+                newEdge(vertex(m_modp), vertex(ifacep), 1, false);
+            }
         }
     }
     void visit(AstClassOrPackageRef* nodep) override {
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index ba749b975..683bc3a50 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -154,6 +154,7 @@ private:
 
     // MEMBERS
     VSymGraph m_syms;  // Symbol table by hierarchy
+    VSymGraph m_mods;  // Symbol table of all module names
     VSymEnt* m_dunitEntp = nullptr;  // $unit entry
     std::multimap<std::string, VSymEnt*>
         m_nameScopeSymMap;  // Map of scope referenced by non-pretty textual name
@@ -209,10 +210,12 @@ public:
     // CONSTRUCTORS
     LinkDotState(AstNetlist* rootp, VLinkDotStep step)
         : m_syms{rootp}
+        , m_mods{rootp}
         , m_step(step) {
         UINFO(4, __FUNCTION__ << ": " << endl);
         s_errorThisp = this;
         V3Error::errorExitCb(preErrorDumpHandler);  // If get error, dump self
+        readModNames();
     }
     ~LinkDotState() {
         V3Error::errorExitCb(nullptr);
@@ -262,6 +265,18 @@ public:
         }
     }
 
+    AstNodeModule* findModuleSym(const string& modName) {
+        const VSymEnt* const foundp = m_mods.rootp()->findIdFallback(modName);
+        return foundp ? VN_AS(foundp->nodep(), NodeModule) : nullptr;
+    }
+    void readModNames() {
+        // Look at all modules, and store pointers to all module names
+        for (AstNodeModule *nextp, *nodep = v3Global.rootp()->modulesp(); nodep; nodep = nextp) {
+            nextp = VN_AS(nodep->nextp(), NodeModule);
+            m_mods.rootp()->insert(nodep->name(), new VSymEnt{&m_mods, nodep});
+        }
+    }
+
     VSymEnt* rootEntp() const { return m_syms.rootp(); }
     VSymEnt* dunitEntp() const { return m_dunitEntp; }
     void checkDuplicate(VSymEnt* lookupSymp, AstNode* nodep, const string& name) {
@@ -427,7 +442,7 @@ public:
         abovep->reinsert(name, symp);
         return symp;
     }
-    static bool existsModScope(AstNodeModule* nodep) { return nodep->user1p() != nullptr; }
+    static bool existsNodeSym(AstNode* nodep) { return nodep->user1p() != nullptr; }
     static VSymEnt* getNodeSym(AstNode* nodep) {
         // Don't use this in ResolveVisitor, as we need to pick up the proper
         // reference under each SCOPE
@@ -1114,6 +1129,10 @@ class LinkDotFindVisitor final : public VNVisitor {
         nodep->user1p(m_curSymp);
         iterateChildren(nodep);
     }
+    void visit(AstRefDType* nodep) override {  // FindVisitor::
+        nodep->user1p(m_curSymp);
+        iterateChildren(nodep);
+    }
     void visit(AstNodeBlock* nodep) override {  // FindVisitor::
         UINFO(5, "   " << nodep << endl);
         if (nodep->name() == "" && nodep->unnamed()) {
@@ -1494,8 +1513,7 @@ class LinkDotFindVisitor final : public VNVisitor {
                         }
                     }
                 }
-                VSymEnt* const insp
-                    = m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
+                m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
                 if (m_statep->forPrimary() && nodep->isGParam()) {
                     ++m_paramNum;
                     VSymEnt* const symp
@@ -1503,13 +1521,6 @@ class LinkDotFindVisitor final : public VNVisitor {
                                               nodep, m_classOrPackagep);
                     symp->exported(false);
                 }
-                AstIfaceRefDType* const ifacerefp
-                    = LinkDotState::ifaceRefFromArray(nodep->subDTypep());
-                if (ifacerefp) {
-                    // Can't resolve until interfaces and modport names are
-                    // known; see notes at top
-                    m_statep->insertIfaceVarSym(insp);
-                }
             }
         }
     }
@@ -1758,9 +1769,94 @@ public:
 
 //======================================================================
 
+class LinkDotFindIfaceVisitor final : public VNVisitor {
+    // NODE STATE
+    //  *::user1p()             -> See LinkDotState
+
+    // STATE - for current visit position (use VL_RESTORER)
+    LinkDotState* const m_statep;  // State to pass between visitors, including symbol table
+    AstNode* m_declp = nullptr;  // Current declaring object that may soon contain IfaceRefDType
+
+    // METHODS
+    const VSymEnt* findNonDeclSym(VSymEnt* symp, const string& name) {
+        // Find if there is a symbol of given name, ignoring the node that is declaring
+        // it (m_declp) itself.  Thus if searching for "ifc" (an interface):
+        //
+        // module x;  // Finishes here and finds the typedef
+        //   typedef foo ifc;
+        //   ifc ifc;   // symp starts pointing here, but matches m_declp
+        while (symp) {
+            const VSymEnt* const foundp = symp->findIdFlat(name);
+            if (foundp && foundp->nodep() != m_declp) return foundp;
+            symp = symp->fallbackp();
+        }
+        return nullptr;
+    }
+
+    // VISITORS
+    void visit(AstRefDType* nodep) override {  // FindIfaceVisitor::
+        if (m_statep->forPrimary() && !nodep->classOrPackagep()) {
+            UINFO(9, "  FindIfc: " << nodep << endl);
+            // If under a var, ignore the var itself as might be e.g. "intf intf;"
+            // Critical tests:
+            //   t_interface_param_genblk.v  // Checks this does make interface
+            //   t_interface_hidden.v  // Checks this doesn't making interface when hidden
+            if (m_statep->existsNodeSym(nodep)) {
+                VSymEnt* symp = m_statep->getNodeSym(nodep);
+                const VSymEnt* foundp = findNonDeclSym(symp, nodep->name());
+                AstNode* foundNodep = nullptr;
+                // This: v4make test_regress/t/t_interface_param_genblk.py --debug
+                // --debugi-V3LinkDot 9 Passes with this commented out:
+                if (foundp) foundNodep = foundp->nodep();
+                if (!foundNodep) foundNodep = m_statep->findModuleSym(nodep->name());
+                if (foundNodep) UINFO(9, "    Ifc foundNodep " << foundNodep << endl);
+                if (AstIface* const defp = VN_CAST(foundNodep, Iface)) {
+                    // Must be found as module name, and not hidden/ by normal symbol (foundp)
+                    AstIfaceRefDType* const newp
+                        = new AstIfaceRefDType{nodep->fileline(), "", nodep->name()};
+                    if (nodep->paramsp())
+                        newp->addParamsp(nodep->paramsp()->unlinkFrBackWithNext());
+                    newp->ifacep(defp);
+                    newp->user1u(nodep->user1u());
+                    UINFO(9, "    Resolved interface " << nodep << "  =>  " << defp << endl);
+                    nodep->replaceWith(newp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    return;
+                }
+            }
+        }
+        iterateChildren(nodep);
+    }
+    void visit(AstVar* nodep) override {  // FindVisitor::
+        VL_RESTORER(m_declp);
+        m_declp = nodep;
+        iterateChildren(nodep);
+        AstIfaceRefDType* const ifacerefp = LinkDotState::ifaceRefFromArray(nodep->subDTypep());
+        if (ifacerefp && m_statep->existsNodeSym(nodep)) {
+            // Can't resolve until interfaces and modport names are
+            // known; see notes at top
+            UINFO(9, "  FindIfc Var IfaceRef " << ifacerefp << endl);
+            if (!ifacerefp->isVirtual()) nodep->setIfaceRef();
+            VSymEnt* const symp = m_statep->getNodeSym(nodep);
+            m_statep->insertIfaceVarSym(symp);
+        }
+    }
+    void visit(AstNode* nodep) override { iterateChildren(nodep); }  // FindIfaceVisitor::
+
+public:
+    // CONSTRUCTORS
+    LinkDotFindIfaceVisitor(AstNetlist* rootp, LinkDotState* statep)
+        : m_statep{statep} {
+        UINFO(4, __FUNCTION__ << ": " << endl);
+        iterate(rootp);
+    }
+    ~LinkDotFindIfaceVisitor() override = default;
+};
+
+//======================================================================
+
 class LinkDotParamVisitor final : public VNVisitor {
     // NODE STATE
-    // Cleared on global
     //  *::user1p()             -> See LinkDotState
     //  *::user2p()             -> See LinkDotState
     //  *::user4()              -> See LinkDotState
@@ -4452,6 +4548,9 @@ void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
     { LinkDotFindVisitor{rootp, &state}; }
     dumpSubstep("prelinkdot-find");
 
+    { LinkDotFindIfaceVisitor{rootp, &state}; }
+    dumpSubstep("prelinkdot-findiface");
+
     if (step == LDS_PRIMARY || step == LDS_PARAMED) {
         // Initial link stage, resolve parameters and interfaces
         { LinkDotParamVisitor{rootp, &state}; }
diff --git a/src/verilog.y b/src/verilog.y
index caed8eeb2..455f90916 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1554,8 +1554,10 @@ port<nodep>:                    // ==IEEE: port
                 portDirNetE id/*interface*/ portSig variable_dimensionListE sigAttrListE
                         { // VAR for now, but V3LinkCells may call setIfcaeRef on it later
                           $$ = $3; VARDECL(VAR); VARIO(NONE);
-                          AstNodeDType* const dtp = new AstIfaceRefDType{$<fl>2, "", *$2};
-                          VARDTYPE(dtp); VARIOANSI();
+                          // Although know it's an interface, use AstRefDType for forward compatibility
+                          // with future parser.  V3LinkCells will convert to AstIfaceRefDType.
+                          AstNodeDType* const dtp = new AstRefDType{$<fl>2, *$2};
+                          VARDTYPE(dtp);
                           addNextNull($$, VARDONEP($$, $4, $5)); }
         |       portDirNetE id/*interface*/ '.' idAny/*modport*/ portSig variable_dimensionListE sigAttrListE
                         { // VAR for now, but V3LinkCells may call setIfcaeRef on it later
diff --git a/test_regress/t/t_interface_missing_bad.out b/test_regress/t/t_interface_missing_bad.out
index 0bfc8cedc..01956743a 100644
--- a/test_regress/t/t_interface_missing_bad.out
+++ b/test_regress/t/t_interface_missing_bad.out
@@ -1,11 +1,17 @@
-%Error: t/t_interface_missing_bad.v:14:4: Cannot find file containing interface: 'foo_intf'
+%Error: t/t_interface_missing_bad.v:14:13: Pin is not an in/out/inout/interface: 'foo'
+   14 |    foo_intf foo
+      |             ^~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_interface_missing_bad.v:14:4: Can't find typedef/interface: 'foo_intf'
    14 |    foo_intf foo
       |    ^~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: t/t_interface_missing_bad.v:20:4: Cannot find file containing interface: 'foo_intf'
    20 |    foo_intf the_foo ();
       |    ^~~~~~~~
 %Error: t/t_interface_missing_bad.v:25:15: Found definition of 'the_foo' as a CELL but expected a variable
    25 |         .foo (the_foo)
       |               ^~~~~~~
+%Error: t/t_interface_missing_bad.v:25:10: Instance attempts to connect to 'foo', but it is a variable
+   25 |         .foo (the_foo)
+      |          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_param_genblk.v b/test_regress/t/t_interface_param_genblk.v
index 67092468a..2a84ad5bb 100644
--- a/test_regress/t/t_interface_param_genblk.v
+++ b/test_regress/t/t_interface_param_genblk.v
@@ -25,7 +25,7 @@ module t;
 endmodule
 
 module sub (
-    intf intf
+    intf intf   // Having this named same "intf intf" important for V3LinkDot coverage
 );
 
     if (intf.A == 10) begin

From 50839725367963cedbe62888735a765c26d70568 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 28 Apr 2025 19:34:40 -0400
Subject: [PATCH 005/211] Internals: Defer AstCast into V3LinkDot, in
 preparation for future parser

---
 src/V3Width.cpp                 |  6 ++++++
 src/verilog.y                   |  3 +--
 test_regress/t/t_cast_stream.py | 16 ++++++++++++++++
 test_regress/t/t_cast_stream.v  | 33 +++++++++++++++++++++++++++++++++
 4 files changed, 56 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_cast_stream.py
 create mode 100644 test_regress/t/t_cast_stream.v

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 521f60169..af85e2d28 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2082,6 +2082,12 @@ class WidthVisitor final : public VNVisitor {
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             userIterate(newp, m_vup);
+        } else if (AstNodeDType* const refp = VN_CAST(nodep->dtp(), NodeDType)) {
+            refp->unlinkFrBack();
+            AstNode* const newp = new AstCast{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
+                                              VFlagChildDType{}, refp};
+            nodep->replaceWith(newp);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
         } else {
             nodep->v3warn(E_UNSUPPORTED,
                           "Unsupported: Cast to " << nodep->dtp()->prettyTypeName());
diff --git a/src/verilog.y b/src/verilog.y
index 455f90916..696659c06 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -5150,8 +5150,7 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
         //                      // expanded from simple_type ps_type_identifier (part of simple_type)
         //                      // expanded from simple_type ps_parameter_identifier (part of simple_type)
         |       packageClassScopeE idType yP_TICK '(' expr ')'
-                        { $$ = new AstCast{$3, $5, VFlagChildDType{},
-                                           new AstRefDType{$<fl>2, *$2, $1, nullptr}}; }
+                        { $$ = new AstCastParse{$3, $5, new AstRefDType{$<fl>2, *$2, $1, nullptr}}; }
         //
         |       yTYPE__ETC '(' exprOrDataType ')' yP_TICK '(' expr ')'
                         { $$ = new AstCast{$1, $7, VFlagChildDType{},
diff --git a/test_regress/t/t_cast_stream.py b/test_regress/t/t_cast_stream.py
new file mode 100755
index 000000000..147fe6faf
--- /dev/null
+++ b/test_regress/t/t_cast_stream.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.passes()
diff --git a/test_regress/t/t_cast_stream.v b/test_regress/t/t_cast_stream.v
new file mode 100644
index 000000000..8ed483e0f
--- /dev/null
+++ b/test_regress/t/t_cast_stream.v
@@ -0,0 +1,33 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+typedef enum {
+   UVM_TLM_READ_COMMAND,
+   UVM_TLM_WRITE_COMMAND,
+   UVM_TLM_IGNORE_COMMAND
+} uvm_tlm_command_e;
+
+module t(/*AUTOARG*/);
+
+   initial begin
+      bit array[] = new [8];
+      int unsigned m_length;
+      uvm_tlm_command_e m_command;
+
+      m_length = 2;
+      array = '{0, 0, 0, 0, 0, 0, 1, 0};
+      array = new [$bits(m_length)] (array);
+      m_command = uvm_tlm_command_e'({ << bit { array }});
+
+      `checkh(m_command, 'h40)
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 3658e5f0f135ddabbb7aecf73cd5f274cc8bfc5d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 28 Apr 2025 21:54:58 -0400
Subject: [PATCH 006/211] Internals: Rename widthToFit, no functional change.

---
 src/V3AstNodeExpr.h |  6 +++---
 src/V3Const.cpp     | 18 +++++++++---------
 src/V3EmitCFunc.cpp |  2 +-
 src/V3Number.cpp    |  4 ++--
 src/V3Number.h      |  2 +-
 src/V3Width.cpp     |  2 +-
 6 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index f4109cb73..c5ac75048 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -953,7 +953,7 @@ class AstConst final : public AstNodeExpr {
         } else if (m_num.isString()) {
             dtypeSetString();
         } else {
-            dtypeSetLogicUnsized(m_num.width(), (m_num.sized() ? 0 : m_num.widthMin()),
+            dtypeSetLogicUnsized(m_num.width(), (m_num.sized() ? 0 : m_num.widthToFit()),
                                  VSigning::fromBool(m_num.isSigned()));
         }
         m_num.nodep(this);
@@ -1000,14 +1000,14 @@ public:
         : ASTGEN_SUPER_Const(fl)
         , m_num(this, 32, num) {
         m_num.width(32, false);
-        dtypeSetLogicUnsized(32, m_num.widthMin(), VSigning::UNSIGNED);
+        dtypeSetLogicUnsized(32, m_num.widthToFit(), VSigning::UNSIGNED);
     }
     class Signed32 {};  // for creator type-overload selection
     AstConst(FileLine* fl, Signed32, int32_t num)  // Signed 32-bit integer of specified value
         : ASTGEN_SUPER_Const(fl)
         , m_num(this, 32, num) {
         m_num.width(32, true);
-        dtypeSetLogicUnsized(32, m_num.widthMin(), VSigning::SIGNED);
+        dtypeSetLogicUnsized(32, m_num.widthToFit(), VSigning::SIGNED);
     }
     class Unsized64 {};  // for creator type-overload selection
     AstConst(FileLine* fl, Unsized64, uint64_t num)
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 9bc4c739e..1fef6d4c0 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -317,7 +317,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
                     if (needsMasking) {
                         // Reduce the masked term to the minimum known width,
                         // to use the smallest RedXor formula
-                        const int widthMin = maskNum.widthMin();
+                        const int widthMin = maskNum.widthToFit();
                         resultp->dtypeChgWidth(widthMin, widthMin);
                     }
                     resultp = new AstRedXor{fl, resultp};
@@ -1098,7 +1098,7 @@ class ConstVisitor final : public VNVisitor {
 
         // Compute how many significant bits are in the mask
         const AstConst* const constp = VN_AS(nodep->lhsp(), Const);
-        const uint32_t significantBits = constp->num().widthMin();
+        const uint32_t significantBits = constp->num().widthToFit();
 
         AstOr* const orp = VN_AS(nodep->rhsp(), Or);
 
@@ -3551,13 +3551,13 @@ class ConstVisitor final : public VNVisitor {
     TREEOPA("AstNodeCond{$condp.isNeqZero,    $thenp.castConst, $elsep.castConst}", "replaceWChild(nodep,$thenp)");
     TREEOP ("AstNodeCond{$condp, operandsSame($thenp,,$elsep)}","replaceWChild(nodep,$thenp)");
     // This visit function here must allow for short-circuiting.
-    TREEOPS("AstCond {$condp.isZero}",           "replaceWIteratedThs(nodep)");
-    TREEOPS("AstCond {$condp.isNeqZero}",        "replaceWIteratedRhs(nodep)");
-    TREEOP ("AstCond{$condp.castNot,       $thenp, $elsep}", "AstCond{$condp->castNot()->lhsp(), $elsep, $thenp}");
-    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1,   $thenp.isAllOnes, $elsep}", "AstLogOr {$condp, $elsep}");  // a?1:b == a||b
-    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1,   $thenp,    $elsep.isZero, !$elsep.isClassHandleValue}", "AstLogAnd{$condp, $thenp}");  // a?b:0 == a&&b
-    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1,   $thenp, $elsep.isAllOnes}", "AstLogOr {AstNot{$condp}, $thenp}");  // a?b:1 == ~a||b
-    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1,   $thenp.isZero, !$thenp.isClassHandleValue,   $elsep}", "AstLogAnd{AstNot{$condp}, $elsep}");  // a?0:b == ~a&&b
+    TREEOPS("AstCond{$condp.isZero}",           "replaceWIteratedThs(nodep)");
+    TREEOPS("AstCond{$condp.isNeqZero}",        "replaceWIteratedRhs(nodep)");
+    TREEOP ("AstCond{$condp.castNot, $thenp, $elsep}", "AstCond{$condp->castNot()->lhsp(), $elsep, $thenp}");
+    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1, $thenp.isAllOnes, $elsep}", "AstLogOr {$condp, $elsep}");  // a?1:b == a||b
+    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1, $thenp, $elsep.isZero, !$elsep.isClassHandleValue}", "AstLogAnd{$condp, $thenp}");  // a?b:0 == a&&b
+    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1, $thenp, $elsep.isAllOnes}", "AstLogOr {AstNot{$condp}, $thenp}");  // a?b:1 == ~a||b
+    TREEOP ("AstNodeCond{$condp.width1, $thenp.width1, $thenp.isZero, !$thenp.isClassHandleValue, $elsep}", "AstLogAnd{AstNot{$condp}, $elsep}");  // a?0:b == ~a&&b
     TREEOP ("AstNodeCond{!$condp.width1, operandBoolShift(nodep->condp())}", "replaceBoolShift(nodep->condp())");
     // Prefer constants on left, since that often needs a shift, it lets
     // constant red remove the shift
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 02ee7d1d5..132fd408b 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -495,7 +495,7 @@ void EmitCFunc::emitConstant(AstConst* nodep, AstVarRef* assigntop, const string
     } else if (nodep->num().isString()) {
         emitConstantString(nodep);
     } else if (nodep->isWide()) {
-        int upWidth = nodep->num().widthMin();
+        int upWidth = nodep->num().widthToFit();
         int chunks = 0;
         if (upWidth > EMITC_NUM_CONSTW * VL_EDATASIZE) {
             // Output e.g. 8 words in groups of e.g. 8
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index cb5fc9bd4..a324e0644 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -372,7 +372,7 @@ void V3Number::create(const char* sourcep) {
 
     // If was unsized, trim width per IEEE 1800-2023 5.7.1
     if (!userSized && !m_data.m_autoExtend) {
-        width(std::max(32, base_align * ((widthMin() + base_align - 1) / base_align)), false);
+        width(std::max(32, base_align * ((widthToFit() + base_align - 1) / base_align)), false);
     }
 
     // Z or X extend specific width values.  Spec says we don't 1 extend.
@@ -1131,7 +1131,7 @@ int V3Number::countZ(int lsb, int nbits) const VL_MT_SAFE {
     return count;
 }
 
-int V3Number::widthMin() const {
+int V3Number::widthToFit() const {
     for (int bit = width() - 1; bit > 0; bit--) {
         if (!bitIs0(bit)) return bit + 1;
     }
diff --git a/src/V3Number.h b/src/V3Number.h
index a18c59f81..806af9ab3 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -584,7 +584,7 @@ public:
     string displayed(AstNode* nodep, const string& vformat) const VL_MT_STABLE;
     static bool displayedFmtLegal(char format, bool isScan);  // Is this a valid format letter?
     int width() const VL_MT_SAFE { return m_data.width(); }
-    int widthMin() const;  // Minimum width that can represent this number (~== log2(num)+1)
+    int widthToFit() const;  // Minimum width that can represent this number (~== log2(num)+1)
     bool sized() const VL_MT_SAFE { return m_data.m_sized; }
     bool autoExtend() const VL_MT_SAFE { return m_data.m_autoExtend; }
     bool isFromString() const { return m_data.m_fromString; }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index af85e2d28..cea0cb007 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1325,7 +1325,7 @@ class WidthVisitor final : public VNVisitor {
             } else if (nodep->num().sized()) {
                 nodep->dtypeChgWidth(nodep->num().width(), nodep->num().width());
             } else {
-                nodep->dtypeChgWidth(nodep->num().width(), nodep->num().widthMin());
+                nodep->dtypeChgWidth(nodep->num().width(), nodep->num().widthToFit());
             }
         }
         // We don't size the constant until we commit the widths, as need parameters

From 8da539ed8a261a34b744018d8eda6055f91a3e68 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 28 Apr 2025 22:22:50 -0400
Subject: [PATCH 007/211] Fix sign extension of signed compared with unsigned
 case items (#5968).

---
 Changes                         |  2 ++
 src/V3Width.cpp                 |  2 +-
 test_regress/t/t_math_signed3.v | 38 +++++++++++++++++++++++++++++----
 3 files changed, 37 insertions(+), 5 deletions(-)

diff --git a/Changes b/Changes
index 69deeb0ef..22cb7979c 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,8 @@ Verilator 5.037 devel
 
 **Other:**
 
+* Fix sign extension of signed compared with unsigned case items (#5968).
+
 
 Verilator 5.036 2025-04-27
 ==========================
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index cea0cb007..1f5f5ae18 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5076,7 +5076,7 @@ class WidthVisitor final : public VNVisitor {
         }
         // Apply width
         iterateCheck(nodep, "Case expression", nodep->exprp(), CONTEXT_DET, FINAL, subDTypep,
-                     EXTEND_LHS);
+                     EXTEND_EXP);
         for (AstCaseItem* itemp = nodep->itemsp(); itemp;
              itemp = VN_AS(itemp->nextp(), CaseItem)) {
             for (AstNode *nextcp, *condp = itemp->condsp(); condp; condp = nextcp) {
diff --git a/test_regress/t/t_math_signed3.v b/test_regress/t/t_math_signed3.v
index 03b20e753..24970ac5e 100644
--- a/test_regress/t/t_math_signed3.v
+++ b/test_regress/t/t_math_signed3.v
@@ -48,7 +48,13 @@ module t (/*AUTOARG*/);
    wire [5:0]        cond_b = 1'b0 ? 3'sb111 : 5'sb11111;
    initial `checkh(cond_b, 6'b111111);
 
+   bit cmp;
+
    initial begin
+`ifndef VERILATOR
+      #1;
+`endif
+
       // verilator lint_on WIDTH
       `checkh(bug729_yuu, 1'b0);
       `checkh(bug729_ysu, 1'b0);
@@ -81,13 +87,37 @@ module t (/*AUTOARG*/);
       bug349_s = 4'sb1111 - 5'b00001;
       `checkh(bug349_s,33'he);
 
+      cmp = 3'sb111 == 4'b111;
+      `checkh(cmp, 1);
+      cmp = 3'sb111 == 4'sb111;
+      `checkh(cmp, 0);
+      cmp = 3'sb111 != 4'b111;
+      `checkh(cmp, 0);
+      cmp = 3'sb111 != 4'sb111;
+      `checkh(cmp, 1);
+
+      cmp = 3'sb111 === 4'b111;
+      `checkh(cmp, 1);
+      cmp = 3'sb111 === 4'sb111;
+      `checkh(cmp, 0);
+
       case (2'sb11)
-        4'b1111: ;
+        4'b1111: $stop;
+        default: ;
+      endcase
+
+      case (sb11)
+        4'b1111: $stop;
+        default: ;
+      endcase
+
+      case (2'sb11)
+        4'sb1111: ;
         default: $stop;
       endcase
 
       case (sb11)
-        4'b1111: ;
+        4'sb1111: ;
         default: $stop;
       endcase
 
@@ -96,7 +126,7 @@ module t (/*AUTOARG*/);
    end
 endmodule
 
-module sub (input [3:0] a,
-            output [3:0] z);
+module sub(input [3:0] a,
+           output [3:0] z);
    assign z = a;
 endmodule

From 9b3fccdcb79e27c9fbabec79584d629212e6dbef Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 29 Apr 2025 18:18:54 -0400
Subject: [PATCH 008/211] Add BADVLTPRAGMA on unknown Verilator pragmas
 (#5945).

---
 Changes                               |  1 +
 docs/guide/warnings.rst               | 10 ++++++++++
 src/V3Error.h                         | 11 ++++++-----
 src/V3ParseImp.cpp                    |  2 +-
 test_regress/t/t_flag_future_bad.out  |  5 +++--
 test_regress/t/t_pp_underline_bad.out |  3 ++-
 6 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/Changes b/Changes
index 22cb7979c..acda7d5ef 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.037 devel
 
 **Other:**
 
+* Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Fix sign extension of signed compared with unsigned case items (#5968).
 
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 119957f0c..bf015760f 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -167,6 +167,16 @@ List Of Warnings
    'pragma protect'.  Third-party pragmas not defined by IEEE 1800-2023 are
    ignored.
 
+   This error may be disabled with a lint_off BADSTDPRAGMA metacomment.
+
+
+.. option:: BADVLTPRAGMA
+
+   An error that a `/*verilator ...*/` metacomment pragma is badly formed
+   or not understood.
+
+   This error may be disabled with a lint_off BADVLTPRAGMA metacomment.
+
 
 .. option:: BLKANDNBLK
 
diff --git a/src/V3Error.h b/src/V3Error.h
index 988fbb775..e051147e8 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -72,6 +72,7 @@ public:
         ASSIGNDLY,      // Assignment delays
         ASSIGNIN,       // Assigning to input
         BADSTDPRAGMA,   // Any error related to pragmas
+        BADVLTPRAGMA,   // Unknown Verilator pragma
         BLKANDNBLK,     // Blocked and non-blocking assignments to same variable
         BLKLOOPINIT,    // Delayed assignment to array inside for loops
         BLKSEQ,         // Blocking assignments in sequential block
@@ -193,7 +194,7 @@ public:
             "LIFETIME", "NEEDTIMINGOPT", "NOTIMING", "PORTSHORT", "TASKNSVAR", "UNSUPPORTED",
             // Warnings
             " EC_FIRST_WARN",
-            "ALWCOMBORDER", "ASCRANGE", "ASSIGNDLY", "ASSIGNIN", "BADSTDPRAGMA",
+            "ALWCOMBORDER", "ASCRANGE", "ASSIGNDLY", "ASSIGNIN", "BADSTDPRAGMA", "BADVLTPRAGMA",
             "BLKANDNBLK", "BLKLOOPINIT", "BLKSEQ", "BSSPACE",
             "CASEINCOMPLETE", "CASEOVERLAP", "CASEWITHX", "CASEX", "CASTCONST", "CDCRSTLOGIC", "CLKDATA",
             "CMPCONST", "COLONPLUS", "COMBDLY", "CONSTRAINTIGN", "CONTASSREG", "COVERIGN",
@@ -232,10 +233,10 @@ public:
     // Warnings we'll present to the user as errors
     // Later -Werror- options may make more of these.
     bool pretendError() const VL_MT_SAFE {
-        return (m_e == ASSIGNIN || m_e == BADSTDPRAGMA || m_e == BLKANDNBLK || m_e == BLKLOOPINIT
-                || m_e == CONTASSREG || m_e == ENCAPSULATED || m_e == ENDLABEL || m_e == ENUMVALUE
-                || m_e == IMPURE || m_e == PINNOTFOUND || m_e == PKGNODECL || m_e == PROCASSWIRE
-                || m_e == ZEROREPL  // Says IEEE
+        return (m_e == ASSIGNIN || m_e == BADSTDPRAGMA || m_e == BADVLTPRAGMA || m_e == BLKANDNBLK
+                || m_e == BLKLOOPINIT || m_e == CONTASSREG || m_e == ENCAPSULATED
+                || m_e == ENDLABEL || m_e == ENUMVALUE || m_e == IMPURE || m_e == PINNOTFOUND
+                || m_e == PKGNODECL || m_e == PROCASSWIRE || m_e == ZEROREPL  // Says IEEE
         );
     }
     // Warnings to mention manual
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index b2126e631..d1686aaf9 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -196,7 +196,7 @@ void V3ParseImp::lexVerilatorCmtBad(FileLine* fl, const char* textp) {
     string cmtname;
     for (int i = 0; std::isalnum(cmtparse[i]); i++) cmtname += cmtparse[i];
     if (!v3Global.opt.isFuture(cmtname)) {
-        fl->v3error("Unknown verilator comment: '" << textp << "'");
+        fl->v3warn(BADVLTPRAGMA, "Unknown verilator comment: '" << textp << "'");
     }
 }
 
diff --git a/test_regress/t/t_flag_future_bad.out b/test_regress/t/t_flag_future_bad.out
index 67a863bd5..d89fcbc03 100644
--- a/test_regress/t/t_flag_future_bad.out
+++ b/test_regress/t/t_flag_future_bad.out
@@ -2,10 +2,11 @@
     8 |       /*verilator lint_off FUTURE1*/ 
       |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_flag_future.v:11:7: Unknown verilator comment: '/*verilator FUTURE2*/'
+%Error-BADVLTPRAGMA: t/t_flag_future.v:11:7: Unknown verilator comment: '/*verilator FUTURE2*/'
    11 |       /*verilator FUTURE2*/ 
       |       ^~~~~~~~~~~~~~~~~~~~~
-%Error: t/t_flag_future.v:12:7: Unknown verilator comment: '/*verilator FUTURE2 blah blah*/'
+                     ... For error description see https://verilator.org/warn/BADVLTPRAGMA?v=latest
+%Error-BADVLTPRAGMA: t/t_flag_future.v:12:7: Unknown verilator comment: '/*verilator FUTURE2 blah blah*/'
    12 |       /*verilator FUTURE2 blah blah*/ 
       |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_underline_bad.out b/test_regress/t/t_pp_underline_bad.out
index 257122558..c6cf038e0 100644
--- a/test_regress/t/t_pp_underline_bad.out
+++ b/test_regress/t/t_pp_underline_bad.out
@@ -5,7 +5,8 @@
 %Error: t/t_pp_underline_bad.v:10:19: Extra underscore in meta-comment; use /*synopsys {...}*/ not /*synopsys_{...}*/
    10 |       case (1'b1) // synopsys_full_case
       |                   ^~~~~~~~~~~~~~~~~~~~~
-%Error: t/t_pp_underline_bad.v:8:4: Unknown verilator comment: '/*verilator _no_inline_module*/'
+%Error-BADVLTPRAGMA: t/t_pp_underline_bad.v:8:4: Unknown verilator comment: '/*verilator _no_inline_module*/'
     8 |    /*verilator _no_inline_module*/ 
       |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+                     ... For error description see https://verilator.org/warn/BADVLTPRAGMA?v=latest
 %Error: Exiting due to

From 7d4d618d98f7e7acfe44cdffe35133b1c98205b7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 29 Apr 2025 19:23:08 -0400
Subject: [PATCH 009/211] Test: display fix

---
 test_regress/t/t_udp_sequential.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test_regress/t/t_udp_sequential.v b/test_regress/t/t_udp_sequential.v
index f8758e8e0..a3cfa33ac 100644
--- a/test_regress/t/t_udp_sequential.v
+++ b/test_regress/t/t_udp_sequential.v
@@ -48,7 +48,7 @@ module t (/*AUTOARG*/
         if (q != 1) $stop;
      end
      else if (cycle==5) begin
-        $display("d = %d clk = %d cycle = %d", d, clk, cycle);
+        $display("d=%d clk=%d cycle=%0d", d, clk, cycle);
         if (q != 1) $stop;
      end
      else if (cycle==6) begin

From d3016b62f5b635b7f1875430d8f6d89d9d24fe94 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 29 Apr 2025 19:23:35 -0400
Subject: [PATCH 010/211] Internals: Constructor cleanup. No functional change.

---
 src/V3AstNodeExpr.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index c5ac75048..111edca1e 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -987,7 +987,7 @@ public:
     class VerilogStringLiteral {};  // for creator type-overload selection
     AstConst(FileLine* fl, VerilogStringLiteral, const string& str)
         : ASTGEN_SUPER_Const(fl)
-        , m_num(V3Number::VerilogStringLiteral{}, this, str) {
+        , m_num{V3Number::VerilogStringLiteral{}, this, str} {
         initWithNumber();
     }
     AstConst(FileLine* fl, uint32_t num)
@@ -1033,7 +1033,7 @@ public:
     class String {};  // for creator type-overload selection
     AstConst(FileLine* fl, String, const string& num)
         : ASTGEN_SUPER_Const(fl)
-        , m_num(V3Number::String{}, this, num) {
+        , m_num{V3Number::String{}, this, num} {
         dtypeSetString();
     }
     class BitFalse {};
@@ -1066,14 +1066,14 @@ public:
     class Null {};
     AstConst(FileLine* fl, Null)
         : ASTGEN_SUPER_Const(fl)
-        , m_num(V3Number::Null{}, this) {
+        , m_num{V3Number::Null{}, this} {
         dtypeSetBit();  // Events 1 bit, objects 64 bits, so autoExtend=1 and use bit here
         initWithNumber();
     }
     class OneStep {};
     AstConst(FileLine* fl, OneStep)
         : ASTGEN_SUPER_Const(fl)
-        , m_num(V3Number::OneStep{}, this) {
+        , m_num{V3Number::OneStep{}, this} {
         dtypeSetLogicSized(64, VSigning::UNSIGNED);
         initWithNumber();
     }

From 5ca62de1673935e367d476ab8eea39eb3606bdd3 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 29 Apr 2025 19:27:38 -0400
Subject: [PATCH 011/211] Fix filename backslash escapes in C code (#5947).

---
 Changes                             |  1 +
 src/V3EmitXml.cpp                   |  4 ++--
 src/V3FileLine.h                    |  2 ++
 src/V3PreLex.l                      |  2 +-
 src/V3String.cpp                    |  2 +-
 src/V3String.h                      |  6 +++---
 src/V3Task.cpp                      |  4 ++--
 src/V3Timing.cpp                    |  2 +-
 src/V3Waiver.cpp                    |  4 ++--
 test_regress/t/t_pp_line.out        | 20 ++++++++++++--------
 test_regress/t/t_pp_line.v          | 10 ++++++----
 test_regress/t/t_stop_winos_bad.out |  4 ++++
 test_regress/t/t_stop_winos_bad.py  | 18 ++++++++++++++++++
 test_regress/t/t_stop_winos_bad.v   | 17 +++++++++++++++++
 14 files changed, 72 insertions(+), 24 deletions(-)
 create mode 100644 test_regress/t/t_stop_winos_bad.out
 create mode 100755 test_regress/t/t_stop_winos_bad.py
 create mode 100644 test_regress/t/t_stop_winos_bad.v

diff --git a/Changes b/Changes
index acda7d5ef..eba22c063 100644
--- a/Changes
+++ b/Changes
@@ -14,6 +14,7 @@ Verilator 5.037 devel
 **Other:**
 
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
+* Fix filename backslash escapes in C code (#5947).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 
 
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 52cf00368..332ca6f06 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -355,8 +355,8 @@ public:
         // Xml output
         m_os << "<module_files>\n";
         for (const FileLine* ifp : m_nodeModules) {
-            m_os << "<file id=\"" << ifp->filenameLetters() << "\" filename=\"" << ifp->filename()
-                 << "\" language=\"" << ifp->language().ascii() << "\"/>\n";
+            m_os << "<file id=\"" << ifp->filenameLetters() << "\" filename=\""
+                 << ifp->filenameEsc() << "\" language=\"" << ifp->language().ascii() << "\"/>\n";
         }
         m_os << "</module_files>\n";
     }
diff --git a/src/V3FileLine.h b/src/V3FileLine.h
index 13bbb8472..fe3a6d986 100644
--- a/src/V3FileLine.h
+++ b/src/V3FileLine.h
@@ -268,6 +268,8 @@ public:
     string asciiLineCol() const;
     int filenameno() const VL_MT_SAFE { return m_filenameno; }
     string filename() const VL_MT_SAFE { return singleton().numberToName(filenameno()); }
+    // Filename with C string escapes
+    string filenameEsc() const VL_MT_SAFE { return VString::quoteBackslash(filename()); }
     bool filenameIsGlobal() const VL_MT_SAFE {
         return (filename() == commandLineFilename() || filename() == builtInFilename());
     }
diff --git a/src/V3PreLex.l b/src/V3PreLex.l
index 7f71af112..eaa899ea3 100644
--- a/src/V3PreLex.l
+++ b/src/V3PreLex.l
@@ -237,7 +237,7 @@ bom             [\357\273\277]
                           return VP_TEXT; }
 <INITIAL,STRIFY>"`__FILE__"     { FL_FWDC;
                           static string rtnfile;
-                          rtnfile = '"'; rtnfile += LEXP->curFilelinep()->filename();
+                          rtnfile = '"'; rtnfile += LEXP->curFilelinep()->filenameEsc();
                           rtnfile += '"'; yytext = (char*)rtnfile.c_str(); yyleng = rtnfile.length();
                           return VP_STRING; }
 <INITIAL,STRIFY>"`__LINE__"     { FL_FWDC;
diff --git a/src/V3String.cpp b/src/V3String.cpp
index fc8c35e2c..05405037b 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -91,7 +91,7 @@ string VString::upcase(const string& str) VL_PURE {
     return result;
 }
 
-string VString::quoteAny(const string& str, char tgt, char esc) {
+string VString::quoteAny(const string& str, char tgt, char esc) VL_PURE {
     string result;
     for (const char c : str) {
         if (c == tgt) result += esc;
diff --git a/src/V3String.h b/src/V3String.h
index 8e1e97b3e..1c70ec96e 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -94,11 +94,11 @@ public:
     // Convert string to upper case (toupper)
     static string upcase(const string& str) VL_PURE;
     // Insert esc just before tgt
-    static string quoteAny(const string& str, char tgt, char esc);
+    static string quoteAny(const string& str, char tgt, char esc) VL_PURE;
     // Replace any \'s with \\  (two consecutive backslashes)
-    static string quoteBackslash(const string& str) { return quoteAny(str, '\\', '\\'); }
+    static string quoteBackslash(const string& str) VL_PURE { return quoteAny(str, '\\', '\\'); }
     // Replace any %'s with %%
-    static string quotePercent(const string& str) { return quoteAny(str, '%', '%'); }
+    static string quotePercent(const string& str) VL_PURE { return quoteAny(str, '%', '%'); }
     // Replace any %%'s with %
     static string dequotePercent(const string& str);
     // Surround a raw string by double quote and escape if necessary
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 14cf382bc..1cfe49025 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -685,8 +685,8 @@ class TaskVisitor final : public VNVisitor {
             UASSERT_OBJ(snp, refp, "Missing scoping context");
             ccallp->addArgsp(snp);
             // __Vfilenamep
-            ccallp->addArgsp(new AstCExpr{refp->fileline(),
-                                          "\"" + refp->fileline()->filename() + "\"", 64, true});
+            ccallp->addArgsp(new AstCExpr{
+                refp->fileline(), "\"" + refp->fileline()->filenameEsc() + "\"", 64, true});
             // __Vlineno
             ccallp->addArgsp(new AstConst(refp->fileline(), refp->fileline()->lineno()));
         }
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 09092095b..0d6be45b7 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -654,7 +654,7 @@ class TimingControlVisitor final : public VNVisitor {
     void addDebugInfo(AstCMethodHard* const methodp) const {
         if (v3Global.opt.protectIds()) return;
         FileLine* const flp = methodp->fileline();
-        AstCExpr* const ap = new AstCExpr{flp, '"' + flp->filename() + '"', 0};
+        AstCExpr* const ap = new AstCExpr{flp, '"' + flp->filenameEsc() + '"', 0};
         ap->dtypeSetString();
         methodp->addPinsp(ap);
         AstCExpr* const bp = new AstCExpr{flp, cvtToStr(flp->lineno()), 0};
diff --git a/src/V3Waiver.cpp b/src/V3Waiver.cpp
index 8578133ad..41ef8c44b 100644
--- a/src/V3Waiver.cpp
+++ b/src/V3Waiver.cpp
@@ -70,8 +70,8 @@ void V3Waiver::addEntry(V3ErrorCode errorCode, const std::string& filename, cons
     }
 
     std::stringstream entry;
-    entry << "lint_off -rule " << errorCode.ascii() << " -file \"*" << filename << "\" -match \""
-          << trimmsg << "\"";
+    entry << "lint_off -rule " << errorCode.ascii() << " -file \"*"
+          << VString::quoteBackslash(filename) << "\" -match \"" << trimmsg << "\"";
     s_waiverList.push_back(entry.str());
 }
 
diff --git a/test_regress/t/t_pp_line.out b/test_regress/t/t_pp_line.out
index a3e32422f..5dd46780a 100644
--- a/test_regress/t/t_pp_line.out
+++ b/test_regress/t/t_pp_line.out
@@ -1,16 +1,20 @@
--Info: some file:100:1: aaaaaaaa
+-Info: some file:100:1: aaaaaaaa file='some file'
                       : ... note: In instance 't'
-  100 | $info("aaaaaaaa");
+  100 | $info("aaaaaaaa file='%s'", "some file");
       | ^~~~~
--Info: some file:101:1: bbbbbbbb
+-Info: some file:101:1: bbbbbbbb file='some file'
                       : ... note: In instance 't'
-  101 | $info("bbbbbbbb");
+  101 | $info("bbbbbbbb file='%s'", "some file");
       | ^~~~~
--Info: somefile.v:200:1: cccccccc
+-Info: somefile.v:200:1: cccccccc file='somefile.v'
                        : ... note: In instance 't'
-  200 | $info("cccccccc");
+  200 | $info("cccccccc file='%s'", "somefile.v");
       | ^~~~~
--Info: /a/somefile.v:300:1: dddddddd
+-Info: /a/somefile.v:300:1: dddddddd file='/a/somefile.v'
                           : ... note: In instance 't'
-  300 | $info("dddddddd");
+  300 | $info("dddddddd file='%s'", "/a/somefile.v");
+      | ^~~~~
+-Info: C:\a\somefile.v:400:1: eeeeeeee file='C:\a\somefile.v'
+                            : ... note: In instance 't'
+  400 | $info("eeeeeeee file='%s'", "C:\\a\\somefile.v");
       | ^~~~~
diff --git a/test_regress/t/t_pp_line.v b/test_regress/t/t_pp_line.v
index ac991e550..efc22d470 100644
--- a/test_regress/t/t_pp_line.v
+++ b/test_regress/t/t_pp_line.v
@@ -6,10 +6,12 @@
 
 module t;
 `line 100 "some file" 0
-$info("aaaaaaaa");
-$info("bbbbbbbb");
+$info("aaaaaaaa file='%s'", `__FILE__);
+$info("bbbbbbbb file='%s'", `__FILE__);
 `line 200 "somefile.v" 0
-$info("cccccccc");
+$info("cccccccc file='%s'", `__FILE__);
 `line 300 "/a/somefile.v" 0
-$info("dddddddd");
+$info("dddddddd file='%s'", `__FILE__);
+`line 400 "C:\\a\\somefile.v" 0
+$info("eeeeeeee file='%s'", `__FILE__);
 endmodule
diff --git a/test_regress/t/t_stop_winos_bad.out b/test_regress/t/t_stop_winos_bad.out
new file mode 100644
index 000000000..8f72dc0d5
--- /dev/null
+++ b/test_regress/t/t_stop_winos_bad.out
@@ -0,0 +1,4 @@
+Intentional stop
+Filename 'C:\some\windows\path\t_stop_winos_bad.v'  Length = 39
+%Error: C:\some\windows\path\t_stop_winos_bad.v:14: Verilog $stop
+Aborting...
diff --git a/test_regress/t/t_stop_winos_bad.py b/test_regress/t/t_stop_winos_bad.py
new file mode 100755
index 000000000..12c7421fd
--- /dev/null
+++ b/test_regress/t/t_stop_winos_bad.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['-no-MMD'])
+
+test.execute(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_stop_winos_bad.v b/test_regress/t/t_stop_winos_bad.v
new file mode 100644
index 000000000..1b9cddd79
--- /dev/null
+++ b/test_regress/t/t_stop_winos_bad.v
@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2019 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`line 7 "C:\\some\\windows\\path\\t_stop_winos_bad.v" 0
+
+module t;
+   localparam string FILENAME = `__FILE__;
+   initial begin
+      $write("Intentional stop\n");
+      // Print length to make sure \\ counts as 1 character
+      $write("Filename '%s'  Length = %0d\n", FILENAME, FILENAME.len());
+      $stop;
+   end
+endmodule

From 4e667fabb723ec8227293a05d50125a59ac4c7ab Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 08:08:44 -0400
Subject: [PATCH 012/211] Internals: Add V3Number width-and-opAssign. No
 functional change.

---
 src/V3Const.cpp     | 3 +--
 src/V3Number.h      | 5 +++++
 src/V3Simulate.h    | 3 +--
 src/V3Width.cpp     | 6 ++----
 src/V3WidthCommit.h | 3 +--
 5 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 1fef6d4c0..c2ef9e0d5 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1368,8 +1368,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(smallerp);
 
         constp->unlinkFrBack();
-        V3Number num{constp, subsize};
-        num.opAssign(constp->num());
+        V3Number num{constp, subsize, constp->num()};
         nodep->lhsp(new AstConst{constp->fileline(), num});
         VL_DO_DANGLING(pushDeletep(constp), constp);
         if (debug() >= 9) nodep->dumpTree("-  BI(EXTEND)-ou: ");
diff --git a/src/V3Number.h b/src/V3Number.h
index 806af9ab3..3b46b2e05 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -466,6 +466,11 @@ public:
     V3Number(AstNode* nodep, int width) {  // 0=unsized
         init(nodep, width, width > 0);
     }
+    // Construct with value, changing to new width
+    V3Number(AstNode* nodep, int width, const V3Number& value) {
+        init(nodep, width, width > 0);
+        opAssign(value);
+    }
     V3Number(AstNode* nodep, int width, uint32_t value, bool sized = true) {
         init(nodep, width, sized);
         m_data.num()[0].m_value = value;
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index c98bfeb53..c2a3f79ea 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -603,8 +603,7 @@ private:
             // but in reality it would yield '0's without V3Table, so force 'x' bits to '0',
             // to ensure the result is the same with and without V3Table.
             if (!m_params && VN_IS(nodep, Sel) && valuep->num().isAnyX()) {
-                V3Number num{valuep, valuep->width()};
-                num.opAssign(valuep->num());
+                V3Number num{valuep, valuep->width(), valuep->num()};
                 valuep->num().opBitsOne(num);
             }
         }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 1f5f5ae18..5e75473b2 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -6764,8 +6764,7 @@ class WidthVisitor final : public VNVisitor {
             if (nodep->rhsp()->width() > 32) {
                 if (shiftp && shiftp->num().mostSetBitP1() <= 32) {
                     // If (number)<<96'h1, then make it into (number)<<32'h1
-                    V3Number num(shiftp, 32, 0);
-                    num.opAssign(shiftp->num());
+                    V3Number num{shiftp, 32, shiftp->num()};
                     AstNode* const shiftrhsp = nodep->rhsp();
                     nodep->rhsp()->replaceWith(new AstConst{shiftrhsp->fileline(), num});
                     VL_DO_DANGLING(shiftrhsp->deleteTree(), shiftrhsp);
@@ -6935,8 +6934,7 @@ class WidthVisitor final : public VNVisitor {
         const int expWidth = expDTypep->width();
         if (constp && !constp->num().isNegative()) {
             // Save later constant propagation work, just right-size it.
-            V3Number num(nodep, expWidth);
-            num.opAssign(constp->num());
+            V3Number num{nodep, expWidth, constp->num()};
             num.isSigned(false);
             AstNodeExpr* const newp = new AstConst{nodep->fileline(), num};
             constp->replaceWith(newp);
diff --git a/src/V3WidthCommit.h b/src/V3WidthCommit.h
index c2b124f0e..60af3c782 100644
--- a/src/V3WidthCommit.h
+++ b/src/V3WidthCommit.h
@@ -30,8 +30,7 @@ public:
     static AstConst* newIfConstCommitSize(AstConst* nodep) {
         if (((nodep->dtypep()->width() != nodep->num().width()) || !nodep->num().sized())
             && !nodep->num().isString()) {  // Need to force the number from unsized to sized
-            V3Number num{nodep, nodep->dtypep()->width()};
-            num.opAssign(nodep->num());
+            V3Number num{nodep, nodep->dtypep()->width(), nodep->num()};
             num.isSigned(nodep->isSigned());
             AstConst* const newp = new AstConst{nodep->fileline(), num};
             newp->dtypeFrom(nodep);

From 0664cf407c8acf61697da910888b6721e82f3c0f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 08:22:05 -0400
Subject: [PATCH 013/211] Fix constant propagation making upper bits Xs
 (#5969).

---
 Changes                      |  1 +
 src/V3Number.cpp             | 10 ++++++++--
 src/V3Number.h               |  4 ++--
 test_regress/t/t_select_c.py | 18 ++++++++++++++++++
 test_regress/t/t_select_c.v  | 27 +++++++++++++++++++++++++++
 5 files changed, 56 insertions(+), 4 deletions(-)
 create mode 100755 test_regress/t/t_select_c.py
 create mode 100644 test_regress/t/t_select_c.v

diff --git a/Changes b/Changes
index eba22c063..12858d5d7 100644
--- a/Changes
+++ b/Changes
@@ -16,6 +16,7 @@ Verilator 5.037 devel
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Fix filename backslash escapes in C code (#5947).
 * Fix sign extension of signed compared with unsigned case items (#5968).
+* Fix constant propagation making upper bits Xs (#5969).
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index a324e0644..3161a5b52 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -516,6 +516,12 @@ V3Number& V3Number::setValue1() {
     return *this;
 }
 
+void V3Number::setBitX0(int bit) {
+    // Selection beyond bounds after V3Premit needs to have 0s
+    // in upper bits.  Contrast to setAllBitsXRemoved which honors xAssign
+    setBit(bit, v3Global.constRemoveXs() ? 0 : 'x');
+}
+
 V3Number& V3Number::setMask(int nbits, int lsb) {
     setZero();
     for (int bit = lsb; bit < lsb + nbits; bit++) setBit(bit, 1);
@@ -2324,7 +2330,7 @@ V3Number& V3Number::opSel(const V3Number& lhs, uint32_t msbval, uint32_t lsbval)
         if (ibit >= 0 && ibit < lhs.width() && ibit <= static_cast<int>(msbval)) {
             setBit(bit, lhs.bitIs(ibit));
         } else {
-            setBit(bit, 'x');
+            setBitX0(bit);
         }
         ++ibit;
     }
@@ -2345,7 +2351,7 @@ V3Number& V3Number::opSelInto(const V3Number& lhs, int lsbval, int width) {
         if (ibit >= 0 && ibit < lhs.width()) {
             setBit(bit, lhs.bitIs(ibit));
         } else {
-            setBit(bit, 'x');
+            setBitX0(bit);
         }
         ibit++;
     }
diff --git a/src/V3Number.h b/src/V3Number.h
index 3b46b2e05..231dd6ccd 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -356,6 +356,7 @@ public:
     V3Number& setLong(uint32_t value);
     V3Number& setLongS(int32_t value);
     V3Number& setDouble(double value);
+    void setBitX0(int bit);
     void setBit(int bit, char value) {  // Note: must be initialized as number and pre-zeroed!
         if (bit >= m_data.width()) return;
         const uint32_t mask = (1UL << (bit & 31));
@@ -654,8 +655,7 @@ public:
     uint32_t countBits(const V3Number& ctrl) const;
     uint32_t countBits(const V3Number& ctrl1, const V3Number& ctrl2, const V3Number& ctrl3) const;
     uint32_t countOnes() const;
-    uint32_t
-    mostSetBitP1() const;  // Highest bit set plus one, IE for 16 return 5, for 0 return 0.
+    uint32_t mostSetBitP1() const;  // Highest bit set + 1, e.g. for 16 return 5, for 0 return 0
 
     // Operators
     bool operator<(const V3Number& rhs) const { return isLtXZ(rhs); }
diff --git a/test_regress/t/t_select_c.py b/test_regress/t/t_select_c.py
new file mode 100755
index 000000000..8a08e98cd
--- /dev/null
+++ b/test_regress/t/t_select_c.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator_st')
+
+test.compile(verilator_flags2=['--binary --fno-expand'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_select_c.v b/test_regress/t/t_select_c.v
new file mode 100644
index 000000000..c4ae30a64
--- /dev/null
+++ b/test_regress/t/t_select_c.v
@@ -0,0 +1,27 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   // verilator lint_off WIDTH
+   // verilator lint_off IMPLICIT
+   wire [22:0] w274;
+   wire w412;
+   wire w413;
+   wire w509;
+
+   assign w104 = ! w509;
+   assign w201 = w258 > 12'hab7;
+   assign w204 = 7'h7f <= w104;
+   wire [11:0] w258 = 3'h3 || w274;
+   assign w538 = w412 ? out21 : w201;
+   wire [16:0] w539 = w413 ? w538 : 17'h00570;
+   wire [21:5] out21 = w204;
+   assign out51 = w539[0];
+
+   initial begin
+      $display("%0d", out51);
+   end
+endmodule

From b10b22d09f62a66674e83b2b0232acbc439949c2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 18:30:19 -0400
Subject: [PATCH 014/211] Change unsupported 'tagged' into parse-level message

---
 src/verilog.l               |  2 +-
 src/verilog.y               | 15 ++++----
 test_regress/t/t_tagged.out | 70 +++++++++++++++----------------------
 test_regress/t/t_tagged.v   | 13 +++++--
 4 files changed, 47 insertions(+), 53 deletions(-)

diff --git a/src/verilog.l b/src/verilog.l
index a7d60ad55..add1df161 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -581,7 +581,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   "string"              { FL; return ySTRING; }
   "struct"              { FL; return ySTRUCT; }
   "super"               { FL; return ySUPER; }
-  "tagged"              { ERROR_RSVD_WORD("SystemVerilog 2005"); }
+  "tagged"              { FL; return yTAGGED; }
   "this"                { FL; return yTHIS; }
   "throughout"          { FL; return yTHROUGHOUT; }
   "timeprecision"       { FL; return yTIMEPRECISION; }
diff --git a/src/verilog.y b/src/verilog.y
index 696659c06..f88c4c94a 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -749,7 +749,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yS_UNTIL        "s_until"
 %token<fl>              yS_UNTIL_WITH   "s_until_with"
 %token<fl>              yTABLE          "table"
-//UNSUP %token<fl>      yTAGGED         "tagged"
+%token<fl>              yTAGGED         "tagged"
 %token<fl>              yTASK           "task"
 %token<fl>              yTHIS           "this"
 %token<fl>              yTHROUGHOUT     "throughout"
@@ -1080,7 +1080,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 // These prevent other conflicts
 %left           yP_ANDANDAND
 %left           yMATCHES
-//UNSUP %left   prTAGGED
+%left           prTAGGED
 //UNSUP %left   prSEQ_CLOCKING
 
 // PSL op precedence
@@ -2447,7 +2447,7 @@ random_qualifier<qualifiers>:   // ==IEEE: random_qualifier
 taggedSoftE<cbool>:
                 /*empty*/                               { $$ = false; }
         |       ySOFT                                   { $$ = true; }
-        //UNSUP yTAGGED                                 { UNSUP }
+        |       yTAGGED                                 { $$ = false; BBUNSUP($<fl>1, "Unsupported: tagged union"); }
         ;
 
 packedSigningE<signstate>:
@@ -4033,8 +4033,8 @@ patternNoExpr<nodep>:           // IEEE: pattern **Excluding Expr*
                         { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); }
         //                      // IEEE: "expr" excluded; expand in callers
         //                      // "yTAGGED idAny [expr]" Already part of expr
-        //UNSUP yTAGGED idAny/*member_identifier*/ patternNoExpr
-        //UNSUP         { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); }
+        |       yTAGGED idAny/*member_identifier*/ patternNoExpr
+                        { $$ = nullptr; BBUNSUP($1, "Unsupported: '{} tagged patterns"); }
         //                      // "yP_TICKBRA patternList '}'" part of expr under assignment_pattern
         ;
 
@@ -5083,8 +5083,9 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
         |       ~l~expr yINSIDE '{' range_list '}'      { $$ = new AstInside{$2, $1, $4}; }
         //
         //                      // IEEE: tagged_union_expression
-        //UNSUP yTAGGED id/*member*/ %prec prTAGGED             { UNSUP }
-        //UNSUP yTAGGED id/*member*/ %prec prTAGGED primary     { UNSUP }
+        //UNSUP yTAGGED id/*member*/ %prec prTAGGED             { $$ = $2; BBUNSUP("tagged reference"); }
+        //                      // Spec only allows primary
+        //UNSUP yTAGGED id/*member*/ %prec prTAGGED expr /*primary*/     { $$ = $2; BBUNSUP("tagged reference"); }
         //
         //======================// IEEE: primary/constant_primary
         //
diff --git a/test_regress/t/t_tagged.out b/test_regress/t/t_tagged.out
index 889926ef0..7cf6307f9 100644
--- a/test_regress/t/t_tagged.out
+++ b/test_regress/t/t_tagged.out
@@ -1,56 +1,42 @@
-%Error-UNSUPPORTED: t/t_tagged.v:9:18: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
+%Error-UNSUPPORTED: t/t_tagged.v:9:18: Unsupported: tagged union
     9 |    typedef union tagged {
       |                  ^~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error-UNSUPPORTED: t/t_tagged.v:10:6: Unsupported: void (for tagged unions)
    10 |      void m_invalid;
       |      ^~~~
-%Error-UNSUPPORTED: t/t_tagged.v:18:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   18 |       u = tagged m_invalid;
-      |           ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:22:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   22 |         tagged m_invalid: ;
-      |         ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:23:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   23 |         tagged m_int: $stop;
-      |         ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:21:16: Unsupported: matches (for tagged union)
-   21 |       case (u) matches
+%Error: t/t_tagged.v:19:14: syntax error, unexpected tagged, expecting IDENTIFIER-for-type
+   19 |          u = tagged m_invalid;
+      |              ^~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error-UNSUPPORTED: t/t_tagged.v:24:16: Unsupported: matches (for tagged union)
+   24 |       case (u) matches
       |                ^~~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:26:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   26 |       if (u matches tagged m_invalid) ;
+%Error: t/t_tagged.v:29:9: syntax error, unexpected tagged, expecting IDENTIFIER-for-type
+   29 |         tagged m_invalid: ;
+      |         ^~~~~~
+%Error-UNSUPPORTED: t/t_tagged.v:34:34: Unsupported: '{} tagged patterns
+   34 |       if (u matches tagged m_int .n) $stop;
+      |                                  ^
+%Error-UNSUPPORTED: t/t_tagged.v:34:21: Unsupported: '{} tagged patterns
+   34 |       if (u matches tagged m_int .n) $stop;
       |                     ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:26:13: Unsupported: matches operator
-   26 |       if (u matches tagged m_invalid) ;
+%Error-UNSUPPORTED: t/t_tagged.v:34:13: Unsupported: matches operator
+   34 |       if (u matches tagged m_int .n) $stop;
       |             ^~~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:27:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   27 |       if (u matches tagged m_int .n) $stop;
-      |                     ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:27:13: Unsupported: matches operator
-   27 |       if (u matches tagged m_int .n) $stop;
-      |             ^~~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:29:11: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   29 |       u = tagged m_int (123);
+%Error: t/t_tagged.v:36:11: syntax error, unexpected tagged, expecting IDENTIFIER-for-type
+   36 |       u = tagged m_int (123);
       |           ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:33:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   33 |         tagged m_invalid: $stop;
+%Error: t/t_tagged.v:40:9: syntax error, unexpected tagged, expecting IDENTIFIER-for-type
+   40 |         tagged m_invalid: $stop;
       |         ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:34:9: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   34 |         tagged m_int .n: if (n !== 123) $stop;
-      |         ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:32:16: Unsupported: matches (for tagged union)
-   32 |       case (u) matches
-      |                ^~~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:37:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   37 |       if (u matches tagged m_invalid) $stop;
+%Error-UNSUPPORTED: t/t_tagged.v:45:34: Unsupported: '{} tagged patterns
+   45 |       if (u matches tagged m_int .n) if (n != 123) $stop;
+      |                                  ^
+%Error-UNSUPPORTED: t/t_tagged.v:45:21: Unsupported: '{} tagged patterns
+   45 |       if (u matches tagged m_int .n) if (n != 123) $stop;
       |                     ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:37:13: Unsupported: matches operator
-   37 |       if (u matches tagged m_invalid) $stop;
-      |             ^~~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:38:21: Unsupported: SystemVerilog 2005 reserved word not implemented: 'tagged'
-   38 |       if (u matches tagged m_int .n) if (n != 123) $stop;
-      |                     ^~~~~~
-%Error-UNSUPPORTED: t/t_tagged.v:38:13: Unsupported: matches operator
-   38 |       if (u matches tagged m_int .n) if (n != 123) $stop;
+%Error-UNSUPPORTED: t/t_tagged.v:45:13: Unsupported: matches operator
+   45 |       if (u matches tagged m_int .n) if (n != 123) $stop;
       |             ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_tagged.v b/test_regress/t/t_tagged.v
index 76bd224cd..6a8f5375f 100644
--- a/test_regress/t/t_tagged.v
+++ b/test_regress/t/t_tagged.v
@@ -15,9 +15,16 @@ module t(/*AUTOARG*/);
    string s;
 
    initial begin
-      u = tagged m_invalid;
-      s = $sformatf("%p", u);
-      $display("%s e.g. '{tagged m_invalid:void}", s);
+      begin
+         u = tagged m_invalid;
+         s = $sformatf("%p", u);
+         $display("%s e.g. '{tagged m_invalid:void}", s);
+      end
+
+      case (u) matches
+        default: ;
+      endcase
+
       case (u) matches
         tagged m_invalid: ;
         tagged m_int: $stop;

From cbf46d0ded103bc59da99be9259d4d456e8c5d7c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 19:00:17 -0400
Subject: [PATCH 015/211] Tests: Add mis-include test.

---
 test_regress/t/t_config_include_bad.out |  9 +++++++++
 test_regress/t/t_config_include_bad.py  | 18 ++++++++++++++++++
 test_regress/t/t_config_include_bad.v   | 10 ++++++++++
 test_regress/t/t_dist_warn_coverage.py  |  1 -
 4 files changed, 37 insertions(+), 1 deletion(-)
 create mode 100644 test_regress/t/t_config_include_bad.out
 create mode 100755 test_regress/t/t_config_include_bad.py
 create mode 100644 test_regress/t/t_config_include_bad.v

diff --git a/test_regress/t/t_config_include_bad.out b/test_regress/t/t_config_include_bad.out
new file mode 100644
index 000000000..b7cc607aa
--- /dev/null
+++ b/test_regress/t/t_config_include_bad.out
@@ -0,0 +1,9 @@
+%Error-UNSUPPORTED: t/t_config_include_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
+    7 | include "meant_to_tick_include.v"
+      | ^~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: t/t_config_include_bad.v:7:9: syntax error, unexpected STRING
+    7 | include "meant_to_tick_include.v"
+      |         ^~~~~~~~~~~~~~~~~~~~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Exiting due to
diff --git a/test_regress/t/t_config_include_bad.py b/test_regress/t/t_config_include_bad.py
new file mode 100755
index 000000000..acbdae169
--- /dev/null
+++ b/test_regress/t/t_config_include_bad.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(verilator_flags2=["--lint-only -Wwarn-REALCVT"],
+          fails=True,
+          expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_config_include_bad.v b/test_regress/t/t_config_include_bad.v
new file mode 100644
index 000000000..696d8f8e6
--- /dev/null
+++ b/test_regress/t/t_config_include_bad.v
@@ -0,0 +1,10 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+include "meant_to_tick_include.v"
+
+module t;
+endmodule
diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index 1c7f19f40..0a973ec52 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -110,7 +110,6 @@ for s in [
         'Unsupported: \'{} tagged patterns',
         'Unsupported: always[] (in property expression)',
         'Unsupported: assertion items in clocking blocks',
-        'Unsupported: default clocking identifier',
         'Unsupported: don\'t know how to deal with ',
         'Unsupported: eventually[] (in property expression)',
         'Unsupported: extern forkjoin',

From 38dd9a344e5cd8fed248ae34e5932bd8d3812a35 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 20:32:30 -0400
Subject: [PATCH 016/211] Improve documentation for BADVLTPRAGMA

---
 docs/gen/ex_BADVLTPRAGMA_faulty.rst        |  5 +++++
 docs/gen/ex_BADVLTPRAGMA_msg.rst           |  7 +++++++
 docs/guide/warnings.rst                    |  8 ++++++++
 test_regress/driver.py                     |  1 +
 test_regress/t/t_dist_error_format.py      |  7 +++++--
 test_regress/t/t_lint_badvltpragma_bad.out |  5 +++++
 test_regress/t/t_lint_badvltpragma_bad.py  | 24 ++++++++++++++++++++++
 test_regress/t/t_lint_badvltpragma_bad.v   |  9 ++++++++
 8 files changed, 64 insertions(+), 2 deletions(-)
 create mode 100644 docs/gen/ex_BADVLTPRAGMA_faulty.rst
 create mode 100644 docs/gen/ex_BADVLTPRAGMA_msg.rst
 create mode 100644 test_regress/t/t_lint_badvltpragma_bad.out
 create mode 100755 test_regress/t/t_lint_badvltpragma_bad.py
 create mode 100644 test_regress/t/t_lint_badvltpragma_bad.v

diff --git a/docs/gen/ex_BADVLTPRAGMA_faulty.rst b/docs/gen/ex_BADVLTPRAGMA_faulty.rst
new file mode 100644
index 000000000..62725c09b
--- /dev/null
+++ b/docs/gen/ex_BADVLTPRAGMA_faulty.rst
@@ -0,0 +1,5 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block:: sv
+   :emphasize-lines: 1
+
+      // verilator lintt_off WIDTH  //<--- Warning (lint_off misspelled)
diff --git a/docs/gen/ex_BADVLTPRAGMA_msg.rst b/docs/gen/ex_BADVLTPRAGMA_msg.rst
new file mode 100644
index 000000000..ea57d297e
--- /dev/null
+++ b/docs/gen/ex_BADVLTPRAGMA_msg.rst
@@ -0,0 +1,7 @@
+.. comment: generated by t_lint_badvltpragma_bad
+.. code-block::
+   :emphasize-lines: 1,2
+
+   %Error-BADVLTPRAGMA: example.v:1:4 Unknown verilator comment: '/*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/'
+       7 |    /*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/
+         |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index bf015760f..b6cf9622f 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -175,6 +175,14 @@ List Of Warnings
    An error that a `/*verilator ...*/` metacomment pragma is badly formed
    or not understood.
 
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_BADVLTPRAGMA_msg.rst
+
    This error may be disabled with a lint_off BADVLTPRAGMA metacomment.
 
 
diff --git a/test_regress/driver.py b/test_regress/driver.py
index fa7fd253e..d69c66da5 100755
--- a/test_regress/driver.py
+++ b/test_regress/driver.py
@@ -2633,6 +2633,7 @@ class VlTest:
                 fhw.write("   :emphasize-lines: " + emph + "\n")
             fhw.write("\n")
             for line in out:
+                line = re.sub(r' +$', '', line)
                 fhw.write(line)
 
         self.files_identical(temp_fn, out_filename)
diff --git a/test_regress/t/t_dist_error_format.py b/test_regress/t/t_dist_error_format.py
index 473dffb57..154ae7084 100755
--- a/test_regress/t/t_dist_error_format.py
+++ b/test_regress/t/t_dist_error_format.py
@@ -29,6 +29,7 @@ def formats():
             for line in wholefile.splitlines():
                 lineno += 1
                 line = re.sub(r'(\$display|\$write).*\".*%(Error|Warning)', '', line)
+                line = re.sub(r'<---.*', '', line)
                 if (re.search(r'(Error|Warning)', line)
                         and not re.search(r'^\s*<sformatf ', line)  # skip XML tag
                         and not re.search(r'^\s*{"type":"', line)  # skip JSON node
@@ -52,14 +53,16 @@ def formats():
                         #print("FF "+filename+": "+line)
                         fline = filename + ":" + str(lineno)
                         warns[fline] = "Non-standard warning/error: " + fline + ": " + line
+                        if test.verbose:
+                            print(warns[fline])
 
     if not lnmatch:
         test.error("Check line number regexp is correct, no matches")
     if len(warns):
         # First warning lists everything as that's shown in the driver summary
-        test.error(' '.join(sorted(warns.keys())))
+        test.error_keep_going(' '.join(sorted(warns.keys())))
         for filename in sorted(warns.keys()):
-            test.error(warns[filename])
+            test.error_keep_going(warns[filename])
 
 
 if not os.path.exists(root + "/.git"):
diff --git a/test_regress/t/t_lint_badvltpragma_bad.out b/test_regress/t/t_lint_badvltpragma_bad.out
new file mode 100644
index 000000000..8532c03c7
--- /dev/null
+++ b/test_regress/t/t_lint_badvltpragma_bad.out
@@ -0,0 +1,5 @@
+%Error-BADVLTPRAGMA: t/t_lint_badvltpragma_bad.v:7:4: Unknown verilator comment: '/*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/'
+    7 |    /*verilator lintt_off WIDTH <--- Warning (lint_off misspelled)*/ 
+      |    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+                     ... For error description see https://verilator.org/warn/BADVLTPRAGMA?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_badvltpragma_bad.py b/test_regress/t/t_lint_badvltpragma_bad.py
new file mode 100755
index 000000000..4ddd05c4a
--- /dev/null
+++ b/test_regress/t/t_lint_badvltpragma_bad.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.extract(in_filename=test.top_filename,
+             out_filename="../docs/gen/ex_BADVLTPRAGMA_faulty.rst",
+             lines="7")
+
+test.extract(in_filename=test.golden_filename,
+             out_filename="../docs/gen/ex_BADVLTPRAGMA_msg.rst",
+             lines="1-3")
+
+test.passes()
diff --git a/test_regress/t/t_lint_badvltpragma_bad.v b/test_regress/t/t_lint_badvltpragma_bad.v
new file mode 100644
index 000000000..66dd1e9f8
--- /dev/null
+++ b/test_regress/t/t_lint_badvltpragma_bad.v
@@ -0,0 +1,9 @@
+// DESCRIPTION: Verilator: Verilog Test module
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   // verilator lintt_off WIDTH  //<--- Warning (lint_off misspelled)
+   bit one = 2;
+endmodule

From 8b52bd817f2dca3e84b60a1e6424b4aa5f58b40c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 22:00:06 -0400
Subject: [PATCH 017/211] Add PROCINITASSIGN on initial assignments to process
 variables (#2481).

---
 Changes                                       |  1 +
 docs/gen/ex_PROCASSINIT_faulty.rst            | 12 ++++
 docs/gen/ex_PROCASSINIT_fixed.rst             | 15 +++++
 docs/gen/ex_PROCASSINIT_msg.rst               | 12 ++++
 docs/guide/exe_verilator.rst                  |  6 +-
 docs/guide/warnings.rst                       | 31 +++++++++-
 examples/make_protect_lib/secret_impl.v       | 23 +++++---
 examples/make_protect_lib/top.v               | 24 +++++---
 src/V3Error.h                                 | 10 ++--
 src/V3Undriven.cpp                            | 40 ++++++++++++-
 test_regress/t/t_EXAMPLE.v                    |  2 +-
 test_regress/t/t_delay.v                      |  2 +-
 test_regress/t/t_format_wide_decimal.v        |  6 +-
 test_regress/t/t_lint_procassinit_bad.out     | 21 +++++++
 test_regress/t/t_lint_procassinit_bad.py      | 30 ++++++++++
 test_regress/t/t_lint_procassinit_bad.v       | 56 +++++++++++++++++++
 .../t/t_lint_removed_unused_loop_bad.v        | 12 ++--
 test_regress/t/t_net_delay.out                | 44 +++++++--------
 test_regress/t/t_net_delay.v                  |  4 +-
 19 files changed, 292 insertions(+), 59 deletions(-)
 create mode 100644 docs/gen/ex_PROCASSINIT_faulty.rst
 create mode 100644 docs/gen/ex_PROCASSINIT_fixed.rst
 create mode 100644 docs/gen/ex_PROCASSINIT_msg.rst
 create mode 100644 test_regress/t/t_lint_procassinit_bad.out
 create mode 100755 test_regress/t/t_lint_procassinit_bad.py
 create mode 100644 test_regress/t/t_lint_procassinit_bad.v

diff --git a/Changes b/Changes
index 12858d5d7..786656ca0 100644
--- a/Changes
+++ b/Changes
@@ -14,6 +14,7 @@ Verilator 5.037 devel
 **Other:**
 
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
+* Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix constant propagation making upper bits Xs (#5969).
diff --git a/docs/gen/ex_PROCASSINIT_faulty.rst b/docs/gen/ex_PROCASSINIT_faulty.rst
new file mode 100644
index 000000000..c21130841
--- /dev/null
+++ b/docs/gen/ex_PROCASSINIT_faulty.rst
@@ -0,0 +1,12 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 1,5
+
+      logic flop_out = 1;  // <--- Warning
+
+      always @(posedge clk, negedge reset_l) begin
+         if (enable) begin
+            flop_out <= ~in;  // <--- Use of initialized
+         end
+      end
diff --git a/docs/gen/ex_PROCASSINIT_fixed.rst b/docs/gen/ex_PROCASSINIT_fixed.rst
new file mode 100644
index 000000000..f5a3f3711
--- /dev/null
+++ b/docs/gen/ex_PROCASSINIT_fixed.rst
@@ -0,0 +1,15 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block:: sv
+   :linenos:
+   :emphasize-lines: 5
+
+      logic flop2_out;
+
+      always @(posedge clk, negedge reset_l) begin
+         if (!reset_l) begin
+            flop2_out <= '1;  // <--- Added reset init
+         end
+         else if (enable) begin
+            flop2_out <= ~in;
+         end
+      end
diff --git a/docs/gen/ex_PROCASSINIT_msg.rst b/docs/gen/ex_PROCASSINIT_msg.rst
new file mode 100644
index 000000000..4fe084952
--- /dev/null
+++ b/docs/gen/ex_PROCASSINIT_msg.rst
@@ -0,0 +1,12 @@
+.. comment: generated by t_lint_procassinit_bad
+.. code-block::
+
+   %Warning-PROCASSINIT: example.v:1:21 Procedural assignment to declaration with initial value: 'flop_out'
+                                                         : ... note: In instance 't'
+                                                         : ... Location of variable initialization
+      26 |    logic flop_out = 1;
+         |                     ^
+                         example.v:1:10 ... Location of variable process write
+                                                         : ... Perhaps should initialize instead using a reset in this process
+      30 |          flop_out <= ~in;
+         |          ^~~~~~~~
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 2f2b1cdfe..c75d21f3a 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -1880,9 +1880,9 @@ Summary:
    ``-Wwarn-ASSIGNDLY`` ``-Wwarn-BLKSEQ`` ``-Wwarn-DECLFILENAME``
    ``-Wwarn-DEFPARAM`` ``-Wwarn-EOFNEWLINE`` ``-Wwarn-GENUNNAMED``
    ``-Wwarn-IMPORTSTAR`` ``-Wwarn-INCABSPATH`` ``-Wwarn-PINCONNECTEMPTY``
-   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-SYNCASYNCNET`` ``-Wwarn-UNDRIVEN``
-   ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDLOOP`` ``-Wwarn-UNUSEDPARAM``
-   ``-Wwarn-UNUSEDSIGNAL`` ``-Wwarn-VARHIDDEN``.
+   ``-Wwarn-PINNOCONNECT`` ``-Wwarn-PROCASSINIT`` ``-Wwarn-SYNCASYNCNET``
+   ``-Wwarn-UNDRIVEN`` ``-Wwarn-UNUSEDGENVAR`` ``-Wwarn-UNUSEDLOOP``
+   ``-Wwarn-UNUSEDPARAM`` ``-Wwarn-UNUSEDSIGNAL`` ``-Wwarn-VARHIDDEN``.
 
 .. option:: --x-assign <mode>
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index b6cf9622f..9e03d38d2 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1471,6 +1471,35 @@ List Of Warnings
    a var/reg must be used as the target of procedural assignments.
 
 
+.. option:: PROCINITASSIGN
+
+   Warns that the specified signal is given an initial value where it is
+   declared, and is also driven in an always process.  Typically such
+   initial values should instead be set using a reset signal inside the
+   process, to match requirements of hardware synthesis tools.
+
+   Faulty example:
+
+   .. include:: ../../docs/gen/ex_PROCINITASSIGN_faulty.rst
+
+   Results in:
+
+   .. include:: ../../docs/gen/ex_PROCINITASSIGN_msg.rst
+
+   One possible fix, adding a reset to the always:
+
+   .. include:: ../../docs/gen/ex_PROCINITASSIGN_fixed.rst
+
+   Alternatively, use an initial block for the initialization:
+
+   .. code-block:: sv
+
+      initial flop_out = 1;  // <--- Fixed
+
+   Disabled by default as this is a code-style warning; it will simulate
+   correctly.
+
+
 .. option:: PROFOUTOFDATE
 
    Warns that threads were scheduled using estimated costs, even though
@@ -2164,7 +2193,7 @@ List Of Warnings
 
    .. include:: ../../docs/gen/ex_VARHIDDEN_msg.rst
 
-   To resolve this, rename the variable to an unique name.
+   To resolve this, rename the inner or outer variable to an unique name.
 
 
 .. option:: WAITCONST
diff --git a/examples/make_protect_lib/secret_impl.v b/examples/make_protect_lib/secret_impl.v
index 2a12a272c..dc9fe1c6b 100644
--- a/examples/make_protect_lib/secret_impl.v
+++ b/examples/make_protect_lib/secret_impl.v
@@ -12,19 +12,26 @@ module secret_impl
    input [31:0]        a,
    input [31:0]        b,
    output logic [31:0] x,
-   input               clk);
+   input               clk,
+   input               reset_l);
 
-   logic [31:0]        accum_q = 0;
-   logic [31:0]        secret_value = 9;
+   logic [31:0] accum_q;
+   logic [31:0] secret_value;
 
    initial $display("[%0t] %m: initialized", $time);
 
    always @(posedge clk) begin
-      accum_q <= accum_q + a;
-      if (accum_q > 10)
-        x <= b;
-      else
-        x <= a + b + secret_value;
+      if (!reset_l) begin
+         accum_q <= 0;
+         secret_value <= 9;
+      end
+      else begin
+         accum_q <= accum_q + a;
+         if (accum_q > 10)
+           x <= b;
+         else
+           x <= a + b + secret_value;
+      end
    end
 
 endmodule
diff --git a/examples/make_protect_lib/top.v b/examples/make_protect_lib/top.v
index b9b71ef87..031764292 100644
--- a/examples/make_protect_lib/top.v
+++ b/examples/make_protect_lib/top.v
@@ -8,26 +8,36 @@
 
 module top (input clk);
 
-   integer cyc = 0;
-   logic [31:0] a = 0;
-   logic [31:0] b = 0;
+   int cyc;
+   logic reset_l;
+   logic [31:0] a;
+   logic [31:0] b;
    logic [31:0] x;
 
-   verilated_secret secret (.a, .b, .x, .clk);
+   verilated_secret secret (.a, .b, .x, .clk, .reset_l);
 
    always @(posedge clk) begin
       $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
       cyc <= cyc + 1;
       if (cyc == 0) begin
+         reset_l <= 0;
+         a <= 0;
+         b <= 0;
+      end
+      else if (cyc == 1) begin
+         reset_l <= 1;
          a <= 5;
          b <= 7;
-      end else if (cyc == 1) begin
+      end
+      else if (cyc == 2) begin
          a <= 6;
          b <= 2;
-      end else if (cyc == 2) begin
+      end
+      else if (cyc == 3) begin
          a <= 1;
          b <= 9;
-      end else if (cyc > 3) begin
+      end
+      else if (cyc > 4) begin
          $display("Done");
          $finish;
       end
diff --git a/src/V3Error.h b/src/V3Error.h
index e051147e8..591128e8e 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -129,6 +129,7 @@ public:
         PINNOTFOUND,    // instance port name not found in it's module
         PKGNODECL,      // Error: Package/class needs to be predeclared
         PREPROCZERO,    // Preprocessor expression with zero
+        PROCASSINIT,    // Procedural assignment versus initialization
         PROCASSWIRE,    // Procedural assignment on wire
         PROFOUTOFDATE,  // Profile data out of date
         PROTECTED,      // detected `pragma protected
@@ -206,7 +207,7 @@ public:
             "INCABSPATH", "INFINITELOOP", "INITIALDLY", "INSECURE",
             "LATCH", "LITENDIAN", "MINTYPMAXDLY", "MISINDENT", "MODDUP",
             "MULTIDRIVEN", "MULTITOP", "NEWERSTD", "NOLATCH", "NONSTD", "NULLPORT", "PINCONNECTEMPTY",
-            "PINMISSING", "PINNOCONNECT",  "PINNOTFOUND", "PKGNODECL", "PREPROCZERO", "PROCASSWIRE",
+            "PINMISSING", "PINNOCONNECT",  "PINNOTFOUND", "PKGNODECL", "PREPROCZERO", "PROCASSINIT", "PROCASSWIRE",
             "PROFOUTOFDATE", "PROTECTED", "RANDC", "REALCVT", "REDEFMACRO", "RISEFALLDLY",
             "SELRANGE", "SHORTREAL", "SIDEEFFECT", "SPLITVAR",
             "STATICVAR", "STMTDLY", "SYMRSVDWORD", "SYNCASYNCNET",
@@ -259,9 +260,10 @@ public:
         return (m_e == ASSIGNDLY  // More than style, but for backward compatibility
                 || m_e == BLKSEQ || m_e == DECLFILENAME || m_e == DEFPARAM || m_e == EOFNEWLINE
                 || m_e == GENUNNAMED || m_e == IMPORTSTAR || m_e == INCABSPATH
-                || m_e == PINCONNECTEMPTY || m_e == PINNOCONNECT || m_e == SYNCASYNCNET
-                || m_e == UNDRIVEN || m_e == UNUSEDGENVAR || m_e == UNUSEDLOOP
-                || m_e == UNUSEDPARAM || m_e == UNUSEDSIGNAL || m_e == VARHIDDEN);
+                || m_e == PINCONNECTEMPTY || m_e == PINNOCONNECT || m_e == PROCASSINIT
+                || m_e == SYNCASYNCNET || m_e == UNDRIVEN || m_e == UNUSEDGENVAR
+                || m_e == UNUSEDLOOP || m_e == UNUSEDPARAM || m_e == UNUSEDSIGNAL
+                || m_e == VARHIDDEN);
     }
     // Warnings that are unused only
     bool unusedError() const VL_MT_SAFE {
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index 130b3f498..7e9903018 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -46,6 +46,8 @@ class UndrivenVarEntry final {
     const FileLine* m_alwCombFileLinep = nullptr;  // File line of always_comb of var if driven
                                                    // within always_comb, else nullptr
     const AstNodeVarRef* m_nodep = nullptr;  // varref if driven, else nullptr
+    const AstNode* m_initStaticp = nullptr;  // varref if in InitialStatic driven
+    const AstNode* m_procWritep = nullptr;  // varref if written in process
     const FileLine* m_nodeFileLinep = nullptr;  // File line of varref if driven, else nullptr
     bool m_underGen = false;  // Under a generate
 
@@ -129,6 +131,11 @@ public:
         m_alwCombp = alwCombp;
         m_alwCombFileLinep = fileLinep;
     }
+
+    const AstNode* initStaticp() const { return m_initStaticp; }
+    void initStaticp(const AstNode* nodep) { m_initStaticp = nodep; }
+    const AstNode* procWritep() const { return m_procWritep; }
+    void procWritep(const AstNode* nodep) { m_procWritep = nodep; }
     void underGenerate() { m_underGen = true; }
     bool isUnderGen() const { return m_underGen; }
     bool isDrivenWhole() const { return m_wholeFlags[FLAG_DRIVEN]; }
@@ -172,6 +179,18 @@ public:
         // Combine bits into overall state
         AstVar* const nodep = m_varp;
 
+        if (initStaticp() && procWritep() && !nodep->isClassMember() && !nodep->isFuncLocal()) {
+            initStaticp()->v3warn(
+                PROCASSINIT,
+                "Procedural assignment to declaration with initial value: "
+                    << nodep->prettyNameQ() << '\n'
+                    << initStaticp()->warnMore() << "... Location of variable initialization\n"
+                    << initStaticp()->warnContextPrimary() << '\n'
+                    << procWritep()->warnOther() << "... Location of variable process write\n"
+                    << procWritep()->warnMore()
+                    << "... Perhaps should initialize instead using a reset in this process\n"
+                    << procWritep()->warnContextSecondary());
+        }
         if (nodep->isGenVar()) {  // Genvar
             if (!nodep->isIfaceRef() && !nodep->isUsedParam() && !unusedMatch(nodep)) {
                 nodep->v3warn(UNUSEDGENVAR, "Genvar is not used: " << nodep->prettyNameQ());
@@ -277,10 +296,12 @@ class UndrivenVisitor final : public VNVisitorConst {
     std::array<std::vector<UndrivenVarEntry*>, 3> m_entryps;  // Nodes to delete when finished
     bool m_inBBox = false;  // In black box; mark as driven+used
     bool m_inContAssign = false;  // In continuous assignment
+    bool m_inInitialStatic = false;  // In InitialStatic
     bool m_inProcAssign = false;  // In procedural assignment
     bool m_inFTaskRef = false;  // In function or task call
     bool m_inInoutOrRefPin = false;  // Connected to pin that is inout
     const AstNodeFTask* m_taskp = nullptr;  // Current task
+    const AstAlways* m_alwaysp = nullptr;  // Current always of either type
     const AstAlways* m_alwaysCombp = nullptr;  // Current always if combo, otherwise nullptr
 
     // METHODS
@@ -384,9 +405,8 @@ class UndrivenVisitor final : public VNVisitorConst {
                 nodep->v3warn(PROCASSWIRE, "Procedural assignment to wire, perhaps intended var"
                                                << " (IEEE 1800-2023 6.5): "
                                                << nodep->prettyNameQ());
-            }
-            if (m_inContAssign && !nodep->varp()->varType().isContAssignable()
-                && !nodep->fileline()->language().systemVerilog()) {
+            } else if (m_inContAssign && !nodep->varp()->varType().isContAssignable()
+                       && !nodep->fileline()->language().systemVerilog()) {
                 nodep->v3warn(CONTASSREG,
                               "Continuous assignment to reg, perhaps intended wire"
                                   << " (IEEE 1364-2005 6.1; Verilog only, legal in SV): "
@@ -448,6 +468,13 @@ class UndrivenVisitor final : public VNVisitorConst {
                 if (m_alwaysCombp)
                     entryp->drivenAlwaysCombWhole(m_alwaysCombp, m_alwaysCombp->fileline());
             }
+            if (nodep->access().isWriteOrRW()) {
+                UINFO(1, "ww is=" << m_inInitialStatic << " ipa=" << m_inProcAssign << " " << nodep
+                                  << endl);
+                if (m_inInitialStatic && !entryp->initStaticp()) entryp->initStaticp(nodep);
+                if (m_alwaysp && m_inProcAssign && !entryp->procWritep())
+                    entryp->procWritep(nodep);
+            }
             if (m_inBBox || nodep->access().isReadOrRW()
                 || fdrv
                 // Inouts have only isWrite set, as we don't have more
@@ -480,9 +507,16 @@ class UndrivenVisitor final : public VNVisitorConst {
         m_inContAssign = true;
         iterateChildrenConst(nodep);
     }
+    void visit(AstInitialStatic* nodep) override {
+        VL_RESTORER(m_inInitialStatic);
+        m_inInitialStatic = true;
+        iterateChildrenConst(nodep);
+    }
     void visit(AstAlways* nodep) override {
+        VL_RESTORER(m_alwaysp);
         VL_RESTORER(m_alwaysCombp);
         AstNode::user2ClearTree();
+        m_alwaysp = nodep;
         if (nodep->keyword() == VAlwaysKwd::ALWAYS_COMB) {
             UINFO(9, "   " << nodep << endl);
             m_alwaysCombp = nodep;
diff --git a/test_regress/t/t_EXAMPLE.v b/test_regress/t/t_EXAMPLE.v
index b00361778..a5d815b13 100644
--- a/test_regress/t/t_EXAMPLE.v
+++ b/test_regress/t/t_EXAMPLE.v
@@ -26,7 +26,7 @@ module t(/*AUTOARG*/
    );
    input clk;
 
-   integer cyc = 0;
+   int cyc;
    reg [63:0] crc;
    reg [63:0] sum;
 
diff --git a/test_regress/t/t_delay.v b/test_regress/t/t_delay.v
index e541a10d0..9f1cb5420 100644
--- a/test_regress/t/t_delay.v
+++ b/test_regress/t/t_delay.v
@@ -12,7 +12,7 @@ module t (/*AUTOARG*/
    );
 
    input clk;
-   integer cyc=1;
+   int cyc;
 
    reg [31:0] dly0;
    wire [31:0] dly1;
diff --git a/test_regress/t/t_format_wide_decimal.v b/test_regress/t/t_format_wide_decimal.v
index 2b2a04835..b45b816e4 100644
--- a/test_regress/t/t_format_wide_decimal.v
+++ b/test_regress/t/t_format_wide_decimal.v
@@ -12,8 +12,10 @@ module t_format_wide_decimal(/*AUTOARG*/
    );
    input clk;
 
-   int   cycle = 0;
-   bit [1023:0] x = '1;
+   int cycle;
+   bit [1023:0] x;
+
+   initial x = '1;
 
    always @(posedge clk) begin
       if (cycle == 0) begin
diff --git a/test_regress/t/t_lint_procassinit_bad.out b/test_regress/t/t_lint_procassinit_bad.out
new file mode 100644
index 000000000..f54e793a1
--- /dev/null
+++ b/test_regress/t/t_lint_procassinit_bad.out
@@ -0,0 +1,21 @@
+%Warning-PROCASSINIT: t/t_lint_procassinit_bad.v:26:21: Procedural assignment to declaration with initial value: 'flop_out'
+                                                      : ... note: In instance 't'
+                                                      : ... Location of variable initialization
+   26 |    logic flop_out = 1;   
+      |                     ^
+                      t/t_lint_procassinit_bad.v:30:10: ... Location of variable process write
+                                                      : ... Perhaps should initialize instead using a reset in this process
+   30 |          flop_out <= ~in;   
+      |          ^~~~~~~~
+                      ... For warning description see https://verilator.org/warn/PROCASSINIT?v=latest
+                      ... Use "/* verilator lint_off PROCASSINIT */" and lint_on around source to disable this message.
+%Warning-PROCASSINIT: t/t_lint_procassinit_bad.v:48:21: Procedural assignment to declaration with initial value: 'bad_comb'
+                                                      : ... note: In instance 't'
+                                                      : ... Location of variable initialization
+   48 |    logic bad_comb = 1;     
+      |                     ^
+                      t/t_lint_procassinit_bad.v:51:7: ... Location of variable process write
+                                                     : ... Perhaps should initialize instead using a reset in this process
+   51 |       bad_comb = ok2;
+      |       ^~~~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_procassinit_bad.py b/test_regress/t/t_lint_procassinit_bad.py
new file mode 100755
index 000000000..05ca0a399
--- /dev/null
+++ b/test_regress/t/t_lint_procassinit_bad.py
@@ -0,0 +1,30 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(verilator_flags2=['-Wall -Wno-DECLFILENAME'],
+          fails=True,
+          expect_filename=test.golden_filename)
+
+test.extract(in_filename=test.top_filename,
+             out_filename="../docs/gen/ex_PROCASSINIT_faulty.rst",
+             lines="26-32")
+
+test.extract(in_filename=test.top_filename,
+             out_filename="../docs/gen/ex_PROCASSINIT_fixed.rst",
+             lines="36-45")
+
+test.extract(in_filename=test.golden_filename,
+             out_filename="../docs/gen/ex_PROCASSINIT_msg.rst",
+             lines="1-9")
+
+test.passes()
diff --git a/test_regress/t/t_lint_procassinit_bad.v b/test_regress/t/t_lint_procassinit_bad.v
new file mode 100644
index 000000000..6b8e11d85
--- /dev/null
+++ b/test_regress/t/t_lint_procassinit_bad.v
@@ -0,0 +1,56 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/
+   // Inputs
+   clk, reset_l, in, enable
+   );
+   input clk;
+   input reset_l;
+   input in;
+   input enable;
+
+   logic ok1 = 1;
+   logic ok2 = 1;
+   logic ok3 = ok2;
+
+   initial begin
+      ok1 = 1;
+   end
+
+   //== Faulty example
+
+   logic flop_out = 1;  // <--- Warning
+
+   always @(posedge clk, negedge reset_l) begin
+      if (enable) begin
+         flop_out <= ~in;  // <--- Use of initialized
+      end
+   end
+
+   //== Fixed example
+
+   logic flop2_out;
+
+   always @(posedge clk, negedge reset_l) begin
+      if (!reset_l) begin
+         flop2_out <= '1;  // <--- Added reset init
+      end
+      else if (enable) begin
+         flop2_out <= ~in;
+      end
+   end
+
+   // Combo version
+   logic bad_comb = 1;    // but this is not fine
+
+   always @* begin
+      bad_comb = ok2;
+   end
+
+   wire _unused_ok = &{1'b0, flop_out, flop2_out, bad_comb, ok1, ok2, ok3};
+
+endmodule
diff --git a/test_regress/t/t_lint_removed_unused_loop_bad.v b/test_regress/t/t_lint_removed_unused_loop_bad.v
index 7bd5b195d..5ec480ede 100644
--- a/test_regress/t/t_lint_removed_unused_loop_bad.v
+++ b/test_regress/t/t_lint_removed_unused_loop_bad.v
@@ -28,10 +28,10 @@ endmodule
 
 // module unused - no warning for any of statements inside
 module unused(input clk);
-   reg unused_variable_while = 0;
-   reg unused_variable_do_while = 0;
-   reg unused_variable_for = 0;
-   const logic always_false = 0;
+   bit unused_variable_while;
+   bit unused_variable_do_while;
+   bit unused_variable_for;
+   const bit always_false = 0;
 
    always @(posedge clk) begin
       while(unused_variable_while) begin
@@ -259,7 +259,7 @@ module clock_init_race(input clk, input reset_l);
    logic m_3_reset = reset_l;
    assign m_2_clock = clk;
    assign m_3_clock = clk;
-   int m_3_counter = 0;
+   int m_3_counter;
    initial begin
       $write("*-* START TEST *-*\n");
    end
@@ -271,7 +271,7 @@ module clock_init_race(input clk, input reset_l);
       end
    end
 
-   reg m_2_ticked = 1'b0;
+   bit m_2_ticked;
    always @(posedge m_2_clock) if (!m_2_reset) begin
       m_2_ticked = 1'b1;
    end
diff --git a/test_regress/t/t_net_delay.out b/test_regress/t/t_net_delay.out
index eab2df885..ca9804540 100644
--- a/test_regress/t/t_net_delay.out
+++ b/test_regress/t/t_net_delay.out
@@ -1,37 +1,37 @@
-%Warning-STMTDLY: t/t_net_delay.v:14:11: Ignoring delay on this statement due to --no-timing
+%Warning-STMTDLY: t/t_net_delay.v:16:11: Ignoring delay on this statement due to --no-timing
                                        : ... note: In instance 't'
-   14 |    always #2 clk = ~clk;
+   16 |    always #2 clk = ~clk;
       |           ^
                   ... For warning description see https://verilator.org/warn/STMTDLY?v=latest
                   ... Use "/* verilator lint_off STMTDLY */" and lint_on around source to disable this message.
-%Warning-STMTDLY: t/t_net_delay.v:20:14: Ignoring delay on this statement due to --no-timing
+%Warning-STMTDLY: t/t_net_delay.v:22:14: Ignoring delay on this statement due to --no-timing
                                        : ... note: In instance 't'
-   20 |    wire[3:0] #3 val1;
+   22 |    wire[3:0] #3 val1;
       |              ^
-%Warning-STMTDLY: t/t_net_delay.v:21:14: Ignoring delay on this statement due to --no-timing
-                                       : ... note: In instance 't'
-   21 |    wire[3:0] #3 val2;
-      |              ^
-%Warning-ASSIGNDLY: t/t_net_delay.v:22:14: Ignoring timing control on this assignment/primitive due to --no-timing
-                                         : ... note: In instance 't'
-   22 |    wire[3:0] #5 val3 = cyc;
-      |              ^
-                    ... For warning description see https://verilator.org/warn/ASSIGNDLY?v=latest
-                    ... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
 %Warning-STMTDLY: t/t_net_delay.v:23:14: Ignoring delay on this statement due to --no-timing
                                        : ... note: In instance 't'
-   23 |    wire[3:0] #5 val4;
+   23 |    wire[3:0] #3 val2;
       |              ^
 %Warning-ASSIGNDLY: t/t_net_delay.v:24:14: Ignoring timing control on this assignment/primitive due to --no-timing
                                          : ... note: In instance 't'
-   24 |    wire[3:0] #3 val5 = x, val6 = cyc;
+   24 |    wire[3:0] #5 val3 = cyc;
       |              ^
-%Warning-ASSIGNDLY: t/t_net_delay.v:27:11: Ignoring timing control on this assignment/primitive due to --no-timing
-                                         : ... note: In instance 't'
-   27 |    assign #3 val2 = cyc;
-      |           ^
-%Warning-STMTDLY: t/t_net_delay.v:39:26: Ignoring delay on this statement due to --no-timing
+                    ... For warning description see https://verilator.org/warn/ASSIGNDLY?v=latest
+                    ... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message.
+%Warning-STMTDLY: t/t_net_delay.v:25:14: Ignoring delay on this statement due to --no-timing
                                        : ... note: In instance 't'
-   39 |    always @(posedge clk) #1 begin
+   25 |    wire[3:0] #5 val4;
+      |              ^
+%Warning-ASSIGNDLY: t/t_net_delay.v:26:14: Ignoring timing control on this assignment/primitive due to --no-timing
+                                         : ... note: In instance 't'
+   26 |    wire[3:0] #3 val5 = x, val6 = cyc;
+      |              ^
+%Warning-ASSIGNDLY: t/t_net_delay.v:29:11: Ignoring timing control on this assignment/primitive due to --no-timing
+                                         : ... note: In instance 't'
+   29 |    assign #3 val2 = cyc;
+      |           ^
+%Warning-STMTDLY: t/t_net_delay.v:41:26: Ignoring delay on this statement due to --no-timing
+                                       : ... note: In instance 't'
+   41 |    always @(posedge clk) #1 begin
       |                          ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_net_delay.v b/test_regress/t/t_net_delay.v
index 514504a6b..9822f1827 100644
--- a/test_regress/t/t_net_delay.v
+++ b/test_regress/t/t_net_delay.v
@@ -9,14 +9,16 @@
 
 module t;
    // verilator lint_off UNOPTFLAT
+   // verilator lint_off PROCASSINIT
    logic clk = 0;
    // verilator lint_on UNOPTFLAT
+   // verilator lint_on PROCASSINIT
    always #2 clk = ~clk;
 
    // verilator lint_off UNDRIVEN
    wire[3:0] x;
    // verilator lint_on UNDRIVEN
-   reg[3:0] cyc = 0;
+   bit [3:0] cyc;
    wire[3:0] #3 val1;
    wire[3:0] #3 val2;
    wire[3:0] #5 val3 = cyc;

From 2c0372acdfce790e93d692175cc36b9cbe56f0ca Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 30 Apr 2025 23:02:19 -0400
Subject: [PATCH 018/211] Tests: Fix relocation of extract tests

---
 test_regress/t/t_assert_comp_bad.py              | 16 ++++++++--------
 test_regress/t/t_lint_badvltpragma_bad.py        |  9 +++++++--
 test_regress/t/t_lint_didnotconverge_bad.py      |  4 ++--
 .../t/t_lint_didnotconverge_nodbg_bad.py         |  2 +-
 test_regress/t/t_lint_multidriven_bad.py         |  4 ++--
 test_regress/t/t_lint_pinmissing_bad.py          |  4 ++--
 test_regress/t/t_lint_pkgnodecl_bad.py           |  4 ++--
 test_regress/t/t_lint_procassinit_bad.py         | 11 ++++++++---
 test_regress/t/t_lint_stmtdly_bad.py             |  4 ++--
 test_regress/t/t_lint_widthexpand_docs_bad.py    |  6 +++---
 test_regress/t/t_var_bad_hide_docs.py            |  4 ++--
 11 files changed, 39 insertions(+), 29 deletions(-)

diff --git a/test_regress/t/t_assert_comp_bad.py b/test_regress/t/t_assert_comp_bad.py
index 12cec4f93..114fbe952 100755
--- a/test_regress/t/t_assert_comp_bad.py
+++ b/test_regress/t/t_assert_comp_bad.py
@@ -23,35 +23,35 @@ test.compile(verilator_flags2=['--assert'],
              expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_USERWARN_faulty.rst",
+             out_filename=root + "/docs/gen/ex_USERWARN_faulty.rst",
              regexp=r'\$warn.*User')
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_USERERROR_faulty.rst",
+             out_filename=root + "/docs/gen/ex_USERERROR_faulty.rst",
              regexp=r'\$error.*User')
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_USERINFO_faulty.rst",
+             out_filename=root + "/docs/gen/ex_USERINFO_faulty.rst",
              regexp=r'\$info.*User')
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_USERFATAL_faulty.rst",
+             out_filename=root + "/docs/gen/ex_USERFATAL_faulty.rst",
              regexp=r'\$fatal.*User')
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_USERWARN_msg.rst",
+             out_filename=root + "/docs/gen/ex_USERWARN_msg.rst",
              regexp=r'USERWARN:.* User')
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_USERERROR_msg.rst",
+             out_filename=root + "/docs/gen/ex_USERERROR_msg.rst",
              regexp=r'USERERROR:.* User')
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_USERINFO_msg.rst",
+             out_filename=root + "/docs/gen/ex_USERINFO_msg.rst",
              regexp=r'-Info:.* User')
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_USERFATAL_msg.rst",
+             out_filename=root + "/docs/gen/ex_USERFATAL_msg.rst",
              regexp=r'USERFATAL:.* User')
 
 test.passes()
diff --git a/test_regress/t/t_lint_badvltpragma_bad.py b/test_regress/t/t_lint_badvltpragma_bad.py
index 4ddd05c4a..1c907c181 100755
--- a/test_regress/t/t_lint_badvltpragma_bad.py
+++ b/test_regress/t/t_lint_badvltpragma_bad.py
@@ -11,14 +11,19 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
+root = ".."
+
+if not os.path.exists(root + "/.git"):
+    test.skip("Not in a git repository")
+
 test.lint(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_BADVLTPRAGMA_faulty.rst",
+             out_filename=root + "/docs/gen/ex_BADVLTPRAGMA_faulty.rst",
              lines="7")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_BADVLTPRAGMA_msg.rst",
+             out_filename=root + "/docs/gen/ex_BADVLTPRAGMA_msg.rst",
              lines="1-3")
 
 test.passes()
diff --git a/test_regress/t/t_lint_didnotconverge_bad.py b/test_regress/t/t_lint_didnotconverge_bad.py
index 40e40f26e..62e56833c 100755
--- a/test_regress/t/t_lint_didnotconverge_bad.py
+++ b/test_regress/t/t_lint_didnotconverge_bad.py
@@ -21,11 +21,11 @@ test.compile(verilator_flags2=["--prof-cfuncs"])
 test.execute(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_DIDNOTCONVERGE_faulty.rst",
+             out_filename=root + "/docs/gen/ex_DIDNOTCONVERGE_faulty.rst",
              lines="16-17")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_DIDNOTCONVERGE_msg.rst",
+             out_filename=root + "/docs/gen/ex_DIDNOTCONVERGE_msg.rst",
              lines="1-2")
 
 test.passes()
diff --git a/test_regress/t/t_lint_didnotconverge_nodbg_bad.py b/test_regress/t/t_lint_didnotconverge_nodbg_bad.py
index 1d53c8c93..4ca34912b 100755
--- a/test_regress/t/t_lint_didnotconverge_nodbg_bad.py
+++ b/test_regress/t/t_lint_didnotconverge_nodbg_bad.py
@@ -22,7 +22,7 @@ test.compile(make_flags=['CPPFLAGS_ADD=-UVL_DEBUG'])
 test.execute(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_DIDNOTCONVERGE_nodbg_msg.rst",
+             out_filename=root + "/docs/gen/ex_DIDNOTCONVERGE_nodbg_msg.rst",
              lines="1")
 
 test.passes()
diff --git a/test_regress/t/t_lint_multidriven_bad.py b/test_regress/t/t_lint_multidriven_bad.py
index ed3410fdd..f84ef04a2 100755
--- a/test_regress/t/t_lint_multidriven_bad.py
+++ b/test_regress/t/t_lint_multidriven_bad.py
@@ -19,11 +19,11 @@ if not os.path.exists(root + "/.git"):
 test.lint(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_MULTIDRIVEN_faulty.rst",
+             out_filename=root + "/docs/gen/ex_MULTIDRIVEN_faulty.rst",
              lines="31-36")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_MULTIDRIVEN_msg.rst",
+             out_filename=root + "/docs/gen/ex_MULTIDRIVEN_msg.rst",
              lines="10,11,14")
 
 test.passes()
diff --git a/test_regress/t/t_lint_pinmissing_bad.py b/test_regress/t/t_lint_pinmissing_bad.py
index 3f80106f9..78a6d6a13 100755
--- a/test_regress/t/t_lint_pinmissing_bad.py
+++ b/test_regress/t/t_lint_pinmissing_bad.py
@@ -19,11 +19,11 @@ if not os.path.exists(root + "/.git"):
 test.lint(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_PINMISSING_faulty.rst",
+             out_filename=root + "/docs/gen/ex_PINMISSING_faulty.rst",
              lines="7-12")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_PINMISSING_msg.rst",
+             out_filename=root + "/docs/gen/ex_PINMISSING_msg.rst",
              lines="1-1")
 
 test.passes()
diff --git a/test_regress/t/t_lint_pkgnodecl_bad.py b/test_regress/t/t_lint_pkgnodecl_bad.py
index 21d9be319..77102e664 100755
--- a/test_regress/t/t_lint_pkgnodecl_bad.py
+++ b/test_regress/t/t_lint_pkgnodecl_bad.py
@@ -19,11 +19,11 @@ if not os.path.exists(root + "/.git"):
 test.lint(fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_PKGNODECL_faulty.rst",
+             out_filename=root + "/docs/gen/ex_PKGNODECL_faulty.rst",
              lines="7-12")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_PKGNODECL_msg.rst",
+             out_filename=root + "/docs/gen/ex_PKGNODECL_msg.rst",
              lines="1")
 
 test.passes()
diff --git a/test_regress/t/t_lint_procassinit_bad.py b/test_regress/t/t_lint_procassinit_bad.py
index 05ca0a399..28f124234 100755
--- a/test_regress/t/t_lint_procassinit_bad.py
+++ b/test_regress/t/t_lint_procassinit_bad.py
@@ -11,20 +11,25 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
+root = ".."
+
+if not os.path.exists(root + "/.git"):
+    test.skip("Not in a git repository")
+
 test.lint(verilator_flags2=['-Wall -Wno-DECLFILENAME'],
           fails=True,
           expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_PROCASSINIT_faulty.rst",
+             out_filename=root + "/docs/gen/ex_PROCASSINIT_faulty.rst",
              lines="26-32")
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_PROCASSINIT_fixed.rst",
+             out_filename=root + "/docs/gen/ex_PROCASSINIT_fixed.rst",
              lines="36-45")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_PROCASSINIT_msg.rst",
+             out_filename=root + "/docs/gen/ex_PROCASSINIT_msg.rst",
              lines="1-9")
 
 test.passes()
diff --git a/test_regress/t/t_lint_stmtdly_bad.py b/test_regress/t/t_lint_stmtdly_bad.py
index cf06e63a2..953505d81 100755
--- a/test_regress/t/t_lint_stmtdly_bad.py
+++ b/test_regress/t/t_lint_stmtdly_bad.py
@@ -19,11 +19,11 @@ if not os.path.exists(root + "/.git"):
 test.lint(verilator_flags2=["--no-timing"], fails=True, expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_STMTDLY_faulty.rst",
+             out_filename=root + "/docs/gen/ex_STMTDLY_faulty.rst",
              lines="10")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_STMTDLY_msg.rst",
+             out_filename=root + "/docs/gen/ex_STMTDLY_msg.rst",
              lines="1")
 
 test.passes()
diff --git a/test_regress/t/t_lint_widthexpand_docs_bad.py b/test_regress/t/t_lint_widthexpand_docs_bad.py
index 2b57b2bd5..6d7a81fa7 100755
--- a/test_regress/t/t_lint_widthexpand_docs_bad.py
+++ b/test_regress/t/t_lint_widthexpand_docs_bad.py
@@ -21,16 +21,16 @@ test.lint(verilator_flags2=["--lint-only"],
           expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_WIDTHEXPAND_1_faulty.rst",
+             out_filename=root + "/docs/gen/ex_WIDTHEXPAND_1_faulty.rst",
              lines="8-10")
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_WIDTHEXPAND_1_msg.rst",
+             out_filename=root + "/docs/gen/ex_WIDTHEXPAND_1_msg.rst",
              lineno_adjust=-7,
              regexp=r'Warning-WIDTH')
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_WIDTHEXPAND_1_fixed.rst",
+             out_filename=root + "/docs/gen/ex_WIDTHEXPAND_1_fixed.rst",
              lines="18")
 
 test.passes()
diff --git a/test_regress/t/t_var_bad_hide_docs.py b/test_regress/t/t_var_bad_hide_docs.py
index fea969814..837cb2dc9 100755
--- a/test_regress/t/t_var_bad_hide_docs.py
+++ b/test_regress/t/t_var_bad_hide_docs.py
@@ -21,11 +21,11 @@ test.lint(verilator_flags2=["--lint-only -Wwarn-VARHIDDEN"],
           expect_filename=test.golden_filename)
 
 test.extract(in_filename=test.top_filename,
-             out_filename="../docs/gen/ex_VARHIDDEN_faulty.rst",
+             out_filename=root + "/docs/gen/ex_VARHIDDEN_faulty.rst",
              regexp=r'(module t|integer|endmodule)')
 
 test.extract(in_filename=test.golden_filename,
-             out_filename="../docs/gen/ex_VARHIDDEN_msg.rst",
+             out_filename=root + "/docs/gen/ex_VARHIDDEN_msg.rst",
              lineno_adjust=-6,
              regexp=r'(var_bad_hide)')
 

From 3b8d10cae5caf16b29bc31c690e143813b45d823 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 2 May 2025 07:26:56 -0400
Subject: [PATCH 019/211] Commentary

---
 docs/guide/warnings.rst | 24 ++++++++++++------------
 docs/spelling.txt       |  2 ++
 2 files changed, 14 insertions(+), 12 deletions(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 9e03d38d2..0a97c30e1 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1463,15 +1463,7 @@ List Of Warnings
    than zero, when it is to be used in a preprocessor expression.
 
 
-.. option:: PROCASSWIRE
-
-   .. TODO better example
-
-   An error that a procedural assignment is setting a wire. According to IEEE,
-   a var/reg must be used as the target of procedural assignments.
-
-
-.. option:: PROCINITASSIGN
+.. option:: PROCASSINIT
 
    Warns that the specified signal is given an initial value where it is
    declared, and is also driven in an always process.  Typically such
@@ -1480,15 +1472,15 @@ List Of Warnings
 
    Faulty example:
 
-   .. include:: ../../docs/gen/ex_PROCINITASSIGN_faulty.rst
+   .. include:: ../../docs/gen/ex_PROCASSINIT_faulty.rst
 
    Results in:
 
-   .. include:: ../../docs/gen/ex_PROCINITASSIGN_msg.rst
+   .. include:: ../../docs/gen/ex_PROCASSINIT_msg.rst
 
    One possible fix, adding a reset to the always:
 
-   .. include:: ../../docs/gen/ex_PROCINITASSIGN_fixed.rst
+   .. include:: ../../docs/gen/ex_PROCASSINIT_fixed.rst
 
    Alternatively, use an initial block for the initialization:
 
@@ -1500,6 +1492,14 @@ List Of Warnings
    correctly.
 
 
+.. option:: PROCASSWIRE
+
+   .. TODO better example
+
+   An error that a procedural assignment is setting a wire. According to IEEE,
+   a var/reg must be used as the target of procedural assignments.
+
+
 .. option:: PROFOUTOFDATE
 
    Warns that threads were scheduled using estimated costs, even though
diff --git a/docs/spelling.txt b/docs/spelling.txt
index d2326c6eb..fe6ee5665 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -273,6 +273,7 @@ Mednick
 Mei
 Melo
 Menküc
+Menon
 Michail
 Michiels
 Microsystems
@@ -303,6 +304,7 @@ Nauticus
 Newgard
 Nigam
 Nikana
+Niraj
 Niranjan
 Nitza
 Noack

From 15ebbd309f72639cf0af0bf57e7adee410f5b1e6 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 2 May 2025 07:36:42 -0400
Subject: [PATCH 020/211] Fix always processes ignoring $finish (#5971).

---
 Changes                                |  1 +
 src/V3EmitCMain.cpp                    |  4 ++--
 src/V3Sched.cpp                        | 10 ++++++--
 test_regress/t/t_timing_debug1.out     |  3 ---
 test_regress/t/t_timing_finish2.py     | 18 ++++++++++++++
 test_regress/t/t_timing_finish2.v      | 33 ++++++++++++++++++++++++++
 test_regress/t/t_timing_trace.out      |  3 +--
 test_regress/t/t_timing_trace_fst.out  |  5 ++--
 test_regress/t/t_timing_trace_saif.out |  4 ++--
 test_regress/t/t_trace_timing1.out     |  2 +-
 10 files changed, 68 insertions(+), 15 deletions(-)
 create mode 100755 test_regress/t/t_timing_finish2.py
 create mode 100644 test_regress/t/t_timing_finish2.v

diff --git a/Changes b/Changes
index 786656ca0..5e407d7a1 100644
--- a/Changes
+++ b/Changes
@@ -18,6 +18,7 @@ Verilator 5.037 devel
 * Fix filename backslash escapes in C code (#5947).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix constant propagation making upper bits Xs (#5969).
+* Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 985a9cea9..2abdcd70b 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -77,7 +77,7 @@ private:
         puts("\n");
 
         puts("// Simulate until $finish\n");
-        puts("while (!contextp->gotFinish()) {\n");
+        puts("while (VL_LIKELY(!contextp->gotFinish())) {\n");
         puts(/**/ "// Evaluate model\n");
         puts(/**/ "topp->eval();\n");
         puts(/**/ "// Advance time\n");
@@ -93,7 +93,7 @@ private:
         puts("}\n");
         puts("\n");
 
-        puts("if (!contextp->gotFinish()) {\n");
+        puts("if (VL_LIKELY(!contextp->gotFinish())) {\n");
         puts(/**/ "VL_DEBUG_IF(VL_PRINTF(\"+ Exiting without $finish; no events left\\n\"););\n");
         puts("}\n");
         puts("\n");
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index a0a7b82dd..8b2b12629 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -435,8 +435,14 @@ void orderSequentially(AstCFunc* funcp, const LogicByScope& lbs) {
                         if (VN_IS(procp, Always)) {
                             subFuncp->slow(false);
                             FileLine* const flp = procp->fileline();
-                            bodyp
-                                = new AstWhile{flp, new AstConst{flp, AstConst::BitTrue{}}, bodyp};
+                            bodyp = new AstWhile{
+                                flp,
+                                // If we change to use exceptions to handle finish/stop,
+                                // this can get removed
+                                new AstCExpr{flp,
+                                             "VL_LIKELY(!vlSymsp->_vm_contextp__->gotFinish())", 1,
+                                             true},
+                                bodyp};
                         }
                     }
                     subFuncp->addStmtsp(bodyp);
diff --git a/test_regress/t/t_timing_debug1.out b/test_regress/t/t_timing_debug1.out
index 0d1f5f568..eefec27ca 100644
--- a/test_regress/t/t_timing_debug1.out
+++ b/test_regress/t/t_timing_debug1.out
@@ -2354,7 +2354,6 @@
 *-* All Finished *-*
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:10
 -V{t#,#}             Resuming: Process waiting at t/t_timing_sched.v:50
--V{t#,#}         Suspending process waiting for @(posedge t.clk2) at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_comb__TOP__0
 -V{t#,#}+    Vt_timing_debug1___024root___eval_phase__act
@@ -2362,8 +2361,6 @@
 -V{t#,#}+    Vt_timing_debug1___024root___dump_triggers__act
 -V{t#,#}         'act' region trigger index 0 is active: @([hybrid] t.clk1)
 -V{t#,#}+    Vt_timing_debug1___024root___timing_commit
--V{t#,#}         Committing processes waiting for @(posedge t.clk2):
--V{t#,#}           - Process waiting at t/t_timing_sched.v:50
 -V{t#,#}+    Vt_timing_debug1___024root___timing_resume
 -V{t#,#}+    Vt_timing_debug1___024root___eval_act
 -V{t#,#}+    Vt_timing_debug1___024root___act_sequent__TOP__0
diff --git a/test_regress/t/t_timing_finish2.py b/test_regress/t/t_timing_finish2.py
new file mode 100755
index 000000000..bd059b0f2
--- /dev/null
+++ b/test_regress/t/t_timing_finish2.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_timing_finish2.v b/test_regress/t/t_timing_finish2.v
new file mode 100644
index 000000000..c252cf453
--- /dev/null
+++ b/test_regress/t/t_timing_finish2.v
@@ -0,0 +1,33 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module tb2 ();
+   parameter CLK_PERIOD = 2;
+
+   reg clk = 1'b0;
+   int messages;
+
+   always #(CLK_PERIOD / 2) clk = ~clk;
+
+   always begin
+      int counter = 0;
+      while (counter < 3) begin
+         counter += 1;
+         $display("[%0t] Running loop %0d", $time, counter);
+         messages += 1;
+         @(posedge clk);
+      end
+
+      $write("[%0t] *-* All Finished *-*\n", $time);
+      $finish;
+   end
+
+   final `checkd(messages, 3);
+
+endmodule
diff --git a/test_regress/t/t_timing_trace.out b/test_regress/t/t_timing_trace.out
index f5a47ca02..504e3a2bc 100644
--- a/test_regress/t/t_timing_trace.out
+++ b/test_regress/t/t_timing_trace.out
@@ -83,6 +83,5 @@ b00000000000000000000000000000101 +
 #95
 1(
 #100
-1%
-1'
 0(
+0)
diff --git a/test_regress/t/t_timing_trace_fst.out b/test_regress/t/t_timing_trace_fst.out
index b95eb3cdb..fe5088ccd 100644
--- a/test_regress/t/t_timing_trace_fst.out
+++ b/test_regress/t/t_timing_trace_fst.out
@@ -1,5 +1,5 @@
 $date
-	Sun Sep 22 22:53:52 2024
+	Fri May  2 07:32:42 2025
 
 $end
 $version
@@ -92,5 +92,4 @@ $end
 1$
 #100
 0$
-1)
-1'
+0&
diff --git a/test_regress/t/t_timing_trace_saif.out b/test_regress/t/t_timing_trace_saif.out
index eacb5a045..8b2e73be3 100644
--- a/test_regress/t/t_timing_trace_saif.out
+++ b/test_regress/t/t_timing_trace_saif.out
@@ -77,8 +77,8 @@
    (rst (T0 0) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 1))
    (clk (T0 50) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 20))
    (a (T0 100) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
-   (b (T0 0) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 1))
-   (c (T0 50) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 11))
+   (b (T0 0) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 2))
+   (c (T0 50) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 10))
    (d (T0 100) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
    (ev (T0 100) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
   )
diff --git a/test_regress/t/t_trace_timing1.out b/test_regress/t/t_trace_timing1.out
index b829e1aca..9aa36ef0b 100644
--- a/test_regress/t/t_trace_timing1.out
+++ b/test_regress/t/t_trace_timing1.out
@@ -22,4 +22,4 @@ b00000000000000000000000000001010 %
 #15
 1$
 #20
-1#
+0$

From 1a1c6e8797c4b998d09fea97feb4b8fa13f140df Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 3 May 2025 04:00:47 -0400
Subject: [PATCH 021/211] Change cell messages to instance to match IEEE

---
 docs/gen/ex_PINMISSING_msg.rst           | 2 +-
 examples/json_py/vl_hier_graph           | 8 ++++----
 src/V3Inline.cpp                         | 4 ++--
 src/V3LinkCells.cpp                      | 6 +++---
 src/V3LinkDot.cpp                        | 2 +-
 src/V3TraceDecl.cpp                      | 2 +-
 test_regress/t/t_inst_missing_bad.out    | 4 ++--
 test_regress/t/t_inst_pin_place_bad.out  | 2 +-
 test_regress/t/t_lint_pindup_bad.out     | 2 +-
 test_regress/t/t_lint_pinmissing_bad.out | 2 +-
 test_regress/t/t_udp_bad.out             | 2 +-
 11 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/docs/gen/ex_PINMISSING_msg.rst b/docs/gen/ex_PINMISSING_msg.rst
index c1a06525e..eef3cdb1a 100644
--- a/docs/gen/ex_PINMISSING_msg.rst
+++ b/docs/gen/ex_PINMISSING_msg.rst
@@ -1,4 +1,4 @@
 .. comment: generated by t_lint_pinmissing_bad
 .. code-block::
 
-   %Warning-PINMISSING: example.v:1:8 Cell has missing pin: 'port'
+   %Warning-PINMISSING: example.v:1:8 Instance has missing pin: 'port'
diff --git a/examples/json_py/vl_hier_graph b/examples/json_py/vl_hier_graph
index 6070768b3..c38520816 100755
--- a/examples/json_py/vl_hier_graph
+++ b/examples/json_py/vl_hier_graph
@@ -58,11 +58,11 @@ class VlHierGraph:
                     top_module = False
                 fh.write("];\n")
 
-                cells = self.flatten(mod, lambda n: n['type'] == "CELL")
-                for cell in cells:
-                    def_number = self.addr_to_vertex_number(cell['modp'])
+                instances = self.flatten(mod, lambda n: n['type'] == "CELL")
+                for inst in instances:
+                    def_number = self.addr_to_vertex_number(inst['modp'])
                     fh.write("  n%d->n%d [label=\"%s\"];\n" %
-                             (mod_number, def_number, cell['name']))
+                             (mod_number, def_number, inst['name']))
 
             fh.write("}\n")
 
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index a7092fbb0..53081e2a7 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -664,8 +664,8 @@ void V3Inline::inlineAll(AstNetlist* nodep) {
         for (AstNodeModule* modp = v3Global.rootp()->modulesp(); modp;
              modp = VN_AS(modp->nextp(), NodeModule)) {
             UASSERT_OBJ(!moduleState(modp).m_inlined, modp,
-                        "Inlined module should have been deleted when the last cell referencing "
-                        "it was inlined");
+                        "Inlined module should have been deleted when the last instance "
+                        "referencing it was inlined");
         }
     }
 
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index f1cf0deb3..ed24b42d7 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -410,10 +410,10 @@ class LinkCellsVisitor final : public VNVisitor {
                 if (!pinp->exprp()) {
                     if (pinp->name().substr(0, 11) == "__pinNumber") {
                         pinp->v3warn(PINNOCONNECT,
-                                     "Cell pin is not connected: " << pinp->prettyNameQ());
+                                     "Instance pin is not connected: " << pinp->prettyNameQ());
                     } else {
                         pinp->v3warn(PINCONNECTEMPTY,
-                                     "Cell pin connected by name with empty reference: "
+                                     "Instance pin connected by name with empty reference: "
                                          << pinp->prettyNameQ());
                     }
                 }
@@ -471,7 +471,7 @@ class LinkCellsVisitor final : public VNVisitor {
                                 nodep->addPinsp(newp);
                             } else {
                                 nodep->v3warn(PINMISSING,
-                                              "Cell has missing pin: "
+                                              "Instance has missing pin: "
                                                   << portp->prettyNameQ() << '\n'
                                                   << nodep->warnContextPrimary() << '\n'
                                                   << portp->warnOther()
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 683bc3a50..39e8d4510 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2696,7 +2696,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         VL_RESTORER(m_usedPins);
         m_usedPins.clear();
         UASSERT_OBJ(nodep->modp(), nodep,
-                    "Cell has unlinked module");  // V3LinkCell should have errored out
+                    "Instance has unlinked module");  // V3LinkCell should have errored out
         VL_RESTORER(m_cellp);
         VL_RESTORER(m_pinSymp);
         {
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index ff7d92f4b..1b4afbf44 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -413,7 +413,7 @@ class TraceDeclVisitor final : public VNVisitor {
                     // This is a subscope: insert a placeholder to be fixed up later
                     AstCell* const cellp = entry.cellp();
                     AstNodeStmt* const stmtp = new AstComment{
-                        cellp->fileline(), "Cell init for: " + cellp->prettyName()};
+                        cellp->fileline(), "Instance init for: " + cellp->prettyName()};
                     addToSubFunc(stmtp);
                     m_cellInitPlaceholders.emplace_back(nodep, cellp, stmtp);
                 }
diff --git a/test_regress/t/t_inst_missing_bad.out b/test_regress/t/t_inst_missing_bad.out
index 2bbd2390d..8407aaff4 100644
--- a/test_regress/t/t_inst_missing_bad.out
+++ b/test_regress/t/t_inst_missing_bad.out
@@ -1,9 +1,9 @@
-%Warning-PINNOCONNECT: t/t_inst_missing_bad.v:13:17: Cell pin is not connected: '__pinNumber2'
+%Warning-PINNOCONNECT: t/t_inst_missing_bad.v:13:17: Instance pin is not connected: '__pinNumber2'
    13 |    sub sub (ok, , nc);
       |                 ^
                        ... For warning description see https://verilator.org/warn/PINNOCONNECT?v=latest
                        ... Use "/* verilator lint_off PINNOCONNECT */" and lint_on around source to disable this message.
-%Warning-PINMISSING: t/t_inst_missing_bad.v:13:8: Cell has missing pin: 'missing'
+%Warning-PINMISSING: t/t_inst_missing_bad.v:13:8: Instance has missing pin: 'missing'
    13 |    sub sub (ok, , nc);
       |        ^~~
                      t/t_inst_missing_bad.v:16:51: ... Location of port declaration
diff --git a/test_regress/t/t_inst_pin_place_bad.out b/test_regress/t/t_inst_pin_place_bad.out
index dd548becf..0a305f913 100644
--- a/test_regress/t/t_inst_pin_place_bad.out
+++ b/test_regress/t/t_inst_pin_place_bad.out
@@ -1,4 +1,4 @@
-%Warning-PINMISSING: t/t_inst_pin_place_bad.v:21:7: Cell has missing pin: 'pin_1'
+%Warning-PINMISSING: t/t_inst_pin_place_bad.v:21:7: Instance has missing pin: 'pin_1'
    21 |     ) i_sub (
       |       ^~~~~
                      t/t_inst_pin_place_bad.v:11:11: ... Location of port declaration
diff --git a/test_regress/t/t_lint_pindup_bad.out b/test_regress/t/t_lint_pindup_bad.out
index b758f052c..ef1bb3d7f 100644
--- a/test_regress/t/t_lint_pindup_bad.out
+++ b/test_regress/t/t_lint_pindup_bad.out
@@ -1,4 +1,4 @@
-%Warning-PINMISSING: t/t_lint_pindup_bad.v:18:4: Cell has missing pin: 'exists'
+%Warning-PINMISSING: t/t_lint_pindup_bad.v:18:4: Instance has missing pin: 'exists'
    18 |    sub (.o(o),
       |    ^~~
                      t/t_lint_pindup_bad.v:32:15: ... Location of port declaration
diff --git a/test_regress/t/t_lint_pinmissing_bad.out b/test_regress/t/t_lint_pinmissing_bad.out
index c86daaab5..7a57cda41 100644
--- a/test_regress/t/t_lint_pinmissing_bad.out
+++ b/test_regress/t/t_lint_pinmissing_bad.out
@@ -1,4 +1,4 @@
-%Warning-PINMISSING: t/t_lint_pinmissing_bad.v:8:8: Cell has missing pin: 'port'
+%Warning-PINMISSING: t/t_lint_pinmissing_bad.v:8:8: Instance has missing pin: 'port'
     8 |    sub sub();   
       |        ^~~
                      t/t_lint_pinmissing_bad.v:11:11: ... Location of port declaration
diff --git a/test_regress/t/t_udp_bad.out b/test_regress/t/t_udp_bad.out
index 3438ee663..e630d303f 100644
--- a/test_regress/t/t_udp_bad.out
+++ b/test_regress/t/t_udp_bad.out
@@ -1,4 +1,4 @@
-%Warning-PINMISSING: t/t_udp_bad.v:10:10: Cell has missing pin: 'c_bad'
+%Warning-PINMISSING: t/t_udp_bad.v:10:10: Instance has missing pin: 'c_bad'
    10 |    udp_x x (a, b);
       |          ^
                      t/t_udp_bad.v:14:28: ... Location of port declaration

From e837f780a22210294e8088e27e6939eecfc986fd Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 3 May 2025 04:25:01 -0400
Subject: [PATCH 022/211] Commentary

---
 docs/guide/exe_verilator.rst | 34 ++++++++++++++++++----------------
 docs/guide/extensions.rst    |  7 ++++---
 docs/guide/languages.rst     |  2 +-
 docs/guide/verilating.rst    |  2 +-
 docs/guide/warnings.rst      |  2 +-
 5 files changed, 25 insertions(+), 22 deletions(-)

diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index c75d21f3a..3024d07f0 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -1,9 +1,9 @@
 .. Copyright 2003-2025 by Wilson Snyder.
 .. SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-=====================
- verilator Arguments
-=====================
+===================
+verilator Arguments
+===================
 
 The following arguments may be passed to the "verilator" executable.
 
@@ -1774,7 +1774,7 @@ Summary:
    them systematically.
 
    The generated file is in the Verilator Configuration format, see
-   :ref:`Configuration Files`. The standard file extension is ".vlt".
+   :ref:`Verilator Configuration Files`. The standard file extension is ".vlt".
    These files can directly be consumed by Verilator, typically by placing
    the filename as part of the Verilator command line options. Waiver files
    need to be listed on the command line before listing the files they are
@@ -2015,18 +2015,20 @@ Summary:
    filenames.
 
 
-.. _Configuration Files:
+.. _Verilator Configuration Files:
 
-=====================
- Configuration Files
-=====================
+=============================
+Verilator Configuration Files
+=============================
 
 In addition to the command line, warnings and other features for the
-:command:`verilator` command may be controlled with configuration files,
-typically named with the `.vlt` extension (what makes it a configuration
-file is the :option:`\`verilator_config` directive).  These files, when
-named `.vlt`, are read before source code files; if this behavior is
-undesired, name the config file with a `.v` suffix.
+:command:`verilator` command may be controlled with Verilator Configuration
+Files, not to be confused with IEEE Configurations blocks
+(`config...endconfig`) inside a file.  Typically named with the `.vlt`
+extension, what makes it a Verilator Configuration File is the
+:option:`\`verilator_config` directive.  These files, when named `.vlt`,
+are read before source code files; if this behavior is undesired, name the
+config file with a `.v` suffix.
 
 An example:
 
@@ -2038,9 +2040,9 @@ An example:
 
 This disables WIDTH warnings globally, and CASEX for a specific file.
 
-Configuration files are fed through the normal Verilog preprocessor prior
-to parsing, so "\`ifdef", "\`define", and comments may be used as if the
-configuration file was standard Verilog code.
+Verilator configuration files are fed through the normal Verilog
+preprocessor prior to parsing, so "\`ifdef", "\`define", and comments may
+be used as if the configuration file was standard Verilog code.
 
 Note that file or line-specific configuration only applies to files read
 after the configuration file. It is therefore recommended to pass the
diff --git a/docs/guide/extensions.rst b/docs/guide/extensions.rst
index b01c28f91..1d54ca0b2 100644
--- a/docs/guide/extensions.rst
+++ b/docs/guide/extensions.rst
@@ -30,7 +30,7 @@ or "`ifdef`"'s may break other tools.
 
    Specifies the entire begin/end block should be ignored for coverage
    analysis.  Must be inside a code block, e.g., within a begin/end pair.
-   Same as :option:`coverage_block_off` in :ref:`Configuration Files`.
+   Same as :option:`coverage_block_off` in :ref:`Verilator Configuration Files`.
 
 .. option:: `error [string]
 
@@ -135,8 +135,9 @@ or "`ifdef`"'s may break other tools.
 
 .. option:: `verilator_config
 
-   Take the remaining text up to the next :option:`\`verilog` mode switch and
-   treat it as Verilator configuration commands.  See :ref:`Configuration Files`.
+   Take the remaining text up to the next :option:`\`verilog` mode switch
+   and treat it as Verilator configuration commands.  See :ref:`Verilator
+   Configuration Files`.
 
 .. option:: `VERILATOR_TIMING
 
diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index a13c11184..f21a2666b 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -6,7 +6,7 @@ Input Languages
 ***************
 
 This section describes the languages Verilator takes as input.  See also
-:ref:`Configuration Files`.
+:ref:`Verilator Configuration Files`.
 
 
 Language Standard Support
diff --git a/docs/guide/verilating.rst b/docs/guide/verilating.rst
index 058caa52f..9b0d3f15b 100644
--- a/docs/guide/verilating.rst
+++ b/docs/guide/verilating.rst
@@ -94,7 +94,7 @@ There are two ways to mark a module:
 
 * Write :option:`/*verilator&32;hier_block*/` metacomment in HDL code.
 
-* Add a :option:`hier_block` line in the :ref:`Configuration Files`.
+* Add a :option:`hier_block` line in the :ref:`Verilator Configuration Files`.
 
 Then pass the :vlopt:`--hierarchical` option to Verilator.
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 0a97c30e1..bafd1827f 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -37,7 +37,7 @@ Warnings may be disabled in multiple ways:
    propagate upwards to any parent file (file that included the file with
    the lint_off).
 
-#. Disable the warning using :ref:`Configuration Files` with a
+#. Disable the warning using :ref:`Verilator Configuration Files` with a
    :option:`lint_off` command.  This is useful when a script suppresses
    warnings, and the Verilog source should not be changed.  This method also
    allows matching on the warning text.

From ea65bcd86b1eaaf34210a3673d57c9bad7696bab Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 3 May 2025 05:30:40 -0400
Subject: [PATCH 023/211] Add lib.map information to unsupported message, etc

---
 docs/guide/languages.rst                |  2 +-
 src/verilog.l                           | 23 ++++++++--------
 src/verilog.y                           | 32 ++++++++++++++++++++++
 test_regress/t/t_config_include_bad.out |  3 ++-
 test_regress/t/t_config_include_bad.py  |  4 +--
 test_regress/t/t_config_libmap.map      | 17 ++++++++++++
 test_regress/t/t_config_libmap.out      | 29 ++++++++++++++++++++
 test_regress/t/t_config_libmap.py       | 18 +++++++++++++
 test_regress/t/t_config_libmap.v        | 12 +++++++++
 test_regress/t/t_config_libmap_inc.map  | 17 ++++++++++++
 test_regress/t/t_dist_copyright.py      |  2 +-
 test_regress/t/t_lint_rsvd_bad.out      | 36 +++++++++++--------------
 12 files changed, 157 insertions(+), 38 deletions(-)
 create mode 100644 test_regress/t/t_config_libmap.map
 create mode 100644 test_regress/t/t_config_libmap.out
 create mode 100755 test_regress/t/t_config_libmap.py
 create mode 100644 test_regress/t/t_config_libmap.v
 create mode 100644 test_regress/t/t_config_libmap_inc.map

diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index f21a2666b..62c50b706 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -536,4 +536,4 @@ $test$plusargs, $value$plusargs
         {VerilatedContext*} ->commandArgs(argc, argv);
 
   to register the command line before calling $test$plusargs or
-  $value$plusargs.
+  $value$plusargs. Or use :vlopt:`--binary` or :vlopt:`--main`.
diff --git a/src/verilog.l b/src/verilog.l
index add1df161..722ed6f3b 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -441,18 +441,19 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   /* Verilog 2001 Config */
 <V01C,V05,VA5,S05,S09,S12,S17,S23,SAX>{
   /*     Generic unsupported keywords */
-  "cell"                { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "config"              { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "design"              { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "endconfig"           { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "incdir"              { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "include"             { FL; yylval.fl->v3warn(E_UNSUPPORTED, "Unsupported: Verilog 2001-config reserved word not implemented;"
-                                                " suggest you want `include instead: '" << yytext << "'");
+  "cell"                { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "config"              { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "design"              { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "endconfig"           { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "incdir"              { FL; ERROR_RSVD_WORD("Verilog 2001-config lib.map"); }
+  "include"             { FL; yylval.fl->v3warn(E_UNSUPPORTED, "Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'\n"
+                                                << yylval.fl->warnMore() << "... Suggest unless in a lib.map file,"
+                                                " want `include instead");
                           FL_BRK; }
-  "instance"            { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "liblist"             { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "library"             { ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "use"                 { ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "instance"            { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "liblist"             { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "library"             { FL; ERROR_RSVD_WORD("Verilog 2001-config lib.map"); }
+  "use"                 { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
 }
 
   /* Verilog 2005 */
diff --git a/src/verilog.y b/src/verilog.y
index f88c4c94a..ebe90b364 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -7733,6 +7733,38 @@ colon<fl>:                      // Generic colon that isn't making a label (e.g.
         |       yP_COLON__FORK                          { $$ = $1; }
         ;
 
+//**********************************************************************
+// Config - config...endconfig
+
+//**********************************************************************
+// Config - lib.map
+
+//UNSUP library_text:  // == IEEE: library_text (note is top-level entry point)
+//UNSUP         library_description                     { }
+//UNSUP |       library_text library_description        { }
+//UNSUP ;
+
+//UNSUP library_description:  // == IEEE: library_description
+//UNSUP //                      // IEEE: library_declaration
+//UNSUP         yLIBRARY idAny/*library_identifier*/ file_path_specList ';'
+//UNSUP                 { BBUNSUP($<fl>1, "Unsupported: config lib.map library"); }
+//UNSUP         yLIBRARY idAny/*library_identifier*/ file_path_specList '-' yINCDIR file_path_specList ';'
+//UNSUP                 { BBUNSUP($<fl>1, "Unsupported: config lib.map library"); }
+//UNSUP //                      // IEEE: include_statement
+//UNSUP |       yINCLUDE file_path_spec ';'             { BBUNSUP($<fl>1, "Unsupported: config include"); }
+//UNSUP |       config_declaration                      { }
+//UNSUP |       ';'                                     { }
+//UNSUP ;
+
+//UNSUP file_path_specList:  // IEEE: file_path_spec { ',' file_path_spec }
+//UNSUP         file_path_spec                          { }
+//UNSUP |       file_path_specList ',' file_path_spec   { }
+//UNSUP ;
+
+//UNSUP file_path_spec:  // IEEE: file_path_spec
+//UNSUP         Needs to be lexer rule, Note '/' '*' must not be a comment.
+//UNSUP ;
+
 //**********************************************************************
 // VLT Files
 
diff --git a/test_regress/t/t_config_include_bad.out b/test_regress/t/t_config_include_bad.out
index b7cc607aa..c076f0ee5 100644
--- a/test_regress/t/t_config_include_bad.out
+++ b/test_regress/t/t_config_include_bad.out
@@ -1,4 +1,5 @@
-%Error-UNSUPPORTED: t/t_config_include_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
+%Error-UNSUPPORTED: t/t_config_include_bad.v:7:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
+                                                : ... Suggest unless in a lib.map file, want `include instead
     7 | include "meant_to_tick_include.v"
       | ^~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_config_include_bad.py b/test_regress/t/t_config_include_bad.py
index acbdae169..cf71fd2b8 100755
--- a/test_regress/t/t_config_include_bad.py
+++ b/test_regress/t/t_config_include_bad.py
@@ -11,8 +11,6 @@ import vltest_bootstrap
 
 test.scenarios('linter')
 
-test.lint(verilator_flags2=["--lint-only -Wwarn-REALCVT"],
-          fails=True,
-          expect_filename=test.golden_filename)
+test.lint(verilator_flags2=["--lint-only"], fails=True, expect_filename=test.golden_filename)
 
 test.passes()
diff --git a/test_regress/t/t_config_libmap.map b/test_regress/t/t_config_libmap.map
new file mode 100644
index 000000000..fe1f6e3f2
--- /dev/null
+++ b/test_regress/t/t_config_libmap.map
@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+//    lib.map file:
+include ./t_config_libmap_inc.map
+
+library rtllib *.v;
+library rtllib2 *.v, *.sv;
+library rtllib3 *.v -incdir *.vh;
+library rtllib4 *.v -incdir *.vh, *.svh;
+
+config cfg;
+   design t;
+endconfig
diff --git a/test_regress/t/t_config_libmap.out b/test_regress/t/t_config_libmap.out
new file mode 100644
index 000000000..d86495d89
--- /dev/null
+++ b/test_regress/t/t_config_libmap.out
@@ -0,0 +1,29 @@
+%Error-UNSUPPORTED: t/t_config_libmap.map:8:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
+                                             : ... Suggest unless in a lib.map file, want `include instead
+    8 | include ./t_config_libmap_inc.map
+      | ^~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: t/t_config_libmap.map:8:9: syntax error, unexpected '.'
+    8 | include ./t_config_libmap_inc.map
+      |         ^
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error-UNSUPPORTED: t/t_config_libmap.map:10:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   10 | library rtllib *.v;
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:11:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   11 | library rtllib2 *.v, *.sv;
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:12:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   12 | library rtllib3 *.v -incdir *.vh;
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:12:29: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'incdir'
+%Error-UNSUPPORTED: t/t_config_libmap.map:13:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   13 | library rtllib4 *.v -incdir *.vh, *.svh;
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:13:29: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'incdir'
+   13 | library rtllib4 *.v -incdir *.vh, *.svh;
+      |                             ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:15:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
+%Error-UNSUPPORTED: t/t_config_libmap.map:16:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
+%Error-UNSUPPORTED: t/t_config_libmap.map:17:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
+%Error: Exiting due to
diff --git a/test_regress/t/t_config_libmap.py b/test_regress/t/t_config_libmap.py
new file mode 100755
index 000000000..14bcdb8d6
--- /dev/null
+++ b/test_regress/t/t_config_libmap.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(verilator_flags2=["--lint-only", "t/" + test.name + ".map"],
+          fails=test.vlt_all,
+          expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_config_libmap.v b/test_regress/t/t_config_libmap.v
new file mode 100644
index 000000000..7bb33e757
--- /dev/null
+++ b/test_regress/t/t_config_libmap.v
@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_config_libmap_inc.map b/test_regress/t/t_config_libmap_inc.map
new file mode 100644
index 000000000..fe1f6e3f2
--- /dev/null
+++ b/test_regress/t/t_config_libmap_inc.map
@@ -0,0 +1,17 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+//    lib.map file:
+include ./t_config_libmap_inc.map
+
+library rtllib *.v;
+library rtllib2 *.v, *.sv;
+library rtllib3 *.v -incdir *.vh;
+library rtllib4 *.v -incdir *.vh, *.svh;
+
+config cfg;
+   design t;
+endconfig
diff --git a/test_regress/t/t_dist_copyright.py b/test_regress/t/t_dist_copyright.py
index 76ef97b24..12c1a4c3d 100755
--- a/test_regress/t/t_dist_copyright.py
+++ b/test_regress/t/t_dist_copyright.py
@@ -12,7 +12,7 @@ import datetime
 
 test.scenarios('dist')
 
-RELEASE_OK_RE = r'(^test_regress/t/.*\.(cpp|h|mk|sv|v|vlt)|^test_regress/t_done/|^examples/)'
+RELEASE_OK_RE = r'(^test_regress/t/.*\.(cpp|h|map|mk|sv|v|vlt)|^test_regress/t_done/|^examples/)'
 
 EXEMPT_AUTHOR_RE = r'(^ci/|^nodist/fastcov.py|^nodist/fuzzer|^test_regress/t/.*\.(cpp|h|v|vlt)$)'
 
diff --git a/test_regress/t/t_lint_rsvd_bad.out b/test_regress/t/t_lint_rsvd_bad.out
index 31cfb628d..c98cecae5 100644
--- a/test_regress/t/t_lint_rsvd_bad.out
+++ b/test_regress/t/t_lint_rsvd_bad.out
@@ -1,42 +1,36 @@
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
     7 | config cfgBad;
-      | ^~~~~~
+      | ^~~~~~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER
-    7 | config cfgBad;
-      |        ^~~~~~
+%Error: t/t_lint_rsvd_bad.v:7:14: syntax error, unexpected IDENTIFIER
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
     8 |    design rtlLib.top;
-      |    ^~~~~~
+      |    ^~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:9:12: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
     9 |    default liblist rtlLib;
-      |            ^~~~~~~
+      |            ^~~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:4: Unsupported: Verilog 2001-config reserved word not implemented: 'instance'
    10 |    instance top.a2 liblist gateLib;
-      |    ^~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:20: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
-   10 |    instance top.a2 liblist gateLib;
-      |                    ^~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
+      |    ^~~~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:28: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
+%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
+                                            : ... Suggest unless in a lib.map file, want `include instead
    11 |    include none;
       |    ^~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config reserved word not implemented: 'library'
+%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
    12 |    library rtlLib *.v;
-      |    ^~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config reserved word not implemented; suggest you want `include instead: 'include'
+      |    ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
+                                            : ... Suggest unless in a lib.map file, want `include instead
    13 |    include aa;
       |    ^~~~~~~
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:14:4: Unsupported: Verilog 2001-config reserved word not implemented: 'use'
    14 |    use gateLib;
-      |    ^~~
+      |    ^~~~~~
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:4: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
    15 |    cell rtlLib.cell;
-      |    ^~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:16: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
-   15 |    cell rtlLib.cell;
-      |                ^~~~
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:20: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
 %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:16:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
-   16 | endconfig
-      | ^~~~~~~~~
 %Error: Exiting due to

From 70c84d3abdb32801bce81a066e976e199af728c9 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 4 May 2025 16:31:27 +0100
Subject: [PATCH 024/211] Preserve C++ widths in V3Expand (#5975)

During V3Expand, some w32/1 (width == 32, widthMin == 1), nodes (e.g.:
RedOr) are replaced with w1 nodes (width == widthMin == 1) (e.g.: Neq).
However, V3Expand runs after V3Clean, when we are in C++ width world,
so we need to preserve the width/widthMin distinction, otherwise a later
constant folding can eliminate e.g. a necessary AstAnd used clear an
intermediate result (isAllOnes is true for a Const 1 with w1, but false
for a Const 1 with w32/1).

Attempting to fix by preserving all width/widthMin during a replacement
in V3Expand.

DFG itself is fine, but the transformed code hits the above.

Fixes #5953
---
 src/V3Expand.cpp                            |  5 ++
 test_regress/t/t_opt_expand_keep_widths.out |  7 +++
 test_regress/t/t_opt_expand_keep_widths.py  | 18 ++++++
 test_regress/t/t_opt_expand_keep_widths.v   | 61 +++++++++++++++++++++
 4 files changed, 91 insertions(+)
 create mode 100644 test_regress/t/t_opt_expand_keep_widths.out
 create mode 100755 test_regress/t/t_opt_expand_keep_widths.py
 create mode 100644 test_regress/t/t_opt_expand_keep_widths.v

diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index fb348121b..395ba5e04 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -123,6 +123,11 @@ class ExpandVisitor final : public VNVisitor {
     }
     static void replaceWithDelete(AstNode* nodep, AstNode* newp) {
         newp->user1(1);  // Already processed, don't need to re-iterate
+        if (newp->width() != nodep->width()) {
+            UASSERT_OBJ(newp->widthMin() == nodep->widthMin(), nodep,
+                        "Replacement width mismatch");
+            newp->dtypeChgWidth(nodep->width(), nodep->widthMin());
+        }
         nodep->replaceWith(newp);
         VL_DO_DANGLING(nodep->deleteTree(), nodep);
     }
diff --git a/test_regress/t/t_opt_expand_keep_widths.out b/test_regress/t/t_opt_expand_keep_widths.out
new file mode 100644
index 000000000..f310ca87a
--- /dev/null
+++ b/test_regress/t/t_opt_expand_keep_widths.out
@@ -0,0 +1,7 @@
+[0] in5=0 clock_10=0 clock_12=0 out18=1
+[5] in5=0 clock_10=0 clock_12=1 out18=1
+[10] in5=0 clock_10=0 clock_12=0 out18=1
+[15] in5=0 clock_10=1 clock_12=0 out18=1
+[15] in5=0 clock_10=1 clock_12=0 out18=0
+[20] in5=0 clock_10=0 clock_12=0 out18=0
+*-* All Finished *-*
diff --git a/test_regress/t/t_opt_expand_keep_widths.py b/test_regress/t/t_opt_expand_keep_widths.py
new file mode 100755
index 000000000..fa87f0e9d
--- /dev/null
+++ b/test_regress/t/t_opt_expand_keep_widths.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute(expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_opt_expand_keep_widths.v b/test_regress/t/t_opt_expand_keep_widths.v
new file mode 100644
index 000000000..a19565b00
--- /dev/null
+++ b/test_regress/t/t_opt_expand_keep_widths.v
@@ -0,0 +1,61 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module gymhnulbvj (in5, clock_10, clock_12, out18);
+
+   input wire [23:22] in5;
+   wire [29:1] wire_4;
+   reg reg_35;
+   output wire out18;
+   input wire clock_10;
+   input wire clock_12;
+
+   // verilator lint_off WIDTH
+   assign wire_4 = ~ in5[22];
+   assign out18 = reg_35 ? 0 : !(!(~(wire_4[6:5] | 8'hc6)));
+   // verilator lint_on WIDTH
+
+   always @(posedge clock_10 or posedge clock_12) begin
+      if (clock_12) begin
+         reg_35 <= 0;
+      end
+      else begin
+         // verilator lint_off WIDTH
+         reg_35 <= wire_4;
+         // verilator lint_on WIDTH
+      end
+   end
+endmodule
+
+module t;
+   reg [23:22] in5;
+   reg clock_10 = 0;
+   reg clock_12 = 0;
+   wire out18;
+
+   gymhnulbvj uut (
+                   .in5(in5),
+                   .clock_10(clock_10),
+                   .clock_12(clock_12),
+                   .out18(out18)
+                   );
+
+   initial begin
+      $monitor("[%0t] in5=%d clock_10=%d clock_12=%d out18=%d", $time, in5, clock_10, clock_12, out18);
+
+      in5 = 2'b00;
+      #5 clock_12 = 1;
+      #5 clock_12 = 0;
+
+      #5 clock_10 = 1;
+      #5 clock_10 = 0;
+
+      #10;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 223bb9ba9add0b0f41d17045a2c12f50e3f8fe01 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 4 May 2025 19:28:51 +0100
Subject: [PATCH 025/211] Fix streaming to/from packed arrays (#5976)

bug from 6bb57e463035a94fafaefe652e747303f9c548e0

Fixes RTLMeter OpenTitan. Fixes #5955.
---
 .github/workflows/rtlmeter.yml   |  4 +-
 src/V3Width.cpp                  |  5 +-
 test_regress/t/t_stream5.v       | 15 ++++--
 test_regress/t/t_stream_unpack.v | 80 ++++++++++++++++++++++++++++++++
 4 files changed, 96 insertions(+), 8 deletions(-)

diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index 187d9d60f..cb2e43edf 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -52,7 +52,7 @@ jobs:
           - "OpenPiton:1x1:*"
           - "OpenPiton:2x2:*"
           - "OpenPiton:4x4:*"
-          # - "OpenTitan:*"
+          - "OpenTitan:*"
           - "VeeR-EH1:asic*"
           - "VeeR-EH1:default*"
           - "VeeR-EH1:hiperf*"
@@ -92,7 +92,7 @@ jobs:
           - "OpenPiton:1x1:*"
           - "OpenPiton:2x2:*"
           - "OpenPiton:4x4:*"
-          # - "OpenTitan:*"
+          - "OpenTitan:*"
           - "VeeR-EH1:asic*"
           - "VeeR-EH1:default*"
           - "VeeR-EH1:hiperf*"
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 5e75473b2..ad749136d 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5233,7 +5233,7 @@ class WidthVisitor final : public VNVisitor {
                                            << lwidth << " bits) is narrower than the stream ("
                                            << rwidth << " bits) (IEEE 1800-2023 11.4.14)");
                 }
-                if (VN_IS(lhsDTypeSkippedRefp, NodeArrayDType)) {
+                if (VN_IS(lhsDTypeSkippedRefp, UnpackArrayDType)) {
                     streamp->unlinkFrBack();
                     nodep->rhsp(new AstCvtPackedToArray{streamp->fileline(), streamp,
                                                         lhsDTypeSkippedRefp});
@@ -5241,7 +5241,6 @@ class WidthVisitor final : public VNVisitor {
             }
             if (const AstNodeStream* const streamp = VN_CAST(nodep->lhsp(), NodeStream)) {
                 const AstNodeDType* const rhsDTypep = nodep->rhsp()->dtypep()->skipRefp();
-
                 const int lwidth = widthUnpacked(streamp->lhsp()->dtypep()->skipRefp());
                 const int rwidth = widthUnpacked(rhsDTypep);
                 if (rwidth != 0 && rwidth < lwidth) {
@@ -5251,7 +5250,7 @@ class WidthVisitor final : public VNVisitor {
                                            << " bits, but source expression only provides "
                                            << rwidth << " bits (IEEE 1800-2023 11.4.14.3)");
                 }
-                if (VN_IS(rhsDTypep, NodeArrayDType)) {
+                if (VN_IS(rhsDTypep, UnpackArrayDType)) {
                     AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
                     nodep->rhsp(
                         new AstCvtArrayToPacked{rhsp->fileline(), rhsp, streamp->dtypep()});
diff --git a/test_regress/t/t_stream5.v b/test_regress/t/t_stream5.v
index 1eab118d9..8ece51a8f 100644
--- a/test_regress/t/t_stream5.v
+++ b/test_regress/t/t_stream5.v
@@ -8,15 +8,21 @@ module t(/*AUTOARG*/);
 
    logic [15:0] i16;
    logic [15:0] o16;
+   logic [3:0][3:0] p16;
    logic [31:0] i32;
    logic [31:0] o32;
+   logic [7:0][3:0] p32;
    logic [63:0] i64;
    logic [63:0] o64;
+   logic [15:0][3:0] p64;
 
    always_comb begin
       o16 = {<<4{i16}};
+      p16 = {<<4{i16}};
       o32 = {<<4{i32}};
+      p32 = {<<4{i32}};
       o64 = {<<4{i64}};
+      p64 = {<<4{i64}};
    end
 
    initial begin
@@ -24,12 +30,15 @@ module t(/*AUTOARG*/);
       i32 = 32'hcafefade;
       i64 = 64'hdeaddeedcafefade;
       #100ns;
-      $display("o16=0x%h i16=0x%h", o16, i16);
+      $display("o16=0x%h p16=0x%h i16=0x%h", o16, p16, i16);
       if (o16 != 16'hEDAF) $stop;
-      $display("o32=0x%h i32=0x%h", o32, i32);
+      if (p16 != 16'hEDAF) $stop;
+      $display("o32=0x%h p32=0x%h i32=0x%h", o32, p32, i32);
       if (o32 != 32'hEDAFEFAC) $stop;
-      $display("o64=0x%h i64=0x%h", o64, i64);
+      if (p32 != 32'hEDAFEFAC) $stop;
+      $display("o64=0x%h p64=0x%h i64=0x%h", o64, p64, i64);
       if (o64 != 64'hEDAFEFACDEEDDAED) $stop;
+      if (p64 != 64'hEDAFEFACDEEDDAED) $stop;
       $write("*-* All Finished *-*\n");
       $finish;
    end
diff --git a/test_regress/t/t_stream_unpack.v b/test_regress/t/t_stream_unpack.v
index 895b56a5f..fce34bb57 100644
--- a/test_regress/t/t_stream_unpack.v
+++ b/test_regress/t/t_stream_unpack.v
@@ -20,8 +20,10 @@ module t (/*AUTOARG*/);
       bit6_unpacked_t arr;
       bit [1:0] arr2[3];
       bit6_t arr6[1];
+      bit6_t [0:0] parr6;
       bit6_t bit6 = 6'b111000;
       bit [5:0] ans;
+      bit [2:0][1:0] ans_packed;
       enum_t ans_enum;
       logic [1:0] a [3] = {1, 0, 3};
       logic [1:0] b [3] = {1, 2, 0};
@@ -42,6 +44,12 @@ module t (/*AUTOARG*/);
       { >> bit {ans}} = arr;
       `checkh(ans, bit6);
 
+      ans_packed = { >> bit {arr} };
+      `checkh(ans_packed, bit6);
+
+      { >> bit {ans_packed}} = arr;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ >> bit {arr} });
       `checkh(ans_enum, bit6);
 
@@ -57,6 +65,12 @@ module t (/*AUTOARG*/);
       { << bit {ans} } = arr;
       `checkh(ans, bit6);
 
+      ans_packed = { << bit {arr} };
+      `checkh(ans_packed, bit6);
+
+      { << bit {ans_packed} } = arr;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ << bit {arr} });
       `checkh(ans_enum, bit6);
 
@@ -72,6 +86,12 @@ module t (/*AUTOARG*/);
       { >> bit[1:0] {ans} } = arr2;
       `checkh(ans, bit6);
 
+      ans_packed = { >> bit[1:0] {arr2} };
+      `checkh(ans_packed, bit6);
+
+      { >> bit[1:0] {ans_packed} } = arr2;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ >> bit[1:0] {arr2} });
       `checkh(ans_enum, bit6);
 
@@ -84,6 +104,12 @@ module t (/*AUTOARG*/);
       { << bit[1:0] {ans} } = arr2;
       `checkh(ans, bit6);
 
+      ans_packed = { << bit[1:0] {arr2} };
+      `checkh(ans_packed, bit6);
+
+      { << bit[1:0] {ans_packed} } = arr2;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ << bit[1:0] {arr2} });
       `checkh(ans_enum, bit6);
 
@@ -99,6 +125,12 @@ module t (/*AUTOARG*/);
       { >> bit[5:0] {ans} } = arr6;
       `checkh(ans, bit6);
 
+      ans_packed = { >> bit[5:0] {arr6} };
+      `checkh(ans_packed, bit6);
+
+      { >> bit[5:0] {ans_packed} } = arr6;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ >> bit[5:0] {arr6} });
       `checkh(ans_enum, bit6);
 
@@ -114,9 +146,57 @@ module t (/*AUTOARG*/);
       { << bit[5:0] {ans} } = arr6;
       `checkh(ans, bit6);
 
+      ans_packed = { << bit[5:0] {arr6} };
+      `checkh(ans_packed, bit6);
+
+      { << bit[5:0] {ans_packed} } = arr6;
+      `checkh(ans_packed, bit6);
+
       ans_enum = enum_t'({ << bit[5:0] {arr6} });
       `checkh(ans_enum, bit6);
 
+      { >> bit [5:0] {parr6} } = bit6;
+      `checkh(parr6, bit6);
+
+      parr6 = { >> bit [5:0] {bit6}};
+      `checkh(parr6, bit6);
+
+      ans = { >> bit[5:0] {parr6} };
+      `checkh(ans, bit6);
+
+      { >> bit[5:0] {ans} } = parr6;
+      `checkh(ans, bit6);
+
+      ans_packed = { >> bit[5:0] {parr6} };
+      `checkh(ans_packed, bit6);
+
+      { >> bit[5:0] {ans_packed} } = parr6;
+      `checkh(ans_packed, bit6);
+
+      ans_enum = enum_t'({ >> bit[5:0] {parr6} });
+      `checkh(ans_enum, bit6);
+
+      { << bit [5:0] {parr6} } = bit6;
+      `checkh(parr6, bit6);
+
+      parr6 = { << bit [5:0] {bit6}};
+      `checkh(parr6, bit6);
+
+      ans = { << bit[5:0] {parr6} };
+      `checkh(ans, bit6);
+
+      { << bit[5:0] {ans} } = parr6;
+      `checkh(ans, bit6);
+
+      ans_packed = { << bit[5:0] {parr6} };
+      `checkh(ans_packed, bit6);
+
+      { << bit[5:0] {ans_packed} } = parr6;
+      `checkh(ans_packed, bit6);
+
+      ans_enum = enum_t'({ << bit[5:0] {parr6} });
+      `checkh(ans_enum, bit6);
+
       d = { >> {a, b, c}};
       `checkh(d, 16'b0100110110001100);
 

From 01e66ac3494981f546a9403468dd3a38952f0d16 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 14:49:44 -0400
Subject: [PATCH 026/211] Commentary: Changes update

---
 Changes | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index 5e407d7a1..49b7e80b6 100644
--- a/Changes
+++ b/Changes
@@ -16,9 +16,11 @@ Verilator 5.037 devel
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
+* Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
+* Fix constant propagation making upper bits Xs (#5955) (#5969).
 * Fix sign extension of signed compared with unsigned case items (#5968).
-* Fix constant propagation making upper bits Xs (#5969).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
+* Fix streaming to/from packed arrays (#5976). [Geza Lore]
 
 
 Verilator 5.036 2025-04-27

From 51616ecf2f13220296318fbe6bb30c67b539731b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 14:57:10 -0400
Subject: [PATCH 027/211] Internals: Rename to instances, and other minor
 cleanups

---
 docs/guide/exe_verilator.rst           |  2 +-
 src/V3Class.cpp                        |  2 +-
 src/V3ParseImp.cpp                     |  6 +-
 src/V3ParseImp.h                       |  4 +-
 src/verilog.y                          | 80 ++++++++++++++------------
 test_regress/t/t_config_libmap.map     |  5 ++
 test_regress/t/t_config_libmap.out     | 33 ++++++-----
 test_regress/t/t_config_libmap_inc.map |  1 +
 test_regress/t/t_param_type_bad.out    |  2 +-
 9 files changed, 75 insertions(+), 60 deletions(-)

diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 3024d07f0..fad7ec37e 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -183,7 +183,7 @@ Summary:
    With :vlopt:`--clk`, the specified signal is marked as a clock signal.
 
    The provided signal name is specified using a RTL hierarchy path. For
-   example, v.foo.bar.  If the signal is the input to top-module, then
+   example, v.foo.bar.  If the signal is the input to the top-module, then
    directly provide the signal name. Alternatively, use a
    :option:`/*verilator&32;clocker*/` metacomment in RTL file to mark the
    signal directly.
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index 656ce3db2..3139ded69 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -40,7 +40,7 @@ class ClassVisitor final : public VNVisitor {
     const VNUser1InUse m_inuser1;
 
     // MEMBERS
-    string m_prefix;  // String prefix to add to name based on hier
+    string m_prefix;  // String prefix to add to class name based on hier
     V3UniqueNames m_names;  // For unique naming of structs and unions
     AstNodeModule* m_modp = nullptr;  // Current module
     AstNodeModule* m_classPackagep = nullptr;  // Package moving into
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index d1686aaf9..d71d6a090 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -415,7 +415,7 @@ const V3ParseBisonYYSType* V3ParseImp::tokenPeekp(size_t depth) {
     return &m_tokensAhead.at(depth);
 }
 
-size_t V3ParseImp::tokenPipeScanIdCell(size_t depthIn) {
+size_t V3ParseImp::tokenPipeScanIdInst(size_t depthIn) {
     // Search around IEEE module_instantiation/interface_instantiation/program_instantiation
     // Return location of following token, or input if not found
     // yaID/*module_identifier*/ [ '#' '('...')' ] yaID/*name_of_instance*/ [ '['...']' ] '(' ...
@@ -533,7 +533,7 @@ int V3ParseImp::tokenPipelineId(int token) {
     VL_RESTORER(yylval);  // Remember value, as about to read ahead
     if (m_tokenLastBison.token != '@' && m_tokenLastBison.token != '#'
         && m_tokenLastBison.token != '.') {
-        if (const size_t depth = tokenPipeScanIdCell(0)) return yaID__aCELL;
+        if (const size_t depth = tokenPipeScanIdInst(0)) return yaID__aINST;
     }
     if (nexttok == '#') {  // e.g. class_type parameter_value_assignment '::'
         const size_t depth = tokenPipeScanParam(0, false);
@@ -757,7 +757,7 @@ std::ostream& operator<<(std::ostream& os, const V3ParseBisonYYSType& rhs) {
     if (rhs.token == yaID__ETC  //
         || rhs.token == yaID__CC  //
         || rhs.token == yaID__LEX  //
-        || rhs.token == yaID__aCELL  //
+        || rhs.token == yaID__aINST  //
         || rhs.token == yaID__aTYPE) {
         os << " strp='" << *(rhs.strp) << "'";
     }
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 916bdb48c..e6ebcbc92 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -314,9 +314,9 @@ private:
     void tokenPipeline() VL_MT_DISABLED;  // Internal; called from tokenToBison
     int tokenPipelineId(int token) VL_MT_DISABLED;
     void tokenPipelineSym() VL_MT_DISABLED;
-    size_t tokenPipeScanIdCell(size_t depth) VL_MT_DISABLED;
+    size_t tokenPipeScanIdInst(size_t depth) VL_MT_DISABLED;
     size_t tokenPipeScanBracket(size_t depth) VL_MT_DISABLED;
-    size_t tokenPipeScanParam(size_t depth, bool forCell) VL_MT_DISABLED;
+    size_t tokenPipeScanParam(size_t depth, bool forInst) VL_MT_DISABLED;
     size_t tokenPipeScanTypeEq(size_t depth) VL_MT_DISABLED;
     const V3ParseBisonYYSType* tokenPeekp(size_t depth) VL_MT_DISABLED;
     void preprocDumps(std::ostream& os, bool forInputs) VL_MT_DISABLED;
diff --git a/src/verilog.y b/src/verilog.y
index ebe90b364..126c2089c 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -430,7 +430,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<strp>            yaID__ETC       "IDENTIFIER"
 %token<strp>            yaID__CC        "IDENTIFIER-::"
 %token<strp>            yaID__LEX       "IDENTIFIER-in-lex"
-%token<strp>            yaID__aCELL     "IDENTIFIER-for-cell"
+%token<strp>            yaID__aINST     "IDENTIFIER-for-instance"
 %token<strp>            yaID__aTYPE     "IDENTIFIER-for-type"
 //                      Can't predecode aFUNCTION, can declare after use
 //                      Can't predecode aINTERFACE, can declare after use
@@ -1444,7 +1444,7 @@ parameter_value_assignmentClassE<pinp>:      // IEEE: [ parameter_value_assignme
         ;
 
 parameter_value_assignmentInst<pinp>:       // IEEE: parameter_value_assignment for instance
-                '#' '(' cellparamListE ')'              { $$ = $3; }
+                '#' '(' instParamListE ')'              { $$ = $3; }
         //                      // Parentheses are optional around a single parameter
         //                      // IMPORTANT: Below hardcoded in tokenPipeScanParam
         |       '#' yaINTNUM                            { $$ = new AstPin{$<fl>2, 1, "", new AstConst{$<fl>2, *$2}}; }
@@ -1459,7 +1459,7 @@ parameter_value_assignmentInst<pinp>:       // IEEE: parameter_value_assignment
 
 parameter_value_assignmentClass<pinp>:  // IEEE: parameter_value_assignment (for classes)
         //                      // Like parameter_value_assignment, but for classes only, which always have #()
-                '#' '(' cellparamListE ')'              { $$ = $3; }
+                '#' '(' instParamListE ')'              { $$ = $3; }
         ;
 
 parameter_port_listE<nodep>:    // IEEE: parameter_port_list + empty == parameter_value_assignment
@@ -3017,7 +3017,7 @@ loop_generate_construct<nodep>: // ==IEEE: loop_generate_construct
                                 initp->unlinkFrBackWithNext();  // Detach 2nd from varp, make 1st init
                                 blkp->addStmtsp(varp);
                           }
-                          // Statements are under 'genforp' as cells under this
+                          // Statements are under 'genforp' as instances under this
                           // for loop won't get an extra layer of hierarchy tacked on
                           blkp->genforp(new AstGenFor{$1, initp, $5, $7, lowerNoBegp});
                           $$ = blkp;
@@ -3324,8 +3324,8 @@ etcInst<nodep>:                 // IEEE: module_instantiation + gate_instantiati
 
 instDecl<nodep>:
         //                      // Disambigurated from data_declaration based on
-        //                      // idCell which is found as IEEE requires a later '('
-                idCell parameter_value_assignmentInstE
+        //                      // idInst which is found as IEEE requires a later '('
+                idInst parameter_value_assignmentInstE
         /*mid*/         { INSTPREP($<fl>1, *$1, $2); }
         /*cont*/    instnameList ';'
                         { $$ = $4;
@@ -3358,12 +3358,12 @@ instnameList<nodep>:
         ;
 
 instnameParen<nodep>:
-                id instRangeListE '(' cellpinListE ')'
+                id instRangeListE '(' instPinListE ')'
                         { $$ = GRAMMARP->createCell($<fl>1, *$1, $4, $2); }
         ;
 
 instnameParenUdpn<nodep>:  // IEEE: part of udp_instance when no name_of_instance
-                '(' cellpinListE ')'  // When UDP has empty name, unpacked dimensions must not be used
+                '(' instPinListE ')'  // When UDP has empty name, unpacked dimensions must not be used
                         { $$ = GRAMMARP->createCell($<fl>1, "", $2, nullptr); }
         ;
 
@@ -3384,31 +3384,31 @@ instRange<nodeRangep>:
                         { $$ = new AstRange{$1, $2, $4}; }
         ;
 
-cellparamListE<pinp>:
-                { GRAMMARP->pinPush(); } cellparamItListE   { $$ = $2; GRAMMARP->pinPop(CRELINE()); }
+instParamListE<pinp>:
+                { GRAMMARP->pinPush(); } instParamItListE   { $$ = $2; GRAMMARP->pinPop(CRELINE()); }
         ;
 
-cellpinListE<pinp>:
-                { VARRESET_LIST(UNKNOWN); } cellpinItListE   { $$ = $2; VARRESET_NONLIST(UNKNOWN); }
+instPinListE<pinp>:
+                { VARRESET_LIST(UNKNOWN); } instPinItListE   { $$ = $2; VARRESET_NONLIST(UNKNOWN); }
         ;
 
-cellparamItListE<pinp>:         // IEEE: list_of_parameter_value_assignments/list_of_parameter_assignments
+instParamItListE<pinp>:         // IEEE: list_of_parameter_value_assignments/list_of_parameter_assignments
         //                      // Empty gets a node, to track class reference of #()
                 /*empty*/                               { $$ = new AstPin{CRELINE(), PINNUMINC(), "", nullptr}; }
-        |       cellparamItList                         { $$ = $1; }
+        |       instParamItList                         { $$ = $1; }
         ;
 
-cellparamItList<pinp>:          // IEEE: list_of_parameter_value_assignments/list_of_parameter_assignments
-                cellparamItem                           { $$ = $1; }
-        |       cellparamItList ',' cellparamItem       { $$ = addNextNull($1, $3); }
+instParamItList<pinp>:          // IEEE: list_of_parameter_value_assignments/list_of_parameter_assignments
+                instParamItem                           { $$ = $1; }
+        |       instParamItList ',' instParamItem       { $$ = addNextNull($1, $3); }
         ;
 
-cellpinItListE<pinp>:           // IEEE: list_of_port_connections
-                cellpinItemE                            { $$ = $1; }
-        |       cellpinItListE ',' cellpinItemE         { $$ = addNextNull($1, $3); }
+instPinItListE<pinp>:           // IEEE: list_of_port_connections
+                instPinItemE                            { $$ = $1; }
+        |       instPinItListE ',' instPinItemE         { $$ = addNextNull($1, $3); }
         ;
 
-cellparamItem<pinp>:            // IEEE: named_parameter_assignment + empty
+instParamItem<pinp>:            // IEEE: named_parameter_assignment + empty
         //                      // Note empty is not allowed in parameter lists
                 yP_DOTSTAR                              { $$ = new AstPin{$1, PINNUMINC(), ".*", nullptr}; }
         |       '.' idAny '(' ')'
@@ -3446,7 +3446,7 @@ cellparamItem<pinp>:            // IEEE: named_parameter_assignment + empty
         //UNSUP            $$ = new AstPin{FILELINE_OR_CRE($3), PINNUMINC(), "", $3}; }
         ;
 
-cellpinItemE<pinp>:             // IEEE: named_port_connection + empty
+instPinItemE<pinp>:             // IEEE: named_port_connection + empty
         //                      // Note empty can match either () or (,); V3LinkCells cleans up ()
                 /* empty: ',,' is legal */              { $$ = new AstPin{CRELINE(), PINNUMINC(), "", nullptr}; }
         |       yP_DOTSTAR                              { $$ = new AstPin{$1, PINNUMINC(), ".*", nullptr}; }
@@ -4719,12 +4719,12 @@ funcId<nodeFTaskp>:             // IEEE: function_data_type_or_implicit + part o
                         { $$ = $2;
                           $$->fvarp($1);
                           SYMP->pushNewUnderNodeOrCurrent($$, $<scp>2); }
-        |       packageClassScopeE idCellType packed_dimensionListE fIdScoped
+        |       packageClassScopeE idInstType packed_dimensionListE fIdScoped
                         { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, nullptr};
                           $$ = $4;
                           $$->fvarp(GRAMMARP->createArray(refp, $3, true));
                           SYMP->pushNewUnderNodeOrCurrent($$, $<scp>4); }
-        |       packageClassScopeE idCellType parameter_value_assignmentClass packed_dimensionListE fIdScoped
+        |       packageClassScopeE idInstType parameter_value_assignmentClass packed_dimensionListE fIdScoped
                         { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, $3};
                           $$ = $5;
                           $$->fvarp(GRAMMARP->createArray(refp, $4, true));
@@ -5901,18 +5901,24 @@ id<strp>:
         |       idRandomize                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
-idAny<strp>:                    // Any kind of identifier
+idAny<strp>:  // Any kind of identifier
                 yaID__ETC                               { $$ = $1; $<fl>$ = $<fl>1; }
-        |       yaID__aCELL                             { $$ = $1; $<fl>$ = $<fl>1; }
+        |       yaID__aINST                             { $$ = $1; $<fl>$ = $<fl>1; }
         |       yaID__aTYPE                             { $$ = $1; $<fl>$ = $<fl>1; }
         |       idRandomize                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
-idCell<strp>:                   // IEEE: instance_identifier or similar with another id then '('
-        //                      // See V3ParseImp::tokenPipeScanIdCell
+idAnyAsParseRef<parseRefp>:  // Any kind of identifier as a ParseRef
+                idAny
+                        { $$ = new AstParseRef{$<fl>1, VParseRefExp::PX_TEXT, *$1}; }
+        ;
+
+
+idInst<strp>:                   // IEEE: instance_identifier or similar with another id then '('
+        //                      // See V3ParseImp::tokenPipeScanIdInst
         //                      //   [^': '@' '.'] yaID/*module_id*/ [ '#' '('...')' ] yaID/*name_of_instance*/ [ '['...']' ] '(' ...
         //                      //   [^':' @' '.'] yaID/*module_id*/ [ '#' id|etc ] yaID/*name_of_instance*/ [ '['...']' ] '(' ...
-                yaID__aCELL                             { $$ = $1; $<fl>$ = $<fl>1; }
+                yaID__aINST                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
 idType<strp>:                   // IEEE: class_identifier or other type identifier
@@ -5920,8 +5926,8 @@ idType<strp>:                   // IEEE: class_identifier or other type identifi
                 yaID__aTYPE                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
-idCellType<strp>:               // type_identifier for functions which have a following id then '('
-                yaID__aCELL                             { $$ = $1; $<fl>$ = $<fl>1; }
+idInstType<strp>:               // type_identifier for functions which have a following id then '('
+                yaID__aINST                             { $$ = $1; $<fl>$ = $<fl>1; }
         |       yaID__aTYPE                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
@@ -6171,8 +6177,8 @@ list_of_clocking_decl_assign<nodep>:  // IEEE: list_of_clocking_decl_assign
         ;
 
 clocking_decl_assign<nodep>:    // IEEE: clocking_decl_assign
-                idAny/*new-signal_identifier*/ exprEqE
-                        { AstParseRef* const refp = new AstParseRef{$<fl>1, VParseRefExp::PX_TEXT, *$1, nullptr, nullptr};
+                idAnyAsParseRef/*new-signal_identifier*/ exprEqE
+                        { AstParseRef* const refp = $1;
                           $$ = refp;
                           if ($2) $$ = new AstAssign{$<fl>2, refp, $2}; }
         ;
@@ -6196,8 +6202,8 @@ clocking_skew<nodeExprp>:           // IEEE: clocking_skew
 cycle_delay<delayp>:  // IEEE: cycle_delay
                yP_POUNDPOUND yaINTNUM
                         { $$ = new AstDelay{$<fl>1, new AstConst{$<fl>2, *$2}, true}; }
-        |      yP_POUNDPOUND idAny
-                        { $$ = new AstDelay{$<fl>1, new AstParseRef{$<fl>2, VParseRefExp::PX_TEXT, *$2, nullptr, nullptr}, true}; }
+        |      yP_POUNDPOUND idAnyAsParseRef
+                        { $$ = new AstDelay{$<fl>1, $2, true}; }
         |      yP_POUNDPOUND '(' expr ')'
                         { $$ = new AstDelay{$<fl>1, $3, true}; }
         ;
@@ -7295,8 +7301,8 @@ checker_generate_item<nodep>:  // ==IEEE: checker_generate_item
 //UNSUPchecker_instantiation<nodep>:
 //UNSUP //                      // Only used for procedural_assertion_item's
 //UNSUP //                      // Version in concurrent_assertion_item looks like etcInst
-//UNSUP //                      // Thus instead of *_checker_port_connection we can use etcInst's cellpinListE
-//UNSUP         id/*checker_identifier*/ id '(' cellpinListE ')' ';'     { }
+//UNSUP //                      // Thus instead of *_checker_port_connection we can use etcInst's instPinListE
+//UNSUP         id/*checker_identifier*/ id '(' instPinListE ')' ';'     { }
 //UNSUP ;
 
 //**********************************************************************
diff --git a/test_regress/t/t_config_libmap.map b/test_regress/t/t_config_libmap.map
index fe1f6e3f2..e2d7e6e46 100644
--- a/test_regress/t/t_config_libmap.map
+++ b/test_regress/t/t_config_libmap.map
@@ -1,3 +1,4 @@
+// -*- Verilog -*-
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
@@ -12,6 +13,10 @@ library rtllib2 *.v, *.sv;
 library rtllib3 *.v -incdir *.vh;
 library rtllib4 *.v -incdir *.vh, *.svh;
 
+// Note this does not start a comment
+library gatelib ./*.vg;
+// */
+
 config cfg;
    design t;
 endconfig
diff --git a/test_regress/t/t_config_libmap.out b/test_regress/t/t_config_libmap.out
index d86495d89..0415f7ac2 100644
--- a/test_regress/t/t_config_libmap.out
+++ b/test_regress/t/t_config_libmap.out
@@ -1,29 +1,32 @@
-%Error-UNSUPPORTED: t/t_config_libmap.map:8:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
+%Error-UNSUPPORTED: t/t_config_libmap.map:9:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
                                              : ... Suggest unless in a lib.map file, want `include instead
-    8 | include ./t_config_libmap_inc.map
+    9 | include ./t_config_libmap_inc.map
       | ^~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_config_libmap.map:8:9: syntax error, unexpected '.'
-    8 | include ./t_config_libmap_inc.map
+%Error: t/t_config_libmap.map:9:9: syntax error, unexpected '.'
+    9 | include ./t_config_libmap_inc.map
       |         ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error-UNSUPPORTED: t/t_config_libmap.map:10:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
-   10 | library rtllib *.v;
-      | ^~~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_config_libmap.map:11:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
-   11 | library rtllib2 *.v, *.sv;
+   11 | library rtllib *.v;
       | ^~~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_config_libmap.map:12:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
-   12 | library rtllib3 *.v -incdir *.vh;
+   12 | library rtllib2 *.v, *.sv;
       | ^~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_config_libmap.map:12:29: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'incdir'
 %Error-UNSUPPORTED: t/t_config_libmap.map:13:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
-   13 | library rtllib4 *.v -incdir *.vh, *.svh;
+   13 | library rtllib3 *.v -incdir *.vh;
       | ^~~~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_config_libmap.map:13:29: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'incdir'
-   13 | library rtllib4 *.v -incdir *.vh, *.svh;
+%Error-UNSUPPORTED: t/t_config_libmap.map:14:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   14 | library rtllib4 *.v -incdir *.vh, *.svh;
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:14:29: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'incdir'
+   14 | library rtllib4 *.v -incdir *.vh, *.svh;
       |                             ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_config_libmap.map:15:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
-%Error-UNSUPPORTED: t/t_config_libmap.map:16:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
-%Error-UNSUPPORTED: t/t_config_libmap.map:17:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
+%Error-UNSUPPORTED: t/t_config_libmap.map:17:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
+   17 | library gatelib .
+      | ^~~~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_libmap.map:20:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
+%Error-UNSUPPORTED: t/t_config_libmap.map:21:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
+%Error-UNSUPPORTED: t/t_config_libmap.map:22:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
 %Error: Exiting due to
diff --git a/test_regress/t/t_config_libmap_inc.map b/test_regress/t/t_config_libmap_inc.map
index fe1f6e3f2..44a8994ce 100644
--- a/test_regress/t/t_config_libmap_inc.map
+++ b/test_regress/t/t_config_libmap_inc.map
@@ -1,3 +1,4 @@
+// -*- Verilog -*-
 // DESCRIPTION: Verilator: Verilog Test module
 //
 // This file ONLY is placed under the Creative Commons Public Domain, for
diff --git a/test_regress/t/t_param_type_bad.out b/test_regress/t/t_param_type_bad.out
index f7f374e6f..a9bf7634b 100644
--- a/test_regress/t/t_param_type_bad.out
+++ b/test_regress/t/t_param_type_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_param_type_bad.v:9:27: syntax error, unexpected INTEGER NUMBER, expecting IDENTIFIER or IDENTIFIER-for-cell or IDENTIFIER-for-type or randomize
+%Error: t/t_param_type_bad.v:9:27: syntax error, unexpected INTEGER NUMBER, expecting IDENTIFIER or IDENTIFIER-for-instance or IDENTIFIER-for-type or randomize
     9 |    localparam type bad2 = 2;   
       |                           ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.

From d47b88a30c0c8f8b6d5b7cddf2bb980c4e206683 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 15:48:23 -0400
Subject: [PATCH 028/211] Internals: Remove accidental debug message

---
 src/V3Undriven.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index 7e9903018..c9ae78929 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -469,8 +469,6 @@ class UndrivenVisitor final : public VNVisitorConst {
                     entryp->drivenAlwaysCombWhole(m_alwaysCombp, m_alwaysCombp->fileline());
             }
             if (nodep->access().isWriteOrRW()) {
-                UINFO(1, "ww is=" << m_inInitialStatic << " ipa=" << m_inProcAssign << " " << nodep
-                                  << endl);
                 if (m_inInitialStatic && !entryp->initStaticp()) entryp->initStaticp(nodep);
                 if (m_alwaysp && m_inProcAssign && !entryp->procWritep())
                     entryp->procWritep(nodep);

From 27ad648c1654060e799ccaad734e14d8306c4373 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 16:24:36 -0400
Subject: [PATCH 029/211] Commentary: Indicate V3Number width() criticality.

---
 src/V3Ast.cpp         |  2 +-
 src/V3Clock.cpp       |  2 +-
 src/V3Const.cpp       | 22 +++++++++++-----------
 src/V3LinkResolve.cpp |  6 +++---
 src/V3Number.cpp      | 22 ++++++++++++++++++++++
 src/V3Number.h        | 16 +++++++++++++---
 6 files changed, 51 insertions(+), 19 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 2fa02f3ff..57d2f5434 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -324,7 +324,7 @@ void AstNode::debugTreeChange(const AstNode* nodep, const char* prefix, int line
 //  // Commenting out the section below may crash, as the tree state
 //  // between edits is not always consistent for printing
 //  cout<<"-treeChange: V3Ast.cpp:"<<lineno<<" Tree Change for "<<prefix<<endl;
-//  v3Global.rootp()->dumpTree("-  treeChange: ");
+//  if (debug()) v3Global.rootp()->dumpTree("-  treeChange: ");
 //  if (next||1) nodep->dumpTreeAndNext(cout, prefix);
 //  else nodep->dumpTree(prefix);
 //  nodep->checkTree();
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index ec6d8bf21..0fbdb9a27 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -97,7 +97,7 @@ class ClockVisitor final : public VNVisitor {
     }
     // VISITORS
     void visit(AstCoverToggle* nodep) override {
-        // nodep->dumpTree("-  ct: ");
+        // if (debug()) nodep->dumpTree("-  ct: ");
         // COVERTOGGLE(INC, ORIG, CHANGE) ->
         //   IF(ORIG ^ CHANGE) { INC; CHANGE = ORIG; }
         AstNode* const incp = nodep->incp()->unlinkFrBack();
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index c2ef9e0d5..ccaf1d02b 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1706,7 +1706,7 @@ class ConstVisitor final : public VNVisitor {
     void replaceAsv(AstNodeBiop* nodep) {
         // BIASV(CONSTa, BIASV(CONSTb, c)) -> BIASV( BIASV_CONSTED(a,b), c)
         // BIASV(SAMEa,  BIASV(SAMEb, c))  -> BIASV( BIASV(SAMEa,SAMEb), c)
-        // nodep->dumpTree("-  repAsvConst_old: ");
+        // if (debug()) nodep->dumpTree("-  repAsvConst_old: ");
         AstNodeExpr* const ap = nodep->lhsp();
         AstNodeBiop* const rp = VN_AS(nodep->rhsp(), NodeBiop);
         AstNodeExpr* const bp = rp->lhsp();
@@ -1720,7 +1720,7 @@ class ConstVisitor final : public VNVisitor {
         rp->lhsp(ap);
         rp->rhsp(bp);
         if (VN_IS(rp->lhsp(), Const) && VN_IS(rp->rhsp(), Const)) replaceConst(rp);
-        // nodep->dumpTree("-  repAsvConst_new: ");
+        // if (debug()) nodep->dumpTree("-  repAsvConst_new: ");
     }
     void replaceAsvLUp(AstNodeBiop* nodep) {
         // BIASV(BIASV(CONSTll,lr),r) -> BIASV(CONSTll,BIASV(lr,r))
@@ -1732,7 +1732,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(lp);
         lp->lhsp(lrp);
         lp->rhsp(rp);
-        // nodep->dumpTree("-  repAsvLUp_new: ");
+        // if (debug()) nodep->dumpTree("-  repAsvLUp_new: ");
     }
     void replaceAsvRUp(AstNodeBiop* nodep) {
         // BIASV(l,BIASV(CONSTrl,rr)) -> BIASV(CONSTrl,BIASV(l,rr))
@@ -1744,7 +1744,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(rp);
         rp->lhsp(lp);
         rp->rhsp(rrp);
-        // nodep->dumpTree("-  repAsvRUp_new: ");
+        // if (debug()) nodep->dumpTree("-  repAsvRUp_new: ");
     }
     void replaceAndOr(AstNodeBiop* nodep) {
         //  OR  (AND (CONSTll,lr), AND(CONSTrl==ll,rr))    -> AND (CONSTll, OR(lr,rr))
@@ -1777,7 +1777,7 @@ class ConstVisitor final : public VNVisitor {
         } else {
             nodep->v3fatalSrc("replaceAndOr on something operandAndOrSame shouldn't have matched");
         }
-        // nodep->dumpTree("-  repAndOr_new: ");
+        // if (debug()) nodep->dumpTree("-  repAndOr_new: ");
     }
     void replaceShiftSame(AstNodeBiop* nodep) {
         // Or(Shift(ll,CONSTlr),Shift(rl,CONSTrr==lr)) -> Shift(Or(ll,rl),CONSTlr)
@@ -1796,7 +1796,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->dtypep(llp->dtypep());  // dtype of Biop is before shift.
         VL_DO_DANGLING(pushDeletep(rp), rp);
         VL_DO_DANGLING(pushDeletep(rrp), rrp);
-        // nodep->dumpTree("-  repShiftSame_new: ");
+        // if (debug()) nodep->dumpTree("-  repShiftSame_new: ");
     }
     void replaceConcatSel(AstConcat* nodep) {
         // {a[1], a[0]} -> a[1:0]
@@ -1981,7 +1981,7 @@ class ConstVisitor final : public VNVisitor {
             newp->dtypeFrom(nodep);
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
-            // newp->dumpTree("-  repShiftShift_new: ");
+            // if (debug()) newp->dumpTree("-  repShiftShift_new: ");
             iterate(newp);  // Further reduce, either node may have more reductions.
         }
         VL_DO_DANGLING(pushDeletep(lhsp), lhsp);
@@ -2024,8 +2024,8 @@ class ConstVisitor final : public VNVisitor {
         const bool lsbFirstAssign = (con1p->toUInt() < con2p->toUInt());
         UINFO(4, "replaceAssignMultiSel " << nodep << endl);
         UINFO(4, "                   && " << nextp << endl);
-        // nodep->dumpTree("-  comb1: ");
-        // nextp->dumpTree("-  comb2: ");
+        // if (debug()) nodep->dumpTree("-  comb1: ");
+        // if (debug()) nextp->dumpTree("-  comb2: ");
         AstNodeExpr* const rhs1p = nodep->rhsp()->unlinkFrBack();
         AstNodeExpr* const rhs2p = nextp->rhsp()->unlinkFrBack();
         AstNodeAssign* newp;
@@ -2038,7 +2038,7 @@ class ConstVisitor final : public VNVisitor {
                                                sel2p->lsbConst(), sel1p->width() + sel2p->width()},
                                     new AstConcat{rhs1p->fileline(), rhs1p, rhs2p});
         }
-        // pnewp->dumpTree("-  conew: ");
+        // if (debug()) pnewp->dumpTree("-  conew: ");
         nodep->replaceWith(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         VL_DO_DANGLING(pushDeletep(nextp->unlinkFrBack()), nextp);
@@ -2950,7 +2950,7 @@ class ConstVisitor final : public VNVisitor {
     void visit(AstSenTree* nodep) override {
         iterateChildren(nodep);
         if (m_doExpensive) {
-            // cout<<endl; nodep->dumpTree("-  ssin: ");
+            // if (debug()) nodep->dumpTree("-  ssin: ");
             // Optimize ideas for the future:
             //   SENTREE(... SENGATE(x,a), SENGATE(SENITEM(x),b) ...)  => SENGATE(x,OR(a,b))
 
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index cf3572720..d1c96f131 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -190,8 +190,8 @@ class LinkResolveVisitor final : public VNVisitor {
             if (VN_IS(nodep->backp(), StmtExpr)) {
                 nodep->v3error("Expected statement, not let substitution " << letp->prettyNameQ());
             }
-            // letp->dumpTree("-let-let ");
-            // nodep->dumpTree("-let-ref ");
+            // if (debug()) letp->dumpTree("-let-let ");
+            // if (debug()) nodep->dumpTree("-let-ref ");
             AstStmtExpr* const letStmtp = VN_AS(letp->stmtsp(), StmtExpr);
             AstNodeExpr* const newp = letStmtp->exprp()->cloneTree(false);
             const V3TaskConnects tconnects = V3Task::taskConnects(nodep, letp->stmtsp());
@@ -214,7 +214,7 @@ class LinkResolveVisitor final : public VNVisitor {
                     VL_DO_DANGLING(pushDeletep(refp), refp);
                 }
             });
-            // newp->dumpTree("-let-new ");
+            // if (debug()) newp->dumpTree("-let-new ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // Iterate to expand further now, so we can look for recursions
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 3161a5b52..9d9d3a2e1 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -532,6 +532,7 @@ V3Number& V3Number::setMask(int nbits, int lsb) {
 // ACCESSORS - as strings
 
 string V3Number::ascii(bool prefixed, bool cleanVerilog) const VL_MT_STABLE {
+    // Correct number of zero bits/width matters
     std::ostringstream out;
 
     if (is1Step()) {
@@ -643,6 +644,7 @@ string V3Number::displayed(AstNode* nodep, const string& vformat) const VL_MT_ST
 }
 
 string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STABLE {
+    // Correct number of zero bits/width matters
     auto pos = vformat.cbegin();
     UASSERT(pos != vformat.cend() && pos[0] == '%',
             "$display-like function with non format argument " << *this);
@@ -882,6 +884,7 @@ string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STAB
 }
 
 string V3Number::toDecimalS() const VL_MT_STABLE {
+    // Correct number of zero bits/width matters
     if (isNegative()) {
         V3Number lhsNoSign = *this;
         lhsNoSign.opNegate(*this);
@@ -1082,6 +1085,7 @@ bool V3Number::isEqOne() const {
     return true;
 }
 bool V3Number::isEqAllOnes(int optwidth) const {
+    // Correct number of zero bits/width matters
     if (!optwidth) optwidth = width();
     for (int bit = 0; bit < optwidth; bit++) {
         if (!bitIs1(bit)) return false;
@@ -1145,6 +1149,7 @@ int V3Number::widthToFit() const {
 }
 
 uint32_t V3Number::countBits(const V3Number& ctrl) const {
+    // Correct number of zero bits/width matters
     int n = 0;
     for (int bit = 0; bit < width(); ++bit) {
         switch (ctrl.bitIs(0)) {
@@ -1167,6 +1172,7 @@ uint32_t V3Number::countBits(const V3Number& ctrl) const {
 
 uint32_t V3Number::countBits(const V3Number& ctrl1, const V3Number& ctrl2,
                              const V3Number& ctrl3) const {
+    // Correct number of zero bits/width matters
     int n = countBits(ctrl1);
     if (ctrl2.bitIs(0) != ctrl1.bitIs(0)) n += countBits(ctrl2);
     if ((ctrl3.bitIs(0) != ctrl1.bitIs(0)) && (ctrl3.bitIs(0) != ctrl2.bitIs(0))) {
@@ -1192,6 +1198,7 @@ uint32_t V3Number::mostSetBitP1() const {
 //======================================================================
 
 V3Number& V3Number::opBitsNonX(const V3Number& lhs) {  // 0/1->1, X/Z->0
+    // Correct number of zero bits/width matters
     // op i, L(lhs) bit return
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
@@ -1252,6 +1259,7 @@ V3Number& V3Number::opRedOr(const V3Number& lhs) {
 }
 
 V3Number& V3Number::opRedAnd(const V3Number& lhs) {
+    // Correct number of zero bits/width matters
     // op i, 1 bit return
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
@@ -1289,6 +1297,7 @@ V3Number& V3Number::opRedXor(const V3Number& lhs) {
 
 V3Number& V3Number::opCountBits(const V3Number& expr, const V3Number& ctrl1, const V3Number& ctrl2,
                                 const V3Number& ctrl3) {
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS4(expr, ctrl1, ctrl2, ctrl3);
     NUM_ASSERT_LOGIC_ARGS4(expr, ctrl1, ctrl2, ctrl3);
     setZero();
@@ -1354,6 +1363,7 @@ last:
 }
 
 V3Number& V3Number::opNot(const V3Number& lhs) {
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     // op i, L(lhs) bit return
@@ -1420,6 +1430,7 @@ V3Number& V3Number::opXor(const V3Number& lhs, const V3Number& rhs) {
 }
 
 V3Number& V3Number::opConcat(const V3Number& lhs, const V3Number& rhs) {
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     setZero();
@@ -1834,6 +1845,7 @@ V3Number& V3Number::opShiftR(const V3Number& lhs, const V3Number& rhs) {
 }
 
 V3Number& V3Number::opShiftRS(const V3Number& lhs, const V3Number& rhs, uint32_t lbits) {
+    // Correct number of zero bits/width matters (hance lbits passed)
     // L(lhs) bit return
     // The spec says a unsigned >>> still acts as a normal >>.
     // We presume it is signed; as that's V3Width's job to convert to opShiftR
@@ -1881,6 +1893,7 @@ V3Number& V3Number::opShiftL(const V3Number& lhs, const V3Number& rhs) {
 // Ops - Arithmetic
 
 V3Number& V3Number::opNegate(const V3Number& lhs) {
+    // Correct number of zero bits/width matters
     // op i, L(lhs) bit return
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
@@ -1910,6 +1923,7 @@ V3Number& V3Number::opAdd(const V3Number& lhs, const V3Number& rhs) {
     return *this;
 }
 V3Number& V3Number::opSub(const V3Number& lhs, const V3Number& rhs) {
+    // Correct number of zero bits/width matters
     // i op j, max(L(lhs),L(rhs)) bit return, if any 4-state, 4-state return
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
@@ -1949,6 +1963,7 @@ V3Number& V3Number::opMul(const V3Number& lhs, const V3Number& rhs) {
 }
 V3Number& V3Number::opMulS(const V3Number& lhs, const V3Number& rhs) {
     // Signed multiply
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (lhs.isFourState() || rhs.isFourState()) return setAllBitsX();
@@ -1981,6 +1996,7 @@ V3Number& V3Number::opDiv(const V3Number& lhs, const V3Number& rhs) {
 }
 V3Number& V3Number::opDivS(const V3Number& lhs, const V3Number& rhs) {
     // Signed divide
+    // Correct number of zero bits/width matters
     // UINFO(9, ">>divs-start "<<lhs<<" "<<rhs<<endl);
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
@@ -2016,6 +2032,7 @@ V3Number& V3Number::opModDiv(const V3Number& lhs, const V3Number& rhs) {
 }
 V3Number& V3Number::opModDivS(const V3Number& lhs, const V3Number& rhs) {
     // Signed moddiv
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (lhs.isFourState() || rhs.isFourState()) return setAllBitsX();
@@ -2166,6 +2183,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
 }
 
 V3Number& V3Number::opPow(const V3Number& lhs, const V3Number& rhs, bool lsign, bool rsign) {
+    // Correct number of zero bits/width matters
     // L(i) bit return, if any 4-state, 4-state return
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
@@ -2207,12 +2225,15 @@ V3Number& V3Number::opPow(const V3Number& lhs, const V3Number& rhs, bool lsign,
     return *this;
 }
 V3Number& V3Number::opPowSU(const V3Number& lhs, const V3Number& rhs) {
+    // Correct number of zero bits/width matters
     return opPow(lhs, rhs, true, false);
 }
 V3Number& V3Number::opPowSS(const V3Number& lhs, const V3Number& rhs) {
+    // Correct number of zero bits/width matters
     return opPow(lhs, rhs, true, true);
 }
 V3Number& V3Number::opPowUS(const V3Number& lhs, const V3Number& rhs) {
+    // Correct number of zero bits/width matters
     return opPow(lhs, rhs, false, true);
 }
 
@@ -2362,6 +2383,7 @@ V3Number& V3Number::opSelInto(const V3Number& lhs, int lsbval, int width) {
 // Ops - Floating point
 
 V3Number& V3Number::opIToRD(const V3Number& lhs, bool isSigned) {
+    // Correct number of zero bits/width matters
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     // IEEE says we ignore x/z in real conversions
diff --git a/src/V3Number.h b/src/V3Number.h
index 231dd6ccd..5b6fa517e 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -418,6 +418,7 @@ public:
         return ((v.m_value & (1UL << (bit & 31))) && !(v.m_valueX & (1UL << (bit & 31))));
     }
     bool bitIs1Extend(int bit) const {
+        // Correct number of zero bits/width matters
         if (!isNumber()) return false;
         if (bit < 0) return false;
         if (bit >= m_data.width()) return bitIs1Extend(m_data.width() - 1);
@@ -457,7 +458,10 @@ private:
     int countZ(int lsb, int nbits) const VL_MT_SAFE;
 
     int words() const VL_MT_SAFE { return ((width() + 31) / 32); }
-    uint32_t hiWordMask() const VL_MT_SAFE { return VL_MASK_I(width()); }
+    uint32_t hiWordMask() const VL_MT_SAFE {
+        // Correct number of zero bits/width matters
+        return VL_MASK_I(width());
+    }
 
     V3Number& opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool is_modulus);
 
@@ -615,7 +619,10 @@ public:
         return m_data.type() == V3NumberDataType::LOGIC
                || m_data.type() == V3NumberDataType::DOUBLE;
     }
-    bool isNegative() const VL_MT_SAFE { return !isString() && bitIs1(width() - 1); }
+    bool isNegative() const VL_MT_SAFE {
+        // Correct number of zero bits/width matters
+        return !isString() && bitIs1(width() - 1);
+    }
     bool is1Step() const VL_MT_SAFE { return m_data.m_is1Step; }
     bool isNull() const VL_MT_SAFE { return m_data.m_isNull; }
     bool isFourState() const VL_MT_SAFE;
@@ -639,7 +646,10 @@ public:
     bool isAnyX() const VL_MT_SAFE;
     bool isAnyXZ() const;
     bool isAnyZ() const VL_MT_SAFE;
-    bool isMsbXZ() const { return bitIsXZ(m_data.width() - 1); }
+    bool isMsbXZ() const {
+        // Correct number of zero bits/width matters
+        return bitIsXZ(width() - 1);
+    }
     bool fitsInUInt() const VL_MT_SAFE;
     uint32_t toUInt() const VL_MT_SAFE;
     int32_t toSInt() const VL_MT_SAFE;

From 11cfa61f80a0ca0cc5245984a86a92dace8abe37 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 16:34:37 -0400
Subject: [PATCH 030/211] Fix casting etc of typedef'ed doubles.

---
 src/V3AstInlines.h                        |  2 +-
 src/V3Number.h                            |  2 +-
 test_regress/t/t_class_param.v            | 11 +++++++----
 test_regress/t/t_cover_toggle.out         |  2 +-
 test_regress/t/t_cover_toggle__points.out |  4 +---
 test_regress/t/t_dpi_open_oob_bad.out     | 24 +++++++++++++++--------
 6 files changed, 27 insertions(+), 18 deletions(-)

diff --git a/src/V3AstInlines.h b/src/V3AstInlines.h
index cb13fa21a..3542839b1 100644
--- a/src/V3AstInlines.h
+++ b/src/V3AstInlines.h
@@ -34,7 +34,7 @@ int AstNode::widthInstrs() const {
     return (!dtypep() ? 1 : (dtypep()->isWide() ? dtypep()->widthWords() : 1));
 }
 bool AstNode::isDouble() const VL_MT_STABLE {
-    return dtypep() && VN_IS(dtypep(), BasicDType) && VN_AS(dtypep(), BasicDType)->isDouble();
+    return dtypep() && dtypep()->basicp() && dtypep()->basicp()->isDouble();
 }
 bool AstNode::isString() const VL_MT_STABLE {
     return dtypep() && dtypep()->basicp() && dtypep()->basicp()->isString();
diff --git a/src/V3Number.h b/src/V3Number.h
index 5b6fa517e..85cd4d150 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -408,7 +408,7 @@ public:
         if (bit < 0) return false;
         if (bit >= m_data.width()) return !bitIsXZ(m_data.width() - 1);
         const ValueAndX v = m_data.num()[bit / 32];
-        return ((v.m_value & (1UL << (bit & 31))) == 0 && !(v.m_valueX & (1UL << (bit & 31))));
+        return ((v.m_value | v.m_valueX) & (1UL << (bit & 31))) == 0;
     }
     bool bitIs1(int bit) const VL_MT_SAFE {
         if (!isNumber()) return false;
diff --git a/test_regress/t/t_class_param.v b/test_regress/t/t_class_param.v
index 08dd1f61b..38757c1a9 100644
--- a/test_regress/t/t_class_param.v
+++ b/test_regress/t/t_class_param.v
@@ -62,7 +62,7 @@ class Sum #(type T);
    static int sum;
    static function void add(T element);
       sum += int'(element);
-      endfunction
+   endfunction
 endclass
 
 class IntQueue;
@@ -221,8 +221,11 @@ module t (/*AUTOARG*/);
       qi.q = '{2, 4, 6, 0, 2};
       if (qi.getSum() != 14) $stop;
       Sum#(int)::add(arr[0]);
-      if(Sum#(int)::sum != 16) $stop;
-      if(Sum#(real)::sum != 0) $stop;
+      if (Sum#(int)::sum != 16) $stop;
+
+      if (Sum#(real)::sum != 0) $stop;
+      Sum#(real)::add(1.9);  // rounds
+      if (Sum#(real)::sum != 2) $stop;
 
       if (ClsParam#(ClsStatic)::param_t::x != 1) $stop;
       if (ClsParam#(ClsStatic)::param_t::get_2() != 2) $stop;
@@ -231,7 +234,7 @@ module t (/*AUTOARG*/);
       if (cls_param_field.get(2) != 7) $stop;
 
       dict_op.set("abcd", 1);
-      if(dict_op.get("abcd") != 1) $stop;
+      if (dict_op.get("abcd") != 1) $stop;
 
       if (getter1.get_1() != 1) $stop;
       if (Getter1#()::get_1() != 1) $stop;
diff --git a/test_regress/t/t_cover_toggle.out b/test_regress/t/t_cover_toggle.out
index 065e014a0..5d0010643 100644
--- a/test_regress/t/t_cover_toggle.out
+++ b/test_regress/t/t_cover_toggle.out
@@ -12,7 +12,7 @@
         
  000019    input clk;
            input real check_real; // Check issue #2741
- 000021    input real check_array_real [1:0];
+           input real check_array_real [1:0];
            input string check_string; // Check issue #2766
         
            typedef struct packed {
diff --git a/test_regress/t/t_cover_toggle__points.out b/test_regress/t/t_cover_toggle__points.out
index 17279cd14..7e220867b 100644
--- a/test_regress/t/t_cover_toggle__points.out
+++ b/test_regress/t/t_cover_toggle__points.out
@@ -13,9 +13,7 @@
  000019    input clk;
 +000019  point: comment=clk hier=top.t
            input real check_real; // Check issue #2741
- 000021    input real check_array_real [1:0];
-+000021  point: comment=check_array_real[0] hier=top.t
-+000021  point: comment=check_array_real[1] hier=top.t
+           input real check_array_real [1:0];
            input string check_string; // Check issue #2766
         
            typedef struct packed {
diff --git a/test_regress/t/t_dpi_open_oob_bad.out b/test_regress/t/t_dpi_open_oob_bad.out
index a40343874..b89413bf3 100644
--- a/test_regress/t/t_dpi_open_oob_bad.out
+++ b/test_regress/t/t_dpi_open_oob_bad.out
@@ -5,14 +5,22 @@ dpii_int_u3:
 %Warning: DPI svOpenArrayHandle function index 1 out of bounds; 10 outside [2:-2].
 %Warning: DPI svOpenArrayHandle function called on 3 dimensional array using 1 dimensional function.
 dpii_real_u1:
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
-%Warning: DPI svOpenArrayHandle function unsupported datatype (5).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
+%Warning: DPI svOpenArrayHandle function unsupported datatype (8).
 dpii_bit_u6:
 %Warning: DPI svOpenArrayHandle function called on 6 dimensional array using -1 dimensional function.
 %Warning: DPI svOpenArrayHandle function called on 6 dimensional array using -1 dimensional function.

From 413183bad88fdfe8e6a9cdd4984113d82d34ebd0 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 21:25:44 -0400
Subject: [PATCH 031/211] Fix localize of coroutines (#5972 partial)

---
 src/V3Localize.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index 5a1014a62..43f890110 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -132,6 +132,11 @@ class LocalizeVisitor final : public VNVisitor {
         moveVarScopes();
     }
 
+    void visit(AstCAwait* nodep) override {
+        m_cfuncp->user1(true);  // Mark caller as not a leaf function
+        iterateChildrenConst(nodep);
+    }
+
     void visit(AstCFunc* nodep) override {
         UINFO(4, "  CFUNC " << nodep << endl);
         VL_RESTORER(m_cfuncp);

From 66e105b444c894c9621ab37bd584c270c608b8ef Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 4 May 2025 21:41:14 -0400
Subject: [PATCH 032/211] Fix constant propagation of post-expand stages
 (#5963) (#5972).

---
 Changes                            |  2 +-
 src/V3AstNodeDType.h               |  2 +
 src/V3Const.cpp                    | 44 +++++++++++------
 src/V3Number.h                     |  1 +
 test_regress/t/t_math_cv_concat.py | 18 +++++++
 test_regress/t/t_math_cv_concat.v  | 42 ++++++++++++++++
 test_regress/t/t_math_cv_format.py | 18 +++++++
 test_regress/t/t_math_cv_format.v  | 78 ++++++++++++++++++++++++++++++
 8 files changed, 190 insertions(+), 15 deletions(-)
 create mode 100755 test_regress/t/t_math_cv_concat.py
 create mode 100644 test_regress/t/t_math_cv_concat.v
 create mode 100755 test_regress/t/t_math_cv_format.py
 create mode 100644 test_regress/t/t_math_cv_format.v

diff --git a/Changes b/Changes
index 49b7e80b6..e4a4d1a5a 100644
--- a/Changes
+++ b/Changes
@@ -17,7 +17,7 @@ Verilator 5.037 devel
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
-* Fix constant propagation making upper bits Xs (#5955) (#5969).
+* Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
 * Fix streaming to/from packed arrays (#5976). [Geza Lore]
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index bbcb8fcc3..81c93c04c 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -427,6 +427,8 @@ public:
     string prettyDTypeName(bool full) const override;
     const char* broken() const override {
         BROKEN_RTN(dtypep() != this);
+        BROKEN_RTN(v3Global.widthMinUsage() == VWidthMinUsage::VERILOG_WIDTH
+                   && widthMin() > width());
         return nullptr;
     }
     void setSignedState(const VSigning& signst) {
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index ccaf1d02b..dd4eadbf6 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -927,6 +927,18 @@ class ConstVisitor final : public VNVisitor {
 
     // METHODS
 
+    V3Number constNumV(AstNode* nodep) {
+        // Contract C width to V width (if needed, else just direct copy)
+        // The upper zeros in the C representation can otherwise cause
+        // wrong results in some operations, e.g. MulS
+        const V3Number& numc = VN_AS(nodep, Const)->num();
+        return !numc.isNumber() ? numc : V3Number{nodep, nodep->widthMinV(), numc};
+    }
+    V3Number toNumC(AstNode* nodep, V3Number& numv) {
+        // Extend V width back to C width for given node
+        return !numv.isNumber() ? numv : V3Number{nodep, nodep->width(), numv};
+    }
+
     bool operandConst(AstNode* nodep) { return VN_IS(nodep, Const); }
     bool operandAsvConst(const AstNode* nodep) {
         // BIASV(CONST, BIASV(CONST,...)) -> BIASV( BIASV_CONSTED(a,b), ...)
@@ -1614,31 +1626,32 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(replaceNum(nodep, ones), nodep);
     }
     void replaceConst(AstNodeUniop* nodep) {
-        V3Number num{nodep, nodep->width()};
-        nodep->numberOperate(num, VN_AS(nodep->lhsp(), Const)->num());
+        V3Number numv{nodep, nodep->widthMinV()};
+        nodep->numberOperate(numv, constNumV(nodep->lhsp()));
+        const V3Number& num = toNumC(nodep, numv);
         UINFO(4, "UNICONST -> " << num << endl);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeBiop* nodep) {
-        V3Number num{nodep, nodep->width()};
-        nodep->numberOperate(num, VN_AS(nodep->lhsp(), Const)->num(),
-                             VN_AS(nodep->rhsp(), Const)->num());
+        V3Number numv{nodep, nodep->widthMinV()};
+        nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()));
+        const V3Number& num = toNumC(nodep, numv);
         UINFO(4, "BICONST -> " << num << endl);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeTriop* nodep) {
-        V3Number num{nodep, nodep->width()};
-        nodep->numberOperate(num, VN_AS(nodep->lhsp(), Const)->num(),
-                             VN_AS(nodep->rhsp(), Const)->num(),
-                             VN_AS(nodep->thsp(), Const)->num());
+        V3Number numv{nodep, nodep->widthMinV()};
+        nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()),
+                             constNumV(nodep->thsp()));
+        const V3Number& num = toNumC(nodep, numv);
         UINFO(4, "TRICONST -> " << num << endl);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeQuadop* nodep) {
-        V3Number num{nodep, nodep->width()};
-        nodep->numberOperate(
-            num, VN_AS(nodep->lhsp(), Const)->num(), VN_AS(nodep->rhsp(), Const)->num(),
-            VN_AS(nodep->thsp(), Const)->num(), VN_AS(nodep->fhsp(), Const)->num());
+        V3Number numv{nodep, nodep->widthMinV()};
+        nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()),
+                             constNumV(nodep->thsp()), constNumV(nodep->fhsp()));
+        const V3Number& num = toNumC(nodep, numv);
         UINFO(4, "QUADCONST -> " << num << endl);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
@@ -1719,6 +1732,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(cp);
         rp->lhsp(ap);
         rp->rhsp(bp);
+        rp->dtypeFrom(nodep);  // Upper widthMin more likely correct
         if (VN_IS(rp->lhsp(), Const) && VN_IS(rp->rhsp(), Const)) replaceConst(rp);
         // if (debug()) nodep->dumpTree("-  repAsvConst_new: ");
     }
@@ -1732,6 +1746,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(lp);
         lp->lhsp(lrp);
         lp->rhsp(rp);
+        lp->dtypeFrom(nodep);  // Upper widthMin more likely correct
         // if (debug()) nodep->dumpTree("-  repAsvLUp_new: ");
     }
     void replaceAsvRUp(AstNodeBiop* nodep) {
@@ -1744,6 +1759,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->rhsp(rp);
         rp->lhsp(lp);
         rp->rhsp(rrp);
+        rp->dtypeFrom(nodep);  // Upper widthMin more likely correct
         // if (debug()) nodep->dumpTree("-  repAsvRUp_new: ");
     }
     void replaceAndOr(AstNodeBiop* nodep) {
@@ -3278,7 +3294,7 @@ class ConstVisitor final : public VNVisitor {
                         if (argp) {
                             AstNode* const nextp = argp->nextp();
                             if (VN_IS(argp, Const)) {  // Convert it
-                                const string out = VN_AS(argp, Const)->num().displayed(nodep, fmt);
+                                const string out = constNumV(argp).displayed(nodep, fmt);
                                 UINFO(9, "     DispConst: " << fmt << " -> " << out << "  for "
                                                             << argp << endl);
                                 // fmt = out w/ replace % with %% as it must be literal.
diff --git a/src/V3Number.h b/src/V3Number.h
index 85cd4d150..d092e8f96 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -639,6 +639,7 @@ public:
     bool isEqZero() const VL_MT_SAFE;
     bool isNeqZero() const;
     bool isBitsZero(int msb, int lsb) const;
+    bool isBroken(int vwidth) const;
     bool isEqOne() const;
     bool isEqAllOnes(int optwidth = 0) const;
     bool isCaseEq(const V3Number& rhs) const;  // operator==
diff --git a/test_regress/t/t_math_cv_concat.py b/test_regress/t/t_math_cv_concat.py
new file mode 100755
index 000000000..4ff66dda6
--- /dev/null
+++ b/test_regress/t/t_math_cv_concat.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary', '-fno-expand'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_math_cv_concat.v b/test_regress/t/t_math_cv_concat.v
new file mode 100644
index 000000000..5f4b9e37d
--- /dev/null
+++ b/test_regress/t/t_math_cv_concat.v
@@ -0,0 +1,42 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0h\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module t;
+   // Issue #5972
+
+   reg clk;
+   reg signed [28:28] in1;
+   reg signed [21:8] reg_10;
+
+   // verilator lint_off WIDTHEXPAND
+   always @(negedge clk) begin
+      // Issue #5972
+      reg_10[14:8] <= {1'b1, ~((in1[28:28] & ~(in1[28:28])))};
+   end
+
+   initial begin
+      clk = 1;
+      in1 = 1'b0;
+      reg_10 = '0;
+      #2;
+      clk = 0;
+      #2;
+      `checkh(reg_10, 3);
+
+      in1 = 1'b1;
+      clk = 1;
+      #2;
+      clk = 0;
+      #2;
+      `checkh(reg_10, 3);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_math_cv_format.py b/test_regress/t/t_math_cv_format.py
new file mode 100755
index 000000000..c6e56559a
--- /dev/null
+++ b/test_regress/t/t_math_cv_format.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=["--binary"])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_math_cv_format.v b/test_regress/t/t_math_cv_format.v
new file mode 100644
index 000000000..1896c2bc3
--- /dev/null
+++ b/test_regress/t/t_math_cv_format.v
@@ -0,0 +1,78 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module t;
+   wire signed [21:10] out0;
+
+   sub sub (
+       .out0(out0)
+   );
+
+   sub2 sub2 ();
+
+   string s;
+
+   initial begin
+      #20;
+      // Bug with sformat, so can't just number-compare
+      s = $sformatf("out0=%0d", out0);
+      `checks(s, "out0=-12");
+      if (out0 > 0) $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
+
+module sub (out0);
+   reg signed [27:20] reg_4;
+   output wire [21:10] out0;
+
+   initial begin
+      #1;
+      reg_4 = 0;
+   end
+
+   wire [11:0] w55;
+   wire [11:0] w23;
+   // verilator lint_off WIDTHEXPAND
+   assign w55 = ~reg_4[20];
+   // verilator lint_on WIDTHEXPAND
+   assign { w23[3], w23[1:0] } = 3'h0;
+   assign { w23[11:4], w23[2] } = { w55[11:4], w55[2] };
+   assign out0 = w23;
+endmodule
+
+module sub2;
+   reg [27:5] in0;
+   reg [26:11] in1;
+   wire [24:14] wire_0;
+   wire [26:5] out1;
+   wire w085;
+   wire w082;
+   wire [10:0] w092;
+   wire [9:0] w028;
+
+   string s;
+
+   initial begin
+      in0 = 6902127;
+      in1 = 10000;
+      #10;
+      s = $sformatf("out0=%0d", out1);
+      `checks(s, "out0=0");
+   end
+
+   assign w028 = ~ { 9'h000, in0[23] };
+   assign w092[1] = 1'h0;
+   assign { w092[10:2], w092[0] } = w028;
+   assign wire_0 = w092;
+   assign w082 = | wire_0[18:17];
+   assign w085 = w082 ? in1[11] : 1'h0;
+   assign out1 = { 21'h000000, w085 };
+endmodule

From 1e74451534fa6c6b657360a40c7005b379f9d2ec Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Mon, 5 May 2025 11:25:39 +0200
Subject: [PATCH 033/211] Internals: Change naming convention for Vthread funcs
 (#5982)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
---
 src/V3ExecGraph.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index f3e69a89a..4052f7836 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -771,8 +771,8 @@ const std::vector<AstCFunc*> createThreadFunctions(const ThreadSchedule& schedul
     for (const std::vector<const ExecMTask*>& thread : schedule.threads) {
         if (thread.empty()) continue;
         const uint32_t threadId = schedule.threadId(thread.front());
-        const string name{"__Vthread__" + tag + "__t" + cvtToStr(threadId) + "__s"
-                          + cvtToStr(schedule.id())};
+        const string name{"__Vthread__" + tag + "__s" + cvtToStr(schedule.id()) + "__t"
+                          + cvtToStr(threadId)};
         AstCFunc* const funcp = new AstCFunc{fl, name, nullptr, "void"};
         modp->addStmtsp(funcp);
         funcps.push_back(funcp);

From a3662cc3f584de1950a284c1fed3292caf51417c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 5 May 2025 06:31:06 -0400
Subject: [PATCH 034/211] Internals: Refactor to create replaceWithKeepDType.
 No functional change.

---
 src/V3Ast.cpp       |  4 +++
 src/V3Ast.h         |  1 +
 src/V3Const.cpp     | 63 +++++++++++++++------------------------------
 src/V3Premit.cpp    |  3 +--
 src/V3Width.cpp     | 12 +++------
 src/V3WidthRemove.h |  3 +--
 6 files changed, 32 insertions(+), 54 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 57d2f5434..c630c96fc 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -521,6 +521,10 @@ void AstNode::replaceWith(AstNode* newp) {
     this->unlinkFrBack(&repHandle);
     repHandle.relink(newp);
 }
+void AstNode::replaceWithKeepDType(AstNode* newp) {
+    newp->dtypeFrom(this);
+    replaceWith(newp);
+}
 
 void VNRelinker::dump(std::ostream& str) const {
     str << " BK=" << reinterpret_cast<uint32_t*>(m_backp);
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 1795b683b..37ec30133 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2415,6 +2415,7 @@ public:
     void addNextHere(AstNode* newp);  // Insert newp at this->nextp
     void addHereThisAsNext(AstNode* newp);  // Adds at old place of this, this becomes next
     void replaceWith(AstNode* newp);  // Replace current node in tree with new node
+    void replaceWithKeepDType(AstNode* newp);  // Replace current node in tree, keep old dtype
     // Unlink this from whoever points to it.
     AstNode* unlinkFrBack(VNRelinker* linkerp = nullptr);
     // Unlink this from whoever points to it, keep entire next list with unlinked node
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index dd4eadbf6..864c3a283 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1096,10 +1096,9 @@ class ConstVisitor final : public VNVisitor {
             new AstAnd{nodep->fileline(), maskp->cloneTree(false), condp->thenp()->unlinkFrBack()},
             new AstAnd{nodep->fileline(), maskp->cloneTree(false),
                        condp->elsep()->unlinkFrBack()}));
-        newp->dtypeFrom(nodep);
         newp->thenp()->dtypeFrom(nodep);  // As And might have been to change widths
         newp->elsep()->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -1155,8 +1154,7 @@ class ConstVisitor final : public VNVisitor {
             if (constp->num().isCaseEq(mask)) {
                 AstNode* const rhsp = nodep->rhsp();
                 rhsp->unlinkFrBack();
-                nodep->replaceWith(rhsp);
-                rhsp->dtypeFrom(nodep);
+                nodep->replaceWithKeepDType(rhsp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 return true;
             }
@@ -1354,9 +1352,8 @@ class ConstVisitor final : public VNVisitor {
         if (debug() >= 9) nodep->dumpTree("-  SEL(SH)-in: ");
         AstSel* const newp
             = new AstSel{nodep->fileline(), ap->unlinkFrBack(), newLsb, nodep->widthConst()};
-        newp->dtypeFrom(nodep);
+        nodep->replaceWithKeepDType(newp);
         if (debug() >= 9) newp->dumpTree("-  SEL(SH)-ou: ");
-        nodep->replaceWith(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -1582,10 +1579,9 @@ class ConstVisitor final : public VNVisitor {
         UASSERT_OBJ(!(VN_IS(oldp, Const) && !VN_AS(oldp, Const)->num().isFourState()), oldp,
                     "Already constant??");
         AstNode* const newp = new AstConst{oldp->fileline(), num};
-        newp->dtypeFrom(oldp);
+        oldp->replaceWithKeepDType(newp);
         if (debug() > 5) oldp->dumpTree("-  const_old: ");
         if (debug() > 5) newp->dumpTree("-       _new: ");
-        oldp->replaceWith(newp);
         VL_DO_DANGLING(pushDeletep(oldp), oldp);
     }
     void replaceNum(AstNode* nodep, uint32_t val) {
@@ -1615,8 +1611,7 @@ class ConstVisitor final : public VNVisitor {
         } else {
             AstNode* const newp = new AstAnd{nodep->fileline(), new AstConst{nodep->fileline(), 0},
                                              checkp->unlinkFrBack()};
-            newp->dtypeFrom(nodep);
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
@@ -1674,8 +1669,7 @@ class ConstVisitor final : public VNVisitor {
         childp->unlinkFrBackWithNext();
         // If replacing a SEL for example, the data type comes from the parent (is less wide).
         // This may adversely affect the operation of the node being replaced.
-        childp->dtypeFrom(nodep);
-        nodep->replaceWith(childp);
+        nodep->replaceWithKeepDType(childp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceWChildBool(AstNode* nodep, AstNodeExpr* childp) {
@@ -1872,8 +1866,7 @@ class ConstVisitor final : public VNVisitor {
             = (VN_IS(nodep, ExtendS)
                    ? static_cast<AstNodeExpr*>(new AstExtendS{nodep->fileline(), arg0p})
                    : static_cast<AstNodeExpr*>(new AstExtend{nodep->fileline(), arg0p}));
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replacePowShift(AstNodeBiop* nodep) {  // Pow or PowS
@@ -1881,9 +1874,8 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
         AstShiftL* const newp
             = new AstShiftL{nodep->fileline(), new AstConst{nodep->fileline(), 1}, rhsp};
-        newp->dtypeFrom(nodep);
         newp->lhsp()->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceMulShift(AstMul* nodep) {  // Mul, but not MulS as not simple shift
@@ -1892,8 +1884,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const opp = nodep->rhsp()->unlinkFrBack();
         AstShiftL* const newp
             = new AstShiftL{nodep->fileline(), opp, new AstConst(nodep->fileline(), amount)};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceDivShift(AstDiv* nodep) {  // Mul, but not MulS as not simple shift
@@ -1902,8 +1893,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const opp = nodep->lhsp()->unlinkFrBack();
         AstShiftR* const newp
             = new AstShiftR{nodep->fileline(), opp, new AstConst(nodep->fileline(), amount)};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceModAnd(AstModDiv* nodep) {  // Mod, but not ModS as not simple shift
@@ -1914,8 +1904,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const opp = nodep->lhsp()->unlinkFrBack();
         AstAnd* const newp
             = new AstAnd{nodep->fileline(), opp, new AstConst{nodep->fileline(), mask}};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceShiftOp(AstNodeBiop* nodep) {
@@ -1994,8 +1983,7 @@ class ConstVisitor final : public VNVisitor {
             }
             newp->dtypeFrom(nodep);
             newp = new AstAnd{nodep->fileline(), newp, new AstConst{nodep->fileline(), mask}};
-            newp->dtypeFrom(nodep);
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // if (debug()) newp->dumpTree("-  repShiftShift_new: ");
             iterate(newp);  // Further reduce, either node may have more reductions.
@@ -2347,10 +2335,9 @@ class ConstVisitor final : public VNVisitor {
             UASSERT_OBJ(valuep, nodep, "No value returned from simulation");
             // Replace it
             AstNode* const newp = valuep->cloneTree(false);
-            newp->dtypeFrom(nodep);
             newp->fileline(nodep->fileline());
+            nodep->replaceWithKeepDType(newp);
             UINFO(4, "Simulate->" << newp << endl);
-            nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
@@ -2448,8 +2435,7 @@ class ConstVisitor final : public VNVisitor {
         if (!aRandp || !bRandp) return false;
         if (!aRandp->combinable(bRandp)) return false;
         UINFO(4, "Concat(Rand,Rand) => Rand: " << nodep << endl);
-        aRandp->dtypeFrom(nodep);  // I.e. the total width
-        nodep->replaceWith(aRandp->unlinkFrBack());
+        nodep->replaceWithKeepDType(aRandp->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -2459,8 +2445,7 @@ class ConstVisitor final : public VNVisitor {
         if (!aRandp) return false;
         if (aRandp->seedp()) return false;
         UINFO(4, "Sel(Rand) => Rand: " << nodep << endl);
-        aRandp->dtypeFrom(nodep);  // I.e. the total width
-        nodep->replaceWith(aRandp->unlinkFrBack());
+        nodep->replaceWithKeepDType(aRandp->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -2540,8 +2525,7 @@ class ConstVisitor final : public VNVisitor {
             new AstLogOr{nodep->fileline(),
                          new AstLogNot{nodep->fileline(), rhsp->cloneTreePure(false)},
                          lhsp->cloneTreePure(false)}};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
@@ -2632,8 +2616,7 @@ class ConstVisitor final : public VNVisitor {
         AstSel* const newp
             = new AstSel{nodep->fileline(), fromp,
                          new AstConst{lsbp->fileline(), lsbp->toUInt() % fromp->width()}, widthp};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -2651,8 +2634,7 @@ class ConstVisitor final : public VNVisitor {
         cnt2p->unlinkFrBack();
         AstReplicate* const newp
             = new AstReplicate{nodep->fileline(), from2p, cnt1p->toUInt() * cnt2p->toUInt()};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -2681,8 +2663,7 @@ class ConstVisitor final : public VNVisitor {
         //
         from1p->unlinkFrBack();
         AstReplicate* const newp = new AstReplicate{nodep->fileline(), from1p, cnt1 + cnt2};
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
     }
@@ -2699,8 +2680,7 @@ class ConstVisitor final : public VNVisitor {
         fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp->cloneTreePure(true),
                                widthp->cloneTreePure(true)});
         fromp->rhsp(new AstSel{nodep->fileline(), birhsp, lsbp, widthp});
-        fromp->dtypeFrom(nodep);
-        nodep->replaceWith(fromp);
+        nodep->replaceWithKeepDType(fromp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceSelIntoUniop(AstSel* nodep) {
@@ -2713,8 +2693,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const bilhsp = fromp->lhsp()->unlinkFrBack();
         //
         fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp, widthp});
-        fromp->dtypeFrom(nodep);
-        nodep->replaceWith(fromp);
+        nodep->replaceWithKeepDType(fromp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index dae0a03db..168ea0d86 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -141,8 +141,7 @@ class PremitVisitor final : public VNVisitor {
                 newp = new AstShiftRSOvr{nodep->fileline(), nodep->lhsp()->unlinkFrBack(),
                                          nodep->rhsp()->unlinkFrBack()};
             }
-            newp->dtypeFrom(nodep);
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             return;
         }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index ad749136d..4a3771a79 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2066,8 +2066,7 @@ class WidthVisitor final : public VNVisitor {
                                              << nodep->warnMore()
                                              << "... Suggest try static cast");
         }
-        newp->dtypeFrom(nodep);
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         userIterate(newp, m_vup);
     }
@@ -2211,8 +2210,7 @@ class WidthVisitor final : public VNVisitor {
         if (m_vup->final()) {
             // CastSize not needed once sizes determined
             AstNode* const underp = nodep->lhsp()->unlinkFrBack();
-            underp->dtypeFrom(nodep);
-            nodep->replaceWith(underp);
+            nodep->replaceWithKeepDType(underp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
         // if (debug()) nodep->dumpTree("-  CastSizeOut: ");
@@ -7617,8 +7615,7 @@ class WidthVisitor final : public VNVisitor {
             break;
         }
         UINFO(6, "   ReplaceWithUOrSVersion: " << nodep << " w/ " << newp << endl);
-        nodep->replaceWith(newp);
-        newp->dtypeFrom(nodep);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return newp;
     }
@@ -7707,8 +7704,7 @@ class WidthVisitor final : public VNVisitor {
             break;
         }
         UINFO(6, "   ReplaceWithDVersion: " << nodep << " w/ " << newp << endl);
-        nodep->replaceWith(newp);
-        newp->dtypeFrom(nodep);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return newp;
     }
diff --git a/src/V3WidthRemove.h b/src/V3WidthRemove.h
index b879058f6..beaafdf04 100644
--- a/src/V3WidthRemove.h
+++ b/src/V3WidthRemove.h
@@ -37,8 +37,7 @@ class WidthRemoveVisitor final : public VNVisitor {
 
     void replaceWithSignedVersion(AstNode* nodep, AstNode* newp) {
         UINFO(6, " Replace " << nodep << " w/ " << newp << endl);
-        nodep->replaceWith(newp);
-        newp->dtypeFrom(nodep);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 

From 69eb76ad6638a51cb58fe8142c434ad6a40e2667 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 5 May 2025 07:04:20 -0400
Subject: [PATCH 035/211] Fix constant propagation of post-expand stages
 (#5983).

---
 Changes                            |  2 +-
 docs/internals.rst                 |  2 +-
 src/V3Const.cpp                    | 40 ++++++-------
 src/V3Expand.cpp                   |  1 -
 test_regress/t/t_math_cv_bitop.out |  6 ++
 test_regress/t/t_math_cv_bitop.py  | 18 ++++++
 test_regress/t/t_math_cv_bitop.v   | 92 ++++++++++++++++++++++++++++++
 7 files changed, 138 insertions(+), 23 deletions(-)
 create mode 100644 test_regress/t/t_math_cv_bitop.out
 create mode 100755 test_regress/t/t_math_cv_bitop.py
 create mode 100644 test_regress/t/t_math_cv_bitop.v

diff --git a/Changes b/Changes
index e4a4d1a5a..6404647b4 100644
--- a/Changes
+++ b/Changes
@@ -17,7 +17,7 @@ Verilator 5.037 devel
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
-* Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972).
+* Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972) (#5983).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
 * Fix streaming to/from packed arrays (#5976). [Geza Lore]
diff --git a/docs/internals.rst b/docs/internals.rst
index 6825c0c21..acef93bc7 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1903,7 +1903,7 @@ find what made a <e#*#*> line in the tree dumps):
 
 ::
 
-   watch AstNode::s_editCntGbl==####
+   watch AstNode::s_editCntGbl=####
 
 Then, when the watch fires, to break at every following change to that
 node:
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 864c3a283..96fb5b0a7 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1022,7 +1022,7 @@ class ConstVisitor final : public VNVisitor {
             }
         }
         if (ccastp) {
-            andp->replaceWith(ccastp);
+            andp->replaceWithKeepDType(ccastp);
             VL_DO_DANGLING(pushDeletep(andp), andp);
             return true;
         }
@@ -1128,16 +1128,16 @@ class ConstVisitor final : public VNVisitor {
         const bool orRIsRedundant = checkBottomClear(orp->rhsp());
 
         if (orLIsRedundant && orRIsRedundant) {
-            nodep->replaceWith(
+            nodep->replaceWithKeepDType(
                 new AstConst{nodep->fileline(), AstConst::DTyped{}, nodep->dtypep()});
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             return true;
         } else if (orLIsRedundant) {
-            orp->replaceWith(orp->rhsp()->unlinkFrBack());
+            orp->replaceWithKeepDType(orp->rhsp()->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(orp), orp);
             return false;  // input node is still valid, keep going
         } else if (orRIsRedundant) {
-            orp->replaceWith(orp->lhsp()->unlinkFrBack());
+            orp->replaceWithKeepDType(orp->lhsp()->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(orp), orp);
             return false;  // input node is still valid, keep going
         } else {
@@ -1204,8 +1204,8 @@ class ConstVisitor final : public VNVisitor {
         }
 
         if (newp) {
+            nodep->replaceWithKeepDType(newp);
             UINFO(4, "Transformed leaf of bit tree to " << newp << std::endl);
-            nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
 
@@ -1657,7 +1657,7 @@ class ConstVisitor final : public VNVisitor {
         AstNode* const newp = new AstConst{oldp->fileline(), AstConst::String{}, num};
         if (debug() > 5) oldp->dumpTree("-  const_old: ");
         if (debug() > 5) newp->dumpTree("-       _new: ");
-        oldp->replaceWith(newp);
+        oldp->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(oldp), oldp);
     }
     //----------------------------------------
@@ -1676,9 +1676,9 @@ class ConstVisitor final : public VNVisitor {
         // NODE(..., CHILD(...)) -> REDOR(CHILD(...))
         childp->unlinkFrBack();
         if (childp->width1()) {
-            nodep->replaceWith(childp);
+            nodep->replaceWithKeepDType(childp);
         } else {
-            nodep->replaceWith(new AstRedOr{childp->fileline(), childp});
+            nodep->replaceWithKeepDType(new AstRedOr{childp->fileline(), childp});
         }
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -1767,7 +1767,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeBiop* const rp = VN_AS(nodep->rhsp()->unlinkFrBack(), NodeBiop);
         AstNodeExpr* const rlp = rp->lhsp()->unlinkFrBack();
         AstNodeExpr* const rrp = rp->rhsp()->unlinkFrBack();
-        nodep->replaceWith(lp);
+        nodep->replaceWithKeepDType(lp);
         if (operandsSame(llp, rlp)) {
             lp->lhsp(llp);
             lp->rhsp(nodep);
@@ -1798,7 +1798,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeBiop* const rp = VN_AS(nodep->rhsp()->unlinkFrBack(), NodeBiop);
         AstNodeExpr* const rlp = rp->lhsp()->unlinkFrBack();
         AstNodeExpr* const rrp = rp->rhsp()->unlinkFrBack();
-        nodep->replaceWith(lp);
+        nodep->replaceWithKeepDType(lp);
         lp->lhsp(nodep);
         lp->rhsp(lrp);
         nodep->lhsp(llp);
@@ -1824,7 +1824,7 @@ class ConstVisitor final : public VNVisitor {
         UINFO(5, "merged two adjacent sel " << lselp << " and " << rselp << " to one " << newselp
                                             << endl);
 
-        nodep->replaceWith(newselp);
+        nodep->replaceWithKeepDType(newselp);
         VL_DO_DANGLING(pushDeletep(lselp), lselp);
         VL_DO_DANGLING(pushDeletep(rselp), rselp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -1850,7 +1850,7 @@ class ConstVisitor final : public VNVisitor {
             lp->dtypeChgWidthSigned(newlp->width(), newlp->width(), VSigning::UNSIGNED);
             UINFO(5, "merged " << nodep << endl);
             VL_DO_DANGLING(pushDeletep(rp->unlinkFrBack()), rp);
-            nodep->replaceWith(lp->unlinkFrBack());
+            nodep->replaceWithKeepDType(lp->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             iterate(lp->lhsp());
             iterate(lp->rhsp());
@@ -2043,7 +2043,7 @@ class ConstVisitor final : public VNVisitor {
                                     new AstConcat{rhs1p->fileline(), rhs1p, rhs2p});
         }
         // if (debug()) pnewp->dumpTree("-  conew: ");
-        nodep->replaceWith(newp);
+        nodep->replaceWith(newp);  // dypep intentionally changing
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         VL_DO_DANGLING(pushDeletep(nextp->unlinkFrBack()), nextp);
         return true;
@@ -2562,7 +2562,7 @@ class ConstVisitor final : public VNVisitor {
             newlsbp->dtypeFrom(widep);
         }
         AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, widthp};
-        nodep->replaceWith(newp);
+        nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
 
@@ -2576,12 +2576,12 @@ class ConstVisitor final : public VNVisitor {
             AstSel* const newp
                 = new AstSel{nodep->fileline(), conLhsp, nodep->lsbConst() - conRhsp->width(),
                              nodep->widthConst()};
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
         } else if (static_cast<int>(nodep->msbConst()) < conRhsp->width()) {
             conRhsp->unlinkFrBack();
             AstSel* const newp
                 = new AstSel{nodep->fileline(), conRhsp, nodep->lsbConst(), nodep->widthConst()};
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
         } else {
             // Yuk, split between the two
             conRhsp->unlinkFrBack();
@@ -2592,7 +2592,7 @@ class ConstVisitor final : public VNVisitor {
                                            nodep->msbConst() - conRhsp->width() + 1},
                                 new AstSel{nodep->fileline(), conRhsp, nodep->lsbConst(),
                                            conRhsp->width() - nodep->lsbConst()}};
-            nodep->replaceWith(newp);
+            nodep->replaceWithKeepDType(newp);
         }
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -2718,7 +2718,7 @@ class ConstVisitor final : public VNVisitor {
                 nodep->v3error("Illegal assignment of constant to unpacked array");
             } else {
                 AstNode* const fromp = nodep->fromp()->unlinkFrBack();
-                nodep->replaceWith(fromp);
+                nodep->replaceWithKeepDType(fromp);
                 if (VN_IS(fromp->dtypep()->skipRefp(), NodeArrayDType)) {
                     // Strip off array to find what array references
                     fromp->dtypeFrom(
@@ -2771,12 +2771,12 @@ class ConstVisitor final : public VNVisitor {
                     // This exception is fairly fragile, i.e. doesn't
                     // support arrays of arrays or other stuff
                     AstNode* const newp = valuep->cloneTree(false);
-                    nodep->replaceWith(newp);
+                    nodep->replaceWithKeepDType(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     did = true;
                 } else if (nodep->varp()->isParam() && VN_IS(valuep, Unbounded)) {
                     AstNode* const newp = valuep->cloneTree(false);
-                    nodep->replaceWith(newp);
+                    nodep->replaceWithKeepDType(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     did = true;
                 }
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 395ba5e04..401923ef3 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -445,7 +445,6 @@ class ExpandVisitor final : public VNVisitor {
                 midp = new AstCond{
                     nfl,
                     // lsb % VL_EDATASIZE == 0 ?
-
                     new AstEq{nfl, new AstConst{nfl, 0}, newSelBitBit(nodep->lsbp())},
                     // 0 :
                     new AstConst{nfl, zero},
diff --git a/test_regress/t/t_math_cv_bitop.out b/test_regress/t/t_math_cv_bitop.out
new file mode 100644
index 000000000..d4536207b
--- /dev/null
+++ b/test_regress/t/t_math_cv_bitop.out
@@ -0,0 +1,6 @@
+one 'd=-1 'b=1
+ort 'd=-1 'b=1
+tmp 'd=  -1 'b=11111111
+out63 'd=       1 'b=000000000000000000000001
+out63 'd=       1 'b=000000000000000000000001
+*-* All Finished *-*
diff --git a/test_regress/t/t_math_cv_bitop.py b/test_regress/t/t_math_cv_bitop.py
new file mode 100755
index 000000000..dcb1ff476
--- /dev/null
+++ b/test_regress/t/t_math_cv_bitop.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=["--binary"])
+
+test.execute(expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_math_cv_bitop.v b/test_regress/t/t_math_cv_bitop.v
new file mode 100644
index 000000000..9a4cbcf6a
--- /dev/null
+++ b/test_regress/t/t_math_cv_bitop.v
@@ -0,0 +1,92 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module sub (
+  input  wire        clock_4,
+  input  wire        clock_8,
+  output wire [28:5] out63
+);
+
+   reg [28:0]  reg_12;
+   reg [28:22] reg_24;
+
+   wire        _0558_ = | reg_24[26:25]; // reg_24 = 0 or 1100110 ---> _0558_ == 0
+   wire [28:0] _0670_ = _0558_ ? reg_12 : 29'h00000f93; // _0558_ == 0 ---> _0670_ == 29'h00000f93
+   wire [28:0] _0399_= - _0670_; // _0670_ == 29'h00000f93 ---> _0399_ = 29'b11111111111111111000001101101
+   wire        _0085_ = ~ _0399_[2]; // _0399_[2] == 1 ---> _0085_ == 0
+   wire [28:0] _0769_;
+   assign { _0769_[28:3], _0769_[1:0] } = { _0399_[28:3], _0399_[1:0] }; // _0769_ != 0
+   assign _0769_[2] = _0085_;
+
+   // verilator lint_off WIDTH
+   wire        _0305_ = ! _0769_; // _0769_ != 0 ---> _0305_ == 0
+   wire [23:0] _0306_ = ! _0305_; // _0305_ == 0 ---> _0306_ == 1
+   // verilator lint_on WIDTH
+
+   assign out63  = _0306_; // out63 == 1
+
+   always @(posedge clock_4, posedge clock_8)
+     if (clock_8) reg_12 <= 29'h00000066;
+     else reg_12 <= { reg_12[28:27], 25'h0000001, reg_12[1:0] };
+
+   always @(posedge clock_4, posedge clock_8)
+     if (clock_8) reg_24 <= 7'h66;
+     else reg_24 <= reg_24;
+
+endmodule
+
+module t;
+   reg  clock_4;
+   reg  clock_8;
+   wire signed [28:5] out63;
+   reg signed [7:0] tmp = -1;
+   reg signed [0:0] one = 1;
+   reg signed [0:0] onert = 1;
+
+   sub sub (
+            .clock_4 (clock_4),
+            .clock_8 (clock_8),
+            .out63   (out63)
+            );
+
+
+   initial begin
+      // All simulators agree: 1'sb1 really shows as decimal -1
+      $display("one 'd=%d 'b=%b", one, one);
+`ifdef VERILATOR
+      onert = $c(1);
+`endif
+      $display("ort 'd=%d 'b=%b", onert, onert);
+
+      $display("tmp 'd=%d 'b=%b", tmp, tmp);
+
+      clock_4 = 0;
+      clock_8 = 0;
+      #2000;
+
+      sub.reg_24 = 0;
+      sub.reg_12 = 0;
+      #2000;
+
+      clock_4 = 0;
+      clock_8 = 0;
+      #10;
+      $display("out63 'd=%d 'b=%b", out63, out63);
+
+      #2000;
+      clock_4 = 1;
+      clock_8 = 1;
+      #10;
+      $display("out63 'd=%d 'b=%b", out63, out63);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 49e5c305a4b0fec456a6cc6ab863e8ac90a2a113 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 5 May 2025 18:35:50 -0400
Subject: [PATCH 036/211] Tests: Split and rename t_parse_sync_bad

---
 test_regress/t/t_parse_sync_bad.out           | 11 +++++++
 ...source_sync_bad.py => t_parse_sync_bad.py} |  0
 test_regress/t/t_parse_sync_bad.v             | 29 +++++++++++++++++++
 test_regress/t/t_parse_sync_bad2.out          |  8 +++++
 test_regress/t/t_parse_sync_bad2.py           | 16 ++++++++++
 ..._source_sync_bad.v => t_parse_sync_bad2.v} | 11 -------
 test_regress/t/t_source_sync_bad.out          | 17 -----------
 7 files changed, 64 insertions(+), 28 deletions(-)
 create mode 100644 test_regress/t/t_parse_sync_bad.out
 rename test_regress/t/{t_source_sync_bad.py => t_parse_sync_bad.py} (100%)
 create mode 100644 test_regress/t/t_parse_sync_bad.v
 create mode 100644 test_regress/t/t_parse_sync_bad2.out
 create mode 100755 test_regress/t/t_parse_sync_bad2.py
 rename test_regress/t/{t_source_sync_bad.v => t_parse_sync_bad2.v} (75%)
 delete mode 100644 test_regress/t/t_source_sync_bad.out

diff --git a/test_regress/t/t_parse_sync_bad.out b/test_regress/t/t_parse_sync_bad.out
new file mode 100644
index 000000000..ad7479297
--- /dev/null
+++ b/test_regress/t/t_parse_sync_bad.out
@@ -0,0 +1,11 @@
+%Error: t/t_parse_sync_bad.v:19:22: syntax error, unexpected IDENTIFIER, expecting "'{"
+   19 |       pkg::cls::defi invalid;   
+      |                      ^~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_parse_sync_bad.v:25:14: syntax error, unexpected /*verilator clocker*/, expecting ',' or ';'
+   25 |    logic clk /*verilator clocker*/ ;
+      |              ^~~~~~~~~~~~~~~~~~~~~
+%Error: t/t_parse_sync_bad.v:29:1: syntax error, unexpected endmodule
+   29 | endmodule
+      | ^~~~~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_source_sync_bad.py b/test_regress/t/t_parse_sync_bad.py
similarity index 100%
rename from test_regress/t/t_source_sync_bad.py
rename to test_regress/t/t_parse_sync_bad.py
diff --git a/test_regress/t/t_parse_sync_bad.v b/test_regress/t/t_parse_sync_bad.v
new file mode 100644
index 000000000..579db166f
--- /dev/null
+++ b/test_regress/t/t_parse_sync_bad.v
@@ -0,0 +1,29 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by Dan Petrisko.
+// SPDX-License-Identifier: CC0-1.0
+
+package pkg;
+   class cls;
+      typedef unknown defu;
+      typedef int defi;
+   endclass
+endpackage
+
+module t;
+   task tsk;
+      begin
+      valid1 = 5;  // valid statement
+
+      pkg::cls::defi invalid;  // invalid statement
+      end
+   endtask
+endmodule
+
+typedef struct packed {
+   logic clk /*verilator clocker*/;
+   logic data;
+} ss_s;
+
+endmodule
diff --git a/test_regress/t/t_parse_sync_bad2.out b/test_regress/t/t_parse_sync_bad2.out
new file mode 100644
index 000000000..fdfd58413
--- /dev/null
+++ b/test_regress/t/t_parse_sync_bad2.out
@@ -0,0 +1,8 @@
+%Error: t/t_parse_sync_bad2.v:17:16: syntax error, unexpected IDENTIFIER
+   17 |       Invalid1 invalid1;   
+      |                ^~~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_parse_sync_bad2.v:20:16: syntax error, unexpected IDENTIFIER
+   20 |       Invalid2 invalid2;   
+      |                ^~~~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_parse_sync_bad2.py b/test_regress/t/t_parse_sync_bad2.py
new file mode 100755
index 000000000..e33e10acf
--- /dev/null
+++ b/test_regress/t/t_parse_sync_bad2.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_source_sync_bad.v b/test_regress/t/t_parse_sync_bad2.v
similarity index 75%
rename from test_regress/t/t_source_sync_bad.v
rename to test_regress/t/t_parse_sync_bad2.v
index 32b7559ab..eb94043b8 100644
--- a/test_regress/t/t_source_sync_bad.v
+++ b/test_regress/t/t_parse_sync_bad2.v
@@ -18,17 +18,6 @@ module t;
       pkg::cls::defi valid1;  // valid declaration
       pkg::cls::defu valid2;  // valid declaration
       Invalid2 invalid2;  // invalid declaration
-
-      valid1 = 5;  // valid statement
-
-      pkg::cls::defi invalid;  // invalid statement
       end
    endtask
 endmodule
-
-typedef struct packed {
-   logic clk /*verilator clocker*/;
-   logic data;
-} ss_s;
-
-endmodule
diff --git a/test_regress/t/t_source_sync_bad.out b/test_regress/t/t_source_sync_bad.out
deleted file mode 100644
index 61583aa98..000000000
--- a/test_regress/t/t_source_sync_bad.out
+++ /dev/null
@@ -1,17 +0,0 @@
-%Error: t/t_source_sync_bad.v:17:16: syntax error, unexpected IDENTIFIER
-   17 |       Invalid1 invalid1;   
-      |                ^~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_source_sync_bad.v:20:16: syntax error, unexpected IDENTIFIER
-   20 |       Invalid2 invalid2;   
-      |                ^~~~~~~~
-%Error: t/t_source_sync_bad.v:24:22: syntax error, unexpected IDENTIFIER, expecting "'{"
-   24 |       pkg::cls::defi invalid;   
-      |                      ^~~~~~~
-%Error: t/t_source_sync_bad.v:30:14: syntax error, unexpected /*verilator clocker*/, expecting ',' or ';'
-   30 |    logic clk /*verilator clocker*/ ;
-      |              ^~~~~~~~~~~~~~~~~~~~~
-%Error: t/t_source_sync_bad.v:34:1: syntax error, unexpected endmodule
-   34 | endmodule
-      | ^~~~~~~~~
-%Error: Exiting due to

From fe562d4715497283fc704362f7829268096ff75e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 5 May 2025 19:54:52 -0400
Subject: [PATCH 037/211] Internals: Move Stream dtype conversion to V3Width,
 towards future parser

---
 src/V3Ast.h     |  4 +++-
 src/V3Width.cpp | 14 ++++++++++++++
 src/verilog.y   |  8 ++------
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 37ec30133..241eb0383 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -458,6 +458,7 @@ public:
         ILLEGAL,
         //
         DIM_BITS,                       // V3Const converts to constant
+        DIM_BITS_OR_NUMBER,             // V3Const converts to constant
         DIM_DIMENSIONS,                 // V3Width converts to constant
         DIM_HIGH,                       // V3Width processes
         DIM_INCREMENT,                  // V3Width processes
@@ -500,7 +501,8 @@ public:
         // clang-format off
         static const char* const names[] = {
             "%E-AT",
-            "DIM_BITS", "DIM_DIMENSIONS", "DIM_HIGH", "DIM_INCREMENT", "DIM_LEFT",
+            "DIM_BITS", "DIM_BITS_OR_NUMBER", "DIM_DIMENSIONS",
+            "DIM_HIGH", "DIM_INCREMENT", "DIM_LEFT",
             "DIM_LOW", "DIM_RIGHT", "DIM_SIZE", "DIM_UNPK_DIMENSIONS",
             "DT_PUBLIC",
             "ENUM_FIRST", "ENUM_LAST", "ENUM_NUM",
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 4a3771a79..8b9383f61 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1672,6 +1672,20 @@ class WidthVisitor final : public VNVisitor {
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
             break;
         }
+        case VAttrType::DIM_BITS_OR_NUMBER: {
+            // If dtype, compute DIM_BITS, else take expression as a number to use
+            if (VN_IS(nodep->fromp(), NodeExpr)) {
+                nodep->replaceWith(nodep->fromp()->unlinkFrBack());
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            } else {
+                AstNode* newp = new AstAttrOf{nodep->fileline(), VAttrType::DIM_BITS,
+                                              nodep->fromp()->unlinkFrBack()};
+                nodep->replaceWith(newp);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                userIterateAndNext(newp, WidthVP{SELF, BOTH}.p());  // Convert AttrOf
+            }
+            return;
+        }
         case VAttrType::DIM_BITS:
         case VAttrType::DIM_HIGH:
         case VAttrType::DIM_INCREMENT:
diff --git a/src/verilog.y b/src/verilog.y
index 126c2089c..80ed887c1 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -5437,13 +5437,9 @@ streaming_concatenation<nodeStreamp>: // ==IEEE: streaming_concatenation
         |       '{' yP_SRIGHT stream_concatenation '}'
                         { $$ = new AstStreamR{$2, $3, new AstConst{$2, 1}}; }
         |       '{' yP_SLEFT  stream_expressionOrDataType stream_concatenation '}'
-                        { AstNodeExpr* const bitsp = VN_IS($3, NodeExpr) ? VN_AS($3, NodeExpr)
-                                                                         : new AstAttrOf{$1, VAttrType::DIM_BITS, $3};
-                          $$ = new AstStreamL{$2, $4, bitsp}; }
+                        { $$ = new AstStreamL{$2, $4, new AstAttrOf{$1, VAttrType::DIM_BITS_OR_NUMBER, $3}}; }
         |       '{' yP_SRIGHT stream_expressionOrDataType stream_concatenation '}'
-                        { AstNodeExpr* const bitsp = VN_IS($3, NodeExpr) ? VN_AS($3, NodeExpr)
-                                                                          : new AstAttrOf{$1, VAttrType::DIM_BITS, $3};
-                          $$ = new AstStreamR{$2, $4, bitsp}; }
+                        { $$ = new AstStreamR{$2, $4, new AstAttrOf{$1, VAttrType::DIM_BITS_OR_NUMBER, $3}}; }
         ;
 
 stream_concatenation<nodeExprp>:    // ==IEEE: stream_concatenation

From 2ed754d5ea8d2f2d8df2a5dc4f684af690449af1 Mon Sep 17 00:00:00 2001
From: Yutetsu TAKATSUKASA <y.takatsukasa@gmail.com>
Date: Tue, 6 May 2025 18:00:17 +0900
Subject: [PATCH 038/211] Fix Inconsistent assignment error by split-var
 (#5984) (#5988)

---
 src/V3SplitVar.cpp                 | 10 ++-------
 test_regress/t/t_split_var_types.v | 33 ++++++++++++++++++++++++++++--
 2 files changed, 33 insertions(+), 10 deletions(-)

diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 58c978d89..7261a877e 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -919,14 +919,8 @@ public:
             points.emplace_back(ref.lsb(), false);  // Start of a region
             points.emplace_back(ref.msb() + 1, true);  // End of a region
         }
-        int bit_hi, bit_lo;
-        if (basicp() == dtypep) {
-            bit_hi = basicp()->hi();
-            bit_lo = basicp()->lo();
-        } else {  // packed struct, packed array. lo is 0
-            bit_hi = dtypep->width() - 1;
-            bit_lo = 0;
-        }
+        const int bit_lo = basicp()->lo();
+        const int bit_hi = bit_lo + dtypep->width() - 1;
         if (skipUnused && !m_rhs.empty()) {  // Range to be read must be kept, so add points here
             int lsb = bit_hi + 1;
             int msb = bit_lo - 1;
diff --git a/test_regress/t/t_split_var_types.v b/test_regress/t/t_split_var_types.v
index 148c6ae84..cb94f7002 100644
--- a/test_regress/t/t_split_var_types.v
+++ b/test_regress/t/t_split_var_types.v
@@ -10,13 +10,20 @@ module t(/*AUTOARG*/
     );
     input clk;
 
+    logic [7:0] data = 0;
     // Test loop
     always @ (posedge clk) begin
-        $write("*-* All Finished *-*\n");
-        $finish;
+       if (data != 15) begin
+          data <= data + 8'd1;
+       end else begin
+          $write("*-* All Finished *-*\n");
+          $finish;
+       end
     end
 
+
     bug5782 u_bug5782(.data_out());
+    bug5984 u_bug5984(.in(data));
 
 endmodule
 
@@ -29,3 +36,25 @@ module bug5782 (
         data_out = data[7];
     end
 endmodule
+
+// #5984 inconsistent assignment due to wrong bit range calculation.
+module bug5984 (
+   input logic [1:0][3:0] in
+   );
+
+   logic [1:0][5:2] internal;
+
+   for (genvar dim1 = 0; dim1 < 2; dim1++) begin
+      for (genvar dim2 = 0; dim2 < 4; dim2++) begin
+         assign internal[dim1][dim2+2] = in[dim1][dim2];
+      end
+   end
+
+   for (genvar dim1 = 0; dim1 < 2; dim1++) begin
+      for (genvar dim2 = 0; dim2 < 4; dim2++) begin
+         always_ff @(negedge internal[dim1][dim2+2]) begin
+            $display("%0b", internal[dim1][dim2+2]);
+         end
+      end
+   end
+endmodule

From da5eb620bf3a5699555de9ea21e1b78459f4af21 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 6 May 2025 06:34:49 -0400
Subject: [PATCH 039/211] Internals: Move timeunit to pragma, in prep for
 future parser. No user-functional change intended.

---
 src/V3Ast.h          |  1 +
 src/V3AstNodeOther.h |  6 ++++++
 src/V3LinkLevel.cpp  | 43 +++++++++++++++++++++++++++++--------------
 src/V3ParseImp.cpp   | 19 ++++++++-----------
 src/V3ParseImp.h     |  4 ++--
 src/verilog.y        |  9 +++------
 6 files changed, 49 insertions(+), 33 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index 241eb0383..fee64ac13 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -336,6 +336,7 @@ public:
         NO_INLINE_TASK,
         PUBLIC_MODULE,
         PUBLIC_TASK,
+        TIMEUNIT_SET,
         UNROLL_DISABLE,
         UNROLL_FULL,
         FULL_CASE,
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 7d0180908..5aa5b6a0f 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1494,18 +1494,24 @@ public:
 };
 class AstPragma final : public AstNode {
     const VPragmaType m_pragType;  // Type of pragma
+    const VTimescale m_timescale;  // For TIMEUNIT_SET
 public:
     // Pragmas don't result in any output code, they're just flags that affect
     // other processing in verilator.
     AstPragma(FileLine* fl, VPragmaType pragType)
         : ASTGEN_SUPER_Pragma(fl)
         , m_pragType{pragType} {}
+    AstPragma(FileLine* fl, VPragmaType pragType, const VTimescale& timescale)
+        : ASTGEN_SUPER_Pragma(fl)
+        , m_pragType{pragType}
+        , m_timescale(timescale) {}
     ASTGEN_MEMBERS_AstPragma;
     VPragmaType pragType() const { return m_pragType; }  // *=type of the pragma
     bool isPredictOptimizable() const override { return false; }
     bool sameNode(const AstNode* samep) const override {
         return pragType() == VN_DBG_AS(samep, Pragma)->pragType();
     }
+    VTimescale timescale() const { return m_timescale; }
 };
 class AstPropSpec final : public AstNode {
     // A clocked property
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index b982dbbe0..e90eda0a0 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -88,9 +88,24 @@ void V3LinkLevel::modSortByLevel() {
 void V3LinkLevel::timescaling(const ModVec& mods) {
     // Timescale determination
     const AstNodeModule* modTimedp = nullptr;
-    VTimescale unit(VTimescale::NONE);
+    VTimescale unit{VTimescale::NONE};
+
+    // Move timeunit attributes from parse to module unit
+    // Grammar only allows timeunit as module_item, so no need to recurse full tree
+    for (AstNodeModule* modp : mods) {
+        for (AstNode *nextp, *childp = modp->stmtsp(); childp; childp = nextp) {
+            nextp = childp->nextp();
+            if (AstPragma* pragp = VN_CAST(childp, Pragma)) {
+                if (pragp->pragType() == VPragmaType::TIMEUNIT_SET) {
+                    modp->timeunit(pragp->timescale());
+                    VL_DO_DANGLING(pragp->unlinkFrBack()->deleteTree(), pragp);
+                }
+            }
+        }
+    }
     // Use highest level module as default unit - already sorted in proper order
-    for (const auto& modp : mods) {
+    // Combine timing into later modules
+    for (AstNodeModule* modp : mods) {
         if (!modTimedp && !modp->timeunit().isNone()) {
             modTimedp = modp;
             unit = modTimedp->timeunit();
@@ -106,24 +121,24 @@ void V3LinkLevel::timescaling(const ModVec& mods) {
         if (!upkgp->timeunit().isNone()) dunitTimed = true;
     }
 
-    for (AstNodeModule* nodep : mods) {
-        if (!v3Global.opt.timeOverrideUnit().isNone()) nodep->timeunit(unit);
-        if (nodep->timeunit().isNone()) {
+    for (AstNodeModule* modp : mods) {
+        if (!v3Global.opt.timeOverrideUnit().isNone()) modp->timeunit(unit);
+        if (modp->timeunit().isNone()) {
             if (modTimedp  // Got previous
                 && !dunitTimed
                 && (  // unit doesn't already include an override
                     v3Global.opt.timeOverrideUnit().isNone()
                     && v3Global.opt.timeDefaultUnit().isNone())
-                && nodep->timescaleMatters()) {
-                nodep->v3warn(TIMESCALEMOD,
-                              "Timescale missing on this module as other modules have "
-                              "it (IEEE 1800-2023 3.14.2.3)\n"
-                                  << nodep->warnContextPrimary() << '\n'
-                                  << modTimedp->warnOther()
-                                  << "... Location of module with timescale\n"
-                                  << modTimedp->warnContextSecondary());
+                && modp->timescaleMatters()) {
+                modp->v3warn(TIMESCALEMOD,
+                             "Timescale missing on this module as other modules have "
+                             "it (IEEE 1800-2023 3.14.2.3)\n"
+                                 << modp->warnContextPrimary() << '\n'
+                                 << modTimedp->warnOther()
+                                 << "... Location of module with timescale\n"
+                                 << modTimedp->warnContextSecondary());
             }
-            nodep->timeunit(unit);
+            modp->timeunit(unit);
         }
     }
 
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index d71d6a090..8e6613fe1 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -126,8 +126,8 @@ void V3ParseImp::lexTimescaleParse(FileLine* fl, const char* textp) {
     m_timeLastUnit = v3Global.opt.timeComputeUnit(unit);
     v3Global.rootp()->timeprecisionMerge(fl, prec);
 }
-void V3ParseImp::timescaleMod(FileLine* fl, AstNodeModule* modp, bool unitSet, double unitVal,
-                              bool precSet, double precVal) {
+AstPragma* V3ParseImp::createTimescale(FileLine* fl, bool unitSet, double unitVal, bool precSet,
+                                       double precVal) {
     VTimescale unit{VTimescale::NONE};
     if (unitSet) {
         bool bad;
@@ -146,16 +146,13 @@ void V3ParseImp::timescaleMod(FileLine* fl, AstNodeModule* modp, bool unitSet, d
             fl->v3error("timeprecision illegal value");
         }
     }
-    if (!unit.isNone()) {
-        unit = v3Global.opt.timeComputeUnit(unit);
-        if (modp) {
-            modp->timeunit(unit);
-        } else {
-            v3Global.rootp()->timeunit(unit);
-            unitPackage(fl)->timeunit(unit);
-        }
-    }
     v3Global.rootp()->timeprecisionMerge(fl, prec);
+    if (unit.isNone()) {
+        return nullptr;
+    } else {
+        unit = v3Global.opt.timeComputeUnit(unit);
+        return new AstPragma{fl, VPragmaType::TIMEUNIT_SET, unit};
+    }
 }
 
 void V3ParseImp::lexVerilatorCmtLintSave(const FileLine* fl) { m_lexLintState.push_back(*fl); }
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index e6ebcbc92..5fcf49490 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -181,8 +181,8 @@ public:
     void tagNodep(AstNode* nodep) { m_tagNodep = nodep; }
     AstNode* tagNodep() const { return m_tagNodep; }
     void lexTimescaleParse(FileLine* fl, const char* textp) VL_MT_DISABLED;
-    void timescaleMod(FileLine* fl, AstNodeModule* modp, bool unitSet, double unitVal,
-                      bool precSet, double precVal) VL_MT_DISABLED;
+    AstPragma* createTimescale(FileLine* fl, bool unitSet, double unitVal, bool precSet,
+                               double precVal) VL_MT_DISABLED;
     VTimescale timeLastUnit() const { return m_timeLastUnit; }
 
     void lexFileline(FileLine* fl) { m_lexFileline = fl; }
diff --git a/src/verilog.y b/src/verilog.y
index 80ed887c1..1a4940496 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1227,14 +1227,11 @@ description:                    // ==IEEE: description
 
 timeunits_declaration<nodep>:   // ==IEEE: timeunits_declaration
                 yTIMEUNIT yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), true, $2, false, 0);
-                          $$ = nullptr; }
+                        { $$ = PARSEP->createTimescale($<fl>2, true, $2, false, 0); }
         |       yTIMEUNIT yaTIMENUM '/' yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), true, $2, true, $4);
-                          $$ = nullptr; }
+                        { $$ = PARSEP->createTimescale($<fl>2, true, $2, true, $4); }
         |       yTIMEPRECISION yaTIMENUM ';'
-                        { PARSEP->timescaleMod($<fl>2, SYMP->findTopNodeModule($<fl>1, false), false, 0, true, $2);
-                          $$ = nullptr; }
+                        { $$ = PARSEP->createTimescale($<fl>2, false, 0, true, $2); }
         ;
 
 //**********************************************************************

From d5f773f385a4db4ec63f6b3993017ead784d1cb5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 6 May 2025 08:03:30 -0400
Subject: [PATCH 040/211] Internals: Move hasParameterList away from symbol
 table. No functional change intended.

---
 src/V3ParseImp.h |  1 +
 src/V3ParseSym.h |  7 -------
 src/verilog.y    | 17 ++++++++++++-----
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 5fcf49490..22778a657 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -111,6 +111,7 @@ struct V3ParseBisonYYSType final {
     AstNode* scp;  // Symbol table scope for future lookups
     int token;  // Read token, aka tok
     VBaseOverride baseOverride;
+    bool flag = false;  // Passed up some rules
     union {
         V3Number* nump;
         string* strp;
diff --git a/src/V3ParseSym.h b/src/V3ParseSym.h
index 1f24cd76c..d1911a8bd 100644
--- a/src/V3ParseSym.h
+++ b/src/V3ParseSym.h
@@ -130,13 +130,6 @@ public:
         UASSERT_OBJ(!m_sympStack.empty(), nodep, "symbol stack underflow");
         m_symCurrentp = m_sympStack.back();
     }
-    AstNodeModule* findTopNodeModule(FileLine* fl, bool requireNoneNull = true) {
-        for (VSymEnt* const symp : vlstd::reverse_view(m_sympStack)) {
-            if (AstNodeModule* const modp = VN_CAST(symp->nodep(), NodeModule)) return modp;
-        }
-        if (requireNoneNull) fl->v3fatalSrc("fail to find current module");
-        return nullptr;
-    }
     void showUpward() {  // LCOV_EXCL_START
         UINFO(1, "ParseSym Stack:\n");
         for (VSymEnt* const symp : vlstd::reverse_view(m_sympStack)) {
diff --git a/src/verilog.y b/src/verilog.y
index 1a4940496..5c69afffb 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1379,6 +1379,7 @@ module_declaration:             // ==IEEE: module_declaration
                 modFront importsAndParametersE portsStarE ';'
         /*cont*/    module_itemListE yENDMODULE endLabelE
                         { $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));  // Stash for implicit wires, etc
+                          $1->hasParameterList($<flag>2);
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
@@ -1414,8 +1415,11 @@ modFront<nodeModulep>:
 
 importsAndParametersE<nodep>:   // IEEE: common part of module_declaration, interface_declaration, program_declaration
         //                      // { package_import_declaration } [ parameter_port_list ]
-                parameter_port_listE                    { $$ = $1; }
-        |       package_import_declarationList parameter_port_listE     { $$ = addNextNull($1, $2); }
+                parameter_port_listE
+                        { $$ = $1; $<flag>$ = $<flag>1; }  // hasParameterList
+        |       package_import_declarationList parameter_port_listE
+                        { $$ = addNextNull($1, $2);
+                          $<flag>$ = $<flag>2; }  // hasParameterList
         ;
 
 udpFront<nodeModulep>:
@@ -1460,17 +1464,17 @@ parameter_value_assignmentClass<pinp>:  // IEEE: parameter_value_assignment (for
         ;
 
 parameter_port_listE<nodep>:    // IEEE: parameter_port_list + empty == parameter_value_assignment
-                /* empty */                             { $$ = nullptr; }
+                /* empty */                             { $$ = nullptr; $<flag>$ = false; }  // hasParameterList
         |       '#' '(' ')'                             { $$ = nullptr;
-                                                          SYMP->findTopNodeModule($<fl>1)->hasParameterList(true); }
+                                                          $<flag>$ = true; }  // hasParameterList
         //                      // IEEE: '#' '(' list_of_param_assignments { ',' parameter_port_declaration } ')'
         //                      // IEEE: '#' '(' parameter_port_declaration { ',' parameter_port_declaration } ')'
         //                      // Can't just do that as "," conflicts with between vars and between stmts, so
         //                      // split into pre-comma and post-comma parts
         |       '#' '('                                 { VARRESET_LIST(GPARAM);
-                                                          SYMP->findTopNodeModule($<fl>1)->hasParameterList(true);
                                                           GRAMMARP->m_pinAnsi = true; }
         /*cont*/    paramPortDeclOrArgList ')'          { $$ = $4;
+                                                          $<flag>$ = true;  // hasParameterList
                                                           VARRESET_NONLIST(UNKNOWN);
                                                           GRAMMARP->m_pinAnsi = false; }
         //                      // Note legal to start with "a=b" with no parameter statement
@@ -1685,6 +1689,7 @@ interface_declaration:          // IEEE: interface_declaration + interface_nonan
                         { if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
+                          $1->hasParameterList($<flag>2);
                           SYMP->popScope($1); }
         |       yEXTERN intFront parameter_port_listE portsStarE ';'
                         { BBUNSUP($<fl>1, "Unsupported: extern interface"); }
@@ -1769,6 +1774,7 @@ program_declaration:            // IEEE: program_declaration + program_nonansi_h
                 pgmFront parameter_port_listE portsStarE ';'
         /*cont*/    program_itemListE yENDPROGRAM endLabelE
                         { $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));  // Stash for implicit wires, etc
+                          $1->hasParameterList($<flag>2);
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
@@ -7307,6 +7313,7 @@ class_declaration<nodep>:       // ==IEEE: part of class_declaration
         //                      // new class scope correct via classFront
                 classFront parameter_port_listE classExtendsE classImplementsE ';'
         /*mid*/         { // Allow resolving types declared in base extends class
+                          $1->hasParameterList($<flag>2);
                           if ($<scp>3) SYMP->importExtends($<scp>3);
                         }
         /*cont*/    class_itemListEnd endLabelE

From b099d6fe639dee08a80e27e4e1fd3de48ca0f658 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 6 May 2025 20:39:17 -0400
Subject: [PATCH 041/211] Fix implicit dtype numbering to be per-module.

Internals: Remove use of parser in implicit dtype numbering.
---
 src/V3AstNodeDType.h          |  8 +-------
 src/V3LinkParse.cpp           | 18 ++++++++++++------
 src/V3ParseImp.cpp            |  7 ++++++-
 src/verilog.y                 | 12 ++++++------
 test_regress/t/t_typename.out |  2 +-
 test_regress/t/t_typename.py  |  2 +-
 6 files changed, 27 insertions(+), 22 deletions(-)

diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 81c93c04c..376b30011 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -666,16 +666,12 @@ class AstDefImplicitDType final : public AstNodeDType {
     // After link, these become typedefs
     // @astgen op1 := childDTypep : Optional[AstNodeDType]
     string m_name;
-    void* m_containerp;  // In what scope is the name unique, so we can know what are duplicate
-                         // definitions (arbitrary value)
     const int m_uniqueNum;
 
 public:
-    AstDefImplicitDType(FileLine* fl, const string& name, void* containerp, VFlagChildDType,
-                        AstNodeDType* dtp)
+    AstDefImplicitDType(FileLine* fl, const string& name, VFlagChildDType, AstNodeDType* dtp)
         : ASTGEN_SUPER_DefImplicitDType(fl)
         , m_name{name}
-        , m_containerp{containerp}
         , m_uniqueNum{uniqueNumInc()} {
         childDTypep(dtp);  // Only for parser
         dtypep(nullptr);  // V3Width will resolve
@@ -683,7 +679,6 @@ public:
     AstDefImplicitDType(const AstDefImplicitDType& other)
         : AstNodeDType(other)
         , m_name(other.m_name)
-        , m_containerp(other.m_containerp)
         , m_uniqueNum(uniqueNumInc()) {}
     ASTGEN_MEMBERS_AstDefImplicitDType;
     int uniqueNum() const { return m_uniqueNum; }
@@ -696,7 +691,6 @@ public:
     AstNodeDType* subDTypep() const override VL_MT_STABLE {
         return dtypep() ? dtypep() : childDTypep();
     }
-    void* containerp() const { return m_containerp; }
     // METHODS
     // op1 = Range of variable
     AstNodeDType* dtypeSkipRefp() const { return dtypep()->skipRefp(); }
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index d2860ff58..c48830a09 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -42,7 +42,7 @@ class LinkParseVisitor final : public VNVisitor {
     const VNUser2InUse m_inuser2;
 
     // TYPES
-    using ImplTypedefMap = std::map<const std::pair<void*, std::string>, AstTypedef*>;
+    using ImplTypedefMap = std::map<std::string, AstTypedef*>;
 
     // STATE
     AstVar* m_varp = nullptr;  // Variable we're under
@@ -498,14 +498,14 @@ class LinkParseVisitor final : public VNVisitor {
         cleanFileline(nodep);
         UINFO(8, "   DEFIMPLICIT " << nodep << endl);
         // Must remember what names we've already created, and combine duplicates
-        // so that for "var enum {...} a,b" a & b will share a common typedef
-        // Unique name space under each containerp() so that an addition of
+        // so that for "var enum {...} a,b" a & b will share a common typedef.
+        // Change to unique name space per module so that an addition of
         // a new type won't change every verilated module.
         AstTypedef* defp = nullptr;
-        const ImplTypedefMap::iterator it
-            = m_implTypedef.find(std::make_pair(nodep->containerp(), nodep->name()));
+        const ImplTypedefMap::iterator it = m_implTypedef.find(nodep->name());
         if (it != m_implTypedef.end()) {
             defp = it->second;
+            UINFO(9, "Reused impltypedef " << nodep << "  -->  " << defp << endl);
         } else {
             // Definition must be inserted right after the variable (etc) that needed it
             // AstVar, AstTypedef, AstNodeFTask are common containers
@@ -526,7 +526,11 @@ class LinkParseVisitor final : public VNVisitor {
             } else {
                 defp = new AstTypedef{nodep->fileline(), nodep->name(), nullptr, VFlagChildDType{},
                                       dtypep};
-                m_implTypedef.emplace(std::make_pair(nodep->containerp(), defp->name()), defp);
+                m_implTypedef.emplace(defp->name(), defp);
+                // Rename so that name doesn't change if a type is added/removed elsewhere
+                // But the m_implTypedef is stil by old name so we can find it for next new lookups
+                defp->name("__typeimpmod" + cvtToStr(m_implTypedef.size()));
+                UINFO(9, "New impltypedef " << defp << endl);
                 backp->addNextHere(defp);
             }
         }
@@ -618,6 +622,7 @@ class LinkParseVisitor final : public VNVisitor {
         VL_RESTORER(m_genblkAbove);
         VL_RESTORER(m_genblkNum);
         VL_RESTORER(m_beginDepth);
+        VL_RESTORER(m_implTypedef);
         VL_RESTORER(m_lifetime);
         VL_RESTORER(m_lifetimeAllowed);
         {
@@ -630,6 +635,7 @@ class LinkParseVisitor final : public VNVisitor {
             m_genblkAbove = 0;
             m_genblkNum = 0;
             m_beginDepth = 0;
+            m_implTypedef.clear();
             m_valueModp = nodep;
             m_lifetime = nodep->lifetime();
             m_lifetimeAllowed = VN_IS(nodep, Class);
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 8e6613fe1..b33972145 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -749,7 +749,12 @@ int V3ParseImp::tokenToBison() {
 // V3ParseBisonYYSType functions
 
 std::ostream& operator<<(std::ostream& os, const V3ParseBisonYYSType& rhs) {
-    os << "TOKEN {" << rhs.fl->filenameLetters() << rhs.fl->asciiLineCol() << "}";
+    os << "TOKEN {";
+    if (VL_UNCOVERABLE(!rhs.fl))
+        os << "%E-null-fileline";
+    else
+        os << rhs.fl->filenameLetters() << rhs.fl->asciiLineCol();
+    os << "}";
     os << "=" << rhs.token << " " << V3ParseImp::tokenName(rhs.token);
     if (rhs.token == yaID__ETC  //
         || rhs.token == yaID__CC  //
diff --git a/src/verilog.y b/src/verilog.y
index 5c69afffb..08025f727 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -108,7 +108,7 @@ public:
     int m_pinNum = -1;  // Pin number currently parsing
     std::stack<int> m_pinStack;  // Queue of pin numbers being parsed
 
-    static int s_modTypeImpNum;  // Implicit type number, incremented each module
+    static int s_typeImpNum;  // Implicit type number, incremented each module
 
     // CONSTRUCTORS
     V3ParseGrammar() {}
@@ -300,7 +300,7 @@ public:
 const VBasicDTypeKwd LOGIC = VBasicDTypeKwd::LOGIC;  // Shorthand "LOGIC"
 const VBasicDTypeKwd LOGIC_IMPLICIT = VBasicDTypeKwd::LOGIC_IMPLICIT;
 
-int V3ParseGrammar::s_modTypeImpNum = 0;
+int V3ParseGrammar::s_typeImpNum = 0;
 
 //======================================================================
 // Macro functions
@@ -2233,12 +2233,12 @@ data_typeNoRef<nodeDTypep>:             // ==IEEE: data_type, excluding class_ty
         |       struct_unionDecl packed_dimensionListE
                         { $$ = GRAMMARP->createArray(
                                    new AstDefImplicitDType{$1->fileline(),
-                                                           "__typeimpsu" + cvtToStr(GRAMMARP->s_modTypeImpNum++),
-                                                           SYMP, VFlagChildDType{}, $1}, $2, true); }
+                                                           "__typeimpsu" + cvtToStr(GRAMMARP->s_typeImpNum++),
+                                                           VFlagChildDType{}, $1}, $2, true); }
         |       enumDecl
                         { $$ = new AstDefImplicitDType{$1->fileline(),
-                                                       "__typeimpenum" + cvtToStr(GRAMMARP->s_modTypeImpNum++),
-                                                       SYMP, VFlagChildDType{}, $1}; }
+                                                       "__typeimpenum" + cvtToStr(GRAMMARP->s_typeImpNum++),
+                                                       VFlagChildDType{}, $1}; }
         |       ySTRING
                         { $$ = new AstBasicDType{$1, VBasicDTypeKwd::STRING}; }
         |       yCHANDLE
diff --git a/test_regress/t/t_typename.out b/test_regress/t/t_typename.out
index 133f56582..f8ebfd10d 100644
--- a/test_regress/t/t_typename.out
+++ b/test_regress/t/t_typename.out
@@ -20,7 +20,7 @@
 "int$[$:3]" ==? "int$[$:3]"
 "bit$[]" ==? "bit$[]"
 
-"enum{A=32'h0;B=32'h1;C=32'h63;}A::__typeimpenum1" ==? "enum{A=32'sd0,B=32'sd1,C=32'sd99}A::<unspecified>"
+"enum{A=32'h0;B=32'h1;C=32'h63;}A::__typeimpmod1" ==? "enum{A=32'sd0,B=32'sd1,C=32'sd99}A::<unspecified>"
 "struct{bit A;bit B;}t.AB_t" ==? "struct{bit A;bit B;}<some_have_typename>"
 "struct{bit A;bit B;}t.AB_t$[0:9]" ==? "struct{bit A;bit B;}top.AB_t$[0:9]"
 "union{bit A;bit B;}t.UAB_t" ==? "union{bit A;bit B;}"
diff --git a/test_regress/t/t_typename.py b/test_regress/t/t_typename.py
index ab5dca066..1a1bebba6 100755
--- a/test_regress/t/t_typename.py
+++ b/test_regress/t/t_typename.py
@@ -9,7 +9,7 @@
 
 import vltest_bootstrap
 
-test.scenarios('simulator')
+test.scenarios('simulator_st')
 
 test.compile()
 

From bc3bf6ab5ef7e40feb15f100272edf1917d0b7d2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 6 May 2025 21:11:34 -0400
Subject: [PATCH 042/211] Tests: Add t_param_type_bad3

---
 src/V3LinkDot.cpp                    |  4 ++--
 src/V3Param.cpp                      |  4 ++--
 test_regress/t/t_param_type_bad3.out |  5 +++++
 test_regress/t/t_param_type_bad3.py  | 20 ++++++++++++++++++++
 test_regress/t/t_param_type_bad3.v   | 10 ++++++++++
 5 files changed, 39 insertions(+), 4 deletions(-)
 create mode 100644 test_regress/t/t_param_type_bad3.out
 create mode 100755 test_regress/t/t_param_type_bad3.py
 create mode 100644 test_regress/t/t_param_type_bad3.v

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 39e8d4510..5ace4d040 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3341,8 +3341,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     nodep->replaceWith(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 }
-            } else if (AstConstraint* const consp = VN_CAST(foundp->nodep(), Constraint)) {
-                AstNode* const newp = new AstConstraintRef{nodep->fileline(), nullptr, consp};
+            } else if (AstConstraint* const defp = VN_CAST(foundp->nodep(), Constraint)) {
+                AstNode* const newp = new AstConstraintRef{nodep->fileline(), nullptr, defp};
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 ok = true;
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 09092af24..bfee3e4fe 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -928,7 +928,7 @@ class ParamProcessor final {
 
         for (auto* stmtp = srcModpr->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
             if (AstParamTypeDType* dtypep = VN_CAST(stmtp, ParamTypeDType)) {
-                if (VN_IS(dtypep->subDTypep(), VoidDType)) {
+                if (VN_IS(dtypep->skipRefp(), VoidDType)) {
                     nodep->v3error(
                         "Class parameter type without default value is never given value"
                         << " (IEEE 1800-2023 6.20.1): " << dtypep->prettyNameQ());
@@ -1217,7 +1217,7 @@ class ParamVisitor final : public VNVisitor {
     }
     void visit(AstParamTypeDType* nodep) override {
         iterateChildren(nodep);
-        if (VN_IS(nodep->subDTypep(), VoidDType)) {
+        if (VN_IS(nodep->skipRefp(), VoidDType)) {
             nodep->v3error("Parameter type without default value is never given value"
                            << " (IEEE 1800-2023 6.20.1): " << nodep->prettyNameQ());
         }
diff --git a/test_regress/t/t_param_type_bad3.out b/test_regress/t/t_param_type_bad3.out
new file mode 100644
index 000000000..f30889150
--- /dev/null
+++ b/test_regress/t/t_param_type_bad3.out
@@ -0,0 +1,5 @@
+%Error: t/t_param_type_bad3.v:9:26: Expecting a data type: 'PI'
+    9 |    localparam type P_T = PI;   
+      |                          ^~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Exiting due to
diff --git a/test_regress/t/t_param_type_bad3.py b/test_regress/t/t_param_type_bad3.py
new file mode 100755
index 000000000..45bc705e4
--- /dev/null
+++ b/test_regress/t/t_param_type_bad3.py
@@ -0,0 +1,20 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(
+    # Bug1575 required trace to crash
+    verilator_flags2=["--trace-vcd"],
+    fails=True,
+    expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_param_type_bad3.v b/test_regress/t/t_param_type_bad3.v
new file mode 100644
index 000000000..3848e7c9e
--- /dev/null
+++ b/test_regress/t/t_param_type_bad3.v
@@ -0,0 +1,10 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2019 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   localparam int PI = 6;
+   localparam type P_T = PI;  // Bad
+endmodule

From 2358f5c2a259c17c4ac56b80961e61cab1d9b538 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Wed, 7 May 2025 11:54:18 +0200
Subject: [PATCH 043/211] Fix AstAssignW conversion (#5991) (#5992)

---
 src/V3Const.cpp                        |   4 +-
 test_regress/t/t_math_signed3_noopt.py |  18 ++++
 test_regress/t/t_math_signed3_noopt.v  | 132 +++++++++++++++++++++++++
 3 files changed, 152 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_math_signed3_noopt.py
 create mode 100644 test_regress/t/t_math_signed3_noopt.v

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 96fb5b0a7..04ea33435 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -3068,8 +3068,8 @@ class ConstVisitor final : public VNVisitor {
             varrefp->unlinkFrBack();
             AstInitial* const newinitp = new AstInitial{
                 nodep->fileline(), new AstAssign{nodep->fileline(), varrefp, exprp}};
-            m_modp->addStmtsp(newinitp);
-            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
+            nodep->replaceWith(newinitp);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // Set the initial value right in the variable so we can constant propagate
             AstNode* const initvaluep = exprp->cloneTree(false);
             varrefp->varp()->valuep(initvaluep);
diff --git a/test_regress/t/t_math_signed3_noopt.py b/test_regress/t/t_math_signed3_noopt.py
new file mode 100755
index 000000000..929b1beca
--- /dev/null
+++ b/test_regress/t/t_math_signed3_noopt.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=["-O0"])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_math_signed3_noopt.v b/test_regress/t/t_math_signed3_noopt.v
new file mode 100644
index 000000000..959fb3a6d
--- /dev/null
+++ b/test_regress/t/t_math_signed3_noopt.v
@@ -0,0 +1,132 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2014 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0)
+
+module t (/*AUTOARG*/);
+
+   // verilator lint_off WIDTH
+   wire [1:0]        bug729_au = ~0;
+   wire signed [1:0] bug729_as = ~0;
+   wire [2:0]        bug729_b = ~0;
+   // the $signed output is unsigned because the input is unsigned; the signedness does not change.
+   wire [0:0]        bug729_yuu = $signed(2'b11)  == 3'b111;   //1'b0
+   wire [0:0]        bug729_ysu = $signed(2'SB11) == 3'b111;   //1'b0
+   wire [0:0]        bug729_yus = $signed(2'b11)  == 3'sb111;  //1'b1
+   wire [0:0]        bug729_yss = $signed(2'sb11) == 3'sb111;  //1'b1
+   wire [0:0]        bug729_zuu = 2'sb11 == 3'b111;   //1'b0
+   wire [0:0]        bug729_zsu = 2'sb11 == 3'b111;   //1'b0
+   wire [0:0]        bug729_zus = 2'sb11 == 3'sb111;  //1'b1
+   wire [0:0]        bug729_zss = 2'sb11 == 3'sb111;  //1'b1
+
+   wire [3:0]        bug733_a = 4'b0010;
+   wire [3:0]        bug733_yu = $signed(|bug733_a); // 4'b1111 note | is always unsigned
+   wire signed [3:0] bug733_ys = $signed(|bug733_a); // 4'b1111
+
+   wire [3:0]        bug733_zu = $signed(2'b11);  // 4'b1111
+   wire signed [3:0] bug733_zs = $signed(2'sb11); // 4'b1111
+
+   // When RHS of assignment is fewer bits than lhs, RHS sign or zero extends based on RHS's sign
+
+   wire [3:0]        bug733_qu = 2'sb11;  // 4'b1111
+   wire signed [3:0] bug733_qs = 2'sb11; // 4'b1111
+   reg signed [32:0] bug349_s;
+   reg signed [32:0] bug349_u;
+
+   wire signed [1:0] sb11 = 2'sb11;
+
+   wire [3:0]        subout_u;
+   sub sub (.a(2'sb11), .z(subout_u));
+   // initial `checkh(subout_u, 4'b1111);
+
+   wire [5:0]        cond_a = 1'b1 ? 3'sb111 : 5'sb11111;
+   initial `checkh(cond_a, 6'b111111);
+   wire [5:0]        cond_b = 1'b0 ? 3'sb111 : 5'sb11111;
+   initial `checkh(cond_b, 6'b111111);
+
+   bit cmp;
+
+   initial begin
+`ifndef VERILATOR
+      #1;
+`endif
+
+      // verilator lint_on WIDTH
+      `checkh(bug729_yuu, 1'b0);
+      `checkh(bug729_ysu, 1'b0);
+      `checkh(bug729_yus, 1'b1);
+      `checkh(bug729_yss, 1'b1);
+
+      `checkh(bug729_zuu, 1'b0);
+      `checkh(bug729_zsu, 1'b0);
+      `checkh(bug729_zus, 1'b1);
+      `checkh(bug729_zss, 1'b1);
+
+      // `checkh(bug733_yu, 4'b1111);
+      // `checkh(bug733_ys, 4'b1111);
+
+      `checkh(bug733_zu, 4'b1111);
+      `checkh(bug733_zs, 4'b1111);
+
+      `checkh(bug733_qu, 4'b1111);
+      `checkh(bug733_qs, 4'b1111);
+
+      // verilator lint_off WIDTH
+      bug349_s = 4'sb1111;
+      `checkh(bug349_s, 33'h1ffffffff);
+      bug349_u = 4'sb1111;
+      `checkh(bug349_u, 33'h1ffffffff);
+
+      bug349_s = 4'sb1111 - 1'b1;
+      `checkh(bug349_s,33'he);
+
+      bug349_s = 4'sb1111 - 5'b00001;
+      `checkh(bug349_s,33'he);
+
+      cmp = 3'sb111 == 4'b111;
+      `checkh(cmp, 1);
+      cmp = 3'sb111 == 4'sb111;
+      `checkh(cmp, 0);
+      cmp = 3'sb111 != 4'b111;
+      `checkh(cmp, 0);
+      cmp = 3'sb111 != 4'sb111;
+      `checkh(cmp, 1);
+
+      cmp = 3'sb111 === 4'b111;
+      `checkh(cmp, 1);
+      cmp = 3'sb111 === 4'sb111;
+      `checkh(cmp, 0);
+
+      case (2'sb11)
+        4'b1111: $stop;
+        default: ;
+      endcase
+
+      case (sb11)
+        4'b1111: $stop;
+        default: ;
+      endcase
+
+      case (2'sb11)
+        4'sb1111: ;
+        default: $stop;
+      endcase
+
+      case (sb11)
+        4'sb1111: ;
+        default: $stop;
+      endcase
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
+
+module sub(input [3:0] a,
+           output [3:0] z);
+   assign z = a;
+endmodule

From a80aa07de614504b236934497ebb99dd991256a4 Mon Sep 17 00:00:00 2001
From: Yilou Wang <wangyilou123@gmail.com>
Date: Wed, 7 May 2025 13:07:16 +0200
Subject: [PATCH 044/211] Support constrained random for associative arrays
 (#5985) (#5986)

---
 include/verilated_random.h                   |  48 ++-
 include/verilated_types.h                    |   7 +-
 src/V3Randomize.cpp                          |  28 +-
 test_regress/t/t_constraint_struct_complex.v | 338 ++++++++++++++++++-
 4 files changed, 384 insertions(+), 37 deletions(-)

diff --git a/include/verilated_random.h b/include/verilated_random.h
index aae19ddf1..f75b199d5 100644
--- a/include/verilated_random.h
+++ b/include/verilated_random.h
@@ -382,8 +382,9 @@ public:
 
     // Register associative array of non-struct types
     template <typename T_Key, typename T_Value>
-    void write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
-                   std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
+    typename std::enable_if<!VlContainsCustomStruct<T_Value>::value, void>::type
+    write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
+              std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
         if (m_vars.find(name) != m_vars.end()) return;
         m_vars[name]
             = std::make_shared<const VlRandomArrayVarTemplate<VlAssocArray<T_Key, T_Value>>>(
@@ -394,8 +395,13 @@ public:
         }
     }
 
-    // TODO: Register associative array of structs
-
+    // Register associative array of structs
+    template <typename T_Key, typename T_Value>
+    typename std::enable_if<VlContainsCustomStruct<T_Value>::value, void>::type
+    write_var(VlAssocArray<T_Key, T_Value>& var, int width, const char* name, int dimension,
+              std::uint32_t randmodeIdx = std::numeric_limits<std::uint32_t>::max()) {
+        if (dimension > 0) record_struct_arr(var, name, dimension, {}, {});
+    }
     // ----------------------------------------
     // ---  Record Arrays: flat and struct  ---
     // ----------------------------------------
@@ -476,10 +482,12 @@ public:
                       std::vector<size_t> idxWidths) {
         std::ostringstream oss;
         for (size_t i = 0; i < indices.size(); ++i) {
-            oss << std::hex << static_cast<int>(indices[i]);
+            oss << std::hex << std::setw(int(idxWidths[i] / 4)) << std::setfill('0')
+                << static_cast<int>(indices[i]);
             if (i < indices.size() - 1) oss << ".";
         }
-        write_var(var, 1ULL, (name + "." + oss.str()).c_str(), 1ULL);
+        write_var(var, 1ULL,
+                  oss.str().length() > 0 ? (name + "." + oss.str()).c_str() : name.c_str(), 1ULL);
     }
 
     // Recursively process VlUnpacked of structs
@@ -487,7 +495,8 @@ public:
     void record_struct_arr(VlUnpacked<T, N_Depth>& var, const std::string name, int dimension,
                            std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if (dimension > 0 && N_Depth != 0) {
-            idxWidths.push_back(32);
+            constexpr size_t idx_width = 1 << VL_CLOG2_CE_Q(VL_CLOG2_CE_Q(N_Depth) + 1);
+            idxWidths.push_back(idx_width);
             for (size_t i = 0; i < N_Depth; ++i) {
                 indices.push_back(i);
                 record_struct_arr(var.operator[](i), name, dimension - 1, indices, idxWidths);
@@ -510,9 +519,32 @@ public:
         }
     }
 
-    // TODO: Add support for associative arrays of structs
     // Recursively process associative arrays of structs
+    template <typename T_Key, typename T_Value>
+    void record_struct_arr(VlAssocArray<T_Key, T_Value>& var, const std::string name,
+                           int dimension, std::vector<IData> indices,
+                           std::vector<size_t> idxWidths) {
+        if ((dimension > 0) && (!var.empty())) {
+            for (auto it = var.begin(); it != var.end(); ++it) {
+                const T_Key& key = it->first;
+                const T_Value& value = it->second;
 
+                std::string indexed_name;
+                std::vector<size_t> integral_index;
+                size_t idx_width = 0;
+
+                process_key(key, indexed_name, integral_index, name, idx_width);
+                std::ostringstream oss;
+                for (int i = 0; i < integral_index.size(); ++i)
+                    oss << std::hex << static_cast<int>(integral_index[i]);
+
+                std::string result = oss.str();
+                result.insert(result.begin(), int(idx_width / 4) - result.size(), '0');
+                record_struct_arr(var.at(key), name + "." + result, dimension - 1, indices,
+                                  idxWidths);
+            }
+        }
+    }
     // --------------------------
     // ---  Helper functions  ---
     // --------------------------
diff --git a/include/verilated_types.h b/include/verilated_types.h
index 783ba5a65..70e131423 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -969,6 +969,7 @@ public:
 
     // Size of array. Verilog: function int size(), or int num()
     int size() const { return m_map.size(); }
+    bool empty() const { return m_map.empty(); }
     // Clear array. Verilog: function void delete([input index])
     void clear() { m_map.clear(); }
     void erase(const T_Key& index) { m_map.erase(index); }
@@ -1265,7 +1266,7 @@ std::string VL_TO_STRING(const VlAssocArray<T_Key, T_Value>& obj) {
 }
 
 template <typename T_Key, typename T_Value>
-struct VlContainsCustomStruct<VlAssocArray<T_Key, T_Value>> : VlContainsCustomStruct<T_Key> {};
+struct VlContainsCustomStruct<VlAssocArray<T_Key, T_Value>> : VlContainsCustomStruct<T_Value> {};
 
 template <typename T_Key, typename T_Value>
 void VL_READMEM_N(bool hex, int bits, const std::string& filename,
@@ -1597,8 +1598,8 @@ std::string VL_TO_STRING(const VlUnpacked<T_Value, N_Depth>& obj) {
     return obj.to_string();
 }
 
-template <typename T, int N>
-struct VlContainsCustomStruct<VlUnpacked<T, N>> : VlContainsCustomStruct<T> {};
+template <typename T_Value, std::size_t N_Depth>
+struct VlContainsCustomStruct<VlUnpacked<T_Value, N_Depth>> : VlContainsCustomStruct<T_Value> {};
 
 //===================================================================
 // Helper to apply the given indices to a target expression
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index ff7353eb9..c1e5c756d 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -541,7 +541,7 @@ class ConstraintExprVisitor final : public VNVisitor {
         AstSFormatF* const newp = new AstSFormatF{nodep->fileline(), smtExpr, false, argsp};
         if (m_structSel && newp->name() == "(select %@ %@)") {
             newp->name("%@.%@");
-            newp->exprsp()->nextp()->name("%x");
+            if (!VN_IS(nodep, AssocSel)) newp->exprsp()->nextp()->name("%x");
         }
         nodep->replaceWith(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -734,8 +734,10 @@ class ConstraintExprVisitor final : public VNVisitor {
             }
         }
         // Mark Random for structArray
-        if (VN_IS(nodep->fromp(), ArraySel)) {
-            AstNodeExpr* const fromp = VN_AS(nodep->fromp(), ArraySel)->fromp();
+        if (VN_IS(nodep->fromp(), ArraySel) || VN_IS(nodep->fromp(), CMethodHard)) {
+            AstNodeExpr* const fromp = VN_IS(nodep->fromp(), ArraySel)
+                                           ? VN_AS(nodep->fromp(), ArraySel)->fromp()
+                                           : VN_AS(nodep->fromp(), CMethodHard)->fromp();
             AstStructDType* const dtypep
                 = VN_AS(fromp->dtypep()->skipRefp()->subDTypep()->skipRefp(), StructDType);
             dtypep->markConstrainedRand(true);
@@ -755,7 +757,8 @@ class ConstraintExprVisitor final : public VNVisitor {
         if (VN_AS(nodep->fromp(), SFormatF)->name() == "%@.%@") {
             newp = new AstSFormatF{fl, "%@.%@." + nodep->name(), false,
                                    VN_AS(nodep->fromp(), SFormatF)->exprsp()->cloneTreePure(true)};
-            newp->exprsp()->nextp()->name("%x");
+            if (newp->exprsp()->nextp()->name().rfind("#x", 0) == 0)
+                newp->exprsp()->nextp()->name("%x");  //  for #x%x to %x
         } else {
             newp = new AstSFormatF{fl, nodep->fromp()->name() + "." + nodep->name(), false,
                                    nullptr};
@@ -767,10 +770,11 @@ class ConstraintExprVisitor final : public VNVisitor {
     void visit(AstAssocSel* nodep) override {
         if (editFormat(nodep)) return;
         FileLine* const fl = nodep->fileline();
+        // Adaptive formatting and type handling for associative array keys
         if (VN_IS(nodep->bitp(), VarRef) && VN_AS(nodep->bitp(), VarRef)->isString()) {
             VNRelinker handle;
-            AstNodeExpr* const idxp
-                = new AstSFormatF{fl, "#x%32p", false, nodep->bitp()->unlinkFrBack(&handle)};
+            AstNodeExpr* const idxp = new AstSFormatF{fl, (m_structSel ? "%32p" : "#x%32p"), false,
+                                                      nodep->bitp()->unlinkFrBack(&handle)};
             handle.relink(idxp);
             editSMT(nodep, nodep->fromp(), idxp);
         } else if (VN_IS(nodep->bitp(), CvtPackString)
@@ -784,8 +788,8 @@ class ConstraintExprVisitor final : public VNVisitor {
                         << stringSize << "bits, limit is 128 bits");
             }
             VNRelinker handle;
-            AstNodeExpr* const idxp
-                = new AstSFormatF{fl, "#x%32x", false, stringp->lhsp()->unlinkFrBack(&handle)};
+            AstNodeExpr* const idxp = new AstSFormatF{fl, (m_structSel ? "%32x" : "#x%32x"), false,
+                                                      stringp->lhsp()->unlinkFrBack(&handle)};
             handle.relink(idxp);
             editSMT(nodep, nodep->fromp(), idxp);
         } else {
@@ -799,13 +803,13 @@ class ConstraintExprVisitor final : public VNVisitor {
                 std::string fmt;
                 // Normalize to standard bit width
                 if (actual_width <= 8) {
-                    fmt = "#x%2x";
+                    fmt = m_structSel ? "%2x" : "#x%2x";
                 } else if (actual_width <= 16) {
-                    fmt = "#x%4x";
+                    fmt = m_structSel ? "%4x" : "#x%4x";
                 } else {
-                    fmt = "#x%" + std::to_string(VL_WORDS_I(actual_width) * 8) + "x";
+                    fmt = (m_structSel ? "%" : "#x%")
+                          + std::to_string(VL_WORDS_I(actual_width) * 8) + "x";
                 }
-
                 AstNodeExpr* const idxp
                     = new AstSFormatF{fl, fmt, false, nodep->bitp()->unlinkFrBack(&handle)};
                 handle.relink(idxp);
diff --git a/test_regress/t/t_constraint_struct_complex.v b/test_regress/t/t_constraint_struct_complex.v
index 30626219c..6ad6ba90e 100755
--- a/test_regress/t/t_constraint_struct_complex.v
+++ b/test_regress/t/t_constraint_struct_complex.v
@@ -4,8 +4,10 @@
 // any use, without warranty, 2025 by PlanV GmbH.
 // SPDX-License-Identifier: CC0-1.0
 
+
 class ArrayStruct;
     /* verilator lint_off SIDEEFFECT */
+
     // Struct with an unpacked array
     typedef int arr_3_t[3];
     typedef int arr_4_t[4];
@@ -51,19 +53,25 @@ class ArrayStruct;
         foreach (s1.arr[i]) s1.arr[i] inside {1, 2, 3, 4};
         foreach (s1.arr_3[i]) s1.arr_3[i] inside {11, 22, 33, 44, 55};
     }
+
     constraint c_dynamic { foreach (s2.arr[i]) s2.arr[i] inside {[10:20]}; }
+
     constraint c_queue { foreach (s3.arr[i]) s3.arr[i] inside {[100:200]}; }
+
     constraint c_assoc {
         s4.arr["one"] inside {[10:50]};
         s4.arr["two"] inside {[51:100]};
         s4.arr["three"] inside {[101:150]};
     }
+
     constraint c_multi_dim { foreach (s5.arr[i, j]) s5.arr[i][j] inside {[0:9]}; }
+
     constraint c_mix {
         foreach (s6.mix_arr[i, j]) s6.mix_arr[i][j] inside {[50:100]};
     }
 
     function new();
+
         s1.arr = '{1, 2, 3};
         s1.arr_3 = '{1, 2, 3};
         s1.arr_4 = '{0, 2, 3, 4};
@@ -81,9 +89,11 @@ class ArrayStruct;
         foreach (s6.mix_arr[i]) begin
             s6.mix_arr[i] = new[i + 1];
         end
+
     endfunction
 
     function void print();
+
         foreach (s1.arr[i]) $display("s1.arr[%0d] = %0d", i, s1.arr[i]);
         foreach (s1.arr_3[i]) $display("s1.arr_3[%0d] = %0d", i, s1.arr_3[i]);
         foreach (s1.arr_4[i]) $display("s1.arr_4[%0d] = %0d", i, s1.arr_4[i]);
@@ -92,10 +102,12 @@ class ArrayStruct;
         foreach (s4.arr[i]) $display("s4.arr[\"%s\"] = %0d", i, s4.arr[i]);
         foreach (s5.arr[i, j]) $display("s5.arr[%0d][%0d] = %0d", i, j, s5.arr[i][j]);
         foreach (s6.mix_arr[i, j]) $display("s6.mix_arr[%0d][%0d] = %0d", i, j, s6.mix_arr[i][j]);
+
     endfunction
 
     // Self-test function to verify constraints
     function void self_test();
+
         foreach (s1.arr[i]) if (!(s1.arr[i] inside {1, 2, 3, 4})) $stop;
         foreach (s1.arr_3[i]) if (!(s1.arr_3[i] inside {11, 22, 33, 44, 55})) $stop;
         // Note: s1.arr_4[0] is not rand
@@ -108,6 +120,7 @@ class ArrayStruct;
         foreach (s5.arr[i, j]) if (!(s5.arr[i][j] inside {[0:9]})) $stop;
         foreach (s6.mix_arr[i]) if (s6.mix_arr[i].size() == 0) $stop;
         foreach (s6.mix_arr[i, j]) if (!(s6.mix_arr[i][j] inside {[50:100]})) $stop;
+
     endfunction
     /* verilator lint_off SIDEEFFECT */
 endclass
@@ -115,66 +128,363 @@ endclass
 class StructArray;
     /* verilator lint_off WIDTHTRUNC */
     typedef struct {
-        rand int arr[3];
+        rand int arr[3];                    // static unpacked array
         rand int a;
         rand bit [3:0] b;
         bit c;
     } struct_t;
-    rand struct_t s_arr[2];
 
-    constraint c_structArray_0 {
+    rand struct_t s_arr[2];
+    rand struct_t s_2d_arr[2][3];
+    rand struct_t s_dyn_arr[];
+    rand struct_t s_que_arr[$];
+    rand struct_t s_assoc_arr[string];
+    rand struct_t s_assoc_arr_2[bit[5:0]];
+
+    constraint c_arr {
         foreach (s_arr[i])
             foreach (s_arr[i].arr[j])
                 s_arr[i].arr[j] inside {[0:9]};
+        foreach (s_2d_arr[i, j])
+            foreach (s_2d_arr[i][j].arr[k])
+                s_2d_arr[i][j].arr[k] inside {[9:19]};
+        foreach (s_dyn_arr[i])
+            foreach (s_dyn_arr[i].arr[j])
+                s_dyn_arr[i].arr[j] inside {[19:29]};
+        foreach (s_que_arr[i])
+            foreach (s_que_arr[i].arr[j])
+                s_que_arr[i].arr[j] inside {[29:39]};
+        foreach (s_assoc_arr[i])
+            foreach (s_assoc_arr[i].arr[j])
+                s_assoc_arr[i].arr[j] inside {[39:49]};
+        foreach (s_assoc_arr_2[i])
+            foreach (s_assoc_arr_2[i].arr[j])
+                s_assoc_arr_2[i].arr[j] inside {[49:59]};
     }
-    constraint c_structArray_1 {
-        foreach (s_arr[i]) s_arr[i].a inside {[10:20]};
+
+    constraint c_others {
+        foreach (s_arr[i]) s_arr[i].a inside {[40:50]};
+        foreach (s_arr[i]) s_arr[i].b inside {[0:7]};
+
+        foreach (s_2d_arr[i, j]) s_2d_arr[i][j].a inside {[50:60]};
+
+        foreach (s_dyn_arr[i]) s_dyn_arr[i].a inside {[60:70]};
+
+        foreach (s_que_arr[i]) s_que_arr[i].a inside {[70:80]};
+
+        foreach (s_assoc_arr[i]) s_assoc_arr[i].a inside {[80:90]};
+
+        foreach (s_assoc_arr_2[i]) s_assoc_arr_2[i].a inside {[90:100]};
     }
 
     function new();
+
         foreach (s_arr[i]) begin
-            foreach (s_arr[i].arr[j]) s_arr[i].arr[j] = 'h0 + j;
-            s_arr[i].a = 'h10 + i;
-            s_arr[i].b = 'h0 + i;
-            s_arr[i].c = i;
+            foreach (s_arr[i].arr[j])
+                s_arr[i].arr[j] = j;
+            s_arr[i].a = 40 + i;
+            s_arr[i].b = i;
+            s_arr[i].c = 0;
         end
+
+        foreach (s_2d_arr[i, j]) begin
+            foreach (s_2d_arr[i][j].arr[k])
+                s_2d_arr[i][j].arr[k] = k + 10;
+            s_2d_arr[i][j].a = 50 + i + j;
+            s_2d_arr[i][j].b = i + j;
+            s_2d_arr[i][j].c = 0;
+        end
+
+        foreach (s_dyn_arr[i]) begin
+            s_dyn_arr = new[3];
+            foreach (s_dyn_arr[i].arr[j])
+                s_dyn_arr[i].arr[j] = j + 20;
+            s_dyn_arr[i].a = 60 + i;
+            s_dyn_arr[i].b = i;
+            s_dyn_arr[i].c = 0;
+        end
+
+        for (int i = 0; i < 3; i++) begin
+            s_que_arr.push_back('{arr: '{30, 31, 32}, a: 70 + i, b: i, c: 0});
+        end
+
+        // Associative array with string index
+        foreach (s_assoc_arr["x"].arr[j])
+            s_assoc_arr["x"].arr[j] = j + 40;
+        foreach (s_assoc_arr["y"].arr[j])
+            s_assoc_arr["y"].arr[j] = j + 50;
+        foreach (s_assoc_arr["long_string_index"].arr[j])
+            s_assoc_arr["long_string_index"].arr[j] = j + 60;
+        s_assoc_arr["x"].a = 80;
+        s_assoc_arr["x"].b = 0;
+        s_assoc_arr["x"].c = 0;
+        s_assoc_arr["y"].a = 90;
+        s_assoc_arr["y"].b = 1;
+        s_assoc_arr["y"].c = 0;
+        s_assoc_arr["long_string_index"].a = 100;
+        s_assoc_arr["long_string_index"].b = 2;
+        s_assoc_arr["long_string_index"].c = 0;
+
+        foreach (s_assoc_arr_2[6'd30].arr[j])
+            s_assoc_arr_2[6'd30].arr[j] = j + 70;
+        foreach (s_assoc_arr_2[6'd7].arr[j])
+            s_assoc_arr_2[6'd7].arr[j] = j + 80;
+        s_assoc_arr_2[6'd30].a = 90;
+        s_assoc_arr_2[6'd30].b = 0;
+        s_assoc_arr_2[6'd30].c = 0;
+        s_assoc_arr_2[6'd7].a = 100;
+        s_assoc_arr_2[6'd7].b = 1;
+        s_assoc_arr_2[6'd7].c = 0;
+
     endfunction
 
     function void print();
+
         foreach (s_arr[i]) begin
-            foreach (s_arr[i].arr[j]) $display("s_arr[%0d].arr[%0d] = %0d", i, j, s_arr[i].arr[j]);
+            foreach (s_arr[i].arr[j])
+                $display("s_arr[%0d].arr[%0d] = %0d", i, j, s_arr[i].arr[j]);
             $display("s_arr[%0d].a = %0d", i, s_arr[i].a);
             $display("s_arr[%0d].b = %0d", i, s_arr[i].b);
             $display("s_arr[%0d].c = %0d", i, s_arr[i].c);
         end
+
+        foreach (s_2d_arr[i, j]) begin
+            foreach (s_2d_arr[i][j].arr[k])
+                $display("s_2d_arr[%0d][%0d].arr[%0d] = %0d", i, j, k, s_2d_arr[i][j].arr[k]);
+            $display("s_2d_arr[%0d][%0d].a = %0d", i, j, s_2d_arr[i][j].a);
+            $display("s_2d_arr[%0d][%0d].b = %0d", i, j, s_2d_arr[i][j].b);
+            $display("s_2d_arr[%0d][%0d].c = %0d", i, j, s_2d_arr[i][j].c);
+        end
+
+        foreach (s_dyn_arr[i]) begin
+            foreach (s_dyn_arr[i].arr[j])
+                $display("s_dyn_arr[%0d].arr[%0d] = %0d", i, j, s_dyn_arr[i].arr[j]);
+            $display("s_dyn_arr[%0d].a = %0d", i, s_dyn_arr[i].a);
+            $display("s_dyn_arr[%0d].b = %0d", i, s_dyn_arr[i].b);
+            $display("s_dyn_arr[%0d].c = %0d", i, s_dyn_arr[i].c);
+        end
+
+        foreach (s_que_arr[i]) begin
+            foreach (s_que_arr[i].arr[j])
+                $display("s_que_arr[%0d].arr[%0d] = %0d", i, j, s_que_arr[i].arr[j]);
+            $display("s_que_arr[%0d].a = %0d", i, s_que_arr[i].a);
+            $display("s_que_arr[%0d].b = %0d", i, s_que_arr[i].b);
+            $display("s_que_arr[%0d].c = %0d", i, s_que_arr[i].c);
+        end
+
+        foreach (s_assoc_arr["x"].arr[j])
+            $display("s_assoc_arr[x].arr[%0d] = %0d", j, s_assoc_arr["x"].arr[j]);
+        $display("s_assoc_arr[x].a = %0d", s_assoc_arr["x"].a);
+        $display("s_assoc_arr[x].b = %0d", s_assoc_arr["x"].b);
+        $display("s_assoc_arr[x].c = %0d", s_assoc_arr["x"].c);
+        foreach (s_assoc_arr["y"].arr[j])
+            $display("s_assoc_arr[y].arr[%0d] = %0d", j, s_assoc_arr["y"].arr[j]);
+        $display("s_assoc_arr[y].a = %0d", s_assoc_arr["y"].a);
+        $display("s_assoc_arr[y].b = %0d", s_assoc_arr["y"].b);
+        $display("s_assoc_arr[y].c = %0d", s_assoc_arr["y"].c);
+        foreach (s_assoc_arr["long_string_index"].arr[j])
+            $display("s_assoc_arr[long_string_index].arr[%0d] = %0d", j, s_assoc_arr["long_string_index"].arr[j]);
+        $display("s_assoc_arr[long_string_index].a = %0d", s_assoc_arr["long_string_index"].a);
+        $display("s_assoc_arr[long_string_index].b = %0d", s_assoc_arr["long_string_index"].b);
+        $display("s_assoc_arr[long_string_index].c = %0d", s_assoc_arr["long_string_index"].c);
+
+        foreach (s_assoc_arr_2[6'd30].arr[j])
+            $display("s_assoc_arr_2[30].arr[%0d] = %0d", j, s_assoc_arr_2[6'd30].arr[j]);
+        $display("s_assoc_arr_2[30].a = %0d", s_assoc_arr_2[6'd30].a);
+        $display("s_assoc_arr_2[30].b = %0d", s_assoc_arr_2[6'd30].b);
+        $display("s_assoc_arr_2[30].c = %0d", s_assoc_arr_2[6'd30].c);
+        foreach (s_assoc_arr_2[6'd7].arr[j])
+            $display("s_assoc_arr_2[7].arr[%0d] = %0d", j, s_assoc_arr_2[6'd7].arr[j]);
+        $display("s_assoc_arr_2[7].a = %0d", s_assoc_arr_2[6'd7].a);
+        $display("s_assoc_arr_2[7].b = %0d", s_assoc_arr_2[6'd7].b);
+        $display("s_assoc_arr_2[7].c = %0d", s_assoc_arr_2[6'd7].c);
+
     endfunction
 
     function void self_test();
+
         foreach (s_arr[i]) begin
-            foreach (s_arr[i].arr[j]) if (!(s_arr[i].arr[j] inside {[0:9]})) $stop;
-            if (!(s_arr[i].a inside {[10:20]})) $stop;
-            if (!(s_arr[0].c == 0)) $stop;
-            if (!(s_arr[1].c == 1)) $stop;
+            foreach (s_arr[i].arr[j])
+                if (!(s_arr[i].arr[j] inside {[0:9]})) $stop;
+            if (!(s_arr[i].a inside {[40:50]})) $stop;
         end
+
+        foreach (s_2d_arr[i, j]) begin
+            foreach (s_2d_arr[i][j].arr[k])
+                if (!(s_2d_arr[i][j].arr[k] inside {[9:19]})) $stop;
+            if (!(s_2d_arr[i][j].a inside {[50:60]})) $stop;
+        end
+
+        foreach (s_dyn_arr[i]) begin
+            foreach (s_dyn_arr[i].arr[j])
+                if (!(s_dyn_arr[i].arr[j] inside {[19:29]})) $stop;
+            if (!(s_dyn_arr[i].a inside {[60:70]})) $stop;
+        end
+
+        foreach (s_que_arr[i]) begin
+            foreach (s_que_arr[i].arr[j])
+                if (!(s_que_arr[i].arr[j] inside {[29:39]})) $stop;
+            if (!(s_que_arr[i].a inside {[70:80]})) $stop;
+        end
+
+        foreach (s_assoc_arr["x"].arr[j])
+            if (!(s_assoc_arr["x"].arr[j] inside {[39:49]})) $stop;
+        if (!(s_assoc_arr["x"].a inside {[80:90]})) $stop;
+        foreach (s_assoc_arr["y"].arr[j])
+            if (!(s_assoc_arr["y"].arr[j] inside {[39:49]})) $stop;
+        if (!(s_assoc_arr["y"].a inside {[80:90]})) $stop;
+        foreach (s_assoc_arr["long_string_index"].arr[j])
+            if (!(s_assoc_arr["long_string_index"].arr[j] inside {[39:49]})) $stop;
+        if (!(s_assoc_arr["long_string_index"].a inside {[80:90]})) $stop;
+
+        foreach (s_assoc_arr_2[6'd30].arr[j])
+            if (!(s_assoc_arr_2[6'd30].arr[j] inside {[49:59]})) $stop;
+        if (!(s_assoc_arr_2[6'd30].a inside {[90:100]})) $stop;
+        foreach (s_assoc_arr_2[6'd7].arr[j])
+            if (!(s_assoc_arr_2[6'd7].arr[j] inside {[49:59]})) $stop;
+        if (!(s_assoc_arr_2[6'd7].a inside {[90:100]})) $stop;
+
     endfunction
+
+    /* verilator lint_off WIDTHTRUNC */
+endclass
+
+class MixedStructure;
+    /* verilator lint_off WIDTHTRUNC */
+    typedef struct {
+        rand int arr[3];                    // static unpacked array
+        rand int dyn[];                    // dynamic array
+        rand int que[$];                   // queue
+        rand int assoc[string];            // associative array with string key
+        rand int a;
+        rand bit [3:0] b;
+        bit c;
+    } struct_t;
+
+    rand struct_t s_arr[2];
+
+    constraint c_static {
+        foreach (s_arr[i])
+            foreach (s_arr[i].arr[j])
+                s_arr[i].arr[j] inside {[0:9]};
+    }
+
+    constraint c_dyn {
+        foreach (s_arr[i])
+            foreach (s_arr[i].dyn[j])
+                s_arr[i].dyn[j] inside {[10:19]};
+    }
+
+    constraint c_queue {
+        foreach (s_arr[i])
+            foreach (s_arr[i].que[j])
+                s_arr[i].que[j] inside {[20:29]};
+    }
+
+    constraint c_assoc {
+        foreach (s_arr[i]) {
+            s_arr[i].assoc["x"] inside {[30:39]};
+            s_arr[i].assoc["y"] inside {[30:39]};
+        }
+    }
+
+    constraint c_other {
+        foreach (s_arr[i]) s_arr[i].a inside {[40:50]};
+    }
+
+    function new();
+
+        foreach (s_arr[i]) begin
+            s_arr[i].dyn = new[2];
+            s_arr[i].que = {0, 0};
+            s_arr[i].assoc = '{"x": 0, "y": 0};
+
+            foreach (s_arr[i].arr[j])
+                s_arr[i].arr[j] = j;
+            foreach (s_arr[i].dyn[j])
+                s_arr[i].dyn[j] = 10 + j;
+            foreach (s_arr[i].que[j])
+                s_arr[i].que[j] = 20 + j;
+
+            s_arr[i].assoc["x"] = i + 30;
+            s_arr[i].assoc["y"] = i + 31;
+            s_arr[i].a = 40 + i;
+            s_arr[i].b = i;
+            s_arr[i].c = i;
+        end
+
+    endfunction
+
+    function void print();
+
+        foreach (s_arr[i]) begin
+            foreach (s_arr[i].arr[j])
+                $display("s_arr[%0d].arr[%0d] = %0d", i, j, s_arr[i].arr[j]);
+            foreach (s_arr[i].dyn[j])
+                $display("s_arr[%0d].dyn[%0d] = %0d", i, j, s_arr[i].dyn[j]);
+            foreach (s_arr[i].que[j])
+                $display("s_arr[%0d].que[%0d] = %0d", i, j, s_arr[i].que[j]);
+
+            $display("s_arr[%0d].assoc[\"x\"] = %0d", i, s_arr[i].assoc["x"]);
+            $display("s_arr[%0d].assoc[\"y\"] = %0d", i, s_arr[i].assoc["y"]);
+            $display("s_arr[%0d].a = %0d", i, s_arr[i].a);
+            $display("s_arr[%0d].b = %0d", i, s_arr[i].b);
+            $display("s_arr[%0d].c = %0d", i, s_arr[i].c);
+        end
+
+    endfunction
+
+    function void self_test();
+
+        foreach (s_arr[i]) begin
+            foreach (s_arr[i].arr[j])
+                if (!(s_arr[i].arr[j] inside {[0:9]})) $stop;
+            foreach (s_arr[i].dyn[j])
+                if (!(s_arr[i].dyn[j] inside {[10:19]})) $stop;
+            foreach (s_arr[i].que[j])
+                if (!(s_arr[i].que[j] inside {[20:29]})) $stop;
+            if (!(s_arr[i].assoc.exists("x") && s_arr[i].assoc["x"] inside {[30:39]})) $stop;
+            if (!(s_arr[i].assoc.exists("y") && s_arr[i].assoc["y"] inside {[30:39]})) $stop;
+            if (!(s_arr[i].a inside {[40:50]})) $stop;
+            if (i == 0 && s_arr[i].c != 0) $stop;
+            if (i == 1 && s_arr[i].c != 1) $stop;
+        end
+
+    endfunction
+
     /* verilator lint_off WIDTHTRUNC */
 endclass
 
 module t_constraint_struct_complex;
+
     int success;
     ArrayStruct as_c;
     StructArray sa_c;
+    MixedStructure mixed_c;
+
     initial begin
         as_c = new();
         sa_c = new();
+        mixed_c = new();
+
         success = as_c.randomize();
         if (success != 1) $stop;
         as_c.self_test();
         // as_c.print();
+        // $display(" ArrayStruct passed! \n");
+
         success = sa_c.randomize();
         if (success != 1) $stop;
         sa_c.self_test();
         // sa_c.print();
+        // $display(" StructArray passed! \n");
+
+        success = mixed_c.randomize();
+        if (success != 1) $stop;
+        mixed_c.self_test();
+        // mixed_c.print();
+        // $display(" MixedStructure passed! \n");
+
         $write("*-* All Finished *-*\n");
         $finish;
     end

From 5f4646f617ac81c7633f4f07d0c852ecb0ea485f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Thu, 8 May 2025 12:45:10 +0200
Subject: [PATCH 045/211] Ignore dependencies from different hierarchical
 schedules (#5954)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
---
 src/V3ExecGraph.cpp                 | 167 ++++++++++++++++++++++------
 test_regress/t/t_hier_block_perf.py |   2 +-
 2 files changed, 133 insertions(+), 36 deletions(-)

diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index 4052f7836..7d1d466d7 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -66,6 +66,7 @@ class ThreadSchedule final {
     uint32_t m_id;  // Unique ID of a schedule
     static uint32_t s_nextId;  // Next ID number to use
     std::unordered_set<const ExecMTask*> mtasks;  // Mtasks in this schedule
+    uint32_t m_endTime = 0;  // Latest task end time in this schedule
 
 public:
     // CONSTANTS
@@ -196,6 +197,7 @@ public:
     uint32_t scheduleOn(const ExecMTask* mtaskp, uint32_t bestThreadId) {
         mtasks.emplace(mtaskp);
         const uint32_t bestEndTime = mtaskp->predictStart() + mtaskp->cost();
+        m_endTime = std::max(m_endTime, bestEndTime);
         mtaskState[mtaskp].completionTime = bestEndTime;
         mtaskState[mtaskp].threadId = bestThreadId;
 
@@ -208,6 +210,7 @@ public:
         return bestEndTime;
     }
     bool contains(const ExecMTask* mtaskp) const { return mtasks.count(mtaskp); }
+    uint32_t endTime() const { return m_endTime; }
 };
 
 uint32_t ThreadSchedule::s_nextId = 0;
@@ -256,6 +259,8 @@ class PackThreads final {
     // METHODS
     uint32_t completionTime(const ThreadSchedule& schedule, const ExecMTask* mtaskp,
                             uint32_t threadId) {
+        // Ignore tasks that were scheduled on a different schedule
+        if (!schedule.contains(mtaskp)) return 0;
         const ThreadSchedule::MTaskState& state = schedule.mtaskState.at(mtaskp);
         UASSERT(state.threadId != ThreadSchedule::UNASSIGNED, "Mtask should have assigned thread");
         if (threadId == state.threadId) {
@@ -373,19 +378,24 @@ class PackThreads final {
                 }
             }
 
+            const uint32_t endTime = schedule.endTime();
+
             if (!bestMtaskp && mode == SchedulingMode::WIDE_TASK_DISCOVERED) {
                 mode = SchedulingMode::WIDE_TASK_SCHEDULING;
                 const uint32_t size = m_nThreads / maxThreadWorkers;
                 UASSERT(size, "Thread pool size should be bigger than 0");
-                // If no tasks were added to the normal thread schedule, remove it.
-                if (schedule.mtaskState.empty()) result.erase(result.begin());
+                // If no tasks were added to the normal thread schedule, clear it.
+                if (schedule.mtaskState.empty()) result.clear();
                 result.emplace_back(ThreadSchedule{size});
+                std::fill(busyUntil.begin(), busyUntil.end(), endTime);
                 continue;
             }
 
             if (!bestMtaskp && mode == SchedulingMode::WIDE_TASK_SCHEDULING) {
                 mode = SchedulingMode::SCHEDULING;
-                if (!schedule.mtaskState.empty()) result.emplace_back(ThreadSchedule{m_nThreads});
+                UASSERT(!schedule.mtaskState.empty(), "Mtask should be added");
+                result.emplace_back(ThreadSchedule{m_nThreads});
+                std::fill(busyUntil.begin(), busyUntil.end(), endTime);
                 continue;
             }
 
@@ -393,24 +403,7 @@ class PackThreads final {
 
             bestMtaskp->predictStart(bestTime);
             const uint32_t bestEndTime = schedule.scheduleOn(bestMtaskp, bestThreadId);
-
-            // Populate busyUntil timestamps. For multi-worker tasks, set timestamps for
-            // offsetted threads.
-            if (mode != SchedulingMode::WIDE_TASK_SCHEDULING) {
-                busyUntil[bestThreadId] = bestEndTime;
-            } else {
-                for (int i = 0; i < maxThreadWorkers; ++i) {
-                    const size_t threadId = bestThreadId + (i * schedule.threads.size());
-                    UASSERT(threadId < busyUntil.size(),
-                            "Incorrect busyUntil offset: threadId=" + cvtToStr(threadId)
-                                + " bestThreadId=" + cvtToStr(bestThreadId) + " i=" + cvtToStr(i)
-                                + " schedule-size=" + cvtToStr(schedule.threads.size())
-                                + " maxThreadWorkers=" + cvtToStr(maxThreadWorkers));
-                    busyUntil[threadId] = bestEndTime;
-                    UINFO(6, "Will schedule " << bestMtaskp->name() << " onto thread " << threadId
-                                              << endl);
-                }
-            }
+            busyUntil[bestThreadId] = bestEndTime;
 
             // Update the ready list
             const size_t erased = readyMTasks.erase(bestMtaskp);
@@ -439,6 +432,10 @@ class PackThreads final {
 public:
     // SELF TEST
     static void selfTest() {
+        selfTestHierFirst();
+        selfTestNormalFirst();
+    }
+    static void selfTestNormalFirst() {
         V3Graph graph;
         FileLine* const flp = v3Global.rootp()->fileline();
         std::vector<AstMTaskBody*> mTaskBodyps;
@@ -466,18 +463,28 @@ public:
         t4->cost(100);
         t4->priority(100);
         t4->threads(3);
+        ExecMTask* const t5 = new ExecMTask{&graph, makeBody()};
+        t5->cost(100);
+        t5->priority(100);
+        ExecMTask* const t6 = new ExecMTask{&graph, makeBody()};
+        t6->cost(100);
+        t6->priority(100);
 
         /*
                           0
                          / \
                         1   2
                            / \
-                          3  4
+                          3   4
+                         /    \
+                        5      6
         */
         new V3GraphEdge{&graph, t0, t1, 1};
         new V3GraphEdge{&graph, t0, t2, 1};
         new V3GraphEdge{&graph, t2, t3, 1};
         new V3GraphEdge{&graph, t2, t4, 1};
+        new V3GraphEdge{&graph, t3, t5, 1};
+        new V3GraphEdge{&graph, t4, t6, 1};
 
         constexpr uint32_t threads = 6;
         PackThreads packer{threads,
@@ -485,6 +492,7 @@ public:
                            10};  // Sandbag denom
 
         const std::vector<ThreadSchedule> scheduled = packer.pack(graph);
+        UASSERT_SELFTEST(size_t, scheduled.size(), 3);
         UASSERT_SELFTEST(size_t, scheduled[0].threads.size(), threads);
         UASSERT_SELFTEST(size_t, scheduled[0].threads[0].size(), 2);
         for (size_t i = 1; i < scheduled[0].threads.size(); ++i)
@@ -494,17 +502,23 @@ public:
         UASSERT_SELFTEST(const ExecMTask*, scheduled[0].threads[0][1], t1);
 
         UASSERT_SELFTEST(size_t, scheduled[1].threads.size(), threads / 3);
-        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[1][0], t2);
-        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[1][1], t3);
-        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][0], t4);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][0], t2);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][1], t3);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[1][0], t4);
 
-        UASSERT_SELFTEST(size_t, ThreadSchedule::mtaskState.size(), 5);
+        UASSERT_SELFTEST(size_t, scheduled[2].threads.size(), threads);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[2].threads[0][0], t5);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[2].threads[1][0], t6);
+
+        UASSERT_SELFTEST(size_t, ThreadSchedule::mtaskState.size(), 7);
 
         UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t0), 0);
         UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t1), 0);
-        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t2), 1);
-        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t3), 1);
-        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t4), 0);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t2), 0);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t3), 0);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t4), 1);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t5), 0);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t6), 1);
 
         // On its native thread, we see the actual end time for t0:
         UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[0], t0, 0), 1000);
@@ -518,14 +532,97 @@ public:
         // with t0's sandbagged time; compounding caused trouble in
         // practice.
         UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[0], t1, 1), 1130);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 0), 1229);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 1), 1199);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 0), 1329);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 1), 1299);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 0), 1329);
-        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 1), 1359);
+
+        // Wide task scheduling
+
+        // Task does not depend on previous or future schedules
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[0], t2, 0), 0);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[2], t2, 0), 0);
+
+        // We allow sandbagging for hierarchical children tasks, this does not affect
+        // wide task scheduling. When the next schedule is created it doesn't matter
+        // anyway.
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 0), 1200);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 1), 1230);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 2), 1230);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 3), 1230);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 4), 1230);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t2, 5), 1230);
+
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 0), 1300);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 1), 1330);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 2), 1330);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 3), 1330);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 4), 1330);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t3, 5), 1330);
+
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 0), 1360);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 1), 1330);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 2), 1360);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 3), 1360);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 4), 1360);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t4, 5), 1360);
 
         for (AstNode* const nodep : mTaskBodyps) nodep->deleteTree();
+        ThreadSchedule::mtaskState.clear();
+    }
+    static void selfTestHierFirst() {
+        V3Graph graph;
+        FileLine* const flp = v3Global.rootp()->fileline();
+        std::vector<AstMTaskBody*> mTaskBodyps;
+        const auto makeBody = [&]() {
+            AstMTaskBody* const bodyp = new AstMTaskBody{flp};
+            mTaskBodyps.push_back(bodyp);
+            bodyp->addStmtsp(new AstComment{flp, ""});
+            return bodyp;
+        };
+        ExecMTask* const t0 = new ExecMTask{&graph, makeBody()};
+        t0->cost(1000);
+        t0->priority(1100);
+        t0->threads(2);
+        ExecMTask* const t1 = new ExecMTask{&graph, makeBody()};
+        t1->cost(100);
+        t1->priority(100);
+
+        /*
+                          0
+                          |
+                          1
+        */
+        new V3GraphEdge{&graph, t0, t1, 1};
+
+        constexpr uint32_t threads = 2;
+        PackThreads packer{threads,
+                           3,  // Sandbag numerator
+                           10};  // Sandbag denom
+
+        const std::vector<ThreadSchedule> scheduled = packer.pack(graph);
+        UASSERT_SELFTEST(size_t, scheduled.size(), 2);
+        UASSERT_SELFTEST(size_t, scheduled[0].threads.size(), threads / 2);
+        UASSERT_SELFTEST(size_t, scheduled[0].threads[0].size(), 1);
+        for (size_t i = 1; i < scheduled[0].threads.size(); ++i)
+            UASSERT_SELFTEST(size_t, scheduled[0].threads[i].size(), 0);
+
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[0].threads[0][0], t0);
+
+        UASSERT_SELFTEST(size_t, scheduled[1].threads.size(), threads);
+        UASSERT_SELFTEST(size_t, scheduled[1].threads[0].size(), 1);
+        for (size_t i = 1; i < scheduled[1].threads.size(); ++i)
+            UASSERT_SELFTEST(size_t, scheduled[1].threads[i].size(), 0);
+        UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][0], t1);
+
+        UASSERT_SELFTEST(size_t, ThreadSchedule::mtaskState.size(), 2);
+
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t0), 0);
+        UASSERT_SELFTEST(uint32_t, ThreadSchedule::threadId(t1), 0);
+
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[0], t0, 0), 1000);
+
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t1, 0), 1100);
+        UASSERT_SELFTEST(uint32_t, packer.completionTime(scheduled[1], t1, 1), 1130);
+
+        for (AstNode* const nodep : mTaskBodyps) nodep->deleteTree();
+        ThreadSchedule::mtaskState.clear();
     }
 
     static std::vector<ThreadSchedule> apply(V3Graph& mtaskGraph) {
diff --git a/test_regress/t/t_hier_block_perf.py b/test_regress/t/t_hier_block_perf.py
index 5e3ddef08..b36132b41 100755
--- a/test_regress/t/t_hier_block_perf.py
+++ b/test_regress/t/t_hier_block_perf.py
@@ -36,7 +36,7 @@ if test.vltmt:
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
                    r'Optimizations, Thread schedule count\s+(\d+)', 4)
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
-                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 10)
+                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 12)
 
 test.execute(all_run_flags=[
     "+verilator+prof+exec+start+2",

From c2d289dc71835b42283c5e32a13362cf16dfeab3 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 9 May 2025 17:09:33 +0200
Subject: [PATCH 046/211] Tests: Fix t_math_signed3 test (#5995)

---
 test_regress/t/t_math_signed3.py       |   2 +-
 test_regress/t/t_math_signed3.v        |  18 +++-
 test_regress/t/t_math_signed3_noopt.py |   4 +-
 test_regress/t/t_math_signed3_noopt.v  | 132 -------------------------
 4 files changed, 17 insertions(+), 139 deletions(-)
 delete mode 100644 test_regress/t/t_math_signed3_noopt.v

diff --git a/test_regress/t/t_math_signed3.py b/test_regress/t/t_math_signed3.py
index d4f986441..43eddedd0 100755
--- a/test_regress/t/t_math_signed3.py
+++ b/test_regress/t/t_math_signed3.py
@@ -11,7 +11,7 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-test.compile()
+test.compile(make_main=False, verilator_flags2=["--main", "--exe", "--timing"])
 
 test.execute()
 
diff --git a/test_regress/t/t_math_signed3.v b/test_regress/t/t_math_signed3.v
index 24970ac5e..ffb2a358e 100644
--- a/test_regress/t/t_math_signed3.v
+++ b/test_regress/t/t_math_signed3.v
@@ -41,19 +41,27 @@ module t (/*AUTOARG*/);
 
    wire [3:0]        subout_u;
    sub sub (.a(2'sb11), .z(subout_u));
-   initial `checkh(subout_u, 4'b1111);
+   initial begin
+      #1;
+      `checkh(subout_u, 4'b1111);
+   end
 
    wire [5:0]        cond_a = 1'b1 ? 3'sb111 : 5'sb11111;
-   initial `checkh(cond_a, 6'b111111);
+   initial begin
+      #1;
+      `checkh(cond_a, 6'b111111);
+   end
+
    wire [5:0]        cond_b = 1'b0 ? 3'sb111 : 5'sb11111;
-   initial `checkh(cond_b, 6'b111111);
+   initial begin
+      #1;
+      `checkh(cond_b, 6'b111111);
+   end
 
    bit cmp;
 
    initial begin
-`ifndef VERILATOR
       #1;
-`endif
 
       // verilator lint_on WIDTH
       `checkh(bug729_yuu, 1'b0);
diff --git a/test_regress/t/t_math_signed3_noopt.py b/test_regress/t/t_math_signed3_noopt.py
index 929b1beca..75d6e33d2 100755
--- a/test_regress/t/t_math_signed3_noopt.py
+++ b/test_regress/t/t_math_signed3_noopt.py
@@ -11,7 +11,9 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-test.compile(verilator_flags2=["-O0"])
+test.top_filename = "t/t_math_signed3.v"
+
+test.compile(make_main=False, verilator_flags2=["-O0", "--main", "--exe", "--timing"])
 
 test.execute()
 
diff --git a/test_regress/t/t_math_signed3_noopt.v b/test_regress/t/t_math_signed3_noopt.v
deleted file mode 100644
index 959fb3a6d..000000000
--- a/test_regress/t/t_math_signed3_noopt.v
+++ /dev/null
@@ -1,132 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2014 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-`define stop $stop
-`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0)
-
-module t (/*AUTOARG*/);
-
-   // verilator lint_off WIDTH
-   wire [1:0]        bug729_au = ~0;
-   wire signed [1:0] bug729_as = ~0;
-   wire [2:0]        bug729_b = ~0;
-   // the $signed output is unsigned because the input is unsigned; the signedness does not change.
-   wire [0:0]        bug729_yuu = $signed(2'b11)  == 3'b111;   //1'b0
-   wire [0:0]        bug729_ysu = $signed(2'SB11) == 3'b111;   //1'b0
-   wire [0:0]        bug729_yus = $signed(2'b11)  == 3'sb111;  //1'b1
-   wire [0:0]        bug729_yss = $signed(2'sb11) == 3'sb111;  //1'b1
-   wire [0:0]        bug729_zuu = 2'sb11 == 3'b111;   //1'b0
-   wire [0:0]        bug729_zsu = 2'sb11 == 3'b111;   //1'b0
-   wire [0:0]        bug729_zus = 2'sb11 == 3'sb111;  //1'b1
-   wire [0:0]        bug729_zss = 2'sb11 == 3'sb111;  //1'b1
-
-   wire [3:0]        bug733_a = 4'b0010;
-   wire [3:0]        bug733_yu = $signed(|bug733_a); // 4'b1111 note | is always unsigned
-   wire signed [3:0] bug733_ys = $signed(|bug733_a); // 4'b1111
-
-   wire [3:0]        bug733_zu = $signed(2'b11);  // 4'b1111
-   wire signed [3:0] bug733_zs = $signed(2'sb11); // 4'b1111
-
-   // When RHS of assignment is fewer bits than lhs, RHS sign or zero extends based on RHS's sign
-
-   wire [3:0]        bug733_qu = 2'sb11;  // 4'b1111
-   wire signed [3:0] bug733_qs = 2'sb11; // 4'b1111
-   reg signed [32:0] bug349_s;
-   reg signed [32:0] bug349_u;
-
-   wire signed [1:0] sb11 = 2'sb11;
-
-   wire [3:0]        subout_u;
-   sub sub (.a(2'sb11), .z(subout_u));
-   // initial `checkh(subout_u, 4'b1111);
-
-   wire [5:0]        cond_a = 1'b1 ? 3'sb111 : 5'sb11111;
-   initial `checkh(cond_a, 6'b111111);
-   wire [5:0]        cond_b = 1'b0 ? 3'sb111 : 5'sb11111;
-   initial `checkh(cond_b, 6'b111111);
-
-   bit cmp;
-
-   initial begin
-`ifndef VERILATOR
-      #1;
-`endif
-
-      // verilator lint_on WIDTH
-      `checkh(bug729_yuu, 1'b0);
-      `checkh(bug729_ysu, 1'b0);
-      `checkh(bug729_yus, 1'b1);
-      `checkh(bug729_yss, 1'b1);
-
-      `checkh(bug729_zuu, 1'b0);
-      `checkh(bug729_zsu, 1'b0);
-      `checkh(bug729_zus, 1'b1);
-      `checkh(bug729_zss, 1'b1);
-
-      // `checkh(bug733_yu, 4'b1111);
-      // `checkh(bug733_ys, 4'b1111);
-
-      `checkh(bug733_zu, 4'b1111);
-      `checkh(bug733_zs, 4'b1111);
-
-      `checkh(bug733_qu, 4'b1111);
-      `checkh(bug733_qs, 4'b1111);
-
-      // verilator lint_off WIDTH
-      bug349_s = 4'sb1111;
-      `checkh(bug349_s, 33'h1ffffffff);
-      bug349_u = 4'sb1111;
-      `checkh(bug349_u, 33'h1ffffffff);
-
-      bug349_s = 4'sb1111 - 1'b1;
-      `checkh(bug349_s,33'he);
-
-      bug349_s = 4'sb1111 - 5'b00001;
-      `checkh(bug349_s,33'he);
-
-      cmp = 3'sb111 == 4'b111;
-      `checkh(cmp, 1);
-      cmp = 3'sb111 == 4'sb111;
-      `checkh(cmp, 0);
-      cmp = 3'sb111 != 4'b111;
-      `checkh(cmp, 0);
-      cmp = 3'sb111 != 4'sb111;
-      `checkh(cmp, 1);
-
-      cmp = 3'sb111 === 4'b111;
-      `checkh(cmp, 1);
-      cmp = 3'sb111 === 4'sb111;
-      `checkh(cmp, 0);
-
-      case (2'sb11)
-        4'b1111: $stop;
-        default: ;
-      endcase
-
-      case (sb11)
-        4'b1111: $stop;
-        default: ;
-      endcase
-
-      case (2'sb11)
-        4'sb1111: ;
-        default: $stop;
-      endcase
-
-      case (sb11)
-        4'sb1111: ;
-        default: $stop;
-      endcase
-
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
-endmodule
-
-module sub(input [3:0] a,
-           output [3:0] z);
-   assign z = a;
-endmodule

From 7191a0ba8bf354021ca9e513aea8ef35691cb34b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 9 May 2025 08:25:54 -0400
Subject: [PATCH 047/211] Internals: Favor preincrements. No functional change.

---
 include/verilated.cpp          |   8 +-
 include/verilated_cov.cpp      |   2 +-
 include/verilated_probdist.cpp |   2 +-
 include/verilated_random.cpp   |  12 +--
 include/verilated_random.h     |   2 +-
 include/verilated_saif_c.cpp   |   2 +-
 include/verilated_trace_imp.h  |   2 +-
 include/verilated_vpi.cpp      |  32 +++---
 src/V3Number.cpp               | 186 ++++++++++++++++-----------------
 src/V3Number.h                 |   2 +-
 src/V3Stats.h                  |   2 +-
 11 files changed, 126 insertions(+), 126 deletions(-)

diff --git a/include/verilated.cpp b/include/verilated.cpp
index 3f9992222..0fc525de1 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -577,14 +577,14 @@ WDataOutP VL_POW_WWW(int obits, int, int rbits, WDataOutP owp, const WDataInP lw
     const int owords = VL_WORDS_I(obits);
     VL_DEBUG_IFDEF(assert(owords <= VL_MULS_MAX_WORDS););
     owp[0] = 1;
-    for (int i = 1; i < VL_WORDS_I(obits); i++) owp[i] = 0;
+    for (int i = 1; i < VL_WORDS_I(obits); ++i) owp[i] = 0;
     // cppcheck-has-bug-suppress variableScope
     VlWide<VL_MULS_MAX_WORDS> powstore;  // Fixed size, as MSVC++ doesn't allow [words] here
     VlWide<VL_MULS_MAX_WORDS> lastpowstore;  // Fixed size, as MSVC++ doesn't allow [words] here
     VlWide<VL_MULS_MAX_WORDS> lastoutstore;  // Fixed size, as MSVC++ doesn't allow [words] here
     // cppcheck-has-bug-suppress variableScope
     VL_ASSIGN_W(obits, powstore, lwp);
-    for (int bit = 0; bit < rbits; bit++) {
+    for (int bit = 0; bit < rbits; ++bit) {
         if (bit > 0) {  // power = power*power
             VL_ASSIGN_W(obits, lastpowstore, powstore);
             VL_MUL_W(owords, powstore, lastpowstore, lastpowstore);
@@ -1770,7 +1770,7 @@ std::string VL_STACKTRACE_N() VL_MT_SAFE {
     if (!strings) return "Unable to backtrace\n";
 
     std::string result = "Backtrace:\n";
-    for (int j = 0; j < nptrs; j++) result += std::string{strings[j]} + "\n"s;
+    for (int j = 0; j < nptrs; ++j) result += std::string{strings[j]} + "\n"s;
     free(strings);
     return result;
 }
@@ -2042,7 +2042,7 @@ static const char* formatBinary(int nBits, uint32_t bits) {
     assert((nBits >= 1) && (nBits <= 32));
 
     static thread_local char t_buf[64];
-    for (int i = 0; i < nBits; i++) {
+    for (int i = 0; i < nBits; ++i) {
         const bool isOne = bits & (1 << (nBits - 1 - i));
         t_buf[i] = (isOne ? '1' : '0');
     }
diff --git a/include/verilated_cov.cpp b/include/verilated_cov.cpp
index bf3153d72..a9bc7c1cd 100644
--- a/include/verilated_cov.cpp
+++ b/include/verilated_cov.cpp
@@ -312,7 +312,7 @@ public:
         const char* fnstartp = m_insertFilenamep;
         while (const char* foundp = std::strchr(fnstartp, '/')) fnstartp = foundp + 1;
         const char* fnendp = fnstartp;
-        for (; *fnendp && *fnendp != '.'; fnendp++) {}
+        for (; *fnendp && *fnendp != '.'; ++fnendp) {}
         const size_t page_len = fnendp - fnstartp;
         const std::string page_default = "sp_user/" + std::string{fnstartp, page_len};
         ckeyps[2] = "page";
diff --git a/include/verilated_probdist.cpp b/include/verilated_probdist.cpp
index 43c436a59..5db32a8de 100644
--- a/include/verilated_probdist.cpp
+++ b/include/verilated_probdist.cpp
@@ -116,7 +116,7 @@ IData VL_DIST_ERLANG(IData& seedr, IData uk, IData umean) VL_MT_SAFE {
         return 0;
     }
     double x = 1.0;
-    for (int32_t i = 1; i <= k; i++) x = x * _vl_dbase_uniform(seedr, 0, 1);
+    for (int32_t i = 1; i <= k; ++i) x = x * _vl_dbase_uniform(seedr, 0, 1);
     const double a = static_cast<double>(mean);
     const double b = static_cast<double>(k);
     double r = -a * log(x) / b;
diff --git a/include/verilated_random.cpp b/include/verilated_random.cpp
index 30e45d64d..c61c95880 100644
--- a/include/verilated_random.cpp
+++ b/include/verilated_random.cpp
@@ -112,7 +112,7 @@ public:
         if (m_pidStatus) {
             std::stringstream msg;
             msg << "Subprocess command `" << m_cmd[0];
-            for (const char* const* arg = m_cmd + 1; *arg; arg++) msg << ' ' << *arg;
+            for (const char* const* arg = m_cmd + 1; *arg; ++arg) msg << ' ' << *arg;
             msg << "' failed: ";
             if (WIFSIGNALED(m_pidStatus))
                 msg << strsignal(WTERMSIG(m_pidStatus))
@@ -221,7 +221,7 @@ static Process& getSolver() {
     static std::vector<const char*> s_argv;
     static std::string s_program = Verilated::threadContextp()->solverProgram();
     s_argv.emplace_back(&s_program[0]);
-    for (char* arg = &s_program[0]; *arg; arg++) {
+    for (char* arg = &s_program[0]; *arg; ++arg) {
         if (*arg == ' ') {
             *arg = '\0';
             s_argv.emplace_back(arg + 1);
@@ -242,7 +242,7 @@ static Process& getSolver() {
     msg << "Unable to communicate with SAT solver, please check its installation or specify a "
            "different one in VERILATOR_SOLVER environment variable.\n";
     msg << " ... Tried: $";
-    for (const char* const* arg = cmd; *arg; arg++) msg << ' ' << *arg;
+    for (const char* const* arg = cmd; *arg; ++arg) msg << ' ' << *arg;
     msg << '\n';
     const std::string str = msg.str();
     VL_WARN_MT("", 0, "randomize", str.c_str());
@@ -294,7 +294,7 @@ void VlRandomVar::emitType(std::ostream& s) const { s << "(_ BitVec " << width()
 int VlRandomVar::totalWidth() const { return m_width; }
 static bool parseSMTNum(int obits, WDataOutP owp, const std::string& val) {
     int i;
-    for (i = 0; val[i] && val[i] != '#'; i++) {}
+    for (i = 0; val[i] && val[i] != '#'; ++i) {}
     if (val[i++] != '#') return false;
     switch (val[i++]) {
     case 'b': _vl_vsss_based(owp, obits, 1, &val[i], 0, val.size() - i); break;
@@ -345,7 +345,7 @@ void VlRandomizer::randomConstraint(std::ostream& os, VlRNG& rngr, int bits) {
     os << "(= #b";
     for (int i = bits - 1; i >= 0; i--) os << (VL_BITISSET_I(hash, i) ? '1' : '0');
     if (bits > 1) os << " (concat";
-    for (int i = 0; i < bits; i++) {
+    for (int i = 0; i < bits; ++i) {
         IData varBitsLeft = varBits;
         IData varBitsWant = (varBits + 1) / 2;
         if (varBits > 2) os << " (bvxor";
@@ -393,7 +393,7 @@ bool VlRandomizer::next(VlRNG& rngr) {
         f << "(reset)\n";
         return false;
     }
-    for (int i = 0; i < _VL_SOLVER_HASH_LEN_TOTAL && sat; i++) {
+    for (int i = 0; i < _VL_SOLVER_HASH_LEN_TOTAL && sat; ++i) {
         f << "(assert ";
         randomConstraint(f, rngr, _VL_SOLVER_HASH_LEN);
         f << ")\n";
diff --git a/include/verilated_random.h b/include/verilated_random.h
index f75b199d5..fc08596db 100644
--- a/include/verilated_random.h
+++ b/include/verilated_random.h
@@ -143,7 +143,7 @@ public:
     }
     void emitGetValue(std::ostream& s) const override {
         const int elementCounts = countMatchingElements(*m_arrVarsRefp, name());
-        for (int i = 0; i < elementCounts; i++) {
+        for (int i = 0; i < elementCounts; ++i) {
             const std::string indexed_name = name() + std::to_string(i);
             const auto it = m_arrVarsRefp->find(indexed_name);
             if (it != m_arrVarsRefp->end()) {
diff --git a/include/verilated_saif_c.cpp b/include/verilated_saif_c.cpp
index ee5a40e8e..9e6cd7d9a 100644
--- a/include/verilated_saif_c.cpp
+++ b/include/verilated_saif_c.cpp
@@ -110,7 +110,7 @@ public:
                       "The emitted value must be of integral type");
 
         const uint64_t dt = time - m_lastTime;
-        for (size_t i = 0; i < std::min(m_width, bits); i++) {
+        for (size_t i = 0; i < std::min(m_width, bits); ++i) {
             m_bits[i].aggregateVal(dt, (newval >> i) & 1);
         }
         updateLastTime(time);
diff --git a/include/verilated_trace_imp.h b/include/verilated_trace_imp.h
index d13f5bcf6..5f0d2bd87 100644
--- a/include/verilated_trace_imp.h
+++ b/include/verilated_trace_imp.h
@@ -47,7 +47,7 @@ static double timescaleToDouble(const char* unitp) VL_PURE {
     // On error so we allow just "ns" to return 1e-9.
     if (value == 0.0 && endp == unitp) value = 1;
     unitp = endp;
-    for (; *unitp && std::isspace(*unitp); unitp++) {}
+    for (; *unitp && std::isspace(*unitp); ++unitp) {}
     switch (*unitp) {
     case 's': value *= 1e0; break;
     case 'm': value *= 1e-3; break;
diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp
index c60206abe..5af4bc916 100644
--- a/include/verilated_vpi.cpp
+++ b/include/verilated_vpi.cpp
@@ -205,7 +205,7 @@ public:
     uint32_t size() const override {
         const int maxDimNum = maxDim(isIndexedDimUnpacked());
         int size = 1;
-        for (int dim = indexedDim() + 1; dim <= maxDimNum; dim++)
+        for (int dim = indexedDim() + 1; dim <= maxDimNum; ++dim)
             size *= varp()->range(dim)->elements();
         return size;
     }
@@ -503,7 +503,7 @@ public:
     explicit VerilatedVpioRegIter(const VerilatedVpioVar* vop)
         : m_var{new VerilatedVpioVar(vop)}
         , m_maxDim{vop->varp()->udims() - 1} {
-        for (auto it = vop->indexedDim() + 1; it <= m_maxDim; it++)
+        for (auto it = vop->indexedDim() + 1; it <= m_maxDim; ++it)
             m_ranges.push_back(*vop->varp()->range(it));
         for (auto it : m_ranges) m_nextIndex.push_back(it.right());
     }
@@ -2219,7 +2219,7 @@ vpiHandle vpi_iterate(PLI_INT32 type, vpiHandle object) {
 
         std::vector<VerilatedRange> ranges;
         const int maxDim = vop->maxDim(vop->isIndexedDimUnpacked());
-        for (int dim = vop->indexedDim() + 1; dim <= maxDim; dim++)
+        for (int dim = vop->indexedDim() + 1; dim <= maxDim; ++dim)
             ranges.emplace_back(*vop->varp()->range(dim));
 
         // allow one more range layer (regbit)
@@ -2945,7 +2945,7 @@ void vl_get_value_array_integrals(unsigned index, const unsigned num, const unsi
                                   const unsigned packedSize, const bool leftIsLow, const T* src,
                                   K* dst) {
     static_assert(sizeof(K) >= sizeof(T), "size of type K is less than size of type T");
-    for (int i = 0; i < num; i++) {
+    for (int i = 0; i < num; ++i) {
         dst[i] = src[index];
         index = leftIsLow    ? index == (size - 1) ? 0 : index + 1
                 : index == 0 ? size - 1
@@ -2964,7 +2964,7 @@ void vl_put_value_array_integrals(unsigned index, const unsigned num, const unsi
     const T mask = element_size_bytes == sizeof(T)
                        ? static_cast<T>(-1)
                        : ~(static_cast<T>(-1) << (element_size_bytes * 8));
-    for (unsigned i = 0; i < num; i++) {
+    for (unsigned i = 0; i < num; ++i) {
         dst[index] = src[i] & static_cast<T>(mask);
         index = leftIsLow    ? index == (size - 1) ? 0 : index + 1
                 : index == 0 ? size - 1
@@ -2981,7 +2981,7 @@ void vl_get_value_array_vectors(unsigned index, const unsigned num, const unsign
     const unsigned element_size_bytes = VL_BYTES_I(packedSize);
     const unsigned element_size_words = VL_WORDS_I(packedSize);
     if (sizeof(T) == sizeof(QData)) {
-        for (unsigned i = 0; i < num; i++) {
+        for (unsigned i = 0; i < num; ++i) {
             dst[i * 2].aval = static_cast<QData>(src[index]);
             dst[i * 2].bval = 0;
             dst[(i * 2) + 1].aval = static_cast<QData>(src[index]) >> 32;
@@ -2991,10 +2991,10 @@ void vl_get_value_array_vectors(unsigned index, const unsigned num, const unsign
                                  : index - 1;
         }
     } else {
-        for (unsigned i = 0; i < num; i++) {
+        for (unsigned i = 0; i < num; ++i) {
             const size_t dst_index = i * element_size_words;
             const size_t src_index = index * element_size_words;
-            for (unsigned j = 0; j < element_size_words; j++) {
+            for (unsigned j = 0; j < element_size_words; ++j) {
                 dst[dst_index + j].aval = src[src_index + j];
                 dst[dst_index + j].bval = 0;
             }
@@ -3017,7 +3017,7 @@ void vl_put_value_array_vectors(unsigned index, const unsigned num, const unsign
         const QData mask = element_size_bytes == sizeof(T)
                                ? static_cast<QData>(-1)
                                : ~(static_cast<QData>(-1) << (element_size_bytes * 8));
-        for (unsigned i = 0; i < num; i++) {
+        for (unsigned i = 0; i < num; ++i) {
             dst[index] = src[i * 2].aval;
             dst[index]
                 |= (static_cast<QData>(src[(i * 2) + 1].aval) << (sizeof(PLI_UINT32) * 8)) & mask;
@@ -3026,9 +3026,9 @@ void vl_put_value_array_vectors(unsigned index, const unsigned num, const unsign
                                  : index - 1;
         }
     } else {
-        for (unsigned i = 0; i < num; i++) {
+        for (unsigned i = 0; i < num; ++i) {
             unsigned bytes_stored = 0;
-            for (unsigned j = 0; j < element_size_words; j++) {
+            for (unsigned j = 0; j < element_size_words; ++j) {
                 if (bytes_stored >= element_size_bytes) break;
                 const T mask
                     = (element_size_bytes - bytes_stored) >= sizeof(PLI_UINT32)
@@ -3057,9 +3057,9 @@ void vl_get_value_array_rawvals(unsigned index, unsigned num, const unsigned siz
     while (num-- > 0) {
         const size_t src_offset = index * element_size_repr;
         unsigned bytes_copied = 0;
-        for (unsigned j = 0; j < element_size_repr; j++) {
+        for (unsigned j = 0; j < element_size_repr; ++j) {
             const T& src_data = src[src_offset + j];
-            for (unsigned k = 0; k < sizeof(T); k++) {
+            for (unsigned k = 0; k < sizeof(T); ++k) {
                 if (bytes_copied++ == element_size_bytes) break;
                 dst[dst_index++] = src_data >> (k * 8);
             }
@@ -3080,13 +3080,13 @@ void vl_put_value_array_rawvals(unsigned index, const unsigned num, const unsign
                                 const bool fourState, const PLI_UBYTE8* src, T* dst) {
     const unsigned element_size_bytes VL_BYTES_I(packedSize);
     const unsigned element_size_repr = (element_size_bytes + sizeof(T) - 1) / sizeof(T);
-    for (unsigned i = 0; i < num; i++) {
+    for (unsigned i = 0; i < num; ++i) {
         unsigned bytes_copied = 0;
         const size_t dst_offset = index * element_size_repr;
         const size_t src_offset = i * element_size_bytes;
-        for (unsigned j = 0; j < element_size_repr; j++) {
+        for (unsigned j = 0; j < element_size_repr; ++j) {
             T& dst_data = dst[dst_offset + j];
-            for (unsigned k = 0; k < sizeof(T); k++) {
+            for (unsigned k = 0; k < sizeof(T); ++k) {
                 if (bytes_copied == element_size_bytes) break;
                 const unsigned src_index
                     = fourState ? (src_offset * 2) + bytes_copied : (src_offset) + bytes_copied;
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 9d9d3a2e1..f0280076c 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -128,7 +128,7 @@ V3Number::V3Number(AstNode* nodep, const AstNodeDType* nodedtypep) {
 void V3Number::create(const char* sourcep) {
     m_data.setLogic();
     const char* value_startp = sourcep;
-    for (const char* cp = sourcep; *cp; cp++) {
+    for (const char* cp = sourcep; *cp; ++cp) {
         if (*cp == '\'') {
             value_startp = cp + 1;
             break;
@@ -141,21 +141,21 @@ void V3Number::create(const char* sourcep) {
     if (value_startp != sourcep) {  // Has a '
         string widthn;
         const char* cp = sourcep;
-        for (; *cp; cp++) {
+        for (; *cp; ++cp) {
             if (*cp == '\'') {
-                cp++;
+                ++cp;
                 break;
             }
             if (*cp != '_') widthn += *cp;
         }
         while (*cp == '_') cp++;
         if (*cp && std::tolower(*cp) == 's') {
-            cp++;
+            ++cp;
             isSigned(true);
         }
         if (*cp) {
             base = *cp;
-            cp++;
+            ++cp;
         }
         value_startp = cp;
 
@@ -221,14 +221,14 @@ void V3Number::create(const char* sourcep) {
     int base_align = 1;
     if (std::tolower(base) == 'd') {
         // Ignore leading zeros so we don't issue too many digit errors when lots of leading 0's
-        while (*value_startp == '_' || *value_startp == '0') value_startp++;
+        while (*value_startp == '_' || *value_startp == '0') ++value_startp;
         // Convert decimal number to hex
         int olen = 0;
         uint32_t val = 0;
         int got_x = 0;
         int got_z = 0;
         int got_01 = 0;
-        for (const char* cp = value_startp; *cp; cp++) {
+        for (const char* cp = value_startp; *cp; ++cp) {
             switch (std::tolower(*cp)) {
             case '0':  // FALLTHRU
             case '1':  // FALLTHRU
@@ -254,10 +254,10 @@ void V3Number::create(const char* sourcep) {
                     opAdd(product, addend);
                     if (product.bitsValue(width(), 4)) {  // Overflowed
                         warnTooMany(sourcep);
-                        while (*(cp + 1)) cp++;  // Skip ahead so don't get multiple warnings
+                        while (*(cp + 1)) ++cp;  // Skip ahead so don't get multiple warnings
                     }
                 }
-                olen++;
+                ++olen;
                 got_01 = 1;
                 break;
             }
@@ -344,7 +344,7 @@ void V3Number::create(const char* sourcep) {
                 case '7': setBit(obit++,1); setBit(obit++,1); setBit(obit++,1); setBit(obit++,0); break;
                 case '8': setBit(obit++,0); setBit(obit++,0); setBit(obit++,0); setBit(obit++,1); break;
                 case '9': setBit(obit++,1); setBit(obit++,0); setBit(obit++,0); setBit(obit++,1); break;
-                case 'a': setBit(obit++,0); setBit(obit++,1); setBit(obit++,0); setBit(obit++,1);  break;
+                case 'a': setBit(obit++,0); setBit(obit++,1); setBit(obit++,0); setBit(obit++,1); break;
                 case 'b': setBit(obit++,1); setBit(obit++,1); setBit(obit++,0); setBit(obit++,1); break;
                 case 'c': setBit(obit++,0); setBit(obit++,0); setBit(obit++,1); setBit(obit++,1); break;
                 case 'd': setBit(obit++,1); setBit(obit++,0); setBit(obit++,1); setBit(obit++,1); break;
@@ -379,7 +379,7 @@ void V3Number::create(const char* sourcep) {
     // This fixes 2'bx to become 2'bxx.
     while (obit <= width() && obit && bitIsXZ(obit - 1)) {
         setBit(obit, bitIs(obit - 1));
-        obit++;
+        ++obit;
     }
     opCleanThis(true);
 
@@ -428,24 +428,24 @@ int V3Number::log2bQuad(uint64_t num) {
 // Setters
 
 V3Number& V3Number::setZero() {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, 0};
     return *this;
 }
 V3Number& V3Number::setQuad(uint64_t value) {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, 0};
     m_data.num()[0].m_value = value & 0xffffffffULL;
     if (width() > 32) m_data.num()[1].m_value = (value >> 32ULL) & 0xffffffffULL;
     opCleanThis();
     return *this;
 }
 V3Number& V3Number::setLong(uint32_t value) {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, 0};
     m_data.num()[0].m_value = value;
     opCleanThis();
     return *this;
 }
 V3Number& V3Number::setLongS(int32_t value) {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, 0};
     union {
         uint32_t u;
         int32_t s;
@@ -465,35 +465,35 @@ V3Number& V3Number::setDouble(double value) {
     } u;
     u.d = value;
     (void)u.d;
-    for (int i = 2; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 2; i < words(); ++i) m_data.num()[i] = {0, 0};
     m_data.num()[0].m_value = u.u[0];
     m_data.num()[1].m_value = u.u[1];
     return *this;
 }
 V3Number& V3Number::setSingleBits(char value) {
-    for (int i = 1 /*upper*/; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 1 /*upper*/; i < words(); ++i) m_data.num()[i] = {0, 0};
     m_data.num()[0] = {(value == '1' || value == 'x' || value == 1 || value == 3),
                        (value == 'z' || value == 'x' || value == 2 || value == 3)};
     return *this;
 }
 
 V3Number& V3Number::setAllBits0() {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, 0};
     return *this;
 }
 V3Number& V3Number::setAllBits1() {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {~0U, 0};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {~0U, 0};
     opCleanThis();
     return *this;
 }
 V3Number& V3Number::setAllBitsX() {
     // Use setAllBitsXRemoved if calling this based on a non-X/Z input value such as divide by zero
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {~0U, ~0U};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {~0U, ~0U};
     opCleanThis();
     return *this;
 }
 V3Number& V3Number::setAllBitsZ() {
-    for (int i = 0; i < words(); i++) m_data.num()[i] = {0, ~0U};
+    for (int i = 0; i < words(); ++i) m_data.num()[i] = {0, ~0U};
     opCleanThis();
     return *this;
 }
@@ -512,7 +512,7 @@ V3Number& V3Number::setAllBitsXRemoved() {
 }
 V3Number& V3Number::setValue1() {
     m_data.num()[0] = {1, 0};
-    for (int i = 1; i < words(); i++) m_data.num()[i] = {0, 0};
+    for (int i = 1; i < words(); ++i) m_data.num()[i] = {0, 0};
     return *this;
 }
 
@@ -524,7 +524,7 @@ void V3Number::setBitX0(int bit) {
 
 V3Number& V3Number::setMask(int nbits, int lsb) {
     setZero();
-    for (int bit = lsb; bit < lsb + nbits; bit++) setBit(bit, 1);
+    for (int bit = lsb; bit < lsb + nbits; ++bit) setBit(bit, 1);
     return *this;
 }
 
@@ -759,7 +759,7 @@ string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STAB
         // Spec says always drop leading zeros, this isn't quite right, we space pad.
         int bit = width() - 1;
         bool start = true;
-        while ((bit % 8) != 7) bit++;
+        while ((bit % 8) != 7) ++bit;
         for (; bit >= 0; bit -= 8) {
             const int v = bitsValue(bit - 7, 8);
             if (!start || v) {
@@ -784,7 +784,7 @@ string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STAB
             // a very wide mantissa, we use log2(2**mantissabits)/log2(10),
             // which is (+1.0 is for rounding bias):
             double dchars = mantissabits / 3.321928094887362 + 1.0;
-            if (issigned) dchars++;  // space for sign
+            if (issigned) ++dchars;  // space for sign
             fmtsize = cvtToStr(int(dchars));
         }
         bool hasXZ = false;
@@ -833,7 +833,7 @@ string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STAB
     // 'l'   // Library - converted to text by V3LinkResolve
     // 'p'   // Packed - converted to another code by V3Width
     case 'u': {  // Packed 2-state
-        for (int i = 0; i < words(); i++) {
+        for (int i = 0; i < words(); ++i) {
             const uint32_t v = m_data.num()[i].m_value;
             str += static_cast<char>((v >> 0) & 0xff);
             str += static_cast<char>((v >> 8) & 0xff);
@@ -843,7 +843,7 @@ string V3Number::displayed(FileLine* fl, const string& vformat) const VL_MT_STAB
         return str;
     }
     case 'z': {  // Packed 4-state
-        for (int i = 0; i < words(); i++) {
+        for (int i = 0; i < words(); ++i) {
             const ValueAndX v = m_data.num()[i];
             str += static_cast<char>((v.m_value >> 0) & 0xff);
             str += static_cast<char>((v.m_value >> 8) & 0xff);
@@ -1039,7 +1039,7 @@ uint8_t V3Number::dataByte(int byte) const {
 
 bool V3Number::isAllZ() const VL_MT_SAFE {
     if (isDouble() || isString()) return false;
-    for (int i = 0; i < width(); i++) {
+    for (int i = 0; i < width(); ++i) {
         if (!bitIsZ(i)) return false;
     }
     return true;
@@ -1056,7 +1056,7 @@ bool V3Number::isAllX() const VL_MT_SAFE {
 }
 bool V3Number::isEqZero() const VL_MT_SAFE {
     if (isString()) return m_data.str().empty();
-    for (int i = 0; i < words(); i++) {
+    for (int i = 0; i < words(); ++i) {
         const ValueAndX v = m_data.num()[i];
         if (v.m_value || v.m_valueX) return false;
     }
@@ -1064,21 +1064,21 @@ bool V3Number::isEqZero() const VL_MT_SAFE {
 }
 bool V3Number::isNeqZero() const {
     if (isString()) return !m_data.str().empty();
-    for (int i = 0; i < words(); i++) {
+    for (int i = 0; i < words(); ++i) {
         const ValueAndX v = m_data.num()[i];
         if (v.m_value & ~v.m_valueX) return true;
     }
     return false;
 }
 bool V3Number::isBitsZero(int msb, int lsb) const {
-    for (int i = lsb; i <= msb; i++) {
+    for (int i = lsb; i <= msb; ++i) {
         if (VL_UNLIKELY(!bitIs0(i))) return false;
     }
     return true;
 }
 bool V3Number::isEqOne() const {
     if (m_data.num()[0].m_value != 1 || m_data.num()[0].m_valueX) return false;
-    for (int i = 1; i < words(); i++) {
+    for (int i = 1; i < words(); ++i) {
         const ValueAndX v = m_data.num()[i];
         if (v.m_value || v.m_valueX) return false;
     }
@@ -1087,7 +1087,7 @@ bool V3Number::isEqOne() const {
 bool V3Number::isEqAllOnes(int optwidth) const {
     // Correct number of zero bits/width matters
     if (!optwidth) optwidth = width();
-    for (int bit = 0; bit < optwidth; bit++) {
+    for (int bit = 0; bit < optwidth; ++bit) {
         if (!bitIs1(bit)) return false;
     }
     return true;
@@ -1101,7 +1101,7 @@ bool V3Number::isFourState() const VL_MT_SAFE {
 }
 bool V3Number::isAnyX() const VL_MT_SAFE {
     if (isDouble() || isString()) return false;
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (bitIsX(bit)) return true;
     }
     return false;
@@ -1109,14 +1109,14 @@ bool V3Number::isAnyX() const VL_MT_SAFE {
 bool V3Number::isAnyXZ() const { return isAnyX() || isAnyZ(); }
 bool V3Number::isAnyZ() const VL_MT_SAFE {
     if (isDouble() || isString()) return false;
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (bitIsZ(bit)) return true;
     }
     return false;
 }
 bool V3Number::isLtXZ(const V3Number& rhs) const {
     // Include X/Z in comparisons for sort ordering
-    for (int bit = 0; bit < std::max(width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(width(), rhs.width()); ++bit) {
         if (bitIs1(bit) && rhs.bitIs0(bit)) return true;
         if (rhs.bitIs1(bit) && bitIs0(bit)) return false;
         if (bitIsXZ(bit)) return true;
@@ -1183,8 +1183,8 @@ uint32_t V3Number::countBits(const V3Number& ctrl1, const V3Number& ctrl2,
 
 uint32_t V3Number::countOnes() const {
     int n = 0;
-    for (int bit = 0; bit < width(); bit++) {
-        if (bitIs1(bit)) n++;
+    for (int bit = 0; bit < width(); ++bit) {
+        if (bitIs1(bit)) ++n;
     }
     return n;
 }
@@ -1203,7 +1203,7 @@ V3Number& V3Number::opBitsNonX(const V3Number& lhs) {  // 0/1->1, X/Z->0
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs0(bit) || lhs.bitIs1(bit)) setBit(bit, 1);
     }
     return *this;
@@ -1213,7 +1213,7 @@ V3Number& V3Number::opBitsOne(const V3Number& lhs) {  // 1->1, 0/X/Z->0
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs1(bit)) setBit(bit, 1);
     }
     return *this;
@@ -1223,7 +1223,7 @@ V3Number& V3Number::opBitsXZ(const V3Number& lhs) {  // 0/1->1, X/Z->0
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIsXZ(bit)) setBit(bit, 1);
     }
     return *this;
@@ -1233,7 +1233,7 @@ V3Number& V3Number::opBitsZ(const V3Number& lhs) {  // 0/1->1, X/Z->0
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIsZ(bit)) setBit(bit, 1);
     }
     return *this;
@@ -1247,7 +1247,7 @@ V3Number& V3Number::opRedOr(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     char outc = 0;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs1(bit)) {
             return setSingleBits(1);
         } else if (lhs.bitIs0(bit)) {
@@ -1264,7 +1264,7 @@ V3Number& V3Number::opRedAnd(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     char outc = 1;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs0(bit)) {
             return setSingleBits(0);
         } else if (lhs.bitIs1(bit)) {
@@ -1280,7 +1280,7 @@ V3Number& V3Number::opRedXor(const V3Number& lhs) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     char outc = 0;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs1(bit)) {
             if (outc == 1) {
                 outc = 0;
@@ -1349,7 +1349,7 @@ V3Number& V3Number::opLogNot(const V3Number& lhs) {
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     // op i, 1 bit return
     char outc = 1;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs1(bit)) {
             outc = 0;
             goto last;
@@ -1368,7 +1368,7 @@ V3Number& V3Number::opNot(const V3Number& lhs) {
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     // op i, L(lhs) bit return
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs0(bit)) {
             setBit(bit, 1);
         } else if (lhs.bitIsXZ(bit)) {
@@ -1383,7 +1383,7 @@ V3Number& V3Number::opAnd(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     // i op j, max(L(lhs),L(rhs)) bit return, careful need to X/Z extend.
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs1(bit) && rhs.bitIs1(bit)) {
             setBit(bit, 1);
         } else if (lhs.bitIs0(bit) || rhs.bitIs0(bit)) {  // 0
@@ -1399,7 +1399,7 @@ V3Number& V3Number::opOr(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     // i op j, max(L(lhs),L(rhs)) bit return, careful need to X/Z extend.
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs1(bit) || rhs.bitIs1(bit)) {
             setBit(bit, 1);
         } else if (lhs.bitIs0(bit) && rhs.bitIs0(bit)) {
@@ -1416,7 +1416,7 @@ V3Number& V3Number::opXor(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (lhs.bitIs1(bit) && rhs.bitIs0(bit)) {
             setBit(bit, 1);
         } else if (lhs.bitIs0(bit) && rhs.bitIs1(bit)) {
@@ -1439,13 +1439,13 @@ V3Number& V3Number::opConcat(const V3Number& lhs, const V3Number& rhs) {
         v3warn(WIDTHCONCAT, "Unsized numbers/parameters not allowed in concatenations.");
     }
     int obit = 0;
-    for (int bit = 0; bit < rhs.width(); bit++) {
+    for (int bit = 0; bit < rhs.width(); ++bit) {
         setBit(obit, rhs.bitIs(bit));
-        obit++;
+        ++obit;
     }
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         setBit(obit, lhs.bitIs(bit));
-        obit++;
+        ++obit;
     }
     return *this;
 }
@@ -1504,7 +1504,7 @@ V3Number& V3Number::opStreamL(const V3Number& lhs, const V3Number& rhs) {
     const int ssize = std::min(rhs.toUInt(), static_cast<unsigned>(lhs.width()));
     for (int istart = 0; istart < lhs.width(); istart += ssize) {
         const int ostart = std::max(0, lhs.width() - ssize - istart);
-        for (int bit = 0; bit < ssize && bit < lhs.width() - istart; bit++) {
+        for (int bit = 0; bit < ssize && bit < lhs.width() - istart; ++bit) {
             setBit(ostart + bit, lhs.bitIs(istart + bit));
         }
     }
@@ -1517,14 +1517,14 @@ V3Number& V3Number::opLogAnd(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     char loutc = 0;
     char routc = 0;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs1(bit)) {
             loutc = 1;
             break;
         }
         if (lhs.bitIsXZ(bit) && loutc == 0) loutc = 'x';
     }
-    for (int bit = 0; bit < rhs.width(); bit++) {
+    for (int bit = 0; bit < rhs.width(); ++bit) {
         if (rhs.bitIs1(bit)) {
             routc = 1;
             break;
@@ -1542,14 +1542,14 @@ V3Number& V3Number::opLogOr(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     char outc = 0;
-    for (int bit = 0; bit < lhs.width(); bit++) {
+    for (int bit = 0; bit < lhs.width(); ++bit) {
         if (lhs.bitIs1(bit)) {
             outc = 1;
             goto last;
         }
         if (lhs.bitIsXZ(bit) && outc == 0) outc = 'x';
     }
-    for (int bit = 0; bit < rhs.width(); bit++) {
+    for (int bit = 0; bit < rhs.width(); ++bit) {
         if (rhs.bitIs1(bit)) {
             outc = 1;
             goto last;
@@ -1658,7 +1658,7 @@ V3Number& V3Number::opEq(const V3Number& lhs, const V3Number& rhs) {
     if (lhs.isString()) return opEqN(lhs, rhs);
     if (lhs.isDouble()) return opEqD(lhs, rhs);
     char outc = 1;
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (lhs.bitIs1(bit) && rhs.bitIs0(bit)) {
             outc = 0;
             goto last;
@@ -1680,7 +1680,7 @@ V3Number& V3Number::opNeq(const V3Number& lhs, const V3Number& rhs) {
     if (lhs.isString()) return opNeqN(lhs, rhs);
     if (lhs.isDouble()) return opNeqD(lhs, rhs);
     char outc = 0;
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (lhs.bitIs1(bit) && rhs.bitIs0(bit)) {
             outc = 1;
             goto last;
@@ -1721,7 +1721,7 @@ V3Number& V3Number::opCaseNeq(const V3Number& lhs, const V3Number& rhs) {
     } else if (lhs.isDouble()) {
         return opNeqD(lhs, rhs);
     }
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (lhs.bitIs(bit) != rhs.bitIs(bit)) {
             outc = 1;
             goto last;
@@ -1735,7 +1735,7 @@ V3Number& V3Number::opWildEq(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     char outc = 1;
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (!rhs.bitIsXZ(bit)) {
             if (lhs.bitIs(bit) != rhs.bitIs(bit)) {
                 outc = 0;
@@ -1752,7 +1752,7 @@ V3Number& V3Number::opWildNeq(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     char outc = 0;
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (!rhs.bitIsXZ(bit)) {
             if (lhs.bitIs(bit) != rhs.bitIs(bit)) {
                 outc = 1;
@@ -1770,7 +1770,7 @@ V3Number& V3Number::opGt(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     char outc = 0;
-    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); bit++) {
+    for (int bit = 0; bit < std::max(lhs.width(), rhs.width()); ++bit) {
         if (lhs.bitIs1(bit) && rhs.bitIs0(bit)) outc = 1;
         if (rhs.bitIs1(bit) && lhs.bitIs0(bit)) outc = 0;
         if (lhs.bitIsXZ(bit)) outc = 'x';
@@ -1796,7 +1796,7 @@ V3Number& V3Number::opGtS(const V3Number& lhs, const V3Number& rhs) {
             outc = 0;  // - !> +
         } else {
             // both positive or negative, normal >
-            for (int bit = 0; bit < std::max(lhs.width() - 1, rhs.width() - 1); bit++) {
+            for (int bit = 0; bit < std::max(lhs.width() - 1, rhs.width() - 1); ++bit) {
                 if (lhs.bitIs1Extend(bit) && rhs.bitIs0(bit)) outc = 1;
                 if (rhs.bitIs1Extend(bit) && lhs.bitIs0(bit)) outc = 0;
                 if (lhs.bitIsXZ(bit)) outc = 'x';
@@ -1834,12 +1834,12 @@ V3Number& V3Number::opShiftR(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (rhs.isFourState()) return setAllBitsX();
     setZero();
-    for (int bit = 32; bit < rhs.width(); bit++) {
+    for (int bit = 32; bit < rhs.width(); ++bit) {
         if (rhs.bitIs1(bit)) return *this;  // shift of over 2^32 must be zero
     }
     const uint32_t rhsval = rhs.toUInt();
     if (rhsval < static_cast<uint32_t>(lhs.width())) {
-        for (int bit = 0; bit < width(); bit++) setBit(bit, lhs.bitIs(bit + rhsval));
+        for (int bit = 0; bit < width(); ++bit) setBit(bit, lhs.bitIs(bit + rhsval));
     }
     return *this;
 }
@@ -1853,8 +1853,8 @@ V3Number& V3Number::opShiftRS(const V3Number& lhs, const V3Number& rhs, uint32_t
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (rhs.isFourState()) return setAllBitsX();
     setZero();
-    for (int bit = 32; bit < rhs.width(); bit++) {
-        for (int sbit = 0; sbit < width(); sbit++) {
+    for (int bit = 32; bit < rhs.width(); ++bit) {
+        for (int sbit = 0; sbit < width(); ++sbit) {
             setBit(sbit, lhs.bitIs(lbits - 1));  // 0/1/X/Z
         }
         if (rhs.bitIs1(lbits - 1)) setAllBits1();  // -1 else 0
@@ -1862,11 +1862,11 @@ V3Number& V3Number::opShiftRS(const V3Number& lhs, const V3Number& rhs, uint32_t
     }
     const uint32_t rhsval = rhs.toUInt();
     if (rhsval < static_cast<uint32_t>(lhs.width())) {
-        for (int bit = 0; bit < width(); bit++) {
+        for (int bit = 0; bit < width(); ++bit) {
             setBit(bit, lhs.bitIsExtend(bit + rhsval, lbits));
         }
     } else {
-        for (int bit = 0; bit < width(); bit++) {
+        for (int bit = 0; bit < width(); ++bit) {
             setBit(bit, lhs.bitIs(lbits - 1));  // 0/1/X/Z
         }
     }
@@ -1879,11 +1879,11 @@ V3Number& V3Number::opShiftL(const V3Number& lhs, const V3Number& rhs) {
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (rhs.isFourState()) return setAllBitsX();
     setZero();
-    for (int bit = 32; bit < rhs.width(); bit++) {
+    for (int bit = 32; bit < rhs.width(); ++bit) {
         if (rhs.bitIs1(bit)) return *this;  // shift of over 2^32 must be zero
     }
     const uint32_t rhsval = rhs.toUInt();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (bit >= static_cast<int>(rhsval)) setBit(bit, lhs.bitIs(bit - rhsval));
     }
     return *this;
@@ -1912,7 +1912,7 @@ V3Number& V3Number::opAdd(const V3Number& lhs, const V3Number& rhs) {
     setZero();
     // Addem
     uint64_t carry = 0;
-    for (int word = 0; word < words(); word++) {
+    for (int word = 0; word < words(); ++word) {
         const uint64_t lwordval = lhs.m_data.num()[word].m_value;
         const uint64_t rwordval = rhs.m_data.num()[word].m_value;
         const uint64_t sum = lwordval + rwordval + carry;
@@ -1942,14 +1942,14 @@ V3Number& V3Number::opMul(const V3Number& lhs, const V3Number& rhs) {
         setQuad(lhs.toUQuad() * rhs.toUQuad());
         opCleanThis();  // Mult produces extra bits in result
     } else {
-        for (int lword = 0; lword < lhs.words(); lword++) {
+        for (int lword = 0; lword < lhs.words(); ++lword) {
             const uint64_t lwordval = static_cast<uint64_t>(lhs.m_data.num()[lword].m_value);
             if (lwordval == 0) continue;
-            for (int rword = 0; rword < rhs.words(); rword++) {
+            for (int rword = 0; rword < rhs.words(); ++rword) {
                 const uint64_t rwordval = static_cast<uint64_t>(rhs.m_data.num()[rword].m_value);
                 if (rwordval == 0) continue;
                 uint64_t mul = lwordval * rwordval;
-                for (int qword = lword + rword; qword < words(); qword++) {
+                for (int qword = lword + rword; qword < words(); ++qword) {
                     mul += static_cast<uint64_t>(m_data.num()[qword].m_value);
                     m_data.num()[qword].m_value = (mul & 0xffffffffULL);
                     mul = (mul >> 32ULL) & 0xffffffffULL;
@@ -2093,8 +2093,8 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
     uint32_t vn[VL_MULS_MAX_WORDS + 1];  // v normalized
 
     // Zero for ease of debugging and to save having to zero for shifts
-    for (int i = 0; i < words; i++) m_data.num()[i].m_value = 0;
-    for (int i = 0; i < words + 1; i++) { un[i] = vn[i] = 0; }  // +1 as vn may get extra word
+    for (int i = 0; i < words; ++i) m_data.num()[i].m_value = 0;
+    for (int i = 0; i < words + 1; ++i) { un[i] = vn[i] = 0; }  // +1 as vn may get extra word
 
     // Algorithm requires divisor MSB to be set
     // Copy and shift to normalize divisor so MSB of vn[vw-1] is set
@@ -2139,7 +2139,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
 
         int64_t t = 0;  // Must be signed
         uint64_t k = 0;
-        for (int i = 0; i < vw; i++) {
+        for (int i = 0; i < vw; ++i) {
             const uint64_t p = qhat * vn[i];  // Multiply by estimate
             t = un[i + j] - k - (p & 0xFFFFFFFFULL);  // Subtract
             un[i + j] = t;
@@ -2153,7 +2153,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
             // Over subtracted; correct by adding back
             m_data.num()[j].m_value--;
             k = 0;
-            for (int i = 0; i < vw; i++) {
+            for (int i = 0; i < vw; ++i) {
                 t = static_cast<uint64_t>(un[i + j]) + static_cast<uint64_t>(vn[i]) + k;
                 un[i + j] = t;
                 k = t >> 32ULL;
@@ -2168,10 +2168,10 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
 
     if (is_modulus) {  // modulus
         // Need to reverse normalization on copy to output
-        for (int i = 0; i < vw; i++) {
+        for (int i = 0; i < vw; ++i) {
             m_data.num()[i].m_value = (un[i] >> s) | (shift_mask & (un[i + 1] << (32 - s)));
         }
-        for (int i = vw; i < words; i++) m_data.num()[i].m_value = 0;
+        for (int i = vw; i < words; ++i) m_data.num()[i].m_value = 0;
         opCleanThis();
         UINFO(9, "  opmoddiv-mod " << lhs << " " << rhs << " now=" << *this << endl);
         return *this;
@@ -2209,7 +2209,7 @@ V3Number& V3Number::opPow(const V3Number& lhs, const V3Number& rhs, bool lsign,
     m_data.num()[0].m_value = 1;
     V3Number power(&lhs, width());
     power.opAssign(lhs);
-    for (int bit = 0; bit < rhs.width(); bit++) {
+    for (int bit = 0; bit < rhs.width(); ++bit) {
         if (bit > 0) {  // power = power*power
             V3Number lastPower(&lhs, width());
             lastPower.opAssign(power);
@@ -2241,7 +2241,7 @@ V3Number& V3Number::opBufIf1(const V3Number& ens, const V3Number& if1s) {
     NUM_ASSERT_OP_ARGS2(ens, if1s);
     NUM_ASSERT_LOGIC_ARGS2(ens, if1s);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (ens.bitIs1(bit)) {
             setBit(bit, if1s.bitIs(bit));
         } else {
@@ -2273,7 +2273,7 @@ V3Number& V3Number::opAssignNonXZ(const V3Number& lhs, bool ignoreXZ) {
         } else if (lhs.isDouble()) {
             setDouble(lhs.toDouble());
         } else {
-            for (int bit = 0; bit < this->width(); bit++) {
+            for (int bit = 0; bit < this->width(); ++bit) {
                 setBit(bit, ignoreXZ ? lhs.bitIs1(bit) : lhs.bitIs(bit));
             }
         }
@@ -2302,7 +2302,7 @@ V3Number& V3Number::opExtendS(const V3Number& lhs, uint32_t lbits) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         const char extendWith = lhs.bitIsExtend(bit, lbits);
         setBit(bit, extendWith);
     }
@@ -2314,7 +2314,7 @@ V3Number& V3Number::opExtendXZ(const V3Number& lhs, uint32_t lbits) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
-    for (int bit = 0; bit < width(); bit++) setBit(bit, lhs.bitIsExtend(bit, lbits));
+    for (int bit = 0; bit < width(); ++bit) setBit(bit, lhs.bitIsExtend(bit, lbits));
     return *this;
 }
 
@@ -2347,7 +2347,7 @@ V3Number& V3Number::opSel(const V3Number& lhs, uint32_t msbval, uint32_t lsbval)
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     setZero();
     int ibit = lsbval;
-    for (int bit = 0; bit < width(); bit++) {
+    for (int bit = 0; bit < width(); ++bit) {
         if (ibit >= 0 && ibit < lhs.width() && ibit <= static_cast<int>(msbval)) {
             setBit(bit, lhs.bitIs(ibit));
         } else {
@@ -2368,13 +2368,13 @@ V3Number& V3Number::opSelInto(const V3Number& lhs, int lsbval, int width) {
     NUM_ASSERT_OP_ARGS1(lhs);
     NUM_ASSERT_LOGIC_ARGS1(lhs);
     int ibit = 0;
-    for (int bit = lsbval; bit < lsbval + width; bit++) {
+    for (int bit = lsbval; bit < lsbval + width; ++bit) {
         if (ibit >= 0 && ibit < lhs.width()) {
             setBit(bit, lhs.bitIs(ibit));
         } else {
             setBitX0(bit);
         }
-        ibit++;
+        ++ibit;
     }
     return *this;
 }
@@ -2544,7 +2544,7 @@ V3Number& V3Number::opReplN(const V3Number& lhs, uint32_t rhsval) {
     NUM_ASSERT_STRING_ARGS1(lhs);
     string out;
     out.reserve(lhs.toString().length() * rhsval);
-    for (unsigned times = 0; times < rhsval; times++) out += lhs.toString();
+    for (unsigned times = 0; times < rhsval; ++times) out += lhs.toString();
     return setString(out);
 }
 V3Number& V3Number::opToLowerN(const V3Number& lhs) {
diff --git a/src/V3Number.h b/src/V3Number.h
index d092e8f96..755fdc134 100644
--- a/src/V3Number.h
+++ b/src/V3Number.h
@@ -628,7 +628,7 @@ public:
     bool isFourState() const VL_MT_SAFE;
     bool hasZ() const {
         if (isString()) return false;
-        for (int i = 0; i < words(); i++) {
+        for (int i = 0; i < words(); ++i) {
             const ValueAndX v = m_data.num()[i];
             if ((~v.m_value) & v.m_valueX) return true;
         }
diff --git a/src/V3Stats.h b/src/V3Stats.h
index 5ca56cc29..6cf5eddb9 100644
--- a/src/V3Stats.h
+++ b/src/V3Stats.h
@@ -46,7 +46,7 @@ public:
     }
     VDouble0 operator++(int) {  // postfix
         VDouble0 old = *this;
-        m_d++;
+        ++m_d;
         return old;
     }
     VDouble0& operator=(const double v) {

From 5d0fd8b9a7e94906948c6d818c77a660e42b30d4 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 9 May 2025 21:22:17 -0400
Subject: [PATCH 048/211] Commentary

---
 src/V3Unknown.cpp | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index dd2683b76..5ad89aece 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -50,16 +50,18 @@ class UnknownVisitor final : public VNVisitor {
     const VNUser2InUse m_inuser2;
     static const std::string m_xrandPrefix;
 
-    // STATE
+    // STATE - across all visitors
+    VDouble0 m_statUnkVars;  // Statistic tracking
+    V3UniqueNames m_lvboundNames;  // For generating unique temporary variable names
+    std::unique_ptr<V3UniqueNames> m_xrandNames;  // For generating unique temporary variable names
+
+    // STATE - for current visit position (use VL_RESTORER)
     AstNodeModule* m_modp = nullptr;  // Current module
     AstAssignW* m_assignwp = nullptr;  // Current assignment
     AstAssignDly* m_assigndlyp = nullptr;  // Current assignment
     AstNode* m_timingControlp = nullptr;  // Current assignment's intra timing control
     bool m_constXCvt = false;  // Convert X's
     bool m_allowXUnique = true;  // Allow unique assignments
-    VDouble0 m_statUnkVars;  // Statistic tracking
-    V3UniqueNames m_lvboundNames;  // For generating unique temporary variable names
-    std::unique_ptr<V3UniqueNames> m_xrandNames;  // For generating unique temporary variable names
 
     // METHODS
 

From d22608a49fe1818170777f1ecf475ffc4d1d8224 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 9 May 2025 22:00:29 -0400
Subject: [PATCH 049/211] Internals: Refactor common V3JsonFile. No functional
 change.

---
 src/V3EmitMkJson.cpp | 206 ++++++++++---------------------------------
 src/V3File.h         | 131 +++++++++++++++++++++++----
 2 files changed, 163 insertions(+), 174 deletions(-)

diff --git a/src/V3EmitMkJson.cpp b/src/V3EmitMkJson.cpp
index 91b9dcf9b..d42c57ad3 100644
--- a/src/V3EmitMkJson.cpp
+++ b/src/V3EmitMkJson.cpp
@@ -30,111 +30,6 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 //  Emit statements
 
 class V3EmitMkJsonEmitter final {
-    class Printer final {
-        // MEMBERS
-    private:
-        const std::unique_ptr<std::ofstream>& m_of;
-        std::stack<char>
-            m_scope;  // Stack of ']' and '}' to be used to close currently open scopes
-        std::string m_prefix;  // Prefix emitted before each line in the current scope (indent *
-                               // scope depth)
-        std::string m_indent;  // Single indent
-        bool m_empty = true;  // Indicates that the current scope is empty
-
-        // METHODS
-    public:
-        explicit Printer(const std::unique_ptr<std::ofstream>& of,
-                         const std::string& indent = "    ")
-            : m_of(of)
-            , m_indent(indent) {
-            begin();
-        }
-
-        ~Printer() { end(); }
-
-        Printer& begin(const std::string& name, char type = '{') {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << "\"" << name << "\": " << type << "\n";
-            m_prefix += m_indent;
-            m_scope.push(type == '{' ? '}' : ']');
-            m_empty = true;
-            return *this;
-        }
-
-        Printer& put(const std::string& name, const std::string& value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << "\"" << name << "\": \"" << value << "\"";
-            m_empty = false;
-            return *this;
-        }
-
-        Printer& put(const std::string& name, bool value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << "\"" << name << "\": " << (value ? "true" : "false");
-            m_empty = false;
-            return *this;
-        }
-
-        Printer& put(const std::string& name, int value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << "\"" << name << "\": " << value;
-            m_empty = false;
-            return *this;
-        }
-
-        Printer& begin(char type = '{') {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << type << "\n";
-            m_prefix += m_indent;
-            m_scope.push(type == '{' ? '}' : ']');
-            m_empty = true;
-            return *this;
-        }
-
-        Printer& put(const std::string& value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << "\"" << value << "\"";
-            m_empty = false;
-            return *this;
-        }
-
-        Printer& put(bool value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << (value ? "true" : "false");
-            m_empty = false;
-            return *this;
-        }
-
-        Printer& put(int value) {
-            if (!m_empty) *m_of << ",\n";
-            *m_of << m_prefix << value;
-            m_empty = false;
-            return *this;
-        }
-
-        template <typename T>
-        Printer& putList(const std::string& name, const T& list) {
-            if (list.empty()) return *this;
-            begin(name, '[');
-            for (auto it = list.begin(); it != list.end(); ++it) put(*it);
-            return end();
-        }
-
-        Printer& end() {
-            assert(m_prefix.length() >= m_indent.length());
-            m_prefix.erase(m_prefix.end() - m_indent.length(), m_prefix.end());
-            assert(!m_scope.empty());
-            *m_of << "\n" << m_prefix << m_scope.top();
-            m_scope.pop();
-            return *this;
-        }
-
-        Printer& operator+=(Printer& cursor) {
-            // Meaningless syntax sugar, at least for now
-            return *this;
-        }
-    };
-
     // METHODS
 
     // STATIC FUNCTIONS
@@ -142,8 +37,7 @@ class V3EmitMkJsonEmitter final {
         const std::string makeDir
             = V3Os::filenameSlashPath(V3Os::filenameRealPath(v3Global.opt.makeDir()));
 
-        const std::unique_ptr<std::ofstream> of{
-            V3File::new_ofstream(makeDir + "/" + v3Global.opt.prefix() + ".json")};
+        V3OutJsonFile of{makeDir + "/" + v3Global.opt.prefix() + ".json"};
 
         std::vector<string> classesFast;
         std::vector<string> classesSlow;
@@ -188,41 +82,40 @@ class V3EmitMkJsonEmitter final {
         for (const auto& cppFile : v3Global.opt.cppFiles())
             cppFiles.emplace_back(V3Os::filenameSlashPath(V3Os::filenameRealPath(cppFile)));
 
-        Printer manifest(of);
-        Printer& cursor = manifest.put("version", 1)
-                              .begin("system")
-                              .put("perl", V3Options::getenvPERL())
-                              .put("python3", V3Options::getenvPYTHON3())
-                              .put("verilator_root", verilatorRoot)
-                              .put("verilator_solver", V3Options::getenvVERILATOR_SOLVER())
-                              .end()
-                              .begin("options")
-                              .putList("cflags", v3Global.opt.cFlags())
-                              .putList("ldflags", v3Global.opt.ldLibs())
-                              .put("system_c", v3Global.opt.systemC())
-                              .put("coverage", v3Global.opt.coverage())
-                              .put("use_timing", v3Global.usesTiming())
-                              .put("threads", v3Global.opt.threads())
-                              .put("trace", v3Global.opt.trace())
-                              .put("trace_fst", v3Global.opt.traceEnabledFst())
-                              .put("trace_saif", v3Global.opt.traceEnabledSaif())
-                              .put("trace_vcd", v3Global.opt.traceEnabledVcd())
-                              .end()
-                              .begin("sources")
-                              .putList("global", global)
-                              .putList("classes_slow", classesSlow)
-                              .putList("classes_fast", classesFast)
-                              .putList("support_slow", supportSlow)
-                              .putList("support_fast", supportFast)
-                              .putList("deps", deps)
-                              .putList("user_classes", cppFiles)
-                              .end();
+        of.put("version", 1)
+            .begin("system")
+            .put("perl", V3Options::getenvPERL())
+            .put("python3", V3Options::getenvPYTHON3())
+            .put("verilator_root", verilatorRoot)
+            .put("verilator_solver", V3Options::getenvVERILATOR_SOLVER())
+            .end()
+            .begin("options")
+            .putList("cflags", v3Global.opt.cFlags())
+            .putList("ldflags", v3Global.opt.ldLibs())
+            .put("system_c", v3Global.opt.systemC())
+            .put("coverage", v3Global.opt.coverage())
+            .put("use_timing", v3Global.usesTiming())
+            .put("threads", v3Global.opt.threads())
+            .put("trace", v3Global.opt.trace())
+            .put("trace_fst", v3Global.opt.traceEnabledFst())
+            .put("trace_saif", v3Global.opt.traceEnabledSaif())
+            .put("trace_vcd", v3Global.opt.traceEnabledVcd())
+            .end()
+            .begin("sources")
+            .putList("global", global)
+            .putList("classes_slow", classesSlow)
+            .putList("classes_fast", classesFast)
+            .putList("support_slow", supportSlow)
+            .putList("support_fast", supportFast)
+            .putList("deps", deps)
+            .putList("user_classes", cppFiles)
+            .end();
 
         if (const V3HierBlockPlan* const planp = v3Global.hierPlanp()) {
             // Sorted hierarchical blocks in order of leaf-first.
             const V3HierBlockPlan::HierVector& hierBlocks = planp->hierBlocksSorted();
 
-            cursor += cursor.begin("submodules", '[');
+            of.begin("submodules", '[');
 
             for (V3HierBlockPlan::HierVector::const_iterator it = hierBlocks.begin();
                  it != hierBlocks.end(); ++it) {
@@ -247,17 +140,16 @@ class V3EmitMkJsonEmitter final {
                 std::vector<std::string> cflags;
                 cflags.emplace_back("-fPIC");
 
-                cursor += cursor.begin()
-                              .put("prefix", hblockp->hierPrefix())
-                              .put("top", hblockp->modp()->name())
-                              .putList("deps", childDeps)
-                              .put("directory", makeDir + "/" + hblockp->hierPrefix())
-                              .putList("sources", sources)
-                              .putList("cflags", cflags)
-                              .put("verilator_args",
-                                   V3Os::filenameSlashPath(
-                                       V3Os::filenameRealPath(hblockp->commandArgsFilename(true))))
-                              .end();
+                of.begin()
+                    .put("prefix", hblockp->hierPrefix())
+                    .put("top", hblockp->modp()->name())
+                    .putList("deps", childDeps)
+                    .put("directory", makeDir + "/" + hblockp->hierPrefix())
+                    .putList("sources", sources)
+                    .putList("cflags", cflags)
+                    .put("verilator_args", V3Os::filenameSlashPath(V3Os::filenameRealPath(
+                                               hblockp->commandArgsFilename(true))))
+                    .end();
             }
 
             std::vector<std::string> sources;
@@ -268,15 +160,15 @@ class V3EmitMkJsonEmitter final {
             for (const string& i : vFiles)
                 sources.emplace_back(V3Os::filenameSlashPath(V3Os::filenameRealPath(i)));
 
-            cursor += cursor.begin()
-                          .put("prefix", v3Global.opt.prefix())
-                          .put("top", v3Global.rootp()->topModulep()->name())
-                          .put("directory", makeDir)
-                          .putList("sources", sources)
-                          .put("verilator_args", V3Os::filenameSlashPath(V3Os::filenameRealPath(
-                                                     planp->topCommandArgsFilename(true))))
-                          .end()
-                          .end();
+            of.begin()
+                .put("prefix", v3Global.opt.prefix())
+                .put("top", v3Global.rootp()->topModulep()->name())
+                .put("directory", makeDir)
+                .putList("sources", sources)
+                .put("verilator_args", V3Os::filenameSlashPath(V3Os::filenameRealPath(
+                                           planp->topCommandArgsFilename(true))))
+                .end()
+                .end();
         }
     }
 
diff --git a/src/V3File.h b/src/V3File.h
index b76dad9b1..3a28ef92e 100644
--- a/src/V3File.h
+++ b/src/V3File.h
@@ -109,12 +109,7 @@ class V3OutFormatter VL_NOT_FINAL {
     static constexpr int MAXSPACE = 80;  // After this indent, stop indenting more
 public:
     enum AlignClass : uint8_t { AL_AUTO = 0, AL_STATIC = 1 };
-    enum Language : uint8_t {
-        LA_C = 0,
-        LA_VERILOG = 1,
-        LA_MK = 2,
-        LA_XML = 3,
-    };
+    enum Language : uint8_t { LA_C, LA_JSON, LA_MK, LA_VERILOG, LA_XML };
 
 private:
     // MEMBERS
@@ -286,6 +281,119 @@ public:
     }
 };
 
+class V3OutJsonFile final : public V3OutFile {
+    // CONSTANTS
+    static constexpr const char* INDENT = "    ";  // Single indent (4, per JSON std)
+
+    // MEMBERS
+private:
+    std::stack<char> m_scope;  // Stack of ']' and '}'  to close currently open scopes
+    std::string m_prefix;  // Prefix emitted before each line in current scope
+    bool m_empty = true;  // Current scope is empty, no comma later
+
+public:
+    explicit V3OutJsonFile(const string& filename)
+        : V3OutFile{filename, V3OutFormatter::LA_JSON} {
+        begin();
+    }
+    ~V3OutJsonFile() override { end(); }
+    virtual void putsHeader() {}
+    void puts(const char* strg) { putsNoTracking(strg); }
+    void puts(const string& strg) { putsNoTracking(strg); }
+
+    // METHODS
+    V3OutJsonFile& begin(const std::string& name, char type = '{') {
+        comma();
+        puts(m_prefix + "\"" + name + "\": " + type + "\n");
+        m_prefix += INDENT;
+        m_scope.push(type == '{' ? '}' : ']');
+        return *this;
+    }
+    V3OutJsonFile& begin(char type = '{') {
+        comma();
+        puts(m_prefix + type + "\n");
+        m_prefix += INDENT;
+        m_scope.push(type == '{' ? '}' : ']');
+        return *this;
+    }
+
+    V3OutJsonFile& put(const std::string& name, const std::string& value) {
+        comma();
+        puts(m_prefix + "\"" + name + "\": \"" + value + "\"");
+        m_empty = false;
+        return *this;
+    }
+    V3OutJsonFile& put(const std::string& name, bool value) {
+        comma();
+        puts(m_prefix + "\"" + name + "\": " + (value ? "true" : "false"));
+        m_empty = false;
+        return *this;
+    }
+    V3OutJsonFile& put(const std::string& name, int value) {
+        comma();
+        puts(m_prefix + "\"" + name + "\": " + std::to_string(value));
+        m_empty = false;
+        return *this;
+    }
+    V3OutJsonFile& put(const std::string& value) {
+        comma();
+        puts(m_prefix + "\"" + value + "\"");
+        m_empty = false;
+        return *this;
+    }
+    V3OutJsonFile& put(bool value) {
+        comma();
+        puts(m_prefix + (value ? "true" : "false"));
+        m_empty = false;
+        return *this;
+    }
+    V3OutJsonFile& put(int value) {
+        comma();
+        puts(m_prefix + std::to_string(value));
+        m_empty = false;
+        return *this;
+    }
+
+    template <typename T>
+    V3OutJsonFile& putList(const std::string& name, const T& list) {
+        if (list.empty()) return *this;
+        begin(name, '[');
+        for (auto it = list.begin(); it != list.end(); ++it) put(*it);
+        return end();
+    }
+
+    V3OutJsonFile& end() {
+        assert(m_prefix.length() >= strlen(INDENT));
+        m_prefix.erase(m_prefix.end() - strlen(INDENT), m_prefix.end());
+        assert(!m_scope.empty());
+        puts("\n" + m_prefix + m_scope.top());
+        m_scope.pop();
+        return *this;
+    }
+
+    V3OutJsonFile& operator+=(V3OutJsonFile& cursor) {
+        // Meaningless syntax sugar, at least for now
+        return *this;
+    }
+
+private:
+    void comma() {
+        if (!m_empty) puts(",\n");
+        m_empty = true;
+    }
+};
+
+class V3OutMkFile final : public V3OutFile {
+public:
+    explicit V3OutMkFile(const string& filename)
+        : V3OutFile{filename, V3OutFormatter::LA_MK} {}
+    ~V3OutMkFile() override = default;
+    virtual void putsHeader() { puts("# Verilated -*- Makefile -*-\n"); }
+    // No automatic indentation yet.
+    void puts(const char* strg) { putsNoTracking(strg); }
+    void puts(const string& strg) { putsNoTracking(strg); }
+};
+
 class V3OutScFile final : public V3OutCFile {
 public:
     explicit V3OutScFile(const string& filename)
@@ -317,17 +425,6 @@ public:
     virtual void putsHeader() { puts("<?xml version=\"1.0\" ?>\n"); }
 };
 
-class V3OutMkFile final : public V3OutFile {
-public:
-    explicit V3OutMkFile(const string& filename)
-        : V3OutFile{filename, V3OutFormatter::LA_MK} {}
-    ~V3OutMkFile() override = default;
-    virtual void putsHeader() { puts("# Verilated -*- Makefile -*-\n"); }
-    // No automatic indentation yet.
-    void puts(const char* strg) { putsNoTracking(strg); }
-    void puts(const string& strg) { putsNoTracking(strg); }
-};
-
 //============================================================================
 // VIdProtect: Hash identifier names in output files to protect them
 

From 100e3d7702b8dcf545fb8c3cf9a040761390b8d2 Mon Sep 17 00:00:00 2001
From: Yutetsu TAKATSUKASA <y.takatsukasa@gmail.com>
Date: Sat, 10 May 2025 19:01:15 +0900
Subject: [PATCH 050/211] Fix const-bit-op-tree with single-bit masks (#5993)
 (#5998)

---
 src/V3Const.cpp                   |  2 ++
 test_regress/t/t_opt_const.v      | 28 ++++++++++++++++++++++++++++
 test_regress/t/t_opt_const_dfg.py |  2 +-
 3 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 04ea33435..3ce2f1087 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -125,6 +125,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
         void updateBitRange(const AstShiftR* shiftp) {
             m_lsb += VN_AS(shiftp->rhsp(), Const)->toUInt();
         }
+        void limitBitRangeToLsb() { m_msb = std::min(m_msb, m_lsb); }
         int wordIdx() const { return m_wordIdx; }
         void wordIdx(int i) { m_wordIdx = i; }
         bool polarity() const { return m_polarity; }
@@ -538,6 +539,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
             Restorer restorer{*this};
             incrOps(nodep, __LINE__);
             iterateConst(nodep->rhsp());
+            if (m_leafp) m_leafp->limitBitRangeToLsb();
             CONST_BITOP_RETURN_IF(m_failed, nodep->rhsp());
             restorer.disableRestore();  // Now all checks passed
         } else if (nodep->type() == m_rootp->type()) {  // And, Or, Xor
diff --git a/test_regress/t/t_opt_const.v b/test_regress/t/t_opt_const.v
index 5abf755f1..970774fe3 100644
--- a/test_regress/t/t_opt_const.v
+++ b/test_regress/t/t_opt_const.v
@@ -153,6 +153,7 @@ module Test(/*AUTOARG*/
    bug4857 i_bug4857(.clk(clk), .in(d), .out(bug4857_out));
    bug4864 i_bug4864(.clk(clk), .in(d), .out(bug4864_out));
    bug5186 i_bug5186(.clk(clk), .in(d), .out(bug5186_out));
+   bug5993 i_bug5993(.clk(clk), .in(d[10]));
 
 endmodule
 
@@ -566,3 +567,30 @@ module bug5186(input wire clk, input wire [31:0] in, output out);
       result <= bad;
    assign out = result;
 endmodule
+
+
+// See issue #5993
+// "in4[18]" is just one bit width, so " >> 8'd1" shifts out the bit.
+// BitOpTree ignored implicit "& 1". It caused the bug"
+module bug5993(input wire clk, input wire in);
+
+   reg in3;
+   reg [23:16] in4;
+
+   task automatic checkd(logic gotv, logic expv);
+      if ((gotv) !== (expv)) begin
+         $write("%%Error:  got=%0d exp=%0d\n", gotv, expv);
+         $stop;
+      end
+   endtask
+
+   // verilator lint_off WIDTH
+   wire wire_2 = in3 ? {4{14'b010111101}} : (in4[18] >> 8'b1);
+   // verilator lint_on WIDTH
+
+   always @(posedge clk) begin
+      in3 <= '0;
+      in4 <= in ?  8'b00111__0__10 : 8'b00111__1__10;
+      checkd(wire_2, 1'b0);
+   end
+endmodule
diff --git a/test_regress/t/t_opt_const_dfg.py b/test_regress/t/t_opt_const_dfg.py
index ffdca2c4f..6fd2ea9bc 100755
--- a/test_regress/t/t_opt_const_dfg.py
+++ b/test_regress/t/t_opt_const_dfg.py
@@ -18,7 +18,7 @@ test.compile(verilator_flags2=["-Wno-UNOPTTHREADS", "--stats", test.pli_filename
 test.execute()
 
 if test.vlt:
-    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 39)
+    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 43)
     test.file_grep(test.stats, r'SplitVar, packed variables split automatically\s+(\d+)', 1)
 
 test.passes()

From d0424862f9534bff0046f9227d10ba209d615dfe Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 10 May 2025 13:22:26 -0400
Subject: [PATCH 051/211] Commentary: Changes update

---
 Changes                      |  5 +++++
 Makefile.in                  |  5 +++++
 docs/guide/exe_verilator.rst | 13 ++++++++-----
 nodist/log_changes           |  2 +-
 4 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/Changes b/Changes
index 6404647b4..ccf94390d 100644
--- a/Changes
+++ b/Changes
@@ -13,14 +13,19 @@ Verilator 5.037 devel
 
 **Other:**
 
+* Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
+* Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972) (#5983).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
 * Fix streaming to/from packed arrays (#5976). [Geza Lore]
+* Fix inconsistent assignment error with split-var (#5984) (#5988). [Yutetsu TAKATSUKASA]
+* Fix AstAssignW conversion (#5991) (#5992). [Ryszard Rozak, Antmicro Ltd.]
+* Fix const-bit-op-tree with single-bit masks (#5993) (#5998). [Yutetsu TAKATSUKASA]
 
 
 Verilator 5.036 2025-04-27
diff --git a/Makefile.in b/Makefile.in
index 5db547897..88a239a6f 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -224,6 +224,11 @@ TAGS: $(TAGFILES)
 doxygen:
 	$(MAKE) -C docs doxygen
 
+.PHONY: spelling
+spelling:
+	$(MAKE) -C docs spelling
+
+
 ######################################################################
 # Install
 
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index fad7ec37e..ef956e3fd 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -607,6 +607,10 @@ Summary:
 
 .. option:: -fno-gate
 
+   Rarely needed. Do not apply the gate-level wire optimizations. Using
+   this is not recommended as may cause additional warnings and ordering
+   issues.
+
 .. option:: -fno-inline
 
 .. option:: -fno-inline-funcs
@@ -1273,8 +1277,8 @@ Summary:
 
 .. option:: --public
 
-   This is only for historical debugging use and using it may result in
-   mis-simulation of generated clocks.
+   Rarely needed. This is only for historical debugging use and using it
+   may result in mis-simulation of generated clocks.
 
    Declares all signals and modules public.  This will turn off signal
    optimizations as if all signals had a :option:`/*verilator&32;public*/`
@@ -1564,7 +1568,6 @@ Summary:
    This is not needed with standard designs with only one top.  See also
    :option:`MULTITOP` warning.
 
-
 .. option:: --trace
 
    Deprecated; use :vlopt:`--trace-fst`, :vlopt:`--trace-saif` or
@@ -1720,8 +1723,8 @@ Summary:
 
 .. option:: --valgrind
 
-   Run Verilator under `Valgrind <https://valgrind.org/>`_.  The command may be
-   changed with :option:`VERILATOR_VALGRIND`.
+   Rarely needed. Run Verilator under `Valgrind <https://valgrind.org/>`_.
+   The command may be changed with :option:`VERILATOR_VALGRIND`.
 
 .. option:: --no-verilate
 
diff --git a/nodist/log_changes b/nodist/log_changes
index 220bcfe8b..77874edc7 100755
--- a/nodist/log_changes
+++ b/nodist/log_changes
@@ -90,7 +90,7 @@ def process():
 
     print()
     print("You may now want to clean up spelling, and commit:")
-    print("  (cd docs ; make spelling | grep -vi 'writing output')")
+    print("  (make spelling | grep -vi 'writing output')")
     print("  git ci -am 'Commentary: Changes update'")
     print()
 

From d9dcde60a6581ab80b1d55bbb43a0b4214f5a5c3 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 10 May 2025 13:29:30 -0400
Subject: [PATCH 052/211] Fix duplicate error first-lines, and some internal
 V3Error cleanups

---
 src/V3Error.cpp                         | 36 +++++++-----
 src/V3Error.h                           |  7 ++-
 src/V3LinkLevel.cpp                     |  6 +-
 test_regress/t/t_generate_fatal_bad.out | 77 -------------------------
 test_regress/t/t_pp_line_bad.out        |  6 --
 5 files changed, 29 insertions(+), 103 deletions(-)

diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 2d0d30688..1acd8e601 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -49,6 +49,14 @@ V3ErrorCode::V3ErrorCode(const char* msgp) {
     m_e = V3ErrorCode::EC_ERROR;
 }
 
+string V3ErrorCode::url() const {
+    if (m_e < V3ErrorCode::EC_FIRST_NAMED) {
+        return "https://verilator.org/verilator_doc.html"s + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
+    } else {
+        return "https://verilator.org/warn/"s + ascii() + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
+    }
+}
+
 //######################################################################
 // V3ErrorGuarded class functions
 //
@@ -128,14 +136,18 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
         && (!debug() || debug() < 3 || m_errorCode.defaultsOff()))
         return;
     string msg = msgPrefix() + sstr.str();
+
     // If suppressed print only first line to reduce verbosity
-    if (m_errorSuppressed) {
-        string::size_type pos;
-        if ((pos = msg.find('\n')) != string::npos) {
-            msg.erase(pos, msg.length() - pos);
-            msg += "...";
-        }
+    string firstLine = msg;
+    string::size_type pos;
+    if ((pos = firstLine.find('\n')) != string::npos) {
+        firstLine.erase(pos, firstLine.length() - pos);
+        firstLine += "...";
     }
+    if (m_errorSuppressed) msg = firstLine;
+    // Suppress duplicate messages
+    if (!m_messages.insert(firstLine).second) return;
+
     string msg_additional;
     {
         string::size_type pos;
@@ -152,8 +164,6 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
         while ((pos = msg_additional.find("\n\n")) != string::npos)
             msg_additional.erase(pos + 1, 1);
     }
-    // Suppress duplicate messages
-    if (!m_messages.insert(msg).second) return;
     if (!extra.empty() && !m_errorSuppressed) {
         const string extraMsg = warnMore() + extra + "\n";
         const size_t pos = msg.find('\n');
@@ -175,13 +185,9 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
         if (m_errorCode != V3ErrorCode::EC_FATALMANY  // Not verbose on final too-many-errors error
             && !m_describedEachWarn[m_errorCode]) {
             m_describedEachWarn[m_errorCode] = true;
-            const string docUrl = "https://verilator.org/verilator_doc.html"s
-                                  + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
-            const string warnUrl = "https://verilator.org/warn/"s + m_errorCode.ascii()
-                                   + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
             if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED) {
                 std::cerr << warnMore() << "... For " << (anError ? "error" : "warning")
-                          << " description see " << warnUrl << endl;
+                          << " description see " << m_errorCode.url() << endl;
             } else if (m_errCount >= 1
                        && (m_errorCode == V3ErrorCode::EC_FATAL
                            || m_errorCode == V3ErrorCode::EC_FATALMANY
@@ -194,7 +200,7 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
                           << endl;
             } else if (!m_tellManual) {
                 m_tellManual = true;
-                std::cerr << warnMore() << "... See the manual at " << docUrl
+                std::cerr << warnMore() << "... See the manual at " << m_errorCode.url()
                           << " for more assistance." << endl;
             }
             if (!m_pretendError[m_errorCode] && !m_errorCode.hardError()) {
@@ -202,7 +208,7 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
                           << m_errorCode.ascii()
                           << " */\" and lint_on around source to disable this message." << endl;
                 if (m_errorCode.dangerous()) {
-                    std::cerr << warnMore() << "*** See " << warnUrl
+                    std::cerr << warnMore() << "*** See " << m_errorCode.url()
                               << " before disabling this,\n";
                     std::cerr << warnMore() << "else you may end up with different sim results."
                               << endl;
diff --git a/src/V3Error.h b/src/V3Error.h
index 591128e8e..fdae76e3a 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -34,6 +34,9 @@
 #include <set>
 #include <sstream>
 
+class V3Error;
+class FileLine;
+
 //######################################################################
 
 class V3ErrorCode final {
@@ -289,7 +292,7 @@ public:
         }
         return false;
     }
-
+    string url() const;
     static bool unusedMsg(const char* msgp) { return 0 == VL_STRCASECMP(msgp, "UNUSED"); }
 };
 constexpr bool operator==(const V3ErrorCode& lhs, const V3ErrorCode& rhs) {
@@ -302,7 +305,6 @@ inline std::ostream& operator<<(std::ostream& os, const V3ErrorCode& rhs) {
 }
 
 // ######################################################################
-class V3Error;
 
 class V3ErrorGuarded final {
     // Should only be used by V3ErrorGuarded::m_mutex is already locked
@@ -409,6 +411,7 @@ public:
 };
 
 // ######################################################################
+
 class V3Error final {
     // Base class for any object that wants debugging and error reporting
     // CONSTRUCTORS
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index e90eda0a0..fce12adaf 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -53,11 +53,11 @@ void V3LinkLevel::modSortByLevel() {
     if (tops.size() >= 2) {
         const AstNode* const secp = tops[1];  // Complain about second one, as first often intended
         if (!secp->fileline()->warnIsOff(V3ErrorCode::MULTITOP)) {
-            auto warnTopModules = [](const std::string& warnMore, ModVec tops)
+            auto warnTopModules = [](const AstNode* const secp, ModVec tops)
                                       VL_REQUIRES(V3Error::s().m_mutex) -> std::string {
                 std::stringstream ss;
                 for (AstNode* alsop : tops) {
-                    ss << warnMore << "... Top module " << alsop->prettyNameQ() << endl
+                    ss << secp->warnMore() << "... Top module " << alsop->prettyNameQ() << endl
                        << alsop->warnContextSecondary();
                 }
                 return ss.str();
@@ -69,7 +69,7 @@ void V3LinkLevel::modSortByLevel() {
                                           "--top-module to select top."
                                        << V3Error::s().warnContextNone()
                                        << V3Error::warnAdditionalInfo()
-                                       << warnTopModules(secp->warnMore(), tops));
+                                       << warnTopModules(secp, tops));
         }
     }
 
diff --git a/test_regress/t/t_generate_fatal_bad.out b/test_regress/t/t_generate_fatal_bad.out
index d657d50bb..aa62b75d5 100644
--- a/test_regress/t/t_generate_fatal_bad.out
+++ b/test_regress/t/t_generate_fatal_bad.out
@@ -9,81 +9,4 @@
    13 |    localparam integer BAZ = get_baz(BAR);
       |                             ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.genloop[1].foo_inst'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = ?32?h1
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.gen_l1[2].gen_l2[0].foo_inst2'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h2
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.gen_l1[2].gen_l2[1].foo_inst2'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h4
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.gen_l1[3].gen_l2[0].foo_inst2'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h3
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.gen_l1[3].gen_l2[1].foo_inst2'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h5
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.cond_true.foo_inst3'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = ?32?h6
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.genblk4.foo_inst4'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = ?32?h7
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.nested_loop[8].foo2_inst.foo2_loop[0].foo_in_foo2_inst'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h8
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.nested_loop[8].foo2_inst.foo2_loop[1].foo_in_foo2_inst'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'h9
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.nested_loop[10].foo2_inst.foo2_loop[0].foo_in_foo2_inst'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'ha
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
-%Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz'
-                                      : ... note: In instance 't.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst'
-        t/t_generate_fatal_bad.v:9:4: ... Location of non-constant STOP: $stop executed during function constification; maybe indicates assertion firing
-        t/t_generate_fatal_bad.v:13:29: ... Called from 'get_baz()' with parameters:
-           bar = 32'hb
-   13 |    localparam integer BAZ = get_baz(BAR);
-      |                             ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_line_bad.out b/test_regress/t/t_pp_line_bad.out
index d2f6c2291..adce0e39f 100644
--- a/test_regress/t/t_pp_line_bad.out
+++ b/test_regress/t/t_pp_line_bad.out
@@ -2,27 +2,21 @@
     8 | `line 100
       | ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_pp_line_bad.v:8:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:9:1: `line was not properly formed with '`line number "filename" level'
     9 | `line 200 somefile
       | ^
-%Error: t/t_pp_line_bad.v:9:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:10:1: `line was not properly formed with '`line number "filename" level'
    10 | `line 300 "somefile 1
       | ^
-%Error: t/t_pp_line_bad.v:10:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:11:1: `line was not properly formed with '`line number "filename" level'
    11 | `line 400 "some file"
       | ^
-%Error: t/t_pp_line_bad.v:11:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:12:1: `line was not properly formed with '`line number "filename" level'
    12 | `line 500 "somefile" 3
       | ^
-%Error: t/t_pp_line_bad.v:12:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:13:1: `line was not properly formed with '`line number "filename" level'
    13 | `line 600 "some file" 3
       | ^
-%Error: t/t_pp_line_bad.v:13:1: `line was not properly formed with '`line number "filename" level'
 %Error: t/t_pp_line_bad.v:7:1: Define or directive not defined: '`line'
     7 | `line
       | ^~~~~

From 0f528d136d0e9ba10867154e1ed49eb3cf7eed25 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 10 May 2025 13:59:56 -0400
Subject: [PATCH 053/211] Fix arithmetic right-shift by constants over 32 bits
 (#5994).

---
 Changes                           |  1 +
 src/V3Number.cpp                  | 24 +++++++++---------------
 test_regress/t/t_math_shiftrs2.py | 18 ++++++++++++++++++
 test_regress/t/t_math_shiftrs2.v  | 22 ++++++++++++++++++++++
 4 files changed, 50 insertions(+), 15 deletions(-)
 create mode 100755 test_regress/t/t_math_shiftrs2.py
 create mode 100644 test_regress/t/t_math_shiftrs2.v

diff --git a/Changes b/Changes
index ccf94390d..068b67749 100644
--- a/Changes
+++ b/Changes
@@ -26,6 +26,7 @@ Verilator 5.037 devel
 * Fix inconsistent assignment error with split-var (#5984) (#5988). [Yutetsu TAKATSUKASA]
 * Fix AstAssignW conversion (#5991) (#5992). [Ryszard Rozak, Antmicro Ltd.]
 * Fix const-bit-op-tree with single-bit masks (#5993) (#5998). [Yutetsu TAKATSUKASA]
+* Fix arithmetic right-shift by constants over 32 bits (#5994).
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index f0280076c..13a1984fb 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -1853,23 +1853,17 @@ V3Number& V3Number::opShiftRS(const V3Number& lhs, const V3Number& rhs, uint32_t
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (rhs.isFourState()) return setAllBitsX();
     setZero();
-    for (int bit = 32; bit < rhs.width(); ++bit) {
-        for (int sbit = 0; sbit < width(); ++sbit) {
-            setBit(sbit, lhs.bitIs(lbits - 1));  // 0/1/X/Z
-        }
-        if (rhs.bitIs1(lbits - 1)) setAllBits1();  // -1 else 0
-        return *this;  // shift of over 2^32 must be -1/0
-    }
-    const uint32_t rhsval = rhs.toUInt();
-    if (rhsval < static_cast<uint32_t>(lhs.width())) {
-        for (int bit = 0; bit < width(); ++bit) {
-            setBit(bit, lhs.bitIsExtend(bit + rhsval, lbits));
-        }
-    } else {
-        for (int bit = 0; bit < width(); ++bit) {
-            setBit(bit, lhs.bitIs(lbits - 1));  // 0/1/X/Z
+    const bool overflow = rhs.width() > 32 && !rhs.isBitsZero(rhs.width() - 1, 32);
+    if (!overflow) {
+        const uint32_t rhsval = rhs.toUInt();
+        if (rhsval < static_cast<uint32_t>(lhs.width())) {
+            for (int bit = 0; bit < width(); ++bit) {
+                setBit(bit, lhs.bitIsExtend(bit + rhsval, lbits));
+            }
+            return *this;
         }
     }
+    for (int bit = 0; bit < width(); ++bit) setBit(bit, lhs.bitIs(lbits - 1));  // '0/'1/'x/'z
     return *this;
 }
 
diff --git a/test_regress/t/t_math_shiftrs2.py b/test_regress/t/t_math_shiftrs2.py
new file mode 100755
index 000000000..bd059b0f2
--- /dev/null
+++ b/test_regress/t/t_math_shiftrs2.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_math_shiftrs2.v b/test_regress/t/t_math_shiftrs2.v
new file mode 100644
index 000000000..541902b6b
--- /dev/null
+++ b/test_regress/t/t_math_shiftrs2.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkd(gotv, expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__, `__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module top(out35);
+   output wire [2:0] out35;
+   wire signed [2:0] wire_4;
+   assign wire_4 = 3'b011;
+   assign out35 = (wire_4 >>> 36'hffff_ffff_f);
+
+   initial begin
+      #10;
+      `checkd(out35, '0);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 680236b03ee23d037834f00a78f9e52e52724f9a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 10 May 2025 16:20:12 -0400
Subject: [PATCH 054/211] Internals: Redo post-error additional information to
 be part of error calls.

---
 src/V3Error.cpp                               |  8 +-
 src/V3Error.h                                 | 23 ++----
 src/V3FileLine.cpp                            |  4 -
 src/V3FileLine.h                              |  2 -
 src/V3Graph.cpp                               | 13 +--
 src/V3Graph.h                                 |  6 +-
 src/V3GraphAcyc.cpp                           |  7 +-
 src/V3GraphAlg.cpp                            | 17 ++--
 src/V3LinkCells.cpp                           |  4 +-
 src/V3LinkDot.cpp                             | 30 ++++---
 src/V3Options.cpp                             | 27 ++++---
 src/V3Options.h                               |  2 +-
 src/V3SchedAcyclic.cpp                        | 81 +++++++++++--------
 src/V3SymTable.h                              |  6 +-
 src/V3Width.cpp                               |  9 ++-
 test_regress/t/t_gen_nonconst_bad.out         |  4 +-
 test_regress/t/t_interface_mismodport_bad.out |  2 +-
 17 files changed, 128 insertions(+), 117 deletions(-)

diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 1acd8e601..dcb00df3d 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -122,6 +122,13 @@ void V3ErrorGuarded::suppressThisWarning() VL_REQUIRES(m_mutex) {
     errorSuppressed(true);
 }
 
+void V3ErrorGuarded::v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex) {
+    m_errorStr.str("");
+    m_errorCode = code;
+    m_errorContexted = false;
+    m_errorSuppressed = false;
+}
+
 // cppcheck-has-bug-suppress constParameter
 void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
     VL_REQUIRES(m_mutex) {
@@ -303,7 +310,6 @@ std::ostringstream& V3Error::v3errorPrepFileLine(V3ErrorCode code, const char* f
     v3errorPrep(code) << file << ":" << std::dec << line << ": ";
     return v3errorStr();
 }
-std::ostringstream& V3Error::v3errorStr() VL_REQUIRES(s().m_mutex) { return s().v3errorStr(); }
 void V3Error::v3errorEnd(std::ostringstream& sstr, const string& extra) VL_RELEASE(s().m_mutex) {
     s().v3errorEnd(sstr, extra);
     V3Error::s().m_mutex.unlock();
diff --git a/src/V3Error.h b/src/V3Error.h
index fdae76e3a..8a5d669c1 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -325,7 +325,7 @@ private:
         = V3ErrorCode::EC_FATAL;  // Error string being formed will abort
     bool m_errorSuppressed VL_GUARDED_BY(m_mutex)
         = false;  // Error being formed should be suppressed
-    MessagesSet m_messages VL_GUARDED_BY(m_mutex);  // What errors we've outputted
+    MessagesSet m_messages VL_GUARDED_BY(m_mutex);  // Errors outputted, to remove dups
     ErrorExitCb m_errorExitCb VL_GUARDED_BY(m_mutex)
         = nullptr;  // Callback when error occurs for dumping
     bool m_errorContexted VL_GUARDED_BY(m_mutex) = false;  // Error being formed got context
@@ -341,12 +341,7 @@ private:
     bool m_warnFatal VL_GUARDED_BY(m_mutex) = true;  // Option: --warnFatal Warnings are fatal
     std::ostringstream m_errorStr VL_GUARDED_BY(m_mutex);  // Error string being formed
 
-    void v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex) {
-        m_errorStr.str("");
-        m_errorCode = code;
-        m_errorContexted = false;
-        m_errorSuppressed = false;
-    }
+    void v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex);
     std::ostringstream& v3errorStr() VL_REQUIRES(m_mutex) { return m_errorStr; }
     void v3errorEnd(std::ostringstream& sstr, const string& extra = "") VL_REQUIRES(m_mutex);
 
@@ -363,9 +358,9 @@ public:
     bool isError(V3ErrorCode code, bool supp) VL_REQUIRES(m_mutex);
     void vlAbortOrExit() VL_REQUIRES(m_mutex);
     void errorContexted(bool flag) VL_REQUIRES(m_mutex) { m_errorContexted = flag; }
-    void incWarnings() VL_REQUIRES(m_mutex) { m_warnCount++; }
+    void incWarnings() VL_REQUIRES(m_mutex) { ++m_warnCount; }
     void incErrors() VL_REQUIRES(m_mutex) {
-        m_errCount++;
+        ++m_errCount;
         if (errorCount() == errorLimit()) {  // Not >= as would otherwise recurse
             v3errorEnd(
                 (v3errorPrep(V3ErrorCode::EC_FATALMANY),
@@ -509,14 +504,6 @@ public:
 
     // When printing an error/warning, print prefix for multiline message
     static string warnMore() VL_REQUIRES(s().m_mutex) { return s().warnMore(); }
-    // This function should only be used when it is impossible to
-    // generate whole error message inside v3warn macros and it needs to be
-    // streamed directly to cerr.
-    // Use with caution as this function isn't MT_SAFE.
-    static string warnMoreStandalone() VL_EXCLUDES(s().m_mutex) VL_MT_UNSAFE {
-        const V3RecursiveLockGuard guard{s().m_mutex};
-        return s().warnMore();
-    }
     // This function marks place in error message from which point message
     // should be printed after information on the error code.
     // The post-processing is done in v3errorEnd function.
@@ -532,7 +519,7 @@ public:
     static std::ostringstream& v3errorPrep(V3ErrorCode code) VL_ACQUIRE(s().m_mutex);
     static std::ostringstream& v3errorPrepFileLine(V3ErrorCode code, const char* file, int line)
         VL_ACQUIRE(s().m_mutex);
-    static std::ostringstream& v3errorStr() VL_REQUIRES(s().m_mutex);
+    static std::ostringstream& v3errorStr() VL_REQUIRES(s().m_mutex) { return s().v3errorStr(); }
     // static, but often overridden in classes.
     static void v3errorEnd(std::ostringstream& sstr, const string& extra = "")
         VL_RELEASE(s().m_mutex);
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 1ff188e88..2247695c7 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -464,10 +464,6 @@ string FileLine::warnOther() const VL_REQUIRES(V3Error::s().m_mutex) {
         return V3Error::s().warnMore();
     }
 };
-string FileLine::warnOtherStandalone() const VL_EXCLUDES(V3Error::s().m_mutex) VL_MT_UNSAFE {
-    const V3RecursiveLockGuard guard{V3Error::s().m_mutex};
-    return warnOther();
-}
 
 string FileLine::source() const VL_MT_SAFE {
     if (VL_UNCOVERABLE(!m_contentp)) {  // LCOV_EXCL_START
diff --git a/src/V3FileLine.h b/src/V3FileLine.h
index fe3a6d986..ead89fd63 100644
--- a/src/V3FileLine.h
+++ b/src/V3FileLine.h
@@ -301,7 +301,6 @@ public:
     void warnUnusedOff(bool flag);
     void warnStateFrom(const FileLine& from) { m_msgEnIdx = from.m_msgEnIdx; }
     void warnResetDefault() { warnStateFrom(defaultFileLine()); }
-    bool lastWarnWaived() const { return m_waive; }
 
     // Specific flag ACCESSORS/METHODS
     bool celldefineOn() const { return msgEn().test(V3ErrorCode::I_CELLDEFINE); }
@@ -356,7 +355,6 @@ public:
     /// When building an error, prefix for printing secondary information
     /// from a different FileLine than the original error
     string warnOther() const VL_REQUIRES(V3Error::s().m_mutex);
-    string warnOtherStandalone() const VL_EXCLUDES(V3Error::s().m_mutex) VL_MT_UNSAFE;
     /// When building an error, current location in include etc
     /// If not used in a given error, automatically pasted at end of error
     string warnContextPrimary() const VL_REQUIRES(V3Error::s().m_mutex) {
diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp
index a1af41bb9..de1d19ca9 100644
--- a/src/V3Graph.cpp
+++ b/src/V3Graph.cpp
@@ -233,13 +233,16 @@ void V3Graph::clearColors() {
 //======================================================================
 // Dumping
 
-void V3Graph::loopsMessageCb(V3GraphVertex* vertexp) {
-    vertexp->v3fatalSrc("Loops detected in graph: " << vertexp);
+void V3Graph::loopsMessageCb(V3GraphVertex* vertexp, V3EdgeFuncP edgeFuncp) {
+    vertexp->v3fatalSrc("Loops detected in graph: " << vertexp << "\n"
+                                                    << reportLoops(edgeFuncp, vertexp));
 }
-
-void V3Graph::loopsVertexCb(V3GraphVertex* vertexp) {
+string V3Graph::loopsVertexCb(V3GraphVertex* vertexp) {
     // Needed here as V3GraphVertex<< isn't defined until later in header
-    if (debug()) std::cerr << "-Info-Loop: " << cvtToHex(vertexp) << " " << vertexp << endl;
+    if (debug())
+        return "-Info-Loop: "s + cvtToHex(vertexp) + ' ' + cvtToStr(vertexp) + '\n';
+    else
+        return "";
 }
 
 void V3Graph::dump(std::ostream& os) const {
diff --git a/src/V3Graph.h b/src/V3Graph.h
index 9b357ceff..222806bb8 100644
--- a/src/V3Graph.h
+++ b/src/V3Graph.h
@@ -430,7 +430,7 @@ public:
 
     /// Call loopsVertexCb on any one loop starting where specified
     /// Side-effect: changes user()
-    void reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) VL_MT_DISABLED;
+    string reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) VL_MT_DISABLED;
 
     /// Build a subgraph of all loops starting where specified
     /// Side-effect: changes user()
@@ -484,8 +484,8 @@ public:
     parallelismReport(std::function<uint64_t(const V3GraphVertex*)> vertexCost) VL_MT_DISABLED;
 
     // CALLBACKS
-    virtual void loopsMessageCb(V3GraphVertex* vertexp) VL_MT_DISABLED;
-    virtual void loopsVertexCb(V3GraphVertex* vertexp) VL_MT_DISABLED;
+    virtual void loopsMessageCb(V3GraphVertex* vertexp, V3EdgeFuncP edgeFuncp) VL_MT_DISABLED;
+    virtual string loopsVertexCb(V3GraphVertex* vertexp) VL_MT_DISABLED;
 };
 
 //============================================================================
diff --git a/src/V3GraphAcyc.cpp b/src/V3GraphAcyc.cpp
index cf3ab8b9c..5e615e1e0 100644
--- a/src/V3GraphAcyc.cpp
+++ b/src/V3GraphAcyc.cpp
@@ -343,10 +343,9 @@ void GraphAcyc::simplifyOut(GraphAcycVertex* avertexp) {
                 V3GraphVertex* inVertexp = inEdgep->fromp();
                 if (inVertexp == avertexp) {
                     if (debug()) v3error("Non-cutable vertex=" << avertexp);  // LCOV_EXCL_LINE
-                    v3error("Circular logic when ordering code (non-cutable edge loop)");
-                    m_origGraphp->reportLoops(
-                        &V3GraphEdge::followNotCutable,
-                        avertexp->origVertexp());  // calls OrderGraph::loopsVertexCb
+                    v3error("Circular logic when ordering code (non-cutable edge loop)\n"
+                            << m_origGraphp->reportLoops(  // calls OrderGraph::loopsVertexCb
+                                   &V3GraphEdge::followNotCutable, avertexp->origVertexp()));
                     // Things are unlikely to end well at this point,
                     // but we'll try something to get to further errors...
                     inEdgep->cutable(true);
diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp
index bc0eff17f..56b6e7e1a 100644
--- a/src/V3GraphAlg.cpp
+++ b/src/V3GraphAlg.cpp
@@ -29,6 +29,7 @@
 #include <algorithm>
 #include <list>
 #include <map>
+#include <numeric>
 #include <vector>
 
 VL_DEFINE_DEBUG_FUNCTIONS;
@@ -281,8 +282,7 @@ class GraphAlgRank final : GraphAlg<> {
         // If larger rank is found, assign it and loop back through
         // If we hit a back node make a list of all loops
         if (vertexp->user() == 1) {
-            m_graphp->reportLoops(m_edgeFuncp, vertexp);
-            m_graphp->loopsMessageCb(vertexp);
+            m_graphp->loopsMessageCb(vertexp, m_edgeFuncp);
             return;  // LCOV_EXCL_LINE  // gcc gprof bug misses this return
         }
         if (vertexp->rank() >= currentRank) return;  // Already processed it
@@ -313,6 +313,7 @@ void V3Graph::rank(V3EdgeFuncP edgeFuncp) { GraphAlgRank{this, edgeFuncp}; }
 
 class GraphAlgRLoops final : GraphAlg<> {
     std::vector<V3GraphVertex*> m_callTrace;  // List of everything we hit processing so far
+    std::vector<string> m_msgs;  // Output messages
     bool m_done = false;  // Exit algorithm
 
     void main(V3GraphVertex* vertexp) {
@@ -333,9 +334,8 @@ class GraphAlgRLoops final : GraphAlg<> {
         m_callTrace[currentRank++] = vertexp;
 
         if (vertexp->user() == 1) {
-            for (unsigned i = 0; i < currentRank; i++) {  //
-                m_graphp->loopsVertexCb(m_callTrace[i]);
-            }
+            for (unsigned i = 0; i < currentRank; i++)
+                m_msgs.emplace_back(m_graphp->loopsVertexCb(m_callTrace[i]));
             m_done = true;
             return;
         }
@@ -353,10 +353,13 @@ public:
         main(vertexp);
     }
     ~GraphAlgRLoops() = default;
+    string message() const {
+        return std::accumulate(m_msgs.begin(), m_msgs.end(), std::string{""});
+    }
 };
 
-void V3Graph::reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) {
-    GraphAlgRLoops{this, edgeFuncp, vertexp};
+string V3Graph::reportLoops(V3EdgeFuncP edgeFuncp, V3GraphVertex* vertexp) {
+    return GraphAlgRLoops{this, edgeFuncp, vertexp}.message();
 }
 
 //######################################################################
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index ed24b42d7..e36611257 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -43,7 +43,7 @@ class LinkCellsGraph final : public V3Graph {
 public:
     LinkCellsGraph() = default;
     ~LinkCellsGraph() override = default;
-    void loopsMessageCb(V3GraphVertex* vertexp) override;
+    void loopsMessageCb(V3GraphVertex* vertexp, V3EdgeFuncP edgeFuncp) override;
 };
 
 class LinkCellsVertex final : public V3GraphVertex {
@@ -73,7 +73,7 @@ public:
     string name() const override VL_MT_STABLE { return "*LIBRARY*"; }
 };
 
-void LinkCellsGraph::loopsMessageCb(V3GraphVertex* vertexp) {
+void LinkCellsGraph::loopsMessageCb(V3GraphVertex* vertexp, V3EdgeFuncP edgeFuncp) {
     if (const LinkCellsVertex* const vvertexp = vertexp->cast<LinkCellsVertex>()) {
         vvertexp->modp()->v3warn(E_UNSUPPORTED,
                                  "Unsupported: Recursive multiple modules (module instantiates "
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 5ace4d040..b221d8a09 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3422,11 +3422,11 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                            << (!baddot.empty() ? AstNode::prettyNameQ(baddot)
                                                                : nodep->prettyNameQ())
                                            << " in dotted " << expectWhat << ": '"
-                                           << m_ds.m_dotText + "." + nodep->prettyName() << "'");
-                            if (okSymp) {
-                                okSymp->cellErrorScopes(nodep,
-                                                        AstNode::prettyName(m_ds.m_dotText));
-                            }
+                                           << m_ds.m_dotText + "." + nodep->prettyName() << "'\n"
+                                           << nodep->warnContextPrimary()
+                                           << (okSymp ? okSymp->cellErrorScopes(
+                                                   nodep, AstNode::prettyName(m_ds.m_dotText))
+                                                      : ""));
                         }
                         m_ds.m_dotErr = true;
                     }
@@ -3611,8 +3611,9 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (!nodep->varp()) {
                     nodep->v3error("Can't find definition of "
                                    << AstNode::prettyNameQ(baddot) << " in dotted signal: '"
-                                   << nodep->dotted() + "." + nodep->prettyName() << "'");
-                    okSymp->cellErrorScopes(nodep);
+                                   << nodep->dotted() + "." + nodep->prettyName() << "'\n"
+                                   << nodep->warnContextPrimary()
+                                   << okSymp->cellErrorScopes(nodep));
                     return;
                 }
                 // V3Inst may have expanded arrays of interfaces to
@@ -3636,8 +3637,9 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (!vscp) {
                     nodep->v3error("Can't find varpin scope of "
                                    << AstNode::prettyNameQ(baddot) << " in dotted signal: '"
-                                   << nodep->dotted() + "." + nodep->prettyName() << "'");
-                    okSymp->cellErrorScopes(nodep);
+                                   << nodep->dotted() + "." + nodep->prettyName() << "'\n"
+                                   << nodep->warnContextPrimary()
+                                   << okSymp->cellErrorScopes(nodep));
                 } else {
                     while (vscp->user2p()) {  // If V3Inline aliased it, pick up the new signal
                         UINFO(7, indent() << "Resolved pre-alias " << vscp
@@ -3844,10 +3846,11 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     dotSymp = m_statep->findDotted(nodep->fileline(), dotSymp, inl, baddot, okSymp,
                                                    true);
                     if (!dotSymp) {
-                        okSymp->cellErrorScopes(nodep);
                         nodep->v3fatalSrc("Couldn't resolve inlined scope "
                                           << AstNode::prettyNameQ(baddot)
-                                          << " in: " << nodep->inlinedDots());
+                                          << " in: " << nodep->inlinedDots() << '\n'
+                                          << nodep->warnContextPrimary()
+                                          << okSymp->cellErrorScopes(nodep));
                     }
                 }
                 dotSymp = m_statep->findDotted(nodep->fileline(), dotSymp, nodep->dotted(), baddot,
@@ -3974,8 +3977,9 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     nodep->v3error("Can't find definition of "
                                    << AstNode::prettyNameQ(baddot) << " in dotted task/function: '"
                                    << nodep->dotted() + "." + nodep->prettyName() << "'\n"
-                                   << (suggest.empty() ? "" : nodep->warnMore() + suggest));
-                    okSymp->cellErrorScopes(nodep);
+                                   << (suggest.empty() ? "" : nodep->warnMore() + suggest) << '\n'
+                                   << nodep->warnContextPrimary()
+                                   << okSymp->cellErrorScopes(nodep));
                 }
             }
         }
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 25f612395..de2d030a9 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -595,40 +595,41 @@ string V3Options::filePath(FileLine* fl, const string& modname, const string& la
 
     // Warn and return not found
     if (errmsg != "") {
-        fl->v3error(errmsg + "'"s + filename + "'"s);
-        filePathLookedMsg(fl, filename);
+        fl->v3error(errmsg << "'"s << filename << "'\n"s << fl->warnContextPrimary()
+                           << V3Error::warnAdditionalInfo() << filePathLookedMsg(fl, filename));
     }
     return "";
 }
 
-void V3Options::filePathLookedMsg(FileLine* fl, const string& modname) {
+string V3Options::filePathLookedMsg(FileLine* fl, const string& modname) {
     static bool shown_notfound_msg = false;
+    std::ostringstream ss;
     if (modname.find("__Vhsh") != string::npos) {
-        std::cerr << V3Error::warnMoreStandalone()
-                  << "... Note: Name is longer than 127 characters; automatic"
-                  << " file lookup may have failed due to OS filename length limits.\n";
-        std::cerr << V3Error::warnMoreStandalone()
-                  << "... Suggest putting filename with this module/package"
-                  << " onto command line instead.\n";
+        ss << V3Error::warnMore() << "... Note: Name is longer than 127 characters; automatic"
+           << " file lookup may have failed due to OS filename length limits.\n";
+        ss << V3Error::warnMore() << "... Suggest putting filename with this module/package"
+           << " onto command line instead.\n";
     } else if (!shown_notfound_msg) {
         shown_notfound_msg = true;
         if (m_impp->m_incDirUsers.empty()) {
-            fl->v3error("This may be because there's no search path specified with -I<dir>.");
+            ss << V3Error::warnMore()
+               << "... This may be because there's no search path specified with -I<dir>.\n";
         }
-        std::cerr << V3Error::warnMoreStandalone() << "... Looked in:" << endl;
+        ss << V3Error::warnMore() << "... Looked in:\n";
         for (const string& dir : m_impp->m_incDirUsers) {
             for (const string& ext : m_impp->m_libExtVs) {
                 const string fn = V3Os::filenameJoin(dir, modname + ext);
-                std::cerr << V3Error::warnMoreStandalone() << "     " << fn << endl;
+                ss << V3Error::warnMore() << "     " << fn << "\n";
             }
         }
         for (const string& dir : m_impp->m_incDirFallbacks) {
             for (const string& ext : m_impp->m_libExtVs) {
                 const string fn = V3Os::filenameJoin(dir, modname + ext);
-                std::cerr << V3Error::warnMoreStandalone() << "     " << fn << endl;
+                ss << V3Error::warnMore() << "     " << fn << "\n";
             }
         }
     }
+    return ss.str();
 }
 
 //! Determine what language is associated with a filename
diff --git a/src/V3Options.h b/src/V3Options.h
index 75612db10..9ab1b61e3 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -779,7 +779,7 @@ public:
     string fileExists(const string& filename);
     string filePath(FileLine* fl, const string& modname, const string& lastpath,
                     const string& errmsg);
-    void filePathLookedMsg(FileLine* fl, const string& modname);
+    string filePathLookedMsg(FileLine* fl, const string& modname);
     V3LangCode fileLanguage(const string& filename);
     static bool fileStatNormal(const string& filename);
 
diff --git a/src/V3SchedAcyclic.cpp b/src/V3SchedAcyclic.cpp
index 54d275b28..46c91aa9e 100644
--- a/src/V3SchedAcyclic.cpp
+++ b/src/V3SchedAcyclic.cpp
@@ -100,17 +100,16 @@ public:
 };
 
 class Graph final : public V3Graph {
-    void loopsVertexCb(V3GraphVertex* vtxp) override {
-        // TODO: 'typeName' is an internal thing. This should be more human readable.
+    string loopsVertexCb(V3GraphVertex* vtxp) override {
         if (SchedAcyclicLogicVertex* const lvtxp = vtxp->cast<SchedAcyclicLogicVertex>()) {
             AstNode* const logicp = lvtxp->logicp();
-            std::cerr << logicp->fileline()->warnOtherStandalone()
-                      << "     Example path: " << logicp->typeName() << endl;
+            return logicp->fileline()->warnOther()
+                   + "     Example path: " + logicp->prettyTypeName() + "\n";
         } else {
             SchedAcyclicVarVertex* const vvtxp = vtxp->as<SchedAcyclicVarVertex>();
             AstVarScope* const vscp = vvtxp->vscp();
-            std::cerr << vscp->fileline()->warnOtherStandalone()
-                      << "     Example path: " << vscp->prettyName() << endl;
+            return vscp->fileline()->warnOther() + "     Example path: " + vscp->prettyName()
+                   + "\n";
         }
     }
 };
@@ -268,7 +267,8 @@ void gatherSCCCandidates(V3GraphVertex* vtxp, std::vector<Candidate>& candidates
 }
 
 // Find all variables in a loop (SCC) that are candidates for splitting to break loops.
-void reportLoopVars(Graph* graphp, SchedAcyclicVarVertex* vvtxp) {
+std::string reportLoopVars(FileLine* warnFl, Graph* graphp, SchedAcyclicVarVertex* vvtxp) {
+    std::ostringstream ss;
     // Vector of variables in UNOPTFLAT loop that are candidates for splitting.
     std::vector<Candidate> candidates;
     {
@@ -281,47 +281,51 @@ void reportLoopVars(Graph* graphp, SchedAcyclicVarVertex* vvtxp) {
     }
 
     // Possible we only have candidates the user cannot do anything about, so don't bother them.
-    if (candidates.empty()) return;
+    if (candidates.empty()) return "";
 
     // There may be a very large number of candidates, so only report up to 10 of the "most
     // important" signals.
     unsigned splittable = 0;
-    const auto reportFirst10 = [&](std::function<bool(const Candidate&, const Candidate&)> less) {
+    const auto reportFirst10
+        = [&](std::function<bool(const Candidate&, const Candidate&)> less) -> string {
         std::stable_sort(candidates.begin(), candidates.end(), less);
+        std::ostringstream ss2;
         for (size_t i = 0; i < 10; i++) {
             if (i == candidates.size()) break;
             const Candidate& candidate = candidates[i];
             AstVar* const varp = candidate.first->varp();
-            std::cerr << V3Error::warnMoreStandalone() << "    " << varp->fileline() << " "
-                      << varp->prettyName() << ", width " << std::dec << varp->width()
-                      << ", circular fanout " << candidate.second;
+
+            ss2 << V3Error::warnMore() << "    " << varp->fileline() << ' ' << varp->prettyName()
+                << ", width " << std::dec << varp->width() << ", circular fanout "
+                << candidate.second;
             if (V3SplitVar::canSplitVar(varp)) {
-                std::cerr << ", can split_var";
+                ss2 << ", can split_var";
                 ++splittable;
             }
-            std::cerr << '\n';
+            ss2 << '\n';
         }
+        return ss2.str();
     };
 
     // Widest variables
-    std::cerr << V3Error::warnMoreStandalone() << "... Widest variables candidate to splitting:\n";
-    reportFirst10([](const Candidate& a, const Candidate& b) {
-        return a.first->varp()->width() > b.first->varp()->width();
-    });
+    ss << V3Error::warnMore() << "... Widest variables candidate to splitting:\n"
+       << reportFirst10([](const Candidate& a, const Candidate& b) {
+              return a.first->varp()->width() > b.first->varp()->width();
+          });
 
     // Highest fanout
-    std::cerr << V3Error::warnMoreStandalone() << "... Candidates with the highest fanout:\n";
-    reportFirst10([](const Candidate& a, const Candidate& b) {  //
-        return a.second > b.second;
-    });
+    ss << V3Error::warnMore() << "... Candidates with the highest fanout:\n"
+       << reportFirst10([](const Candidate& a, const Candidate& b) {  //
+              return a.second > b.second;
+          });
 
     if (splittable) {
-        std::cerr << V3Error::warnMoreStandalone()
-                  << "... Suggest add /*verilator split_var*/ or /*verilator "
-                     "isolate_assignments*/ to appropriate variables above."
-                  << std::endl;
+        ss << V3Error::warnMore()
+           << "... Suggest add /*verilator split_var*/ or /*verilator "
+              "isolate_assignments*/ to appropriate variables above.\n";
     }
     V3Stats::addStat("Scheduling, split_var, candidates", splittable);
+    return ss.str();
 }
 
 void reportCycles(Graph* graphp, const std::vector<SchedAcyclicVarVertex*>& cutVertices) {
@@ -330,17 +334,26 @@ void reportCycles(Graph* graphp, const std::vector<SchedAcyclicVarVertex*>& cutV
         FileLine* const flp = vscp->fileline();
 
         // First v3warn not inside warnIsOff so we can see the suppressions with --debug
-        vscp->v3warn(UNOPTFLAT, "Signal unoptimizable: Circular combinational logic: "
-                                    << vscp->prettyNameQ());
-        if (!flp->warnIsOff(V3ErrorCode::UNOPTFLAT) && !flp->lastWarnWaived()) {
+        if (flp->warnIsOff(V3ErrorCode::UNOPTFLAT)) {
+            // First v3warn not inside warnIsOff so we can see the suppressions with --debug
+            vscp->v3warn(UNOPTFLAT, "Signal unoptimizable: Circular combinational logic: "
+                                        << vscp->prettyNameQ());
+        } else {
+            vscp->v3warn(UNOPTFLAT,
+                         "Signal unoptimizable: Circular combinational logic: "
+                             << vscp->prettyNameQ() << '\n'
+                             << vscp->warnContextPrimary()
+                             << V3Error::warnAdditionalInfo()
+                             // Calls Graph::loopsVertexCb
+                             << graphp->reportLoops(&V3GraphEdge::followAlwaysTrue, vvtxp)
+                             // Report candidate variables for splitting
+                             << (v3Global.opt.reportUnoptflat()
+                                     ? reportLoopVars(vscp->fileline(), graphp, vvtxp)
+                                     : ""));
             // Complain just once
             flp->modifyWarnOff(V3ErrorCode::UNOPTFLAT, true);
-            // Calls Graph::loopsVertexCb
-            graphp->reportLoops(&V3GraphEdge::followAlwaysTrue, vvtxp);
+            // Create a subgraph for the UNOPTFLAT loop
             if (v3Global.opt.reportUnoptflat()) {
-                // Report candidate variables for splitting
-                reportLoopVars(graphp, vvtxp);
-                // Create a subgraph for the UNOPTFLAT loop
                 V3Graph loopGraph;
                 graphp->subtreeLoops(&V3GraphEdge::followAlwaysTrue, vvtxp, &loopGraph);
                 loopGraph.dumpDotFilePrefixedAlways("unoptflat");
diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index 84cced2cd..20166c97e 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -256,7 +256,7 @@ public:
             }
         }
     }
-    void cellErrorScopes(AstNode* lookp, string prettyName = "") {
+    string cellErrorScopes(AstNode* lookp, string prettyName = "") {
         if (prettyName == "") prettyName = lookp->prettyName();
         string scopes;
         for (IdNameMap::iterator it = m_idNameMap.begin(); it != m_idNameMap.end(); ++it) {
@@ -267,9 +267,9 @@ public:
             }
         }
         if (scopes == "") scopes = "<no instances found>";
-        std::cerr << V3Error::warnMoreStandalone() << "... Known scopes under '" << prettyName
-                  << "': " << scopes << endl;
         if (debug()) dumpSelf(std::cerr, "       KnownScope: ", 1);
+        return V3Error::warnMore() + "... Known scopes under '" + prettyName + "': " + scopes
+               + '\n';
     }
 };
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 8b9383f61..9f7e85728 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5876,9 +5876,12 @@ class WidthVisitor final : public VNVisitor {
                 // We've resolved parameters and hit a module that we couldn't resolve.  It's
                 // finally time to report it.
                 // Note only here in V3Width as this is first visitor after V3Dead.
-                nodep->modNameFileline()->v3error("Cannot find file containing module: '"
-                                                  << nodep->modName() << "'");
-                v3Global.opt.filePathLookedMsg(nodep->modNameFileline(), nodep->modName());
+                nodep->modNameFileline()->v3error(
+                    "Cannot find file containing module: '"
+                    << nodep->modName() << "'\n"
+                    << nodep->modNameFileline()->warnContextPrimary()
+                    << V3Error::warnAdditionalInfo()
+                    << v3Global.opt.filePathLookedMsg(nodep->modNameFileline(), nodep->modName()));
             }
             if (nodep->rangep()) userIterateAndNext(nodep->rangep(), WidthVP{SELF, BOTH}.p());
             userIterateAndNext(nodep->pinsp(), nullptr);
diff --git a/test_regress/t/t_gen_nonconst_bad.out b/test_regress/t/t_gen_nonconst_bad.out
index 5a50edbcd..9c7aa3c0c 100644
--- a/test_regress/t/t_gen_nonconst_bad.out
+++ b/test_regress/t/t_gen_nonconst_bad.out
@@ -2,9 +2,7 @@
     8 |    nfound nfound();
       |    ^~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_gen_nonconst_bad.v:8:4: This may be because there's no search path specified with -I<dir>.
-    8 |    nfound nfound();
-      |    ^~~~~~
+        ... This may be because there's no search path specified with -I<dir>.
         ... Looked in:
              nfound
              nfound.v
diff --git a/test_regress/t/t_interface_mismodport_bad.out b/test_regress/t/t_interface_mismodport_bad.out
index 0eaeffb14..a8b307c1f 100644
--- a/test_regress/t/t_interface_mismodport_bad.out
+++ b/test_regress/t/t_interface_mismodport_bad.out
@@ -1,6 +1,6 @@
 %Error: t/t_interface_mismodport_bad.v:32:12: Can't find definition of 'bad' in dotted signal: 'isub.bad'
    32 |       isub.bad = i_value;   
       |            ^~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
         ... Known scopes under 'bad': <no instances found>
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to

From fe4ad7de648d67eafe153b69d6db48aa37c4eddc Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 10 May 2025 18:06:33 -0400
Subject: [PATCH 055/211] Internals: Use magic string for warnMore so
 lock-free.

---
 src/V3Error.cpp    | 23 ++++++++++++++---------
 src/V3Error.h      |  4 ++--
 src/V3FileLine.cpp |  8 ++++----
 src/V3String.cpp   | 10 ++++++++++
 src/V3String.h     |  2 ++
 5 files changed, 32 insertions(+), 15 deletions(-)

diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index dcb00df3d..87f355915 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -113,7 +113,9 @@ void V3ErrorGuarded::vlAbortOrExit() VL_REQUIRES(m_mutex) {
     }
 }
 
-string V3ErrorGuarded::warnMore() VL_REQUIRES(m_mutex) { return string(msgPrefix().size(), ' '); }
+string V3ErrorGuarded::warnMoreSpaces() VL_REQUIRES(m_mutex) {
+    return string(msgPrefix().size(), ' ');
+}
 
 void V3ErrorGuarded::suppressThisWarning() VL_REQUIRES(m_mutex) {
 #ifndef V3ERROR_NO_GLOBAL_
@@ -155,6 +157,8 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
     // Suppress duplicate messages
     if (!m_messages.insert(firstLine).second) return;
 
+    msg = VString::replaceSubstr(msg, V3Error::warnMore(), warnMoreSpaces());
+
     string msg_additional;
     {
         string::size_type pos;
@@ -172,7 +176,8 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
             msg_additional.erase(pos + 1, 1);
     }
     if (!extra.empty() && !m_errorSuppressed) {
-        const string extraMsg = warnMore() + extra + "\n";
+        string extraMsg = VString::replaceSubstr(extra, V3Error::warnMore(), warnMoreSpaces());
+        extraMsg = warnMoreSpaces() + extraMsg + "\n";
         const size_t pos = msg.find('\n');
         msg.insert(pos + 1, extraMsg);
     }
@@ -193,7 +198,7 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
             && !m_describedEachWarn[m_errorCode]) {
             m_describedEachWarn[m_errorCode] = true;
             if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED) {
-                std::cerr << warnMore() << "... For " << (anError ? "error" : "warning")
+                std::cerr << warnMoreSpaces() << "... For " << (anError ? "error" : "warning")
                           << " description see " << m_errorCode.url() << endl;
             } else if (m_errCount >= 1
                        && (m_errorCode == V3ErrorCode::EC_FATAL
@@ -201,24 +206,24 @@ void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
                            || m_errorCode == V3ErrorCode::EC_FATALSRC)
                        && !m_tellInternal) {
                 m_tellInternal = true;
-                std::cerr << warnMore()
+                std::cerr << warnMoreSpaces()
                           << "... This fatal error may be caused by the earlier error(s);"
                              " resolve those first."
                           << endl;
             } else if (!m_tellManual) {
                 m_tellManual = true;
-                std::cerr << warnMore() << "... See the manual at " << m_errorCode.url()
+                std::cerr << warnMoreSpaces() << "... See the manual at " << m_errorCode.url()
                           << " for more assistance." << endl;
             }
             if (!m_pretendError[m_errorCode] && !m_errorCode.hardError()) {
-                std::cerr << warnMore() << "... Use \"/* verilator lint_off "
+                std::cerr << warnMoreSpaces() << "... Use \"/* verilator lint_off "
                           << m_errorCode.ascii()
                           << " */\" and lint_on around source to disable this message." << endl;
                 if (m_errorCode.dangerous()) {
-                    std::cerr << warnMore() << "*** See " << m_errorCode.url()
+                    std::cerr << warnMoreSpaces() << "*** See " << m_errorCode.url()
                               << " before disabling this,\n";
-                    std::cerr << warnMore() << "else you may end up with different sim results."
-                              << endl;
+                    std::cerr << warnMoreSpaces()
+                              << "else you may end up with different sim results." << endl;
                 }
             }
         }
diff --git a/src/V3Error.h b/src/V3Error.h
index 8a5d669c1..5989b6ffc 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -349,7 +349,7 @@ public:
     V3RecursiveMutex m_mutex;  // Make sure only single thread is in class
 
     string msgPrefix() VL_REQUIRES(m_mutex);  // returns %Error/%Warn
-    string warnMore() VL_REQUIRES(m_mutex);
+    string warnMoreSpaces() VL_REQUIRES(m_mutex);
     void execErrorExitCb() VL_REQUIRES(m_mutex) {
         if (m_errorExitCb) m_errorExitCb();
     }
@@ -503,7 +503,7 @@ public:
     }
 
     // When printing an error/warning, print prefix for multiline message
-    static string warnMore() VL_REQUIRES(s().m_mutex) { return s().warnMore(); }
+    static string warnMore() VL_MT_SAFE { return "__WARNMORE__"; }
     // This function marks place in error message from which point message
     // should be printed after information on the error code.
     // The post-processing is done in v3errorEnd function.
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 2247695c7..94509087c 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -452,16 +452,16 @@ void FileLine::v3errorEnd(std::ostringstream& sstr, const string& extra)
 
 string FileLine::warnMore() const VL_REQUIRES(V3Error::s().m_mutex) {
     if (lastLineno()) {
-        return V3Error::s().warnMore() + string(ascii().size(), ' ') + ": ";
+        return V3Error::warnMore() + string(ascii().size(), ' ') + ": ";
     } else {
-        return V3Error::s().warnMore();
+        return V3Error::warnMore();
     }
 }
 string FileLine::warnOther() const VL_REQUIRES(V3Error::s().m_mutex) {
     if (lastLineno()) {
-        return V3Error::s().warnMore() + ascii() + ": ";
+        return V3Error::warnMore() + ascii() + ": ";
     } else {
-        return V3Error::s().warnMore();
+        return V3Error::warnMore();
     }
 };
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 05405037b..bb80bb1d1 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -271,6 +271,16 @@ double VString::parseDouble(const string& str, bool* successp) {
     return d;
 }
 
+string VString::replaceSubstr(const string& str, const string& from, const string& to) {
+    string result = str;
+    const size_t len = from.size();
+    UASSERT_STATIC(len > 0, "Cannot replace empty string");
+    for (size_t pos = 0; (pos = result.find(from, pos)) != string::npos; pos += len) {
+        result.replace(pos, len, to);
+    }
+    return result;
+}
+
 string VString::replaceWord(const string& str, const string& from, const string& to) {
     string result = str;
     const size_t len = from.size();
diff --git a/src/V3String.h b/src/V3String.h
index 1c70ec96e..aa59107c6 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -126,6 +126,8 @@ public:
     static string::size_type leadingWhitespaceCount(const string& str);
     // Return double by parsing string
     static double parseDouble(const string& str, bool* successp);
+    // Replace substring. Often replaceWord is more appropriate.
+    static string replaceSubstr(const string& str, const string& from, const string& to);
     // Replace all occurrences of the word 'from' in 'str' with 'to'. A word is considered
     // to be a consecutive sequence of the characters [a-zA-Z0-9_]. Sub-words are not replaced.
     // e.g.: replaceWords("one apple bad_apple", "apple", "banana") -> "one banana bad_apple"

From 295fae0edca38a36d8031a7d3188a32396772b1b Mon Sep 17 00:00:00 2001
From: Dominick Grochowina <groho@users.noreply.github.com>
Date: Sun, 11 May 2025 08:01:13 -0400
Subject: [PATCH 056/211] Fix nullptr segfault in
 VerilatedVcd::emitTimeChange() (#5980)

---
 docs/CONTRIBUTORS           | 1 +
 include/verilated_vcd_c.cpp | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 28cce9e65..28f3c1c1f 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -45,6 +45,7 @@ David Stanford
 David Turner
 Dercury
 Diego Roux
+Dominick Grochowina
 Don Williamson
 Drew Ranck
 Drew Taussig
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index 6bc7896b6..4b6588522 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -193,7 +193,7 @@ void VerilatedVcd::emitTimeChange(uint64_t timeui) {
     // timestamp backup and overwrite it.
     // This is faster then checking on every signal change if time needs to
     // be emitted.  Note buffer flushes may still emit a rare duplicate.
-    if (m_wrTimeEndp == m_writep) m_writep = m_wrTimeBeginp;
+    if (m_wrTimeBeginp && m_wrTimeEndp == m_writep) m_writep = m_wrTimeBeginp;
     m_wrTimeBeginp = m_writep;
     {
         printStr("#");

From 0162e15b6e28d81cefc573b79ec048d369b6d2ca Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 11 May 2025 08:24:11 -0400
Subject: [PATCH 057/211] Tests: Rename property tests

---
 .../t/t_assert_property_pexpr_unsup.out       | 113 ------------------
 .../t/t_assert_recursive_property_unsup.out   |   6 -
 .../t/{t_assert_property.py => t_property.py} |   0
 .../t/{t_assert_property.v => t_property.v}   |   0
 ...roperty_fail_1.py => t_property_fail_1.py} |   2 +-
 ...fail_2_bad.py => t_property_fail_2_bad.py} |   2 +-
 ..._named_property.py => t_property_named.py} |   0
 ...rt_named_property.v => t_property_named.v} |   0
 ...perty_untyped.py => t_property_negated.py} |   0
 ...egated_property.v => t_property_negated.v} |   0
 test_regress/t/t_property_pexpr_unsup.out     | 113 ++++++++++++++++++
 ...xpr_unsup.py => t_property_pexpr_unsup.py} |   0
 ...pexpr_unsup.v => t_property_pexpr_unsup.v} |   0
 test_regress/t/t_property_recursive_unsup.out |   6 +
 ...unsup.py => t_property_recursive_unsup.py} |   0
 ...y_unsup.v => t_property_recursive_unsup.v} |   0
 ...ated_property.py => t_property_untyped.py} |   0
 ...roperty_untyped.v => t_property_untyped.v} |   0
 ...unsup.out => t_property_untyped_unsup.out} |   2 +-
 ...y_unsup.py => t_property_untyped_unsup.py} |   0
 ...ped_unsup.v => t_property_untyped_unsup.v} |   0
 ...var_unsup.out => t_property_var_unsup.out} |   8 +-
 ...y_var_unsup.py => t_property_var_unsup.py} |   0
 ...rty_var_unsup.v => t_property_var_unsup.v} |   0
 ...cked_port.py => t_public_unpacked_port.py} |   0
 ...packed_port.v => t_public_unpacked_port.v} |   0
 26 files changed, 126 insertions(+), 126 deletions(-)
 delete mode 100644 test_regress/t/t_assert_property_pexpr_unsup.out
 delete mode 100644 test_regress/t/t_assert_recursive_property_unsup.out
 rename test_regress/t/{t_assert_property.py => t_property.py} (100%)
 rename test_regress/t/{t_assert_property.v => t_property.v} (100%)
 rename test_regress/t/{t_assert_property_fail_1.py => t_property_fail_1.py} (93%)
 rename test_regress/t/{t_assert_property_fail_2_bad.py => t_property_fail_2_bad.py} (93%)
 rename test_regress/t/{t_assert_named_property.py => t_property_named.py} (100%)
 rename test_regress/t/{t_assert_named_property.v => t_property_named.v} (100%)
 rename test_regress/t/{t_assert_property_untyped.py => t_property_negated.py} (100%)
 rename test_regress/t/{t_negated_property.v => t_property_negated.v} (100%)
 create mode 100644 test_regress/t/t_property_pexpr_unsup.out
 rename test_regress/t/{t_assert_property_pexpr_unsup.py => t_property_pexpr_unsup.py} (100%)
 rename test_regress/t/{t_assert_property_pexpr_unsup.v => t_property_pexpr_unsup.v} (100%)
 create mode 100644 test_regress/t/t_property_recursive_unsup.out
 rename test_regress/t/{t_assert_property_untyped_unsup.py => t_property_recursive_unsup.py} (100%)
 rename test_regress/t/{t_assert_recursive_property_unsup.v => t_property_recursive_unsup.v} (100%)
 rename test_regress/t/{t_negated_property.py => t_property_untyped.py} (100%)
 rename test_regress/t/{t_assert_property_untyped.v => t_property_untyped.v} (100%)
 rename test_regress/t/{t_assert_property_untyped_unsup.out => t_property_untyped_unsup.out} (71%)
 rename test_regress/t/{t_assert_recursive_property_unsup.py => t_property_untyped_unsup.py} (100%)
 rename test_regress/t/{t_assert_property_untyped_unsup.v => t_property_untyped_unsup.v} (100%)
 rename test_regress/t/{t_assert_property_var_unsup.out => t_property_var_unsup.out} (54%)
 rename test_regress/t/{t_assert_property_var_unsup.py => t_property_var_unsup.py} (100%)
 rename test_regress/t/{t_assert_property_var_unsup.v => t_property_var_unsup.v} (100%)
 rename test_regress/t/{t_pub_unpacked_port.py => t_public_unpacked_port.py} (100%)
 rename test_regress/t/{t_pub_unpacked_port.v => t_public_unpacked_port.v} (100%)

diff --git a/test_regress/t/t_assert_property_pexpr_unsup.out b/test_regress/t/t_assert_property_pexpr_unsup.out
deleted file mode 100644
index 882db1882..000000000
--- a/test_regress/t/t_assert_property_pexpr_unsup.out
+++ /dev/null
@@ -1,113 +0,0 @@
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:25:13: Unsupported: strong (in property expression)
-   25 |       strong(a);
-      |             ^
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:29:11: Unsupported: weak (in property expression)
-   29 |       weak(a);
-      |           ^
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:33:9: Unsupported: until (in property expression)
-   33 |       a until b;
-      |         ^~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:37:9: Unsupported: s_until (in property expression)
-   37 |       a s_until b;
-      |         ^~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:41:9: Unsupported: until_with (in property expression)
-   41 |       a until_with b;
-      |         ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:45:9: Unsupported: s_until_with (in property expression)
-   45 |       a s_until_with b;
-      |         ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:49:9: Unsupported: implies (in property expression)
-   49 |       a implies b;
-      |         ^~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:53:9: Unsupported: #-# (in property expression)
-   53 |       a #-# b;
-      |         ^~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:57:9: Unsupported: #=# (in property expression)
-   57 |       a #=# b;
-      |         ^~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:61:7: Unsupported: nexttime (in property expression)
-   61 |       nexttime a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:65:7: Unsupported: nexttime[] (in property expression)
-   65 |       nexttime [2] a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:69:7: Unsupported: s_nexttime (in property expression)
-   69 |       s_nexttime a;
-      |       ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:73:7: Unsupported: s_nexttime[] (in property expression)
-   73 |       s_nexttime [2] a;
-      |       ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:77:16: Unsupported: always (in property expression)
-   77 |       nexttime always a;
-      |                ^~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:77:7: Unsupported: nexttime (in property expression)
-   77 |       nexttime always a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:81:20: Unsupported: always (in property expression)
-   81 |       nexttime [2] always a;
-      |                    ^~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:81:7: Unsupported: nexttime[] (in property expression)
-   81 |       nexttime [2] always a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:85:16: Unsupported: eventually (in property expression)
-   85 |       nexttime eventually a;
-      |                ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:85:7: Unsupported: nexttime (in property expression)
-   85 |       nexttime eventually a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:89:20: Unsupported: always (in property expression)
-   89 |       nexttime [2] always a;
-      |                    ^~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:89:7: Unsupported: nexttime[] (in property expression)
-   89 |       nexttime [2] always a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:93:16: Unsupported: s_eventually (in property expression)
-   93 |       nexttime s_eventually a;
-      |                ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:93:7: Unsupported: nexttime (in property expression)
-   93 |       nexttime s_eventually a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:97:35: Unsupported: always (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |                                   ^~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:97:16: Unsupported: s_eventually[] (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |                ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:97:7: Unsupported: nexttime (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:101:17: Unsupported: accept_on (in property expression)
-  101 |       accept_on (a) b;
-      |                 ^
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:105:22: Unsupported: sync_accept_on (in property expression)
-  105 |       sync_accept_on (a) b;
-      |                      ^
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:109:17: Unsupported: reject_on (in property expression)
-  109 |       reject_on (a) b;
-      |                 ^
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:113:22: Unsupported: sync_reject_on (in property expression)
-  113 |       sync_reject_on (a) b;
-      |                      ^
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:117:9: Unsupported: iff (in property expression)
-  117 |       a iff b;
-      |         ^~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:120:27: Unsupported: property argument data type
-  120 |    property p_arg_propery(property inprop);
-      |                           ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:123:27: Unsupported: sequence argument data type
-  123 |    property p_arg_seqence(sequence inseq);
-      |                           ^~~~~~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:128:7: Unsupported: property case expression
-  128 |       case (a) endcase
-      |       ^~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:131:7: Unsupported: property case expression
-  131 |       case (a) default: b; endcase
-      |       ^~~~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:134:7: Unsupported: property case expression
-  134 |       if (a) b
-      |       ^~
-%Error-UNSUPPORTED: t/t_assert_property_pexpr_unsup.v:137:7: Unsupported: property case expression
-  137 |       if (a) b else c
-      |       ^~
-%Error: Exiting due to
diff --git a/test_regress/t/t_assert_recursive_property_unsup.out b/test_regress/t/t_assert_recursive_property_unsup.out
deleted file mode 100644
index 6176205df..000000000
--- a/test_regress/t/t_assert_recursive_property_unsup.out
+++ /dev/null
@@ -1,6 +0,0 @@
-%Error-UNSUPPORTED: t/t_assert_recursive_property_unsup.v:20:13: Unsupported: Recursive property call: 'check'
-                                                               : ... note: In instance 't'
-   20 |    property check(int n);
-      |             ^~~~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: Exiting due to
diff --git a/test_regress/t/t_assert_property.py b/test_regress/t/t_property.py
similarity index 100%
rename from test_regress/t/t_assert_property.py
rename to test_regress/t/t_property.py
diff --git a/test_regress/t/t_assert_property.v b/test_regress/t/t_property.v
similarity index 100%
rename from test_regress/t/t_assert_property.v
rename to test_regress/t/t_property.v
diff --git a/test_regress/t/t_assert_property_fail_1.py b/test_regress/t/t_property_fail_1.py
similarity index 93%
rename from test_regress/t/t_assert_property_fail_1.py
rename to test_regress/t/t_property_fail_1.py
index 64539f556..4caf548d3 100755
--- a/test_regress/t/t_assert_property_fail_1.py
+++ b/test_regress/t/t_property_fail_1.py
@@ -10,7 +10,7 @@
 import vltest_bootstrap
 
 test.scenarios('simulator')
-test.top_filename = "t/t_assert_property.v"
+test.top_filename = "t/t_property.v"
 
 test.compile(v_flags2=['+define+FAIL_ASSERT_1'], verilator_flags2=['--assert --cc'])
 
diff --git a/test_regress/t/t_assert_property_fail_2_bad.py b/test_regress/t/t_property_fail_2_bad.py
similarity index 93%
rename from test_regress/t/t_assert_property_fail_2_bad.py
rename to test_regress/t/t_property_fail_2_bad.py
index f89198139..b0a2ba504 100755
--- a/test_regress/t/t_assert_property_fail_2_bad.py
+++ b/test_regress/t/t_property_fail_2_bad.py
@@ -10,7 +10,7 @@
 import vltest_bootstrap
 
 test.scenarios('simulator')
-test.top_filename = "t/t_assert_property.v"
+test.top_filename = "t/t_property.v"
 
 test.compile(v_flags2=['+define+FAIL_ASSERT_2'], verilator_flags2=['--assert --cc'])
 
diff --git a/test_regress/t/t_assert_named_property.py b/test_regress/t/t_property_named.py
similarity index 100%
rename from test_regress/t/t_assert_named_property.py
rename to test_regress/t/t_property_named.py
diff --git a/test_regress/t/t_assert_named_property.v b/test_regress/t/t_property_named.v
similarity index 100%
rename from test_regress/t/t_assert_named_property.v
rename to test_regress/t/t_property_named.v
diff --git a/test_regress/t/t_assert_property_untyped.py b/test_regress/t/t_property_negated.py
similarity index 100%
rename from test_regress/t/t_assert_property_untyped.py
rename to test_regress/t/t_property_negated.py
diff --git a/test_regress/t/t_negated_property.v b/test_regress/t/t_property_negated.v
similarity index 100%
rename from test_regress/t/t_negated_property.v
rename to test_regress/t/t_property_negated.v
diff --git a/test_regress/t/t_property_pexpr_unsup.out b/test_regress/t/t_property_pexpr_unsup.out
new file mode 100644
index 000000000..52541ca1f
--- /dev/null
+++ b/test_regress/t/t_property_pexpr_unsup.out
@@ -0,0 +1,113 @@
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:25:13: Unsupported: strong (in property expression)
+   25 |       strong(a);
+      |             ^
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:29:11: Unsupported: weak (in property expression)
+   29 |       weak(a);
+      |           ^
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:33:9: Unsupported: until (in property expression)
+   33 |       a until b;
+      |         ^~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:37:9: Unsupported: s_until (in property expression)
+   37 |       a s_until b;
+      |         ^~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:41:9: Unsupported: until_with (in property expression)
+   41 |       a until_with b;
+      |         ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:45:9: Unsupported: s_until_with (in property expression)
+   45 |       a s_until_with b;
+      |         ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:49:9: Unsupported: implies (in property expression)
+   49 |       a implies b;
+      |         ^~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:53:9: Unsupported: #-# (in property expression)
+   53 |       a #-# b;
+      |         ^~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:57:9: Unsupported: #=# (in property expression)
+   57 |       a #=# b;
+      |         ^~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:61:7: Unsupported: nexttime (in property expression)
+   61 |       nexttime a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:65:7: Unsupported: nexttime[] (in property expression)
+   65 |       nexttime [2] a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:69:7: Unsupported: s_nexttime (in property expression)
+   69 |       s_nexttime a;
+      |       ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:73:7: Unsupported: s_nexttime[] (in property expression)
+   73 |       s_nexttime [2] a;
+      |       ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:16: Unsupported: always (in property expression)
+   77 |       nexttime always a;
+      |                ^~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:7: Unsupported: nexttime (in property expression)
+   77 |       nexttime always a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:20: Unsupported: always (in property expression)
+   81 |       nexttime [2] always a;
+      |                    ^~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:7: Unsupported: nexttime[] (in property expression)
+   81 |       nexttime [2] always a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:16: Unsupported: eventually (in property expression)
+   85 |       nexttime eventually a;
+      |                ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:7: Unsupported: nexttime (in property expression)
+   85 |       nexttime eventually a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:20: Unsupported: always (in property expression)
+   89 |       nexttime [2] always a;
+      |                    ^~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:7: Unsupported: nexttime[] (in property expression)
+   89 |       nexttime [2] always a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:16: Unsupported: s_eventually (in property expression)
+   93 |       nexttime s_eventually a;
+      |                ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:7: Unsupported: nexttime (in property expression)
+   93 |       nexttime s_eventually a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:35: Unsupported: always (in property expression)
+   97 |       nexttime s_eventually [2:$] always a;
+      |                                   ^~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:16: Unsupported: s_eventually[] (in property expression)
+   97 |       nexttime s_eventually [2:$] always a;
+      |                ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:7: Unsupported: nexttime (in property expression)
+   97 |       nexttime s_eventually [2:$] always a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:101:17: Unsupported: accept_on (in property expression)
+  101 |       accept_on (a) b;
+      |                 ^
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:105:22: Unsupported: sync_accept_on (in property expression)
+  105 |       sync_accept_on (a) b;
+      |                      ^
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:109:17: Unsupported: reject_on (in property expression)
+  109 |       reject_on (a) b;
+      |                 ^
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:113:22: Unsupported: sync_reject_on (in property expression)
+  113 |       sync_reject_on (a) b;
+      |                      ^
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:9: Unsupported: iff (in property expression)
+  117 |       a iff b;
+      |         ^~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:120:27: Unsupported: property argument data type
+  120 |    property p_arg_propery(property inprop);
+      |                           ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:123:27: Unsupported: sequence argument data type
+  123 |    property p_arg_seqence(sequence inseq);
+      |                           ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:128:7: Unsupported: property case expression
+  128 |       case (a) endcase
+      |       ^~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:131:7: Unsupported: property case expression
+  131 |       case (a) default: b; endcase
+      |       ^~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:134:7: Unsupported: property case expression
+  134 |       if (a) b
+      |       ^~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:137:7: Unsupported: property case expression
+  137 |       if (a) b else c
+      |       ^~
+%Error: Exiting due to
diff --git a/test_regress/t/t_assert_property_pexpr_unsup.py b/test_regress/t/t_property_pexpr_unsup.py
similarity index 100%
rename from test_regress/t/t_assert_property_pexpr_unsup.py
rename to test_regress/t/t_property_pexpr_unsup.py
diff --git a/test_regress/t/t_assert_property_pexpr_unsup.v b/test_regress/t/t_property_pexpr_unsup.v
similarity index 100%
rename from test_regress/t/t_assert_property_pexpr_unsup.v
rename to test_regress/t/t_property_pexpr_unsup.v
diff --git a/test_regress/t/t_property_recursive_unsup.out b/test_regress/t/t_property_recursive_unsup.out
new file mode 100644
index 000000000..a55a38ac1
--- /dev/null
+++ b/test_regress/t/t_property_recursive_unsup.out
@@ -0,0 +1,6 @@
+%Error-UNSUPPORTED: t/t_property_recursive_unsup.v:20:13: Unsupported: Recursive property call: 'check'
+                                                        : ... note: In instance 't'
+   20 |    property check(int n);
+      |             ^~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_assert_property_untyped_unsup.py b/test_regress/t/t_property_recursive_unsup.py
similarity index 100%
rename from test_regress/t/t_assert_property_untyped_unsup.py
rename to test_regress/t/t_property_recursive_unsup.py
diff --git a/test_regress/t/t_assert_recursive_property_unsup.v b/test_regress/t/t_property_recursive_unsup.v
similarity index 100%
rename from test_regress/t/t_assert_recursive_property_unsup.v
rename to test_regress/t/t_property_recursive_unsup.v
diff --git a/test_regress/t/t_negated_property.py b/test_regress/t/t_property_untyped.py
similarity index 100%
rename from test_regress/t/t_negated_property.py
rename to test_regress/t/t_property_untyped.py
diff --git a/test_regress/t/t_assert_property_untyped.v b/test_regress/t/t_property_untyped.v
similarity index 100%
rename from test_regress/t/t_assert_property_untyped.v
rename to test_regress/t/t_property_untyped.v
diff --git a/test_regress/t/t_assert_property_untyped_unsup.out b/test_regress/t/t_property_untyped_unsup.out
similarity index 71%
rename from test_regress/t/t_assert_property_untyped_unsup.out
rename to test_regress/t/t_property_untyped_unsup.out
index e9985890c..5b663f222 100644
--- a/test_regress/t/t_assert_property_untyped_unsup.out
+++ b/test_regress/t/t_property_untyped_unsup.out
@@ -1,4 +1,4 @@
-%Error-UNSUPPORTED: t/t_assert_property_untyped_unsup.v:20:52: Untyped property port following a typed port
+%Error-UNSUPPORTED: t/t_property_untyped_unsup.v:20:52: Untyped property port following a typed port
    20 |    property check(cyc_mod_2, logic [4:0] expected, arg3, untyped arg4, arg5);
       |                                                    ^~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
diff --git a/test_regress/t/t_assert_recursive_property_unsup.py b/test_regress/t/t_property_untyped_unsup.py
similarity index 100%
rename from test_regress/t/t_assert_recursive_property_unsup.py
rename to test_regress/t/t_property_untyped_unsup.py
diff --git a/test_regress/t/t_assert_property_untyped_unsup.v b/test_regress/t/t_property_untyped_unsup.v
similarity index 100%
rename from test_regress/t/t_assert_property_untyped_unsup.v
rename to test_regress/t/t_property_untyped_unsup.v
diff --git a/test_regress/t/t_assert_property_var_unsup.out b/test_regress/t/t_property_var_unsup.out
similarity index 54%
rename from test_regress/t/t_assert_property_var_unsup.out
rename to test_regress/t/t_property_var_unsup.out
index 8e61022c7..fb7fb50db 100644
--- a/test_regress/t/t_assert_property_var_unsup.out
+++ b/test_regress/t/t_property_var_unsup.out
@@ -1,15 +1,15 @@
-%Error-UNSUPPORTED: t/t_assert_property_var_unsup.v:17:11: Unsupported: property variable declaration
+%Error-UNSUPPORTED: t/t_property_var_unsup.v:17:11: Unsupported: property variable declaration
    17 |       int prevcyc;
       |           ^~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_assert_property_var_unsup.v:18:7: syntax error, unexpected '(', expecting endproperty
+%Error: t/t_property_var_unsup.v:18:7: syntax error, unexpected '(', expecting endproperty
    18 |       (valid, prevcyc = cyc) |=> (cyc == prevcyc + 1);
       |       ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error-UNSUPPORTED: t/t_assert_property_var_unsup.v:24:31: Unsupported: property variable default value
+%Error-UNSUPPORTED: t/t_property_var_unsup.v:24:31: Unsupported: property variable default value
    24 |    property with_def(int nine = 9);
       |                               ^
-%Error: Internal Error: t/t_assert_property_var_unsup.v:7:8: ../V3ParseSym.h:#: Symbols suggest ending PROPERTY 'prop' but parser thinks ending MODULE 't'
+%Error: Internal Error: t/t_property_var_unsup.v:7:8: ../V3ParseSym.h:#: Symbols suggest ending PROPERTY 'prop' but parser thinks ending MODULE 't'
     7 | module t ( 
       |        ^
                         ... This fatal error may be caused by the earlier error(s); resolve those first.
diff --git a/test_regress/t/t_assert_property_var_unsup.py b/test_regress/t/t_property_var_unsup.py
similarity index 100%
rename from test_regress/t/t_assert_property_var_unsup.py
rename to test_regress/t/t_property_var_unsup.py
diff --git a/test_regress/t/t_assert_property_var_unsup.v b/test_regress/t/t_property_var_unsup.v
similarity index 100%
rename from test_regress/t/t_assert_property_var_unsup.v
rename to test_regress/t/t_property_var_unsup.v
diff --git a/test_regress/t/t_pub_unpacked_port.py b/test_regress/t/t_public_unpacked_port.py
similarity index 100%
rename from test_regress/t/t_pub_unpacked_port.py
rename to test_regress/t/t_public_unpacked_port.py
diff --git a/test_regress/t/t_pub_unpacked_port.v b/test_regress/t/t_public_unpacked_port.v
similarity index 100%
rename from test_regress/t/t_pub_unpacked_port.v
rename to test_regress/t/t_public_unpacked_port.v

From aee5051526414af60ce50ad9d31985e405fdb80e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 11 May 2025 17:43:48 -0400
Subject: [PATCH 058/211] CI: Reduce action permissions per best practices

---
 .github/workflows/build.yml                 | 3 +++
 .github/workflows/contributor.yml           | 2 ++
 .github/workflows/coverage.yml              | 3 +++
 .github/workflows/docker.yml                | 3 +++
 .github/workflows/format.yml                | 2 ++
 .github/workflows/msbuild.yml               | 2 ++
 .github/workflows/reusable-rtlmeter-run.yml | 2 +-
 .github/workflows/rtlmeter.yml              | 9 +++++----
 8 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index d90bc3241..f5d4e7978 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -12,6 +12,9 @@ on:
   schedule:
     - cron: '0 0 * * 0'  # weekly
 
+permissions:
+  contents: read
+
 defaults:
   run:
     shell: bash
diff --git a/.github/workflows/contributor.yml b/.github/workflows/contributor.yml
index 6485aaf48..64128c3b8 100644
--- a/.github/workflows/contributor.yml
+++ b/.github/workflows/contributor.yml
@@ -7,6 +7,8 @@ on:
   push:
   pull_request:
   workflow_dispatch:
+permissions:
+  contents: read
 jobs:
   Test:
     name: "'docs/CONTRIBUTORS' was signed"
diff --git a/.github/workflows/coverage.yml b/.github/workflows/coverage.yml
index 5fb56e65a..970b93efb 100644
--- a/.github/workflows/coverage.yml
+++ b/.github/workflows/coverage.yml
@@ -9,6 +9,9 @@ on:
   schedule:
     - cron: '0 0 * * 0'  # weekly
 
+permissions:
+  contents: read
+
 env:
   CI_OS_NAME: linux
   CI_COMMIT: ${{ github.sha }}
diff --git a/.github/workflows/docker.yml b/.github/workflows/docker.yml
index af7a21502..fa59cadb2 100644
--- a/.github/workflows/docker.yml
+++ b/.github/workflows/docker.yml
@@ -22,6 +22,9 @@ on:
         type: boolean
         default: false
 
+permissions:
+  contents: write
+
 jobs:
 
   build:
diff --git a/.github/workflows/format.yml b/.github/workflows/format.yml
index 4fbd884c5..ba0d6a892 100644
--- a/.github/workflows/format.yml
+++ b/.github/workflows/format.yml
@@ -7,6 +7,8 @@ on:
   push:
   pull_request_target:
   workflow_dispatch:
+permissions:
+  contents: write
 jobs:
   format:
     runs-on: ubuntu-22.04
diff --git a/.github/workflows/msbuild.yml b/.github/workflows/msbuild.yml
index b7e5677c6..4555e497d 100644
--- a/.github/workflows/msbuild.yml
+++ b/.github/workflows/msbuild.yml
@@ -10,6 +10,8 @@ on:
   workflow_dispatch:
   schedule:
     - cron: 0 0 * * 0  # weekly
+permissions:
+  contents: read
 env:
   CI_OS_NAME: win
   CI_COMMIT: ${{ github.sha }}
diff --git a/.github/workflows/reusable-rtlmeter-run.yml b/.github/workflows/reusable-rtlmeter-run.yml
index 12f73a3de..e3d62fd3b 100644
--- a/.github/workflows/reusable-rtlmeter-run.yml
+++ b/.github/workflows/reusable-rtlmeter-run.yml
@@ -84,7 +84,7 @@ jobs:
 
       - name: Execute cases
         working-directory: rtlmeter
-        continue-on-error: true # Do not fail on error, so we can at leat save the successful results
+        continue-on-error: true  # Do not fail on error, so we can at leat save the successful results
         run: |
           ./rtlmeter run --verbose --cases='${{ inputs.cases }}' --compileArgs='${{ inputs.compileArgs }}' --executeArgs='${{ inputs.executeArgs }}'
           # My YAML highlighter sucks, so I put this comment here wiht a phony closing quote mark to make it work: '
diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index cb2e43edf..549da1950 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -10,6 +10,9 @@ on:
   schedule:
     - cron: '0 2 * * *'  # Daily, starting at 02:00 UTC
 
+permissions:
+  contents: read
+
 defaults:
   run:
     shell: bash
@@ -115,10 +118,8 @@ jobs:
 
   combine-results:
     name: Combine results
-    needs:
-      - run-gcc
-      - run-clang
-    if: ${{ always() }} # Run even if dependencies failed
+    needs: [run-gcc, run-clang]
+    if: ${{ always() }}  # Run even if dependencies failed
     runs-on: ubuntu-24.04
     steps:
       - name: Download all GCC results

From 8100bc64a0984efb14312c3443719ae1d5c4c7af Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 11 May 2025 22:36:16 -0400
Subject: [PATCH 059/211] Commentary

---
 bin/verilator                |  6 ++--
 docs/guide/exe_verilator.rst | 56 +++++++++++++++++++-----------------
 docs/guide/files.rst         |  4 +--
 3 files changed, 35 insertions(+), 31 deletions(-)

diff --git a/bin/verilator b/bin/verilator
index 89c18ea6f..777947dce 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -390,8 +390,8 @@ detailed descriptions of these arguments.
     --no-json-edit-nums         Don't dump editNum in .tree.json files
     --no-json-ids               Don't use short identifiers instead of adresses/paths in .tree.json
     --json-only                 Create JSON parser output (.tree.json and .meta.json)
-    --json-only-meta-output     .tree.meta.json output filename
-    --json-only-output          .tree.json output filename
+    --json-only-meta-output <filename>  Set .tree.meta.json output filename
+    --json-only-output <filename>       Set .tree.json output filename
     --l2-name <value>           Verilog scope name of the top module
     --language <lang>           Default language standard to parse
      -LDFLAGS <flags>           Linker pre-object arguments for makefile
@@ -448,7 +448,7 @@ detailed descriptions of these arguments.
     --quiet-exit                Don't print the command on failure
     --quiet-stats               Don't print statistics
     --relative-includes         Resolve includes relative to current file
-    --reloop-limit              Minimum iterations for forming loops
+    --reloop-limit <value>      Minimum iterations for forming loops
     --report-unoptflat          Extra diagnostics for UNOPTFLAT
     --rr                        Run Verilator and record with rr
     --runtime-debug             Enable model runtime debugging
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index ef956e3fd..debb506f8 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -446,9 +446,9 @@ Summary:
 
 .. option:: --dump-tree-dot
 
-   Rarely needed.  Enable dumping Ast .tree.dot debug files in Graphviz
-   Dot format. This option implies :vlopt:`--dump-tree`, unless
-   :vlopt:`--dumpi-tree` was passed explicitly.
+   Rarely needed - for developer use.  Enable dumping Ast .tree.dot debug
+   files in Graphviz Dot format. This option implies :vlopt:`--dump-tree`,
+   unless :vlopt:`--dumpi-tree` was passed explicitly.
 
 .. option:: --dump-tree-json
 
@@ -568,9 +568,9 @@ Summary:
 
 .. option:: -fno-const-before-dfg
 
-   Do not apply any global expression folding prior to the DFG pass. This
-   option is solely for the purpose of DFG testing and should not be used
-   otherwise.
+   Rarely needed. Do not apply any global expression folding prior to the
+   DFG pass. This option is solely for the purpose of DFG testing and
+   should not be used otherwise.
 
 .. option:: -fno-const-bit-op-tree
 
@@ -578,24 +578,25 @@ Summary:
 
 .. option:: -fno-dfg
 
-   Disable all use of the DFG-based combinational logic optimizer.
-   Alias for :vlopt:`-fno-dfg-pre-inline` and :vlopt:`-fno-dfg-post-inline`.
+   Rarely needed. Disable all use of the DFG-based combinational logic
+   optimizer.  Alias for :vlopt:`-fno-dfg-pre-inline` and
+   :vlopt:`-fno-dfg-post-inline`.
 
 .. option:: -fno-dfg-peephole
 
-   Disable the DFG peephole optimizer.
+   Rarely needed. Disable the DFG peephole optimizer.
 
 .. option:: -fno-dfg-peephole-<pattern>
 
-   Disable individual DFG peephole optimizer pattern.
+   Rarely needed. Disable individual DFG peephole optimizer pattern.
 
 .. option:: -fno-dfg-post-inline
 
-   Do not apply the DFG optimizer after inlining.
+   Rarely needed. Do not apply the DFG optimizer after inlining.
 
 .. option:: -fno-dfg-pre-inline
 
-   Do not apply the DFG optimizer before inlining.
+   Rarely needed. Do not apply the DFG optimizer before inlining.
 
 .. option:: -fno-expand
 
@@ -647,8 +648,9 @@ Summary:
 
 .. option:: -fno-var-split
 
-   Do not attempt to split variables automatically. Variables explicitly
-   annotated with :option:`/*verilator&32;split_var*/` are still split.
+   Rarely needed. Do not attempt to split variables
+   automatically. Variables explicitly annotated with
+   :option:`/*verilator&32;split_var*/` are still split.
 
 .. option:: -future0 <option>
 
@@ -754,10 +756,10 @@ Summary:
 
 .. option:: --hierarchical-params-file <filename>
 
-   Internal flag inserted used during :vlopt:`--hierarchical`; specifies
-   name of hierarchical parameters file for deparametrized modules with
-   :option:`/*verilator&32;hier_block*/` metacomment. See
-   :ref:`Hierarchical Verilation`.
+   Rarely needed - internal use. Internal flag inserted used during
+   :vlopt:`--hierarchical`; specifies name of hierarchical parameters file
+   for deparametrized modules with :option:`/*verilator&32;hier_block*/`
+   metacomment. See :ref:`Hierarchical Verilation`.
 
 .. option:: -I<dir>
 
@@ -828,13 +830,15 @@ Summary:
 
 .. option:: --json-only-meta-output <filename>
 
-   Specifies the filename for the metadata output file (`.tree.meta.json`) of --json-only.
-   Using this option automatically sets :vlopt:`--json-only`.
+   Specifies the filename for the metadata output file (`.tree.meta.json`)
+   of :vlopt:`--json-only`.  Using this option automatically sets
+   :vlopt:`--json-only`.
 
 .. option:: --json-only-output <filename>
 
-   Specifies the filename for the main output file (`.tree.json`) of --json-only.
-   Using this option automatically sets :vlopt:`--json-only`.
+   Specifies the filename for the main output file (`.tree.json`) of
+   :vlopt:`--json-only`.  Using this option automatically sets
+   :vlopt:`--json-only`.
 
 .. option:: --l2-name <value>
 
@@ -960,7 +964,7 @@ Summary:
 
 .. option:: --max-num-width <value>
 
-   Set the maximum number literal width (e.g., in 1024'd22 this
+   Set the maximum number literal width (e.g., in 1024'd22 the
    1024).  Defaults to 64K.
 
 .. option:: --Mdir <directory>
@@ -1188,8 +1192,8 @@ Summary:
 
 .. option:: --private
 
-   Opposite of :vlopt:`--public`.  This is the default; this option exists for
-   backwards compatibility.
+   Rarely needed. Opposite of :vlopt:`--public`.  This is the default; this
+   option exists for backwards compatibility.
 
 .. option:: --prof-c
 
@@ -1344,7 +1348,7 @@ Summary:
    the path of the referencing file, instead of relative to the current
    directory.
 
-.. option:: --reloop-limit
+.. option:: --reloop-limit <value>
 
    Rarely needed. Verilator attempts to turn some common sequences of
    statements into loops in the output. This argument specifies the minimum
diff --git a/docs/guide/files.rst b/docs/guide/files.rst
index 1b33c259b..18d543dfd 100644
--- a/docs/guide/files.rst
+++ b/docs/guide/files.rst
@@ -112,12 +112,12 @@ In specific debug and other modes, it also creates:
 
 .. list-table::
 
-   * - *{prefix}*\ .xml
-     - XML tree information (from --xml)
    * - *{prefix}*\ .tree.json
      - JSON tree information (from --json-only)
    * - *{prefix}*\ .tree.meta.json
      - JSON tree metadata (from --json-only)
+   * - *{prefix}*\ .xml
+     - XML tree information (from --xml)
    * - *{prefix}*\ __cdc.txt
      - Clock Domain Crossing checks (from --cdc)
    * - *{prefix}*\ __stats.txt

From ac2313ecb780213aaa23ceae048909bf25551126 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 11 May 2025 22:36:40 -0400
Subject: [PATCH 060/211] Fix some errors exceeding the --error-limit

---
 src/V3Error.cpp | 19 ++++++++++++++++++-
 src/V3Error.h   | 14 ++------------
 2 files changed, 20 insertions(+), 13 deletions(-)

diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 87f355915..1587c8b79 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -131,14 +131,31 @@ void V3ErrorGuarded::v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex) {
     m_errorSuppressed = false;
 }
 
-// cppcheck-has-bug-suppress constParameter
 void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
+    VL_REQUIRES(m_mutex) {
+    static bool s_firedTooMany = false;
+    v3errorEndGuts(sstr, extra);
+    if (errorLimit() && errorCount() >= errorLimit() && !s_firedTooMany) {
+        s_firedTooMany = true;
+        // Recurses here
+        v3errorEnd((v3errorPrep(V3ErrorCode::EC_FATALMANY),
+                    (v3errorStr() << "Exiting due to too many errors encountered; --error-limit="
+                                  << errorCount() << std::endl),
+                    v3errorStr()));
+        assert(0);  // LCOV_EXCL_LINE
+        VL_UNREACHABLE;
+    }
+}
+
+// cppcheck-has-bug-suppress constParameter
+void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extra)
     VL_REQUIRES(m_mutex) {
     // 'extra' is appended to the message, and is is excluded in check for
     // duplicate messages. Currently used for reporting instance name.
 #if defined(__COVERITY__) || defined(__cppcheck__)
     if (m_errorCode == V3ErrorCode::EC_FATAL) __coverity_panic__(x);
 #endif
+
     // Skip suppressed messages
     if (m_errorSuppressed
         // On debug, show only non default-off warning to prevent pages of warnings
diff --git a/src/V3Error.h b/src/V3Error.h
index 5989b6ffc..445c302f5 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -344,6 +344,7 @@ private:
     void v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex);
     std::ostringstream& v3errorStr() VL_REQUIRES(m_mutex) { return m_errorStr; }
     void v3errorEnd(std::ostringstream& sstr, const string& extra = "") VL_REQUIRES(m_mutex);
+    void v3errorEndGuts(std::ostringstream& sstr, const string& extra) VL_REQUIRES(m_mutex);
 
 public:
     V3RecursiveMutex m_mutex;  // Make sure only single thread is in class
@@ -359,18 +360,7 @@ public:
     void vlAbortOrExit() VL_REQUIRES(m_mutex);
     void errorContexted(bool flag) VL_REQUIRES(m_mutex) { m_errorContexted = flag; }
     void incWarnings() VL_REQUIRES(m_mutex) { ++m_warnCount; }
-    void incErrors() VL_REQUIRES(m_mutex) {
-        ++m_errCount;
-        if (errorCount() == errorLimit()) {  // Not >= as would otherwise recurse
-            v3errorEnd(
-                (v3errorPrep(V3ErrorCode::EC_FATALMANY),
-                 (v3errorStr() << "Exiting due to too many errors encountered; --error-limit="
-                               << errorCount() << std::endl),
-                 v3errorStr()));
-            assert(0);  // LCOV_EXCL_LINE
-            VL_UNREACHABLE;
-        }
-    }
+    void incErrors() VL_REQUIRES(m_mutex) { ++m_errCount; }
     int errorCount() VL_REQUIRES(m_mutex) { return m_errCount; }
     bool pretendError(int errorCode) VL_REQUIRES(m_mutex) { return m_pretendError[errorCode]; }
     void pretendError(V3ErrorCode code, bool flag) VL_REQUIRES(m_mutex) {

From 91c52a49725e4d086cd2ddffbb504f3c45dbe7c3 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Tue, 13 May 2025 01:19:38 +0200
Subject: [PATCH 061/211] Support for assignments to concatenations with impure
 RHS (#6002)

---
 src/V3Const.cpp                   | 31 ++++++++++++++++++++++++++-----
 test_regress/t/t_concat_impure.py | 18 ++++++++++++++++++
 test_regress/t/t_concat_impure.v  | 27 +++++++++++++++++++++++++++
 3 files changed, 71 insertions(+), 5 deletions(-)
 create mode 100755 test_regress/t/t_concat_impure.py
 create mode 100644 test_regress/t/t_concat_impure.v

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 3ce2f1087..d379a27a5 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -2077,20 +2077,41 @@ class ConstVisitor final : public VNVisitor {
                 VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 return true;
             }
-        } else if (m_doV && VN_IS(nodep->lhsp(), Concat) && nodep->isPure()) {
+        } else if (m_doV && VN_IS(nodep->lhsp(), Concat)) {
             bool need_temp = false;
-            if (m_warn && !VN_IS(nodep, AssignDly)) {  // Is same var on LHS and RHS?
+            bool need_temp_pure = !nodep->rhsp()->isPure();
+            if (m_warn && !VN_IS(nodep, AssignDly)
+                && !need_temp_pure) {  // Is same var on LHS and RHS?
                 // Note only do this (need user4) when m_warn, which is
                 // done as unique visitor
+                // If the rhs is not pure, we need a temporary variable anyway
                 const VNUser4InUse m_inuser4;
                 nodep->lhsp()->foreach([](const AstVarRef* nodep) {
-                    if (nodep->varp()) nodep->varp()->user4(1);
+                    UASSERT_OBJ(nodep->varp(), nodep, "Unlinked VarRef");
+                    nodep->varp()->user4(1);
                 });
                 nodep->rhsp()->foreach([&need_temp](const AstVarRef* nodep) {
-                    if (nodep->varp() && nodep->varp()->user4()) need_temp = true;
+                    UASSERT_OBJ(nodep->varp(), nodep, "Unlinked VarRef");
+                    if (nodep->varp()->user4()) need_temp = true;
                 });
             }
-            if (need_temp) {
+            if (need_temp_pure) {
+                // if the RHS is impure we need to create a temporary variable for it, because
+                // further handling involves copying of the RHS.
+                UINFO(4, "  ASSITEMPPURE " << nodep << endl);
+                // ASSIGN(CONCAT(lc1,lc2),rhs) -> ASSIGN(temp,rhs),
+                //                                ASSIGN(lc1,SEL(temp,{size1})),
+                //                                ASSIGN(lc2,SEL(temp,{size2}))
+
+                AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
+                AstVar* const tempPurep = new AstVar{rhsp->fileline(), VVarType::BLOCKTEMP,
+                                                     m_concswapNames.get(rhsp), rhsp->dtypep()};
+                m_modp->addStmtsp(tempPurep);
+                AstNodeAssign* const asnp = nodep->cloneType(
+                    new AstVarRef{rhsp->fileline(), tempPurep, VAccess::WRITE}, rhsp);
+                nodep->addHereThisAsNext(asnp);
+                nodep->rhsp(new AstVarRef{rhsp->fileline(), tempPurep, VAccess::READ});
+            } else if (need_temp) {
                 // The first time we constify, there may be the same variable on the LHS
                 // and RHS.  In that case, we must use temporaries, or {a,b}={b,a} will break.
                 UINFO(4, "  ASSITEMP " << nodep << endl);
diff --git a/test_regress/t/t_concat_impure.py b/test_regress/t/t_concat_impure.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_concat_impure.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_concat_impure.v b/test_regress/t/t_concat_impure.v
new file mode 100644
index 000000000..64bb7e0bd
--- /dev/null
+++ b/test_regress/t/t_concat_impure.v
@@ -0,0 +1,27 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+int global_variable = 0;
+
+function int side_effect;
+   global_variable++;
+  return 1;
+endfunction
+
+module t (/*AUTOARG*/);
+   reg [15:0] x;
+   reg [15:0] y;
+   initial begin
+      {x, y} = side_effect() + 2;
+
+      if (y != 3) $stop;
+      if (x != 0) $stop;
+      if (global_variable != 1) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 3dfd53a549f656a96d7f0b081c6e8e29dd63ee65 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 13 May 2025 22:21:21 -0400
Subject: [PATCH 062/211] CI: Move coverage + contributor actions to 24.04

---
 .github/workflows/contributor.yml | 2 +-
 .github/workflows/coverage.yml    | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/contributor.yml b/.github/workflows/contributor.yml
index 64128c3b8..9731a0c5b 100644
--- a/.github/workflows/contributor.yml
+++ b/.github/workflows/contributor.yml
@@ -12,7 +12,7 @@ permissions:
 jobs:
   Test:
     name: "'docs/CONTRIBUTORS' was signed"
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
     steps:
       - uses: actions/checkout@v4
       - run: test_regress/t/t_dist_contributors.py
diff --git a/.github/workflows/coverage.yml b/.github/workflows/coverage.yml
index 970b93efb..af79c09b6 100644
--- a/.github/workflows/coverage.yml
+++ b/.github/workflows/coverage.yml
@@ -26,10 +26,10 @@ defaults:
 jobs:
 
   Build:
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
     env:
       CI_BUILD_STAGE_NAME: build
-      CI_RUNS_ON: ubuntu-22.04
+      CI_RUNS_ON: ubuntu-24.04
     steps:
 
       - name: Checkout
@@ -62,11 +62,11 @@ jobs:
         num: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9]
         include:
           - {test: dist, num: ''}
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
     name: test-${{ matrix.test }}${{ matrix.num }}
     env:
       CI_BUILD_STAGE_NAME: test
-      CI_RUNS_ON: ubuntu-22.04
+      CI_RUNS_ON: ubuntu-24.04
     steps:
 
       - name: Download tar archive

From 4c4fdb5dfef68a45fc9dc4c4557ac41089a09ce9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 13 May 2025 22:26:15 -0400
Subject: [PATCH 063/211] Internals: Refactor some JSON and error code

---
 src/V3Ast.cpp      |  2 +-
 src/V3Error.cpp    | 20 +++++----------
 src/V3Error.h      | 10 ++++++++
 src/V3File.h       | 63 ++++++++++++++++++++++------------------------
 src/V3FileLine.cpp |  1 +
 src/V3Graph.cpp    |  5 +---
 src/V3Width.cpp    |  9 +++----
 7 files changed, 53 insertions(+), 57 deletions(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index c630c96fc..f83f60fd0 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1461,7 +1461,7 @@ void AstNode::v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().
             nsstr << '\n';
             nsstr << "-node: ";
             const_cast<AstNode*>(this)->dump(nsstr);
-            nsstr << endl;
+            nsstr << '\n';
         }
         m_fileline->v3errorEnd(nsstr, instanceStrExtra);
     }
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 1587c8b79..7a190c349 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -50,7 +50,7 @@ V3ErrorCode::V3ErrorCode(const char* msgp) {
 }
 
 string V3ErrorCode::url() const {
-    if (m_e < V3ErrorCode::EC_FIRST_NAMED) {
+    if (!isNamed()) {
         return "https://verilator.org/verilator_doc.html"s + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
     } else {
         return "https://verilator.org/warn/"s + ascii() + "?v=" + PACKAGE_VERSION_NUMBER_STRING;
@@ -64,7 +64,7 @@ string V3ErrorCode::url() const {
 bool V3ErrorGuarded::isError(V3ErrorCode code, bool supp) VL_REQUIRES(m_mutex) {
     if (code.hardError()) return true;
     if (supp) return false;
-    if (code == V3ErrorCode::USERINFO || code == V3ErrorCode::EC_INFO) return false;
+    if (code.severityInfo()) return false;
     if (pretendError(code)) return true;
     return false;
 }
@@ -74,9 +74,7 @@ string V3ErrorGuarded::msgPrefix() VL_REQUIRES(m_mutex) {
     const bool supp = m_errorSuppressed;
     if (supp) {
         return "-arning-suppressed: ";
-    } else if (code == V3ErrorCode::USERINFO) {
-        return "-Info: ";
-    } else if (code == V3ErrorCode::EC_INFO) {
+    } else if (code.severityInfo()) {
         return "-Info: ";
     } else if (code == V3ErrorCode::EC_FATAL) {
         return "%Error: ";
@@ -208,8 +206,7 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
     ) {
         std::cerr << msg;
     }
-    if (!m_errorSuppressed
-        && !(m_errorCode == V3ErrorCode::EC_INFO || m_errorCode == V3ErrorCode::USERINFO)) {
+    if (!m_errorSuppressed && !m_errorCode.severityInfo()) {
         const bool anError = isError(m_errorCode, m_errorSuppressed);
         if (m_errorCode != V3ErrorCode::EC_FATALMANY  // Not verbose on final too-many-errors error
             && !m_describedEachWarn[m_errorCode]) {
@@ -217,11 +214,7 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
             if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED) {
                 std::cerr << warnMoreSpaces() << "... For " << (anError ? "error" : "warning")
                           << " description see " << m_errorCode.url() << endl;
-            } else if (m_errCount >= 1
-                       && (m_errorCode == V3ErrorCode::EC_FATAL
-                           || m_errorCode == V3ErrorCode::EC_FATALMANY
-                           || m_errorCode == V3ErrorCode::EC_FATALSRC)
-                       && !m_tellInternal) {
+            } else if (m_errCount >= 1 && m_errorCode.severityFatal() && !m_tellInternal) {
                 m_tellInternal = true;
                 std::cerr << warnMoreSpaces()
                           << "... This fatal error may be caused by the earlier error(s);"
@@ -250,8 +243,7 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
         } else {
             incWarnings();
         }
-        if (m_errorCode == V3ErrorCode::EC_FATAL || m_errorCode == V3ErrorCode::EC_FATALMANY
-            || m_errorCode == V3ErrorCode::EC_FATALSRC) {
+        if (m_errorCode.severityFatal()) {
             static bool inFatal = false;
             if (!inFatal) {
                 inFatal = true;
diff --git a/src/V3Error.h b/src/V3Error.h
index 445c302f5..f9132b491 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -234,6 +234,15 @@ public:
     bool hardError() const VL_MT_SAFE {
         return (m_e != EC_INFO && m_e < V3ErrorCode::EC_FIRST_WARN);
     }
+    // Warning is fatal error, don't continue
+    bool severityFatal() const VL_MT_SAFE {
+        return m_e == V3ErrorCode::EC_FATAL || m_e == V3ErrorCode::EC_FATALMANY
+               || m_e == V3ErrorCode::EC_FATALSRC;
+    }
+    // Warning is -Info informational
+    bool severityInfo() const VL_MT_SAFE {
+        return m_e == V3ErrorCode::USERINFO || m_e == V3ErrorCode::EC_INFO;
+    }
     // Warnings we'll present to the user as errors
     // Later -Werror- options may make more of these.
     bool pretendError() const VL_MT_SAFE {
@@ -279,6 +288,7 @@ public:
         if (m_e == LITENDIAN) return V3ErrorCode{ASCRANGE};
         return V3ErrorCode{EC_MIN};  // Not renamed; see isRenamed()
     }
+    bool isNamed() const { return m_e >= EC_FIRST_NAMED; }
     bool isRenamed() const { return renamedTo() != V3ErrorCode{EC_MIN}; }
     bool isUnder(V3ErrorCode other) {
         // backwards compatibility inheritance-like warnings
diff --git a/src/V3File.h b/src/V3File.h
index 3a28ef92e..1470ec4eb 100644
--- a/src/V3File.h
+++ b/src/V3File.h
@@ -296,7 +296,10 @@ public:
         : V3OutFile{filename, V3OutFormatter::LA_JSON} {
         begin();
     }
-    ~V3OutJsonFile() override { end(); }
+    ~V3OutJsonFile() override {
+        end();
+        puts("\n");
+    }
     virtual void putsHeader() {}
     void puts(const char* strg) { putsNoTracking(strg); }
     void puts(const string& strg) { putsNoTracking(strg); }
@@ -317,43 +320,25 @@ public:
         return *this;
     }
 
+    // Put a named value
+    V3OutJsonFile& put(const std::string& name, const char* valuep) {
+        return putNamed(name, std::string{valuep}, true);
+    }
     V3OutJsonFile& put(const std::string& name, const std::string& value) {
-        comma();
-        puts(m_prefix + "\"" + name + "\": \"" + value + "\"");
-        m_empty = false;
-        return *this;
+        return putNamed(name, value, true);
     }
     V3OutJsonFile& put(const std::string& name, bool value) {
-        comma();
-        puts(m_prefix + "\"" + name + "\": " + (value ? "true" : "false"));
-        m_empty = false;
-        return *this;
+        return putNamed(name, value ? "true" : "false", false);
     }
     V3OutJsonFile& put(const std::string& name, int value) {
-        comma();
-        puts(m_prefix + "\"" + name + "\": " + std::to_string(value));
-        m_empty = false;
-        return *this;
-    }
-    V3OutJsonFile& put(const std::string& value) {
-        comma();
-        puts(m_prefix + "\"" + value + "\"");
-        m_empty = false;
-        return *this;
-    }
-    V3OutJsonFile& put(bool value) {
-        comma();
-        puts(m_prefix + (value ? "true" : "false"));
-        m_empty = false;
-        return *this;
-    }
-    V3OutJsonFile& put(int value) {
-        comma();
-        puts(m_prefix + std::to_string(value));
-        m_empty = false;
-        return *this;
+        return putNamed(name, std::to_string(value), false);
     }
 
+    // Put unnamed value
+    V3OutJsonFile& put(const std::string& value) { return putNamed("", value, true); }
+    V3OutJsonFile& put(bool value) { return putNamed("", value ? "true" : "false", false); }
+    V3OutJsonFile& put(int value) { return putNamed("", std::to_string(value), false); }
+
     template <typename T>
     V3OutJsonFile& putList(const std::string& name, const T& list) {
         if (list.empty()) return *this;
@@ -363,9 +348,9 @@ public:
     }
 
     V3OutJsonFile& end() {
-        assert(m_prefix.length() >= strlen(INDENT));
+        UASSERT(m_prefix.length() >= strlen(INDENT), "prefix underflow");
         m_prefix.erase(m_prefix.end() - strlen(INDENT), m_prefix.end());
-        assert(!m_scope.empty());
+        UASSERT(!m_scope.empty(), "end() without begin()");
         puts("\n" + m_prefix + m_scope.top());
         m_scope.pop();
         return *this;
@@ -381,6 +366,18 @@ private:
         if (!m_empty) puts(",\n");
         m_empty = true;
     }
+    V3OutJsonFile& putNamed(const std::string& name, const std::string& value, bool quoted) {
+        comma();
+        const string valueQ
+            = quoted ? "\""s + V3OutFormatter::quoteNameControls(value) + "\"" : value;
+        if (name.empty()) {
+            puts(m_prefix + valueQ);
+        } else {
+            puts(m_prefix + "\"" + name + "\": " + valueQ);
+        }
+        m_empty = false;
+        return *this;
+    }
 };
 
 class V3OutMkFile final : public V3OutFile {
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 94509087c..72daf9d05 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -524,6 +524,7 @@ string FileLine::warnContextParent() const VL_REQUIRES(V3Error::s().m_mutex) {
     }
     return result;
 }
+
 #ifdef VL_LEAK_CHECKS
 std::unordered_set<FileLine*> fileLineLeakChecks;
 
diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp
index de1d19ca9..6b7b79dd9 100644
--- a/src/V3Graph.cpp
+++ b/src/V3Graph.cpp
@@ -108,10 +108,7 @@ template V3GraphEdge* V3GraphVertex::findConnectingEdgep<GraphWay::REVERSE>(V3Gr
 void V3GraphVertex::v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().m_mutex) {
     std::ostringstream nsstr;
     nsstr << str.str();
-    if (debug()) {
-        nsstr << endl;
-        nsstr << "-vertex: " << this << endl;
-    }
+    if (debug()) nsstr << "\n-vertex: " << this << '\n';
     if (FileLine* const flp = fileline()) {
         flp->v3errorEnd(nsstr);
     } else {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 9f7e85728..9e307391c 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -108,11 +108,10 @@ std::ostream& operator<<(std::ostream& str, const Determ& rhs) {
 }
 
 #define v3widthWarn(lhs, rhs, msg) \
-    v3errorEnd( \
-        v3errorBuildMessage(V3Error::v3errorPrep((lhs) < (rhs)   ? V3ErrorCode::WIDTHTRUNC \
-                                                 : (lhs) > (rhs) ? V3ErrorCode::WIDTHEXPAND \
-                                                                 : V3ErrorCode::WIDTH), \
-                            msg))
+    v3warnCode(((lhs) < (rhs)   ? V3ErrorCode::WIDTHTRUNC \
+                : (lhs) > (rhs) ? V3ErrorCode::WIDTHEXPAND \
+                                : V3ErrorCode::WIDTH), \
+               msg)
 
 //######################################################################
 // Width state, as a visitor of each AstNode

From 2f6ecd1853d612a06f848540ca6026c5354859ba Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Wed, 14 May 2025 13:33:20 +0100
Subject: [PATCH 064/211] Fix folding of LteS in DfgPeephole (#6004)

Fixes #6000
---
 src/V3DfgPeephole.cpp           | 2 +-
 test_regress/t/t_dfg_peephole.v | 4 ++++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index 1e21ea675..b88c726b3 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -111,7 +111,7 @@ template <> void foldOp<DfgLogOr>      (V3Number& out, const V3Number& lhs, cons
 template <> void foldOp<DfgLt>         (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opLt(lhs, rhs); }
 template <> void foldOp<DfgLtS>        (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opLtS(lhs, rhs); }
 template <> void foldOp<DfgLte>        (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opLte(lhs, rhs); }
-template <> void foldOp<DfgLteS>       (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opLtS(lhs, rhs); }
+template <> void foldOp<DfgLteS>       (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opLteS(lhs, rhs); }
 template <> void foldOp<DfgModDiv>     (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opModDiv(lhs, rhs); }
 template <> void foldOp<DfgModDivS>    (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opModDivS(lhs, rhs); }
 template <> void foldOp<DfgMul>        (V3Number& out, const V3Number& lhs, const V3Number& rhs) { out.opMul(lhs, rhs); }
diff --git a/test_regress/t/t_dfg_peephole.v b/test_regress/t/t_dfg_peephole.v
index a453cc51a..ae91ea574 100644
--- a/test_regress/t/t_dfg_peephole.v
+++ b/test_regress/t/t_dfg_peephole.v
@@ -66,9 +66,13 @@ module t (
    `signal(FOLD_BINARY_LogIf,     const_a[0] -> const_b[0]);
    `signal(FOLD_BINARY_LogOr,     const_a[0] || const_b[0]);
    `signal(FOLD_BINARY_Lt,        const_a < const_b);
+   `signal(FOLD_BINARY_Lt2,       const_a < const_a);
    `signal(FOLD_BINARY_LtS,       sconst_a < sconst_b);
+   `signal(FOLD_BINARY_LtS2,      sconst_a < sconst_a);
    `signal(FOLD_BINARY_Lte,       const_a <= const_b);
+   `signal(FOLD_BINARY_Lte2,      const_a <= const_a);
    `signal(FOLD_BINARY_LteS,      sconst_a <= sconst_b);
+   `signal(FOLD_BINARY_LteS2,     sconst_a <= sconst_a);
    `signal(FOLD_BINARY_ModDiv,    const_a % 64'd3);
    `signal(FOLD_BINARY_ModDivS,   sconst_a % 64'sd3);
    `signal(FOLD_BINARY_Mul,       const_a * 64'd3);

From 6db599da454ecc491ff6a7d109d239dea1addf5a Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Wed, 14 May 2025 17:55:02 +0200
Subject: [PATCH 065/211] Fix slicing of AstExprStmt nodes (#6005)

---
 src/V3Slice.cpp                               | 57 +++++++++++++------
 src/astgen                                    |  4 +-
 test_regress/t/t_slice_cond_2d_side_effect.py | 18 ++++++
 test_regress/t/t_slice_cond_2d_side_effect.v  | 36 ++++++++++++
 test_regress/t/t_slice_cond_side_effect.py    | 18 ++++++
 test_regress/t/t_slice_cond_side_effect.v     | 35 ++++++++++++
 6 files changed, 150 insertions(+), 18 deletions(-)
 create mode 100755 test_regress/t/t_slice_cond_2d_side_effect.py
 create mode 100644 test_regress/t/t_slice_cond_2d_side_effect.v
 create mode 100755 test_regress/t/t_slice_cond_side_effect.py
 create mode 100644 test_regress/t/t_slice_cond_side_effect.v

diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index ab5fdea73..5aaf4767e 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -65,7 +65,8 @@ class SliceVisitor final : public VNVisitor {
     bool m_okInitArray = false;  // Allow InitArray children
 
     // METHODS
-    AstNodeExpr* cloneAndSel(AstNode* nodep, int elements, int elemIdx) {
+    AstNodeExpr* cloneAndSel(AstNodeExpr* const nodep, int elements, int elemIdx,
+                             const bool needPure) {
         // Insert an ArraySel, except for a few special cases
         const AstUnpackArrayDType* const arrayp
             = VN_CAST(nodep->dtypep()->skipRefp(), UnpackArrayDType);
@@ -79,7 +80,7 @@ class SliceVisitor final : public VNVisitor {
             }
             m_assignError = true;
             // Likely will cause downstream errors
-            return VN_AS(nodep, NodeExpr)->cloneTree(false);
+            return nodep->cloneTree(false, needPure);
         }
         if (arrayp->rangep()->elementsConst() != elements) {
             if (!m_assignError) {
@@ -191,26 +192,25 @@ class SliceVisitor final : public VNVisitor {
             if (!newp) newp = new AstConst{nodep->fileline(), 0};
         } else if (AstNodeCond* const snodep = VN_CAST(nodep, NodeCond)) {
             UINFO(9, "  cloneCond(" << elements << "," << elemIdx << ") " << nodep << endl);
-            return snodep->cloneType(snodep->condp()->cloneTreePure(false),
-                                     cloneAndSel(snodep->thenp(), elements, elemIdx),
-                                     cloneAndSel(snodep->elsep(), elements, elemIdx));
+            return snodep->cloneType(snodep->condp()->cloneTree(false, needPure),
+                                     cloneAndSel(snodep->thenp(), elements, elemIdx, needPure),
+                                     cloneAndSel(snodep->elsep(), elements, elemIdx, needPure));
         } else if (const AstSliceSel* const snodep = VN_CAST(nodep, SliceSel)) {
             UINFO(9, "  cloneSliceSel(" << elements << "," << elemIdx << ") " << nodep << endl);
             const int leOffset = (snodep->declRange().lo()
                                   + (!snodep->declRange().ascending()
                                          ? snodep->declRange().elements() - 1 - elemIdx
                                          : elemIdx));
-            newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTreePure(false),
+            newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTree(false, needPure),
                                    leOffset};
-        } else if (VN_IS(nodep, ArraySel) || VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel)
-                   || VN_IS(nodep, CMethodHard) || VN_IS(nodep, MemberSel)
-                   || VN_IS(nodep, ExprStmt) || VN_IS(nodep, StructSel)) {
+        } else if (VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel) || VN_IS(nodep, CMethodHard)
+                   || VN_IS(nodep, MemberSel) || VN_IS(nodep, ExprStmt)
+                   || VN_IS(nodep, StructSel)) {
             UINFO(9, "  cloneSel(" << elements << "," << elemIdx << ") " << nodep << endl);
             const int leOffset = !arrayp->rangep()->ascending()
                                      ? arrayp->rangep()->elementsConst() - 1 - elemIdx
                                      : elemIdx;
-            newp = new AstArraySel{nodep->fileline(), VN_AS(nodep, NodeExpr)->cloneTreePure(false),
-                                   leOffset};
+            newp = new AstArraySel{nodep->fileline(), nodep->cloneTree(false, needPure), leOffset};
         } else {
             if (!m_assignError) {
                 nodep->v3error(nodep->prettyTypeName()
@@ -218,7 +218,7 @@ class SliceVisitor final : public VNVisitor {
             }
             m_assignError = true;
             // Likely will cause downstream errors
-            newp = VN_AS(nodep, NodeExpr)->cloneTree(false);
+            newp = nodep->cloneTree(false, needPure);
         }
         return newp;
     }
@@ -249,9 +249,20 @@ class SliceVisitor final : public VNVisitor {
         AstNodeAssign* newlistp = nullptr;
         const int elements = arrayp->rangep()->elementsConst();
         for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
+            // Original node is replaced, so it is safe to copy it one time even if it is impure.
             AstNodeAssign* const newp
-                = nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx),
-                                   cloneAndSel(nodep->rhsp(), elements, elemIdx));
+                = nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx, elemIdx != 0),
+                                   cloneAndSel(nodep->rhsp(), elements, elemIdx, elemIdx != 0));
+            if (elemIdx == 0) {
+                nodep->foreach([this](AstExprStmt* const exprp) {
+                    // Result expression is always evaluated to the same value, so the statements
+                    // can be removed once they were included in the expression created for the 1st
+                    // element.
+                    AstNodeExpr* const resultp = exprp->resultp()->unlinkFrBack();
+                    exprp->replaceWith(resultp);
+                    VL_DO_DANGLING(pushDeletep(exprp), exprp);
+                });
+            }
             if (debug() >= 9) newp->dumpTree("-  new: ");
             newlistp = AstNode::addNext(newlistp, newp);
         }
@@ -318,10 +329,24 @@ class SliceVisitor final : public VNVisitor {
                 const int elements = adtypep->rangep()->elementsConst();
                 for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
                     // EQ(a,b) -> LOGAND(EQ(ARRAYSEL(a,0), ARRAYSEL(b,0)), ...[1])
+                    // Original node is replaced, so it is safe to copy it one time even if it is
+                    // impure.
                     AstNodeBiop* const clonep
-                        = VN_AS(nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx),
-                                                 cloneAndSel(nodep->rhsp(), elements, elemIdx)),
+                        = VN_AS(nodep->cloneType(
+                                    cloneAndSel(nodep->lhsp(), elements, elemIdx, elemIdx != 0),
+                                    cloneAndSel(nodep->rhsp(), elements, elemIdx, elemIdx != 0)),
                                 NodeBiop);
+                    if (elemIdx == 0) {
+                        nodep->foreach([this](AstExprStmt* const exprp) {
+                            // Result expression is always evaluated to the same value, so the
+                            // statements can be removed once they were included in the expression
+                            // created for the 1st element.
+                            AstNodeExpr* const resultp = exprp->resultp()->unlinkFrBack();
+                            exprp->replaceWith(resultp);
+                            VL_DO_DANGLING(pushDeletep(exprp), exprp);
+                        });
+                    }
+
                     if (!logp) {
                         logp = clonep;
                     } else {
diff --git a/src/astgen b/src/astgen
index 215364a28..d5cb5edcb 100755
--- a/src/astgen
+++ b/src/astgen
@@ -1033,8 +1033,8 @@ def write_ast_macros(filename):
             Ast{t}* unlinkFrBackWithNext(VNRelinker* linkerp = nullptr) {{
                 return static_cast<Ast{t}*>(AstNode::unlinkFrBackWithNext(linkerp));
             }}
-            Ast{t}* cloneTree(bool cloneNext) {{
-                return static_cast<Ast{t}*>(AstNode::cloneTree(cloneNext));
+            Ast{t}* cloneTree(bool cloneNext, bool needPure = false) {{
+                return static_cast<Ast{t}*>(AstNode::cloneTree(cloneNext, needPure));
             }}
             Ast{t}* cloneTreePure(bool cloneNext) {{
                 return static_cast<Ast{t}*>(AstNode::cloneTreePure(cloneNext));
diff --git a/test_regress/t/t_slice_cond_2d_side_effect.py b/test_regress/t/t_slice_cond_2d_side_effect.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_slice_cond_2d_side_effect.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_slice_cond_2d_side_effect.v b/test_regress/t/t_slice_cond_2d_side_effect.v
new file mode 100644
index 000000000..06f150340
--- /dev/null
+++ b/test_regress/t/t_slice_cond_2d_side_effect.v
@@ -0,0 +1,36 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+typedef int arr_t[5][3];
+
+class Cls;
+   int cnt;
+   int init_depth;
+   function arr_t get_arr(int depth);
+      arr_t arr = (depth > 1) ? get_arr(depth - 1) : '{5{'{init_depth, init_depth * 2, init_depth * 3}}};
+      cnt++;
+      return arr;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   Cls c = new;
+   initial begin
+      arr_t arr;
+      c.init_depth = 5;
+      arr = (c.init_depth > 0) ? c.get_arr(5) : '{5{'{1, 2, 3}}};
+
+      if (arr[0][0] != 5) $stop;
+      if (arr[0][1] != 10) $stop;
+      if (arr[0][2] != 15) $stop;
+      if (arr[3][2] != 15) $stop;
+
+      if (c.cnt != 5) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_slice_cond_side_effect.py b/test_regress/t/t_slice_cond_side_effect.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_slice_cond_side_effect.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_slice_cond_side_effect.v b/test_regress/t/t_slice_cond_side_effect.v
new file mode 100644
index 000000000..4c2bc092e
--- /dev/null
+++ b/test_regress/t/t_slice_cond_side_effect.v
@@ -0,0 +1,35 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+typedef int arr_t[3];
+
+class Cls;
+   int cnt;
+   int init_depth;
+   function arr_t get_arr(int depth);
+      arr_t arr = (depth > 1) ? get_arr(depth - 1) : '{init_depth, init_depth * 2, init_depth * 3};
+      cnt++;
+      return arr;
+   endfunction
+endclass
+
+module t (/*AUTOARG*/);
+   Cls c = new;
+   initial begin
+      arr_t arr;
+      c.init_depth = 5;
+      arr = (c.init_depth > 0) ? c.get_arr(5) : '{1, 2, 3};
+
+      if (arr[0] != 5) $stop;
+      if (arr[1] != 10) $stop;
+      if (arr[2] != 15) $stop;
+
+      if (c.cnt != 5) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 6b42d789af238eea3b91fd0c69419117f3f4764c Mon Sep 17 00:00:00 2001
From: Zhen Yan <89853352+sdjasj@users.noreply.github.com>
Date: Thu, 15 May 2025 22:43:45 +0800
Subject: [PATCH 066/211] Fix checking for too-wide divide and modulus (#6003)
 (#6006)

---
 docs/CONTRIBUTORS                  |  1 +
 src/V3AstNodeExpr.h                |  4 ++++
 test_regress/t/t_math_wide_bad.out | 24 ++++++++++++++++++------
 test_regress/t/t_math_wide_bad.v   | 15 +++++++++++++--
 4 files changed, 36 insertions(+), 8 deletions(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 28f3c1c1f..fbdf1f998 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -256,3 +256,4 @@ Zixi Li
 أحمد المحمودي
 404allen404
 Tobias Jensen
+Zhen Yan
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 111edca1e..8366f6f8d 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -2546,6 +2546,7 @@ public:
     string emitVerilog() override { return "%k(%l %f/ %r)"; }
     string emitC() override { return "VL_DIV_%nq%lq%rq(%lw, %P, %li, %ri)"; }
     string emitSMT() const override { return "(bvudiv %l %r)"; }
+    bool emitCheckMaxWords() override { return true; }
     bool cleanOut() const override { return false; }
     bool cleanLhs() const override { return true; }
     bool cleanRhs() const override { return true; }
@@ -2593,6 +2594,7 @@ public:
     string emitVerilog() override { return "%k(%l %f/ %r)"; }
     string emitC() override { return "VL_DIVS_%nq%lq%rq(%lw, %P, %li, %ri)"; }
     string emitSMT() const override { return "(bvsdiv %l %r)"; }
+    bool emitCheckMaxWords() override { return true; }
     bool cleanOut() const override { return false; }
     bool cleanLhs() const override { return true; }
     bool cleanRhs() const override { return true; }
@@ -3195,6 +3197,7 @@ public:
     string emitVerilog() override { return "%k(%l %f%% %r)"; }
     string emitC() override { return "VL_MODDIV_%nq%lq%rq(%lw, %P, %li, %ri)"; }
     string emitSMT() const override { return "(bvurem %l %r)"; }
+    bool emitCheckMaxWords() override { return true; }
     bool cleanOut() const override { return false; }
     bool cleanLhs() const override { return true; }
     bool cleanRhs() const override { return true; }
@@ -3218,6 +3221,7 @@ public:
     string emitVerilog() override { return "%k(%l %f%% %r)"; }
     string emitC() override { return "VL_MODDIVS_%nq%lq%rq(%lw, %P, %li, %ri)"; }
     string emitSMT() const override { return "(bvsmod %l %r)"; }
+    bool emitCheckMaxWords() override { return true; }
     bool cleanOut() const override { return false; }
     bool cleanLhs() const override { return true; }
     bool cleanRhs() const override { return true; }
diff --git a/test_regress/t/t_math_wide_bad.out b/test_regress/t/t_math_wide_bad.out
index a95cc5a0d..826015a72 100644
--- a/test_regress/t/t_math_wide_bad.out
+++ b/test_regress/t/t_math_wide_bad.out
@@ -1,11 +1,23 @@
-%Error-UNSUPPORTED: t/t_math_wide_bad.v:23:19: Unsupported: operator ISTORD operator of 64 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
-   23 |    assign r = real'(a);
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:34:19: Unsupported: operator ISTORD operator of 64 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   34 |    assign r = real'(a);
       |                   ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
-   22 |    assign z2 = a ** 3;
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:28:18: Unsupported: operator POWSS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   28 |    assign z2 = a ** 3;
       |                  ^~
-%Error-UNSUPPORTED: t/t_math_wide_bad.v:21:17: Unsupported: operator MULS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
-   21 |    assign z = a * b;
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:27:17: Unsupported: operator MULS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   27 |    assign z = a * b;
       |                 ^
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:29:18: Unsupported: operator DIVS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   29 |    assign z3 = a / b;
+      |                  ^
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:30:18: Unsupported: operator MODDIVS operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   30 |    assign z4 = a % b;
+      |                  ^
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:31:19: Unsupported: operator DIV operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   31 |    assign z5 = ua / ub;
+      |                   ^
+%Error-UNSUPPORTED: t/t_math_wide_bad.v:32:19: Unsupported: operator MODDIV operator of 5472 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h
+   32 |    assign z6 = ua % ub;
+      |                   ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_math_wide_bad.v b/test_regress/t/t_math_wide_bad.v
index fa8705010..2f54d5456 100644
--- a/test_regress/t/t_math_wide_bad.v
+++ b/test_regress/t/t_math_wide_bad.v
@@ -6,20 +6,31 @@
 
 module t (/*AUTOARG*/
    // Outputs
-   z, z2, r,
+   z, z2, z3, z4, z5, z6, r,
    // Inputs
-   a, b
+   a, b, ua, ub
    );
 
    input signed [170*32 : 0] a;
    input signed [170*32 : 0] b;
+   input [170*32 : 0] ua;
+   input [170*32 : 0] ub;
 
    output signed [170*32 : 0] z;
    output signed [170*32 : 0] z2;
+   output signed [170*32 : 0] z3;
+   output signed [170*32 : 0] z4;
+   output [170*32 : 0] z5;
+   output [170*32 : 0] z6;
    output real r;
 
    assign z = a * b;
    assign z2 = a ** 3;
+   assign z3 = a / b;
+   assign z4 = a % b;
+   assign z5 = ua / ub;
+   assign z6 = ua % ub;
+
    assign r = real'(a);
 
 endmodule

From 73b36482624e5b59eafb6fca272ee5a510a78976 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 16 May 2025 14:24:57 +0200
Subject: [PATCH 067/211] Fix skipped genblocks in toggle coverage (#6010)

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Co-authored-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
---
 src/V3Coverage.cpp                        | 12 ++--
 test_regress/t/t_cover_toggle.out         | 37 ++++++++++++
 test_regress/t/t_cover_toggle.py          |  2 +-
 test_regress/t/t_cover_toggle.v           | 37 ++++++++++++
 test_regress/t/t_cover_toggle__points.out | 73 +++++++++++++++++++++++
 5 files changed, 155 insertions(+), 6 deletions(-)

diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index d8ec375e8..af5f3b679 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -351,7 +351,7 @@ class CoverageVisitor final : public VNVisitor {
                 //      We'll do this, and make the if(...) coverinc later.
 
                 // Add signal to hold the old value
-                const string newvarname = "__Vtogcov__"s + nodep->shortName();
+                const string newvarname = "__Vtogcov__"s + m_beginHier + nodep->shortName();
                 FileLine* const fl_nowarn = new FileLine{nodep->fileline()};
                 fl_nowarn->modifyWarnOff(V3ErrorCode::UNUSEDSIGNAL, true);
                 AstVar* const chgVarp
@@ -371,10 +371,12 @@ class CoverageVisitor final : public VNVisitor {
     }
 
     void toggleVarBottom(const ToggleEnt& above, const AstVar* varp) {
+        const std::string hierPrefix
+            = (m_beginHier != "") ? AstNode::prettyName(m_beginHier) + "." : "";
         AstCoverToggle* const newp = new AstCoverToggle{
             varp->fileline(),
-            newCoverInc(varp->fileline(), "", "v_toggle", varp->name() + above.m_comment, "", 0,
-                        ""),
+            newCoverInc(varp->fileline(), "", "v_toggle",
+                        hierPrefix + varp->name() + above.m_comment, "", 0, ""),
             above.m_varRefp->cloneTree(true), above.m_chgRefp->cloneTree(true)};
         m_modp->addStmtsp(newp);
     }
@@ -627,9 +629,9 @@ class CoverageVisitor final : public VNVisitor {
         // covers the code in that line.)
         VL_RESTORER(m_beginHier);
         VL_RESTORER(m_inToggleOff);
-        m_inToggleOff = true;
+        if (!nodep->generate()) m_inToggleOff = true;
         if (nodep->name() != "") {
-            m_beginHier = m_beginHier + (m_beginHier != "" ? "." : "") + nodep->name();
+            m_beginHier = m_beginHier + (m_beginHier != "" ? "__DOT__" : "") + nodep->name();
         }
         iterateChildren(nodep);
         lineTrack(nodep);
diff --git a/test_regress/t/t_cover_toggle.out b/test_regress/t/t_cover_toggle.out
index 5d0010643..d68a87d6d 100644
--- a/test_regress/t/t_cover_toggle.out
+++ b/test_regress/t/t_cover_toggle.out
@@ -70,6 +70,16 @@
                      .clk                       (clk),
                      .toggle                    (toggle));
         
+           param#(1) p1 (/*AUTOINST*/
+                         // Inputs
+                         .clk                   (clk),
+                         .toggle                (toggle));
+        
+           param#() p2 (/*AUTOINST*/
+                        // Inputs
+                        .clk                    (clk),
+                        .toggle                 (toggle));
+        
 %000001    reg [1:0]  memory[121:110];
         
            wire [1023:0] largeish = {992'h0, cyc};
@@ -172,3 +182,30 @@
         
         endmodule
         
+        module param #(parameter P = 2) (/*AUTOARG*/
+           // Inputs
+           clk, toggle
+           );
+        
+ 000019    input clk;
+%000002    input toggle;
+        
+%000001    logic z;
+        
+           for (genvar i = 0; i < P; i++) begin
+%000002       logic x;
+              always @ (posedge clk) begin
+                 x <= toggle;
+              end
+              for (genvar j = 0; j < 3; j++) begin
+%000003          logic [2:0] y;
+                 always @ (negedge clk) begin
+                    y <= {toggle, ~toggle, 1'b1};
+                 end
+              end
+           end
+           if (P > 1) begin : gen_1
+              assign z = 1;
+           end
+        endmodule
+        
diff --git a/test_regress/t/t_cover_toggle.py b/test_regress/t/t_cover_toggle.py
index 98bb453ee..45bf2c21c 100755
--- a/test_regress/t/t_cover_toggle.py
+++ b/test_regress/t/t_cover_toggle.py
@@ -21,7 +21,7 @@ test.inline_checks()
 test.file_grep_not(test.obj_dir + "/coverage.dat", "largeish")
 
 if test.vlt_all:
-    test.file_grep(test.stats, r'Coverage, Toggle points joined\s+(\d+)', 23)
+    test.file_grep(test.stats, r'Coverage, Toggle points joined\s+(\d+)', 27)
 
 test.run(cmd=[
     os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage",
diff --git a/test_regress/t/t_cover_toggle.v b/test_regress/t/t_cover_toggle.v
index 5cd37b0e3..1590a813c 100644
--- a/test_regress/t/t_cover_toggle.v
+++ b/test_regress/t/t_cover_toggle.v
@@ -69,6 +69,16 @@ module t (/*AUTOARG*/
              .clk                       (clk),
              .toggle                    (toggle));
 
+   param#(1) p1 (/*AUTOINST*/
+                 // Inputs
+                 .clk                   (clk),
+                 .toggle                (toggle));
+
+   param#() p2 (/*AUTOINST*/
+                // Inputs
+                .clk                    (clk),
+                .toggle                 (toggle));
+
    reg [1:0]  memory[121:110];
 
    wire [1023:0] largeish = {992'h0, cyc};
@@ -170,3 +180,30 @@ module off (/*AUTOARG*/
    // CHECK_COVER(-1,"top.t.o1","toggle",2)
 
 endmodule
+
+module param #(parameter P = 2) (/*AUTOARG*/
+   // Inputs
+   clk, toggle
+   );
+
+   input clk;
+   input toggle;
+
+   logic z;
+
+   for (genvar i = 0; i < P; i++) begin
+      logic x;
+      always @ (posedge clk) begin
+         x <= toggle;
+      end
+      for (genvar j = 0; j < 3; j++) begin
+         logic [2:0] y;
+         always @ (negedge clk) begin
+            y <= {toggle, ~toggle, 1'b1};
+         end
+      end
+   end
+   if (P > 1) begin : gen_1
+      assign z = 1;
+   end
+endmodule
diff --git a/test_regress/t/t_cover_toggle__points.out b/test_regress/t/t_cover_toggle__points.out
index 7e220867b..f73846a2f 100644
--- a/test_regress/t/t_cover_toggle__points.out
+++ b/test_regress/t/t_cover_toggle__points.out
@@ -87,6 +87,16 @@
                      .clk                       (clk),
                      .toggle                    (toggle));
         
+           param#(1) p1 (/*AUTOINST*/
+                         // Inputs
+                         .clk                   (clk),
+                         .toggle                (toggle));
+        
+           param#() p2 (/*AUTOINST*/
+                        // Inputs
+                        .clk                    (clk),
+                        .toggle                 (toggle));
+        
 %000001    reg [1:0]  memory[121:110];
 -000001  point: comment=memory[110][0] hier=top.t
 -000000  point: comment=memory[110][1] hier=top.t
@@ -228,3 +238,66 @@
         
         endmodule
         
+        module param #(parameter P = 2) (/*AUTOARG*/
+           // Inputs
+           clk, toggle
+           );
+        
+ 000019    input clk;
++000019  point: comment=clk hier=top.t.p2
++000019  point: comment=clk hier=top.t.p1
+%000002    input toggle;
+-000002  point: comment=toggle hier=top.t.p2
+-000002  point: comment=toggle hier=top.t.p1
+        
+%000001    logic z;
+-000001  point: comment=z hier=top.t.p2
+-000000  point: comment=z hier=top.t.p1
+        
+           for (genvar i = 0; i < P; i++) begin
+%000002       logic x;
+-000002  point: comment=genblk1[0].x hier=top.t.p2
+-000002  point: comment=genblk1[1].x hier=top.t.p2
+-000002  point: comment=genblk1[0].x hier=top.t.p1
+              always @ (posedge clk) begin
+                 x <= toggle;
+              end
+              for (genvar j = 0; j < 3; j++) begin
+%000003          logic [2:0] y;
+-000001  point: comment=genblk1[0].genblk1[0].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[0].genblk1[0].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[0].genblk1[0].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[0].genblk1[1].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[0].genblk1[1].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[0].genblk1[1].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[0].genblk1[2].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[0].genblk1[2].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[0].genblk1[2].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[1].genblk1[0].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[1].genblk1[0].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[1].genblk1[0].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[1].genblk1[1].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[1].genblk1[1].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[1].genblk1[1].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[1].genblk1[2].y[0] hier=top.t.p2
+-000003  point: comment=genblk1[1].genblk1[2].y[1] hier=top.t.p2
+-000002  point: comment=genblk1[1].genblk1[2].y[2] hier=top.t.p2
+-000001  point: comment=genblk1[0].genblk1[0].y[0] hier=top.t.p1
+-000003  point: comment=genblk1[0].genblk1[0].y[1] hier=top.t.p1
+-000002  point: comment=genblk1[0].genblk1[0].y[2] hier=top.t.p1
+-000001  point: comment=genblk1[0].genblk1[1].y[0] hier=top.t.p1
+-000003  point: comment=genblk1[0].genblk1[1].y[1] hier=top.t.p1
+-000002  point: comment=genblk1[0].genblk1[1].y[2] hier=top.t.p1
+-000001  point: comment=genblk1[0].genblk1[2].y[0] hier=top.t.p1
+-000003  point: comment=genblk1[0].genblk1[2].y[1] hier=top.t.p1
+-000002  point: comment=genblk1[0].genblk1[2].y[2] hier=top.t.p1
+                 always @ (negedge clk) begin
+                    y <= {toggle, ~toggle, 1'b1};
+                 end
+              end
+           end
+           if (P > 1) begin : gen_1
+              assign z = 1;
+           end
+        endmodule
+        

From 458102380543eacda3fb5f99fd10027baad69511 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 16 May 2025 13:54:51 -0400
Subject: [PATCH 068/211] Fix --x-initial and --x-assign random stability
 (#2662) (#5958)

---
 include/verilated.cpp                         | 74 +++++++++++++++++++
 include/verilated_funcs.h                     | 10 +++
 src/V3AstNodeExpr.h                           | 20 +----
 src/V3EmitCFunc.cpp                           | 39 ++++++++--
 src/V3EmitCFunc.h                             |  5 ++
 src/V3EmitCImp.cpp                            |  2 +
 src/V3Options.cpp                             |  1 +
 src/V3String.cpp                              | 43 +++++++++++
 src/V3String.h                                |  2 +
 src/V3Unknown.cpp                             |  7 +-
 test_regress/t/t_debug_emitv.py               | 21 ++++--
 test_regress/t/t_flag_xinitial_unique.py      |  4 +-
 test_regress/t/t_x_assign.cpp                 | 24 +++---
 test_regress/t/t_x_assign_unique_2.py         | 24 ++++++
 test_regress/t/t_x_rand_mt_stability.out      | 17 +++++
 test_regress/t/t_x_rand_mt_stability.py       | 24 ++++++
 test_regress/t/t_x_rand_mt_stability_add.out  | 17 +++++
 test_regress/t/t_x_rand_mt_stability_add.py   | 19 +++++
 .../t/t_x_rand_mt_stability_add_trace.out     | 17 +++++
 .../t/t_x_rand_mt_stability_add_trace.py      | 19 +++++
 .../t/t_x_rand_mt_stability_trace.out         | 17 +++++
 test_regress/t/t_x_rand_mt_stability_trace.py | 19 +++++
 .../t/t_x_rand_mt_stability_zeros.out         | 17 +++++
 test_regress/t/t_x_rand_mt_stability_zeros.py | 19 +++++
 test_regress/t/t_x_rand_stability.out         | 17 +++++
 test_regress/t/t_x_rand_stability.py          | 23 ++++++
 test_regress/t/t_x_rand_stability.v           | 74 +++++++++++++++++++
 test_regress/t/t_x_rand_stability_add.out     | 17 +++++
 test_regress/t/t_x_rand_stability_add.py      | 19 +++++
 .../t/t_x_rand_stability_add_trace.out        | 17 +++++
 .../t/t_x_rand_stability_add_trace.py         | 19 +++++
 test_regress/t/t_x_rand_stability_trace.out   | 17 +++++
 test_regress/t/t_x_rand_stability_trace.py    | 19 +++++
 test_regress/t/t_x_rand_stability_zeros.out   | 17 +++++
 test_regress/t/t_x_rand_stability_zeros.py    | 19 +++++
 35 files changed, 674 insertions(+), 45 deletions(-)
 create mode 100755 test_regress/t/t_x_assign_unique_2.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_add.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_add.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_add_trace.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_add_trace.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_trace.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_trace.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_zeros.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_zeros.py
 create mode 100644 test_regress/t/t_x_rand_stability.out
 create mode 100755 test_regress/t/t_x_rand_stability.py
 create mode 100644 test_regress/t/t_x_rand_stability.v
 create mode 100644 test_regress/t/t_x_rand_stability_add.out
 create mode 100755 test_regress/t/t_x_rand_stability_add.py
 create mode 100644 test_regress/t/t_x_rand_stability_add_trace.out
 create mode 100755 test_regress/t/t_x_rand_stability_add_trace.py
 create mode 100644 test_regress/t/t_x_rand_stability_trace.out
 create mode 100755 test_regress/t/t_x_rand_stability_trace.py
 create mode 100644 test_regress/t/t_x_rand_stability_zeros.out
 create mode 100755 test_regress/t/t_x_rand_stability_zeros.py

diff --git a/include/verilated.cpp b/include/verilated.cpp
index 0fc525de1..0a91df7fa 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -406,6 +406,38 @@ IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
     Verilated::threadContextp()->randSeed(static_cast<int>(seed));
     return VL_RANDOM_I();
 }
+
+IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    IData data = ~0;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        data = rng.rand64();
+    }
+    data &= VL_MASK_I(obits);
+    return data;
+}
+
+QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    QData data = ~0ULL;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        data = rng.rand64();
+    }
+    data &= VL_MASK_Q(obits);
+    return data;
+}
+
+WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                 uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() != 2) { return VL_RAND_RESET_W(obits, outwp); }
+    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
+    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
+    return outwp;
+}
+
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -1700,6 +1732,48 @@ IData VL_SSCANF_INNX(int, const std::string& ld, const std::string& format, int
     return got;
 }
 
+// MurmurHash64A
+uint64_t VL_HASH(const char* key) VL_PURE {
+    const size_t len = strlen(key);
+    const uint64_t seed = 0;
+    const uint64_t m = 0xc6a4a7935bd1e995ULL;
+    const int r = 47;
+
+    uint64_t h = seed ^ (len * m);
+
+    const uint64_t* data = (const uint64_t*)key;
+    const uint64_t* end = data + (len / 8);
+
+    while (data != end) {
+        uint64_t k = *data++;
+
+        k *= m;
+        k ^= k >> r;
+        k *= m;
+
+        h ^= k;
+        h *= m;
+    }
+
+    const unsigned char* data2 = (const unsigned char*)data;
+
+    switch (len & 7) {
+    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
+    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
+    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
+    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
+    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
+    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
+    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
+    };
+
+    h ^= h >> r;
+    h *= m;
+    h ^= h >> r;
+
+    return h;
+}
+
 IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start,
                  IData count) VL_MT_SAFE {
     // While threadsafe, each thread can only access different file handles
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index c971c11ac..023b23bc0 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -101,6 +101,14 @@ inline IData VL_URANDOM_RANGE_I(IData hi, IData lo) {
     }
 }
 
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                        uint64_t salt) VL_MT_UNSAFE;
+
 /// Random reset a signal of given width (init time only)
 extern IData VL_RAND_RESET_I(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
@@ -2807,6 +2815,8 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr)
 }
 extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE;
 
+uint64_t VL_HASH(const char* key) VL_PURE;
+
 //======================================================================
 
 #endif  // Guard
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 8366f6f8d..babc6f5eb 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1802,14 +1802,8 @@ class AstRand final : public AstNodeExpr {
     // Return a random number, based upon width()
     // @astgen op1 := seedp : Optional[AstNode]
     const bool m_urandom = false;  // $urandom vs $random
-    const bool m_reset = false;  // Random reset, versus always random
 public:
     class Reset {};
-    AstRand(FileLine* fl, Reset, AstNodeDType* dtp, bool reset)
-        : ASTGEN_SUPER_Rand(fl)
-        , m_reset{reset} {
-        dtypep(dtp);
-    }
     AstRand(FileLine* fl, AstNode* seedp, bool urandom)
         : ASTGEN_SUPER_Rand(fl)
         , m_urandom{urandom} {
@@ -1821,14 +1815,6 @@ public:
                        : (m_urandom ? "%f$urandom()" : "%f$random()");
     }
     string emitC() override {
-        if (m_reset) {
-            if (v3Global.opt.xAssign() == "unique") {
-                return "VL_RAND_RESET_ASSIGN_%nq(%nw, %P)";
-            } else {
-                // This follows xInitial randomization
-                return "VL_RAND_RESET_%nq(%nw, %P)";
-            }
-        }
         if (seedp()) {
             if (urandom()) {
                 return "VL_URANDOM_SEEDED_%nq%lq(%li)";
@@ -1845,14 +1831,12 @@ public:
     bool cleanOut() const override { return false; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() override { return !m_reset && !seedp(); }
+    bool isPure() override { return !seedp(); }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool sameNode(const AstNode* /*samep*/) const override { return true; }
     bool combinable(const AstRand* samep) const {
-        return !seedp() && !samep->seedp() && reset() == samep->reset()
-               && urandom() == samep->urandom();
+        return !seedp() && !samep->seedp() && urandom() == samep->urandom();
     }
-    bool reset() const { return m_reset; }
     bool urandom() const { return m_urandom; }
 };
 class AstRandRNG final : public AstNodeExpr {
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 132fd408b..40733ca16 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -752,7 +752,9 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                || varp->isFuncLocal()  // Randomization too slow
                || (basicp && basicp->isZeroInit())
                || (v3Global.opt.underlineZero() && !varp->name().empty() && varp->name()[0] == '_')
-               || (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0"));
+               || (varp->isXTemp()
+                       ? (v3Global.opt.xAssign() != "unique")
+                       : (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0")));
         const bool slow = !varp->isFuncLocal() && !varp->isClassMember();
         splitSizeInc(1);
         if (dtypep->isWide()) {  // Handle unpacked; not basicp->isWide
@@ -765,9 +767,20 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                     out += cvtToStr(constp->num().edataWord(w)) + "U;\n";
                 }
             } else {
-                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(") : "VL_RAND_RESET_W(";
+                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(")
+                              : "VL_SCOPED_RAND_RESET_W(";
                 out += cvtToStr(dtypep->widthMin());
-                out += ", " + varNameProtected + suffix + ");\n";
+                out += ", " + varNameProtected + suffix;
+                if (!zeroit) {
+                    emitVarResetScopeHash();
+                    const uint64_t salt = VString::hashMurmur(varp->prettyName());
+                    out += ", ";
+                    out += m_classOrPackage ? m_classOrPackageHash : "__VscopeHash";
+                    out += ", ";
+                    out += std::to_string(salt);
+                    out += "ull";
+                }
+                out += ");\n";
             }
             return out;
         } else {
@@ -780,9 +793,13 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
             if (zeroit || (v3Global.opt.xInitialEdge() && varp->isUsedClock())) {
                 out += " = 0;\n";
             } else {
-                out += " = VL_RAND_RESET_";
+                emitVarResetScopeHash();
+                const uint64_t salt = VString::hashMurmur(varp->prettyName());
+                out += " = VL_SCOPED_RAND_RESET_";
                 out += dtypep->charIQWN();
-                out += "(" + cvtToStr(dtypep->widthMin()) + ");\n";
+                out += "(" + cvtToStr(dtypep->widthMin()) + ", "
+                       + (m_classOrPackage ? m_classOrPackageHash : "__VscopeHash") + ", "
+                       + std::to_string(salt) + "ull);\n";
             }
             return out;
         }
@@ -791,3 +808,15 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
     }
     return "";
 }
+
+void EmitCFunc::emitVarResetScopeHash() {
+    if (VL_LIKELY(m_createdScopeHash)) { return; }
+    if (m_classOrPackage) {
+        m_classOrPackageHash
+            = std::to_string(VString::hashMurmur(m_classOrPackage->name())) + "ULL";
+    } else {
+        puts(string("const uint64_t __VscopeHash = VL_HASH(")
+             + (m_useSelfForThis ? "vlSelf" : "this") + "->name());\n");
+    }
+    m_createdScopeHash = true;
+}
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 30075f281..c6c72ba31 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -120,6 +120,7 @@ class EmitCFunc VL_NOT_FINAL : public EmitCConstInit {
     int m_labelNum = 0;  // Next label number
     bool m_inUC = false;  // Inside an AstUCStmt or AstUCExpr
     bool m_emitConstInit = false;  // Emitting constant initializer
+    bool m_createdScopeHash = false;  // Already created a scope hash
 
     // State associated with processing $display style string formatting
     struct EmitDispState final {
@@ -150,6 +151,8 @@ protected:
     const AstNodeModule* m_modp = nullptr;  // Current module being emitted
     const AstCFunc* m_cfuncp = nullptr;  // Current function being emitted
     bool m_instantiatesOwnProcess = false;
+    const AstClassPackage* m_classOrPackage = nullptr;  // Pointer to current class or package
+    string m_classOrPackageHash;  // Hash of class or package name
 
     bool constructorNeedsProcess(const AstClass* const classp) {
         const AstNode* const newp = m_memberMap.findMember(classp, "new");
@@ -214,6 +217,7 @@ public:
     string emitVarResetRecurse(const AstVar* varp, bool constructing,
                                const string& varNameProtected, AstNodeDType* dtypep, int depth,
                                const string& suffix);
+    void emitVarResetScopeHash();
     void emitChangeDet();
     void emitConstInit(AstNode* initp) {
         // We should refactor emit to produce output into a provided buffer, not go through members
@@ -285,6 +289,7 @@ public:
         VL_RESTORER(m_useSelfForThis);
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_instantiatesOwnProcess);
+        VL_RESTORER(m_createdScopeHash);
         m_cfuncp = nodep;
         m_instantiatesOwnProcess = false;
 
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index ef8ec9241..090f312ba 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -506,7 +506,9 @@ class EmitCImp final : EmitCFunc {
         };
 
         gather(modp);
+        VL_RESTORER(m_classOrPackage);
         if (const AstClassPackage* const packagep = VN_CAST(modp, ClassPackage)) {
+            m_classOrPackage = packagep;
             gather(packagep->classp());
         }
 
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index de2d030a9..cba4e7d83 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -2097,6 +2097,7 @@ V3Options::V3Options() {
     m_makeDir = "obj_dir";
     m_unusedRegexp = "*unused*";
     m_xAssign = "fast";
+    m_xInitial = "unique";
 
     m_defaultLanguage = V3LangCode::mostRecent();
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index bb80bb1d1..29307bdea 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -316,6 +316,49 @@ string VString::aOrAn(const char* word) {
     }
 }
 
+// MurmurHash64A
+uint64_t VString::hashMurmur(const string& str) VL_PURE {
+    const char* key = str.c_str();
+    const size_t len = str.size();
+    const uint64_t seed = 0;
+    const uint64_t m = 0xc6a4a7935bd1e995ULL;
+    const int r = 47;
+
+    uint64_t h = seed ^ (len * m);
+
+    const uint64_t* data = (const uint64_t*)key;
+    const uint64_t* end = data + (len / 8);
+
+    while (data != end) {
+        uint64_t k = *data++;
+
+        k *= m;
+        k ^= k >> r;
+        k *= m;
+
+        h ^= k;
+        h *= m;
+    }
+
+    const unsigned char* data2 = (const unsigned char*)data;
+
+    switch (len & 7) {
+    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
+    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
+    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
+    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
+    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
+    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
+    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
+    };
+
+    h ^= h >> r;
+    h *= m;
+    h ^= h >> r;
+
+    return h;
+}
+
 //######################################################################
 // VHashSha256
 
diff --git a/src/V3String.h b/src/V3String.h
index aa59107c6..65bfa8d94 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -139,6 +139,8 @@ public:
     // Return proper article (a/an) for a word. May be inaccurate for some special words
     static string aOrAn(const char* word);
     static string aOrAn(const string& word) { return aOrAn(word.c_str()); }
+    // Hash the string
+    static uint64_t hashMurmur(const string& str) VL_PURE;
 };
 
 //######################################################################
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 5ad89aece..8f287f400 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -359,10 +359,9 @@ class UnknownVisitor final : public VNVisitor {
                         nodep->fileline(),
                         new AstVarRef{nodep->fileline(), newvarp, VAccess::WRITE},
                         new AstOr{nodep->fileline(), new AstConst{nodep->fileline(), numb1},
-                                  new AstAnd{nodep->fileline(),
-                                             new AstConst{nodep->fileline(), numbx},
-                                             new AstRand{nodep->fileline(), AstRand::Reset{},
-                                                         nodep->dtypep(), true}}}}};
+                                  new AstAnd{
+                                      nodep->fileline(), new AstConst{nodep->fileline(), numbx},
+                                      new AstVarRef{nodep->fileline(), newvarp, VAccess::READ}}}}};
                 // Add inits in front of other statement.
                 // In the future, we should stuff the initp into the module's constructor.
                 AstNode* const afterp = m_modp->stmtsp()->unlinkFrBackWithNext();
diff --git a/test_regress/t/t_debug_emitv.py b/test_regress/t/t_debug_emitv.py
index 227968047..f8d03f1e7 100755
--- a/test_regress/t/t_debug_emitv.py
+++ b/test_regress/t/t_debug_emitv.py
@@ -9,23 +9,30 @@
 
 import vltest_bootstrap
 
-test.scenarios('vlt')
+test.scenarios("vlt")
 
 test.lint(
     # We also have dump-tree turned on, so hit a lot of AstNode*::dump() functions
     # Likewise XML
     v_flags=["--lint-only --dumpi-tree 9 --dumpi-V3EmitV 9 --debug-emitv"])
 
-output_v = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
+output_vs = test.glob_some(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
 
-test.files_identical(output_v, test.golden_filename)
+for output_v in output_vs:
+    test.files_identical(output_v, test.golden_filename)
 
 if test.verbose:
     # Print if that the output Verilog is clean
     # TODO not yet round-trip clean
-    test.run(cmd=[os.environ["VERILATOR_ROOT"] + "/bin/verilator", "--lint-only", output_v],
-             logfile=test.obj_dir + "/sim_roundtrip.log",
-             fails=True,
-             verilator_run=True)
+    test.run(
+        cmd=[
+            os.environ["VERILATOR_ROOT"] + "/bin/verilator",
+            "--lint-only",
+            output_vs[0],
+        ],
+        logfile=test.obj_dir + "/sim_roundtrip.log",
+        fails=True,
+        verilator_run=True,
+    )
 
 test.passes()
diff --git a/test_regress/t/t_flag_xinitial_unique.py b/test_regress/t/t_flag_xinitial_unique.py
index 64ac07036..9d4ede6ae 100755
--- a/test_regress/t/t_flag_xinitial_unique.py
+++ b/test_regress/t/t_flag_xinitial_unique.py
@@ -9,13 +9,13 @@
 
 import vltest_bootstrap
 
-test.scenarios('vlt_all')
+test.scenarios("vlt_all")
 
 test.compile(verilator_flags2=["--x-initial unique"])
 
 test.execute()
 
 files = glob.glob(test.obj_dir + "/" + test.vm_prefix + "___024root__DepSet_*__Slow.cpp")
-test.file_grep_any(files, r'VL_RAND_RESET')
+test.file_grep_any(files, r"VL_SCOPED_RAND_RESET")
 
 test.passes()
diff --git a/test_regress/t/t_x_assign.cpp b/test_regress/t/t_x_assign.cpp
index bfb80ffff..36aa6371f 100644
--- a/test_regress/t/t_x_assign.cpp
+++ b/test_regress/t/t_x_assign.cpp
@@ -21,31 +21,37 @@ double sc_time_stamp() { return 0; }
 # define EXPECTED 0
 #elif defined(T_X_ASSIGN_1)
 # define EXPECTED 1
-#elif defined(T_X_ASSIGN_UNIQUE_0)
-# define EXPECTED 0
-#elif defined(T_X_ASSIGN_UNIQUE_1)
-# define EXPECTED 1
-#else
-# error "Don't know expectd output for test" #TEST
 #endif
 // clang-format on
 
 int main(int argc, const char** argv) {
-    VM_PREFIX* top = new VM_PREFIX{};
-
 #if defined(T_X_ASSIGN_UNIQUE_0)
     Verilated::randReset(0);
 #elif defined(T_X_ASSIGN_UNIQUE_1)
     Verilated::randReset(1);
+#elif defined(T_X_ASSIGN_UNIQUE_2)
+    Verilated::randReset(2);
 #endif
 
+    VM_PREFIX* top = new VM_PREFIX{};
+
     // Evaluate one clock posedge
     top->clk = 0;
     top->eval();
     top->clk = 1;
     top->eval();
 
-#if defined(T_X_ASSIGN_UNIQUE_0) || defined(T_X_ASSIGN_UNIQUE_1)
+#if defined(T_X_ASSIGN_UNIQUE_0)
+    if (top->o_int != 0) {
+        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
+        exit(1);
+    }
+#elif defined(T_X_ASSIGN_UNIQUE_1)
+    if (top->o_int != -1) {
+        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
+        exit(1);
+    }
+#elif defined(T_X_ASSIGN_UNIQUE_2)
     if (top->o_int == 0 || top->o_int == -1) {
         vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not unique");
         exit(1);
diff --git a/test_regress/t/t_x_assign_unique_2.py b/test_regress/t/t_x_assign_unique_2.py
new file mode 100755
index 000000000..f5cc5d72a
--- /dev/null
+++ b/test_regress/t/t_x_assign_unique_2.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt_all")
+test.pli_filename = "t/t_x_assign.cpp"
+test.top_filename = "t/t_x_assign.v"
+
+test.compile(
+    make_top_shell=False,
+    make_main=False,
+    verilator_flags2=["--x-assign unique --exe", "--x-initial 0", test.pli_filename],
+)
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability.out b/test_regress/t/t_x_rand_mt_stability.out
new file mode 100644
index 000000000..a752e5efb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0xc0391efd
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability.py b/test_regress/t/t_x_rand_mt_stability.py
new file mode 100755
index 000000000..459473d4d
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+import glob
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
+
+other_logs = [x for x in glob.glob("t/t_x_rand_mt_stability_*.out") if "_zero" not in x]
+for other_log in other_logs:
+    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_mt_stability_add.out b/test_regress/t/t_x_rand_mt_stability_add.out
new file mode 100644
index 000000000..a752e5efb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0xc0391efd
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add.py b/test_regress/t/t_x_rand_mt_stability_add.py
new file mode 100755
index 000000000..0dc0f0af8
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.out b/test_regress/t/t_x_rand_mt_stability_add_trace.out
new file mode 100644
index 000000000..a752e5efb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0xc0391efd
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.py b/test_regress/t/t_x_rand_mt_stability_add_trace.py
new file mode 100755
index 000000000..0e6d3dc4f
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.out b/test_regress/t/t_x_rand_mt_stability_trace.out
new file mode 100644
index 000000000..a752e5efb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0xc0391efd
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.py b/test_regress/t/t_x_rand_mt_stability_trace.py
new file mode 100755
index 000000000..b7248be24
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.out b/test_regress/t/t_x_rand_mt_stability_zeros.out
new file mode 100644
index 000000000..1426e7828
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_zeros.out
@@ -0,0 +1,17 @@
+uninitialized = 0x00000000
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0x00000000
+big = 0x0000000000000000000000000000000000000000000000000000000000000000
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x0
+top.t.the_sub_yes_inline_2 no_init 0x0
+top.t.the_sub_no_inline_1 no_init 0x0
+top.t.the_sub_no_inline_2 no_init 0x0
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x00000000
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.py b/test_regress/t/t_x_rand_mt_stability_zeros.py
new file mode 100755
index 000000000..a82b8586d
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_zeros.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability.out b/test_regress/t/t_x_rand_stability.out
new file mode 100644
index 000000000..562cb9864
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0xc0391efd
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability.py b/test_regress/t/t_x_rand_stability.py
new file mode 100755
index 000000000..a08c45ed6
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+import glob
+
+test.scenarios("vlt")
+
+test.compile(verilator_flags2=["--x-initial unique"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
+
+other_logs = [x for x in glob.glob("t/t_x_rand_stability_*.out") if "_zero" not in x]
+for other_log in other_logs:
+    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_stability.v b/test_regress/t/t_x_rand_stability.v
new file mode 100644
index 000000000..439e31d7b
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.v
@@ -0,0 +1,74 @@
+// DESCRIPTION: Verilator: Confirm x randomization stability
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+    int cyc = 0;
+
+    logic [31:0] uninitialized;
+    logic [31:0] x_assigned = '0;
+`ifdef ADD_SIGNAL
+    logic [31:0] added;
+    logic [31:0] x_assigned_added = '0;
+`endif
+    logic [31:0] unused;
+    logic [31:0] uninitialized2;
+    logic [255:0] big;
+    int random_init = $random();
+
+    sub_no_inline the_sub_no_inline_1();
+    sub_no_inline the_sub_no_inline_2();
+    sub_yes_inline the_sub_yes_inline_1();
+    sub_yes_inline the_sub_yes_inline_2();
+
+    initial begin
+        $display("uninitialized = 0x%x", uninitialized);
+        $display("x_assigned (initial) = 0x%x", x_assigned);
+        $display("uninitialized2 = 0x%x", uninitialized2);
+        $display("big = 0x%x", big);
+        $display("random_init = 0x%x", random_init);
+    end
+
+    always @(posedge clk) begin
+        x_assigned <= 'x;
+`ifdef ADD_SIGNAL
+        x_assigned_added <= 'x;
+`endif
+        cyc <= cyc + 1;
+        $display("rand = 0x%x", $random());
+        if (cyc == 4) begin
+            $display("x_assigned = 0x%x", x_assigned);
+`ifndef NOT_RAND
+            if (uninitialized == uninitialized2) $stop();
+            if (the_sub_yes_inline_1.no_init == the_sub_yes_inline_2.no_init) $stop();
+            if (the_sub_no_inline_1.no_init == the_sub_no_inline_2.no_init) $stop();
+`endif
+`ifdef ADD_SIGNAL
+            if (added == 0) $stop();
+            if (x_assigned_added == 0) $stop();
+`endif
+            $display("Last rand = 0x%x", $random());
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+
+endmodule
+
+module sub_no_inline; /* verilator no_inline_module */
+    logic [63:0] no_init;
+    initial $display("%m no_init 0x%0x", no_init);
+endmodule
+
+module sub_yes_inline; /* verilator inline_module */
+    logic [63:0] no_init;
+    initial $display("%m no_init 0x%0x", no_init);
+endmodule
diff --git a/test_regress/t/t_x_rand_stability_add.out b/test_regress/t/t_x_rand_stability_add.out
new file mode 100644
index 000000000..562cb9864
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0xc0391efd
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add.py b/test_regress/t/t_x_rand_stability_add.py
new file mode 100755
index 000000000..c2766d031
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_add_trace.out b/test_regress/t/t_x_rand_stability_add_trace.out
new file mode 100644
index 000000000..562cb9864
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0xc0391efd
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add_trace.py b/test_regress/t/t_x_rand_stability_add_trace.py
new file mode 100755
index 000000000..ea6207b6e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_trace.out b/test_regress/t/t_x_rand_stability_trace.out
new file mode 100644
index 000000000..562cb9864
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0xc0391efd
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_trace.py b/test_regress/t/t_x_rand_stability_trace.py
new file mode 100755
index 000000000..05c2f308d
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_zeros.out b/test_regress/t/t_x_rand_stability_zeros.out
new file mode 100644
index 000000000..d54e3ecd4
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_zeros.out
@@ -0,0 +1,17 @@
+uninitialized = 0x00000000
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0x00000000
+big = 0x0000000000000000000000000000000000000000000000000000000000000000
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x0
+top.t.the_sub_yes_inline_2 no_init 0x0
+top.t.the_sub_no_inline_1 no_init 0x0
+top.t.the_sub_no_inline_2 no_init 0x0
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x00000000
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_zeros.py b/test_regress/t/t_x_rand_stability_zeros.py
new file mode 100755
index 000000000..c872e4dd0
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_zeros.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
+
+test.passes()

From 9430960b181d02cf136dfe7a8d21c0ab48897877 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 16 May 2025 18:59:35 -0400
Subject: [PATCH 069/211] Commentary: Changes update

---
 Changes           |  9 ++++++++-
 docs/CONTRIBUTORS | 31 +++++++++++++++----------------
 docs/spelling.txt |  1 +
 3 files changed, 24 insertions(+), 17 deletions(-)

diff --git a/Changes b/Changes
index 068b67749..57754a10c 100644
--- a/Changes
+++ b/Changes
@@ -14,8 +14,10 @@ Verilator 5.037 devel
 **Other:**
 
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
+* Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
+* Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
@@ -23,10 +25,15 @@ Verilator 5.037 devel
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
 * Fix streaming to/from packed arrays (#5976). [Geza Lore]
+* Fix segfault writing timestamp to VCD after buffer flush (#5978) (#5980). [Dominick Grochowina]
 * Fix inconsistent assignment error with split-var (#5984) (#5988). [Yutetsu TAKATSUKASA]
 * Fix AstAssignW conversion (#5991) (#5992). [Ryszard Rozak, Antmicro Ltd.]
 * Fix const-bit-op-tree with single-bit masks (#5993) (#5998). [Yutetsu TAKATSUKASA]
-* Fix arithmetic right-shift by constants over 32 bits (#5994).
+* Fix arithmetic right-shift by constants over 32 bits (#5994). [Zhen Yan]
+* Fix checking for too-wide divide and modulus (#6003) (#6006). [Zhen Yan]
+* Fix folding of LteS in DfgPeephole (#6000) (#6004). [Geza Lore]
+* Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
+* Fix skipped generate blocks in toggle coverage (#6010). [Ryszard Rozak, Antmicro Ltd.]
 
 
 Verilator 5.036 2025-04-27
diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index fbdf1f998..0a16f5c7a 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -3,6 +3,7 @@ under the Developer Certificate of Origin (https://developercertificate.org/).
 
 Please see the Verilator manual for 200+ additional contributors. Thanks to all.
 
+404allen404
 Adam Bagley
 Adrian Sampson
 Adrien Le Masle
@@ -11,7 +12,6 @@ Aidan McNay
 Aleksander Kiryk
 Alex Chadwick
 Alex Solomatnikov
-Àlex Torregrosa
 Aliaksei Chapyzhenka
 Ameya Vikram Singh
 Andrea Calabrese
@@ -37,10 +37,10 @@ Chykon
 Conor McCullough
 Dan Petrisko
 Daniel Bates
+Dave Sargeant
 David Horton
 David Ledger
 David Metz
-Dave Sargeant
 David Stanford
 David Turner
 Dercury
@@ -55,14 +55,13 @@ Eric Müller
 Eric Rippey
 Ethan Sifferman
 Eyck Jentzsch
-Furqan Nadir
 Fabian Keßler
 Fan Shupei
-february cozzocrea
 Felix Neumärker
 Felix Yan
 Frans Skarman
 Fuad Ismail
+Furqan Nadir
 G-A. Kamendje
 Garrett Smith
 Geza Lore
@@ -70,12 +69,12 @@ Gianfranco Costamagna
 Gijs Burghoorn
 Gilberto Abram
 Glen Gibb
-Gökçe Aydos
 Graham Rushton
 Greg Davill
 Guokai Chen
 Gus Smith
 Gustav Svensk
+Gökçe Aydos
 Han Qi
 Harald Heckmann
 Hennadii Chernyshchyk
@@ -84,7 +83,6 @@ Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
-Ícaro Lima
 Ilya Barkov
 Iru Cai
 Ivan Vnučec
@@ -98,15 +96,15 @@ James Shi
 Jamey Hicks
 Jamie Iles
 Jan Van Winkel
-Jiangjie Weng
 Jean Berniolles
 Jeremy Bennett
 Jesse Taube
 Jevin Sweval
 Jiacheng Qian
 Jiamin Zhu
-Jitesh Nayak
+Jiangjie Weng
 Jinyan Xu
+Jitesh Nayak
 Jiuyang Liu
 Joey Liu
 John Coiner
@@ -158,8 +156,8 @@ Mateusz Gancarz
 Matthew Ballance
 Michael Bikovitsky
 Michael Killough
-Michaël Lefebvre
 Michal Czyz
+Michaël Lefebvre
 Mike Popoloski
 Miodrag Milanović
 Mladen Slijepcevic
@@ -211,25 +209,25 @@ Srinivasan Venkataramanan
 Stefan Wallentowitz
 Stephen Henry
 Steven Hugg
-sumpster
 Szymon Gizler
 Sören Tempel
 Teng Huang
-Tom Manner
 Tim Hutt
 Tim Snyder
+Tobias Jensen
 Tobias Rosenkranz
 Tobias Wölfel
 Todd Strader
+Tom Manner
 Tomasz Gorochowik
 Topa Topino
 Toru Niina
 Trung Nguyen
 Tudor Timi
 Tymoteusz Blazejczyk
+Udaya Raj Subedi
 Udi Finkelstein
 Unai Martinez-Corral
-Udaya Raj Subedi
 Valentin Atepalikhin
 Varun Koyyalagunta
 Vassilis Papaefstathiou
@@ -250,10 +248,11 @@ Yuri Victorovich
 Yutetsu TAKATSUKASA
 Yves Mathieu
 Zhanglei Wang
+Zhen Yan
 Zhou Shen
 Zhouyi Shen
 Zixi Li
-أحمد المحمودي
-404allen404
-Tobias Jensen
-Zhen Yan
+february cozzocrea
+sumpster
+Àlex Torregrosa
+Ícaro Lima
diff --git a/docs/spelling.txt b/docs/spelling.txt
index fe6ee5665..4d1420f26 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -250,6 +250,7 @@ Liu
 Liwei
 Lockhart
 Longo
+LteS
 Luca
 Luiza
 Lussier

From 1bcd5ee0c11297fd28d35959a0ca608794e8afee Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 16 May 2025 19:02:19 -0400
Subject: [PATCH 070/211] Fix spelling

---
 README.rst                                    |  2 +-
 bin/verilator                                 |  4 +--
 bin/verilator_gantt                           |  2 +-
 docs/guide/faq.rst                            |  2 +-
 docs/guide/install.rst                        |  4 +--
 docs/internals.rst                            |  4 +--
 docs/spelling.txt                             |  8 +++++
 include/verilated.h                           |  2 +-
 src/V3Begin.cpp                               |  7 ++--
 src/V3Const.cpp                               |  4 +--
 src/V3Delayed.cpp                             |  2 +-
 src/V3EmitMk.cpp                              |  2 +-
 src/V3File.cpp                                |  2 +-
 src/V3PreLex.l                                |  6 ++--
 .../t/t_lint_pragma_protected_bad.out         | 36 +++++++++----------
 15 files changed, 46 insertions(+), 41 deletions(-)

diff --git a/README.rst b/README.rst
index 292078152..a4b39dc0e 100644
--- a/README.rst
+++ b/README.rst
@@ -129,7 +129,7 @@ organizations; please see `Verilator Commercial Support
 Related Projects
 ================
 
-- `GTKwave <http://gtkwave.sourceforge.net/>`_ - Waveform viewer for
+- `GTKwave <https://gtkwave.sourceforge.net/>`_ - Waveform viewer for
   Verilator traces.
 
 - `Icarus Verilog`_ - Icarus is a highly-featured interpreted Verilog
diff --git a/bin/verilator b/bin/verilator
index 777947dce..143bce8a6 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -130,7 +130,7 @@ if ($opt_gdb) {
 } elsif ($opt_valgrind) {
     # Run under valgrind
     my $valgrind_bin = ($ENV{VERILATOR_VALGRIND} || "valgrind --error-exitcode=1 --max-stackframe=2815880"
-        # Magic number sugested by valgrind, may need to be increased in future
+        # Magic number suggested by Valgrind, may need to be increased in future
         # if you get warnings. See: https://valgrind.org/docs/manual/manual-core.html#opt.max-stackframe
         );
 
@@ -388,7 +388,7 @@ detailed descriptions of these arguments.
     --instr-count-dpi <value>   Assumed dynamic instruction count of DPI imports
      -j <jobs>                  Parallelism for --build-jobs/--verilate-jobs
     --no-json-edit-nums         Don't dump editNum in .tree.json files
-    --no-json-ids               Don't use short identifiers instead of adresses/paths in .tree.json
+    --no-json-ids               Don't use short identifiers instead of addresses/paths in .tree.json
     --json-only                 Create JSON parser output (.tree.json and .meta.json)
     --json-only-meta-output <filename>  Set .tree.meta.json output filename
     --json-only-output <filename>       Set .tree.json output filename
diff --git a/bin/verilator_gantt b/bin/verilator_gantt
index ee46ca814..bae7a2603 100755
--- a/bin/verilator_gantt
+++ b/bin/verilator_gantt
@@ -613,7 +613,7 @@ SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0""")
 
 parser.add_argument('--debug', action='store_true', help='enable debug')
 parser.add_argument('--no-vcd', help='disable creating vcd', action='store_true')
-parser.add_argument('--vcd', help='filename for vcd outpue', default='profile_exec.vcd')
+parser.add_argument('--vcd', help='filename for vcd output', default='profile_exec.vcd')
 parser.add_argument('filename',
                     help='input profile_exec.dat filename to process',
                     default='profile_exec.dat')
diff --git a/docs/guide/faq.rst b/docs/guide/faq.rst
index d88220f9e..3b634adc6 100644
--- a/docs/guide/faq.rst
+++ b/docs/guide/faq.rst
@@ -260,7 +260,7 @@ How do I view waveforms (aka dumps or traces)?
 
 Verilator creates standard VCD (Value Change Dump) and FST files.  VCD
 files are viewable with the open-source
-`GTKWave <http://gtkwave.sourceforge.net/>`_,
+`GTKWave <https://gtkwave.sourceforge.net/>`_,
 `Surfer <https://surfer-project.org/>`_, Dinotrace (legacy), or any of the
 many closed-source viewer offerings; FST is supported only by GTKWave and
 Surfer.
diff --git a/docs/guide/install.rst b/docs/guide/install.rst
index aaca4377f..dc6c3ecd6 100644
--- a/docs/guide/install.rst
+++ b/docs/guide/install.rst
@@ -182,7 +182,7 @@ Install GTKWave
 ^^^^^^^^^^^^^^^
 
 To make use of Verilator FST tracing you will want `GTKwave
-<http://gtkwave.sourceforge.net/>`__ installed, however this is not
+<https://gtkwave.sourceforge.net/>`__ installed, however this is not
 required at Verilator build time.
 
 .. code-block:: shell
@@ -288,7 +288,7 @@ location include the Verilator version name:
 
 Note after installing (see `Installation`_), you need to add the path to
 the ``bin`` directory to your ``PATH``. Or, if you use `modulecmd
-<http://modules.sourceforge.net/>`__, you'll want a module file like the
+<https://modules.sourceforge.net/>`__, you'll want a module file like the
 following:
 
 .. code-block:: shell
diff --git a/docs/internals.rst b/docs/internals.rst
index acef93bc7..67b6d289c 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1470,7 +1470,7 @@ Preparing to Run Tests
 
 For all tests to pass, you must install the following packages:
 
--  SystemC to compile the SystemC outputs, see http://systemc.org
+-  SystemC to compile the SystemC outputs, see https://systemc.org
 
 -  vcddiff to find differences in VCD outputs. See the readme at
    https://github.com/veripool/vcddiff
@@ -1633,7 +1633,7 @@ scaled so it can be more useful with large graphs.
 
 For interactive graph viewing consider `xdot
 <https://github.com/jrfonseca/xdot.py>`__ or `ZGRViewer
-<http://zvtm.sourceforge.net/zgrviewer.html>`__. If you know of better
+<https://zvtm.sourceforge.net/zgrviewer.html>`__. If you know of better
 viewers (especially for large graphs) please let us know.
 
 
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 4d1420f26..7199c77ff 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -440,6 +440,7 @@ UNOPTFLAT
 Ubixum
 Ueno
 Uints
+Undefine
 Undefines
 Unsized
 Urbach
@@ -617,7 +618,9 @@ dep
 deparametrized
 der
 dereference
+dereferenced
 desassign
+deserialize
 destructor
 desynchronization
 detections
@@ -745,6 +748,8 @@ hierCMakeArgs
 hierMkArgs
 hierParameters
 hierVer
+html
+https
 hx
 hyperthreading
 hyperthreads
@@ -842,6 +847,7 @@ multithread
 multithreaded
 multithreading
 musl
+mutex
 mutexes
 mux
 muzafferkal
@@ -907,6 +913,7 @@ pre
 precisions
 precompiled
 predefines
+prefetch
 prepareClone
 prepend
 prepended
@@ -1063,6 +1070,7 @@ typename
 uint
 un
 unbased
+uncomment
 undef
 undefineall
 undriven
diff --git a/include/verilated.h b/include/verilated.h
index a5af6715b..53c0b869f 100644
--- a/include/verilated.h
+++ b/include/verilated.h
@@ -39,8 +39,8 @@
 #endif
 
 // clang-format off
-#include "verilatedos.h"
 #include "verilated_config.h"
+#include "verilatedos.h"
 #if VM_SC
 # include "verilated_sc.h"  // Get SYSTEMC_VERSION and time declarations
 #endif
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index 9eed66f71..44512c718 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -29,6 +29,7 @@
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Begin.h"
+#include "V3String.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
@@ -69,11 +70,7 @@ class BeginVisitor final : public VNVisitor {
 
     // METHODS
 
-    string dot(const string& a, const string& b) {
-        if (a == "") return b;
-        if (b == "") return a;
-        return a + "__DOT__" + b;
-    }
+    string dot(const string& a, const string& b) { return VString::dot(a, "__DOT__", b); }
 
     void dotNames(const AstNodeBlock* const nodep, const char* const blockName) {
         UINFO(8, "nname " << m_namedScope << endl);
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index d379a27a5..5f9be643d 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -193,9 +193,9 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
             , m_restore{true} {}
         ~Restorer() {
             UASSERT(m_visitor.m_bitPolarities.size() >= m_polaritiesSize,
-                    "m_bitPolarities must grow monotorilaclly");
+                    "m_bitPolarities must grow monotonically");
             UASSERT(m_visitor.m_frozenNodes.size() >= m_frozenSize,
-                    "m_frozenNodes must grow monotorilaclly");
+                    "m_frozenNodes must grow monotonically");
             if (m_restore) restoreNow();
         }
         void disableRestore() { m_restore = false; }
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 82e0d5669..ed57f85fe 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -560,7 +560,7 @@ class DelayedVisitor final : public VNVisitor {
     void prepareSchemeValueQueue(AstVarScope* vscp, VarScopeInfo& vscpInfo) {
         UASSERT_OBJ(N_Partial ? vscpInfo.m_scheme == Scheme::ValueQueuePartial
                               : vscpInfo.m_scheme == Scheme::ValueQueueWhole,
-                    vscp, "Inconsisten<t NBA s>cheme");
+                    vscp, "Inconsistent NBA scheme");
         FileLine* const flp = vscp->fileline();
         AstScope* const scopep = vscp->scopep();
 
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 19427db8b..6a7631c5e 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -659,7 +659,7 @@ public:
         if (v3Global.opt.systemC() && !V3Options::systemCFound()) {
             v3fatal("Need $SYSTEMC_INCLUDE in environment or when Verilator configured,\n"
                     "and need $SYSTEMC_LIBDIR in environment or when Verilator configured\n"
-                    "Probably System-C isn't installed, see http://www.systemc.org\n");
+                    "Probably System-C isn't installed, see https://systemc.org\n");
         }
 
         of.puts("\n### Switches...\n");
diff --git a/src/V3File.cpp b/src/V3File.cpp
index c10d48976..fffd6bf87 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -995,7 +995,7 @@ public:
         if (it != m_nameMap.end()) {
             // No way to go back and correct the older crypt name
             UASSERT(old == it->second,
-                    "Passthru request for '" + old + "' after already --protect-ids of it.");
+                    "Pass-thru request for '" + old + "' after already --protect-ids of it.");
         } else {
             m_nameMap.emplace(old, old);
             m_newIdSet.insert(old);
diff --git a/src/V3PreLex.l b/src/V3PreLex.l
index eaa899ea3..21daa46c1 100644
--- a/src/V3PreLex.l
+++ b/src/V3PreLex.l
@@ -188,7 +188,7 @@ bom             [\357\273\277]
                           if ((yyourleng()-1) <= size_t(LEXP->m_protLength) && ((yyleng & 3) == 1)) {
                               LEXP->m_protBytes -= (yyleng-1)/4*3;
                           } else {
-                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 line too long in `pragma protect key_bloock/data_block");
+                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 line too long in `pragma protect key_block/data_block");
                           }
                           if (yytext[yyleng-3] == '=')
                               LEXP->m_protBytes++;
@@ -197,11 +197,11 @@ bom             [\357\273\277]
                           if (LEXP->m_protBytes == 0) {
                               BEGIN(INITIAL);
                           } else if (LEXP->m_protBytes < 0)
-                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 encoding (too short) in `pragma protect key_bloock/data_block");
+                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 encoding (too short) in `pragma protect key_block/data_block");
                           /*return VP_TEXT;*/ }
 <ENCBASE64>{wsn}*[\n\r] { FL_FWDC;
                           if (LEXP->m_protBytes != 0)
-                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 encoding length mismatch in `pragma protect key_bloock/data_block");
+                              LEXP->curFilelinep()->v3warn(BADSTDPRAGMA, "BASE64 encoding length mismatch in `pragma protect key_block/data_block");
                           linenoInc(); BEGIN(INITIAL);
                           return VP_TEXT; }
 
diff --git a/test_regress/t/t_lint_pragma_protected_bad.out b/test_regress/t/t_lint_pragma_protected_bad.out
index 3c0cd41b1..c70a20dcb 100644
--- a/test_regress/t/t_lint_pragma_protected_bad.out
+++ b/test_regress/t/t_lint_pragma_protected_bad.out
@@ -5,7 +5,7 @@
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:16:17: Unknown '`pragma protect' error
    16 | `pragma protect encrypt_agent_info
       |                 ^~~~~~~~~~~~~~~~~~
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:29:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:29:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:33:17: Multiple `pragma protected encoding sections
    33 | `pragma protect encoding = (enctype = "BASE64", line_length = 76, bytes = 128)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -20,26 +20,26 @@
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:59:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:60:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:60:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
    60 | c2lvbiAzIG9mIHRoZSBHTlUgTGVzc2VyCkdlbmVyYWwgUHVibGljIExpY2Vuc2UsIGFuZCB0aGUg
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:61:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:61:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
    61 | IkdOVSBHUEwiIHJlZmVycyB0byB2ZXJzaW9uIDMgb2YgdGhlIEdOVQpHZW5lcmFsIFB1YmxpYyBM
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:62:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:62:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
    62 | aWNlbnNlLgoKICAiVGhlIExpYnJhcnkiIHJlZmVycyB0byBhIGNvdmVyZWQgd29yayBnb3Zlcm5l
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:63:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:63:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
    63 | ZCBieSB0aGlzIExpY2Vuc2UsCm90aGVyIHRoYW4gYW4gQXBwbGljYXRpb24gb3IgYSBDb21iaW5l
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:64:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
    64 | ZCBXb3JrIGFzIG==
       | ^
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:65:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:69:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 line too long in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 line too long in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:70:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:72:17: Multiple `pragma protected encoding sections
    72 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -47,8 +47,8 @@
    72 | `pragma protect encoding = (enctype = "BASE64", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:74:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 line too long in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 line too long in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:75:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:77:17: Multiple `pragma protected encoding sections
    77 | `pragma protect encoding = (enctype = "UUENCODE", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -56,8 +56,8 @@
    77 | `pragma protect encoding = (enctype = "UUENCODE", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:79:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 line too long in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 line too long in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:80:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:81:17: Multiple `pragma protected encoding sections
    81 | `pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -68,14 +68,14 @@
    81 | `pragma protect encoding = (enctype = "QUOTED-PRINTABLE", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:83:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding (too short) in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding (too short) in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:84:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-UNSUPPORTED: t/t_lint_pragma_protected_bad.v:85:17: Unsupported: only BASE64 is recognized for `pragma protected encoding
    85 | `pragma protect encoding = (enctype = "RAW", line_length = 1, bytes = 4)
       |                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 %Warning-PROTECTED: t/t_lint_pragma_protected_bad.v:87:17: A '`pragma protected data_block' encrypted section was detected and will be skipped.
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 line too long in `pragma protect key_bloock/data_block
-%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 encoding length mismatch in `pragma protect key_bloock/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 line too long in `pragma protect key_block/data_block
+%Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:88:1: BASE64 encoding length mismatch in `pragma protect key_block/data_block
 %Error-BADSTDPRAGMA: t/t_lint_pragma_protected_bad.v:96:1: `pragma is missing a pragma_expression.
    96 | `pragma
       | ^~~~~~~

From 8d3b47a18a770862b69e9ee2586c59752e3fcec5 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Fri, 16 May 2025 23:16:40 +0000
Subject: [PATCH 071/211] Apply 'make format'

---
 src/V3Begin.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index 44512c718..f66ed625c 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -29,6 +29,7 @@
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
 #include "V3Begin.h"
+
 #include "V3String.h"
 
 VL_DEFINE_DEBUG_FUNCTIONS;

From fc700538a57842d6662024bd756e996b4cb89997 Mon Sep 17 00:00:00 2001
From: Zhen Yan <89853352+sdjasj@users.noreply.github.com>
Date: Sat, 17 May 2025 09:57:52 +0800
Subject: [PATCH 072/211] Fix arithmetic left-shift by constants over 32 bits
 (#6007) (#6015)

---
 src/V3Number.cpp                 |  4 ++--
 test_regress/t/t_math_shiftls.py | 18 ++++++++++++++++++
 test_regress/t/t_math_shiftls.v  | 23 +++++++++++++++++++++++
 3 files changed, 43 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_math_shiftls.py
 create mode 100644 test_regress/t/t_math_shiftls.v

diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 13a1984fb..031a253ab 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -1877,8 +1877,8 @@ V3Number& V3Number::opShiftL(const V3Number& lhs, const V3Number& rhs) {
         if (rhs.bitIs1(bit)) return *this;  // shift of over 2^32 must be zero
     }
     const uint32_t rhsval = rhs.toUInt();
-    for (int bit = 0; bit < width(); ++bit) {
-        if (bit >= static_cast<int>(rhsval)) setBit(bit, lhs.bitIs(bit - rhsval));
+    for (uint32_t bit = 0; bit < static_cast<uint32_t>(width()); ++bit) {
+        if (bit >= rhsval) setBit(bit, lhs.bitIs(bit - rhsval));
     }
     return *this;
 }
diff --git a/test_regress/t/t_math_shiftls.py b/test_regress/t/t_math_shiftls.py
new file mode 100755
index 000000000..bd059b0f2
--- /dev/null
+++ b/test_regress/t/t_math_shiftls.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_math_shiftls.v b/test_regress/t/t_math_shiftls.v
new file mode 100644
index 000000000..334f1a104
--- /dev/null
+++ b/test_regress/t/t_math_shiftls.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Zhen Yan.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkd(gotv, expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__, `__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module top (out33);
+
+output wire [6:0] out33;
+
+    assign out33 = (7'o66 <<< 32'hFFFF_FFFF);
+
+    initial begin
+      #10;
+      `checkd(out33, '0);
+      $write("*-* All Finished *-*\n");
+      $finish;
+    end
+
+endmodule

From 2dbe897e1b4aaa180c2ad0487e85489bffbda9f9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 16 May 2025 21:06:12 -0400
Subject: [PATCH 073/211] Add security policy

---
 docs/security.rst                  | 41 ++++++++++++++++++++++++++++++
 test_regress/t/t_dist_copyright.py |  1 +
 2 files changed, 42 insertions(+)
 create mode 100644 docs/security.rst

diff --git a/docs/security.rst b/docs/security.rst
new file mode 100644
index 000000000..53bc500a3
--- /dev/null
+++ b/docs/security.rst
@@ -0,0 +1,41 @@
+.. for github, vim: syntax=reStructuredText
+
+Security Policy
+===============
+
+If you believe you have found a security issue in any Verilator-owned
+repository, create a `GitHub repository security advisory
+<https://docs.github.com/en/code-security/security-advisories/working-with-repository-security-advisories/creating-a-repository-security-advisory>`__.
+We request that you please not publicly disclose the issue until it has
+been addressed by us.
+
+SystemVerilog Security
+----------------------
+
+The SystemVerilog language includes `$system`, etc. operating system calls,
+and as such executables created by Verilator should be considered insecure.
+In contrast, it is a security issue if a Verilator-created data file, such
+as a coverage data file, when read with `verilator_coverage`, allows
+arbitrary code execution.
+
+Bug bounties
+------------
+
+While we encourage reports of suspected security problems, we are an open
+source project, and do not run any bug bounty programs.
+
+Preferred Languages
+-------------------
+
+We prefer all communications to be in English.
+
+Policy
+------
+
+We follow the principle of `Coordinated Vulnerability Disclosure
+<https://en.wikipedia.org/wiki/Coordinated_vulnerability_disclosure>`__.
+
+Distribution
+------------
+
+SPDX-License-Identifier: CC0-1.0
diff --git a/test_regress/t/t_dist_copyright.py b/test_regress/t/t_dist_copyright.py
index 12c1a4c3d..92b4ff4a9 100755
--- a/test_regress/t/t_dist_copyright.py
+++ b/test_regress/t/t_dist_copyright.py
@@ -30,6 +30,7 @@ EXEMPT_FILES_LIST = """
     docs/CONTRIBUTING.rst
     docs/CONTRIBUTORS
     docs/README.rst
+    docs/security.rst
     docs/_static
     docs/gen
     docs/spelling.txt

From 7a5c223ccf2ce5c71d1b1c02e33ea1819f5ff8ad Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 16 May 2025 22:32:25 -0400
Subject: [PATCH 074/211] Tests: Improve warning coverage

---
 test_regress/t/t_dist_warn_coverage.py      |  22 +-
 test_regress/t/t_dpi_display_bad.out        |   5 +
 test_regress/t/t_dpi_display_bad.py         |  16 ++
 test_regress/t/t_dpi_display_bad.v          |  24 ++
 test_regress/t/t_dynarray_method_bad.out    |   9 +
 test_regress/t/t_dynarray_method_bad.v      |   2 +
 test_regress/t/t_flag_threads_bad.out       |   2 +
 test_regress/t/t_flag_threads_bad.py        |  21 ++
 test_regress/t/t_flag_threads_bad2.out      |   2 +
 test_regress/t/t_flag_threads_bad2.py       |  21 ++
 test_regress/t/t_flag_trace_threads_bad.out |   2 +
 test_regress/t/t_flag_trace_threads_bad.py  |  19 ++
 test_regress/t/t_program_extern.out         |   8 +-
 test_regress/t/t_program_extern.v           |  14 +-
 test_regress/t/t_randsequence.out           | 246 ++++++++++++++++++++
 test_regress/t/t_randsequence.py            |   4 +-
 test_regress/t/t_var_pins_bad.out           |   3 +
 test_regress/t/t_var_pins_bad.py            |  17 ++
 18 files changed, 411 insertions(+), 26 deletions(-)
 create mode 100644 test_regress/t/t_dpi_display_bad.out
 create mode 100755 test_regress/t/t_dpi_display_bad.py
 create mode 100644 test_regress/t/t_dpi_display_bad.v
 create mode 100644 test_regress/t/t_flag_threads_bad.out
 create mode 100755 test_regress/t/t_flag_threads_bad.py
 create mode 100644 test_regress/t/t_flag_threads_bad2.out
 create mode 100755 test_regress/t/t_flag_threads_bad2.py
 create mode 100644 test_regress/t/t_flag_trace_threads_bad.out
 create mode 100755 test_regress/t/t_flag_trace_threads_bad.py
 create mode 100644 test_regress/t/t_var_pins_bad.out
 create mode 100755 test_regress/t/t_var_pins_bad.py

diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index 0a973ec52..6540a40cd 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -19,38 +19,32 @@ Suppressed = {}
 
 for s in [
         ' exited with ',  # Is hit; driver.py filters out
+        'Assigned pin is neither input nor output',  # Instead earlier error
+        'Define missing argument \'',  # Instead get Define passed too many arguments
+        'Define or directive not defined: `',  # Instead V3ParseImp will warn
         'EOF in unterminated string',  # Instead get normal unterminated
         'Enum ranges must be integral, per spec',  # Hard to hit
+        'Expecting define formal arguments. Found: ',  # Instead define syntax error
         'Import package not found: ',  # Errors earlier, until future parser released
         'Return with return value isn\'t underneath a function',  # Hard to hit, get other bad return messages
-        'Syntax error: Range \':\', \'+:\' etc are not allowed in the instance ',  # Instead get syntax error
         'Syntax error parsing real: \'',  # Instead can't lex the number
+        'Syntax error: Range \':\', \'+:\' etc are not allowed in the instance ',  # Instead get syntax error
         'Unsupported: Ranges ignored in port-lists',  # Hard to hit
         'dynamic new() not expected in this context (expected under an assign)',  # Instead get syntax error
         # Not yet analyzed
         ' loading non-variable',
-        '--pins-bv maximum is 65: ',
         '--pipe-filter protocol error, unexpected: ',
         '--pipe-filter returned bad status',
         '--pipe-filter: Can\'t pipe: ',
         '--pipe-filter: fork failed: ',
-        '--threads must be >= 0: ',
-        '--threads-max-mtasks must be >= 1: ',
-        '--trace-threads must be >= 1: ',
-        '/*verilator sformat*/ can only be applied to last argument of ',
         'Argument needed for string.',
         'Array initialization has too few elements, need element ',
-        'Assigned pin is neither input nor output',
         'Assignment pattern with no members',
         'Can\'t find varpin scope of ',
         'Can\'t read annotation file: ',
         'Can\'t resolve module reference: \'',
         'Can\'t write file: ',
-        'Circular logic when ordering code (non-cutable edge loop)',
-        'Define missing argument \'',
-        'Define or directive not defined: `',
         'Exceeded limit of ',
-        'Expecting define formal arguments. Found: ',
         'Extern declaration\'s scope is not a defined class',
         'File not found: ',
         'Format to $display-like function must have constant format string',
@@ -80,7 +74,6 @@ for s in [
         'Unsupported pullup/down (weak driver) construct.',
         'Unsupported tristate construct (not in propagation graph): ',
         'Unsupported tristate port expression: ',
-        'Unsupported/unknown built-in dynamic array method ',
         'Unsupported: $bits for queue',
         'Unsupported: $c can\'t generate wider than 64 bits',
         'Unsupported: &&& expression',
@@ -107,20 +100,15 @@ for s in [
         'Unsupported: [] dimensions',
         'Unsupported: \'default :/\' constraint',
         'Unsupported: \'{} .* patterns',
-        'Unsupported: \'{} tagged patterns',
         'Unsupported: always[] (in property expression)',
         'Unsupported: assertion items in clocking blocks',
         'Unsupported: don\'t know how to deal with ',
         'Unsupported: eventually[] (in property expression)',
         'Unsupported: extern forkjoin',
-        'Unsupported: extern interface',
-        'Unsupported: extern module',
         'Unsupported: extern task',
         'Unsupported: modport export',
         'Unsupported: no_inline for tasks',
         'Unsupported: property port \'local\'',
-        'Unsupported: randsequence production list',
-        'Unsupported: randsequence repeat',
         'Unsupported: repeat event control',
         'Unsupported: s_always (in property expression)',
         'Unsupported: static cast to ',
diff --git a/test_regress/t/t_dpi_display_bad.out b/test_regress/t/t_dpi_display_bad.out
new file mode 100644
index 000000000..be959988b
--- /dev/null
+++ b/test_regress/t/t_dpi_display_bad.out
@@ -0,0 +1,5 @@
+%Error: t/t_dpi_display_bad.v:17:69: /*verilator sformat*/ can only be applied to last argument of a function
+   17 |        (input string formatted /*verilator sformat*/ , input string other_bad );
+      |                                                                     ^~~~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Exiting due to
diff --git a/test_regress/t/t_dpi_display_bad.py b/test_regress/t/t_dpi_display_bad.py
new file mode 100755
index 000000000..e33e10acf
--- /dev/null
+++ b/test_regress/t/t_dpi_display_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_dpi_display_bad.v b/test_regress/t/t_dpi_display_bad.v
new file mode 100644
index 000000000..d9731bda3
--- /dev/null
+++ b/test_regress/t/t_dpi_display_bad.v
@@ -0,0 +1,24 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Copyright 2010 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+module t ();
+
+`ifndef VERILATOR
+   `error "Only Verilator supports PLI-ish DPI calls and sformat conversion."
+`endif
+
+   import "DPI-C" context dpii_display_call
+     = function void \$dpii_display
+       (input string formatted /*verilator sformat*/, input string other_bad );
+
+   initial begin
+      $dpii_display("hello", "huh");
+      $stop;
+   end
+
+endmodule
diff --git a/test_regress/t/t_dynarray_method_bad.out b/test_regress/t/t_dynarray_method_bad.out
index e08898cd9..0e0721a68 100644
--- a/test_regress/t/t_dynarray_method_bad.out
+++ b/test_regress/t/t_dynarray_method_bad.out
@@ -24,4 +24,13 @@
                                                    : ... note: In instance 't'
    29 |       b = s.product with (item inside { "hello", "sad", "world" });
       |         ^
+%Error-UNSUPPORTED: t/t_dynarray_method_bad.v:32:13: Unsupported/unknown built-in dynamic array method 'unknown_bad'
+                                                   : ... note: In instance 't'
+   32 |       b = s.unknown_bad;
+      |             ^~~~~~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Warning-WIDTHTRUNC: t/t_dynarray_method_bad.v:32:9: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's METHODCALL 'unknown_bad' generates 64 bits.
+                                                   : ... note: In instance 't'
+   32 |       b = s.unknown_bad;
+      |         ^
 %Error: Exiting due to
diff --git a/test_regress/t/t_dynarray_method_bad.v b/test_regress/t/t_dynarray_method_bad.v
index 3253dc1a7..61c06fa2e 100644
--- a/test_regress/t/t_dynarray_method_bad.v
+++ b/test_regress/t/t_dynarray_method_bad.v
@@ -29,6 +29,8 @@ module t (/*AUTOARG*/);
       b = s.product with (item inside { "hello", "sad", "world" });
       `checkh(b, 1'b1);
 
+      b = s.unknown_bad;
+
       $write("*-* All Finished *-*\n");
       $finish;
    end
diff --git a/test_regress/t/t_flag_threads_bad.out b/test_regress/t/t_flag_threads_bad.out
new file mode 100644
index 000000000..7c9e6d677
--- /dev/null
+++ b/test_regress/t/t_flag_threads_bad.out
@@ -0,0 +1,2 @@
+%Error: --threads must be >= 0: -1
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_flag_threads_bad.py b/test_regress/t/t_flag_threads_bad.py
new file mode 100755
index 000000000..470ed6fe3
--- /dev/null
+++ b/test_regress/t/t_flag_threads_bad.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = 't/t_EXAMPLE.v'
+
+test.run(cmd=["perl", os.environ["VERILATOR_ROOT"] + "/bin/verilator", "--threads -1"],
+         logfile=test.run_log_filename,
+         fails=True,
+         expect_filename=test.golden_filename,
+         verilator_run=True)
+
+test.passes()
diff --git a/test_regress/t/t_flag_threads_bad2.out b/test_regress/t/t_flag_threads_bad2.out
new file mode 100644
index 000000000..5b6ec25d7
--- /dev/null
+++ b/test_regress/t/t_flag_threads_bad2.out
@@ -0,0 +1,2 @@
+%Error: --threads-max-mtasks must be >= 1: 0
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_flag_threads_bad2.py b/test_regress/t/t_flag_threads_bad2.py
new file mode 100755
index 000000000..03f779c30
--- /dev/null
+++ b/test_regress/t/t_flag_threads_bad2.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = 't/t_EXAMPLE.v'
+
+test.run(cmd=["perl", os.environ["VERILATOR_ROOT"] + "/bin/verilator", "--threads-max-mtasks 0"],
+         logfile=test.run_log_filename,
+         fails=True,
+         expect_filename=test.golden_filename,
+         verilator_run=True)
+
+test.passes()
diff --git a/test_regress/t/t_flag_trace_threads_bad.out b/test_regress/t/t_flag_trace_threads_bad.out
new file mode 100644
index 000000000..f802e96ff
--- /dev/null
+++ b/test_regress/t/t_flag_trace_threads_bad.out
@@ -0,0 +1,2 @@
+%Error: --trace-threads must be >= 1: -1
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_flag_trace_threads_bad.py b/test_regress/t/t_flag_trace_threads_bad.py
new file mode 100755
index 000000000..43768ff94
--- /dev/null
+++ b/test_regress/t/t_flag_trace_threads_bad.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = 't/t_EXAMPLE.v'
+
+test.lint(verilator_flags2=["--trace-threads -1"],
+          fails=True,
+          expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_program_extern.out b/test_regress/t/t_program_extern.out
index de3c1a979..13c1988fa 100644
--- a/test_regress/t/t_program_extern.out
+++ b/test_regress/t/t_program_extern.out
@@ -1,5 +1,11 @@
 %Error-UNSUPPORTED: t/t_program_extern.v:7:1: Unsupported: extern program
-    7 | extern program pgm;
+    7 | extern program ex_pgm;
       | ^~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_program_extern.v:8:1: Unsupported: extern interface
+    8 | extern interface ex_ifc;
+      | ^~~~~~
+%Error-UNSUPPORTED: t/t_program_extern.v:9:1: Unsupported: extern module
+    9 | extern module ex_mod;
+      | ^~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_program_extern.v b/test_regress/t/t_program_extern.v
index 67bf42028..8389ad211 100644
--- a/test_regress/t/t_program_extern.v
+++ b/test_regress/t/t_program_extern.v
@@ -4,18 +4,18 @@
 // any use, without warranty, 2022 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
-extern program pgm;
-
-program pgm;
-   task ptask;
-   endtask
-endprogram
+extern program ex_pgm;
+extern interface ex_ifc;
+extern module ex_mod;
 
 module t(/*AUTOARG*/);
 
-   pgm sub ();
+   ex_pgm u_pgm();
+   ex_ifc u_ifc();
+   ex_mod u_mod();
 
    initial begin
+      ex_task();
       $write("*-* All Finished *-*\n");
       $finish;
    end
diff --git a/test_regress/t/t_randsequence.out b/test_regress/t/t_randsequence.out
index 41d75d959..ea6be47a9 100644
--- a/test_regress/t/t_randsequence.out
+++ b/test_regress/t/t_randsequence.out
@@ -149,4 +149,250 @@
 %Error-UNSUPPORTED: t/t_randsequence.v:105:38: Unsupported: randsequence production id
   105 |             one_if: if (i % 10 == 0) count_1 else most;
       |                                      ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:105:51: Unsupported: randsequence production id
+  105 |             one_if: if (i % 10 == 0) count_1 else most;
+      |                                                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:105:21: Unsupported: randsequence if
+  105 |             one_if: if (i % 10 == 0) count_1 else most;
+      |                     ^~
+%Error-UNSUPPORTED: t/t_randsequence.v:105:19: Unsupported: randsequence production
+  105 |             one_if: if (i % 10 == 0) count_1 else most;
+      |                   ^
+%Error-UNSUPPORTED: t/t_randsequence.v:106:20: Unsupported: randsequence production
+  106 |             count_1: { ++counts[1]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:107:20: Unsupported: randsequence production
+  107 |             count_2: { ++counts[2]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:108:20: Unsupported: randsequence production
+  108 |             count_3: { ++counts[3]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:109:20: Unsupported: randsequence production
+  109 |             count_4: { ++counts[4]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:110:16: Unsupported: randsequence production
+  110 |             bad: { $stop; };
+      |                ^
+%Error-UNSUPPORTED: t/t_randsequence.v:112:24: Unsupported: randsequence production id
+  112 |                     0: bad;
+      |                        ^~~
+%Error-UNSUPPORTED: t/t_randsequence.v:112:22: Unsupported: randsequence case item
+  112 |                     0: bad;
+      |                      ^
+%Error-UNSUPPORTED: t/t_randsequence.v:113:27: Unsupported: randsequence production id
+  113 |                     1, 2: count_2;
+      |                           ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:113:25: Unsupported: randsequence case item
+  113 |                     1, 2: count_2;
+      |                         ^
+%Error-UNSUPPORTED: t/t_randsequence.v:114:30: Unsupported: randsequence production id
+  114 |                     3, 4, 5: count_3;
+      |                              ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:114:28: Unsupported: randsequence case item
+  114 |                     3, 4, 5: count_3;
+      |                            ^
+%Error-UNSUPPORTED: t/t_randsequence.v:115:29: Unsupported: randsequence production id
+  115 |                     default count_4;   
+      |                             ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:115:21: Unsupported: randsequence case item
+  115 |                     default count_4;   
+      |                     ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:111:19: Unsupported: randsequence case
+  111 |             most: case (i % 10)
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:111:17: Unsupported: randsequence production
+  111 |             most: case (i % 10)
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:103:10: Unsupported: randsequence
+  103 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:127:27: Unsupported: randsequence production id
+  127 |          main: repeat(10) count_1;
+      |                           ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:127:16: Unsupported: randsequence repeat
+  127 |          main: repeat(10) count_1;
+      |                ^~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:127:14: Unsupported: randsequence production
+  127 |          main: repeat(10) count_1;
+      |              ^
+%Error-UNSUPPORTED: t/t_randsequence.v:128:17: Unsupported: randsequence production
+  128 |          count_1: { ++counts[1]; };
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:126:7: Unsupported: randsequence
+  126 |       randsequence(main)
+      |       ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:136:29: Unsupported: randsequence production id
+  136 |             main: rand join count_1 count_2;
+      |                             ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:136:37: Unsupported: randsequence production id
+  136 |             main: rand join count_1 count_2;
+      |                                     ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:136:19: Unsupported: randsequence production list
+  136 |             main: rand join count_1 count_2;
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:136:17: Unsupported: randsequence production
+  136 |             main: rand join count_1 count_2;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:137:20: Unsupported: randsequence production
+  137 |             count_1: { ++counts[1]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:138:20: Unsupported: randsequence production
+  138 |             count_2: { ++counts[2]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:135:10: Unsupported: randsequence
+  135 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:148:35: Unsupported: randsequence production id
+  148 |             main: rand join (1.0) count_1 count_2;
+      |                                   ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:148:43: Unsupported: randsequence production id
+  148 |             main: rand join (1.0) count_1 count_2;
+      |                                           ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:148:19: Unsupported: randsequence production list
+  148 |             main: rand join (1.0) count_1 count_2;
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:148:17: Unsupported: randsequence production
+  148 |             main: rand join (1.0) count_1 count_2;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:149:20: Unsupported: randsequence production
+  149 |             count_1: { ++counts[1]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:150:20: Unsupported: randsequence production
+  150 |             count_2: { ++counts[2]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:147:10: Unsupported: randsequence
+  147 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:153:35: Unsupported: randsequence production id
+  153 |             main: rand join (0.0) count_3 count_4;
+      |                                   ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:153:43: Unsupported: randsequence production id
+  153 |             main: rand join (0.0) count_3 count_4;
+      |                                           ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:153:19: Unsupported: randsequence production list
+  153 |             main: rand join (0.0) count_3 count_4;
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:153:17: Unsupported: randsequence production
+  153 |             main: rand join (0.0) count_3 count_4;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:154:20: Unsupported: randsequence production
+  154 |             count_3: { ++counts[3]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:155:20: Unsupported: randsequence production
+  155 |             count_4: { ++counts[4]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:152:10: Unsupported: randsequence
+  152 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:168:19: Unsupported: randsequence production id
+  168 |             main: count_1 check count_2;
+      |                   ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:168:27: Unsupported: randsequence production id
+  168 |             main: count_1 check count_2;
+      |                           ^~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:168:33: Unsupported: randsequence production id
+  168 |             main: count_1 check count_2;
+      |                                 ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:168:17: Unsupported: randsequence production
+  168 |             main: count_1 check count_2;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:169:20: Unsupported: randsequence production id
+  169 |             check: count_3 { if (fiftyfifty) break; } count_4;
+      |                    ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:169:55: Unsupported: randsequence production id
+  169 |             check: count_3 { if (fiftyfifty) break; } count_4;
+      |                                                       ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:169:18: Unsupported: randsequence production
+  169 |             check: count_3 { if (fiftyfifty) break; } count_4;
+      |                  ^
+%Error-UNSUPPORTED: t/t_randsequence.v:170:20: Unsupported: randsequence production
+  170 |             count_1: { ++counts[1]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:171:20: Unsupported: randsequence production
+  171 |             count_2: { ++counts[2]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:172:20: Unsupported: randsequence production
+  172 |             count_3: { ++counts[3]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:173:20: Unsupported: randsequence production
+  173 |             count_4: { ++counts[4]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:167:10: Unsupported: randsequence
+  167 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:186:19: Unsupported: randsequence production id
+  186 |             main: count_1 check count_2;
+      |                   ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:186:27: Unsupported: randsequence production id
+  186 |             main: count_1 check count_2;
+      |                           ^~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:186:33: Unsupported: randsequence production id
+  186 |             main: count_1 check count_2;
+      |                                 ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:186:17: Unsupported: randsequence production
+  186 |             main: count_1 check count_2;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:187:20: Unsupported: randsequence production id
+  187 |             check: count_3 { if (fiftyfifty) return; } count_4;
+      |                    ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:187:56: Unsupported: randsequence production id
+  187 |             check: count_3 { if (fiftyfifty) return; } count_4;
+      |                                                        ^~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:187:18: Unsupported: randsequence production
+  187 |             check: count_3 { if (fiftyfifty) return; } count_4;
+      |                  ^
+%Error-UNSUPPORTED: t/t_randsequence.v:188:20: Unsupported: randsequence production
+  188 |             count_1: { ++counts[1]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:189:20: Unsupported: randsequence production
+  189 |             count_2: { ++counts[2]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:190:20: Unsupported: randsequence production
+  190 |             count_3: { ++counts[3]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:191:20: Unsupported: randsequence production
+  191 |             count_4: { ++counts[4]; };
+      |                    ^
+%Error-UNSUPPORTED: t/t_randsequence.v:185:10: Unsupported: randsequence
+  185 |          randsequence(main)
+      |          ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:203:19: Unsupported: randsequence production id
+  203 |             main: f_1 f_2 f_3;
+      |                   ^~~
+%Error-UNSUPPORTED: t/t_randsequence.v:203:23: Unsupported: randsequence production id
+  203 |             main: f_1 f_2 f_3;
+      |                       ^~~
+%Error-UNSUPPORTED: t/t_randsequence.v:203:27: Unsupported: randsequence production id
+  203 |             main: f_1 f_2 f_3;
+      |                           ^~~
+%Error-UNSUPPORTED: t/t_randsequence.v:203:17: Unsupported: randsequence production
+  203 |             main: f_1 f_2 f_3;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:204:19: Unsupported: randsequence production id
+  204 |             f_1 : func(10);
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:204:17: Unsupported: randsequence production
+  204 |             f_1 : func(10);
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:205:19: Unsupported: randsequence production id
+  205 |             f_2 : func(20);
+      |                   ^~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:205:17: Unsupported: randsequence production
+  205 |             f_2 : func(20);
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:206:19: Unsupported: randsequence production id
+  206 |             f_3 : fnoarg;
+      |                   ^~~~~~
+%Error-UNSUPPORTED: t/t_randsequence.v:206:17: Unsupported: randsequence production
+  206 |             f_3 : fnoarg;
+      |                 ^
+%Error-UNSUPPORTED: t/t_randsequence.v:207:30: Unsupported: randsequence production
+  207 |             void func(int n) : { counts[1] += n; };
+      |                              ^
+%Error-UNSUPPORTED: t/t_randsequence.v:208:25: Unsupported: randsequence production
+  208 |             void fnoarg : { ++counts[2]; };
+      |                         ^
+%Error-UNSUPPORTED: t/t_randsequence.v:202:10: Unsupported: randsequence
+  202 |          randsequence(main)
+      |          ^~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_randsequence.py b/test_regress/t/t_randsequence.py
index 966dc53da..5761f5984 100755
--- a/test_regress/t/t_randsequence.py
+++ b/test_regress/t/t_randsequence.py
@@ -11,7 +11,9 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-test.compile(fails=test.vlt_all, expect_filename=test.golden_filename)
+test.compile(verilator_flags2=['--error-limit 999'],
+             fails=test.vlt_all,
+             expect_filename=test.golden_filename)
 
 if not test.vlt_all:
     test.execute()
diff --git a/test_regress/t/t_var_pins_bad.out b/test_regress/t/t_var_pins_bad.out
new file mode 100644
index 000000000..ff4eb5710
--- /dev/null
+++ b/test_regress/t/t_var_pins_bad.out
@@ -0,0 +1,3 @@
+%Error: --pins-bv maximum is 65: 99
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Exiting due to
diff --git a/test_regress/t/t_var_pins_bad.py b/test_regress/t/t_var_pins_bad.py
new file mode 100755
index 000000000..a7ccd7462
--- /dev/null
+++ b/test_regress/t/t_var_pins_bad.py
@@ -0,0 +1,17 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = 't/t_EXAMPLE.v'
+
+test.lint(verilator_flags2=["--pins-bv 99"], fails=True, expect_filename=test.golden_filename)
+
+test.passes()

From 66667b6172e07fc4b6efa0491f201eafe5bf7706 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 18 May 2025 04:46:15 +0900
Subject: [PATCH 075/211] Support SARIF JSON diagnostic output with
 `--diagnostics-sarif`. (#6017)

---
 Changes                               |   1 +
 bin/verilator                         |   2 +
 docs/guide/exe_verilator.rst          |  16 +++
 docs/guide/files.rst                  |   2 +
 docs/guide/install.rst                |   2 +-
 docs/guide/warnings.rst               |   4 +
 docs/spelling.txt                     |   2 +
 src/CMakeLists.txt                    |  18 +--
 src/Makefile_obj.in                   |   1 +
 src/V3Ast.cpp                         |   2 +-
 src/V3DiagSarif.cpp                   | 195 ++++++++++++++++++++++++++
 src/V3DiagSarif.h                     |  33 +++++
 src/V3Error.cpp                       | 156 ++++++++++++++-------
 src/V3Error.h                         |  69 ++++++++-
 src/V3FileLine.cpp                    |  32 +++--
 src/V3Graph.cpp                       |   2 +-
 src/V3Number.cpp                      |   2 +-
 src/V3Options.cpp                     |   5 +
 src/V3Options.h                       |   7 +
 src/V3String.cpp                      |  26 ++++
 src/V3String.h                        |   2 +
 src/Verilator.cpp                     |   3 +
 test_regress/driver.py                |   3 +
 test_regress/t/t_dist_error_format.py |   2 +
 test_regress/t/t_sarif.out            |  23 +++
 test_regress/t/t_sarif.py             |  41 ++++++
 test_regress/t/t_sarif.sarif.out      | 188 +++++++++++++++++++++++++
 test_regress/t/t_sarif.v              |  22 +++
 test_regress/t/t_sarif_output.py      |  20 +++
 29 files changed, 797 insertions(+), 84 deletions(-)
 create mode 100644 src/V3DiagSarif.cpp
 create mode 100644 src/V3DiagSarif.h
 create mode 100644 test_regress/t/t_sarif.out
 create mode 100755 test_regress/t/t_sarif.py
 create mode 100644 test_regress/t/t_sarif.sarif.out
 create mode 100644 test_regress/t/t_sarif.v
 create mode 100755 test_regress/t/t_sarif_output.py

diff --git a/Changes b/Changes
index 57754a10c..ee7d03fba 100644
--- a/Changes
+++ b/Changes
@@ -15,6 +15,7 @@ Verilator 5.037 devel
 
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
+* Support SARIF JSON diagnostic output with `--diagnostics-sarif`.
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
diff --git a/bin/verilator b/bin/verilator
index 143bce8a6..5ec9a5ef0 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -345,6 +345,8 @@ detailed descriptions of these arguments.
     --decorations <level>       Set output comment and spacing level
     --default-language <lang>   Default language to parse
      +define+<var>=<value>      Set preprocessor define
+    --diagnostics-sarif         Enable SARIF diagnostics output
+    --diagnostics-sarif-output <filename>  Set SARIF diagnostics output file
     --dpi-hdr-only              Only produce the DPI header file
     --dump-<srcfile>            Enable dumping everything in source file
     --dump-defines              Show preprocessor defines with -E
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index debb506f8..9faeddd73 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -393,6 +393,22 @@ Summary:
    standard across Verilog tools while :vlopt:`-D <-D<var>>` is similar to
    :command:`gcc -D`.
 
+.. option:: --diagnostics-sarif
+
+   Enables diagnostics output into a Static Analysis Results Interchange
+   Format (SARIF) file, a standard, JSON-based format for the output of
+   static analysis tools such as linters.  See
+   [SARIF](http://sarifweb.azurewebsites.net/),
+   [sarif-tools](https://github.com/microsoft/sarif-tools), and the [SARIF
+   web-based viewer](https://microsoft.github.io/sarif-web-component/).
+
+.. option:: --diagnostics-sarif-output <filename>
+
+   Specifies the filename for the SARIF output file (`.sarif`) of
+   :vlopt:`--diagnostics-sarif`.  Using this option automatically sets
+   :vlopt:`--diagnostics-sarif`.  If not specified, output defaults to
+   :file:`<prefix>.sarif`.
+
 .. option:: --dpi-hdr-only
 
    Only generate the DPI header file.  This option does not affect on the
diff --git a/docs/guide/files.rst b/docs/guide/files.rst
index 18d543dfd..e04323ad9 100644
--- a/docs/guide/files.rst
+++ b/docs/guide/files.rst
@@ -112,6 +112,8 @@ In specific debug and other modes, it also creates:
 
 .. list-table::
 
+   * - *{prefix}*\ .sarif
+     - SARIF diagnostics (from --diagnostics-sarif)
    * - *{prefix}*\ .tree.json
      - JSON tree information (from --json-only)
    * - *{prefix}*\ .tree.meta.json
diff --git a/docs/guide/install.rst b/docs/guide/install.rst
index dc6c3ecd6..d54e7c5d0 100644
--- a/docs/guide/install.rst
+++ b/docs/guide/install.rst
@@ -159,7 +159,7 @@ Those developing Verilator itself may also want these (see internals.rst):
 
    sudo apt-get install clang clang-format-14 cmake gdb gprof graphviz lcov
    sudo apt-get install python3-clang python3-distro yapf3 bear jq
-   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff
+   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff sarif-tools
    sudo pip3 install git+https://github.com/antmicro/astsee.git
    cpan install Pod::Perldoc
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index bafd1827f..9678be1a9 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -68,6 +68,10 @@ source code corresponding to the error, prefixed by the line number and a "
 | ".  Following this is typically an arrow and ~ pointing at the error on
 the source line directly above.
 
+Instead of parsing this text diagnostic output, tools that need to
+understand Verilator's warning output should read the SARIF JSON output
+created with :vlopt:`--diagnostics-sarif`.
+
 
 List Of Warnings
 ================
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 7199c77ff..de38771b8 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -798,6 +798,7 @@ libtcmalloc
 libverilated
 linkers
 linter
+linters
 linux
 liu
 livelock
@@ -975,6 +976,7 @@ runtimes
 rw
 sVerilator
 saif
+sarif
 sawatzke
 sc
 scalared
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 7eee3a957..6ad72f864 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -77,6 +77,7 @@ set(HEADERS
     V3DfgPatternStats.h
     V3DfgPeephole.h
     V3DfgVertices.h
+    V3DiagSarif.h
     V3DupFinder.h
     V3EmitC.h
     V3EmitCBase.h
@@ -95,8 +96,8 @@ set(HEADERS
     V3FileLine.h
     V3Force.h
     V3Fork.h
-    V3FunctionTraits.h
     V3FuncOpt.h
+    V3FunctionTraits.h
     V3Gate.h
     V3Global.h
     V3Graph.h
@@ -133,8 +134,8 @@ set(HEADERS
     V3OptionParser.h
     V3Options.h
     V3Order.h
-    V3OrderInternal.h
     V3OrderGraph.h
+    V3OrderInternal.h
     V3OrderMoveGraph.h
     V3Os.h
     V3PairingHeap.h
@@ -234,8 +235,8 @@ set(COMMON_SOURCES
     V3DfgPasses.cpp
     V3DfgPeephole.cpp
     V3DfgRegularize.cpp
+    V3DiagSarif.cpp
     V3DupFinder.cpp
-    V3Timing.cpp
     V3EmitCBase.cpp
     V3EmitCConstPool.cpp
     V3EmitCFunc.cpp
@@ -297,6 +298,10 @@ set(COMMON_SOURCES
     V3OrderSerial.cpp
     V3Os.cpp
     V3Param.cpp
+    V3ParseGrammar.cpp
+    V3ParseImp.cpp
+    V3ParseLex.cpp
+    V3PreProc.cpp
     V3PreShell.cpp
     V3Premit.cpp
     V3ProtectLib.cpp
@@ -320,13 +325,14 @@ set(COMMON_SOURCES
     V3StatsReport.cpp
     V3String.cpp
     V3Subst.cpp
+    V3TSP.cpp
     V3Table.cpp
     V3Task.cpp
     V3ThreadPool.cpp
+    V3Timing.cpp
     V3Trace.cpp
     V3TraceDecl.cpp
     V3Tristate.cpp
-    V3TSP.cpp
     V3Udp.cpp
     V3Undriven.cpp
     V3Unknown.cpp
@@ -336,10 +342,6 @@ set(COMMON_SOURCES
     V3Width.cpp
     V3WidthCommit.cpp
     V3WidthSel.cpp
-    V3ParseImp.cpp
-    V3ParseGrammar.cpp
-    V3ParseLex.cpp
-    V3PreProc.cpp
 )
 
 set(COVERAGE_SOURCES VlcMain.cpp)
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index ca0181d9d..12269dea2 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -247,6 +247,7 @@ RAW_OBJS_PCH_ASTNOMT = \
 	V3DfgPasses.o \
 	V3DfgPeephole.o \
 	V3DfgRegularize.o \
+	V3DiagSarif.o \
 	V3DupFinder.o \
 	V3EmitCMain.o \
 	V3EmitCMake.o \
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index f83f60fd0..26cbabc4e 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1453,7 +1453,7 @@ void AstNode::v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error::s().
     const string instanceStrExtra
         = m_fileline->warnIsOff(V3Error::s().errorCode()) ? "" : instanceStr();
     if (!m_fileline) {
-        V3Error::v3errorEnd(str, instanceStrExtra);
+        V3Error::v3errorEnd(str, instanceStrExtra, nullptr);
     } else {
         std::ostringstream nsstr;
         nsstr << str.str();
diff --git a/src/V3DiagSarif.cpp b/src/V3DiagSarif.cpp
new file mode 100644
index 000000000..a7c4b5041
--- /dev/null
+++ b/src/V3DiagSarif.cpp
@@ -0,0 +1,195 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Diag Sarif output file
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2004-2025 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+#include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
+
+#include "V3DiagSarif.h"
+
+#include "V3File.h"
+#include "V3Os.h"
+
+VL_DEFINE_DEBUG_FUNCTIONS;
+
+// ######################################################################
+
+class V3DiagSarifImp final {
+    // MEMBERS
+    std::deque<VErrorMessage> m_messages;
+    std::set<V3ErrorCode> m_codes;
+    std::map<V3ErrorCode, int> m_codeIndex;
+
+    // METHODS
+    void calculate() {
+        for (auto& msgr : m_messages)
+            if (msgr.code().isNamed()) m_codes.emplace(msgr.code());
+        int i = 0;
+        for (const auto& code : m_codes) m_codeIndex[code] = i++;
+    }
+
+    void putRules(V3OutJsonFile& of) const {
+        for (const auto& code : m_codes) {
+            of.begin().put("id", code.ascii()).put("helpUri", code.url()).end();
+        }
+    }
+
+    void putText(V3OutJsonFile& of, const string& clean, const string& formatted) const {
+        const string markdown = "```\n" + formatted + "\n```\n";
+        of.put("text", VString::trimWhitespace(clean)).put("markdown", markdown);
+    }
+
+    void putLocation(V3OutJsonFile& of, const FileLine* fl) const {
+        const string filename = V3Os::filenameRealPath(fl->filename());
+        of.begin("physicalLocation");
+        of.begin("artifactLocation");
+        if (V3Os::filenameIsRel(filename)) {  // SARIF spec says rel has no //
+            of.put("uri", "file:" + filename).put("uriBaseId", "%srcroot%");
+        } else {
+            of.put("uri", "file://" + filename);
+        }
+        of.end()
+            .begin("region")
+            .put("sourceLanguage", "systemverilog")
+            .put("startLine", fl->firstLineno())
+            .put("startColumn", fl->firstColumn());
+        if (fl->firstLineno() != fl->lastLineno()) of.put("endLine", fl->lastLineno());
+        of.put("endColumn", fl->lastColumn());
+        of.begin("snippit", '{');
+        putText(of, fl->prettySource(), V3Error::stripMetaText(fl->warnContextPrimary(), false));
+        of.end();  // snippit
+        of.end();  // region
+        of.end();  // artifactLocation
+    }
+
+    string substrToNextRelated(const string& str) {
+        const size_t pos = str.find("__WARNRELATED(", 0);
+        return (pos == std::string::npos) ? str : str.substr(0, pos);
+    }
+
+    void putResult(V3OutJsonFile& of, const VErrorMessage& msg) {
+        of.begin();
+        of.put("level", msg.code().severityInfo()             ? "none"
+                        : V3Error::isError(msg.code(), false) ? "error"
+                                                              : "warning");
+
+        string text = msg.text();
+        // UINFO(9, "Result raw text " << text << endl << endl);
+
+        // We put the entire message including relatedLocations text
+        // into the primary message text, because viewers such as
+        // https://microsoft.github.io/sarif-web-component/
+        // currently appear to ignore relatedLocations.
+        const string first_clean = V3Error::stripMetaText(text, true);
+        const string first_fmt = V3Error::stripMetaText(text, false);
+
+        of.begin("message");
+        putText(of, first_clean, first_fmt);
+        of.end();
+        if (auto fl = msg.fileline()) {
+            of.begin("locations", '[').begin();
+            putLocation(of, fl);
+            of.end();
+            of.end();
+        }
+
+        if (text.find("__WARNRELATED(") != std::string::npos) {
+            of.begin("relatedLocations", '[');
+            size_t pos = 0;
+            while ((pos = text.find("__WARNRELATED(", pos)) != std::string::npos) {
+                const size_t start = pos + std::strlen("__WARNRELATED(");
+                size_t end = start;
+                while (end < text.size() && text[end] != ')') ++end;
+                const size_t index = std::atoi(text.substr(start, end + 1).c_str());
+                if (end < text.size()) end += std::strlen(")");
+                text = text.substr(end, text.size());
+                UASSERT_STATIC(index < msg.filelines().size(),
+                               "Error message warnRelated without fileline");
+
+                const string related_clean
+                    = V3Error::stripMetaText(substrToNextRelated(text), true);
+                const string related_fmt
+                    = V3Error::stripMetaText(substrToNextRelated(text), false);
+                const FileLine* fl = msg.filelines()[index];
+                of.begin().begin("message");
+                putText(of, related_clean, related_fmt);
+                of.end();  // message
+                putLocation(of, fl);
+                of.end();
+            }
+            of.end();
+        }
+
+        if (msg.code().isNamed())
+            of.put("ruleId", msg.code().ascii()).put("ruleIndex", m_codeIndex[msg.code()]);
+
+        of.end();
+    }
+
+    // STATIC FUNCTIONS
+public:
+    static V3DiagSarifImp& s() {
+        static V3DiagSarifImp s_s;
+        return s_s;
+    }
+
+    void pushMessage(const VErrorMessage& msg) { m_messages.push_back(msg); }
+
+    void output(bool success) {
+        V3OutJsonFile of{v3Global.opt.diagnosticsSarifOutput()};
+        calculate();
+
+        of.put("$schema", "https://json.schemastore.org/sarif-2.1.0-rtm.5.json")
+            .put("version", "2.1.0");
+
+        of.begin("runs", '[').begin();
+
+        of.begin("tool")
+            .begin("driver")
+            .put("name", "Verilator")
+            .put("version", VString::replaceSubstr(V3Options::version(), "Verilator ", ""))
+            .put("informationUri", "https://verilator.org");
+
+        of.begin("rules", '[');
+        putRules(of);
+        of.end()  // rules
+            .end()  // driver
+            .end();  //tool
+
+        of.begin("invocations", '[')
+            .begin()
+            .put("commandLine", v3Global.opt.allArgsString())
+            .put("executionSuccessful", success)
+            .end()
+            .end();
+
+        of.begin("results", '[');
+        for (auto& msgr : m_messages) putResult(of, msgr);
+        of.end();
+
+        of.end();  // runs ]
+        of.end();  // runs }
+    }
+};
+
+void V3DiagSarif::pushMessage(const VErrorMessage& msg) VL_MT_DISABLED {
+    if (!v3Global.opt.diagnosticsSarif()) return;
+    V3DiagSarifImp::s().pushMessage(msg);
+}
+
+void V3DiagSarif::output(bool success) {
+    if (!v3Global.opt.diagnosticsSarif()) return;
+    UINFO(2, __FUNCTION__ << ": " << endl);
+    V3DiagSarifImp::s().output(success);
+}
diff --git a/src/V3DiagSarif.h b/src/V3DiagSarif.h
new file mode 100644
index 000000000..45b31256c
--- /dev/null
+++ b/src/V3DiagSarif.h
@@ -0,0 +1,33 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+// DESCRIPTION: Verilator: Diag Sarif output file
+//
+// Code available from: https://verilator.org
+//
+//*************************************************************************
+//
+// Copyright 2003-2025 by Wilson Snyder. This program is free software; you
+// can redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+#ifndef VERILATOR_V3DIAGSARIF_H_
+#define VERILATOR_V3DIAGSARIF_H_
+
+#include "config_build.h"
+#include "verilatedos.h"
+
+#include <V3Error.h>
+
+//============================================================================
+
+class V3DiagSarif final {
+public:
+    static void pushMessage(const VErrorMessage& msg) VL_MT_DISABLED;
+    static void output(bool success) VL_MT_DISABLED;
+};
+
+#endif  // Guard
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 7a190c349..9f1d791c3 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -19,6 +19,7 @@
 #include "V3Os.h"
 #ifndef V3ERROR_NO_GLOBAL_
 # include "V3Ast.h"
+# include "V3DiagSarif.h"
 # include "V3Global.h"
 # include "V3Stats.h"
 VL_DEFINE_DEBUG_FUNCTIONS;
@@ -70,7 +71,7 @@ bool V3ErrorGuarded::isError(V3ErrorCode code, bool supp) VL_REQUIRES(m_mutex) {
 }
 
 string V3ErrorGuarded::msgPrefix() VL_REQUIRES(m_mutex) {
-    const V3ErrorCode code = m_errorCode;
+    const V3ErrorCode code = m_message.code();
     const bool supp = m_errorSuppressed;
     if (supp) {
         return "-arning-suppressed: ";
@@ -112,6 +113,7 @@ void V3ErrorGuarded::vlAbortOrExit() VL_REQUIRES(m_mutex) {
 }
 
 string V3ErrorGuarded::warnMoreSpaces() VL_REQUIRES(m_mutex) {
+    UASSERT_STATIC(!m_message.isClear(), "warnMore() outside of v3errorPrep...v3errorEnd");
     return string(msgPrefix().size(), ' ');
 }
 
@@ -124,42 +126,49 @@ void V3ErrorGuarded::suppressThisWarning() VL_REQUIRES(m_mutex) {
 
 void V3ErrorGuarded::v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex) {
     m_errorStr.str("");
-    m_errorCode = code;
+    UASSERT_STATIC(m_message.isClear(), "Attempted v3errorPrep inside v3errorPrep...v3errorEnd");
+    m_message.init(code);
     m_errorContexted = false;
     m_errorSuppressed = false;
 }
 
-void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra)
+void V3ErrorGuarded::v3errorEnd(std::ostringstream& sstr, const string& extra, FileLine* fileline)
     VL_REQUIRES(m_mutex) {
     static bool s_firedTooMany = false;
-    v3errorEndGuts(sstr, extra);
+    v3errorEndGuts(sstr, extra, fileline);
+    m_message.clear();
     if (errorLimit() && errorCount() >= errorLimit() && !s_firedTooMany) {
         s_firedTooMany = true;
         // Recurses here
         v3errorEnd((v3errorPrep(V3ErrorCode::EC_FATALMANY),
                     (v3errorStr() << "Exiting due to too many errors encountered; --error-limit="
                                   << errorCount() << std::endl),
-                    v3errorStr()));
+                    v3errorStr()),
+                   "", nullptr);
         assert(0);  // LCOV_EXCL_LINE
         VL_UNREACHABLE;
     }
 }
 
 // cppcheck-has-bug-suppress constParameter
-void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extra)
-    VL_REQUIRES(m_mutex) {
+void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extra,
+                                    FileLine* fileline) VL_REQUIRES(m_mutex) {
     // 'extra' is appended to the message, and is is excluded in check for
     // duplicate messages. Currently used for reporting instance name.
 #if defined(__COVERITY__) || defined(__cppcheck__)
     if (m_errorCode == V3ErrorCode::EC_FATAL) __coverity_panic__(x);
 #endif
 
+    UASSERT_STATIC(!m_message.isClear(), "v3errorEnd() outside of v3errorPrep...v3errorEnd");
+    m_message.fileline(fileline);
+
     // Skip suppressed messages
     if (m_errorSuppressed
         // On debug, show only non default-off warning to prevent pages of warnings
-        && (!debug() || debug() < 3 || m_errorCode.defaultsOff()))
+        && (!debug() || debug() < 3 || m_message.code().defaultsOff()))
         return;
-    string msg = msgPrefix() + sstr.str();
+    string msg
+        = V3Error::warnContextBegin() + msgPrefix() + V3Error::warnContextEnd() + sstr.str();
 
     // If suppressed print only first line to reduce verbosity
     string firstLine = msg;
@@ -182,14 +191,7 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
             msg.erase(pos);
         }
     }
-    // Trailing newline (generally not on messages) & remove dup newlines
-    {
-        msg += '\n';  // Trailing newlines generally not put on messages so add
-        string::size_type pos;
-        while ((pos = msg.find("\n\n")) != string::npos) msg.erase(pos + 1, 1);
-        while ((pos = msg_additional.find("\n\n")) != string::npos)
-            msg_additional.erase(pos + 1, 1);
-    }
+    msg += '\n';  // Trailing newlines generally not put on messages so add
     if (!extra.empty() && !m_errorSuppressed) {
         string extraMsg = VString::replaceSubstr(extra, V3Error::warnMore(), warnMoreSpaces());
         extraMsg = warnMoreSpaces() + extraMsg + "\n";
@@ -197,53 +199,64 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
         msg.insert(pos + 1, extraMsg);
     }
     // Output
+    string text;
     if (
 #ifndef V3ERROR_NO_GLOBAL_
-        !(v3Global.opt.quietExit() && m_errorCode == V3ErrorCode::EC_FATALMANY)
+        !(v3Global.opt.quietExit() && m_message.code() == V3ErrorCode::EC_FATALMANY)
 #else
         true
 #endif
-    ) {
-        std::cerr << msg;
-    }
-    if (!m_errorSuppressed && !m_errorCode.severityInfo()) {
-        const bool anError = isError(m_errorCode, m_errorSuppressed);
-        if (m_errorCode != V3ErrorCode::EC_FATALMANY  // Not verbose on final too-many-errors error
-            && !m_describedEachWarn[m_errorCode]) {
-            m_describedEachWarn[m_errorCode] = true;
-            if (m_errorCode >= V3ErrorCode::EC_FIRST_NAMED) {
-                std::cerr << warnMoreSpaces() << "... For " << (anError ? "error" : "warning")
-                          << " description see " << m_errorCode.url() << endl;
-            } else if (m_errCount >= 1 && m_errorCode.severityFatal() && !m_tellInternal) {
+    )
+        text += msg;
+    if (m_errorSuppressed || m_message.code().severityInfo()) {
+        std::cerr << V3Error::stripMetaText(text, false);
+        m_message.text(text);
+#ifndef V3ERROR_NO_GLOBAL_
+        V3DiagSarif::pushMessage(m_message);
+#endif
+    } else {
+        const bool anError = isError(m_message.code(), m_errorSuppressed);
+        if (m_message.code()
+                != V3ErrorCode::EC_FATALMANY  // Not verbose on final too-many-errors error
+            && !m_describedEachWarn[m_message.code()]) {
+            m_describedEachWarn[m_message.code()] = true;
+            if (m_message.code() >= V3ErrorCode::EC_FIRST_NAMED) {
+                text += warnMoreSpaces() + "... For " + (anError ? "error" : "warning")
+                        + " description see " + m_message.code().url() + '\n';
+            } else if (m_errCount >= 1 && m_message.code().severityFatal() && !m_tellInternal) {
                 m_tellInternal = true;
-                std::cerr << warnMoreSpaces()
-                          << "... This fatal error may be caused by the earlier error(s);"
-                             " resolve those first."
-                          << endl;
+                text += warnMoreSpaces()
+                        + "... This fatal error may be caused by the earlier error(s);"
+                          " resolve those first.\n";
             } else if (!m_tellManual) {
                 m_tellManual = true;
-                std::cerr << warnMoreSpaces() << "... See the manual at " << m_errorCode.url()
-                          << " for more assistance." << endl;
+                text += warnMoreSpaces() + "... See the manual at " + m_message.code().url()
+                        + " for more assistance.\n";
             }
-            if (!m_pretendError[m_errorCode] && !m_errorCode.hardError()) {
-                std::cerr << warnMoreSpaces() << "... Use \"/* verilator lint_off "
-                          << m_errorCode.ascii()
-                          << " */\" and lint_on around source to disable this message." << endl;
-                if (m_errorCode.dangerous()) {
-                    std::cerr << warnMoreSpaces() << "*** See " << m_errorCode.url()
-                              << " before disabling this,\n";
-                    std::cerr << warnMoreSpaces()
-                              << "else you may end up with different sim results." << endl;
+            if (!m_pretendError[m_message.code()] && !m_message.code().hardError()) {
+                text += warnMoreSpaces() + "... Use \"/* verilator lint_off "
+                        + m_message.code().ascii()
+                        + " */\" and lint_on around source to disable this message.\n";
+                if (m_message.code().dangerous()) {
+                    text += warnMoreSpaces() + "*** See " + m_message.code().url()
+                            + " before disabling this,\n";
+                    text += warnMoreSpaces() + "else you may end up with different sim results.\n";
                 }
             }
         }
-        if (!msg_additional.empty()) std::cerr << msg_additional;
+        if (!msg_additional.empty()) text += msg_additional;
+        std::cerr << V3Error::stripMetaText(text, false);
+        m_message.text(text);
+#ifndef V3ERROR_NO_GLOBAL_
+        V3DiagSarif::pushMessage(m_message);
+#endif
+
         if (anError) {
             incErrors();
         } else {
             incWarnings();
         }
-        if (m_errorCode.severityFatal()) {
+        if (m_message.code().severityFatal()) {
             static bool inFatal = false;
             if (!inFatal) {
                 inFatal = true;
@@ -264,6 +277,7 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
                     }
                     vlAbortOrExit();
                 }
+                V3DiagSarif::output(false);
 #endif
             }
 
@@ -295,6 +309,45 @@ string V3Error::lineStr(const char* filename, int lineno) VL_PURE {
     return out.str();
 }
 
+string V3Error::stripMetaText(const string& text, bool stripContext) VL_PURE {
+    string result;
+    result.reserve(text.size());
+    int inBegins = 0;
+    for (string::size_type pos = 0; pos < text.size();) {
+        // string::starts_with is C++20
+        if (0 == text.compare(pos, std::strlen("__WARN"), "__WARN")) {
+            if (0 == text.compare(pos, std::strlen("__WARNRELATED("), "__WARNRELATED(")) {
+                while (pos < text.size() && text[pos] != ')') ++pos;
+                if (pos < text.size() && text[pos] == ')') ++pos;
+                continue;
+            }
+            if (0
+                == text.compare(pos, std::strlen(V3Error::WARN_CONTEXT_BEGIN),
+                                V3Error::WARN_CONTEXT_BEGIN)) {
+                pos += std::strlen(V3Error::WARN_CONTEXT_BEGIN);
+                ++inBegins;
+                continue;
+            }
+            if (0
+                == text.compare(pos, std::strlen(V3Error::WARN_CONTEXT_END),
+                                V3Error::WARN_CONTEXT_END)) {
+                pos += std::strlen(V3Error::WARN_CONTEXT_END);
+                // No assert, is not VL_PURE
+                // UASSERT_STATIC(inBegins, "warnContextEnd() outside of warnContextBegin()");
+                --inBegins;
+                continue;
+            }
+        }
+        if (!stripContext || inBegins == 0) {
+            // Remove double newlines
+            if (!(text[pos] == '\n' && !result.empty() && result[result.size() - 1] == '\n'))
+                result += text[pos];
+        }
+        ++pos;
+    }
+    return result;
+}
+
 void V3Error::abortIfWarnings() {
     const bool exwarn = warnFatal() && warnCount();
     if (errorCount() && exwarn) {
@@ -324,16 +377,17 @@ std::ostringstream& V3Error::v3errorPrepFileLine(V3ErrorCode code, const char* f
     v3errorPrep(code) << file << ":" << std::dec << line << ": ";
     return v3errorStr();
 }
-void V3Error::v3errorEnd(std::ostringstream& sstr, const string& extra) VL_RELEASE(s().m_mutex) {
-    s().v3errorEnd(sstr, extra);
+void V3Error::v3errorEnd(std::ostringstream& sstr, const string& extra, FileLine* fileline)
+    VL_RELEASE(s().m_mutex) {
+    s().v3errorEnd(sstr, extra, fileline);
     V3Error::s().m_mutex.unlock();
 }
 
 void v3errorEnd(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex) {
-    V3Error::v3errorEnd(sstr);
+    V3Error::v3errorEnd(sstr, "", nullptr);
 }
 void v3errorEndFatal(std::ostringstream& sstr) VL_RELEASE(V3Error::s().m_mutex) {
-    V3Error::v3errorEnd(sstr);
+    V3Error::v3errorEnd(sstr, "", nullptr);
     assert(0);  // LCOV_EXCL_LINE
     VL_UNREACHABLE;
 }
diff --git a/src/V3Error.h b/src/V3Error.h
index f9132b491..e7c52d1e9 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -316,6 +316,42 @@ inline std::ostream& operator<<(std::ostream& os, const V3ErrorCode& rhs) {
 
 // ######################################################################
 
+class VErrorMessage final {
+    // TYPES
+    using FileLines = std::deque<const FileLine*>;
+    // MEMBERS
+    V3ErrorCode m_code;  // Which warning
+    string m_text;  // Warning message text
+    FileLine* m_fileline;  // Primary warning fileline
+    FileLines m_filelines;  // Additional referenced filelines
+public:
+    // CONSTRUCTORS
+    VErrorMessage() { clear(); }
+    ~VErrorMessage() = default;
+    void clear() { init(V3ErrorCode::EC_MIN); }
+    void init(V3ErrorCode code) {
+        m_code = code;
+        m_text = "";
+        m_fileline = nullptr;
+        m_filelines.clear();
+    }
+    // ACCESSORS
+    V3ErrorCode code() const { return m_code; }
+    bool isClear() const { return m_code == V3ErrorCode::EC_MIN; }
+    string text() const { return m_text; }
+    void text(const string& msg) { m_text = msg; }
+    FileLine* fileline() const { return m_fileline; }
+    void fileline(FileLine* fl) { m_fileline = fl; }
+    FileLines filelines() const { return m_filelines; }
+    // Returns identifier for use in warnRelated()
+    int pushFileline(const FileLine* fl) {
+        m_filelines.emplace_back(fl);
+        return m_filelines.size() - 1;
+    }
+};
+
+// ######################################################################
+
 class V3ErrorGuarded final {
     // Should only be used by V3ErrorGuarded::m_mutex is already locked
     // contains guarded members
@@ -328,11 +364,11 @@ public:
 private:
     static constexpr unsigned MAX_ERRORS = 50;  // Fatal after this may errors
 
+    // MEMBERS
     // Tell user to see manual, 0=not yet, 1=doit, 2=disable
     bool m_tellManual VL_GUARDED_BY(m_mutex) = false;
     bool m_tellInternal VL_GUARDED_BY(m_mutex) = false;
-    V3ErrorCode m_errorCode VL_GUARDED_BY(m_mutex)
-        = V3ErrorCode::EC_FATAL;  // Error string being formed will abort
+    VErrorMessage m_message VL_GUARDED_BY(m_mutex);  // Message being formed
     bool m_errorSuppressed VL_GUARDED_BY(m_mutex)
         = false;  // Error being formed should be suppressed
     MessagesSet m_messages VL_GUARDED_BY(m_mutex);  // Errors outputted, to remove dups
@@ -351,10 +387,13 @@ private:
     bool m_warnFatal VL_GUARDED_BY(m_mutex) = true;  // Option: --warnFatal Warnings are fatal
     std::ostringstream m_errorStr VL_GUARDED_BY(m_mutex);  // Error string being formed
 
+    // METHODS
     void v3errorPrep(V3ErrorCode code) VL_REQUIRES(m_mutex);
     std::ostringstream& v3errorStr() VL_REQUIRES(m_mutex) { return m_errorStr; }
-    void v3errorEnd(std::ostringstream& sstr, const string& extra = "") VL_REQUIRES(m_mutex);
-    void v3errorEndGuts(std::ostringstream& sstr, const string& extra) VL_REQUIRES(m_mutex);
+    void v3errorEnd(std::ostringstream& sstr, const string& extra, FileLine* fileline)
+        VL_REQUIRES(m_mutex);
+    void v3errorEndGuts(std::ostringstream& sstr, const string& extra, FileLine* fileline)
+        VL_REQUIRES(m_mutex);
 
 public:
     V3RecursiveMutex m_mutex;  // Make sure only single thread is in class
@@ -387,7 +426,7 @@ public:
     void errorLimit(int level) VL_REQUIRES(m_mutex) { m_errorLimit = level; }
     bool warnFatal() VL_REQUIRES(m_mutex) { return m_warnFatal; }
     void warnFatal(bool flag) VL_REQUIRES(m_mutex) { m_warnFatal = flag; }
-    V3ErrorCode errorCode() VL_REQUIRES(m_mutex) { return m_errorCode; }
+    V3ErrorCode errorCode() VL_REQUIRES(m_mutex) { return m_message.code(); }
     bool errorContexted() VL_REQUIRES(m_mutex) { return m_errorContexted; }
     int warnCount() VL_REQUIRES(m_mutex) { return m_warnCount; }
     bool errorSuppressed() VL_REQUIRES(m_mutex) { return m_errorSuppressed; }
@@ -399,6 +438,10 @@ public:
         m_describedEachWarn[code] = flag;
     }
     void suppressThisWarning() VL_REQUIRES(m_mutex);
+    string warnRelated(const FileLine* fl) VL_REQUIRES(m_mutex) {
+        const int id = m_message.pushFileline(fl);
+        return "__WARNRELATED("s + std::to_string(id) + ")";
+    }
     string warnContextNone() VL_REQUIRES(m_mutex) {
         errorContexted(true);
         return "";
@@ -479,6 +522,10 @@ public:
         s().incWarnings();
     }
     static void init();
+    static bool isError(V3ErrorCode code, bool supp) VL_MT_SAFE_EXCLUDES(s().m_mutex) {
+        const V3RecursiveLockGuard guard{s().m_mutex};
+        return s().isError(code, supp);
+    }
     static void abortIfErrors() {
         if (errorCount()) abortIfWarnings();
     }
@@ -493,6 +540,7 @@ public:
         s().pretendError(code, flag);
     }
     static string lineStr(const char* filename, int lineno) VL_PURE;
+    static string stripMetaText(const string& text, bool stripMeta) VL_PURE;
     static V3ErrorCode errorCode() VL_MT_SAFE_EXCLUDES(s().m_mutex) {
         const V3RecursiveLockGuard guard{s().m_mutex};
         return s().errorCode();
@@ -503,7 +551,14 @@ public:
     }
 
     // When printing an error/warning, print prefix for multiline message
-    static string warnMore() VL_MT_SAFE { return "__WARNMORE__"; }
+    static constexpr const char* WARN_MORE = "__WARNMORE__";
+    static string warnMore() VL_MT_SAFE { return WARN_MORE; }
+    // When printing an error/warning, mark beginning of context information (can nest)
+    static constexpr const char* WARN_CONTEXT_BEGIN = "__WARNBEGIN__";
+    static string warnContextBegin() VL_MT_SAFE { return WARN_CONTEXT_BEGIN; }
+    // When printing an error/warning, mark end of context information (can nest)
+    static constexpr const char* WARN_CONTEXT_END = "__WARNEND__";
+    static string warnContextEnd() VL_MT_SAFE { return WARN_CONTEXT_END; }
     // This function marks place in error message from which point message
     // should be printed after information on the error code.
     // The post-processing is done in v3errorEnd function.
@@ -521,7 +576,7 @@ public:
         VL_ACQUIRE(s().m_mutex);
     static std::ostringstream& v3errorStr() VL_REQUIRES(s().m_mutex) { return s().v3errorStr(); }
     // static, but often overridden in classes.
-    static void v3errorEnd(std::ostringstream& sstr, const string& extra = "")
+    static void v3errorEnd(std::ostringstream& sstr, const string& extra, FileLine* fileline)
         VL_RELEASE(s().m_mutex);
     static void vlAbort();
 };
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index 72daf9d05..ffa8fdc45 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -224,7 +224,7 @@ string FileLine::xmlDetailedLocation() const {
 
 string FileLine::lineDirectiveStrg(int enterExit) const {
     return "`line "s + cvtToStr(lastLineno()) + " \""
-           + V3OutFormatter::quoteNameControls(filename()) + "\" " + cvtToStr(enterExit) + "\n";
+           + V3OutFormatter::quoteNameControls(filename()) + "\" " + cvtToStr(enterExit) + '\n';
 }
 
 void FileLine::lineDirective(const char* textp, int& enterExitRef) {
@@ -422,15 +422,15 @@ void FileLine::v3errorEnd(std::ostringstream& sstr, const string& extra)
     // duplicate messages. Currently used for reporting instance name.
     std::ostringstream nsstr;  // sstr with fileline prefix and context
     std::ostringstream wsstr;  // sstr for waiver (no fileline) with context
-    if (lastLineno()) nsstr << this;
+    if (lastLineno()) nsstr << V3Error::warnContextBegin() << this << V3Error::warnContextEnd();
     nsstr << sstr.str();
     wsstr << sstr.str();
-    nsstr << "\n";
-    wsstr << "\n";
+    nsstr << '\n';
+    wsstr << '\n';
     std::ostringstream extrass;  // extra spaced out for prefix
     if (!extra.empty()) {
-        extrass << std::setw(ascii().length()) << " "
-                << ": " << extra;
+        extrass << V3Error::warnContextBegin() << std::setw(ascii().length()) << " "
+                << ": " << V3Error::warnContextEnd() << extra;
     }
     if (warnIsOff(V3Error::s().errorCode())) {
         V3Error::s().suppressThisWarning();
@@ -440,26 +440,29 @@ void FileLine::v3errorEnd(std::ostringstream& sstr, const string& extra)
             wsstr << add;
             nsstr << add;
         }
-        m_waive = V3Config::waive(this, V3Error::s().errorCode(), wsstr.str());
+        const string waiverText = V3Error::stripMetaText(wsstr.str(), false);
+        m_waive = V3Config::waive(this, V3Error::s().errorCode(), waiverText);
         if (m_waive) {
             V3Error::s().suppressThisWarning();
         } else {
-            V3Waiver::addEntry(V3Error::s().errorCode(), filename(), wsstr.str());
+            V3Waiver::addEntry(V3Error::s().errorCode(), filename(), waiverText);
         }
     }
-    V3Error::v3errorEnd(nsstr, extrass.str());
+    V3Error::v3errorEnd(nsstr, extrass.str(), this);
 }
 
 string FileLine::warnMore() const VL_REQUIRES(V3Error::s().m_mutex) {
     if (lastLineno()) {
-        return V3Error::warnMore() + string(ascii().size(), ' ') + ": ";
+        return V3Error::warnContextBegin() + V3Error::warnMore() + string(ascii().size(), ' ')
+               + ": " + V3Error::warnContextEnd();
     } else {
         return V3Error::warnMore();
     }
 }
 string FileLine::warnOther() const VL_REQUIRES(V3Error::s().m_mutex) {
     if (lastLineno()) {
-        return V3Error::warnMore() + ascii() + ": ";
+        return V3Error::s().warnRelated(this) + V3Error::warnContextBegin() + V3Error::warnMore()
+               + ascii() + ": " + V3Error::warnContextEnd();
     } else {
         return V3Error::warnMore();
     }
@@ -501,7 +504,7 @@ string FileLine::warnContext() const {
             && sourceLine.length() >= static_cast<size_t>(lastColumn() - 1)) {
             string linestr = cvtToStr(firstLineno());
             while (linestr.size() < 5) linestr = ' ' + linestr;
-            out += linestr + " | " + sourceLine + "\n";
+            out += linestr + " | " + sourceLine + '\n';
             out += std::string(linestr.size(), ' ') + " | ";
             out += string((firstColumn() - 1), ' ') + '^';
             // Can't use UASSERT_OBJ used in warnings already inside the error end handler
@@ -509,10 +512,11 @@ string FileLine::warnContext() const {
                 // Note lastColumn() can be <= firstColumn() in some weird preproc expansions
                 out += string((lastColumn() - firstColumn() - 1), '~');
             }
-            out += "\n";
+            out += '\n';
         }
+        return V3Error::warnContextBegin() + out + V3Error::warnContextEnd();
     }
-    return out;
+    return "";
 }
 
 string FileLine::warnContextParent() const VL_REQUIRES(V3Error::s().m_mutex) {
diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp
index 6b7b79dd9..7efb029b1 100644
--- a/src/V3Graph.cpp
+++ b/src/V3Graph.cpp
@@ -112,7 +112,7 @@ void V3GraphVertex::v3errorEnd(std::ostringstream& str) const VL_RELEASE(V3Error
     if (FileLine* const flp = fileline()) {
         flp->v3errorEnd(nsstr);
     } else {
-        V3Error::v3errorEnd(nsstr);
+        V3Error::v3errorEnd(nsstr, "", nullptr);
     }
 }
 void V3GraphVertex::v3errorEndFatal(std::ostringstream& str) const
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 031a253ab..612c0ccf6 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -80,7 +80,7 @@ void V3Number::v3errorEnd(const std::ostringstream& str) const VL_RELEASE(V3Erro
     } else if (m_fileline) {
         m_fileline->v3errorEnd(nsstr);
     } else {
-        V3Error::v3errorEnd(nsstr);
+        V3Error::v3errorEnd(nsstr, "", nullptr);
     }
 }
 
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index cba4e7d83..b23eda621 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -1276,6 +1276,11 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     DECL_OPTION("-decoration", CbCall, [this, fl]() { decorations(fl, "medium"); });
     DECL_OPTION("-decorations", CbVal, [this, fl](const char* optp) { decorations(fl, optp); });
     DECL_OPTION("-no-decoration", CbCall, [this, fl]() { decorations(fl, "none"); });
+    DECL_OPTION("-diagnostics-sarif", OnOff, &m_diagnosticsSarif);
+    DECL_OPTION("-diagnostics-sarif-output", CbVal, [this](const char* optp) {
+        m_diagnosticsSarifOutput = optp;
+        m_diagnosticsSarif = true;
+    });
     DECL_OPTION("-dpi-hdr-only", OnOff, &m_dpiHdrOnly);
     DECL_OPTION("-dump-", CbPartialMatch, [this](const char* optp) { m_dumpLevel[optp] = 3; });
     DECL_OPTION("-no-dump-", CbPartialMatch, [this](const char* optp) { m_dumpLevel[optp] = 0; });
diff --git a/src/V3Options.h b/src/V3Options.h
index 9ab1b61e3..0fa4e94f2 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -252,6 +252,7 @@ private:
     bool m_debugWidth = false;      // main switch: --debug-width
     bool m_decoration = true;       // main switch: --decoration
     bool m_decorationNodes = false;  // main switch: --decoration=nodes
+    bool m_diagnosticsSarif = false;  // main switch: --diagnostics-sarif
     bool m_dpiHdrOnly = false;      // main switch: --dpi-hdr-only
     bool m_emitAccessors = false;   // main switch: --emit-accessors
     bool m_exe = false;             // main switch: --exe
@@ -354,6 +355,7 @@ private:
     int         m_compLimitParens = 240;  // compiler selection; number of nested parens
 
     string      m_buildDepBin;  // main switch: --build-dep-bin {filename}
+    string      m_diagnosticsSarifOutput;  // main switch: --diagnostics-sarif-output
     string      m_exeName;      // main switch: -o {name}
     string      m_flags;        // main switch: -f {name}
     string      m_hierParamsFile; // main switch: --hierarchical-params-file
@@ -519,6 +521,7 @@ public:
     bool debugWidth() const VL_PURE { return m_debugWidth; }
     bool decoration() const VL_MT_SAFE { return m_decoration; }
     bool decorationNodes() const VL_MT_SAFE { return m_decorationNodes; }
+    bool diagnosticsSarif() const VL_MT_SAFE { return m_diagnosticsSarif; }
     bool dpiHdrOnly() const { return m_dpiHdrOnly; }
     bool dumpDefines() const { return m_dumpLevel.count("defines") && m_dumpLevel.at("defines"); }
     bool dumpTreeDot() const {
@@ -632,6 +635,10 @@ public:
     int compLimitMembers() const VL_MT_SAFE { return m_compLimitMembers; }
     int compLimitParens() const { return m_compLimitParens; }
 
+    string diagnosticsSarifOutput() const VL_MT_SAFE {
+        return m_diagnosticsSarifOutput.empty() ? makeDir() + "/" + prefix() + ".sarif"
+                                                : m_diagnosticsSarifOutput;
+    }
     string exeName() const { return m_exeName != "" ? m_exeName : prefix(); }
     string hierParamFile() const { return m_hierParamsFile; }
     string jsonOnlyOutput() const { return m_jsonOnlyOutput; }
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 29307bdea..27c1d5a06 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -230,6 +230,32 @@ string VString::removeWhitespace(const string& str) {
     return result;
 }
 
+string VString::trimWhitespace(const string& str) {
+    string result;
+    result.reserve(str.size());
+    string add;
+    bool newline = false;
+    for (const char c : str) {
+        if (newline && std::isspace(c)) continue;
+        if (c == '\n') {
+            add = "\n";
+            newline = true;
+            continue;
+        }
+        if (std::isspace(c)) {
+            add += c;
+            continue;
+        }
+        if (!add.empty()) {
+            result += add;
+            newline = false;
+            add.clear();
+        }
+        result += c;
+    }
+    return result;
+}
+
 bool VString::isIdentifier(const string& str) {
     for (const char c : str) {
         if (!isIdentifierChar(c)) return false;
diff --git a/src/V3String.h b/src/V3String.h
index 65bfa8d94..f40b46b8a 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -116,6 +116,8 @@ public:
     static string spaceUnprintable(const string& str) VL_PURE;
     // Remove any whitespace
     static string removeWhitespace(const string& str);
+    // Trim leading/trailing whitespace on each line
+    static string trimWhitespace(const string& str);
     // Return true if only identifer or ""
     static bool isIdentifier(const string& str);
     // Return true if char is valid character in C identifiers
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 8905aacb9..2d3753092 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -42,6 +42,7 @@
 #include "V3DepthBlock.h"
 #include "V3Descope.h"
 #include "V3DfgOptimizer.h"
+#include "V3DiagSarif.h"
 #include "V3EmitC.h"
 #include "V3EmitCMain.h"
 #include "V3EmitCMake.h"
@@ -861,6 +862,8 @@ int main(int argc, char** argv) {
         execBuildJob();
     }
 
+    V3DiagSarif::output(true);
+
     // Explicitly release resources
     V3PreShell::shutdown();
     v3Global.shutdown();
diff --git a/test_regress/driver.py b/test_regress/driver.py
index d69c66da5..be045681c 100755
--- a/test_regress/driver.py
+++ b/test_regress/driver.py
@@ -2294,11 +2294,14 @@ class VlTest:
                 line = re.sub(r'\r', '<#013>', line)
                 line = re.sub(r'Command Failed[^\n]+', 'Command Failed', line)
                 line = re.sub(r'Version: Verilator[^\n]+', 'Version: Verilator ###', line)
+                line = re.sub(r'"version": "[^"]+"', '"version": "###"', line)
                 line = re.sub(r'CPU Time: +[0-9.]+ seconds[^\n]+', 'CPU Time: ###', line)
                 line = re.sub(r'\?v=[0-9.]+', '?v=latest', line)  # warning URL
                 line = re.sub(r'_h[0-9a-f]{8}_', '_h########_', line)
                 line = re.sub(r'%Error: /[^: ]+/([^/:])', r'%Error: .../\1',
                               line)  # Avoid absolute paths
+                line = re.sub(r'("file://)/[^: ]+/([^/:])', r'\1/.../\2',
+                              line)  # Avoid absolute paths
                 line = re.sub(r' \/[^ ]+\/verilated_std.sv', ' verilated_std.sv', line)
                 #
                 (line, n) = re.subn(r'Exiting due to.*', r"Exiting due to", line)
diff --git a/test_regress/t/t_dist_error_format.py b/test_regress/t/t_dist_error_format.py
index 154ae7084..22d43d46b 100755
--- a/test_regress/t/t_dist_error_format.py
+++ b/test_regress/t/t_dist_error_format.py
@@ -22,6 +22,8 @@ def formats():
     warns = {}
     lnmatch = 0
     for filename in test.glob_some(files):
+        if re.search(r'\.sarif\.out', filename):
+            continue
         wholefile = test.file_contents(filename)
         filename = os.path.basename(filename)
         if re.search(r'(Exiting due to|%Error|%Warning)', wholefile):
diff --git a/test_regress/t/t_sarif.out b/test_regress/t/t_sarif.out
new file mode 100644
index 000000000..3f98e74a8
--- /dev/null
+++ b/test_regress/t/t_sarif.out
@@ -0,0 +1,23 @@
+%Warning-MODDUP: t/t_sarif.v:21:8: Duplicate declaration of module: 't'
+   21 | module t;   
+      |        ^
+                 t/t_sarif.v:7:8: ... Location of original declaration
+    7 | module t(
+      |        ^
+                 ... For warning description see https://verilator.org/warn/MODDUP?v=latest
+                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.
+%Warning-WIDTHTRUNC: t/t_sarif.v:12:23: Operator ASSIGNW expects 2 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits.
+                                      : ... note: In instance 't'
+   12 |    wire [1:0] trunced = 5'b11111;   
+      |                       ^
+                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest
+                     ... Use "/* verilator lint_off WIDTHTRUNC */" and lint_on around source to disable this message.
+%Warning-MULTIDRIVEN: t/t_sarif.v:10:18: Signal has multiple driving blocks with different clocking: 'multidriven'
+                      t/t_sarif.v:15:6: ... Location of first driving block
+   15 |      multidriven <= '1;
+      |      ^~~~~~~~~~~
+                      t/t_sarif.v:17:6: ... Location of other driving block
+   17 |      multidriven <= '0;
+      |      ^~~~~~~~~~~
+                      ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest
+                      ... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
diff --git a/test_regress/t/t_sarif.py b/test_regress/t/t_sarif.py
new file mode 100755
index 000000000..7780ff8e0
--- /dev/null
+++ b/test_regress/t/t_sarif.py
@@ -0,0 +1,41 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(verilator_flags2=['-Wno-fatal --diagnostics-sarif'],
+          expect_filename=test.golden_filename)
+
+sarif_filename = test.obj_dir + "/" + test.vm_prefix + ".sarif"
+
+# Make sure V3Error meta comments aren't in any outputs
+test.file_grep_not(test.compile_log_filename, r'__WARN')
+test.file_grep_not(sarif_filename, r'__WARN')
+
+test.files_identical(sarif_filename, "t/" + test.name + ".sarif.out", "logfile")
+
+# Check that sarif parses
+nout = test.run_capture("sarif --version", check=False)
+version_match = re.search(r'SARIF tools', nout, re.IGNORECASE)
+if not version_match:
+    test.skip("sarif is not installed")
+
+html_filename = test.obj_dir + "/validation.html"
+
+test.run(cmd=['sarif', 'html', sarif_filename, '--output', html_filename])
+
+# Validator:
+#   https://sarifweb.azurewebsites.net/Validation
+
+# Rewrite
+# test.run(cmd=['sarif copy t/t_sarif.out --output ' + test.obj_dir + '/t_sarif.out.rewrite'])
+
+test.passes()
diff --git a/test_regress/t/t_sarif.sarif.out b/test_regress/t/t_sarif.sarif.out
new file mode 100644
index 000000000..58f0f611e
--- /dev/null
+++ b/test_regress/t/t_sarif.sarif.out
@@ -0,0 +1,188 @@
+{
+    "$schema": "https://json.schemastore.org/sarif-2.1.0-rtm.5.json",
+    "version": "###",
+    "runs": [
+        {
+            "tool": {
+                "driver": {
+                    "name": "Verilator",
+                    "version": "###",
+                    "informationUri": "https://verilator.org",
+                    "rules": [
+                        {
+                            "id": "MODDUP",
+                            "helpUri": "https://verilator.org/warn/MODDUP?v=latest"
+                        },
+                        {
+                            "id": "MULTIDRIVEN",
+                            "helpUri": "https://verilator.org/warn/MULTIDRIVEN?v=latest"
+                        },
+                        {
+                            "id": "WIDTHTRUNC",
+                            "helpUri": "https://verilator.org/warn/WIDTHTRUNC?v=latest"
+                        }
+                    ]
+                }
+            },
+            "invocations": [
+                {
+                    "commandLine": "--prefix Vt_sarif -cc -Mdir obj_vlt/t_sarif --fdedup --debug-check --comp-limit-members 10 --x-assign unique -Wno-fatal --diagnostics-sarif --clk clk -f input.vc +define+TEST_OBJ_DIR=obj_vlt/t_sarif +define+TEST_DUMPFILE=obj_vlt/t_sarif/simx.vcd t/t_sarif.v +librescan +notimingchecks +libext+.v -y t +incdir+t",
+                    "executionSuccessful": true
+                }
+            ],
+            "results": [
+                {
+                    "level": "warning",
+                    "message": {
+                        "text": "Duplicate declaration of module: 't'\n... Location of original declaration\n... For warning description see https://verilator.org/warn/MODDUP?v=latest\n... Use \"/* verilator lint_off MODDUP */\" and lint_on around source to disable this message.",
+                        "markdown": "```\n%Warning-MODDUP: t/t_sarif.v:21:8: Duplicate declaration of module: 't'\n   21 | module t;   \n      |        ^\n                 t/t_sarif.v:7:8: ... Location of original declaration\n    7 | module t(\n      |        ^\n                 ... For warning description see https://verilator.org/warn/MODDUP?v=latest\n                 ... Use \"/* verilator lint_off MODDUP */\" and lint_on around source to disable this message.\n\n```\n"
+                    },
+                    "locations": [
+                        {
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 21,
+                                    "startColumn": 8,
+                                    "endColumn": 9,
+                                    "snippit": {
+                                        "text": "module t;",
+                                        "markdown": "```\n   21 | module t;   \n      |        ^\n\n```\n"
+                                    }
+                                }
+                            }
+                        }
+                    ],
+                    "relatedLocations": [
+                        {
+                            "message": {
+                                "text": "... Location of original declaration\n... For warning description see https://verilator.org/warn/MODDUP?v=latest\n... Use \"/* verilator lint_off MODDUP */\" and lint_on around source to disable this message.",
+                                "markdown": "```\n                 t/t_sarif.v:7:8: ... Location of original declaration\n    7 | module t(\n      |        ^\n                 ... For warning description see https://verilator.org/warn/MODDUP?v=latest\n                 ... Use \"/* verilator lint_off MODDUP */\" and lint_on around source to disable this message.\n\n```\n"
+                            },
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 7,
+                                    "startColumn": 8,
+                                    "endColumn": 9,
+                                    "snippit": {
+                                        "text": "module t(",
+                                        "markdown": "```\n    7 | module t(\n      |        ^\n\n```\n"
+                                    }
+                                }
+                            }
+                        }
+                    ],
+                    "ruleId": "MODDUP",
+                    "ruleIndex": 0
+                },
+                {
+                    "level": "warning",
+                    "message": {
+                        "text": "Operator ASSIGNW expects 2 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits.\n... note: In instance 't'\n... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest\n... Use \"/* verilator lint_off WIDTHTRUNC */\" and lint_on around source to disable this message.",
+                        "markdown": "```\n%Warning-WIDTHTRUNC: t/t_sarif.v:12:23: Operator ASSIGNW expects 2 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits.\n                                      : ... note: In instance 't'\n   12 |    wire [1:0] trunced = 5'b11111;   \n      |                       ^\n                     ... For warning description see https://verilator.org/warn/WIDTHTRUNC?v=latest\n                     ... Use \"/* verilator lint_off WIDTHTRUNC */\" and lint_on around source to disable this message.\n\n```\n"
+                    },
+                    "locations": [
+                        {
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 12,
+                                    "startColumn": 23,
+                                    "endColumn": 24,
+                                    "snippit": {
+                                        "text": "   wire [1:0] trunced = 5'b11111;",
+                                        "markdown": "```\n   12 |    wire [1:0] trunced = 5'b11111;   \n      |                       ^\n\n```\n"
+                                    }
+                                }
+                            }
+                        }
+                    ],
+                    "ruleId": "WIDTHTRUNC",
+                    "ruleIndex": 2
+                },
+                {
+                    "level": "warning",
+                    "message": {
+                        "text": "Signal has multiple driving blocks with different clocking: 'multidriven'\n... Location of first driving block\n... Location of other driving block\n... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest\n... Use \"/* verilator lint_off MULTIDRIVEN */\" and lint_on around source to disable this message.",
+                        "markdown": "```\n%Warning-MULTIDRIVEN: t/t_sarif.v:10:18: Signal has multiple driving blocks with different clocking: 'multidriven'\n                      t/t_sarif.v:15:6: ... Location of first driving block\n   15 |      multidriven <= '1;\n      |      ^~~~~~~~~~~\n                      t/t_sarif.v:17:6: ... Location of other driving block\n   17 |      multidriven <= '0;\n      |      ^~~~~~~~~~~\n                      ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest\n                      ... Use \"/* verilator lint_off MULTIDRIVEN */\" and lint_on around source to disable this message.\n\n```\n"
+                    },
+                    "locations": [
+                        {
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 10,
+                                    "startColumn": 18,
+                                    "endColumn": 29,
+                                    "snippit": {
+                                        "text": "    output logic multidriven);",
+                                        "markdown": "```\n   10 |     output logic multidriven);\n      |                  ^~~~~~~~~~~\n\n```\n"
+                                    }
+                                }
+                            }
+                        }
+                    ],
+                    "relatedLocations": [
+                        {
+                            "message": {
+                                "text": "... Location of first driving block",
+                                "markdown": "```\n                      t/t_sarif.v:15:6: ... Location of first driving block\n   15 |      multidriven <= '1;\n      |      ^~~~~~~~~~~\n\n```\n"
+                            },
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 15,
+                                    "startColumn": 6,
+                                    "endColumn": 17,
+                                    "snippit": {
+                                        "text": "     multidriven <= '1;",
+                                        "markdown": "```\n   15 |      multidriven <= '1;\n      |      ^~~~~~~~~~~\n\n```\n"
+                                    }
+                                }
+                            }
+                        },
+                        {
+                            "message": {
+                                "text": "... Location of other driving block\n... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest\n... Use \"/* verilator lint_off MULTIDRIVEN */\" and lint_on around source to disable this message.",
+                                "markdown": "```\n                      t/t_sarif.v:17:6: ... Location of other driving block\n   17 |      multidriven <= '0;\n      |      ^~~~~~~~~~~\n                      ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest\n                      ... Use \"/* verilator lint_off MULTIDRIVEN */\" and lint_on around source to disable this message.\n\n```\n"
+                            },
+                            "physicalLocation": {
+                                "artifactLocation": {
+                                    "uri": "file:///.../t_sarif.v"
+                                },
+                                "region": {
+                                    "sourceLanguage": "systemverilog",
+                                    "startLine": 17,
+                                    "startColumn": 6,
+                                    "endColumn": 17,
+                                    "snippit": {
+                                        "text": "     multidriven <= '0;",
+                                        "markdown": "```\n   17 |      multidriven <= '0;\n      |      ^~~~~~~~~~~\n\n```\n"
+                                    }
+                                }
+                            }
+                        }
+                    ],
+                    "ruleId": "MULTIDRIVEN",
+                    "ruleIndex": 1
+                }
+            ]
+        }
+    ]
+}
diff --git a/test_regress/t/t_sarif.v b/test_regress/t/t_sarif.v
new file mode 100644
index 000000000..7af1b0fab
--- /dev/null
+++ b/test_regress/t/t_sarif.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2009 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(
+    input clk1,
+    input clk2,
+    output logic multidriven);
+
+   wire [1:0] trunced = 5'b11111;  // Warned
+
+   always @ (posedge clk1)
+     multidriven <= '1;
+   always @ (posedge clk2)
+     multidriven <= '0;
+
+endmodule
+
+module t;  // BAD duplicate
+endmodule
diff --git a/test_regress/t/t_sarif_output.py b/test_regress/t/t_sarif_output.py
new file mode 100755
index 000000000..c1db584cd
--- /dev/null
+++ b/test_regress/t/t_sarif_output.py
@@ -0,0 +1,20 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = "t/t_sarif.v"
+
+test.lint(
+    verilator_flags2=['-Wno-fatal', '--diagnostics-sarif-output', test.obj_dir + "/my.sarif"])
+
+test.file_grep(test.obj_dir + "/my.sarif", "t_sarif.v")
+
+test.passes()

From 338a456f097fb3b5f074d70aa8720e64334fe5b9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 15:48:01 -0400
Subject: [PATCH 076/211] Commentary: Changes update

---
 Changes | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index ee7d03fba..f2b6412c7 100644
--- a/Changes
+++ b/Changes
@@ -15,7 +15,7 @@ Verilator 5.037 devel
 
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
-* Support SARIF JSON diagnostic output with `--diagnostics-sarif`.
+* Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
@@ -35,6 +35,7 @@ Verilator 5.037 devel
 * Fix folding of LteS in DfgPeephole (#6000) (#6004). [Geza Lore]
 * Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
 * Fix skipped generate blocks in toggle coverage (#6010). [Ryszard Rozak, Antmicro Ltd.]
+* Fix arithmetic left-shift by constants over 32 bits (#6007) (#6015). [Zhen Yan]
 
 
 Verilator 5.036 2025-04-27

From 647404ec1ecc16d38b54ad1fd1ce8123ec5909ee Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 16:28:09 -0400
Subject: [PATCH 077/211] Tests: Improve warning coverage

---
 src/V3EmitCFunc.cpp                       |  5 ++-
 test_regress/t/t_assert_always_unsup.out  | 13 ++++++
 test_regress/t/t_assert_always_unsup.py   | 16 ++++++++
 test_regress/t/t_assert_always_unsup.v    | 48 +++++++++++++++++++++++
 test_regress/t/t_c_width_bad.out          |  6 +++
 test_regress/t/t_c_width_bad.py           | 16 ++++++++
 test_regress/t/t_c_width_bad.v            | 13 ++++++
 test_regress/t/t_display_wide_bad.out     |  5 +++
 test_regress/t/t_display_wide_bad.py      | 16 ++++++++
 test_regress/t/t_display_wide_bad.v       | 30 ++++++++++++++
 test_regress/t/t_dist_warn_coverage.py    | 16 +++-----
 test_regress/t/t_flag_f_bad_getenvend.out |  2 +
 test_regress/t/t_flag_f_bad_getenvend.py  | 18 +++++++++
 test_regress/t/t_flag_f_bad_getenvend.vc  |  1 +
 test_regress/t/t_wire_trireg_unsup.out    |  5 +++
 test_regress/t/t_wire_trireg_unsup.py     | 16 ++++++++
 test_regress/t/t_wire_trireg_unsup.v      | 13 ++++++
 17 files changed, 226 insertions(+), 13 deletions(-)
 create mode 100644 test_regress/t/t_assert_always_unsup.out
 create mode 100755 test_regress/t/t_assert_always_unsup.py
 create mode 100644 test_regress/t/t_assert_always_unsup.v
 create mode 100644 test_regress/t/t_c_width_bad.out
 create mode 100755 test_regress/t/t_c_width_bad.py
 create mode 100644 test_regress/t/t_c_width_bad.v
 create mode 100644 test_regress/t/t_display_wide_bad.out
 create mode 100755 test_regress/t/t_display_wide_bad.py
 create mode 100644 test_regress/t/t_display_wide_bad.v
 create mode 100644 test_regress/t/t_flag_f_bad_getenvend.out
 create mode 100755 test_regress/t/t_flag_f_bad_getenvend.py
 create mode 100644 test_regress/t/t_flag_f_bad_getenvend.vc
 create mode 100644 test_regress/t/t_wire_trireg_unsup.out
 create mode 100755 test_regress/t/t_wire_trireg_unsup.py
 create mode 100644 test_regress/t/t_wire_trireg_unsup.v

diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 40733ca16..8141afae7 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -256,8 +256,9 @@ void EmitCFunc::displayArg(AstNode* dispp, AstNode** elistp, bool isScan, const
             return;  // LCOV_EXCL_LINE
         }
         if (argp->widthMin() > VL_VALUE_STRING_MAX_WIDTH) {
-            dispp->v3error("Exceeded limit of " + cvtToStr(VL_VALUE_STRING_MAX_WIDTH)
-                           + " bits for any $display-like arguments");
+            dispp->v3warn(E_UNSUPPORTED, "Unsupported: Exceeded limit of "
+                                             + cvtToStr(VL_VALUE_STRING_MAX_WIDTH)
+                                             + " bits for any $display-like arguments");
         }
         if (argp->widthMin() > 8 && fmtLetter == 'c') {
             // Technically legal, but surely not what the user intended.
diff --git a/test_regress/t/t_assert_always_unsup.out b/test_regress/t/t_assert_always_unsup.out
new file mode 100644
index 000000000..018505ca2
--- /dev/null
+++ b/test_regress/t/t_assert_always_unsup.out
@@ -0,0 +1,13 @@
+%Error-UNSUPPORTED: t/t_assert_always_unsup.v:21:7: Unsupported: always[] (in property expression)
+   21 |       always [2:5] a;
+      |       ^~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_assert_always_unsup.v:25:7: Unsupported: s_always (in property expression)
+   25 |       s_always [2:5] a;
+      |       ^~~~~~~~
+%Error: t/t_assert_always_unsup.v:29:20: syntax error, unexpected ':', expecting ']'
+   29 |       eventually [2:5] a;
+      |                    ^
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Cannot continue
+        ... This fatal error may be caused by the earlier error(s); resolve those first.
diff --git a/test_regress/t/t_assert_always_unsup.py b/test_regress/t/t_assert_always_unsup.py
new file mode 100755
index 000000000..7e5bcdfe5
--- /dev/null
+++ b/test_regress/t/t_assert_always_unsup.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(expect_filename=test.golden_filename, verilator_flags2=['--assert'], fails=True)
+
+test.passes()
diff --git a/test_regress/t/t_assert_always_unsup.v b/test_regress/t/t_assert_always_unsup.v
new file mode 100644
index 000000000..32f96aec1
--- /dev/null
+++ b/test_regress/t/t_assert_always_unsup.v
@@ -0,0 +1,48 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2022 by Antmicro Ltd.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+      clk
+   );
+
+   input clk;
+   int cyc = 0;
+   logic val = 0;
+
+   always @(posedge clk) begin
+      cyc <= cyc + 1;
+      val = ~val;
+   end
+
+   property p_alw;
+      always [2:5] a;
+   endproperty
+
+   property p_s_alw;
+      s_always [2:5] a;
+   endproperty
+
+   property p_ev;
+      eventually [2:5] a;
+   endproperty
+
+   property p_ev2;
+      eventually [2] a;
+   endproperty
+
+   property p_s_ev;
+      s_eventually [2:5] a;
+   endproperty
+
+   property p_s_alw_ev;
+      always s_eventually [2:5] a;
+   endproperty
+
+   property p_s_ev_alw;
+      s_eventually always [2:5] a;
+   endproperty
+
+endmodule
diff --git a/test_regress/t/t_c_width_bad.out b/test_regress/t/t_c_width_bad.out
new file mode 100644
index 000000000..d8a3bb4ae
--- /dev/null
+++ b/test_regress/t/t_c_width_bad.out
@@ -0,0 +1,6 @@
+%Error-UNSUPPORTED: t/t_c_width_bad.v:9:22: Unsupported: $c can't generate wider than 64 bits
+                                          : ... note: In instance 't'
+    9 |    bit [99:0] wide = $c100("0");
+      |                      ^~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_c_width_bad.py b/test_regress/t/t_c_width_bad.py
new file mode 100755
index 000000000..31228c9a7
--- /dev/null
+++ b/test_regress/t/t_c_width_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_c_width_bad.v b/test_regress/t/t_c_width_bad.v
new file mode 100644
index 000000000..33ee750ed
--- /dev/null
+++ b/test_regress/t/t_c_width_bad.v
@@ -0,0 +1,13 @@
+// DESCRIPTION: Verilator: Test of select from constant
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   bit [99:0] wide = $c100("0");
+
+   initial $display("%d", wide);
+
+endmodule
diff --git a/test_regress/t/t_display_wide_bad.out b/test_regress/t/t_display_wide_bad.out
new file mode 100644
index 000000000..363b2c68e
--- /dev/null
+++ b/test_regress/t/t_display_wide_bad.out
@@ -0,0 +1,5 @@
+%Error-UNSUPPORTED: t/t_display_wide_bad.v:25:10: Unsupported: Exceeded limit of 8192 bits for any $display-like arguments
+   25 |          $write("[%0t] cyc==%0d crc=%d\n", $time, cyc, {crc, crc, crc, crc});   
+      |          ^~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_display_wide_bad.py b/test_regress/t/t_display_wide_bad.py
new file mode 100755
index 000000000..e33e10acf
--- /dev/null
+++ b/test_regress/t/t_display_wide_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_display_wide_bad.v b/test_regress/t/t_display_wide_bad.v
new file mode 100644
index 000000000..cde9a15c2
--- /dev/null
+++ b/test_regress/t/t_display_wide_bad.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2011 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   integer      cyc = 0;
+   reg [4095:0] crc;
+
+   // Test loop
+   always @ (posedge clk) begin
+      cyc <= cyc + 1;
+      crc <= {crc[4094:0], crc[63] ^ crc[2] ^ crc[0]};  // not a good crc :)
+      if (cyc==0) begin
+         // Setup
+         crc <= 4096'h9f51804b5275c7b6ab9907144a58649bb778f9718062fa5c336fcc9edcad7cf17aad0a656244017bb21d9f97f7c0c147b6fa7488bb9d5bb8d3635b20fba1deab597121c502b21f49b18da998852d29a6b2b649315a3323a31e7e5f41e9bbb7e44046467438f37694857b963250bdb137a922cfce2af1defd1f93db5aa167f316d751bb274bda96fdee5e2c6eb21886633246b165341f0594c27697b06b62b1ad05ebe3c08909a54272de651296dcdd3d1774fc432d22210d8f6afa50b02cf23336f8cc3a0a2ebfd1a3a60366a1b66ef346e0379116d68caa01279ac2772d1f3cd76d2cbbc68ada6f83ec2441b2679b405486df8aa734ea1729b40c3f82210e8e42823eb3fd6ca77ee19f285741c4e8bac1ab7855c3138e84b6da1d897bbe37faf2d0256ad2f7ff9e704a63d824c1e97bddce990cae1578f9537ae2328d0afd69ffb317cbcf859696736e45e5c628b44727557c535a7d02c07907f2dccd6a21ca9ae9e1dbb1a135a8ebc2e0aa8c7329b898d02896273defe21beaa348e11165b71c48cf1c09714942a5a2ddc2adcb6e42c0f630117ee21205677d5128e8efc18c9a6f82a8475541fd722cca2dd829b7e78fef89dbeab63ab7b849910eb4fe675656c4b42b9452c81a4ca6296190a81dc63e6adfaa31995d7dfe3438ee9df66488d6cf569380569ffe6e5ea313d23af6ff08d979af29374ee9aff1fa143df238a1;
+      end
+      else if (cyc==99) begin
+         $write("[%0t] cyc==%0d crc=%d\n", $time, cyc, {crc, crc, crc, crc});  // Too wide
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+endmodule
diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index 6540a40cd..1e2875dde 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -19,6 +19,9 @@ Suppressed = {}
 
 for s in [
         ' exited with ',  # Is hit; driver.py filters out
+        ' loading non-variable',  # Instead 'storing to parameter' or syntax error
+        '--pipe-filter: Can\'t pipe: ',  # Can't test
+        '--pipe-filter: fork failed: ',  # Can't test
         'Assigned pin is neither input nor output',  # Instead earlier error
         'Define missing argument \'',  # Instead get Define passed too many arguments
         'Define or directive not defined: `',  # Instead V3ParseImp will warn
@@ -26,17 +29,15 @@ for s in [
         'Enum ranges must be integral, per spec',  # Hard to hit
         'Expecting define formal arguments. Found: ',  # Instead define syntax error
         'Import package not found: ',  # Errors earlier, until future parser released
+        'Member selection of non-struct/union object \'',  # Instead dotted expression error or V3Link other
         'Return with return value isn\'t underneath a function',  # Hard to hit, get other bad return messages
         'Syntax error parsing real: \'',  # Instead can't lex the number
         'Syntax error: Range \':\', \'+:\' etc are not allowed in the instance ',  # Instead get syntax error
         'Unsupported: Ranges ignored in port-lists',  # Hard to hit
         'dynamic new() not expected in this context (expected under an assign)',  # Instead get syntax error
         # Not yet analyzed
-        ' loading non-variable',
         '--pipe-filter protocol error, unexpected: ',
         '--pipe-filter returned bad status',
-        '--pipe-filter: Can\'t pipe: ',
-        '--pipe-filter: fork failed: ',
         'Argument needed for string.',
         'Array initialization has too few elements, need element ',
         'Assignment pattern with no members',
@@ -44,7 +45,6 @@ for s in [
         'Can\'t read annotation file: ',
         'Can\'t resolve module reference: \'',
         'Can\'t write file: ',
-        'Exceeded limit of ',
         'Extern declaration\'s scope is not a defined class',
         'File not found: ',
         'Format to $display-like function must have constant format string',
@@ -52,7 +52,6 @@ for s in [
         'Illegal +: or -: select; type already selected, or bad dimension: ',
         'Illegal bit or array select; type already selected, or bad dimension: ',
         'Illegal range select; type already selected, or bad dimension: ',
-        'Member selection of non-struct/union object \'',
         'Modport item is not a function/task: ',
         'Modport item is not a variable: ',
         'Modport item not found: ',
@@ -67,7 +66,6 @@ for s in [
         'String of ',
         'Symbol matching ',
         'Unexpected connection to arrayed port',
-        'Unmatched brackets in variable substitution in file: ',
         'Unsized numbers/parameters not allowed in streams.',
         'Unsupported RHS tristate construct: ',
         'Unsupported or syntax error: Unsized range in instance or other declaration',
@@ -75,7 +73,6 @@ for s in [
         'Unsupported tristate construct (not in propagation graph): ',
         'Unsupported tristate port expression: ',
         'Unsupported: $bits for queue',
-        'Unsupported: $c can\'t generate wider than 64 bits',
         'Unsupported: &&& expression',
         'Unsupported: +%- range',
         'Unsupported: +/- range',
@@ -100,7 +97,6 @@ for s in [
         'Unsupported: [] dimensions',
         'Unsupported: \'default :/\' constraint',
         'Unsupported: \'{} .* patterns',
-        'Unsupported: always[] (in property expression)',
         'Unsupported: assertion items in clocking blocks',
         'Unsupported: don\'t know how to deal with ',
         'Unsupported: eventually[] (in property expression)',
@@ -110,11 +106,9 @@ for s in [
         'Unsupported: no_inline for tasks',
         'Unsupported: property port \'local\'',
         'Unsupported: repeat event control',
-        'Unsupported: s_always (in property expression)',
         'Unsupported: static cast to ',
         'Unsupported: super',
         'Unsupported: this.super',
-        'Unsupported: trireg',
         'Unsupported: with[] stream expression',
 ]:
     Suppressed[s] = True
@@ -183,7 +177,7 @@ def check():
     read_outputs()
 
     print("Number of suppressions = " + str(len(Suppressed)))
-    print("Coverage = %3.1f%%" % (100 - int(100 * len(Suppressed) / len(Messages))))
+    print("Coverage = %3.1f%%" % (100 - (100 * len(Suppressed) / len(Messages))))
     print()
 
     print("Checking for v3error/v3warn messages in sources without")
diff --git a/test_regress/t/t_flag_f_bad_getenvend.out b/test_regress/t/t_flag_f_bad_getenvend.out
new file mode 100644
index 000000000..aa48f4b13
--- /dev/null
+++ b/test_regress/t/t_flag_f_bad_getenvend.out
@@ -0,0 +1,2 @@
+%Error: Unmatched brackets in variable substitution in file: $(GETENV_NO_END_PAREN
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_flag_f_bad_getenvend.py b/test_regress/t/t_flag_f_bad_getenvend.py
new file mode 100755
index 000000000..24c6b121c
--- /dev/null
+++ b/test_regress/t/t_flag_f_bad_getenvend.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(v_flags2=["-f t/t_flag_f_bad_getenvend.vc"],
+          fails=True,
+          expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_flag_f_bad_getenvend.vc b/test_regress/t/t_flag_f_bad_getenvend.vc
new file mode 100644
index 000000000..62f4dd0ca
--- /dev/null
+++ b/test_regress/t/t_flag_f_bad_getenvend.vc
@@ -0,0 +1 @@
+$(GETENV_NO_END_PAREN
diff --git a/test_regress/t/t_wire_trireg_unsup.out b/test_regress/t/t_wire_trireg_unsup.out
new file mode 100644
index 000000000..593710f80
--- /dev/null
+++ b/test_regress/t/t_wire_trireg_unsup.out
@@ -0,0 +1,5 @@
+%Error-UNSUPPORTED: t/t_wire_trireg_unsup.v:11:4: Unsupported: trireg
+   11 |    trireg unsup;
+      |    ^~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_wire_trireg_unsup.py b/test_regress/t/t_wire_trireg_unsup.py
new file mode 100755
index 000000000..e33e10acf
--- /dev/null
+++ b/test_regress/t/t_wire_trireg_unsup.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_wire_trireg_unsup.v b/test_regress/t/t_wire_trireg_unsup.v
new file mode 100644
index 000000000..45ba915e4
--- /dev/null
+++ b/test_regress/t/t_wire_trireg_unsup.v
@@ -0,0 +1,13 @@
+// DESCRIPTION: Verilator: Verilog Test module for SystemVerilog 'alias'
+//
+// Simple bi-directional alias test.
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/);
+
+   trireg unsup;
+
+endmodule

From 640339ec363d2df7dfd3fdf629924dc649509b4f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 20:27:03 -0400
Subject: [PATCH 078/211] Revert 'Fix --x-initial and --x-assign random
 stability (#2662) (#5958).' See (#6018).

Reverts 458102380543eacda3fb5f99fd10027baad69511 plus line in Changes file
---
 Changes                                       |  1 -
 include/verilated.cpp                         | 74 -------------------
 include/verilated_funcs.h                     | 10 ---
 src/V3AstNodeExpr.h                           | 20 ++++-
 src/V3EmitCFunc.cpp                           | 39 ++--------
 src/V3EmitCFunc.h                             |  5 --
 src/V3EmitCImp.cpp                            |  2 -
 src/V3Options.cpp                             |  1 -
 src/V3String.cpp                              | 43 -----------
 src/V3String.h                                |  2 -
 src/V3Unknown.cpp                             |  7 +-
 test_regress/t/t_debug_emitv.py               | 21 ++----
 test_regress/t/t_flag_xinitial_unique.py      |  4 +-
 test_regress/t/t_x_assign.cpp                 | 24 +++---
 test_regress/t/t_x_assign_unique_2.py         | 24 ------
 test_regress/t/t_x_rand_mt_stability.out      | 17 -----
 test_regress/t/t_x_rand_mt_stability.py       | 24 ------
 test_regress/t/t_x_rand_mt_stability_add.out  | 17 -----
 test_regress/t/t_x_rand_mt_stability_add.py   | 19 -----
 .../t/t_x_rand_mt_stability_add_trace.out     | 17 -----
 .../t/t_x_rand_mt_stability_add_trace.py      | 19 -----
 .../t/t_x_rand_mt_stability_trace.out         | 17 -----
 test_regress/t/t_x_rand_mt_stability_trace.py | 19 -----
 .../t/t_x_rand_mt_stability_zeros.out         | 17 -----
 test_regress/t/t_x_rand_mt_stability_zeros.py | 19 -----
 test_regress/t/t_x_rand_stability.out         | 17 -----
 test_regress/t/t_x_rand_stability.py          | 23 ------
 test_regress/t/t_x_rand_stability.v           | 74 -------------------
 test_regress/t/t_x_rand_stability_add.out     | 17 -----
 test_regress/t/t_x_rand_stability_add.py      | 19 -----
 .../t/t_x_rand_stability_add_trace.out        | 17 -----
 .../t/t_x_rand_stability_add_trace.py         | 19 -----
 test_regress/t/t_x_rand_stability_trace.out   | 17 -----
 test_regress/t/t_x_rand_stability_trace.py    | 19 -----
 test_regress/t/t_x_rand_stability_zeros.out   | 17 -----
 test_regress/t/t_x_rand_stability_zeros.py    | 19 -----
 36 files changed, 45 insertions(+), 675 deletions(-)
 delete mode 100755 test_regress/t/t_x_assign_unique_2.py
 delete mode 100644 test_regress/t/t_x_rand_mt_stability.out
 delete mode 100755 test_regress/t/t_x_rand_mt_stability.py
 delete mode 100644 test_regress/t/t_x_rand_mt_stability_add.out
 delete mode 100755 test_regress/t/t_x_rand_mt_stability_add.py
 delete mode 100644 test_regress/t/t_x_rand_mt_stability_add_trace.out
 delete mode 100755 test_regress/t/t_x_rand_mt_stability_add_trace.py
 delete mode 100644 test_regress/t/t_x_rand_mt_stability_trace.out
 delete mode 100755 test_regress/t/t_x_rand_mt_stability_trace.py
 delete mode 100644 test_regress/t/t_x_rand_mt_stability_zeros.out
 delete mode 100755 test_regress/t/t_x_rand_mt_stability_zeros.py
 delete mode 100644 test_regress/t/t_x_rand_stability.out
 delete mode 100755 test_regress/t/t_x_rand_stability.py
 delete mode 100644 test_regress/t/t_x_rand_stability.v
 delete mode 100644 test_regress/t/t_x_rand_stability_add.out
 delete mode 100755 test_regress/t/t_x_rand_stability_add.py
 delete mode 100644 test_regress/t/t_x_rand_stability_add_trace.out
 delete mode 100755 test_regress/t/t_x_rand_stability_add_trace.py
 delete mode 100644 test_regress/t/t_x_rand_stability_trace.out
 delete mode 100755 test_regress/t/t_x_rand_stability_trace.py
 delete mode 100644 test_regress/t/t_x_rand_stability_zeros.out
 delete mode 100755 test_regress/t/t_x_rand_stability_zeros.py

diff --git a/Changes b/Changes
index f2b6412c7..7af71a4f7 100644
--- a/Changes
+++ b/Changes
@@ -18,7 +18,6 @@ Verilator 5.037 devel
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
-* Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
diff --git a/include/verilated.cpp b/include/verilated.cpp
index 0a91df7fa..0fc525de1 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -406,38 +406,6 @@ IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
     Verilated::threadContextp()->randSeed(static_cast<int>(seed));
     return VL_RANDOM_I();
 }
-
-IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
-    if (Verilated::threadContextp()->randReset() == 0) return 0;
-    IData data = ~0;
-    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
-        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
-        data = rng.rand64();
-    }
-    data &= VL_MASK_I(obits);
-    return data;
-}
-
-QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
-    if (Verilated::threadContextp()->randReset() == 0) return 0;
-    QData data = ~0ULL;
-    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
-        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
-        data = rng.rand64();
-    }
-    data &= VL_MASK_Q(obits);
-    return data;
-}
-
-WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
-                                 uint64_t salt) VL_MT_UNSAFE {
-    if (Verilated::threadContextp()->randReset() != 2) { return VL_RAND_RESET_W(obits, outwp); }
-    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
-    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
-    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
-    return outwp;
-}
-
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -1732,48 +1700,6 @@ IData VL_SSCANF_INNX(int, const std::string& ld, const std::string& format, int
     return got;
 }
 
-// MurmurHash64A
-uint64_t VL_HASH(const char* key) VL_PURE {
-    const size_t len = strlen(key);
-    const uint64_t seed = 0;
-    const uint64_t m = 0xc6a4a7935bd1e995ULL;
-    const int r = 47;
-
-    uint64_t h = seed ^ (len * m);
-
-    const uint64_t* data = (const uint64_t*)key;
-    const uint64_t* end = data + (len / 8);
-
-    while (data != end) {
-        uint64_t k = *data++;
-
-        k *= m;
-        k ^= k >> r;
-        k *= m;
-
-        h ^= k;
-        h *= m;
-    }
-
-    const unsigned char* data2 = (const unsigned char*)data;
-
-    switch (len & 7) {
-    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
-    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
-    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
-    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
-    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
-    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
-    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
-    };
-
-    h ^= h >> r;
-    h *= m;
-    h ^= h >> r;
-
-    return h;
-}
-
 IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start,
                  IData count) VL_MT_SAFE {
     // While threadsafe, each thread can only access different file handles
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 023b23bc0..c971c11ac 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -101,14 +101,6 @@ inline IData VL_URANDOM_RANGE_I(IData hi, IData lo) {
     }
 }
 
-/// Random reset a signal of given width (init time only, var-specific PRNG)
-extern IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
-/// Random reset a signal of given width (init time only, var-specific PRNG)
-extern QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
-/// Random reset a signal of given width (init time only, var-specific PRNG)
-extern WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
-                                        uint64_t salt) VL_MT_UNSAFE;
-
 /// Random reset a signal of given width (init time only)
 extern IData VL_RAND_RESET_I(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
@@ -2815,8 +2807,6 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr)
 }
 extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE;
 
-uint64_t VL_HASH(const char* key) VL_PURE;
-
 //======================================================================
 
 #endif  // Guard
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index babc6f5eb..8366f6f8d 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1802,8 +1802,14 @@ class AstRand final : public AstNodeExpr {
     // Return a random number, based upon width()
     // @astgen op1 := seedp : Optional[AstNode]
     const bool m_urandom = false;  // $urandom vs $random
+    const bool m_reset = false;  // Random reset, versus always random
 public:
     class Reset {};
+    AstRand(FileLine* fl, Reset, AstNodeDType* dtp, bool reset)
+        : ASTGEN_SUPER_Rand(fl)
+        , m_reset{reset} {
+        dtypep(dtp);
+    }
     AstRand(FileLine* fl, AstNode* seedp, bool urandom)
         : ASTGEN_SUPER_Rand(fl)
         , m_urandom{urandom} {
@@ -1815,6 +1821,14 @@ public:
                        : (m_urandom ? "%f$urandom()" : "%f$random()");
     }
     string emitC() override {
+        if (m_reset) {
+            if (v3Global.opt.xAssign() == "unique") {
+                return "VL_RAND_RESET_ASSIGN_%nq(%nw, %P)";
+            } else {
+                // This follows xInitial randomization
+                return "VL_RAND_RESET_%nq(%nw, %P)";
+            }
+        }
         if (seedp()) {
             if (urandom()) {
                 return "VL_URANDOM_SEEDED_%nq%lq(%li)";
@@ -1831,12 +1845,14 @@ public:
     bool cleanOut() const override { return false; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() override { return !seedp(); }
+    bool isPure() override { return !m_reset && !seedp(); }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool sameNode(const AstNode* /*samep*/) const override { return true; }
     bool combinable(const AstRand* samep) const {
-        return !seedp() && !samep->seedp() && urandom() == samep->urandom();
+        return !seedp() && !samep->seedp() && reset() == samep->reset()
+               && urandom() == samep->urandom();
     }
+    bool reset() const { return m_reset; }
     bool urandom() const { return m_urandom; }
 };
 class AstRandRNG final : public AstNodeExpr {
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 8141afae7..4d0885f19 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -753,9 +753,7 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                || varp->isFuncLocal()  // Randomization too slow
                || (basicp && basicp->isZeroInit())
                || (v3Global.opt.underlineZero() && !varp->name().empty() && varp->name()[0] == '_')
-               || (varp->isXTemp()
-                       ? (v3Global.opt.xAssign() != "unique")
-                       : (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0")));
+               || (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0"));
         const bool slow = !varp->isFuncLocal() && !varp->isClassMember();
         splitSizeInc(1);
         if (dtypep->isWide()) {  // Handle unpacked; not basicp->isWide
@@ -768,20 +766,9 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                     out += cvtToStr(constp->num().edataWord(w)) + "U;\n";
                 }
             } else {
-                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(")
-                              : "VL_SCOPED_RAND_RESET_W(";
+                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(") : "VL_RAND_RESET_W(";
                 out += cvtToStr(dtypep->widthMin());
-                out += ", " + varNameProtected + suffix;
-                if (!zeroit) {
-                    emitVarResetScopeHash();
-                    const uint64_t salt = VString::hashMurmur(varp->prettyName());
-                    out += ", ";
-                    out += m_classOrPackage ? m_classOrPackageHash : "__VscopeHash";
-                    out += ", ";
-                    out += std::to_string(salt);
-                    out += "ull";
-                }
-                out += ");\n";
+                out += ", " + varNameProtected + suffix + ");\n";
             }
             return out;
         } else {
@@ -794,13 +781,9 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
             if (zeroit || (v3Global.opt.xInitialEdge() && varp->isUsedClock())) {
                 out += " = 0;\n";
             } else {
-                emitVarResetScopeHash();
-                const uint64_t salt = VString::hashMurmur(varp->prettyName());
-                out += " = VL_SCOPED_RAND_RESET_";
+                out += " = VL_RAND_RESET_";
                 out += dtypep->charIQWN();
-                out += "(" + cvtToStr(dtypep->widthMin()) + ", "
-                       + (m_classOrPackage ? m_classOrPackageHash : "__VscopeHash") + ", "
-                       + std::to_string(salt) + "ull);\n";
+                out += "(" + cvtToStr(dtypep->widthMin()) + ");\n";
             }
             return out;
         }
@@ -809,15 +792,3 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
     }
     return "";
 }
-
-void EmitCFunc::emitVarResetScopeHash() {
-    if (VL_LIKELY(m_createdScopeHash)) { return; }
-    if (m_classOrPackage) {
-        m_classOrPackageHash
-            = std::to_string(VString::hashMurmur(m_classOrPackage->name())) + "ULL";
-    } else {
-        puts(string("const uint64_t __VscopeHash = VL_HASH(")
-             + (m_useSelfForThis ? "vlSelf" : "this") + "->name());\n");
-    }
-    m_createdScopeHash = true;
-}
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index c6c72ba31..30075f281 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -120,7 +120,6 @@ class EmitCFunc VL_NOT_FINAL : public EmitCConstInit {
     int m_labelNum = 0;  // Next label number
     bool m_inUC = false;  // Inside an AstUCStmt or AstUCExpr
     bool m_emitConstInit = false;  // Emitting constant initializer
-    bool m_createdScopeHash = false;  // Already created a scope hash
 
     // State associated with processing $display style string formatting
     struct EmitDispState final {
@@ -151,8 +150,6 @@ protected:
     const AstNodeModule* m_modp = nullptr;  // Current module being emitted
     const AstCFunc* m_cfuncp = nullptr;  // Current function being emitted
     bool m_instantiatesOwnProcess = false;
-    const AstClassPackage* m_classOrPackage = nullptr;  // Pointer to current class or package
-    string m_classOrPackageHash;  // Hash of class or package name
 
     bool constructorNeedsProcess(const AstClass* const classp) {
         const AstNode* const newp = m_memberMap.findMember(classp, "new");
@@ -217,7 +214,6 @@ public:
     string emitVarResetRecurse(const AstVar* varp, bool constructing,
                                const string& varNameProtected, AstNodeDType* dtypep, int depth,
                                const string& suffix);
-    void emitVarResetScopeHash();
     void emitChangeDet();
     void emitConstInit(AstNode* initp) {
         // We should refactor emit to produce output into a provided buffer, not go through members
@@ -289,7 +285,6 @@ public:
         VL_RESTORER(m_useSelfForThis);
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_instantiatesOwnProcess);
-        VL_RESTORER(m_createdScopeHash);
         m_cfuncp = nodep;
         m_instantiatesOwnProcess = false;
 
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index 090f312ba..ef8ec9241 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -506,9 +506,7 @@ class EmitCImp final : EmitCFunc {
         };
 
         gather(modp);
-        VL_RESTORER(m_classOrPackage);
         if (const AstClassPackage* const packagep = VN_CAST(modp, ClassPackage)) {
-            m_classOrPackage = packagep;
             gather(packagep->classp());
         }
 
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index b23eda621..f2d3267f7 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -2102,7 +2102,6 @@ V3Options::V3Options() {
     m_makeDir = "obj_dir";
     m_unusedRegexp = "*unused*";
     m_xAssign = "fast";
-    m_xInitial = "unique";
 
     m_defaultLanguage = V3LangCode::mostRecent();
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 27c1d5a06..120ff6547 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -342,49 +342,6 @@ string VString::aOrAn(const char* word) {
     }
 }
 
-// MurmurHash64A
-uint64_t VString::hashMurmur(const string& str) VL_PURE {
-    const char* key = str.c_str();
-    const size_t len = str.size();
-    const uint64_t seed = 0;
-    const uint64_t m = 0xc6a4a7935bd1e995ULL;
-    const int r = 47;
-
-    uint64_t h = seed ^ (len * m);
-
-    const uint64_t* data = (const uint64_t*)key;
-    const uint64_t* end = data + (len / 8);
-
-    while (data != end) {
-        uint64_t k = *data++;
-
-        k *= m;
-        k ^= k >> r;
-        k *= m;
-
-        h ^= k;
-        h *= m;
-    }
-
-    const unsigned char* data2 = (const unsigned char*)data;
-
-    switch (len & 7) {
-    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
-    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
-    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
-    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
-    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
-    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
-    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
-    };
-
-    h ^= h >> r;
-    h *= m;
-    h ^= h >> r;
-
-    return h;
-}
-
 //######################################################################
 // VHashSha256
 
diff --git a/src/V3String.h b/src/V3String.h
index f40b46b8a..fb9b87106 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -141,8 +141,6 @@ public:
     // Return proper article (a/an) for a word. May be inaccurate for some special words
     static string aOrAn(const char* word);
     static string aOrAn(const string& word) { return aOrAn(word.c_str()); }
-    // Hash the string
-    static uint64_t hashMurmur(const string& str) VL_PURE;
 };
 
 //######################################################################
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 8f287f400..5ad89aece 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -359,9 +359,10 @@ class UnknownVisitor final : public VNVisitor {
                         nodep->fileline(),
                         new AstVarRef{nodep->fileline(), newvarp, VAccess::WRITE},
                         new AstOr{nodep->fileline(), new AstConst{nodep->fileline(), numb1},
-                                  new AstAnd{
-                                      nodep->fileline(), new AstConst{nodep->fileline(), numbx},
-                                      new AstVarRef{nodep->fileline(), newvarp, VAccess::READ}}}}};
+                                  new AstAnd{nodep->fileline(),
+                                             new AstConst{nodep->fileline(), numbx},
+                                             new AstRand{nodep->fileline(), AstRand::Reset{},
+                                                         nodep->dtypep(), true}}}}};
                 // Add inits in front of other statement.
                 // In the future, we should stuff the initp into the module's constructor.
                 AstNode* const afterp = m_modp->stmtsp()->unlinkFrBackWithNext();
diff --git a/test_regress/t/t_debug_emitv.py b/test_regress/t/t_debug_emitv.py
index f8d03f1e7..227968047 100755
--- a/test_regress/t/t_debug_emitv.py
+++ b/test_regress/t/t_debug_emitv.py
@@ -9,30 +9,23 @@
 
 import vltest_bootstrap
 
-test.scenarios("vlt")
+test.scenarios('vlt')
 
 test.lint(
     # We also have dump-tree turned on, so hit a lot of AstNode*::dump() functions
     # Likewise XML
     v_flags=["--lint-only --dumpi-tree 9 --dumpi-V3EmitV 9 --debug-emitv"])
 
-output_vs = test.glob_some(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
+output_v = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
 
-for output_v in output_vs:
-    test.files_identical(output_v, test.golden_filename)
+test.files_identical(output_v, test.golden_filename)
 
 if test.verbose:
     # Print if that the output Verilog is clean
     # TODO not yet round-trip clean
-    test.run(
-        cmd=[
-            os.environ["VERILATOR_ROOT"] + "/bin/verilator",
-            "--lint-only",
-            output_vs[0],
-        ],
-        logfile=test.obj_dir + "/sim_roundtrip.log",
-        fails=True,
-        verilator_run=True,
-    )
+    test.run(cmd=[os.environ["VERILATOR_ROOT"] + "/bin/verilator", "--lint-only", output_v],
+             logfile=test.obj_dir + "/sim_roundtrip.log",
+             fails=True,
+             verilator_run=True)
 
 test.passes()
diff --git a/test_regress/t/t_flag_xinitial_unique.py b/test_regress/t/t_flag_xinitial_unique.py
index 9d4ede6ae..64ac07036 100755
--- a/test_regress/t/t_flag_xinitial_unique.py
+++ b/test_regress/t/t_flag_xinitial_unique.py
@@ -9,13 +9,13 @@
 
 import vltest_bootstrap
 
-test.scenarios("vlt_all")
+test.scenarios('vlt_all')
 
 test.compile(verilator_flags2=["--x-initial unique"])
 
 test.execute()
 
 files = glob.glob(test.obj_dir + "/" + test.vm_prefix + "___024root__DepSet_*__Slow.cpp")
-test.file_grep_any(files, r"VL_SCOPED_RAND_RESET")
+test.file_grep_any(files, r'VL_RAND_RESET')
 
 test.passes()
diff --git a/test_regress/t/t_x_assign.cpp b/test_regress/t/t_x_assign.cpp
index 36aa6371f..bfb80ffff 100644
--- a/test_regress/t/t_x_assign.cpp
+++ b/test_regress/t/t_x_assign.cpp
@@ -21,37 +21,31 @@ double sc_time_stamp() { return 0; }
 # define EXPECTED 0
 #elif defined(T_X_ASSIGN_1)
 # define EXPECTED 1
+#elif defined(T_X_ASSIGN_UNIQUE_0)
+# define EXPECTED 0
+#elif defined(T_X_ASSIGN_UNIQUE_1)
+# define EXPECTED 1
+#else
+# error "Don't know expectd output for test" #TEST
 #endif
 // clang-format on
 
 int main(int argc, const char** argv) {
+    VM_PREFIX* top = new VM_PREFIX{};
+
 #if defined(T_X_ASSIGN_UNIQUE_0)
     Verilated::randReset(0);
 #elif defined(T_X_ASSIGN_UNIQUE_1)
     Verilated::randReset(1);
-#elif defined(T_X_ASSIGN_UNIQUE_2)
-    Verilated::randReset(2);
 #endif
 
-    VM_PREFIX* top = new VM_PREFIX{};
-
     // Evaluate one clock posedge
     top->clk = 0;
     top->eval();
     top->clk = 1;
     top->eval();
 
-#if defined(T_X_ASSIGN_UNIQUE_0)
-    if (top->o_int != 0) {
-        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
-        exit(1);
-    }
-#elif defined(T_X_ASSIGN_UNIQUE_1)
-    if (top->o_int != -1) {
-        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
-        exit(1);
-    }
-#elif defined(T_X_ASSIGN_UNIQUE_2)
+#if defined(T_X_ASSIGN_UNIQUE_0) || defined(T_X_ASSIGN_UNIQUE_1)
     if (top->o_int == 0 || top->o_int == -1) {
         vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not unique");
         exit(1);
diff --git a/test_regress/t/t_x_assign_unique_2.py b/test_regress/t/t_x_assign_unique_2.py
deleted file mode 100755
index f5cc5d72a..000000000
--- a/test_regress/t/t_x_assign_unique_2.py
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you can
-# redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt_all")
-test.pli_filename = "t/t_x_assign.cpp"
-test.top_filename = "t/t_x_assign.v"
-
-test.compile(
-    make_top_shell=False,
-    make_main=False,
-    verilator_flags2=["--x-assign unique --exe", "--x-initial 0", test.pli_filename],
-)
-
-test.execute()
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability.out b/test_regress/t/t_x_rand_mt_stability.out
deleted file mode 100644
index a752e5efb..000000000
--- a/test_regress/t/t_x_rand_mt_stability.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xb3cf9302
-rand = 0xf0acf3e4
-rand = 0xca0ac74c
-rand = 0x4eddfc2c
-rand = 0x1919db69
-x_assigned = 0xc0391efd
-Last rand = 0x2d118c9b
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability.py b/test_regress/t/t_x_rand_mt_stability.py
deleted file mode 100755
index 459473d4d..000000000
--- a/test_regress/t/t_x_rand_mt_stability.py
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-import glob
-
-test.scenarios("vltmt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
-
-other_logs = [x for x in glob.glob("t/t_x_rand_mt_stability_*.out") if "_zero" not in x]
-for other_log in other_logs:
-    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_mt_stability_add.out b/test_regress/t/t_x_rand_mt_stability_add.out
deleted file mode 100644
index a752e5efb..000000000
--- a/test_regress/t/t_x_rand_mt_stability_add.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xb3cf9302
-rand = 0xf0acf3e4
-rand = 0xca0ac74c
-rand = 0x4eddfc2c
-rand = 0x1919db69
-x_assigned = 0xc0391efd
-Last rand = 0x2d118c9b
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add.py b/test_regress/t/t_x_rand_mt_stability_add.py
deleted file mode 100755
index 0dc0f0af8..000000000
--- a/test_regress/t/t_x_rand_mt_stability_add.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vltmt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.out b/test_regress/t/t_x_rand_mt_stability_add_trace.out
deleted file mode 100644
index a752e5efb..000000000
--- a/test_regress/t/t_x_rand_mt_stability_add_trace.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xb3cf9302
-rand = 0xf0acf3e4
-rand = 0xca0ac74c
-rand = 0x4eddfc2c
-rand = 0x1919db69
-x_assigned = 0xc0391efd
-Last rand = 0x2d118c9b
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.py b/test_regress/t/t_x_rand_mt_stability_add_trace.py
deleted file mode 100755
index 0e6d3dc4f..000000000
--- a/test_regress/t/t_x_rand_mt_stability_add_trace.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vltmt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.out b/test_regress/t/t_x_rand_mt_stability_trace.out
deleted file mode 100644
index a752e5efb..000000000
--- a/test_regress/t/t_x_rand_mt_stability_trace.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xb3cf9302
-rand = 0xf0acf3e4
-rand = 0xca0ac74c
-rand = 0x4eddfc2c
-rand = 0x1919db69
-x_assigned = 0xc0391efd
-Last rand = 0x2d118c9b
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.py b/test_regress/t/t_x_rand_mt_stability_trace.py
deleted file mode 100755
index b7248be24..000000000
--- a/test_regress/t/t_x_rand_mt_stability_trace.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vltmt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "--trace"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.out b/test_regress/t/t_x_rand_mt_stability_zeros.out
deleted file mode 100644
index 1426e7828..000000000
--- a/test_regress/t/t_x_rand_mt_stability_zeros.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0x00000000
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0x00000000
-big = 0x0000000000000000000000000000000000000000000000000000000000000000
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x0
-top.t.the_sub_yes_inline_2 no_init 0x0
-top.t.the_sub_no_inline_1 no_init 0x0
-top.t.the_sub_no_inline_2 no_init 0x0
-rand = 0xb3cf9302
-rand = 0xf0acf3e4
-rand = 0xca0ac74c
-rand = 0x4eddfc2c
-rand = 0x1919db69
-x_assigned = 0x00000000
-Last rand = 0x2d118c9b
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.py b/test_regress/t/t_x_rand_mt_stability_zeros.py
deleted file mode 100755
index a82b8586d..000000000
--- a/test_regress/t/t_x_rand_mt_stability_zeros.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vltmt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_stability.out b/test_regress/t/t_x_rand_stability.out
deleted file mode 100644
index 562cb9864..000000000
--- a/test_regress/t/t_x_rand_stability.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xe3e54aaa
-rand = 0xe85acf2d
-rand = 0x15e12c6a
-rand = 0x0f7f28c0
-rand = 0xe189c52a
-x_assigned = 0xc0391efd
-Last rand = 0xf0700dbf
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability.py b/test_regress/t/t_x_rand_stability.py
deleted file mode 100755
index a08c45ed6..000000000
--- a/test_regress/t/t_x_rand_stability.py
+++ /dev/null
@@ -1,23 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-import glob
-
-test.scenarios("vlt")
-
-test.compile(verilator_flags2=["--x-initial unique"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
-
-other_logs = [x for x in glob.glob("t/t_x_rand_stability_*.out") if "_zero" not in x]
-for other_log in other_logs:
-    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_stability.v b/test_regress/t/t_x_rand_stability.v
deleted file mode 100644
index 439e31d7b..000000000
--- a/test_regress/t/t_x_rand_stability.v
+++ /dev/null
@@ -1,74 +0,0 @@
-// DESCRIPTION: Verilator: Confirm x randomization stability
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2025 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-
-module t (/*AUTOARG*/
-    // Inputs
-    clk
-    );
-
-    input clk;
-    int cyc = 0;
-
-    logic [31:0] uninitialized;
-    logic [31:0] x_assigned = '0;
-`ifdef ADD_SIGNAL
-    logic [31:0] added;
-    logic [31:0] x_assigned_added = '0;
-`endif
-    logic [31:0] unused;
-    logic [31:0] uninitialized2;
-    logic [255:0] big;
-    int random_init = $random();
-
-    sub_no_inline the_sub_no_inline_1();
-    sub_no_inline the_sub_no_inline_2();
-    sub_yes_inline the_sub_yes_inline_1();
-    sub_yes_inline the_sub_yes_inline_2();
-
-    initial begin
-        $display("uninitialized = 0x%x", uninitialized);
-        $display("x_assigned (initial) = 0x%x", x_assigned);
-        $display("uninitialized2 = 0x%x", uninitialized2);
-        $display("big = 0x%x", big);
-        $display("random_init = 0x%x", random_init);
-    end
-
-    always @(posedge clk) begin
-        x_assigned <= 'x;
-`ifdef ADD_SIGNAL
-        x_assigned_added <= 'x;
-`endif
-        cyc <= cyc + 1;
-        $display("rand = 0x%x", $random());
-        if (cyc == 4) begin
-            $display("x_assigned = 0x%x", x_assigned);
-`ifndef NOT_RAND
-            if (uninitialized == uninitialized2) $stop();
-            if (the_sub_yes_inline_1.no_init == the_sub_yes_inline_2.no_init) $stop();
-            if (the_sub_no_inline_1.no_init == the_sub_no_inline_2.no_init) $stop();
-`endif
-`ifdef ADD_SIGNAL
-            if (added == 0) $stop();
-            if (x_assigned_added == 0) $stop();
-`endif
-            $display("Last rand = 0x%x", $random());
-            $write("*-* All Finished *-*\n");
-            $finish;
-        end
-    end
-
-endmodule
-
-module sub_no_inline; /* verilator no_inline_module */
-    logic [63:0] no_init;
-    initial $display("%m no_init 0x%0x", no_init);
-endmodule
-
-module sub_yes_inline; /* verilator inline_module */
-    logic [63:0] no_init;
-    initial $display("%m no_init 0x%0x", no_init);
-endmodule
diff --git a/test_regress/t/t_x_rand_stability_add.out b/test_regress/t/t_x_rand_stability_add.out
deleted file mode 100644
index 562cb9864..000000000
--- a/test_regress/t/t_x_rand_stability_add.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xe3e54aaa
-rand = 0xe85acf2d
-rand = 0x15e12c6a
-rand = 0x0f7f28c0
-rand = 0xe189c52a
-x_assigned = 0xc0391efd
-Last rand = 0xf0700dbf
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add.py b/test_regress/t/t_x_rand_stability_add.py
deleted file mode 100755
index c2766d031..000000000
--- a/test_regress/t/t_x_rand_stability_add.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_stability_add_trace.out b/test_regress/t/t_x_rand_stability_add_trace.out
deleted file mode 100644
index 562cb9864..000000000
--- a/test_regress/t/t_x_rand_stability_add_trace.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xe3e54aaa
-rand = 0xe85acf2d
-rand = 0x15e12c6a
-rand = 0x0f7f28c0
-rand = 0xe189c52a
-x_assigned = 0xc0391efd
-Last rand = 0xf0700dbf
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add_trace.py b/test_regress/t/t_x_rand_stability_add_trace.py
deleted file mode 100755
index ea6207b6e..000000000
--- a/test_regress/t/t_x_rand_stability_add_trace.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_stability_trace.out b/test_regress/t/t_x_rand_stability_trace.out
deleted file mode 100644
index 562cb9864..000000000
--- a/test_regress/t/t_x_rand_stability_trace.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0xf5bbcbc0
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0xa979eb54
-big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
-top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
-top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
-top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
-rand = 0xe3e54aaa
-rand = 0xe85acf2d
-rand = 0x15e12c6a
-rand = 0x0f7f28c0
-rand = 0xe189c52a
-x_assigned = 0xc0391efd
-Last rand = 0xf0700dbf
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_trace.py b/test_regress/t/t_x_rand_stability_trace.py
deleted file mode 100755
index 05c2f308d..000000000
--- a/test_regress/t/t_x_rand_stability_trace.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "--trace"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_stability_zeros.out b/test_regress/t/t_x_rand_stability_zeros.out
deleted file mode 100644
index d54e3ecd4..000000000
--- a/test_regress/t/t_x_rand_stability_zeros.out
+++ /dev/null
@@ -1,17 +0,0 @@
-uninitialized = 0x00000000
-x_assigned (initial) = 0x00000000
-uninitialized2 = 0x00000000
-big = 0x0000000000000000000000000000000000000000000000000000000000000000
-random_init = 0x952aaa76
-top.t.the_sub_yes_inline_1 no_init 0x0
-top.t.the_sub_yes_inline_2 no_init 0x0
-top.t.the_sub_no_inline_1 no_init 0x0
-top.t.the_sub_no_inline_2 no_init 0x0
-rand = 0xe3e54aaa
-rand = 0xe85acf2d
-rand = 0x15e12c6a
-rand = 0x0f7f28c0
-rand = 0xe189c52a
-x_assigned = 0x00000000
-Last rand = 0xf0700dbf
-*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_zeros.py b/test_regress/t/t_x_rand_stability_zeros.py
deleted file mode 100755
index c872e4dd0..000000000
--- a/test_regress/t/t_x_rand_stability_zeros.py
+++ /dev/null
@@ -1,19 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt")
-test.top_filename = "t/t_x_rand_stability.v"
-
-test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
-
-test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
-
-test.passes()

From 3b632739a86539f6e29ee47e130f623832bf1dd7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 20:40:03 -0400
Subject: [PATCH 079/211] Internals: Add RequireDType and check for recursive
 data types, in prep for future parser.

---
 src/V3AstNodeDType.h                     | 31 ++++++++++++++++++++++++
 src/V3AstNodes.cpp                       | 13 ++++++----
 src/V3EmitV.cpp                          |  1 +
 src/V3LinkDot.cpp                        | 13 ++++++++--
 src/V3LinkParse.cpp                      |  7 +++---
 src/V3Width.cpp                          | 12 +++++++++
 test_regress/t/t_dist_warn_coverage.py   |  2 ++
 test_regress/t/t_type_param_circ_bad.out |  5 ++--
 8 files changed, 72 insertions(+), 12 deletions(-)

diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 376b30011..b27494736 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -123,6 +123,7 @@ public:
     bool similarDType(const AstNodeDType* samep) const;
     // Iff has a non-null subDTypep(), as generic node function
     virtual AstNodeDType* subDTypep() const VL_MT_STABLE { return nullptr; }
+    virtual AstNodeDType* subDType2p() const VL_MT_STABLE { return nullptr; }
     virtual bool isFourstate() const;
     // Ideally an IEEE $typename
     virtual string prettyDTypeName(bool) const { return prettyTypeName(); }
@@ -362,6 +363,9 @@ public:
     AstNodeDType* subDTypep() const override VL_MT_STABLE {
         return m_refDTypep ? m_refDTypep : childDTypep();
     }
+    AstNodeDType* subDType2p() const override VL_MT_STABLE {
+        return m_keyDTypep ? m_keyDTypep : keyChildDTypep();
+    }
     void refDTypep(AstNodeDType* nodep) { m_refDTypep = nodep; }
     AstNodeDType* virtRefDTypep() const override { return m_refDTypep; }
     void virtRefDTypep(AstNodeDType* nodep) override { refDTypep(nodep); }
@@ -1174,6 +1178,33 @@ public:
         return false;
     }
 };
+class AstRequireDType final : public AstNodeDType {
+    // @astgen op1 := lhsp : Optional[AstNode<AstNodeExpr|AstNodeDType>]
+    //
+    // Require a generic node type (typically AstParseRef become a type.
+public:
+    AstRequireDType(FileLine* fl, AstNode* lhsp)
+        : ASTGEN_SUPER_RequireDType(fl) {
+        this->lhsp(lhsp);
+    }
+    ASTGEN_MEMBERS_AstRequireDType;
+    // METHODS
+    bool similarDTypeNode(const AstNodeDType* samep) const override {
+        const AstRequireDType* const asamep = VN_DBG_AS(samep, RequireDType);
+        return subDTypep()->similarDType(asamep->subDTypep());
+    }
+    AstBasicDType* basicp() const override VL_MT_STABLE { return nullptr; }
+    AstNodeDType* subDTypep() const override VL_MT_STABLE {
+        // Used for recursive definition checking
+        if (AstNodeDType* const dtp = VN_CAST(lhsp(), NodeDType))
+            return dtp;
+        else
+            return nullptr;
+    }
+    int widthAlignBytes() const override { V3ERROR_NA_RETURN(1); }
+    int widthTotalBytes() const override { V3ERROR_NA_RETURN(1); }
+    bool isCompound() const override { V3ERROR_NA_RETURN(false); }
+};
 class AstSampleQueueDType final : public AstNodeDType {
     // @astgen op1 := childDTypep : Optional[AstNodeDType] // moved to refDTypep() in V3Width
     //
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 0353a1317..d046745a4 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -830,12 +830,13 @@ AstVar* AstVar::scVarRecurse(AstNode* nodep) {
 
 const AstNodeDType* AstNodeDType::skipRefIterp(bool skipConst, bool skipEnum,
                                                bool assertOn) const VL_MT_STABLE {
+    static constexpr int MAX_TYPEDEF_DEPTH = 1000;
     const AstNodeDType* nodep = this;
-    while (true) {
-        if (VL_UNLIKELY(VN_IS(nodep, MemberDType) || VN_IS(nodep, ParamTypeDType)
-                        || VN_IS(nodep, RefDType)  //
-                        || (VN_IS(nodep, ConstDType) && skipConst)  //
-                        || (VN_IS(nodep, EnumDType) && skipEnum))) {
+    for (int depth = 0; depth < MAX_TYPEDEF_DEPTH; ++depth) {
+        if (VN_IS(nodep, MemberDType) || VN_IS(nodep, ParamTypeDType) || VN_IS(nodep, RefDType)  //
+            || VN_IS(nodep, RequireDType)  //
+            || (VN_IS(nodep, ConstDType) && skipConst)  //
+            || (VN_IS(nodep, EnumDType) && skipEnum)) {
             if (const AstNodeDType* subp = nodep->subDTypep()) {
                 nodep = subp;
                 continue;
@@ -846,6 +847,8 @@ const AstNodeDType* AstNodeDType::skipRefIterp(bool skipConst, bool skipEnum,
         }
         return nodep;
     }
+    nodep->v3error("Recursive type definition, or over " << MAX_TYPEDEF_DEPTH << " types deep");
+    return nullptr;
 }
 
 bool AstNodeDType::similarDType(const AstNodeDType* samep) const {
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index f854796a6..5eef0746e 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -779,6 +779,7 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst {
             puts("\n???? // "s + nodep->prettyTypeName() + " -> UNLINKED\n");
         }
     }
+    void visit(AstRequireDType* nodep) override { iterateConst(nodep->lhsp()); }
     void visit(AstModport* nodep) override {
         puts(nodep->verilogKwd());
         puts(" ");
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index b221d8a09..b5090ce22 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -4218,8 +4218,17 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     // Get the value of type parameter passed to the class instance,
                     // to print the helpful error message.
                     const AstNodeDType* typep = refp->refDTypep();
-                    if (const AstParamTypeDType* const paramp = VN_CAST(typep, ParamTypeDType)) {
-                        typep = paramp->subDTypep();
+                    while (true) {
+                        if (const AstParamTypeDType* const atypep
+                            = VN_CAST(typep, ParamTypeDType)) {
+                            typep = atypep->subDTypep();
+                            continue;
+                        }
+                        if (const AstRequireDType* const atypep = VN_CAST(typep, RequireDType)) {
+                            typep = atypep->subDTypep();
+                            continue;
+                        }
+                        break;
                     }
                     typep->v3error("Attempting to extend using non-class");
                 }
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index c48830a09..1c650b51e 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -324,14 +324,15 @@ class LinkParseVisitor final : public VNVisitor {
         }
         if (VN_IS(nodep->subDTypep(), ParseTypeDType)) {
             // It's a parameter type. Use a different node type for this.
-            AstNodeDType* dtypep = VN_CAST(nodep->valuep(), NodeDType);
+            AstNode* dtypep = nodep->valuep();
             if (dtypep) {
                 dtypep->unlinkFrBack();
             } else {
                 dtypep = new AstVoidDType{nodep->fileline()};
             }
-            AstNode* const newp = new AstParamTypeDType{nodep->fileline(), nodep->varType(),
-                                                        nodep->name(), VFlagChildDType{}, dtypep};
+            AstNode* const newp = new AstParamTypeDType{
+                nodep->fileline(), nodep->varType(), nodep->name(), VFlagChildDType{},
+                new AstRequireDType{nodep->fileline(), dtypep}};
             nodep->replaceWith(newp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
             return;
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 9e307391c..555518daa 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2026,6 +2026,18 @@ class WidthVisitor final : public VNVisitor {
         userIterateChildren(nodep, nullptr);
         nodep->widthFromSub(nodep->subDTypep());
     }
+    void visit(AstRequireDType* nodep) override {
+        userIterateAndNext(nodep->lhsp(), WidthVP{SELF, BOTH}.p());
+        if (AstNodeDType* const dtp = VN_CAST(nodep->lhsp(), NodeDType)) {
+            nodep->replaceWith(dtp->unlinkFrBack());
+        } else {
+            if (nodep->lhsp())
+                nodep->lhsp()->v3error("Expected data type, not a "
+                                       << nodep->lhsp()->prettyTypeName());
+            nodep->replaceWith(new AstVoidDType{nodep->fileline()});
+        }
+        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+    }
     void visit(AstCastDynamic* nodep) override {
         nodep->dtypeChgWidthSigned(32, 1, VSigning::SIGNED);  // Spec says integer return
         userIterateChildren(nodep, WidthVP{SELF, BOTH}.p());
diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index 1e2875dde..fdea18d15 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -45,6 +45,7 @@ for s in [
         'Can\'t read annotation file: ',
         'Can\'t resolve module reference: \'',
         'Can\'t write file: ',
+        'Expected data type, not a ',
         'Extern declaration\'s scope is not a defined class',
         'File not found: ',
         'Format to $display-like function must have constant format string',
@@ -60,6 +61,7 @@ for s in [
         'Parameter type pin value isn\'t a type: Param ',
         'Parameter type variable isn\'t a type: Param ',
         'Pattern replication value of 0 is not legal.',
+        'Reference to \'',
         'Signals inside functions/tasks cannot be marked forceable',
         'Slice size cannot be zero.',
         'Slices of arrays in assignments have different unpacked dimensions, ',
diff --git a/test_regress/t/t_type_param_circ_bad.out b/test_regress/t/t_type_param_circ_bad.out
index 311792300..fdc98f7cd 100644
--- a/test_regress/t/t_type_param_circ_bad.out
+++ b/test_regress/t/t_type_param_circ_bad.out
@@ -1,5 +1,6 @@
-%Error: t/t_type_param_circ_bad.v:14:27: Reference to 'SZ' type would form a recursive definition
+%Error: t/t_type_param_circ_bad.v:14:22: Recursive type definition, or over 1000 types deep
+                                       : ... note: In instance 't'
    14 |    # (parameter type SZ = SZ)
-      |                           ^~
+      |                      ^~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to

From 19be36dbcb017d13db51fbabcf09d08e9406629e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 21:09:05 -0400
Subject: [PATCH 080/211] Tests: Cleanup some type tests

---
 ...s_scope_import.out => t_class_scope_import_bad.out} |  2 +-
 ...ass_scope_import.py => t_class_scope_import_bad.py} |  0
 ...class_scope_import.v => t_class_scope_import_bad.v} |  0
 test_regress/t/t_lint_implicit_type_bad.out            |  6 +++---
 test_regress/t/t_lint_implicit_type_bad.py             |  3 ++-
 test_regress/t/t_lint_implicit_type_bad.v              | 10 ++++++++--
 6 files changed, 14 insertions(+), 7 deletions(-)
 rename test_regress/t/{t_class_scope_import.out => t_class_scope_import_bad.out} (63%)
 rename test_regress/t/{t_class_scope_import.py => t_class_scope_import_bad.py} (100%)
 rename test_regress/t/{t_class_scope_import.v => t_class_scope_import_bad.v} (100%)

diff --git a/test_regress/t/t_class_scope_import.out b/test_regress/t/t_class_scope_import_bad.out
similarity index 63%
rename from test_regress/t/t_class_scope_import.out
rename to test_regress/t/t_class_scope_import_bad.out
index 0429ee0bc..d9fe115e4 100644
--- a/test_regress/t/t_class_scope_import.out
+++ b/test_regress/t/t_class_scope_import_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_class_scope_import.v:11:14: Import statement directly within a class scope is illegal
+%Error: t/t_class_scope_import_bad.v:11:14: Import statement directly within a class scope is illegal
    11 |    import pkg::*;
       |              ^~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_class_scope_import.py b/test_regress/t/t_class_scope_import_bad.py
similarity index 100%
rename from test_regress/t/t_class_scope_import.py
rename to test_regress/t/t_class_scope_import_bad.py
diff --git a/test_regress/t/t_class_scope_import.v b/test_regress/t/t_class_scope_import_bad.v
similarity index 100%
rename from test_regress/t/t_class_scope_import.v
rename to test_regress/t/t_class_scope_import_bad.v
diff --git a/test_regress/t/t_lint_implicit_type_bad.out b/test_regress/t/t_lint_implicit_type_bad.out
index 64d7659f0..80984654a 100644
--- a/test_regress/t/t_lint_implicit_type_bad.out
+++ b/test_regress/t/t_lint_implicit_type_bad.out
@@ -1,5 +1,5 @@
-%Error: t/t_lint_implicit_type_bad.v:11:11: syntax error, unexpected IDENTIFIER-for-type
-   11 |    assign imp_type_conflict = 1'b1;
-      |           ^~~~~~~~~~~~~~~~~
+%Error: t/t_lint_implicit_type_bad.v:15:11: syntax error, unexpected IDENTIFIER-for-type
+   15 |    assign imp_typedef_conflict = 1'b1;
+      |           ^~~~~~~~~~~~~~~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_implicit_type_bad.py b/test_regress/t/t_lint_implicit_type_bad.py
index c0608225e..e15e088e1 100755
--- a/test_regress/t/t_lint_implicit_type_bad.py
+++ b/test_regress/t/t_lint_implicit_type_bad.py
@@ -11,7 +11,8 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(verilator_flags2=["--lint-only -Wall -Wno-DECLFILENAME"],
+# --debug-check adds extra internal message, otherwise golden log would vary
+test.lint(verilator_flags2=["--lint-only --debug-check -Wall -Wno-DECLFILENAME"],
           fails=True,
           expect_filename=test.golden_filename)
 
diff --git a/test_regress/t/t_lint_implicit_type_bad.v b/test_regress/t/t_lint_implicit_type_bad.v
index 24a373808..3262dd6d4 100644
--- a/test_regress/t/t_lint_implicit_type_bad.v
+++ b/test_regress/t/t_lint_implicit_type_bad.v
@@ -4,9 +4,15 @@
 // any use, without warranty, 2024 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+class imp_Cls_conflict;
+endclass
+
 module t;
-   typedef int imp_type_conflict;
+   typedef int imp_typedef_conflict;
+   localparam type imp_PARAM_conflict;
 
 `default_nettype wire
-   assign imp_type_conflict = 1'b1;
+   assign imp_typedef_conflict = 1'b1;
+   assign imp_Cls_conflict = 1'b1;
+   assign imp_PARAM_conflict = 1'b1;
 endmodule

From 2c465d97414a06497995b95e8b31ceb32556760d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 22:56:59 -0400
Subject: [PATCH 081/211] Internals: Fix MSVC warning.

---
 src/verilog.y | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/verilog.y b/src/verilog.y
index 08025f727..6af7811b6 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -325,7 +325,7 @@ int V3ParseGrammar::s_typeImpNum = 0;
 #define VARIO(type) \
     { GRAMMARP->m_varIO = VDirection::type; }
 // Set direction to default-input when detect inside an ANSI port list
-#define VARIOANSI(type) \
+#define VARIOANSI() \
     { \
         if (GRAMMARP->m_varIO == VDirection::NONE) VARIO(INPUT); \
     }

From 6bb16d6c52f88fa3d93d26d77fade2bedfc07d07 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 22:21:14 -0400
Subject: [PATCH 082/211] Disable symbol from parser: Support redeclaring type
 as non-type; major parsing change (#2412).

---
 docs/gen/ex_PKGNODECL_faulty.rst              | 11 ----
 docs/gen/ex_PKGNODECL_msg.rst                 |  4 --
 docs/guide/warnings.rst                       | 22 ++-----
 src/V3Ast.h                                   |  5 ++
 src/V3AstNodeExpr.h                           |  8 +--
 src/V3LinkDot.cpp                             | 56 ++++++++++++++---
 src/V3ParseGrammar.cpp                        |  1 -
 src/V3ParseImp.cpp                            | 61 +++++++++++--------
 src/V3ParseImp.h                              |  1 +
 src/astgen                                    | 27 +++++++-
 src/verilog.y                                 | 45 +++++++-------
 test_regress/t/t_covergroup_unsup.out         |  9 +--
 test_regress/t/t_dist_warn_coverage.py        |  3 +
 test_regress/t/t_inst_paren_bad.out           |  9 ++-
 test_regress/t/t_interface_missing_bad.out    |  8 +--
 .../t/t_interface_paren_missing_bad.out       |  4 +-
 test_regress/t/t_interface_top_bad.out        |  1 +
 test_regress/t/t_interface_typedef.out        |  4 --
 test_regress/t/t_interface_typo_bad.out       |  1 +
 test_regress/t/t_lint_implicit_type_bad.out   |  8 ++-
 test_regress/t/t_lint_implicit_type_bad.py    |  2 +-
 test_regress/t/t_lint_import_name2_bad.out    |  4 --
 test_regress/t/t_lint_pkg_colon_bad.out       | 10 +--
 test_regress/t/t_lint_pkgnodecl_bad.out       |  5 --
 test_regress/t/t_lint_pkgnodecl_bad.py        | 29 ---------
 test_regress/t/t_lint_pkgnodecl_bad.v         | 12 ----
 test_regress/t/t_no_std_bad.out               |  4 --
 test_regress/t/t_package_alone_bad.out        |  6 +-
 test_regress/t/t_parse_sync_bad2.out          | 26 ++++++--
 test_regress/t/t_pp_circ_subst_bad.out        |  2 +-
 test_regress/t/t_pp_circ_subst_bad2.out       |  2 +-
 test_regress/t/t_preproc_inc_bad.out          |  2 +-
 test_regress/t/t_type_non_type.py             | 18 ++++++
 test_regress/t/t_type_non_type.v              | 49 +++++++++++++++
 test_regress/t/t_vams_kwd_bad.out             |  2 +-
 35 files changed, 263 insertions(+), 198 deletions(-)
 delete mode 100644 docs/gen/ex_PKGNODECL_faulty.rst
 delete mode 100644 docs/gen/ex_PKGNODECL_msg.rst
 delete mode 100644 test_regress/t/t_lint_pkgnodecl_bad.out
 delete mode 100755 test_regress/t/t_lint_pkgnodecl_bad.py
 delete mode 100644 test_regress/t/t_lint_pkgnodecl_bad.v
 create mode 100755 test_regress/t/t_type_non_type.py
 create mode 100644 test_regress/t/t_type_non_type.v

diff --git a/docs/gen/ex_PKGNODECL_faulty.rst b/docs/gen/ex_PKGNODECL_faulty.rst
deleted file mode 100644
index 1f0b81529..000000000
--- a/docs/gen/ex_PKGNODECL_faulty.rst
+++ /dev/null
@@ -1,11 +0,0 @@
-.. comment: generated by t_lint_pkgnodecl_bad
-.. code-block:: sv
-   :linenos:
-   :emphasize-lines: 2
-
-   module t;
-      initial Pkg::hello();  //<--- Warning
-   endmodule
-   package Pkg;
-      function void hello(); endfunction
-   endpackage
diff --git a/docs/gen/ex_PKGNODECL_msg.rst b/docs/gen/ex_PKGNODECL_msg.rst
deleted file mode 100644
index 7c772b7c4..000000000
--- a/docs/gen/ex_PKGNODECL_msg.rst
+++ /dev/null
@@ -1,4 +0,0 @@
-.. comment: generated by t_lint_pkgnodecl_bad
-.. code-block::
-
-   %Error-PKGNODECL: example.v:1:12 Package/class 'Pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 9678be1a9..67aa1f92c 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1401,23 +1401,11 @@ List Of Warnings
 
 .. option:: PKGNODECL
 
-   An error that a package/class appears to have been referenced that has
-   not yet been declared.  According to IEEE 1800-2023 26.3, all packages
-   must be declared before being used.
-
-   Faulty example:
-
-   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
-
-   Results in:
-
-   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
-
-   Often the package is declared in its own header file.  In this case add
-   an include of that package header file to the referencing file.  (And
-   make sure you have header guards in the package's header file to prevent
-   multiple declarations of the package.)
-
+   Never issued since version 5.038.  Historically an error that a
+   package/class appears to have been referenced that has not yet been
+   declared.  According to IEEE 1800-2023 26.3, all packages must be
+   declared before being used. However, several standard libraries
+   including UVM violate this, and other tools do not warn.
 
 .. option:: PORTSHORT
 
diff --git a/src/V3Ast.h b/src/V3Ast.h
index fee64ac13..2a4f84617 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -2128,6 +2128,9 @@ protected:
 
     // Use instead isSame(), this is for each Ast* class, and assumes node is of same type
     virtual bool sameNode(const AstNode*) const { return true; }
+    // Generated by 'astgen'. If do an oldp->replaceNode(newp), would cause a broken()
+    virtual bool wouldBreakGen(const AstNode* const oldp,
+                               const AstNode* const newp) const = 0;  // Generated by 'astgen'
 
 public:
     // ACCESSORS
@@ -2527,6 +2530,8 @@ public:
     virtual const char* broken() const { return nullptr; }
     // Generated by 'astgen'. Calls 'broken()', which can be used to add extra checks
     virtual const char* brokenGen() const = 0;  // Generated by 'astgen'
+    // If do a this->replaceNode(newp), would cause a broken()
+    bool wouldBreak(const AstNode* const newp) const { return backp()->wouldBreakGen(this, newp); }
 
     // INVOKERS
     virtual void accept(VNVisitorConst& v) = 0;
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 8366f6f8d..ce027827f 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -742,10 +742,10 @@ public:
 class AstCellRef final : public AstNodeExpr {
     // As-of-yet unlinkable reference into a cell
     // @astgen op1 := cellp : AstNode
-    // @astgen op2 := exprp : AstNodeExpr
+    // @astgen op2 := exprp : AstNode<AstNodeExpr|AstNodeDType>
     string m_name;  // Cell name
 public:
-    AstCellRef(FileLine* fl, const string& name, AstNode* cellp, AstNodeExpr* exprp)
+    AstCellRef(FileLine* fl, const string& name, AstNode* cellp, AstNode* exprp)
         : ASTGEN_SUPER_CellRef(fl)
         , m_name{name} {
         this->cellp(cellp);
@@ -1206,8 +1206,8 @@ public:
 class AstDot final : public AstNodeExpr {
     // A dot separating paths in an AstVarXRef, AstFuncRef or AstTaskRef
     // These are eliminated in the link stage
-    // @astgen op1 := lhsp : AstNodeExpr
-    // @astgen op2 := rhsp : AstNodeExpr
+    // @astgen op1 := lhsp : AstNode<AstNodeExpr|AstNodeDType>
+    // @astgen op2 := rhsp : AstNode<AstNodeExpr|AstNodeDType>
     //
     // We don't have a list of elements as it's probably legal to do '(foo.bar).(baz.bap)'
     const bool m_colon;  // Is a "::" instead of a "." (lhs must be package/class)
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index b5090ce22..45885310b 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -529,7 +529,10 @@ public:
                                      "Unsupported: Interfaced port on top level module");
                     }
                     ifacerefp->v3error("Parent instance's interface is not found: "
-                                       << AstNode::prettyNameQ(ifacerefp->ifaceName()));
+                                       << AstNode::prettyNameQ(ifacerefp->ifaceName()) << '\n'
+                                       << ifacerefp->warnMore()
+                                       << "... Perhaps intended an interface instantiation but "
+                                          "are missing parenthesis (IEEE 1800-2023 25.3)?");
                 } else {
                     ifacerefp->v3warn(
                         E_UNSUPPORTED,
@@ -1550,11 +1553,11 @@ class LinkDotFindVisitor final : public VNVisitor {
                     if (tdefp && tdefp->name() == nodep->name() && m_statep->forPrimary()) {
                         UINFO(8, "Replacing type of" << nodep << endl
                                                      << " with " << tdefp << endl);
-                        AstNodeDType* const newType = tdefp->childDTypep();
-                        AstNodeDType* const oldType = nodep->childDTypep();
+                        AstNodeDType* const newDtp = tdefp->childDTypep();
+                        AstNodeDType* const oldDtp = nodep->childDTypep();
 
-                        oldType->replaceWith(newType->cloneTree(false));
-                        oldType->deleteTree();
+                        oldDtp->replaceWith(newDtp->cloneTree(false));
+                        oldDtp->deleteTree();
                     }
                 }
             }
@@ -2477,7 +2480,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void checkNoDot(AstNode* nodep) {
         if (VL_UNLIKELY(m_ds.m_dotPos != DP_NONE)) {
-            // UINFO(9, indent() << "ds=" << m_ds.ascii() << endl);
+            UINFO(9, indent() << "ds=" << m_ds.ascii() << endl);
             nodep->v3error("Syntax error: Not expecting "
                            << nodep->type() << " under a " << nodep->backp()->type()
                            << " in dotted expression\n"
@@ -2608,6 +2611,15 @@ class LinkDotResolveVisitor final : public VNVisitor {
         symIterateNull(nodep, m_statep->getNodeSym(nodep));
     }
 
+    void replaceWithCheckBreak(AstNode* oldp, AstNodeDType* newp) {
+        // Flag now to avoid V3Broken throwing an internal error
+        if (oldp->wouldBreak(newp)) {
+            newp->v3error(
+                "Data type used where a non-data type is expected: " << newp->prettyNameQ());
+        }
+        oldp->replaceWith(newp);
+    }
+
     // Marks the current module to be revisited after the initial AST iteration
     void revisitLater(AstNode* deferredNodep) {
         // Need to revisit entire module to build up all the necessary context
@@ -2951,7 +2963,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     nodep->replaceWith(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 } else {  // Dot midpoint
-                    AstNodeExpr* newp = nodep->rhsp()->unlinkFrBack();
+                    AstNode* newp = nodep->rhsp()->unlinkFrBack();
                     if (m_ds.m_unresolvedCell) {
                         AstCellRef* const crp = new AstCellRef{
                             nodep->fileline(), nodep->name(), nodep->lhsp()->unlinkFrBack(), newp};
@@ -3059,7 +3071,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             return;
         } else if (m_ds.m_dotPos == DP_MEMBER) {
             // Found a Var, everything following is membership.  {scope}.{var}.HERE {member}
-            AstNodeExpr* const varEtcp = m_ds.m_dotp->lhsp()->unlinkFrBack();
+            AstNodeExpr* const varEtcp = VN_AS(m_ds.m_dotp->lhsp()->unlinkFrBack(), NodeExpr);
             AstNodeExpr* const newp
                 = new AstMemberSel{nodep->fileline(), varEtcp, VFlagChildDType{}, nodep->name()};
             if (m_ds.m_dotErr) {
@@ -3348,6 +3360,14 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 ok = true;
                 m_ds.m_dotPos = DP_MEMBER;
                 m_ds.m_dotText = "";
+            } else if (AstClass* const defp = VN_CAST(foundp->nodep(), Class)) {
+                if (allowVar) {
+                    AstRefDType* const newp = new AstRefDType{nodep->fileline(), nodep->name()};
+                    replaceWithCheckBreak(nodep, newp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    ok = true;
+                    m_ds.m_dotText = "";
+                }
             } else if (AstEnumItem* const valuep = VN_CAST(foundp->nodep(), EnumItem)) {
                 if (allowVar) {
                     AstNode* const newp
@@ -3386,6 +3406,22 @@ class LinkDotResolveVisitor final : public VNVisitor {
                         VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     }
                 }
+            } else if (AstTypedef* const defp = VN_CAST(foundp->nodep(), Typedef)) {
+                ok = m_ds.m_dotPos == DP_NONE || m_ds.m_dotPos == DP_SCOPE;
+                if (ok) {
+                    AstRefDType* const refp = new AstRefDType{nodep->fileline(), nodep->name()};
+                    refp->typedefp(defp);
+                    replaceWithCheckBreak(nodep, refp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                }
+            } else if (AstParamTypeDType* const defp = VN_CAST(foundp->nodep(), ParamTypeDType)) {
+                ok = (m_ds.m_dotPos == DP_NONE || m_ds.m_dotPos == DP_SCOPE);
+                if (ok) {
+                    AstRefDType* const refp = new AstRefDType{nodep->fileline(), nodep->name()};
+                    refp->refDTypep(defp);
+                    replaceWithCheckBreak(nodep, refp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                }
             }
             if (!ok) {
                 if (m_insideClassExtParam) {
@@ -3795,7 +3831,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         } else if (m_ds.m_dotp && m_ds.m_dotPos == DP_MEMBER) {
             // Found a Var, everything following is method call.
             // {scope}.{var}.HERE {method} ( ARGS )
-            AstNodeExpr* const varEtcp = m_ds.m_dotp->lhsp()->unlinkFrBack();
+            AstNodeExpr* const varEtcp = VN_AS(m_ds.m_dotp->lhsp()->unlinkFrBack(), NodeExpr);
             AstNodeExpr* argsp = nullptr;
             if (nodep->pinsp()) argsp = nodep->pinsp()->unlinkFrBackWithNext();
             AstNode* const newp = new AstMethodCall{nodep->fileline(), varEtcp, VFlagChildDType{},
@@ -4373,7 +4409,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             }
             VL_DO_DANGLING(cpackagep->unlinkFrBack()->deleteTree(), cpackagep);
         }
-        if (m_ds.m_dotp && m_ds.m_dotPos == DP_PACKAGE) {
+        if (m_ds.m_dotp && (m_ds.m_dotPos == DP_PACKAGE || m_ds.m_dotPos == DP_SCOPE)) {
             UASSERT_OBJ(VN_IS(m_ds.m_dotp->lhsp(), ClassOrPackageRef), m_ds.m_dotp->lhsp(),
                         "Bad package link");
             auto* const cpackagerefp = VN_AS(m_ds.m_dotp->lhsp(), ClassOrPackageRef);
diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp
index 0d0cbd5c6..bfa59ed7b 100644
--- a/src/V3ParseGrammar.cpp
+++ b/src/V3ParseGrammar.cpp
@@ -196,7 +196,6 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
     if (GRAMMARP->m_varIO == VDirection::NONE  // In non-ANSI port list
         && GRAMMARP->m_varDecl == VVarType::PORT) {
         // Just a port list with variable name (not v2k format); AstPort already created
-        if (dtypep) fileline->v3warn(E_UNSUPPORTED, "Unsupported: Ranges ignored in port-lists");
         if (arrayp) VL_DO_DANGLING(arrayp->deleteTree(), arrayp);
         if (attrsp) {
             // TODO: Merge attributes across list? Or warn attribute is ignored
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index b33972145..244636b6f 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -429,6 +429,35 @@ size_t V3ParseImp::tokenPipeScanIdInst(size_t depthIn) {
     return depth;
 }
 
+size_t V3ParseImp::tokenPipeScanIdType(size_t depthIn) {
+    // Search around IEEE data type identifier
+    // Return location of following token, or input if not found
+    // tokenPipeScanIdCell has precedence over this search
+    //   yaID/*type_identifier*/ [ '#' '('...')' ] [{ '['...']' }] yaID/*identifier*/
+    // assignment_pattern_expression:
+    //   yaID/*type_identifier*/ [ '#' '('...')' ] [{ '['...']' }] yP_TICKBRA
+    // class_type parameter_value_assignment  // often followed by ) as in e.g. ClsA#(ClsB#(...))
+    //   yaID/*type_identifier*/ '#' '('...')'  [^ '::']
+    // and caller must check does NOT match tokenPipeScanIdCell
+    size_t depth = depthIn;
+    // UINFO(9, "tokenPipeScanType START d="
+    //       << depth << " " << V3ParseImp::tokenName(tokenPeekp(depth)->token) << endl);
+    if (tokenPeekp(depth)->token == '#' && tokenPeekp(depth + 1)->token == '(') {
+        depth = tokenPipeScanParam(depth, false);
+        // Not :: as then it's a yaID__CC, we'll parse that in tokenPipeScanId
+        if (tokenPeekp(depth)->token != yP_COLONCOLON) return depth;
+    }
+
+    depth = tokenPipeScanBracket(depth);  // [ '['..']' ]*
+
+    if (tokenPeekp(depth)->token != yaID__LEX && tokenPeekp(depth)->token != yP_TICKBRA)
+        return depthIn;
+    ++depth;
+    // UINFO(9, "tokenPipeScanType MATCH\n");
+
+    return depth;
+}
+
 size_t V3ParseImp::tokenPipeScanBracket(size_t inDepth) {
     // Return location of following token, or input if not found
     // [ '['...']' ]*
@@ -531,6 +560,7 @@ int V3ParseImp::tokenPipelineId(int token) {
     if (m_tokenLastBison.token != '@' && m_tokenLastBison.token != '#'
         && m_tokenLastBison.token != '.') {
         if (const size_t depth = tokenPipeScanIdInst(0)) return yaID__aINST;
+        if (const size_t depth = tokenPipeScanIdType(0)) return yaID__aTYPE;
     }
     if (nexttok == '#') {  // e.g. class_type parameter_value_assignment '::'
         const size_t depth = tokenPipeScanParam(0, false);
@@ -683,6 +713,8 @@ void V3ParseImp::tokenPipelineSym() {
             foundp = V3ParseImp::parsep()->symp()->symCurrentp()->findIdFallback(*(yylval.strp));
         }
         if (!foundp && !m_afterColonColon) {  // Check if the symbol can be found in std
+            // The following keywords from this file are hardcoded for detection in the parser:
+            // "mailbox", "process", "randomize", "semaphore", "std"
             AstPackage* const stdpkgp = v3Global.rootp()->stdPackagep();
             if (stdpkgp) {
                 VSymEnt* const stdsymp = stdpkgp->user4u().toSymEnt();
@@ -694,36 +726,11 @@ void V3ParseImp::tokenPipelineSym() {
             yylval.scp = scp;
             UINFO(7, "   tokenPipelineSym: Found " << scp << endl);
             if (token == yaID__LEX) {  // i.e. not yaID__CC
-                if (VN_IS(scp, Typedef)) {
-                    token = yaID__aTYPE;
-                } else if (VN_IS(scp, TypedefFwd)) {
-                    token = yaID__aTYPE;
-                } else if (VN_IS(scp, Class)) {
-                    token = yaID__aTYPE;
-                } else if (VN_IS(scp, Package)) {
-                    token = yaID__ETC;
-                } else {
-                    token = yaID__ETC;
-                }
+                token = yaID__ETC;
             }
         } else {  // Not found
             yylval.scp = nullptr;
-            if (token == yaID__CC) {
-                if (!m_afterColonColon && !v3Global.opt.bboxUnsup()) {
-                    // IEEE does require this, but we may relax this as UVM breaks it, so allow
-                    // bbox for today
-                    // We'll get a parser error eventually but might not be obvious
-                    // is missing package, and this confuses people
-                    static int warned = false;
-                    if (!warned++) {
-                        yylval.fl->v3warn(PKGNODECL, "Package/class '" + *yylval.strp
-                                                         + "' not found, and needs to be "
-                                                           "predeclared (IEEE 1800-2023 26.3)");
-                    }
-                }
-            } else if (token == yaID__LEX) {
-                token = yaID__ETC;
-            }
+            if (token == yaID__LEX) token = yaID__ETC;
         }
     }
     m_afterColonColon = token == yP_COLONCOLON;
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 22778a657..e2fcf0990 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -316,6 +316,7 @@ private:
     int tokenPipelineId(int token) VL_MT_DISABLED;
     void tokenPipelineSym() VL_MT_DISABLED;
     size_t tokenPipeScanIdInst(size_t depth) VL_MT_DISABLED;
+    size_t tokenPipeScanIdType(size_t depth) VL_MT_DISABLED;
     size_t tokenPipeScanBracket(size_t depth) VL_MT_DISABLED;
     size_t tokenPipeScanParam(size_t depth, bool forInst) VL_MT_DISABLED;
     size_t tokenPipeScanTypeEq(size_t depth) VL_MT_DISABLED;
diff --git a/src/astgen b/src/astgen
index d5cb5edcb..c7f98404f 100755
--- a/src/astgen
+++ b/src/astgen
@@ -968,7 +968,31 @@ def write_ast_impl(filename):
                     emitBlock("));\n")
             # Node's broken rules can be specialized by declaring broken()
             emitBlock("    return Ast{t}::broken();\n", t=node.name)
-            emitBlock("}}\n", t=node.name)
+            emitBlock("}}\n")
+
+            emitBlock(
+                "bool Ast{t}::wouldBreakGen(const AstNode* const oldp, const AstNode* const newp) const {{\n",
+                t=node.name)
+            for i in range(1, 5):
+                op = node.getOp(i)
+                if op is None:
+                    continue
+                name, _, _, legals = op
+                if legals != '':
+                    # 'this' is a parent, where oldp replacing newp as op1p, must follow op1p's rules
+                    # Could also be on a list, we don't check for speed reasons and as V3Broken doesn't
+                    emitBlock("    if (oldp == op{i}p() && !(", i=i)
+                    eor = ""
+                    for legal in legals.split('|'):
+                        emitBlock("{eor}privateTypeTest<Ast{legal}>(newp)",
+                                  eor=eor,
+                                  name=name,
+                                  legal=legal)
+                        eor = " || "
+                    emitBlock(")) return true;\n")
+            # Node's broken rules can be specialized by declaring broken()
+            emitBlock("    return false;\n")
+            emitBlock("}}\n")
 
             emitBlock("void Ast{t}::cloneRelinkGen() {{\n", t=node.name)
             if node.superClass.name != 'Node':
@@ -1042,6 +1066,7 @@ def write_ast_macros(filename):
             Ast{t}* clonep() const {{ return static_cast<Ast{t}*>(AstNode::clonep()); }}
             Ast{t}* addNext(Ast{t}* nodep) {{ return static_cast<Ast{t}*>(AstNode::addNext(this, nodep)); }}
             const char* brokenGen() const override;
+            bool wouldBreakGen(const AstNode* const oldp, const AstNode* const newp) const override;
             void cloneRelinkGen() override;
             void dumpTreeJsonOpGen(std::ostream& str, const string& indent) const override;
             void dumpJsonGen(std::ostream& str) const;
diff --git a/src/verilog.y b/src/verilog.y
index 6af7811b6..91a19e004 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1552,15 +1552,11 @@ port<nodep>:                    // ==IEEE: port
         //                      // IEEE: interface_port_header port_identifier { unpacked_dimension }
         //                      // Expanded interface_port_header
         //                      // We use instantCb here because the non-port form looks just like a module instantiation
-                portDirNetE id/*interface*/ portSig variable_dimensionListE sigAttrListE
-                        { // VAR for now, but V3LinkCells may call setIfcaeRef on it later
-                          $$ = $3; VARDECL(VAR); VARIO(NONE);
-                          // Although know it's an interface, use AstRefDType for forward compatibility
-                          // with future parser.  V3LinkCells will convert to AstIfaceRefDType.
-                          AstNodeDType* const dtp = new AstRefDType{$<fl>2, *$2};
-                          VARDTYPE(dtp);
-                          addNextNull($$, VARDONEP($$, $4, $5)); }
-        |       portDirNetE id/*interface*/ '.' idAny/*modport*/ portSig variable_dimensionListE sigAttrListE
+        //
+        //                      // Looks identical to variable_declaration, so V3LinkDot must resolve when ID known
+        //                      // NO: portDirNetE id/*interface*/ portSig variable_dimensionListE sigAttrListE
+        //
+                portDirNetE id/*interface*/ '.' idAny/*modport*/ portSig variable_dimensionListE sigAttrListE
                         { // VAR for now, but V3LinkCells may call setIfcaeRef on it later
                           $$ = $5; VARDECL(VAR); VARIO(NONE);
                           AstNodeDType* const dtp = new AstIfaceRefDType{$<fl>2, $<fl>4, "", *$2, *$4};
@@ -1615,17 +1611,20 @@ port<nodep>:                    // ==IEEE: port
         //                      // IEEE: portDirNetE data_type '.' portSig -> handled with AstDot in expr.
         //
         |       portDirNetE data_type           portSig variable_dimensionListE sigAttrListE
-                        { $$ = $3; VARDTYPE($2); VARIOANSI(); addNextNull($$, VARDONEP($$, $4, $5)); }
+                        { $$ = $3; VARDTYPE($2); VARIOANSI();
+                          addNextNull($$, VARDONEP($$, $4, $5)); }
         |       portDirNetE data_type           portSig variable_dimensionListE sigAttrListE '=' constExpr
                         { $$ = $3; VARDTYPE($2); VARIOANSI();
                           if (AstVar* vp = VARDONEP($$, $4, $5)) { addNextNull($$, vp); vp->valuep($7); } }
         |       portDirNetE yVAR data_type      portSig variable_dimensionListE sigAttrListE
-                        { $$ = $4; VARDTYPE($3); VARIOANSI(); addNextNull($$, VARDONEP($$, $5, $6)); }
+                        { $$ = $4; VARDTYPE($3); VARIOANSI();
+                          addNextNull($$, VARDONEP($$, $5, $6)); }
         |       portDirNetE yVAR data_type      portSig variable_dimensionListE sigAttrListE '=' constExpr
                         { $$ = $4; VARDTYPE($3); VARIOANSI();
                           if (AstVar* vp = VARDONEP($$, $5, $6)) { addNextNull($$, vp); vp->valuep($8); } }
         |       portDirNetE yVAR implicit_typeE portSig variable_dimensionListE sigAttrListE
-                        { $$ = $4; VARDTYPE($3); VARIOANSI(); addNextNull($$, VARDONEP($$, $5, $6)); }
+                        { $$ = $4; VARDTYPE($3); VARIOANSI();
+                          addNextNull($$, VARDONEP($$, $5, $6)); }
         |       portDirNetE yVAR implicit_typeE portSig variable_dimensionListE sigAttrListE '=' constExpr
                         { $$ = $4; VARDTYPE($3); VARIOANSI();
                           if (AstVar* vp = VARDONEP($$, $5, $6)) { addNextNull($$, vp); vp->valuep($8); } }
@@ -2105,13 +2104,10 @@ port_declaration<nodep>:        // ==IEEE: port_declaration
         //
         //                      // IEEE: interface_port_declaration
         //                      // IEEE: interface_identifier list_of_interface_identifiers
-        |       id/*interface*/
-        /*mid*/         { VARRESET_NONLIST(VVarType::IFACEREF);
-                          AstIfaceRefDType* const dtp = new AstIfaceRefDType{$<fl>1, "", *$1};
-                          dtp->isPortDecl(true);
-                          VARDTYPE(dtp); }
-        /*cont*/    mpInstnameList
-                        { $$ = VARDONEP($3, nullptr, nullptr); }
+        //
+        //                      // Identical to variable_declaration, resolve in V3LinkDot when id known
+        //                      // NO:  id/*interface*/  mpInstnameList
+        //
         //                      // IEEE: interface_port_declaration
         //                      // IEEE: interface_identifier '.' modport_identifier list_of_interface_identifiers
         |       id/*interface*/ '.' idAny/*modport*/
@@ -4585,9 +4581,10 @@ exprOrDataType<nodep>:          // expr | data_type: combined to prevent conflic
         //                      // data_type includes id that overlaps expr, so special flavor
         //                      // data_type expanded:
         |       data_typeNoRef                          { $$ = $1; }
-        |       packageClassScopeE idType packed_dimensionListE
-                        { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, nullptr};
-                          $$ = GRAMMARP->createArray(refp, $3, true); }
+        //
+        //                      // Conflicts with non-type id, resolved in V3LinkDot
+        //                      // NO: packageClassScopeE idType packed_dimensionListE
+        //
         |       packageClassScopeE idType parameter_value_assignmentClass packed_dimensionListE
                         { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, $3};
                           $$ = GRAMMARP->createArray(refp, $4, true); }
@@ -5153,8 +5150,8 @@ expr<nodeExprp>:                // IEEE: part of expression/constant_expression/
                         { $$ = new AstCast{$2, $4, VFlagChildDType{}, $1}; }
         //                      // expanded from simple_type ps_type_identifier (part of simple_type)
         //                      // expanded from simple_type ps_parameter_identifier (part of simple_type)
-        |       packageClassScopeE idType yP_TICK '(' expr ')'
-                        { $$ = new AstCastParse{$3, $5, new AstRefDType{$<fl>2, *$2, $1, nullptr}}; }
+        //                      // Causes conflict, so handled post-parse
+        //                      // NO: packageClassScopeE idType yP_TICK '(' expr ')'
         //
         |       yTYPE__ETC '(' exprOrDataType ')' yP_TICK '(' expr ')'
                         { $$ = new AstCast{$1, $7, VFlagChildDType{},
diff --git a/test_regress/t/t_covergroup_unsup.out b/test_regress/t/t_covergroup_unsup.out
index 2f130f11a..7394aecf4 100644
--- a/test_regress/t/t_covergroup_unsup.out
+++ b/test_regress/t/t_covergroup_unsup.out
@@ -405,11 +405,8 @@
 %Warning-COVERIGN: t/t_covergroup_unsup.v:164:18: Ignoring unsupported: covergroup within class
   164 |       covergroup cov1 @m_z;
       |                  ^~~~
-%Error: t/t_covergroup_unsup.v:169:28: syntax error, unexpected '=', expecting IDENTIFIER or do or final or randomize
+%Error: t/t_covergroup_unsup.v:169:23: Can't find definition of variable: 'cov1'
   169 |       function new(); cov1 = new; endfunction
-      |                            ^
+      |                       ^~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: Internal Error: t/t_covergroup_unsup.v:160:4: ../V3ParseSym.h:#: Symbols suggest ending FUNC 'new' but parser thinks ending CLASS 'CgCls'
-  160 |    class CgCls;
-      |    ^~~~~
-                        ... This fatal error may be caused by the earlier error(s); resolve those first.
+%Error: Exiting due to
diff --git a/test_regress/t/t_dist_warn_coverage.py b/test_regress/t/t_dist_warn_coverage.py
index fdea18d15..4f338cf12 100755
--- a/test_regress/t/t_dist_warn_coverage.py
+++ b/test_regress/t/t_dist_warn_coverage.py
@@ -53,11 +53,14 @@ for s in [
         'Illegal +: or -: select; type already selected, or bad dimension: ',
         'Illegal bit or array select; type already selected, or bad dimension: ',
         'Illegal range select; type already selected, or bad dimension: ',
+        'Interface port ',
+        'Interface port declaration ',
         'Modport item is not a function/task: ',
         'Modport item is not a variable: ',
         'Modport item not found: ',
         'Modport not referenced as <interface>.',
         'Modport not referenced from underneath an interface: ',
+        'Non-interface used as an interface: ',
         'Parameter type pin value isn\'t a type: Param ',
         'Parameter type variable isn\'t a type: Param ',
         'Pattern replication value of 0 is not legal.',
diff --git a/test_regress/t/t_inst_paren_bad.out b/test_regress/t/t_inst_paren_bad.out
index 0413a0278..f50638471 100644
--- a/test_regress/t/t_inst_paren_bad.out
+++ b/test_regress/t/t_inst_paren_bad.out
@@ -1,8 +1,3 @@
-%Error: t/t_inst_paren_bad.v:11:4: Non-interface used as an interface: 'sub'
-                                 : ... Perhaps intended an instantiation but are missing parenthesis (IEEE 1800-2023 23.3.2)?
-   11 |    sub sub_inst;   
-      |    ^~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Warning-MULTITOP: t/t_inst_paren_bad.v:10:8: Multiple top level modules
                                             : ... Suggest see manual; fix the duplicates, or use --top-module to select top.
                    ... For warning description see https://verilator.org/warn/MULTITOP?v=latest
@@ -13,4 +8,8 @@
                                             : ... Top module 't'
    10 | module t( );
       |        ^
+%Error: t/t_inst_paren_bad.v:11:4: Can't find typedef/interface: 'sub'
+   11 |    sub sub_inst;   
+      |    ^~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_missing_bad.out b/test_regress/t/t_interface_missing_bad.out
index 01956743a..2b5585d4b 100644
--- a/test_regress/t/t_interface_missing_bad.out
+++ b/test_regress/t/t_interface_missing_bad.out
@@ -1,17 +1,11 @@
-%Error: t/t_interface_missing_bad.v:14:13: Pin is not an in/out/inout/interface: 'foo'
-   14 |    foo_intf foo
-      |             ^~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: t/t_interface_missing_bad.v:14:4: Can't find typedef/interface: 'foo_intf'
    14 |    foo_intf foo
       |    ^~~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: t/t_interface_missing_bad.v:20:4: Cannot find file containing interface: 'foo_intf'
    20 |    foo_intf the_foo ();
       |    ^~~~~~~~
 %Error: t/t_interface_missing_bad.v:25:15: Found definition of 'the_foo' as a CELL but expected a variable
    25 |         .foo (the_foo)
       |               ^~~~~~~
-%Error: t/t_interface_missing_bad.v:25:10: Instance attempts to connect to 'foo', but it is a variable
-   25 |         .foo (the_foo)
-      |          ^~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_paren_missing_bad.out b/test_regress/t/t_interface_paren_missing_bad.out
index ebea7deaf..f86122e68 100644
--- a/test_regress/t/t_interface_paren_missing_bad.out
+++ b/test_regress/t/t_interface_paren_missing_bad.out
@@ -1,6 +1,6 @@
-%Error: t/t_interface_paren_missing_bad.v:13:9: Interface port declaration 'intf_i' doesn't have corresponding port
+%Error: t/t_interface_paren_missing_bad.v:13:4: Parent instance's interface is not found: 'intf'
                                               : ... Perhaps intended an interface instantiation but are missing parenthesis (IEEE 1800-2023 25.3)?
    13 |    intf intf_i;
-      |         ^~~~~~
+      |    ^~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_top_bad.out b/test_regress/t/t_interface_top_bad.out
index bd8213cec..e90e95137 100644
--- a/test_regress/t/t_interface_top_bad.out
+++ b/test_regress/t/t_interface_top_bad.out
@@ -3,6 +3,7 @@
       |                   ^~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: t/t_interface_top_bad.v:17:4: Parent instance's interface is not found: 'ifc'
+                                    : ... Perhaps intended an interface instantiation but are missing parenthesis (IEEE 1800-2023 25.3)?
    17 |    ifc.counter_mp c_data
       |    ^~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_interface_typedef.out b/test_regress/t/t_interface_typedef.out
index 35d9a3031..ab677162e 100644
--- a/test_regress/t/t_interface_typedef.out
+++ b/test_regress/t/t_interface_typedef.out
@@ -2,8 +2,4 @@
    46 |    typedef ifc_if.struct_t struct_t;
       |    ^~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_interface_typedef.v:51:16: syntax error, unexpected IDENTIFIER
-   51 |       struct_t substruct;
-      |                ^~~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_interface_typo_bad.out b/test_regress/t/t_interface_typo_bad.out
index 6e24ad530..e08823cfa 100644
--- a/test_regress/t/t_interface_typo_bad.out
+++ b/test_regress/t/t_interface_typo_bad.out
@@ -1,4 +1,5 @@
 %Error: t/t_interface_typo_bad.v:14:4: Parent instance's interface is not found: 'foo_intf'
+                                     : ... Perhaps intended an interface instantiation but are missing parenthesis (IEEE 1800-2023 25.3)?
    14 |    foo_intf foo
       |    ^~~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_lint_implicit_type_bad.out b/test_regress/t/t_lint_implicit_type_bad.out
index 80984654a..3d0241a7e 100644
--- a/test_regress/t/t_lint_implicit_type_bad.out
+++ b/test_regress/t/t_lint_implicit_type_bad.out
@@ -1,5 +1,11 @@
-%Error: t/t_lint_implicit_type_bad.v:15:11: syntax error, unexpected IDENTIFIER-for-type
+%Error: t/t_lint_implicit_type_bad.v:15:11: Data type used where a non-data type is expected: 'imp_typedef_conflict'
    15 |    assign imp_typedef_conflict = 1'b1;
       |           ^~~~~~~~~~~~~~~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_lint_implicit_type_bad.v:16:11: Data type used where a non-data type is expected: 'imp_Cls_conflict'
+   16 |    assign imp_Cls_conflict = 1'b1;
+      |           ^~~~~~~~~~~~~~~~
+%Error: t/t_lint_implicit_type_bad.v:17:11: Data type used where a non-data type is expected: 'imp_PARAM_conflict'
+   17 |    assign imp_PARAM_conflict = 1'b1;
+      |           ^~~~~~~~~~~~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_implicit_type_bad.py b/test_regress/t/t_lint_implicit_type_bad.py
index e15e088e1..ff290aea9 100755
--- a/test_regress/t/t_lint_implicit_type_bad.py
+++ b/test_regress/t/t_lint_implicit_type_bad.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('vlt')
 
 # --debug-check adds extra internal message, otherwise golden log would vary
-test.lint(verilator_flags2=["--lint-only --debug-check -Wall -Wno-DECLFILENAME"],
+test.lint(verilator_flags2=["--lint-only --no-debug-check -Wall -Wno-DECLFILENAME"],
           fails=True,
           expect_filename=test.golden_filename)
 
diff --git a/test_regress/t/t_lint_import_name2_bad.out b/test_regress/t/t_lint_import_name2_bad.out
index 88ed7907c..30fd80a44 100644
--- a/test_regress/t/t_lint_import_name2_bad.out
+++ b/test_regress/t/t_lint_import_name2_bad.out
@@ -1,7 +1,3 @@
-%Error-PKGNODECL: t/t_lint_import_name2_bad.v:7:8: Package/class 'missing' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
-    7 | import missing::sigs;
-      |        ^~~~~~~
-                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
 %Error: t/t_lint_import_name2_bad.v:7:8: Importing from missing package 'missing'
     7 | import missing::sigs;
       |        ^~~~~~~
diff --git a/test_regress/t/t_lint_pkg_colon_bad.out b/test_regress/t/t_lint_pkg_colon_bad.out
index 69ae72f72..b0e76fd25 100644
--- a/test_regress/t/t_lint_pkg_colon_bad.out
+++ b/test_regress/t/t_lint_pkg_colon_bad.out
@@ -1,9 +1,5 @@
-%Error-PKGNODECL: t/t_lint_pkg_colon_bad.v:7:17: Package/class 'mispkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
-    7 | module t (input mispkg::foo_t a);
-      |                 ^~~~~~
-                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
-%Error: t/t_lint_pkg_colon_bad.v:7:25: syntax error, unexpected IDENTIFIER, expecting IDENTIFIER-for-type
-    7 | module t (input mispkg::foo_t a);
-      |                         ^~~~~
+%Error: t/t_lint_pkg_colon_bad.v:8:8: syntax error, unexpected IDENTIFIER-::, expecting IDENTIFIER or do or final or randomize
+    8 |    reg mispkgb::bar_t b;
+      |        ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_pkgnodecl_bad.out b/test_regress/t/t_lint_pkgnodecl_bad.out
deleted file mode 100644
index 56072a8d4..000000000
--- a/test_regress/t/t_lint_pkgnodecl_bad.out
+++ /dev/null
@@ -1,5 +0,0 @@
-%Error-PKGNODECL: t/t_lint_pkgnodecl_bad.v:8:12: Package/class 'Pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
-    8 |    initial Pkg::hello();   
-      |            ^~~
-                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
-%Error: Exiting due to
diff --git a/test_regress/t/t_lint_pkgnodecl_bad.py b/test_regress/t/t_lint_pkgnodecl_bad.py
deleted file mode 100755
index 77102e664..000000000
--- a/test_regress/t/t_lint_pkgnodecl_bad.py
+++ /dev/null
@@ -1,29 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you
-# can redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios('linter')
-
-root = ".."
-
-if not os.path.exists(root + "/.git"):
-    test.skip("Not in a git repository")
-
-test.lint(fails=True, expect_filename=test.golden_filename)
-
-test.extract(in_filename=test.top_filename,
-             out_filename=root + "/docs/gen/ex_PKGNODECL_faulty.rst",
-             lines="7-12")
-
-test.extract(in_filename=test.golden_filename,
-             out_filename=root + "/docs/gen/ex_PKGNODECL_msg.rst",
-             lines="1")
-
-test.passes()
diff --git a/test_regress/t/t_lint_pkgnodecl_bad.v b/test_regress/t/t_lint_pkgnodecl_bad.v
deleted file mode 100644
index ee8248f78..000000000
--- a/test_regress/t/t_lint_pkgnodecl_bad.v
+++ /dev/null
@@ -1,12 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2012 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-module t;
-   initial Pkg::hello();  //<--- Warning
-endmodule
-package Pkg;
-   function void hello(); endfunction
-endpackage
diff --git a/test_regress/t/t_no_std_bad.out b/test_regress/t/t_no_std_bad.out
index 270ff073b..f4b668c23 100644
--- a/test_regress/t/t_no_std_bad.out
+++ b/test_regress/t/t_no_std_bad.out
@@ -1,7 +1,3 @@
-%Error-PKGNODECL: t/t_no_std_bad.v:9:11: Package/class 'std' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
-    9 |    import std::*;
-      |           ^~~
-                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
 %Error: t/t_no_std_bad.v:9:11: Importing from missing package 'std'
     9 |    import std::*;
       |           ^~~
diff --git a/test_regress/t/t_package_alone_bad.out b/test_regress/t/t_package_alone_bad.out
index bd58349f1..8a39e026f 100644
--- a/test_regress/t/t_package_alone_bad.out
+++ b/test_regress/t/t_package_alone_bad.out
@@ -1,5 +1,5 @@
-%Error-PKGNODECL: t/t_package_alone_bad.v:7:8: Package/class 'pkg' not found, and needs to be predeclared (IEEE 1800-2023 26.3)
+%Error: t/t_package_alone_bad.v:7:13: Export package not found: 'pkg'
     7 | export pkg::something;
-      |        ^~~
-                  ... For error description see https://verilator.org/warn/PKGNODECL?v=latest
+      |             ^~~~~~~~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_parse_sync_bad2.out b/test_regress/t/t_parse_sync_bad2.out
index fdfd58413..5fa429099 100644
--- a/test_regress/t/t_parse_sync_bad2.out
+++ b/test_regress/t/t_parse_sync_bad2.out
@@ -1,8 +1,24 @@
-%Error: t/t_parse_sync_bad2.v:17:16: syntax error, unexpected IDENTIFIER
-   17 |       Invalid1 invalid1;   
-      |                ^~~~~~~~
+%Error: t/t_parse_sync_bad2.v:9:15: Can't find typedef/interface: 'unknown'
+    9 |       typedef unknown defu;
+      |               ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_parse_sync_bad2.v:20:16: syntax error, unexpected IDENTIFIER
+%Error: t/t_parse_sync_bad2.v:17:7: Can't find typedef/interface: 'Invalid1'
+   17 |       Invalid1 invalid1;   
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_parse_sync_bad2.v:18:12: Unsupported: Multiple '::' package/class reference
+   18 |       pkg::cls::defi valid1;   
+      |            ^~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: t/t_parse_sync_bad2.v:18:17: Can't find typedef/interface: 'defi'
+   18 |       pkg::cls::defi valid1;   
+      |                 ^~~~
+%Error-UNSUPPORTED: t/t_parse_sync_bad2.v:19:12: Unsupported: Multiple '::' package/class reference
+   19 |       pkg::cls::defu valid2;   
+      |            ^~~
+%Error: t/t_parse_sync_bad2.v:19:17: Can't find typedef/interface: 'defu'
+   19 |       pkg::cls::defu valid2;   
+      |                 ^~~~
+%Error: t/t_parse_sync_bad2.v:20:7: Can't find typedef/interface: 'Invalid2'
    20 |       Invalid2 invalid2;   
-      |                ^~~~~~~~
+      |       ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_circ_subst_bad.out b/test_regress/t/t_pp_circ_subst_bad.out
index 6553eeaa3..d45c9c044 100644
--- a/test_regress/t/t_pp_circ_subst_bad.out
+++ b/test_regress/t/t_pp_circ_subst_bad.out
@@ -1,4 +1,4 @@
 %Error: t/t_pp_circ_subst_bad.v:8:80001: Too many preprocessor tokens on a line (>40000); perhaps recursive `define
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_pp_circ_subst_bad.v:8:1: syntax error, unexpected IDENTIFIER
+%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type, expecting IDENTIFIER or do or final or randomize
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_circ_subst_bad2.out b/test_regress/t/t_pp_circ_subst_bad2.out
index e6a97d6d1..5af9aac7f 100644
--- a/test_regress/t/t_pp_circ_subst_bad2.out
+++ b/test_regress/t/t_pp_circ_subst_bad2.out
@@ -1,4 +1,4 @@
 %Error: t/t_pp_circ_subst_bad.v:8:40002: Too many preprocessor tokens on a line (>20000); perhaps recursive `define
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_pp_circ_subst_bad.v:8:1: syntax error, unexpected IDENTIFIER
+%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type, expecting IDENTIFIER or do or final or randomize
 %Error: Exiting due to
diff --git a/test_regress/t/t_preproc_inc_bad.out b/test_regress/t/t_preproc_inc_bad.out
index 468822a47..e556a2571 100644
--- a/test_regress/t/t_preproc_inc_bad.out
+++ b/test_regress/t/t_preproc_inc_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_preproc_inc_inc_bad.vh:11:1: syntax error, unexpected endmodule, expecting IDENTIFIER or randomize
+%Error: t/t_preproc_inc_inc_bad.vh:11:1: syntax error, unexpected endmodule, expecting '('
    11 | endmodule
       | ^~~~~~~~~
         t/t_preproc_inc_bad.v:10:1: ... note: In file included from 't_preproc_inc_bad.v'
diff --git a/test_regress/t/t_type_non_type.py b/test_regress/t/t_type_non_type.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_type_non_type.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_type_non_type.v b/test_regress/t/t_type_non_type.v
new file mode 100644
index 000000000..730f1c314
--- /dev/null
+++ b/test_regress/t/t_type_non_type.v
@@ -0,0 +1,49 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Use this file as a template for submitting bugs, etc.
+// This module takes a single clock input, and should either
+//      $write("*-* All Finished *-*\n");
+//      $finish;
+// on success, or $stop.
+//
+// The code as shown applies a random vector to the Test
+// module, then calculates a CRC on the Test module's outputs.
+//
+// **If you do not wish for your code to be released to the public
+// please note it here, otherwise:**
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+class Cls;
+endclass
+
+package Pkg;
+   // Issue #2956
+   typedef string STYPE;
+   typedef string line;
+   task automatic testf;
+      inout STYPE line;
+   endtask
+endpackage
+
+module t;
+   localparam type T = Cls;
+
+   // Issue #2412
+   typedef T this_thing;  // this_thing now a type
+
+   function T newer();
+      T this_thing;  // this_thing now a class reference
+      this_thing = new;
+      return this_thing;
+   endfunction
+
+   initial begin
+      Cls c;
+      c = newer();
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_vams_kwd_bad.out b/test_regress/t/t_vams_kwd_bad.out
index d10e51e87..0cea02097 100644
--- a/test_regress/t/t_vams_kwd_bad.out
+++ b/test_regress/t/t_vams_kwd_bad.out
@@ -2,7 +2,7 @@
    12 |    int above;
       |        ^~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_vams_kwd_bad.v:12:13: syntax error, unexpected ';', expecting IDENTIFIER or randomize
+%Error: t/t_vams_kwd_bad.v:12:13: syntax error, unexpected ';', expecting '('
    12 |    int above;
       |             ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.

From 0c8c7fb03c016d6a7158759a3e039496f80748a5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 17 May 2025 22:42:00 -0400
Subject: [PATCH 083/211] Remove symbol table from parser: Support redeclaring
 type as non-type; major parsing change (#2412).

---
 Changes                                     |   1 +
 src/CMakeLists.txt                          |   1 -
 src/V3Global.cpp                            |   6 +-
 src/V3LinkCells.cpp                         |  10 +-
 src/V3LinkCells.h                           |   2 +-
 src/V3Parse.h                               |   3 +-
 src/V3ParseGrammar.cpp                      |   1 -
 src/V3ParseImp.cpp                          |  50 +---
 src/V3ParseImp.h                            |  24 +-
 src/V3ParseSym.h                            | 181 -------------
 src/Verilator.cpp                           |   1 -
 src/verilog.y                               | 267 +++++++-------------
 test_regress/t/t_class_scope_import_bad.out |   4 +-
 test_regress/t/t_lint_import_name2_bad.out  |   4 +-
 test_regress/t/t_lint_import_name_bad.out   |   4 +-
 test_regress/t/t_lint_importstar_bad.out    |   4 +-
 test_regress/t/t_no_std_bad.out             |   2 +-
 test_regress/t/t_package_import_bad2.out    |   2 +-
 test_regress/t/t_property_var_unsup.out     |   5 +-
 test_regress/t/t_vlt_match_error_1.out      |   2 +-
 20 files changed, 124 insertions(+), 450 deletions(-)
 delete mode 100644 src/V3ParseSym.h

diff --git a/Changes b/Changes
index 7af71a4f7..72c929dc7 100644
--- a/Changes
+++ b/Changes
@@ -13,6 +13,7 @@ Verilator 5.037 devel
 
 **Other:**
 
+* Support redeclaring type as non-type; major parsing change (#2412).
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 6ad72f864..5294a5384 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -142,7 +142,6 @@ set(HEADERS
     V3Param.h
     V3Parse.h
     V3ParseImp.h
-    V3ParseSym.h
     V3PchAstMT.h
     V3PchAstNoMT.h
     V3PreExpr.h
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index 259e2011c..56ce737f9 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -24,7 +24,6 @@
 #include "V3HierBlock.h"
 #include "V3LinkCells.h"
 #include "V3Parse.h"
-#include "V3ParseSym.h"
 #include "V3Stats.h"
 #include "V3ThreadPool.h"
 
@@ -54,9 +53,8 @@ void V3Global::readFiles() {
     const VNUser4InUse inuser4;
 
     VInFilter filter{v3Global.opt.pipeFilter()};
-    V3ParseSym parseSyms{v3Global.rootp()};  // Symbol table must be common across all parsing
 
-    V3Parse parser{v3Global.rootp(), &filter, &parseSyms};
+    V3Parse parser{v3Global.rootp(), &filter};
 
     // Parse the std waivers
     if (v3Global.opt.stdWaiver()) {
@@ -106,7 +104,7 @@ void V3Global::readFiles() {
 
     if (!v3Global.opt.preprocOnly() || v3Global.opt.preprocResolve()) {
         // Resolve all modules cells refer to
-        V3LinkCells::link(v3Global.rootp(), &filter, &parseSyms);
+        V3LinkCells::link(v3Global.rootp(), &filter);
     }
 
     V3Global::dumpCheckGlobalTree("cells", false, dumpTreeEitherLevel() >= 9);
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index e36611257..b1f18ca6f 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -105,7 +105,6 @@ class LinkCellsVisitor final : public VNVisitor {
 
     // STATE
     VInFilter* const m_filterp;  // Parser filter
-    V3ParseSym* m_parseSymp;  // Parser symbol table
 
     // Below state needs to be preserved between each module call.
     AstNodeModule* m_modp = nullptr;  // Current module
@@ -141,7 +140,7 @@ class LinkCellsVisitor final : public VNVisitor {
             // If file not found, make AstNotFoundModule, rather than error out.
             // We'll throw the error when we know the module will really be needed.
             const string prettyName = AstNode::prettyName(modName);
-            V3Parse parser{v3Global.rootp(), m_filterp, m_parseSymp};
+            V3Parse parser{v3Global.rootp(), m_filterp};
             // true below -> other simulators treat modules in link-found files as library cells
             parser.parseFile(nodep->fileline(), prettyName, true, "");
             V3Error::abortIfErrors();
@@ -607,9 +606,8 @@ class LinkCellsVisitor final : public VNVisitor {
 
 public:
     // CONSTRUCTORS
-    LinkCellsVisitor(AstNetlist* nodep, VInFilter* filterp, V3ParseSym* parseSymp)
+    LinkCellsVisitor(AstNetlist* nodep, VInFilter* filterp)
         : m_filterp{filterp}
-        , m_parseSymp{parseSymp}
         , m_mods{nodep} {
         if (v3Global.opt.hierChild()) {
             const V3HierBlockOptSet& hierBlocks = v3Global.opt.hierBlocks();
@@ -631,7 +629,7 @@ public:
 //######################################################################
 // Link class functions
 
-void V3LinkCells::link(AstNetlist* nodep, VInFilter* filterp, V3ParseSym* parseSymp) {
+void V3LinkCells::link(AstNetlist* nodep, VInFilter* filterp) {
     UINFO(4, __FUNCTION__ << ": " << endl);
-    { LinkCellsVisitor{nodep, filterp, parseSymp}; }
+    { LinkCellsVisitor{nodep, filterp}; }
 }
diff --git a/src/V3LinkCells.h b/src/V3LinkCells.h
index 99254ef33..63a011645 100644
--- a/src/V3LinkCells.h
+++ b/src/V3LinkCells.h
@@ -28,7 +28,7 @@ class V3ParseSym;
 
 class V3LinkCells final {
 public:
-    static void link(AstNetlist* nodep, VInFilter* filterp, V3ParseSym* parseSymp) VL_MT_DISABLED;
+    static void link(AstNetlist* nodep, VInFilter* filterp) VL_MT_DISABLED;
 };
 
 #endif  // Guard
diff --git a/src/V3Parse.h b/src/V3Parse.h
index 58f318bfa..f471f0136 100644
--- a/src/V3Parse.h
+++ b/src/V3Parse.h
@@ -26,7 +26,6 @@
 class AstNetlist;
 class VInFilter;
 class V3ParseImp;
-class V3ParseSym;
 
 //============================================================================
 
@@ -38,7 +37,7 @@ class V3Parse final {
 
 public:
     // We must allow reading multiple files into one parser
-    V3Parse(AstNetlist* rootp, VInFilter* filterp, V3ParseSym* symp) VL_MT_DISABLED;
+    V3Parse(AstNetlist* rootp, VInFilter* filterp) VL_MT_DISABLED;
     ~V3Parse() VL_MT_DISABLED;
 
     // METHODS
diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp
index bfa59ed7b..6d435e8ef 100644
--- a/src/V3ParseGrammar.cpp
+++ b/src/V3ParseGrammar.cpp
@@ -262,7 +262,6 @@ AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
         // Parser needs to know what is a type
         AstNode* const newp = new AstTypedefFwd{fileline, name};
         AstNode::addNext<AstNode, AstNode>(nodep, newp);
-        SYMP->reinsert(newp);
     }
     // Don't set dtypep in the ranging;
     // We need to autosize parameters and integers separately
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 244636b6f..5775b3e52 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -48,8 +48,6 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 
 V3ParseImp* V3ParseImp::s_parsep = nullptr;
 
-int V3ParseSym::s_anonNum = 0;
-
 //######################################################################
 // Parser constructor
 
@@ -60,11 +58,6 @@ V3ParseImp::~V3ParseImp() {
     m_numberps.clear();
     lexDestroy();
     parserClear();
-
-    if (debug() >= 9) {
-        UINFO(0, "~V3ParseImp\n");
-        symp()->dumpSelf(cout, "-vpi: ");
-    }
 }
 
 //######################################################################
@@ -695,43 +688,7 @@ void V3ParseImp::tokenPipelineSym() {
     int token = yylval.token;
     if (token == yaID__LEX || token == yaID__CC || token == yaID__aTYPE) {
         importIfInStd(yylval.fl, *(yylval.strp));
-    }
-    if (token == yaID__LEX || token == yaID__CC) {
-        const VSymEnt* foundp;
-        if (const VSymEnt* const look_underp = V3ParseImp::parsep()->symp()->nextId()) {
-            UINFO(7, "   tokenPipelineSym: next id lookup forced under " << look_underp << endl);
-            // if (debug() >= 7) V3ParseImp::parsep()->symp()->dumpSelf(cout, " -symtree: ");
-            foundp = look_underp->findIdFlat(*(yylval.strp));
-            // "consume" it.  Must set again if want another token under temp scope
-            V3ParseImp::parsep()->symp()->nextId(nullptr);
-        } else {
-            UINFO(7, "   tokenPipelineSym: find upward "
-                         << V3ParseImp::parsep()->symp()->symCurrentp() << " for '"
-                         << *(yylval.strp) << "'" << endl);
-            // if (debug()>=9) V3ParseImp::parsep()->symp()->symCurrentp()->dumpSelf(cout,
-            // " -findtree: ", true);
-            foundp = V3ParseImp::parsep()->symp()->symCurrentp()->findIdFallback(*(yylval.strp));
-        }
-        if (!foundp && !m_afterColonColon) {  // Check if the symbol can be found in std
-            // The following keywords from this file are hardcoded for detection in the parser:
-            // "mailbox", "process", "randomize", "semaphore", "std"
-            AstPackage* const stdpkgp = v3Global.rootp()->stdPackagep();
-            if (stdpkgp) {
-                VSymEnt* const stdsymp = stdpkgp->user4u().toSymEnt();
-                foundp = stdsymp->findIdFallback(*(yylval.strp));
-            }
-        }
-        if (foundp) {
-            AstNode* const scp = foundp->nodep();
-            yylval.scp = scp;
-            UINFO(7, "   tokenPipelineSym: Found " << scp << endl);
-            if (token == yaID__LEX) {  // i.e. not yaID__CC
-                token = yaID__ETC;
-            }
-        } else {  // Not found
-            yylval.scp = nullptr;
-            if (token == yaID__LEX) token = yaID__ETC;
-        }
+        if (token == yaID__LEX) token = yaID__ETC;
     }
     m_afterColonColon = token == yP_COLONCOLON;
     yylval.token = token;
@@ -744,7 +701,6 @@ int V3ParseImp::tokenToBison() {
     m_bisonLastFileline = yylval.fl;
     m_tokenLastBison = yylval;
 
-    // yylval.scp = nullptr;   // Symbol table not yet needed - no packages
     if (debug() >= 6 || debugFlex() >= 6
         || debugBison() >= 6) {  // --debugi-flex and --debugi-bison
         cout << "tokenToBison  " << yylval << endl;
@@ -776,8 +732,8 @@ std::ostream& operator<<(std::ostream& os, const V3ParseBisonYYSType& rhs) {
 //======================================================================
 // V3Parse functions
 
-V3Parse::V3Parse(AstNetlist* rootp, VInFilter* filterp, V3ParseSym* symp) {
-    m_impp = new V3ParseImp{rootp, filterp, symp};
+V3Parse::V3Parse(AstNetlist* rootp, VInFilter* filterp) {
+    m_impp = new V3ParseImp{rootp, filterp};
 }
 V3Parse::~V3Parse() {  //
     VL_DO_CLEAR(delete m_impp, m_impp = nullptr);
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index e2fcf0990..c7895d3f3 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -20,11 +20,11 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "V3Ast.h"
 #include "V3Error.h"
 #include "V3FileLine.h"
 #include "V3Global.h"
 #include "V3Parse.h"
-#include "V3ParseSym.h"
 
 #include <algorithm>
 #include <deque>
@@ -108,7 +108,6 @@ struct VMemberQualifiers final {
 
 struct V3ParseBisonYYSType final {
     FileLine* fl;
-    AstNode* scp;  // Symbol table scope for future lookups
     int token;  // Read token, aka tok
     VBaseOverride baseOverride;
     bool flag = false;  // Passed up some rules
@@ -142,7 +141,6 @@ class V3ParseImp final {
     // MEMBERS
     AstNetlist* const m_rootp;  // Root of the design
     VInFilter* const m_filterp;  // Reading filter
-    V3ParseSym* m_symp;  // Symbol table
 
     V3Lexer* m_lexerp = nullptr;  // Current FlexLexer
     static V3ParseImp* s_parsep;  // Current THIS, bison() isn't class based
@@ -269,27 +267,13 @@ public:
     size_t flexPpInputToLex(char* buf, size_t max_size) { return ppInputToLex(buf, max_size); }
 
     //==== Symbol tables
-    V3ParseSym* symp() { return m_symp; }
-    AstPackage* unitPackage(FileLine* /*fl*/) {
-        // Find one made earlier?
-        const VSymEnt* const rootSymp
-            = symp()->symRootp()->findIdFlat(AstPackage::dollarUnitName());
-        AstPackage* pkgp;
-        if (!rootSymp) {
-            pkgp = parsep()->rootp()->dollarUnitPkgAddp();
-            symp()->reinsert(pkgp, symp()->symRootp());  // Don't push/pop scope as they're global
-        } else {
-            pkgp = VN_AS(rootSymp->nodep(), Package);
-        }
-        return pkgp;
-    }
+    AstPackage* unitPackage(FileLine* /*fl*/) { return parsep()->rootp()->dollarUnitPkgAddp(); }
 
 public:
     // CONSTRUCTORS
-    V3ParseImp(AstNetlist* rootp, VInFilter* filterp, V3ParseSym* parserSymp)
+    V3ParseImp(AstNetlist* rootp, VInFilter* filterp)
         : m_rootp{rootp}
-        , m_filterp{filterp}
-        , m_symp{parserSymp} {
+        , m_filterp{filterp} {
         m_lexKwdLast = stateVerilogRecent();
         m_timeLastUnit = v3Global.opt.timeDefaultUnit();
     }
diff --git a/src/V3ParseSym.h b/src/V3ParseSym.h
deleted file mode 100644
index d1911a8bd..000000000
--- a/src/V3ParseSym.h
+++ /dev/null
@@ -1,181 +0,0 @@
-// -*- mode: C++; c-file-style: "cc-mode" -*-
-//*************************************************************************
-// DESCRIPTION: Verilator: Common header between parser and lex
-//
-// Code available from: https://verilator.org
-//
-//*************************************************************************
-//
-// Copyright 2009-2025 by Wilson Snyder. This program is free software; you
-// can redistribute it and/or modify it under the terms of either the GNU
-// Lesser General Public License Version 3 or the Perl Artistic License
-// Version 2.0.
-// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-//
-//*************************************************************************
-
-#ifndef VERILATOR_V3PARSESYM_H_
-#define VERILATOR_V3PARSESYM_H_
-
-#include "config_build.h"
-#include "verilatedos.h"
-
-#include "V3Error.h"
-#include "V3FileLine.h"
-#include "V3Global.h"
-#include "V3SymTable.h"
-
-#include <deque>
-#include <vector>
-
-//######################################################################
-// Symbol table for parsing
-
-class V3ParseSym final {
-    // TYPES
-    using SymStack = std::vector<VSymEnt*>;
-
-private:
-    // MEMBERS
-    static int s_anonNum;  // Number of next anonymous object (parser use only)
-    VSymGraph m_syms;  // Graph of symbol tree
-    VSymEnt* m_symTableNextId = nullptr;  // Symbol table for next lexer lookup (parser use only)
-    VSymEnt* m_symCurrentp = nullptr;  // Active symbol table for additions/lookups
-    std::vector<VSymEnt*> m_sympStack;  // Stack of upper nodes with pending symbol tables
-
-public:
-    // CONSTRUCTORS
-    explicit V3ParseSym(AstNetlist* rootp)
-        : m_syms{rootp} {
-        s_anonNum = 0;  // Number of next anonymous object
-        pushScope(findNewTable(rootp));
-        m_symCurrentp = symCurrentp();
-    }
-    ~V3ParseSym() = default;
-
-private:
-    // METHODS
-
-    VL_DEFINE_DEBUG_FUNCTIONS;
-
-    static VSymEnt* getTable(AstNode* nodep) {
-        UASSERT_OBJ(nodep->user4p(), nodep, "Current symtable not found");
-        return nodep->user4u().toSymEnt();
-    }
-
-public:
-    VSymEnt* nextId() const { return m_symTableNextId; }
-    VSymEnt* symCurrentp() const { return m_symCurrentp; }
-    VSymEnt* symRootp() const { return m_syms.rootp(); }
-
-    VSymEnt* findNewTable(AstNode* nodep) {
-        if (!nodep->user4p()) {
-            VSymEnt* const symsp = new VSymEnt{&m_syms, nodep};
-            nodep->user4p(symsp);
-        }
-        return getTable(nodep);
-    }
-    void nextId(AstNode* entp) {
-        if (entp) {
-            UINFO(9, "symTableNextId under " << entp << "-" << entp->type().ascii() << endl);
-            m_symTableNextId = getTable(entp);
-        } else {
-            UINFO(9, "symTableNextId under nullptr" << endl);
-            m_symTableNextId = nullptr;
-        }
-    }
-    void reinsert(AstNode* nodep, VSymEnt* parentp = nullptr) {
-        reinsert(nodep, parentp, nodep->name());
-    }
-    // cppcheck-suppress passedByValue
-    void reinsert(AstNode* nodep, VSymEnt* parentp, string name) {
-        if (!parentp) parentp = symCurrentp();
-        if (name == "") {  // New name with space in name so can't collide with users
-            name = " anon"s + nodep->type().ascii() + cvtToStr(++s_anonNum);
-        }
-        parentp->reinsert(name, findNewTable(nodep));
-    }
-    void pushNew(AstNode* nodep) { pushNewUnder(nodep, nullptr); }
-    void pushNewUnder(AstNode* nodep, VSymEnt* parentp) {
-        if (!parentp) parentp = symCurrentp();
-        VSymEnt* const symp
-            = findNewTable(nodep);  // Will set user4p, which is how we connect table to node
-        symp->fallbackp(parentp);
-        reinsert(nodep, parentp);
-        pushScope(symp);
-    }
-    void pushNewUnderNodeOrCurrent(AstNode* nodep, AstNode* parentp) {
-        if (parentp) {
-            pushNewUnder(nodep, findNewTable(parentp));
-        } else {
-            pushNewUnder(nodep, nullptr);
-        }
-    }
-    void pushScope(VSymEnt* symp) {
-        m_sympStack.push_back(symp);
-        m_symCurrentp = symp;
-    }
-    void popScope(AstNode* nodep) {
-        if (VL_UNCOVERABLE(symCurrentp()->nodep() != nodep)) {  // LCOV_EXCL_START
-            if (debug()) {
-                showUpward();
-                dumpSelf(std::cout, "-mism: ");
-            }
-            nodep->v3fatalSrc("Symbols suggest ending " << symCurrentp()->nodep()->prettyTypeName()
-                                                        << " but parser thinks ending "
-                                                        << nodep->prettyTypeName());
-            return;
-        }  // LCOV_EXCL_STOP
-        m_sympStack.pop_back();
-        UASSERT_OBJ(!m_sympStack.empty(), nodep, "symbol stack underflow");
-        m_symCurrentp = m_sympStack.back();
-    }
-    void showUpward() {  // LCOV_EXCL_START
-        UINFO(1, "ParseSym Stack:\n");
-        for (VSymEnt* const symp : vlstd::reverse_view(m_sympStack)) {
-            UINFO(1, "    " << symp->nodep() << endl);
-        }
-        UINFO(1, "ParseSym Current: " << symCurrentp()->nodep() << endl);
-    }  // LCOV_EXCL_STOP
-    void dumpSelf(std::ostream& os, const string& indent = "") { m_syms.dumpSelf(os, indent); }
-    AstNode* findEntUpward(const string& name) const {
-        // Lookup the given string as an identifier, return type of the id, scanning upward
-        VSymEnt* const foundp = symCurrentp()->findIdFallback(name);
-        if (foundp) {
-            return foundp->nodep();
-        } else {
-            return nullptr;
-        }
-    }
-    void importExtends(AstNode* classp) {
-        // Import from package::id_or_star to this
-        VSymEnt* const symp = getTable(classp);
-        UASSERT_OBJ(symp, classp,  // Internal problem, because we earlier found it
-                    "Extends class package not found");
-        // Walk old sym table and reinsert into current table
-        // We let V3LinkDot report the error instead of us
-        symCurrentp()->importFromClass(&m_syms, symp);
-    }
-    void importItem(AstNode* packagep, const string& id_or_star) {
-        // Import from package::id_or_star to this
-        VSymEnt* const symp = getTable(packagep);
-        UASSERT_OBJ(symp, packagep,  // Internal problem, because we earlier found it
-                    "Import package not found");
-        // Walk old sym table and reinsert into current table
-        // We let V3LinkDot report the error instead of us
-        symCurrentp()->importFromPackage(&m_syms, symp, id_or_star);
-    }
-    void exportItem(AstNode* packagep, const string& id_or_star) {
-        // Export from this the remote package::id_or_star
-        VSymEnt* const symp = getTable(packagep);
-        UASSERT_OBJ(symp, packagep,  // Internal problem, because we earlier found it
-                    "Export package not found");
-        symCurrentp()->exportFromPackage(&m_syms, symp, id_or_star);
-    }
-    void exportStarStar() {
-        // Export *::* from remote packages
-        symCurrentp()->exportStarStar(&m_syms);
-    }
-};
-
-#endif  // Guard
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 2d3753092..5f25e88fa 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -78,7 +78,6 @@
 #include "V3Order.h"
 #include "V3Os.h"
 #include "V3Param.h"
-#include "V3ParseSym.h"
 #include "V3PreShell.h"
 #include "V3Premit.h"
 #include "V3ProtectLib.h"
diff --git a/src/verilog.y b/src/verilog.y
index 91a19e004..74c322350 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -73,7 +73,6 @@
 // Statics (for here only)
 
 #define PARSEP V3ParseImp::parsep()
-#define SYMP PARSEP->symp()
 #define GRAMMARP V3ParseGrammar::singletonp()
 
 class V3ParseGrammar {
@@ -173,7 +172,6 @@ public:
         // As nettypes are unsupported, we just alias to logic
         AstTypedef* const nodep = new AstTypedef{fl, name, nullptr, VFlagChildDType{},
                                                  new AstBasicDType{fl, VFlagLogicPacked{}, 1}};
-        SYMP->reinsert(nodep);
         PARSEP->tagNodep(nodep);
         return nodep;
     }
@@ -181,13 +179,11 @@ public:
                            AstNodeRange* rangep) {
         AstTypedef* const nodep = new AstTypedef{fl, name, attrsp, VFlagChildDType{},
                                                  GRAMMARP->createArray(basep, rangep, false)};
-        SYMP->reinsert(nodep);
         PARSEP->tagNodep(nodep);
         return nodep;
     }
     AstNode* createTypedefFwd(FileLine* fl, const string& name) {
         AstTypedefFwd* const nodep = new AstTypedefFwd{fl, name};
-        SYMP->reinsert(nodep);
         PARSEP->tagNodep(nodep);
         return nodep;
     }
@@ -1241,7 +1237,6 @@ package_declaration:            // ==IEEE: package_declaration
                 packageFront package_itemListE yENDPACKAGE endLabelE
                         { $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));  // Stash for implicit wires, etc
                           if ($2) $1->addStmtsp($2);
-                          SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
 
@@ -1259,8 +1254,7 @@ packageFront<nodeModulep>:
                           $$->lifetime($2);
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
-                          PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$); }
+                          PARSEP->rootp()->addModulesp($$); }
         ;
 
 package_itemListE<nodep>:       // IEEE: [{ package_item }]
@@ -1338,14 +1332,7 @@ package_import_itemList<nodep>:
 
 package_import_item<nodep>:     // ==IEEE: package_import_item
                 idCC/*package_identifier*/ yP_COLONCOLON package_import_itemObj
-                        {
-                          if (!VN_IS($<scp>1, Package)) {
-                              $$ = nullptr;
-                              $<fl>1->v3error("Importing from missing package '" << *$<strp>1 << "'");
-                          } else {
-                              $$ = new AstPackageImport{$<fl>2, *$<strp>1, *$3};
-                              SYMP->importItem($<scp>1, *$3);
-                          } }
+                        { $$ = new AstPackageImport{$<fl>1, *$<strp>1, *$3}; }
         ;
 
 package_import_itemObj<strp>:   // IEEE: part of package_import_item
@@ -1355,7 +1342,7 @@ package_import_itemObj<strp>:   // IEEE: part of package_import_item
 
 package_export_declaration<nodep>: // IEEE: package_export_declaration
                 yEXPORT '*' yP_COLONCOLON '*' ';'
-                        { $$ = new AstPackageExportStarStar{$<fl>2}; SYMP->exportStarStar(); }
+                        { $$ = new AstPackageExportStarStar{$<fl>2}; }
         |       yEXPORT package_export_itemList ';'     { $$ = $2; }
         ;
 
@@ -1366,8 +1353,7 @@ package_export_itemList<nodep>:
 
 package_export_item<nodep>:     // ==IEEE: package_export_item
                 idCC yP_COLONCOLON package_import_itemObj
-                        { $$ = new AstPackageExport{$<fl>3, *$<strp>1, *$3};
-                          if ($<scp>1) SYMP->exportItem($<scp>1, *$3); }
+                        { $$ = new AstPackageExport{$<fl>3, *$<strp>1, *$3}; }
         ;
 
 //**********************************************************************
@@ -1383,7 +1369,6 @@ module_declaration:             // ==IEEE: module_declaration
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
-                          SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
         |       udpFront portsStarE ';'
         /*cont*/    module_itemListE yENDPRIMITIVE endLabelE
@@ -1391,7 +1376,6 @@ module_declaration:             // ==IEEE: module_declaration
                           if ($2) $1->addStmtsp($2);
                           if ($4) $1->addStmtsp($4);
                           GRAMMARP->m_tracingParse = true;
-                          SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>6, $1, $6); }
         //
         |       yEXTERN modFront parameter_port_listE portsStarE ';'
@@ -1408,8 +1392,7 @@ modFront<nodeModulep>:
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive());
-                          PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$); }
+                          PARSEP->rootp()->addModulesp($$); }
         |       modFront sigAttrScope                   { $$ = $1; }
         ;
 
@@ -1430,8 +1413,7 @@ udpFront<nodeModulep>:
                           $$->modTrace(false);
                           $$->addStmtsp(new AstPragma{$<fl>3, VPragmaType::INLINE_MODULE});
                           GRAMMARP->m_tracingParse = false;
-                          PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$); }
+                          PARSEP->rootp()->addModulesp($$); }
         ;
 
 parameter_value_assignmentInstE<pinp>:      // IEEE: [ parameter_value_assignment ] for instance
@@ -1673,9 +1655,9 @@ port_declNetE:                  // IEEE: part of port_declaration, optional net
 
 portSig<nodep>:
                 id/*port*/
-                        { $$ = new AstPort{$<fl>1, PINNUMINC(), *$1}; SYMP->reinsert($$); }
+                        { $$ = new AstPort{$<fl>1, PINNUMINC(), *$1}; }
         |       idSVKwd
-                        { $$ = new AstPort{$<fl>1, PINNUMINC(), *$1}; SYMP->reinsert($$); }
+                        { $$ = new AstPort{$<fl>1, PINNUMINC(), *$1}; }
         ;
 
 //**********************************************************************
@@ -1688,8 +1670,7 @@ interface_declaration:          // IEEE: interface_declaration + interface_nonan
                         { if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
-                          $1->hasParameterList($<flag>2);
-                          SYMP->popScope($1); }
+                          $1->hasParameterList($<flag>2); }
         |       yEXTERN intFront parameter_port_listE portsStarE ';'
                         { BBUNSUP($<fl>1, "Unsupported: extern interface"); }
         ;
@@ -1699,8 +1680,7 @@ intFront<nodeModulep>:
                         { $$ = new AstIface{$<fl>3, *$3};
                           $$->inLibrary(true);
                           $$->lifetime($2);
-                          PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$); }
+                          PARSEP->rootp()->addModulesp($$); }
         |       intFront sigAttrScope                   { $$ = $1; }
         ;
 
@@ -1777,11 +1757,9 @@ program_declaration:            // IEEE: program_declaration + program_nonansi_h
                           if ($2) $1->addStmtsp($2);
                           if ($3) $1->addStmtsp($3);
                           if ($5) $1->addStmtsp($5);
-                          SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
         |       yEXTERN pgmFront parameter_port_listE portsStarE ';'
-                        { BBUNSUP($<fl>1, "Unsupported: extern program");
-                          SYMP->popScope($2); }
+                        { BBUNSUP($<fl>1, "Unsupported: extern program"); }
         ;
 
 pgmFront<nodeModulep>:
@@ -1791,8 +1769,7 @@ pgmFront<nodeModulep>:
                           $$->inLibrary(PARSEP->inLibrary() || $$->fileline()->celldefineOn());
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
-                          PARSEP->rootp()->addModulesp($$);
-                          SYMP->pushNew($$); }
+                          PARSEP->rootp()->addModulesp($$); }
         ;
 
 program_itemListE<nodep>:       // ==IEEE: [{ program_item }]
@@ -2303,13 +2280,13 @@ type_referenceEq<nodeExprp>:            // IEEE: type_reference (as an ==/!== ex
 struct_unionDecl<nodeUOrStructDTypep>:  // IEEE: part of data_type
         //                      // packedSigningE is NOP for unpacked
                 ySTRUCT        packedSigningE '{'
-        /*mid*/         { $<nodeUOrStructDTypep>$ = new AstStructDType{$1, $2}; SYMP->pushNew($<nodeUOrStructDTypep>$); }
+        /*mid*/         { $<nodeUOrStructDTypep>$ = new AstStructDType{$1, $2}; }
         /*cont*/    struct_union_memberListEnd
-                        { $$ = $<nodeUOrStructDTypep>4; $$->addMembersp($5); SYMP->popScope($$); }
+                        { $$ = $<nodeUOrStructDTypep>4; $$->addMembersp($5); }
         |       yUNION taggedSoftE packedSigningE '{'
-        /*mid*/         { $<nodeUOrStructDTypep>$ = new AstUnionDType{$1, $2, $3}; SYMP->pushNew($<nodeUOrStructDTypep>$); }
+        /*mid*/         { $<nodeUOrStructDTypep>$ = new AstUnionDType{$1, $2, $3}; }
         /*cont*/    struct_union_memberListEnd
-                        { $$ = $<nodeUOrStructDTypep>5; $$->addMembersp($6); SYMP->popScope($$); }
+                        { $$ = $<nodeUOrStructDTypep>5; $$->addMembersp($6); }
         ;
 
 struct_union_memberListEnd<memberDTypep>: // IEEE: { struct_union_member } '}'
@@ -3557,67 +3534,67 @@ seq_block<nodep>:               // ==IEEE: seq_block
         //                      // So need AstBegin's even if unnamed to scope variables down
                 seq_blockFront blockDeclStmtListE yEND endLabelE
                         { $$ = $1; $1->addStmtsp($2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
 
 seq_blockPreId<nodep>:          // IEEE: seq_block, but called with leading ID
                 seq_blockFrontPreId blockDeclStmtListE yEND endLabelE
                         { $$ = $1; $1->addStmtsp($2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
 
 par_block<nodep>:               // ==IEEE: par_block
                 par_blockFront blockDeclStmtListE yJOIN endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         |       par_blockFront blockDeclStmtListE yJOIN_ANY endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN_ANY);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         |       par_blockFront blockDeclStmtListE yJOIN_NONE endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN_NONE);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
 
 par_blockPreId<nodep>:          // ==IEEE: par_block but called with leading ID
                 par_blockFrontPreId blockDeclStmtListE yJOIN endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         |       par_blockFrontPreId blockDeclStmtListE yJOIN_ANY endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN_ANY);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         |       par_blockFrontPreId blockDeclStmtListE yJOIN_NONE endLabelE
                         { $$ = $1; $1->joinType(VJoinType::JOIN_NONE);
                           V3ParseGrammar::addForkStmtsp($1, $2);
-                          SYMP->popScope($1); GRAMMARP->endLabel($<fl>4, $1, $4); }
+                          GRAMMARP->endLabel($<fl>4, $1, $4); }
         ;
 
 seq_blockFront<beginp>:         // IEEE: part of seq_block
                 yBEGIN
-                        { $$ = new AstBegin{$1, "", nullptr};  SYMP->pushNew($$); }
+                        { $$ = new AstBegin{$1, "", nullptr}; }
         |       yBEGIN ':' idAny/*new-block_identifier*/
-                        { $$ = new AstBegin{$<fl>3, *$3, nullptr}; SYMP->pushNew($$); }
+                        { $$ = new AstBegin{$<fl>3, *$3, nullptr}; }
         ;
 
 par_blockFront<forkp>:          // IEEE: part of par_block
                 yFORK
-                        { $$ = new AstFork{$1, "", nullptr};  SYMP->pushNew($$); }
+                        { $$ = new AstFork{$1, "", nullptr}; }
         |       yFORK ':' idAny/*new-block_identifier*/
-                        { $$ = new AstFork{$<fl>3, *$3, nullptr}; SYMP->pushNew($$); }
+                        { $$ = new AstFork{$<fl>3, *$3, nullptr}; }
         ;
 
 seq_blockFrontPreId<beginp>:    // IEEE: part of seq_block/stmt with leading id
                 id/*block_identifier*/ yP_COLON__BEGIN yBEGIN
-                        { $$ = new AstBegin{$3, *$1, nullptr}; SYMP->pushNew($$); }
+                        { $$ = new AstBegin{$3, *$1, nullptr}; }
         ;
 
 par_blockFrontPreId<forkp>:     // IEEE: part of par_block/stmt with leading id
                 id/*block_identifier*/ yP_COLON__FORK yFORK
-                        { $$ = new AstFork{$3, *$1, nullptr}; SYMP->pushNew($$); }
+                        { $$ = new AstFork{$3, *$1, nullptr}; }
         ;
 
 
@@ -4617,7 +4594,7 @@ list_of_argumentsE<nodeExprp>:  // IEEE: [list_of_arguments]
 
 task_declaration<nodeFTaskp>:   // ==IEEE: task_declaration
                 yTASK dynamic_override_specifiersE lifetimeE taskId tfGuts yENDTASK endLabelE
-                        { $$ = $4; $$->addStmtsp($5); SYMP->popScope($$);
+                        { $$ = $4; $$->addStmtsp($5);
                           $$->baseOverride($2);
                           $$->lifetime($3);
                           GRAMMARP->endLabel($<fl>7, $$, $7); }
@@ -4625,9 +4602,9 @@ task_declaration<nodeFTaskp>:   // ==IEEE: task_declaration
 
 task_prototype<nodeFTaskp>:             // ==IEEE: task_prototype
                 yTASK dynamic_override_specifiersE taskId '(' tf_port_listE ')'
-                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); }
         |       yTASK dynamic_override_specifiersE taskId
-                        { $$ = $3; $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->prototype(true); }
         ;
 
 function_declaration<nodeFTaskp>:       // IEEE: function_declaration + function_body_declaration
@@ -4635,30 +4612,28 @@ function_declaration<nodeFTaskp>:       // IEEE: function_declaration + function
                         { $$ = $4; $4->attrIsolateAssign($5); $$->addStmtsp($6);
                           $$->baseOverride($2);
                           $$->lifetime($3);
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>8, $$, $8); }
         |       yFUNCTION dynamic_override_specifiersE lifetimeE funcIdNew funcIsolateE tfNewGuts yENDFUNCTION endLabelE
                         { $$ = $4; $4->attrIsolateAssign($5); $$->addStmtsp($6);
                           $$->baseOverride($2);
                           $$->lifetime($3);
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>8, $$, $8); }
         ;
 
 function_prototype<nodeFTaskp>: // IEEE: function_prototype
                 yFUNCTION dynamic_override_specifiersE funcId '(' tf_port_listE ')'
-                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); }
         |       yFUNCTION dynamic_override_specifiersE funcId
-                        { $$ = $3; $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->prototype(true); }
         ;
 
 class_constructor_prototype<nodeFTaskp>:        // ==IEEE: class_constructor_prototype
         //                      // IEEE has no dynamic_override_specifiersE,
         //                      // but required to avoid conflicts, so we must check after parsing
                 yFUNCTION dynamic_override_specifiersE funcIdNew '(' class_constructor_arg_listE ')' ';'
-                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->addStmtsp($5); $$->prototype(true); }
         |       yFUNCTION dynamic_override_specifiersE funcIdNew ';'
-                        { $$ = $3; $$->prototype(true); SYMP->popScope($$); }
+                        { $$ = $3; $$->prototype(true); }
         ;
 
 funcIsolateE<cint>:
@@ -4684,19 +4659,16 @@ lifetime<lifetime>:             // ==IEEE: lifetime
 
 taskId<nodeFTaskp>:
                 id
-                        { $$ = new AstTask{$<fl>$, *$1, nullptr};
-                          SYMP->pushNewUnderNodeOrCurrent($$, nullptr); }
+                        { $$ = new AstTask{$<fl>$, *$1, nullptr}; }
         //
         |       id/*interface_identifier*/ '.' idAny
                         { $$ = new AstTask{$<fl>$, *$3, nullptr};
-                          BBUNSUP($2, "Unsupported: Out of block function declaration");
-                          SYMP->pushNewUnderNodeOrCurrent($$, nullptr); }
+                          BBUNSUP($2, "Unsupported: Out of block function declaration"); }
         //
         |       packageClassScope id
                         { $$ = new AstTask{$<fl>$, *$2, nullptr};
                           $$->classOrPackagep($1);
-                          $$->classMethod(true);
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>1); }
+                          $$->classMethod(true); }
         ;
 
 funcId<nodeFTaskp>:             // IEEE: function_data_type_or_implicit + part of function_body_declaration
@@ -4705,30 +4677,24 @@ funcId<nodeFTaskp>:             // IEEE: function_data_type_or_implicit + part o
         //                      // implicit_type:empty vs data_type:ID
                 /**/ fIdScoped
                         { $$ = $1;
-                          $$->fvarp(new AstBasicDType{$<fl>1, LOGIC_IMPLICIT});
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>1); }
+                          $$->fvarp(new AstBasicDType{$<fl>1, LOGIC_IMPLICIT}); }
         |       signingE rangeList fIdScoped
                         { $$ = $3;
-                          $$->fvarp(GRAMMARP->addRange(new AstBasicDType{$<fl>3, LOGIC_IMPLICIT, $1}, $2, true));
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>3); }
+                          $$->fvarp(GRAMMARP->addRange(new AstBasicDType{$<fl>3, LOGIC_IMPLICIT, $1}, $2, true)); }
         |       signing fIdScoped
                         { $$ = $2;
-                          $$->fvarp(new AstBasicDType{$<fl>2, LOGIC_IMPLICIT, $1});
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>2); }
+                          $$->fvarp(new AstBasicDType{$<fl>2, LOGIC_IMPLICIT, $1}); }
         |       data_typeNoRef fIdScoped
                         { $$ = $2;
-                          $$->fvarp($1);
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>2); }
+                          $$->fvarp($1); }
         |       packageClassScopeE idInstType packed_dimensionListE fIdScoped
                         { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, nullptr};
                           $$ = $4;
-                          $$->fvarp(GRAMMARP->createArray(refp, $3, true));
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>4); }
+                          $$->fvarp(GRAMMARP->createArray(refp, $3, true)); }
         |       packageClassScopeE idInstType parameter_value_assignmentClass packed_dimensionListE fIdScoped
                         { AstRefDType* const refp = new AstRefDType{$<fl>2, *$2, $1, $3};
                           $$ = $5;
-                          $$->fvarp(GRAMMARP->createArray(refp, $4, true));
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>5); }
+                          $$->fvarp(GRAMMARP->createArray(refp, $4, true)); }
         //                      // To verilator tasks are the same as void functions (we separately detect time passing)
         |       yVOID taskId
                         { $$ = $2; }
@@ -4737,36 +4703,30 @@ funcId<nodeFTaskp>:             // IEEE: function_data_type_or_implicit + part o
 funcIdNew<nodeFTaskp>:          // IEEE: from class_constructor_declaration
                 yNEW__ETC
                         { $$ = new AstFunc{$<fl>1, "new", nullptr, nullptr};
-                          $$->isConstructor(true);
-                          SYMP->pushNewUnder($$, nullptr); }
+                          $$->isConstructor(true); }
         |       yNEW__PAREN
                         { $$ = new AstFunc{$<fl>1, "new", nullptr, nullptr};
-                          $$->isConstructor(true);
-                          SYMP->pushNewUnder($$, nullptr); }
+                          $$->isConstructor(true); }
         |       packageClassScopeNoId yNEW__PAREN
                         { $$ = new AstFunc{$<fl>2, "new", nullptr, nullptr};
                           $$->classOrPackagep($1);
                           $$->isConstructor(true);
-                          $$->classMethod(true);
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>1); }
+                          $$->classMethod(true); }
         ;
 
 fIdScoped<funcp>:               // IEEE: part of function_body_declaration/task_body_declaration
         //                      // IEEE: [ interface_identifier '.' | class_scope ] function_identifier
                 id
                         { $<fl>$ = $<fl>1;
-                          $<scp>$ = nullptr;
                           $$ = new AstFunc{$<fl>$, *$1, nullptr, nullptr}; }
         //
         |       id/*interface_identifier*/ '.' idAny
                         { $<fl>$ = $<fl>1;
-                          $<scp>$ = nullptr;
                           $$ = new AstFunc{$<fl>$, *$1, nullptr, nullptr};
                           BBUNSUP($2, "Unsupported: Out of block function declaration"); }
         //
         |       packageClassScope id
                         { $<fl>$ = $<fl>1;
-                          $<scp>$ = $<scp>1;
                           $$ = new AstFunc{$<fl>$, *$2, nullptr, nullptr};
                           $$->classMethod(true);
                           $$->classOrPackagep($1); }
@@ -4908,9 +4868,7 @@ dpi_import_export<nodep>:       // ==IEEE: dpi_import_export
                           $5->dpiContext($3 == iprop_CONTEXT);
                           $5->dpiPure($3 == iprop_PURE);
                           $5->dpiImport(true);
-                          GRAMMARP->checkDpiVer($1, *$2); v3Global.dpi(true);
-                          if ($$->prettyName()[0]=='$') SYMP->reinsert($$, nullptr, $$->prettyName());  // For $SysTF overriding
-                          SYMP->reinsert($$); }
+                          GRAMMARP->checkDpiVer($1, *$2); v3Global.dpi(true); }
         |       yIMPORT yaSTRING dpi_tf_import_propertyE dpi_importLabelE task_prototype ';'
                         { $$ = $5;
                           if (*$4 != "") $5->cname(*$4);
@@ -4918,9 +4876,7 @@ dpi_import_export<nodep>:       // ==IEEE: dpi_import_export
                           $5->dpiPure($3 == iprop_PURE);
                           $5->dpiImport(true);
                           $5->dpiTask(true);
-                          GRAMMARP->checkDpiVer($1, *$2); v3Global.dpi(true);
-                          if ($$->prettyName()[0]=='$') SYMP->reinsert($$, nullptr, $$->prettyName());  // For $SysTF overriding
-                          SYMP->reinsert($$); }
+                          GRAMMARP->checkDpiVer($1, *$2); v3Global.dpi(true); }
         |       yEXPORT yaSTRING dpi_importLabelE yFUNCTION idAny ';'
                         { $$ = new AstDpiExport{$<fl>5, *$5, *$3};
                           GRAMMARP->checkDpiVer($1, *$2); v3Global.dpi(true); }
@@ -5478,21 +5434,17 @@ stream_expressionOrDataType<nodep>:     // IEEE: from streaming_concatenation
 letId<letp>:  // IEEE: pert of let_declaration
                 idAny/*let_identifieer*/
                         { $<fl>$ = $<fl>1;
-                          $<scp>$ = nullptr;
-                          $$ = new AstLet{$<fl>$, *$1};
-                          SYMP->pushNewUnderNodeOrCurrent($$, $<scp>$); }
+                          $$ = new AstLet{$<fl>$, *$1}; }
         ;
 
 let_declaration<letp>:  // IEEE: let_declaration
                 yLET letId '=' expr ';'
                         { $$ = $2;
-                          $$->addStmtsp(new AstStmtExpr{$1, $4});
-                          SYMP->popScope($2); }
+                          $$->addStmtsp(new AstStmtExpr{$1, $4}); }
         |       yLET letId '(' let_port_listE ')' '=' expr ';'
                         { $$ = $2;
                           $$->addStmtsp(new AstStmtExpr{$1, $7});
-                          $$->addStmtsp($4);
-                          SYMP->popScope($2); }
+                          $$->addStmtsp($4); }
         ;
 
 let_port_listE<nodep>:   // IEEE: [ let_port_list ]
@@ -6316,7 +6268,6 @@ property_declaration<nodeFTaskp>:  // ==IEEE: property_declaration
                         { $$ = $1;
                           $$->addStmtsp($2);
                           $$->addStmtsp($4);
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>6, $$, $6);
                           GRAMMARP->m_insideProperty = false;
                           GRAMMARP->m_typedPropertyPort = false; }
@@ -6325,8 +6276,7 @@ property_declaration<nodeFTaskp>:  // ==IEEE: property_declaration
 property_declarationFront<nodeFTaskp>:  // IEEE: part of property_declaration
                 yPROPERTY idAny/*property_identifier*/
                         { $$ = new AstProperty{$<fl>2, *$2, nullptr};
-                          GRAMMARP->m_insideProperty = true;
-                          SYMP->pushNewUnderNodeOrCurrent($$, nullptr); }
+                          GRAMMARP->m_insideProperty = true; }
         ;
 
 property_port_listE<nodep>:  // IEEE: [ ( [ property_port_list ] ) ]
@@ -6404,15 +6354,13 @@ sequence_declaration<nodeFTaskp>:  // ==IEEE: sequence_declaration
                         { $$ = $1;
                           $$->addStmtsp($2);
                           $$->addStmtsp($4);
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>6, $$, $6); }
         ;
 
 sequence_declarationFront<nodeFTaskp>:  // IEEE: part of sequence_declaration
                 ySEQUENCE idAny/*new_sequence*/
                         { BBUNSUP($1, "Unsupported: sequence");
-                          $$ = new AstProperty{$<fl>2, *$2, nullptr};
-                          SYMP->pushNewUnderNodeOrCurrent($$, nullptr); }
+                          $$ = new AstProperty{$<fl>2, *$2, nullptr}; }
         ;
 
 sequence_port_listE<nodep>:  // IEEE: [ ( [ sequence_port_list ] ) ]
@@ -6765,28 +6713,24 @@ covergroup_declaration<nodep>:  // ==IEEE: covergroup_declaration
         /*cont*/    coverage_spec_or_optionListE
         /*cont*/    yENDGROUP endLabelE
                         { $$ = $1;
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>6, $1, $6); }
         |       covergroup_declarationFront '(' tf_port_listE ')'
         /*cont*/    coverage_eventE ';' coverage_spec_or_optionListE
         /*cont*/    yENDGROUP endLabelE
                         { $$ = $1;
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>9, $1, $9); }
         //                      // IEEE 1800-2023 added:
         |       covergroup_declarationFront yEXTENDS idAny/*covergroup_identifier*/
         /*cont*/    ';' coverage_spec_or_optionListE
         /*cont*/    yENDGROUP endLabelE
                         { $$ = $1;
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>7, $1, $7); }
         ;
 
 covergroup_declarationFront<classp>:  // IEEE: part of covergroup_declaration
                 yCOVERGROUP idAny
                         { $$ = new AstClass{$<fl>2, *$2};
-                          BBCOVERIGN($<fl>1, "Ignoring unsupported: covergroup");
-                          SYMP->pushNew($<constraintp>$); }
+                          BBCOVERIGN($<fl>1, "Ignoring unsupported: covergroup"); }
         ;
 
 cgexpr<nodeExprp>:  // IEEE-2012: covergroup_expression, before that just expression
@@ -7077,7 +7021,6 @@ rs_productionList<nodep>:  // IEEE: rs_production+
 rs_production<nodep>:  // ==IEEE: rs_production
                 rs_productionFront ':' rs_ruleList ';'
                         { // TODO makes a function, probably want a new Ast type instead
-                          SYMP->popScope($$);
                           $$ = nullptr; BBUNSUP($<fl>2, "Unsupported: randsequence production"); }
         ;
 
@@ -7185,7 +7128,6 @@ checker_declaration<nodeModulep>:  // ==IEEE: part of checker_declaration
                           $1->modTrace(GRAMMARP->allTracingOn($1->fileline()));
                           if ($2) $1->addStmtsp($2);
                           if ($4) $1->addStmtsp($4);
-                          SYMP->popScope($1);
                           GRAMMARP->endLabel($<fl>6, $1, $6); }
         ;
 
@@ -7194,8 +7136,7 @@ checkerFront<nodeModulep>:  // IEEE: part of checker_declaration
                         { $$ = new AstModule{$<fl>2, *$2, AstModule::Checker{}};
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
-                          $$->unconnectedDrive(PARSEP->unconnectedDrive());
-                          SYMP->pushNew($$); }
+                          $$->unconnectedDrive(PARSEP->unconnectedDrive()); }
         |       checkerFront sigAttrScope               { $$ = $1; }
         ;
 
@@ -7311,14 +7252,12 @@ class_declaration<nodep>:       // ==IEEE: part of class_declaration
                 classFront parameter_port_listE classExtendsE classImplementsE ';'
         /*mid*/         { // Allow resolving types declared in base extends class
                           $1->hasParameterList($<flag>2);
-                          if ($<scp>3) SYMP->importExtends($<scp>3);
                         }
         /*cont*/    class_itemListEnd endLabelE
                         { $$ = $1; $1->addMembersp($2);
                           $1->addExtendsp($3);
                           $1->addExtendsp($4);
                           $1->addMembersp($7);
-                          SYMP->popScope($$);
                           GRAMMARP->endLabel($<fl>8, $1, $8); }
         ;
 
@@ -7328,14 +7267,12 @@ classFront<classp>:             // IEEE: part of class_declaration
                         { $$ = new AstClass{$2, *$5};
                           $$->baseOverride($3);
                           $$->isVirtual($1);
-                          SYMP->pushNew($<classp>$);
                           v3Global.setHasClasses(); }
         //                      // IEEE: part of interface_class_declaration
         //                      // IEEE 1800-2023: lifetimeE removed
         |       yINTERFACE yCLASS idAny/*class_identifier*/
                         { $$ = new AstClass{$2, *$3};
                           $$->isInterfaceClass(true);
-                          SYMP->pushNew($<classp>$);
                           v3Global.setHasClasses(); }
         ;
 
@@ -7347,54 +7284,50 @@ classVirtualE<cbool>:
 classExtendsE<classExtendsp>:           // IEEE: part of class_declaration
         //                      // The classExtendsE rule relies on classFront having the
         //                      // new class scope correct via classFront
-                /* empty */                             { $$ = nullptr; $<scp>$ = nullptr; }
-        |       yEXTENDS classExtendsList               { $$ = $2; $<scp>$ = $<scp>2; }
+                /* empty */                             { $$ = nullptr; }
+        |       yEXTENDS classExtendsList               { $$ = $2; }
         ;
 
 classExtendsList<classExtendsp>:        // IEEE: part of class_declaration
-                classExtendsOne                         { $$ = $1; $<scp>$ = $<scp>1; }
-        |       classExtendsList ',' classExtendsOne    { $$ = addNextNull($1, $3); $<scp>$ = $<scp>3; }
+                classExtendsOne                         { $$ = $1; }
+        |       classExtendsList ',' classExtendsOne    { $$ = addNextNull($1, $3); }
         ;
 
 classExtendsOne<classExtendsp>:         // IEEE: part of class_declaration
                 class_typeExtImpList
-                        { $$ = new AstClassExtends{$1->fileline(), $1, GRAMMARP->m_inImplements};
-                          $<scp>$ = $<scp>1; }
+                        { $$ = new AstClassExtends{$1->fileline(), $1, GRAMMARP->m_inImplements}; }
         |       class_typeExtImpList '(' list_of_argumentsE ')'
                         { $$ = new AstClassExtends{$1->fileline(), $1, GRAMMARP->m_inImplements};
-                          $$->addArgsp($3);
-                          $<scp>$ = $<scp>1; }
+                          $$->addArgsp($3); }
         //                      // IEEE-2023: Added: yEXTENDS class_type '(' yDEFAULT ')'
         |       class_typeExtImpList '(' yDEFAULT ')'
                         { $$ = new AstClassExtends{$1->fileline(), $1, GRAMMARP->m_inImplements};
-                          BBUNSUP($<fl>2, "Unsupported: 'extends' with 'default'");
-                          $<scp>$ = $<scp>1; }
+                          BBUNSUP($<fl>2, "Unsupported: 'extends' with 'default'"); }
         ;
 
 classImplementsE<classExtendsp>:        // IEEE: part of class_declaration
         //                      // All 1800-2012
-                /* empty */                             { $$ = nullptr; $<scp>$ = nullptr; }
+                /* empty */                             { $$ = nullptr; }
         |       yIMPLEMENTS
-        /*mid*/         { GRAMMARP->m_inImplements = true; $<scp>$ = nullptr; }
+        /*mid*/         { GRAMMARP->m_inImplements = true; }
         /*cont*/    classImplementsList
-                        { $$ = $3; $<scp>$ = $<scp>3;
+                        { $$ = $3;
                           GRAMMARP->m_inImplements = false; }
         ;
 
 classImplementsList<classExtendsp>:     // IEEE: part of class_declaration
         //                      // All 1800-2012
-                classExtendsOne                         { $$ = $1; $<scp>$ = $<scp>1; }
+                classExtendsOne                         { $$ = $1; }
         |       classImplementsList ',' classExtendsOne
-                        { $$ = addNextNull($1, $3); $<scp>$ = $<scp>3; }
+                        { $$ = addNextNull($1, $3); }
         ;
 
 class_typeExtImpList<nodeExprp>:  // IEEE: class_type: "[package_scope] id [ parameter_value_assignment ]"
         //                      // but allow yaID__aTYPE for extends/implements
         //                      // If you follow the rules down, class_type is really a list via ps_class_identifier
-                class_typeExtImpOne                     { $$ = $1; $<scp>$ = $<scp>1; }
+                class_typeExtImpOne                     { $$ = $1; }
         |       class_typeExtImpList yP_COLONCOLON class_typeExtImpOne
-                        { $$ = new AstDot{$<fl>1, true, $1, $3};
-                          $<scp>$ = $<scp>3; }
+                        { $$ = new AstDot{$<fl>1, true, $1, $3}; }
         ;
 
 class_typeExtImpOne<nodeExprp>:  // part of IEEE: class_type, where we either get a package_scope component or class
@@ -7406,19 +7339,15 @@ class_typeExtImpOne<nodeExprp>:  // part of IEEE: class_type, where we either ge
                 idAny
         /*mid*/         { /* no nextId as not refing it above this*/ }
         /*cont*/    parameter_value_assignmentClassE
-                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $3};
-                          $<scp>$ = $<scp>1; }
+                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $3}; }
         |       idCC
         /*mid*/         { /* no nextId as not refing it above this*/ }
         /*cont*/    parameter_value_assignmentClassE
-                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $3};
-                          $<scp>$ = $<scp>1; }
+                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $3}; }
         //
         //                      // package_sopeIdFollows expanded
         |       yD_UNIT yP_COLONCOLON
-                        { $$ = new AstClassOrPackageRef{$<fl>1, "$unit", nullptr, nullptr};
-                          $<scp>$ = nullptr;  // No purpose otherwise, every symtab can see root
-                          SYMP->nextId(PARSEP->rootp()); }
+                        { $$ = new AstClassOrPackageRef{$<fl>1, "$unit", nullptr, nullptr}; }
         ;
 
 //=========
@@ -7429,7 +7358,7 @@ class_typeExtImpOne<nodeExprp>:  // part of IEEE: class_type, where we either ge
 //=== Below rules assume special scoping per above
 
 packageClassScopeNoId<nodep>:   // IEEE: [package_scope] not followed by yaID
-                packageClassScope                       { $$ = $1; $<scp>$ = $<scp>1; SYMP->nextId(nullptr); }
+                packageClassScope                       { $$ = $1; }
         ;
 
 packageClassScopeE<nodeExprp>:  // IEEE: [package_scope]
@@ -7437,8 +7366,8 @@ packageClassScopeE<nodeExprp>:  // IEEE: [package_scope]
         //                      //     if not needed must use packageClassScopeNoId
         //                      // TODO: To support classes should return generic type, not packagep
         //                      // class_qualifier := [ yLOCAL '::'  ] [ implicit_class_handle '.'  class_scope ]
-                /* empty */                             { $$ = nullptr; $<scp>$ = nullptr; }
-        |       packageClassScope                       { $$ = $1; $<scp>$ = $<scp>1; }
+                /* empty */                             { $$ = nullptr; }
+        |       packageClassScope                       { $$ = $1; }
         ;
 
 packageClassScope<nodeExprp>:   // IEEE: class_scope
@@ -7446,12 +7375,11 @@ packageClassScope<nodeExprp>:   // IEEE: class_scope
         //                      // IMPORTANT: The lexer will parse the following ID to be in the found package
         //                      //     if not needed must use packageClassScopeNoId
         //                      // In this parser <package_identifier>:: and <class_identifier>:: are indistinguishible
-        //                      // This copies <scp> to document it is important
-                packageClassScopeList                   { $$ = $1; $<scp>$ = $<scp>1; }
-        |       localNextId yP_COLONCOLON               { $$ = $1; $<scp>$ = $<scp>1; }
-        |       dollarUnitNextId yP_COLONCOLON          { $$ = $1; $<scp>$ = $<scp>1; }
+                packageClassScopeList                   { $$ = $1; }
+        |       localNextId yP_COLONCOLON               { $$ = $1; }
+        |       dollarUnitNextId yP_COLONCOLON          { $$ = $1; }
         |       dollarUnitNextId yP_COLONCOLON packageClassScopeList
-                        { $$ = new AstDot{$2, true, $1, $3}; $<scp>$ = $<scp>3; }
+                        { $$ = new AstDot{$2, true, $1, $3}; }
         ;
 
 packageClassScopeList<nodeExprp>:   // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE
@@ -7460,9 +7388,9 @@ packageClassScopeList<nodeExprp>:   // IEEE: class_type: "id [ parameter_value_a
         //                      //     if not needed must use packageClassScopeNoId
         //                      // In this parser <package_identifier>:: and <class_identifier>:: are indistinguishible
         //                      // If you follow the rules down, class_type is really a list via ps_class_identifier
-                packageClassScopeItem                   { $$ = $1; $<scp>$ = $<scp>1; }
+                packageClassScopeItem                   { $$ = $1; }
         |       packageClassScopeList packageClassScopeItem
-                        { $$ = new AstDot{$<fl>2, true, $1, $2}; $<scp>$ = $<scp>2; }
+                        { $$ = new AstDot{$<fl>2, true, $1, $2}; }
         ;
 
 packageClassScopeItem<nodeExprp>:   // IEEE: package_scope or [package_scope]::[class_scope]
@@ -7471,14 +7399,14 @@ packageClassScopeItem<nodeExprp>:   // IEEE: package_scope or [package_scope]::[
         //                      // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE
         //                      //vv mid rule action needed otherwise we might not have NextId in time to parse the id token
                 idCC
-        /*mid*/         { SYMP->nextId($<scp>1); }
+        /*mid*/         { }
         /*cont*/    yP_COLONCOLON
-                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, nullptr}; $<scp>$ = $<scp>1; }
+                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, nullptr}; }
         //
         |       idCC parameter_value_assignmentClass
-        /*mid*/         { SYMP->nextId($<scp>1); }   // Change next *after* we handle parameters, not before
+        /*mid*/         { }
         /*cont*/    yP_COLONCOLON
-                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $2}; $<scp>$ = $<scp>1; }
+                        { $$ = new AstClassOrPackageRef{$<fl>1, *$1, nullptr, $2}; }
         ;
 
 dollarUnitNextId<nodeExprp>:    // $unit
@@ -7486,8 +7414,7 @@ dollarUnitNextId<nodeExprp>:    // $unit
         //                      //     if not needed must use packageClassScopeNoId
         //                      // Must call nextId without any additional tokens following
                 yD_UNIT
-                        { $$ = new AstClassOrPackageRef{$1, "$unit", nullptr, nullptr};
-                          SYMP->nextId(PARSEP->rootp()); }
+                        { $$ = new AstClassOrPackageRef{$1, "$unit", nullptr, nullptr}; }
         ;
 
 localNextId<nodeExprp>:         // local::
@@ -7495,8 +7422,7 @@ localNextId<nodeExprp>:         // local::
         //                      //     if not needed must use packageClassScopeNoId
         //                      // Must call nextId without any additional tokens following
                 yLOCAL__COLONCOLON
-                        { $$ = new AstClassOrPackageRef{$1, "local::", nullptr, nullptr};
-                          /* No SYMP->nextId(...); normal search upward we should find local's vars */ }
+                        { $$ = new AstClassOrPackageRef{$1, "local::", nullptr, nullptr}; }
         ;
 
 //^^^=========
@@ -7597,22 +7523,21 @@ memberQualOne<qualifiers>:                      // IEEE: property_qualifier + me
 class_constraint<constraintp>:  // ==IEEE: class_constraint
         //                      // IEEE: constraint_declaration
                 constraintStaticE yCONSTRAINT dynamic_override_specifiersE constraintIdNew constraint_block
-                        { $$ = $4; $$->isStatic($1); $$->baseOverride($3); $$->addItemsp($5); SYMP->popScope($$); }
+                        { $$ = $4; $$->isStatic($1); $$->baseOverride($3); $$->addItemsp($5); }
         //                      // IEEE: constraint_prototype + constraint_prototype_qualifier
         |       constraintStaticE yCONSTRAINT dynamic_override_specifiersE constraintIdNew ';'
                         { $$ = $4; $$->isStatic($1); $$->baseOverride($3);
-                          $$->isExternProto(true); SYMP->popScope($$); }
+                          $$->isExternProto(true); }
         |       yEXTERN constraintStaticE yCONSTRAINT dynamic_override_specifiersE constraintIdNew ';'
                         { $$ = $5; $$->isStatic($2); $$->baseOverride($4);
-                          $$->isExternProto(true); $$->isExternExplicit(true); SYMP->popScope($$); }
+                          $$->isExternProto(true); $$->isExternExplicit(true); }
         |       yPURE constraintStaticE yCONSTRAINT constraintIdNew ';'
-                        { $$ = $4; $$->isKwdPure($1); $$->isStatic($2); SYMP->popScope($4); }
+                        { $$ = $4; $$->isKwdPure($1); $$->isStatic($2); }
         ;
 
 constraintIdNew<constraintp>:  // IEEE: id part of class_constraint
                 idAny/*constraint_identifier*/
-                        { $$ = new AstConstraint{$<fl>1, *$1, nullptr};
-                          SYMP->pushNewUnderNodeOrCurrent($$, nullptr); }
+                        { $$ = new AstConstraint{$<fl>1, *$1, nullptr}; }
         ;
 
 constraint_block<nodep>:  // ==IEEE: constraint_block
@@ -7711,7 +7636,7 @@ dist_item<distItemp>:  // ==IEEE: dist_item + dist_weight
 extern_constraint_declaration<constraintp>:  // ==IEEE: extern_constraint_declaration
                 constraintStaticE yCONSTRAINT dynamic_override_specifiersE packageClassScopeE constraintIdNew constraint_block
                         { $$ = $5; $$->isStatic($1); $$->isExternDef(true);
-                          $$->baseOverride($3); $$->classOrPackagep($4); $$->addItemsp($6); SYMP->popScope($5); }
+                          $$->baseOverride($3); $$->classOrPackagep($4); $$->addItemsp($6); }
         ;
 
 constraintStaticE<cbool>:  // IEEE: part of extern_constraint_declaration
diff --git a/test_regress/t/t_class_scope_import_bad.out b/test_regress/t/t_class_scope_import_bad.out
index d9fe115e4..6e1064205 100644
--- a/test_regress/t/t_class_scope_import_bad.out
+++ b/test_regress/t/t_class_scope_import_bad.out
@@ -1,5 +1,5 @@
-%Error: t/t_class_scope_import_bad.v:11:14: Import statement directly within a class scope is illegal
+%Error: t/t_class_scope_import_bad.v:11:11: Import statement directly within a class scope is illegal
    11 |    import pkg::*;
-      |              ^~
+      |           ^~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_import_name2_bad.out b/test_regress/t/t_lint_import_name2_bad.out
index 30fd80a44..6e9f3ada2 100644
--- a/test_regress/t/t_lint_import_name2_bad.out
+++ b/test_regress/t/t_lint_import_name2_bad.out
@@ -1,8 +1,8 @@
-%Error: t/t_lint_import_name2_bad.v:7:8: Importing from missing package 'missing'
+%Error: t/t_lint_import_name2_bad.v:7:8: Import package not found: 'missing'
     7 | import missing::sigs;
       |        ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_lint_import_name2_bad.v:9:8: Importing from missing package 'missing'
+%Error: t/t_lint_import_name2_bad.v:9:8: Import package not found: 'missing'
     9 | import missing::*;
       |        ^~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_import_name_bad.out b/test_regress/t/t_lint_import_name_bad.out
index 3d8aa4d22..fa655d214 100644
--- a/test_regress/t/t_lint_import_name_bad.out
+++ b/test_regress/t/t_lint_import_name_bad.out
@@ -1,5 +1,5 @@
-%Error: t/t_lint_import_name_bad.v:11:12: Import object not found: 'defs'
+%Error: t/t_lint_import_name_bad.v:11:8: Import object not found: 'defs'
    11 | import defs::sigs;
-      |            ^~
+      |        ^~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_importstar_bad.out b/test_regress/t/t_lint_importstar_bad.out
index 620847848..f28222e1e 100644
--- a/test_regress/t/t_lint_importstar_bad.out
+++ b/test_regress/t/t_lint_importstar_bad.out
@@ -1,6 +1,6 @@
-%Warning-IMPORTSTAR: t/t_lint_importstar_bad.v:11:12: Import::* in $unit scope may pollute global namespace
+%Warning-IMPORTSTAR: t/t_lint_importstar_bad.v:11:8: Import::* in $unit scope may pollute global namespace
    11 | import defs::*;
-      |            ^~
+      |        ^~~~
                      ... For warning description see https://verilator.org/warn/IMPORTSTAR?v=latest
                      ... Use "/* verilator lint_off IMPORTSTAR */" and lint_on around source to disable this message.
 %Error: Exiting due to
diff --git a/test_regress/t/t_no_std_bad.out b/test_regress/t/t_no_std_bad.out
index f4b668c23..987f67523 100644
--- a/test_regress/t/t_no_std_bad.out
+++ b/test_regress/t/t_no_std_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_no_std_bad.v:9:11: Importing from missing package 'std'
+%Error: t/t_no_std_bad.v:9:11: Import package not found: 'std'
     9 |    import std::*;
       |           ^~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_package_import_bad2.out b/test_regress/t/t_package_import_bad2.out
index 84264cfe9..584c7d98e 100644
--- a/test_regress/t/t_package_import_bad2.out
+++ b/test_regress/t/t_package_import_bad2.out
@@ -1,4 +1,4 @@
-%Error: t/t_package_import_bad2.v:12:11: Importing from missing package 'Pkg1b'
+%Error: t/t_package_import_bad2.v:12:11: Import package not found: 'Pkg1b'
    12 |    import Pkg1b::*;   
       |           ^~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_property_var_unsup.out b/test_regress/t/t_property_var_unsup.out
index fb7fb50db..9790a8e62 100644
--- a/test_regress/t/t_property_var_unsup.out
+++ b/test_regress/t/t_property_var_unsup.out
@@ -9,7 +9,4 @@
 %Error-UNSUPPORTED: t/t_property_var_unsup.v:24:31: Unsupported: property variable default value
    24 |    property with_def(int nine = 9);
       |                               ^
-%Error: Internal Error: t/t_property_var_unsup.v:7:8: ../V3ParseSym.h:#: Symbols suggest ending PROPERTY 'prop' but parser thinks ending MODULE 't'
-    7 | module t ( 
-      |        ^
-                        ... This fatal error may be caused by the earlier error(s); resolve those first.
+%Error: Exiting due to
diff --git a/test_regress/t/t_vlt_match_error_1.out b/test_regress/t/t_vlt_match_error_1.out
index ca1e68634..c57c35126 100644
--- a/test_regress/t/t_vlt_match_error_1.out
+++ b/test_regress/t/t_vlt_match_error_1.out
@@ -1,4 +1,4 @@
-%Error: t/t_vlt_match_error.v:17:12: Importing from missing package 'hi'
+%Error: t/t_vlt_match_error.v:17:12: Import package not found: 'hi'
    17 |     import hi::*;
       |            ^~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.

From b26658fd96ddca68ae9aeaf86b5c45632e38ef03 Mon Sep 17 00:00:00 2001
From: Yutetsu TAKATSUKASA <y.takatsukasa@gmail.com>
Date: Sun, 18 May 2025 20:18:37 +0900
Subject: [PATCH 084/211] Fix wrong optimization result of shifted out variable
 (#6016) (#6019)

---
 src/V3Const.cpp              | 20 ++++++++++++++++----
 test_regress/t/t_opt_const.v | 29 +++++++++++++++++++++++++++++
 2 files changed, 45 insertions(+), 4 deletions(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 5f9be643d..e893c5133 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -119,13 +119,25 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
             m_constp = constp;
             m_msb = constp->widthMin() - 1;
         }
+        // updateBitRange(), limitBitRangeToLsb(), and polarity() must be called during ascending
+        // back to the root.
+        void updateBitRange(int newLsb, int newMsb) {
+            if ((m_lsb <= m_msb && newLsb > newMsb) || (m_lsb > m_msb && m_lsb < newLsb)) {
+                // When the new bit range is out of m_refp, clear polarity because nodes below is
+                // shifted out to zero.
+                // This kind of clear may happen several times. e.g. (!(1'b1 >> 1)) >> 1
+                polarity(true);
+            }
+            m_lsb = newLsb;
+            m_msb = newMsb;
+        }
         void updateBitRange(const AstCCast* castp) {
-            m_msb = std::min(m_msb, m_lsb + castp->width() - 1);
+            updateBitRange(m_lsb, std::min(m_msb, m_lsb + castp->width() - 1));
         }
         void updateBitRange(const AstShiftR* shiftp) {
-            m_lsb += VN_AS(shiftp->rhsp(), Const)->toUInt();
+            updateBitRange(m_lsb + VN_AS(shiftp->rhsp(), Const)->toUInt(), m_msb);
         }
-        void limitBitRangeToLsb() { m_msb = std::min(m_msb, m_lsb); }
+        void limitBitRangeToLsb() { updateBitRange(m_lsb, std::min(m_msb, m_lsb)); }
         int wordIdx() const { return m_wordIdx; }
         void wordIdx(int i) { m_wordIdx = i; }
         bool polarity() const { return m_polarity; }
@@ -467,6 +479,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
         // Don't restore m_polarity for Xor as it counts parity of the entire tree
         if (!isXorTree()) m_polarity = !m_polarity;
         if (m_leafp && castp) m_leafp->updateBitRange(castp);
+        if (m_leafp) m_leafp->polarity(!m_leafp->polarity());
     }
     void visit(AstWordSel* nodep) override {
         CONST_BITOP_RETURN_IF(!m_leafp, nodep);
@@ -479,7 +492,6 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
     void visit(AstVarRef* nodep) override {
         CONST_BITOP_RETURN_IF(!m_leafp, nodep);
         m_leafp->setLeaf(nodep);
-        m_leafp->polarity(m_polarity);
     }
     void visit(AstConst* nodep) override {
         CONST_BITOP_RETURN_IF(!m_leafp, nodep);
diff --git a/test_regress/t/t_opt_const.v b/test_regress/t/t_opt_const.v
index 970774fe3..be0e361c1 100644
--- a/test_regress/t/t_opt_const.v
+++ b/test_regress/t/t_opt_const.v
@@ -154,6 +154,7 @@ module Test(/*AUTOARG*/
    bug4864 i_bug4864(.clk(clk), .in(d), .out(bug4864_out));
    bug5186 i_bug5186(.clk(clk), .in(d), .out(bug5186_out));
    bug5993 i_bug5993(.clk(clk), .in(d[10]));
+   bug6016 i_bug6016(.clk(clk), .in(d[10]));
 
 endmodule
 
@@ -593,4 +594,32 @@ module bug5993(input wire clk, input wire in);
       in4 <= in ?  8'b00111__0__10 : 8'b00111__1__10;
       checkd(wire_2, 1'b0);
    end
+   endmodule
+
+// See issue #6016
+// When traversing a tree, a signal may be shifted out.
+// Then the polarity has to be cleared, but was not.
+// "(!in[18]) > 1" should be 0, but was not.
+module bug6016(input wire clk, input wire in);
+   reg in0;
+   reg signed [7:0] in4;
+   wire [1:0] wire_0;
+   wire out20;
+
+   // verilator lint_off WIDTH
+   assign wire_0 = in4[0:0] ? ({{7{in4[3:1]}}, 12'd201} & 2'h2) : (!(in0) >> 9'b1111);
+   // verilator lint_on WIDTH
+   assign out20 = wire_0[0:0];
+
+   logic in_s1 = 1'b0;
+   always @(posedge clk) begin
+      in_s1 <= in;
+      if (in) begin
+         in4 <= 8'b1111_1110;
+         in0 <= 1'b0;
+      end
+      if (in_s1) begin
+         if (out20 != 1'b0) $stop;
+      end
+   end
 endmodule

From 27eb8cfe8aa5b358765fbf62ea7f7bcac17cd88e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 18 May 2025 11:25:25 -0400
Subject: [PATCH 085/211] Fix extraneous WIDTH warning on assoc.exists()

---
 src/V3Width.cpp          | 4 ++--
 test_regress/t/t_assoc.v | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 555518daa..2d80c44f1 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -3498,7 +3498,7 @@ class WidthVisitor final : public VNVisitor {
             AstNodeExpr* const index_exprp = methodCallWildcardIndexExpr(nodep, adtypep);
             newp = new AstCMethodHard{nodep->fileline(), nodep->fromp()->unlinkFrBack(), "exists",
                                       index_exprp->unlinkFrBack()};
-            newp->dtypeSetSigned32();
+            newp->dtypeSetLogicUnsized(32, 1, VSigning::SIGNED);
         } else if (nodep->name() == "delete") {  // function void delete([input integer index])
             methodOkArguments(nodep, 0, 1);
             methodCallLValueRecurse(nodep, nodep->fromp(), VAccess::WRITE);
@@ -3590,7 +3590,7 @@ class WidthVisitor final : public VNVisitor {
             AstNodeExpr* const index_exprp = methodCallAssocIndexExpr(nodep, adtypep);
             newp = new AstCMethodHard{nodep->fileline(), nodep->fromp()->unlinkFrBack(), "exists",
                                       index_exprp->unlinkFrBack()};
-            newp->dtypeSetSigned32();
+            newp->dtypeSetLogicUnsized(32, 1, VSigning::SIGNED);
         } else if (nodep->name() == "delete") {  // function void delete([input integer index])
             methodOkArguments(nodep, 0, 1);
             methodCallLValueRecurse(nodep, nodep->fromp(), VAccess::WRITE);
diff --git a/test_regress/t/t_assoc.v b/test_regress/t/t_assoc.v
index a37acf9f1..24760e758 100644
--- a/test_regress/t/t_assoc.v
+++ b/test_regress/t/t_assoc.v
@@ -37,7 +37,9 @@ module t (/*AUTOARG*/
          v = a[4'd3]; `checks(v, "fooed");
          v = a[4'd2]; `checks(v, "bared");
          i = a.exists(4'd0); `checkh(i, 0);
+         if (a.exists(4'd0)) $stop;  // Check no width warning
          i = a.exists(4'd2); `checkh(i, 1);
+         if (!a.exists(4'd2)) $stop;  // Check no width warning
          i = a.first(k); `checkh(i, 1); `checks(k, 4'd2);
          i = a.next(k); `checkh(i, 1); `checks(k, 4'd3);
          i = a.next(k); `checkh(i, 0);

From f74c67da46a7c967f984f01e8b6c245f1ade07f5 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 19 May 2025 02:13:37 +0100
Subject: [PATCH 086/211] CI: Add variable to explicitly enable some GitHub
 workflows (#6021)

To run scheduled instances of the RTLMeter or coverage workflows, the
ENABLE_SCHEDULED_JOBS variable must explicitly be set to 'true' in the
repository settings. This enables each fork to decide whether to run the
scheduled instances or not.
---
 .github/workflows/coverage.yml | 2 ++
 .github/workflows/rtlmeter.yml | 8 +++++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/.github/workflows/coverage.yml b/.github/workflows/coverage.yml
index af79c09b6..aaa990d00 100644
--- a/.github/workflows/coverage.yml
+++ b/.github/workflows/coverage.yml
@@ -26,6 +26,8 @@ defaults:
 jobs:
 
   Build:
+    # Only run scheduled jobs if explicitly enabled for that repo (e.g.: not on forks)
+    if: ${{ github.event_name != 'schedule' || vars.ENABLE_SCHEDULED_JOBS == 'true' }}
     runs-on: ubuntu-24.04
     env:
       CI_BUILD_STAGE_NAME: build
diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index 549da1950..0d575b03d 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -24,6 +24,8 @@ concurrency:
 jobs:
   build-gcc:
     name: Build GCC
+    # Only run scheduled jobs if explicitly enabled for that repo (e.g.: not on forks)
+    if: ${{ github.event_name != 'schedule' || vars.ENABLE_SCHEDULED_JOBS == 'true' }}
     uses: ./.github/workflows/reusable-rtlmeter-build.yml
     with:
       runs-on: ubuntu-24.04
@@ -31,6 +33,8 @@ jobs:
 
   build-clang:
     name: Build Clang
+    # Only run scheduled jobs if explicitly enabled for that repo (e.g.: not on forks)
+    if: ${{ github.event_name != 'schedule' || vars.ENABLE_SCHEDULED_JOBS == 'true' }}
     uses: ./.github/workflows/reusable-rtlmeter-build.yml
     with:
       runs-on: ubuntu-24.04
@@ -119,7 +123,9 @@ jobs:
   combine-results:
     name: Combine results
     needs: [run-gcc, run-clang]
-    if: ${{ always() }}  # Run even if dependencies failed
+    # Run if any of the dependencies have run, even if failed.
+    # That is: do not run if all skipped, or the workflow was cancelled.
+    if: ${{ (contains(needs.*.result, 'success') || contains(needs.*.result, 'failure')) && !cancelled() }}
     runs-on: ubuntu-24.04
     steps:
       - name: Download all GCC results

From ad08302e5f8b037ecd9fc804226e2e144af56b4b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 19 May 2025 08:35:27 -0400
Subject: [PATCH 087/211] Support parameter forward types.

---
 Changes                                 |  1 +
 src/V3Ast.h                             | 27 ++++++++++++++++
 src/V3AstNodeDType.h                    | 14 ++++++---
 src/V3LinkParse.cpp                     |  7 +++--
 src/V3Param.cpp                         | 18 +++++++++++
 src/V3ParseImp.h                        |  1 +
 src/verilog.y                           | 38 +++++++++++++---------
 test_regress/t/t_concat_string.py       |  2 +-
 test_regress/t/t_param_type_fwd.out     | 32 -------------------
 test_regress/t/t_param_type_fwd.py      |  2 +-
 test_regress/t/t_param_type_fwd.v       | 22 ++++++++++---
 test_regress/t/t_param_type_fwd_bad.out | 42 +++++++++++++++++++++++++
 test_regress/t/t_param_type_fwd_bad.py  | 16 ++++++++++
 test_regress/t/t_param_type_fwd_bad.v   | 30 ++++++++++++++++++
 14 files changed, 192 insertions(+), 60 deletions(-)
 delete mode 100644 test_regress/t/t_param_type_fwd.out
 create mode 100644 test_regress/t/t_param_type_fwd_bad.out
 create mode 100755 test_regress/t/t_param_type_fwd_bad.py
 create mode 100644 test_regress/t/t_param_type_fwd_bad.v

diff --git a/Changes b/Changes
index 72c929dc7..d8f1d20b5 100644
--- a/Changes
+++ b/Changes
@@ -17,6 +17,7 @@ Verilator 5.037 devel
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
+* Support parameter forward types.
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Fix filename backslash escapes in C code (#5947).
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 2a4f84617..46a0c6f0d 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -287,6 +287,33 @@ public:
 
 // ######################################################################
 
+class VFwdType final {
+public:
+    enum en : uint8_t { NONE, ENUM, STRUCT, UNION, CLASS, INTERFACE_CLASS };
+    enum en m_e;
+    const char* ascii() const {
+        static const char* const names[]
+            = {"none", "enum", "struct", "union", "class", "interface class"};
+        return names[m_e];
+    }
+    VFwdType()
+        : m_e{NONE} {}
+    // cppcheck-suppress noExplicitConstructor
+    constexpr VFwdType(en _e)
+        : m_e{_e} {}
+    explicit VFwdType(int _e)
+        : m_e(static_cast<en>(_e)) {}  // Need () or GCC 4.8 false warning
+    constexpr operator en() const { return m_e; }
+};
+constexpr bool operator==(const VFwdType& lhs, const VFwdType& rhs) { return lhs.m_e == rhs.m_e; }
+constexpr bool operator==(const VFwdType& lhs, VFwdType::en rhs) { return lhs.m_e == rhs; }
+constexpr bool operator==(VFwdType::en lhs, const VFwdType& rhs) { return lhs == rhs.m_e; }
+inline std::ostream& operator<<(std::ostream& os, const VFwdType& rhs) {
+    return os << rhs.ascii();
+}
+
+// ######################################################################
+
 class VSigning final {
 public:
     enum en : uint8_t {
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index b27494736..3b4aa1f84 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -1006,12 +1006,14 @@ class AstParamTypeDType final : public AstNodeDType {
     // A parameter type statement; much like a var or typedef
     // @astgen op1 := childDTypep : Optional[AstNodeDType]
     const VVarType m_varType;  // Type of variable (for localparam vs. param)
+    const VFwdType m_fwdType;  // Forward type for lint check
     string m_name;  // Name of variable
 public:
-    AstParamTypeDType(FileLine* fl, VVarType type, const string& name, VFlagChildDType,
-                      AstNodeDType* dtp)
+    AstParamTypeDType(FileLine* fl, VVarType type, VFwdType fwdType, const string& name,
+                      VFlagChildDType, AstNodeDType* dtp)
         : ASTGEN_SUPER_ParamTypeDType(fl)
         , m_varType{type}
+        , m_fwdType{fwdType}
         , m_name{name} {
         childDTypep(dtp);  // Only for parser
         dtypep(nullptr);  // V3Width will resolve
@@ -1036,6 +1038,7 @@ public:
     bool hasDType() const override VL_MT_SAFE { return true; }
     void name(const string& flag) override { m_name = flag; }
     VVarType varType() const { return m_varType; }  // * = Type of variable
+    VFwdType fwdType() const { return m_fwdType; }
     bool isParam() const { return true; }
     bool isGParam() const { return (varType() == VVarType::GPARAM); }
     bool isCompound() const override {
@@ -1047,9 +1050,11 @@ class AstParseTypeDType final : public AstNodeDType {
     // Parents: VAR
     // During parsing, this indicates the type of a parameter is a "parameter type"
     // e.g. the data type is a container of any data type
+    const VFwdType m_fwdType;  // Forward type for lint check
 public:
-    explicit AstParseTypeDType(FileLine* fl)
-        : ASTGEN_SUPER_ParseTypeDType(fl) {}
+    explicit AstParseTypeDType(FileLine* fl, VFwdType fwdType = VFwdType::NONE)
+        : ASTGEN_SUPER_ParseTypeDType(fl)
+        , m_fwdType{fwdType} {}
     ASTGEN_MEMBERS_AstParseTypeDType;
     AstNodeDType* dtypep() const VL_MT_STABLE { return nullptr; }
     // METHODS
@@ -1061,6 +1066,7 @@ public:
         v3fatalSrc("call isCompound on subdata type, not reference");
         return false;
     }
+    VFwdType fwdType() const { return m_fwdType; }
 };
 class AstQueueDType final : public AstNodeDType {
     // Queue array data type, ie "[ $ ]"
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 1c650b51e..16050d065 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -322,7 +322,7 @@ class LinkParseVisitor final : public VNVisitor {
             nodep->v3warn(NEWERSTD,
                           "Parameter requires default value, or use IEEE 1800-2009 or later.");
         }
-        if (VN_IS(nodep->subDTypep(), ParseTypeDType)) {
+        if (AstParseTypeDType* const ptypep = VN_CAST(nodep->subDTypep(), ParseTypeDType)) {
             // It's a parameter type. Use a different node type for this.
             AstNode* dtypep = nodep->valuep();
             if (dtypep) {
@@ -331,8 +331,9 @@ class LinkParseVisitor final : public VNVisitor {
                 dtypep = new AstVoidDType{nodep->fileline()};
             }
             AstNode* const newp = new AstParamTypeDType{
-                nodep->fileline(), nodep->varType(), nodep->name(), VFlagChildDType{},
-                new AstRequireDType{nodep->fileline(), dtypep}};
+                nodep->fileline(), nodep->varType(),
+                ptypep->fwdType(), nodep->name(),
+                VFlagChildDType{}, new AstRequireDType{nodep->fileline(), dtypep}};
             nodep->replaceWith(newp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
             return;
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index bfee3e4fe..b0a12f8dd 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -782,6 +782,24 @@ class ParamProcessor final {
                 // Constify may have caused pinp->exprp to change
                 rawTypep = VN_AS(pinp->exprp(), NodeDType);
                 exprp = rawTypep->skipRefToNonRefp();
+                bool ok = true;
+                switch (modvarp->fwdType()) {
+                case VFwdType::NONE: ok = true; break;
+                case VFwdType::ENUM: ok = VN_IS(exprp, EnumDType); break;
+                case VFwdType::STRUCT: ok = VN_IS(exprp, StructDType); break;
+                case VFwdType::UNION: ok = VN_IS(exprp, UnionDType); break;
+                case VFwdType::CLASS: ok = VN_IS(exprp, ClassRefDType); break;
+                case VFwdType::INTERFACE_CLASS:  // TODO: Over permissive for now:
+                    ok = VN_IS(exprp, ClassRefDType);
+                    break;
+                default: modvarp->v3fatalSrc("Bad case");
+                }
+                if (!ok) {
+                    pinp->v3error("Parameter type expression type "
+                                  << exprp->prettyDTypeNameQ()
+                                  << " violates parameter's forwarding type '"
+                                  << modvarp->fwdType().ascii() << "'");
+                }
                 if (exprp->similarDType(origp)) {
                     // Setting parameter to its default value.  Just ignore it.
                     // This prevents making additional modules, and makes coverage more
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index c7895d3f3..9dededfdb 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -125,6 +125,7 @@ struct V3ParseBisonYYSType final {
         VAttrType::en attrtypeen;
         VAssertType::en asserttypeen;
         VAssertDirectiveType::en assertdirectivetypeen;
+        VFwdType::en fwdtype;
         VLifetime::en lifetime;
         VStrength::en strength;
 
diff --git a/src/verilog.y b/src/verilog.y
index 74c322350..3e4ed1251 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1916,9 +1916,11 @@ parameter_declarationFront:     // IEEE: local_ or parameter_declaration w/o ass
 
 parameter_declarationTypeFront: // IEEE: local_ or parameter_declaration w/o assignment
         //                      // Front must execute first so VARDTYPE is ready before list of vars
-                varParamReset yTYPE__ETC                { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$2}); }
-        |       varParamReset yTYPE__ETC forward_type   { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$2});
-                                                          BBUNSUP($<fl>1, "Unsupported: 'parameter type' forward type"); }
+                varParamReset yTYPE__ETC
+                        { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$2}); }
+        |       varParamReset yTYPE__ETC forward_type
+                        { /*VARRESET-in-varParam*/
+                          AstNodeDType* const dtp = new AstParseTypeDType{$2, $3}; VARDTYPE(dtp); }
         ;
 
 parameter_port_declarationFrontE: // IEEE: local_ or parameter_port_declaration w/o assignment
@@ -1939,20 +1941,26 @@ parameter_port_declarationTypeFrontE: // IEEE: parameter_port_declaration w/o as
         //                      // IEEE: parameter_declaration (minus assignment)
         //                      // IEEE: local_parameter_declaration (minus assignment)
         //                      // Front must execute first so VARDTYPE is ready before list of vars
-                varParamReset yTYPE__ETC                { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$2}); }
-        |       varParamReset yTYPE__ETC forward_type   { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$2});
-                                                          BBUNSUP($<fl>1, "Unsupported: 'parameter type' forward type"); }
-        |       yTYPE__ETC                              { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$1}); }
-        |       yTYPE__ETC forward_type                 { /*VARRESET-in-varParam*/ VARDTYPE(new AstParseTypeDType{$1});
-                                                          BBUNSUP($<fl>1, "Unsupported: 'parameter type' forward type"); }
+                varParamReset yTYPE__ETC
+                        { /*VARRESET-in-varParam*/
+                          AstNodeDType* const dtp = new AstParseTypeDType{$2}; VARDTYPE(dtp); }
+        |       varParamReset yTYPE__ETC forward_type
+                        { /*VARRESET-in-varParam*/
+                          AstNodeDType* const dtp = new AstParseTypeDType{$2, $3}; VARDTYPE(dtp); }
+        |       yTYPE__ETC
+                        { /*VARRESET-in-varParam*/
+                          AstNodeDType* const dtp = new AstParseTypeDType{$1}; VARDTYPE(dtp); }
+        |       yTYPE__ETC forward_type
+                        { /*VARRESET-in-varParam*/
+                          AstNodeDType* const dtp = new AstParseTypeDType{$1, $2}; VARDTYPE(dtp); }
         ;
 
-forward_type:  // ==IEEE: forward_type
-                yENUM                                   { }
-        |       ySTRUCT                                 { }
-        |       yUNION                                  { }
-        |       yCLASS                                  { }
-        |       yINTERFACE yCLASS                       { }
+forward_type<fwdtype>:  // ==IEEE: forward_type
+                yENUM                                   { $$ = VFwdType::ENUM; }
+        |       ySTRUCT                                 { $$ = VFwdType::STRUCT; }
+        |       yUNION                                  { $$ = VFwdType::UNION; }
+        |       yCLASS                                  { $$ = VFwdType::CLASS; }
+        |       yINTERFACE yCLASS                       { $$ = VFwdType::INTERFACE_CLASS; }
         ;
 
 net_declaration<nodep>:         // IEEE: net_declaration - excluding implict
diff --git a/test_regress/t/t_concat_string.py b/test_regress/t/t_concat_string.py
index 2b17673d7..262a0d4b4 100755
--- a/test_regress/t/t_concat_string.py
+++ b/test_regress/t/t_concat_string.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-signal.alarm(5)  # 5s timeout
+signal.alarm(15)  # 15s timeout
 
 test.compile()
 
diff --git a/test_regress/t/t_param_type_fwd.out b/test_regress/t/t_param_type_fwd.out
deleted file mode 100644
index e2b38098f..000000000
--- a/test_regress/t/t_param_type_fwd.out
+++ /dev/null
@@ -1,32 +0,0 @@
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:10:4: Unsupported: 'parameter type' forward type
-   10 |    parameter type enum E_t;
-      |    ^~~~~~~~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:11:4: Unsupported: 'parameter type' forward type
-   11 |    parameter type struct S_t;
-      |    ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:12:4: Unsupported: 'parameter type' forward type
-   12 |    parameter type union U_t;
-      |    ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:13:4: Unsupported: 'parameter type' forward type
-   13 |    parameter type class C_t;
-      |    ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:14:4: Unsupported: 'parameter type' forward type
-   14 |    parameter type interface class IC_t;
-      |    ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:17:13: Unsupported: 'parameter type' forward type
-   17 | class Cls #(parameter type enum E_t,
-      |             ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:18:13: Unsupported: 'parameter type' forward type
-   18 |             parameter type struct S_t,
-      |             ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:19:13: Unsupported: 'parameter type' forward type
-   19 |             parameter type union U_t,
-      |             ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:20:13: Unsupported: 'parameter type' forward type
-   20 |             parameter type class C_t,
-      |             ^~~~~~~~~
-%Error-UNSUPPORTED: t/t_param_type_fwd.v:21:13: Unsupported: 'parameter type' forward type
-   21 |             parameter type interface class IC_t);
-      |             ^~~~~~~~~
-%Error: Exiting due to
diff --git a/test_regress/t/t_param_type_fwd.py b/test_regress/t/t_param_type_fwd.py
index e33e10acf..f81c3d68d 100755
--- a/test_regress/t/t_param_type_fwd.py
+++ b/test_regress/t/t_param_type_fwd.py
@@ -11,6 +11,6 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(fails=True, expect_filename=test.golden_filename)
+test.lint()
 
 test.passes()
diff --git a/test_regress/t/t_param_type_fwd.v b/test_regress/t/t_param_type_fwd.v
index 375495398..f84a2d567 100644
--- a/test_regress/t/t_param_type_fwd.v
+++ b/test_regress/t/t_param_type_fwd.v
@@ -4,9 +4,19 @@
 // without warranty, 2024 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
-// Test for trace file interface aliasing
+typedef enum { ONE } e_t;
 
-module m;
+typedef struct { int m_i; } s_t;
+
+typedef union { int m_i; } u_t;
+
+class c_t;
+endclass
+
+interface class ic_t;
+endclass
+
+module sub;
    parameter type enum E_t;
    parameter type struct S_t;
    parameter type union U_t;
@@ -21,6 +31,10 @@ class Cls #(parameter type enum E_t,
             parameter type interface class IC_t);
 endclass
 
-module t (/*AUTOARG*/);
-   // TODO proper test
+module t;
+   sub #(.E_t(e_t), .S_t(s_t), .U_t(u_t), .C_t(c_t), .IC_t(ic_t)) sub();
+   Cls #(.E_t(e_t), .S_t(s_t), .U_t(u_t), .C_t(c_t), .IC_t(ic_t)) c;
+   initial begin
+      c = new;
+   end
 endmodule
diff --git a/test_regress/t/t_param_type_fwd_bad.out b/test_regress/t/t_param_type_fwd_bad.out
new file mode 100644
index 000000000..42da02e1f
--- /dev/null
+++ b/test_regress/t/t_param_type_fwd_bad.out
@@ -0,0 +1,42 @@
+%Error: t/t_param_type_fwd_bad.v:25:11: Parameter type expression type 'int' violates parameter's forwarding type 'enum'
+                                      : ... note: In instance 't'
+   25 |    sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+      |           ^~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_param_type_fwd_bad.v:25:24: Parameter type expression type 'int' violates parameter's forwarding type 'struct'
+                                      : ... note: In instance 't'
+   25 |    sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+      |                        ^~~
+%Error: t/t_param_type_fwd_bad.v:25:37: Parameter type expression type 'int' violates parameter's forwarding type 'union'
+                                      : ... note: In instance 't'
+   25 |    sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+      |                                     ^~~
+%Error: t/t_param_type_fwd_bad.v:25:50: Parameter type expression type 'int' violates parameter's forwarding type 'class'
+                                      : ... note: In instance 't'
+   25 |    sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+      |                                                  ^~~
+%Error: t/t_param_type_fwd_bad.v:25:63: Parameter type expression type 'int' violates parameter's forwarding type 'interface class'
+                                      : ... note: In instance 't'
+   25 |    sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+      |                                                               ^~~~
+%Error: t/t_param_type_fwd_bad.v:26:11: Parameter type expression type 'int' violates parameter's forwarding type 'enum'
+                                      : ... note: In instance 't'
+   26 |    Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+      |           ^~~
+%Error: t/t_param_type_fwd_bad.v:26:24: Parameter type expression type 'int' violates parameter's forwarding type 'struct'
+                                      : ... note: In instance 't'
+   26 |    Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+      |                        ^~~
+%Error: t/t_param_type_fwd_bad.v:26:37: Parameter type expression type 'int' violates parameter's forwarding type 'union'
+                                      : ... note: In instance 't'
+   26 |    Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+      |                                     ^~~
+%Error: t/t_param_type_fwd_bad.v:26:50: Parameter type expression type 'int' violates parameter's forwarding type 'class'
+                                      : ... note: In instance 't'
+   26 |    Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+      |                                                  ^~~
+%Error: t/t_param_type_fwd_bad.v:26:63: Parameter type expression type 'int' violates parameter's forwarding type 'interface class'
+                                      : ... note: In instance 't'
+   26 |    Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+      |                                                               ^~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_param_type_fwd_bad.py b/test_regress/t/t_param_type_fwd_bad.py
new file mode 100755
index 000000000..e33e10acf
--- /dev/null
+++ b/test_regress/t/t_param_type_fwd_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_param_type_fwd_bad.v b/test_regress/t/t_param_type_fwd_bad.v
new file mode 100644
index 000000000..5a9e1820f
--- /dev/null
+++ b/test_regress/t/t_param_type_fwd_bad.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+typedef int int_t;
+
+module sub;
+   parameter type enum E_t;
+   parameter type struct S_t;
+   parameter type union U_t;
+   parameter type class C_t;
+   parameter type interface class IC_t;
+endmodule
+
+class Cls #(parameter type enum E_t,
+            parameter type struct S_t,
+            parameter type union U_t,
+            parameter type class C_t,
+            parameter type interface class IC_t);
+endclass
+
+module t (/*AUTOARG*/);
+   sub #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) sub();
+   Cls #(.E_t(int_t), .S_t(int_t), .U_t(int_t), .C_t(int_t), .IC_t(int_t)) c;
+   initial begin
+      c = new;
+   end
+endmodule

From bed0456eca6a24baff55261ec3be2e2783a95f73 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Mon, 19 May 2025 15:35:35 +0200
Subject: [PATCH 088/211] Add ternary operator into branch coverage (#5880)

---
 src/V3Clean.cpp                              |    5 +
 src/V3Coverage.cpp                           |   81 +-
 src/V3Slice.cpp                              |   13 +-
 src/V3Task.cpp                               |   19 +-
 src/V3Tristate.cpp                           |   12 +
 test_regress/t/t_cover_line.out              |  119 ++
 test_regress/t/t_cover_line.v                |   70 +
 test_regress/t/t_cover_line.vlt              |    4 +-
 test_regress/t/t_cover_line_cc.info.out      |  314 ++--
 test_regress/t/t_cover_line_expr.out         |  480 ++++++
 test_regress/t/t_cover_line_expr_cc.py       |   28 +
 test_regress/t/t_cover_line_trace.out        | 1382 +++++++++++-------
 test_regress/t/t_cover_line_tri_gate_cond.py |   24 +
 13 files changed, 1907 insertions(+), 644 deletions(-)
 create mode 100644 test_regress/t/t_cover_line_expr.out
 create mode 100755 test_regress/t/t_cover_line_expr_cc.py
 create mode 100755 test_regress/t/t_cover_line_tri_gate_cond.py

diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index 970675062..00590c5c8 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -202,6 +202,11 @@ class CleanVisitor final : public VNVisitor {
         operandQuadop(nodep);
         setClean(nodep, nodep->cleanOut());
     }
+    void visit(AstExprStmt* nodep) override {
+        iterateChildren(nodep);
+        computeCppWidth(nodep);
+        setClean(nodep, isClean(nodep->resultp()));
+    }
     void visit(AstNodeExpr* nodep) override {
         iterateChildren(nodep);
         computeCppWidth(nodep);
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index af5f3b679..6e22199b4 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -142,6 +142,7 @@ class CoverageVisitor final : public VNVisitor {
     bool m_objective = false;  // Expression objective
     bool m_ifCond = false;  // Visiting if condition
     bool m_inToggleOff = false;  // In function/task etc
+    bool m_inLoopNotBody = false;  // Inside a loop, but not in its body
     string m_beginHier;  // AstBegin hier name for user coverage points
 
     // STATE - cleared each module
@@ -290,7 +291,28 @@ class CoverageVisitor final : public VNVisitor {
     // we can cover expressions in while loops, but the counting goes outside
     // the while, see: "minimally-intelligent decision about ... clock domain"
     // in the Toggle Coverage docs
-    void visit(AstWhile* nodep) override { iterateProcedure(nodep, false); }
+    void visit(AstWhile* nodep) override {
+        VL_RESTORER(m_state);
+        VL_RESTORER(m_inToggleOff);
+        m_inToggleOff = true;
+        createHandle(nodep);
+        {
+            VL_RESTORER(m_inLoopNotBody);
+            m_inLoopNotBody = true;
+            iterateAndNextNull(nodep->precondsp());
+            iterateNull(nodep->condp());
+            iterateAndNextNull(nodep->incsp());
+        }
+        iterateAndNextNull(nodep->stmtsp());
+        if (m_state.lineCoverageOn(nodep)) {
+            lineTrack(nodep);
+            AstNode* const newp
+                = newCoverInc(nodep->fileline(), "", "v_line", "block", linesCov(m_state, nodep),
+                              0, traceNameForLine(nodep, "block"));
+            insertProcStatement(nodep, newp);
+        }
+    }
+
     void visit(AstNodeFTask* nodep) override {
         if (!nodep->dpiImport()) iterateProcedure(nodep);
     }
@@ -312,11 +334,11 @@ class CoverageVisitor final : public VNVisitor {
             nodep->v3fatalSrc("Bad node type");
         }
     }
-    void iterateProcedure(AstNode* nodep, bool exprProc = true) {
+    void iterateProcedure(AstNode* nodep) {
         VL_RESTORER(m_state);
         VL_RESTORER(m_exprStmtsp);
         VL_RESTORER(m_inToggleOff);
-        if (exprProc) m_exprStmtsp = nodep;
+        m_exprStmtsp = nodep;
         m_inToggleOff = true;
         createHandle(nodep);
         iterateChildren(nodep);
@@ -482,8 +504,56 @@ class CoverageVisitor final : public VNVisitor {
                                << dtypep->prettyTypeName());
         }
     }
+    bool includeCondToBranchRecursive(const AstNode* const nodep) {
+        const AstNode* const backp = nodep->backp();
+        if (VN_IS(backp, Cond) && VN_AS(backp, Cond)->condp() != nodep) {
+            return includeCondToBranchRecursive(backp);
+        } else if (VN_IS(backp, Sel) && VN_AS(backp, Sel)->fromp() == nodep) {
+            return includeCondToBranchRecursive(backp);
+        } else if (VN_IS(backp, NodeAssign) && VN_AS(backp, NodeAssign)->rhsp() == nodep
+                   && !m_inLoopNotBody) {
+            return true;
+        }
+        return false;
+    }
 
     // VISITORS - LINE COVERAGE
+    void visit(AstCond* nodep) override {
+        UINFO(4, " COND: " << nodep << endl);
+
+        if (m_seeking == NONE) coverExprs(nodep->condp());
+
+        if (m_state.lineCoverageOn(nodep) && VN_IS(m_modp, Module)
+            && includeCondToBranchRecursive(nodep)) {
+            VL_RESTORER(m_seeking);
+            // Disable expression coverage in sub-expressions, since they were already visited
+            m_seeking = ABORTED;
+
+            const CheckState lastState = m_state;
+            createHandle(nodep);
+            iterate(nodep->thenp());
+            lineTrack(nodep);
+            AstNodeExpr* const thenp = nodep->thenp()->unlinkFrBack();
+            nodep->thenp(new AstExprStmt{thenp->fileline(),
+                                         newCoverInc(nodep->fileline(), "", "v_branch",
+                                                     "cond_then", linesCov(m_state, nodep), 0,
+                                                     traceNameForLine(nodep, "cond_then")),
+                                         thenp});
+            m_state = lastState;
+            createHandle(nodep);
+            iterate(nodep->elsep());
+            AstNodeExpr* const elsep = nodep->elsep()->unlinkFrBack();
+            nodep->elsep(new AstExprStmt{elsep->fileline(),
+                                         newCoverInc(nodep->fileline(), "", "v_branch",
+                                                     "cond_else", linesCov(m_state, nodep), 1,
+                                                     traceNameForLine(nodep, "cond_else")),
+                                         elsep});
+
+            m_state = lastState;
+        } else {
+            lineTrack(nodep);
+        }
+    }
     // Note not AstNodeIf; other types don't get covered
     void visit(AstIf* nodep) override {
         if (nodep->user2()) return;
@@ -904,11 +974,6 @@ class CoverageVisitor final : public VNVisitor {
         }
     }
 
-    void visit(AstCond* nodep) override {
-        if (m_seeking == NONE) coverExprs(nodep->condp());
-        lineTrack(nodep);
-    }
-
     void visit(AstFuncRef* nodep) override {
         if (nodep->taskp()->lifetime().isAutomatic()) {
             visit(static_cast<AstNodeExpr*>(nodep));
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 5aaf4767e..27f123791 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -203,9 +203,18 @@ class SliceVisitor final : public VNVisitor {
                                          : elemIdx));
             newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTree(false, needPure),
                                    leOffset};
+        } else if (AstExprStmt* const snodep = VN_CAST(nodep, ExprStmt)) {
+            UINFO(9, "  cloneExprStmt(" << elements << "," << elemIdx << ") " << nodep << endl);
+            AstNodeExpr* const resultSelp
+                = cloneAndSel(snodep->resultp(), elements, elemIdx, needPure);
+            if (snodep->stmtsp()) {
+                return new AstExprStmt{nodep->fileline(), snodep->stmtsp()->unlinkFrBackWithNext(),
+                                       resultSelp};
+            } else {
+                return resultSelp;
+            }
         } else if (VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel) || VN_IS(nodep, CMethodHard)
-                   || VN_IS(nodep, MemberSel) || VN_IS(nodep, ExprStmt)
-                   || VN_IS(nodep, StructSel)) {
+                   || VN_IS(nodep, MemberSel) || VN_IS(nodep, StructSel)) {
             UINFO(9, "  cloneSel(" << elements << "," << elemIdx << ") " << nodep << endl);
             const int leOffset = !arrayp->rangep()->ascending()
                                      ? arrayp->rangep()->elementsConst() - 1 - elemIdx
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 1cfe49025..0c139f185 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -144,6 +144,13 @@ public:
     void checkPurity(AstNodeFTask* nodep) { checkPurity(nodep, getFTaskVertex(nodep)); }
 
 private:
+    void convertAssignWToAlways() {
+        // Wire assigns must become always statements to deal with insertion
+        // of multiple statements.  Perhaps someday make all wassigns into always's?
+        UINFO(5, "     IM_WireRep  " << m_assignwp << endl);
+        m_assignwp->convertToAlways();
+        VL_DO_CLEAR(pushDeletep(m_assignwp), m_assignwp = nullptr);
+    }
     void checkPurity(AstNodeFTask* nodep, TaskBaseVertex* vxp) {
         if (nodep->recursive()) return;  // Impure, but no warning
         if (!vxp->pure()) {
@@ -191,15 +198,13 @@ private:
         m_assignwp = nodep;
         VL_DO_DANGLING(iterateChildren(nodep), nodep);  // May delete nodep.
     }
+    void visit(AstExprStmt* nodep) override {
+        if (m_assignwp) convertAssignWToAlways();
+        iterateChildren(nodep);
+    }
     void visit(AstNodeFTaskRef* nodep) override {
         // Includes handling AstMethodCall, AstNew
-        if (m_assignwp) {
-            // Wire assigns must become always statements to deal with insertion
-            // of multiple statements.  Perhaps someday make all wassigns into always's?
-            UINFO(5, "     IM_WireRep  " << m_assignwp << endl);
-            m_assignwp->convertToAlways();
-            VL_DO_CLEAR(pushDeletep(m_assignwp), m_assignwp = nullptr);
-        }
+        if (m_assignwp) convertAssignWToAlways();
         // We make multiple edges if a task is called multiple times from another task.
         UASSERT_OBJ(nodep->taskp(), nodep, "Unlinked task");
         TaskFTaskVertex* const taskVtxp = getFTaskVertex(nodep->taskp());
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index ce8b541b4..c7f889f6c 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -1117,6 +1117,18 @@ class TristateVisitor final : public TristateBaseVisitor {
         }
     }
 
+    void visit(AstExprStmt* nodep) override {
+        iterateChildren(nodep);
+        if (m_graphing) {
+            UASSERT_OBJ(!m_alhs, nodep, "AstExprStmt node on the LHS of assignment");
+            associateLogic(nodep->resultp(), nodep);
+        } else if (nodep->resultp()->user1p()) {
+            nodep->user1p(getEnp(nodep->resultp()));
+            nodep->resultp()->user1p(nullptr);
+            m_tgraph.didProcess(nodep);
+        }
+    }
+
     void visit(AstSel* nodep) override {
         if (m_graphing) {
             iterateChildren(nodep);
diff --git a/test_regress/t/t_cover_line.out b/test_regress/t/t_cover_line.out
index ec76b5936..484f5c365 100644
--- a/test_regress/t/t_cover_line.out
+++ b/test_regress/t/t_cover_line.out
@@ -50,6 +50,10 @@
                      // Inputs
                      .clk                       (clk));
            par par1 (/*AUTOINST*/);
+           cond cond1 (/*AUTOINST*/
+                       // Inputs
+                       .clk                     (clk),
+                       .cyc                     (cyc));
         
  000010    always @ (posedge clk) begin
 +000010  point: comment=block hier=top.t
@@ -415,3 +419,118 @@
         
         endmodule
         
+        package my_pkg;
+%000001    int x = 1 ? 1 : 0;
+-000001  point: comment=block hier=top.my_pkg
+        endpackage
+        
+%000001 class Getter1;
+-000001  point: comment=block hier=top.$unit::Getter1__Vclpkg
+ 000020    function int get_1;
++000020  point: comment=block hier=top.$unit::Getter1__Vclpkg
+ 000020       return 1;
++000020  point: comment=block hier=top.$unit::Getter1__Vclpkg
+           endfunction
+        endclass
+        
+        module cond(input logic clk, input int cyc);
+           logic a, b, c, d, e, f, g, h, k, l, m;
+           logic [5:0] tab;
+           typedef logic [7:0] arr_t[1:0];
+           arr_t data[1:0];
+%000001    Getter1 getter1 = new;
+-000001  point: comment=block hier=top.t.cond1
+           string s;
+        
+ 000021    function logic func_side_effect;
++000021  point: comment=block hier=top.t.cond1
+ 000021       $display("SIDE EFFECT");
++000021  point: comment=block hier=top.t.cond1
+ 000021       return 1;
++000021  point: comment=block hier=top.t.cond1
+           endfunction
+        
+ 000010    function arr_t get_arr;
++000010  point: comment=block hier=top.t.cond1
+              arr_t arr;
+ 000010       return arr;
++000010  point: comment=block hier=top.t.cond1
+           endfunction
+        
+~000031    assign a = (cyc == 0) ? clk : 1'bz;
+-000000  point: comment=cond_then hier=top.t.cond1
++000031  point: comment=cond_else hier=top.t.cond1
+~000028    assign b = (cyc == 1) ? clk : 0;
+-000003  point: comment=cond_then hier=top.t.cond1
++000028  point: comment=cond_else hier=top.t.cond1
+~000021    assign c = func_side_effect() ? clk : 0;
++000021  point: comment=cond_then hier=top.t.cond1
+-000000  point: comment=cond_else hier=top.t.cond1
+ 000010    always @(posedge clk) begin
++000010  point: comment=block hier=top.t.cond1
+~000010       d = (cyc % 3 == 0) ? 1 : 0;
++000010  point: comment=block hier=top.t.cond1
+-000003  point: comment=cond_then hier=top.t.cond1
+-000007  point: comment=cond_else hier=top.t.cond1
+~000010       s = (getter1.get_1() == 0) ? "abcd" : $sformatf("%d", getter1.get_1()[4:0]);
++000010  point: comment=block hier=top.t.cond1
+-000000  point: comment=cond_then hier=top.t.cond1
++000010  point: comment=cond_else hier=top.t.cond1
+           end
+~000019    assign e = (cyc % 3 == 1) ? (clk ? 1 : 0) : 1;
++000012  point: comment=cond_then hier=top.t.cond1
++000019  point: comment=cond_else hier=top.t.cond1
+-000007  point: comment=cond_then hier=top.t.cond1
+-000005  point: comment=cond_else hier=top.t.cond1
+        
+           // ternary operator in condition shouldn't be included to the coverae
+~000011    assign f = (cyc != 0 ? 1 : 0) ? 1 : 0;
++000011  point: comment=cond_then hier=top.t.cond1
+-000000  point: comment=cond_else hier=top.t.cond1
+           // the same as in index
+           assign tab[clk ? 1 : 0] = 1;
+           assign m = tab[clk ? 3 : 4];
+        
+           for (genvar i = 0; i < 2; i++) begin
+ 000011       assign g = clk ? 1 : 0;
++000010  point: comment=cond_then hier=top.t.cond1
++000011  point: comment=cond_else hier=top.t.cond1
+           end
+        
+ 000011    always begin
++000011  point: comment=block hier=top.t.cond1
+~000010       if (cyc == 5) h = cyc > 5 ? 1 : 0;
+-000000  point: comment=cond_then hier=top.t.cond1
+-000001  point: comment=cond_else hier=top.t.cond1
+-000001  point: comment=if hier=top.t.cond1
++000010  point: comment=else hier=top.t.cond1
+ 000010       else h = 1;
++000010  point: comment=else hier=top.t.cond1
+        
+~000011       data[0] = (cyc == 2) ? '{8'h01, 8'h02} : get_arr();
++000011  point: comment=block hier=top.t.cond1
+-000001  point: comment=cond_then hier=top.t.cond1
++000010  point: comment=cond_else hier=top.t.cond1
+        
+              // ternary operator in conditions should be skipped
+ 000055       for (int i = 0; (i < 5) ? 1 : 0; i++) begin
++000011  point: comment=block hier=top.t.cond1
++000055  point: comment=block hier=top.t.cond1
+ 000055          k = 1'(i);
++000055  point: comment=block hier=top.t.cond1
+              end
+ 000044       for (int i = 0; i < 7; i = (i > 4) ? i + 1 : i + 2) begin
++000011  point: comment=block hier=top.t.cond1
++000044  point: comment=block hier=top.t.cond1
+ 000044          k = 1'(i);
++000044  point: comment=block hier=top.t.cond1
+              end
+        
+~000011       if (k ? 1 : 0) k = 1;
+-000000  point: comment=if hier=top.t.cond1
++000011  point: comment=else hier=top.t.cond1
+ 000011       else k = 0;
++000011  point: comment=else hier=top.t.cond1
+           end
+        endmodule
+        
diff --git a/test_regress/t/t_cover_line.v b/test_regress/t/t_cover_line.v
index 6baed34b9..391497371 100644
--- a/test_regress/t/t_cover_line.v
+++ b/test_regress/t/t_cover_line.v
@@ -47,6 +47,10 @@ module t (/*AUTOARG*/
              // Inputs
              .clk                       (clk));
    par par1 (/*AUTOINST*/);
+   cond cond1 (/*AUTOINST*/
+               // Inputs
+               .clk                     (clk),
+               .cyc                     (cyc));
 
    always @ (posedge clk) begin
       if (cyc!=0) begin
@@ -291,3 +295,69 @@ module par();
    endfunction
 
 endmodule
+
+package my_pkg;
+   int x = 1 ? 1 : 0;
+endpackage
+
+class Getter1;
+   function int get_1;
+      return 1;
+   endfunction
+endclass
+
+module cond(input logic clk, input int cyc);
+   logic a, b, c, d, e, f, g, h, k, l, m;
+   logic [5:0] tab;
+   typedef logic [7:0] arr_t[1:0];
+   arr_t data[1:0];
+   Getter1 getter1 = new;
+   string s;
+
+   function logic func_side_effect;
+      $display("SIDE EFFECT");
+      return 1;
+   endfunction
+
+   function arr_t get_arr;
+      arr_t arr;
+      return arr;
+   endfunction
+
+   assign a = (cyc == 0) ? clk : 1'bz;
+   assign b = (cyc == 1) ? clk : 0;
+   assign c = func_side_effect() ? clk : 0;
+   always @(posedge clk) begin
+      d = (cyc % 3 == 0) ? 1 : 0;
+      s = (getter1.get_1() == 0) ? "abcd" : $sformatf("%d", getter1.get_1()[4:0]);
+   end
+   assign e = (cyc % 3 == 1) ? (clk ? 1 : 0) : 1;
+
+   // ternary operator in condition shouldn't be included to the coverae
+   assign f = (cyc != 0 ? 1 : 0) ? 1 : 0;
+   // the same as in index
+   assign tab[clk ? 1 : 0] = 1;
+   assign m = tab[clk ? 3 : 4];
+
+   for (genvar i = 0; i < 2; i++) begin
+      assign g = clk ? 1 : 0;
+   end
+
+   always begin
+      if (cyc == 5) h = cyc > 5 ? 1 : 0;
+      else h = 1;
+
+      data[0] = (cyc == 2) ? '{8'h01, 8'h02} : get_arr();
+
+      // ternary operator in conditions should be skipped
+      for (int i = 0; (i < 5) ? 1 : 0; i++) begin
+         k = 1'(i);
+      end
+      for (int i = 0; i < 7; i = (i > 4) ? i + 1 : i + 2) begin
+         k = 1'(i);
+      end
+
+      if (k ? 1 : 0) k = 1;
+      else k = 0;
+   end
+endmodule
diff --git a/test_regress/t/t_cover_line.vlt b/test_regress/t/t_cover_line.vlt
index 2778e4d4d..05502c414 100644
--- a/test_regress/t/t_cover_line.vlt
+++ b/test_regress/t/t_cover_line.vlt
@@ -6,6 +6,6 @@
 
 `verilator_config
 
-coverage_block_off -file "t/t_cover_line.v" -lines 141
-coverage_block_off -file "t/t_cover_line.v" -lines 175
+coverage_block_off -file "t/t_cover_line.v" -lines 145
+coverage_block_off -file "t/t_cover_line.v" -lines 179
 coverage_block_off -module "beta" -block "block"
diff --git a/test_regress/t/t_cover_line_cc.info.out b/test_regress/t/t_cover_line_cc.info.out
index 72c9727ab..72f6b2ce8 100644
--- a/test_regress/t/t_cover_line_cc.info.out
+++ b/test_regress/t/t_cover_line_cc.info.out
@@ -2,148 +2,210 @@ TN:verilator_coverage
 SF:t/t_cover_line.v
 DA:15,1
 DA:18,1
-DA:51,10
-DA:52,10
-BRDA:52,0,0,10
-BRDA:52,0,1,0
-DA:53,10
-DA:54,10
-DA:56,9
-BRDA:56,0,0,1
-BRDA:56,0,1,9
-DA:57,9
-BRDA:57,0,0,1
-BRDA:57,0,1,9
-DA:58,1
-DA:59,1
-DA:62,9
-BRDA:62,0,0,1
-BRDA:62,0,1,9
-DA:63,9
-BRDA:63,0,0,1
-BRDA:63,0,1,9
-DA:65,9
+DA:55,10
+DA:56,10
+BRDA:56,0,0,10
+BRDA:56,0,1,0
+DA:57,10
+DA:58,10
+DA:60,9
+BRDA:60,0,0,1
+BRDA:60,0,1,9
+DA:61,9
+BRDA:61,0,0,1
+BRDA:61,0,1,9
+DA:62,1
+DA:63,1
 DA:66,9
+BRDA:66,0,0,1
+BRDA:66,0,1,9
+DA:67,9
+BRDA:67,0,0,1
+BRDA:67,0,1,9
 DA:69,9
-BRDA:69,0,0,1
-BRDA:69,0,1,9
 DA:70,9
-BRDA:70,0,0,1
-BRDA:70,0,1,9
-DA:71,1
-DA:72,1
-DA:75,9
-DA:76,9
-DA:79,1
-DA:80,1
-DA:81,1
+DA:73,9
+BRDA:73,0,0,1
+BRDA:73,0,1,9
+DA:74,9
+BRDA:74,0,0,1
+BRDA:74,0,1,9
+DA:75,1
+DA:76,1
+DA:79,9
+DA:80,9
 DA:83,1
 DA:84,1
 DA:85,1
-DA:87,7
-BRDA:87,0,0,1
-BRDA:87,0,1,7
+DA:87,1
 DA:88,1
 DA:89,1
-DA:92,7
-DA:93,7
-DA:96,0
-DA:97,0
-DA:98,0
+DA:91,7
+BRDA:91,0,0,1
+BRDA:91,0,1,7
+DA:92,1
+DA:93,1
+DA:96,7
+DA:97,7
 DA:100,0
-DA:101,10
-BRDA:101,0,0,0
-BRDA:101,0,1,10
-DA:102,10
-BRDA:102,0,0,0
-BRDA:102,0,1,10
-DA:103,0
-DA:106,1
-DA:107,1
-DA:109,1
+DA:101,0
+DA:102,0
+DA:104,0
+DA:105,10
+BRDA:105,0,0,0
+BRDA:105,0,1,10
+DA:106,10
+BRDA:106,0,0,0
+BRDA:106,0,1,10
+DA:107,0
+DA:110,1
 DA:111,1
-DA:116,7
-BRDA:116,0,0,1
-BRDA:116,0,1,7
-DA:117,1
-DA:118,1
-DA:123,1
-DA:125,1
-DA:136,20
-DA:137,18
-BRDA:137,0,0,2
-BRDA:137,0,1,18
-DA:138,2
+DA:113,1
+DA:115,1
+DA:120,7
+BRDA:120,0,0,1
+BRDA:120,0,1,7
+DA:121,1
+DA:122,1
+DA:127,1
+DA:129,1
+DA:140,20
 DA:141,18
-DA:160,20
-DA:161,20
-DA:162,20
-BRDA:162,0,0,0
-BRDA:162,0,1,20
-DA:164,0
-DA:166,18
-BRDA:166,0,0,2
-BRDA:166,0,1,18
-DA:168,2
+BRDA:141,0,0,2
+BRDA:141,0,1,18
+DA:142,2
+DA:145,18
+DA:164,20
+DA:165,20
+DA:166,20
+BRDA:166,0,0,0
+BRDA:166,0,1,20
+DA:168,0
 DA:170,18
-DA:184,1
-DA:185,1
-DA:186,1
-BRDA:186,0,0,1
-BRDA:186,0,1,0
-DA:187,1
-DA:190,11
-DA:191,11
-BRDA:191,0,0,11
-BRDA:191,0,1,0
-DA:192,11
+BRDA:170,0,0,2
+BRDA:170,0,1,18
+DA:172,2
+DA:174,18
+DA:188,1
+DA:189,1
+DA:190,1
+BRDA:190,0,0,1
+BRDA:190,0,1,0
+DA:191,1
+DA:194,11
 DA:195,11
+BRDA:195,0,0,11
+BRDA:195,0,1,0
 DA:196,11
-BRDA:196,0,0,11
-BRDA:196,0,1,0
-DA:197,11
-DA:211,10
-DA:212,10
-DA:215,11
-DA:217,11
-DA:218,10
-BRDA:218,0,0,1
-BRDA:218,0,1,10
-DA:219,1
-DA:221,10
-BRDA:221,0,0,1
-BRDA:221,0,1,10
-DA:222,1
-DA:225,11
+DA:199,11
+DA:200,11
+BRDA:200,0,0,11
+BRDA:200,0,1,0
+DA:201,11
+DA:215,10
+DA:216,10
+DA:219,11
+DA:221,11
+DA:222,10
+BRDA:222,0,0,1
+BRDA:222,0,1,10
+DA:223,1
+DA:225,10
+BRDA:225,0,0,1
+BRDA:225,0,1,10
 DA:226,1
-DA:227,11
-DA:228,11
-DA:248,10
-DA:249,9
-BRDA:249,0,0,1
-BRDA:249,0,1,9
-DA:251,1
-DA:252,1
-BRDA:252,0,0,0
-BRDA:252,0,1,1
-DA:261,10
-DA:262,10
-DA:263,1
-DA:264,1
-DA:265,1
-DA:266,1
+DA:229,11
+DA:230,1
+DA:231,11
+DA:232,11
+DA:252,10
+DA:253,9
+BRDA:253,0,0,1
+BRDA:253,0,1,9
+DA:255,1
+DA:256,1
+BRDA:256,0,0,0
+BRDA:256,0,1,1
+DA:265,10
+DA:266,10
 DA:267,1
-DA:268,5
-DA:272,10
-DA:273,10
-DA:283,0
-DA:284,0
-BRDA:284,0,0,0
-BRDA:284,0,1,0
-DA:285,0
+DA:268,1
+DA:269,1
+DA:270,1
+DA:271,1
+DA:272,5
+DA:276,10
+DA:277,10
 DA:287,0
 DA:288,0
-DA:290,0
-BRF:44
-BRH:10
+BRDA:288,0,0,0
+BRDA:288,0,1,0
+DA:289,0
+DA:291,0
+DA:292,0
+DA:294,0
+DA:300,1
+DA:303,1
+DA:304,20
+DA:305,20
+DA:314,1
+DA:317,21
+DA:318,21
+DA:319,21
+DA:322,10
+DA:324,10
+DA:327,31
+BRDA:327,0,0,0
+BRDA:327,0,1,31
+DA:328,28
+BRDA:328,0,0,3
+BRDA:328,0,1,28
+DA:329,21
+BRDA:329,0,0,21
+BRDA:329,0,1,0
+DA:330,10
+DA:331,10
+BRDA:331,0,0,10
+BRDA:331,0,1,3
+BRDA:331,0,2,7
+DA:332,10
+BRDA:332,0,0,10
+BRDA:332,0,1,0
+BRDA:332,0,2,10
+DA:334,19
+BRDA:334,0,0,12
+BRDA:334,0,1,19
+BRDA:334,0,2,7
+BRDA:334,0,3,5
+DA:337,11
+BRDA:337,0,0,11
+BRDA:337,0,1,0
+DA:343,11
+BRDA:343,0,0,10
+BRDA:343,0,1,11
+DA:346,11
+DA:347,10
+BRDA:347,0,0,0
+BRDA:347,0,1,1
+BRDA:347,0,2,1
+BRDA:347,0,3,10
+DA:348,10
+DA:350,11
+BRDA:350,0,0,11
+BRDA:350,0,1,1
+BRDA:350,0,2,10
+DA:353,55
+BRDA:353,0,0,11
+BRDA:353,0,1,55
+DA:354,55
+DA:356,44
+BRDA:356,0,0,11
+BRDA:356,0,1,44
+DA:357,44
+DA:360,11
+BRDA:360,0,0,0
+BRDA:360,0,1,11
+DA:361,11
+BRF:77
+BRH:29
 end_of_record
diff --git a/test_regress/t/t_cover_line_expr.out b/test_regress/t/t_cover_line_expr.out
new file mode 100644
index 000000000..27b905e6d
--- /dev/null
+++ b/test_regress/t/t_cover_line_expr.out
@@ -0,0 +1,480 @@
+//      // verilator_coverage annotation
+        // DESCRIPTION: Verilator: Verilog Test module
+        //
+        // This file ONLY is placed under the Creative Commons Public Domain, for
+        // any use, without warranty, 2024 by Wilson Snyder.
+        // SPDX-License-Identifier: CC0-1.0
+        
+%000001 class cls;
+-000001  point: comment=block hier=top.$unit::cls__Vclpkg
+            rand int x;
+        endclass
+        
+        module t (/*AUTOARG*/
+            // Inputs
+            clk
+            );
+        
+            input clk;
+        
+            integer cyc;
+%000001     initial cyc=1;
+-000001  point: comment=block hier=top.t
+        
+            logic [63:32] cyc2;
+%000001     always_comb cyc2 = cyc;
+-000001  point: comment=block hier=top.t
+        
+            integer some_int;
+            integer other_int;
+            logic some_bool;
+        
+            wire t1 = cyc[0];
+            wire t2 = cyc[1];
+            wire t3 = cyc[2];
+            wire t4 = cyc[3];
+        
+            localparam bit ONE = 1'b1;
+            localparam bit ZERO = 1'b0;
+        
+ 000027     function automatic bit invert(bit x);
++000027  point: comment=block hier=top.t
+ 000027         return ~x;
++000027  point: comment=block hier=top.t
++000012  point: comment=(x==0) => 1 hier=top.t
++000015  point: comment=(x==1) => 0 hier=top.t
+            endfunction
+        
+%000009     function automatic bit and_oper(bit a, bit b);
+-000009  point: comment=block hier=top.t
+%000009         return a & b;
+-000009  point: comment=block hier=top.t
+-000004  point: comment=(a==0) => 0 hier=top.t
+-000002  point: comment=(a==1 && b==1) => 1 hier=top.t
+-000005  point: comment=(b==0) => 0 hier=top.t
+            endfunction
+        
+            localparam int num_intfs = 4;
+            intf the_intfs [num_intfs-1:0] ();
+            genvar intf_i;
+%000004     for (intf_i = 0; intf_i < num_intfs; intf_i++) begin
+-000004  point: comment=block hier=top.t
+%000004         always_comb the_intfs[intf_i].t = cyc[intf_i];
+-000004  point: comment=block hier=top.t
+            end
+        
+%000009     always @ (posedge clk) begin
+-000009  point: comment=block hier=top.t
+%000009         cyc <= cyc + 1;
+-000009  point: comment=block hier=top.t
+%000005         if ((~cyc[0] && cyc[1]) || (~cyc[2] && cyc[3])) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(cyc[0]==0 && cyc[1]==1) => 1 hier=top.t
+-000002  point: comment=(cyc[0]==1 && cyc[2]==1) => 0 hier=top.t
+-000004  point: comment=(cyc[0]==1 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[1]==0 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[1]==0 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000005         if ((~cyc2[32] && cyc2[33]) || (~cyc2[34] && cyc2[35])) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(cyc2[32]==0 && cyc2[33]==1) => 1 hier=top.t
+-000002  point: comment=(cyc2[32]==1 && cyc2[34]==1) => 0 hier=top.t
+-000004  point: comment=(cyc2[32]==1 && cyc2[35]==0) => 0 hier=top.t
+-000002  point: comment=(cyc2[33]==0 && cyc2[34]==1) => 0 hier=top.t
+-000003  point: comment=(cyc2[33]==0 && cyc2[35]==0) => 0 hier=top.t
+-000002  point: comment=(cyc2[34]==0 && cyc2[35]==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000005         if ((~the_intfs[0].t && the_intfs[1].t) || (~the_intfs[2].t && the_intfs[3].t)) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(the_intfs[0].t==0 && the_intfs[1].t==1) => 1 hier=top.t
+-000002  point: comment=(the_intfs[0].t==1 && the_intfs[2].t==1) => 0 hier=top.t
+-000004  point: comment=(the_intfs[0].t==1 && the_intfs[3].t==0) => 0 hier=top.t
+-000002  point: comment=(the_intfs[1].t==0 && the_intfs[2].t==1) => 0 hier=top.t
+-000003  point: comment=(the_intfs[1].t==0 && the_intfs[3].t==0) => 0 hier=top.t
+-000002  point: comment=(the_intfs[2].t==0 && the_intfs[3].t==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000005         if ((~t1 && t2) || (~t3 && t4)) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==1) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t3==1) => 0 hier=top.t
+-000004  point: comment=(t1==1 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t2==0 && t3==1) => 0 hier=top.t
+-000003  point: comment=(t2==0 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t3==0 && t4==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000007         if (t3 && (t1 == t2)) $write("");
+-000007  point: comment=else hier=top.t
+-000005  point: comment=((t1 == t2)==0) => 0 hier=top.t
+-000005  point: comment=(t3==0) => 0 hier=top.t
+-000002  point: comment=(t3==1 && (t1 == t2)==1) => 1 hier=top.t
+-000002  point: comment=if hier=top.t
+%000007         if (123 == (124 - 32'(t1 || t2))) $write("");
+-000002  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==0) => 0 hier=top.t
+-000005  point: comment=(t1==1) => 1 hier=top.t
+-000004  point: comment=(t2==1) => 1 hier=top.t
+-000007  point: comment=if hier=top.t
+%000009         some_int <= (t2 || t3) ? 345 : 567;
+-000009  point: comment=block hier=top.t
+-000003  point: comment=(t2==0 && t3==0) => 0 hier=top.t
+-000004  point: comment=(t2==1) => 1 hier=top.t
+-000004  point: comment=(t3==1) => 1 hier=top.t
+-000006  point: comment=cond_then hier=top.t
+-000003  point: comment=cond_else hier=top.t
+%000009         some_bool <= t1 && t2;
+-000009  point: comment=block hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+%000007         if (t1 & t2) $write("");
+-000007  point: comment=else hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+%000005         if ((!t1 && t2) | (~t3 && t4)) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==1) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t3==1) => 0 hier=top.t
+-000004  point: comment=(t1==1 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t2==0 && t3==1) => 0 hier=top.t
+-000003  point: comment=(t2==0 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t3==0 && t4==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000005         if (t1 ^ t2) $write("");
+-000004  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==0) => 0 hier=top.t
+-000002  point: comment=(t1==0 && t2==1) => 1 hier=top.t
+-000003  point: comment=(t1==1 && t2==0) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 0 hier=top.t
+-000005  point: comment=if hier=top.t
+%000007         if (~(t1 & t2)) $write("");
+-000002  point: comment=else hier=top.t
+-000004  point: comment=(t1==0) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 0 hier=top.t
+-000005  point: comment=(t2==0) => 1 hier=top.t
+-000007  point: comment=if hier=top.t
+%000006         if (t1 -> t2) $write("");
+-000003  point: comment=else hier=top.t
+-000004  point: comment=(t1==0) => 1 hier=top.t
+-000003  point: comment=(t1==1 && t2==0) => 0 hier=top.t
+-000004  point: comment=(t2==1) => 1 hier=top.t
+-000006  point: comment=if hier=top.t
+%000005         if (t1 <-> t2) $write("");
+-000005  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==0) => 1 hier=top.t
+-000002  point: comment=(t1==0 && t2==1) => 0 hier=top.t
+-000003  point: comment=(t1==1 && t2==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000004  point: comment=if hier=top.t
+%000008         if (&cyc[2:0]) $write("");
+-000008  point: comment=else hier=top.t
+-000004  point: comment=(cyc[2:0][0]==0) => 0 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==1 && cyc[2:0][1]==1 && cyc[2:0][2]==1) => 1 hier=top.t
+-000005  point: comment=(cyc[2:0][1]==0) => 0 hier=top.t
+-000005  point: comment=(cyc[2:0][2]==0) => 0 hier=top.t
+-000001  point: comment=if hier=top.t
+%000009         if (&cyc[3:2]) $write("");
+-000009  point: comment=else hier=top.t
+-000005  point: comment=(cyc[3:2][0]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[3:2][0]==1 && cyc[3:2][1]==1) => 1 hier=top.t
+-000007  point: comment=(cyc[3:2][1]==0) => 0 hier=top.t
+-000000  point: comment=if hier=top.t
+%000008         if (|cyc[2:0]) $write("");
+-000001  point: comment=else hier=top.t
+-000001  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==0 && cyc[2:0][2]==0) => 0 hier=top.t
+-000005  point: comment=(cyc[2:0][0]==1) => 1 hier=top.t
+-000004  point: comment=(cyc[2:0][1]==1) => 1 hier=top.t
+-000004  point: comment=(cyc[2:0][2]==1) => 1 hier=top.t
+-000008  point: comment=if hier=top.t
+%000005         if (^cyc[2:0]) $write("");
+-000004  point: comment=else hier=top.t
+-000001  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==0 && cyc[2:0][2]==0) => 0 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==0 && cyc[2:0][2]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==1 && cyc[2:0][2]==0) => 1 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==1 && cyc[2:0][2]==1) => 0 hier=top.t
+-000002  point: comment=(cyc[2:0][0]==1 && cyc[2:0][1]==0 && cyc[2:0][2]==0) => 1 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==1 && cyc[2:0][1]==0 && cyc[2:0][2]==1) => 0 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==1 && cyc[2:0][1]==1 && cyc[2:0][2]==0) => 0 hier=top.t
+-000001  point: comment=(cyc[2:0][0]==1 && cyc[2:0][1]==1 && cyc[2:0][2]==1) => 1 hier=top.t
+-000005  point: comment=if hier=top.t
+%000009         if (|cyc[2:0] || cyc[3]) $write("");
+-000000  point: comment=else hier=top.t
+-000000  point: comment=(cyc[2:0][0]==0 && cyc[2:0][1]==0 && cyc[2:0][2]==0 && cyc[3]==0) => 0 hier=top.t
+-000005  point: comment=(cyc[2:0][0]==1) => 1 hier=top.t
+-000004  point: comment=(cyc[2:0][1]==1) => 1 hier=top.t
+-000004  point: comment=(cyc[2:0][2]==1) => 1 hier=top.t
+-000002  point: comment=(cyc[3]==1) => 1 hier=top.t
+-000009  point: comment=if hier=top.t
+%000007         if (t1 & t2 & 1'b1) $write("");
+-000007  point: comment=else hier=top.t
+-000000  point: comment=(1'h1==0) => 0 hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1 && 1'h1==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+%000009         if (t1 & t2 & 1'b0) $write("");
+-000009  point: comment=else hier=top.t
+-000009  point: comment=(1'h0==0) => 0 hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000000  point: comment=(t1==1 && t2==1 && 1'h0==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000000  point: comment=if hier=top.t
+%000007         if (t1 & t2 & ONE) $write("");
+-000007  point: comment=else hier=top.t
+-000000  point: comment=(ONE==0) => 0 hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1 && ONE==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+%000009         if (t1 & t2 & ZERO) $write("");
+-000009  point: comment=else hier=top.t
+-000009  point: comment=(ZERO==0) => 0 hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000000  point: comment=(t1==1 && t2==1 && ZERO==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000000  point: comment=if hier=top.t
+%000005         if (t1 && t2) begin
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=elsif hier=top.t
+%000002             $write("");
+-000002  point: comment=elsif hier=top.t
+%000005         end else if (t1 || t2) begin
+-000005  point: comment=if hier=top.t
+-000002  point: comment=else hier=top.t
+-000002  point: comment=(t1==0 && t2==0) => 0 hier=top.t
+-000003  point: comment=(t1==1) => 1 hier=top.t
+-000002  point: comment=(t2==1) => 1 hier=top.t
+%000005             $write("");
+-000005  point: comment=if hier=top.t
+                end
+%000007         if (invert(t1) && t2) $write("");
+-000007  point: comment=else hier=top.t
+-000005  point: comment=(invert(t1)==0) => 0 hier=top.t
+-000002  point: comment=(invert(t1)==1 && t2==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+%000007         if (and_oper(t1, t2)) $write("");
+-000007  point: comment=else hier=top.t
+-000002  point: comment=if hier=top.t
+%000007         if (t2 && t3) begin
+-000007  point: comment=else hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=(t2==1 && t3==1) => 1 hier=top.t
+-000005  point: comment=(t3==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+%000001             if (t1 && t2) $write("");
+-000001  point: comment=if hier=top.t
+-000001  point: comment=else hier=top.t
+-000001  point: comment=(t1==0) => 0 hier=top.t
+-000001  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(t2==0) => 0 hier=top.t
+                end
+%000009         if (0 == 1) begin
+-000009  point: comment=else hier=top.t
+-000000  point: comment=if hier=top.t
+%000000             for (int loop_var = 0; loop_var < 1; loop_var++) begin
+-000000  point: comment=if hier=top.t
+-000000  point: comment=block hier=top.t
+%000000                 if (cyc[loop_var] && t2) $write("");
+-000000  point: comment=if hier=top.t
+-000000  point: comment=else hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(t2==0) => 0 hier=top.t
+                    end
+                end
+                // stop at the first layer even if there's more to find
+%000007         if ((cyc[3+32'(t1 && t2)+:2] == cyc[5+32'(t3 || t4)+:2]) || cyc[31]) $write("");
+-000002  point: comment=else hier=top.t
+-000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==0 && cyc[31]==0) => 0 hier=top.t
+-000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==1) => 1 hier=top.t
+-000000  point: comment=(cyc[31]==1) => 1 hier=top.t
+-000007  point: comment=if hier=top.t
+                // impossible branches and redundant terms
+%000008         if ((t1 && t2) && ~(t1 && t3) && (t1 || t4)) $write("");
+-000008  point: comment=else hier=top.t
+-000003  point: comment=(t1==0 && t4==0) => 0 hier=top.t
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000000  point: comment=(t1==1 && t2==1 && t3==0 && t4==1) => 1 hier=top.t
+-000001  point: comment=(t1==1 && t2==1 && t3==0) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t3==1) => 0 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000001  point: comment=if hier=top.t
+%000008         if ((cyc[0] && cyc[1]) && ~(cyc[0] && cyc[2]) && (cyc[0] || cyc[3])) $write("");
+-000008  point: comment=else hier=top.t
+-000003  point: comment=(cyc[0]==0 && cyc[3]==0) => 0 hier=top.t
+-000004  point: comment=(cyc[0]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0) => 1 hier=top.t
+-000002  point: comment=(cyc[0]==1 && cyc[2]==1) => 0 hier=top.t
+-000005  point: comment=(cyc[1]==0) => 0 hier=top.t
+-000001  point: comment=if hier=top.t
+                // demonstrate current limitations of term matching scheme
+%000008         if ((cyc[0] && cyc[1]) && ~(cyc[1-1] && cyc[2]) && (cyc[2-2] || cyc[3])) $write("");
+-000008  point: comment=else hier=top.t
+-000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==1 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==0 && cyc[3]==0) => 0 hier=top.t
+-000004  point: comment=(cyc[0]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
+-000005  point: comment=(cyc[1]==0) => 0 hier=top.t
+-000001  point: comment=if hier=top.t
+                //verilator coverage_off
+                if (t1 && t2) $write("");
+                //verilator coverage_on
+%000005         if ((~t1 && t2)
+-000005  point: comment=else hier=top.t
+-000004  point: comment=if hier=top.t
+%000004             ||
+-000002  point: comment=(t1==0 && t2==1) => 1 hier=top.t
+-000002  point: comment=(t1==1 && t3==1) => 0 hier=top.t
+-000004  point: comment=(t1==1 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t2==0 && t3==1) => 0 hier=top.t
+-000003  point: comment=(t2==0 && t4==0) => 0 hier=top.t
+-000002  point: comment=(t3==0 && t4==1) => 1 hier=top.t
+%000004            (~t3 && t4)) $write("");
+-000004  point: comment=if hier=top.t
+                // intentionally testing wonkified expression terms
+%000007         if (
+-000007  point: comment=else hier=top.t
+-000002  point: comment=if hier=top.t
+                    cyc[
+                      0
+%000005             ] &
+-000004  point: comment=(cyc[0]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[0]==1 && cyc[1]==1) => 1 hier=top.t
+-000005  point: comment=(cyc[1]==0) => 0 hier=top.t
+                    cyc
+%000002               [1]) $write("");
+-000002  point: comment=if hier=top.t
+                // for now each ternary condition is considered in isolation
+%000009         other_int <= t1 ? t2 ? 1 : 2 : 3;
+-000004  point: comment=(t1==0) => 0 hier=top.t
+-000005  point: comment=(t1==1) => 1 hier=top.t
+-000005  point: comment=cond_then hier=top.t
+-000004  point: comment=cond_else hier=top.t
+-000002  point: comment=cond_then hier=top.t
+-000003  point: comment=cond_else hier=top.t
+-000009  point: comment=block hier=top.t
+                // no expression coverage for multi-bit expressions
+%000009         if ((cyc[1:0] & cyc[3:2]) == 2'b11) $write("");
+-000009  point: comment=else hier=top.t
+-000000  point: comment=if hier=top.t
+                // truth table is too large
+%000005         if (^cyc[6:0]) $write("");
+-000004  point: comment=else hier=top.t
+-000005  point: comment=if hier=top.t
+                // this one is too big even for t_cover_expr_max
+%000005         if (^cyc) $write("");
+-000004  point: comment=else hier=top.t
+-000005  point: comment=if hier=top.t
+%000008         if (cyc==9) begin
+-000008  point: comment=else hier=top.t
+-000001  point: comment=if hier=top.t
+%000001             $write("*-* All Finished *-*\n");
+-000001  point: comment=if hier=top.t
+%000001             $finish;
+-000001  point: comment=if hier=top.t
+                end
+            end
+        
+ 000010     always_comb begin
++000010  point: comment=block hier=top.t
+%000008         if (t1 && t2) $write("");
+-000008  point: comment=else hier=top.t
+-000005  point: comment=(t1==0) => 0 hier=top.t
+-000002  point: comment=(t1==1 && t2==1) => 1 hier=top.t
+-000005  point: comment=(t2==0) => 0 hier=top.t
+-000002  point: comment=if hier=top.t
+            end
+        
+            logic ta, tb, tc;
+%000001     initial begin
+-000001  point: comment=block hier=top.t
+%000001         cls obj = new;
+-000001  point: comment=block hier=top.t
+%000001         cls null_obj = null;
+-000001  point: comment=block hier=top.t
+                int q[5];
+                int qv[$];
+        
+%000001         q = '{1, 2, 2, 4, 3};
+-000001  point: comment=block hier=top.t
+                // lambas not handled
+                // NB: there is a bug w/ tracing find_first (maybe lambdas in general?)
+                //     tracing_off does not work around the bug
+%000001         qv = q.find_first with (item[0] & item[1]);
+-000001  point: comment=block hier=top.t
+%000001         ta = '1;
+-000001  point: comment=block hier=top.t
+%000001         tb = '0;
+-000001  point: comment=block hier=top.t
+%000001         tc = '0;
+-000001  point: comment=block hier=top.t
+%000003         while (ta || tb || tc) begin
+-000001  point: comment=(ta==0 && tb==0 && tc==0) => 0 hier=top.t
+-000000  point: comment=(ta==1) => 1 hier=top.t
+-000000  point: comment=(tb==1) => 1 hier=top.t
+-000000  point: comment=(tc==1) => 1 hier=top.t
+-000003  point: comment=block hier=top.t
+%000003             tc = tb;
+-000003  point: comment=block hier=top.t
+%000003             tb = ta;
+-000003  point: comment=block hier=top.t
+%000003             ta = '0;
+-000003  point: comment=block hier=top.t
+                end
+%000001         if (!bit'(obj.randomize() with {x < 100;})) $write("");
+-000000  point: comment=else hier=top.t
+-000001  point: comment=if hier=top.t
+%000001         if (null_obj != null && null_obj.x == 5) $write("");
+-000001  point: comment=else hier=top.t
+-000000  point: comment=if hier=top.t
+            end
+        
+            sub the_sub_1 (.p(t1), .q(t2));
+            sub the_sub_2 (.p(t3), .q(t4));
+            // TODO -- non-process expressions
+            sub the_sub_3 (.p(t1 ? t2 : t3), .q(t4));
+        
+            // TODO
+            // pragma for expr coverage off / on
+            // investigate cover point sorting in annotated source
+            // consider reporting don't care terms
+            //
+            // Branches which are statically impossible to reach are still reported.
+            // E.g.
+            // -000000  point: comment=(t1=1 && t2=1 && 1'h0=1) => 1 hier=top.t
+            // These could potentially be pruned, but they currently follow suit for
+            // what branch coverage does.  Perhaps a switch should be added to not
+            // count statically impossible things.
+        
+        endmodule
+        
+        module sub (
+            input p,
+            input q
+        );
+        
+ 000030     always_comb begin
++000030  point: comment=block hier=top.t.the_sub_*
+~000028         if (p && q) $write("");
++000028  point: comment=else hier=top.t.the_sub_*
++000017  point: comment=(p==0) => 0 hier=top.t.the_sub_*
+-000002  point: comment=(p==1 && q==1) => 1 hier=top.t.the_sub_*
++000019  point: comment=(q==0) => 0 hier=top.t.the_sub_*
+-000002  point: comment=if hier=top.t.the_sub_*
+            end
+        
+        endmodule
+        
+        interface intf();
+            logic t;
+        endinterface
+        
diff --git a/test_regress/t/t_cover_line_expr_cc.py b/test_regress/t/t_cover_line_expr_cc.py
new file mode 100755
index 000000000..7e7c3b5b4
--- /dev/null
+++ b/test_regress/t/t_cover_line_expr_cc.py
@@ -0,0 +1,28 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+test.top_filename = "t/t_cover_expr.v"
+test.golden_filename = "t/t_cover_line_expr.out"
+
+test.compile(verilator_flags2=['--cc --coverage-line --coverage-expr'])
+
+test.execute()
+
+test.run(cmd=[os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage",
+              "--annotate-points",
+              "--annotate", test.obj_dir + "/annotated",
+              test.obj_dir + "/coverage.dat"],
+         verilator_run=True)  # yapf:disable
+
+test.files_identical(test.obj_dir + "/annotated/t_cover_expr.v", test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_cover_line_trace.out b/test_regress/t/t_cover_line_trace.out
index 4283c09c2..57d893c2b 100644
--- a/test_regress/t/t_cover_line_trace.out
+++ b/test_regress/t/t_cover_line_trace.out
@@ -2,117 +2,184 @@ $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
   $scope module t $end
-   $var wire 1 b clk $end
-   $var wire 1 & toggle $end
+   $var wire 1 4! clk $end
+   $var wire 1 A toggle $end
    $var wire 32 # vlCoverageLineTrace_t_cover_line__15_block [31:0] $end
-   $var wire 32 ' cyc [31:0] $end
+   $var wire 32 B cyc [31:0] $end
    $var wire 32 $ vlCoverageLineTrace_t_cover_line__18_block [31:0] $end
-   $var wire 8 ( cyc_copy [7:0] $end
+   $var wire 8 C cyc_copy [7:0] $end
    $scope module b1 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 V vlCoverageLineTrace_t_cover_line__160_block [31:0] $end
-    $var wire 32 W vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
-    $var wire 32 q vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
-    $var wire 32 X vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
-    $var wire 32 Y vlCoverageLineTrace_t_cover_line__166_if [31:0] $end
-    $var wire 32 Z vlCoverageLineTrace_t_cover_line__170_else [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 (! vlCoverageLineTrace_t_cover_line__164_block [31:0] $end
+    $var wire 32 )! vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
+    $var wire 32 L! vlCoverageLineTrace_t_cover_line__166_if [31:0] $end
+    $var wire 32 *! vlCoverageLineTrace_t_cover_line__170_else [31:0] $end
+    $var wire 32 +! vlCoverageLineTrace_t_cover_line__170_if [31:0] $end
+    $var wire 32 ,! vlCoverageLineTrace_t_cover_line__174_else [31:0] $end
    $upscope $end
    $scope module b2 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 [ vlCoverageLineTrace_t_cover_line__160_block [31:0] $end
-    $var wire 32 \ vlCoverageLineTrace_t_cover_line__162_else [31:0] $end
-    $var wire 32 r vlCoverageLineTrace_t_cover_line__162_if [31:0] $end
-    $var wire 32 ] vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
-    $var wire 32 ^ vlCoverageLineTrace_t_cover_line__166_if [31:0] $end
-    $var wire 32 _ vlCoverageLineTrace_t_cover_line__170_else [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 -! vlCoverageLineTrace_t_cover_line__164_block [31:0] $end
+    $var wire 32 .! vlCoverageLineTrace_t_cover_line__166_else [31:0] $end
+    $var wire 32 M! vlCoverageLineTrace_t_cover_line__166_if [31:0] $end
+    $var wire 32 /! vlCoverageLineTrace_t_cover_line__170_else [31:0] $end
+    $var wire 32 0! vlCoverageLineTrace_t_cover_line__170_if [31:0] $end
+    $var wire 32 1! vlCoverageLineTrace_t_cover_line__174_else [31:0] $end
    $upscope $end
    $scope module t1 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 ` vlCoverageLineTrace_t_cover_line__211_block [31:0] $end
-    $var wire 32 d vlCoverageLineTrace_t_cover_line__215_block [31:0] $end
-    $var wire 32 e vlCoverageLineTrace_t_cover_line__218_else [31:0] $end
-    $var wire 32 f vlCoverageLineTrace_t_cover_line__218_if [31:0] $end
-    $var wire 32 a vlCoverageLineTrace_t_cover_line__221_else [31:0] $end
-    $var wire 32 g vlCoverageLineTrace_t_cover_line__221_if [31:0] $end
-    $var wire 32 % vlCoverageLineTrace_t_cover_line__226_block [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 2! vlCoverageLineTrace_t_cover_line__215_block [31:0] $end
+    $var wire 32 6! vlCoverageLineTrace_t_cover_line__219_block [31:0] $end
+    $var wire 32 7! vlCoverageLineTrace_t_cover_line__222_else [31:0] $end
+    $var wire 32 8! vlCoverageLineTrace_t_cover_line__222_if [31:0] $end
+    $var wire 32 3! vlCoverageLineTrace_t_cover_line__225_else [31:0] $end
+    $var wire 32 9! vlCoverageLineTrace_t_cover_line__225_if [31:0] $end
+    $var wire 32 * vlCoverageLineTrace_t_cover_line__230_block [31:0] $end
    $upscope $end
-   $var wire 32 ) vlCoverageLineTrace_t_cover_line__51_block [31:0] $end
-   $var wire 32 * vlCoverageLineTrace_t_cover_line__52_else [31:0] $end
-   $var wire 32 + vlCoverageLineTrace_t_cover_line__52_if [31:0] $end
-   $var wire 32 , vlCoverageLineTrace_t_cover_line__56_else [31:0] $end
-   $var wire 32 - vlCoverageLineTrace_t_cover_line__56_if [31:0] $end
-   $var wire 32 . vlCoverageLineTrace_t_cover_line__57_else [31:0] $end
-   $var wire 32 / vlCoverageLineTrace_t_cover_line__57_if [31:0] $end
-   $var wire 32 0 vlCoverageLineTrace_t_cover_line__62_else [31:0] $end
-   $var wire 32 1 vlCoverageLineTrace_t_cover_line__62_if [31:0] $end
-   $var wire 32 2 vlCoverageLineTrace_t_cover_line__63_else [31:0] $end
-   $var wire 32 3 vlCoverageLineTrace_t_cover_line__63_if [31:0] $end
-   $var wire 32 4 vlCoverageLineTrace_t_cover_line__69_else [31:0] $end
-   $var wire 32 5 vlCoverageLineTrace_t_cover_line__69_if [31:0] $end
-   $var wire 32 6 vlCoverageLineTrace_t_cover_line__70_else [31:0] $end
-   $var wire 32 7 vlCoverageLineTrace_t_cover_line__70_if [31:0] $end
-   $var wire 32 8 vlCoverageLineTrace_t_cover_line__79_elsif [31:0] $end
-   $var wire 32 9 vlCoverageLineTrace_t_cover_line__83_elsif [31:0] $end
-   $var wire 32 : vlCoverageLineTrace_t_cover_line__87_else [31:0] $end
-   $var wire 32 ; vlCoverageLineTrace_t_cover_line__87_if [31:0] $end
-   $var wire 32 h vlCoverageLineTrace_t_cover_line__96_block [31:0] $end
-   $var wire 32 i vlCoverageLineTrace_t_cover_line__97_block [31:0] $end
-   $var wire 32 j vlCoverageLineTrace_t_cover_line__100_block [31:0] $end
-   $var wire 32 k vlCoverageLineTrace_t_cover_line__101_block [31:0] $end
-   $var wire 32 < vlCoverageLineTrace_t_cover_line__106_elsif [31:0] $end
-   $var wire 32 = vlCoverageLineTrace_t_cover_line__109_elsif [31:0] $end
-   $var wire 32 > vlCoverageLineTrace_t_cover_line__116_else [31:0] $end
-   $var wire 32 ? vlCoverageLineTrace_t_cover_line__116_if [31:0] $end
-   $var wire 32 c vlCoverageLineTrace_t_cover_line__123_block [31:0] $end
+   $var wire 32 D vlCoverageLineTrace_t_cover_line__55_block [31:0] $end
+   $var wire 32 E vlCoverageLineTrace_t_cover_line__56_else [31:0] $end
+   $var wire 32 F vlCoverageLineTrace_t_cover_line__56_if [31:0] $end
+   $var wire 32 G vlCoverageLineTrace_t_cover_line__60_else [31:0] $end
+   $var wire 32 H vlCoverageLineTrace_t_cover_line__60_if [31:0] $end
+   $var wire 32 I vlCoverageLineTrace_t_cover_line__61_else [31:0] $end
+   $var wire 32 J vlCoverageLineTrace_t_cover_line__61_if [31:0] $end
+   $var wire 32 K vlCoverageLineTrace_t_cover_line__66_else [31:0] $end
+   $var wire 32 L vlCoverageLineTrace_t_cover_line__66_if [31:0] $end
+   $var wire 32 M vlCoverageLineTrace_t_cover_line__67_else [31:0] $end
+   $var wire 32 N vlCoverageLineTrace_t_cover_line__67_if [31:0] $end
+   $var wire 32 O vlCoverageLineTrace_t_cover_line__73_else [31:0] $end
+   $var wire 32 P vlCoverageLineTrace_t_cover_line__73_if [31:0] $end
+   $var wire 32 Q vlCoverageLineTrace_t_cover_line__74_else [31:0] $end
+   $var wire 32 R vlCoverageLineTrace_t_cover_line__74_if [31:0] $end
+   $var wire 32 S vlCoverageLineTrace_t_cover_line__83_elsif [31:0] $end
+   $var wire 32 T vlCoverageLineTrace_t_cover_line__87_elsif [31:0] $end
+   $var wire 32 U vlCoverageLineTrace_t_cover_line__91_else [31:0] $end
+   $var wire 32 V vlCoverageLineTrace_t_cover_line__91_if [31:0] $end
+   $var wire 32 :! vlCoverageLineTrace_t_cover_line__100_block [31:0] $end
+   $var wire 32 ;! vlCoverageLineTrace_t_cover_line__101_block [31:0] $end
+   $var wire 32 <! vlCoverageLineTrace_t_cover_line__104_block [31:0] $end
+   $var wire 32 =! vlCoverageLineTrace_t_cover_line__105_block [31:0] $end
+   $var wire 32 W vlCoverageLineTrace_t_cover_line__110_elsif [31:0] $end
+   $var wire 32 X vlCoverageLineTrace_t_cover_line__113_elsif [31:0] $end
+   $var wire 32 Y vlCoverageLineTrace_t_cover_line__120_else [31:0] $end
+   $var wire 32 Z vlCoverageLineTrace_t_cover_line__120_if [31:0] $end
+   $var wire 32 5! vlCoverageLineTrace_t_cover_line__127_block [31:0] $end
    $scope module a1 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 @ vlCoverageLineTrace_t_cover_line__136_block [31:0] $end
-    $var wire 32 A vlCoverageLineTrace_t_cover_line__137_else [31:0] $end
-    $var wire 32 B vlCoverageLineTrace_t_cover_line__137_if [31:0] $end
-    $var wire 32 C vlCoverageLineTrace_t_cover_line__141_else [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 [ vlCoverageLineTrace_t_cover_line__140_block [31:0] $end
+    $var wire 32 \ vlCoverageLineTrace_t_cover_line__141_else [31:0] $end
+    $var wire 32 ] vlCoverageLineTrace_t_cover_line__141_if [31:0] $end
+    $var wire 32 ^ vlCoverageLineTrace_t_cover_line__145_else [31:0] $end
    $upscope $end
    $scope module a2 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 D vlCoverageLineTrace_t_cover_line__136_block [31:0] $end
-    $var wire 32 E vlCoverageLineTrace_t_cover_line__137_else [31:0] $end
-    $var wire 32 F vlCoverageLineTrace_t_cover_line__137_if [31:0] $end
-    $var wire 32 G vlCoverageLineTrace_t_cover_line__141_else [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 _ vlCoverageLineTrace_t_cover_line__140_block [31:0] $end
+    $var wire 32 ` vlCoverageLineTrace_t_cover_line__141_else [31:0] $end
+    $var wire 32 a vlCoverageLineTrace_t_cover_line__141_if [31:0] $end
+    $var wire 32 b vlCoverageLineTrace_t_cover_line__145_else [31:0] $end
+   $upscope $end
+   $scope module cond1 $end
+    $var wire 1 4! clk $end
+    $var wire 32 B cyc [31:0] $end
+    $var wire 1 6 a $end
+    $var wire 1 7 b $end
+    $var wire 1 - c $end
+    $var wire 1 c d $end
+    $var wire 1 8 e $end
+    $var wire 1 d f $end
+    $var wire 1 . g $end
+    $var wire 1 e h $end
+    $var wire 1 >! k $end
+    $var wire 1 ?! l $end
+    $var wire 1 / m $end
+    $var wire 6 0 tab [5:0] $end
+    $var wire 8 f data[0][0] [7:0] $end
+    $var wire 8 g data[0][1] [7:0] $end
+    $var wire 8 h data[1][0] [7:0] $end
+    $var wire 8 i data[1][1] [7:0] $end
+    $var wire 32 % vlCoverageLineTrace_t_cover_line__314_block [31:0] $end
+    $var wire 32 1 vlCoverageLineTrace_t_cover_line__317_block [31:0] $end
+    $var wire 32 j vlCoverageLineTrace_t_cover_line__322_block [31:0] $end
+    $var wire 8 @! get_arr__Vstatic__arr[0] [7:0] $end
+    $var wire 8 A! get_arr__Vstatic__arr[1] [7:0] $end
+    $var wire 32 9 vlCoverageLineTrace_t_cover_line__327_cond_else [31:0] $end
+    $var wire 32 : vlCoverageLineTrace_t_cover_line__327_cond_then [31:0] $end
+    $var wire 32 ; vlCoverageLineTrace_t_cover_line__328_cond_else [31:0] $end
+    $var wire 32 < vlCoverageLineTrace_t_cover_line__328_cond_then [31:0] $end
+    $var wire 32 2 vlCoverageLineTrace_t_cover_line__329_cond_else [31:0] $end
+    $var wire 32 3 vlCoverageLineTrace_t_cover_line__329_cond_then [31:0] $end
+    $var wire 32 k vlCoverageLineTrace_t_cover_line__330_block [31:0] $end
+    $var wire 32 l vlCoverageLineTrace_t_cover_line__331_cond_else [31:0] $end
+    $var wire 32 m vlCoverageLineTrace_t_cover_line__331_cond_then [31:0] $end
+    $var wire 32 n vlCoverageLineTrace_t_cover_line__332_cond_else [31:0] $end
+    $var wire 32 o vlCoverageLineTrace_t_cover_line__332_cond_then [31:0] $end
+    $var wire 32 = vlCoverageLineTrace_t_cover_line__334_cond_else_1 [31:0] $end
+    $var wire 32 > vlCoverageLineTrace_t_cover_line__334_cond_then_1 [31:0] $end
+    $var wire 32 ? vlCoverageLineTrace_t_cover_line__334_cond_else [31:0] $end
+    $var wire 32 @ vlCoverageLineTrace_t_cover_line__334_cond_then [31:0] $end
+    $var wire 32 p vlCoverageLineTrace_t_cover_line__337_cond_else [31:0] $end
+    $var wire 32 q vlCoverageLineTrace_t_cover_line__337_cond_then [31:0] $end
+    $var wire 32 B! vlCoverageLineTrace_t_cover_line__343_cond_else [31:0] $end
+    $var wire 32 4 vlCoverageLineTrace_t_cover_line__343_cond_else_1 [31:0] $end
+    $var wire 32 C! vlCoverageLineTrace_t_cover_line__343_cond_then [31:0] $end
+    $var wire 32 5 vlCoverageLineTrace_t_cover_line__343_cond_then_1 [31:0] $end
+    $var wire 32 & vlCoverageLineTrace_t_cover_line__346_block [31:0] $end
+    $var wire 32 r vlCoverageLineTrace_t_cover_line__347_else [31:0] $end
+    $var wire 32 s vlCoverageLineTrace_t_cover_line__347_if [31:0] $end
+    $var wire 32 t vlCoverageLineTrace_t_cover_line__347_cond_else [31:0] $end
+    $var wire 32 u vlCoverageLineTrace_t_cover_line__347_cond_then [31:0] $end
+    $var wire 32 v vlCoverageLineTrace_t_cover_line__350_cond_else [31:0] $end
+    $var wire 32 w vlCoverageLineTrace_t_cover_line__350_cond_then [31:0] $end
+    $var wire 32 ' vlCoverageLineTrace_t_cover_line__353_block [31:0] $end
+    $var wire 32 ( vlCoverageLineTrace_t_cover_line__356_block [31:0] $end
+    $var wire 32 ) vlCoverageLineTrace_t_cover_line__360_else [31:0] $end
+    $var wire 32 D! vlCoverageLineTrace_t_cover_line__360_if [31:0] $end
+    $scope module unnamedblk1 $end
+     $var wire 32 E! i [31:0] $end
+    $upscope $end
+    $scope module unnamedblk2 $end
+     $var wire 32 F! i [31:0] $end
+    $upscope $end
    $upscope $end
    $scope module o1 $end
-    $var wire 1 b clk $end
-    $var wire 1 & toggle $end
-    $var wire 32 H vlCoverageLineTrace_t_cover_line__248_block [31:0] $end
-    $var wire 32 I vlCoverageLineTrace_t_cover_line__249_else [31:0] $end
-    $var wire 32 J vlCoverageLineTrace_t_cover_line__249_if [31:0] $end
-    $var wire 32 K vlCoverageLineTrace_t_cover_line__252_else [31:0] $end
-    $var wire 32 l vlCoverageLineTrace_t_cover_line__252_if [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 1 A toggle $end
+    $var wire 32 x vlCoverageLineTrace_t_cover_line__252_block [31:0] $end
+    $var wire 32 y vlCoverageLineTrace_t_cover_line__253_else [31:0] $end
+    $var wire 32 z vlCoverageLineTrace_t_cover_line__253_if [31:0] $end
+    $var wire 32 { vlCoverageLineTrace_t_cover_line__256_else [31:0] $end
+    $var wire 32 G! vlCoverageLineTrace_t_cover_line__256_if [31:0] $end
    $upscope $end
    $scope module par1 $end
-    $var wire 32 m CALLS_FUNC [31:0] $end
-    $var wire 32 n vlCoverageLineTrace_t_cover_line__283_block [31:0] $end
-    $var wire 32 o vlCoverageLineTrace_t_cover_line__284_else [31:0] $end
-    $var wire 32 p vlCoverageLineTrace_t_cover_line__284_if [31:0] $end
+    $var wire 32 H! CALLS_FUNC [31:0] $end
+    $var wire 32 I! vlCoverageLineTrace_t_cover_line__287_block [31:0] $end
+    $var wire 32 J! vlCoverageLineTrace_t_cover_line__288_else [31:0] $end
+    $var wire 32 K! vlCoverageLineTrace_t_cover_line__288_if [31:0] $end
    $upscope $end
    $scope module tab1 $end
-    $var wire 1 b clk $end
-    $var wire 4 L cyc4 [3:0] $end
-    $var wire 32 M decoded [31:0] $end
-    $var wire 32 N vlCoverageLineTrace_t_cover_line__261_block [31:0] $end
-    $var wire 32 O vlCoverageLineTrace_t_cover_line__263_case [31:0] $end
-    $var wire 32 P vlCoverageLineTrace_t_cover_line__264_case [31:0] $end
-    $var wire 32 Q vlCoverageLineTrace_t_cover_line__265_case [31:0] $end
-    $var wire 32 R vlCoverageLineTrace_t_cover_line__266_case [31:0] $end
-    $var wire 32 S vlCoverageLineTrace_t_cover_line__267_case [31:0] $end
-    $var wire 32 T vlCoverageLineTrace_t_cover_line__268_case [31:0] $end
-    $var wire 32 U vlCoverageLineTrace_t_cover_line__272_block [31:0] $end
+    $var wire 1 4! clk $end
+    $var wire 4 | cyc4 [3:0] $end
+    $var wire 32 } decoded [31:0] $end
+    $var wire 32 ~ vlCoverageLineTrace_t_cover_line__265_block [31:0] $end
+    $var wire 32 !! vlCoverageLineTrace_t_cover_line__267_case [31:0] $end
+    $var wire 32 "! vlCoverageLineTrace_t_cover_line__268_case [31:0] $end
+    $var wire 32 #! vlCoverageLineTrace_t_cover_line__269_case [31:0] $end
+    $var wire 32 $! vlCoverageLineTrace_t_cover_line__270_case [31:0] $end
+    $var wire 32 %! vlCoverageLineTrace_t_cover_line__271_case [31:0] $end
+    $var wire 32 &! vlCoverageLineTrace_t_cover_line__272_case [31:0] $end
+    $var wire 32 '! vlCoverageLineTrace_t_cover_line__276_block [31:0] $end
    $upscope $end
   $upscope $end
-  $var wire 1 b clk $end
+  $var wire 1 4! clk $end
+  $scope module my_pkg $end
+   $var wire 32 + x [31:0] $end
+   $var wire 32 , vlCoverageLineTrace_t_cover_line__300_block [31:0] $end
+  $upscope $end
  $upscope $end
 $enddefinitions $end
 
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diff --git a/test_regress/t/t_cover_line_tri_gate_cond.py b/test_regress/t/t_cover_line_tri_gate_cond.py
new file mode 100755
index 000000000..a99ecf292
--- /dev/null
+++ b/test_regress/t/t_cover_line_tri_gate_cond.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt_all')
+test.pli_filename = "t/t_tri_gate.cpp"
+test.top_filename = "t/t_tri_gate.v"
+
+test.compile(make_top_shell=False,
+             make_main=False,
+             v_flags2=['+define+T_COND'],
+             make_flags=['CPPFLAGS_ADD=-DT_COND'],
+             verilator_flags2=["--exe", test.pli_filename, "--coverage-line"])
+
+test.execute()
+
+test.passes()

From 25cb31c38bb1cde86f8ab378a6bebd42abf8e103 Mon Sep 17 00:00:00 2001
From: Shou-Li Hsu <hank850503@gmail.com>
Date: Tue, 20 May 2025 06:10:22 -0700
Subject: [PATCH 089/211] Add aggregate type error checks (#5570) (#5950)

---
 docs/CONTRIBUTORS                           |   1 +
 src/V3AstNodeDType.h                        |   5 +
 src/V3Slice.cpp                             |  95 ++++++++---------
 src/V3Width.cpp                             | 108 +++++++++++++++++++-
 test_regress/t/t_fuzz_eqne_bad.out          |   7 +-
 test_regress/t/t_lint_dtype_compare.py      |  18 ++++
 test_regress/t/t_lint_dtype_compare.v       |  78 ++++++++++++++
 test_regress/t/t_lint_dtype_compare_bad.out |  68 ++++++++++++
 test_regress/t/t_lint_dtype_compare_bad.py  |  16 +++
 test_regress/t/t_lint_dtype_compare_bad.v   |  84 +++++++++++++++
 test_regress/t/t_queue_compare.v            |   2 +-
 test_regress/t/t_stream_unpack_lhs.out      |  18 +++-
 12 files changed, 440 insertions(+), 60 deletions(-)
 create mode 100755 test_regress/t/t_lint_dtype_compare.py
 create mode 100644 test_regress/t/t_lint_dtype_compare.v
 create mode 100644 test_regress/t/t_lint_dtype_compare_bad.out
 create mode 100755 test_regress/t/t_lint_dtype_compare_bad.py
 create mode 100644 test_regress/t/t_lint_dtype_compare_bad.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 0a16f5c7a..1ea98ae05 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -205,6 +205,7 @@ Sean Cross
 Sebastien Van Cauwenberghe
 Sergi Granell
 Seth Pellegrino
+Shou-Li Hsu
 Srinivasan Venkataramanan
 Stefan Wallentowitz
 Stephen Henry
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 3b4aa1f84..8542bfa1f 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -124,6 +124,7 @@ public:
     // Iff has a non-null subDTypep(), as generic node function
     virtual AstNodeDType* subDTypep() const VL_MT_STABLE { return nullptr; }
     virtual AstNodeDType* subDType2p() const VL_MT_STABLE { return nullptr; }
+    virtual bool isAggregateType() const { return false; }
     virtual bool isFourstate() const;
     // Ideally an IEEE $typename
     virtual string prettyDTypeName(bool) const { return prettyTypeName(); }
@@ -366,6 +367,7 @@ public:
     AstNodeDType* subDType2p() const override VL_MT_STABLE {
         return m_keyDTypep ? m_keyDTypep : keyChildDTypep();
     }
+    bool isAggregateType() const override { return true; }
     void refDTypep(AstNodeDType* nodep) { m_refDTypep = nodep; }
     AstNodeDType* virtRefDTypep() const override { return m_refDTypep; }
     void virtRefDTypep(AstNodeDType* nodep) override { refDTypep(nodep); }
@@ -742,6 +744,7 @@ public:
     AstNodeDType* subDTypep() const override VL_MT_STABLE {
         return m_refDTypep ? m_refDTypep : childDTypep();
     }
+    bool isAggregateType() const override { return true; }
     void refDTypep(AstNodeDType* nodep) { m_refDTypep = nodep; }
     AstNodeDType* virtRefDTypep() const override { return m_refDTypep; }
     void virtRefDTypep(AstNodeDType* nodep) override { refDTypep(nodep); }
@@ -1108,6 +1111,7 @@ public:
     AstNodeDType* subDTypep() const override VL_MT_STABLE {
         return m_refDTypep ? m_refDTypep : childDTypep();
     }
+    bool isAggregateType() const override { return true; }
     void refDTypep(AstNodeDType* nodep) { m_refDTypep = nodep; }
     inline int boundConst() const VL_MT_STABLE;
     AstNodeDType* virtRefDTypep() const override { return m_refDTypep; }
@@ -1404,6 +1408,7 @@ public:
         const AstUnpackArrayDType* const sp = VN_DBG_AS(samep, UnpackArrayDType);
         return m_isCompound == sp->m_isCompound;
     }
+    bool isAggregateType() const override { return true; }
     // Outer dimension comes first. The first element is this node.
     std::vector<AstUnpackArrayDType*> unpackDimensions();
     void isCompound(bool flag) { m_isCompound = flag; }
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 27f123791..5744f5ed8 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -319,69 +319,58 @@ class SliceVisitor final : public VNVisitor {
 
     void expandBiOp(AstNodeBiop* nodep) {
         if (nodep->user1SetOnce()) return;  // Process once
-        // If it's an unpacked array, blow it up into comparing each element
-        AstNodeDType* const fromDtp = nodep->lhsp()->dtypep()->skipRefp();
         UINFO(9, "  Bi-Eq/Neq expansion " << nodep << endl);
+
+        // Only expand if lhs is an unpacked array (we assume type checks already passed)
+        const AstNodeDType* const fromDtp = nodep->lhsp()->dtypep()->skipRefp();
         if (const AstUnpackArrayDType* const adtypep = VN_CAST(fromDtp, UnpackArrayDType)) {
             AstNodeBiop* logp = nullptr;
-            if (!VN_IS(nodep->lhsp()->dtypep()->skipRefp(), NodeArrayDType)) {
-                nodep->lhsp()->v3error(
-                    "Slice operator "
-                    << nodep->lhsp()->prettyTypeName()
-                    << " on non-slicable (e.g. non-vector) left-hand-side operand");
-            } else if (!VN_IS(nodep->rhsp()->dtypep()->skipRefp(), NodeArrayDType)) {
-                nodep->rhsp()->v3error(
-                    "Slice operator "
-                    << nodep->rhsp()->prettyTypeName()
-                    << " on non-slicable (e.g. non-vector) right-hand-side operand");
-            } else {
-                const int elements = adtypep->rangep()->elementsConst();
-                for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
-                    // EQ(a,b) -> LOGAND(EQ(ARRAYSEL(a,0), ARRAYSEL(b,0)), ...[1])
-                    // Original node is replaced, so it is safe to copy it one time even if it is
-                    // impure.
-                    AstNodeBiop* const clonep
-                        = VN_AS(nodep->cloneType(
-                                    cloneAndSel(nodep->lhsp(), elements, elemIdx, elemIdx != 0),
-                                    cloneAndSel(nodep->rhsp(), elements, elemIdx, elemIdx != 0)),
-                                NodeBiop);
-                    if (elemIdx == 0) {
-                        nodep->foreach([this](AstExprStmt* const exprp) {
-                            // Result expression is always evaluated to the same value, so the
-                            // statements can be removed once they were included in the expression
-                            // created for the 1st element.
-                            AstNodeExpr* const resultp = exprp->resultp()->unlinkFrBack();
-                            exprp->replaceWith(resultp);
-                            VL_DO_DANGLING(pushDeletep(exprp), exprp);
-                        });
-                    }
 
-                    if (!logp) {
-                        logp = clonep;
-                    } else {
-                        switch (nodep->type()) {
-                        case VNType::atEq:  // FALLTHRU
-                        case VNType::atEqCase:
-                            logp = new AstLogAnd{nodep->fileline(), logp, clonep};
-                            break;
-                        case VNType::atNeq:  // FALLTHRU
-                        case VNType::atNeqCase:
-                            logp = new AstLogOr{nodep->fileline(), logp, clonep};
-                            break;
-                        default:
-                            nodep->v3fatalSrc("Unknown node type processing array slice");
-                            break;
-                        }
+            const int elements = adtypep->rangep()->elementsConst();
+            for (int elemIdx = 0; elemIdx < elements; ++elemIdx) {
+                // EQ(a,b) -> LOGAND(EQ(ARRAYSEL(a,0), ARRAYSEL(b,0)), ...[1])
+                // Original node is replaced, so it is safe to copy it one time even if it is
+                // impure.
+                AstNodeBiop* const clonep = VN_AS(
+                    nodep->cloneType(cloneAndSel(nodep->lhsp(), elements, elemIdx, elemIdx != 0),
+                                     cloneAndSel(nodep->rhsp(), elements, elemIdx, elemIdx != 0)),
+                    NodeBiop);
+                if (elemIdx == 0) {
+                    nodep->foreach([this](AstExprStmt* const exprp) {
+                        // Result expression is always evaluated to the same value, so the
+                        // statements can be removed once they were included in the expression
+                        // created for the 1st element.
+                        AstNodeExpr* const resultp = exprp->resultp()->unlinkFrBack();
+                        exprp->replaceWith(resultp);
+                        VL_DO_DANGLING(pushDeletep(exprp), exprp);
+                    });
+                }
+
+                if (!logp) {
+                    logp = clonep;
+                } else {
+                    switch (nodep->type()) {
+                    case VNType::atEq:  // FALLTHRU
+                    case VNType::atEqCase:
+                        logp = new AstLogAnd{nodep->fileline(), logp, clonep};
+                        break;
+                    case VNType::atNeq:  // FALLTHRU
+                    case VNType::atNeqCase:
+                        logp = new AstLogOr{nodep->fileline(), logp, clonep};
+                        break;
+                    default: nodep->v3fatalSrc("Unknown node type processing array slice"); break;
                     }
                 }
-                UASSERT_OBJ(logp, nodep, "Unpacked array with empty indices range");
-                nodep->replaceWith(logp);
-                VL_DO_DANGLING(pushDeletep(nodep), nodep);
-                nodep = logp;
             }
+            UASSERT_OBJ(logp, nodep, "Unpacked array with empty indices range");
+            nodep->replaceWith(logp);
+            VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            nodep = logp;
         }
+
         iterateChildren(nodep);
     }
+
     void visit(AstEq* nodep) override { expandBiOp(nodep); }
     void visit(AstNeq* nodep) override { expandBiOp(nodep); }
     void visit(AstEqCase* nodep) override { expandBiOp(nodep); }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 2d80c44f1..328f2e0da 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -6551,6 +6551,93 @@ class WidthVisitor final : public VNVisitor {
         }
     }
 
+    // LRM 6.22.2 Equivalent types
+    bool isEquivalentDType(const AstNodeDType* lhs, const AstNodeDType* rhs) {
+        // a) If two types match, they are equivalent.
+        if (!lhs || !rhs) return false;
+        lhs = lhs->skipRefp();
+        rhs = rhs->skipRefp();
+        if (lhs == rhs) return true;
+        // If both are basic types, check if they are the same type
+        if (VN_IS(lhs, BasicDType) && VN_IS(rhs, BasicDType)) {
+            const auto* lb = VN_CAST(lhs, BasicDType);
+            const auto* rb = VN_CAST(rhs, BasicDType);
+            if (lb->isString() != rb->isString()) return false;
+        }
+
+        // d) Unpacked fixed-size array types are equivalent if they have equivalent element types
+        // and equal size; the actual range bounds may differ. Note that the element type of a
+        // multidimensional array is itself an array type.
+        const bool lhsIsUnpackArray = VN_IS(lhs, UnpackArrayDType);
+        const bool rhsIsUnpackArray = VN_IS(rhs, UnpackArrayDType);
+        if (lhsIsUnpackArray || rhsIsUnpackArray) {
+            if (VN_IS(lhs, UnpackArrayDType) && VN_IS(rhs, UnpackArrayDType)) {
+                const AstUnpackArrayDType* const lhsp = VN_CAST(lhs, UnpackArrayDType);
+                const AstUnpackArrayDType* const rhsp = VN_CAST(rhs, UnpackArrayDType);
+                const int lsz = lhsp->elementsConst();
+                const int rsz = rhsp->elementsConst();
+                if (lsz >= 0 && rsz >= 0 && lsz != rsz) return false;
+                return isEquivalentDType(lhsp->subDTypep(), rhsp->subDTypep());
+            }
+            return false;
+        }
+
+        // e) Dynamic array, associative array, and queue types are equivalent if they are the same
+        // kind of array (dynamic, associative, or queue), have equivalent index types (for
+        // associative arrays), and have equivalent element types.
+        const bool lhsIsDynArray = VN_IS(lhs, DynArrayDType);
+        const bool rhsIsDynArray = VN_IS(rhs, DynArrayDType);
+        const bool lhsIsQueue = VN_IS(lhs, QueueDType);
+        const bool rhsIsQueue = VN_IS(rhs, QueueDType);
+        const bool lhsIsAssocArray = VN_IS(lhs, AssocArrayDType);
+        const bool rhsIsAssocArray = VN_IS(rhs, AssocArrayDType);
+
+        if (lhsIsDynArray || rhsIsDynArray || lhsIsQueue || rhsIsQueue || lhsIsAssocArray
+            || rhsIsAssocArray) {
+            if (const AstDynArrayDType* const lhsp = VN_CAST(lhs, DynArrayDType)) {
+                if (const AstDynArrayDType* const rhsp = VN_CAST(rhs, DynArrayDType)) {
+                    return isEquivalentDType(lhsp->subDTypep(), rhsp->subDTypep());
+                }
+            }
+
+            if (const AstQueueDType* const lhsp = VN_CAST(lhs, QueueDType)) {
+                if (const AstQueueDType* const rhsp = VN_CAST(rhs, QueueDType)) {
+                    return isEquivalentDType(lhsp->subDTypep(), rhsp->subDTypep());
+                }
+            }
+
+            if (const AstAssocArrayDType* const lhsp = VN_CAST(lhs, AssocArrayDType)) {
+                if (const AstAssocArrayDType* const rhsp = VN_CAST(rhs, AssocArrayDType)) {
+                    return isEquivalentDType(lhsp->subDTypep(), rhsp->subDTypep())
+                           && isEquivalentDType(lhsp->keyDTypep(), rhsp->keyDTypep());
+                }
+            }
+
+            return false;
+        }
+
+        // c) Packed arrays, packed structures, packed unions, and built-in integral
+        // types are equivalent if they contain the same number of total bits, are either all
+        // 2-state or all 4-state, and are either all signed or all unsigned.
+        if (lhs->isIntegralOrPacked() && rhs->isIntegralOrPacked()) {
+            if (lhs->width() != rhs->width()) return false;
+            if (lhs->isFourstate() != rhs->isFourstate()) return false;
+            if (lhs->isSigned() != rhs->isSigned()) return false;
+            return true;
+        }
+
+        return true;
+    }
+
+    static bool isAggregateType(const AstNode* nodep) {
+        if (!nodep) return false;
+        const AstNodeDType* dtypep = nodep->dtypep();
+        if (!dtypep) return false;
+        dtypep = dtypep->skipRefp();
+        if (!dtypep) return false;
+        return dtypep->isAggregateType();
+    }
+
     void visit_cmp_eq_gt(AstNodeBiop* nodep, bool realok) {
         // CALLER: AstEq, AstGt, ..., AstLtS
         // Real allowed if and only if real_lhs set
@@ -6567,7 +6654,26 @@ class WidthVisitor final : public VNVisitor {
         if (m_vup->prelim()) {
             userIterateAndNext(nodep->lhsp(), WidthVP{CONTEXT_DET, PRELIM}.p());
             userIterateAndNext(nodep->rhsp(), WidthVP{CONTEXT_DET, PRELIM}.p());
-            if (nodep->lhsp()->isDouble() || nodep->rhsp()->isDouble()) {
+
+            const bool isAggrLhs = isAggregateType(nodep->lhsp());
+            const bool isAggrRhs = isAggregateType(nodep->rhsp());
+
+            if ((isAggrLhs || isAggrRhs) && nodep->lhsp() && nodep->rhsp()) {
+                const AstNodeDType* const lhsDType = nodep->lhsp()->dtypep();
+                const AstNodeDType* const rhsDType = nodep->rhsp()->dtypep();
+
+                if (lhsDType && rhsDType && !isEquivalentDType(lhsDType, rhsDType)) {
+                    nodep->v3error("Comparison requires matching data types\n"
+                                   << nodep->warnMore() << "... Left-hand data type: "
+                                   << lhsDType->prettyDTypeNameQ() << "\n"
+                                   << nodep->warnMore() << "... Right-hand data type: "
+                                   << rhsDType->prettyDTypeNameQ());
+                    AstNode* const newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
+                    nodep->replaceWith(newp);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    return;
+                }
+            } else if (nodep->lhsp()->isDouble() || nodep->rhsp()->isDouble()) {
                 if (!realok) {
                     nodep->v3error("Real is illegal operand to ?== operator");
                     AstNode* const newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
diff --git a/test_regress/t/t_fuzz_eqne_bad.out b/test_regress/t/t_fuzz_eqne_bad.out
index 301b13d55..72d8f23be 100644
--- a/test_regress/t/t_fuzz_eqne_bad.out
+++ b/test_regress/t/t_fuzz_eqne_bad.out
@@ -1,5 +1,8 @@
-%Error: t/t_fuzz_eqne_bad.v:12:23: Slice operator VARREF 't.b' on non-slicable (e.g. non-vector) right-hand-side operand
+%Error: t/t_fuzz_eqne_bad.v:12:19: Comparison requires matching data types
+                                 : ... note: In instance 't'
+                                 : ... Left-hand data type: 'logic$[0:-1]'
+                                 : ... Right-hand data type: 'logic'
    12 |    initial c = (a != &b);
-      |                       ^
+      |                   ^~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_dtype_compare.py b/test_regress/t/t_lint_dtype_compare.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_lint_dtype_compare.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_lint_dtype_compare.v b/test_regress/t/t_lint_dtype_compare.v
new file mode 100644
index 000000000..0962af834
--- /dev/null
+++ b/test_regress/t/t_lint_dtype_compare.v
@@ -0,0 +1,78 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+  // Typedefs
+  typedef int myint_t;
+  typedef int myint2_t;
+  typedef int myq_t[$];
+  typedef int myval_t;
+  typedef string mykey_t;
+
+  initial begin
+    // Scalar
+    int a = 1, b = 1;
+
+    // Unpacked array
+    int u1[2] = '{1, 2};
+    int u2[2] = '{1, 2};
+
+    int m1[2][2] = '{{1, 2}, {3, 4}};
+    int m2[2][2] = '{{1, 2}, {3, 4}};
+
+    // Dynamic array
+    int d1[] = new[2];
+    int d2[] = new[2];
+
+    // Queue
+    int q1[$] = '{10, 20};
+    int q2[$] = '{10, 20};
+
+    // Associative array
+    int aa1[string];
+    int aa2[string];
+
+    // Typedef array
+    myint_t t1[2] = '{1, 2};
+    myint2_t t2[2] = '{1, 2};
+
+    // Typedef queue
+    myq_t tq1 = '{1, 2};
+    int   tq2[$] = '{1, 2};
+
+    // Typedef associative array
+    myval_t aa_typedef1[mykey_t];
+    int     aa_typedef2[string];
+
+    // Typedef scalar
+    bit signed [31:0] b1 = 1;
+    int               i1 = 1;
+
+    d1[0] = 5; d1[1] = 6;
+    d2[0] = 5; d2[1] = 6;
+
+    aa1["a"] = 1; aa2["a"] = 1;
+    aa1["b"] = 2; aa2["b"] = 2;
+
+    aa_typedef1["foo"] = 123;
+    aa_typedef2["foo"] = 123;
+
+    if (a != b)       $fatal(0, "Scalar comparison failed");
+    if (u1 != u2)     $fatal(0, "Unpacked 1D array comparison failed");
+    if (m1 != m2)     $fatal(0, "Unpacked multi-dimensional array comparison failed");
+    if (d1 != d2)     $fatal(0, "Dynamic array comparison failed");
+    if (q1 != q2)     $fatal(0, "Queue comparison failed");
+    if (aa1 != aa2)   $fatal(0, "Associative array comparison failed");
+    if (t1 != t2)     $fatal(0, "Typedef unpacked array comparison failed");
+    if (tq1 != tq2)   $fatal(0, "Typedef queue comparison failed");
+    if (aa_typedef1 != aa_typedef2)
+                     $fatal(0, "Typedef associative array comparison failed");
+    if (b1 != i1)     $fatal(0, "bit[31:0] vs int comparison failed");
+
+    $display("*-* All Finished *-*");
+    $finish;
+  end
+endmodule
diff --git a/test_regress/t/t_lint_dtype_compare_bad.out b/test_regress/t/t_lint_dtype_compare_bad.out
new file mode 100644
index 000000000..6ce4166dc
--- /dev/null
+++ b/test_regress/t/t_lint_dtype_compare_bad.out
@@ -0,0 +1,68 @@
+%Error: t/t_lint_dtype_compare_bad.v:52:19: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[$]'
+                                          : ... Right-hand data type: 'logic[31:0]'
+   52 |     if (queue_var == 1) begin end
+      |                   ^~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: t/t_lint_dtype_compare_bad.v:55:11: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'logic[31:0]'
+                                          : ... Right-hand data type: 'int$[$]'
+   55 |     if (1 == queue_var) begin end
+      |           ^~
+%Error: t/t_lint_dtype_compare_bad.v:58:12: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[$]'
+                                          : ... Right-hand data type: 'bit$[$]'
+   58 |     if (q1 == q2) begin end
+      |            ^~
+%Error: t/t_lint_dtype_compare_bad.v:61:12: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[]'
+                                          : ... Right-hand data type: 'bit$[]'
+   61 |     if (d1 == d2) begin end
+      |            ^~
+%Error: t/t_lint_dtype_compare_bad.v:64:12: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[0:1]'
+                                          : ... Right-hand data type: 'int$[0:1][0:0]'
+   64 |     if (u1 == u2) begin end
+      |            ^~
+%Error: t/t_lint_dtype_compare_bad.v:67:12: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[0:1]'
+                                          : ... Right-hand data type: 'int$[0:2]'
+   67 |     if (a1 == a2) begin end
+      |            ^~
+%Error: t/t_lint_dtype_compare_bad.v:70:13: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[string]'
+                                          : ... Right-hand data type: 'int$[int]'
+   70 |     if (aa1 == aa2) begin end
+      |             ^~
+%Error: t/t_lint_dtype_compare_bad.v:73:13: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[string]'
+                                          : ... Right-hand data type: 'logic[3:0]$[string]'
+   73 |     if (aa3 == aa4) begin end
+      |             ^~
+%Error: t/t_lint_dtype_compare_bad.v:76:14: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[0:1]'
+                                          : ... Right-hand data type: 'bit$[0:1]'
+   76 |     if (bad1 == bad2) begin end
+      |              ^~
+%Error: t/t_lint_dtype_compare_bad.v:79:14: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[string]'
+                                          : ... Right-hand data type: 'logic[31:0]$[string]'
+   79 |     if (val1 == val2) begin end
+      |              ^~
+%Error: t/t_lint_dtype_compare_bad.v:82:13: Comparison requires matching data types
+                                          : ... note: In instance 't'
+                                          : ... Left-hand data type: 'int$[string]'
+                                          : ... Right-hand data type: 'int$[int]'
+   82 |     if (aa5 == aa6) begin end
+      |             ^~
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_dtype_compare_bad.py b/test_regress/t/t_lint_dtype_compare_bad.py
new file mode 100755
index 000000000..55203b6c9
--- /dev/null
+++ b/test_regress/t/t_lint_dtype_compare_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_lint_dtype_compare_bad.v b/test_regress/t/t_lint_dtype_compare_bad.v
new file mode 100644
index 000000000..3079ba052
--- /dev/null
+++ b/test_regress/t/t_lint_dtype_compare_bad.v
@@ -0,0 +1,84 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// DESCRIPTION: Verilator: Invalid aggregate dtype comparisons
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Shou-Li Hsu.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+  typedef int    myint_t;
+  typedef bit    mybit_t;
+  typedef string mystr_t;
+  typedef int    myval_t;
+  typedef logic [31:0] mylogic_t;
+
+  initial begin
+    int queue_var[$] = '{1, 2, 3};
+    int q1[$] = '{1, 2};
+    bit q2[$] = '{1'b1, 1'b0};
+
+    int d1[] = new[2];
+    bit d2[] = new[2];
+
+    int u1[2] = '{1, 2};
+    int u2[2][1] = '{{1}, {2}};
+
+    int a1[2] = '{1, 2};
+    int a2[3] = '{1, 2, 3};
+
+    int aa1[string];
+    int aa2[int];
+
+    int aa3[string];
+    logic [3:0] aa4[string];
+
+    myint_t bad1[2] = '{1, 2};
+    mybit_t bad2[2] = '{1, 0};
+
+    myval_t   val1[mystr_t] = '{"foo": 123};
+    mylogic_t val2[string] = '{"foo": 32'h12345678};
+
+    myint_t aa5[string];
+    myint_t aa6[int];
+    aa5["a"] = 1;
+    aa6[1] = 1;
+
+    // queue vs scalar
+    if (queue_var == 1) begin end
+
+    // scalar vs queue
+    if (1 == queue_var) begin end
+
+    // queue with diff type
+    if (q1 == q2) begin end
+
+    // dyn array with diff type
+    if (d1 == d2) begin end
+
+    // unpacked diff dim
+    if (u1 == u2) begin end
+
+    // unpacked diff size
+    if (a1 == a2) begin end
+
+    // assoc array diff key type
+    if (aa1 == aa2) begin end
+
+    // assoc array diff value type
+    if (aa3 == aa4) begin end
+
+    // typedef mismatch in unpacked array
+    if (bad1 == bad2) begin end
+
+    // typedef mismatch in assoc array value
+    if (val1 == val2) begin end
+
+    // typedef mismatch in assoc array key
+    if (aa5 == aa6) begin end
+  end
+endmodule
diff --git a/test_regress/t/t_queue_compare.v b/test_regress/t/t_queue_compare.v
index 2ae40e991..991a3659a 100644
--- a/test_regress/t/t_queue_compare.v
+++ b/test_regress/t/t_queue_compare.v
@@ -18,7 +18,7 @@ module t;
    initial begin
       begin // integers
          int q1[$];
-         bit[31:0] q2[$];
+         bit signed [31:0] q2[$];
          q1.push_back(1);
          q2.push_back(1);
          q1.push_back(-2);
diff --git a/test_regress/t/t_stream_unpack_lhs.out b/test_regress/t/t_stream_unpack_lhs.out
index b7c7ae776..08b85723d 100644
--- a/test_regress/t/t_stream_unpack_lhs.out
+++ b/test_regress/t/t_stream_unpack_lhs.out
@@ -3,8 +3,20 @@
   113 |             if (unpacked_siz_dout != '{8'h01, 8'h23, 8'h45, 8'h67}) $stop;
       |                                      ^~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: Internal Error: t/t_stream_unpack_lhs.v:113:35: ../V3Width.cpp:#: Node has no type
+%Error-UNSUPPORTED: t/t_stream_unpack_lhs.v:114:38: Unsupported/Illegal: Assignment pattern member not underneath a supported construct: NEQ
+                                                  : ... note: In instance 't'
+  114 |             if (unpacked_asc_dout != '{8'h01, 8'h23, 8'h45, 8'h67}) $stop;
+      |                                      ^~
+%Error-UNSUPPORTED: t/t_stream_unpack_lhs.v:115:38: Unsupported/Illegal: Assignment pattern member not underneath a supported construct: NEQ
+                                                  : ... note: In instance 't'
+  115 |             if (unpacked_des_dout != '{8'h76, 8'h54, 8'h32, 8'h10}) $stop;
+      |                                      ^~
+%Error-UNSUPPORTED: t/t_stream_unpack_lhs.v:117:36: Unsupported/Illegal: Assignment pattern member not underneath a supported construct: NEQ
+                                                  : ... note: In instance 't'
+  117 |             if (packed_siz_dout != '{8'h01, 8'h23, 8'h45, 8'h67}) $stop;
+      |                                    ^~
+%Error: Internal Error: t/t_stream_unpack_lhs.v:117:33: ../V3Width.cpp:#: Node has no type
                                                       : ... note: In instance 't'
-  113 |             if (unpacked_siz_dout != '{8'h01, 8'h23, 8'h45, 8'h67}) $stop;
-      |                                   ^~
+  117 |             if (packed_siz_dout != '{8'h01, 8'h23, 8'h45, 8'h67}) $stop;
+      |                                 ^~
                         ... This fatal error may be caused by the earlier error(s); resolve those first.

From 6d257ef52c4af35634dc85e74e005f19f447cc2d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Tue, 20 May 2025 18:15:09 +0200
Subject: [PATCH 090/211] Improve hierarchical scheduling visualization in
 V3ExecGraph (#6009)

---
 src/V3ExecGraph.cpp     | 182 ++++++++++++++++++++++++++++++----------
 src/V3OrderParallel.cpp |   5 +-
 2 files changed, 141 insertions(+), 46 deletions(-)

diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index 7d1d466d7..318009efe 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -96,8 +96,18 @@ public:
 private:
     VL_UNCOPYABLE(ThreadSchedule);
 
+    static constexpr double s_threadBoxWidth = 2.5;
+    static constexpr double s_threadBoxHeight = 1.5;
+    static constexpr double s_horizontalGap = s_threadBoxWidth / 2;
+
     // Debugging
-    void dumpDotFile(const V3Graph& graph, const string& filename) const {
+    // Variant of dumpDotFilePrefixed without --dump option check
+    static void dumpDotFilePrefixedAlways(const std::vector<ThreadSchedule>& schedules,
+                                          const string& nameComment, uint32_t nThreads) {
+        dumpDotFile(schedules, v3Global.debugFilename(nameComment) + ".dot", nThreads);
+    }
+    static void dumpDotFile(const std::vector<ThreadSchedule>& schedules, const string& filename,
+                            uint32_t nThreads) {
         // This generates a file used by graphviz, https://www.graphviz.org
         const std::unique_ptr<std::ofstream> logp{V3File::new_ofstream(filename)};
         if (logp->fail()) v3fatal("Can't write file: " << filename);
@@ -109,52 +119,102 @@ private:
 
         // Thread labels
         *logp << "\n  // Threads\n";
-        const int threadBoxWidth = 2;
-        for (int i = 0; i < v3Global.opt.threads(); i++) {
-            *logp << "  t" << i << " [label=\"Thread " << i << "\" width=" << threadBoxWidth
-                  << " pos=\"" << (-threadBoxWidth / 2) << "," << -i
-                  << "!\" style=\"filled\" fillcolor=\"grey\"] \n";
+
+        for (uint32_t i = 0; i < nThreads; ++i) {
+            const string name = "t" + std::to_string(i);
+            const string label = "Thread " + std::to_string(i);
+            constexpr double posX = -s_horizontalGap;
+            const double posY = -static_cast<double>(i) * s_threadBoxHeight;
+            dumpDotFileEmitBlock(logp, name, label, s_threadBoxWidth, s_threadBoxHeight, posX,
+                                 posY, "grey");
         }
 
         // MTask nodes
         *logp << "\n  // MTasks\n";
 
-        // Find minimum cost MTask for scaling MTask node widths
-        uint32_t minCost = UINT32_MAX;
-        for (const V3GraphVertex& vtx : graph.vertices()) {
-            if (const ExecMTask* const mtaskp = vtx.cast<const ExecMTask>()) {
-                minCost = minCost > mtaskp->cost() ? mtaskp->cost() : minCost;
+        uint32_t maxCost = 0;
+        for (const auto& state : ThreadSchedule::mtaskState) {
+            const ExecMTask* const mtaskp = state.first;
+            maxCost = std::max(maxCost, mtaskp->cost());
+        }
+        // To avoid segments getting too large, limit maximal mtask length.
+        // Based on the mtask cost, normalize it using segment cost
+        constexpr uint32_t segmentsPerLongestMtask = 4;
+        const uint32_t segmentCost = maxCost / segmentsPerLongestMtask;
+
+        // Create columns of tasks whose execution intervals overlaps.
+        // Keep offset for each column for correctly aligned tasks.
+        std::vector<double> offsets(nThreads, 0.0);
+        for (const ThreadSchedule& schedule : schedules) {
+            if (schedule.mtasks.empty()) continue;
+            using Column = std::vector<const ExecMTask*>;
+            std::vector<Column> columns = {{}};
+
+            // Order tasks based on their start time
+            struct Cmp final {
+                bool operator()(const ExecMTask* const a, const ExecMTask* const b) const {
+                    if (startTime(a) == startTime(b)) return threadId(a) < threadId(b);
+                    return startTime(a) < startTime(b);
+                }
+            };
+            const std::multiset<const ExecMTask*, Cmp> tasks(schedule.mtasks.begin(),
+                                                             schedule.mtasks.end());
+
+            for (const ExecMTask* const mtaskp : tasks) {
+                Column& column = columns.back();
+                UASSERT(column.size() <= nThreads, "Invalid partitioning");
+
+                bool intersects = true;
+                for (const ExecMTask* const earlierMtask : column) {
+                    if (endTime(mtaskp) <= startTime(earlierMtask)
+                        || startTime(mtaskp) >= endTime(earlierMtask)) {
+                        intersects = false;
+                        break;
+                    }
+                }
+                if (intersects) {
+                    column.emplace_back(mtaskp);
+                } else {
+                    columns.emplace_back(Column{mtaskp});
+                }
             }
-        }
-        const double minWidth = 2.0;
-        const auto mtaskXPos = [&](const ExecMTask* mtaskp, const double nodeWidth) {
-            const double startPosX = (minWidth * startTime(mtaskp)) / minCost;
-            return nodeWidth / minWidth + startPosX;
-        };
 
-        const auto emitMTask = [&](const ExecMTask* mtaskp) {
-            const int thread = threadId(mtaskp);
-            const double nodeWidth = minWidth * (static_cast<double>(mtaskp->cost()) / minCost);
-            const double x = mtaskXPos(mtaskp, nodeWidth);
-            const int y = -thread;
-            const string label = "label=\"" + mtaskp->name() + " (" + cvtToStr(startTime(mtaskp))
-                                 + ":" + std::to_string(endTime(mtaskp)) + ")" + "\"";
-            *logp << "  " << mtaskp->name() << " [" << label << " width=" << nodeWidth << " pos=\""
-                  << x << "," << y << "!\"]\n";
-        };
+            UASSERT(!columns.front().empty(), "Should be populated by mtasks");
 
-        // Emit MTasks
-        for (const V3GraphVertex& vtx : graph.vertices()) {
-            if (const ExecMTask* const mtaskp = vtx.cast<const ExecMTask>()) emitMTask(mtaskp);
-        }
+            for (const Column& column : columns) {
+                double lastColumnOffset = 0;
+                for (const ExecMTask* const mtaskp : column) {
+                    dumpDotFileEmitMTask(logp, mtaskp, schedule, segmentCost, offsets);
+                    lastColumnOffset = std::max(lastColumnOffset, offsets[threadId(mtaskp)]);
+                }
+                // Even out column offset
+                std::fill(offsets.begin(), offsets.end(), lastColumnOffset);
+            }
 
-        // Emit MTask dependency edges
-        *logp << "\n  // MTask dependencies\n";
-        for (const V3GraphVertex& vtx : graph.vertices()) {
-            if (const ExecMTask* const mtaskp = vtx.cast<const ExecMTask>()) {
-                for (const V3GraphEdge& edge : mtaskp->outEdges()) {
-                    const V3GraphVertex* const top = edge.top();
-                    *logp << "  " << vtx.name() << " -> " << top->name() << "\n";
+            dumpDotFileEmitFork(logp, offsets.front(), nThreads);
+
+            // Emit MTask dependency edges
+            *logp << "\n  // MTask dependencies\n";
+
+            for (const std::vector<const ExecMTask*>& thread : schedule.threads) {
+                if (thread.empty()) break;  // No more threads
+
+                // Show that schedule ends when all tasks are finished
+                *logp << "  " << thread.back()->name() << " -> fork_"
+                      << static_cast<int>(offsets.front()) << "\n";
+
+                // Show that tasks from the same thread are executed in a sequence
+                for (size_t i = 1; i < thread.size(); ++i)
+                    *logp << "  " << thread[i - 1]->name() << " -> " << thread[i]->name() << "\n";
+
+                // Emit cross-task dependencies
+                for (const ExecMTask* const mtaskp : thread) {
+                    for (const V3GraphEdge& edge : mtaskp->outEdges()) {
+                        const ExecMTask* const topMTaskp = edge.top()->cast<const ExecMTask>();
+                        if (topMTaskp && schedule.contains(topMTaskp)
+                            && threadId(topMTaskp) != threadId(mtaskp))
+                            *logp << "  " << mtaskp->name() << " -> " << topMTaskp->name() << "\n";
+                    }
                 }
             }
         }
@@ -163,10 +223,47 @@ private:
         *logp << "}\n";
         logp->close();
     }
+    static void dumpDotFileEmitBlock(const std::unique_ptr<std::ofstream>& logp,
+                                     const string& name, const string& label, double width,
+                                     double height, double xPos, double yPos,
+                                     const string& fillColor) {
+        *logp << "  " << name << " [label=\"" << label << "\" width=" << width
+              << " height=" << height << " pos=\"" << xPos << "," << yPos
+              << "!\" style=\"filled\" fillcolor=\"" << fillColor << "\"]\n";
+    }
+    static void dumpDotFileEmitMTask(const std::unique_ptr<std::ofstream>& logp,
+                                     const ExecMTask* const mtaskp, const ThreadSchedule& schedule,
+                                     uint32_t segmentCost, std::vector<double>& offsets) {
+        for (int i = 0; i < mtaskp->threads(); ++i) {
+            // Keep original name for the original thread of hierarchical task to keep
+            // dependency tracking, add '_' for the rest to differentiate them.
+            const string name = i == 0 ? mtaskp->name() : mtaskp->name() + '_' + std::to_string(i);
+            const string label = mtaskp->name() + " (" + std::to_string(startTime(mtaskp)) + ':'
+                                 + std::to_string(endTime(mtaskp)) + ')'
+                                 + "\\ncost=" + std::to_string(mtaskp->cost())
+                                 + "\\npriority=" + std::to_string(mtaskp->priority());
+            const double width
+                = std::max(s_threadBoxWidth,
+                           s_threadBoxWidth * static_cast<double>(mtaskp->cost()) / segmentCost);
+            const uint32_t mtaskThreadId = threadId(mtaskp) + i * schedule.threads.size();
+            const double xPos = width / 2 + offsets[mtaskThreadId];
+            offsets[mtaskThreadId] += width + s_horizontalGap;
+            const double yPos = -s_threadBoxHeight * static_cast<double>(mtaskThreadId);
+            const string fillColor = i == 0 ? "white" : "lightgreen";
+            dumpDotFileEmitBlock(logp, name, label, width, s_threadBoxHeight, xPos, yPos,
+                                 fillColor);
+        }
+    }
 
-    // Variant of dumpDotFilePrefixed without --dump option check
-    void dumpDotFilePrefixedAlways(const V3Graph& graph, const string& nameComment) const {
-        dumpDotFile(graph, v3Global.debugFilename(nameComment) + ".dot");
+    static void dumpDotFileEmitFork(const std::unique_ptr<std::ofstream>& logp, double offset,
+                                    uint32_t nThreads) {
+        const string& name = "fork_" + std::to_string(static_cast<int>(offset));
+        constexpr double width = s_threadBoxWidth / 8;
+        const double height = s_threadBoxHeight * nThreads;
+        const double xPos = offset - s_horizontalGap / 2;
+        const double yPos
+            = -static_cast<double>(nThreads) / 2 * s_threadBoxHeight + s_threadBoxHeight / 2;
+        dumpDotFileEmitBlock(logp, name, "", width, height, xPos, yPos, "black");
     }
 
 public:
@@ -424,7 +521,8 @@ class PackThreads final {
         }
 
         // All schedules are combined on a single graph
-        if (dumpGraphLevel() >= 4) result.back().dumpDotFilePrefixedAlways(mtaskGraph, "schedule");
+        if (dumpGraphLevel() >= 4)
+            ThreadSchedule::dumpDotFilePrefixedAlways(result, "schedule", m_nThreads);
 
         return result;
     }
diff --git a/src/V3OrderParallel.cpp b/src/V3OrderParallel.cpp
index aca1ac329..57ab4c3c5 100644
--- a/src/V3OrderParallel.cpp
+++ b/src/V3OrderParallel.cpp
@@ -1749,10 +1749,7 @@ class DpiThreadsVisitor final : public VNVisitorConst {
         m_threads = std::max(m_threads, V3Config::getHierWorkers(nodep->cname()));
         iterateChildrenConst(nodep);
     }
-    void visit(AstNodeCCall* nodep) override {
-        iterateChildrenConst(nodep);
-        iterateConst(nodep->funcp());
-    }
+    void visit(AstNodeCCall* nodep) override { iterateConst(nodep->funcp()); }
     void visit(AstNode* nodep) override { iterateChildrenConst(nodep); }
 
 public:

From 80ea173390468e21e97c6e4f4d204df4dc758b31 Mon Sep 17 00:00:00 2001
From: Joel Bodenmann <jbo@insane.engineer>
Date: Tue, 20 May 2025 23:46:07 +0000
Subject: [PATCH 091/211] Add missing FreeBSD include (#6027) (#6028)

Fixes #6027
---
 docs/CONTRIBUTORS             | 1 +
 include/verilated_threads.cpp | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 1ea98ae05..02759c300 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -106,6 +106,7 @@ Jiangjie Weng
 Jinyan Xu
 Jitesh Nayak
 Jiuyang Liu
+Joel Bodenmann
 Joey Liu
 John Coiner
 John Demme
diff --git a/include/verilated_threads.cpp b/include/verilated_threads.cpp
index 1d1f48796..63401aaa3 100644
--- a/include/verilated_threads.cpp
+++ b/include/verilated_threads.cpp
@@ -31,6 +31,10 @@
 #include <memory>
 #include <string>
 
+#ifdef __FreeBSD__
+    #include <pthread_np.h>
+#endif
+
 //=============================================================================
 // Globals
 

From a227aad13d0081ea394425a0a520825c565fbb56 Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Tue, 20 May 2025 23:46:57 +0000
Subject: [PATCH 092/211] Apply 'make format'

---
 include/verilated_threads.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/verilated_threads.cpp b/include/verilated_threads.cpp
index 63401aaa3..06c500bca 100644
--- a/include/verilated_threads.cpp
+++ b/include/verilated_threads.cpp
@@ -32,7 +32,7 @@
 #include <string>
 
 #ifdef __FreeBSD__
-    #include <pthread_np.h>
+#include <pthread_np.h>
 #endif
 
 //=============================================================================

From f8359adcc06169637e91352a6e3d8f98b0a158a5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 20 May 2025 22:51:07 -0400
Subject: [PATCH 093/211] Commentary: Changes update

---
 Changes                      | 11 ++++++++---
 docs/guide/exe_verilator.rst |  8 ++++----
 docs/guide/warnings.rst      |  4 ++--
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/Changes b/Changes
index d8f1d20b5..f151914c0 100644
--- a/Changes
+++ b/Changes
@@ -5,7 +5,7 @@ Revision History and Change Log
 ===============================
 
 The changes in each Verilator version are described below.  The
-contributors that suggested a given feature are shown in []. Thanks!
+contributors that suggested or implemented a given issue are shown in []. Thanks!
 
 
 Verilator 5.037 devel
@@ -13,13 +13,16 @@ Verilator 5.037 devel
 
 **Other:**
 
-* Support redeclaring type as non-type; major parsing change (#2412).
+* Support redeclaring type as non-type; major parsing change (#2412) (#6020).
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Support parameter forward types.
-* Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
+* Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
+* Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
+* Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
+* Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
@@ -37,6 +40,8 @@ Verilator 5.037 devel
 * Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
 * Fix skipped generate blocks in toggle coverage (#6010). [Ryszard Rozak, Antmicro Ltd.]
 * Fix arithmetic left-shift by constants over 32 bits (#6007) (#6015). [Zhen Yan]
+* Fix wrong optimization result of shifted out variable (#6016) (#6019). [Yutetsu TAKATSUKASA]
+* Add missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
 
 
 Verilator 5.036 2025-04-27
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 9faeddd73..290f07c0e 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -2260,13 +2260,13 @@ The grammar of configuration commands is as follows:
    order to improve model runtime performance.  This option is not expected
    to be used by users directly.  See :ref:`Thread PGO`.
 
-.. option:: public [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public_flat [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat_rd [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>"
+.. option:: public_flat_rd [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>"]
 
-.. option:: public_flat_rw [-module "<modulename>"] [-task/-function "<taskname>"]  -var "<signame>" "@(edge)"
+.. option:: public_flat_rw [-module "<modulename>"] [-task/-function "<taskname>"] [-var "<signame>" "@(edge)"]
 
    Sets the variable to be public.  Same as
    :option:`/*verilator&32;public*/` or
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 67aa1f92c..24f525105 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1337,11 +1337,11 @@ List Of Warnings
 
    Faulty example:
 
-   .. include:: ../../docs/gen/ex_PKGNODECL_faulty.rst
+   .. include:: ../../docs/gen/ex_PINMISSING_faulty.rst
 
    Results in:
 
-   .. include:: ../../docs/gen/ex_PKGNODECL_msg.rst
+   .. include:: ../../docs/gen/ex_PINMISSING_msg.rst
 
    Repaired example:
 

From de08655c5b0a03a47228542d5c280102eb5ac139 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 20 May 2025 22:51:54 -0400
Subject: [PATCH 094/211] Internals: Fix some legacy casts. No functional
 change.

---
 include/verilated_save.h | 2 +-
 src/V3Ast.h              | 2 +-
 src/V3EmitMk.cpp         | 6 +++---
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/verilated_save.h b/include/verilated_save.h
index e49eaeb6d..c1a7c4a0f 100644
--- a/include/verilated_save.h
+++ b/include/verilated_save.h
@@ -294,7 +294,7 @@ inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, std::string& r
     uint32_t len = 0;
     os >> len;
     rhs.resize(len);
-    // C cast is required below
+    // NOLINTNEXTLINE(google-readability-casting)
     return os.read((void*)(rhs.data()), len);
 }
 VerilatedSerialize& operator<<(VerilatedSerialize& os, VerilatedContext* rhsp);
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 46a0c6f0d..54ebbe1a8 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -92,7 +92,7 @@ class VFlagChildDType {};  // Used by parser.y to select constructor that sets c
 #endif
 
 // (V)erilator (N)ode deleted: Pointer to deleted AstNode (for assertions only)
-#define VN_DELETED(nodep) VL_UNLIKELY((uint64_t)(nodep) == 0x1)
+#define VN_DELETED(nodep) VL_UNLIKELY(reinterpret_cast<uint64_t>(nodep) == 0x1)
 
 //######################################################################
 
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 6a7631c5e..246f0f027 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -332,9 +332,9 @@ private:
 
                 for (; fileIt != list.m_files.end(); ++fileIt) {
                     const uint64_t diffNow
-                        = std::abs((int64_t)(listIdealBucketScore - bucketScore));
-                    const uint64_t diffIfAdded = std::abs(
-                        (int64_t)(listIdealBucketScore - bucketScore - fileIt->m_score));
+                        = std::abs(static_cast<int64_t>(listIdealBucketScore - bucketScore));
+                    const uint64_t diffIfAdded = std::abs(static_cast<int64_t>(
+                        listIdealBucketScore - bucketScore - fileIt->m_score));
                     if (bucketScore == 0 || fileIt->m_score == 0 || diffNow > diffIfAdded) {
                         // Bucket score will be better with the file in it.
                         bucketScore += fileIt->m_score;

From d400584460dc068bd2cd355a31b7dde7caa6f231 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Wed, 21 May 2025 08:41:29 -0400
Subject: [PATCH 095/211] Fix concatenation and type casting (#6012) (#6013)

---
 src/V3Width.cpp                  |  6 +++++
 test_regress/t/t_concat_casts.py | 18 ++++++++++++++
 test_regress/t/t_concat_casts.v  | 41 ++++++++++++++++++++++++++++++++
 3 files changed, 65 insertions(+)
 create mode 100755 test_regress/t/t_concat_casts.py
 create mode 100644 test_regress/t/t_concat_casts.v

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 328f2e0da..ee596ee6c 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2112,6 +2112,7 @@ class WidthVisitor final : public VNVisitor {
                                               VFlagChildDType{}, refp};
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
+            userIterate(newp, m_vup);
         } else {
             nodep->v3warn(E_UNSUPPORTED,
                           "Unsupported: Cast to " << nodep->dtp()->prettyTypeName());
@@ -2126,6 +2127,11 @@ class WidthVisitor final : public VNVisitor {
         if (m_vup->prelim()) {
             if (debug() >= 9) nodep->dumpTree("-  CastPre: ");
             // if (debug()) nodep->backp()->dumpTree("-  CastPreUpUp: ");
+            if (AstSigned* const fromp = VN_CAST(nodep->fromp(), Signed)) {
+                AstNode* const lhsp = fromp->lhsp()->unlinkFrBack();
+                fromp->replaceWith(lhsp);
+                VL_DO_DANGLING(fromp->deleteTree(), fromp);
+            }
             userIterateAndNext(nodep->fromp(), WidthVP{SELF, PRELIM}.p());
             if (debug() >= 9) nodep->dumpTree("-  CastDit: ");
             AstNodeDType* const toDtp = nodep->dtypep()->skipRefToEnump();
diff --git a/test_regress/t/t_concat_casts.py b/test_regress/t/t_concat_casts.py
new file mode 100755
index 000000000..c39e83d77
--- /dev/null
+++ b/test_regress/t/t_concat_casts.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("simulator")
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_concat_casts.v b/test_regress/t/t_concat_casts.v
new file mode 100644
index 000000000..beb5c8637
--- /dev/null
+++ b/test_regress/t/t_concat_casts.v
@@ -0,0 +1,41 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+package my_pkg;
+    typedef enum logic [1:0] {
+        SIG_0, SIG_1, SIG_2
+    } sig_t;
+endpackage : my_pkg
+
+
+module t;
+    import my_pkg::*;
+
+    typedef logic [7:0] foo_t;
+    typedef logic [31:0] bar_t;
+
+    bar_t [1:0] the_bars;
+
+    foo_t [0:0][1:0] the_foos;
+
+    always_comb begin
+        the_bars = {32'd7, 32'd8};
+        the_foos[0] = {foo_t'(the_bars[1]), foo_t'(the_bars[0])};
+    end
+
+    logic [6:0] data;
+    logic [2:0] opt;
+
+    assign data = 7'b110_0101;
+    assign opt = {data[5], sig_t'(data[1:0])};
+
+    initial begin
+        if (the_foos != 'h0708) $stop();
+        if (opt != 'b101) $stop();
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+endmodule

From 2491f25da7ef8bec61963e52ec58ad1f8b72dd3a Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Thu, 22 May 2025 11:42:09 +0200
Subject: [PATCH 096/211] Add filtering type option in verilator_coverage
 (#6030)

---
 bin/verilator_coverage                        |   1 +
 docs/guide/exe_verilator_coverage.rst         |   6 +
 include/verilated_cov.cpp                     |   4 +
 src/VlcMain.cpp                               |   1 +
 src/VlcOptions.h                              |   5 +
 src/VlcPoint.h                                |  31 +-
 src/VlcTop.cpp                                |   2 +
 test_regress/t/t_assert_ctl_arg.dat.out       | 304 ++++++++--------
 test_regress/t/t_cover_lib__1.out             |  12 +-
 .../t/t_cover_lib__1_per_instance.out         |  14 +-
 test_regress/t/t_cover_lib__2.out             |   4 +-
 test_regress/t/t_cover_lib__3.out             |   4 +-
 test_regress/t/t_cover_main.out               |   2 +-
 test_regress/t/t_vlcov_data_e.dat             | 226 ++++++++++++
 test_regress/t/t_vlcov_data_f.dat             | 157 ++++++++
 test_regress/t/t_vlcov_opt_branch.info.out    | 127 +++++++
 test_regress/t/t_vlcov_opt_branch.py          |  22 ++
 test_regress/t/t_vlcov_opt_expr.info.out      |  23 ++
 test_regress/t/t_vlcov_opt_expr.py            |  22 ++
 test_regress/t/t_vlcov_opt_line.info.out      |  87 +++++
 test_regress/t/t_vlcov_opt_line.py            |  22 ++
 test_regress/t/t_vlcov_opt_toggle.info.out    | 116 ++++++
 test_regress/t/t_vlcov_opt_toggle.py          |  22 ++
 test_regress/t/t_vlcov_opt_user.info.out      | 182 ++++++++++
 test_regress/t/t_vlcov_opt_user.py            |  22 ++
 test_regress/t/t_vlcov_opt_wild.info.out      | 334 ++++++++++++++++++
 test_regress/t/t_vlcov_opt_wild.py            |  22 ++
 .../t/t_wrapper_context__top0.dat.out         | 162 ++++-----
 .../t/t_wrapper_context__top1.dat.out         | 162 ++++-----
 29 files changed, 1755 insertions(+), 343 deletions(-)
 create mode 100644 test_regress/t/t_vlcov_data_e.dat
 create mode 100644 test_regress/t/t_vlcov_data_f.dat
 create mode 100644 test_regress/t/t_vlcov_opt_branch.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_branch.py
 create mode 100644 test_regress/t/t_vlcov_opt_expr.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_expr.py
 create mode 100644 test_regress/t/t_vlcov_opt_line.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_line.py
 create mode 100644 test_regress/t/t_vlcov_opt_toggle.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_toggle.py
 create mode 100644 test_regress/t/t_vlcov_opt_user.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_user.py
 create mode 100644 test_regress/t/t_vlcov_opt_wild.info.out
 create mode 100755 test_regress/t/t_vlcov_opt_wild.py

diff --git a/bin/verilator_coverage b/bin/verilator_coverage
index e7f1f6be2..476da1b1a 100755
--- a/bin/verilator_coverage
+++ b/bin/verilator_coverage
@@ -170,6 +170,7 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
     --annotate-all                All files should be shown.
     --annotate-min <count>        Minimum occurrence count for uncovered.
     --annotate-points             Annotates info from each coverage point.
+    --filter-type <type>          Skips records of coverage types different than <type>.
     --help                        Displays this message and version and exits.
     --rank                        Compute relative importance of tests.
     --unlink                      With --write, unlink all inputs
diff --git a/docs/guide/exe_verilator_coverage.rst b/docs/guide/exe_verilator_coverage.rst
index 11cd6e52a..c7db059c2 100644
--- a/docs/guide/exe_verilator_coverage.rst
+++ b/docs/guide/exe_verilator_coverage.rst
@@ -124,6 +124,12 @@ verilator_coverage Arguments
 
    This option should be used together with :option:`--annotate`.
 
+.. option:: --filter-type <regex>
+
+   Skips records of coverage types that matches with <regex>
+   Possible values are `toggle`, `line`, `branch`, `expr`, `user` and
+   a wildcard with `\*` or `?`. The default value is `\*`.
+
 .. option:: --help
 
    Displays a help summary, the program version, and exits.
diff --git a/include/verilated_cov.cpp b/include/verilated_cov.cpp
index a9bc7c1cd..d81742199 100644
--- a/include/verilated_cov.cpp
+++ b/include/verilated_cov.cpp
@@ -390,6 +390,10 @@ public:
                         hier = val;
                     } else {
                         // Print it
+                        if (key == "page") {
+                            const std::string type = val.substr(2, val.find('/') - 2);
+                            name += keyValueFormatter(VL_CIK_TYPE, type);
+                        }
                         name += keyValueFormatter(key, val);
                     }
                 }
diff --git a/src/VlcMain.cpp b/src/VlcMain.cpp
index fbabc9b07..328359b25 100644
--- a/src/VlcMain.cpp
+++ b/src/VlcMain.cpp
@@ -68,6 +68,7 @@ void VlcOptions::parseOptsList(int argc, char** argv) {
     DECL_OPTION("-annotate-points", OnOff, &m_annotatePoints);
     DECL_OPTION("-debug", CbCall, []() { V3Error::debugDefault(3); });
     DECL_OPTION("-debugi", CbVal, [](int v) { V3Error::debugDefault(v); });
+    DECL_OPTION("-filter-type", Set, &m_filterType);
     DECL_OPTION("-rank", OnOff, &m_rank);
     DECL_OPTION("-unlink", OnOff, &m_unlink);
     DECL_OPTION("-V", CbCall, []() {
diff --git a/src/VlcOptions.h b/src/VlcOptions.h
index edd889957..21e06090b 100644
--- a/src/VlcOptions.h
+++ b/src/VlcOptions.h
@@ -20,6 +20,7 @@
 #include "config_build.h"
 #include "verilatedos.h"
 
+#include "VlcPoint.h"
 #include "config_rev.h"
 
 #include <map>
@@ -38,6 +39,7 @@ class VlcOptions final {
     bool m_annotateAll = false;  // main switch: --annotate-all
     int m_annotateMin = 10;     // main switch: --annotate-min I<count>
     bool m_annotatePoints = false;  // main switch: --annotate-points
+    string m_filterType = "*";  // main switch: --filter-type
     VlStringSet m_readFiles;    // main switch: --read
     bool m_rank = false;        // main switch: --rank
     bool m_unlink = false;      // main switch: --unlink
@@ -69,6 +71,9 @@ public:
     bool unlink() const { return m_unlink; }
     string writeFile() const { return m_writeFile; }
     string writeInfoFile() const { return m_writeInfoFile; }
+    bool isTypeMatch(const char* name) const {
+        return VString::wildmatch(VlcPoint::typeExtract(name), m_filterType);
+    }
 
     // METHODS (from main)
     static string version() VL_MT_DISABLED;
diff --git a/src/VlcPoint.h b/src/VlcPoint.h
index afb546f46..f26d10dde 100644
--- a/src/VlcPoint.h
+++ b/src/VlcPoint.h
@@ -61,20 +61,29 @@ public:
         return m_count >= threshi;
     }
     // KEY ACCESSORS
-    string filename() const { return keyExtract(VL_CIK_FILENAME); }
-    string comment() const { return keyExtract(VL_CIK_COMMENT); }
-    string hier() const { return keyExtract(VL_CIK_HIER); }
-    string type() const { return keyExtract(VL_CIK_TYPE); }
-    string thresh() const { return keyExtract(VL_CIK_THRESH); }  // string as maybe ""
-    string linescov() const { return keyExtract(VL_CIK_LINESCOV); }
-    int lineno() const { return std::atoi(keyExtract(VL_CIK_LINENO).c_str()); }
-    int column() const { return std::atoi(keyExtract(VL_CIK_COLUMN).c_str()); }
+    string filename() const { return keyExtract(VL_CIK_FILENAME, m_name.c_str()); }
+    string comment() const { return keyExtract(VL_CIK_COMMENT, m_name.c_str()); }
+    string hier() const { return keyExtract(VL_CIK_HIER, m_name.c_str()); }
+    string type() const { return typeExtract(m_name.c_str()); }
+    string thresh() const {
+        // string as maybe ""
+        return keyExtract(VL_CIK_THRESH, m_name.c_str());
+    }
+    string linescov() const { return keyExtract(VL_CIK_LINESCOV, m_name.c_str()); }
+    int lineno() const {
+        const string lineStr = keyExtract(VL_CIK_LINENO, m_name.c_str());
+        return std::atoi(lineStr.c_str());
+    }
+    int column() const {
+        const string columnStr = keyExtract(VL_CIK_COLUMN, m_name.c_str());
+        return std::atoi(columnStr.c_str());
+    }
     // METHODS
-    string keyExtract(const char* shortKey) const {
+    static string typeExtract(const char* name) { return keyExtract(VL_CIK_TYPE, name); }
+    static string keyExtract(const char* shortKey, const char* name) {
         // Hot function
         const size_t shortLen = std::strlen(shortKey);
-        const string namestr = name();
-        for (const char* cp = namestr.c_str(); *cp; ++cp) {
+        for (const char* cp = name; *cp; ++cp) {
             if (*cp == '\001') {
                 if (0 == std::strncmp(cp + 1, shortKey, shortLen) && cp[shortLen + 1] == '\002') {
                     cp += shortLen + 2;  // Skip \001+short+\002
diff --git a/src/VlcTop.cpp b/src/VlcTop.cpp
index e16edfab3..c4930f349 100644
--- a/src/VlcTop.cpp
+++ b/src/VlcTop.cpp
@@ -51,6 +51,8 @@ void VlcTop::readCoverage(const string& filename, bool nonfatal) {
                 if (line[secspace] == '\'' && line[secspace + 1] == ' ') break;
             }
             const string point = line.substr(3, secspace - 3);
+            if (!opt.isTypeMatch(point.c_str())) continue;
+
             const uint64_t hits = std::atoll(line.c_str() + secspace + 1);
             // UINFO(9,"   point '"<<point<<"'"<<" "<<hits<<endl);
 
diff --git a/test_regress/t/t_assert_ctl_arg.dat.out b/test_regress/t/t_assert_ctl_arg.dat.out
index 90e951eb6..a19ca52fa 100644
--- a/test_regress/t/t_assert_ctl_arg.dat.out
+++ b/test_regress/t/t_assert_ctl_arg.dat.out
@@ -1,153 +1,153 @@
 # SystemC::Coverage-3
-C '
ft/t_assert_ctl_arg.v
l100
n32
pagev_user/t
ocover_simple_immediate_100
htop.t.cover_simple_immediate_100' 1
-C '
ft/t_assert_ctl_arg.v
l100
n37
pagev_user/t
ocover_simple_immediate_stmt_100
htop.t.cover_simple_immediate_stmt_100' 1
-C '
ft/t_assert_ctl_arg.v
l100
n40
pagev_user/t
ocover_final_deferred_immediate_100
htop.t.cover_final_deferred_immediate_100' 1
-C '
ft/t_assert_ctl_arg.v
l100
n43
pagev_user/t
ocover_observed_deferred_immediate_100
htop.t.cover_observed_deferred_immediate_100' 1
-C '
ft/t_assert_ctl_arg.v
l100
n45
pagev_user/t
ocover_final_deferred_immediate_stmt_100
htop.t.cover_final_deferred_immediate_stmt_100' 1
-C '
ft/t_assert_ctl_arg.v
l100
n48
pagev_user/t
ocover_observed_deferred_immediate_stmt_100
htop.t.cover_observed_deferred_immediate_stmt_100' 1
-C '
ft/t_assert_ctl_arg.v
l103
n32
pagev_user/t
ocover_simple_immediate_103
htop.t.cover_simple_immediate_103' 0
-C '
ft/t_assert_ctl_arg.v
l103
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pagev_user/t
ocover_simple_immediate_stmt_103
htop.t.cover_simple_immediate_stmt_103' 0
-C '
ft/t_assert_ctl_arg.v
l103
n40
pagev_user/t
ocover_final_deferred_immediate_103
htop.t.cover_final_deferred_immediate_103' 0
-C '
ft/t_assert_ctl_arg.v
l103
n43
pagev_user/t
ocover_observed_deferred_immediate_103
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-C '
ft/t_assert_ctl_arg.v
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ocover_final_deferred_immediate_stmt_103
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-C '
ft/t_assert_ctl_arg.v
l103
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ocover_observed_deferred_immediate_stmt_103
htop.t.cover_observed_deferred_immediate_stmt_103' 0
-C '
ft/t_assert_ctl_arg.v
l106
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pagev_user/t
ocover_simple_immediate_106
htop.t.cover_simple_immediate_106' 1
-C '
ft/t_assert_ctl_arg.v
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ocover_simple_immediate_stmt_106
htop.t.cover_simple_immediate_stmt_106' 1
-C '
ft/t_assert_ctl_arg.v
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ocover_final_deferred_immediate_106
htop.t.cover_final_deferred_immediate_106' 1
-C '
ft/t_assert_ctl_arg.v
l106
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ocover_observed_deferred_immediate_106
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-C '
ft/t_assert_ctl_arg.v
l106
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ocover_final_deferred_immediate_stmt_106
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-C '
ft/t_assert_ctl_arg.v
l106
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ocover_observed_deferred_immediate_stmt_106
htop.t.cover_observed_deferred_immediate_stmt_106' 1
-C '
ft/t_assert_ctl_arg.v
l108
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pagev_user/t
ocover_simple_immediate_108
htop.t.cover_simple_immediate_108' 1
-C '
ft/t_assert_ctl_arg.v
l108
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ocover_simple_immediate_stmt_108
htop.t.cover_simple_immediate_stmt_108' 1
-C '
ft/t_assert_ctl_arg.v
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ocover_final_deferred_immediate_108
htop.t.cover_final_deferred_immediate_108' 1
-C '
ft/t_assert_ctl_arg.v
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ocover_observed_deferred_immediate_108
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-C '
ft/t_assert_ctl_arg.v
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ocover_final_deferred_immediate_stmt_108
htop.t.cover_final_deferred_immediate_stmt_108' 1
-C '
ft/t_assert_ctl_arg.v
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ocover_observed_deferred_immediate_stmt_108
htop.t.cover_observed_deferred_immediate_stmt_108' 1
-C '
ft/t_assert_ctl_arg.v
l110
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-C '
ft/t_assert_ctl_arg.v
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ocover_simple_immediate_stmt_110
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
l112
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-C '
ft/t_assert_ctl_arg.v
l112
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ocover_simple_immediate_stmt_112
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
l192
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pagev_user/concurrent
ocover_concurrent
htop.t.concurrent.cover_concurrent' 0
-C '
ft/t_assert_ctl_arg.v
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ocover_concurrent_stmt
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
ft/t_assert_ctl_arg.v
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-C '
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ocover_observed_deferred_immediate_88
htop.t.cover_observed_deferred_immediate_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_88
htop.t.cover_final_deferred_immediate_stmt_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_88
htop.t.cover_observed_deferred_immediate_stmt_88' 0
+C '
ft/t_assert_ctl_arg.v
l90
n31
tuser
pagev_user/t
ocover_simple_immediate_90
htop.t.cover_simple_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_90
htop.t.cover_simple_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_90
htop.t.cover_final_deferred_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_90
htop.t.cover_observed_deferred_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_90
htop.t.cover_final_deferred_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_90
htop.t.cover_observed_deferred_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l92
n31
tuser
pagev_user/t
ocover_simple_immediate_92
htop.t.cover_simple_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_92
htop.t.cover_simple_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_92
htop.t.cover_final_deferred_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_92
htop.t.cover_observed_deferred_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_92
htop.t.cover_final_deferred_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_92
htop.t.cover_observed_deferred_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l97
n31
tuser
pagev_user/t
ocover_simple_immediate_97
htop.t.cover_simple_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_97
htop.t.cover_simple_immediate_stmt_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_97
htop.t.cover_final_deferred_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_97
htop.t.cover_observed_deferred_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_97
htop.t.cover_final_deferred_immediate_stmt_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_97
htop.t.cover_observed_deferred_immediate_stmt_97' 0
diff --git a/test_regress/t/t_cover_lib__1.out b/test_regress/t/t_cover_lib__1.out
index c6846d4cc..00375a2e4 100644
--- a/test_regress/t/t_cover_lib__1.out
+++ b/test_regress/t/t_cover_lib__1.out
@@ -1,7 +1,7 @@
 # SystemC::Coverage-3
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P0
htop.a*.pi' 500
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P1
htop.a0.npi' 200
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P1
htop.a1.npi' 300
-C '
f../../t/t_cover_lib_c.cpp
l48
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
-C '
f../../t/t_cover_lib_c.cpp
l49
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
-C '
f../../t/t_cover_lib_c.cpp
l50
pagesp_user/t_cover_lib_c
olost_three
hmain' 220
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P0
htop.a*.pi' 500
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P1
htop.a0.npi' 200
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P1
htop.a1.npi' 300
+C '
f../../t/t_cover_lib_c.cpp
l48
t_user
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
+C '
f../../t/t_cover_lib_c.cpp
l49
t_user
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
+C '
f../../t/t_cover_lib_c.cpp
l50
t_user
pagesp_user/t_cover_lib_c
olost_three
hmain' 220
diff --git a/test_regress/t/t_cover_lib__1_per_instance.out b/test_regress/t/t_cover_lib__1_per_instance.out
index 8ed9d2b81..bf1f0606e 100644
--- a/test_regress/t/t_cover_lib__1_per_instance.out
+++ b/test_regress/t/t_cover_lib__1_per_instance.out
@@ -1,8 +1,8 @@
 # SystemC::Coverage-3
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P0
htop.a0.pi' 200
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P0
htop.a1.pi' 300
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P1
htop.a0.npi' 200
-C '
f../../t/t_cover_lib_c.cpp
l39
pagesp_user/t_cover_lib_c
P1
htop.a1.npi' 300
-C '
f../../t/t_cover_lib_c.cpp
l48
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
-C '
f../../t/t_cover_lib_c.cpp
l49
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
-C '
f../../t/t_cover_lib_c.cpp
l50
pagesp_user/t_cover_lib_c
olost_three
hmain' 220
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P0
htop.a0.pi' 200
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P0
htop.a1.pi' 300
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P1
htop.a0.npi' 200
+C '
f../../t/t_cover_lib_c.cpp
l39
t_user
pagesp_user/t_cover_lib_c
P1
htop.a1.npi' 300
+C '
f../../t/t_cover_lib_c.cpp
l48
t_user
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
+C '
f../../t/t_cover_lib_c.cpp
l49
t_user
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
+C '
f../../t/t_cover_lib_c.cpp
l50
t_user
pagesp_user/t_cover_lib_c
olost_three
hmain' 220
diff --git a/test_regress/t/t_cover_lib__2.out b/test_regress/t/t_cover_lib__2.out
index fcb461bba..df1ea7bd0 100644
--- a/test_regress/t/t_cover_lib__2.out
+++ b/test_regress/t/t_cover_lib__2.out
@@ -1,3 +1,3 @@
 # SystemC::Coverage-3
-C '
f../../t/t_cover_lib_c.cpp
l48
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
-C '
f../../t/t_cover_lib_c.cpp
l49
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
+C '
f../../t/t_cover_lib_c.cpp
l48
t_user
pagesp_user/t_cover_lib_c
okept_one
hmain' 100
+C '
f../../t/t_cover_lib_c.cpp
l49
t_user
pagesp_user/t_cover_lib_c
okept_two
hmain' 210
diff --git a/test_regress/t/t_cover_lib__3.out b/test_regress/t/t_cover_lib__3.out
index 5c1bd2c8c..0bc97616c 100644
--- a/test_regress/t/t_cover_lib__3.out
+++ b/test_regress/t/t_cover_lib__3.out
@@ -1,3 +1,3 @@
 # SystemC::Coverage-3
-C '
f../../t/t_cover_lib_c.cpp
l48
pagesp_user/t_cover_lib_c
okept_one
hmain' 0
-C '
f../../t/t_cover_lib_c.cpp
l49
pagesp_user/t_cover_lib_c
okept_two
hmain' 0
+C '
f../../t/t_cover_lib_c.cpp
l48
t_user
pagesp_user/t_cover_lib_c
okept_one
hmain' 0
+C '
f../../t/t_cover_lib_c.cpp
l49
t_user
pagesp_user/t_cover_lib_c
okept_two
hmain' 0
diff --git a/test_regress/t/t_cover_main.out b/test_regress/t/t_cover_main.out
index 4194def02..9b2f61600 100644
--- a/test_regress/t/t_cover_main.out
+++ b/test_regress/t/t_cover_main.out
@@ -1,2 +1,2 @@
 # SystemC::Coverage-3
-C '
ft/t_cover_main.v
l9
n4
pagev_line/t
oblock
S9-11
ht' 1
+C '
ft/t_cover_main.v
l9
n4
tline
pagev_line/t
oblock
S9-11
ht' 1
diff --git a/test_regress/t/t_vlcov_data_e.dat b/test_regress/t/t_vlcov_data_e.dat
new file mode 100644
index 000000000..32c705c59
--- /dev/null
+++ b/test_regress/t/t_vlcov_data_e.dat
@@ -0,0 +1,226 @@
+# SystemC::Coverage-3
+C '
ft/t_cover_line.v
l100
n10
tline
pagev_line/t
oblock
S100
htop.t' 0
+C '
ft/t_cover_line.v
l101
n10
tline
pagev_line/t
oblock
S101-102
htop.t' 0
+C '
ft/t_cover_line.v
l104
n10
tline
pagev_line/t
oblock
S104
htop.t' 0
+C '
ft/t_cover_line.v
l105
n10
tline
pagev_line/t
oblock
S105-107
htop.t' 0
+C '
ft/t_cover_line.v
l110
n10
tline
pagev_line/t
oelsif
S110-111
htop.t' 1
+C '
ft/t_cover_line.v
l113
n15
tline
pagev_line/t
oelsif
S113,115
htop.t' 1
+C '
ft/t_cover_line.v
l12
n10
ttoggle
pagev_toggle/t
oclk
htop.t' 19
+C '
ft/t_cover_line.v
l120
n15
tbranch
pagev_branch/t
oif
S120-122
htop.t' 1
+C '
ft/t_cover_line.v
l120
n16
tbranch
pagev_branch/t
oelse
htop.t' 7
+C '
ft/t_cover_line.v
l127
n9
tline
pagev_line/t
oblock
S127,129
htop.t' 1
+C '
ft/t_cover_line.v
l138
n10
ttoggle
pagev_toggle/alpha
oclk
htop.t.a*' 38
+C '
ft/t_cover_line.v
l139
n10
ttoggle
pagev_toggle/alpha
otoggle
htop.t.a*' 4
+C '
ft/t_cover_line.v
l14
n10
ttoggle
pagev_toggle/t
otoggle
htop.t' 2
+C '
ft/t_cover_line.v
l140
n4
tline
pagev_line/alpha
oblock
S140
htop.t.a*' 20
+C '
ft/t_cover_line.v
l141
n7
tbranch
pagev_branch/alpha
oif
S141-142
htop.t.a*' 2
+C '
ft/t_cover_line.v
l141
n8
tbranch
pagev_branch/alpha
oelse
htop.t.a*' 18
+C '
ft/t_cover_line.v
l145
n8
tline
pagev_line/alpha
oelse
htop.t.a*' 18
+C '
ft/t_cover_line.v
l15
n4
tline
pagev_line/t
oblock
S15
htop.t' 1
+C '
ft/t_cover_line.v
l159
n10
ttoggle
pagev_toggle/beta
oclk
htop.t.b*' 38
+C '
ft/t_cover_line.v
l160
n10
ttoggle
pagev_toggle/beta
otoggle
htop.t.b*' 4
+C '
ft/t_cover_line.v
l164
n4
tline
pagev_line/beta
oblock
S164-165
htop.t.b*' 20
+C '
ft/t_cover_line.v
l166
n7
tbranch
pagev_branch/beta
oif
S166,168
htop.t.b*' 0
+C '
ft/t_cover_line.v
l166
n8
tbranch
pagev_branch/beta
oelse
htop.t.b*' 20
+C '
ft/t_cover_line.v
l170
n7
tbranch
pagev_branch/beta
oif
S170,172
htop.t.b*' 2
+C '
ft/t_cover_line.v
l170
n8
tbranch
pagev_branch/beta
oelse
htop.t.b*' 18
+C '
ft/t_cover_line.v
l174
n8
tline
pagev_line/beta
oelse
htop.t.b*' 18
+C '
ft/t_cover_line.v
l18
n4
tline
pagev_line/t
oblock
S18
htop.t' 1
+C '
ft/t_cover_line.v
l188
n13
tline
pagev_line/Cls
oblock
S188-189
htop.$unit::Cls__Vclpkg' 1
+C '
ft/t_cover_line.v
l190
n7
tbranch
pagev_branch/Cls
oif
S190-191
htop.$unit::Cls__Vclpkg' 1
+C '
ft/t_cover_line.v
l190
n8
tbranch
pagev_branch/Cls
oelse
htop.$unit::Cls__Vclpkg' 0
+C '
ft/t_cover_line.v
l194
n25
tline
pagev_line/Cls
oblock
S194
htop.$unit::Cls__Vclpkg' 11
+C '
ft/t_cover_line.v
l195
n7
tbranch
pagev_branch/Cls
oif
S195-196
htop.$unit::Cls__Vclpkg' 11
+C '
ft/t_cover_line.v
l195
n8
tbranch
pagev_branch/Cls
oelse
htop.$unit::Cls__Vclpkg' 0
+C '
ft/t_cover_line.v
l199
n18
tline
pagev_line/Cls
oblock
S199
htop.$unit::Cls__Vclpkg' 11
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[0]
htop.t' 11
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[1]
htop.t' 5
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[2]
htop.t' 2
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[3]
htop.t' 1
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[4]
htop.t' 0
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[5]
htop.t' 0
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[6]
htop.t' 0
+C '
ft/t_cover_line.v
l20
n15
ttoggle
pagev_toggle/t
ocyc_copy[7]
htop.t' 0
+C '
ft/t_cover_line.v
l200
n7
tbranch
pagev_branch/Cls
oif
S200-201
htop.$unit::Cls__Vclpkg' 11
+C '
ft/t_cover_line.v
l200
n8
tbranch
pagev_branch/Cls
oelse
htop.$unit::Cls__Vclpkg' 0
+C '
ft/t_cover_line.v
l210
n10
ttoggle
pagev_toggle/tsk
oclk
htop.t.t1' 19
+C '
ft/t_cover_line.v
l211
n10
ttoggle
pagev_toggle/tsk
otoggle
htop.t.t1' 2
+C '
ft/t_cover_line.v
l215
n4
tline
pagev_line/tsk
oblock
S215-216
htop.t.t1' 10
+C '
ft/t_cover_line.v
l219
n9
tline
pagev_line/tsk
oblock
S219,221,229,231-232
htop.t.t1' 11
+C '
ft/t_cover_line.v
l222
n10
tbranch
pagev_branch/tsk
oif
S222-223
htop.t.t1' 1
+C '
ft/t_cover_line.v
l222
n11
tbranch
pagev_branch/tsk
oelse
htop.t.t1' 10
+C '
ft/t_cover_line.v
l225
n10
tbranch
pagev_branch/tsk
oif
S225-226
htop.t.t1' 1
+C '
ft/t_cover_line.v
l225
n11
tbranch
pagev_branch/tsk
oelse
htop.t.t1' 10
+C '
ft/t_cover_line.v
l230
n18
tline
pagev_line/tsk
oblock
S230
htop.t.t1' 1
+C '
ft/t_cover_line.v
l241
n10
ttoggle
pagev_toggle/off
oclk
htop.t.o1' 19
+C '
ft/t_cover_line.v
l242
n10
ttoggle
pagev_toggle/off
otoggle
htop.t.o1' 2
+C '
ft/t_cover_line.v
l252
n4
tline
pagev_line/off
oblock
S252
htop.t.o1' 10
+C '
ft/t_cover_line.v
l253
n7
tbranch
pagev_branch/off
oif
S253,255
htop.t.o1' 1
+C '
ft/t_cover_line.v
l253
n8
tbranch
pagev_branch/off
oelse
htop.t.o1' 9
+C '
ft/t_cover_line.v
l256
n10
tbranch
pagev_branch/off
oif
S256
htop.t.o1' 0
+C '
ft/t_cover_line.v
l256
n11
tbranch
pagev_branch/off
oelse
htop.t.o1' 1
+C '
ft/t_cover_line.v
l261
n19
ttoggle
pagev_toggle/tab
oclk
htop.t.tab1' 19
+C '
ft/t_cover_line.v
l262
n14
ttoggle
pagev_toggle/tab
ocyc4[0]
htop.t.tab1' 10
+C '
ft/t_cover_line.v
l262
n14
ttoggle
pagev_toggle/tab
ocyc4[1]
htop.t.tab1' 5
+C '
ft/t_cover_line.v
l262
n14
ttoggle
pagev_toggle/tab
ocyc4[2]
htop.t.tab1' 2
+C '
ft/t_cover_line.v
l262
n14
ttoggle
pagev_toggle/tab
ocyc4[3]
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l265
n4
tline
pagev_line/tab
oblock
S265-266
htop.t.tab1' 10
+C '
ft/t_cover_line.v
l267
n10
tline
pagev_line/tab
ocase
S267
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l268
n10
tline
pagev_line/tab
ocase
S268
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l269
n10
tline
pagev_line/tab
ocase
S269
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l270
n10
tline
pagev_line/tab
ocase
S270
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l271
n10
tline
pagev_line/tab
ocase
S271
htop.t.tab1' 1
+C '
ft/t_cover_line.v
l272
n9
tline
pagev_line/tab
ocase
S272
htop.t.tab1' 5
+C '
ft/t_cover_line.v
l276
n4
tline
pagev_line/tab
oblock
S276-277
htop.t.tab1' 10
+C '
ft/t_cover_line.v
l287
n27
tline
pagev_line/par
oblock
S287,294
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oif
S74-76
htop.t' 1
+C '
ft/t_cover_line.v
l74
n11
tbranch
pagev_branch/t
oelse
S79-80
htop.t' 9
+C '
ft/t_cover_line.v
l83
n10
tline
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oelsif
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htop.t' 1
+C '
ft/t_cover_line.v
l87
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tline
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oelsif
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htop.t' 1
+C '
ft/t_cover_line.v
l91
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tline
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htop.t' 1
+C '
ft/t_cover_line.v
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tline
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oelse
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htop.t' 7
diff --git a/test_regress/t/t_vlcov_data_f.dat b/test_regress/t/t_vlcov_data_f.dat
new file mode 100644
index 000000000..7ef9e4d1d
--- /dev/null
+++ b/test_regress/t/t_vlcov_data_f.dat
@@ -0,0 +1,157 @@
+# SystemC::Coverage-3
+C '
ft/t_assert_ctl_arg.v
l100
n32
tuser
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ocover_simple_immediate_100
S100
htop.t.cover_simple_immediate_100' 1
+C '
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ocover_simple_immediate_stmt_100
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htop.t.cover_simple_immediate_stmt_100' 1
+C '
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ocover_final_deferred_immediate_100
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+C '
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+C '
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ocover_final_deferred_immediate_stmt_100
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+C '
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ocover_observed_deferred_immediate_stmt_100
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htop.t.cover_observed_deferred_immediate_stmt_100' 1
+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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ocover_observed_deferred_immediate_106
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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ocover_observed_deferred_immediate_stmt_112
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+C '
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l177
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ttoggle
pagev_toggle/concurrent
oclk
htop.t.concurrent' 21
+C '
ft/t_assert_ctl_arg.v
l178
n13
tline
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oblock
S178-179
htop.t.concurrent' 0
+C '
ft/t_assert_ctl_arg.v
l192
n22
tuser
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ocover_concurrent
S192
htop.t.concurrent.cover_concurrent' 0
+C '
ft/t_assert_ctl_arg.v
l193
n27
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ocover_concurrent_stmt
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htop.t.concurrent.cover_concurrent_stmt' 0
+C '
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ttoggle
pagev_toggle/t
oclk
htop.t' 21
+C '
ft/t_assert_ctl_arg.v
l45
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oblock
S28-30,32-35,37,39-41,45,47-51,54-58,61-65,68-73,75-92,95-113,116-122,124-125
htop.t' 1
+C '
ft/t_assert_ctl_arg.v
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+C '
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+C '
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+C '
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ocover_final_deferred_immediate_stmt_49
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+C '
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ocover_observed_deferred_immediate_stmt_49
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+C '
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+C '
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ocover_simple_immediate_stmt_51
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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ocover_final_deferred_immediate_stmt_69
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+C '
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+C '
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+C '
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ocover_simple_immediate_stmt_71
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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+C '
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ft/t_assert_ctl_arg.v
l78
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_78
S78
htop.t.cover_simple_immediate_stmt_78' 1
+C '
ft/t_assert_ctl_arg.v
l78
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_78
S78
htop.t.cover_final_deferred_immediate_78' 1
+C '
ft/t_assert_ctl_arg.v
l78
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_78
S78
htop.t.cover_observed_deferred_immediate_78' 1
+C '
ft/t_assert_ctl_arg.v
l78
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_78
S78
htop.t.cover_final_deferred_immediate_stmt_78' 1
+C '
ft/t_assert_ctl_arg.v
l78
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_78
S78
htop.t.cover_observed_deferred_immediate_stmt_78' 1
+C '
ft/t_assert_ctl_arg.v
l80
n31
tuser
pagev_user/t
ocover_simple_immediate_80
S80
htop.t.cover_simple_immediate_80' 1
+C '
ft/t_assert_ctl_arg.v
l80
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_80
S80
htop.t.cover_simple_immediate_stmt_80' 1
+C '
ft/t_assert_ctl_arg.v
l80
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_80
S80
htop.t.cover_final_deferred_immediate_80' 0
+C '
ft/t_assert_ctl_arg.v
l80
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_80
S80
htop.t.cover_observed_deferred_immediate_80' 0
+C '
ft/t_assert_ctl_arg.v
l80
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_80
S80
htop.t.cover_final_deferred_immediate_stmt_80' 0
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ft/t_assert_ctl_arg.v
l80
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_80
S80
htop.t.cover_observed_deferred_immediate_stmt_80' 0
+C '
ft/t_assert_ctl_arg.v
l82
n31
tuser
pagev_user/t
ocover_simple_immediate_82
S82
htop.t.cover_simple_immediate_82' 1
+C '
ft/t_assert_ctl_arg.v
l82
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_82
S82
htop.t.cover_simple_immediate_stmt_82' 1
+C '
ft/t_assert_ctl_arg.v
l82
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_82
S82
htop.t.cover_final_deferred_immediate_82' 0
+C '
ft/t_assert_ctl_arg.v
l82
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_82
S82
htop.t.cover_observed_deferred_immediate_82' 0
+C '
ft/t_assert_ctl_arg.v
l82
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_82
S82
htop.t.cover_final_deferred_immediate_stmt_82' 0
+C '
ft/t_assert_ctl_arg.v
l82
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_82
S82
htop.t.cover_observed_deferred_immediate_stmt_82' 0
+C '
ft/t_assert_ctl_arg.v
l84
n31
tuser
pagev_user/t
ocover_simple_immediate_84
S84
htop.t.cover_simple_immediate_84' 0
+C '
ft/t_assert_ctl_arg.v
l84
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_84
S84
htop.t.cover_simple_immediate_stmt_84' 0
+C '
ft/t_assert_ctl_arg.v
l84
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_84
S84
htop.t.cover_final_deferred_immediate_84' 0
+C '
ft/t_assert_ctl_arg.v
l84
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_84
S84
htop.t.cover_observed_deferred_immediate_84' 0
+C '
ft/t_assert_ctl_arg.v
l84
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_84
S84
htop.t.cover_final_deferred_immediate_stmt_84' 0
+C '
ft/t_assert_ctl_arg.v
l84
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_84
S84
htop.t.cover_observed_deferred_immediate_stmt_84' 0
+C '
ft/t_assert_ctl_arg.v
l86
n31
tuser
pagev_user/t
ocover_simple_immediate_86
S86
htop.t.cover_simple_immediate_86' 1
+C '
ft/t_assert_ctl_arg.v
l86
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_86
S86
htop.t.cover_simple_immediate_stmt_86' 1
+C '
ft/t_assert_ctl_arg.v
l86
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_86
S86
htop.t.cover_final_deferred_immediate_86' 0
+C '
ft/t_assert_ctl_arg.v
l86
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_86
S86
htop.t.cover_observed_deferred_immediate_86' 0
+C '
ft/t_assert_ctl_arg.v
l86
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_86
S86
htop.t.cover_final_deferred_immediate_stmt_86' 0
+C '
ft/t_assert_ctl_arg.v
l86
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_86
S86
htop.t.cover_observed_deferred_immediate_stmt_86' 0
+C '
ft/t_assert_ctl_arg.v
l88
n31
tuser
pagev_user/t
ocover_simple_immediate_88
S88
htop.t.cover_simple_immediate_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_88
S88
htop.t.cover_simple_immediate_stmt_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_88
S88
htop.t.cover_final_deferred_immediate_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_88
S88
htop.t.cover_observed_deferred_immediate_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_88
S88
htop.t.cover_final_deferred_immediate_stmt_88' 0
+C '
ft/t_assert_ctl_arg.v
l88
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_88
S88
htop.t.cover_observed_deferred_immediate_stmt_88' 0
+C '
ft/t_assert_ctl_arg.v
l90
n31
tuser
pagev_user/t
ocover_simple_immediate_90
S90
htop.t.cover_simple_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_90
S90
htop.t.cover_simple_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_90
S90
htop.t.cover_final_deferred_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_90
S90
htop.t.cover_observed_deferred_immediate_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n44
tuser
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ocover_final_deferred_immediate_stmt_90
S90
htop.t.cover_final_deferred_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l90
n47
tuser
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ocover_observed_deferred_immediate_stmt_90
S90
htop.t.cover_observed_deferred_immediate_stmt_90' 1
+C '
ft/t_assert_ctl_arg.v
l92
n31
tuser
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ocover_simple_immediate_92
S92
htop.t.cover_simple_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_92
S92
htop.t.cover_simple_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_92
S92
htop.t.cover_final_deferred_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_92
S92
htop.t.cover_observed_deferred_immediate_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n44
tuser
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ocover_final_deferred_immediate_stmt_92
S92
htop.t.cover_final_deferred_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l92
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_92
S92
htop.t.cover_observed_deferred_immediate_stmt_92' 0
+C '
ft/t_assert_ctl_arg.v
l97
n31
tuser
pagev_user/t
ocover_simple_immediate_97
S97
htop.t.cover_simple_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n36
tuser
pagev_user/t
ocover_simple_immediate_stmt_97
S97
htop.t.cover_simple_immediate_stmt_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n39
tuser
pagev_user/t
ocover_final_deferred_immediate_97
S97
htop.t.cover_final_deferred_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n42
tuser
pagev_user/t
ocover_observed_deferred_immediate_97
S97
htop.t.cover_observed_deferred_immediate_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n44
tuser
pagev_user/t
ocover_final_deferred_immediate_stmt_97
S97
htop.t.cover_final_deferred_immediate_stmt_97' 0
+C '
ft/t_assert_ctl_arg.v
l97
n47
tuser
pagev_user/t
ocover_observed_deferred_immediate_stmt_97
S97
htop.t.cover_observed_deferred_immediate_stmt_97' 0
diff --git a/test_regress/t/t_vlcov_opt_branch.info.out b/test_regress/t/t_vlcov_opt_branch.info.out
new file mode 100644
index 000000000..45d5b4627
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_branch.info.out
@@ -0,0 +1,127 @@
+TN:verilator_coverage
+SF:t/t_cover_line.v
+DA:56,10
+BRDA:56,0,0,10
+BRDA:56,0,1,0
+DA:57,10
+DA:58,10
+DA:60,9
+BRDA:60,0,0,1
+BRDA:60,0,1,9
+DA:61,9
+BRDA:61,0,0,1
+BRDA:61,0,1,9
+DA:62,1
+DA:63,1
+DA:66,9
+BRDA:66,0,0,1
+BRDA:66,0,1,9
+DA:67,9
+BRDA:67,0,0,1
+BRDA:67,0,1,9
+DA:69,9
+DA:70,9
+DA:73,9
+BRDA:73,0,0,1
+BRDA:73,0,1,9
+DA:74,9
+BRDA:74,0,0,1
+BRDA:74,0,1,9
+DA:75,1
+DA:76,1
+DA:79,9
+DA:80,9
+DA:105,10
+DA:106,10
+DA:120,7
+BRDA:120,0,0,1
+BRDA:120,0,1,7
+DA:121,1
+DA:122,1
+DA:141,18
+BRDA:141,0,0,2
+BRDA:141,0,1,18
+DA:142,2
+DA:166,20
+BRDA:166,0,0,0
+BRDA:166,0,1,20
+DA:168,0
+DA:170,18
+BRDA:170,0,0,2
+BRDA:170,0,1,18
+DA:172,2
+DA:190,1
+BRDA:190,0,0,1
+BRDA:190,0,1,0
+DA:191,1
+DA:195,11
+BRDA:195,0,0,11
+BRDA:195,0,1,0
+DA:196,11
+DA:200,11
+BRDA:200,0,0,11
+BRDA:200,0,1,0
+DA:201,11
+DA:222,10
+BRDA:222,0,0,1
+BRDA:222,0,1,10
+DA:223,1
+DA:225,10
+BRDA:225,0,0,1
+BRDA:225,0,1,10
+DA:226,1
+DA:253,9
+BRDA:253,0,0,1
+BRDA:253,0,1,9
+DA:255,1
+DA:256,1
+BRDA:256,0,0,0
+BRDA:256,0,1,1
+DA:288,0
+BRDA:288,0,0,0
+BRDA:288,0,1,0
+DA:289,0
+DA:291,0
+DA:292,0
+DA:327,31
+BRDA:327,0,0,0
+BRDA:327,0,1,31
+DA:328,28
+BRDA:328,0,0,3
+BRDA:328,0,1,28
+DA:329,21
+BRDA:329,0,0,21
+BRDA:329,0,1,0
+DA:331,7
+BRDA:331,0,0,3
+BRDA:331,0,1,7
+DA:332,10
+BRDA:332,0,0,0
+BRDA:332,0,1,10
+DA:334,19
+BRDA:334,0,0,12
+BRDA:334,0,1,19
+BRDA:334,0,2,7
+BRDA:334,0,3,5
+DA:337,11
+BRDA:337,0,0,11
+BRDA:337,0,1,0
+DA:343,11
+BRDA:343,0,0,10
+BRDA:343,0,1,11
+DA:347,10
+BRDA:347,0,0,0
+BRDA:347,0,1,1
+BRDA:347,0,2,1
+BRDA:347,0,3,10
+DA:348,10
+DA:350,10
+BRDA:350,0,0,1
+BRDA:350,0,1,10
+DA:360,11
+BRDA:360,0,0,0
+BRDA:360,0,1,11
+DA:361,11
+BRF:64
+BRH:20
+end_of_record
diff --git a/test_regress/t/t_vlcov_opt_branch.py b/test_regress/t/t_vlcov_opt_branch.py
new file mode 100755
index 000000000..d784b9006
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_branch.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type branch", "t/t_vlcov_data_e.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_vlcov_opt_expr.info.out b/test_regress/t/t_vlcov_opt_expr.info.out
new file mode 100644
index 000000000..33c3c1c89
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_expr.info.out
@@ -0,0 +1,23 @@
+TN:verilator_coverage
+SF:t/t_cover_line.v
+DA:331,7
+BRDA:331,0,0,7
+BRDA:331,0,1,3
+DA:347,1
+BRDA:347,0,0,1
+BRDA:347,0,1,0
+DA:350,10
+BRDA:350,0,0,10
+BRDA:350,0,1,1
+DA:353,11
+BRDA:353,0,0,11
+BRDA:353,0,1,0
+DA:356,11
+BRDA:356,0,0,0
+BRDA:356,0,1,11
+DA:360,11
+BRDA:360,0,0,11
+BRDA:360,0,1,0
+BRF:12
+BRH:4
+end_of_record
diff --git a/test_regress/t/t_vlcov_opt_expr.py b/test_regress/t/t_vlcov_opt_expr.py
new file mode 100755
index 000000000..4fa8200d2
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_expr.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type expr", "t/t_vlcov_data_e.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_vlcov_opt_line.info.out b/test_regress/t/t_vlcov_opt_line.info.out
new file mode 100644
index 000000000..eaba1df5d
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_line.info.out
@@ -0,0 +1,87 @@
+TN:verilator_coverage
+SF:t/t_cover_line.v
+DA:15,1
+DA:18,1
+DA:55,10
+DA:83,1
+DA:84,1
+DA:85,1
+DA:87,1
+DA:88,1
+DA:89,1
+DA:91,7
+BRDA:91,0,0,1
+BRDA:91,0,1,7
+DA:92,1
+DA:93,1
+DA:96,7
+DA:97,7
+DA:100,0
+DA:101,0
+DA:102,0
+DA:104,0
+DA:105,0
+DA:106,0
+DA:107,0
+DA:110,1
+DA:111,1
+DA:113,1
+DA:115,1
+DA:127,1
+DA:129,1
+DA:140,20
+DA:145,18
+DA:164,20
+DA:165,20
+DA:174,18
+DA:188,1
+DA:189,1
+DA:194,11
+DA:199,11
+DA:215,10
+DA:216,10
+DA:219,11
+DA:221,11
+DA:229,11
+DA:230,1
+DA:231,11
+DA:232,11
+DA:252,10
+DA:265,10
+DA:266,10
+DA:267,1
+DA:268,1
+DA:269,1
+DA:270,1
+DA:271,1
+DA:272,5
+DA:276,10
+DA:277,10
+DA:287,0
+DA:294,0
+DA:300,1
+DA:303,1
+DA:304,20
+DA:305,20
+DA:314,1
+DA:317,21
+DA:318,21
+DA:319,21
+DA:322,10
+DA:324,10
+DA:330,10
+DA:331,10
+DA:332,10
+DA:346,11
+DA:350,11
+DA:353,55
+BRDA:353,0,0,11
+BRDA:353,0,1,55
+DA:354,55
+DA:356,44
+BRDA:356,0,0,11
+BRDA:356,0,1,44
+DA:357,44
+BRF:6
+BRH:4
+end_of_record
diff --git a/test_regress/t/t_vlcov_opt_line.py b/test_regress/t/t_vlcov_opt_line.py
new file mode 100755
index 000000000..f5f4b8195
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_line.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type line", "t/t_vlcov_data_e.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_vlcov_opt_toggle.info.out b/test_regress/t/t_vlcov_opt_toggle.info.out
new file mode 100644
index 000000000..7740e44dc
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_toggle.info.out
@@ -0,0 +1,116 @@
+TN:verilator_coverage
+SF:t/t_cover_line.v
+DA:12,19
+DA:14,2
+DA:20,11
+BRDA:20,0,0,11
+BRDA:20,0,1,5
+BRDA:20,0,2,2
+BRDA:20,0,3,1
+BRDA:20,0,4,0
+BRDA:20,0,5,0
+BRDA:20,0,6,0
+BRDA:20,0,7,0
+DA:138,38
+DA:139,4
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diff --git a/test_regress/t/t_vlcov_opt_toggle.py b/test_regress/t/t_vlcov_opt_toggle.py
new file mode 100755
index 000000000..49da6830d
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_toggle.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type toggle", "t/t_vlcov_data_e.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_vlcov_opt_user.info.out b/test_regress/t/t_vlcov_opt_user.info.out
new file mode 100644
index 000000000..e1b47061b
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_user.info.out
@@ -0,0 +1,182 @@
+TN:verilator_coverage
+SF:t/t_assert_ctl_arg.v
+DA:49,1
+BRDA:49,0,0,1
+BRDA:49,0,1,1
+BRDA:49,0,2,0
+BRDA:49,0,3,0
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+BRF:150
+BRH:0
+end_of_record
diff --git a/test_regress/t/t_vlcov_opt_user.py b/test_regress/t/t_vlcov_opt_user.py
new file mode 100755
index 000000000..805813778
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_user.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type user", "t/t_vlcov_data_f.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_vlcov_opt_wild.info.out b/test_regress/t/t_vlcov_opt_wild.info.out
new file mode 100644
index 000000000..efcf737f6
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_wild.info.out
@@ -0,0 +1,334 @@
+TN:verilator_coverage
+SF:t/t_cover_line.v
+DA:12,19
+DA:14,2
+DA:15,1
+DA:18,1
+DA:20,11
+BRDA:20,0,0,11
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+end_of_record
diff --git a/test_regress/t/t_vlcov_opt_wild.py b/test_regress/t/t_vlcov_opt_wild.py
new file mode 100755
index 000000000..7fea40269
--- /dev/null
+++ b/test_regress/t/t_vlcov_opt_wild.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('dist')
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage", "--write-info",
+    test.obj_dir + "/coverage.info", "--filter-type '*'", "t/t_vlcov_data_e.dat"
+],
+         verilator_run=True)
+
+test.files_identical(test.obj_dir + "/coverage.info", "t/" + test.name + ".info.out")
+
+test.passes()
diff --git a/test_regress/t/t_wrapper_context__top0.dat.out b/test_regress/t/t_wrapper_context__top0.dat.out
index 74af3f696..d4620c660 100644
--- a/test_regress/t/t_wrapper_context__top0.dat.out
+++ b/test_regress/t/t_wrapper_context__top0.dat.out
@@ -1,82 +1,82 @@
 # SystemC::Coverage-3
-C '
ft/t_wrapper_context.v
l14
n22
pagev_toggle/top
oclk
htop0.top' 21
-C '
ft/t_wrapper_context.v
l15
n22
pagev_toggle/top
orst
htop0.top' 2
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[0]
htop0.top' 1
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[10]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[11]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[12]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[13]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[14]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[15]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[16]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[17]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[18]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[19]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[1]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[20]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[21]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[22]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[23]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[24]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[25]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[26]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[27]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[28]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[29]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[2]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[30]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[31]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[3]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[4]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[5]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[6]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[7]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[8]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[9]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l17
n22
pagev_toggle/top
ostop
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[0]
htop0.top' 10
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[10]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[11]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[12]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[13]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[14]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[15]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[16]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[17]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[18]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[19]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[1]
htop0.top' 5
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[20]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[21]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[22]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[23]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[24]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[25]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[26]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[27]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[28]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[29]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[2]
htop0.top' 2
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[30]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[31]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[3]
htop0.top' 1
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[4]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[5]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[6]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[7]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[8]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[9]
htop0.top' 0
-C '
ft/t_wrapper_context.v
l19
n22
pagev_toggle/top
odone_o
htop0.top' 1
-C '
ft/t_wrapper_context.v
l22
n4
pagev_line/top
oblock
S22,25-29
htop0.top' 1
-C '
ft/t_wrapper_context.v
l32
n4
pagev_line/top
oblock
S32
htop0.top' 11
-C '
ft/t_wrapper_context.v
l33
n7
pagev_branch/top
oif
S33-34
htop0.top' 1
-C '
ft/t_wrapper_context.v
l33
n8
pagev_branch/top
oelse
S36
htop0.top' 10
-C '
ft/t_wrapper_context.v
l38
n4
pagev_line/top
oblock
S38-39
htop0.top' 34
-C '
ft/t_wrapper_context.v
l40
n7
pagev_branch/top
oif
S40
htop0.top' 0
-C '
ft/t_wrapper_context.v
l40
n8
pagev_branch/top
oelse
S46
htop0.top' 34
-C '
ft/t_wrapper_context.v
l41
n11
pagev_line/top
oelse
htop0.top' 0
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o((counter >= 32'sh5)==0) => 0
htop0.top' 0
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o((counter >= 32'sh5)==1 && stop==1) => 1
htop0.top' 0
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o(stop==0) => 0
htop0.top' 0
-C '
ft/t_wrapper_context.v
l47
n10
pagev_branch/top
oif
S47-49
htop0.top' 1
-C '
ft/t_wrapper_context.v
l47
n11
pagev_branch/top
oelse
htop0.top' 33
+C '
ft/t_wrapper_context.v
l14
n22
ttoggle
pagev_toggle/top
oclk
htop0.top' 21
+C '
ft/t_wrapper_context.v
l15
n22
ttoggle
pagev_toggle/top
orst
htop0.top' 2
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[0]
htop0.top' 1
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[10]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[11]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[12]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[13]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[14]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[15]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[16]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[17]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[18]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[19]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[1]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[20]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[21]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[22]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[23]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[24]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[25]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[26]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[27]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[28]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[29]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[2]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[30]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[31]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[3]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[4]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[5]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[6]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[7]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[8]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[9]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l17
n22
ttoggle
pagev_toggle/top
ostop
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[0]
htop0.top' 10
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[10]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[11]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[12]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[13]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[14]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[15]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[16]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[17]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[18]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[19]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[1]
htop0.top' 5
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[20]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[21]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[22]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[23]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[24]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[25]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[26]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[27]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[28]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[29]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[2]
htop0.top' 2
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[30]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[31]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[3]
htop0.top' 1
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[4]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[5]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[6]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[7]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[8]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[9]
htop0.top' 0
+C '
ft/t_wrapper_context.v
l19
n22
ttoggle
pagev_toggle/top
odone_o
htop0.top' 1
+C '
ft/t_wrapper_context.v
l22
n4
tline
pagev_line/top
oblock
S22,25-29
htop0.top' 1
+C '
ft/t_wrapper_context.v
l32
n4
tline
pagev_line/top
oblock
S32
htop0.top' 11
+C '
ft/t_wrapper_context.v
l33
n7
tbranch
pagev_branch/top
oif
S33-34
htop0.top' 1
+C '
ft/t_wrapper_context.v
l33
n8
tbranch
pagev_branch/top
oelse
S36
htop0.top' 10
+C '
ft/t_wrapper_context.v
l38
n4
tline
pagev_line/top
oblock
S38-39
htop0.top' 34
+C '
ft/t_wrapper_context.v
l40
n7
tbranch
pagev_branch/top
oif
S40
htop0.top' 0
+C '
ft/t_wrapper_context.v
l40
n8
tbranch
pagev_branch/top
oelse
S46
htop0.top' 34
+C '
ft/t_wrapper_context.v
l41
n11
tline
pagev_line/top
oelse
htop0.top' 0
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o((counter >= 32'sh5)==0) => 0
htop0.top' 0
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o((counter >= 32'sh5)==1 && stop==1) => 1
htop0.top' 0
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o(stop==0) => 0
htop0.top' 0
+C '
ft/t_wrapper_context.v
l47
n10
tbranch
pagev_branch/top
oif
S47-49
htop0.top' 1
+C '
ft/t_wrapper_context.v
l47
n11
tbranch
pagev_branch/top
oelse
htop0.top' 33
diff --git a/test_regress/t/t_wrapper_context__top1.dat.out b/test_regress/t/t_wrapper_context__top1.dat.out
index f7fab4025..4b335614e 100644
--- a/test_regress/t/t_wrapper_context__top1.dat.out
+++ b/test_regress/t/t_wrapper_context__top1.dat.out
@@ -1,82 +1,82 @@
 # SystemC::Coverage-3
-C '
ft/t_wrapper_context.v
l14
n22
pagev_toggle/top
oclk
htop1.top' 11
-C '
ft/t_wrapper_context.v
l15
n22
pagev_toggle/top
orst
htop1.top' 2
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[0]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[10]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[11]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[12]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[13]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[14]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[15]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[16]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[17]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[18]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[19]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[1]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[20]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[21]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[22]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[23]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[24]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[25]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[26]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[27]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[28]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[29]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[2]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[30]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[31]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[3]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[4]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[5]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[6]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[7]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[8]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l16
n22
pagev_toggle/top
otrace_number[9]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l17
n22
pagev_toggle/top
ostop
htop1.top' 1
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[0]
htop1.top' 5
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[10]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[11]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[12]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[13]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[14]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[15]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[16]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[17]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[18]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[19]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[1]
htop1.top' 2
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[20]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[21]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[22]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[23]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[24]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[25]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[26]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[27]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[28]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[29]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[2]
htop1.top' 1
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[30]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[31]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[3]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[4]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[5]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[6]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[7]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[8]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l18
n22
pagev_toggle/top
ocounter[9]
htop1.top' 0
-C '
ft/t_wrapper_context.v
l19
n22
pagev_toggle/top
odone_o
htop1.top' 1
-C '
ft/t_wrapper_context.v
l22
n4
pagev_line/top
oblock
S22,25-29
htop1.top' 1
-C '
ft/t_wrapper_context.v
l32
n4
pagev_line/top
oblock
S32
htop1.top' 6
-C '
ft/t_wrapper_context.v
l33
n7
pagev_branch/top
oif
S33-34
htop1.top' 1
-C '
ft/t_wrapper_context.v
l33
n8
pagev_branch/top
oelse
S36
htop1.top' 5
-C '
ft/t_wrapper_context.v
l38
n4
pagev_line/top
oblock
S38-39
htop1.top' 19
-C '
ft/t_wrapper_context.v
l40
n7
pagev_branch/top
oif
S40
htop1.top' 19
-C '
ft/t_wrapper_context.v
l40
n8
pagev_branch/top
oelse
S46
htop1.top' 0
-C '
ft/t_wrapper_context.v
l41
n11
pagev_line/top
oelse
htop1.top' 18
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o((counter >= 32'sh5)==0) => 0
htop1.top' 18
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o((counter >= 32'sh5)==1 && stop==1) => 1
htop1.top' 1
-C '
ft/t_wrapper_context.v
l41
n27
pagev_expr/top
o(stop==0) => 0
htop1.top' 0
-C '
ft/t_wrapper_context.v
l47
n10
pagev_branch/top
oif
S47-49
htop1.top' 0
-C '
ft/t_wrapper_context.v
l47
n11
pagev_branch/top
oelse
htop1.top' 0
+C '
ft/t_wrapper_context.v
l14
n22
ttoggle
pagev_toggle/top
oclk
htop1.top' 11
+C '
ft/t_wrapper_context.v
l15
n22
ttoggle
pagev_toggle/top
orst
htop1.top' 2
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[0]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[10]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[11]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[12]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[13]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[14]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[15]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[16]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[17]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[18]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[19]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[1]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[20]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[21]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[22]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[23]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[24]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[25]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[26]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[27]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[28]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[29]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[2]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[30]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[31]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[3]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[4]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[5]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[6]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[7]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[8]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l16
n22
ttoggle
pagev_toggle/top
otrace_number[9]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l17
n22
ttoggle
pagev_toggle/top
ostop
htop1.top' 1
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[0]
htop1.top' 5
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[10]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[11]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[12]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[13]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[14]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[15]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[16]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[17]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[18]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[19]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[1]
htop1.top' 2
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[20]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[21]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[22]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[23]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[24]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[25]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[26]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[27]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[28]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[29]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[2]
htop1.top' 1
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[30]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[31]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[3]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[4]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[5]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[6]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[7]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[8]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l18
n22
ttoggle
pagev_toggle/top
ocounter[9]
htop1.top' 0
+C '
ft/t_wrapper_context.v
l19
n22
ttoggle
pagev_toggle/top
odone_o
htop1.top' 1
+C '
ft/t_wrapper_context.v
l22
n4
tline
pagev_line/top
oblock
S22,25-29
htop1.top' 1
+C '
ft/t_wrapper_context.v
l32
n4
tline
pagev_line/top
oblock
S32
htop1.top' 6
+C '
ft/t_wrapper_context.v
l33
n7
tbranch
pagev_branch/top
oif
S33-34
htop1.top' 1
+C '
ft/t_wrapper_context.v
l33
n8
tbranch
pagev_branch/top
oelse
S36
htop1.top' 5
+C '
ft/t_wrapper_context.v
l38
n4
tline
pagev_line/top
oblock
S38-39
htop1.top' 19
+C '
ft/t_wrapper_context.v
l40
n7
tbranch
pagev_branch/top
oif
S40
htop1.top' 19
+C '
ft/t_wrapper_context.v
l40
n8
tbranch
pagev_branch/top
oelse
S46
htop1.top' 0
+C '
ft/t_wrapper_context.v
l41
n11
tline
pagev_line/top
oelse
htop1.top' 18
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o((counter >= 32'sh5)==0) => 0
htop1.top' 18
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o((counter >= 32'sh5)==1 && stop==1) => 1
htop1.top' 1
+C '
ft/t_wrapper_context.v
l41
n27
texpr
pagev_expr/top
o(stop==0) => 0
htop1.top' 0
+C '
ft/t_wrapper_context.v
l47
n10
tbranch
pagev_branch/top
oif
S47-49
htop1.top' 0
+C '
ft/t_wrapper_context.v
l47
n11
tbranch
pagev_branch/top
oelse
htop1.top' 0

From 7b2dc463996dbb7dde9f55b64b27d765dcf91ea6 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 22 May 2025 06:45:39 -0400
Subject: [PATCH 097/211] Commentary: Changes update

---
 Changes                               |  4 +++-
 bin/verilator_coverage                |  2 +-
 include/vltstd/svdpi.h                | 22 +++++++++++-----------
 test_regress/t/t_dist_docs_summary.py |  2 +-
 4 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/Changes b/Changes
index f151914c0..6f7dcbc93 100644
--- a/Changes
+++ b/Changes
@@ -22,6 +22,7 @@ Verilator 5.037 devel
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
 * Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
+* Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
@@ -40,8 +41,9 @@ Verilator 5.037 devel
 * Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
 * Fix skipped generate blocks in toggle coverage (#6010). [Ryszard Rozak, Antmicro Ltd.]
 * Fix arithmetic left-shift by constants over 32 bits (#6007) (#6015). [Zhen Yan]
+* Fix concatenation and type casting (#6012) (#6013). [Todd Strader]
 * Fix wrong optimization result of shifted out variable (#6016) (#6019). [Yutetsu TAKATSUKASA]
-* Add missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
+* Fix missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
 
 
 Verilator 5.036 2025-04-27
diff --git a/bin/verilator_coverage b/bin/verilator_coverage
index 476da1b1a..9407ddbf4 100755
--- a/bin/verilator_coverage
+++ b/bin/verilator_coverage
@@ -170,7 +170,7 @@ L<https://verilator.org/guide/latest/exe_verilator_coverage.html>.
     --annotate-all                All files should be shown.
     --annotate-min <count>        Minimum occurrence count for uncovered.
     --annotate-points             Annotates info from each coverage point.
-    --filter-type <type>          Skips records of coverage types different than <type>.
+    --filter-type <regex>         Keep only records of given coverage type.
     --help                        Displays this message and version and exits.
     --rank                        Compute relative importance of tests.
     --unlink                      With --write, unlink all inputs
diff --git a/include/vltstd/svdpi.h b/include/vltstd/svdpi.h
index 4afe10043..66763bb90 100644
--- a/include/vltstd/svdpi.h
+++ b/include/vltstd/svdpi.h
@@ -367,28 +367,28 @@ XXTERN int svIsDisabledState( void );
  */
 XXTERN void svAckDisabledState( void );
 
-/*                                                                                                         Mantis 5713/D9
+/*
  * Retrieve the current simulation time, scaled to the time unit of the scope.
-* If scope is NULL, then time is scaled to the simulation time unit.
-* It is an error to call svGetTime() with an invalid svScope.
-* This function returns -1 for all error cases, 0 upon success.
-*/
+ * If scope is NULL, then time is scaled to the simulation time unit.
+ * It is an error to call svGetTime() with an invalid svScope.
+ * This function returns -1 for all error cases, 0 upon success.
+ */
 XXTERN int svGetTime(const svScope scope, svTimeVal* time);
 
 /*
  * Retrieve the time unit for scope.
  * If scope is NULL, then simulation time unit is retrieved.
-* It is an error to call svGetTimeUnit() with an invalid svScope.
-* This function returns -1 for all error cases, 0 upon success.
-*/
+ * It is an error to call svGetTimeUnit() with an invalid svScope.
+ * This function returns -1 for all error cases, 0 upon success.
+ */
 XXTERN int svGetTimeUnit(const svScope scope, int32_t* time_unit);
 
 /*
  * Retrieve the time precision for scope.
  * If scope is NULL, then simulation time unit is retrieved.
-* It is an error to call svGetTimePrecision() with an invalid svScope.
-* This function returns -1 for all error cases, 0 upon success.
-*/
+ * It is an error to call svGetTimePrecision() with an invalid svScope.
+ * This function returns -1 for all error cases, 0 upon success.
+ */
 XXTERN int svGetTimePrecision(const svScope scope, int32_t* time_precision);
 
 
diff --git a/test_regress/t/t_dist_docs_summary.py b/test_regress/t/t_dist_docs_summary.py
index ad2ff316c..d75cc5ce2 100755
--- a/test_regress/t/t_dist_docs_summary.py
+++ b/test_regress/t/t_dist_docs_summary.py
@@ -20,7 +20,7 @@ Waivers = [
     '-fno-',  # Documented differently
     '-no-lineno',  # Deprecated
     '-no-order-clock-delay',  # Deprecated
-    '-prof-threads',  # Deprecated)
+    '-prof-threads',  # Deprecated
 ]
 
 

From af304363570b92e5564259fff3f02ad3abce9e4e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 22 May 2025 06:54:16 -0400
Subject: [PATCH 098/211] Internals: Rename VL_PACK/VL_UNPACK in prep for
 future fix. No functional change intended.

---
 include/verilated.h       |   3 +
 include/verilated_funcs.h | 130 +++++++++++++++++++++-----------------
 src/V3AstNodeExpr.h       |   2 +-
 src/V3EmitCFunc.h         |  26 ++++++--
 4 files changed, 97 insertions(+), 64 deletions(-)

diff --git a/include/verilated.h b/include/verilated.h
index 53c0b869f..799cc4bb4 100644
--- a/include/verilated.h
+++ b/include/verilated.h
@@ -113,6 +113,7 @@ class VerilatedVcdSc;
 //=========================================================================
 // Basic types
 
+// Type letters
 // clang-format off
 //    P                     // Packed data of bit type (C/S/I/Q/W)
 using CData = uint8_t;    ///< Data representing 'bit' of 1-8 packed bits
@@ -124,6 +125,8 @@ using WData = EData;        ///< Data representing >64 packed bits (used as poin
 //    F     = float;        // No typedef needed; Verilator uses float
 //    D     = double;       // No typedef needed; Verilator uses double
 //    N     = std::string;  // No typedef needed; Verilator uses string
+//    U     = VlUnpacked;
+//    R     = VlQueue;
 // clang-format on
 
 using WDataInP = const WData*;  ///< 'bit' of >64 packed bits as array input to a function
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index c971c11ac..712ce7277 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -1594,26 +1594,26 @@ static inline WDataOutP VL_STREAML_WWI(int lbits, WDataOutP owp, WDataInP const
     return owp;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<CData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<CData>& q) {
     IData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
     return ret;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<SData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<SData>& q) {
     IData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
     return ret;
 }
 
-static inline IData VL_PACK_II(int obits, int lbits, const VlQueue<IData>& q) {
+static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<IData>& q) {
     IData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<IData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1621,7 +1621,7 @@ static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<CData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<IData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1629,32 +1629,32 @@ static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<SData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline IData VL_PACK_II(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
+static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
     IData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i) ret |= q[N_Depth - 1 - i] << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<CData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<CData>& q) {
     QData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<SData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<SData>& q) {
     QData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QI(int obits, int lbits, const VlQueue<IData>& q) {
+static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<IData>& q) {
     QData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<CData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1662,7 +1662,7 @@ static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<CData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<SData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
@@ -1670,41 +1670,44 @@ static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<SData, N_D
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<IData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i)
         ret |= static_cast<QData>(q[N_Depth - 1 - i]) << (i * lbits);
     return ret;
 }
 
-static inline QData VL_PACK_QQ(int obits, int lbits, const VlQueue<QData>& q) {
+static inline QData VL_PACK_Q_RQ(int obits, int lbits, const VlQueue<QData>& q) {
     QData ret = 0;
     for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
     return ret;
 }
 
 template <std::size_t N_Depth>
-static inline QData VL_PACK_QQ(int obits, int lbits, const VlUnpacked<QData, N_Depth>& q) {
+static inline QData VL_PACK_Q_UQ(int obits, int lbits, const VlUnpacked<QData, N_Depth>& q) {
     QData ret = 0;
     for (size_t i = 0; i < N_Depth; ++i) ret |= q[N_Depth - 1 - i] << (i * lbits);
     return ret;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<CData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<CData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
         _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<SData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<SData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
         _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const VlQueue<IData>& q) {
+static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<IData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
         _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
@@ -1712,8 +1715,8 @@ static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp, const Vl
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<CData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<CData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1721,8 +1724,8 @@ static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<SData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<SData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1730,15 +1733,16 @@ static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WI(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<IData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UI(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<IData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WI(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
-static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp, const VlQueue<QData>& q) {
+static inline WDataOutP VL_PACK_W_RQ(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<QData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
         _vl_insert_WQ(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
@@ -1746,8 +1750,8 @@ static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp, const Vl
 }
 
 template <std::size_t N_Depth>
-static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<QData, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UQ(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<QData, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WQ(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -1755,8 +1759,8 @@ static inline WDataOutP VL_PACK_WQ(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Words>
-static inline WDataOutP VL_PACK_WW(int obits, int lbits, WDataOutP owp,
-                                   const VlQueue<VlWide<N_Words>>& q) {
+static inline WDataOutP VL_PACK_W_RW(int obits, int lbits, WDataOutP owp,
+                                     const VlQueue<VlWide<N_Words>>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
         _vl_insert_WW(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
@@ -1764,8 +1768,8 @@ static inline WDataOutP VL_PACK_WW(int obits, int lbits, WDataOutP owp,
 }
 
 template <std::size_t N_Depth, std::size_t N_Words>
-static inline WDataOutP VL_PACK_WW(int obits, int lbits, WDataOutP owp,
-                                   const VlUnpacked<VlWide<N_Words>, N_Depth>& q) {
+static inline WDataOutP VL_PACK_W_UW(int obits, int lbits, WDataOutP owp,
+                                     const VlUnpacked<VlWide<N_Words>, N_Depth>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < N_Depth; ++i)
         _vl_insert_WW(owp, q[N_Depth - 1 - i], i * lbits + lbits - 1, i * lbits);
@@ -2211,56 +2215,56 @@ static inline WDataOutP VL_SEL_WWII(int obits, int lbits, WDataOutP owp, WDataIn
 //======================================================================
 // Expressions needing insert/select
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<CData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<CData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<SData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<SData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_II(int lbits, int rbits, VlQueue<IData>& q, IData from) {
+static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<IData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<CData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<CData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<SData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<SData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlQueue<IData>& q, QData from) {
+static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<IData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_QQ(int lbits, int rbits, VlQueue<QData>& q, QData from) {
+static inline void VL_UNPACK_RQ_Q(int lbits, int rbits, VlQueue<QData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<CData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<CData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
@@ -2269,7 +2273,7 @@ static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<CData>& q, WDataIn
     }
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<SData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<SData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
@@ -2278,7 +2282,7 @@ static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<SData>& q, WDataIn
     }
 }
 
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<IData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<IData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
@@ -2287,7 +2291,7 @@ static inline void VL_UNPACK_IW(int lbits, int rbits, VlQueue<IData>& q, WDataIn
     }
 }
 
-static inline void VL_UNPACK_QW(int lbits, int rbits, VlQueue<QData>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RQ_W(int lbits, int rbits, VlQueue<QData>& q, WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const QData mask = VL_MASK_Q(lbits);
@@ -2297,7 +2301,8 @@ static inline void VL_UNPACK_QW(int lbits, int rbits, VlQueue<QData>& q, WDataIn
 }
 
 template <std::size_t N_Words>
-static inline void VL_UNPACK_WW(int lbits, int rbits, VlQueue<VlWide<N_Words>>& q, WDataInP rwp) {
+static inline void VL_UNPACK_RW_W(int lbits, int rbits, VlQueue<VlWide<N_Words>>& q,
+                                  WDataInP rwp) {
     const int size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     for (size_t i = 0; i < size; ++i) {
@@ -2306,82 +2311,89 @@ static inline void VL_UNPACK_WW(int lbits, int rbits, VlQueue<VlWide<N_Words>>&
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_II(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q, IData from) {
+static inline void VL_UNPACK_UI_I(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  IData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IQ(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UI_Q(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  QData from) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_QQ(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q, QData from) {
+static inline void VL_UNPACK_UQ_Q(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
+                                  QData from) {
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < N_Depth; ++i) q[i] = (from >> ((N_Depth - 1 - i) * lbits)) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<CData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<SData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_IW(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UI_W(int lbits, int rbits, VlUnpacked<IData, N_Depth>& q,
+                                  WDataInP rwp) {
     const IData mask = VL_MASK_I(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_IWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth>
-static inline void VL_UNPACK_QW(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UQ_W(int lbits, int rbits, VlUnpacked<QData, N_Depth>& q,
+                                  WDataInP rwp) {
     const QData mask = VL_MASK_Q(lbits);
     for (size_t i = 0; i < N_Depth; ++i)
         q[i] = VL_SEL_QWII(rbits, rwp, (N_Depth - 1 - i) * lbits, lbits) & mask;
 }
 
 template <std::size_t N_Depth, std::size_t N_Words>
-static inline void VL_UNPACK_WW(int lbits, int rbits, VlUnpacked<VlWide<N_Words>, N_Depth>& q,
-                                WDataInP rwp) {
+static inline void VL_UNPACK_UW_W(int lbits, int rbits, VlUnpacked<VlWide<N_Words>, N_Depth>& q,
+                                  WDataInP rwp) {
     for (size_t i = 0; i < N_Depth; ++i)
         VL_SEL_WWII(lbits, rbits, q[i], rwp, (N_Depth - 1 - i) * lbits, lbits);
 }
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index ce027827f..aac157825 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1139,7 +1139,7 @@ public:
     }
     ASTGEN_MEMBERS_AstCvtArrayToPacked;
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
-    string emitC() override { return "VL_PACK_%nq%rq(%nw, %rw, %P, %li)"; }
+    string emitC() override { V3ERROR_NA_RETURN(""); }
     bool cleanOut() const override { return true; }
 };
 class AstCvtPackedToArray final : public AstNodeExpr {
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 30075f281..d270a9e2a 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -186,8 +186,17 @@ public:
 
     bool emitSimpleOk(AstNodeExpr* nodep);
     void emitIQW(AstNode* nodep) {
-        // Other abbrevs: "C"har, "S"hort, "F"loat, "D"ouble, stri"N"g
-        puts(nodep->dtypep()->charIQWN());
+        // See "Type letters" in verilated.h
+        // Other abbrevs: "C"har, "S"hort, "F"loat, "D"ouble, stri"N"g, "R"=queue, "U"npacked
+        puts(nodep->dtypep()->skipRefp()->charIQWN());
+    }
+    void emitRU(AstNode* nodep) {
+        AstNodeDType* dtp = nodep->dtypep()->skipRefp();
+        // See "Type letters" in verilated.h
+        if (VN_IS(dtp, UnpackArrayDType))
+            puts("U");
+        else if (VN_IS(dtp, QueueDType) || VN_IS(dtp, DynArrayDType))
+            puts("R");
     }
     void emitScIQW(AstVar* nodep) {
         UASSERT_OBJ(nodep->isSc(), nodep, "emitting SystemC operator on non-SC variable");
@@ -387,8 +396,14 @@ public:
     }
 
     void visit(AstCvtArrayToPacked* nodep) override {
-        AstNodeDType* const elemDTypep = nodep->fromp()->dtypep()->subDTypep();
-        emitOpName(nodep, nodep->emitC(), nodep->fromp(), elemDTypep, nullptr);
+        AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefp();
+        AstNodeDType* const elemDtp = fromDtp->subDTypep()->skipRefp();
+        puts("VL_PACK_");
+        emitIQW(nodep);
+        puts("_");
+        emitRU(fromDtp);
+        emitIQW(elemDtp);
+        emitOpName(nodep, "(%nw, %rw, %P, %li)", nodep->fromp(), elemDtp, nullptr);
     }
 
     void visit(AstCvtUnpackedToQueue* nodep) override {
@@ -453,7 +468,10 @@ public:
         } else if (const AstCvtPackedToArray* const castp
                    = VN_CAST(nodep->rhsp(), CvtPackedToArray)) {
             putns(castp, "VL_UNPACK_");
+            emitRU(nodep);
             emitIQW(nodep->dtypep()->subDTypep());
+            puts("_");
+            emitRU(castp->fromp());
             emitIQW(castp->fromp());
             puts("(");
             putns(castp->dtypep(), cvtToStr(castp->dtypep()->subDTypep()->widthMin()));

From 091be59f0d37d278ac95fa72ff25762b5483d199 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 22 May 2025 17:53:04 -0400
Subject: [PATCH 099/211] Tests: Use make -j when few tests.

---
 test_regress/driver.py | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/test_regress/driver.py b/test_regress/driver.py
index be045681c..cd49c6d8f 100755
--- a/test_regress/driver.py
+++ b/test_regress/driver.py
@@ -1321,6 +1321,7 @@ class VlTest:
                     entering=self.obj_dir,
                     cmd=[
                         os.environ['MAKE'],
+                        (("-j " + str(Args.driver_build_jobs)) if Args.driver_build_jobs else ""),
                         "-C " + self.obj_dir,
                         "-f " + os.path.abspath(os.path.dirname(__file__)) + "/Makefile_obj",
                         ("" if self.verbose else "--no-print-directory"),
@@ -2914,6 +2915,7 @@ if __name__ == '__main__':
 
     forker = Forker(Args.jobs)
 
+    Args.driver_build_jobs = None
     if len(Arg_Tests) >= 2 and Args.jobs >= 2:
         # Read supported into master process, so don't call every subprocess
         Capabilities.warmup_cache()
@@ -2922,5 +2924,8 @@ if __name__ == '__main__':
         print("== Many jobs; redirecting STDIN", file=sys.stderr)
         #
         sys.stdin = open("/dev/null", 'r', encoding="utf8")  # pylint: disable=consider-using-with
+    else:
+        # Speed up single-test makes
+        Args.driver_build_jobs = calc_jobs()
 
     run_them()

From 46c7b69c6413aa3fab45ba420e16978f62f332f3 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 22 May 2025 20:29:32 -0400
Subject: [PATCH 100/211] Internals: UINFO now includes newline itself. No
 functional change.

---
 src/V3Active.cpp              |   2 +-
 src/V3ActiveTop.cpp           |  10 +-
 src/V3Assert.cpp              |   6 +-
 src/V3AssertPre.cpp           |  14 +-
 src/V3Ast.cpp                 |  16 +-
 src/V3Begin.cpp               |  28 +--
 src/V3Branch.cpp              |   6 +-
 src/V3Broken.cpp              |   4 +-
 src/V3CCtors.cpp              |   2 +-
 src/V3CUse.cpp                |   4 +-
 src/V3Case.cpp                |   8 +-
 src/V3Cast.cpp                |   4 +-
 src/V3Class.cpp               |   6 +-
 src/V3Clean.cpp               |   4 +-
 src/V3Clock.cpp               |   2 +-
 src/V3Combine.cpp             |   6 +-
 src/V3Common.cpp              |   2 +-
 src/V3Config.cpp              |  12 +-
 src/V3Const.cpp               | 117 ++++++-----
 src/V3Coverage.cpp            |  42 ++--
 src/V3CoverageJoin.cpp        |  10 +-
 src/V3Dead.cpp                |  22 +--
 src/V3Delayed.cpp             |   2 +-
 src/V3Depth.cpp               |   6 +-
 src/V3DepthBlock.cpp          |   8 +-
 src/V3Descope.cpp             |  23 ++-
 src/V3DfgOptimizer.cpp        |   6 +-
 src/V3DfgPeephole.cpp         |   2 +-
 src/V3DiagSarif.cpp           |   4 +-
 src/V3DupFinder.cpp           |   2 +-
 src/V3EmitCConstPool.cpp      |   2 +-
 src/V3EmitCFunc.cpp           |   2 +-
 src/V3EmitCHeaders.cpp        |   4 +-
 src/V3EmitCImp.cpp            |   6 +-
 src/V3EmitCInlines.cpp        |   2 +-
 src/V3EmitCMain.cpp           |   2 +-
 src/V3EmitCMake.cpp           |   2 +-
 src/V3EmitCModel.cpp          |   2 +-
 src/V3EmitCPch.cpp            |   2 +-
 src/V3EmitCSyms.cpp           |  16 +-
 src/V3EmitMk.cpp              |  20 +-
 src/V3EmitMkJson.cpp          |   2 +-
 src/V3EmitV.cpp               |   4 +-
 src/V3EmitXml.cpp             |   2 +-
 src/V3Error.h                 |  14 +-
 src/V3ExecGraph.cpp           |  39 ++--
 src/V3Expand.cpp              |  66 +++----
 src/V3File.cpp                |  28 +--
 src/V3Force.cpp               |   2 +-
 src/V3Fork.cpp                |  18 +-
 src/V3FuncOpt.cpp             |  10 +-
 src/V3Gate.cpp                |  46 ++---
 src/V3GraphAcyc.cpp           |  34 ++--
 src/V3GraphAlg.cpp            |   2 +-
 src/V3GraphTest.cpp           |   2 +-
 src/V3Hasher.cpp              |   2 +-
 src/V3HierBlock.cpp           |   9 +-
 src/V3Inline.cpp              |  28 +--
 src/V3Inst.cpp                |  33 ++--
 src/V3InstrCount.cpp          |  10 +-
 src/V3Interface.cpp           |   2 +-
 src/V3Life.cpp                |  44 ++---
 src/V3LifePost.cpp            |   6 +-
 src/V3LinkCells.cpp           |  22 +--
 src/V3LinkDot.cpp             | 359 ++++++++++++++++------------------
 src/V3LinkInc.cpp             |   4 +-
 src/V3LinkJump.cpp            |  12 +-
 src/V3LinkLValue.cpp          |   8 +-
 src/V3LinkLevel.cpp           |  21 +-
 src/V3LinkParse.cpp           |  18 +-
 src/V3LinkResolve.cpp         |  10 +-
 src/V3Localize.cpp            |  10 +-
 src/V3MergeCond.cpp           |   4 +-
 src/V3Name.cpp                |   2 +-
 src/V3Number.cpp              |  22 +--
 src/V3Options.cpp             |   6 +-
 src/V3OrderParallel.cpp       |  48 ++---
 src/V3OrderProcessDomains.cpp |  12 +-
 src/V3OrderSerial.cpp         |   2 +-
 src/V3Os.cpp                  |  14 +-
 src/V3Param.cpp               |  65 +++---
 src/V3ParseGrammar.cpp        |   4 +-
 src/V3ParseImp.cpp            |  18 +-
 src/V3PreExpr.h               |  16 +-
 src/V3PreProc.cpp             |  77 ++++----
 src/V3PreShell.cpp            |   4 +-
 src/V3Premit.cpp              |  10 +-
 src/V3ProtectLib.cpp          |   2 +-
 src/V3Randomize.cpp           |  10 +-
 src/V3Reloop.cpp              |  16 +-
 src/V3Sampled.cpp             |   4 +-
 src/V3Sched.cpp               |   2 +-
 src/V3SchedPartition.cpp      |   2 +-
 src/V3SchedVirtIface.cpp      |   2 +-
 src/V3Scope.cpp               |  32 +--
 src/V3Simulate.h              |  39 ++--
 src/V3Slice.cpp               |  16 +-
 src/V3Split.cpp               |  50 ++---
 src/V3SplitAs.cpp             |  16 +-
 src/V3SplitVar.cpp            |  50 +++--
 src/V3StackCount.cpp          |  10 +-
 src/V3Stats.cpp               |   2 +-
 src/V3StatsReport.cpp         |   2 +-
 src/V3String.cpp              |   2 +-
 src/V3Subst.cpp               |  30 ++-
 src/V3SymTable.h              |  15 +-
 src/V3TSP.cpp                 |  16 +-
 src/V3Table.cpp               |  20 +-
 src/V3Task.cpp                |  40 ++--
 src/V3Timing.cpp              |   4 +-
 src/V3Trace.cpp               |  22 +--
 src/V3TraceDecl.cpp           |   8 +-
 src/V3Tristate.cpp            | 130 ++++++------
 src/V3Udp.cpp                 |   2 +-
 src/V3Undriven.cpp            |  20 +-
 src/V3Unknown.cpp             |  24 +--
 src/V3Unroll.cpp              |  30 +--
 src/V3VariableOrder.cpp       |   2 +-
 src/V3Width.cpp               | 219 +++++++++++----------
 src/V3WidthCommit.cpp         |  10 +-
 src/V3WidthRemove.h           |   2 +-
 src/V3WidthSel.cpp            |  30 +--
 src/Verilator.cpp             |  12 +-
 src/VlcBucket.h               |   4 +-
 src/VlcMain.cpp               |   4 +-
 src/VlcPoint.h                |   2 +-
 src/VlcTest.h                 |   2 +-
 src/VlcTop.cpp                |  28 +--
 src/astgen                    |   2 +-
 129 files changed, 1259 insertions(+), 1287 deletions(-)

diff --git a/src/V3Active.cpp b/src/V3Active.cpp
index ca1c12d51..34b87d2fc 100644
--- a/src/V3Active.cpp
+++ b/src/V3Active.cpp
@@ -647,7 +647,7 @@ public:
 // Active class functions
 
 void V3Active::activeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ActiveVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("active", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp
index 91248a918..b432f0506 100644
--- a/src/V3ActiveTop.cpp
+++ b/src/V3ActiveTop.cpp
@@ -61,11 +61,11 @@ class ActiveTopVisitor final : public VNVisitor {
     void visit(AstNodeModule* nodep) override {
         // Create required actives and add to module
         // We can start ordering at a module, or a scope
-        UINFO(4, " MOD   " << nodep << endl);
+        UINFO(4, " MOD   " << nodep);
         iterateChildren(nodep);
     }
     void visit(AstActive* nodep) override {
-        UINFO(4, "   ACTIVE " << nodep << endl);
+        UINFO(4, "   ACTIVE " << nodep);
         // Remove duplicate clocks and such; sensesp() may change!
         V3Const::constifyExpensiveEdit(nodep);
         AstSenTree* sensesp = nodep->sensesp();
@@ -95,10 +95,10 @@ class ActiveTopVisitor final : public VNVisitor {
         // Move the SENTREE for each active up to the global level.
         // This way we'll easily see what clock domains are identical
         AstSenTree* const wantp = m_finder.getSenTree(sensesp);
-        UINFO(4, "   lookdone\n");
+        UINFO(4, "   lookdone");
         if (wantp != sensesp) {
             // Move the active's contents to the other active
-            UINFO(4, "   merge active " << sensesp << " into " << wantp << endl);
+            UINFO(4, "   merge active " << sensesp << " into " << wantp);
             if (nodep->sensesStorep()) {
                 UASSERT_OBJ(sensesp == nodep->sensesStorep(), nodep,
                             "sensesStore should have been deleted earlier if different");
@@ -155,7 +155,7 @@ public:
 // Active class functions
 
 void V3ActiveTop::activeTopAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ActiveTopVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("activetop", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index 0c6b848c7..d62f01066 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -635,7 +635,7 @@ class AssertVisitor final : public VNVisitor {
         FileLine* const fl = nodep->fileline();
         switch (nodep->ctlType()) {
         case VAssertCtlType::ON:
-            UINFO(9, "Generating assertctl for a module: " << m_modp << endl);
+            UINFO(9, "Generating assertctl for a module: " << m_modp);
             nodep->replaceWith(new AstCExpr{
                 fl,
                 "vlSymsp->_vm_contextp__->assertOnSet("s + std::to_string(nodep->ctlAssertTypes())
@@ -644,7 +644,7 @@ class AssertVisitor final : public VNVisitor {
             break;
         case VAssertCtlType::OFF:
         case VAssertCtlType::KILL: {
-            UINFO(9, "Generating assertctl for a module: " << m_modp << endl);
+            UINFO(9, "Generating assertctl for a module: " << m_modp);
             nodep->replaceWith(new AstCExpr{fl,
                                             "vlSymsp->_vm_contextp__->assertOnClear("s
                                                 + std::to_string(nodep->ctlAssertTypes()) + " ,"s
@@ -725,7 +725,7 @@ public:
 // Top Assert class
 
 void V3Assert::assertAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { AssertVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("assert", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index 2761344df..8d1bc1e5a 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -156,7 +156,7 @@ private:
     void visit(AstClocking* const nodep) override {
         VL_RESTORER(m_clockingp);
         m_clockingp = nodep;
-        UINFO(8, "   CLOCKING" << nodep << endl);
+        UINFO(8, "   CLOCKING" << nodep);
         iterateChildren(nodep);
         if (nodep->eventp()) nodep->addNextHere(nodep->eventp()->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
@@ -359,9 +359,9 @@ private:
         }
     }
     void visit(AstNodeVarRef* nodep) override {
-        UINFO(8, " -varref:  " << nodep << endl);
-        UINFO(8, " -varref-var-back:  " << nodep->varp()->backp() << endl);
-        UINFO(8, " -varref-var-user1:  " << nodep->varp()->user1p() << endl);
+        UINFO(8, " -varref:  " << nodep);
+        UINFO(8, " -varref-var-back:  " << nodep->varp()->backp());
+        UINFO(8, " -varref-var-user1:  " << nodep->varp()->user1p());
         if (AstClockingItem* const itemp = VN_CAST(
                 nodep->varp()->user1p() ? nodep->varp()->user1p() : nodep->varp()->firstAbovep(),
                 ClockingItem)) {
@@ -369,12 +369,12 @@ private:
 
             // ensure linking still works, this has to be done only once
             if (AstVarXRef* xrefp = VN_CAST(nodep, VarXRef)) {
-                UINFO(8, " -clockvarxref-in:  " << xrefp << endl);
+                UINFO(8, " -clockvarxref-in:  " << xrefp);
                 string dotted = xrefp->dotted();
                 const size_t dotPos = dotted.rfind('.');
                 dotted.erase(dotPos, string::npos);
                 xrefp->dotted(dotted);
-                UINFO(8, " -clockvarxref-out: " << xrefp << endl);
+                UINFO(8, " -clockvarxref-out: " << xrefp);
                 m_xrefsp.emplace_back(xrefp);
             }
 
@@ -613,7 +613,7 @@ public:
 // Top Assert class
 
 void V3AssertPre::assertPreAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { AssertPreVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("assertpre", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 26cbabc4e..a55d9e45e 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -671,7 +671,7 @@ AstNode* AstNode::unlinkFrBack(VNRelinker* linkerp) {
 
 void AstNode::relink(VNRelinker* linkerp) {
     if (debug() > 8) {
-        UINFO(0, " EDIT:      relink: ");
+        UINFO_PREFIX(" EDIT:      relink: ");
         dumpPtrs();
     }
     AstNode* const newp = this;
@@ -1344,7 +1344,7 @@ void AstNode::dumpTreeFile(const string& filename, bool doDump) {
     // Not const function as calls checkTree
     if (doDump) {
         {  // Write log & close
-            UINFO(2, "Dumping " << filename << endl);
+            UINFO(2, "Dumping " << filename);
             const std::unique_ptr<std::ofstream> logsp{V3File::new_ofstream(filename)};
             if (logsp->fail()) v3fatal("Can't write file: " << filename);
             *logsp << "Verilator Tree Dump (format 0x3900) from <e" << std::dec << editCountLast();
@@ -1389,7 +1389,7 @@ void AstNode::dumpTreeDot(std::ostream& os) const {
 
 void AstNode::dumpTreeJsonFile(const string& filename, bool doDump) {
     if (!doDump) return;
-    UINFO(2, "Dumping " << filename << endl);
+    UINFO(2, "Dumping " << filename);
     const std::unique_ptr<std::ofstream> treejsonp{V3File::new_ofstream(filename)};
     if (treejsonp->fail()) v3fatal("Can't write file: " << filename);
     dumpTreeJson(*treejsonp);
@@ -1398,7 +1398,7 @@ void AstNode::dumpTreeJsonFile(const string& filename, bool doDump) {
 
 void AstNode::dumpJsonMetaFileGdb(const char* filename) { dumpJsonMetaFile(filename); }
 void AstNode::dumpJsonMetaFile(const string& filename) {
-    UINFO(2, "Dumping " << filename << endl);
+    UINFO(2, "Dumping " << filename);
     const std::unique_ptr<std::ofstream> treejsonp{V3File::new_ofstream(filename)};
     if (treejsonp->fail()) v3fatalStatic("Can't write file: " << filename);
     *treejsonp << '{';
@@ -1412,7 +1412,7 @@ void AstNode::dumpJsonMetaFile(const string& filename) {
 
 void AstNode::dumpTreeDotFile(const string& filename, bool doDump) {
     if (doDump) {
-        UINFO(2, "Dumping " << filename << endl);
+        UINFO(2, "Dumping " << filename);
         const std::unique_ptr<std::ofstream> treedotp{V3File::new_ofstream(filename)};
         if (treedotp->fail()) v3fatal("Can't write file: " << filename);
         *treedotp << "digraph vTree{\n";
@@ -1608,9 +1608,9 @@ static VCastable computeCastableImp(const AstNodeDType* toDtp, const AstNodeDTyp
 VCastable AstNode::computeCastable(const AstNodeDType* toDtp, const AstNodeDType* fromDtp,
                                    const AstNode* fromConstp) {
     const auto castable = computeCastableImp(toDtp, fromDtp, fromConstp);
-    UINFO(9, "  castable=" << castable << "  for " << toDtp << endl);
-    UINFO(9, "     =?= " << fromDtp << endl);
-    if (fromConstp) UINFO(9, "     const= " << fromConstp << endl);
+    UINFO(9, "  castable=" << castable << "  for " << toDtp);
+    UINFO(9, "     =?= " << fromDtp);
+    if (fromConstp) UINFO(9, "     const= " << fromConstp);
     return castable;
 }
 
diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index f66ed625c..cc2fd557f 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -74,7 +74,7 @@ class BeginVisitor final : public VNVisitor {
     string dot(const string& a, const string& b) { return VString::dot(a, "__DOT__", b); }
 
     void dotNames(const AstNodeBlock* const nodep, const char* const blockName) {
-        UINFO(8, "nname " << m_namedScope << endl);
+        UINFO(8, "nname " << m_namedScope);
         if (nodep->name() != "") {  // Else unneeded unnamed block
             // Create data for dotted variable resolution
             string dottedname = nodep->name() + "__DOT__";  // So always found
@@ -149,7 +149,7 @@ class BeginVisitor final : public VNVisitor {
         // Rename it (e.g. class under a generate)
         if (m_unnamedScope != "") {
             nodep->name(dot(m_unnamedScope, nodep->name()));
-            UINFO(8, "     rename to " << nodep->name() << endl);
+            UINFO(8, "     rename to " << nodep->name());
             m_statep->userMarkChanged(nodep);
         }
         VL_RESTORER(m_displayScope);
@@ -161,11 +161,11 @@ class BeginVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstNodeFTask* nodep) override {
-        UINFO(8, "  " << nodep << endl);
+        UINFO(8, "  " << nodep);
         // Rename it
         if (m_unnamedScope != "") {
             nodep->name(dot(m_unnamedScope, nodep->name()));
-            UINFO(8, "     rename to " << nodep->name() << endl);
+            UINFO(8, "     rename to " << nodep->name());
             m_statep->userMarkChanged(nodep);
         }
         // BEGIN wrapping a function rename that function, but don't affect
@@ -200,7 +200,7 @@ class BeginVisitor final : public VNVisitor {
     }
     void visit(AstBegin* nodep) override {
         // Begin blocks were only useful in variable creation, change names and delete
-        UINFO(8, "  " << nodep << endl);
+        UINFO(8, "  " << nodep);
         VL_RESTORER(m_displayScope);
         VL_RESTORER(m_namedScope);
         VL_RESTORER(m_unnamedScope);
@@ -255,12 +255,12 @@ class BeginVisitor final : public VNVisitor {
         }
     }
     void visit(AstCell* nodep) override {
-        UINFO(8, "   CELL " << nodep << endl);
+        UINFO(8, "   CELL " << nodep);
         if (m_namedScope != "") {
             m_statep->userMarkChanged(nodep);
             // Rename it
             nodep->name(dot(m_namedScope, nodep->name()));
-            UINFO(8, "     rename to " << nodep->name() << endl);
+            UINFO(8, "     rename to " << nodep->name());
             // Move to module
             nodep->unlinkFrBack();
             m_modp->addStmtsp(nodep);
@@ -268,10 +268,10 @@ class BeginVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstVarXRef* nodep) override {
-        UINFO(9, "   VARXREF " << nodep << endl);
+        UINFO(9, "   VARXREF " << nodep);
         if (m_namedScope != "" && nodep->inlinedDots() == "" && !m_ftaskp) {
             nodep->inlinedDots(m_namedScope);
-            UINFO(9, "    rescope to " << nodep << endl);
+            UINFO(9, "    rescope to " << nodep);
         }
     }
     void visit(AstScopeName* nodep) override {
@@ -339,23 +339,23 @@ private:
     void visit(AstNodeFTaskRef* nodep) override {
         UASSERT_OBJ(nodep->taskp(), nodep, "unlinked");
         if (nodep->taskp()->user1()) {  // It was converted
-            UINFO(9, "    relinkFTask " << nodep << endl);
+            UINFO(9, "    relinkFTask " << nodep);
             nodep->name(nodep->taskp()->name());
         }
         iterateChildrenConst(nodep);
     }
     void visit(AstVarRef* nodep) override {
         if (nodep->varp()->user1()) {  // It was converted
-            UINFO(9, "    relinVarRef " << nodep << endl);
+            UINFO(9, "    relinVarRef " << nodep);
         }
         iterateChildrenConst(nodep);
     }
     void visit(AstIfaceRefDType* nodep) override {
         // May have changed cell names
         // TypeTable is always after all modules, so names are stable
-        UINFO(8, "   IFACEREFDTYPE " << nodep << endl);
+        UINFO(8, "   IFACEREFDTYPE " << nodep);
         if (nodep->cellp()) nodep->cellName(nodep->cellp()->name());
-        UINFO(8, "       rename to " << nodep << endl);
+        UINFO(8, "       rename to " << nodep);
         iterateChildrenConst(nodep);
     }
     //--------------------
@@ -371,7 +371,7 @@ public:
 // Task class functions
 
 void V3Begin::debeginAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         BeginState state;
         { BeginVisitor{nodep, &state}; }
diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp
index 56ee3f0b8..72203bd8e 100644
--- a/src/V3Branch.cpp
+++ b/src/V3Branch.cpp
@@ -53,14 +53,14 @@ class BranchVisitor final : public VNVisitorConst {
     }
     void checkUnlikely(AstNode* nodep) {
         if (nodep->isUnlikely()) {
-            UINFO(4, "  UNLIKELY: " << nodep << endl);
+            UINFO(4, "  UNLIKELY: " << nodep);
             m_unlikely++;
         }
     }
 
     // VISITORS
     void visit(AstNodeIf* nodep) override {
-        UINFO(4, " IF: " << nodep << endl);
+        UINFO(4, " IF: " << nodep);
         VL_RESTORER(m_likely);
         VL_RESTORER(m_unlikely);
         {
@@ -119,6 +119,6 @@ public:
 // Branch class functions
 
 void V3Branch::branchAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { BranchVisitor{nodep}; }
 }
diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp
index e1b5a73fd..f34c2b7cc 100644
--- a/src/V3Broken.cpp
+++ b/src/V3Broken.cpp
@@ -332,11 +332,11 @@ public:
 // Broken check entry point
 
 void V3Broken::brokenAll(AstNetlist* nodep) {
-    // UINFO(9, __FUNCTION__ << ": " << endl);
+    // UINFO(9, __FUNCTION__ << ": ");
     static bool inBroken = false;
     if (VL_UNCOVERABLE(inBroken)) {
         // A error called by broken can recurse back into broken; avoid this
-        UINFO(1, "Broken called under broken, skipping recursion.\n");  // LCOV_EXCL_LINE
+        UINFO(1, "Broken called under broken, skipping recursion.");  // LCOV_EXCL_LINE
     } else {
         inBroken = true;
 
diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp
index 92728f867..b90f868c1 100644
--- a/src/V3CCtors.cpp
+++ b/src/V3CCtors.cpp
@@ -260,7 +260,7 @@ void V3CCtors::evalAsserts() {
 }
 
 void V3CCtors::cctorsAll() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     evalAsserts();
     { CCtorsVisitor{v3Global.rootp()}; }
     V3Global::dumpCheckGlobalTree("cctors", 0, dumpTreeEitherLevel() >= 3);
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 1f90291c7..46505673f 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -98,7 +98,7 @@ public:
         for (auto& used : m_didUse) {
             AstCUse* const newp = new AstCUse{used.second.first, used.second.second, used.first};
             m_modp->addStmtsp(newp);
-            UINFO(8, "Insert " << newp << endl);
+            UINFO(8, "Insert " << newp);
         }
     }
     ~CUseVisitor() override = default;
@@ -109,7 +109,7 @@ public:
 // Class class functions
 
 void V3CUse::cUseAll() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // Call visitor separately for each module, so visitor state is cleared
     for (AstNodeModule* modp = v3Global.rootp()->modulesp(); modp;
          modp = VN_AS(modp->nextp(), NodeModule)) {
diff --git a/src/V3Case.cpp b/src/V3Case.cpp
index 9c934b6a7..c0b3f8648 100644
--- a/src/V3Case.cpp
+++ b/src/V3Case.cpp
@@ -188,7 +188,7 @@ class CaseVisitor final : public VNVisitor {
             m_caseNoOverlapsAllCovered = false;
             return false;  // Too wide for analysis
         }
-        UINFO(8, "Simple case statement: " << nodep << endl);
+        UINFO(8, "Simple case statement: " << nodep);
         const uint32_t numCases = 1UL << m_caseWidth;
         // Zero list of items for each value
         for (uint32_t i = 0; i < numCases; ++i) m_valueItem[i] = nullptr;
@@ -376,7 +376,7 @@ class CaseVisitor final : public VNVisitor {
         if (debug() >= 9) {  // LCOV_EXCL_START
             for (uint32_t i = 0; i < (1UL << m_caseWidth); ++i) {
                 if (const AstNode* const itemp = m_valueItem[i]) {
-                    UINFO(9, "Value " << std::hex << i << " " << itemp << endl);
+                    UINFO(9, "Value " << std::hex << i << " " << itemp);
                 }
             }
         }  // LCOV_EXCL_STOP
@@ -600,11 +600,11 @@ public:
 // Case class functions
 
 void V3Case::caseAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { CaseVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("case", 0, dumpTreeEitherLevel() >= 3);
 }
 void V3Case::caseLint(AstNodeCase* nodep) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     { CaseLintVisitor{nodep}; }
 }
diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp
index 3cbd14b09..1cdd43a4d 100644
--- a/src/V3Cast.cpp
+++ b/src/V3Cast.cpp
@@ -62,7 +62,7 @@ class CastVisitor final : public VNVisitor {
         //
         AstCCast* const castp
             = new AstCCast{nodep->fileline(), nodep, needsize, nodep->widthMin()};
-        UINFO(4, "  MadeCast " << static_cast<void*>(castp) << " for " << nodep << endl);
+        UINFO(4, "  MadeCast " << static_cast<void*>(castp) << " for " << nodep);
         relinkHandle.relink(castp);
         // if (debug() > 8) castp->dumpTree("-  castins: ");
         //
@@ -239,7 +239,7 @@ public:
 // Cast class functions
 
 void V3Cast::castAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { CastVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("cast", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index 3139ded69..af9bfddde 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -243,7 +243,7 @@ public:
         for (auto moved : m_toScopeMoves) {
             AstNode* const nodep = moved.first;
             AstScope* const scopep = moved.second;
-            UINFO(9, "moving " << nodep << " to " << scopep << endl);
+            UINFO(9, "moving " << nodep << " to " << scopep);
             if (VN_IS(nodep, NodeFTask)) {
                 scopep->addBlocksp(nodep->unlinkFrBack());
             } else if (VN_IS(nodep, Var)) {
@@ -261,7 +261,7 @@ public:
         for (auto moved : m_toPackageMoves) {
             AstNode* const nodep = moved.first;
             AstNodeModule* const modp = moved.second;
-            UINFO(9, "moving " << nodep << " to " << modp << endl);
+            UINFO(9, "moving " << nodep << " to " << modp);
             nodep->unlinkFrBack();
             modp->addStmtsp(nodep);
         }
@@ -294,7 +294,7 @@ public:
 // Class class functions
 
 void V3Class::classAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ClassVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("class", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index 00590c5c8..c4dc07ff3 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -119,7 +119,7 @@ class CleanVisitor final : public VNVisitor {
 
     // Operate on nodes
     void insertClean(AstNodeExpr* nodep) {  // We'll insert ABOVE passed node
-        UINFO(4, "  NeedClean " << nodep << endl);
+        UINFO(4, "  NeedClean " << nodep);
         VNRelinker relinkHandle;
         nodep->unlinkFrBack(&relinkHandle);
         //
@@ -326,7 +326,7 @@ public:
 // Clean class functions
 
 void V3Clean::cleanAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { CleanVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("clean", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp
index 0fbdb9a27..72e78ad57 100644
--- a/src/V3Clock.cpp
+++ b/src/V3Clock.cpp
@@ -191,7 +191,7 @@ public:
 // Clock class functions
 
 void V3Clock::clockAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ClockVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("clock", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp
index 5eff00462..6fea6c4c9 100644
--- a/src/V3Combine.cpp
+++ b/src/V3Combine.cpp
@@ -113,8 +113,8 @@ class CombineVisitor final : VNVisitor {
                 if (oldp->user3()) std::swap(oldp, newp);
 
                 // Something is being replaced
-                UINFO(9, "Replacing " << oldp << endl);
-                UINFO(9, "     with " << newp << endl);
+                UINFO(9, "Replacing " << oldp);
+                UINFO(9, "     with " << newp);
                 ++m_cfuncsCombined;
                 replaced = true;
 
@@ -233,7 +233,7 @@ public:
 // Combine class functions
 
 void V3Combine::combineAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     CombineVisitor::apply(nodep);
     V3Global::dumpCheckGlobalTree("combine", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Common.cpp b/src/V3Common.cpp
index 3d0f08885..e41360422 100644
--- a/src/V3Common.cpp
+++ b/src/V3Common.cpp
@@ -157,7 +157,7 @@ static void makeToStringMiddle(AstClass* nodep) {
 // V3Common class functions
 
 void V3Common::commonAll() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // NODE STATE
     // Entire netlist:
     //  AstClass::user1()     -> bool.  True if class needs to_string dumper
diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 59d7460cc..91482d6a1 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -404,17 +404,17 @@ public:
     void applyIgnores(FileLine* filelinep) {
         // HOT routine, called each parsed token line of this filename
         if (m_lastIgnore.lineno != filelinep->lineno()) {
-            // UINFO(9, "   ApplyIgnores for " << filelinep->ascii() << endl);
+            // UINFO(9, "   ApplyIgnores for " << filelinep->ascii());
             // Process all on/offs for lines up to and including the current line
             const int curlineno = filelinep->lastLineno();
             for (; m_lastIgnore.it != m_ignLines.end(); ++m_lastIgnore.it) {
                 if (m_lastIgnore.it->m_lineno > curlineno) break;
-                // UINFO(9, "     Hit " << *m_lastIgnore.it << endl);
+                // UINFO(9, "     Hit " << *m_lastIgnore.it);
                 filelinep->warnOn(m_lastIgnore.it->m_code, m_lastIgnore.it->m_on);
             }
             if (false && debug() >= 9) {
                 for (IgnLines::const_iterator it = m_lastIgnore.it; it != m_ignLines.end(); ++it) {
-                    UINFO(9, "     NXT " << *it << endl);
+                    UINFO(9, "     NXT " << *it);
                 }
             }
             m_lastIgnore.lineno = filelinep->lastLineno();
@@ -480,7 +480,7 @@ class V3ConfigScopeTraceResolver final {
 public:
     void addScopeTraceOn(bool on, const string& scope, int levels) {
         UINFO(9, "addScopeTraceOn " << on << " '" << scope << "' "
-                                    << " levels=" << levels << endl);
+                                    << " levels=" << levels);
         m_entries.emplace_back(V3ConfigScopeTraceEntry{scope, on, levels});
         m_matchCache.clear();
     }
@@ -499,7 +499,7 @@ public:
         for (const auto& ch : scope) {
             if (ch == '.') ++maxLevel;
         }
-        UINFO(9, "getScopeTraceOn " << scope << " maxLevel=" << maxLevel << endl);
+        UINFO(9, "getScopeTraceOn " << scope << " maxLevel=" << maxLevel);
 
         bool enabled = true;
         for (const auto& ent : m_entries) {
@@ -518,7 +518,7 @@ public:
                     UINFO(9, "getScopeTraceOn-part " << scope << " enabled=" << enabled
                                                      << " @ lev=" << partLevel
                                                      << (levelMatch ? "[match]" : "[miss]")
-                                                     << " from scopepart=" << scopepart << endl);
+                                                     << " from scopepart=" << scopepart);
                     break;
                 }
                 if (partEnd == scope.length()) break;
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index e893c5133..40dbbca62 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -394,7 +394,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
     bool setFailed(bool fail, const char* reason, AstNode* nodep, int line) {
         if (fail && !m_failed) {
             UINFO(9, "cannot optimize " << m_rootp << " reason:" << reason << " called from line:"
-                                        << line << " when checking:" << nodep << std::endl);
+                                        << line << " when checking:" << nodep);
             // if (debug() >= 9) m_rootp->dumpTree("-  root: ");
             m_failed = true;
         }
@@ -402,7 +402,7 @@ class ConstBitOpTreeVisitor final : public VNVisitorConst {
     }
     void incrOps(const AstNode* nodep, int line) {
         ++m_ops;
-        UINFO(9, "Increment to " << m_ops << " " << nodep << " called from line " << line << "\n");
+        UINFO(9, "Increment to " << m_ops << " " << nodep << " called from line " << line);
     }
     VarInfo& getVarInfo(const LeafInfo& ref) {
         UASSERT_OBJ(ref.refp(), m_rootp, "null varref in And/Or/Xor optimization");
@@ -729,11 +729,11 @@ public:
                 if (v->getConstResult()) {
                     UASSERT_OBJ(visitor.isOrTree(), nodep,
                                 "Only OR tree can yield known 1 result");
-                    UINFO(9, "OR tree with const 1 term: " << v->refp() << endl);
+                    UINFO(9, "OR tree with const 1 term: " << v->refp());
                     // Known 1 bit in OR tree, whole result is 1
                     resultp = new AstConst{fl, AstConst::BitTrue{}};
                 } else if (visitor.isAndTree()) {
-                    UINFO(9, "AND tree with const 0 term: " << v->refp() << endl);
+                    UINFO(9, "AND tree with const 0 term: " << v->refp());
                     // Known 0 bit in AND tree, whole result is 0
                     resultp = new AstConst{fl, AstConst::BitFalse{}};
                 } else {
@@ -750,10 +750,10 @@ public:
             resultOps += std::get<1>(result);
             if (std::get<2>(result)) {
                 hasCleanTerm = true;
-                UINFO(9, "Clean term: " << termps.back() << endl);
+                UINFO(9, "Clean term: " << termps.back());
             } else {
                 hasDirtyTerm = true;
-                UINFO(9, "Dirty term: " << termps.back() << endl);
+                UINFO(9, "Dirty term: " << termps.back());
             }
         }
 
@@ -770,7 +770,7 @@ public:
             } else {
                 // Otherwise, conservatively assume the frozen term is dirty
                 hasDirtyTerm = true;
-                UINFO(9, "Dirty frozen term: " << termp << endl);
+                UINFO(9, "Dirty frozen term: " << termp);
             }
             frozenNodes[frozenInfo.second].push_back(termp);
         }
@@ -1103,8 +1103,7 @@ class ConstVisitor final : public VNVisitor {
         if (!VN_IS(condp->thenp(), Const) && !VN_IS(condp->elsep(), Const)) return false;
         AstConst* const maskp = VN_CAST(nodep->lhsp(), Const);
         if (!maskp) return false;
-        UINFO(4, "AND(CONSTm, CONDcond(c, i, e))->CONDcond(c, AND(m,i), AND(m, e)) " << nodep
-                                                                                     << endl);
+        UINFO(4, "AND(CONSTm, CONDcond(c, i, e))->CONDcond(c, AND(m,i), AND(m, e)) " << nodep);
         AstNodeCond* const newp = static_cast<AstNodeCond*>(condp->cloneType(
             condp->condp()->unlinkFrBack(),
             new AstAnd{nodep->fileline(), maskp->cloneTree(false), condp->thenp()->unlinkFrBack()},
@@ -1219,7 +1218,7 @@ class ConstVisitor final : public VNVisitor {
 
         if (newp) {
             nodep->replaceWithKeepDType(newp);
-            UINFO(4, "Transformed leaf of bit tree to " << newp << std::endl);
+            UINFO(4, "Transformed leaf of bit tree to " << newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
 
@@ -1362,7 +1361,7 @@ class ConstVisitor final : public VNVisitor {
         const int newLsb = lp->toSInt() + bp->toSInt();
         if (newLsb + nodep->widthConst() > ap->width()) return false;
         //
-        UINFO(9, "SEL(SHIFTR(a,b),l,w) -> SEL(a,l+b,w)\n");
+        UINFO(9, "SEL(SHIFTR(a,b),l,w) -> SEL(a,l+b,w)");
         if (debug() >= 9) nodep->dumpTree("-  SEL(SH)-in: ");
         AstSel* const newp
             = new AstSel{nodep->fileline(), ap->unlinkFrBack(), newLsb, nodep->widthConst()};
@@ -1454,7 +1453,7 @@ class ConstVisitor final : public VNVisitor {
                                           : (" (adjusted +" + cvtToStr(-nodep->declRange().lo())
                                              + " to account for negative lsb)")));
                 UINFO(1, "    Related Raw index is " << nodep->msbConst() << ":"
-                                                     << nodep->lsbConst() << endl);
+                                                     << nodep->lsbConst());
                 // Don't replace with zero, we'll do it later
             }
         }
@@ -1638,14 +1637,14 @@ class ConstVisitor final : public VNVisitor {
         V3Number numv{nodep, nodep->widthMinV()};
         nodep->numberOperate(numv, constNumV(nodep->lhsp()));
         const V3Number& num = toNumC(nodep, numv);
-        UINFO(4, "UNICONST -> " << num << endl);
+        UINFO(4, "UNICONST -> " << num);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeBiop* nodep) {
         V3Number numv{nodep, nodep->widthMinV()};
         nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()));
         const V3Number& num = toNumC(nodep, numv);
-        UINFO(4, "BICONST -> " << num << endl);
+        UINFO(4, "BICONST -> " << num);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeTriop* nodep) {
@@ -1653,7 +1652,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()),
                              constNumV(nodep->thsp()));
         const V3Number& num = toNumC(nodep, numv);
-        UINFO(4, "TRICONST -> " << num << endl);
+        UINFO(4, "TRICONST -> " << num);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
     void replaceConst(AstNodeQuadop* nodep) {
@@ -1661,7 +1660,7 @@ class ConstVisitor final : public VNVisitor {
         nodep->numberOperate(numv, constNumV(nodep->lhsp()), constNumV(nodep->rhsp()),
                              constNumV(nodep->thsp()), constNumV(nodep->fhsp()));
         const V3Number& num = toNumC(nodep, numv);
-        UINFO(4, "QUADCONST -> " << num << endl);
+        UINFO(4, "QUADCONST -> " << num);
         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
     }
 
@@ -1835,8 +1834,7 @@ class ConstVisitor final : public VNVisitor {
                     "tried to merge two selects which are not adjacent");
         AstSel* const newselp = new AstSel{
             lselp->fromp()->fileline(), rselp->fromp()->unlinkFrBack(), rstart, lwidth + rwidth};
-        UINFO(5, "merged two adjacent sel " << lselp << " and " << rselp << " to one " << newselp
-                                            << endl);
+        UINFO(5, "merged two adjacent sel " << lselp << " and " << rselp << " to one " << newselp);
 
         nodep->replaceWithKeepDType(newselp);
         VL_DO_DANGLING(pushDeletep(lselp), lselp);
@@ -1862,7 +1860,7 @@ class ConstVisitor final : public VNVisitor {
             lrp->replaceWith(newrp);
             VL_DO_DANGLING(pushDeletep(lrp), lrp);
             lp->dtypeChgWidthSigned(newlp->width(), newlp->width(), VSigning::UNSIGNED);
-            UINFO(5, "merged " << nodep << endl);
+            UINFO(5, "merged " << nodep);
             VL_DO_DANGLING(pushDeletep(rp->unlinkFrBack()), rp);
             nodep->replaceWithKeepDType(lp->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -1884,7 +1882,7 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replacePowShift(AstNodeBiop* nodep) {  // Pow or PowS
-        UINFO(5, "POW(2,b)->SHIFTL(1,b) " << nodep << endl);
+        UINFO(5, "POW(2,b)->SHIFTL(1,b) " << nodep);
         AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
         AstShiftL* const newp
             = new AstShiftL{nodep->fileline(), new AstConst{nodep->fileline(), 1}, rhsp};
@@ -1893,7 +1891,7 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceMulShift(AstMul* nodep) {  // Mul, but not MulS as not simple shift
-        UINFO(5, "MUL(2^n,b)->SHIFTL(b,n) " << nodep << endl);
+        UINFO(5, "MUL(2^n,b)->SHIFTL(b,n) " << nodep);
         const int amount = VN_AS(nodep->lhsp(), Const)->num().mostSetBitP1() - 1;  // 2^n->n+1
         AstNodeExpr* const opp = nodep->rhsp()->unlinkFrBack();
         AstShiftL* const newp
@@ -1902,7 +1900,7 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceDivShift(AstDiv* nodep) {  // Mul, but not MulS as not simple shift
-        UINFO(5, "DIV(b,2^n)->SHIFTR(b,n) " << nodep << endl);
+        UINFO(5, "DIV(b,2^n)->SHIFTR(b,n) " << nodep);
         const int amount = VN_AS(nodep->rhsp(), Const)->num().mostSetBitP1() - 1;  // 2^n->n+1
         AstNodeExpr* const opp = nodep->lhsp()->unlinkFrBack();
         AstShiftR* const newp
@@ -1911,7 +1909,7 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceModAnd(AstModDiv* nodep) {  // Mod, but not ModS as not simple shift
-        UINFO(5, "MOD(b,2^n)->AND(b,2^n-1) " << nodep << endl);
+        UINFO(5, "MOD(b,2^n)->AND(b,2^n-1) " << nodep);
         const int amount = VN_AS(nodep->rhsp(), Const)->num().mostSetBitP1() - 1;  // 2^n->n+1
         V3Number mask{nodep, nodep->width()};
         mask.setMask(amount);
@@ -1922,7 +1920,7 @@ class ConstVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void replaceShiftOp(AstNodeBiop* nodep) {
-        UINFO(5, "SHIFT(AND(a,b),CONST)->AND(SHIFT(a,CONST),SHIFT(b,CONST)) " << nodep << endl);
+        UINFO(5, "SHIFT(AND(a,b),CONST)->AND(SHIFT(a,CONST),SHIFT(b,CONST)) " << nodep);
         const int width = nodep->width();
         const int widthMin = nodep->widthMin();
         VNRelinker handle;
@@ -1946,7 +1944,7 @@ class ConstVisitor final : public VNVisitor {
         iterate(newp);  // Further reduce, either node may have more reductions.
     }
     void replaceShiftShift(AstNodeBiop* nodep) {
-        UINFO(4, "SHIFT(SHIFT(a,s1),s2)->SHIFT(a,ADD(s1,s2)) " << nodep << endl);
+        UINFO(4, "SHIFT(SHIFT(a,s1),s2)->SHIFT(a,ADD(s1,s2)) " << nodep);
         if (debug() >= 9) nodep->dumpTree("-  repShiftShift_old: ");
         AstNodeBiop* const lhsp = VN_AS(nodep->lhsp(), NodeBiop);
         lhsp->unlinkFrBack();
@@ -2040,8 +2038,8 @@ class ConstVisitor final : public VNVisitor {
             return false;
         }
         const bool lsbFirstAssign = (con1p->toUInt() < con2p->toUInt());
-        UINFO(4, "replaceAssignMultiSel " << nodep << endl);
-        UINFO(4, "                   && " << nextp << endl);
+        UINFO(4, "replaceAssignMultiSel " << nodep);
+        UINFO(4, "                   && " << nextp);
         // if (debug()) nodep->dumpTree("-  comb1: ");
         // if (debug()) nextp->dumpTree("-  comb2: ");
         AstNodeExpr* const rhs1p = nodep->rhsp()->unlinkFrBack();
@@ -2110,7 +2108,7 @@ class ConstVisitor final : public VNVisitor {
             if (need_temp_pure) {
                 // if the RHS is impure we need to create a temporary variable for it, because
                 // further handling involves copying of the RHS.
-                UINFO(4, "  ASSITEMPPURE " << nodep << endl);
+                UINFO(4, "  ASSITEMPPURE " << nodep);
                 // ASSIGN(CONCAT(lc1,lc2),rhs) -> ASSIGN(temp,rhs),
                 //                                ASSIGN(lc1,SEL(temp,{size1})),
                 //                                ASSIGN(lc2,SEL(temp,{size2}))
@@ -2126,13 +2124,13 @@ class ConstVisitor final : public VNVisitor {
             } else if (need_temp) {
                 // The first time we constify, there may be the same variable on the LHS
                 // and RHS.  In that case, we must use temporaries, or {a,b}={b,a} will break.
-                UINFO(4, "  ASSITEMP " << nodep << endl);
+                UINFO(4, "  ASSITEMP " << nodep);
                 // ASSIGN(CONCAT(lc1,lc2),rhs) -> ASSIGN(temp1,SEL(rhs,{size})),
                 //                                ASSIGN(temp2,SEL(newrhs,{size}))
                 //                                ASSIGN(lc1,temp1),
                 //                                ASSIGN(lc2,temp2)
             } else {
-                UINFO(4, "  ASSI " << nodep << endl);
+                UINFO(4, "  ASSI " << nodep);
                 // ASSIGN(CONCAT(lc1,lc2),rhs) -> ASSIGN(lc1,SEL(rhs,{size})),
                 //                                ASSIGN(lc2,SEL(newrhs,{size}))
             }
@@ -2316,7 +2314,7 @@ class ConstVisitor final : public VNVisitor {
         if (!aboveBlockp) return false;
         if (aboveBlockp != nodep->labelp()->blockp()) return false;
         if (aboveBlockp->endStmtsp() != nodep->labelp()) return false;
-        UINFO(4, "JUMPGO => last remove " << nodep << endl);
+        UINFO(4, "JUMPGO => last remove " << nodep);
         VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
         return true;
     }
@@ -2372,7 +2370,7 @@ class ConstVisitor final : public VNVisitor {
             AstNode* const newp = valuep->cloneTree(false);
             newp->fileline(nodep->fileline());
             nodep->replaceWithKeepDType(newp);
-            UINFO(4, "Simulate->" << newp << endl);
+            UINFO(4, "Simulate->" << newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
@@ -2469,7 +2467,7 @@ class ConstVisitor final : public VNVisitor {
         AstRand* const bRandp = VN_CAST(nodep->rhsp(), Rand);
         if (!aRandp || !bRandp) return false;
         if (!aRandp->combinable(bRandp)) return false;
-        UINFO(4, "Concat(Rand,Rand) => Rand: " << nodep << endl);
+        UINFO(4, "Concat(Rand,Rand) => Rand: " << nodep);
         nodep->replaceWithKeepDType(aRandp->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
@@ -2479,7 +2477,7 @@ class ConstVisitor final : public VNVisitor {
         AstRand* const aRandp = VN_CAST(nodep->fromp(), Rand);
         if (!aRandp) return false;
         if (aRandp->seedp()) return false;
-        UINFO(4, "Sel(Rand) => Rand: " << nodep << endl);
+        UINFO(4, "Sel(Rand) => Rand: " << nodep);
         nodep->replaceWithKeepDType(aRandp->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
@@ -2508,7 +2506,7 @@ class ConstVisitor final : public VNVisitor {
         // putting additional CONCATs on the RHS leads to fewer assembler operations.
         // However, we'll end up with lots of wide moves if we make huge trees
         // like that, so on 32 bit boundaries, we'll do the opposite form.
-        UINFO(4, "Move concat: " << nodep << endl);
+        UINFO(4, "Move concat: " << nodep);
         if (operandConcatMove(nodep) > 1) {
             AstNodeExpr* const ap = nodep->lhsp()->unlinkFrBack();
             AstConcat* const bcConcp = VN_AS(nodep->rhsp(), Concat);
@@ -2572,7 +2570,7 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const lsb1p = nodep->lsbp()->unlinkFrBack();
         AstNodeExpr* const lsb2p = belowp->lsbp()->unlinkFrBack();
         // Eliminate lower range
-        UINFO(4, "Elim Lower range: " << nodep << endl);
+        UINFO(4, "Elim Lower range: " << nodep);
         AstNodeExpr* newlsbp;
         if (VN_IS(lsb1p, Const) && VN_IS(lsb2p, Const)) {
             newlsbp = new AstConst{lsb1p->fileline(),
@@ -2787,7 +2785,7 @@ class ConstVisitor final : public VNVisitor {
                     || nodep->varp()->isParam())) {
                 if (operandConst(valuep)) {
                     const V3Number& num = VN_AS(valuep, Const)->num();
-                    // UINFO(2,"constVisit "<<cvtToHex(valuep)<<" "<<num<<endl);
+                    // UINFO(2, "constVisit " << cvtToHex(valuep) << " " << num);
                     VL_DO_DANGLING(replaceNum(nodep, num), nodep);
                     did = true;
                 } else if (m_selp && VN_IS(valuep, InitArray)) {
@@ -2796,7 +2794,7 @@ class ConstVisitor final : public VNVisitor {
                     AstNode* const itemp = initarp->getIndexDefaultedValuep(bit);
                     if (VN_IS(itemp, Const)) {
                         const V3Number& num = VN_AS(itemp, Const)->num();
-                        // UINFO(2,"constVisit "<<cvtToHex(valuep)<<" "<<num<<endl);
+                        // UINFO(2, "constVisit " << cvtToHex(valuep) << " " << num);
                         VL_DO_DANGLING(replaceNum(nodep, num), nodep);
                         did = true;
                     }
@@ -2825,7 +2823,7 @@ class ConstVisitor final : public VNVisitor {
     void visit(AstExprStmt* nodep) override {
         iterateChildren(nodep);
         if (!AstNode::afterCommentp(nodep->stmtsp())) {
-            UINFO(8, "ExprStmt(...) " << nodep << " " << nodep->resultp() << endl);
+            UINFO(8, "ExprStmt(...) " << nodep << " " << nodep->resultp());
             nodep->replaceWith(nodep->resultp()->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             // Removing the ExprStmt might have made something impure above now pure
@@ -2899,7 +2897,7 @@ class ConstVisitor final : public VNVisitor {
                 lastSensp = VN_AS(lastSensp, Not)->lhsp();
                 invert = !invert;
             }
-            UINFO(8, "senItem(NOT...) " << nodep << " " << invert << endl);
+            UINFO(8, "senItem(NOT...) " << nodep << " " << invert);
             if (invert) nodep->edgeType(nodep->edgeType().invert());
             sensp->replaceWith(lastSensp->unlinkFrBack());
             VL_DO_DANGLING(pushDeletep(sensp), sensp);
@@ -3097,7 +3095,7 @@ class ConstVisitor final : public VNVisitor {
             && !varrefp->varp()->isForced()  // Not forced (not really a constant)
         ) {
             // ASSIGNW (VARREF, const) -> INITIAL ( ASSIGN (VARREF, const) )
-            UINFO(4, "constAssignW " << nodep << endl);
+            UINFO(4, "constAssignW " << nodep);
             // Make a initial assignment
             AstNodeExpr* const exprp = nodep->rhsp()->unlinkFrBack();
             varrefp->unlinkFrBack();
@@ -3129,13 +3127,13 @@ class ConstVisitor final : public VNVisitor {
             if (const AstConst* const constp = VN_CAST(nodep->condp(), Const)) {
                 AstNode* keepp = nullptr;
                 if (constp->isZero()) {
-                    UINFO(4, "IF(0,{any},{x}) => {x}: " << nodep << endl);
+                    UINFO(4, "IF(0,{any},{x}) => {x}: " << nodep);
                     keepp = nodep->elsesp();
                 } else if (!m_doV || constp->isNeqZero()) {  // Might be X in Verilog
-                    UINFO(4, "IF(!0,{x},{any}) => {x}: " << nodep << endl);
+                    UINFO(4, "IF(!0,{x},{any}) => {x}: " << nodep);
                     keepp = nodep->thensp();
                 } else {
-                    UINFO(4, "IF condition is X, retaining: " << nodep << endl);
+                    UINFO(4, "IF condition is X, retaining: " << nodep);
                     return;
                 }
                 if (keepp) {
@@ -3155,7 +3153,7 @@ class ConstVisitor final : public VNVisitor {
                     VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 }
             } else if (!AstNode::afterCommentp(nodep->thensp())) {
-                UINFO(4, "IF({x}) nullptr {...} => IF(NOT{x}}: " << nodep << endl);
+                UINFO(4, "IF({x}) nullptr {...} => IF(NOT{x}}: " << nodep);
                 AstNodeExpr* const condp = nodep->condp();
                 AstNode* const elsesp = nodep->elsesp();
                 condp->unlinkFrBackWithNext();
@@ -3169,7 +3167,7 @@ class ConstVisitor final : public VNVisitor {
             } else if (((VN_IS(nodep->condp(), Not) && nodep->condp()->width() == 1)
                         || VN_IS(nodep->condp(), LogNot))
                        && nodep->thensp() && nodep->elsesp()) {
-                UINFO(4, "IF(NOT {x})  => IF(x) swapped if/else" << nodep << endl);
+                UINFO(4, "IF(NOT {x})  => IF(x) swapped if/else" << nodep);
                 AstNodeExpr* const condp
                     = VN_AS(nodep->condp(), NodeUniop)->lhsp()->unlinkFrBackWithNext();
                 AstNode* const thensp = nodep->thensp()->unlinkFrBackWithNext();
@@ -3180,9 +3178,8 @@ class ConstVisitor final : public VNVisitor {
                 nodep->replaceWith(ifp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (ifSameAssign(nodep)) {
-                UINFO(
-                    4,
-                    "IF({a}) ASSIGN({b},{c}) else ASSIGN({b},{d}) => ASSIGN({b}, {a}?{c}:{d})\n");
+                UINFO(4,
+                      "IF({a}) ASSIGN({b},{c}) else ASSIGN({b},{d}) => ASSIGN({b}, {a}?{c}:{d})");
                 AstNodeAssign* const thensp = VN_AS(nodep->thensp(), NodeAssign);
                 AstNodeAssign* const elsesp = VN_AS(nodep->elsesp(), NodeAssign);
                 thensp->unlinkFrBack();
@@ -3195,7 +3192,7 @@ class ConstVisitor final : public VNVisitor {
             } else if (false  // Disabled, as vpm assertions are faster
                               // without due to short-circuiting
                        && operandIfIf(nodep)) {
-                UINFO(9, "IF({a}) IF({b}) => IF({a} && {b})" << endl);
+                UINFO(9, "IF({a}) IF({b}) => IF({a} && {b})");
                 AstNodeIf* const lowerIfp = VN_AS(nodep->thensp(), NodeIf);
                 AstNodeExpr* const condp = nodep->condp()->unlinkFrBack();
                 AstNode* const lowerThensp = lowerIfp->thensp()->unlinkFrBackWithNext();
@@ -3249,7 +3246,7 @@ class ConstVisitor final : public VNVisitor {
         if (pformatp->text().length() + nformatp->text().length() > DISPLAY_MAX_MERGE_LENGTH)
             return false;
         //
-        UINFO(9, "DISPLAY(SF({a})) DISPLAY(SF({b})) -> DISPLAY(SF({a}+{b}))" << endl);
+        UINFO(9, "DISPLAY(SF({a})) DISPLAY(SF({b})) -> DISPLAY(SF({a}+{b}))");
         // Convert DT_DISPLAY to DT_WRITE as may allow later optimizations
         if (prevp->displayType() == VDisplayType::DT_DISPLAY) {
             prevp->displayType(VDisplayType::DT_WRITE);
@@ -3281,7 +3278,7 @@ class ConstVisitor final : public VNVisitor {
             }
         }
         if (m_doNConst && anyconst) {
-            // UINFO(9, "  Display in  " << nodep->text() << endl);
+            // UINFO(9, "  Display in  " << nodep->text());
             string newFormat;
             string fmt;
             bool inPct = false;
@@ -3310,7 +3307,7 @@ class ConstVisitor final : public VNVisitor {
                             if (VN_IS(argp, Const)) {  // Convert it
                                 const string out = constNumV(argp).displayed(nodep, fmt);
                                 UINFO(9, "     DispConst: " << fmt << " -> " << out << "  for "
-                                                            << argp << endl);
+                                                            << argp);
                                 // fmt = out w/ replace % with %% as it must be literal.
                                 fmt = VString::quotePercent(out);
                                 VL_DO_DANGLING(pushDeletep(argp->unlinkFrBack()), argp);
@@ -3326,7 +3323,7 @@ class ConstVisitor final : public VNVisitor {
             }
             if (newFormat != nodep->text()) {
                 nodep->text(newFormat);
-                UINFO(9, "  Display out " << nodep << endl);
+                UINFO(9, "  Display out " << nodep);
             }
         }
         if (!nodep->exprsp() && nodep->name().find('%') == string::npos && !nodep->hidden()) {
@@ -3367,7 +3364,7 @@ class ConstVisitor final : public VNVisitor {
         m_hasJumpDelay = thisWhileHasJumpDelay || oldHasJumpDelay;
         if (m_doNConst) {
             if (nodep->condp()->isZero()) {
-                UINFO(4, "WHILE(0) => nop " << nodep << endl);
+                UINFO(4, "WHILE(0) => nop " << nodep);
                 if (nodep->precondsp()) {
                     nodep->replaceWith(nodep->precondsp());
                 } else {
@@ -3459,7 +3456,7 @@ class ConstVisitor final : public VNVisitor {
         iterateChildren(nodep);
         // AstJumpGo's below here that point to this node will set user4
         if (m_doExpensive && !nodep->user4()) {
-            UINFO(4, "JUMPLABEL => unused " << nodep << endl);
+            UINFO(4, "JUMPLABEL => unused " << nodep);
             AstNode* underp = nullptr;
             if (nodep->stmtsp()) underp = nodep->stmtsp()->unlinkFrBackWithNext();
             if (underp) {
@@ -3963,7 +3960,7 @@ AstNode* V3Const::constifyGenerateParamsEdit(AstNode* nodep) {
 
 void V3Const::constifyAllLint(AstNetlist* nodep) {
     // Only call from Verilator.cpp, as it uses user#'s
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         ConstVisitor visitor{ConstVisitor::PROC_V_WARN, /* globalPass: */ true};
         (void)visitor.mainAcceptEdit(nodep);
@@ -3972,7 +3969,7 @@ void V3Const::constifyAllLint(AstNetlist* nodep) {
 }
 
 void V3Const::constifyCpp(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         ConstVisitor visitor{ConstVisitor::PROC_CPP, /* globalPass: */ true};
         (void)visitor.mainAcceptEdit(nodep);
@@ -3996,7 +3993,7 @@ void V3Const::constifyAllLive(AstNetlist* nodep) {
     // Only call from Verilator.cpp, as it uses user#'s
     // This only pushes constants up, doesn't make any other edits
     // IE doesn't prune dead statements, as we need to do some usability checks after this
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         ConstVisitor visitor{ConstVisitor::PROC_LIVE, /* globalPass: */ true};
         (void)visitor.mainAcceptEdit(nodep);
@@ -4006,7 +4003,7 @@ void V3Const::constifyAllLive(AstNetlist* nodep) {
 
 void V3Const::constifyAll(AstNetlist* nodep) {
     // Only call from Verilator.cpp, as it uses user#'s
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         ConstVisitor visitor{ConstVisitor::PROC_V_EXPENSIVE, /* globalPass: */ true};
         (void)visitor.mainAcceptEdit(nodep);
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 6e22199b4..0ae403193 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -183,7 +183,7 @@ class CoverageVisitor final : public VNVisitor {
         AstCoverDecl* const declp = new AstCoverDecl{fl, page, comment, linescov, offset};
         declp->hier(hier);
         m_modp->addStmtsp(declp);
-        UINFO(9, "new " << declp << endl);
+        UINFO(9, "new " << declp);
 
         AstCoverInc* const incp = new AstCoverInc{fl, declp};
         if (!trace_var_name.empty()
@@ -197,7 +197,7 @@ class CoverageVisitor final : public VNVisitor {
             varp->setIgnoreSchedWrite();  // Ignore the increment output, so no UNOPTFLAT
             varp->trace(true);
             m_modp->addStmtsp(varp);
-            UINFO(5, "New coverage trace: " << varp << endl);
+            UINFO(5, "New coverage trace: " << varp);
             AstAssign* const assp = new AstAssign{
                 incp->fileline(), new AstVarRef{incp->fileline(), varp, VAccess::WRITE},
                 new AstAdd{incp->fileline(), new AstVarRef{incp->fileline(), varp, VAccess::READ},
@@ -223,7 +223,7 @@ class CoverageVisitor final : public VNVisitor {
         // Ensure line numbers we track are in the same file as this block
         // so track via nodep
         m_state.m_nodep = nodep;
-        UINFO(9, "line create h" << m_state.m_handle << " " << nodep << endl);
+        UINFO(9, "line create h" << m_state.m_handle << " " << nodep);
     }
     void lineTrack(const AstNode* nodep) {
         if (m_state.lineCoverageOn(nodep) && !m_ifCond
@@ -231,7 +231,7 @@ class CoverageVisitor final : public VNVisitor {
             for (int lineno = nodep->fileline()->firstLineno();
                  lineno <= nodep->fileline()->lastLineno(); ++lineno) {
                 UINFO(9, "line track " << lineno << " for h" << m_state.m_handle << " "
-                                       << m_state.m_nodep << endl);
+                                       << m_state.m_nodep);
                 m_handleLines[m_state.m_handle].insert(lineno);
             }
         }
@@ -266,7 +266,7 @@ class CoverageVisitor final : public VNVisitor {
             if (!out.empty()) out += ",";
             out += linesFirstLast(first, last);
         }
-        UINFO(9, "lines out " << out << " for h" << state.m_handle << " " << nodep << endl);
+        UINFO(9, "lines out " << out << " for h" << state.m_handle << " " << nodep);
         return out;
     }
 
@@ -358,9 +358,9 @@ class CoverageVisitor final : public VNVisitor {
             && v3Global.opt.coverageToggle()) {
             const char* const disablep = varIgnoreToggle(nodep);
             if (disablep) {
-                UINFO(4, "    Disable Toggle: " << disablep << " " << nodep << endl);
+                UINFO(4, "    Disable Toggle: " << disablep << " " << nodep);
             } else {
-                UINFO(4, "    Toggle: " << nodep << endl);
+                UINFO(4, "    Toggle: " << nodep);
                 // There's several overall ways to approach this
                 //    Treat like tracing, where a end-of-timestamp action sees all changes
                 //      Works ok, but would be quite slow as need to reform
@@ -519,7 +519,7 @@ class CoverageVisitor final : public VNVisitor {
 
     // VISITORS - LINE COVERAGE
     void visit(AstCond* nodep) override {
-        UINFO(4, " COND: " << nodep << endl);
+        UINFO(4, " COND: " << nodep);
 
         if (m_seeking == NONE) coverExprs(nodep->condp());
 
@@ -558,7 +558,7 @@ class CoverageVisitor final : public VNVisitor {
     void visit(AstIf* nodep) override {
         if (nodep->user2()) return;
 
-        UINFO(4, " IF: " << nodep << endl);
+        UINFO(4, " IF: " << nodep);
         if (m_state.m_on) {
             // An else-if.  When we iterate the if, use "elsif" marking
             const bool elsif
@@ -603,7 +603,7 @@ class CoverageVisitor final : public VNVisitor {
                 && elseState.lineCoverageOn(nodep)) {
                 // Normal if. Linecov shows what's inside the if (not condition that is
                 // always executed)
-                UINFO(4, "   COVER-branch: " << nodep << endl);
+                UINFO(4, "   COVER-branch: " << nodep);
                 nodep->addThensp(newCoverInc(nodep->fileline(), "", "v_branch", "if",
                                              linesCov(ifState, nodep), 0,
                                              traceNameForLine(nodep, "if")));
@@ -616,7 +616,7 @@ class CoverageVisitor final : public VNVisitor {
             }
             // If/else attributes to each block as non-branch coverage
             else if (first_elsif || cont_elsif) {
-                UINFO(4, "   COVER-elsif: " << nodep << endl);
+                UINFO(4, "   COVER-elsif: " << nodep);
                 if (ifState.lineCoverageOn(nodep)) {
                     nodep->addThensp(newCoverInc(nodep->fileline(), "", "v_line", "elsif",
                                                  linesCov(ifState, nodep), 0,
@@ -626,13 +626,13 @@ class CoverageVisitor final : public VNVisitor {
             } else {
                 // Cover as separate blocks (not a branch as is not two-legged)
                 if (ifState.lineCoverageOn(nodep)) {
-                    UINFO(4, "   COVER-half-if: " << nodep << endl);
+                    UINFO(4, "   COVER-half-if: " << nodep);
                     nodep->addThensp(newCoverInc(nodep->fileline(), "", "v_line", "if",
                                                  linesCov(ifState, nodep), 0,
                                                  traceNameForLine(nodep, "if")));
                 }
                 if (elseState.lineCoverageOn(nodep)) {
-                    UINFO(4, "   COVER-half-el: " << nodep << endl);
+                    UINFO(4, "   COVER-half-el: " << nodep);
                     nodep->addElsesp(newCoverInc(nodep->fileline(), "", "v_line", "else",
                                                  linesCov(elseState, nodep), 1,
                                                  traceNameForLine(nodep, "else")));
@@ -643,19 +643,19 @@ class CoverageVisitor final : public VNVisitor {
         VL_RESTORER(m_ifCond);
         m_ifCond = true;
         iterateAndNextNull(nodep->condp());
-        UINFO(9, " done HANDLE " << m_state.m_handle << " for " << nodep << endl);
+        UINFO(9, " done HANDLE " << m_state.m_handle << " for " << nodep);
     }
     void visit(AstCaseItem* nodep) override {
         // We don't add an explicit "default" coverage if not provided,
         // as we already have a warning when there is no default.
-        UINFO(4, " CASEI: " << nodep << endl);
+        UINFO(4, " CASEI: " << nodep);
         if (m_state.lineCoverageOn(nodep)) {
             VL_RESTORER(m_state);
             createHandle(nodep);
             iterateAndNextNull(nodep->stmtsp());
             if (m_state.lineCoverageOn(nodep)) {  // if the case body didn't disable it
                 lineTrack(nodep);
-                UINFO(4, "   COVER: " << nodep << endl);
+                UINFO(4, "   COVER: " << nodep);
                 nodep->addStmtsp(newCoverInc(nodep->fileline(), "", "v_line", "case",
                                              linesCov(m_state, nodep), 0,
                                              traceNameForLine(nodep, "case")));
@@ -663,7 +663,7 @@ class CoverageVisitor final : public VNVisitor {
         }
     }
     void visit(AstCover* nodep) override {
-        UINFO(4, " COVER: " << nodep << endl);
+        UINFO(4, " COVER: " << nodep);
         VL_RESTORER(m_state);
         m_state.m_on = true;  // Always do cover blocks, even if there's a $stop
         createHandle(nodep);
@@ -677,13 +677,13 @@ class CoverageVisitor final : public VNVisitor {
         }
     }
     void visit(AstStop* nodep) override {
-        UINFO(4, "  STOP: " << nodep << endl);
+        UINFO(4, "  STOP: " << nodep);
         m_state.m_on = false;
     }
     void visit(AstPragma* nodep) override {
         if (nodep->pragType() == VPragmaType::COVERAGE_BLOCK_OFF) {
             // Skip all NEXT nodes under this block, and skip this if/case branch
-            UINFO(4, "  OFF: h" << m_state.m_handle << " " << nodep << endl);
+            UINFO(4, "  OFF: h" << m_state.m_handle << " " << nodep);
             m_state.m_on = false;
             VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
         } else {
@@ -1009,7 +1009,7 @@ class CoverageVisitor final : public VNVisitor {
     }
 
     void exprUnsupported(AstNode* nodep, const string& why) {
-        UINFO(9, "unsupported: " << why << " " << nodep << endl);
+        UINFO(9, "unsupported: " << why << " " << nodep);
         bool wasSeeking = m_seeking == SEEKING;
         Objective oldSeeking = m_seeking;
         if (wasSeeking) abortExprCoverage();
@@ -1029,7 +1029,7 @@ public:
 // Coverage class functions
 
 void V3Coverage::coverage(AstNetlist* rootp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { CoverageVisitor{rootp}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("coverage", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp
index 86fa0ea6a..bcdf767cb 100644
--- a/src/V3CoverageJoin.cpp
+++ b/src/V3CoverageJoin.cpp
@@ -44,7 +44,7 @@ class CoverageJoinVisitor final : public VNVisitor {
     // METHODS
 
     void detectDuplicates() {
-        UINFO(9, "Finding duplicates\n");
+        UINFO(9, "Finding duplicates");
         // Note uses user4
         V3DupFinder dupFinder;  // Duplicate code detection
         // Hash all of the original signals we toggle cover
@@ -70,14 +70,14 @@ class CoverageJoinVisitor final : public VNVisitor {
                 // covertoggle which is immediately above, so:
                 AstCoverToggle* const removep = VN_AS(duporigp->backp(), CoverToggle);
                 UASSERT_OBJ(removep, nodep, "CoverageJoin duplicate of wrong type");
-                UINFO(8, "  Orig " << nodep << " -->> " << nodep->incp()->declp() << endl);
-                UINFO(8, "   dup " << removep << " -->> " << removep->incp()->declp() << endl);
+                UINFO(8, "  Orig " << nodep << " -->> " << nodep->incp()->declp());
+                UINFO(8, "   dup " << removep << " -->> " << removep->incp()->declp());
                 // The CoverDecl the duplicate pointed to now needs to point to the
                 // original's data. I.e. the duplicate will get the coverage number
                 // from the non-duplicate
                 AstCoverDecl* const datadeclp = nodep->incp()->declp()->dataDeclThisp();
                 removep->incp()->declp()->dataDeclp(datadeclp);
-                UINFO(8, "   new " << removep->incp()->declp() << endl);
+                UINFO(8, "   new " << removep->incp()->declp());
                 // Mark the found node as a duplicate of the first node
                 // (Not vice-versa as we have the iterator for the found node)
                 removep->unlinkFrBack();
@@ -115,7 +115,7 @@ public:
 // Coverage class functions
 
 void V3CoverageJoin::coverageJoin(AstNetlist* rootp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { CoverageJoinVisitor{rootp}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("coveragejoin", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp
index fedf41048..8cbf22db3 100644
--- a/src/V3Dead.cpp
+++ b/src/V3Dead.cpp
@@ -81,7 +81,7 @@ class DeadVisitor final : public VNVisitor {
     // METHODS
 
     void deleting(AstNode* nodep) {
-        UINFO(9, "  deleting " << nodep << endl);
+        UINFO(9, "  deleting " << nodep);
         VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
 
@@ -353,7 +353,7 @@ class DeadVisitor final : public VNVisitor {
                 if (modp->dead()
                     || (modp->level() > 2 && modp->user1() == 0 && !modp->internal())) {
                     // > 2 because L1 is the wrapper, L2 is the top user module
-                    UINFO(4, "  Dead module " << modp << endl);
+                    UINFO(4, "  Dead module " << modp);
                     // And its children may now be killable too; correct counts
                     // Recurse, as cells may not be directly under the module but in a generate
                     if (!modp->dead()) {  // If was dead didn't increment user1's
@@ -382,7 +382,7 @@ class DeadVisitor final : public VNVisitor {
                 AstScope* const scp = *it;
                 if (!scp) continue;
                 if (scp->user1() == 0) {
-                    UINFO(4, "  Dead AstScope " << scp << endl);
+                    UINFO(4, "  Dead AstScope " << scp);
                     scp->aboveScopep()->user1Inc(-1);
                     if (scp->dtypep()) scp->dtypep()->user1Inc(-1);
                     deleting(scp);
@@ -422,12 +422,12 @@ class DeadVisitor final : public VNVisitor {
         // Delete any unused varscopes
         for (AstVarScope* vscp : m_vscsp) {
             if (vscp->user1() == 0) {
-                UINFO(4, "  Dead " << vscp << endl);
+                UINFO(4, "  Dead " << vscp);
                 const std::pair<AssignMap::iterator, AssignMap::iterator> eqrange
                     = m_assignMap.equal_range(vscp);
                 for (AssignMap::iterator itr = eqrange.first; itr != eqrange.second; ++itr) {
                     AstNodeAssign* const assp = itr->second;
-                    UINFO(4, "    Dead assign " << assp << endl);
+                    UINFO(4, "    Dead assign " << assp);
                     assp->dtypep()->user1Inc(-1);
                     deleting(assp);
                 }
@@ -442,7 +442,7 @@ class DeadVisitor final : public VNVisitor {
                 AstVar* const varp = *it;
                 if (!varp) continue;
                 if (varp->user1() == 0) {
-                    UINFO(4, "  Dead " << varp << endl);
+                    UINFO(4, "  Dead " << varp);
                     if (varp->dtypep()) varp->dtypep()->user1Inc(-1);
                     deleting(varp);
                     *it = nullptr;
@@ -553,7 +553,7 @@ public:
 // Dead class functions
 
 void V3Dead::deadifyModules(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {  // node, elimUserVars, elimDTypes, elimScopes, elimCells, elimTopIfaces
         DeadVisitor{nodep, false, false, false, false, !v3Global.opt.topIfacesSupported()};
     }  // Destruct before checking
@@ -561,25 +561,25 @@ void V3Dead::deadifyModules(AstNetlist* nodep) {
 }
 
 void V3Dead::deadifyDTypes(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DeadVisitor{nodep, false, true, false, false, false}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("deadDtypes", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3Dead::deadifyDTypesScoped(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DeadVisitor{nodep, false, true, true, false, false}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("deadDtypesScoped", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3Dead::deadifyAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DeadVisitor{nodep, true, true, false, true, false}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("deadAll", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3Dead::deadifyAllScoped(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DeadVisitor{nodep, true, true, true, true, false}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("deadAllScoped", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index ed57f85fe..56bef3a3d 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -1067,7 +1067,7 @@ public:
 // Delayed class functions
 
 void V3Delayed::delayedAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DelayedVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("delayed", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp
index 4d7803fef..96994fe66 100644
--- a/src/V3Depth.cpp
+++ b/src/V3Depth.cpp
@@ -47,7 +47,7 @@ class DepthVisitor final : public VNVisitor {
     // METHODS
 
     void createDeepTemp(AstNodeExpr* nodep) {
-        UINFO(6, "  Deep  " << nodep << endl);
+        UINFO(6, "  Deep  " << nodep);
         // if (debug() >= 9) nodep->dumpTree("-  deep: ");
         AstVar* const varp = new AstVar{nodep->fileline(), VVarType::STMTTEMP,
                                         m_tempNames.get(nodep), nodep->dtypep()};
@@ -127,7 +127,7 @@ class DepthVisitor final : public VNVisitor {
     void needNonStaticFunc(AstNode* nodep) {
         UASSERT_OBJ(m_cfuncp, nodep, "Non-static accessor not under a function");
         if (m_cfuncp->isStatic()) {
-            UINFO(5, "Mark non-public due to " << nodep << endl);
+            UINFO(5, "Mark non-public due to " << nodep);
             m_cfuncp->isStatic(false);
         }
     }
@@ -158,7 +158,7 @@ public:
 // Depth class functions
 
 void V3Depth::depthAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DepthVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("depth", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp
index 8c31fc7df..f4f54ee8c 100644
--- a/src/V3DepthBlock.cpp
+++ b/src/V3DepthBlock.cpp
@@ -60,7 +60,7 @@ class DepthBlockVisitor final : public VNVisitor {
             funcp->argTypes(EmitCBase::symClassVar());
             callp->argTypes("vlSymsp");
         }
-        UINFO(6, "      New " << callp << endl);
+        UINFO(6, "      New " << callp);
         relinkHandle.relink(callp->makeStmt());
         // Done
         return funcp;
@@ -68,7 +68,7 @@ class DepthBlockVisitor final : public VNVisitor {
 
     // VISITORS
     void visit(AstNodeModule* nodep) override {
-        UINFO(4, " MOD   " << nodep << endl);
+        UINFO(4, " MOD   " << nodep);
         VL_RESTORER(m_modp);
         m_modp = nodep;
         m_deepNum = 0;
@@ -87,7 +87,7 @@ class DepthBlockVisitor final : public VNVisitor {
     void visit(AstNodeStmt* nodep) override {
         ++m_depth;
         if (m_depth > v3Global.opt.compLimitBlocks()) {  // Already done
-            UINFO(4, "DeepBlocks " << m_depth << " " << nodep << endl);
+            UINFO(4, "DeepBlocks " << m_depth << " " << nodep);
             const AstNode* const backp = nodep->backp();  // Only for debug
             if (debug() >= 9) backp->dumpTree("-   pre : ");
             AstCFunc* const funcp = createDeepFunc(nodep);
@@ -115,7 +115,7 @@ public:
 // DepthBlock class functions
 
 void V3DepthBlock::depthBlockAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DepthBlockVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("deepblock", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp
index aa861f690..0545551ae 100644
--- a/src/V3Descope.cpp
+++ b/src/V3Descope.cpp
@@ -97,9 +97,9 @@ class DescopeVisitor final : public VNVisitor {
         // Static functions can't use relative references via 'this->'
         const bool relativeRefOk = !m_funcp->isStatic();
 
-        UINFO(8, "      Descope ref under " << m_scopep << endl);
-        UINFO(8, "              ref to    " << scopep << endl);
-        UINFO(8, "             aboveScope " << scopep->aboveScopep() << endl);
+        UINFO(8, "      Descope ref under " << m_scopep);
+        UINFO(8, "              ref to    " << scopep);
+        UINFO(8, "             aboveScope " << scopep->aboveScopep());
 
         if (VN_IS(scopep->modp(), Class)) {
             // Direct reference to class members are from within the class itself, references from
@@ -133,7 +133,7 @@ class DescopeVisitor final : public VNVisitor {
             const bool moreOfSame1 = (nextIt1 != m_modFuncs.end() && nextIt1->first == name);
             if (moreOfSame1) {
                 // Multiple functions under this name, need a wrapper function
-                UINFO(6, "  Wrapping " << name << " multifuncs\n");
+                UINFO(6, "  Wrapping " << name << " multifuncs");
                 AstCFunc* const newfuncp = topFuncp->cloneTree(false);
                 if (newfuncp->initsp()) newfuncp->initsp()->unlinkFrBackWithNext()->deleteTree();
                 if (newfuncp->stmtsp()) newfuncp->stmtsp()->unlinkFrBackWithNext()->deleteTree();
@@ -152,9 +152,8 @@ class DescopeVisitor final : public VNVisitor {
                         = (nextIt2 != m_modFuncs.end() && nextIt2->first == name);
                     UASSERT_OBJ(funcp->scopep(), funcp, "Not scoped");
 
-                    UINFO(6, "     Wrapping " << name << " " << funcp << endl);
-                    UINFO(6,
-                          "  at " << newfuncp->argTypes() << " und " << funcp->argTypes() << endl);
+                    UINFO(6, "     Wrapping " << name << " " << funcp);
+                    UINFO(6, "  at " << newfuncp->argTypes() << " und " << funcp->argTypes());
                     funcp->declPrivate(true);
                     AstVarRef* argsp = nullptr;
                     for (AstNode* stmtp = newfuncp->argsp(); stmtp; stmtp = stmtp->nextp()) {
@@ -199,7 +198,7 @@ class DescopeVisitor final : public VNVisitor {
                 if (debug() >= 9) newfuncp->dumpTree("-  newfunc: ");
             } else {
                 // Only a single function under this name, we can rename it
-                UINFO(6, "  Wrapping " << name << " just one " << topFuncp << endl);
+                UINFO(6, "  Wrapping " << name << " just one " << topFuncp);
                 topFuncp->name(name);
             }
         }
@@ -231,7 +230,7 @@ class DescopeVisitor final : public VNVisitor {
             return;
         }
         // Convert the hierch name
-        UINFO(9, "  ref-in " << nodep << endl);
+        UINFO(9, "  ref-in " << nodep);
         UASSERT_OBJ(m_scopep, nodep, "Node not under scope");
         const AstVar* const varp = nodep->varScopep()->varp();
         const AstScope* const scopep = nodep->varScopep()->scopep();
@@ -245,10 +244,10 @@ class DescopeVisitor final : public VNVisitor {
             nodep->selfPointer(descopedSelfPointer(scopep));
         }
         nodep->varScopep(nullptr);
-        UINFO(9, "  refout " << nodep << " selfPtr=" << nodep->selfPointer().asString() << endl);
+        UINFO(9, "  refout " << nodep << " selfPtr=" << nodep->selfPointer().asString());
     }
     void visit(AstCCall* nodep) override {
-        // UINFO(9, "       " << nodep << endl);
+        // UINFO(9, "       " << nodep);
         iterateChildren(nodep);
         // Convert the hierch name
         UASSERT_OBJ(m_scopep, nodep, "Node not under scope");
@@ -295,7 +294,7 @@ public:
 // Descope class functions
 
 void V3Descope::descopeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DescopeVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("descope", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index 32aba69d2..cf3a2393e 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -230,14 +230,14 @@ public:
 };
 
 void V3DfgOptimizer::extract(AstNetlist* netlistp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // Extract more optimization candidates
     DataflowExtractVisitor::apply(netlistp);
     V3Global::dumpCheckGlobalTree("dfg-extract", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3DfgOptimizer::optimize(AstNetlist* netlistp, const string& label) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     // NODE STATE
     // AstVar::user1 -> Used by V3DfgPasses::astToDfg, V3DfgPasses::eliminateVars
@@ -258,7 +258,7 @@ void V3DfgOptimizer::optimize(AstNetlist* netlistp, const string& label) {
         AstModule* const modp = VN_CAST(nodep, Module);
         if (!modp) continue;
 
-        UINFO(4, "Applying DFG optimization to module '" << modp->name() << "'" << endl);
+        UINFO(4, "Applying DFG optimization to module '" << modp->name() << "'");
         ++ctx.m_modules;
 
         // Build the DFG of this module
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index b88c726b3..f297d45bd 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -152,7 +152,7 @@ class V3DfgPeephole final : public DfgVisitor {
     // METHODS
     bool checkApplying(VDfgPeepholePattern id) {
         if (!m_ctx.m_enabled[id]) return false;
-        UINFO(9, "Applying DFG pattern " << id.ascii() << endl);
+        UINFO(9, "Applying DFG pattern " << id.ascii());
         ++m_ctx.m_count[id];
         return true;
     }
diff --git a/src/V3DiagSarif.cpp b/src/V3DiagSarif.cpp
index a7c4b5041..e8008725d 100644
--- a/src/V3DiagSarif.cpp
+++ b/src/V3DiagSarif.cpp
@@ -85,7 +85,7 @@ class V3DiagSarifImp final {
                                                               : "warning");
 
         string text = msg.text();
-        // UINFO(9, "Result raw text " << text << endl << endl);
+        // UINFO(9, "Result raw text " << text);
 
         // We put the entire message including relatedLocations text
         // into the primary message text, because viewers such as
@@ -190,6 +190,6 @@ void V3DiagSarif::pushMessage(const VErrorMessage& msg) VL_MT_DISABLED {
 
 void V3DiagSarif::output(bool success) {
     if (!v3Global.opt.diagnosticsSarif()) return;
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     V3DiagSarifImp::s().output(success);
 }
diff --git a/src/V3DupFinder.cpp b/src/V3DupFinder.cpp
index 409caa96c..33e7edae4 100644
--- a/src/V3DupFinder.cpp
+++ b/src/V3DupFinder.cpp
@@ -53,7 +53,7 @@ V3DupFinder::iterator V3DupFinder::findDuplicate(AstNode* nodep, V3DupFinderUser
 }
 
 void V3DupFinder::dumpFile(const string& filename, bool tree) {
-    UINFO(2, "Dumping " << filename << endl);
+    UINFO(2, "Dumping " << filename);
     const std::unique_ptr<std::ofstream> logp{V3File::new_ofstream(filename)};
     if (logp->fail()) v3fatal("Can't write file: " << filename);
 
diff --git a/src/V3EmitCConstPool.cpp b/src/V3EmitCConstPool.cpp
index b94dbc6aa..e43d511ef 100644
--- a/src/V3EmitCConstPool.cpp
+++ b/src/V3EmitCConstPool.cpp
@@ -121,6 +121,6 @@ public:
 // EmitC static functions
 
 void V3EmitC::emitcConstPool() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     EmitCConstPool(v3Global.rootp()->constPoolp());
 }
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 4d0885f19..34971f85f 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -321,7 +321,7 @@ void EmitCFunc::displayNode(AstNode* nodep, AstScopeName* scopenamep, const stri
     bool inPct = false;
     bool ignore = false;
     for (; pos != vformat.end(); ++pos) {
-        // UINFO(1, "Parse '" << *pos << "'  IP" << inPct << " List " << cvtToHex(elistp) << endl);
+        // UINFO(1, "Parse '" << *pos << "'  IP" << inPct << " List " << cvtToHex(elistp));
         if (!inPct && pos[0] == '%') {
             inPct = true;
             ignore = false;
diff --git a/src/V3EmitCHeaders.cpp b/src/V3EmitCHeaders.cpp
index a8ccf7694..16c6f6314 100644
--- a/src/V3EmitCHeaders.cpp
+++ b/src/V3EmitCHeaders.cpp
@@ -605,7 +605,7 @@ class EmitCHeader final : public EmitCConstInit {
     }
 
     explicit EmitCHeader(const AstNodeModule* modp) {
-        UINFO(5, "  Emitting header for " << prefixNameProtect(modp) << endl);
+        UINFO(5, "  Emitting header for " << prefixNameProtect(modp));
 
         // Open output file
         const string filename = v3Global.opt.makeDir() + "/" + prefixNameProtect(modp) + ".h";
@@ -665,7 +665,7 @@ public:
 // EmitC class functions
 
 void V3EmitC::emitcHeaders() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     // Process each module in turn
     for (const AstNode* nodep = v3Global.rootp()->modulesp(); nodep; nodep = nodep->nextp()) {
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index ef8ec9241..fd6fbdc6b 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -549,7 +549,7 @@ class EmitCImp final : EmitCFunc {
         : m_fileModp{modp}
         , m_slow{slow}
         , m_cfilesr{cfilesr} {
-        UINFO(5, "  Emitting implementation of " << prefixNameProtect(modp) << endl);
+        UINFO(5, "  Emitting implementation of " << prefixNameProtect(modp));
 
         m_modp = modp;
 
@@ -978,7 +978,7 @@ public:
 // EmitC class functions
 
 void V3EmitC::emitcImp() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // Make parent module pointers available.
     const EmitCParentModule emitCParentModule;
     std::list<std::deque<AstCFile*>> cfiles;
@@ -1019,7 +1019,7 @@ void V3EmitC::emitcImp() {
 }
 
 void V3EmitC::emitcFiles() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     for (AstNodeFile* filep = v3Global.rootp()->filesp(); filep;
          filep = VN_AS(filep->nextp(), NodeFile)) {
         AstCFile* const cfilep = VN_CAST(filep, CFile);
diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp
index 73cfec669..8ac603114 100644
--- a/src/V3EmitCInlines.cpp
+++ b/src/V3EmitCInlines.cpp
@@ -61,6 +61,6 @@ public:
 // EmitC class functions
 
 void V3EmitC::emitcInlines() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { EmitCInlines{v3Global.rootp()}; }
 }
diff --git a/src/V3EmitCMain.cpp b/src/V3EmitCMain.cpp
index 2abdcd70b..8ee6fe5a2 100644
--- a/src/V3EmitCMain.cpp
+++ b/src/V3EmitCMain.cpp
@@ -123,6 +123,6 @@ private:
 // EmitC class functions
 
 void V3EmitCMain::emit() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { EmitCMain visitor; }
 }
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index a908c7038..c76e33c4d 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -221,6 +221,6 @@ public:
 };
 
 void V3EmitCMake::emit() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     const CMakeEmitter emitter;
 }
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 60de32beb..5517e0db3 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -697,6 +697,6 @@ public:
 // EmitC class functions
 
 void V3EmitC::emitcModel() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { EmitCModel{v3Global.rootp()}; }
 }
diff --git a/src/V3EmitCPch.cpp b/src/V3EmitCPch.cpp
index ca56694de..e1c6df69b 100644
--- a/src/V3EmitCPch.cpp
+++ b/src/V3EmitCPch.cpp
@@ -73,6 +73,6 @@ public:
 // EmitC static functions
 
 void V3EmitC::emitcPch() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     EmitCPch{};
 }
diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp
index 12bca0e86..bde94b017 100644
--- a/src/V3EmitCSyms.cpp
+++ b/src/V3EmitCSyms.cpp
@@ -235,12 +235,12 @@ class EmitCSyms final : EmitCBaseVisitorConst {
                         varBase = whole;
                     }
                     // UINFO(9, "For " << scopep->name() << " - " << varp->name() << "  Scp "
-                    // << scpName << "Var " << varBase << endl);
+                    // << scpName << "Var " << varBase);
                     const string varBasePretty = AstNode::vpiName(VName::dehash(varBase));
                     const string scpPretty = AstNode::prettyName(VName::dehash(scpName));
                     const string scpSym = scopeSymString(VName::dehash(scpName));
                     // UINFO(9, " scnameins sp " << scpName << " sp " << scpPretty << " ss "
-                    // << scpSym << endl);
+                    // << scpSym);
                     if (v3Global.opt.vpi()) varHierarchyScopes(scpName);
                     if (m_scopeNames.find(scpSym) == m_scopeNames.end()) {
                         // cppcheck-suppress stlFindInsert
@@ -348,7 +348,7 @@ class EmitCSyms final : EmitCBaseVisitorConst {
     void visit(AstScopeName* nodep) override {
         const string name = nodep->scopeSymName();
         // UINFO(9, "scnameins sp " << nodep->name() << " sp " << nodep->scopePrettySymName()
-        // << " ss" << name << endl);
+        // << " ss" << name);
         const int timeunit = m_modp ? m_modp->timeunit().powerOfTen() : 0;
         m_dpiScopeNames.emplace(name, ScopeData{nodep, name, nodep->scopePrettySymName(), "<null>",
                                                 timeunit, "SCOPE_OTHER"});
@@ -402,7 +402,7 @@ public:
 };
 
 void EmitCSyms::emitSymHdr() {
-    UINFO(6, __FUNCTION__ << ": " << endl);
+    UINFO(6, __FUNCTION__ << ": ");
     const string filename = v3Global.opt.makeDir() + "/" + symClassName() + ".h";
     AstCFile* const cfilep = newCFile(filename, true /*slow*/, false /*source*/);
     V3OutCFile* const ofilep = optSystemC() ? new V3OutScFile{filename} : new V3OutCFile{filename};
@@ -686,7 +686,7 @@ void EmitCSyms::emitScopeHier(bool destroy) {
 }
 
 void EmitCSyms::emitSymImp() {
-    UINFO(6, __FUNCTION__ << ": " << endl);
+    UINFO(6, __FUNCTION__ << ": ");
     const string filename = v3Global.opt.makeDir() + "/" + symClassName() + ".cpp";
     AstCFile* const cfilep = newCFile(filename, true /*slow*/, true /*source*/);
     cfilep->support(true);
@@ -1025,7 +1025,7 @@ void EmitCSyms::emitSymImp() {
 //######################################################################
 
 void EmitCSyms::emitDpiHdr() {
-    UINFO(6, __FUNCTION__ << ": " << endl);
+    UINFO(6, __FUNCTION__ << ": ");
     const string filename = v3Global.opt.makeDir() + "/" + topClassName() + "__Dpi.h";
     AstCFile* const cfilep = newCFile(filename, false /*slow*/, false /*source*/);
     cfilep->support(true);
@@ -1080,7 +1080,7 @@ void EmitCSyms::emitDpiHdr() {
 //######################################################################
 
 void EmitCSyms::emitDpiImp() {
-    UINFO(6, __FUNCTION__ << ": " << endl);
+    UINFO(6, __FUNCTION__ << ": ");
     const string filename = v3Global.opt.makeDir() + "/" + topClassName() + "__Dpi.cpp";
     AstCFile* const cfilep = newCFile(filename, false /*slow*/, true /*source*/);
     cfilep->support(true);
@@ -1138,6 +1138,6 @@ void EmitCSyms::emitDpiImp() {
 // EmitC class functions
 
 void V3EmitC::emitcSyms(bool dpiHdrOnly) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     EmitCSyms{v3Global.rootp(), dpiHdrOnly};
 }
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 246f0f027..3a71b5300 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -185,13 +185,13 @@ private:
         if (inputFilesCount < MIN_FILES_COUNT
             && inputFilesCount <= static_cast<size_t>(totalBucketsNum)) {
             UINFO(4, "File concatenation skipped: Too few files (" << m_inputFiles.size() << " < "
-                                                                   << MIN_FILES_COUNT << ")\n");
+                                                                   << MIN_FILES_COUNT << ")");
             groupingRedundant = true;
         }
         if (inputFilesCount < (MIN_FILES_PER_BUCKET * totalBucketsNum)) {
             UINFO(4, "File concatenation skipped: Too few files per bucket ("
                          << m_inputFiles.size() << " < " << MIN_FILES_PER_BUCKET << " - "
-                         << totalBucketsNum << ")\n");
+                         << totalBucketsNum << ")");
             groupingRedundant = true;
         }
         if (!groupingRedundant) return false;
@@ -394,19 +394,19 @@ private:
     }
 
     void process() {
-        UINFO(4, __FUNCTION__ << " group file prefix: " << m_groupFilePrefix << '\n');
-        UINFO(5, "Number of input files: " << m_inputFiles.size() << '\n');
-        UINFO(5, "Total score: " << m_totalScore << '\n');
+        UINFO(4, __FUNCTION__ << " group file prefix: " << m_groupFilePrefix);
+        UINFO(5, "Number of input files: " << m_inputFiles.size());
+        UINFO(5, "Total score: " << m_totalScore);
 
         const int totalBucketsNum = v3Global.opt.outputGroups();
-        UINFO(5, "Number of buckets: " << totalBucketsNum << '\n');
+        UINFO(5, "Number of buckets: " << totalBucketsNum);
         UASSERT(totalBucketsNum > 0, "More than 0 buckets required");
 
         if (fallbackNoGrouping(m_inputFiles.size())) return;
 
         if (debug() >= 6 || dumpLevel() >= 6) {
             const string filename = v3Global.debugFilename("outputgroup") + ".txt";
-            UINFO(5, "Dumping " << filename << endl);
+            UINFO(5, "Dumping " << filename);
             m_logp = std::unique_ptr<std::ofstream>{V3File::new_ofstream(filename)};
             if (m_logp->fail()) v3fatal("Can't write file: " << filename);
         }
@@ -427,7 +427,7 @@ private:
                 list.m_isConcatenable = false;
                 UINFO(5, "Excluding from concatenation: Work List contains only one file: "
                          "Work List #"
-                             << list.m_dbgId << endl);
+                             << list.m_dbgId);
                 continue;
             }
 
@@ -926,11 +926,11 @@ public:
 // Gate class functions
 
 void V3EmitMk::emitmk() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     const EmitMk emitter;
 }
 
 void V3EmitMk::emitHierVerilation(const V3HierBlockPlan* planp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     EmitMkHierVerilation{planp};
 }
diff --git a/src/V3EmitMkJson.cpp b/src/V3EmitMkJson.cpp
index d42c57ad3..09bfc6271 100644
--- a/src/V3EmitMkJson.cpp
+++ b/src/V3EmitMkJson.cpp
@@ -178,6 +178,6 @@ public:
 };
 
 void V3EmitMkJson::emit() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     const V3EmitMkJsonEmitter emitter;
 }
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 5eef0746e..3facbbc5d 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -995,7 +995,7 @@ void V3EmitV::verilogForTree(const AstNode* nodep, std::ostream& os) {
 }
 
 void V3EmitV::emitvFiles() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     for (AstNodeFile* filep = v3Global.rootp()->filesp(); filep;
          filep = VN_AS(filep->nextp(), NodeFile)) {
         AstVFile* const vfilep = VN_CAST(filep, VFile);
@@ -1009,7 +1009,7 @@ void V3EmitV::emitvFiles() {
 }
 
 void V3EmitV::debugEmitV(const string& filename) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     V3OutVFile of{filename};
     { EmitVFileVisitor{v3Global.rootp(), &of, true, true}; }
 }
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 332ca6f06..2fb2d1896 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -436,7 +436,7 @@ public:
 // EmitXml class functions
 
 void V3EmitXml::emitxml() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // All-in-one file
     const string filename = (v3Global.opt.xmlOutput().empty()
                                  ? v3Global.opt.makeDir() + "/" + v3Global.opt.prefix() + ".xml"
diff --git a/src/V3Error.h b/src/V3Error.h
index e7c52d1e9..f96e1d81a 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -624,13 +624,17 @@ void v3errorEndFatal(std::ostringstream& sstr)
 #define UINFO(level, stmsg) \
     do { \
         if (VL_UNCOVERABLE(debug() >= (level))) { \
-            std::cout << "- " << V3Error::lineStr(__FILE__, __LINE__) << stmsg; \
+            std::ostringstream ss; \
+            ss << "- " << V3Error::lineStr(__FILE__, __LINE__) << stmsg; \
+            if (ss.str()[ss.str().size() - 1] != '\n') ss << '\n'; \
+            std::cout << ss.str(); \
         } \
     } while (false)
-#define UINFONL(level, stmsg) \
-    do { \
-        if (VL_UNCOVERABLE(debug() >= (level))) { std::cout << stmsg; } \
-    } while (false)
+/// Print the prefix of UINFO, but no newline.  No level argument, as
+/// always need an if() at the caller site to determine if rest of the line
+/// gets printed or not
+#define UINFO_PREFIX(stmsg) \
+    do { std::cout << "- " << V3Error::lineStr(__FILE__, __LINE__) << stmsg; } while (false)
 
 /// Compile statements only when debug build
 #ifdef VL_DEBUG
diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index 318009efe..8a011fcfd 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -383,7 +383,7 @@ class PackThreads final {
         }
 
         UINFO(6, "Sandbagged end time for " << mtaskp->name() << " on th " << threadId << " = "
-                                            << sandbaggedEndTime << endl);
+                                            << sandbaggedEndTime);
         return sandbaggedEndTime;
     }
 
@@ -454,7 +454,7 @@ class PackThreads final {
                     if (timeBegin > bestTime) {
                         UINFO(6, "th " << threadId << " busy until " << timeBegin
                                        << ", later than bestTime " << bestTime
-                                       << ", skipping thread.\n");
+                                       << ", skipping thread.");
                         break;
                     }
                     for (const V3GraphEdge& edge : mtaskp->inEdges()) {
@@ -463,7 +463,7 @@ class PackThreads final {
                         if (priorEndTime > timeBegin) timeBegin = priorEndTime;
                     }
                     UINFO(6, "Task " << mtaskp->name() << " start at " << timeBegin
-                                     << " on thread " << threadId << endl);
+                                     << " on thread " << threadId);
                     if ((timeBegin < bestTime)
                         || ((timeBegin == bestTime)
                             && bestMtaskp  // Redundant, but appeases static analysis tools
@@ -515,7 +515,7 @@ class PackThreads final {
                             "Tasks after one being assigned should not be ready");
                 if (isReady(schedule, nextp)) {
                     readyMTasks.insert(nextp);
-                    UINFO(6, "Inserted " << nextp->name() << " into ready\n");
+                    UINFO(6, "Inserted " << nextp->name() << " into ready");
                 }
             }
         }
@@ -754,9 +754,9 @@ void normalizeCosts(Costs& costs) {
         // profiled data.  (Improves results if only a few profiles missing.)
         const double estToProfile
             = static_cast<double>(sumCostProfiled) / static_cast<double>(sumCostEstimate);
-        UINFO(5, "Estimated data needs scaling by "
-                     << estToProfile << ", sumCostProfiled=" << sumCostProfiled
-                     << " sumCostEstimate=" << sumCostEstimate << endl);
+        UINFO(5, "Estimated data needs scaling by " << estToProfile
+                                                    << ", sumCostProfiled=" << sumCostProfiled
+                                                    << " sumCostEstimate=" << sumCostEstimate);
         for (auto& est : costs) {
             uint64_t& costEstimate = est.second.first;
             costEstimate = scaleCost(costEstimate, estToProfile);
@@ -770,14 +770,13 @@ void normalizeCosts(Costs& costs) {
         const uint64_t& costProfiled = est.second.second;
         if (maxCost < costEstimate) maxCost = costEstimate;
         if (maxCost < costProfiled) maxCost = costProfiled;
-        UINFO(9,
-              "Post uint scale: ce = " << est.second.first << " cp=" << est.second.second << endl);
+        UINFO(9, "Post uint scale: ce = " << est.second.first << " cp=" << est.second.second);
     }
     const uint64_t scaleDownTo = 10000000;  // Extra room for future algorithms to add costs
     if (maxCost > scaleDownTo) {
         const double scaleup = static_cast<double>(scaleDownTo) / static_cast<double>(maxCost);
-        UINFO(5, "Scaling data to within 32-bits by multiply by=" << scaleup << ", maxCost="
-                                                                  << maxCost << endl);
+        UINFO(5, "Scaling data to within 32-bits by multiply by=" << scaleup
+                                                                  << ", maxCost=" << maxCost);
         for (auto& est : costs) {
             est.second.first = scaleCost(est.second.first, scaleup);
             est.second.second = scaleCost(est.second.second, scaleup);
@@ -797,7 +796,7 @@ void fillinCosts(V3Graph* execMTaskGraphp) {
             = V3Config::getProfileData(v3Global.opt.prefix(), mtp->hashName());
         if (costProfiled) {
             UINFO(5, "Profile data for mtask " << mtp->id() << " " << mtp->hashName()
-                                               << " cost override " << costProfiled << endl);
+                                               << " cost override " << costProfiled);
         }
         costs[mtp->id()] = std::make_pair(costEstimate, costProfiled);
     }
@@ -810,7 +809,7 @@ void fillinCosts(V3Graph* execMTaskGraphp) {
         ExecMTask* const mtp = vtx.as<ExecMTask>();
         const uint32_t costEstimate = costs[mtp->id()].first;
         const uint64_t costProfiled = costs[mtp->id()].second;
-        UINFO(9, "ce = " << costEstimate << " cp=" << costProfiled << endl);
+        UINFO(9, "ce = " << costEstimate << " cp=" << costProfiled);
         UASSERT(costEstimate <= (1UL << 31), "cost scaling math would overflow uint32");
         UASSERT(costProfiled <= (1UL << 31), "cost scaling math would overflow uint32");
         const uint64_t costProfiled32 = static_cast<uint32_t>(costProfiled);
@@ -863,7 +862,7 @@ void finalizeCosts(V3Graph* execMTaskGraphp) {
         // the MTaskBody to see if it's empty. That's the source of truth.
         AstMTaskBody* const bodyp = mtp->bodyp();
         if (!bodyp->stmtsp()) {  // Kill this empty mtask
-            UINFO(6, "Removing zero-cost " << mtp->name() << endl);
+            UINFO(6, "Removing zero-cost " << mtp->name());
             for (V3GraphEdge& in : mtp->inEdges()) {
                 for (V3GraphEdge& out : mtp->outEdges()) {
                     new V3GraphEdge{execMTaskGraphp, in.fromp(), out.top(), 1};
@@ -891,12 +890,12 @@ void finalizeCosts(V3Graph* execMTaskGraphp) {
     V3Stats::addStat("MTask graph, final, parallelism factor", report.parallelismFactor());
     if (debug() >= 3) {
         UINFO(0, "\n");
-        UINFO(0, "    Final mtask parallelism report:\n");
-        UINFO(0, "    Critical path cost = " << report.criticalPathCost() << "\n");
-        UINFO(0, "    Total graph cost = " << report.totalGraphCost() << "\n");
-        UINFO(0, "    MTask vertex count = " << report.vertexCount() << "\n");
-        UINFO(0, "    Edge count = " << report.edgeCount() << "\n");
-        UINFO(0, "    Parallelism factor = " << report.parallelismFactor() << "\n");
+        UINFO(0, "    Final mtask parallelism report:");
+        UINFO(0, "    Critical path cost = " << report.criticalPathCost());
+        UINFO(0, "    Total graph cost = " << report.totalGraphCost());
+        UINFO(0, "    MTask vertex count = " << report.vertexCount());
+        UINFO(0, "    Edge count = " << report.edgeCount());
+        UINFO(0, "    Parallelism factor = " << report.parallelismFactor());
     }
 }
 
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index 401923ef3..a0109d51e 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -85,7 +85,7 @@ class ExpandVisitor final : public VNVisitor {
     // Use state that ExpandOkVisitor calculated
     bool isImpure(AstNode* nodep) {
         const bool impure = nodep->user2();
-        if (impure) UINFO(9, "      impure " << nodep << endl);
+        if (impure) UINFO(9, "      impure " << nodep);
         return impure;
     }
 
@@ -265,7 +265,7 @@ class ExpandVisitor final : public VNVisitor {
     //====================
 
     bool expandWide(AstNodeAssign* nodep, AstConst* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(CONST) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(CONST) " << nodep);
         if (!doExpandWide(nodep)) return false;
         // -> {for each_word{ ASSIGN(WORDSEL(wide,#),WORDSEL(CONST,#))}}
         if (rhsp->num().isFourState()) {
@@ -281,7 +281,7 @@ class ExpandVisitor final : public VNVisitor {
     }
     //-------- Uniops
     bool expandWide(AstNodeAssign* nodep, AstVarRef* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(VARREF) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(VARREF) " << nodep);
         if (!doExpandWide(nodep)) return false;
         for (int w = 0; w < nodep->widthWords(); ++w) {
             addWordAssign(nodep, w, newAstWordSelClone(rhsp, w));
@@ -289,7 +289,7 @@ class ExpandVisitor final : public VNVisitor {
         return true;
     }
     bool expandWide(AstNodeAssign* nodep, AstArraySel* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(ARRAYSEL) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(ARRAYSEL) " << nodep);
         UASSERT_OBJ(!VN_IS(nodep->dtypep()->skipRefp(), UnpackArrayDType), nodep,
                     "ArraySel with unpacked arrays should have been removed in V3Slice");
         if (!doExpandWide(nodep)) return false;
@@ -299,7 +299,7 @@ class ExpandVisitor final : public VNVisitor {
         return true;
     }
     bool expandWide(AstNodeAssign* nodep, AstNot* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(NOT) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(NOT) " << nodep);
         // -> {for each_word{ ASSIGN(WORDSEL(wide,#),NOT(WORDSEL(lhs,#))) }}
         if (!doExpandWide(nodep)) return false;
         FileLine* const fl = rhsp->fileline();
@@ -310,7 +310,7 @@ class ExpandVisitor final : public VNVisitor {
     }
     //-------- Biops
     bool expandWide(AstNodeAssign* nodep, AstAnd* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(AND) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(AND) " << nodep);
         if (!doExpandWide(nodep)) return false;
         FileLine* const fl = nodep->fileline();
         for (int w = 0; w < nodep->widthWords(); ++w) {
@@ -321,7 +321,7 @@ class ExpandVisitor final : public VNVisitor {
         return true;
     }
     bool expandWide(AstNodeAssign* nodep, AstOr* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(OR) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(OR) " << nodep);
         if (!doExpandWide(nodep)) return false;
         FileLine* const fl = nodep->fileline();
         for (int w = 0; w < nodep->widthWords(); ++w) {
@@ -332,7 +332,7 @@ class ExpandVisitor final : public VNVisitor {
         return true;
     }
     bool expandWide(AstNodeAssign* nodep, AstXor* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(XOR) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(XOR) " << nodep);
         if (!doExpandWide(nodep)) return false;
         FileLine* const fl = nodep->fileline();
         for (int w = 0; w < nodep->widthWords(); ++w) {
@@ -344,7 +344,7 @@ class ExpandVisitor final : public VNVisitor {
     }
     //-------- Triops
     bool expandWide(AstNodeAssign* nodep, AstNodeCond* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(COND) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(COND) " << nodep);
         if (!doExpandWide(nodep)) return false;
         FileLine* const fl = nodep->fileline();
         for (int w = 0; w < nodep->widthWords(); ++w) {
@@ -372,7 +372,7 @@ class ExpandVisitor final : public VNVisitor {
                 } else if (lhsp->isWide()) {
                     nodep->v3fatalSrc("extending larger thing into smaller?");
                 } else {
-                    UINFO(8, "    EXTEND(q<-l) " << nodep << endl);
+                    UINFO(8, "    EXTEND(q<-l) " << nodep);
                     newp = new AstCCast{nodep->fileline(), lhsp, nodep};
                 }
             } else {  // Long
@@ -384,7 +384,7 @@ class ExpandVisitor final : public VNVisitor {
         }
     }
     bool expandWide(AstNodeAssign* nodep, AstExtend* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(EXTEND) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(EXTEND) " << nodep);
         if (!doExpandWide(nodep)) return false;
         AstNodeExpr* const rlhsp = rhsp->lhsp();
         for (int w = 0; w < rlhsp->widthWords(); ++w) {
@@ -408,7 +408,7 @@ class ExpandVisitor final : public VNVisitor {
             // See under ASSIGN(WIDE)
         } else if (nodep->fromp()->isWide()) {
             if (isImpure(nodep)) return;
-            UINFO(8, "    SEL(wide) " << nodep << endl);
+            UINFO(8, "    SEL(wide) " << nodep);
             UASSERT_OBJ(nodep->widthConst() <= 64, nodep, "Inconsistent width");
             // Selection amounts
             // Check for constant shifts & save some constification work later.
@@ -482,7 +482,7 @@ class ExpandVisitor final : public VNVisitor {
             VL_DO_DANGLING(replaceWithDelete(nodep, newp), nodep);
         } else {  // Long/Quad from Long/Quad
             // No isImpure() check - can handle side effects in below
-            UINFO(8, "    SEL->SHIFT " << nodep << endl);
+            UINFO(8, "    SEL->SHIFT " << nodep);
             FileLine* const fl = nodep->fileline();
             AstNodeExpr* fromp = nodep->fromp()->unlinkFrBack();
             AstNodeExpr* const lsbp = nodep->lsbp()->unlinkFrBack();
@@ -501,13 +501,13 @@ class ExpandVisitor final : public VNVisitor {
         if (!doExpandWide(nodep)) return false;
         if (VN_IS(rhsp->lsbp(), Const) && VL_BITBIT_E(rhsp->lsbConst()) == 0) {
             const int lsb = rhsp->lsbConst();
-            UINFO(8, "    Wordize ASSIGN(SEL,align) " << nodep << endl);
+            UINFO(8, "    Wordize ASSIGN(SEL,align) " << nodep);
             for (int w = 0; w < nodep->widthWords(); ++w) {
                 addWordAssign(nodep, w, newAstWordSelClone(rhsp->fromp(), w + VL_BITWORD_E(lsb)));
             }
             return true;
         } else {
-            UINFO(8, "    Wordize ASSIGN(EXTRACT,misalign) " << nodep << endl);
+            UINFO(8, "    Wordize ASSIGN(EXTRACT,misalign) " << nodep);
             FileLine* const nfl = nodep->fileline();
             FileLine* const rfl = rhsp->fileline();
             FileLine* const ffl = rhsp->fromp()->fileline();
@@ -559,7 +559,7 @@ class ExpandVisitor final : public VNVisitor {
             V3Number maskold{nodep, destp->widthMin()};
             maskold.opNot(maskset);
             if (destwide) {
-                UINFO(8, "    ASSIGNSEL(const,wide) " << nodep << endl);
+                UINFO(8, "    ASSIGNSEL(const,wide) " << nodep);
                 for (int w = 0; w < destp->widthWords(); ++w) {
                     if (w >= VL_BITWORD_E(lsb) && w <= VL_BITWORD_E(msb)) {
                         // else we would just be setting it to the same exact value
@@ -591,7 +591,7 @@ class ExpandVisitor final : public VNVisitor {
                 VL_DO_DANGLING(rhsp->deleteTree(), rhsp);
                 VL_DO_DANGLING(destp->deleteTree(), destp);
             } else {
-                UINFO(8, "    ASSIGNSEL(const,narrow) " << nodep << endl);
+                UINFO(8, "    ASSIGNSEL(const,narrow) " << nodep);
                 if (destp->isQuad() && !rhsp->isQuad()) rhsp = new AstCCast{nfl, rhsp, nodep};
                 AstNodeExpr* oldvalp = destp->cloneTreePure(true);
                 fixCloneLvalue(oldvalp);
@@ -613,7 +613,7 @@ class ExpandVisitor final : public VNVisitor {
             return true;
         } else {  // non-const select offset
             if (destwide && lhsp->widthConst() == 1) {
-                UINFO(8, "    ASSIGNSEL(varlsb,wide,1bit) " << nodep << endl);
+                UINFO(8, "    ASSIGNSEL(varlsb,wide,1bit) " << nodep);
                 AstNodeExpr* const rhsp = nodep->rhsp()->unlinkFrBack();
                 AstNodeExpr* const destp = lhsp->fromp()->unlinkFrBack();
                 AstNodeExpr* oldvalp = newWordSel(lfl, destp->cloneTreePure(true), lhsp->lsbp());
@@ -638,7 +638,7 @@ class ExpandVisitor final : public VNVisitor {
                 insertBefore(nodep, newp);
                 return true;
             } else if (destwide) {
-                UINFO(8, "    ASSIGNSEL(varlsb,wide) -- NoOp -- " << nodep << endl);
+                UINFO(8, "    ASSIGNSEL(varlsb,wide) -- NoOp -- " << nodep);
                 //   For wide destp, we can either form a equation for every destination word,
                 // with the appropriate long equation of if it's being written or not.
                 //   Or, we can use a LHS variable arraysel with
@@ -650,7 +650,7 @@ class ExpandVisitor final : public VNVisitor {
                 // Reconsider if we get subexpression elimination.
                 return false;
             } else {
-                UINFO(8, "    ASSIGNSEL(varlsb,narrow) " << nodep << endl);
+                UINFO(8, "    ASSIGNSEL(varlsb,narrow) " << nodep);
                 // nodep->dumpTree("-  old: ");
                 AstNodeExpr* rhsp = nodep->rhsp()->unlinkFrBack();
                 AstNodeExpr* const destp = lhsp->fromp()->unlinkFrBack();
@@ -694,7 +694,7 @@ class ExpandVisitor final : public VNVisitor {
             // See under ASSIGN(WIDE)
         } else {
             // No isImpure() check - can handle side effects in below
-            UINFO(8, "    CONCAT " << nodep << endl);
+            UINFO(8, "    CONCAT " << nodep);
             FileLine* const fl = nodep->fileline();
             AstNodeExpr* lhsp = nodep->lhsp()->unlinkFrBack();
             AstNodeExpr* rhsp = nodep->rhsp()->unlinkFrBack();
@@ -708,7 +708,7 @@ class ExpandVisitor final : public VNVisitor {
         }
     }
     bool expandWide(AstNodeAssign* nodep, AstConcat* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(CONCAT) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(CONCAT) " << nodep);
         if (!doExpandWide(rhsp)) return false;
         FileLine* const fl = rhsp->fileline();
         // Lhs or Rhs may be word, long, or quad.
@@ -737,10 +737,10 @@ class ExpandVisitor final : public VNVisitor {
             AstNodeExpr* newp;
             const int lhswidth = lhsp->widthMin();
             if (lhswidth == 1) {
-                UINFO(8, "    REPLICATE(w1) " << nodep << endl);
+                UINFO(8, "    REPLICATE(w1) " << nodep);
                 newp = new AstNegate{fl, lhsp};
             } else {
-                UINFO(8, "    REPLICATE " << nodep << endl);
+                UINFO(8, "    REPLICATE " << nodep);
                 const AstConst* const constp = VN_AS(nodep->countp(), Const);
                 UASSERT_OBJ(constp, nodep,
                             "Replication value isn't a constant.  Checked earlier!");
@@ -764,7 +764,7 @@ class ExpandVisitor final : public VNVisitor {
         }
     }
     bool expandWide(AstNodeAssign* nodep, AstReplicate* rhsp) {
-        UINFO(8, "    Wordize ASSIGN(REPLICATE) " << nodep << endl);
+        UINFO(8, "    Wordize ASSIGN(REPLICATE) " << nodep);
         if (!doExpandWide(rhsp)) return false;
         FileLine* const fl = nodep->fileline();
         AstNodeExpr* const lhsp = rhsp->srcp();
@@ -795,7 +795,7 @@ class ExpandVisitor final : public VNVisitor {
         iterateChildren(nodep);
         if (nodep->lhsp()->isWide()) {
             if (isImpure(nodep)) return;
-            UINFO(8, "    Wordize EQ/NEQ " << nodep << endl);
+            UINFO(8, "    Wordize EQ/NEQ " << nodep);
             // -> (0=={or{for each_word{WORDSEL(lhs,#)^WORDSEL(rhs,#)}}}
             FileLine* const fl = nodep->fileline();
             AstNodeExpr* newp = nullptr;
@@ -821,7 +821,7 @@ class ExpandVisitor final : public VNVisitor {
         FileLine* const fl = nodep->fileline();
         if (nodep->lhsp()->isWide()) {
             if (isImpure(nodep)) return;
-            UINFO(8, "    Wordize REDOR " << nodep << endl);
+            UINFO(8, "    Wordize REDOR " << nodep);
             // -> (0!={or{for each_word{WORDSEL(lhs,#)}}}
             AstNodeExpr* newp = nullptr;
             for (int w = 0; w < nodep->lhsp()->widthWords(); ++w) {
@@ -832,7 +832,7 @@ class ExpandVisitor final : public VNVisitor {
             VL_DO_DANGLING(replaceWithDelete(nodep, newp), nodep);
         } else {
             // No isImpure() check - can handle side effects in below
-            UINFO(8, "    REDOR->EQ " << nodep << endl);
+            UINFO(8, "    REDOR->EQ " << nodep);
             AstNodeExpr* const lhsp = nodep->lhsp()->unlinkFrBack();
             AstNodeExpr* const newp = new AstNeq{
                 fl, new AstConst{fl, AstConst::WidthedValue{}, longOrQuadWidth(nodep), 0}, lhsp};
@@ -845,7 +845,7 @@ class ExpandVisitor final : public VNVisitor {
         FileLine* const fl = nodep->fileline();
         if (nodep->lhsp()->isWide()) {
             if (isImpure(nodep)) return;
-            UINFO(8, "    Wordize REDAND " << nodep << endl);
+            UINFO(8, "    Wordize REDAND " << nodep);
             // -> (0!={and{for each_word{WORDSEL(lhs,#)}}}
             AstNodeExpr* newp = nullptr;
             for (int w = 0; w < nodep->lhsp()->widthWords(); ++w) {
@@ -865,7 +865,7 @@ class ExpandVisitor final : public VNVisitor {
             VL_DO_DANGLING(replaceWithDelete(nodep, newp), nodep);
         } else {
             // No isImpure() check - can handle side effects in below
-            UINFO(8, "    REDAND->EQ " << nodep << endl);
+            UINFO(8, "    REDAND->EQ " << nodep);
             AstNodeExpr* const lhsp = nodep->lhsp()->unlinkFrBack();
             AstNodeExpr* const newp = new AstEq{fl, new AstConst{fl, wordMask(lhsp)}, lhsp};
             VL_DO_DANGLING(replaceWithDelete(nodep, newp), nodep);
@@ -876,7 +876,7 @@ class ExpandVisitor final : public VNVisitor {
         iterateChildren(nodep);
         if (nodep->lhsp()->isWide()) {
             if (isImpure(nodep)) return;
-            UINFO(8, "    Wordize REDXOR " << nodep << endl);
+            UINFO(8, "    Wordize REDXOR " << nodep);
             // -> (0!={redxor{for each_word{XOR(WORDSEL(lhs,#))}}}
             FileLine* const fl = nodep->fileline();
             AstNodeExpr* newp = nullptr;
@@ -885,7 +885,7 @@ class ExpandVisitor final : public VNVisitor {
                 newp = newp ? new AstXor{fl, newp, eqp} : eqp;
             }
             newp = new AstRedXor{fl, newp};
-            UINFO(8, "    Wordize REDXORnew " << newp << endl);
+            UINFO(8, "    Wordize REDXORnew " << newp);
             VL_DO_DANGLING(replaceWithDelete(nodep, newp), nodep);
         }
         // We don't reduce non-wide XORs, as its more efficient to use a temp register,
@@ -962,7 +962,7 @@ public:
 // Expand class functions
 
 void V3Expand::expandAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         ExpandOkVisitor okVisitor{nodep};
         ExpandVisitor{nodep};
diff --git a/src/V3File.cpp b/src/V3File.cpp
index fffd6bf87..5997b29ef 100644
--- a/src/V3File.cpp
+++ b/src/V3File.cpp
@@ -97,7 +97,7 @@ class V3FileDependImp final {
                     m_stat.st_mtime = 1;
                     m_exists = false;
                     // Not an error... This can occur due to `line directives in the .vpp files
-                    UINFO(1, "-Info: File not statable: " << filename() << endl);
+                    UINFO(1, "-Info: File not statable: " << filename());
                 }
             }
         }
@@ -215,7 +215,7 @@ void V3FileDependImp::writeTimes(const string& filename, const string& cmdlineIn
 bool V3FileDependImp::checkTimes(const string& filename, const string& cmdlineIn) {
     const std::unique_ptr<std::ifstream> ifp{V3File::new_ifstream_nodepend(filename)};
     if (ifp->fail()) {
-        UINFO(2, "   --check-times failed: no input " << filename << endl);
+        UINFO(2, "   --check-times failed: no input " << filename);
         return false;
     }
     {
@@ -231,7 +231,7 @@ bool V3FileDependImp::checkTimes(const string& filename, const string& cmdlineIn
         const string chkCmdline = V3Os::getline(*ifp, '"');
         const string cmdline = stripQuotes(cmdlineIn);
         if (cmdline != chkCmdline) {
-            UINFO(2, "   --check-times failed: different command line\n");
+            UINFO(2, "   --check-times failed: different command line");
             return false;
         }
     }
@@ -261,7 +261,7 @@ bool V3FileDependImp::checkTimes(const string& filename, const string& cmdlineIn
         struct stat chkStat;
         const int err = stat(chkFilename.c_str(), &chkStat);
         if (err != 0) {
-            UINFO(2, "   --check-times failed: missing " << chkFilename << endl);
+            UINFO(2, "   --check-times failed: missing " << chkFilename);
             return false;
         }
         // UINFO(9," got d="<<chkDir<<" s="<<chkSize<<" ct="<<chkCstime<<"."
@@ -387,7 +387,7 @@ private:
         if (!m_pidExited && waitpid(m_pid, &m_pidStatus, hang ? 0 : WNOHANG)) {
             UINFO(1, "--pipe-filter: Exited, status "
                          << m_pidStatus << " exit=" << WEXITSTATUS(m_pidStatus) << " err"
-                         << std::strerror(errno) << endl);
+                         << std::strerror(errno));
             m_readEof = true;
             m_pidExited = true;
         }
@@ -402,7 +402,7 @@ private:
             if (size > 0 && size < todo) todo = size;
             errno = 0;
             const ssize_t got = read(fd, buf, todo);
-            // UINFO(9,"RD GOT g "<< got<<" e "<<errno<<" "<<strerror(errno)<<endl);
+            // UINFO(9, "RD GOT g " << got << " e " << errno << " " << strerror(errno));
             // usleep(50*1000);
             if (got > 0) {
                 outl.push_back(string(buf, got));
@@ -424,7 +424,7 @@ private:
     // cppverilator-suppress unusedFunction unusedPrivateFunction
     string readFilterLine() {
         // Slow, but we don't need it much
-        UINFO(9, "readFilterLine\n");
+        UINFO(9, "readFilterLine");
         string line;
         while (!m_readEof) {
             StrList outl;
@@ -458,7 +458,7 @@ private:
         while (!m_readEof && out.length() > offset) {
             errno = 0;
             const int got = write(m_writeFd, (out.c_str()) + offset, out.length() - offset);
-            // UINFO(9,"WR GOT g "<< got<<" e "<<errno<<" "<<strerror(errno)<<endl);
+            // UINFO(9, "WR GOT g " << got << " e " << errno << " " << strerror(errno));
             // usleep(50*1000);
             if (got > 0) {
                 offset += got;
@@ -502,12 +502,12 @@ private:
             v3fatal("--pipe-filter: stdin/stdout closed before pipe opened\n");
         }
 
-        UINFO(1, "--pipe-filter: /bin/sh -c " << command << endl);
+        UINFO(1, "--pipe-filter: /bin/sh -c " << command);
 
         const pid_t pid = fork();
         if (pid < 0) v3fatal("--pipe-filter: fork failed: " << std::strerror(errno));
         if (pid == 0) {  // Child
-            UINFO(6, "In child\n");
+            UINFO(6, "In child");
             close(fd_stdin[P_WR]);
             dup2(fd_stdin[P_RD], 0);
             close(fd_stdout[P_RD]);
@@ -521,7 +521,7 @@ private:
         } else {  // Parent
             UINFO(6, "In parent, child pid " << pid << " stdin " << fd_stdin[P_WR] << "->"
                                              << fd_stdin[P_RD] << " stdout " << fd_stdout[P_WR]
-                                             << "->" << fd_stdout[P_RD] << endl);
+                                             << "->" << fd_stdout[P_RD]);
             m_pid = pid;
             m_pidExited = false;
             m_pidStatus = 0;
@@ -538,7 +538,7 @@ private:
             flags = fcntl(m_writeFd, F_GETFL, 0);
             fcntl(m_writeFd, F_SETFL, flags | O_NONBLOCK);
         }
-        UINFO(6, "startFilter complete\n");
+        UINFO(6, "startFilter complete");
 #else
         v3fatalSrc("--pipe-filter not implemented on this platform");
 #endif
@@ -548,7 +548,7 @@ private:
         if (m_pid) stopFilter();
     }
     void stopFilter() {
-        UINFO(6, "Stopping filter process\n");
+        UINFO(6, "Stopping filter process");
 #ifdef INFILTER_PIPE
         close(m_writeFd);
         checkFilter(true);
@@ -557,7 +557,7 @@ private:
         }
         m_pid = 0;
         close(m_readFd);
-        UINFO(6, "Closed\n");
+        UINFO(6, "Closed");
 #else
         v3fatalSrc("--pipe-filter not implemented on this platform");
 #endif
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index 7be65fd53..eeb8e9f9c 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -408,7 +408,7 @@ public:
 //
 
 void V3Force::forceAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     if (!v3Global.hasForceableSignals()) return;
     {
         ForceState state;
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 5ac142bb8..10f765ca7 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -82,7 +82,7 @@ public:
         UASSERT_OBJ(!m_instance.initialized(), m_procp, "Dynamic scope already instantiated.");
 
         m_instance.m_classp = new AstClass{m_procp->fileline(), generateDynScopeClassName()};
-        UINFO(9, "new dynscope class " << m_instance.m_classp << endl);
+        UINFO(9, "new dynscope class " << m_instance.m_classp);
         m_instance.m_refDTypep
             = new AstClassRefDType{m_procp->fileline(), m_instance.m_classp, nullptr};
         v3Global.rootp()->typeTablep()->addTypesp(m_instance.m_refDTypep);
@@ -91,7 +91,7 @@ public:
                          generateDynScopeHandleName(m_procp), m_instance.m_refDTypep};
         m_instance.m_handlep->funcLocal(true);
         m_instance.m_handlep->lifetime(VLifetime::AUTOMATIC);
-        UINFO(9, "new dynscope var " << m_instance.m_handlep << endl);
+        UINFO(9, "new dynscope var " << m_instance.m_handlep);
 
         return m_instance;
     }
@@ -119,7 +119,7 @@ public:
             varp->varType(VVarType::MEMBER);
             varp->lifetime(VLifetime::AUTOMATIC);
             varp->usedLoopIdx(false);  // No longer unrollable
-            UINFO(9, "insert DynScope member " << varp << endl);
+            UINFO(9, "insert DynScope member " << varp);
             m_instance.m_classp->addStmtsp(varp);
         }
 
@@ -462,7 +462,7 @@ class DynScopeVisitor final : public VNVisitor {
             forkp->joinType(VJoinType::JOIN_NONE);
             nodep->replaceWith(forkp);
             forkp->addStmtsp(nodep);
-            UINFO(9, "assign new fork " << forkp << endl);
+            UINFO(9, "assign new fork " << forkp);
         } else {
             visit(static_cast<AstNodeStmt*>(nodep));
         }
@@ -481,7 +481,7 @@ public:
         // Commit changes to AST
         bool typesAdded = false;
         for (auto orderp : m_frameOrder) {
-            UINFO(9, "Frame commit " << orderp << endl);
+            UINFO(9, "Frame commit " << orderp);
             auto frameIt = m_frames.find(orderp);
             UASSERT_OBJ(frameIt != m_frames.end(), orderp, "m_frames didn't contain m_frameOrder");
             ForkDynScopeFrame* framep = frameIt->second;
@@ -537,7 +537,7 @@ class ForkVisitor final : public VNVisitor {
             varp->direction(VDirection::INPUT);
             varp->funcLocal(true);
             varp->lifetime(VLifetime::AUTOMATIC);
-            UINFO(9, "new capture var " << varp << endl);
+            UINFO(9, "new capture var " << varp);
             m_capturedVarsp = AstNode::addNext(m_capturedVarsp, varp);
             // Use the original ref as an argument for call
             m_capturedVarRefsp
@@ -603,7 +603,7 @@ class ForkVisitor final : public VNVisitor {
         }
 
         m_modp->addStmtsp(taskp);
-        UINFO(9, "new " << taskp << endl);
+        UINFO(9, "new " << taskp);
 
         AstTaskRef* const taskrefp = new AstTaskRef{nodep->fileline(), taskp, m_capturedVarRefsp};
         AstStmtExpr* const taskcallp = taskrefp->makeStmt();
@@ -698,13 +698,13 @@ public:
 // Fork class functions
 
 void V3Fork::makeDynamicScopes(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { DynScopeVisitor{nodep}; }
     V3Global::dumpCheckGlobalTree("fork_dynscope", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3Fork::makeTasks(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ForkVisitor{nodep}; }
     V3Global::dumpCheckGlobalTree("fork", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3FuncOpt.cpp b/src/V3FuncOpt.cpp
index 4e869fd6f..6462542fa 100644
--- a/src/V3FuncOpt.cpp
+++ b/src/V3FuncOpt.cpp
@@ -110,7 +110,7 @@ class BalanceConcatTree final {
 
     // Returns replacement node, or nullptr if no change
     static AstConcat* balance(AstConcat* const rootp) {
-        UINFO(9, "balanceConcat " << rootp << "\n");
+        UINFO(9, "balanceConcat " << rootp);
         // Gather all input vertices of the tree
         const std::vector<AstNodeExpr*> exprps = gatherTerms(rootp);
         // Don't bother with trivial trees
@@ -219,7 +219,7 @@ class FuncOptVisitor final : public VNVisitor {
     // Split wide assignments with a wide concatenation on the RHS.
     // Returns true if 'nodep' was deleted
     bool splitConcat(AstNodeAssign* nodep) {
-        UINFO(9, "splitConcat " << nodep << "\n");
+        UINFO(9, "splitConcat " << nodep);
         // Only care about concatenations on the right
         AstConcat* const rhsp = VN_CAST(nodep->rhsp(), Concat);
         if (!rhsp) return false;
@@ -253,7 +253,7 @@ class FuncOptVisitor final : public VNVisitor {
         if (!nodep->user1() && readsLhs(nodep)) return false;
 
         // Ok, actually split it now
-        UINFO(5, "splitConcat optimizing " << nodep << "\n");
+        UINFO(5, "splitConcat optimizing " << nodep);
         ++m_concatSplits;
         // The 2 parts and their offsets
         AstNodeExpr* const rrp = rhsp->rhsp()->unlinkFrBack();
@@ -291,7 +291,7 @@ class FuncOptVisitor final : public VNVisitor {
     void visit(AstConcat* nodep) override {
         if (v3Global.opt.fFuncBalanceCat() && !nodep->user1() && !VN_IS(nodep->backp(), Concat)) {
             if (AstConcat* const newp = BalanceConcatTree::apply(nodep)) {
-                UINFO(5, "balanceConcat optimizing " << nodep << "\n");
+                UINFO(5, "balanceConcat optimizing " << nodep);
                 ++m_balancedConcats;
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -319,7 +319,7 @@ public:
 //######################################################################
 
 void V3FuncOpt::funcOptAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         const VNUser1InUse user1InUse;
         V3ThreadScope threadScope;
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index c31800e9c..b19e2516f 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -57,15 +57,15 @@ public:
     bool dedupable() const { return m_dedupable; }
     bool consumed() const { return m_consumed; }
     void setConsumed(const char* /*consumedReason*/) {
-        // if (!m_consumed) UINFO(0, "\t\tSetConsumed " << consumedReason << " " << this << endl);
+        // if (!m_consumed) UINFO(0, "\t\tSetConsumed " << consumedReason << " " << this);
         m_consumed = true;
     }
     void clearReducible(const char* /*nonReducibleReason*/) {
-        // UINFO(0, "     NR: " << nonReducibleReason << "  " << name() << endl);
+        // UINFO(0, "     NR: " << nonReducibleReason << "  " << name());
         m_reducible = false;
     }
     void clearDedupable(const char* /*nonDedupableReason*/) {
-        // UINFO(0, "     ND: " << nonDedupableReason << "  " << name() << endl);
+        // UINFO(0, "     ND: " << nonDedupableReason << "  " << name());
         m_dedupable = false;
     }
     void clearReducibleAndDedupable(const char* nonReducibleReason) {
@@ -160,7 +160,7 @@ public:
     GateVarVertex* makeVarVertex(AstVarScope* vscp) {
         GateVarVertex* vVtxp = reinterpret_cast<GateVarVertex*>(vscp->user1p());
         if (!vVtxp) {
-            UINFO(6, "New vertex " << vscp << endl);
+            UINFO(6, "New vertex " << vscp);
             vVtxp = new GateVarVertex{this, vscp};
             vscp->user1p(vVtxp);
             if (vscp->varp()->sensIfacep()) {
@@ -381,7 +381,7 @@ class GateConcatVisitor final : public VNVisitorConst {
             nodep->user2(true);
             m_found_offset = m_offset;
             m_found = true;
-            UINFO(9, "CLK DECOMP Concat found var (off = " << m_offset << ") - " << nodep << endl);
+            UINFO(9, "CLK DECOMP Concat found var (off = " << m_offset << ") - " << nodep);
         }
         m_offset += nodep->dtypep()->width();
     }
@@ -431,7 +431,7 @@ class GateClkDecomp final {
         // Check that we haven't been here before
         if (vscp->user2SetOnce()) return;
 
-        UINFO(9, "CLK DECOMP Var - " << vVtxp << " : " << vscp << endl);
+        UINFO(9, "CLK DECOMP Var - " << vVtxp << " : " << vscp);
         VL_RESTORER(m_clkVectors);
         if (vscp->varp()->width() > 1) {
             m_clkVectors = true;
@@ -499,7 +499,7 @@ class GateClkDecomp final {
 
     explicit GateClkDecomp(GateGraph& graph)
         : m_graph{graph} {
-        UINFO(9, "Starting clock decomposition" << endl);
+        UINFO(9, "Starting clock decomposition");
         for (V3GraphVertex& vtx : graph.vertices()) {
             GateVarVertex* const vVtxp = vtx.cast<GateVarVertex>();
             if (!vVtxp) continue;
@@ -508,7 +508,7 @@ class GateClkDecomp final {
             if (vscp->varp()->attrClocker() != VVarAttrClocker::CLOCKER_YES) continue;
 
             if (vscp->varp()->width() == 1) {
-                UINFO(9, "CLK DECOMP - " << vVtxp << " : " << vscp << endl);
+                UINFO(9, "CLK DECOMP - " << vVtxp << " : " << vscp);
                 m_clkVtxp = vVtxp;
                 visit(vVtxp, 0);
             }
@@ -544,7 +544,7 @@ class GateOkVisitor final : public VNVisitorConst {
 
     // METHODS
     void clearSimple(const char* because) {
-        if (m_isSimple) UINFO(9, "Clear simple " << because << endl);
+        if (m_isSimple) UINFO(9, "Clear simple " << because);
         m_isSimple = false;
     }
 
@@ -619,7 +619,7 @@ class GateOkVisitor final : public VNVisitorConst {
 
         if (!(m_dedupe ? nodep->isGateDedupable() : nodep->isGateOptimizable())  //
             || !nodep->isPure() || nodep->isBrancher()) {
-            UINFO(5, "Non optimizable type: " << nodep << endl);
+            UINFO(5, "Non optimizable type: " << nodep);
             clearSimple("Non optimizable type");
             return;
         }
@@ -815,7 +815,7 @@ class GateInline final {
             if (!okVisitor.varAssigned(vVtxp->varScp())) continue;
             if (excludedWide(vVtxp, okVisitor.substitutionp())) {
                 ++m_statExcluded;
-                UINFO(9, "Gate inline exclude '" << vVtxp->name() << "'" << endl);
+                UINFO(9, "Gate inline exclude '" << vVtxp->name() << "'");
                 vVtxp->clearReducible("Excluded wide");  // Check once.
                 continue;
             }
@@ -1153,18 +1153,18 @@ class GateDedupe final {
 
         ++m_statDedupLogic;
         GateVarVertex* const dupVVtxp = dupRefp->varScopep()->user1u().to<GateVarVertex*>();
-        UINFO(4, "replacing " << vVtxp << " with " << dupVVtxp << endl);
+        UINFO(4, "replacing " << vVtxp << " with " << dupVVtxp);
 
         // Replace all of this varvertex's consumers with dupRefp
         for (V3GraphEdge* const edgep : vVtxp->outEdges().unlinkable()) {
             const GateLogicVertex* const consumerVtxp = edgep->top()->as<GateLogicVertex>();
             AstNode* const consumerp = consumerVtxp->nodep();
-            UINFO(9, "elim src vtx" << lVtxp << " node " << lVtxp->nodep() << endl);
-            UINFO(9, "elim cons vtx" << consumerVtxp << " node " << consumerp << endl);
-            UINFO(9, "elim var vtx " << vVtxp << " node " << vVtxp->varScp() << endl);
-            UINFO(9, "replace with " << dupRefp << endl);
+            UINFO(9, "elim src vtx" << lVtxp << " node " << lVtxp->nodep());
+            UINFO(9, "elim cons vtx" << consumerVtxp << " node " << consumerp);
+            UINFO(9, "elim var vtx " << vVtxp << " node " << vVtxp->varScp());
+            UINFO(9, "replace with " << dupRefp);
             if (lVtxp == consumerVtxp) {
-                UINFO(9, "skipping as self-recirculates\n");
+                UINFO(9, "skipping as self-recirculates");
             } else {
                 // Substitute consumer logic
                 consumerp->foreach([&](AstNodeVarRef* refp) {
@@ -1213,14 +1213,14 @@ class GateDedupe final {
 
     explicit GateDedupe(GateGraph& graph) {
         // Traverse starting from each of the clocks
-        UINFO(9, "Gate dedupe() clocks:\n");
+        UINFO(9, "Gate dedupe() clocks:");
         for (V3GraphVertex& vtx : graph.vertices()) {
             if (GateVarVertex* const vVtxp = vtx.cast<GateVarVertex>()) {
                 if (vVtxp->isClock()) visit(vVtxp);
             }
         }
         // Traverse starting from each of the outputs
-        UINFO(9, "Gate dedupe() outputs:\n");
+        UINFO(9, "Gate dedupe() outputs:");
         for (V3GraphVertex& vtx : graph.vertices()) {
             if (GateVarVertex* const vVtxp = vtx.cast<GateVarVertex>()) {
                 if (vVtxp->isTop() && vVtxp->varScp()->varp()->isWritable()) visit(vVtxp);
@@ -1287,7 +1287,7 @@ class GateMergeAssignments final {
             AstSel* const currSelp = VN_AS(assignp->lhsp(), Sel);
 
             if (AstSel* const newSelp = merge(prevSelp, currSelp)) {
-                UINFO(5, "assemble to new sel: " << newSelp << endl);
+                UINFO(5, "assemble to new sel: " << newSelp);
                 // replace preSel with newSel
                 prevSelp->replaceWith(newSelp);
                 VL_DO_DANGLING(prevSelp->deleteTree(), prevSelp);
@@ -1323,7 +1323,7 @@ class GateMergeAssignments final {
 
     explicit GateMergeAssignments(GateGraph& graph)
         : m_graph{graph} {
-        UINFO(6, "mergeAssigns\n");
+        UINFO(6, "mergeAssigns");
         for (V3GraphVertex& vtx : graph.vertices()) {
             if (GateVarVertex* const vVtxp = vtx.cast<GateVarVertex>()) process(vVtxp);
         }
@@ -1386,7 +1386,7 @@ class GateUnused final {
                     AstNode* const nodep = lVtxp->nodep();
                     warnUnused(nodep);
 
-                    UINFO(8, "    Remove unconsumed " << nodep << endl);
+                    UINFO(8, "    Remove unconsumed " << nodep);
                     nodep->unlinkFrBack();
                     VL_DO_DANGLING(nodep->deleteTree(), nodep);
                     VL_DO_DANGLING(lVtxp->unlinkDelete(&m_graph), lVtxp);
@@ -1409,7 +1409,7 @@ public:
 // Pass entry point
 
 void V3Gate::gateAll(AstNetlist* netlistp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     {
         // Build the graph
diff --git a/src/V3GraphAcyc.cpp b/src/V3GraphAcyc.cpp
index 5e615e1e0..91387c49e 100644
--- a/src/V3GraphAcyc.cpp
+++ b/src/V3GraphAcyc.cpp
@@ -159,7 +159,7 @@ class GraphAcyc final {
     }
     void cutOrigEdge(V3GraphEdge* breakEdgep, const char* why) {
         // From the break edge, cut edges in original graph it represents
-        UINFO(8, why << " CUT " << breakEdgep->fromp() << endl);
+        UINFO(8, why << " CUT " << breakEdgep->fromp());
         breakEdgep->cut();
         const OrigEdgeList* const oEListp = static_cast<OrigEdgeList*>(breakEdgep->userp());
         if (!oEListp) {
@@ -168,8 +168,7 @@ class GraphAcyc final {
         // The breakGraph edge may represent multiple real edges; cut them all
         for (const auto& origEdgep : *oEListp) {
             origEdgep->cut();
-            UINFO(8,
-                  "  " << why << "   " << origEdgep->fromp() << " ->" << origEdgep->top() << endl);
+            UINFO(8, "  " << why << "   " << origEdgep->fromp() << " ->" << origEdgep->top());
         }
     }
     // Work Queue
@@ -280,7 +279,7 @@ void GraphAcyc::simplifyNone(GraphAcycVertex* avertexp) {
     // Likewise, vertices with no outputs
     if (avertexp->isDelete()) return;
     if (avertexp->inEmpty() || avertexp->outEmpty()) {
-        UINFO(9, "  SimplifyNoneRemove " << avertexp << endl);
+        UINFO(9, "  SimplifyNoneRemove " << avertexp);
         avertexp->setDelete();  // Mark so we won't delete it twice
         // Remove edges
         while (V3GraphEdge* const edgep = avertexp->outEdges().frontp()) {
@@ -305,7 +304,7 @@ void GraphAcyc::simplifyOne(GraphAcycVertex* avertexp) {
         // The in and out may be the same node; we'll make a loop
         // The in OR out may be THIS node; we can't delete it then.
         if (inVertexp != avertexp && outVertexp != avertexp) {
-            UINFO(9, "  SimplifyOneRemove " << avertexp << endl);
+            UINFO(9, "  SimplifyOneRemove " << avertexp);
             avertexp->setDelete();  // Mark so we won't delete it twice
             // Make a new edge connecting the two vertices directly
             // If both are breakable, we pick the one with less weight, else it's arbitrary
@@ -337,7 +336,7 @@ void GraphAcyc::simplifyOut(GraphAcycVertex* avertexp) {
         V3GraphEdge* const outEdgep = avertexp->outEdges().frontp();
         if (!outEdgep->cutable()) {
             V3GraphVertex* outVertexp = outEdgep->top();
-            UINFO(9, "  SimplifyOutRemove " << avertexp << endl);
+            UINFO(9, "  SimplifyOutRemove " << avertexp);
             avertexp->setDelete();  // Mark so we won't delete it twice
             for (V3GraphEdge* const inEdgep : avertexp->inEdges().unlinkable()) {
                 V3GraphVertex* inVertexp = inEdgep->fromp();
@@ -377,16 +376,16 @@ void GraphAcyc::simplifyDup(GraphAcycVertex* avertexp) {
             if (!prevEdgep->cutable()) {
                 // !cutable duplicates prev !cutable: we can ignore it, redundant
                 //  cutable duplicates prev !cutable: know it's not a relevant loop, ignore it
-                UINFO(8, "    DelDupEdge " << avertexp << " -> " << edgep->top() << endl);
+                UINFO(8, "    DelDupEdge " << avertexp << " -> " << edgep->top());
                 VL_DO_DANGLING(edgep->unlinkDelete(), edgep);
             } else if (!edgep->cutable()) {
                 // !cutable duplicates prev  cutable: delete the earlier cutable
-                UINFO(8, "    DelDupPrev " << avertexp << " -> " << prevEdgep->top() << endl);
+                UINFO(8, "    DelDupPrev " << avertexp << " -> " << prevEdgep->top());
                 VL_DO_DANGLING(prevEdgep->unlinkDelete(), prevEdgep);
                 outVertexp->userp(edgep);
             } else {
                 //  cutable duplicates prev  cutable: combine weights
-                UINFO(8, "    DelDupComb " << avertexp << " -> " << edgep->top() << endl);
+                UINFO(8, "    DelDupComb " << avertexp << " -> " << edgep->top());
                 prevEdgep->weight(prevEdgep->weight() + edgep->weight());
                 addOrigEdgep(prevEdgep, edgep);
                 VL_DO_DANGLING(edgep->unlinkDelete(), edgep);
@@ -440,7 +439,7 @@ void GraphAcyc::place() {
             if (edge.weight() && edge.cutable()) ++numEdges;
         }
     }
-    UINFO(4, "    Cutable edges = " << numEdges << endl);
+    UINFO(4, "    Cutable edges = " << numEdges);
 
     std::vector<V3GraphEdge*> edges;  // List of all edges to be processed
     // Make the vector properly sized right off the bat -- faster than reallocating
@@ -463,8 +462,7 @@ void GraphAcyc::place() {
 void GraphAcyc::placeTryEdge(V3GraphEdge* edgep) {
     // Try to make this edge uncutable
     m_placeStep++;
-    UINFO(8, "    PlaceEdge s" << m_placeStep << " w" << edgep->weight() << " " << edgep->fromp()
-                               << endl);
+    UINFO(8, "    PlaceEdge s" << m_placeStep << " w" << edgep->weight() << " " << edgep->fromp());
     // Make the edge uncutable so we detect it in placement
     edgep->cutable(false);
     // Vertex::m_user begin: number indicates this edge was completed
@@ -537,27 +535,27 @@ void GraphAcyc::main() {
     simplify(false);
     if (dumpGraphLevel() >= 5) m_breakGraph.dumpDotFilePrefixed("acyc_simp");
 
-    UINFO(4, " Cutting trivial loops\n");
+    UINFO(4, " Cutting trivial loops");
     simplify(true);
     if (dumpGraphLevel() >= 6) m_breakGraph.dumpDotFilePrefixed("acyc_mid");
 
-    UINFO(4, " Ranking\n");
+    UINFO(4, " Ranking");
     m_breakGraph.rank(&V3GraphEdge::followNotCutable);
     if (dumpGraphLevel() >= 6) m_breakGraph.dumpDotFilePrefixed("acyc_rank");
 
-    UINFO(4, " Placement\n");
+    UINFO(4, " Placement");
     place();
     if (dumpGraphLevel() >= 6) m_breakGraph.dumpDotFilePrefixed("acyc_place");
 
-    UINFO(4, " Final Ranking\n");
+    UINFO(4, " Final Ranking");
     // Only needed to assert there are no loops in completed graph
     m_breakGraph.rank(&V3GraphEdge::followAlwaysTrue);
     if (dumpGraphLevel() >= 6) m_breakGraph.dumpDotFilePrefixed("acyc_done");
 }
 
 void V3Graph::acyclic(V3EdgeFuncP edgeFuncp) {
-    UINFO(4, "Acyclic\n");
+    UINFO(4, "Acyclic");
     GraphAcyc acyc{this, edgeFuncp};
     acyc.main();
-    UINFO(4, "Acyclic done\n");
+    UINFO(4, "Acyclic done");
 }
diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp
index 56b6e7e1a..fc307f141 100644
--- a/src/V3GraphAlg.cpp
+++ b/src/V3GraphAlg.cpp
@@ -462,7 +462,7 @@ void V3Graph::sortEdges() {
 //              (Results in better dcache packing.)
 
 void V3Graph::order() {
-    UINFO(2, "Order:\n");
+    UINFO(2, "Order:");
 
     // Compute rankings again
     rank(&V3GraphEdge::followAlwaysTrue);
diff --git a/src/V3GraphTest.cpp b/src/V3GraphTest.cpp
index 4bc98f035..6cf2498e7 100644
--- a/src/V3GraphTest.cpp
+++ b/src/V3GraphTest.cpp
@@ -298,7 +298,7 @@ public:
 
 void V3Graph::selfTest() {
     // Execute all of the tests
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { V3GraphTestStrong{}.run(); }
     { V3GraphTestAcyc{}.run(); }
     { V3GraphTestVars{}.run(); }
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index d1fde1ff2..b6fee854b 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -97,7 +97,7 @@ class HasherVisitor final : public VNVisitorConst {
 
     void visit(AstNode* nodep) override {
 #if VL_DEBUG
-        UINFO(0, "%Warning: Hashing node as AstNode: " << nodep << endl);
+        UINFO(0, "%Warning: Hashing node as AstNode: " << nodep);
 #endif
         m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [=]() {});
     }
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index f4a689ff9..c0e2d8955 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -322,8 +322,7 @@ class HierBlockUsageCollectVisitor final : public VNVisitorConst {
         // Don't visit twice
         if (nodep->user1SetOnce()) return;
         UINFO(5, "Checking " << nodep->prettyNameQ() << " from "
-                             << (m_hierBlockp ? m_hierBlockp->prettyNameQ() : "null"s)
-                             << std::endl);
+                             << (m_hierBlockp ? m_hierBlockp->prettyNameQ() : "null"s));
         VL_RESTORER(m_modp);
         AstModule* const prevHierBlockp = m_hierBlockp;
         ModuleSet prevReferred;
@@ -382,8 +381,8 @@ void V3HierBlockPlan::add(const AstNodeModule* modp, const V3HierBlockParams& pa
     if (pair.second) {
         V3HierBlock* hblockp = new V3HierBlock{modp, params};
         UINFO(3, "Add " << modp->prettyNameQ() << " with " << params.gparams().size()
-                        << " parameters and " << params.gTypeParams().size() << " type parameters"
-                        << std::endl);
+                        << " parameters and " << params.gTypeParams().size()
+                        << " type parameters");
         pair.first->second = hblockp;
     }
 }
@@ -394,7 +393,7 @@ void V3HierBlockPlan::registerUsage(const AstNodeModule* parentp, const AstNodeM
     const iterator child = m_blocks.find(childp);
     if (child != m_blocks.end()) {
         UINFO(3, "Found usage relation " << parentp->prettyNameQ() << " uses "
-                                         << childp->prettyNameQ() << std::endl);
+                                         << childp->prettyNameQ());
         parent->second->addChild(child->second);
         child->second->addParent(parent->second);
     }
diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp
index 53081e2a7..37c6f73d1 100644
--- a/src/V3Inline.cpp
+++ b/src/V3Inline.cpp
@@ -94,13 +94,13 @@ class InlineMarkVisitor final : public VNVisitor {
     void cantInline(const char* reason, bool hard) {
         if (hard) {
             if (m_modp->user2() != CIL_NOTHARD) {
-                UINFO(4, "  No inline hard: " << reason << " " << m_modp << endl);
+                UINFO(4, "  No inline hard: " << reason << " " << m_modp);
                 m_modp->user2(CIL_NOTHARD);
                 ++m_statUnsup;
             }
         } else {
             if (m_modp->user2() == CIL_MAYBE) {
-                UINFO(4, "  No inline soft: " << reason << " " << m_modp << endl);
+                UINFO(4, "  No inline soft: " << reason << " " << m_modp);
                 m_modp->user2(CIL_NOTSOFT);
             }
         }
@@ -220,7 +220,7 @@ class InlineMarkVisitor final : public VNVisitor {
                                   || refs * statements < v3Global.opt.inlineMult());
             m_moduleState(modp).m_inlined = doit;
             UINFO(4, " Inline=" << doit << " Possible=" << allowed << " Refs=" << refs
-                                << " Stmts=" << statements << "  " << modp << endl);
+                                << " Stmts=" << statements << "  " << modp);
         }
     }
     //--------------------
@@ -261,7 +261,7 @@ class InlineRelinkVisitor final : public VNVisitor {
         m_modp->addInlinesp(nodep);
         // Rename
         nodep->name(m_cellp->name() + "__DOT__" + nodep->name());
-        UINFO(6, "    Inline " << nodep << endl);
+        UINFO(6, "    Inline " << nodep);
         // Do CellInlines under this, but don't move them
         iterateChildren(nodep);
     }
@@ -285,7 +285,7 @@ class InlineRelinkVisitor final : public VNVisitor {
             FileLine* const flp = nodep->fileline();
             AstConst* const exprconstp = VN_CAST(nodep->user2p(), Const);
             AstVarRef* exprvarrefp = VN_CAST(nodep->user2p(), VarRef);
-            UINFO(8, "connectto: " << nodep->user2p() << endl);
+            UINFO(8, "connectto: " << nodep->user2p());
             UASSERT_OBJ(exprconstp || exprvarrefp, nodep,
                         "Unknown interconnect type; pinReconnectSimple should have cleared up");
             if (exprconstp) {
@@ -296,7 +296,7 @@ class InlineRelinkVisitor final : public VNVisitor {
                 // Public variable at the lower module end - we need to make sure we propagate
                 // the logic changes up and down; if we aliased, we might
                 // remove the change detection on the output variable.
-                UINFO(9, "public pin assign: " << exprvarrefp << endl);
+                UINFO(9, "public pin assign: " << exprvarrefp);
                 UASSERT_OBJ(!nodep->isNonOutput(), nodep, "Outputs only - inputs use AssignAlias");
                 m_modp->addStmtsp(new AstAssignW{flp, exprvarrefp->cloneTree(false),
                                                  new AstVarRef{flp, nodep, VAccess::READ}});
@@ -304,7 +304,7 @@ class InlineRelinkVisitor final : public VNVisitor {
                 // Public variable at this end and it is an unpacked array. We need to assign
                 // instead of aliased, because otherwise it will pass V3Slice and invalid
                 // code will be emitted.
-                UINFO(9, "assign to public and unpacked: " << nodep << endl);
+                UINFO(9, "assign to public and unpacked: " << nodep);
                 exprvarrefp = exprvarrefp->cloneTree(false);
                 exprvarrefp->access(VAccess::READ);
                 nodep->user4(true);  // Making assignment to it
@@ -387,7 +387,7 @@ class InlineRelinkVisitor final : public VNVisitor {
         if (AstVarRef* const varrefp = VN_CAST(nodep->lhsp(), VarRef)) {
             if (m_initialStatic && varrefp->varp()->user2() && varrefp->varp()->user4()) {
                 // Initial assignment to i/o we are overriding, can remove
-                UINFO(9, "Remove InitialStatic " << nodep << endl);
+                UINFO(9, "Remove InitialStatic " << nodep);
                 VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                 return;
             }
@@ -438,7 +438,7 @@ class InlineRelinkVisitor final : public VNVisitor {
         if (m_renamedInterfaces.count(nodep->dotted())) {
             nodep->dotted(m_cellp->name() + "__DOT__" + nodep->dotted());
         }
-        UINFO(8, "   " << nodep << endl);
+        UINFO(8, "   " << nodep);
         iterateChildren(nodep);
     }
 
@@ -502,7 +502,7 @@ class InlineVisitor final : public VNVisitor {
 
     // METHODS
     void inlineCell(AstCell* nodep) {
-        UINFO(5, " Inline CELL   " << nodep << endl);
+        UINFO(5, " Inline CELL   " << nodep);
 
         const VNUser2InUse user2InUse;
         const VNUser3InUse user3InUse;
@@ -550,7 +550,7 @@ class InlineVisitor final : public VNVisitor {
         // Create assignments to the pins
         for (AstPin* pinp = nodep->pinsp(); pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
             if (!pinp->exprp()) continue;
-            UINFO(6, "     Pin change from " << pinp->modVarp() << endl);
+            UINFO(6, "     Pin change from " << pinp->modVarp());
 
             AstNode* const connectRefp = pinp->exprp();
             UASSERT_OBJ(VN_IS(connectRefp, Const) || VN_IS(connectRefp, VarRef), pinp,
@@ -572,8 +572,8 @@ class InlineVisitor final : public VNVisitor {
             // One to one interconnect won't make a temporary variable.
             // This prevents creating a lot of extra wires for clock signals.
             // It will become a tracing alias.
-            UINFO(6, "One-to-one " << connectRefp << endl);
-            UINFO(6, "       -to " << pinNewVarp << endl);
+            UINFO(6, "One-to-one " << connectRefp);
+            UINFO(6, "       -to " << pinNewVarp);
             pinNewVarp->user2p(connectRefp);
             // Public output inside the cell must go via an assign rather
             // than alias.  Else the public logic will set the alias, losing
@@ -648,7 +648,7 @@ public:
 // Inline class functions
 
 void V3Inline::inlineAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     {
         const VNUser1InUse m_inuser1;  // output of InlineMarkVisitor, input to InlineVisitor.
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 78551062c..a59bf55fc 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -43,7 +43,7 @@ class InstVisitor final : public VNVisitor {
 
     // VISITORS
     void visit(AstCell* nodep) override {
-        UINFO(4, "  CELL   " << nodep << endl);
+        UINFO(4, "  CELL   " << nodep);
         VL_RESTORER(m_cellp);
         m_cellp = nodep;
         // VV*****  We reset user1p() on each cell!!!
@@ -53,7 +53,7 @@ class InstVisitor final : public VNVisitor {
     void visit(AstPin* nodep) override {
         // PIN(p,expr) -> ASSIGNW(VARXREF(p),expr)    (if sub's input)
         //            or  ASSIGNW(expr,VARXREF(p))    (if sub's output)
-        UINFO(4, "   PIN  " << nodep << endl);
+        UINFO(4, "   PIN  " << nodep);
         if (!nodep->user1()) {
             // Simplify it
             V3Inst::pinReconnectSimple(nodep, m_cellp, false);
@@ -134,7 +134,7 @@ private:
     // VISITORS
     void visit(AstVar* nodep) override {
         if (VN_IS(nodep->dtypep(), IfaceRefDType)) {
-            UINFO(8, "   dm-1-VAR    " << nodep << endl);
+            UINFO(8, "   dm-1-VAR    " << nodep);
             insert(nodep);
         }
         iterateChildrenConst(nodep);
@@ -145,7 +145,7 @@ private:
 public:
     // METHODS
     void insert(AstVar* nodep) {
-        UINFO(8, "    dmINSERT    " << nodep << endl);
+        UINFO(8, "    dmINSERT    " << nodep);
         m_modVarNameMap.emplace(nodep->name(), nodep);
     }
     AstVar* find(const string& name) {
@@ -166,7 +166,7 @@ public:
     InstDeModVarVisitor() = default;
     ~InstDeModVarVisitor() override = default;
     void main(AstNodeModule* nodep) {
-        UINFO(8, "  dmMODULE    " << nodep << endl);
+        UINFO(8, "  dmMODULE    " << nodep);
         m_modVarNameMap.clear();
         iterateConst(nodep);
     }
@@ -190,12 +190,12 @@ private:
             if (VN_AS(VN_AS(nodep->dtypep(), UnpackArrayDType)->subDTypep(), IfaceRefDType)
                     ->isVirtual())
                 return;
-            UINFO(8, "   dv-vec-VAR    " << nodep << endl);
+            UINFO(8, "   dv-vec-VAR    " << nodep);
             AstUnpackArrayDType* const arrdtype = VN_AS(nodep->dtypep(), UnpackArrayDType);
             AstNode* prevp = nullptr;
             for (int i = arrdtype->lo(); i <= arrdtype->hi(); ++i) {
                 const string varNewName = nodep->name() + "__BRA__" + cvtToStr(i) + "__KET__";
-                UINFO(8, "VAR name insert " << varNewName << "  " << nodep << endl);
+                UINFO(8, "VAR name insert " << varNewName << "  " << nodep);
                 if (!m_deModVars.find(varNewName)) {
                     AstIfaceRefDType* const ifaceRefp
                         = VN_AS(arrdtype->subDTypep(), IfaceRefDType)->cloneTree(false);
@@ -224,7 +224,7 @@ private:
     }
 
     void visit(AstCell* nodep) override {
-        UINFO(4, "  CELL   " << nodep << endl);
+        UINFO(4, "  CELL   " << nodep);
         // Find submodule vars
         UASSERT_OBJ(nodep->modp(), nodep, "Unlinked");
         m_deModVars.main(nodep->modp());
@@ -256,7 +256,7 @@ private:
                 // The spec says we add [x], but that won't work in C...
                 newp->name(newp->name() + "__BRA__" + cvtToStr(instNum) + "__KET__");
                 newp->origName(newp->origName() + "__BRA__" + cvtToStr(instNum) + "__KET__");
-                UINFO(8, "    CELL loop  " << newp << endl);
+                UINFO(8, "    CELL loop  " << newp);
 
                 // If this AstCell is actually an interface instantiation, also clone the IfaceRef
                 // within the same parent module as the cell
@@ -307,19 +307,18 @@ private:
         // Any non-direct pins need reconnection with a part-select
         if (!nodep->exprp()) return;  // No-connect
         if (m_cellRangep) {
-            UINFO(4, "   PIN  " << nodep << endl);
+            UINFO(4, "   PIN  " << nodep);
             const int modwidth = nodep->modVarp()->width();
             const int expwidth = nodep->exprp()->width();
             const std::pair<uint32_t, uint32_t> pinDim
                 = nodep->modVarp()->dtypep()->dimensions(false);
             const std::pair<uint32_t, uint32_t> expDim
                 = nodep->exprp()->dtypep()->dimensions(false);
-            UINFO(4, "   PINVAR  " << nodep->modVarp() << endl);
-            UINFO(4, "   EXP     " << nodep->exprp() << endl);
+            UINFO(4, "   PINVAR  " << nodep->modVarp());
+            UINFO(4, "   EXP     " << nodep->exprp());
             UINFO(4, "   expwidth=" << expwidth << " modwidth=" << modwidth
                                     << "  expDim(p,u)=" << expDim.first << "," << expDim.second
-                                    << "  pinDim(p,u)=" << pinDim.first << "," << pinDim.second
-                                    << endl);
+                                    << "  pinDim(p,u)=" << pinDim.first << "," << pinDim.second);
             if (expDim.second == pinDim.second + 1) {
                 // Connection to array, where array dimensions match the instant dimension
                 const AstRange* const rangep
@@ -662,7 +661,7 @@ public:
                 // See also V3Inst
                 AstNodeExpr* rhsp = new AstVarRef{pinp->fileline(), newvarp, VAccess::READ};
                 UINFO(5, "pinRecon width " << pinVarp->width() << " >? " << rhsp->width() << " >? "
-                                           << pinexprp->width() << endl);
+                                           << pinexprp->width());
                 rhsp = extendOrSel(pinp->fileline(), rhsp, pinVarp);
                 pinp->exprp(new AstVarRef{newvarp->fileline(), newvarp, VAccess::WRITE});
                 AstNodeExpr* const rhsSelp = extendOrSel(pinp->fileline(), rhsp, pinexprp);
@@ -706,13 +705,13 @@ void V3Inst::checkOutputShort(AstPin* nodep) {
 // Inst class visitor
 
 void V3Inst::instAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { InstVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("inst", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3Inst::dearrayAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { InstDeVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("dearray", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 365a67e41..404f61166 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -111,7 +111,7 @@ private:
         return savedCount;
     }
     void endVisitBase(uint32_t savedCount, AstNode* nodep) {
-        UINFO(8, "cost " << std::setw(6) << std::left << m_instrCount << "  " << nodep << endl);
+        UINFO(8, "cost " << std::setw(6) << std::left << m_instrCount << "  " << nodep);
         markCost(nodep);
         if (!m_ignoreRemaining) m_instrCount += savedCount;
     }
@@ -168,13 +168,13 @@ private:
         iterateAndNextConstNull(nodep->condp());
         const uint32_t savedCount = m_instrCount;
 
-        UINFO(8, "thensp:\n");
+        UINFO(8, "thensp:");
         reset();
         iterateAndNextConstNull(nodep->thensp());
         uint32_t ifCount = m_instrCount;
         if (nodep->branchPred().unlikely()) ifCount = 0;
 
-        UINFO(8, "elsesp:\n");
+        UINFO(8, "elsesp:");
         reset();
         iterateAndNextConstNull(nodep->elsesp());
         uint32_t elseCount = m_instrCount;
@@ -197,12 +197,12 @@ private:
         iterateAndNextConstNull(nodep->condp());
         const uint32_t savedCount = m_instrCount;
 
-        UINFO(8, "?\n");
+        UINFO(8, "?");
         reset();
         iterateAndNextConstNull(nodep->thenp());
         const uint32_t ifCount = m_instrCount;
 
-        UINFO(8, ":\n");
+        UINFO(8, ":");
         reset();
         iterateAndNextConstNull(nodep->elsep());
         const uint32_t elseCount = m_instrCount;
diff --git a/src/V3Interface.cpp b/src/V3Interface.cpp
index 6364ef847..4537fab18 100644
--- a/src/V3Interface.cpp
+++ b/src/V3Interface.cpp
@@ -109,7 +109,7 @@ public:
 // Interface class functions
 
 void V3Interface::interfaceAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     { InlineIntfRefVisitor{nodep}; }
 
diff --git a/src/V3Life.cpp b/src/V3Life.cpp
index 22e6c7272..d58525ca8 100644
--- a/src/V3Life.cpp
+++ b/src/V3Life.cpp
@@ -148,7 +148,7 @@ public:
             // we just don't optimize any public sigs
             // Check the var entry, and remove if appropriate
             if (AstNodeStmt* const oldassp = entp->assignp()) {
-                UINFO(7, "       PREV: " << oldassp << endl);
+                UINFO(7, "       PREV: " << oldassp);
                 // Redundant assignment, in same level block
                 // Don't delete it now as it will confuse iteration since it maybe WAY
                 // above our current iteration point.
@@ -166,8 +166,8 @@ public:
     }
     void resetStatement(AstVarScope* nodep, AstCReset* rstp) {
         // Do we have a old assignment we can nuke?
-        UINFO(4, "     CRESETof: " << nodep << endl);
-        UINFO(7, "       new: " << rstp << endl);
+        UINFO(4, "     CRESETof: " << nodep);
+        UINFO(7, "       new: " << rstp);
         const auto pair = m_map.emplace(std::piecewise_construct,  //
                                         std::forward_as_tuple(nodep),
                                         std::forward_as_tuple(LifeVarEntry::CRESET{}, rstp));
@@ -179,8 +179,8 @@ public:
     }
     void simpleAssign(AstVarScope* nodep, AstNodeAssign* assp) {
         // Do we have a old assignment we can nuke?
-        UINFO(4, "     ASSIGNof: " << nodep << endl);
-        UINFO(7, "       new: " << assp << endl);
+        UINFO(4, "     ASSIGNof: " << nodep);
+        UINFO(7, "       new: " << assp);
         const auto pair = m_map.emplace(std::piecewise_construct,  //
                                         std::forward_as_tuple(nodep),
                                         std::forward_as_tuple(LifeVarEntry::SIMPLEASSIGN{}, assp));
@@ -191,7 +191,7 @@ public:
         // lifeDump();
     }
     void complexAssign(AstVarScope* nodep) {
-        UINFO(4, "     clearof: " << nodep << endl);
+        UINFO(4, "     clearof: " << nodep);
         const auto pair = m_map.emplace(nodep, LifeVarEntry::COMPLEXASSIGN{});
         if (!pair.second) pair.first->second.complexAssign();
     }
@@ -205,7 +205,7 @@ public:
                 if (!varrefp->varp()->isSigPublic() && !varrefp->varp()->sensIfacep()) {
                     // Aha, variable is constant; substitute in.
                     // We'll later constant propagate
-                    UINFO(4, "     replaceconst: " << varrefp << endl);
+                    UINFO(4, "     replaceconst: " << varrefp);
                     varrefp->replaceWith(constp->cloneTree(false));
                     m_replacedVref = true;
                     VL_DO_DANGLING(varrefp->deleteTree(), varrefp);
@@ -213,14 +213,14 @@ public:
                     return;  // **DONE, no longer a var reference**
                 }
             }
-            UINFO(4, "     usage: " << nodep << endl);
+            UINFO(4, "     usage: " << nodep);
             pair.first->second.consumed();
         }
     }
     void complexAssignFind(AstVarScope* nodep) {
         const auto pair = m_map.emplace(nodep, LifeVarEntry::COMPLEXASSIGN{});
         if (!pair.second) {
-            UINFO(4, "     casfind: " << pair.first->first << endl);
+            UINFO(4, "     casfind: " << pair.first->first);
             pair.first->second.complexAssign();
         }
     }
@@ -257,7 +257,7 @@ public:
             AstVarScope* const nodep = itr.first;
             if (itr.second.setBeforeUse() && nodep->user1()) {
                 // Both branches set the var, we can remove the assignment before the IF.
-                UINFO(4, "DUALBRANCH " << nodep << endl);
+                UINFO(4, "DUALBRANCH " << nodep);
                 const auto itab = m_map.find(nodep);
                 if (itab != m_map.end()) checkRemoveAssign(itab);
             }
@@ -267,12 +267,12 @@ public:
     void clear() { m_map.clear(); }
     // DEBUG
     void lifeDump() {
-        UINFO(5, "  LifeMap:" << endl);
+        UINFO(5, "  LifeMap:");
         for (const auto& itr : m_map) {
-            UINFO(5, "     Ent:  " << (itr.second.setBeforeUse() ? "[F]  " : "     ") << itr.first
-                                   << endl);
+            UINFO(5,
+                  "     Ent:  " << (itr.second.setBeforeUse() ? "[F]  " : "     ") << itr.first);
             if (itr.second.assignp()) {  //
-                UINFO(5, "       Ass: " << itr.second.assignp() << endl);
+                UINFO(5, "       Ass: " << itr.second.assignp());
             }
         }
     }
@@ -363,7 +363,7 @@ class LifeVisitor final : public VNVisitor {
 
     //---- Track control flow changes
     void visit(AstNodeIf* nodep) override {
-        UINFO(4, "   IF " << nodep << endl);
+        UINFO(4, "   IF " << nodep);
         // Condition is part of PREVIOUS block
         iterateAndNextNull(nodep->condp());
         LifeBlock* const prevLifep = m_lifep;
@@ -378,7 +378,7 @@ class LifeVisitor final : public VNVisitor {
             iterateAndNextNull(nodep->elsesp());
         }
         m_lifep = prevLifep;
-        UINFO(4, "   join " << endl);
+        UINFO(4, "   join ");
         // Find sets on both flows
         m_lifep->dualBranch(ifLifep, elseLifep);
         // For the next assignments, clear any variables that were read or written in the block
@@ -410,7 +410,7 @@ class LifeVisitor final : public VNVisitor {
             iterateAndNextNull(nodep->incsp());
         }
         m_lifep = prevLifep;
-        UINFO(4, "   joinfor" << endl);
+        UINFO(4, "   joinfor");
         // For the next assignments, clear any variables that were read or written in the block
         condLifep->lifeToAbove();
         bodyLifep->lifeToAbove();
@@ -430,13 +430,13 @@ class LifeVisitor final : public VNVisitor {
             iterateAndNextNull(nodep->stmtsp());
             m_lifep = prevLifep;
         }
-        UINFO(4, "   joinjump" << endl);
+        UINFO(4, "   joinjump");
         // For the next assignments, clear any variables that were read or written in the block
         bodyLifep->lifeToAbove();
         VL_DO_DANGLING(delete bodyLifep, bodyLifep);
     }
     void visit(AstNodeCCall* nodep) override {
-        // UINFO(4, "  CCALL " << nodep << endl);
+        // UINFO(4, "  CCALL " << nodep);
         iterateChildren(nodep);
         // Enter the function and trace it
         // else is non-inline or public function we optimize separately
@@ -448,7 +448,7 @@ class LifeVisitor final : public VNVisitor {
         }
     }
     void visit(AstCFunc* nodep) override {
-        // UINFO(4, "  CFUNC " << nodep << endl);
+        // UINFO(4, "  CFUNC " << nodep);
         if (!m_tracingCall && !nodep->entryPoint()) return;
         m_tracingCall = false;
         if (nodep->recursive()) setNoopt();
@@ -479,7 +479,7 @@ public:
     // CONSTRUCTORS
     LifeVisitor(AstNode* nodep, LifeState* statep)
         : m_statep{statep} {
-        UINFO(4, "  LifeVisitor on " << nodep << endl);
+        UINFO(4, "  LifeVisitor on " << nodep);
         {
             m_lifep = new LifeBlock{nullptr, m_statep};
             iterate(nodep);
@@ -530,7 +530,7 @@ public:
 // Life class functions
 
 void V3Life::lifeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         LifeState state;
         LifeTopVisitor{nodep, &state};
diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp
index 2a8f8792d..7a6e5b889 100644
--- a/src/V3LifePost.cpp
+++ b/src/V3LifePost.cpp
@@ -55,7 +55,7 @@ class LifePostElimVisitor final : public VNVisitor {
         const AstVarScope* const vscp = nodep->varScopep();
         UASSERT_OBJ(vscp, nodep, "Scope not assigned");
         if (AstVarScope* const newvscp = reinterpret_cast<AstVarScope*>(vscp->user4p())) {
-            UINFO(9, "  Replace " << nodep << " to " << newvscp << endl);
+            UINFO(9, "  Replace " << nodep << " to " << newvscp);
             AstVarRef* const newrefp = new AstVarRef{nodep->fileline(), newvscp, nodep->access()};
             nodep->replaceWith(newrefp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
@@ -243,7 +243,7 @@ class LifePostDlyVisitor final : public VNVisitor {
             if (!canScrunch) continue;
 
             // Delete and mark so LifePostElimVisitor will get it
-            UINFO(4, "    DELETE " << app->nodep << endl);
+            UINFO(4, "    DELETE " << app->nodep);
             dlyVarp->user4p(origVarp);
             VL_DO_DANGLING(app->nodep->unlinkFrBack()->deleteTree(), app->nodep);
             ++m_statAssnDel;
@@ -360,7 +360,7 @@ public:
 // LifePost class functions
 
 void V3LifePost::lifepostAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // Mark redundant AssignPost
     { LifePostDlyVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("life_post", 0, dumpTreeEitherLevel() >= 3);
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index b1f18ca6f..30c87c470 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -125,7 +125,7 @@ class LinkCellsVisitor final : public VNVisitor {
     }
     void newEdge(V3GraphVertex* fromp, V3GraphVertex* top, int weight, bool cuttable) {
         const V3GraphEdge* const edgep = new V3GraphEdge{&m_graph, fromp, top, weight, cuttable};
-        UINFO(9, "    newEdge " << edgep << " " << fromp->name() << " -> " << top->name() << endl);
+        UINFO(9, "    newEdge " << edgep << " " << fromp->name() << " -> " << top->name());
     }
 
     AstNodeModule* findModuleSym(const string& modName) {
@@ -186,7 +186,7 @@ class LinkCellsVisitor final : public VNVisitor {
             if (m_modp) newEdge(vertex(m_modp), vertex(nodep), 1, false);
             //
             m_modp = nodep;
-            UINFO(4, "Link Module: " << nodep << endl);
+            UINFO(4, "Link Module: " << nodep);
             if (nodep->fileline()->filebasenameNoExt() != nodep->prettyName()
                 && !v3Global.opt.isLibraryFile(nodep->fileline()->filename())
                 && !VN_IS(nodep, NotFoundModule) && !nodep->recursiveClone()
@@ -207,7 +207,7 @@ class LinkCellsVisitor final : public VNVisitor {
             const bool topMatch = (v3Global.opt.topModule() == nodep->prettyName());
             if (topMatch) {
                 m_topVertexp = vertex(nodep);
-                UINFO(2, "Link --top-module: " << nodep << endl);
+                UINFO(2, "Link --top-module: " << nodep);
                 nodep->inLibrary(false);  // Safer to make sure it doesn't disappear
             }
             if (v3Global.opt.topModule() == "" ? nodep->inLibrary()  // Library cells are lower
@@ -225,7 +225,7 @@ class LinkCellsVisitor final : public VNVisitor {
 
     void visit(AstIfaceRefDType* nodep) override {
         // Cell: Resolve its filename.  If necessary, parse it.
-        UINFO(4, "Link IfaceRef: " << nodep << endl);
+        UINFO(4, "Link IfaceRef: " << nodep);
         // Use findIdUpward instead of findIdFlat; it doesn't matter for now
         // but we might support modules-under-modules someday.
         AstNodeModule* const modp = resolveModule(nodep, nodep->ifaceName());
@@ -252,7 +252,7 @@ class LinkCellsVisitor final : public VNVisitor {
         // For historical reasons virtual interface reference variables remain VARs
         if (m_varp && !nodep->isVirtual()) m_varp->setIfaceRef();
         // Note cannot do modport resolution here; modports are allowed underneath generates
-        UINFO(4, "Link IfaceRef done: " << nodep << endl);
+        UINFO(4, "Link IfaceRef done: " << nodep);
     }
 
     void visit(AstPackageExport* nodep) override {
@@ -288,7 +288,7 @@ class LinkCellsVisitor final : public VNVisitor {
         // TODO this doesn't allow bind to dotted hier names, that would require
         // this move to post param, which would mean we do not auto-read modules
         // and means we cannot compute module levels until later.
-        UINFO(4, "Link Bind: " << nodep << endl);
+        UINFO(4, "Link Bind: " << nodep);
         AstNodeModule* const modp = resolveModule(nodep, nodep->name());
         if (modp) {
             AstNode* const cellsp = nodep->cellsp()->unlinkFrBackWithNext();
@@ -322,13 +322,13 @@ class LinkCellsVisitor final : public VNVisitor {
         nodep->user1p(m_modp);
         //
         if (!nodep->modp() || cloned) {
-            UINFO(4, "Link Cell: " << nodep << endl);
+            UINFO(4, "Link Cell: " << nodep);
             // Use findIdFallback instead of findIdFlat; it doesn't matter for now
             // but we might support modules-under-modules someday.
             AstNodeModule* cellmodp = resolveModule(nodep, nodep->modName());
             if (cellmodp) {
                 if (cellmodp == m_modp || cellmodp->user2p() == m_modp) {
-                    UINFO(1, "Self-recursive module " << cellmodp << endl);
+                    UINFO(1, "Self-recursive module " << cellmodp);
                     cellmodp->recursive(true);
                     nodep->recursive(true);
                     if (!cellmodp->recursiveClone()) {
@@ -427,7 +427,7 @@ class LinkCellsVisitor final : public VNVisitor {
                     if (ports.find(portp->name()) == ports.end()
                         && ports.find("__pinNumber" + cvtToStr(portp->pinNum())) == ports.end()) {
                         if (pinStar) {
-                            UINFO(9, "    need .* PORT  " << portp << endl);
+                            UINFO(9, "    need .* PORT  " << portp);
                             // Create any not already connected
                             AstPin* const newp = new AstPin{
                                 nodep->fileline(), 0, portp->name(),
@@ -519,7 +519,7 @@ class LinkCellsVisitor final : public VNVisitor {
         if (nodep->modp()) {  //
             iterateChildren(nodep);
         }
-        UINFO(4, " Link Cell done: " << nodep << endl);
+        UINFO(4, " Link Cell done: " << nodep);
     }
 
     void visit(AstRefDType* nodep) override {
@@ -630,6 +630,6 @@ public:
 // Link class functions
 
 void V3LinkCells::link(AstNetlist* nodep, VInFilter* filterp) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     { LinkCellsVisitor{nodep, filterp}; }
 }
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 45885310b..4ecb8d429 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -212,7 +212,7 @@ public:
         : m_syms{rootp}
         , m_mods{rootp}
         , m_step(step) {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         s_errorThisp = this;
         V3Error::errorExitCb(preErrorDumpHandler);  // If get error, dump self
         readModNames();
@@ -300,9 +300,9 @@ public:
             // Begin: ... blocks often replicate under genif/genfor, so
             // suppress duplicate checks.  See t_gen_forif.v for an example.
         } else {
-            UINFO(4, "name " << name << endl);  // Not always same as nodep->name
-            UINFO(4, "Var1 " << nodep << endl);
-            UINFO(4, "Var2 " << fnodep << endl);
+            UINFO(4, "name " << name);  // Not always same as nodep->name
+            UINFO(4, "Var1 " << nodep);
+            UINFO(4, "Var2 " << fnodep);
             if (nodep->type() == fnodep->type()) {
                 nodep->v3error("Duplicate declaration of "
                                << nodeTextType(fnodep) << ": " << AstNode::prettyNameQ(name)
@@ -324,7 +324,7 @@ public:
     void insertDUnit(AstNetlist* nodep) {
         // $unit on top scope
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
-        UINFO(9, "      INSERTdunit se" << cvtToHex(symp) << endl);
+        UINFO(9, "      INSERTdunit se" << cvtToHex(symp));
         symp->parentp(rootEntp());  // Needed so backward search can find name of top module
         symp->fallbackp(nullptr);
         rootEntp()->insert("$unit ", symp);  // Space so can never name conflict with user code
@@ -335,8 +335,7 @@ public:
     VSymEnt* insertTopCell(AstNodeModule* nodep, const string& scopename) {
         // Only called on the module at the very top of the hierarchy
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
-        UINFO(9,
-              "      INSERTtop se" << cvtToHex(symp) << "  " << scopename << " " << nodep << endl);
+        UINFO(9, "      INSERTtop se" << cvtToHex(symp) << "  " << scopename << " " << nodep);
         symp->parentp(rootEntp());  // Needed so backward search can find name of top module
         symp->fallbackp(dunitEntp());  // Needed so can find $unit stuff
         nodep->user1p(symp);
@@ -347,8 +346,7 @@ public:
     }
     VSymEnt* insertTopIface(AstCell* nodep, const string& scopename) {
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
-        UINFO(9, "      INSERTtopiface se" << cvtToHex(symp) << "  " << scopename << " " << nodep
-                                           << endl);
+        UINFO(9, "      INSERTtopiface se" << cvtToHex(symp) << "  " << scopename << " " << nodep);
         symp->parentp(rootEntp());  // Needed so backward search can find name of top module
         symp->fallbackp(dunitEntp());  // Needed so can find $unit stuff
         nodep->user1p(symp);
@@ -364,7 +362,7 @@ public:
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
         UINFO(9, "      INSERTcel se" << cvtToHex(symp) << "  " << scopename << " above=se"
                                       << cvtToHex(abovep) << " mods=se" << cvtToHex(modSymp)
-                                      << " node=" << nodep << endl);
+                                      << " node=" << nodep);
         symp->parentp(abovep);
         symp->fallbackp(dunitEntp());  // Needed so can find $unit stuff
         nodep->user1p(symp);
@@ -392,7 +390,7 @@ public:
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
         UINFO(9, "      INSERTinl se" << cvtToHex(symp) << "  " << basename << " above=se"
                                       << cvtToHex(abovep) << " mods=se" << cvtToHex(modSymp)
-                                      << " node=" << nodep << endl);
+                                      << " node=" << nodep);
         symp->parentp(abovep);
         symp->fallbackp(modSymp);
         symp->symPrefix(nodep->name() + "__DOT__");
@@ -414,8 +412,8 @@ public:
         UASSERT_OBJ(abovep, nodep, "Null symbol table inserting node");
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
         UINFO(9, "      INSERTblk se" << cvtToHex(symp) << "  above=se" << cvtToHex(abovep)
-                                      << " pkg=" << cvtToHex(classOrPackagep) << "  node=" << nodep
-                                      << endl);
+                                      << " pkg=" << cvtToHex(classOrPackagep)
+                                      << "  node=" << nodep);
         symp->parentp(abovep);
         symp->classOrPackagep(classOrPackagep);
         symp->fallbackp(abovep);
@@ -431,7 +429,7 @@ public:
         VSymEnt* const symp = new VSymEnt{&m_syms, nodep};
         UINFO(9, "      INSERTsym se" << cvtToHex(symp) << "  name='" << name << "' above=se"
                                       << cvtToHex(abovep) << " pkg=" << cvtToHex(classOrPackagep)
-                                      << "  node=" << nodep << endl);
+                                      << "  node=" << nodep);
         // We don't remember the ent associated with each node, because we
         // need a unique scope entry for each instantiation
         symp->classOrPackagep(classOrPackagep);
@@ -494,7 +492,7 @@ public:
     void computeIfaceVarSyms() {
         for (VSymEnt* varSymp : m_ifaceVarSyms) {
             AstVar* const varp = varSymp ? VN_AS(varSymp->nodep(), Var) : nullptr;
-            UINFO(9, "  insAllIface se" << cvtToHex(varSymp) << " " << varp << endl);
+            UINFO(9, "  insAllIface se" << cvtToHex(varSymp) << " " << varp);
             AstIfaceRefDType* const ifacerefp = ifaceRefFromArray(varp->subDTypep());
             UASSERT_OBJ(ifacerefp, varp, "Non-ifacerefs on list!");
             const bool varGotPort = varp && varp->user4();
@@ -509,8 +507,7 @@ public:
             if (!ifacerefp->ifaceViaCellp()) {
                 if (!ifacerefp->cellp()) {  // Probably a NotFoundModule, or a normal module if
                                             // made mistake
-                    UINFO(1, "Associated cell " << AstNode::prettyNameQ(ifacerefp->cellName())
-                                                << endl);
+                    UINFO(1, "Associated cell " << AstNode::prettyNameQ(ifacerefp->cellName()));
                     ifacerefp->v3error("Cannot find file containing interface: "
                                        << AstNode::prettyNameQ(ifacerefp->ifaceName()));
                     continue;
@@ -550,7 +547,7 @@ public:
                 bool ok = false;
                 if (foundp) {
                     if (AstModport* const modportp = VN_CAST(foundp->nodep(), Modport)) {
-                        UINFO(4, "Link Modport: " << modportp << endl);
+                        UINFO(4, "Link Modport: " << modportp);
                         ifacerefp->modportp(modportp);
                         ifOrPortSymp = foundp;
                         ok = true;
@@ -576,14 +573,14 @@ public:
         // Track and later insert scope aliases; an interface referenced by
         // a child cell connecting to that interface
         // Typically lhsp=VAR w/dtype IFACEREF, rhsp=IFACE cell
-        UINFO(9, "   insertScopeAlias se" << cvtToHex(lhsp) << " se" << cvtToHex(rhsp) << endl);
+        UINFO(9, "   insertScopeAlias se" << cvtToHex(lhsp) << " se" << cvtToHex(rhsp));
         UASSERT_OBJ(
             !(VN_IS(rhsp->nodep(), Cell) && !VN_IS(VN_AS(rhsp->nodep(), Cell)->modp(), Iface)),
             rhsp->nodep(), "Got a non-IFACE alias RHS");
         m_scopeAliasMap[samn].emplace(lhsp, rhsp);
     }
     void computeScopeAliases() {
-        UINFO(9, "computeIfaceAliases\n");
+        UINFO(9, "computeIfaceAliases");
         for (int samn = 0; samn < SAMN__MAX; ++samn) {
             for (ScopeAliasMap::iterator it = m_scopeAliasMap[samn].begin();
                  it != m_scopeAliasMap[samn].end(); ++it) {
@@ -599,8 +596,7 @@ public:
                     }
                 }
                 UINFO(9, "  iiasa: Insert alias se" << lhsp << " (" << lhsp->nodep()->typeName()
-                                                    << ") <- se" << srcp << " " << srcp->nodep()
-                                                    << endl);
+                                                    << ") <- se" << srcp << " " << srcp->nodep());
                 // srcp should be an interface reference pointing to the interface we want to
                 // import
                 lhsp->importFromIface(symsp(), srcp);
@@ -618,7 +614,7 @@ private:
         VSymEnt* findp = symp->findIdFallback(name);
         if (findp) return findp;
         if (altname != "") {
-            UINFO(8, "     alt fallback\n");
+            UINFO(8, "     alt fallback");
             findp = symp->findIdFallback(altname);
         }
         return findp;
@@ -628,7 +624,7 @@ private:
         VSymEnt* findp = symp->findIdFlat(name);
         if (findp) return findp;
         if (altname != "") {
-            UINFO(8, "     alt flat\n");
+            UINFO(8, "     alt flat");
             findp = symp->findIdFlat(altname);
         }
         return findp;
@@ -639,7 +635,7 @@ public:
                         string& baddot, VSymEnt*& okSymp, bool firstId) {
         // Given a dotted hierarchy name, return where in scope it is
         // Note when dotname=="" we just fall through and return lookupSymp
-        UINFO(8, "    dottedFind se" << cvtToHex(lookupSymp) << " '" << dotname << "'" << endl);
+        UINFO(8, "    dottedFind se" << cvtToHex(lookupSymp) << " '" << dotname << "'");
         string leftname = dotname;
         okSymp = lookupSymp;  // So can list bad scopes
         while (leftname != "") {  // foreach dotted part of xref name
@@ -664,7 +660,7 @@ public:
                 }
             }
             UINFO(8, "         id " << ident << " alt " << altIdent << " left " << leftname
-                                    << " at se" << lookupSymp << endl);
+                                    << " at se" << lookupSymp);
             // Spec says; Look at existing module (cellnames then modname),
             // then look up (inst name or modname)
             if (firstId) {
@@ -700,7 +696,7 @@ public:
                         inlinep = lookupSymp ? VN_CAST(lookupSymp->nodep(), CellInline)
                                              : nullptr;  // Replicated above
                         if (lookupSymp) {
-                            UINFO(9, "    Up to " << lookupSymp << endl);
+                            UINFO(9, "    Up to " << lookupSymp);
                             if (cellp || inlinep) crossedCell = true;
                             if ((cellp && cellp->modp()->origName() == ident)
                                 || (inlinep && inlinep->origModName() == ident)) {
@@ -710,7 +706,7 @@ public:
                                 lookupSymp = findSymp;
                                 if (crossedCell && VN_IS(lookupSymp->nodep(), Var)) {
                                     UINFO(9, "    Not found but matches var name in parent "
-                                                 << lookupSymp << endl);
+                                                 << lookupSymp);
                                     return nullptr;
                                 }
                                 break;
@@ -766,7 +762,7 @@ public:
                      << dotname << " under se" << cvtToHex(lookupSymp)
                      << ((lookupSymp->symPrefix() == "") ? "" : " as ")
                      << ((lookupSymp->symPrefix() == "") ? "" : lookupSymp->symPrefix() + dotname)
-                     << "  at se" << lookupSymp << " fallback=" << fallback << endl);
+                     << "  at se" << lookupSymp << " fallback=" << fallback);
         string prefix = lookupSymp->symPrefix();
         VSymEnt* foundp = nullptr;
         while (!foundp) {
@@ -855,7 +851,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         // because base classes are already resolved there.
         newp->isConstructor(true);
         nodep->addMembersp(newp);
-        UINFO(8, "Made implicit new for " << nodep->name() << ": " << nodep << endl);
+        UINFO(8, "Made implicit new for " << nodep->name() << ": " << nodep);
         m_statep->insertBlock(m_curSymp, newp->name(), newp, m_classOrPackagep);
     }
 
@@ -885,7 +881,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         if (!nodep->modulesp()) nodep->v3error("No top level module found");
         for (AstNodeModule* modp = nodep->modulesp(); modp && modp->level() <= 2;
              modp = VN_AS(modp->nextp(), NodeModule)) {
-            UINFO(8, "Top Module: " << modp << endl);
+            UINFO(8, "Top Module: " << modp);
             m_scope = "TOP";
 
             if (m_statep->forPrearray() && v3Global.opt.topIfacesSupported()) {
@@ -945,7 +941,7 @@ class LinkDotFindVisitor final : public VNVisitor {
     void visit(AstNodeModule* nodep) override {  // FindVisitor::
         // Called on top module from Netlist, other modules from the cell creating them,
         // and packages
-        UINFO(8, "   " << nodep << endl);
+        UINFO(8, "   " << nodep);
         // m_curSymp/m_modSymp maybe nullptr for packages and non-top modules
         // Packages will be under top after the initial phases, but until then
         // need separate handling
@@ -966,7 +962,7 @@ class LinkDotFindVisitor final : public VNVisitor {
                           "itself, without changing parameters): "
                               << AstNode::prettyNameQ(nodep->origName()));
         } else if (doit) {
-            UINFO(4, "     Link Module: " << nodep << endl);
+            UINFO(4, "     Link Module: " << nodep);
             UASSERT_OBJ(!nodep->dead(), nodep, "Module in instance tree mislabeled as dead?");
             AstPackage* const pkgp = VN_CAST(nodep, Package);
             m_classOrPackagep = pkgp;
@@ -979,7 +975,7 @@ class LinkDotFindVisitor final : public VNVisitor {
                     m_scope = nodep->name();
                     m_curSymp = m_modSymp = m_statep->insertBlock(upperSymp, nodep->name(), nodep,
                                                                   m_classOrPackagep);
-                    UINFO(9, "New module scope " << m_curSymp << endl);
+                    UINFO(9, "New module scope " << m_curSymp);
                 }
             }
             //
@@ -998,7 +994,7 @@ class LinkDotFindVisitor final : public VNVisitor {
                 m_statep->insertIfaceModSym(ifacep, m_curSymp);
             }
         } else if (isHierBlockWrapper(nodep->name())) {
-            UINFO(5, "Module is hierarchical block, must not be dead: " << nodep << endl);
+            UINFO(5, "Module is hierarchical block, must not be dead: " << nodep);
             m_scope = nodep->name();
             VSymEnt* const upperSymp = m_curSymp ? m_curSymp : m_statep->rootEntp();
             m_curSymp = m_modSymp
@@ -1007,11 +1003,11 @@ class LinkDotFindVisitor final : public VNVisitor {
             nodep->user4(true);
         } else {  // !doit
             if (nodep->hierParams()) {
-                UINFO(1, "Found module with hier type parameters" << endl);
+                UINFO(1, "Found module with hier type parameters");
                 m_hierParamsName = nodep->name();
                 for (const AstNode* stmtp = nodep->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
                     if (const AstTypedef* const tdef = VN_CAST(stmtp, Typedef)) {
-                        UINFO(1, "Inserting hier type parameter typedef: " << tdef << endl);
+                        UINFO(1, "Inserting hier type parameter typedef: " << tdef);
                         VSymEnt* const upperSymp = m_curSymp ? m_curSymp : m_statep->rootEntp();
                         m_curSymp = m_modSymp = m_statep->insertBlock(upperSymp, nodep->name(),
                                                                       nodep, m_classOrPackagep);
@@ -1020,14 +1016,14 @@ class LinkDotFindVisitor final : public VNVisitor {
             } else {
                 // Will be optimized away later
                 // Can't remove now, as our backwards iterator will throw up
-                UINFO(5, "Module not under any CELL or top - dead module: " << nodep << endl);
+                UINFO(5, "Module not under any CELL or top - dead module: " << nodep);
             }
         }
     }
 
     void visit(AstClass* nodep) override {  // FindVisitor::
         UASSERT_OBJ(m_curSymp, nodep, "Class not under module/package/$unit");
-        UINFO(8, "   " << nodep << endl);
+        UINFO(8, "   " << nodep);
         VL_RESTORER(m_scope);
         VL_RESTORER(m_classOrPackagep);
         VL_RESTORER(m_modSymp);
@@ -1038,14 +1034,14 @@ class LinkDotFindVisitor final : public VNVisitor {
         VL_RESTORER(m_modArgNum);
         VL_RESTORER(m_explicitNew);
         {
-            UINFO(4, "     Link Class: " << nodep << endl);
+            UINFO(4, "     Link Class: " << nodep);
             VSymEnt* const upperSymp = m_curSymp;
             m_scope = m_scope + "." + nodep->name();
             m_classOrPackagep = nodep;
             m_curSymp = m_modSymp
                 = m_statep->insertBlock(upperSymp, nodep->name(), nodep, m_classOrPackagep);
             m_statep->insertMap(m_curSymp, m_scope);
-            UINFO(9, "New module scope " << m_curSymp << endl);
+            UINFO(9, "New module scope " << m_curSymp);
             //
             m_paramNum = 0;
             m_modBlockNum = 0;
@@ -1072,7 +1068,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         // Ignored.  Processed in next step
     }
     void visit(AstCell* nodep) override {  // FindVisitor::
-        UINFO(5, "   CELL under " << m_scope << " is " << nodep << endl);
+        UINFO(5, "   CELL under " << m_scope << " is " << nodep);
         // Process XREFs/etc inside pins
         if (nodep->recursive() && m_inRecursion) return;
         iterateChildren(nodep);
@@ -1108,7 +1104,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         }
     }
     void visit(AstCellInline* nodep) override {  // FindVisitor::
-        UINFO(5, "   CELLINLINE under " << m_scope << " is " << nodep << endl);
+        UINFO(5, "   CELLINLINE under " << m_scope << " is " << nodep);
         VSymEnt* aboveSymp = m_curSymp;
         // If baz__DOT__foo__DOT__bar, we need to find baz__DOT__foo and add bar to it.
         const string dottedname = nodep->name();
@@ -1137,7 +1133,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstNodeBlock* nodep) override {  // FindVisitor::
-        UINFO(5, "   " << nodep << endl);
+        UINFO(5, "   " << nodep);
         if (nodep->name() == "" && nodep->unnamed()) {
             // Unnamed blocks are only important when they contain var
             // decls, so search for them. (Otherwise adding all the
@@ -1177,7 +1173,7 @@ class LinkDotFindVisitor final : public VNVisitor {
     }
     void visit(AstNodeFTask* nodep) override {  // FindVisitor::
         // NodeTask: Remember its name for later resolution
-        UINFO(5, "   " << nodep << endl);
+        UINFO(5, "   " << nodep);
         UASSERT_OBJ(m_curSymp && m_modSymp, nodep, "Function/Task not under module?");
         if (nodep->name() == "new") m_explicitNew = true;
         // Remember the existing symbol table scope
@@ -1403,8 +1399,8 @@ class LinkDotFindVisitor final : public VNVisitor {
                 && VN_IS(nodep->backp(), ClockingItem)) {
                 AstClockingItem* const itemp = VN_AS(nodep->backp(), ClockingItem);
                 AstClockingItem* const finditemp = VN_AS(findvarp->backp(), ClockingItem);
-                UINFO(4, "ClockCompl: " << itemp << " ;; " << finditemp << endl);
-                UINFO(4, "ClockCompV: " << nodep << " ;; " << findvarp << endl);
+                UINFO(4, "ClockCompl: " << itemp << " ;; " << finditemp);
+                UINFO(4, "ClockCompV: " << nodep << " ;; " << findvarp);
                 if (*itemp->exprp()->fileline() == *finditemp->exprp()->fileline()) {
                     UASSERT_OBJ(finditemp->direction() == VDirection::INPUT
                                     && itemp->direction() == VDirection::OUTPUT,
@@ -1423,9 +1419,9 @@ class LinkDotFindVisitor final : public VNVisitor {
                                << LinkDotState::nodeTextType(foundp->nodep()) << ": "
                                << nodep->prettyNameQ());
             } else if (findvarp != nodep) {
-                UINFO(4, "DupVar: " << nodep << " ;; " << foundp->nodep() << endl);
+                UINFO(4, "DupVar: " << nodep << " ;; " << foundp->nodep());
                 UINFO(4, "    found  cur=se" << cvtToHex(m_curSymp) << " ;; parent=se"
-                                             << cvtToHex(foundp->parentp()) << endl);
+                                             << cvtToHex(foundp->parentp()));
                 if (foundp->parentp() == m_curSymp  // Only when on same level
                     && !foundp->imported()) {  // and not from package
                     if (VN_IS(m_curSymp->nodep(), Clocking)) {
@@ -1509,8 +1505,8 @@ class LinkDotFindVisitor final : public VNVisitor {
                         const string svalue = v3Global.opt.parameter(nodep->name());
                         if (AstConst* const valuep
                             = AstConst::parseParamLiteral(nodep->fileline(), svalue)) {
-                            UINFO(9, "       replace parameter " << nodep << endl);
-                            UINFO(9, "       with " << valuep << endl);
+                            UINFO(9, "       replace parameter " << nodep);
+                            UINFO(9, "       with " << valuep);
                             if (nodep->valuep()) pushDeletep(nodep->valuep()->unlinkFrBack());
                             nodep->valuep(valuep);
                         }
@@ -1551,8 +1547,7 @@ class LinkDotFindVisitor final : public VNVisitor {
                     const AstTypedef* tdefp = VN_CAST(stmtp, Typedef);
 
                     if (tdefp && tdefp->name() == nodep->name() && m_statep->forPrimary()) {
-                        UINFO(8, "Replacing type of" << nodep << endl
-                                                     << " with " << tdefp << endl);
+                        UINFO(8, "Replacing type of" << nodep << "  -->with " << tdefp);
                         AstNodeDType* const newDtp = tdefp->childDTypep();
                         AstNodeDType* const oldDtp = nodep->childDTypep();
 
@@ -1589,7 +1584,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         if (!foundp) {
             ins = true;
         } else if (findvarp != nodep) {
-            UINFO(4, "DupVar: " << nodep << " ;; " << foundp << endl);
+            UINFO(4, "DupVar: " << nodep << " ;; " << foundp);
             if (foundp->parentp() == m_curSymp  // Only when on same level
                 && !foundp->imported()) {  // and not from package
                 nodep->v3error("Duplicate declaration of enum value: "
@@ -1616,7 +1611,7 @@ class LinkDotFindVisitor final : public VNVisitor {
         if (ins) m_statep->insertSym(m_curSymp, nodep->name(), nodep, m_classOrPackagep);
     }
     void visit(AstPackageImport* nodep) override {  // FindVisitor::
-        UINFO(4, "  Link: " << nodep << endl);
+        UINFO(4, "  Link: " << nodep);
         if (!nodep->packagep()) return;  // Errored in V3LinkCells
         VSymEnt* const srcp = m_statep->getNodeSym(nodep->packagep());
         if (nodep->name() == "*") {
@@ -1631,11 +1626,11 @@ class LinkDotFindVisitor final : public VNVisitor {
             if (!impp) nodep->v3error("Import object not found: " << nodep->prettyPkgNameQ());
         }
         m_curSymp->importFromPackage(m_statep->symsp(), srcp, nodep->name());
-        UINFO(9, "    Link Done: " << nodep << endl);
+        UINFO(9, "    Link Done: " << nodep);
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
     void visit(AstPackageExport* nodep) override {  // FindVisitor::
-        UINFO(9, "  Link: " << nodep << endl);
+        UINFO(9, "  Link: " << nodep);
         if (!nodep->packagep()) return;  // Errored in V3LinkCells
         VSymEnt* const srcp = m_statep->getNodeSym(nodep->packagep());
         if (nodep->name() != "*") {
@@ -1646,11 +1641,11 @@ class LinkDotFindVisitor final : public VNVisitor {
             }
         }
         m_curSymp->exportFromPackage(m_statep->symsp(), srcp, nodep->name());
-        UINFO(9, "    Link Done: " << nodep << endl);
+        UINFO(9, "    Link Done: " << nodep);
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
     void visit(AstPackageExportStarStar* nodep) override {  // FindVisitor::
-        UINFO(4, "  Link: " << nodep << endl);
+        UINFO(4, "  Link: " << nodep);
         m_curSymp->exportStarStar(m_statep->symsp());
         // No longer needed, but can't delete until any multi-instantiated modules are expanded
     }
@@ -1764,7 +1759,7 @@ public:
     // CONSTRUCTORS
     LinkDotFindVisitor(AstNetlist* rootp, LinkDotState* statep)
         : m_statep{statep} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(rootp);
     }
     ~LinkDotFindVisitor() override = default;
@@ -1799,7 +1794,7 @@ class LinkDotFindIfaceVisitor final : public VNVisitor {
     // VISITORS
     void visit(AstRefDType* nodep) override {  // FindIfaceVisitor::
         if (m_statep->forPrimary() && !nodep->classOrPackagep()) {
-            UINFO(9, "  FindIfc: " << nodep << endl);
+            UINFO(9, "  FindIfc: " << nodep);
             // If under a var, ignore the var itself as might be e.g. "intf intf;"
             // Critical tests:
             //   t_interface_param_genblk.v  // Checks this does make interface
@@ -1812,7 +1807,7 @@ class LinkDotFindIfaceVisitor final : public VNVisitor {
                 // --debugi-V3LinkDot 9 Passes with this commented out:
                 if (foundp) foundNodep = foundp->nodep();
                 if (!foundNodep) foundNodep = m_statep->findModuleSym(nodep->name());
-                if (foundNodep) UINFO(9, "    Ifc foundNodep " << foundNodep << endl);
+                if (foundNodep) UINFO(9, "    Ifc foundNodep " << foundNodep);
                 if (AstIface* const defp = VN_CAST(foundNodep, Iface)) {
                     // Must be found as module name, and not hidden/ by normal symbol (foundp)
                     AstIfaceRefDType* const newp
@@ -1821,7 +1816,7 @@ class LinkDotFindIfaceVisitor final : public VNVisitor {
                         newp->addParamsp(nodep->paramsp()->unlinkFrBackWithNext());
                     newp->ifacep(defp);
                     newp->user1u(nodep->user1u());
-                    UINFO(9, "    Resolved interface " << nodep << "  =>  " << defp << endl);
+                    UINFO(9, "    Resolved interface " << nodep << "  =>  " << defp);
                     nodep->replaceWith(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     return;
@@ -1838,7 +1833,7 @@ class LinkDotFindIfaceVisitor final : public VNVisitor {
         if (ifacerefp && m_statep->existsNodeSym(nodep)) {
             // Can't resolve until interfaces and modport names are
             // known; see notes at top
-            UINFO(9, "  FindIfc Var IfaceRef " << ifacerefp << endl);
+            UINFO(9, "  FindIfc Var IfaceRef " << ifacerefp);
             if (!ifacerefp->isVirtual()) nodep->setIfaceRef();
             VSymEnt* const symp = m_statep->getNodeSym(nodep);
             m_statep->insertIfaceVarSym(symp);
@@ -1850,7 +1845,7 @@ public:
     // CONSTRUCTORS
     LinkDotFindIfaceVisitor(AstNetlist* rootp, LinkDotState* statep)
         : m_statep{statep} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(rootp);
     }
     ~LinkDotFindIfaceVisitor() override = default;
@@ -1894,9 +1889,9 @@ class LinkDotParamVisitor final : public VNVisitor {
     void visit(AstTypeTable*) override {}  // ParamVisitor::
     void visit(AstConstPool*) override {}  // ParamVisitor::
     void visit(AstNodeModule* nodep) override {  // ParamVisitor::
-        UINFO(5, "   " << nodep << endl);
+        UINFO(5, "   " << nodep);
         if ((nodep->dead() || !nodep->user4()) && !nodep->hierParams()) {
-            UINFO(4, "Mark dead module " << nodep << endl);
+            UINFO(4, "Mark dead module " << nodep);
             UASSERT_OBJ(m_statep->forPrearray(), nodep,
                         "Dead module persisted past where should have removed");
             // Don't remove now, because we may have a tree of
@@ -1932,7 +1927,7 @@ class LinkDotParamVisitor final : public VNVisitor {
         } else {
             AstNodeExpr* const exprp = nodep->rhsp()->unlinkFrBack();
             UINFO(9, "Defparam cell " << nodep->path() << "." << nodep->name() << " attach-to "
-                                      << cellp << "  <= " << exprp << endl);
+                                      << cellp << "  <= " << exprp);
             // Don't need to check the name of the defparam exists.  V3Param does.
             AstPin* const pinp = new AstPin{nodep->fileline(),
                                             -1,  // Pin# not relevant
@@ -2010,7 +2005,7 @@ class LinkDotParamVisitor final : public VNVisitor {
                 UASSERT(m_statep->forPrimary(), "Param types should have been resolved");
                 nodep->classOrPackageNodep(VN_AS(foundp->nodep(), ParamTypeDType));
             } else {
-                if (foundp) UINFO(1, "found nodep = " << foundp->nodep() << endl);
+                if (foundp) UINFO(1, "found nodep = " << foundp->nodep());
                 nodep->v3error(
                     "Forward typedef used as class/package does not resolve to class/package: "
                     << nodep->prettyNameQ() << '\n'
@@ -2051,7 +2046,7 @@ public:
     // CONSTRUCTORS
     LinkDotParamVisitor(AstNetlist* rootp, LinkDotState* statep)
         : m_statep{statep} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(rootp);
     }
     ~LinkDotParamVisitor() override = default;
@@ -2073,7 +2068,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
     }
     void visit(AstConstPool*) override {}  // ScopeVisitor::
     void visit(AstScope* nodep) override {  // ScopeVisitor::
-        UINFO(8, "  SCOPE " << nodep << endl);
+        UINFO(8, "  SCOPE " << nodep);
         UASSERT_OBJ(m_statep->forScopeCreation(), nodep,
                     "Scopes should only exist right after V3Scope");
         // Using the CELL names, we created all hierarchy.  We now need to match this Scope
@@ -2089,12 +2084,12 @@ class LinkDotScopeVisitor final : public VNVisitor {
             VSymEnt* const varSymp
                 = m_statep->insertSym(m_modSymp, nodep->varp()->name(), nodep, nullptr);
             if (nodep->varp()->isIfaceRef() && nodep->varp()->isIfaceParent()) {
-                UINFO(9, "Iface parent ref var " << nodep->varp()->name() << " " << nodep << endl);
+                UINFO(9, "Iface parent ref var " << nodep->varp()->name() << " " << nodep);
                 // Find the interface cell the var references
                 AstIfaceRefDType* const dtypep
                     = LinkDotState::ifaceRefFromArray(nodep->varp()->dtypep());
                 UASSERT_OBJ(dtypep, nodep, "Non AstIfaceRefDType on isIfaceRef() var");
-                UINFO(9, "Iface parent dtype " << dtypep << endl);
+                UINFO(9, "Iface parent dtype " << dtypep);
                 const string ifcellname = dtypep->cellName();
                 string baddot;
                 VSymEnt* okSymp;
@@ -2104,7 +2099,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
                     cellSymp, nodep,
                     "No symbol for interface instance: " << nodep->prettyNameQ(ifcellname));
                 UINFO(5, "       Found interface instance: se" << cvtToHex(cellSymp) << " "
-                                                               << cellSymp->nodep() << endl);
+                                                               << cellSymp->nodep());
                 if (dtypep->modportName() != "") {
                     VSymEnt* const mpSymp = m_statep->findDotted(
                         nodep->fileline(), m_modSymp, ifcellname, baddot, okSymp, false);
@@ -2113,7 +2108,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
                                     << nodep->prettyNameQ(dtypep->modportName()));
                     cellSymp = mpSymp;
                     UINFO(5, "       Found modport cell: se" << cvtToHex(cellSymp) << " "
-                                                             << mpSymp->nodep() << endl);
+                                                             << mpSymp->nodep());
                 }
                 // Interface reference; need to put whole thing into
                 // symtable, but can't clone it now as we may have a later
@@ -2151,7 +2146,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstAssignVarScope* nodep) override {  // ScopeVisitor::
-        UINFO(5, "ASSIGNVARSCOPE  " << nodep << endl);
+        UINFO(5, "ASSIGNVARSCOPE  " << nodep);
         if (debug() >= 9) nodep->dumpTree("-    avs: ");
         VSymEnt* rhsSymp;
         {
@@ -2176,12 +2171,11 @@ class LinkDotScopeVisitor final : public VNVisitor {
             }
             if (!symp) {
                 UINFO(9, "No symbol for interface alias rhs ("
-                             << std::string{refp ? "VARREF " : "VARXREF "} << scopename << ")"
-                             << endl);
+                             << std::string{refp ? "VARREF " : "VARXREF "} << scopename << ")");
             }
             UASSERT_OBJ(symp, nodep, "No symbol for interface alias rhs");
             UINFO(5, "       Found a linked scope RHS: " << scopename << "  se" << cvtToHex(symp)
-                                                         << " " << symp->nodep() << endl);
+                                                         << " " << symp->nodep());
             rhsSymp = symp;
         }
         VSymEnt* lhsSymp;
@@ -2199,7 +2193,7 @@ class LinkDotScopeVisitor final : public VNVisitor {
                                                        scopename, baddot, okSymp, false);
             UASSERT_OBJ(symp, nodep, "No symbol for interface alias lhs");
             UINFO(5, "       Found a linked scope LHS: " << scopename << "  se" << cvtToHex(symp)
-                                                         << " " << symp->nodep() << endl);
+                                                         << " " << symp->nodep());
             lhsSymp = symp;
         }
         // Remember the alias - can't do it yet because we may have additional symbols to be added,
@@ -2218,7 +2212,7 @@ public:
     // CONSTRUCTORS
     LinkDotScopeVisitor(AstNetlist* rootp, LinkDotState* statep)
         : m_statep{statep} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(rootp);
     }
     ~LinkDotScopeVisitor() override = default;
@@ -2235,7 +2229,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
     // VISITORS
     void visit(AstModport* nodep) override {  // IfaceVisitor::
         // Modport: Remember its name for later resolution
-        UINFO(5, "   fiv: " << nodep << endl);
+        UINFO(5, "   fiv: " << nodep);
         VL_RESTORER(m_curSymp);
         {
             // Create symbol table for the vars
@@ -2245,7 +2239,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
         }
     }
     void visit(AstModportFTaskRef* nodep) override {  // IfaceVisitor::
-        UINFO(5, "   fif: " << nodep << endl);
+        UINFO(5, "   fif: " << nodep);
         iterateChildren(nodep);
         if (nodep->isExport()) nodep->v3warn(E_UNSUPPORTED, "Unsupported: modport export");
         VSymEnt* const symp = m_curSymp->findIdFallback(nodep->name());
@@ -2268,7 +2262,7 @@ class LinkDotIfaceVisitor final : public VNVisitor {
         }
     }
     void visit(AstModportVarRef* nodep) override {  // IfaceVisitor::
-        UINFO(5, "   fiv: " << nodep << endl);
+        UINFO(5, "   fiv: " << nodep);
         iterateChildren(nodep);
         VSymEnt* const symp = m_curSymp->findIdFallback(nodep->name());
         if (!symp) {
@@ -2299,7 +2293,7 @@ public:
     LinkDotIfaceVisitor(AstIface* nodep, VSymEnt* curSymp, LinkDotState* statep)
         : m_statep{statep}
         , m_curSymp{curSymp} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(nodep);
     }
     ~LinkDotIfaceVisitor() override = default;
@@ -2480,7 +2474,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void checkNoDot(AstNode* nodep) {
         if (VL_UNLIKELY(m_ds.m_dotPos != DP_NONE)) {
-            UINFO(9, indent() << "ds=" << m_ds.ascii() << endl);
+            UINFO(9, indent() << "ds=" << m_ds.ascii());
             nodep->v3error("Syntax error: Not expecting "
                            << nodep->type() << " under a " << nodep->backp()->type()
                            << " in dotted expression\n"
@@ -2539,11 +2533,10 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void importDerivedClass(AstClass* derivedClassp, VSymEnt* baseSymp, AstClass* baseClassp) {
         // Also used for standard 'extends' from a base class
-        UINFO(8, indent() << "importDerivedClass to " << derivedClassp << " from " << baseClassp
-                          << endl);
+        UINFO(8, indent() << "importDerivedClass to " << derivedClassp << " from " << baseClassp);
         for (VSymEnt::const_iterator it = baseSymp->begin(); it != baseSymp->end(); ++it) {
             if (AstNode* baseSubp = it->second->nodep()) {
-                UINFO(8, indent() << "  SymFunc " << baseSubp << endl);
+                UINFO(8, indent() << "  SymFunc " << baseSubp);
                 const string impOrExtends
                     = baseClassp->isInterfaceClass() ? " implements " : " extends ";
                 if (VN_IS(baseSubp, NodeFTask)) {
@@ -2670,7 +2663,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstNodeModule* nodep) override {
         if (nodep->dead()) return;
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
+        UINFO(8, indent() << "visit " << nodep);
         checkNoDot(nodep);
         m_ds.init(m_curSymp);
         m_ds.m_dotSymp = m_curSymp = m_modSymp
@@ -2684,7 +2677,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void visit(AstScope* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
+        UINFO(8, indent() << "visit " << nodep);
         checkNoDot(nodep);
         VL_RESTORER(m_modSymp);
         VL_RESTORER(m_curSymp);
@@ -2703,7 +2696,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstCell* nodep) override {
         // Cell: Recurse inside or cleanup not founds
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         VL_RESTORER(m_usedPins);
         m_usedPins.clear();
@@ -2723,7 +2716,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             // instantiator's symbols
             else {
                 m_pinSymp = m_statep->getNodeSym(nodep->modp());
-                UINFO(4, indent() << "(Backto) visit " << nodep << endl);
+                UINFO(4, indent() << "(Backto) visit " << nodep);
                 // if (debug()) nodep->dumpTree("-  linkcell: ");
                 // if (debug()) nodep->modp()->dumpTree("-  linkcemd: ");
                 iterateChildren(nodep);
@@ -2735,7 +2728,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstClassRefDType* nodep) override {
         // Cell: Recurse inside or cleanup not founds
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         VL_RESTORER(m_usedPins);
         m_usedPins.clear();
@@ -2746,7 +2739,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         {
             // ClassRef's have pins, so track
             m_pinSymp = m_statep->getNodeSym(nodep->classp());
-            UINFO(4, indent() << "(Backto) visit " << nodep << endl);
+            UINFO(4, indent() << "(Backto) visit " << nodep);
             // if (debug()) nodep->dumpTree("-  linkcell: ");
             // if (debug()) nodep->modp()->dumpTree("-  linkcemd: ");
             iterateChildren(nodep);
@@ -2823,8 +2816,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
         // Dot(Dot(Dot(ParseRef(text), ...
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
-        UINFO(8, indent() << m_ds.ascii() << endl);
+        UINFO(8, indent() << "visit " << nodep);
+        UINFO(8, indent() << m_ds.ascii());
         const DotStates lastStates = m_ds;
         const bool start = (m_ds.m_dotPos == DP_NONE);  // Save, as m_dotp will be changed
         VL_RESTORER(m_randSymp);
@@ -2843,7 +2836,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     m_ds.m_dotErr = true;
                 } else {
                     m_ds.m_dotSymp = classSymp;
-                    UINFO(8, indent() << "this. " << m_ds.ascii() << endl);
+                    UINFO(8, indent() << "this. " << m_ds.ascii());
                 }
             } else if (VN_IS(nodep->lhsp(), ParseRef) && nodep->lhsp()->name() == "super") {
                 const VSymEnt* classSymp = getThisClassSymp();
@@ -2859,22 +2852,22 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     } else {
                         if (m_statep->forPrimary()
                             && m_extendsParam.find(classp) != m_extendsParam.end()) {
-                            UINFO(9, indent() << "deferring until post-V3Param: " << nodep->lhsp()
-                                              << endl);
+                            UINFO(9, indent()
+                                         << "deferring until post-V3Param: " << nodep->lhsp());
                             m_ds.m_unresolvedClass = true;
                         } else {
                             const auto baseClassp = cextp->classp();
                             UASSERT_OBJ(baseClassp, nodep, "Bad superclass");
                             m_ds.m_dotSymp = m_statep->getNodeSym(baseClassp);
                             m_ds.m_super = true;
-                            UINFO(8, indent() << "super. " << m_ds.ascii() << endl);
+                            UINFO(8, indent() << "super. " << m_ds.ascii());
                         }
                     }
                 }
             } else if (AstClassOrPackageRef* const lhsp
                        = VN_CAST(nodep->lhsp(), ClassOrPackageRef)) {
                 // m_ds.m_dotText communicates the cell prefix between stages
-                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep);
                 iterateAndNextNull(lhsp);
                 if (!lhsp->classOrPackageSkipp() && lhsp->name() != "local::") {
                     revisitLater(nodep);
@@ -2894,10 +2887,10 @@ class LinkDotResolveVisitor final : public VNVisitor {
                         m_ds.m_dotSymp = m_statep->getNodeSym(classOrPackageNodep);
                     }
                 }
-                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep);
             } else if (VN_IS(nodep->lhsp(), Dot) && VN_AS(nodep->lhsp(), Dot)->colon()) {
                 // m_ds.m_dotText communicates the cell prefix between stages
-                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep);
                 m_ds.m_dotPos = DP_PACKAGE;
                 iterateAndNextNull(nodep->lhsp());
                 // nodep->lhsp() may be a new node
@@ -2923,17 +2916,17 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     }
                     return;
                 }
-                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep);
             } else {
                 m_ds.m_dotPos = DP_FIRST;
-                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.lhs   " << m_ds.ascii() << " " << nodep);
                 iterateAndNextNull(nodep->lhsp());
-                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.ldone " << m_ds.ascii() << " " << nodep);
                 // if (debug() >= 9) nodep->dumpTree("-  dot-lho: ");
             }
             if (m_statep->forPrimary() && isParamedClassRef(nodep->lhsp())) {
                 // Dots of paramed classes will be linked after deparameterization
-                UINFO(9, indent() << "deferring until post-V3Param: " << nodep->lhsp() << endl);
+                UINFO(9, indent() << "deferring until post-V3Param: " << nodep->lhsp());
                 m_ds.m_unresolvedClass = true;
             }
             if (m_ds.m_unresolvedCell
@@ -2945,10 +2938,10 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 // Top 'final' dot RHS is final RHS, else it's a
                 // DOT(DOT(x,*here*),real-rhs) which we consider a RHS
                 if (start && m_ds.m_dotPos == DP_SCOPE) m_ds.m_dotPos = DP_FINAL;
-                UINFO(8, indent() << "iter.rhs   " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.rhs   " << m_ds.ascii() << " " << nodep);
                 // m_ds.m_dotSymp points at lhsp()'s symbol table, so resolve RHS under that
                 iterateAndNextNull(nodep->rhsp());
-                UINFO(8, indent() << "iter.rdone " << m_ds.ascii() << " " << nodep << endl);
+                UINFO(8, indent() << "iter.rdone " << m_ds.ascii() << " " << nodep);
                 // if (debug() >= 9) nodep->dumpTree("-  dot-rho: ");
             }
             if (!m_ds.m_unresolvedClass) {
@@ -2981,7 +2974,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             m_ds.m_dotp = lastStates.m_dotp;
             m_ds.m_unresolvedClass |= unresolvedClass;
         }
-        UINFO(8, indent() << "done " << m_ds.ascii() << " " << nodep << endl);
+        UINFO(8, indent() << "done " << m_ds.ascii() << " " << nodep);
     }
     void visit(AstSenItem* nodep) override {
         LINKDOT_VISIT_START();
@@ -2994,8 +2987,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
         if (nodep->varrefp()) return;  // only do this mapping once
         // If we have a TEXT token as our key, lookup if it's a LPARAM
         if (AstText* const textp = VN_CAST(nodep->keyp(), Text)) {
-            UINFO(9, indent() << "visit " << nodep << endl);
-            UINFO(9, indent() << "      " << textp << endl);
+            UINFO(9, indent() << "visit " << nodep);
+            UINFO(9, indent() << "      " << textp);
             // Lookup
             if (VSymEnt* const foundp = m_curSymp->findIdFallback(textp->text())) {
                 if (AstVar* const varp = VN_CAST(foundp->nodep(), Var)) {
@@ -3005,14 +2998,14 @@ class LinkDotResolveVisitor final : public VNVisitor {
                             new AstVarRef{nodep->fileline(),
                                           foundp->imported() ? foundp->classOrPackagep() : nullptr,
                                           varp, VAccess::READ});
-                        UINFO(9, indent() << " new " << nodep->varrefp() << endl);
+                        UINFO(9, indent() << " new " << nodep->varrefp());
                     }
                 }
                 if (AstEnumItem* const itemp = VN_CAST(foundp->nodep(), EnumItem)) {
                     // Attach enum item value to PatMember
                     nodep->varrefp(
                         new AstEnumItemRef{nodep->fileline(), itemp, foundp->classOrPackagep()});
-                    UINFO(9, indent() << " new " << itemp << endl);
+                    UINFO(9, indent() << " new " << itemp);
                 }
             }
         }
@@ -3021,8 +3014,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstParseRef* nodep) override {
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(9, indent() << "visit " << nodep << endl);
-        UINFO(9, indent() << m_ds.ascii() << endl);
+        UINFO(9, indent() << "visit " << nodep);
+        UINFO(9, indent() << m_ds.ascii());
         if (m_ds.m_unresolvedClass) return;
         // m_curSymp is symbol table of outer expression
         // m_ds.m_dotSymp is symbol table relative to "."'s above now
@@ -3095,7 +3088,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 allowVar = true;
                 allowFTask = true;
                 staticAccess = true;
-                UINFO(9, "chk pkg " << m_ds.ascii() << " lhsp=" << m_ds.m_dotp->lhsp() << endl);
+                UINFO(9, "chk pkg " << m_ds.ascii() << " lhsp=" << m_ds.m_dotp->lhsp());
                 UASSERT_OBJ(VN_IS(m_ds.m_dotp->lhsp(), ClassOrPackageRef), m_ds.m_dotp->lhsp(),
                             "Bad package link");
                 AstClassOrPackageRef* const cpackagerefp
@@ -3130,7 +3123,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 expectWhat = "variable";
                 allowVar = true;
             } else {
-                UINFO(1, "ds=" << m_ds.ascii() << endl);
+                UINFO(1, "ds=" << m_ds.ascii());
                 nodep->v3fatalSrc("Unhandled VParseRefExp");
             }
             // Lookup
@@ -3154,7 +3147,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                         VL_DO_DANGLING(pushDeletep(nodep), nodep);
                         return;
                     }
-                    UINFO(9, indent() << "randomize-with fromSym " << foundp->nodep() << endl);
+                    UINFO(9, indent() << "randomize-with fromSym " << foundp->nodep());
                     AstLambdaArgRef* const lambdaRefp
                         = new AstLambdaArgRef{nodep->fileline(), "item", false};
                     nodep->replaceWith(new AstMemberSel{nodep->fileline(), lambdaRefp,
@@ -3173,7 +3166,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             }
             if (foundp) {
                 UINFO(9, indent() << "found=se" << cvtToHex(foundp) << "  exp=" << expectWhat
-                                  << "  n=" << foundp->nodep() << endl);
+                                  << "  n=" << foundp->nodep());
             }
             // What fell out?
             bool ok = false;
@@ -3212,7 +3205,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                         m_ds.m_dotText = VString::dot(m_ds.m_dotText, ".", nodep->name());
                         m_ds.m_dotSymp = foundp;
                         m_ds.m_dotPos = DP_SCOPE;
-                        UINFO(9, indent() << " cell -> iface varref " << foundp->nodep() << endl);
+                        UINFO(9, indent() << " cell -> iface varref " << foundp->nodep());
                         AstNode* const newp
                             = new AstVarRef{nodep->fileline(), ifaceRefVarp, VAccess::READ};
                         nodep->replaceWith(newp);
@@ -3239,8 +3232,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (ifacerefp && varp->isIfaceRef()) {
                     UASSERT_OBJ(ifacerefp->ifaceViaCellp(), ifacerefp, "Unlinked interface");
                     // Really this is a scope reference into an interface
-                    UINFO(9, indent()
-                                 << "varref-ifaceref " << m_ds.m_dotText << "  " << nodep << endl);
+                    UINFO(9, indent() << "varref-ifaceref " << m_ds.m_dotText << "  " << nodep);
                     m_ds.m_dotText = VString::dot(m_ds.m_dotText, ".", nodep->name());
                     m_ds.m_dotSymp = m_statep->getNodeSym(ifacerefp->ifaceViaCellp());
                     m_ds.m_dotPos = DP_SCOPE;
@@ -3274,8 +3266,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                 refp->dotted(dotted.substr(0, pos));
                                 newp = refp;
                             } else {
-                                UINFO(9, indent()
-                                             << "deferring until post-V3Param: " << refp << endl);
+                                UINFO(9, indent() << "deferring until post-V3Param: " << refp);
                                 newp = new AstUnlinkedRef{nodep->fileline(), refp, refp->name(),
                                                           m_ds.m_unlinkedScopep->unlinkFrBack()};
                                 m_ds.m_unlinkedScopep = nullptr;
@@ -3295,7 +3286,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                         refp->classOrPackagep(foundp->classOrPackagep());
                         newp = refp;
                     }
-                    UINFO(9, indent() << "new " << newp << endl);
+                    UINFO(9, indent() << "new " << newp);
                     nodep->replaceWith(newp);
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     m_ds.m_dotPos = DP_MEMBER;
@@ -3304,11 +3295,10 @@ class LinkDotResolveVisitor final : public VNVisitor {
             } else if (const AstModport* const modportp = VN_CAST(foundp->nodep(), Modport)) {
                 // A scope reference into an interface's modport (not
                 // necessarily at a pin connection)
-                UINFO(9, indent() << "cell-ref-to-modport " << m_ds.m_dotText << "  " << nodep
-                                  << endl);
-                UINFO(9, indent() << "unlinked " << m_ds.m_unlinkedScopep << endl);
-                UINFO(9, indent() << "dotSymp " << m_ds.m_dotSymp << " " << m_ds.m_dotSymp->nodep()
-                                  << endl);
+                UINFO(9, indent() << "cell-ref-to-modport " << m_ds.m_dotText << "  " << nodep);
+                UINFO(9, indent() << "unlinked " << m_ds.m_unlinkedScopep);
+                UINFO(9,
+                      indent() << "dotSymp " << m_ds.m_dotSymp << " " << m_ds.m_dotSymp->nodep());
                 // Iface was the previously dotted component
                 if (!m_ds.m_dotSymp || !VN_IS(m_ds.m_dotSymp->nodep(), Cell)
                     || !VN_AS(m_ds.m_dotSymp->nodep(), Cell)->modp()
@@ -3335,7 +3325,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     m_ds.m_dotText = VString::dot(m_ds.m_dotText, ".", nodep->name());
                     m_ds.m_dotSymp = foundp;
                     m_ds.m_dotPos = DP_SCOPE;
-                    UINFO(9, indent() << "modport -> iface varref " << foundp->nodep() << endl);
+                    UINFO(9, indent() << "modport -> iface varref " << foundp->nodep());
                     // We lose the modport name here, so we cannot detect mismatched modports.
                     AstNodeExpr* newp
                         = new AstVarRef{nodep->fileline(), ifaceRefVarp, VAccess::READ};
@@ -3343,7 +3333,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     if (cellarrayrefp) {
                         // iface[vec].modport became CellArrayRef(iface, lsb)
                         // Convert back to SelBit(iface, lsb)
-                        UINFO(9, indent() << "Array modport to SelBit " << cellarrayrefp << endl);
+                        UINFO(9, indent() << "Array modport to SelBit " << cellarrayrefp);
                         newp = new AstSelBit{cellarrayrefp->fileline(), newp,
                                              cellarrayrefp->selp()->unlinkFrBack()};
                         newp->user3(true);  // Don't process again
@@ -3445,8 +3435,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                            << " as a " << foundp->nodep()->typeName()
                                            << " but expected a " << expectWhat);
                         } else if (m_ds.m_dotText == "") {
-                            UINFO(1, "   ErrParseRef curSymp=se"
-                                         << cvtToHex(m_curSymp) << " ds=" << m_ds.ascii() << endl);
+                            UINFO(1, "   ErrParseRef curSymp=se" << cvtToHex(m_curSymp)
+                                                                 << " ds=" << m_ds.ascii());
                             const string suggest = m_statep->suggestSymFallback(
                                 m_ds.m_dotSymp, nodep->name(), VNodeMatcher{});
                             nodep->v3error(
@@ -3485,8 +3475,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
         // Class: Recurse inside or cleanup not founds
         // checkNoDot not appropriate, can be under a dot
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
-        UINFO(9, indent() << m_ds.ascii() << endl);
+        UINFO(8, indent() << "visit " << nodep);
+        UINFO(9, indent() << m_ds.ascii());
         VL_RESTORER(m_usedPins);
         m_usedPins.clear();
         UASSERT_OBJ(m_statep->forPrimary() || VN_IS(nodep->classOrPackageNodep(), ParamTypeDType)
@@ -3514,7 +3504,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             if (refClassp && !m_statep->forPrimary()) classExtendImport(refClassp);
 
             m_ds.init(m_curSymp);
-            UINFO(4, indent() << "(Backto) Link ClassOrPackageRef: " << nodep << endl);
+            UINFO(4, indent() << "(Backto) Link ClassOrPackageRef: " << nodep);
             iterateChildren(nodep);
 
             AstClass* const modClassp = VN_CAST(m_modp, Class);
@@ -3542,12 +3532,12 @@ class LinkDotResolveVisitor final : public VNVisitor {
         }
         if (m_ds.m_dotPos == DP_PACKAGE && nodep->classOrPackageSkipp()) {
             m_ds.m_dotSymp = m_statep->getNodeSym(nodep->classOrPackageSkipp());
-            UINFO(9, indent() << "set sym " << m_ds.ascii() << endl);
+            UINFO(9, indent() << "set sym " << m_ds.ascii());
         }
     }
     void visit(AstConstraint* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         if (nodep->isExternDef()) {
             if (const VSymEnt* const foundp
@@ -3573,8 +3563,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstConstraintRef* nodep) override {
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
-        UINFO(8, indent() << m_ds.ascii() << endl);
+        UINFO(8, indent() << "visit " << nodep);
+        UINFO(8, indent() << m_ds.ascii());
         // No children defined
     }
     void visit(AstVarRef* nodep) override {
@@ -3585,8 +3575,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         LINKDOT_VISIT_START();
         iterateChildren(nodep);
         if (!nodep->varp()) {
-            UINFO(9,
-                  indent() << "linkVarRef se" << cvtToHex(m_curSymp) << "  n=" << nodep << endl);
+            UINFO(9, indent() << "linkVarRef se" << cvtToHex(m_curSymp) << "  n=" << nodep);
             UASSERT_OBJ(m_curSymp, nodep, "nullptr lookup symbol table");
             VSymEnt* const foundp = m_curSymp->findIdFallback(nodep->name());
             if (AstVar* const varp
@@ -3608,11 +3597,11 @@ class LinkDotResolveVisitor final : public VNVisitor {
         // due to creating new modules, flattening, etc.
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
+        UINFO(8, indent() << "visit " << nodep);
         // No checkNoDot; created and iterated from a parseRef
         if (!m_modSymp) {
             // Module that is not in hierarchy.  We'll be dead code eliminating it later.
-            UINFO(9, "Dead module for " << nodep << endl);
+            UINFO(9, "Dead module for " << nodep);
             nodep->varp(nullptr);
         } else {
             string baddot;
@@ -3643,7 +3632,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     = foundp ? foundToVarp(foundp, nodep, nodep->access()) : nullptr;
                 nodep->varp(varp);
                 updateVarUse(nodep->varp());
-                UINFO(7, indent() << "Resolved " << nodep << endl);  // Also prints varp
+                UINFO(7, indent() << "Resolved " << nodep);  // Also prints varp
                 if (!nodep->varp()) {
                     nodep->v3error("Can't find definition of "
                                    << AstNode::prettyNameQ(baddot) << " in dotted signal: '"
@@ -3678,8 +3667,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                    << okSymp->cellErrorScopes(nodep));
                 } else {
                     while (vscp->user2p()) {  // If V3Inline aliased it, pick up the new signal
-                        UINFO(7, indent() << "Resolved pre-alias " << vscp
-                                          << endl);  // Also prints taskp
+                        UINFO(7, indent() << "Resolved pre-alias " << vscp);  // Also prints taskp
                         vscp = VN_AS(vscp->user2p(), VarScope);
                     }
                     // Convert the VarXRef to a VarRef, so we don't need
@@ -3687,12 +3675,12 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     nodep->varp(vscp->varp());
                     nodep->varScopep(vscp);
                     updateVarUse(nodep->varp());
-                    UINFO(7, indent() << "Resolved " << nodep << endl);  // Also prints taskp
+                    UINFO(7, indent() << "Resolved " << nodep);  // Also prints taskp
                     AstVarRef* const newvscp
                         = new AstVarRef{nodep->fileline(), vscp, nodep->access()};
                     nodep->replaceWith(newvscp);
                     VL_DO_DANGLING(nodep->deleteTree(), nodep);
-                    UINFO(9, indent() << "new " << newvscp << endl);  // Also prints taskp
+                    UINFO(9, indent() << "new " << newvscp);  // Also prints taskp
                 }
             }
         }
@@ -3713,7 +3701,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstMethodCall* nodep) override {
         // Created here so should already be resolved.
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         VL_RESTORER(m_ds);
         VL_RESTORER(m_randSymp);
         VL_RESTORER(m_randMethodCallp);
@@ -3776,8 +3764,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstNodeFTaskRef* nodep) override {
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(8, indent() << "visit " << nodep << endl);
-        UINFO(8, indent() << m_ds.ascii() << endl);
+        UINFO(8, indent() << "visit " << nodep);
+        UINFO(8, indent() << m_ds.ascii());
         if (m_ds.m_dotPos != DP_MEMBER || nodep->name() != "randomize") {
             // Visit arguments at the beginning.
             // They may be visitted even if the current node can't be linked now.
@@ -3850,7 +3838,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             // References into packages don't care about cell hierarchy.
         } else if (!m_modSymp) {
             // Module that is not in hierarchy.  We'll be dead code eliminating it later.
-            UINFO(9, indent() << "Dead module for " << nodep << endl);
+            UINFO(9, indent() << "Dead module for " << nodep);
             nodep->taskp(nullptr);
         } else if (nodep->dotted() == "" && nodep->taskp()) {
             // Earlier should have setup the links
@@ -3870,7 +3858,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             }
             if (nodep->classOrPackagep()) {  // Look only in specified package
                 dotSymp = m_statep->getNodeSym(nodep->classOrPackagep());
-                UINFO(8, indent() << "Override classOrPackage " << dotSymp << endl);
+                UINFO(8, indent() << "Override classOrPackage " << dotSymp);
             } else {
                 if (nodep->inlinedDots() != "") {  // Correct for current scope
                     // Dotted lookup is always relative to module, as maybe
@@ -3878,7 +3866,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     // to ignore (t_math_divw)
                     dotSymp = m_modSymp;
                     const string inl = AstNode::dedotName(nodep->inlinedDots());
-                    UINFO(8, indent() << "Inlined " << inl << endl);
+                    UINFO(8, indent() << "Inlined " << inl);
                     dotSymp = m_statep->findDotted(nodep->fileline(), dotSymp, inl, baddot, okSymp,
                                                    true);
                     if (!dotSymp) {
@@ -3895,7 +3883,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
             if (m_randSymp) {
                 VSymEnt* const foundp = m_randSymp->findIdFlat(nodep->name());
                 if (foundp && m_inWith) {
-                    UINFO(9, indent() << "randomize-with fromSym " << foundp->nodep() << endl);
+                    UINFO(9, indent() << "randomize-with fromSym " << foundp->nodep());
                     AstNodeExpr* argsp = nullptr;
                     if (nodep->pinsp()) {
                         iterateAndNextNull(nodep->pinsp());
@@ -3930,7 +3918,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 }
                 nodep->taskp(taskp);
                 nodep->classOrPackagep(foundp->classOrPackagep());
-                UINFO(7, indent() << "Resolved " << nodep << endl);  // Also prints taskp
+                UINFO(7, indent() << "Resolved " << nodep);  // Also prints taskp
             } else if (m_insideClassExtParam) {
                 // The reference may point to a method declared in a super class, which is proved
                 // by a parameter. In such a case, it can't be linked at the first stage.
@@ -3938,15 +3926,14 @@ class LinkDotResolveVisitor final : public VNVisitor {
             } else {
                 // Note ParseRef has similar error handling/message output
                 UINFO(7, indent() << "   ErrFtask curSymp=se" << cvtToHex(m_curSymp)
-                                  << " dotSymp=se" << cvtToHex(dotSymp) << endl);
+                                  << " dotSymp=se" << cvtToHex(dotSymp));
                 if (foundp) {
                     if (VN_IS(foundp->nodep(), Var) && m_ds.m_dotText == "" && m_ftaskp
                         && m_ftaskp->name() == foundp->nodep()->name()) {
                         // This is a recursive reference to the function itself, not to the var
                         nodep->taskp(m_ftaskp);
                         nodep->classOrPackagep(foundp->classOrPackagep());
-                        UINFO(7, indent() << "Resolved recursive " << nodep
-                                          << endl);  // Also prints taskp
+                        UINFO(7, indent() << "Resolved recursive " << nodep);  // Also prints taskp
                     } else {
                         nodep->v3error("Found definition of '"
                                        << m_ds.m_dotText << (m_ds.m_dotText == "" ? "" : ".")
@@ -4032,7 +4019,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         if (m_ds.m_dotPos == DP_SCOPE
             || m_ds.m_dotPos
                    == DP_FIRST) {  // Already under dot, so this is {modulepart} DOT {modulepart}
-            UINFO(9, indent() << "deferring until after a V3Param pass: " << nodep << endl);
+            UINFO(9, indent() << "deferring until after a V3Param pass: " << nodep);
             m_ds.m_dotText += "__BRA__??__KET__";
             m_ds.m_unresolvedCell = true;
             // And pass up m_ds.m_dotText
@@ -4072,7 +4059,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         AstNode* const basefromp = AstArraySel::baseFromp(nodep, false);
         if (VN_IS(basefromp, Replicate)) {
             // From {...}[...] syntax in IEEE 2017
-            if (basefromp) UINFO(9, indent() << " Related node: " << basefromp << endl);
+            if (basefromp) UINFO(9, indent() << " Related node: " << basefromp);
         } else {
             nodep->attrp(new AstAttrOf{nodep->fileline(), VAttrType::VAR_BASE,
                                        basefromp->cloneTree(false)});
@@ -4085,22 +4072,22 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void visit(AstNodeBlock* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         {
             VL_RESTORER(m_curSymp);
             VL_RESTORER(m_ds);
             if (nodep->name() != "") {
                 m_ds.m_dotSymp = m_curSymp = m_statep->getNodeSym(nodep);
-                UINFO(5, indent() << "cur=se" << cvtToHex(m_curSymp) << endl);
+                UINFO(5, indent() << "cur=se" << cvtToHex(m_curSymp));
             }
             iterateChildren(nodep);
         }
-        UINFO(5, indent() << "cur=se" << cvtToHex(m_curSymp) << endl);
+        UINFO(5, indent() << "cur=se" << cvtToHex(m_curSymp));
     }
     void visit(AstNodeFTask* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         if (nodep->isExternDef()) {
             if (const VSymEnt* const foundp
@@ -4148,7 +4135,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     if (!m_explicitSuperNewp && m_statep->forParamed()) {
                         AstNodeStmt* const superNewp
                             = addImplicitSuperNewCall(VN_AS(nodep, Func), classExtendsp);
-                        UINFO(9, "created super new " << superNewp << endl);
+                        UINFO(9, "created super new " << superNewp);
                         iterate(superNewp);
                     }
                 }
@@ -4158,13 +4145,13 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void visit(AstNodeForeach* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         symIterateChildren(nodep, m_statep->getNodeSym(nodep));
     }
     void visit(AstWith* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         VL_RESTORER(m_curSymp);
         VL_RESTORER(m_inWith);
@@ -4177,7 +4164,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void visit(AstLambdaArgRef* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         // No checknodot(nodep), visit(AstScope) will check for LambdaArgRef
         iterateChildren(nodep);
     }
@@ -4274,7 +4261,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstClass* nodep) override {
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         checkNoDot(nodep);
         AstClass* const topclassp = VN_CAST(m_modp, Class);
         if (nodep->isInterfaceClass() && topclassp && topclassp->isInterfaceClass()) {
@@ -4361,8 +4348,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     if (AstEnumItem* const aitemp = VN_CAST(itemp, EnumItem)) {
                         AstEnumItemRef* const newp = new AstEnumItemRef{
                             aitemp->fileline(), aitemp, it->second->classOrPackagep()};
-                        UINFO(8, indent() << "Class import noderef '" << it->first << "' " << newp
-                                          << endl);
+                        UINFO(8, indent()
+                                     << "Class import noderef '" << it->first << "' " << newp);
                         nodep->addMembersp(newp);
                         memberMap.insert(nodep, newp);
                     }
@@ -4375,7 +4362,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         // Resolve its reference
         if (nodep->user3SetOnce()) return;
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         if (AstNode* const cpackagep = nodep->classOrPackageOpp()) {
             if (AstClassOrPackageRef* const cpackagerefp = VN_CAST(cpackagep, ClassOrPackageRef)) {
                 iterate(cpackagerefp);
@@ -4458,7 +4445,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 return;
             } else {
                 if (foundp) {
-                    UINFO(1, "Found sym node: " << foundp->nodep() << endl);
+                    UINFO(1, "Found sym node: " << foundp->nodep());
                     nodep->v3error("Expecting a data type: " << nodep->prettyNameQ());
                 } else {
                     nodep->v3error("Can't find typedef/interface: " << nodep->prettyNameQ());
@@ -4506,17 +4493,17 @@ class LinkDotResolveVisitor final : public VNVisitor {
     }
     void visit(AstCellRef* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         iterateChildren(nodep);
     }
     void visit(AstCellArrayRef* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         // Expression already iterated
     }
     void visit(AstUnlinkedRef* nodep) override {
         LINKDOT_VISIT_START();
-        UINFO(5, indent() << "visit " << nodep << endl);
+        UINFO(5, indent() << "visit " << nodep);
         // No need to iterate, if we have a UnlinkedVarXRef, we're already done
     }
     void visit(AstStmtExpr* nodep) override {
@@ -4565,7 +4552,7 @@ public:
     // CONSTRUCTORS
     LinkDotResolveVisitor(AstNetlist* rootp, LinkDotState* statep)
         : m_statep{statep} {
-        UINFO(4, __FUNCTION__ << ": " << endl);
+        UINFO(4, __FUNCTION__ << ": ");
         iterate(rootp);
         std::map<std::string, AstNodeModule*> modulesToRevisit = std::move(m_modulesToRevisit);
         m_lastDeferredp = nullptr;
@@ -4624,25 +4611,25 @@ void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
 }
 
 void V3LinkDot::linkDotPrimary(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     linkDotGuts(nodep, LDS_PRIMARY);
     V3Global::dumpCheckGlobalTree("linkdot", 0, dumpTreeEitherLevel() >= 6);
 }
 
 void V3LinkDot::linkDotParamed(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     linkDotGuts(nodep, LDS_PARAMED);
     V3Global::dumpCheckGlobalTree("linkdotparam", 0, dumpTreeEitherLevel() >= 3);
 }
 
 void V3LinkDot::linkDotArrayed(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     linkDotGuts(nodep, LDS_ARRAYED);
     V3Global::dumpCheckGlobalTree("linkdot", 0, dumpTreeEitherLevel() >= 6);
 }
 
 void V3LinkDot::linkDotScope(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     linkDotGuts(nodep, LDS_SCOPED);
     V3Global::dumpCheckGlobalTree("linkdot", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3LinkInc.cpp b/src/V3LinkInc.cpp
index a72ff6e1c..c49a6cf47 100644
--- a/src/V3LinkInc.cpp
+++ b/src/V3LinkInc.cpp
@@ -201,7 +201,7 @@ class LinkIncVisitor final : public VNVisitor {
     void unsupported_visit(AstNode* nodep) {
         VL_RESTORER(m_unsupportedHere);
         m_unsupportedHere = true;
-        UINFO(9, "Marking unsupported " << nodep << endl);
+        UINFO(9, "Marking unsupported " << nodep);
         iterateChildren(nodep);
     }
     void visit(AstLogAnd* nodep) override { unsupported_visit(nodep); }
@@ -367,7 +367,7 @@ public:
 // Task class functions
 
 void V3LinkInc::linkIncrements(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { LinkIncVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("linkinc", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp
index 3f32a2b2c..a97d11f58 100644
--- a/src/V3LinkJump.cpp
+++ b/src/V3LinkJump.cpp
@@ -64,7 +64,7 @@ class LinkJumpVisitor final : public VNVisitor {
     // METHODS
     AstJumpLabel* findAddLabel(AstNode* nodep, bool endOfIter) {
         // Put label under given node, and if WHILE optionally at end of iteration
-        UINFO(4, "Create label for " << nodep << endl);
+        UINFO(4, "Create label for " << nodep);
         if (VN_IS(nodep, JumpLabel)) return VN_AS(nodep, JumpLabel);  // Done
 
         // Made it previously?  We always jump to the end, so this works out
@@ -113,7 +113,7 @@ class LinkJumpVisitor final : public VNVisitor {
         // see t_func_return test.
         while (underp && VN_IS(underp, Var)) underp = underp->nextp();
         UASSERT_OBJ(underp, nodep, "Break/disable/continue not under expected statement");
-        UINFO(5, "  Underpoint is " << underp << endl);
+        UINFO(5, "  Underpoint is " << underp);
 
         if (VN_IS(underp, JumpLabel)) {
             return VN_AS(underp, JumpLabel);
@@ -175,7 +175,7 @@ class LinkJumpVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstNodeBlock* nodep) override {
-        UINFO(8, "  " << nodep << endl);
+        UINFO(8, "  " << nodep);
         VL_RESTORER(m_inFork);
         VL_RESTORER(m_unrollFull);
         m_blockStack.push_back(nodep);
@@ -336,11 +336,11 @@ class LinkJumpVisitor final : public VNVisitor {
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
     void visit(AstDisable* nodep) override {
-        UINFO(8, "   DISABLE " << nodep << endl);
+        UINFO(8, "   DISABLE " << nodep);
         iterateChildren(nodep);
         AstNodeBlock* blockp = nullptr;
         for (AstNodeBlock* const stackp : vlstd::reverse_view(m_blockStack)) {
-            UINFO(9, "    UNDERBLK  " << stackp << endl);
+            UINFO(9, "    UNDERBLK  " << stackp);
             if (stackp->name() == nodep->name()) {
                 blockp = stackp;
                 break;
@@ -381,7 +381,7 @@ public:
 // Task class functions
 
 void V3LinkJump::linkJump(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { LinkJumpVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("linkjump", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index b119550f7..79a22193d 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -63,7 +63,7 @@ class LinkLValueVisitor final : public VNVisitor {
             }
             if (const AstClockingItem* const itemp
                 = VN_CAST(nodep->varp()->backp(), ClockingItem)) {
-                UINFO(5, "ClkOut " << nodep << endl);
+                UINFO(5, "ClkOut " << nodep);
                 if (itemp->outputp()) nodep->varp(itemp->outputp()->varp());
             }
             if (m_setForcedByCode) {
@@ -300,7 +300,7 @@ class LinkLValueVisitor final : public VNVisitor {
             if (nodep->varp() && nodep->access().isWriteOrRW()) {
                 if (const AstClockingItem* const itemp
                     = VN_CAST(nodep->varp()->backp(), ClockingItem)) {
-                    UINFO(5, "ClkOut " << nodep << endl);
+                    UINFO(5, "ClkOut " << nodep);
                     if (itemp->outputp()) nodep->varp(itemp->outputp()->varp());
                 }
             }
@@ -358,13 +358,13 @@ public:
 // Link class functions
 
 void V3LinkLValue::linkLValue(AstNetlist* nodep) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     { LinkLValueVisitor{nodep, VAccess::NOCHANGE}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("linklvalue", 0, dumpTreeEitherLevel() >= 6);
 }
 void V3LinkLValue::linkLValueSet(AstNode* nodep) {
     // Called by later link functions when it is known a node needs
     // to be converted to a lvalue.
-    UINFO(9, __FUNCTION__ << ": " << endl);
+    UINFO(9, __FUNCTION__ << ": ");
     { LinkLValueVisitor{nodep, VAccess::WRITE}; }
 }
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index fce12adaf..8f068d741 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -39,7 +39,7 @@ struct CmpLevel final {
 void V3LinkLevel::modSortByLevel() {
     // Sort modules by levels, root down to lowest children
     // Calculate levels again in case we added modules
-    UINFO(2, "modSortByLevel()\n");
+    UINFO(2, "modSortByLevel()");
 
     // level() was computed for us in V3LinkCells
 
@@ -77,11 +77,11 @@ void V3LinkLevel::modSortByLevel() {
 
     // Reorder the netlist's modules to have modules in level sorted order
     stable_sort(mods.begin(), mods.end(), CmpLevel());  // Sort the vector
-    UINFO(9, "modSortByLevel() sorted\n");  // Comment required for gcc4.6.3 / bug666
+    UINFO(9, "modSortByLevel() sorted");  // Comment required for gcc4.6.3 / bug666
     for (AstNodeModule* nodep : mods) nodep->unlinkFrBack();
     UASSERT_OBJ(!v3Global.rootp()->modulesp(), v3Global.rootp(), "Unlink didn't work");
     for (AstNodeModule* nodep : mods) v3Global.rootp()->addModulesp(nodep);
-    UINFO(9, "modSortByLevel() done\n");  // Comment required for gcc4.6.3 / bug666
+    UINFO(9, "modSortByLevel() done");  // Comment required for gcc4.6.3 / bug666
     V3Global::dumpCheckGlobalTree("cellsort", false, dumpTreeEitherLevel() >= 3);
 }
 
@@ -156,11 +156,11 @@ void V3LinkLevel::timescaling(const ModVec& mods) {
 // Wrapping
 
 void V3LinkLevel::wrapTop(AstNetlist* rootp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     // We do ONLY the top module
     AstNodeModule* const oldmodp = rootp->modulesp();
     if (!oldmodp) {  // Later V3LinkDot will warn
-        UINFO(1, "No module found to wrap\n");
+        UINFO(1, "No module found to wrap");
         return;
     }
 
@@ -211,7 +211,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
             if (AstVar* const oldvarp = VN_CAST(subnodep, Var)) {
                 if (oldvarp->isIO()) {
                     if (!ioNames.insert(oldvarp->name()).second) {
-                        // UINFO(8, "Multitop dup I/O found: " << oldvarp << endl);
+                        // UINFO(8, "Multitop dup I/O found: " << oldvarp);
                         dupNames.insert(oldvarp->name());
                     }
                 } else if (v3Global.opt.topIfacesSupported() && oldvarp->isIfaceRef()) {
@@ -220,7 +220,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
                         const AstIfaceRefDType* const ifacerefp = VN_AS(subtypep, IfaceRefDType);
                         if (!ifacerefp->cellp()) {
                             if (!ioNames.insert(oldvarp->name()).second) {
-                                // UINFO(8, "Multitop dup interface found: " << oldvarp << endl);
+                                // UINFO(8, "Multitop dup interface found: " << oldvarp);
                                 dupNames.insert(oldvarp->name());
                             }
                         }
@@ -233,8 +233,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
                                 = VN_AS(arrsubtypep, IfaceRefDType);
                             if (!ifacerefp->cellp()) {
                                 if (!ioNames.insert(oldvarp->name()).second) {
-                                    // UINFO(8, "Multitop dup interface array found: " << oldvarp
-                                    // << endl);
+                                    // UINFO(8, "Multitop dup interface array found: " << oldvarp);
                                     dupNames.insert(oldvarp->name());
                                 }
                             }
@@ -250,7 +249,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
          oldmodp && oldmodp->level() <= 2; oldmodp = VN_AS(oldmodp->nextp(), NodeModule)) {
         if (VN_IS(oldmodp, Package)) continue;
         // Add instance
-        UINFO(5, "LOOP " << oldmodp << endl);
+        UINFO(5, "LOOP " << oldmodp);
         AstCell* const cellp = new AstCell{
             newmodp->fileline(),
             newmodp->fileline(),
@@ -265,7 +264,7 @@ void V3LinkLevel::wrapTopCell(AstNetlist* rootp) {
         // Add pins
         for (AstNode* subnodep = oldmodp->stmtsp(); subnodep; subnodep = subnodep->nextp()) {
             if (AstVar* const oldvarp = VN_CAST(subnodep, Var)) {
-                UINFO(8, "VARWRAP " << oldvarp << endl);
+                UINFO(8, "VARWRAP " << oldvarp);
                 if (oldvarp->isIO()) {
                     string name = oldvarp->name();
                     if (dupNames.find(name) != dupNames.end()) {
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index 16050d065..cd0a309bb 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -134,9 +134,9 @@ class LinkParseVisitor final : public VNVisitor {
         FileLine* const nodeFlp = nodep->fileline();
         FileLine* const childFlp = childp->fileline();
         FileLine* const nextFlp = nextp->fileline();
-        // UINFO(0, "checkInd " << nodeFlp->firstColumn() << " " << nodep << endl);
-        // UINFO(0, "  child  " << childFlp->firstColumn() << " " << childp << endl);
-        // UINFO(0, " next    " << nextFlp->firstColumn() << " " << nextp << endl);
+        // UINFO(0, "checkInd " << nodeFlp->firstColumn() << " " << nodep);
+        // UINFO(0, "  child  " << childFlp->firstColumn() << " " << childp);
+        // UINFO(0, " next    " << nextFlp->firstColumn() << " " << nextp);
         // Same filename, later line numbers (no macro magic going on)
         if (nodeFlp->filenameno() != childFlp->filenameno()) return;
         if (nodeFlp->filenameno() != nextFlp->filenameno()) return;
@@ -231,7 +231,7 @@ class LinkParseVisitor final : public VNVisitor {
     void visit(AstNodeFTaskRef* nodep) override {
         if (!nodep->user1SetOnce()) {  // Process only once.
             cleanFileline(nodep);
-            UINFO(5, "   " << nodep << endl);
+            UINFO(5, "   " << nodep);
             VL_RESTORER(m_valueModp);
             m_valueModp = nullptr;
             iterateChildren(nodep);
@@ -498,7 +498,7 @@ class LinkParseVisitor final : public VNVisitor {
 
     void visit(AstDefImplicitDType* nodep) override {
         cleanFileline(nodep);
-        UINFO(8, "   DEFIMPLICIT " << nodep << endl);
+        UINFO(8, "   DEFIMPLICIT " << nodep);
         // Must remember what names we've already created, and combine duplicates
         // so that for "var enum {...} a,b" a & b will share a common typedef.
         // Change to unique name space per module so that an addition of
@@ -507,7 +507,7 @@ class LinkParseVisitor final : public VNVisitor {
         const ImplTypedefMap::iterator it = m_implTypedef.find(nodep->name());
         if (it != m_implTypedef.end()) {
             defp = it->second;
-            UINFO(9, "Reused impltypedef " << nodep << "  -->  " << defp << endl);
+            UINFO(9, "Reused impltypedef " << nodep << "  -->  " << defp);
         } else {
             // Definition must be inserted right after the variable (etc) that needed it
             // AstVar, AstTypedef, AstNodeFTask are common containers
@@ -532,7 +532,7 @@ class LinkParseVisitor final : public VNVisitor {
                 // Rename so that name doesn't change if a type is added/removed elsewhere
                 // But the m_implTypedef is stil by old name so we can find it for next new lookups
                 defp->name("__typeimpmod" + cvtToStr(m_implTypedef.size()));
-                UINFO(9, "New impltypedef " << defp << endl);
+                UINFO(9, "New impltypedef " << defp);
                 backp->addNextHere(defp);
             }
         }
@@ -549,7 +549,7 @@ class LinkParseVisitor final : public VNVisitor {
 
     void visit(AstNodeForeach* nodep) override {
         // FOREACH(array, loopvars, body)
-        UINFO(9, "FOREACH " << nodep << endl);
+        UINFO(9, "FOREACH " << nodep);
         cleanFileline(nodep);
         // Separate iteration vars from base from variable
         // Input:
@@ -928,7 +928,7 @@ public:
 // Link class functions
 
 void V3LinkParse::linkParse(AstNetlist* rootp) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     { LinkParseVisitor{rootp}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("linkparse", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index d1c96f131..85eb490f9 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -61,7 +61,7 @@ class LinkResolveVisitor final : public VNVisitor {
     // TODO: could move to V3LinkParse to get them out of the way of elaboration
     void visit(AstNodeModule* nodep) override {
         // Module: Create sim table for entire module and iterate
-        UINFO(8, "MODULE " << nodep << endl);
+        UINFO(8, "MODULE " << nodep);
         if (nodep->dead()) return;
         VL_RESTORER(m_modp);
         VL_RESTORER(m_senitemCvtNum);
@@ -179,7 +179,7 @@ class LinkResolveVisitor final : public VNVisitor {
     void visit(AstNodeFTaskRef* nodep) override {
         iterateChildren(nodep);
         if (AstLet* letp = VN_CAST(nodep->taskp(), Let)) {
-            UINFO(7, "letSubstitute() " << nodep << " <- " << letp << endl);
+            UINFO(7, "letSubstitute() " << nodep << " <- " << letp);
             if (letp->user2()) {
                 nodep->v3error("Recursive let substitution " << letp->prettyNameQ());
                 nodep->replaceWith(new AstConst{nodep->fileline(), AstConst::BitFalse{}});
@@ -208,7 +208,7 @@ class LinkResolveVisitor final : public VNVisitor {
                 const auto it = portToExprs.find(refp->varp());
                 if (it != portToExprs.end()) {
                     AstNodeExpr* const pinp = it->second;
-                    UINFO(9, "let pin subst " << refp << " <- " << pinp << endl);
+                    UINFO(9, "let pin subst " << refp << " <- " << pinp);
                     // Side effects are copied into pins, to match other simulators
                     refp->replaceWith(pinp->cloneTree(false));
                     VL_DO_DANGLING(pushDeletep(refp), refp);
@@ -445,7 +445,7 @@ class LinkResolveVisitor final : public VNVisitor {
     }
 
     void visit(AstUdpTable* nodep) override {
-        UINFO(5, "UDPTABLE  " << nodep << endl);
+        UINFO(5, "UDPTABLE  " << nodep);
         if (!v3Global.opt.bboxUnsup()) {
             // We don't warn until V3Inst, so that UDPs that are in libraries and
             // never used won't result in any warnings.
@@ -559,7 +559,7 @@ public:
 // Link class functions
 
 void V3LinkResolve::linkResolve(AstNetlist* rootp) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     {
         const LinkResolveVisitor visitor{rootp};
         LinkBotupVisitor{rootp};
diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp
index 43f890110..f61dd2303 100644
--- a/src/V3Localize.cpp
+++ b/src/V3Localize.cpp
@@ -93,7 +93,7 @@ class LocalizeVisitor final : public VNVisitor {
             // cannot cope with. This should be rare (introduced by V3Depth).
             if (funcps.size() > 1 && existsNonLeaf(funcps)) continue;
 
-            UINFO(4, "Localizing " << nodep << endl);
+            UINFO(4, "Localizing " << nodep);
             ++m_statLocVars;
 
             // Yank the VarScope from it's parent and schedule them for deletion. Leave the Var
@@ -138,7 +138,7 @@ class LocalizeVisitor final : public VNVisitor {
     }
 
     void visit(AstCFunc* nodep) override {
-        UINFO(4, "  CFUNC " << nodep << endl);
+        UINFO(4, "  CFUNC " << nodep);
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_nodeDepth);
         m_cfuncp = nodep;
@@ -179,7 +179,7 @@ class LocalizeVisitor final : public VNVisitor {
             && !nodep->varp()->sensIfacep()  // Not sensitive to an interface
             && !nodep->varp()->valuep()  // Does not have an initializer
         ) {
-            UINFO(4, "Consider for localization: " << nodep << endl);
+            UINFO(4, "Consider for localization: " << nodep);
             m_varScopeps.push_back(nodep);
         }
         // No iterate; Don't want varrefs under it (e.g.: in child dtype?)
@@ -202,7 +202,7 @@ class LocalizeVisitor final : public VNVisitor {
             if (nodep->access().isReadOrRW() && !varScopep->user2()) {
                 // Variable is read, but is not known to have been assigned in this function. Mark
                 // as not optimizable.
-                UINFO(4, "Not optimizable (not written): " << nodep << endl);
+                UINFO(4, "Not optimizable (not written): " << nodep);
                 varScopep->user1(1);
             }
         }
@@ -227,7 +227,7 @@ public:
 // Localize class functions
 
 void V3Localize::localizeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { LocalizeVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("localize", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index 376daa47b..52aa77532 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -645,7 +645,7 @@ class MergeCondVisitor final : public VNVisitor {
         AstNodeIf* recursivep = nullptr;
         // Merge if list is longer than one node
         if (m_mgFirstp != m_mgLastp) {
-            UINFO(6, "MergeCond - First: " << m_mgFirstp << " Last: " << m_mgLastp << endl);
+            UINFO(6, "MergeCond - First: " << m_mgFirstp << " Last: " << m_mgLastp);
             ++m_statMerges;
             if (m_listLenght > m_statLongestList) m_statLongestList = m_listLenght;
 
@@ -886,7 +886,7 @@ public:
 // MergeConditionals class functions
 
 void V3MergeCond::mergeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { MergeCondVisitor{nodep}; }
     V3Global::dumpCheckGlobalTree("merge_cond", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3Name.cpp b/src/V3Name.cpp
index bce4a577c..4402804e2 100644
--- a/src/V3Name.cpp
+++ b/src/V3Name.cpp
@@ -168,7 +168,7 @@ public:
 // Name class functions
 
 void V3Name::nameAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { NameVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("name", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index 612c0ccf6..b73ea73e9 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -1977,7 +1977,7 @@ V3Number& V3Number::opDiv(const V3Number& lhs, const V3Number& rhs) {
     // i op j, max(L(lhs),L(rhs)) bit return, if any 4-state, 4-state return
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
-    // UINFO(9, "opdiv "<<lhs<<" "<<rhs<<endl);
+    // UINFO(9, "opdiv " << lhs << " " << rhs);
     if (lhs.isFourState() || rhs.isFourState()) return setAllBitsX();
     if (rhs.isEqZero()) return setAllBitsXRemoved();
     if (lhs.width() <= 64) {
@@ -1991,7 +1991,7 @@ V3Number& V3Number::opDiv(const V3Number& lhs, const V3Number& rhs) {
 V3Number& V3Number::opDivS(const V3Number& lhs, const V3Number& rhs) {
     // Signed divide
     // Correct number of zero bits/width matters
-    // UINFO(9, ">>divs-start "<<lhs<<" "<<rhs<<endl);
+    // UINFO(9, ">>divs-start " << lhs << " " << rhs);
     NUM_ASSERT_OP_ARGS2(lhs, rhs);
     NUM_ASSERT_LOGIC_ARGS2(lhs, rhs);
     if (lhs.isFourState() || rhs.isFourState()) return setAllBitsX();
@@ -2001,13 +2001,13 @@ V3Number& V3Number::opDivS(const V3Number& lhs, const V3Number& rhs) {
     V3Number rhsNoSign = rhs;
     if (rhs.isNegative()) rhsNoSign.opNegate(rhs);
     const V3Number qNoSign = opDiv(lhsNoSign, rhsNoSign);
-    // UINFO(9, " >divs-mid "<<lhs<<" "<<rhs<<" "<<qNoSign<<endl);
+    // UINFO(9, " >divs-mid " << lhs << " " << rhs << " " << qNoSign);
     if ((lhs.isNegative() && !rhs.isNegative()) || (!lhs.isNegative() && rhs.isNegative())) {
         opNegate(qNoSign);
     } else {
         opAssign(qNoSign);
     }
-    UINFO(9, " <divs-out " << lhs << " " << rhs << " =" << *this << endl);
+    UINFO(9, " <divs-out " << lhs << " " << rhs << " =" << *this);
     return *this;
 }
 V3Number& V3Number::opModDiv(const V3Number& lhs, const V3Number& rhs) {
@@ -2055,7 +2055,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
     const int vmsbp1 = rhs.mostSetBitP1();  // divisor
     if (VL_UNLIKELY(vmsbp1 == 0)  // rwp==0 so division by zero.  Return 0.
         || VL_UNLIKELY(umsbp1 == 0)) {  // 0/x so short circuit and return 0
-        UINFO(9, "  opmoddiv-zero " << lhs << " " << rhs << " now=" << *this << endl);
+        UINFO(9, "  opmoddiv-zero " << lhs << " " << rhs << " now=" << *this);
         return *this;
     }
 
@@ -2073,7 +2073,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
                    * static_cast<uint64_t>(rhs.m_data.num()[0].m_value));
         }
         UINFO(9, "  opmoddiv-1w  " << lhs << " " << rhs << " q=" << *this << " rem=0x" << std::hex
-                                   << k << std::dec << endl);
+                                   << k << std::dec);
         if (is_modulus) {
             setZero();
             m_data.num()[0].m_value = k;
@@ -2167,11 +2167,11 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool
         }
         for (int i = vw; i < words; ++i) m_data.num()[i].m_value = 0;
         opCleanThis();
-        UINFO(9, "  opmoddiv-mod " << lhs << " " << rhs << " now=" << *this << endl);
+        UINFO(9, "  opmoddiv-mod " << lhs << " " << rhs << " now=" << *this);
         return *this;
     } else {  // division
         opCleanThis();
-        UINFO(9, "  opmoddiv-div " << lhs << " " << rhs << " now=" << *this << endl);
+        UINFO(9, "  opmoddiv-div " << lhs << " " << rhs << " now=" << *this);
         return *this;
     }
 }
@@ -2213,7 +2213,7 @@ V3Number& V3Number::opPow(const V3Number& lhs, const V3Number& rhs, bool lsign,
             V3Number lastOut(&lhs, width());
             lastOut.opAssign(*this);
             opMul(lastOut, power);
-            // UINFO(0, "pow "<<lhs<<" "<<rhs<<" b"<<bit<<" pow="<<power<<" now="<<*this<<endl);
+            // UINFO(0, "pow "<<lhs<<" "<<rhs<<" b"<<bit<<" pow="<<power<<" now="<<*this);
         }
     }
     return *this;
@@ -2349,7 +2349,7 @@ V3Number& V3Number::opSel(const V3Number& lhs, uint32_t msbval, uint32_t lsbval)
         }
         ++ibit;
     }
-    // UINFO(0,"RANGE "<<lhs<<" "<<msb<<" "<<lsb<<" = "<<*this<<endl);
+    // UINFO(0, "RANGE " << lhs << " " << msb << " " << lsb << " = " << *this);
     return *this;
 }
 
@@ -2588,7 +2588,7 @@ V3Number& V3Number::opLteN(const V3Number& lhs, const V3Number& rhs) {
 //======================================================================
 
 void V3Number::selfTest() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     FileLine* const fl = new FileLine{FileLine::builtInFilename()};
     V3Number num{fl, 32, 0};
     num.selfTestThis();
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index f2d3267f7..be8814730 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -336,7 +336,7 @@ void V3Options::addParameter(const string& paramline, bool allowPlus) {
             value = param.substr(pos + 1);
             param.erase(pos);
         }
-        UINFO(4, "Add parameter" << param << "=" << value << endl);
+        UINFO(4, "Add parameter" << param << "=" << value);
         (void)m_parameters.erase(param);
         m_parameters[param] = value;
     }
@@ -1844,7 +1844,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     parser.finalize();
 
     for (int i = 0; i < argc;) {
-        UINFO(9, " Option: " << argv[i] << endl);
+        UINFO(9, " Option: " << argv[i]);
         if (!std::strcmp(argv[i], "-j")
             || !std::strcmp(argv[i], "--j")) {  // Allow gnu -- switches
             ++i;
@@ -1896,7 +1896,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
 
 void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) VL_MT_DISABLED {
     // Read the specified -f filename and process as arguments
-    UINFO(1, "Reading Options File " << filename << endl);
+    UINFO(1, "Reading Options File " << filename);
 
     const std::unique_ptr<std::ifstream> ifp{V3File::new_ifstream(filename)};
     if (ifp->fail()) {
diff --git a/src/V3OrderParallel.cpp b/src/V3OrderParallel.cpp
index 57ab4c3c5..4111d244b 100644
--- a/src/V3OrderParallel.cpp
+++ b/src/V3OrderParallel.cpp
@@ -553,7 +553,7 @@ public:
 
     static void dumpCpFilePrefixed(const V3Graph& graph, const string& nameComment) {
         const string filename = v3Global.debugFilename(nameComment) + ".txt";
-        UINFO(1, "Writing " << filename << endl);
+        UINFO(1, "Writing " << filename);
         const std::unique_ptr<std::ofstream> ofp{V3File::new_ofstream(filename)};
         std::ostream* const osp = &(*ofp);  // &* needed to deref unique_ptr
         if (osp->fail()) v3fatalStatic("Can't write file: " << filename);
@@ -1231,8 +1231,8 @@ public:
                         v3Global.rootp()->fileline()->v3warn(
                             UNOPTTHREADS, "Thread scheduler is unable to provide requested "
                                           "parallelism; suggest asking for fewer threads.");
-                        UINFO(1, "Critical path limit was=" << oldLimit << " now=" << m_scoreLimit
-                                                            << endl);
+                        UINFO(1,
+                              "Critical path limit was=" << oldLimit << " now=" << m_scoreLimit);
                         continue;
                     }
                     // Really stop
@@ -1297,7 +1297,7 @@ public:
                 // increases from low numbers up toward cpLimit. It may be
                 // helpful to see progress during slow partitions. Maybe
                 // display something by default even?
-                UINFO(6, "New scoreLimitBeforeRescore: " << m_scoreLimitBeforeRescore << endl);
+                UINFO(6, "New scoreLimitBeforeRescore: " << m_scoreLimitBeforeRescore);
             }
 
             // Finally merge this candidate.
@@ -1440,7 +1440,7 @@ private:
                                 << recipientNewCpFwd.propagateCp << "\n"
                                 << "donorNewCpFwd = " << donorNewCpFwd.cp
                                 << (donorNewCpFwd.propagate ? " true " : " false ")
-                                << donorNewCpFwd.propagateCp << endl);
+                                << donorNewCpFwd.propagateCp);
 
         recipientp->setCritPathCost(GraphWay::FORWARD, recipientNewCpFwd.cp);
         if (recipientNewCpFwd.propagate) {
@@ -1503,7 +1503,7 @@ private:
         // behave identically without the caching (just slower)
 
         m_sb.rescore();
-        UINFO(6, "Did rescore. Merges since previous = " << m_mergesSinceRescore << endl);
+        UINFO(6, "Did rescore. Merges since previous = " << m_mergesSinceRescore);
 
         m_mergesSinceRescore = 0;
         m_scoreLimitBeforeRescore = 0xffffffff;
@@ -1714,7 +1714,7 @@ class DpiImportCallVisitor final : public VNVisitor {
                 // we have a normal DPI which induces DPI hazard by default.
                 m_hasDpiHazard = V3Config::getProfileData(nodep->cname()) == 0;
                 UINFO(9, "DPI wrapper '" << nodep->cname()
-                                         << "' has dpi hazard = " << m_hasDpiHazard << endl);
+                                         << "' has dpi hazard = " << m_hasDpiHazard);
             }
         }
         iterateChildren(nodep);
@@ -2055,7 +2055,7 @@ static void debugMTaskGraphStats(V3Graph& graph, const string& stage) {
     if (!debug() && !dumpLevel() && !dumpGraphLevel()) return;
 
     UINFO(4, "\n");
-    UINFO(4, " Stats for " << stage << endl);
+    UINFO(4, " Stats for " << stage);
     uint32_t mtaskCount = 0;
     uint32_t totalCost = 0;
     std::array<uint32_t, 32> mtaskCostHist;
@@ -2070,14 +2070,14 @@ static void debugMTaskGraphStats(V3Graph& graph, const string& stage) {
         UASSERT(log2Cost < 32, "log2Cost overflow in debugMTaskGraphStats");
         ++mtaskCostHist[log2Cost];
     }
-    UINFO(4, "  Total mtask cost = " << totalCost << "\n");
-    UINFO(4, "  Mtask count = " << mtaskCount << "\n");
-    UINFO(4, "  Avg cost / mtask = "
-                 << ((mtaskCount > 0) ? cvtToStr(totalCost / mtaskCount) : "INF!") << "\n");
-    UINFO(4, "  Histogram of mtask costs:\n");
+    UINFO(4, "  Total mtask cost = " << totalCost);
+    UINFO(4, "  Mtask count = " << mtaskCount);
+    UINFO(4, "  Avg cost / mtask = " << ((mtaskCount > 0) ? cvtToStr(totalCost / mtaskCount)
+                                                          : "INF!"));
+    UINFO(4, "  Histogram of mtask costs:");
     for (unsigned i = 0; i < 32; ++i) {
         if (mtaskCostHist[i]) {
-            UINFO(4, "    2^" << i << ": " << mtaskCostHist[i] << endl);
+            UINFO(4, "    2^" << i << ": " << mtaskCostHist[i]);
             V3Stats::addStat("MTask graph, " + stage + ", mtask cost 2^" + (i < 10 ? " " : "")
                                  + cvtToStr(i),
                              mtaskCostHist[i]);
@@ -2102,12 +2102,12 @@ static void debugMTaskGraphStats(V3Graph& graph, const string& stage) {
     V3Stats::addStat("MTask graph, " + stage + ", parallelism factor", report.parallelismFactor());
     if (debug() >= 4) {
         UINFO(0, "\n");
-        UINFO(0, "    MTask Parallelism estimate based costs at stage" << stage << ":\n");
-        UINFO(0, "    Critical path cost = " << report.criticalPathCost() << "\n");
-        UINFO(0, "    Total graph cost = " << report.totalGraphCost() << "\n");
-        UINFO(0, "    MTask vertex count = " << report.vertexCount() << "\n");
-        UINFO(0, "    Edge count = " << report.edgeCount() << "\n");
-        UINFO(0, "    Parallelism factor = " << report.parallelismFactor() << "\n");
+        UINFO(0, "    MTask Parallelism estimate based costs at stage" << stage << ":");
+        UINFO(0, "    Critical path cost = " << report.criticalPathCost());
+        UINFO(0, "    Total graph cost = " << report.totalGraphCost());
+        UINFO(0, "    MTask vertex count = " << report.vertexCount());
+        UINFO(0, "    Edge count = " << report.edgeCount());
+        UINFO(0, "    Parallelism factor = " << report.parallelismFactor());
     }
 }
 
@@ -2127,7 +2127,7 @@ static void hashGraphDebug(const V3Graph& graph, const char* debugName) {
             hash = vx2Id[edge.top()] + 31U * hash;  // The K&R hash function
         }
     }
-    UINFO(0, "Hash of shape (not contents) of " << debugName << " = " << cvtToStr(hash) << endl);
+    UINFO(0, "Hash of shape (not contents) of " << debugName << " = " << cvtToStr(hash));
 }
 
 //*************************************************************************
@@ -2330,7 +2330,7 @@ class Partitioner final {
             const unsigned fudgeDenominator = 5;
             const uint32_t cpLimit
                 = ((totalGraphCost * fudgeNumerator) / (targetParFactor * fudgeDenominator));
-            UINFO(4, "Partitioner set cpLimit = " << cpLimit << endl);
+            UINFO(4, "Partitioner set cpLimit = " << cpLimit);
 
             Contraction::apply(*m_mTaskGraphp, cpLimit, m_entryMTaskp, m_exitMTaskp,
                                // --debugPartition is used by tests
@@ -2481,7 +2481,7 @@ AstExecGraph* V3Order::createParallel(OrderGraph& orderGraph, const std::string&
         const bool newEntry = logicMTaskToExecMTask.emplace(mTaskp, execMTaskp).second;
         UASSERT_OBJ(newEntry, mTaskp, "LogicMTasks should be processed in dependencyorder");
         UINFO(3, "Final '" << tag << "' LogicMTask " << mTaskp->id() << " maps to ExecMTask"
-                           << execMTaskp->id() << std::endl);
+                           << execMTaskp->id());
 
         // Add the dependency edges between ExecMTasks
         for (const V3GraphEdge& edge : mTaskp->inEdges()) {
@@ -2505,7 +2505,7 @@ AstExecGraph* V3Order::createParallel(OrderGraph& orderGraph, const std::string&
 }
 
 void V3Order::selfTestParallel() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     PropagateCp<GraphWay::FORWARD>::selfTest();
     PropagateCp<GraphWay::REVERSE>::selfTest();
     Contraction::selfTest();
diff --git a/src/V3OrderProcessDomains.cpp b/src/V3OrderProcessDomains.cpp
index 4307bd45e..190447d2f 100644
--- a/src/V3OrderProcessDomains.cpp
+++ b/src/V3OrderProcessDomains.cpp
@@ -85,13 +85,13 @@ class V3OrderProcessDomains final {
     //     else, if all inputs are from flops, it's end-of-sequential code
     //     else, it's full combo code
     void processDomains() {
-        UINFO(2, "  Domains...\n");
+        UINFO(2, "  Domains...");
         // Buffer to hold external sensitivities
         std::vector<AstSenTree*> externalDomainps;
         // For each vertex
         for (V3GraphVertex& it : m_graph.vertices()) {
             OrderEitherVertex* const vtxp = it.as<OrderEitherVertex>();
-            UINFO(5, "    pdi: " << vtxp << endl);
+            UINFO(5, "    pdi: " << vtxp);
             // Sequential logic already has its domain set
             if (vtxp->domainp()) continue;
 
@@ -99,7 +99,7 @@ class V3OrderProcessDomains final {
             // For logic, start with the explicit hybrid sensitivities
             OrderLogicVertex* const lvtxp = vtxp->cast<OrderLogicVertex>();
             if (lvtxp) domainp = lvtxp->hybridp();
-            if (domainp) UINFO(6, "      hybr d=" << debugDomain(domainp) << " " << vtxp << endl);
+            if (domainp) UINFO(6, "      hybr d=" << debugDomain(domainp) << " " << vtxp);
 
             // For each incoming edge, examine the source vertex
             for (V3GraphEdge& edge : vtxp->inEdges()) {
@@ -111,7 +111,7 @@ class V3OrderProcessDomains final {
 
                 AstSenTree* fromDomainp = fromVtxp->domainp();
 
-                UINFO(6, "      from d=" << debugDomain(fromDomainp) << " " << fromVtxp << endl);
+                UINFO(6, "      from d=" << debugDomain(fromDomainp) << " " << fromVtxp);
                 UASSERT(fromDomainp == m_deleteDomainp || !fromDomainp->hasCombo(),
                         "There should be no need for combinational domains");
 
@@ -122,7 +122,7 @@ class V3OrderProcessDomains final {
                     m_externalDomains(vscp, externalDomainps);
                     for (AstSenTree* const externalDomainp : externalDomainps) {
                         UINFO(6, "      xtrn d=" << debugDomain(externalDomainp) << " " << fromVtxp
-                                                 << " because of " << vscp << endl);
+                                                 << " because of " << vscp);
                         UASSERT_OBJ(!externalDomainp->hasCombo(), vscp,
                                     "There should be no need for combinational domains");
                         fromDomainp = combineDomains(fromDomainp, externalDomainp);
@@ -150,7 +150,7 @@ class V3OrderProcessDomains final {
             // Set the domain of the vertex
             vtxp->domainp(domainp);
 
-            UINFO(5, "      done d=" << debugDomain(domainp) << " " << vtxp << endl);
+            UINFO(5, "      done d=" << debugDomain(domainp) << " " << vtxp);
         }
     }
 
diff --git a/src/V3OrderSerial.cpp b/src/V3OrderSerial.cpp
index a23280d8a..23b3a7cc4 100644
--- a/src/V3OrderSerial.cpp
+++ b/src/V3OrderSerial.cpp
@@ -34,7 +34,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 std::vector<AstActive*> V3Order::createSerial(OrderGraph& graph, const std::string& tag,
                                               const TrigToSenMap& trigToSen, bool slow) {
 
-    UINFO(2, "  Constructing serial code for '" + tag + "'\n");
+    UINFO(2, "  Constructing serial code for '" + tag + "'");
 
     // Build the move graph
     OrderMoveDomScope::clear();
diff --git a/src/V3Os.cpp b/src/V3Os.cpp
index 43a55739c..5b6eea6f7 100644
--- a/src/V3Os.cpp
+++ b/src/V3Os.cpp
@@ -92,9 +92,9 @@ string V3Os::getenvStr(const string& envvar, const string& defaultValue) {
 
 void V3Os::setenvStr(const string& envvar, const string& value, const string& why) {
     if (why != "") {
-        UINFO(1, "export " << envvar << "='" << value << "'  # " << why << endl);
+        UINFO(1, "export " << envvar << "='" << value << "'  # " << why);
     } else {
-        UINFO(1, "export " << envvar << "='" << value << "'" << endl);
+        UINFO(1, "export " << envvar << "='" << value << "'");
     }
 #if defined(_WIN32) || defined(__MINGW32__)
     _putenv_s(envvar.c_str(), value.c_str());
@@ -263,8 +263,8 @@ string V3Os::filenameRelativePath(const string& filename, const string& base) VL
     auto aIt = a.begin();
     auto bIt = b.begin();
     while (aIt != a.end() && bIt != b.end()) {
-        // UINFO(9, "fnrp scan " << (aIt - a.begin()) << " " << a.substr(aIt - a.begin()) << endl);
-        // UINFO(9, "fnrp scan " << (bIt - b.begin()) << " " << b.substr(bIt - b.begin()) << endl);
+        // UINFO(9, "fnrp scan " << (aIt - a.begin()) << " " << a.substr(aIt - a.begin()));
+        // UINFO(9, "fnrp scan " << (bIt - b.begin()) << " " << b.substr(bIt - b.begin()));
         auto aWordIt = aIt;  // position of next slash
         for (; aWordIt != a.end(); ++aWordIt) {
             if (isSlash(*aWordIt)) break;
@@ -370,7 +370,7 @@ void V3Os::filesystemFlushBuildDir(const string& dirname) {
     // Linux kernel may not reread from NFS unless timestamp modified
     const int err = utimes(dirname.c_str(), nullptr);
     // Not an error
-    if (err != 0) UINFO(1, "-Info: File not utimed: " << dirname << endl);
+    if (err != 0) UINFO(1, "-Info: File not utimed: " << dirname);
 #endif
     filesystemFlush(dirname);
 }
@@ -472,7 +472,7 @@ void V3Os::u_sleep(int64_t usec) {
 // METHODS (sub command)
 
 int V3Os::system(const string& command) {
-    UINFO(1, "Running system: " << command << endl);
+    UINFO(1, "Running system: " << command);
     const int ret = ::system(command.c_str());
     if (VL_UNCOVERABLE(ret == -1)) {
         v3fatal("Failed to execute command:"  // LCOV_EXCL_LINE
@@ -481,7 +481,7 @@ int V3Os::system(const string& command) {
     } else {
         UASSERT(WIFEXITED(ret), "system(" << command << ") returned unexpected value of " << ret);
         const int exit_code = WEXITSTATUS(ret);
-        UINFO(1, command << " returned exit code of " << exit_code << std::endl);
+        UINFO(1, command << " returned exit code of " << exit_code);
         UASSERT(exit_code >= 0, "exit code must not be negative");
         return exit_code;
     }
diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index b0a12f8dd..b2da22bde 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -158,19 +158,18 @@ public:
                     UASSERT_OBJ(paramIt != paramsIt->second.end(), modvarp, "must be registered");
                     AstConst* const defValuep = VN_CAST(paramIt->second->valuep(), Const);
                     if (defValuep && areSame(constp, defValuep)) {
-                        UINFO(5, "Setting default value of " << constp << " to " << modvarp
-                                                             << std::endl);
+                        UINFO(5, "Setting default value of " << constp << " to " << modvarp);
                         continue;  // Skip this parameter because setting the same value
                     }
                     const auto pIt = vlstd::as_const(params).find(modvarp->name());
-                    UINFO(5, "Comparing " << modvarp->name() << " " << constp << std::endl);
+                    UINFO(5, "Comparing " << modvarp->name() << " " << constp);
                     if (pIt == params.end() || paramIdx >= params.size()
                         || !areSame(constp, pIt->second.get())) {
                         found = false;
                         break;
                     }
                     UINFO(5, "Matched " << modvarp->name() << " " << constp << " and "
-                                        << pIt->second.get() << std::endl);
+                                        << pIt->second.get());
                     ++paramIdx;
                 }
             }
@@ -398,7 +397,7 @@ class ParamProcessor final {
             }
             newname = pair.first->second;
         }
-        UINFO(4, "Name: " << srcModp->name() << "->" << longname << "->" << newname << endl);
+        UINFO(4, "Name: " << srcModp->name() << "->" << longname << "->" << newname);
         return newname;
     }
     AstNodeDType* arraySubDTypep(AstNodeDType* nodep) {
@@ -439,7 +438,7 @@ class ParamProcessor final {
         for (AstPin* pinp = startpinp; pinp; pinp = VN_AS(pinp->nextp(), Pin)) {
             if (pinp->modVarp()) {
                 // Find it in the clone structure
-                // UINFO(8,"Clone find 0x"<<hex<<(uint32_t)pinp->modVarp()<<endl);
+                // UINFO(8,"Clone find 0x"<<hex<<(uint32_t)pinp->modVarp());
                 const auto cloneiter = clonemapp->find(pinp->modVarp());
                 UASSERT_OBJ(cloneiter != clonemapp->end(), pinp,
                             "Couldn't find pin in clone list");
@@ -558,7 +557,7 @@ class ParamProcessor final {
                 longname += type.str();
             }
         }
-        UINFO(9, "       module params longname: " << longname << endl);
+        UINFO(9, "       module params longname: " << longname);
 
         const auto iter = m_longMap.find(longname);
         if (iter != m_longMap.end()) return iter->second;  // Already calculated
@@ -645,7 +644,7 @@ class ParamProcessor final {
         m_modNameMap.emplace(newModp->name(), ModInfo{newModp});
         const auto iter = m_modNameMap.find(newname);
         CloneMap* const clonemapp = &(iter->second.m_cloneMap);
-        UINFO(4, "     De-parameterize to new: " << newModp << endl);
+        UINFO(4, "     De-parameterize to new: " << newModp);
 
         // Grab all I/O so we can remap our pins later
         // Note we allow multiple users of a parameterized model,
@@ -658,12 +657,12 @@ class ParamProcessor final {
             const AstIfaceRefDType* const portIrefp = it->first;
             const AstIfaceRefDType* const pinIrefp = it->second;
             AstIfaceRefDType* const cloneIrefp = portIrefp->clonep();
-            UINFO(8, "     IfaceOld " << portIrefp << endl);
-            UINFO(8, "     IfaceTo  " << pinIrefp << endl);
+            UINFO(8, "     IfaceOld " << portIrefp);
+            UINFO(8, "     IfaceTo  " << pinIrefp);
             UASSERT_OBJ(cloneIrefp, portIrefp, "parameter clone didn't hit AstIfaceRefDType");
-            UINFO(8, "     IfaceClo " << cloneIrefp << endl);
+            UINFO(8, "     IfaceClo " << cloneIrefp);
             cloneIrefp->ifacep(pinIrefp->ifaceViaCellp());
-            UINFO(8, "     IfaceNew " << cloneIrefp << endl);
+            UINFO(8, "     IfaceNew " << cloneIrefp);
         }
         // Assign parameters to the constants specified
         // DOES clone() so must be finished with module clonep() before here
@@ -678,7 +677,7 @@ class ParamProcessor final {
                     // Remove any existing parameter
                     if (modvarp->valuep()) modvarp->valuep()->unlinkFrBack()->deleteTree();
                     // Set this parameter to value requested by cell
-                    UINFO(9, "       set param " << modvarp << " = " << newp << endl);
+                    UINFO(9, "       set param " << modvarp << " = " << newp);
                     modvarp->valuep(newp->cloneTree(false));
                     modvarp->overriddenParam(overridden);
                 } else if (AstParamTypeDType* const modptp = pinp->modPTypep()) {
@@ -698,7 +697,7 @@ class ParamProcessor final {
         // Already made this flavor?
         auto it = m_modNameMap.find(newname);
         if (it != m_modNameMap.end()) {
-            UINFO(4, "     De-parameterize to prev: " << it->second.m_modp << endl);
+            UINFO(4, "     De-parameterize to prev: " << it->second.m_modp);
         } else {
             deepCloneModule(srcModp, ifErrorp, paramsp, newname, ifaceRefRefs);
             it = m_modNameMap.find(newname);
@@ -777,7 +776,7 @@ class ParamProcessor final {
                 pinp->v3error("Parameter type variable isn't a type: Param "
                               << modvarp->prettyNameQ());
             } else {
-                UINFO(9, "Parameter type assignment expr=" << exprp << " to " << origp << endl);
+                UINFO(9, "Parameter type assignment expr=" << exprp << " to " << origp);
                 V3Const::constifyParamsEdit(pinp->exprp());  // Reconcile typedefs
                 // Constify may have caused pinp->exprp to change
                 rawTypep = VN_AS(pinp->exprp(), NodeDType);
@@ -848,7 +847,7 @@ class ParamProcessor final {
                                 IfaceRefDType);
                 }
 
-                UINFO(9, "     portIfaceRef " << portIrefp << endl);
+                UINFO(9, "     portIfaceRef " << portIrefp);
 
                 if (!portIrefp) {
                     pinp->v3error("Interface port " << modvarp->prettyNameQ()
@@ -858,9 +857,9 @@ class ParamProcessor final {
                                   << modvarp->prettyNameQ()
                                   << " is not connected to interface/modport pin expression");
                 } else {
-                    UINFO(9, "     pinIfaceRef " << pinIrefp << endl);
+                    UINFO(9, "     pinIfaceRef " << pinIrefp);
                     if (portIrefp->ifaceViaCellp() != pinIrefp->ifaceViaCellp()) {
-                        UINFO(9, "     IfaceRefDType needs reconnect  " << pinIrefp << endl);
+                        UINFO(9, "     IfaceRefDType needs reconnect  " << pinIrefp);
                         longnamer += ("_" + paramSmallName(srcModp, pinp->modVarp())
                                       + paramValueNumber(pinIrefp));
                         any_overridesr = true;
@@ -922,7 +921,7 @@ class ParamProcessor final {
             srcModpr = paramedModp;
             any_overrides = true;
         } else if (!any_overrides) {
-            UINFO(8, "Cell parameters all match original values, skipping expansion.\n");
+            UINFO(8, "Cell parameters all match original values, skipping expansion.");
             // If it's the first use of the default instance, create a copy and store it in user3p.
             // user3p will also be used to check if the default instance is used.
             if (!srcModpr->user3p() && (VN_IS(srcModpr, Class) || VN_IS(srcModpr, Iface))) {
@@ -940,7 +939,7 @@ class ParamProcessor final {
                 = moduleFindOrClone(srcModpr, nodep, paramsp, newname, ifaceRefRefs);
             // We need to relink the pins to the new module
             relinkPinsByName(pinsp, modInfop->m_modp);
-            UINFO(8, "     Done with " << modInfop->m_modp << endl);
+            UINFO(8, "     Done with " << modInfop->m_modp);
             srcModpr = modInfop->m_modp;
         }
 
@@ -1001,7 +1000,7 @@ public:
         // Cell: Check for parameters in the instantiation.
         // We always run this, even if no parameters, as need to look for interfaces,
         // and remove any recursive references
-        UINFO(4, "De-parameterize: " << nodep << endl);
+        UINFO(4, "De-parameterize: " << nodep);
         // Create new module name with _'s between the constants
         if (debug() >= 10) nodep->dumpTree("-  cell: ");
         // Evaluate all module constants
@@ -1025,7 +1024,7 @@ public:
         // Set name for later warnings (if srcModpr changed value due to cloning)
         srcModpr->someInstanceName(instanceName);
 
-        UINFO(8, "     Done with orig " << nodep << endl);
+        UINFO(8, "     Done with orig " << nodep);
         // if (debug() >= 10)
         // v3Global.rootp()->dumpTreeFile(v3Global.debugFilename("param-out.tree"));
     }
@@ -1192,7 +1191,7 @@ class ParamVisitor final : public VNVisitor {
         }
 
         if (m_iterateModule) {  // Iterating from visitCells
-            UINFO(4, " MOD-under-MOD.  " << nodep << endl);
+            UINFO(4, " MOD-under-MOD.  " << nodep);
             m_workQueue.emplace(nodep->level(), nodep);  // Delay until current module is done
             // visitCells (which we are returning to) will process nodep from m_workQueue later
             return;
@@ -1249,11 +1248,11 @@ class ParamVisitor final : public VNVisitor {
         for (; candp; candp = candp->nextp()) {
             if (nodep->name() == candp->name()) {
                 if (AstVar* const varp = VN_CAST(candp, Var)) {
-                    UINFO(9, "Found interface parameter: " << varp << endl);
+                    UINFO(9, "Found interface parameter: " << varp);
                     nodep->varp(varp);
                     return true;
                 } else if (const AstPin* const pinp = VN_CAST(candp, Pin)) {
-                    UINFO(9, "Found interface parameter: " << pinp << endl);
+                    UINFO(9, "Found interface parameter: " << pinp);
                     UASSERT_OBJ(pinp->exprp(), pinp, "Interface parameter pin missing expression");
                     VL_DO_DANGLING(nodep->replaceWith(pinp->exprp()->cloneTree(false)), nodep);
                     return true;
@@ -1269,7 +1268,7 @@ class ParamVisitor final : public VNVisitor {
             const AstNode* backp = nodep;
             while ((backp = backp->backp())) {
                 if (VN_IS(backp, NodeModule)) {
-                    UINFO(9, "Hit module boundary, done looking for interface" << endl);
+                    UINFO(9, "Hit module boundary, done looking for interface");
                     break;
                 }
                 if (const AstVar* const varp = VN_CAST(backp, Var)) {
@@ -1292,7 +1291,7 @@ class ParamVisitor final : public VNVisitor {
                     // Interfaces passed in on the port map have ifaces
                     if (const AstIface* const ifacep = ifacerefp->ifacep()) {
                         if (dotted == backp->name()) {
-                            UINFO(9, "Iface matching scope:  " << ifacep << endl);
+                            UINFO(9, "Iface matching scope:  " << ifacep);
                             if (ifaceParamReplace(nodep, ifacep->stmtsp())) {  //
                                 return;
                             }
@@ -1301,7 +1300,7 @@ class ParamVisitor final : public VNVisitor {
                     // Interfaces declared in this module have cells
                     else if (const AstCell* const cellp = ifacerefp->cellp()) {
                         if (dotted == cellp->name()) {
-                            UINFO(9, "Iface matching scope:  " << cellp << endl);
+                            UINFO(9, "Iface matching scope:  " << cellp);
                             if (ifaceParamReplace(nodep, cellp->paramsp())) {  //
                                 return;
                             }
@@ -1376,7 +1375,7 @@ class ParamVisitor final : public VNVisitor {
 
     // Generate Statements
     void visit(AstGenIf* nodep) override {
-        UINFO(9, "  GENIF " << nodep << endl);
+        UINFO(9, "  GENIF " << nodep);
         iterateAndNextNull(nodep->condp());
         // We suppress errors when widthing params since short-circuiting in
         // the conditional evaluation may mean these error can never occur. We
@@ -1407,8 +1406,8 @@ class ParamVisitor final : public VNVisitor {
         if (AstGenFor* const forp = VN_AS(nodep->genforp(), GenFor)) {
             // We should have a GENFOR under here.  We will be replacing the begin,
             // so process here rather than at the generate to avoid iteration problems
-            UINFO(9, "  BEGIN " << nodep << endl);
-            UINFO(9, "  GENFOR " << forp << endl);
+            UINFO(9, "  BEGIN " << nodep);
+            UINFO(9, "  GENFOR " << forp);
             // Visit child nodes before unrolling
             iterateAndNextNull(forp->initsp());
             iterateAndNextNull(forp->condp());
@@ -1441,7 +1440,7 @@ class ParamVisitor final : public VNVisitor {
         nodep->v3fatalSrc("GENFOR should have been wrapped in BEGIN");
     }
     void visit(AstGenCase* nodep) override {
-        UINFO(9, "  GENCASE " << nodep << endl);
+        UINFO(9, "  GENCASE " << nodep);
         bool hit = false;
         AstNode* keepp = nullptr;
         iterateAndNextNull(nodep->exprp());
@@ -1556,7 +1555,7 @@ public:
 // Param class functions
 
 void V3Param::param(AstNetlist* rootp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ParamVisitor{rootp}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("param", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp
index 6d435e8ef..42d54bc0a 100644
--- a/src/V3ParseGrammar.cpp
+++ b/src/V3ParseGrammar.cpp
@@ -191,8 +191,8 @@ AstNodeDType* V3ParseGrammar::createArray(AstNodeDType* basep, AstNodeRange* nra
 AstVar* V3ParseGrammar::createVariable(FileLine* fileline, const string& name,
                                        AstNodeRange* arrayp, AstNode* attrsp) {
     AstNodeDType* dtypep = GRAMMARP->m_varDTypep;
-    UINFO(5, "  creVar " << name << "  decl=" << GRAMMARP->m_varDecl << "  io="
-                         << GRAMMARP->m_varIO << "  dt=" << (dtypep ? "set" : "") << endl);
+    UINFO(5, "  creVar " << name << "  decl=" << GRAMMARP->m_varDecl
+                         << "  io=" << GRAMMARP->m_varIO << "  dt=" << (dtypep ? "set" : ""));
     if (GRAMMARP->m_varIO == VDirection::NONE  // In non-ANSI port list
         && GRAMMARP->m_varDecl == VVarType::PORT) {
         // Just a port list with variable name (not v2k format); AstPort already created
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 5775b3e52..3c2f7bc93 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -75,7 +75,7 @@ void V3ParseImp::importIfInStd(FileLine* fileline, const string& id) {
     if (fileline->filename() == V3Options::getStdPackagePath()) return;
     if (AstPackage* const stdpkgp
         = v3Global.rootp()->stdPackagep()) {  // else e.g. --no-std-package
-        UINFO(9, "import and keep std:: for " << fileline << "\n");
+        UINFO(9, "import and keep std:: for " << fileline);
         AstPackageImport* const impp = new AstPackageImport{stdpkgp->fileline(), stdpkgp, "*"};
         unitPackage(stdpkgp->fileline())->addStmtsp(impp);
         v3Global.setUsesStdPackage();
@@ -126,7 +126,7 @@ AstPragma* V3ParseImp::createTimescale(FileLine* fl, bool unitSet, double unitVa
         bool bad;
         unit = VTimescale{unitVal, bad /*ref*/};
         if (bad) {
-            UINFO(1, "Value = " << unitVal << endl);
+            UINFO(1, "Value = " << unitVal);
             fl->v3error("timeunit illegal value");
         }
     }
@@ -135,7 +135,7 @@ AstPragma* V3ParseImp::createTimescale(FileLine* fl, bool unitSet, double unitVa
         bool bad;
         prec = VTimescale{precVal, bad /*ref*/};
         if (bad) {
-            UINFO(1, "Value = " << precVal << endl);
+            UINFO(1, "Value = " << precVal);
             fl->v3error("timeprecision illegal value");
         }
     }
@@ -298,7 +298,7 @@ void V3ParseImp::parseFile(FileLine* fileline, const string& modfilename, bool i
     const string nondirname = V3Os::filenameNonDir(modfilename);
     const string modname = V3Os::filenameNonDirExt(modfilename);
 
-    UINFO(2, __FUNCTION__ << ": " << modname << (inLibrary ? " [LIB]" : "") << endl);
+    UINFO(2, __FUNCTION__ << ": " << modname << (inLibrary ? " [LIB]" : ""));
     m_lexFileline = new FileLine{fileline};
     m_lexFileline->newContent();
     m_bisonLastFileline = m_lexFileline;
@@ -366,7 +366,7 @@ void V3ParseImp::dumpInputsFile() {
     }
     if (!append) {
         append = true;
-        UINFO(1, "Writing all preprocessed output to " << vppfilename << endl);
+        UINFO(1, "Writing all preprocessed output to " << vppfilename);
         *ofp << "// Dump of all post-preprocessor input\n";
         *ofp << "// Blank lines and `line directives have been removed\n";
         *ofp << "//\n";
@@ -380,7 +380,7 @@ void V3ParseImp::dumpInputsFile() {
 
 void V3ParseImp::lexFile(const string& modname) {
     // Prepare for lexing
-    UINFO(3, "Lexing " << modname << endl);
+    UINFO(3, "Lexing " << modname);
     s_parsep = this;
     lexFileline()->warnResetDefault();  // Reenable warnings on each file
     lexDestroy();  // Restart from clean slate.
@@ -434,7 +434,7 @@ size_t V3ParseImp::tokenPipeScanIdType(size_t depthIn) {
     // and caller must check does NOT match tokenPipeScanIdCell
     size_t depth = depthIn;
     // UINFO(9, "tokenPipeScanType START d="
-    //       << depth << " " << V3ParseImp::tokenName(tokenPeekp(depth)->token) << endl);
+    //       << depth << " " << V3ParseImp::tokenName(tokenPeekp(depth)->token));
     if (tokenPeekp(depth)->token == '#' && tokenPeekp(depth + 1)->token == '(') {
         depth = tokenPipeScanParam(depth, false);
         // Not :: as then it's a yaID__CC, we'll parse that in tokenPipeScanId
@@ -446,7 +446,7 @@ size_t V3ParseImp::tokenPipeScanIdType(size_t depthIn) {
     if (tokenPeekp(depth)->token != yaID__LEX && tokenPeekp(depth)->token != yP_TICKBRA)
         return depthIn;
     ++depth;
-    // UINFO(9, "tokenPipeScanType MATCH\n");
+    // UINFO(9, "tokenPipeScanType MATCH");
 
     return depth;
 }
@@ -546,7 +546,7 @@ size_t V3ParseImp::tokenPipeScanTypeEq(size_t depth) {
 int V3ParseImp::tokenPipelineId(int token) {
     const V3ParseBisonYYSType* nexttokp = tokenPeekp(0);  // First char after yaID
     const int nexttok = nexttokp->token;
-    UINFO(9, "tokenPipelineId tok=" << yylval.token << endl);
+    UINFO(9, "tokenPipelineId tok=" << yylval.token);
     UASSERT(yylval.token == yaID__LEX, "Start with ID");
     if (nexttok == yP_COLONCOLON) return yaID__CC;
     VL_RESTORER(yylval);  // Remember value, as about to read ahead
diff --git a/src/V3PreExpr.h b/src/V3PreExpr.h
index b89746c15..d7621780c 100644
--- a/src/V3PreExpr.h
+++ b/src/V3PreExpr.h
@@ -136,7 +136,7 @@ class V3PreExpr final {
     static void selfTestOne(const string& expr, bool expect) {
         // This hacky self-test parser just looks at first character of
         // operator, and requires space separation of operators/values
-        UINFO(9, "V3PreExpr selfTestOne " << expr << endl);
+        UINFO(9, "V3PreExpr selfTestOne " << expr);
         FileLine* const flp = nullptr;
         V3PreExpr parser;
         parser.reset(flp);
@@ -166,11 +166,11 @@ class V3PreExpr final {
 
     // METHODS
     void pushOp(const V3PreExprToken& token) {
-        // UINFO(9, "  pushOp " << token.ascii() << endl);
+        // UINFO(9, "  pushOp " << token.ascii());
         m_ops.push_back(token);
     }
     void pushValue(const V3PreExprToken& token) {
-        // UINFO(9, "  pushValue " << token.ascii() << endl);
+        // UINFO(9, "  pushValue " << token.ascii());
         m_values.push_back(token);
     }
     V3PreExprToken popValue() {
@@ -180,13 +180,13 @@ class V3PreExpr final {
         }
         const V3PreExprToken tok = m_values.back();
         m_values.pop_back();
-        // UINFO(9, "  popValue " << tok.ascii() << endl;
+        // UINFO(9, "  popValue " << tok.ascii());
         return tok;
     }
     void reduce() {
         UASSERT(!m_ops.empty(), "lost op stack beginning END");
         V3PreExprToken tok = m_ops.back();
-        // UINFO(9, "Reduce " << tok.ascii() << endl);
+        // UINFO(9, "Reduce " << tok.ascii());
         m_ops.pop_back();
         switch (tok.token()) {
         case V3PreExprToken::KET: {
@@ -241,7 +241,7 @@ class V3PreExpr final {
         while (!m_inputs.empty()) {
             V3PreExprToken tok = m_inputs.front();
             m_inputs.pop_front();
-            UINFO(9, "input read " << tok.ascii() << endl);
+            UINFO(9, "input read " << tok.ascii());
             if (tok.isValue()) {
                 pushValue(tok);
                 continue;
@@ -251,7 +251,7 @@ class V3PreExpr final {
             V3PreExprToken topTok = m_ops.back();
             auto action = parseTable[topTok.token()][tok.token()];
             UINFO(9, "pop action " << actionAscii(action) << " from parseTable[" << topTok.ascii()
-                                   << "][" << tok.ascii() << "]\n");
+                                   << "][" << tok.ascii() << "]");
             switch (action) {
             case RR:  // Reduce
                 reduce();
@@ -279,7 +279,7 @@ public:
     }
     void pushInput(const V3PreExprToken& token) {
         if (!m_firstFileline) m_firstFileline = token.fileline();
-        UINFO(9, "pushInput " << token.ascii() << endl);
+        UINFO(9, "pushInput " << token.ascii());
         m_inputs.push_back(token);
     }
     bool result() {
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index 9e10f7821..0cb788bc4 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -345,7 +345,7 @@ FileLine* V3PreProcImp::defFileline(const string& name) {
 }
 void V3PreProcImp::define(FileLine* fl, const string& name, const string& value,
                           const string& params, bool cmdline) {
-    UINFO(4, "DEFINE '" << name << "' as '" << value << "' params '" << params << "'" << endl);
+    UINFO(4, "DEFINE '" << name << "' as '" << value << "' params '" << params << "'");
     if (!V3LanguageWords::isKeyword("`"s + name).empty()) {
         fl->v3error("Attempting to define built-in directive: '`" << name
                                                                   << "' (IEEE 1800-2023 22.5.1)");
@@ -619,13 +619,13 @@ string V3PreProcImp::defineSubst(VDefineRef* refp) {
     // Note we parse the definition parameters and value here.  If a
     // parameterized define is used many, many times, we could cache the
     // parsed result.
-    UINFO(4, "defineSubstIn  `" << refp->name() << " " << refp->params() << endl);
+    UINFO(4, "defineSubstIn  `" << refp->name() << " " << refp->params());
     for (unsigned i = 0; i < refp->args().size(); i++) {
-        UINFO(4, "defineArg[" << i << "] = '" << refp->args()[i] << "'" << endl);
+        UINFO(4, "defineArg[" << i << "] = '" << refp->args()[i] << "'");
     }
     // Grab value
     const string value = defValue(refp->name());
-    UINFO(4, "defineValue    '" << V3PreLex::cleanDbgStrg(value) << "'" << endl);
+    UINFO(4, "defineValue    '" << V3PreLex::cleanDbgStrg(value) << "'");
 
     std::map<const string, string> argValueByName;
     {  // Parse argument list into map
@@ -640,8 +640,8 @@ string V3PreProcImp::defineSubst(VDefineRef* refp) {
         const char* cp = params.c_str();
         if (*cp == '(') cp++;
         for (; *cp; cp++) {
-            // UINFO(4,"   Parse  Paren="<<paren<<"  Arg="<<numArgs<<"  token='"<<token<<"'
-            // Parse="<<cp<<endl);
+            // UINFO(4, "   Parse  Paren=" << paren << "  Arg=" << numArgs << "  token='" << token
+            //                             << "' Parse=" << cp);
             if (!quote && paren == 1) {
                 if (*cp == ')' || *cp == ',') {
                     string valueDef;
@@ -652,7 +652,7 @@ string V3PreProcImp::defineSubst(VDefineRef* refp) {
                     }
                     argName = trimWhitespace(argName, true);
                     UINFO(4, "    Got Arg=" << numArgs << "  argName='" << argName
-                                            << "'  default='" << valueDef << "'" << endl);
+                                            << "'  default='" << valueDef << "'");
                     // Parse it
                     if (argName != "") {
                         if (refp->args().size() > numArgs) {
@@ -714,7 +714,7 @@ string V3PreProcImp::defineSubst(VDefineRef* refp) {
         bool backslashesc = false;  // In \.....{space} block
         // Note we go through the loop once more at the nullptr end-of-string
         for (const char* cp = value.c_str(); (*cp) || argName != ""; cp = (*cp ? cp + 1 : cp)) {
-            // UINFO(4, "CH "<<*cp<<"  an "<<argName<<endl);
+            // UINFO(4, "CH " << *cp << "  an " << argName);
             if (!quote && !triquote && *cp == '\\') {
                 backslashesc = true;
             } else if (std::isspace(*cp)) {
@@ -805,7 +805,7 @@ string V3PreProcImp::defineSubst(VDefineRef* refp) {
         }
     }
 
-    UINFO(4, "defineSubstOut '" << V3PreLex::cleanDbgStrg(out) << "'" << endl);
+    UINFO(4, "defineSubstOut '" << V3PreLex::cleanDbgStrg(out) << "'");
     return out;
 }
 
@@ -1015,7 +1015,7 @@ void V3PreProcImp::debugToken(int tok, const char* cmtp) {
         UINFO(0, flcol << ": " << cmtp << " " << (m_off ? "of" : "on") << " "
                        << procStateName(state()) << "(" << static_cast<int>(m_states.size())
                        << ") dr" << m_defRefs.size() << ":  <" << m_lexp->currentStartState()
-                       << ">" << tokenName(tok) << ": " << buf << endl);
+                       << ">" << tokenName(tok) << ": " << buf);
         if (s_debugFileline >= 9) {
             std::cout << m_lexp->m_tokFilelinep->warnContextSecondary() << endl;
         }
@@ -1078,13 +1078,13 @@ int V3PreProcImp::getStateToken() {
             string name(yyourtext() + 1, yyourleng() - 1);
             if (defExists(name)) {  // JOIN(DEFREF)
                 // Put back the `` and process the defref
-                UINFO(5, "```: define " << name << " exists, expand first\n");
+                UINFO(5, "```: define " << name << " exists, expand first");
                 // After define, unputString("``").  Not now as would lose yyourtext()
                 m_defPutJoin = true;
-                UINFO(5, "TOKEN now DEFREF\n");
+                UINFO(5, "TOKEN now DEFREF");
                 tok = VP_DEFREF;
             } else {  // DEFREF(JOIN)
-                UINFO(5, "```: define " << name << " doesn't exist, join first\n");
+                UINFO(5, "```: define " << name << " doesn't exist, join first");
                 // FALLTHRU, handle as with VP_SYMBOL_JOIN
             }
         }
@@ -1097,7 +1097,7 @@ int V3PreProcImp::getStateToken() {
             || tok == VP_DEFREF_JOIN || tok == VP_JOIN) {
             // a`` -> string doesn't include the ``, so can just grab next and continue
             string out(yyourtext(), yyourleng());
-            UINFO(5, "`` LHS:" << out << endl);
+            UINFO(5, "`` LHS:" << out);
             // a``b``c can have multiple joins, so we need a stack
             m_joinStack.push(out);
             statePush(ps_JOIN);
@@ -1118,7 +1118,7 @@ int V3PreProcImp::getStateToken() {
                 m_lastSym.assign(yyourtext(), yyourleng());
                 if (state() == ps_DEFNAME_IFDEF || state() == ps_DEFNAME_IFNDEF) {
                     bool enable = defExists(m_lastSym);
-                    UINFO(4, "Ifdef " << m_lastSym << (enable ? " ON" : " OFF") << endl);
+                    UINFO(4, "Ifdef " << m_lastSym << (enable ? " ON" : " OFF"));
                     if (state() == ps_DEFNAME_IFNDEF) enable = !enable;
                     m_ifdefStack.push(VPreIfEntry{enable, false});
                     if (!enable) parsingOff();
@@ -1134,7 +1134,7 @@ int V3PreProcImp::getStateToken() {
                         if (!lastIf.on()) parsingOn();
                         // Handle `if portion
                         const bool enable = !lastIf.everOn() && defExists(m_lastSym);
-                        UINFO(4, "Elsif " << m_lastSym << (enable ? " ON" : " OFF") << endl);
+                        UINFO(4, "Elsif " << m_lastSym << (enable ? " ON" : " OFF"));
                         m_ifdefStack.push(VPreIfEntry{enable, lastIf.everOn()});
                         if (!enable) parsingOff();
                     }
@@ -1142,7 +1142,7 @@ int V3PreProcImp::getStateToken() {
                     goto next_tok;
                 } else if (state() == ps_DEFNAME_UNDEF) {
                     if (!m_off) {
-                        UINFO(4, "Undef " << m_lastSym << endl);
+                        UINFO(4, "Undef " << m_lastSym);
                         undef(m_lastSym);
                     }
                     statePop();
@@ -1161,7 +1161,7 @@ int V3PreProcImp::getStateToken() {
                 if (yyourleng() == 1 && yyourtext()[0] == '('
                     && (state() == ps_DEFNAME_IFDEF || state() == ps_DEFNAME_IFNDEF
                         || state() == ps_DEFNAME_ELSIF)) {
-                    UINFO(4, "ifdef() start (\n");
+                    UINFO(4, "ifdef() start (");
                     m_lexp->pushStateExpr();
                     m_exprParser.reset(fileline());
                     m_exprParenLevel = 1;
@@ -1222,7 +1222,7 @@ int V3PreProcImp::getStateToken() {
                 } else {
                     // Done with parsing expression
                     bool enable = m_exprParser.result();
-                    UINFO(4, "ifdef() result=" << enable << endl);
+                    UINFO(4, "ifdef() result=" << enable);
                     if (state() == ps_EXPR_IFDEF || state() == ps_EXPR_IFNDEF) {
                         if (state() == ps_EXPR_IFNDEF) enable = !enable;
                         m_ifdefStack.push(VPreIfEntry{enable, false});
@@ -1239,7 +1239,7 @@ int V3PreProcImp::getStateToken() {
                             if (!lastIf.on()) parsingOn();
                             // Handle `if portion
                             enable = !lastIf.everOn() && enable;
-                            UINFO(4, "Elsif " << m_lastSym << (enable ? " ON" : " OFF") << endl);
+                            UINFO(4, "Elsif " << m_lastSym << (enable ? " ON" : " OFF"));
                             m_ifdefStack.push(VPreIfEntry{enable, lastIf.everOn()});
                             if (!enable) parsingOff();
                         }
@@ -1322,7 +1322,7 @@ int V3PreProcImp::getStateToken() {
                     value = trimWhitespace(value, true);
                     // Define it
                     UINFO(4, "Define " << m_lastSym << " " << formals << " = '"
-                                       << V3PreLex::cleanDbgStrg(value) << "'" << endl);
+                                       << V3PreLex::cleanDbgStrg(value) << "'");
                     define(fileline(), m_lastSym, value, formals, false);
                 }
             } else {
@@ -1353,7 +1353,7 @@ int V3PreProcImp::getStateToken() {
             VDefineRef* refp = &(m_defRefs.top());
             refp->nextarg(refp->nextarg() + m_lexp->m_defValue);
             m_lexp->m_defValue = "";
-            UINFO(4, "defarg++ " << refp->nextarg() << endl);
+            UINFO(4, "defarg++ " << refp->nextarg());
             if (tok == VP_DEFARG && yyourleng() == 1 && yyourtext()[0] == ',') {
                 refp->args().push_back(refp->nextarg());
                 stateChange(ps_DEFARG);
@@ -1378,7 +1378,7 @@ int V3PreProcImp::getStateToken() {
                         const string lhs = m_joinStack.top();
                         m_joinStack.pop();
                         out.insert(0, lhs);
-                        UINFO(5, "``-end-defarg Out:" << out << endl);
+                        UINFO(5, "``-end-defarg Out:" << out);
                         statePop();
                     }
                     if (!m_off) {
@@ -1427,7 +1427,7 @@ int V3PreProcImp::getStateToken() {
             if (tok == VP_STRING) {
                 statePop();
                 m_lastSym.assign(yyourtext(), yyourleng());
-                UINFO(4, "Include " << m_lastSym << endl);
+                UINFO(4, "Include " << m_lastSym);
                 // Drop leading and trailing quotes.
                 m_lastSym.erase(0, 1);
                 m_lastSym.erase(m_lastSym.length() - 1, 1);
@@ -1466,11 +1466,11 @@ int V3PreProcImp::getStateToken() {
                 UASSERT(!m_joinStack.empty(), "`` join stack empty, but in a ``");
                 const string lhs = m_joinStack.top();
                 m_joinStack.pop();
-                UINFO(5, "`` LHS:" << lhs << endl);
+                UINFO(5, "`` LHS:" << lhs);
                 string rhs(yyourtext(), yyourleng());
-                UINFO(5, "`` RHS:" << rhs << endl);
+                UINFO(5, "`` RHS:" << rhs);
                 const string out = lhs + rhs;
-                UINFO(5, "`` Out:" << out << endl);
+                UINFO(5, "`` Out:" << out);
                 unputString(out);
                 statePop();
                 goto next_tok;
@@ -1542,14 +1542,14 @@ int V3PreProcImp::getStateToken() {
                 const VPreIfEntry lastIf = m_ifdefStack.top();
                 m_ifdefStack.pop();
                 const bool enable = !lastIf.everOn();
-                UINFO(4, "Else " << (enable ? " ON" : " OFF") << endl);
+                UINFO(4, "Else " << (enable ? " ON" : " OFF"));
                 m_ifdefStack.push(VPreIfEntry{enable, lastIf.everOn()});
                 if (!lastIf.on()) parsingOn();
                 if (!enable) parsingOff();
             }
             goto next_tok;
         case VP_ENDIF:
-            UINFO(4, "Endif " << endl);
+            UINFO(4, "Endif ");
             if (m_ifdefStack.empty()) {
                 fileline()->v3error("`endif with no matching `if");
             } else {
@@ -1565,7 +1565,7 @@ int V3PreProcImp::getStateToken() {
             // m_off not right here, but inside substitution, to make this work:
             // `ifdef NEVER `DEFUN(`endif)
             string name(yyourtext() + 1, yyourleng() - 1);
-            UINFO(4, "DefRef " << name << endl);
+            UINFO(4, "DefRef " << name);
             if (m_defPutJoin) {
                 m_defPutJoin = false;
                 unputString("``");
@@ -1577,7 +1577,7 @@ int V3PreProcImp::getStateToken() {
             // Substitute
             if (!defExists(name)) {  // Not found, return original string as-is
                 m_defDepth = 0;
-                UINFO(4, "Defref `" << name << " => not_defined" << endl);
+                UINFO(4, "Defref `" << name << " => not_defined");
                 if (m_off) {
                     goto next_tok;
                 } else {
@@ -1603,7 +1603,7 @@ int V3PreProcImp::getStateToken() {
                             const string lhs = m_joinStack.top();
                             m_joinStack.pop();
                             out.insert(0, lhs);
-                            UINFO(5, "``-end-defref Out:" << out << endl);
+                            UINFO(5, "``-end-defref Out:" << out);
                             statePop();
                         }
                         if (!m_off) {
@@ -1624,7 +1624,7 @@ int V3PreProcImp::getStateToken() {
                     }
                     goto next_tok;
                 } else {  // Found, with parameters
-                    UINFO(4, "Defref `" << name << " => parameterized" << endl);
+                    UINFO(4, "Defref `" << name << " => parameterized");
                     // The CURRENT macro needs the paren saved, it's not a
                     // property of the child macro
                     if (!m_defRefs.empty()) m_defRefs.top().parenLevel(m_lexp->m_parenLevel);
@@ -1646,7 +1646,7 @@ int V3PreProcImp::getStateToken() {
             return tok;
         case VP_UNDEFINEALL:
             if (!m_off) {
-                UINFO(4, "Undefineall " << endl);
+                UINFO(4, "Undefineall ");
                 undefineall();
             }
             goto next_tok;
@@ -1691,7 +1691,7 @@ int V3PreProcImp::getFinalToken(string& buf) {
     if (false && debug() >= 5) {
         const string bufcln = V3PreLex::cleanDbgStrg(buf);
         const string flcol = m_lexp->m_tokFilelinep->asciiLineCol();
-        UINFO(0, flcol << ": FIN:      " << tokenName(tok) << ": " << bufcln << endl);
+        UINFO(0, flcol << ": FIN:      " << tokenName(tok) << ": " << bufcln);
     }
     // Track `line
     const char* bufp = buf.c_str();
@@ -1706,8 +1706,7 @@ int V3PreProcImp::getFinalToken(string& buf) {
                 if (debug() >= 5) {
                     const string flcol = m_lexp->m_tokFilelinep->asciiLineCol();
                     UINFO(0, flcol << ": FIN: readjust, fin at " << m_finFilelinep->lastLineno()
-                                   << "  request at " << m_lexp->m_tokFilelinep->lastLineno()
-                                   << endl);
+                                   << "  request at " << m_lexp->m_tokFilelinep->lastLineno());
                 }
                 m_finFilelinep->filename(m_lexp->m_tokFilelinep->filename());
                 m_finFilelinep->lineno(m_lexp->m_tokFilelinep->lastLineno());
@@ -1751,7 +1750,7 @@ string V3PreProcImp::getline() {
         if (debug() >= 5) {
             const string bufcln = V3PreLex::cleanDbgStrg(buf);
             const string flcol = m_lexp->m_tokFilelinep->asciiLineCol();
-            UINFO(0, flcol << ": GETFETC:  " << tokenName(tok) << ": " << bufcln << endl);
+            UINFO(0, flcol << ": GETFETC:  " << tokenName(tok) << ": " << bufcln);
         }
         if (tok == VP_EOF) {
             // Add a final newline, if the user forgot the final \n.
@@ -1771,7 +1770,7 @@ string V3PreProcImp::getline() {
     if (debug() >= 4) {
         const string lncln = V3PreLex::cleanDbgStrg(theLine);
         const string flcol = m_lexp->m_tokFilelinep->asciiLineCol();
-        UINFO(0, flcol << ": GETLINE:  " << lncln << endl);
+        UINFO(0, flcol << ": GETLINE:  " << lncln);
     }
     return theLine;
 }
diff --git a/src/V3PreShell.cpp b/src/V3PreShell.cpp
index c93c74371..e8c41a8e9 100644
--- a/src/V3PreShell.cpp
+++ b/src/V3PreShell.cpp
@@ -87,7 +87,7 @@ protected:
     bool preproc(FileLine* fl, const string& modname, VInFilter* filterp, V3ParseImp* parsep,
                  const string& errmsg) {  // "" for no error
         // Preprocess the given module, putting output in vppFilename
-        UINFO(1, "Preprocessing " << modname << endl);
+        UINFO(1, "Preprocessing " << modname);
 
         // Preprocess
         s_filterp = filterp;
@@ -140,7 +140,7 @@ private:
         }
         if (filename == "") return "";  // Not found
 
-        UINFO(2, "    Reading " << filename << endl);
+        UINFO(2, "    Reading " << filename);
         s_preprocp->openFile(fl, filterp, filename);
         return filename;
     }
diff --git a/src/V3Premit.cpp b/src/V3Premit.cpp
index 168ea0d86..a9d7f9581 100644
--- a/src/V3Premit.cpp
+++ b/src/V3Premit.cpp
@@ -67,7 +67,7 @@ class PremitVisitor final : public VNVisitor {
 
     AstVar* createWideTemp(AstNodeExpr* nodep) {
         UASSERT_OBJ(m_stmtp, nodep, "Attempting to create temporary with no insertion point");
-        UINFO(4, "createWideTemp: " << nodep << endl);
+        UINFO(4, "createWideTemp: " << nodep);
 
         VNRelinker relinker;
         nodep->unlinkFrBack(&relinker);
@@ -118,7 +118,7 @@ class PremitVisitor final : public VNVisitor {
 
     void visitShift(AstNodeBiop* nodep) {
         // Shifts of > 32/64 bits in C++ will wrap-around and generate non-0s
-        UINFO(4, "  ShiftFix  " << nodep << endl);
+        UINFO(4, "  ShiftFix  " << nodep);
         const AstConst* const shiftp = VN_CAST(nodep->rhsp(), Const);
         if (shiftp && shiftp->num().mostSetBitP1() > 32) {
             shiftp->v3error(
@@ -181,7 +181,7 @@ class PremitVisitor final : public VNVisitor {
     m_inWhileCondp = nullptr
 
     void visit(AstWhile* nodep) override {
-        UINFO(4, "  WHILE  " << nodep << endl);
+        UINFO(4, "  WHILE  " << nodep);
         // cppcheck-suppress shadowVariable  // Also restored below
         START_STATEMENT_OR_RETURN(nodep);
         iterateAndNextNull(nodep->precondsp());
@@ -241,7 +241,7 @@ class PremitVisitor final : public VNVisitor {
                 && nodep->filep()->sameGateTree(VN_AS(searchp, Display)->filep())) {
                 // There's another display next; we can just wait to flush
             } else {
-                UINFO(4, "Autoflush " << nodep << endl);
+                UINFO(4, "Autoflush " << nodep);
                 nodep->addNextHere(
                     new AstFFlush{nodep->fileline(),
                                   nodep->filep() ? nodep->filep()->cloneTreePure(true) : nullptr});
@@ -367,7 +367,7 @@ public:
 // Premit class functions
 
 void V3Premit::premitAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { PremitVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("premit", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index 9b09a7a5f..aec3c1bd4 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -541,6 +541,6 @@ public:
 // ProtectLib class functions
 
 void V3ProtectLib::protect() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     ProtectVisitor{v3Global.rootp()};
 }
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index c1e5c756d..1f9f0edbd 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -189,7 +189,7 @@ class RandomizeMarkVisitor final : public VNVisitor {
     }
     void setPackageRefs() {
         for (AstNodeVarRef* staticRefp : m_staticRefs) {
-            UINFO(9, "Updated classOrPackage ref for " << staticRefp->name() << endl);
+            UINFO(9, "Updated classOrPackage ref for " << staticRefp->name());
             staticRefp->classOrPackagep(VN_AS(staticRefp->varp()->user2p(), NodeModule));
         }
     }
@@ -1457,7 +1457,7 @@ class RandomizeVisitor final : public VNVisitor {
     }
     AstVar* enumValueTabp(AstEnumDType* const nodep) {
         if (nodep->user2p()) return VN_AS(nodep->user2p(), Var);
-        UINFO(9, "Construct Venumvaltab " << nodep << endl);
+        UINFO(9, "Construct Venumvaltab " << nodep);
         AstNodeArrayDType* const vardtypep = new AstUnpackArrayDType{
             nodep->fileline(), nodep->dtypep(),
             new AstRange{nodep->fileline(), static_cast<int>(nodep->itemCount()), 0}};
@@ -1521,7 +1521,7 @@ class RandomizeVisitor final : public VNVisitor {
             = new AstVar{varp->fileline(), VVarType::MEMBER, varp->name() + "__Vrandc", newdtp};
         newp->isInternal(true);
         varp->addNextHere(newp);
-        UINFO(9, "created " << varp << endl);
+        UINFO(9, "created " << varp);
         return newp;
     }
     AstNodeStmt* createArrayForeachLoop(FileLine* const fl, AstNodeDType* const dtypep,
@@ -1997,7 +1997,7 @@ class RandomizeVisitor final : public VNVisitor {
 
         iterateChildren(nodep);
         if (!nodep->user1()) return;  // Doesn't need randomize, or already processed
-        UINFO(9, "Define randomize() for " << nodep << endl);
+        UINFO(9, "Define randomize() for " << nodep);
         nodep->baseMostClassp()->needRNG(true);
         AstFunc* const randomizep = V3Randomize::newRandomizeFunc(m_memberMap, nodep);
         AstVar* const fvarp = VN_AS(randomizep->fvarp(), Var);
@@ -2367,7 +2367,7 @@ public:
 // Randomize method class functions
 
 void V3Randomize::randomizeNetlist(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         const RandomizeMarkVisitor markVisitor{nodep};
         RandomizeVisitor randomizeVisitor{nodep};
diff --git a/src/V3Reloop.cpp b/src/V3Reloop.cpp
index fc0f69f30..19133d323 100644
--- a/src/V3Reloop.cpp
+++ b/src/V3Reloop.cpp
@@ -74,11 +74,11 @@ class ReloopVisitor final : public VNVisitor {
         if (!m_mgAssignps.empty()) {
             const uint32_t items = m_mgIndexHi - m_mgIndexLo + 1;
             UINFO(9, "End merge iter=" << items << " " << m_mgIndexHi << ":" << m_mgIndexLo << " "
-                                       << m_mgOffset << " " << m_mgAssignps[0] << endl);
+                                       << m_mgOffset << " " << m_mgAssignps[0]);
             if (items >= static_cast<uint32_t>(v3Global.opt.reloopLimit())) {
                 UINFO(6, "Reloop merging items=" << items << " " << m_mgIndexHi << ":"
                                                  << m_mgIndexLo << " " << m_mgOffset << " "
-                                                 << m_mgAssignps[0] << endl);
+                                                 << m_mgAssignps[0]);
                 ++m_statReloops;
                 m_statReItems += items;
 
@@ -212,14 +212,14 @@ class ReloopVisitor final : public VNVisitor {
                     m_mgIndexHi = lindex;
                 }
                 UINFO(9, "Continue merge i=" << lindex << " " << m_mgIndexHi << ":" << m_mgIndexLo
-                                             << " " << nodep << endl);
+                                             << " " << nodep);
                 m_mgAssignps.push_back(nodep);
                 m_mgNextp = nodep->nextp();
                 return;
             } else {
-                UINFO(9, "End merge i="
-                             << lindex << " " << m_mgIndexHi << ":" << m_mgIndexLo << " " << nodep
-                             << endl);  // This assign doesn't merge with previous assign,
+                UINFO(9, "End merge i=" << lindex << " " << m_mgIndexHi << ":" << m_mgIndexLo
+                                        << " " << nodep);
+                // This assign doesn't merge with previous assign,
                 // but should start a new merge
                 mergeEnd();
             }
@@ -237,7 +237,7 @@ class ReloopVisitor final : public VNVisitor {
         m_mgConstRp = rconstp;
         m_mgIndexLo = lindex;
         m_mgIndexHi = lindex;
-        UINFO(9, "Start merge i=" << lindex << " o=" << m_mgOffset << nodep << endl);
+        UINFO(9, "Start merge i=" << lindex << " o=" << m_mgOffset << nodep);
     }
     void visit(AstExprStmt* nodep) override { iterateChildren(nodep); }
     //--------------------
@@ -258,7 +258,7 @@ public:
 // Reloop class functions
 
 void V3Reloop::reloopAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ReloopVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("reloop", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3Sampled.cpp b/src/V3Sampled.cpp
index 45fdbfafc..14b82acb0 100644
--- a/src/V3Sampled.cpp
+++ b/src/V3Sampled.cpp
@@ -57,7 +57,7 @@ class SampledVisitor final : public VNVisitor {
         m_scopep->addVarsp(newvscp);
         // At the top of _eval, assign them (use valuep here as temporary storage during V3Sched)
         newvarp->valuep(new AstVarRef{flp, vscp, VAccess::READ});
-        UINFO(4, "New Sampled: " << newvscp << endl);
+        UINFO(4, "New Sampled: " << newvscp);
         return newvscp;
     }
 
@@ -100,7 +100,7 @@ public:
 // Sampled class functions
 
 void V3Sampled::sampledAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { SampledVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("sampled", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Sched.cpp b/src/V3Sched.cpp
index 8b2b12629..cfb810d4b 100644
--- a/src/V3Sched.cpp
+++ b/src/V3Sched.cpp
@@ -1379,7 +1379,7 @@ void schedule(AstNetlist* netlistp) {
     // Orders a region's logic and creates the region eval function
     const auto order = [&](const std::string& name,
                            const std::vector<V3Sched::LogicByScope*>& logic) -> EvalKit {
-        UINFO(2, "Scheduling " << name << " #logic = " << logic.size() << endl);
+        UINFO(2, "Scheduling " << name << " #logic = " << logic.size());
         AstVarScope* const trigVscp
             = scopeTopp->createTempLike("__V" + name + "Triggered", actTrigVscp);
         const auto trigMap = cloneMapWithNewTriggerReferences(actTrigMap, trigVscp);
diff --git a/src/V3SchedPartition.cpp b/src/V3SchedPartition.cpp
index 447534f26..dc695adc8 100644
--- a/src/V3SchedPartition.cpp
+++ b/src/V3SchedPartition.cpp
@@ -331,7 +331,7 @@ void colorActiveRegion(V3Graph& graph) {
 
 LogicRegions partition(LogicByScope& clockedLogic, LogicByScope& combinationalLogic,
                        LogicByScope& hybridLogic) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     // Build the graph
     const std::unique_ptr<V3Graph> graphp
diff --git a/src/V3SchedVirtIface.cpp b/src/V3SchedVirtIface.cpp
index 6fa88ee37..3a7ba6b4c 100644
--- a/src/V3SchedVirtIface.cpp
+++ b/src/V3SchedVirtIface.cpp
@@ -222,7 +222,7 @@ public:
 }  //namespace
 
 VirtIfaceTriggers makeVirtIfaceTriggers(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     if (v3Global.hasVirtIfaces()) {
         VirtIfaceVisitor visitor{nodep};
         V3Global::dumpCheckGlobalTree("sched_vif", 0, dumpTreeEitherLevel() >= 6);
diff --git a/src/V3Scope.cpp b/src/V3Scope.cpp
index f295d478a..cc89adb07 100644
--- a/src/V3Scope.cpp
+++ b/src/V3Scope.cpp
@@ -97,7 +97,7 @@ class ScopeVisitor final : public VNVisitor {
             scopename = m_aboveScopep->name() + "." + m_aboveCellp->name();
         }
 
-        UINFO(4, " MOD AT " << scopename << "  " << nodep << endl);
+        UINFO(4, " MOD AT " << scopename << "  " << nodep);
         AstNode::user1ClearTree();
 
         m_scopep = new AstScope{
@@ -128,7 +128,7 @@ class ScopeVisitor final : public VNVisitor {
         }
 
         // Create scope for the current usage of this module
-        UINFO(4, " back AT " << scopename << "  " << nodep << endl);
+        UINFO(4, " back AT " << scopename << "  " << nodep);
         AstNode::user1ClearTree();
         m_modp = nodep;
         if (m_modp->isTop()) {
@@ -159,7 +159,7 @@ class ScopeVisitor final : public VNVisitor {
             scopename = m_aboveScopep->name() + "." + nodep->name();
         }
 
-        UINFO(4, " CLASS AT " << scopename << "  " << nodep << endl);
+        UINFO(4, " CLASS AT " << scopename << "  " << nodep);
         AstNode::user1ClearTree();
 
         const AstNode* const abovep
@@ -184,7 +184,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstNodeProcedure* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -192,7 +192,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstAssignAlias* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -200,7 +200,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstAssignVarScope* nodep) override {
         // Copy under the scope but don't recurse
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -208,7 +208,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstAssignW* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -216,7 +216,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstAlwaysPublic* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -224,7 +224,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstCoverToggle* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    Move " << nodep << endl);
+        UINFO(4, "    Move " << nodep);
         AstNode* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -232,7 +232,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstCFunc* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    CFUNC " << nodep << endl);
+        UINFO(4, "    CFUNC " << nodep);
         AstCFunc* const clonep = nodep->cloneTree(false);
         nodep->user2p(clonep);
         m_scopep->addBlocksp(clonep);
@@ -242,7 +242,7 @@ class ScopeVisitor final : public VNVisitor {
     }
     void visit(AstNodeFTask* nodep) override {
         // Add to list of blocks under this scope
-        UINFO(4, "    FTASK " << nodep << endl);
+        UINFO(4, "    FTASK " << nodep);
         AstNodeFTask* clonep;
         if (nodep->classMethod()) {
             // Only one scope will be created, so avoid pointless cloning
@@ -265,7 +265,7 @@ class ScopeVisitor final : public VNVisitor {
                 if (ifacerefp->cellp()) scopep = VN_AS(ifacerefp->cellp()->user2p(), Scope);
             }
             AstVarScope* const varscp = new AstVarScope{nodep->fileline(), scopep, nodep};
-            UINFO(6, "   New scope " << varscp << endl);
+            UINFO(6, "   New scope " << varscp);
             if (m_aboveCellp && !m_aboveCellp->isTrace()) varscp->trace(false);
             nodep->user1p(varscp);
             if (v3Global.opt.isClocker(varscp->prettyName())) {
@@ -363,18 +363,18 @@ class ScopeCleanupVisitor final : public VNVisitor {
     }
     void visit(AstNodeFTaskRef* nodep) override {
         // The crossrefs are dealt with in V3LinkDot
-        UINFO(9, "   Old pkg-taskref " << nodep << endl);
+        UINFO(9, "   Old pkg-taskref " << nodep);
         if (nodep->classOrPackagep()) {
             // Point to the clone
             UASSERT_OBJ(nodep->taskp(), nodep, "Unlinked");
             AstNodeFTask* const newp = VN_AS(nodep->taskp()->user2p(), NodeFTask);
             UASSERT_OBJ(newp, nodep, "No clone for package function");
             nodep->taskp(newp);
-            UINFO(9, "   New pkg-taskref " << nodep << endl);
+            UINFO(9, "   New pkg-taskref " << nodep);
         } else if (!VN_IS(nodep, MethodCall)) {
             nodep->taskp(nullptr);
             VIsCached::clearCacheTree();
-            UINFO(9, "   New pkg-taskref " << nodep << endl);
+            UINFO(9, "   New pkg-taskref " << nodep);
         }
         iterateChildren(nodep);
     }
@@ -398,7 +398,7 @@ public:
 // Scope class functions
 
 void V3Scope::scopeAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         const ScopeVisitor visitor{nodep};
         ScopeCleanupVisitor{nodep};
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index c2a3f79ea..f62f7dc75 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -211,7 +211,7 @@ public:
         if (!m_whyNotNodep) {
             m_whyNotNodep = nodep;
             if (debug() >= 5) {  // LCOV_EXCL_START
-                UINFO(0, "Clear optimizable: " << why);
+                UINFO_PREFIX("Clear optimizable: " << why);
                 if (nodep) std::cout << ": " << nodep;
                 std::cout << std::endl;
             }  // LCOV_EXCL_STOP
@@ -257,7 +257,7 @@ public:
     void newValue(AstNode* nodep, const AstNodeExpr* valuep) {
         if (const AstConst* const constp = VN_CAST(valuep, Const)) {
             newConst(nodep)->num().opAssign(constp->num());
-            UINFO(9, "     new val " << valuep->name() << " on " << nodep << endl);
+            UINFO(9, "     new val " << valuep->name() << " on " << nodep);
         } else if (fetchValueNull(nodep) != valuep) {
             // const_cast, as clonep() is set on valuep, but nothing should care
             setValue(nodep, newTrackedClone(const_cast<AstNodeExpr*>(valuep)));
@@ -266,7 +266,7 @@ public:
     void newOutValue(AstNode* nodep, const AstNodeExpr* valuep) {
         if (const AstConst* const constp = VN_CAST(valuep, Const)) {
             newOutConst(nodep)->num().opAssign(constp->num());
-            UINFO(9, "     new oval " << valuep->name() << " on " << nodep << endl);
+            UINFO(9, "     new oval " << valuep->name() << " on " << nodep);
         } else if (fetchOutValueNull(nodep) != valuep) {
             // const_cast, as clonep() is set on valuep, but nothing should care
             setOutValue(nodep, newTrackedClone(const_cast<AstNodeExpr*>(valuep)));
@@ -312,13 +312,13 @@ private:
     AstNodeExpr* fetchValue(AstNode* nodep) {
         AstNodeExpr* const valuep = fetchValueNull(nodep);
         UASSERT_OBJ(valuep, nodep, "No value found for node.");
-        // UINFO(9, "     fetch val " << *valuep << " on " << nodep << endl);
+        // UINFO(9, "     fetch val " << *valuep << " on " << nodep);
         return valuep;
     }
     AstConst* fetchConst(AstNode* nodep) {
         AstConst* const constp = fetchConstNull(nodep);
         UASSERT_OBJ(constp, nodep, "No value found for node.");
-        // UINFO(9, "     fetch num " << *constp << " on " << nodep << endl);
+        // UINFO(9, "     fetch num " << *constp << " on " << nodep);
         return constp;
     }
     AstConst* fetchOutConst(AstNode* nodep) {
@@ -342,12 +342,12 @@ public:
 private:
     void setValue(AstNode* nodep, AstNodeExpr* valuep) {
         UASSERT_OBJ(valuep, nodep, "Simulate setting null value");
-        UINFO(9, "     set val " << valuep->name() << " on " << nodep << endl);
+        UINFO(9, "     set val " << valuep->name() << " on " << nodep);
         m_varAux(nodep).valuep = valuep;
     }
     void setOutValue(AstNode* nodep, AstNodeExpr* valuep) {
         UASSERT_OBJ(valuep, nodep, "Simulate setting null value");
-        UINFO(9, "     set oval " << valuep->name() << " on " << nodep << endl);
+        UINFO(9, "     set oval " << valuep->name() << " on " << nodep);
         m_varAux(nodep).outValuep = valuep;
     }
 
@@ -357,7 +357,7 @@ private:
             m_dataCount += nodep->width();
         }
         if (!ignorePredict && !nodep->isPredictOptimizable()) {
-            // UINFO(9, "     !predictopt " << nodep << endl);
+            // UINFO(9, "     !predictopt " << nodep);
             clearOptimizable(nodep, "Isn't predictable");
         }
         if (!nodep->isPure()) m_isImpure = true;
@@ -382,8 +382,7 @@ private:
             static std::set<VNType> s_typePrinted;
             const auto pair = s_typePrinted.emplace(nodep->type());
             if (pair.second)
-                UINFO(0,
-                      "Unknown node type in SimulateVisitor: " << nodep->prettyTypeName() << endl);
+                UINFO(0, "Unknown node type in SimulateVisitor: " << nodep->prettyTypeName());
 #endif
         }
     }
@@ -531,7 +530,7 @@ private:
     }
     void visit(AstNodeIf* nodep) override {
         if (jumpingOver(nodep)) return;
-        UINFO(5, "   IF " << nodep << endl);
+        UINFO(5, "   IF " << nodep);
         checkNodeInfo(nodep);
         if (m_checkOnly) {
             iterateChildrenConst(nodep);
@@ -738,7 +737,7 @@ private:
             }
             const uint32_t index = fetchConst(selp->bitp())->toUInt();
             AstNodeExpr* const valuep = newTrackedClone(fetchValue(nodep->rhsp()));
-            UINFO(9, "     set val[" << index << "] = " << valuep << endl);
+            UINFO(9, "     set val[" << index << "] = " << valuep);
             // Values are in the "real" tree under the InitArray so can eventually extract it,
             // Not in the usual setValue (via m_varAux)
             initp->addIndexValuep(index, valuep);
@@ -861,7 +860,7 @@ private:
     }
     void visit(AstNodeCase* nodep) override {
         if (jumpingOver(nodep)) return;
-        UINFO(5, "   CASE " << nodep << endl);
+        UINFO(5, "   CASE " << nodep);
         checkNodeInfo(nodep);
         if (m_checkOnly) {
             iterateChildrenConst(nodep);
@@ -929,7 +928,7 @@ private:
         if (jumpingOver(nodep)) return;
         checkNodeInfo(nodep);
         if (!m_checkOnly) {
-            UINFO(5, "   JUMP GO " << nodep << endl);
+            UINFO(5, "   JUMP GO " << nodep);
             m_jumpp = nodep;
         }
     }
@@ -940,7 +939,7 @@ private:
         checkNodeInfo(nodep);
         iterateChildrenConst(nodep);
         if (m_jumpp && m_jumpp->labelp() == nodep) {
-            UINFO(5, "   JUMP DONE " << nodep << endl);
+            UINFO(5, "   JUMP DONE " << nodep);
             m_jumpp = nullptr;
         }
     }
@@ -957,7 +956,7 @@ private:
 
     void visit(AstNodeFor* nodep) override {
         // Doing lots of Whiles is slow, so only for parameters
-        UINFO(5, "   FOR " << nodep << endl);
+        UINFO(5, "   FOR " << nodep);
         if (!m_params) {
             badNodeType(nodep);
             return;
@@ -969,7 +968,7 @@ private:
             int loops = 0;
             iterateAndNextConstNull(nodep->initsp());
             while (true) {
-                UINFO(5, "    FOR-ITER " << nodep << endl);
+                UINFO(5, "    FOR-ITER " << nodep);
                 iterateAndNextConstNull(nodep->condp());
                 if (!optimizable()) break;
                 if (!fetchConst(nodep->condp())->num().isNeqZero()) {  //
@@ -991,7 +990,7 @@ private:
     void visit(AstWhile* nodep) override {
         // Doing lots of Whiles is slow, so only for parameters
         if (jumpingOver(nodep)) return;
-        UINFO(5, "   WHILE " << nodep << endl);
+        UINFO(5, "   WHILE " << nodep);
         if (!m_params) {
             badNodeType(nodep);
             return;
@@ -1002,7 +1001,7 @@ private:
         } else if (optimizable()) {
             int loops = 0;
             while (true) {
-                UINFO(5, "    WHILE-ITER " << nodep << endl);
+                UINFO(5, "    WHILE-ITER " << nodep);
                 iterateAndNextConstNull(nodep->precondsp());
                 if (jumpingOver(nodep)) break;
                 iterateAndNextConstNull(nodep->condp());
@@ -1032,7 +1031,7 @@ private:
     void visit(AstFuncRef* nodep) override {
         if (jumpingOver(nodep)) return;
         if (!optimizable()) return;  // Accelerate
-        UINFO(5, "   FUNCREF " << nodep << endl);
+        UINFO(5, "   FUNCREF " << nodep);
         checkNodeInfo(nodep);
         if (!m_params) {
             badNodeType(nodep);
diff --git a/src/V3Slice.cpp b/src/V3Slice.cpp
index 5744f5ed8..b96d980ad 100644
--- a/src/V3Slice.cpp
+++ b/src/V3Slice.cpp
@@ -94,7 +94,7 @@ class SliceVisitor final : public VNVisitor {
         }
         AstNodeExpr* newp;
         if (AstInitArray* const initp = VN_CAST(nodep, InitArray)) {
-            UINFO(9, "  cloneInitArray(" << elements << "," << elemIdx << ") " << nodep << endl);
+            UINFO(9, "  cloneInitArray(" << elements << "," << elemIdx << ") " << nodep);
 
             auto considerOrder = [](const auto* nodep, int idxFromLeft) -> int {
                 return !nodep->rangep()->ascending()
@@ -191,12 +191,12 @@ class SliceVisitor final : public VNVisitor {
             }
             if (!newp) newp = new AstConst{nodep->fileline(), 0};
         } else if (AstNodeCond* const snodep = VN_CAST(nodep, NodeCond)) {
-            UINFO(9, "  cloneCond(" << elements << "," << elemIdx << ") " << nodep << endl);
+            UINFO(9, "  cloneCond(" << elements << "," << elemIdx << ") " << nodep);
             return snodep->cloneType(snodep->condp()->cloneTree(false, needPure),
                                      cloneAndSel(snodep->thenp(), elements, elemIdx, needPure),
                                      cloneAndSel(snodep->elsep(), elements, elemIdx, needPure));
         } else if (const AstSliceSel* const snodep = VN_CAST(nodep, SliceSel)) {
-            UINFO(9, "  cloneSliceSel(" << elements << "," << elemIdx << ") " << nodep << endl);
+            UINFO(9, "  cloneSliceSel(" << elements << "," << elemIdx << ") " << nodep);
             const int leOffset = (snodep->declRange().lo()
                                   + (!snodep->declRange().ascending()
                                          ? snodep->declRange().elements() - 1 - elemIdx
@@ -204,7 +204,7 @@ class SliceVisitor final : public VNVisitor {
             newp = new AstArraySel{nodep->fileline(), snodep->fromp()->cloneTree(false, needPure),
                                    leOffset};
         } else if (AstExprStmt* const snodep = VN_CAST(nodep, ExprStmt)) {
-            UINFO(9, "  cloneExprStmt(" << elements << "," << elemIdx << ") " << nodep << endl);
+            UINFO(9, "  cloneExprStmt(" << elements << "," << elemIdx << ") " << nodep);
             AstNodeExpr* const resultSelp
                 = cloneAndSel(snodep->resultp(), elements, elemIdx, needPure);
             if (snodep->stmtsp()) {
@@ -215,7 +215,7 @@ class SliceVisitor final : public VNVisitor {
             }
         } else if (VN_IS(nodep, NodeVarRef) || VN_IS(nodep, NodeSel) || VN_IS(nodep, CMethodHard)
                    || VN_IS(nodep, MemberSel) || VN_IS(nodep, StructSel)) {
-            UINFO(9, "  cloneSel(" << elements << "," << elemIdx << ") " << nodep << endl);
+            UINFO(9, "  cloneSel(" << elements << "," << elemIdx << ") " << nodep);
             const int leOffset = !arrayp->rangep()->ascending()
                                      ? arrayp->rangep()->elementsConst() - 1 - elemIdx
                                      : elemIdx;
@@ -248,7 +248,7 @@ class SliceVisitor final : public VNVisitor {
             return false;
         }
 
-        UINFO(4, "Slice optimizing " << nodep << endl);
+        UINFO(4, "Slice optimizing " << nodep);
         ++m_statAssigns;
 
         // Left and right could have different ascending/descending range,
@@ -319,7 +319,7 @@ class SliceVisitor final : public VNVisitor {
 
     void expandBiOp(AstNodeBiop* nodep) {
         if (nodep->user1SetOnce()) return;  // Process once
-        UINFO(9, "  Bi-Eq/Neq expansion " << nodep << endl);
+        UINFO(9, "  Bi-Eq/Neq expansion " << nodep);
 
         // Only expand if lhs is an unpacked array (we assume type checks already passed)
         const AstNodeDType* const fromDtp = nodep->lhsp()->dtypep()->skipRefp();
@@ -390,7 +390,7 @@ public:
 // Link class functions
 
 void V3Slice::sliceAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { SliceVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("slice", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Split.cpp b/src/V3Split.cpp
index fe0b48d89..323ebd5b3 100644
--- a/src/V3Split.cpp
+++ b/src/V3Split.cpp
@@ -294,14 +294,14 @@ private:
         }
     }
     void scoreboardPushStmt(AstNode* nodep) {
-        // UINFO(9, "    push " << nodep << endl);
+        // UINFO(9, "    push " << nodep);
         SplitLogicVertex* const vertexp = new SplitLogicVertex{&m_graph, nodep};
         m_stmtStackps.push_back(vertexp);
         UASSERT_OBJ(!nodep->user3p(), nodep, "user3p should not be used; cleared in processBlock");
         nodep->user3p(vertexp);
     }
     void scoreboardPopStmt() {
-        // UINFO(9, "    pop" << endl);
+        // UINFO(9, "    pop");
         UASSERT(!m_stmtStackps.empty(), "Stack underflow");
         m_stmtStackps.pop_back();
     }
@@ -321,7 +321,7 @@ protected:
             if (vertex.outEmpty() && vertex.is<SplitVarStdVertex>()) {
                 if (debug() >= 9) {
                     const SplitVarStdVertex& sVtx = static_cast<SplitVarStdVertex&>(vertex);
-                    UINFO(0, "Will prune deps on var " << sVtx.nodep() << endl);
+                    UINFO(0, "Will prune deps on var " << sVtx.nodep());
                     sVtx.nodep()->dumpTree("-  ");
                 }
                 for (V3GraphEdge& edge : vertex.inEdges()) {
@@ -344,7 +344,7 @@ protected:
     void visit(AstAssignDly* nodep) override {
         VL_RESTORER(m_inDly);
         m_inDly = true;
-        UINFO(4, "    ASSIGNDLY " << nodep << endl);
+        UINFO(4, "    ASSIGNDLY " << nodep);
         iterateChildren(nodep);
     }
     void visit(AstVarRef* nodep) override {
@@ -380,7 +380,7 @@ protected:
 
                 // SPEEDUP: We add duplicate edges, that should be fixed
                 if (m_inDly && nodep->access().isWriteOrRW()) {
-                    UINFO(4, "     VARREFDLY: " << nodep << endl);
+                    UINFO(4, "     VARREFDLY: " << nodep);
                     // Delayed variable is different from non-delayed variable
                     if (!vscp->user2p()) {
                         SplitVarPostVertex* const vpostp = new SplitVarPostVertex{&m_graph, vscp};
@@ -397,12 +397,12 @@ protected:
                     if (nodep->access().isWriteOrRW()) {
                         // Non-delay; need to maintain existing ordering
                         // with all consumers of the signal
-                        UINFO(4, "     VARREFLV: " << nodep << endl);
+                        UINFO(4, "     VARREFLV: " << nodep);
                         for (SplitLogicVertex* ivxp : m_stmtStackps) {
                             new SplitLVEdge{&m_graph, vstdp, ivxp};
                         }
                     } else {
-                        UINFO(4, "     VARREF:   " << nodep << endl);
+                        UINFO(4, "     VARREF:   " << nodep);
                         makeRvalueEdges(vstdp);
                     }
                 }
@@ -415,7 +415,7 @@ protected:
         // This is overly pessimistic; we could treat jumps as barriers, and
         // reorder everything between jumps/labels, however jumps are rare
         // in always, so the performance gain probably isn't worth the work.
-        UINFO(9, "         NoReordering " << nodep << endl);
+        UINFO(9, "         NoReordering " << nodep);
         m_noReorderWhy = "JumpGo";
         iterateChildren(nodep);
     }
@@ -425,11 +425,11 @@ protected:
     void visit(AstNode* nodep) override {
         // **** SPECIAL default type that sets PLI_ORDERING
         if (!m_stmtStackps.empty() && !nodep->isPure()) {
-            UINFO(9, "         NotSplittable " << nodep << endl);
+            UINFO(9, "         NotSplittable " << nodep);
             scoreboardPli(nodep);
         }
         if (nodep->isTimingControl()) {
-            UINFO(9, "         NoReordering " << nodep << endl);
+            UINFO(9, "         NoReordering " << nodep);
             m_noReorderWhy = "TimingControl";
         }
         iterateChildren(nodep);
@@ -453,7 +453,7 @@ protected:
 
     void cleanupBlockGraph(AstNode* nodep) {
         // Transform the graph into what we need
-        UINFO(5, "ReorderBlock " << nodep << endl);
+        UINFO(5, "ReorderBlock " << nodep);
         m_graph.removeRedundantEdgesMax(&V3GraphEdge::followAlwaysTrue);
 
         if (dumpGraphLevel() >= 9) m_graph.dumpDotFilePrefixed("reorderg_nodup", false);
@@ -536,13 +536,13 @@ protected:
             if (++newOrder != nextp->user4()) leaveAlone = false;
         }
         if (leaveAlone) {
-            UINFO(6, "   No changes\n");
+            UINFO(6, "   No changes");
         } else {
             VNRelinker replaceHandle;  // Where to add the list
             AstNode* newListp = nullptr;
             for (auto it = rankMap.cbegin(); it != rankMap.cend(); ++it) {
                 AstNode* const nextp = it->second;
-                UINFO(6, "   New order: " << nextp << endl);
+                UINFO(6, "   New order: " << nextp);
                 if (nextp == nodep) {
                     nodep->unlinkFrBack(&replaceHandle);
                 } else {
@@ -573,11 +573,11 @@ protected:
             // Just one, so can't reorder.  Just look for more blocks/statements.
             iterate(nodep);
         } else {
-            UINFO(9, "  processBlock " << nodep << endl);
+            UINFO(9, "  processBlock " << nodep);
             // Process block and followers
             scanBlock(nodep);
             if (m_noReorderWhy != "") {  // Jump or something nasty
-                UINFO(9, "  NoReorderBlock because " << m_noReorderWhy << endl);
+                UINFO(9, "  NoReorderBlock because " << m_noReorderWhy);
             } else {
                 // Reorder statements in this block
                 cleanupBlockGraph(nodep);
@@ -597,7 +597,7 @@ protected:
     }
 
     void visit(AstAlways* nodep) override {
-        UINFO(4, "   ALW   " << nodep << endl);
+        UINFO(4, "   ALW   " << nodep);
         if (debug() >= 9) nodep->dumpTree("-  alwIn:: ");
         scoreboardClear();
         processBlock(nodep->stmtsp());
@@ -605,7 +605,7 @@ protected:
     }
 
     void visit(AstNodeIf* nodep) override {
-        UINFO(4, "     IF " << nodep << endl);
+        UINFO(4, "     IF " << nodep);
         iterateAndNextNull(nodep->condp());
         processBlock(nodep->thensp());
         processBlock(nodep->elsesp());
@@ -650,7 +650,7 @@ private:
                 = reinterpret_cast<SplitLogicVertex*>(nodep->user3p());
             const uint32_t color = vertexp->color();
             m_colors.insert(color);
-            UINFO(8, "  SVL " << vertexp << " has color " << color << "\n");
+            UINFO(8, "  SVL " << vertexp << " has color " << color);
 
             // Record that all containing ifs have this color.
             for (auto it = m_ifStack.cbegin(); it != m_ifStack.cend(); ++it) {
@@ -694,7 +694,7 @@ public:
         : m_origAlwaysp{nodep}
         , m_ifColorp{ifColorp}
         , m_newBlocksp{newBlocksp} {
-        UINFO(6, "  splitting always " << nodep << endl);
+        UINFO(6, "  splitting always " << nodep);
     }
 
     ~EmitSplitVisitor() override = default;
@@ -922,7 +922,7 @@ protected:
                         const SplitNodeVertex* const nvxp
                             = static_cast<const SplitNodeVertex*>(vxp);
                         UINFO(0, "Cannot prune if-node due to edge "
-                                     << &oedge << " pointing to node " << nvxp->nodep() << endl);
+                                     << &oedge << " pointing to node " << nvxp->nodep());
                         nvxp->nodep()->dumpTree("-  ");
                     }
 
@@ -956,13 +956,13 @@ protected:
 
         if (m_noReorderWhy != "") {
             // We saw a jump or something else rare that we don't handle.
-            UINFO(9, "  NoSplitBlock because " << m_noReorderWhy << endl);
+            UINFO(9, "  NoSplitBlock because " << m_noReorderWhy);
             return;
         }
 
         // Look across the entire tree of if/else blocks in the always,
         // and color regions that must be kept together.
-        UINFO(5, "SplitVisitor @ " << nodep << endl);
+        UINFO(5, "SplitVisitor @ " << nodep);
         colorAlwaysGraph();
 
         // Map each AstNodeIf to the set of colors (split always blocks)
@@ -982,7 +982,7 @@ protected:
         }
     }
     void visit(AstNodeIf* nodep) override {
-        UINFO(4, "     IF " << nodep << endl);
+        UINFO(4, "     IF " << nodep);
         if (!nodep->condp()->isPure()) m_noReorderWhy = "Impure IF condition";
         {
             VL_RESTORER(m_curIfConditional);
@@ -1001,12 +1001,12 @@ private:
 // Split class functions
 
 void V3Split::splitReorderAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { ReorderVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("reorder", 0, dumpTreeEitherLevel() >= 3);
 }
 void V3Split::splitAlwaysAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { SplitVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("split", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3SplitAs.cpp b/src/V3SplitAs.cpp
index e0de302db..4f29d6767 100644
--- a/src/V3SplitAs.cpp
+++ b/src/V3SplitAs.cpp
@@ -73,13 +73,13 @@ class SplitAsCleanVisitor final : public VNVisitor {
     void visit(AstVarRef* nodep) override {
         if (nodep->access().isWriteOrRW()) {
             if (nodep->varScopep() == m_splitVscp) {
-                UINFO(6, "       CL VAR " << nodep << endl);
+                UINFO(6, "       CL VAR " << nodep);
                 m_matches = true;
             }
         }
     }
     void visit(AstNodeStmt* nodep) override {
-        UINFO(6, "     CL STMT " << nodep << endl);
+        UINFO(6, "     CL STMT " << nodep);
         const bool oldKeep = m_keepStmt;
         {
             VL_RESTORER(m_matches);
@@ -89,16 +89,16 @@ class SplitAsCleanVisitor final : public VNVisitor {
             iterateChildren(nodep);
 
             if (m_keepStmt || (m_modeMatch ? m_matches : !m_matches)) {
-                UINFO(6, "     Keep   STMT " << nodep << endl);
+                UINFO(6, "     Keep   STMT " << nodep);
                 m_keepStmt = true;
             } else {
-                UINFO(6, "     Delete STMT " << nodep << endl);
+                UINFO(6, "     Delete STMT " << nodep);
                 VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
             }
         }
         // If something below matches, the upper statement remains too.
         m_keepStmt = oldKeep || m_keepStmt;
-        UINFO(9, "     upKeep=" << m_keepStmt << " STMT " << nodep << endl);
+        UINFO(9, "     upKeep=" << m_keepStmt << " STMT " << nodep);
     }
     void visit(AstExprStmt* nodep) override {
         // A function call inside the splitting assignment
@@ -159,8 +159,8 @@ class SplitAsVisitor final : public VNVisitor {
             AstVarScope* const splitVscp = visitor.splitVscp();
             // Now isolate the always
             if (splitVscp) {
-                UINFO(3, "Split  " << nodep << endl);
-                UINFO(3, "   For " << splitVscp << endl);
+                UINFO(3, "Split  " << nodep);
+                UINFO(3, "   For " << splitVscp);
                 // If we did this last time!  Something's stuck!
                 UASSERT_OBJ(splitVscp != lastSplitVscp, nodep,
                             "Infinite loop in isolate_assignments removal for: "
@@ -189,7 +189,7 @@ public:
 // SplitAs class functions
 
 void V3SplitAs::splitAsAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { SplitAsVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("splitas", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 7261a877e..346e98961 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -459,9 +459,9 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
 
     void visit(AstNode* nodep) override { iterateChildren(nodep); }
     void visit(AstNodeModule* nodep) override {
-        UINFO(4, "Start checking " << nodep->prettyNameQ() << "\n");
+        UINFO(4, "Start checking " << nodep->prettyNameQ());
         if (!VN_IS(nodep, Module)) {
-            UINFO(4, "Skip " << nodep->prettyNameQ() << "\n");
+            UINFO(4, "Skip " << nodep->prettyNameQ());
             return;
         }
         UASSERT_OBJ(!m_modp, m_modp, "Nested module declaration");
@@ -522,7 +522,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         }
     }
     void visit(AstPin* nodep) override {
-        UINFO(5, nodep->modVarp()->prettyNameQ() << " pin \n");
+        UINFO(5, nodep->modVarp()->prettyNameQ() << " pin ");
         AstNode* const exprp = nodep->exprp();
         if (!exprp) return;  // Not connected pin
         m_foundTargetVar.clear();
@@ -548,7 +548,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         if (!nodep->attrSplitVar()) return;  // Nothing to do
         if (!cannotSplitReason(nodep)) {
             m_refs.registerVar(nodep);
-            UINFO(4, nodep->name() << " is added to candidate list.\n");
+            UINFO(4, nodep->name() << " is added to candidate list.");
         }
     }
     void visit(AstVarRef* nodep) override {
@@ -559,7 +559,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         }
     }
     void visit(AstVarXRef* nodep) override {
-        UINFO(4, nodep->varp() << " Has hierarchical reference\n");
+        UINFO(4, nodep->varp() << " Has hierarchical reference");
         m_forPackedSplit.m_hasXref.emplace(nodep->varp());
     }
     void visit(AstSel* nodep) override {
@@ -570,7 +570,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         if (AstVarRef* const refp = isTargetVref(nodep->fromp())) {
             const AstConst* const indexp = VN_CAST(nodep->bitp(), Const);
             if (indexp) {  // OK
-                UINFO(4, "add " << nodep << " for " << refp->varp()->prettyName() << "\n");
+                UINFO(4, "add " << nodep << " for " << refp->varp()->prettyName());
                 if (indexp->toSInt() < outerMostSizeOfUnpackedArray(refp->varp())) {
                     m_refs.tryAdd(m_contextp, refp, nodep, indexp->toSInt(), m_inFTaskp);
                 } else {
@@ -597,7 +597,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
                                      nodep->declRange().ascending()};
             UASSERT_OBJ(dtypep->lo() <= selRange.lo() && selRange.hi() <= dtypep->hi(), nodep,
                         "Range check for AstSliceSel must have been finished in V3Width.cpp");
-            UINFO(4, "add " << nodep << " for " << refp->varp()->prettyName() << "\n");
+            UINFO(4, "add " << nodep << " for " << refp->varp()->prettyName());
             m_refs.tryAdd(m_contextp, refp, nodep, nodep->declRange().hi(),
                           nodep->declRange().lo(), m_inFTaskp);
         } else {
@@ -618,7 +618,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         AstVar* const varp = newVar(fl, VVarType::VAR, name, dtypep);
         // Variable will be registered in the caller side.
         UINFO(4, varp->prettyNameQ()
-                     << " is created lsb:" << dtypep->lo() << " msb:" << dtypep->hi() << "\n");
+                     << " is created lsb:" << dtypep->lo() << " msb:" << dtypep->hi());
         // Use AstAssign if true, otherwise AstAssignW
         const bool use_simple_assign
             = (context && VN_IS(context, NodeFTaskRef)) || (assignp && VN_IS(assignp, Assign));
@@ -629,7 +629,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             AstNodeExpr* rhsp = new AstArraySel{
                 fl, newVarRef(fl, varp, !lvalue ? VAccess::WRITE : VAccess::READ), i};
             AstNode* const refp = lhsp;
-            UINFO(9, "Creating assign idx:" << i << " + " << start_idx << "\n");
+            UINFO(9, "Creating assign idx:" << i << " + " << start_idx);
             if (!lvalue) std::swap(lhsp, rhsp);
             AstNode* newassignp;
             if (use_simple_assign) {
@@ -684,7 +684,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         for (const auto& pair : refs) {
             UINFO(4, "In module " << m_modp->name() << " var " << pair.first->prettyNameQ()
                                   << " which has " << pair.second.size()
-                                  << " refs will be split.\n");
+                                  << " refs will be split.");
             AstVar* const varp = pair.first;
             AstNode* insertp = varp;
             const AstUnpackArrayDType* const dtypep
@@ -730,8 +730,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
                                         refp->access(), ref.ftask());
                     newp = newrefp;
                     refp->varp()->addNextHere(newrefp->varp());
-                    UINFO(4,
-                          "Create " << newrefp->varp()->prettyNameQ() << " for " << refp << "\n");
+                    UINFO(4, "Create " << newrefp->varp()->prettyNameQ() << " for " << refp);
                 }
                 ref.nodep()->replaceWith(newp);
                 pushDeletep(ref.nodep());
@@ -760,7 +759,7 @@ class SplitUnpackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             m_refs.swap(next);
             const size_t n = collapse(next);
             UINFO(4, n << " Variables are split " << trial << " th trial in "
-                       << m_modp->prettyNameQ() << '\n');
+                       << m_modp->prettyNameQ());
             if (trial == 0) m_numSplit += n;
         }
         doDeletes();
@@ -784,7 +783,7 @@ public:
         const std::pair<uint32_t, uint32_t> dim = nodep->dtypep()->dimensions(false);
         UINFO(7, nodep->prettyNameQ()
                      << " pub:" << nodep->isSigPublic() << " pri:" << nodep->isPrimaryIO()
-                     << " io:" << nodep->isInout() << " typ:" << nodep->varType() << "\n");
+                     << " io:" << nodep->isInout() << " typ:" << nodep->varType());
         const char* reason = nullptr;
         // Public variable cannot be split.
         // at least one unpacked dimension must exist
@@ -792,8 +791,7 @@ public:
             reason = "it is not an unpacked array";
         if (!reason) reason = cannotSplitVarCommonReason(nodep);
         if (reason) {
-            UINFO(5,
-                  "Check " << nodep->prettyNameQ() << " cannot split because" << reason << ".\n");
+            UINFO(5, "Check " << nodep->prettyNameQ() << " cannot split because" << reason);
         }
         return reason;
     }
@@ -980,7 +978,7 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             }
         } else {  // Finally find a good candidate
             const bool inserted = m_refs.emplace(nodep, PackedVarRef{nodep}).second;
-            if (inserted) UINFO(4, nodep->prettyNameQ() << " is added to candidate list.\n");
+            if (inserted) UINFO(4, nodep->prettyNameQ() << " is added to candidate list.");
         }
     }
     void visit(AstVarRef* nodep) override {
@@ -995,7 +993,7 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         refit->second.append(PackedVarRefEntry{nodep, basicp->lo(), varp->width()},
                              nodep->access());
         UINFO(5, varp->prettyName()
-                     << " Entire bit of [" << basicp->lo() << "+:" << varp->width() << "] \n");
+                     << " Entire bit of [" << basicp->lo() << "+:" << varp->width() << "]");
     }
     void visit(AstSel* nodep) override {
         const AstVarRef* const vrefp = VN_CAST(nodep->fromp(), VarRef);
@@ -1022,17 +1020,17 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
                 vrefp->access());
             UINFO(5, varp->prettyName()
                          << " [" << consts[0]->toSInt() << ":+" << consts[1]->toSInt()
-                         << "] lsb:" << refit->second.basicp()->lo() << "\n");
+                         << "] lsb:" << refit->second.basicp()->lo());
         } else {
             if (varp->attrSplitVar()) {
                 warnNoSplit(vrefp->varp(), nodep, "its bit range cannot be determined statically");
                 varp->attrSplitVar(false);
             }
             if (!consts[0]) {
-                UINFO(4, "LSB " << nodep->lsbp() << " is expected to be constant, but not\n");
+                UINFO(4, "LSB " << nodep->lsbp() << " is expected to be constant, but not");
             }
             if (!consts[1]) {
-                UINFO(4, "WIDTH " << nodep->widthp() << " is expected to be constant, but not\n");
+                UINFO(4, "WIDTH " << nodep->widthp() << " is expected to be constant, but not");
             }
             m_refs.erase(varp);
             iterateChildren(nodep);
@@ -1115,8 +1113,7 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             // newvar.varp()->trace(varp->isTrace());
             m_netp->typeTablep()->addTypesp(dtypep);
             varp->addNextHere(newvar.varp());
-            UINFO(4, newvar.varp()->prettyNameQ()
-                         << " is added for " << varp->prettyNameQ() << '\n');
+            UINFO(4, newvar.varp()->prettyNameQ() << " is added for " << varp->prettyNameQ());
         }
     }
     static void updateReferences(AstVar* varp, PackedVarRef& pref,
@@ -1175,7 +1172,7 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
             ref.dedup();
             UINFO(4, "In module " << m_modp->name() << " var " << varp->prettyNameQ()
                                   << " which has " << ref.lhs().size() << " lhs refs and "
-                                  << ref.rhs().size() << " rhs refs will be split.\n");
+                                  << ref.rhs().size() << " rhs refs will be split.");
             std::vector<SplitNewVar> vars
                 = ref.splitPlan(varp, !varp->isTrace());  // If traced, all bit must be kept
             if (vars.empty()) continue;
@@ -1347,8 +1344,7 @@ public:
             reason = "its type is unknown";  // LCOV_EXCL_LINE
         }
         if (reason) {
-            UINFO(5,
-                  "Check " << nodep->prettyNameQ() << " cannot split because" << reason << endl);
+            UINFO(5, "Check " << nodep->prettyNameQ() << " cannot split because" << reason);
         }
         return reason;
     }
@@ -1362,7 +1358,7 @@ const char* SplitVarImpl::cannotSplitPackedVarReason(const AstVar* varp) {
 // Split class functions
 
 void V3SplitVar::splitVariable(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     SplitVarRefs refs;
     {
         const SplitUnpackedVarVisitor visitor{nodep};
diff --git a/src/V3StackCount.cpp b/src/V3StackCount.cpp
index 23202acf9..ed1789adf 100644
--- a/src/V3StackCount.cpp
+++ b/src/V3StackCount.cpp
@@ -80,7 +80,7 @@ private:
         return savedCount;
     }
     void endVisitBase(uint32_t savedCount, AstNode* nodep) {
-        UINFO(8, "cost " << std::setw(6) << std::left << m_stackSize << "  " << nodep << endl);
+        UINFO(8, "cost " << std::setw(6) << std::left << m_stackSize << "  " << nodep);
         if (!m_ignoreRemaining) m_stackSize += savedCount;
     }
 
@@ -91,13 +91,13 @@ private:
         iterateAndNextConstNull(nodep->condp());
         const uint32_t savedCount = m_stackSize;
 
-        UINFO(8, "thensp:\n");
+        UINFO(8, "thensp:");
         reset();
         iterateAndNextConstNull(nodep->thensp());
         uint32_t ifCount = m_stackSize;
         if (nodep->branchPred().unlikely()) ifCount = 0;
 
-        UINFO(8, "elsesp:\n");
+        UINFO(8, "elsesp:");
         reset();
         iterateAndNextConstNull(nodep->elsesp());
         uint32_t elseCount = m_stackSize;
@@ -120,12 +120,12 @@ private:
         iterateAndNextConstNull(nodep->condp());
         const uint32_t savedCount = m_stackSize;
 
-        UINFO(8, "?\n");
+        UINFO(8, "?");
         reset();
         iterateAndNextConstNull(nodep->thenp());
         const uint32_t ifCount = m_stackSize;
 
-        UINFO(8, ":\n");
+        UINFO(8, ":");
         reset();
         iterateAndNextConstNull(nodep->elsep());
         const uint32_t elseCount = m_stackSize;
diff --git a/src/V3Stats.cpp b/src/V3Stats.cpp
index 76fdb92c6..394ba1de2 100644
--- a/src/V3Stats.cpp
+++ b/src/V3Stats.cpp
@@ -102,7 +102,7 @@ public:
     StatsVisitor(AstNetlist* nodep, const std::string& stage, bool fastOnly)
         : m_fastOnly{fastOnly}
         , m_accump{fastOnly ? &m_dumpster : &m_counters} {
-        UINFO(9, "Starting stats, fastOnly=" << fastOnly << endl);
+        UINFO(9, "Starting stats, fastOnly=" << fastOnly);
         memset(&m_counters, 0, sizeof(m_counters));
         memset(&m_dumpster, 0, sizeof(m_dumpster));
 
diff --git a/src/V3StatsReport.cpp b/src/V3StatsReport.cpp
index 5697f5ceb..0998fa489 100644
--- a/src/V3StatsReport.cpp
+++ b/src/V3StatsReport.cpp
@@ -228,7 +228,7 @@ void V3Stats::infoHeader(std::ofstream& os, const string& prefix) {
 }
 
 void V3Stats::statsReport() {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     // Open stats file
     const string filename
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 120ff6547..5cbcd3dab 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -703,7 +703,7 @@ string VSpellCheck::bestCandidateInfo(const string& goal, EditDistance& distance
 
         const EditDistance dist = editDistance(goal, candidate);
         UINFO(9, "EditDistance dist=" << dist << " cutoff=" << cutoff << " goal=" << goal
-                                      << " candidate=" << candidate << endl);
+                                      << " candidate=" << candidate);
         if (dist < distancer && dist <= cutoff) {
             distancer = dist;
             bestCandidate = candidate;
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 08af8a416..19fd3d9d8 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -146,7 +146,7 @@ public:
         }
     }
     void deleteAssign(AstNodeAssign* nodep) {
-        UINFO(5, "Delete " << nodep << endl);
+        UINFO(5, "Delete " << nodep);
         VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
     }
     void deleteUnusedAssign() {
@@ -188,9 +188,7 @@ class SubstUseVisitor final : public VNVisitorConst {
         } else {
             // A simple variable; needs checking.
             if (m_origStep < nodep->varp()->user2()) {
-                if (m_ok) {
-                    UINFO(9, "   RHS variable changed since subst recorded: " << nodep << endl);
-                }
+                if (m_ok) { UINFO(9, "   RHS variable changed since subst recorded: " << nodep); }
                 m_ok = false;
             }
         }
@@ -205,7 +203,7 @@ public:
     // CONSTRUCTORS
     SubstUseVisitor(AstNode* nodep, int origStep)
         : m_origStep{origStep} {
-        UINFO(9, "        SubstUseVisitor " << origStep << " " << nodep << endl);
+        UINFO(9, "        SubstUseVisitor " << origStep << " " << nodep);
         iterateConst(nodep);
     }
     ~SubstUseVisitor() override = default;
@@ -259,10 +257,10 @@ class SubstVisitor final : public VNVisitor {
                 SubstVarEntry* const entryp = getEntryp(varrefp);
                 hit = true;
                 if (m_ops > SUBST_MAX_OPS_SUBST) {
-                    UINFO(8, " ASSIGNtooDeep " << varrefp << endl);
+                    UINFO(8, " ASSIGNtooDeep " << varrefp);
                     entryp->assignComplex();
                 } else {
-                    UINFO(8, " ASSIGNwhole " << varrefp << endl);
+                    UINFO(8, " ASSIGNwhole " << varrefp);
                     entryp->assignWhole(m_assignStep, nodep);
                 }
             }
@@ -273,10 +271,10 @@ class SubstVisitor final : public VNVisitor {
                     SubstVarEntry* const entryp = getEntryp(varrefp);
                     hit = true;
                     if (m_ops > SUBST_MAX_OPS_SUBST) {
-                        UINFO(8, " ASSIGNtooDeep " << varrefp << endl);
+                        UINFO(8, " ASSIGNtooDeep " << varrefp);
                         entryp->assignWordComplex(word);
                     } else {
-                        UINFO(8, " ASSIGNword" << word << " " << varrefp << endl);
+                        UINFO(8, " ASSIGNword" << word << " " << varrefp);
                         entryp->assignWord(m_assignStep, word, nodep);
                     }
                 }
@@ -304,7 +302,7 @@ class SubstVisitor final : public VNVisitor {
             // Nicely formed lvalues handled in NodeAssign
             // Other lvalues handled as unknown mess in AstVarRef
             const int word = constp->toUInt();
-            UINFO(8, " USEword" << word << " " << varrefp << endl);
+            UINFO(8, " USEword" << word << " " << varrefp);
             SubstVarEntry* const entryp = getEntryp(varrefp);
             if (AstNodeExpr* const substp = entryp->substWord(nodep, word)) {
                 // Check that the RHS hasn't changed value since we recorded it.
@@ -327,25 +325,25 @@ class SubstVisitor final : public VNVisitor {
         if (nodep->access().isWriteOrRW()) {
             m_assignStep++;
             nodep->varp()->user2(m_assignStep);
-            UINFO(9, " ASSIGNstep u2=" << nodep->varp()->user2() << " " << nodep << endl);
+            UINFO(9, " ASSIGNstep u2=" << nodep->varp()->user2() << " " << nodep);
         }
         if (isSubstVar(nodep->varp())) {
             SubstVarEntry* const entryp = getEntryp(nodep);
             if (nodep->access().isWriteOrRW()) {
-                UINFO(8, " ASSIGNcpx " << nodep << endl);
+                UINFO(8, " ASSIGNcpx " << nodep);
                 entryp->assignComplex();
             } else if (AstNodeExpr* const substp = entryp->substWhole(nodep)) {
                 // Check that the RHS hasn't changed value since we recorded it.
                 const SubstUseVisitor visitor{substp, entryp->getWholeStep()};
                 if (visitor.ok()) {
-                    UINFO(8, " USEwhole " << nodep << endl);
+                    UINFO(8, " USEwhole " << nodep);
                     VL_DO_DANGLING(replaceSubstEtc(nodep, substp), nodep);
                 } else {
-                    UINFO(8, " USEwholeButChg " << nodep << endl);
+                    UINFO(8, " USEwholeButChg " << nodep);
                     entryp->consumeWhole();
                 }
             } else {  // Consumed w/o substitute
-                UINFO(8, " USEwtf   " << nodep << endl);
+                UINFO(8, " USEwtf   " << nodep);
                 entryp->consumeWhole();
             }
         }
@@ -384,7 +382,7 @@ public:
 // Subst class functions
 
 void V3Subst::substituteAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { SubstVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("subst", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index 20166c97e..a65b55b58 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -119,7 +119,7 @@ public:
     void imported(bool flag) { m_imported = flag; }
     void insert(const string& name, VSymEnt* entp) {
         UINFO(9, "     SymInsert se" << cvtToHex(this) << " '" << name << "' se" << cvtToHex(entp)
-                                     << "  " << entp->nodep() << endl);
+                                     << "  " << entp->nodep());
         if (name != "" && m_idNameMap.find(name) != m_idNameMap.end()) {
             // If didn't already report warning
             if (!V3Error::errorCount()) {  // LCOV_EXCL_START
@@ -135,7 +135,7 @@ public:
         const auto it = m_idNameMap.find(name);
         if (name != "" && it != m_idNameMap.end()) {
             UINFO(9, "     SymReinsert se" << cvtToHex(this) << " '" << name << "' se"
-                                           << cvtToHex(entp) << "  " << entp->nodep() << endl);
+                                           << cvtToHex(entp) << "  " << entp->nodep());
             it->second = entp;  // Replace
         } else {
             insert(name, entp);
@@ -147,10 +147,9 @@ public:
         const auto it = m_idNameMap.find(name);
         UINFO(9, "     SymFind   se"
                      << cvtToHex(this) << " '" << name << "' -> "
-                     << (it == m_idNameMap.end()
-                             ? "NONE"
-                             : "se" + cvtToHex(it->second) + " n=" + cvtToHex(it->second->nodep()))
-                     << endl);
+                     << (it == m_idNameMap.end() ? "NONE"
+                                                 : "se" + cvtToHex(it->second)
+                                                       + " n=" + cvtToHex(it->second->nodep())));
         if (it != m_idNameMap.end()) return (it->second);
         return nullptr;
     }
@@ -242,7 +241,7 @@ public:
     }
     void importFromIface(VSymGraph* graphp, const VSymEnt* srcp, bool onlyUnmodportable = false) {
         // Import interface tokens from source symbol table into this symbol table, recursively
-        UINFO(9, "     importIf  se" << cvtToHex(this) << " from se" << cvtToHex(srcp) << endl);
+        UINFO(9, "     importIf  se" << cvtToHex(this) << " from se" << cvtToHex(srcp));
         for (IdNameMap::const_iterator it = srcp->m_idNameMap.begin();
              it != srcp->m_idNameMap.end(); ++it) {
             const string& name = it->first;
@@ -317,7 +316,7 @@ public:
     void dumpFilePrefixed(const string& nameComment) {
         if (dumpTreeLevel()) {
             const string filename = v3Global.debugFilename(nameComment) + ".txt";
-            UINFO(2, "Dumping " << filename << endl);
+            UINFO(2, "Dumping " << filename);
             const std::unique_ptr<std::ofstream> logp{V3File::new_ofstream(filename)};
             if (logp->fail()) v3fatal("Can't write file: " << filename);
             dumpSelf(*logp, "");
diff --git a/src/V3TSP.cpp b/src/V3TSP.cpp
index ee42d1d17..5d768d54c 100644
--- a/src/V3TSP.cpp
+++ b/src/V3TSP.cpp
@@ -334,7 +334,7 @@ public:
         // Go on a random tour. Fun!
         std::vector<Vertex*> tour;
         do {
-            UINFO(6, "Adding " << cur_vertexp->key() << " to tour.\n");
+            UINFO(6, "Adding " << cur_vertexp->key() << " to tour.");
             tour.push_back(cur_vertexp);
 
             // Look for an arbitrary edge we've not yet marked
@@ -345,7 +345,7 @@ public:
                     markedEdgesp->insert(edgeId);
                     Vertex* const neighborp = castVertexp(edge.top());
                     UINFO(6, "following edge " << edgeId << " from " << cur_vertexp->key()
-                                               << " to " << neighborp->key() << endl);
+                                               << " to " << neighborp->key());
                     cur_vertexp = neighborp;
                     goto found;
                 }
@@ -353,7 +353,7 @@ public:
             v3fatalSrc("No unmarked edges found in tour");
         found:;
         } while (cur_vertexp != startp);
-        UINFO(6, "stopped, got back to start of tour @ " << cur_vertexp->key() << endl);
+        UINFO(6, "stopped, got back to start of tour @ " << cur_vertexp->key());
 
         // Look for nodes on the tour that still have
         // un-marked edges. If we find one, recurse.
@@ -365,7 +365,7 @@ public:
                 for (V3GraphEdge& edge : vxp->outEdges()) {
                     const uint32_t edgeId = getEdgeId(&edge);
                     if (markedEdgesp->end() == markedEdgesp->find(edgeId)) {
-                        UINFO(6, "Recursing.\n");
+                        UINFO(6, "Recursing.");
                         findEulerTourRecurse(markedEdgesp, vxp, sortedOutp);
                         recursed = true;
                         goto recursed;
@@ -376,9 +376,11 @@ public:
             sortedOutp->push_back(vxp->key());
         }
 
-        UINFO(6, "Tour was: ");
-        for (const Vertex* vxp : tour) UINFONL(6, "- " << vxp->key());
-        UINFONL(6, "-\n");
+        if (debug() >= 6) {
+            UINFO(0, "Tour was:");
+            for (const Vertex* vxp : tour) std::cout << "- " << vxp->key() << '\n';
+            std::cout << "-\n";
+        }
     }
 
     void dumpGraph(std::ostream& os, const string& nameComment) const {
diff --git a/src/V3Table.cpp b/src/V3Table.cpp
index 52d7cb531..74fd45945 100644
--- a/src/V3Table.cpp
+++ b/src/V3Table.cpp
@@ -172,7 +172,7 @@ class TableVisitor final : public VNVisitor {
 public:
     void simulateVarRefCb(AstVarRef* nodep) {
         // Called by TableSimulateVisitor on each unique varref encountered
-        UINFO(9, "   SimVARREF " << nodep << endl);
+        UINFO(9, "   SimVARREF " << nodep);
         AstVarScope* const vscp = nodep->varScopep();
         if (nodep->access().isWriteOrRW()) {
             // We'll make the table with a separate natural alignment for each output var, so
@@ -233,9 +233,9 @@ private:
                                 << " in width (bits)=" << m_inWidthBits << " out width (bytes)="
                                 << m_outWidthBytes << " Spacetime=" << (space / time) << "("
                                 << space << "/" << time << ")"
-                                << ": " << nodep << endl);
+                                << ": " << nodep);
         if (chkvis.optimizable()) {
-            UINFO(3, " Table Optimize spacetime=" << (space / time) << " " << nodep << endl);
+            UINFO(3, " Table Optimize spacetime=" << (space / time) << " " << nodep);
             m_totalBytes += space;
         }
         return chkvis.optimizable();
@@ -287,7 +287,7 @@ private:
         for (uint32_t i = 0; i <= VL_MASK_I(m_inWidthBits); ++i) {
             const uint32_t inValue = i;
             // Make a new simulation structure so we can set new input values
-            UINFO(8, " Simulating " << std::hex << inValue << endl);
+            UINFO(8, " Simulating " << std::hex << inValue);
 
             // Above simulateVisitor clears user 3, so
             // all outputs default to nullptr to mean 'recirculating'.
@@ -304,7 +304,7 @@ private:
                 // We are using 32 bit arithmetic, because there's no way the input table can be
                 // 2^32 bytes!
                 UASSERT_OBJ(shift <= 32, nodep, "shift overflow");
-                UINFO(8, "   Input " << invscp->name() << " = " << cnst.name() << endl);
+                UINFO(8, "   Input " << invscp->name() << " = " << cnst.name());
             }
 
             // Simulate
@@ -317,12 +317,12 @@ private:
             V3Number outputAssignedMask{nodep, static_cast<int>(m_outVarps.size()), 0};
             for (TableOutputVar& tov : m_outVarps) {
                 if (V3Number* const outnump = simvis.fetchOutNumberNull(tov.varScopep())) {
-                    UINFO(8, "   Output " << tov.name() << " = " << *outnump << endl);
+                    UINFO(8, "   Output " << tov.name() << " = " << *outnump);
                     UASSERT_OBJ(!outnump->isAnyXZ(), outnump, "Table should not contain X/Z");
                     outputAssignedMask.setBit(tov.ord(), 1);  // Mark output as assigned
                     tov.addValue(inValue, *outnump);
                 } else {
-                    UINFO(8, "   Output " << tov.name() << " not set for this input\n");
+                    UINFO(8, "   Output " << tov.name() << " not set for this input");
                     tov.setMayBeUnassigned();
                 }
             }
@@ -388,13 +388,13 @@ private:
         iterateChildren(nodep);
     }
     void visit(AstScope* nodep) override {
-        UINFO(4, " SCOPE " << nodep << endl);
+        UINFO(4, " SCOPE " << nodep);
         VL_RESTORER(m_scopep);
         m_scopep = nodep;
         iterateChildren(nodep);
     }
     void visit(AstAlways* nodep) override {
-        UINFO(4, "  ALWAYS  " << nodep << endl);
+        UINFO(4, "  ALWAYS  " << nodep);
         if (treeTest(nodep)) {
             // Well, then, I'll be a memory hog.
             replaceWithTable(nodep);
@@ -426,7 +426,7 @@ void TableSimulateVisitor::varRefCb(AstVarRef* nodep) {
 // Table class functions
 
 void V3Table::tableAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { TableVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("table", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 0c139f185..e7bdcea80 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -147,7 +147,7 @@ private:
     void convertAssignWToAlways() {
         // Wire assigns must become always statements to deal with insertion
         // of multiple statements.  Perhaps someday make all wassigns into always's?
-        UINFO(5, "     IM_WireRep  " << m_assignwp << endl);
+        UINFO(5, "     IM_WireRep  " << m_assignwp);
         m_assignwp->convertToAlways();
         VL_DO_CLEAR(pushDeletep(m_assignwp), m_assignwp = nullptr);
     }
@@ -182,7 +182,7 @@ private:
         for (AstNode* stmtp = nodep->varsp(); stmtp; stmtp = stmtp->nextp()) {
             if (AstVarScope* const vscp = VN_CAST(stmtp, VarScope)) {
                 if (vscp->varp()->isFuncLocal() || vscp->varp()->isUsedLoopIdx()) {
-                    UINFO(9, "   funcvsc " << vscp << endl);
+                    UINFO(9, "   funcvsc " << vscp);
                     m_varToScopeMap.emplace(std::make_pair(nodep, vscp->varp()), vscp);
                 }
             }
@@ -217,7 +217,7 @@ private:
                 const AstArg* const argp = itr.second;
                 if (const AstNodeExpr* const pinp = argp->exprp()) {
                     if ((portp->isRef() || portp->isConstRef()) && !VN_IS(pinp, VarRef)) {
-                        UINFO(9, "No function inline due to ref " << pinp << endl);
+                        UINFO(9, "No function inline due to ref " << pinp);
                         taskVtxp->noInline(true);
                     }
                 }
@@ -225,7 +225,7 @@ private:
         }
     }
     void visit(AstNodeFTask* nodep) override {
-        UINFO(9, "  TASK " << nodep << endl);
+        UINFO(9, "  TASK " << nodep);
         VL_RESTORER(m_curVxp);
         m_curVxp = getFTaskVertex(nodep);
         if (nodep->dpiImport()) m_curVxp->noInline(true);
@@ -489,8 +489,8 @@ class TaskVisitor final : public VNVisitor {
         if (!pinp) {
             // Too few arguments in function call
         } else {
-            UINFO(9, "     Port " << portp << endl);
-            UINFO(9, "      pin " << pinp << endl);
+            UINFO(9, "     Port " << portp);
+            UINFO(9, "      pin " << pinp);
             if (inlineTask) {
                 pushDeletep(pinp->unlinkFrBack());  // Cloned in assignment below
                 VL_DO_DANGLING(argp->unlinkFrBack()->deleteTree(), argp);  // Args no longer needed
@@ -629,7 +629,7 @@ class TaskVisitor final : public VNVisitor {
         }
         // Create function output variables
         if (outvscp) {
-            // UINFO(0, "setflag on " << funcp->fvarp() << " to " << outvscp << endl);
+            // UINFO(0, "setflag on " << funcp->fvarp() << " to " << outvscp);
             refp->taskp()->fvarp()->user2p(outvscp);
         }
         // Replace variable refs
@@ -1463,7 +1463,7 @@ class TaskVisitor final : public VNVisitor {
         // Includes handling AstMethodCall, AstNew
         UASSERT_OBJ(nodep->taskp(), nodep, "Unlinked?");
         iterateIntoFTask(nodep->taskp());  // First, do hierarchical funcs
-        UINFO(4, " FTask REF   " << nodep << endl);
+        UINFO(4, " FTask REF   " << nodep);
         if (debug() >= 9) nodep->dumpTree("-  inlfunc: ");
         UASSERT_OBJ(m_scopep, nodep, "func ref not under scope");
         const string namePrefix = ((VN_IS(nodep, FuncRef) ? "__Vfunc_" : "__Vtask_")
@@ -1518,10 +1518,10 @@ class TaskVisitor final : public VNVisitor {
             nodep->unlinkFrBack();
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
         }
-        UINFO(4, "  FTask REF Done.\n");
+        UINFO(4, "  FTask REF Done.");
     }
     void visit(AstNodeFTask* nodep) override {
-        UINFO(4, " visitFTask   " << nodep << endl);
+        UINFO(4, " visitFTask   " << nodep);
         VL_RESTORER(m_insStmtp);
         m_insStmtp = nodep->stmtsp();  // Might be null if no statements, but we won't use it
         if (!nodep->user1SetOnce()) {  // Just one creation needed per function
@@ -1568,7 +1568,7 @@ class TaskVisitor final : public VNVisitor {
             if (nodep->isFunction()) {
                 if (AstVar* const portp = VN_CAST(nodep->fvarp(), Var)) {
                     AstVarScope* const vscp = m_statep->findVarScope(m_scopep, portp);
-                    UINFO(9, "   funcremovevsc " << vscp << endl);
+                    UINFO(9, "   funcremovevsc " << vscp);
                     VL_DO_DANGLING(pushDeletep(vscp->unlinkFrBack()), vscp);
                 }
             }
@@ -1576,7 +1576,7 @@ class TaskVisitor final : public VNVisitor {
                 nextp = stmtp->nextp();
                 if (AstVar* const portp = VN_CAST(stmtp, Var)) {
                     AstVarScope* const vscp = m_statep->findVarScope(m_scopep, portp);
-                    UINFO(9, "   funcremovevsc " << vscp << endl);
+                    UINFO(9, "   funcremovevsc " << vscp);
                     VL_DO_DANGLING(pushDeletep(vscp->unlinkFrBack()), vscp);
                 }
             }
@@ -1654,7 +1654,7 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
     // func calls are made right in C)
     // Missing pin/expr?  We return (pinvar, nullptr)
     // Extra   pin/expr?  We clean it up
-    UINFO(9, "taskConnects " << nodep << endl);
+    UINFO(9, "taskConnects " << nodep);
     std::map<const std::string, int> nameToIndex;
     V3TaskConnects tconnects;
     UASSERT_OBJ(nodep->taskp(), nodep, "unlinked");
@@ -1755,7 +1755,7 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
                 if (!VN_IS(newvaluep, Const)) {
                     if (statep) {
                         portp->pinNum(i + 1);  // Make sure correct, will use to build name
-                        UINFO(9, "taskConnects arg wrapper needed " << portp->valuep() << endl);
+                        UINFO(9, "taskConnects arg wrapper needed " << portp->valuep());
                         argWrap.emplace(portp);
                     } else {  // statep = nullptr, called too late or otherwise to handle args
                         // Problem otherwise is we might have a varref, task
@@ -1774,7 +1774,7 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
             newvaluep = newvaluep->cloneTree(true);
             // To avoid problems with callee needing to know to deleteTree
             // or not, we make this into a pin
-            UINFO(9, "Default pin for " << portp << endl);
+            UINFO(9, "Default pin for " << portp);
             AstArg* const newp = new AstArg{nodep->fileline(), portp->name(), newvaluep};
             if (tconnects[i].second) {  // Have a "nullptr" pin already defined for it
                 VL_DO_CLEAR(tconnects[i].second->unlinkFrBack()->deleteTree(),
@@ -1784,9 +1784,9 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
             reorganize = true;
         }
         if (tconnects[i].second) {
-            UINFO(9, "Connect " << portp << "  ->  " << tconnects[i].second << endl);
+            UINFO(9, "Connect " << portp << "  ->  " << tconnects[i].second);
         } else {
-            UINFO(9, "Connect " << portp << "  ->  NONE" << endl);
+            UINFO(9, "Connect " << portp << "  ->  NONE");
         }
     }
 
@@ -1812,12 +1812,12 @@ V3TaskConnects V3Task::taskConnects(AstNodeFTaskRef* nodep, AstNode* taskStmtsp,
         nodep->dumpTree("-  ftref-out: ");
         for (int i = 0; i < tpinnum; ++i) {
             UINFO(0, "   pin " << i << "  pin=" << cvtToHex(tconnects[i].first)
-                               << "  conn=" << cvtToHex(tconnects[i].second) << endl);
+                               << "  conn=" << cvtToHex(tconnects[i].second));
         }
     }  // LCOV_EXCL_STOP
 
     if (!argWrap.empty()) {
-        UINFO(9, "Arg wrapper generation " << nodep << endl);
+        UINFO(9, "Arg wrapper generation " << nodep);
         // Create wrapper function with default argument settings.
         // Needed because the default needs symbol table of the called function.
         taskConnectWrap(nodep, tconnects, statep, argWrap);
@@ -2042,7 +2042,7 @@ string V3Task::assignDpiToInternal(const string& lhsName, AstVar* varp) {
 }
 
 void V3Task::taskAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         TaskStateVisitor visitors{nodep};
         const TaskVisitor visitor{nodep, &visitors};
diff --git a/src/V3Timing.cpp b/src/V3Timing.cpp
index 0d6be45b7..e077b9518 100644
--- a/src/V3Timing.cpp
+++ b/src/V3Timing.cpp
@@ -266,7 +266,7 @@ class TimingSuspendableVisitor final : public VNVisitor {
         getNeedsProcDepVtx(nodep);
         addFlags(nodep, T_ALLOCS_PROC);
         if (VN_IS(nodep, Always)) {
-            UINFO(1, "Always does " << (nodep->needProcess() ? "" : "NOT ") << "need process\n");
+            UINFO(1, "Always does " << (nodep->needProcess() ? "" : "NOT ") << "need process");
         }
         iterateChildren(nodep);
     }
@@ -1256,7 +1256,7 @@ public:
 // Timing class functions
 
 void V3Timing::timingAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     TimingSuspendableVisitor susVisitor{nodep};
     if (v3Global.usesTiming()) TimingControlVisitor{nodep};
     V3Global::dumpCheckGlobalTree("timing", 0, dumpTreeEitherLevel() >= 3);
diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp
index 6b0761040..cbc8833f4 100644
--- a/src/V3Trace.cpp
+++ b/src/V3Trace.cpp
@@ -201,7 +201,7 @@ class TraceVisitor final : public VNVisitor {
     // METHODS
 
     void detectDuplicates() {
-        UINFO(9, "Finding duplicates\n");
+        UINFO(9, "Finding duplicates");
         // Note uses user4
         V3DupFinder dupFinder;  // Duplicate code detection
         // Hash all of the traced values and find if there are any duplicates
@@ -217,8 +217,8 @@ class TraceVisitor final : public VNVisitor {
                     UASSERT_OBJ(dupDeclp, nodep, "Trace duplicate of wrong type");
                     TraceTraceVertex* const dupvertexp
                         = dupDeclp->user1u().toGraphVertex()->cast<TraceTraceVertex>();
-                    UINFO(8, "  Orig " << nodep << endl);
-                    UINFO(8, "   dup " << dupDeclp << endl);
+                    UINFO(8, "  Orig " << nodep);
+                    UINFO(8, "   dup " << dupDeclp);
                     // Mark the hashed node as the original and our
                     // iterating node as duplicated
                     vvertexp->duplicatep(dupvertexp);
@@ -308,14 +308,14 @@ class TraceVisitor final : public VNVisitor {
         for (V3GraphVertex& vtx : m_graph.vertices()) {
             if (TraceTraceVertex* const vtxp = vtx.cast<TraceTraceVertex>()) {
                 ActCodeSet actSet;
-                UINFO(9, "  Add to sort: " << vtxp << endl);
+                UINFO(9, "  Add to sort: " << vtxp);
                 if (debug() >= 9) vtxp->nodep()->dumpTree("-   trnode: ");
                 for (const V3GraphEdge& edge : vtxp->inEdges()) {
                     const TraceActivityVertex* const cfvertexp
                         = edge.fromp()->cast<const TraceActivityVertex>();
                     UASSERT_OBJ(cfvertexp, vtxp->nodep(),
                                 "Should have been function pointing to this trace");
-                    UINFO(9, "   Activity: " << cfvertexp << endl);
+                    UINFO(9, "   Activity: " << cfvertexp);
                     if (cfvertexp->activityAlways()) {
                         // If code 0, we always trace; ignore other codes
                         actSet.insert(TraceActivityVertex::ACTIVITY_ALWAYS);
@@ -568,7 +568,7 @@ class TraceVisitor final : public VNVisitor {
             topFuncp->addStmtsp(callp->makeStmt());
         }
         // Done
-        UINFO(5, "  newCFunc " << funcp << endl);
+        UINFO(5, "  newCFunc " << funcp);
         return funcp;
     }
 
@@ -850,7 +850,7 @@ class TraceVisitor final : public VNVisitor {
     void visit(AstStmtExpr* nodep) override {
         if (!m_finding && !nodep->user2()) {
             if (AstCCall* const callp = VN_CAST(nodep->exprp(), CCall)) {
-                UINFO(8, "   CCALL " << callp << endl);
+                UINFO(8, "   CCALL " << callp);
                 // See if there are other calls in same statement list;
                 // If so, all funcs might share the same activity code
                 TraceActivityVertex* const activityVtxp
@@ -859,7 +859,7 @@ class TraceVisitor final : public VNVisitor {
                     if (AstStmtExpr* const stmtp = VN_CAST(nextp, StmtExpr)) {
                         if (AstCCall* const ccallp = VN_CAST(stmtp->exprp(), CCall)) {
                             stmtp->user2(true);  // Processed
-                            UINFO(8, "     SubCCALL " << ccallp << endl);
+                            UINFO(8, "     SubCCALL " << ccallp);
                             V3GraphVertex* const ccallFuncVtxp = getCFuncVertexp(ccallp->funcp());
                             activityVtxp->slow(ccallp->funcp()->slow());
                             new V3GraphEdge{&m_graph, activityVtxp, ccallFuncVtxp, 1};
@@ -871,7 +871,7 @@ class TraceVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstCFunc* nodep) override {
-        UINFO(8, "   CFUNC " << nodep << endl);
+        UINFO(8, "   CFUNC " << nodep);
         V3GraphVertex* const funcVtxp = getCFuncVertexp(nodep);
         if (!m_finding) {  // If public, we need a unique activity code to allow for sets
                            // directly in this func
@@ -888,7 +888,7 @@ class TraceVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstTraceDecl* nodep) override {
-        UINFO(8, "   TRACE " << nodep << endl);
+        UINFO(8, "   TRACE " << nodep);
         if (!m_finding) {
             V3GraphVertex* const vertexp = new TraceTraceVertex{&m_graph, nodep};
             nodep->user1p(vertexp);
@@ -944,7 +944,7 @@ public:
 // Trace class functions
 
 void V3Trace::traceAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { TraceVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("trace", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 1b4afbf44..35b0459f5 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -290,7 +290,7 @@ class TraceDeclVisitor final : public VNVisitor {
 
     void fixupPlaceholders() {
         // Fix up cell initialization placehodlers
-        UINFO(9, "fixupPlaceholders()\n");
+        UINFO(9, "fixupPlaceholders()");
         for (const auto& item : m_cellInitPlaceholders) {
             const AstScope* const parentp = std::get<0>(item);
             const AstCell* const cellp = std::get<1>(item);
@@ -331,7 +331,7 @@ class TraceDeclVisitor final : public VNVisitor {
         if (!v3Global.opt.debugCheck()) return;
         checkCallsRecurse(funcp);
         if (!m_declUncalledps.empty()) {
-            for (auto tracep : m_declUncalledps) UINFO(0, "-nodep " << tracep << "\n");
+            for (auto tracep : m_declUncalledps) UINFO(0, "-nodep " << tracep);
             (*(m_declUncalledps.begin()))->v3fatalSrc("Created TraceDecl which is never called");
         }
     }
@@ -347,7 +347,7 @@ class TraceDeclVisitor final : public VNVisitor {
 
     // VISITORS
     void visit(AstScope* nodep) override {
-        UINFO(9, "visit " << nodep << "\n");
+        UINFO(9, "visit " << nodep);
         UASSERT_OBJ(!m_currScopep, nodep, "Should not nest");
         UASSERT_OBJ(m_subFuncps.empty(), nodep, "Should not nest");
         UASSERT_OBJ(m_entries.empty(), nodep, "Should not nest");
@@ -716,7 +716,7 @@ public:
 // Trace class functions
 
 void V3TraceDecl::traceDeclAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { TraceDeclVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("tracedecl", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index c7f889f6c..c5edf8c12 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -200,7 +200,7 @@ private:
     TristateVertex* makeVertex(AstNode* nodep) {
         TristateVertex* vertexp = reinterpret_cast<TristateVertex*>(nodep->user4p());
         if (!vertexp) {
-            UINFO(6, "         New vertex " << nodep << endl);
+            UINFO(6, "         New vertex " << nodep);
             vertexp = new TristateVertex{&m_graph, nodep};
             nodep->user4p(vertexp);
         }
@@ -215,7 +215,7 @@ private:
         if (!vtxp->isTristate()) return;  // tristate involved
         if (vtxp->user() == 1) return;
         vtxp->user(1);  // Recursed
-        UINFO(9, "  Mark tri " << level << "  " << vtxp << endl);
+        UINFO(9, "  Mark tri " << level << "  " << vtxp);
         if (!vtxp->varp()) {  // not a var where we stop the recursion
             for (V3GraphEdge& edge : vtxp->outEdges()) {
                 TristateVertex* const vvertexp = static_cast<TristateVertex*>(edge.top());
@@ -252,7 +252,7 @@ private:
         if (!(vtxp->isTristate() || vtxp->feedsTri())) return;  // tristate involved
         if (vtxp->user() == 3) return;
         vtxp->user(3);  // Recursed
-        UINFO(9, "  Mark feedstri " << level << "  " << vtxp << endl);
+        UINFO(9, "  Mark feedstri " << level << "  " << vtxp);
         if (!vtxp->varp()) {  // not a var where we stop the recursion
             for (V3GraphEdge& edge : vtxp->inEdges()) {
                 TristateVertex* const vvertexp = static_cast<TristateVertex*>(edge.fromp());
@@ -283,7 +283,7 @@ public:
         AstNode::user4ClearTree();  // Wipe all node user4p's that point to vertexes
     }
     void graphWalk(AstNodeModule* nodep) {
-        UINFO(9, " Walking " << nodep << endl);
+        UINFO(9, " Walking " << nodep);
         for (V3GraphVertex& vtx : m_graph.vertices()) {
             graphWalkRecurseFwd(static_cast<TristateVertex*>(&vtx), 0);
         }
@@ -353,13 +353,13 @@ class TristatePinVisitor final : public TristateBaseVisitor {
     void visit(AstVarRef* nodep) override {
         UASSERT_OBJ(!nodep->access().isRW(), nodep, "Tristate unexpected on R/W access flip");
         if (m_lvalue && !nodep->access().isWriteOrRW()) {
-            UINFO(9, "  Flip-to-LValue " << nodep << endl);
+            UINFO(9, "  Flip-to-LValue " << nodep);
             nodep->access(VAccess::WRITE);
         } else if (!m_lvalue && !nodep->access().isReadOnly()) {
-            UINFO(9, "  Flip-to-RValue " << nodep << endl);
+            UINFO(9, "  Flip-to-RValue " << nodep);
             nodep->access(VAccess::READ);
             // Mark the ex-output as tristated
-            UINFO(9, "  setTristate-subpin " << nodep->varp() << endl);
+            UINFO(9, "  setTristate-subpin " << nodep->varp());
             m_tgraph.setTristate(nodep->varp());
         }
     }
@@ -490,7 +490,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 = new AstVar{invarp->fileline(), isTop ? VVarType::VAR : VVarType::MODULETEMP,
                              invarp->name() + "__en", invarp};
             // Inherited VDirection::INPUT
-            UINFO(9, "       newenv " << newp << endl);
+            UINFO(9, "       newenv " << newp);
             modAddStmtp(invarp, newp);
             invarp->user1p(newp);  // find envar given invarp
         }
@@ -544,7 +544,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 = new AstVar{invarp->fileline(), isTop ? VVarType::VAR : VVarType::MODULETEMP,
                              invarp->name() + "__out", invarp};
             // Inherited VDirection::OUTPUT
-            UINFO(9, "       newout " << newp << endl);
+            UINFO(9, "       newout " << newp);
             modAddStmtp(invarp, newp);
             m_varAux(invarp).outVarp = newp;  // find outvar given invarp
         }
@@ -553,13 +553,13 @@ class TristateVisitor final : public TristateBaseVisitor {
     AstVar* getCreateUnconnVarp(AstNode* fromp, AstNodeDType* dtypep) {
         AstVar* const newp = new AstVar{fromp->fileline(), VVarType::MODULETEMP,
                                         "__Vtriunconn" + cvtToStr(m_unique++), dtypep};
-        UINFO(9, "       newunc " << newp << endl);
+        UINFO(9, "       newunc " << newp);
         modAddStmtp(newp, newp);
         return newp;
     }
 
     void mapInsertLhsVarRef(AstVarRef* nodep) {
-        UINFO(9, "    mapInsertLhsVarRef " << nodep << endl);
+        UINFO(9, "    mapInsertLhsVarRef " << nodep);
         AstVar* const key = nodep->varp();
         const auto pair = m_lhsmap.emplace(key, nullptr);
         if (pair.second) pair.first->second = new RefStrengthVec;
@@ -619,12 +619,12 @@ class TristateVisitor final : public TristateBaseVisitor {
                 if (it == m_lhsmap.end()) {
                     // This variable is floating, set output enable to
                     // always be off on this assign
-                    UINFO(8, "  Adding driver to var " << varp << endl);
+                    UINFO(8, "  Adding driver to var " << varp);
                     AstConst* const constp = newAllZerosOrOnes(varp, false);
                     AstVarRef* const varrefp
                         = new AstVarRef{varp->fileline(), varp, VAccess::WRITE};
                     AstNode* const newp = new AstAssignW{varp->fileline(), varrefp, constp};
-                    UINFO(9, "       newoev " << newp << endl);
+                    UINFO(9, "       newoev " << newp);
                     varrefp->user1p(newAllZerosOrOnes(varp, false));
                     nodep->addStmtsp(newp);
                     mapInsertLhsVarRef(varrefp);  // insertTristates will convert
@@ -645,7 +645,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             if (m_tgraph.isTristate(invarp)) {
                 insertTristatesSignal(nodep, invarp, refsp);
             } else {
-                UINFO(8, "  NO TRISTATE ON:" << invarp << endl);
+                UINFO(8, "  NO TRISTATE ON:" << invarp);
             }
             // Delete the map and vector list now that we have expanded it.
             m_lhsmap.erase(invarp);
@@ -669,7 +669,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             AstVar* const newLhsp = new AstVar{varp->fileline(), VVarType::MODULETEMP,
                                                varp->name() + "__out" + cvtToStr(m_unique),
                                                varp};  // 2-state ok; sep enable
-            UINFO(9, "       newout " << newLhsp << endl);
+            UINFO(9, "       newout " << newLhsp);
             nodep->addStmtsp(newLhsp);
             refp->varp(newLhsp);
 
@@ -677,13 +677,13 @@ class TristateVisitor final : public TristateBaseVisitor {
             AstVar* const newEnLhsp
                 = new AstVar{varp->fileline(), VVarType::MODULETEMP,
                              varp->name() + "__en" + cvtToStr(m_unique++), envarp};  // 2-state ok
-            UINFO(9, "       newenlhsp " << newEnLhsp << endl);
+            UINFO(9, "       newenlhsp " << newEnLhsp);
             nodep->addStmtsp(newEnLhsp);
 
             AstNode* const enLhspAssignp = new AstAssignW{
                 refp->fileline(), new AstVarRef{refp->fileline(), newEnLhsp, VAccess::WRITE},
                 getEnp(refp)};
-            UINFO(9, "       newenlhspAssignp " << enLhspAssignp << endl);
+            UINFO(9, "       newenlhspAssignp " << enLhspAssignp);
             nodep->addStmtsp(enLhspAssignp);
 
             // now append this driver to the driver logic.
@@ -699,17 +699,17 @@ class TristateVisitor final : public TristateBaseVisitor {
         }
         AstNode* const assp = new AstAssignW{
             varp->fileline(), new AstVarRef{varp->fileline(), varp, VAccess::WRITE}, orp};
-        UINFO(9, "       newassp " << assp << endl);
+        UINFO(9, "       newassp " << assp);
         nodep->addStmtsp(assp);
 
         AstNode* const enAssp = new AstAssignW{
             envarp->fileline(), new AstVarRef{envarp->fileline(), envarp, VAccess::WRITE}, enp};
-        UINFO(9, "       newenassp " << enAssp << endl);
+        UINFO(9, "       newenassp " << enAssp);
         nodep->addStmtsp(enAssp);
     }
 
     void insertTristatesSignal(AstNodeModule* nodep, AstVar* const invarp, RefStrengthVec* refsp) {
-        UINFO(8, "  TRISTATE EXPANDING:" << invarp << endl);
+        UINFO(8, "  TRISTATE EXPANDING:" << invarp);
         ++m_statTriSigs;
         m_tgraph.didProcess(invarp);
 
@@ -734,7 +734,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             outvarp = getCreateOutVarp(invarp, isTopInout);
             outvarp->varType2Out();
             lhsp = outvarp;  // Must assign to __out, not to normal input signal
-            UINFO(9, "     TRISTATE propagates up with " << lhsp << endl);
+            UINFO(9, "     TRISTATE propagates up with " << lhsp);
             // Create an output enable port (__en)
             // May already be created if have foo === 1'bz somewhere
             envarp
@@ -742,7 +742,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             //
             outvarp->user1p(envarp);
             m_varAux(outvarp).pullp = m_varAux(invarp).pullp;  // AstPull* propagation
-            if (m_varAux(invarp).pullp) UINFO(9, "propagate pull to " << outvarp << endl);
+            if (m_varAux(invarp).pullp) UINFO(9, "propagate pull to " << outvarp);
         } else if (invarp->user1p()) {
             envarp = VN_AS(invarp->user1p(), Var);  // From CASEEQ, foo === 1'bz
         }
@@ -766,13 +766,13 @@ class TristateVisitor final : public TristateBaseVisitor {
             // var__strength variable
             AstVar* varStrengthp = new AstVar{fl, VVarType::MODULETEMP, strengthVarName,
                                               invarp};  // 2-state ok; sep enable;
-            UINFO(9, "       newstrength " << varStrengthp << endl);
+            UINFO(9, "       newstrength " << varStrengthp);
             nodep->addStmtsp(varStrengthp);
 
             // var__strength__en variable
             AstVar* enVarStrengthp = new AstVar{fl, VVarType::MODULETEMP, strengthVarName + "__en",
                                                 invarp};  // 2-state ok;
-            UINFO(9, "       newenstrength " << enVarStrengthp << endl);
+            UINFO(9, "       newenstrength " << enVarStrengthp);
             nodep->addStmtsp(enVarStrengthp);
 
             aggregateTriSameStrength(nodep, varStrengthp, enVarStrengthp, beginStrength,
@@ -1044,7 +1044,7 @@ class TristateVisitor final : public TristateBaseVisitor {
 
     // VISITORS
     void visit(AstConst* nodep) override {
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         if (m_graphing) {
             if (!m_alhs && nodep->num().hasZ()) m_tgraph.setTristate(nodep);
         } else {
@@ -1055,7 +1055,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 // We can ignore the output override by making a temporary
                 AstVar* const varp = getCreateUnconnVarp(nodep, nodep->dtypep());
                 AstNode* const newp = new AstVarRef{nodep->fileline(), varp, VAccess::WRITE};
-                UINFO(9, " const->" << newp << endl);
+                UINFO(9, " const->" << newp);
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
             } else if (m_tgraph.isTristate(nodep)) {
@@ -1089,7 +1089,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 return;
             }
             iterateChildren(nodep);
-            UINFO(9, dbgState() << nodep << endl);
+            UINFO(9, dbgState() << nodep);
             // Generate the new output enable signal for this cond if either
             // expression 1 or 2 have an output enable '__en' signal. If the
             // condition has an enable, not sure what to do, so generate an
@@ -1109,7 +1109,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 // two expressions with the same conditional.
                 AstNodeExpr* const enp
                     = new AstCond{nodep->fileline(), condp->cloneTree(false), en1p, en2p};
-                UINFO(9, "       newcond " << enp << endl);
+                UINFO(9, "       newcond " << enp);
                 nodep->user1p(enp);  // propagate up COND(lhsp->enable, rhsp->enable)
                 thenp->user1p(nullptr);
                 elsep->user1p(nullptr);
@@ -1139,7 +1139,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             }
         } else {
             if (m_alhs) {
-                UINFO(9, dbgState() << nodep << endl);
+                UINFO(9, dbgState() << nodep);
                 if (nodep->user1p()) {
                     // Form a "deposit" instruction.  Would be nicer if we made this a new AST type
                     AstNodeExpr* const newp
@@ -1151,7 +1151,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 iterateChildren(nodep);
             } else {
                 iterateChildren(nodep);
-                UINFO(9, dbgState() << nodep << endl);
+                UINFO(9, dbgState() << nodep);
                 if (nodep->lsbp()->user1p()) {
                     nodep->v3warn(E_UNSUPPORTED, "Unsupported RHS tristate construct: "
                                                      << nodep->prettyTypeName());
@@ -1161,7 +1161,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                     AstNodeExpr* const enp
                         = new AstSel{nodep->fileline(), en1p, nodep->lsbp()->cloneTreePure(true),
                                      nodep->widthp()->cloneTree(true)};
-                    UINFO(9, "       newsel " << enp << endl);
+                    UINFO(9, "       newsel " << enp);
                     nodep->user1p(enp);  // propagate up SEL(fromp->enable, value)
                     m_tgraph.didProcess(nodep);
                 }
@@ -1181,7 +1181,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             }
         } else {
             if (m_alhs) {
-                UINFO(9, dbgState() << nodep << endl);
+                UINFO(9, dbgState() << nodep);
                 if (nodep->user1p()) {
                     // Each half of the concat gets a select of the enable expression
                     AstNodeExpr* const enp = VN_AS(nodep->user1p(), NodeExpr);
@@ -1196,7 +1196,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 iterateChildren(nodep);
             } else {
                 iterateChildren(nodep);
-                UINFO(9, dbgState() << nodep << endl);
+                UINFO(9, dbgState() << nodep);
                 // Generate the new output enable signal, just as a concat
                 // identical to the data concat
                 AstNodeExpr* const expr1p = nodep->lhsp();
@@ -1206,7 +1206,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                     AstNodeExpr* const en1p = getEnp(expr1p);
                     AstNodeExpr* const en2p = getEnp(expr2p);
                     AstNodeExpr* const enp = new AstConcat{nodep->fileline(), en1p, en2p};
-                    UINFO(9, "       newconc " << enp << endl);
+                    UINFO(9, "       newconc " << enp);
                     nodep->user1p(enp);  // propagate up CONCAT(lhsp->enable, rhsp->enable)
                     expr1p->user1p(nullptr);
                     expr2p->user1p(nullptr);
@@ -1218,7 +1218,7 @@ class TristateVisitor final : public TristateBaseVisitor {
     void visit(AstBufIf1* nodep) override {
         // For BufIf1, the enable is the LHS expression
         iterateChildren(nodep);
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         if (m_graphing) {
             associateLogic(nodep->rhsp(), nodep);
             m_tgraph.setTristate(nodep);
@@ -1242,15 +1242,15 @@ class TristateVisitor final : public TristateBaseVisitor {
             expr2p->user1p(enp);  // Becomes new node
             // Don't need the BufIf any more, can just have the data direct
             nodep->replaceWith(expr2p);
-            UINFO(9, "   bufif  datap=" << expr2p << endl);
-            UINFO(9, "   bufif  enp=" << enp << endl);
+            UINFO(9, "   bufif  datap=" << expr2p);
+            UINFO(9, "   bufif  enp=" << enp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
 
     void visitAndOr(AstNodeBiop* nodep, bool isAnd) {
         iterateChildren(nodep);
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         if (m_graphing) {
             associateLogic(nodep->lhsp(), nodep);
             associateLogic(nodep->rhsp(), nodep);
@@ -1293,7 +1293,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 new AstOr{nodep->fileline(),
                           new AstAnd{nodep->fileline(), en1p->cloneTree(false), subexpr1p},
                           new AstAnd{nodep->fileline(), en2p->cloneTree(false), subexpr2p}}};
-            UINFO(9, "       neweqn " << enp << endl);
+            UINFO(9, "       neweqn " << enp);
             nodep->user1p(enp);
             expr1p->user1p(nullptr);
             expr2p->user1p(nullptr);
@@ -1327,7 +1327,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             }
             nodep->user2(U2_NONGRAPH);
             iterateAndNextNull(nodep->rhsp());
-            UINFO(9, dbgState() << nodep << endl);
+            UINFO(9, dbgState() << nodep);
             if (debug() >= 9) nodep->dumpTree("-  assign: ");
             // if the rhsp of this assign statement has an output enable driver,
             // then propagate the corresponding output enable assign statement.
@@ -1336,7 +1336,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             if (nodep->rhsp()->user1p()) {
                 nodep->lhsp()->user1p(nodep->rhsp()->user1p());
                 nodep->rhsp()->user1p(nullptr);
-                UINFO(9, "   enp<-rhs " << nodep->lhsp()->user1p() << endl);
+                UINFO(9, "   enp<-rhs " << nodep->lhsp()->user1p());
                 m_tgraph.didProcess(nodep);
             }
             m_alhs = true;  // And user1p() will indicate tristate equation, if any
@@ -1373,7 +1373,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             // Otherwise we'd need to attach an enable to every signal, then optimize them
             // away later when we determine the signal has no tristate
             iterateChildren(nodep);
-            UINFO(9, dbgState() << nodep << endl);
+            UINFO(9, dbgState() << nodep);
             // Constification always moves const to LHS
             AstConst* const constp = VN_CAST(nodep->lhsp(), Const);
             if (constp && constp->user1p()) {
@@ -1397,7 +1397,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                                     // Keep the caseeq if there are X's present
                                     new AstEqCase{fl, new AstConst{fl, oneIfEnOne}, rhsp}};
                 if (neq) newp = new AstLogNot{fl, newp};
-                UINFO(9, "       newceq " << newp << endl);
+                UINFO(9, "       newceq " << newp);
                 if (debug() >= 9) nodep->dumpTree("-  caseeq-old: ");
                 if (debug() >= 9) newp->dumpTree("-  caseeq-new: ");
                 nodep->replaceWith(newp);
@@ -1413,7 +1413,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                                                   new AstEqCase{fl, constp, rhsp}};
                 if (neq) newp = new AstLogNot{fl, newp};
                 rhsp->user1p(nullptr);
-                UINFO(9, "       newceq " << newp << endl);
+                UINFO(9, "       newceq " << newp);
                 if (debug() >= 9) nodep->dumpTree("-  caseeq-old: ");
                 if (debug() >= 9) newp->dumpTree("-  caseeq-new: ");
                 nodep->replaceWith(newp);
@@ -1446,7 +1446,7 @@ class TristateVisitor final : public TristateBaseVisitor {
         dropop[0] = VN_IS(nodep->rhsp(), Const) && VN_AS(nodep->rhsp(), Const)->num().isAnyZ();
         dropop[1] = VN_IS(nodep->thsp(), Const) && VN_AS(nodep->thsp(), Const)->num().isAnyZ();
         dropop[2] = VN_IS(nodep->fhsp(), Const) && VN_AS(nodep->fhsp(), Const)->num().isAnyZ();
-        UINFO(4, " COUNTBITS(" << dropop[0] << dropop[1] << dropop[2] << " " << nodep << endl);
+        UINFO(4, " COUNTBITS(" << dropop[0] << dropop[1] << dropop[2] << " " << nodep);
         if (m_graphing) {
             iterateAndNextNull(nodep->lhsp());
             if (!dropop[0]) iterateAndNextNull(nodep->rhsp());
@@ -1475,7 +1475,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 }
                 AstVar* const envarp = getCreateEnVarp(varrefp->varp(), false);
                 // If any drops, we need to add in the count of Zs (from __en)
-                UINFO(4, " COUNTBITS('z)-> " << nodep << endl);
+                UINFO(4, " COUNTBITS('z)-> " << nodep);
                 VNRelinker relinkHandle;
                 nodep->unlinkFrBack(&relinkHandle);
                 AstNodeExpr* newp = new AstCountOnes{
@@ -1502,7 +1502,7 @@ class TristateVisitor final : public TristateBaseVisitor {
         }
     }
     void visit(AstPull* nodep) override {
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         AstVarRef* varrefp = nullptr;
         if (VN_IS(nodep->lhsp(), VarRef)) {
             varrefp = VN_AS(nodep->lhsp(), VarRef);
@@ -1590,7 +1590,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 return;  // No __en signals on this pin
             }
             // Tristate exists:
-            UINFO(9, dbgState() << nodep << endl);
+            UINFO(9, dbgState() << nodep);
             if (debug() >= 9) nodep->dumpTree("-  pin-pre: ");
 
             // Empty/in-only; need Z to propagate
@@ -1602,7 +1602,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                                            // to have this.
                                            && !nodep->modVarp()->declDirection().isWritable());
             if (!nodep->exprp()) {  // No-connect; covert to empty connection
-                UINFO(5, "Unconnected pin terminate " << nodep << endl);
+                UINFO(5, "Unconnected pin terminate " << nodep);
                 AstVar* const ucVarp = getCreateUnconnVarp(nodep, nodep->modVarp()->dtypep());
                 nodep->exprp(new AstVarRef{nodep->fileline(), ucVarp,
                                            // We converted, so use declaration output state
@@ -1616,7 +1616,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 // the input value.  So make a temporary connection.
                 const AstAssignW* const reAssignp
                     = V3Inst::pinReconnectSimple(nodep, m_cellp, true, true);
-                UINFO(5, "Input pin buffering: " << reAssignp << endl);
+                UINFO(5, "Input pin buffering: " << reAssignp);
                 m_tgraph.setTristate(reAssignp->lhsp());
             }
 
@@ -1634,18 +1634,18 @@ class TristateVisitor final : public TristateBaseVisitor {
                 } else {
                     enModVarp->varType2Out();
                 }
-                UINFO(9, "       newenv " << enVarp << endl);
+                UINFO(9, "       newenv " << enVarp);
                 AstPin* const enpinp
                     = new AstPin{nodep->fileline(), nodep->pinNum(),
                                  enModVarp->name(),  // should be {var}"__en"
                                  new AstVarRef{nodep->fileline(), enVarp, VAccess::WRITE}};
                 enpinp->modVarp(enModVarp);
-                UINFO(9, "       newpin " << enpinp << endl);
+                UINFO(9, "       newpin " << enpinp);
                 enpinp->user2(U2_BOTH);  // don't iterate the pin later
                 nodep->addNextHere(enpinp);
                 m_modp->addStmtsp(enVarp);
                 enrefp = new AstVarRef{nodep->fileline(), enVarp, VAccess::READ};
-                UINFO(9, "       newvrf " << enrefp << endl);
+                UINFO(9, "       newvrf " << enrefp);
                 if (debug() >= 9) enpinp->dumpTree("-  pin-ena: ");
             }
             // Create new output pin
@@ -1665,7 +1665,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                                      outModVarp->name(),  // should be {var}"__out"
                                      outexprp};
                 outpinp->modVarp(outModVarp);
-                UINFO(9, "       newpin " << outpinp << endl);
+                UINFO(9, "       newpin " << outpinp);
                 outpinp->user2(U2_BOTH);  // don't iterate the pin later
                 nodep->addNextHere(outpinp);
                 // Simplify
@@ -1715,7 +1715,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 }
             }
             if (exprrefp) {
-                UINFO(9, "outref " << exprrefp << endl);
+                UINFO(9, "outref " << exprrefp);
                 // Mark as now tristated; iteration will pick it up from there
                 exprrefp->user1p(enrefp);
                 if (!outAssignp) {
@@ -1727,7 +1727,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             // Propagate any pullups/pulldowns upwards if necessary
             if (exprrefp) {
                 if (AstPull* const pullp = m_varAux(nodep->modVarp()).pullp) {
-                    UINFO(9, "propagate pull on " << exprrefp << endl);
+                    UINFO(9, "propagate pull on " << exprrefp);
                     setPullDirection(exprrefp->varp(), pullp);
                 }
             }
@@ -1741,13 +1741,13 @@ class TristateVisitor final : public TristateBaseVisitor {
         else {
             if (nodep->user2() & U2_NONGRAPH) return;  // This pin is already expanded
             nodep->user2(U2_NONGRAPH);
-            UINFO(9, " " << nodep << endl);
+            UINFO(9, " " << nodep);
             iteratePinGuts(nodep);
         }
     }
 
     void visit(AstVarRef* nodep) override {
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         if (m_graphing) {
             if (nodep->access().isWriteOrRW()) associateLogic(nodep, nodep->varp());
             if (nodep->access().isReadOrRW()) associateLogic(nodep->varp(), nodep);
@@ -1758,7 +1758,7 @@ class TristateVisitor final : public TristateBaseVisitor {
             // VarMap so that after the walk through the module we can expand
             // any tristate logic on the driver.
             if (nodep->access().isWriteOrRW() && m_tgraph.isTristate(nodep->varp())) {
-                UINFO(9, "     Ref-to-lvalue " << nodep << endl);
+                UINFO(9, "     Ref-to-lvalue " << nodep);
                 UASSERT_OBJ(!nodep->access().isRW(), nodep, "Tristate unexpected on R/W access");
                 m_tgraph.didProcess(nodep);
                 mapInsertLhsVarRef(nodep);
@@ -1770,7 +1770,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                        // and in a position where it feeds upstream to another tristate
                        && m_tgraph.feedsTri(nodep)) {
                 // Then propagate the enable from the original variable
-                UINFO(9, "     Ref-to-tri " << nodep << endl);
+                UINFO(9, "     Ref-to-tri " << nodep);
                 AstVar* const enVarp = getCreateEnVarp(nodep->varp(), false);
                 nodep->user1p(new AstVarRef{nodep->fileline(), enVarp, VAccess::READ});
             }
@@ -1780,7 +1780,7 @@ class TristateVisitor final : public TristateBaseVisitor {
 
     void visit(AstVar* nodep) override {
         iterateChildren(nodep);
-        UINFO(9, dbgState() << nodep << endl);
+        UINFO(9, dbgState() << nodep);
         if (m_graphing) {
             // If tri0/1 force a pullup
             if (nodep->user2() & U2_GRAPHING) return;  // Already processed
@@ -1789,7 +1789,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 AstNode* const newp = new AstPull{
                     nodep->fileline(), new AstVarRef{nodep->fileline(), nodep, VAccess::WRITE},
                     nodep->isPullup()};
-                UINFO(9, "       newpul " << newp << endl);
+                UINFO(9, "       newpul " << newp);
                 nodep->addNextHere(newp);
                 // We'll iterate on the new AstPull later
             }
@@ -1800,7 +1800,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                 // possibly create connection errors.
                 // One example of problems is this:  "output z;  task t; z <= {something}; endtask"
             ) {
-                UINFO(9, "  setTristate-inout " << nodep << endl);
+                UINFO(9, "  setTristate-inout " << nodep);
                 m_tgraph.setTristate(nodep);
             }
         } else {  // !graphing
@@ -1812,7 +1812,7 @@ class TristateVisitor final : public TristateBaseVisitor {
     }
 
     void visit(AstNodeModule* nodep) override {
-        UINFO(8, nodep << endl);
+        UINFO(8, nodep);
         VL_RESTORER(m_modp);
         VL_RESTORER(m_graphing);
         VL_RESTORER(m_unique);
@@ -1895,7 +1895,7 @@ public:
 // Tristate class functions
 
 void V3Tristate::tristateAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { TristateVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("tristate", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Udp.cpp b/src/V3Udp.cpp
index 9256a2a78..1570a2614 100644
--- a/src/V3Udp.cpp
+++ b/src/V3Udp.cpp
@@ -231,7 +231,7 @@ public:
 };
 
 void V3Udp::udpResolve(AstNetlist* rootp) {
-    UINFO(4, __FUNCTION__ << ": " << endl);
+    UINFO(4, __FUNCTION__ << ": ");
     { const UdpVisitor visitor{rootp}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("udp", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index c9ae78929..ca8492353 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -57,7 +57,7 @@ public:
     // CONSTRUCTORS
     explicit UndrivenVarEntry(AstVar* varp)
         : m_varp(varp) {  // Construction for when a var is used
-        UINFO(9, "create " << varp << endl);
+        UINFO(9, "create " << varp);
         m_wholeFlags.resize(FLAGS_PER_BIT);
         for (int i = 0; i < FLAGS_PER_BIT; i++) m_wholeFlags[i] = false;
         m_bitFlags.resize(varp->width() * FLAGS_PER_BIT);
@@ -114,11 +114,11 @@ private:
 
 public:
     void usedWhole() {
-        UINFO(9, "set u[*] " << m_varp->name() << endl);
+        UINFO(9, "set u[*] " << m_varp->name());
         m_wholeFlags[FLAG_USED] = true;
     }
     void drivenWhole() {
-        UINFO(9, "set d[*] " << m_varp->name() << endl);
+        UINFO(9, "set d[*] " << m_varp->name());
         m_wholeFlags[FLAG_DRIVEN] = true;
     }
     void drivenWhole(const AstNodeVarRef* nodep, const FileLine* fileLinep) {
@@ -145,13 +145,13 @@ public:
     const AstAlways* getAlwCombp() const { return m_alwCombp; }
     const FileLine* getAlwCombFileLinep() const { return m_alwCombFileLinep; }
     void usedBit(int bit, int width) {
-        UINFO(9, "set u[" << (bit + width - 1) << ":" << bit << "] " << m_varp->name() << endl);
+        UINFO(9, "set u[" << (bit + width - 1) << ":" << bit << "] " << m_varp->name());
         for (int i = 0; i < width; i++) {
             if (bitNumOk(bit + i)) m_bitFlags[(bit + i) * FLAGS_PER_BIT + FLAG_USED] = true;
         }
     }
     void drivenBit(int bit, int width) {
-        UINFO(9, "set d[" << (bit + width - 1) << ":" << bit << "] " << m_varp->name() << endl);
+        UINFO(9, "set d[" << (bit + width - 1) << ":" << bit << "] " << m_varp->name());
         for (int i = 0; i < width; i++) {
             if (bitNumOk(bit + i)) m_bitFlags[(bit + i) * FLAGS_PER_BIT + FLAG_DRIVEN] = true;
         }
@@ -382,7 +382,7 @@ class UndrivenVisitor final : public VNVisitorConst {
                     // Don't warn if already driven earlier as "a=0; if(a) a=1;" is fine.
                     if (usr == 2 && m_alwaysCombp
                         && entryp->isUsedNotDrivenBit(lsb, nodep->width())) {
-                        UINFO(9, " Select.  Entryp=" << cvtToHex(entryp) << endl);
+                        UINFO(9, " Select.  Entryp=" << cvtToHex(entryp));
                         warnAlwCombOrder(varrefp);
                     }
                     entryp->drivenBit(lsb, nodep->width());
@@ -426,7 +426,7 @@ class UndrivenVisitor final : public VNVisitorConst {
                               && nodep->varp()->attrFileDescr();  // FD's are also being read from
             if (m_inBBox || nodep->access().isWriteOrRW()) {
                 if (usr == 2 && m_alwaysCombp && entryp->isUsedNotDrivenAny()) {
-                    UINFO(9, " Full bus.  Entryp=" << cvtToHex(entryp) << endl);
+                    UINFO(9, " Full bus.  Entryp=" << cvtToHex(entryp));
                     warnAlwCombOrder(nodep);
                 }
                 if (entryp->isDrivenWhole() && !m_inBBox && !VN_IS(nodep, VarXRef)
@@ -516,13 +516,13 @@ class UndrivenVisitor final : public VNVisitorConst {
         AstNode::user2ClearTree();
         m_alwaysp = nodep;
         if (nodep->keyword() == VAlwaysKwd::ALWAYS_COMB) {
-            UINFO(9, "   " << nodep << endl);
+            UINFO(9, "   " << nodep);
             m_alwaysCombp = nodep;
         } else {
             m_alwaysCombp = nullptr;
         }
         iterateChildrenConst(nodep);
-        if (nodep->keyword() == VAlwaysKwd::ALWAYS_COMB) UINFO(9, "   Done " << nodep << endl);
+        if (nodep->keyword() == VAlwaysKwd::ALWAYS_COMB) UINFO(9, "   Done " << nodep);
     }
     void visit(AstNodeFTaskRef* nodep) override {
         VL_RESTORER(m_inFTaskRef);
@@ -570,7 +570,7 @@ public:
 // Undriven class functions
 
 void V3Undriven::undrivenAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { UndrivenVisitor{nodep}; }
     if (v3Global.opt.stats()) V3Stats::statsStage("undriven");
 }
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 5ad89aece..6a489fb16 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -84,7 +84,7 @@ class UnknownVisitor final : public VNVisitor {
         if (m_assignwp) {
             // Wire assigns must become always statements to deal with insertion
             // of multiple statements.  Perhaps someday make all wassigns into always's?
-            UINFO(5, "     IM_WireRep  " << m_assignwp << endl);
+            UINFO(5, "     IM_WireRep  " << m_assignwp);
             m_assignwp->convertToAlways();
             VL_DO_CLEAR(pushDeletep(m_assignwp), m_assignwp = nullptr);
         }
@@ -115,7 +115,7 @@ class UnknownVisitor final : public VNVisitor {
             VNRelinker replaceHandle;
             AstNodeExpr* const earliercondp = ifp->condp()->unlinkFrBack(&replaceHandle);
             AstNodeExpr* const newp = new AstLogAnd{condp->fileline(), condp, earliercondp};
-            UINFO(4, "Edit BOUNDLVALUE " << newp << endl);
+            UINFO(4, "Edit BOUNDLVALUE " << newp);
             replaceHandle.relink(newp);
         } else {
             AstVar* const varp
@@ -142,7 +142,7 @@ class UnknownVisitor final : public VNVisitor {
 
     // VISITORS
     void visit(AstNodeModule* nodep) override {
-        UINFO(4, " MOD   " << nodep << endl);
+        UINFO(4, " MOD   " << nodep);
         VL_RESTORER(m_modp);
         VL_RESTORER(m_constXCvt);
         VL_RESTORER(m_allowXUnique);
@@ -195,7 +195,7 @@ class UnknownVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visitEqNeqCase(AstNodeBiop* nodep) {
-        UINFO(4, " N/EQCASE->EQ " << nodep << endl);
+        UINFO(4, " N/EQCASE->EQ " << nodep);
         V3Const::constifyEdit(nodep->lhsp());  // lhsp may change
         V3Const::constifyEdit(nodep->rhsp());  // rhsp may change
         if (VN_IS(nodep->lhsp(), Const) && VN_IS(nodep->rhsp(), Const)) {
@@ -227,7 +227,7 @@ class UnknownVisitor final : public VNVisitor {
         }
     }
     void visitEqNeqWild(AstNodeBiop* nodep) {
-        UINFO(4, " N/EQWILD->EQ " << nodep << endl);
+        UINFO(4, " N/EQWILD->EQ " << nodep);
         V3Const::constifyEdit(nodep->lhsp());  // lhsp may change
         V3Const::constifyEdit(nodep->rhsp());  // rhsp may change
         if (VN_IS(nodep->lhsp(), Const) && VN_IS(nodep->rhsp(), Const)) {
@@ -275,7 +275,7 @@ class UnknownVisitor final : public VNVisitor {
     void visit(AstIsUnknown* nodep) override {
         iterateChildren(nodep);
         // Ahh, we're two state, so this is easy
-        UINFO(4, " ISUNKNOWN->0 " << nodep << endl);
+        UINFO(4, " ISUNKNOWN->0 " << nodep);
         AstConst* const newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
         nodep->replaceWith(newp);
         VL_DO_DANGLING(nodep->deleteTree(), nodep);
@@ -286,7 +286,7 @@ class UnknownVisitor final : public VNVisitor {
         dropop[0] = VN_IS(nodep->rhsp(), Const) && VN_AS(nodep->rhsp(), Const)->num().isAnyX();
         dropop[1] = VN_IS(nodep->thsp(), Const) && VN_AS(nodep->thsp(), Const)->num().isAnyX();
         dropop[2] = VN_IS(nodep->fhsp(), Const) && VN_AS(nodep->fhsp(), Const)->num().isAnyX();
-        UINFO(4, " COUNTBITS(" << dropop[0] << dropop[1] << dropop[2] << " " << nodep << endl);
+        UINFO(4, " COUNTBITS(" << dropop[0] << dropop[1] << dropop[2] << " " << nodep);
 
         AstNodeExpr* nonXp = nullptr;
         if (!dropop[0]) {
@@ -296,7 +296,7 @@ class UnknownVisitor final : public VNVisitor {
         } else if (!dropop[2]) {
             nonXp = nodep->fhsp();
         } else {  // Was all X-s
-            UINFO(4, " COUNTBITS('x)->0 " << nodep << endl);
+            UINFO(4, " COUNTBITS('x)->0 " << nodep);
             AstConst* const newp = new AstConst{nodep->fileline(), AstConst::BitFalse{}};
             nodep->replaceWith(newp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
@@ -318,7 +318,7 @@ class UnknownVisitor final : public VNVisitor {
     }
     void visit(AstConst* nodep) override {
         if (m_constXCvt && nodep->num().isFourState()) {
-            UINFO(4, " CONST4 " << nodep << endl);
+            UINFO(4, " CONST4 " << nodep);
             if (debug() >= 9) nodep->dumpTree("-  Const_old: ");
             // CONST(num) -> VARREF(newvarp)
             //          -> VAR(newvarp)
@@ -338,7 +338,7 @@ class UnknownVisitor final : public VNVisitor {
                 AstConst* const newp = new AstConst{nodep->fileline(), numnew};
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(nodep->deleteTree(), nodep);
-                UINFO(4, "   -> " << newp << endl);
+                UINFO(4, "   -> " << newp);
             } else {
                 // Make a Vxrand variable
                 // We use the special XTEMP type so it doesn't break pure functions
@@ -457,7 +457,7 @@ class UnknownVisitor final : public VNVisitor {
                     if (modconstp->width() <= 32
                         && modconstp->toUInt() <= static_cast<uint32_t>(declElements)) {
                         UINFO(9, "arraysel mod const " << declElements
-                                                       << " >= " << modconstp->toUInt() << endl);
+                                                       << " >= " << modconstp->toUInt());
                         return;
                     }
                 }
@@ -530,7 +530,7 @@ const std::string UnknownVisitor::m_xrandPrefix = "__Vxrand";
 // Unknown class functions
 
 void V3Unknown::unknownAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { UnknownVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("unknown", 0, dumpTreeEitherLevel() >= 3);
 }
diff --git a/src/V3Unroll.cpp b/src/V3Unroll.cpp
index d36083c5a..67ed5f1d0 100644
--- a/src/V3Unroll.cpp
+++ b/src/V3Unroll.cpp
@@ -57,7 +57,7 @@ class UnrollVisitor final : public VNVisitor {
     bool cantUnroll(AstNode* nodep, const char* reason) const {
         if (m_generate)
             nodep->v3warn(E_UNSUPPORTED, "Unsupported: Can't unroll generate for; " << reason);
-        UINFO(4, "   Can't Unroll: " << reason << " :" << nodep << endl);
+        UINFO(4, "   Can't Unroll: " << reason << " :" << nodep);
         // if (debug() >= 9) nodep->dumpTree("-  cant: ");
         V3Stats::addStatSum("Unrolling gave up, "s + reason, 1);
         return false;
@@ -85,11 +85,11 @@ class UnrollVisitor final : public VNVisitor {
         AstNode* const incp,  // Maybe under nodep or in bodysp
         AstNode* bodysp) {
         // To keep the IF levels low, we return as each test fails.
-        UINFO(4, " FOR Check " << nodep << endl);
-        if (initp) UINFO(6, "    Init " << initp << endl);
-        if (precondsp) UINFO(6, "    Pcon " << precondsp << endl);
-        if (condp) UINFO(6, "    Cond " << condp << endl);
-        if (incp) UINFO(6, "    Inc  " << incp << endl);
+        UINFO(4, " FOR Check " << nodep);
+        if (initp) UINFO(6, "    Init " << initp);
+        if (precondsp) UINFO(6, "    Pcon " << precondsp);
+        if (condp) UINFO(6, "    Cond " << condp);
+        if (incp) UINFO(6, "    Inc  " << incp);
 
         if (unrollFull.isSetFalse()) return cantUnroll(nodep, "pragma unroll_disable");
 
@@ -143,9 +143,9 @@ class UnrollVisitor final : public VNVisitor {
 
         //
         if (m_forVscp) {
-            UINFO(8, "   Loop Variable: " << m_forVscp << endl);
+            UINFO(8, "   Loop Variable: " << m_forVscp);
         } else {
-            UINFO(8, "   Loop Variable: " << m_forVarp << endl);
+            UINFO(8, "   Loop Variable: " << m_forVarp);
         }
         if (debug() >= 9) nodep->dumpTree("-   for: ");
 
@@ -210,7 +210,7 @@ class UnrollVisitor final : public VNVisitor {
         SimulateVisitor simvis;
         simvis.mainParamEmulate(clonep);
         if (!simvis.optimizable()) {
-            UINFO(4, "Unable to simulate" << endl);
+            UINFO(4, "Unable to simulate");
             if (debug() >= 9) nodep->dumpTree("-  _simtree: ");
             VL_DO_DANGLING(clonep->deleteTree(), clonep);
             return false;
@@ -218,7 +218,7 @@ class UnrollVisitor final : public VNVisitor {
         // Fetch the result
         V3Number* resp = simvis.fetchNumberNull(clonep);
         if (!resp) {
-            UINFO(3, "No number returned from simulation" << endl);
+            UINFO(3, "No number returned from simulation");
             VL_DO_DANGLING(clonep->deleteTree(), clonep);
             return false;
         }
@@ -265,7 +265,7 @@ class UnrollVisitor final : public VNVisitor {
 
     bool forUnroller(AstNode* nodep, const VOptionBool& unrollFull, AstAssign* initp,
                      AstNode* condp, AstNode* precondsp, AstNode* incp, AstNode* bodysp) {
-        UINFO(9, "forUnroller " << nodep << endl);
+        UINFO(9, "forUnroller " << nodep);
         V3Number loopValue{nodep};
         if (!simulateTree(initp->rhsp(), nullptr, initp, loopValue)) {  //
             return false;
@@ -296,7 +296,7 @@ class UnrollVisitor final : public VNVisitor {
         if (stmtsp) {
             int times = 0;
             while (true) {
-                UINFO(8, "      Looping " << loopValue << endl);
+                UINFO(8, "      Looping " << loopValue);
                 V3Number res{nodep};
                 if (!simulateTree(condp, &loopValue, nullptr, res)) {
                     nodep->v3error("Loop unrolling failed.");
@@ -451,7 +451,7 @@ class UnrollVisitor final : public VNVisitor {
     void visit(AstVarRef* nodep) override {
         if (m_varModeCheck && nodep->varp() == m_forVarp && nodep->varScopep() == m_forVscp
             && nodep->access().isWriteOrRW()) {
-            UINFO(8, "   Itervar assigned to: " << nodep << endl);
+            UINFO(8, "   Itervar assigned to: " << nodep);
             m_varAssignHit = true;
         }
 
@@ -506,14 +506,14 @@ UnrollStateful::UnrollStateful()
 UnrollStateful::~UnrollStateful() { delete m_unrollerp; }
 
 void UnrollStateful::unrollGen(AstNodeFor* nodep, const string& beginName) {
-    UINFO(5, __FUNCTION__ << ": " << endl);
+    UINFO(5, __FUNCTION__ << ": ");
     m_unrollerp->process(nodep, true, beginName);
 }
 
 void UnrollStateful::unrollAll(AstNetlist* nodep) { m_unrollerp->process(nodep, false, ""); }
 
 void V3Unroll::unrollAll(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         UnrollStateful unroller;
         unroller.unrollAll(nodep);
diff --git a/src/V3VariableOrder.cpp b/src/V3VariableOrder.cpp
index ea884cb17..0ab4188f1 100644
--- a/src/V3VariableOrder.cpp
+++ b/src/V3VariableOrder.cpp
@@ -254,7 +254,7 @@ public:
 // V3VariableOrder static functions
 
 void V3VariableOrder::orderAll(AstNetlist* netlistp) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
 
     MTaskAffinityMap mTaskAffinity;
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index ee596ee6c..acc3b0647 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -939,7 +939,7 @@ class WidthVisitor final : public VNVisitor {
         // Real: Not allowed
         // Signed: unsigned output, input either
         // Convert all range values to constants
-        UINFO(6, "RANGE " << nodep << endl);
+        UINFO(6, "RANGE " << nodep);
         V3Const::constifyParamsEdit(nodep->leftp());  // May relink pointed to node
         V3Const::constifyParamsEdit(nodep->rightp());  // May relink pointed to node
         checkConstantOrReplace(nodep->leftp(), "left side of bit range isn't a constant");
@@ -1043,7 +1043,7 @@ class WidthVisitor final : public VNVisitor {
                                     ? " or " + cvtToStr(nodep->lsbp()->widthMin() / elw)
                                     : "")
                             << " bits.");
-                    UINFO(1, "    Related node: " << nodep << endl);
+                    UINFO(1, "    Related node: " << nodep);
                 }
             }
             if (VN_IS(nodep->lsbp(), Const) && nodep->msbConst() > frommsb) {
@@ -1057,14 +1057,14 @@ class WidthVisitor final : public VNVisitor {
                 // actually generated.
                 AstNodeVarRef* lrefp = AstNodeVarRef::varRefLValueRecurse(nodep);
                 if (m_doGenerate) {
-                    UINFO(5, "Selection index out of range inside generate\n");
+                    UINFO(5, "Selection index out of range inside generate");
                 } else {
                     nodep->v3warn(SELRANGE, "Selection index out of range: "
                                                 << nodep->msbConst() << ":" << nodep->lsbConst()
                                                 << " outside " << frommsb << ":" << fromlsb);
-                    UINFO(1, "    Related node: " << nodep << endl);
+                    UINFO(1, "    Related node: " << nodep);
                 }
-                if (lrefp) UINFO(9, "    Select extend lrefp " << lrefp << endl);
+                if (lrefp) UINFO(9, "    Select extend lrefp " << lrefp);
                 if (lrefp && lrefp->access().isWriteOrRW()) {
                     // lvarref[X] = ..., the expression assigned is too wide
                     // WTF to do
@@ -1124,7 +1124,7 @@ class WidthVisitor final : public VNVisitor {
                 nodep->dtypeFrom(adtypep->subDTypep());  // Need to strip off array reference
             } else {
                 // Note PackArrayDType doesn't use an ArraySel but a normal Sel.
-                UINFO(1, "    Related dtype: " << fromDtp << endl);
+                UINFO(1, "    Related dtype: " << fromDtp);
                 nodep->v3fatalSrc("Array reference exceeds dimension of array");
                 frommsb = fromlsb = 0;
             }
@@ -1141,8 +1141,8 @@ class WidthVisitor final : public VNVisitor {
                                                : "")
                                        << " bits.");
                 if (!nodep->fileline()->warnIsOff(V3ErrorCode::WIDTH)) {
-                    UINFO(1, "    Related node: " << nodep << endl);
-                    UINFO(1, "    Related dtype: " << nodep->dtypep() << endl);
+                    UINFO(1, "    Related node: " << nodep);
+                    UINFO(1, "    Related dtype: " << nodep->dtypep());
                 }
             }
             if (!m_doGenerate) {
@@ -1155,7 +1155,7 @@ class WidthVisitor final : public VNVisitor {
                                   "Selection index out of range: "
                                       << (VN_AS(nodep->bitp(), Const)->toSInt() + fromlsb)
                                       << " outside " << frommsb << ":" << fromlsb);
-                    UINFO(1, "    Related node: " << nodep << endl);
+                    UINFO(1, "    Related node: " << nodep);
                 }
                 widthCheckSized(nodep, "Extract Range", nodep->bitp(), selwidthDTypep, EXTEND_EXP,
                                 false /*NOWARN*/);
@@ -1169,7 +1169,7 @@ class WidthVisitor final : public VNVisitor {
             const AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefp();
             const AstAssocArrayDType* const adtypep = VN_CAST(fromDtp, AssocArrayDType);
             if (!adtypep) {
-                UINFO(1, "    Related dtype: " << fromDtp << endl);
+                UINFO(1, "    Related dtype: " << fromDtp);
                 nodep->v3fatalSrc("Associative array reference is not to associative array");
             }
             iterateCheckTyped(nodep, "Associative select", nodep->bitp(), adtypep->keyDTypep(),
@@ -1184,7 +1184,7 @@ class WidthVisitor final : public VNVisitor {
             const AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefp();
             const AstWildcardArrayDType* const adtypep = VN_CAST(fromDtp, WildcardArrayDType);
             if (!adtypep) {
-                UINFO(1, "    Related dtype: " << fromDtp << endl);
+                UINFO(1, "    Related dtype: " << fromDtp);
                 nodep->v3fatalSrc("Wildcard array reference is not to wildcard array");
             }
             const AstBasicDType* const basicp = nodep->bitp()->dtypep()->skipRefp()->basicp();
@@ -1208,7 +1208,7 @@ class WidthVisitor final : public VNVisitor {
             const AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefp();
             const AstUnpackArrayDType* const adtypep = VN_CAST(fromDtp, UnpackArrayDType);
             if (!adtypep) {
-                UINFO(1, "    Related dtype: " << fromDtp << endl);
+                UINFO(1, "    Related dtype: " << fromDtp);
                 nodep->v3fatalSrc("Packed array reference exceeds dimension of array");
             }
             // Build new array Dtype based on the original's base type, but with new bounds
@@ -1542,8 +1542,8 @@ class WidthVisitor final : public VNVisitor {
             }
             if (newp) {
                 newp->dtypeFrom(nodep);
-                UINFO(9, "powOld " << nodep << endl);
-                UINFO(9, "powNew " << newp << endl);
+                UINFO(9, "powOld " << nodep);
+                UINFO(9, "powNew " << newp);
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
             }
@@ -1786,7 +1786,7 @@ class WidthVisitor final : public VNVisitor {
         case VAttrType::TYPENAME: {
             UASSERT_OBJ(nodep->fromp(), nodep, "Unprovided expression");
             const string result = nodep->fromp()->dtypep()->prettyDTypeName(true);
-            UINFO(9, "typename '" << result << "' from " << nodep->fromp()->dtypep() << "\n");
+            UINFO(9, "typename '" << result << "' from " << nodep->fromp()->dtypep());
             AstNode* const newp = new AstConst{nodep->fileline(), AstConst::String{}, result};
             nodep->replaceWith(newp);
             VL_DO_DANGLING(nodep->deleteTree(), nodep);
@@ -1799,7 +1799,7 @@ class WidthVisitor final : public VNVisitor {
         default: {
             // Everything else resolved earlier
             nodep->dtypeSetLogicUnsized(32, 1, VSigning::UNSIGNED);  // Approximation, unsized 32
-            UINFO(1, "Missing ATTR type case node: " << nodep << endl);
+            UINFO(1, "Missing ATTR type case node: " << nodep);
             nodep->v3fatalSrc("Missing ATTR type case");
             break;
         }
@@ -1843,7 +1843,7 @@ class WidthVisitor final : public VNVisitor {
             const int width = nodep->subDTypep()->width() * nodep->rangep()->elementsConst();
             nodep->widthForce(width, width);
         }
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstAssocArrayDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1851,7 +1851,7 @@ class WidthVisitor final : public VNVisitor {
         nodep->refDTypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         nodep->keyDTypep(iterateEditMoveDTypep(nodep, nodep->keyDTypep()));
         nodep->dtypep(nodep);  // The array itself, not subDtype
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstBracketArrayDType* nodep) override {
         // Type inserted only because parser didn't know elementsp() type
@@ -1895,7 +1895,7 @@ class WidthVisitor final : public VNVisitor {
         // Iterate into subDTypep() to resolve that type and update pointer.
         nodep->refDTypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         nodep->dtypep(nodep);  // The array itself, not subDtype
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstQueueDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1906,12 +1906,12 @@ class WidthVisitor final : public VNVisitor {
         if (VN_IS(nodep->boundp(), Unbounded)) {
             nodep->boundp()->unlinkFrBack()->deleteTree();  // nullptr will represent unbounded
         }
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstVoidDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
         nodep->dtypep(nodep);
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstUnsizedArrayDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1919,7 +1919,7 @@ class WidthVisitor final : public VNVisitor {
         nodep->refDTypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         // Cleanup array size
         nodep->dtypep(nodep);  // The array itself, not subDtype
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstWildcardArrayDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1927,7 +1927,7 @@ class WidthVisitor final : public VNVisitor {
         nodep->refDTypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         // Cleanup array size
         nodep->dtypep(nodep);  // The array itself, not subDtype
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstBasicDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1950,7 +1950,7 @@ class WidthVisitor final : public VNVisitor {
         nodep->cvtRangeConst();
         // TODO: If BasicDType now looks like a generic type, we can convert to a real generic
         // dtype Instead for now doing this in V3WidthCommit
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstConstDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
@@ -1959,7 +1959,7 @@ class WidthVisitor final : public VNVisitor {
         userIterateChildren(nodep, nullptr);
         nodep->dtypep(nodep);  // Should already be set, but be clear it's not the subDType
         nodep->widthFromSub(nodep->subDTypep());
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstRefDType* nodep) override {
         if (nodep->doingWidth()) {  // Early exit if have circular parameter definition
@@ -2000,7 +2000,7 @@ class WidthVisitor final : public VNVisitor {
         UASSERT_OBJ(nodep->subDTypep(), nodep, "Unlinked");
         nodep->dtypeFrom(nodep->subDTypep());
         nodep->widthFromSub(nodep->subDTypep());
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
         // No nodep->typedefp(nullptr) for now; V3WidthCommit needs to check accesses
         nodep->doingWidth(false);
     }
@@ -2122,7 +2122,7 @@ class WidthVisitor final : public VNVisitor {
     }
     void visit(AstCast* nodep) override {
         if (nodep->didWidth()) return;
-        UINFO(9, "CAST " << nodep << endl);
+        UINFO(9, "CAST " << nodep);
         nodep->dtypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         if (m_vup->prelim()) {
             if (debug() >= 9) nodep->dumpTree("-  CastPre: ");
@@ -2333,9 +2333,9 @@ class WidthVisitor final : public VNVisitor {
                 if (const AstDynArrayDType* const unsizedp
                     = VN_CAST(dtp->skipRefp(), DynArrayDType)) {
                     if (!np) {
-                        UINFO(9, "Dynamic becomes unsized array (var itself) " << nodep << endl);
+                        UINFO(9, "Dynamic becomes unsized array (var itself) " << nodep);
                     } else {
-                        UINFO(9, "Dynamic becomes unsized array (subDType) " << dtp << endl);
+                        UINFO(9, "Dynamic becomes unsized array (subDType) " << dtp);
                     }
                     AstUnsizedArrayDType* const newp
                         = new AstUnsizedArrayDType{unsizedp->fileline(), unsizedp->subDTypep()};
@@ -2365,7 +2365,7 @@ class WidthVisitor final : public VNVisitor {
         if (implicitParam) {
             if (nodep->valuep()) {
                 userIterateAndNext(nodep->valuep(), WidthVP{nodep->dtypep(), PRELIM}.p());
-                UINFO(9, "implicitParamPRELIMIV " << nodep->valuep() << endl);
+                UINFO(9, "implicitParamPRELIMIV " << nodep->valuep());
                 // Although nodep will get a different width for parameters
                 // just below, we want the init numbers to retain their
                 // width/minwidth until parameters are replaced.
@@ -2418,7 +2418,7 @@ class WidthVisitor final : public VNVisitor {
                 }
                 iterateCheckAssign(nodep, "Initial value", nodep->valuep(), FINAL,
                                    nodep->dtypep());
-                UINFO(9, "implicitParamFromIV " << nodep->valuep() << endl);
+                UINFO(9, "implicitParamFromIV " << nodep->valuep());
                 // UINFO below will print variable nodep
             } else {
                 // Or, if nothing assigned, they're integral
@@ -2436,7 +2436,7 @@ class WidthVisitor final : public VNVisitor {
             iterateCheckAssign(nodep, "Initial value", nodep->valuep(), FINAL, nodep->dtypep());
         }
         userIterateAndNext(nodep->delayp(), WidthVP{nodep->dtypep(), PRELIM}.p());
-        UINFO(4, "varWidthed " << nodep << endl);
+        UINFO(4, "varWidthed " << nodep);
         // if (debug()) nodep->dumpTree("-  InitOut: ");
         nodep->didWidth(true);
         nodep->doingWidth(false);
@@ -2487,7 +2487,7 @@ class WidthVisitor final : public VNVisitor {
 
     void visit(AstEnumDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
-        UINFO(5, "  ENUMDTYPE " << nodep << endl);
+        UINFO(5, "  ENUMDTYPE " << nodep);
         nodep->refDTypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         nodep->dtypep(nodep);
         AstBasicDType* basicp = nodep->dtypep()->skipRefp()->basicp();
@@ -2508,7 +2508,7 @@ class WidthVisitor final : public VNVisitor {
              itemp = VN_AS(itemp->nextp(), EnumItem)) {
             if (itemp->valuep()) {
                 if (debug() >= 9) {
-                    UINFO(0, "EnumInit " << itemp << endl);
+                    UINFO(0, "EnumInit " << itemp);
                     itemp->valuep()->dumpTree("-  EnumInit: ");
                 }
                 V3Const::constifyParamsEdit(itemp->valuep());  // itemp may change
@@ -2550,7 +2550,7 @@ class WidthVisitor final : public VNVisitor {
         }
     }
     void visit(AstEnumItem* nodep) override {
-        UINFO(5, "   ENUMITEM " << nodep << endl);
+        UINFO(5, "   ENUMITEM " << nodep);
         VL_RESTORER(m_enumItemp);
         m_enumItemp = nodep;
         AstNodeDType* const vdtypep = m_vup->dtypep();
@@ -2734,8 +2734,8 @@ class WidthVisitor final : public VNVisitor {
             if (VN_IS(arrayp, NodeArrayDType) || VN_IS(arrayp, AssocArrayDType)) {
                 userIterateChildren(nodep, WidthVP{arrayp->subDTypep(), BOTH}.p());
             } else {
-                UINFO(1, "on " << nodep << endl);
-                UINFO(1, "dtype object " << arrayp << endl);
+                UINFO(1, "on " << nodep);
+                UINFO(1, "dtype object " << arrayp);
                 nodep->v3fatalSrc("InitArray on non-array");
             }
         }
@@ -2889,14 +2889,14 @@ class WidthVisitor final : public VNVisitor {
 
     void visit(AstIfaceRefDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
-        UINFO(5, "   IFACEREF " << nodep << endl);
+        UINFO(5, "   IFACEREF " << nodep);
         userIterateChildren(nodep, m_vup);
         nodep->dtypep(nodep);
-        UINFO(4, "dtWidthed " << nodep << endl);
+        UINFO(4, "dtWidthed " << nodep);
     }
     void visit(AstNodeUOrStructDType* nodep) override {
         if (nodep->didWidthAndSet()) return;  // This node is a dtype & not both PRELIMed+FINALed
-        UINFO(5, "   NODEUORS " << nodep << endl);
+        UINFO(5, "   NODEUORS " << nodep);
         // if (debug() >= 9) nodep->dumpTree("-  class-in: ");
         if (!nodep->packed() && v3Global.opt.structsPacked()) nodep->packed(true);
         userIterateChildren(nodep, nullptr);  // First size all members
@@ -3032,7 +3032,7 @@ class WidthVisitor final : public VNVisitor {
         userIterateChildren(nodep, WidthVP{SELF, BOTH}.p());
     }
     void visit(AstMemberSel* nodep) override {
-        UINFO(5, "   MEMBERSEL " << nodep << endl);
+        UINFO(5, "   MEMBERSEL " << nodep);
         if (nodep->didWidth()) return;
         if (debug() >= 9) nodep->dumpTree("-  mbs-in: ");
         userIterateChildren(nodep, WidthVP{SELF, BOTH}.p());
@@ -3040,14 +3040,14 @@ class WidthVisitor final : public VNVisitor {
         // Find the fromp dtype - should be a class
         UASSERT_OBJ(nodep->fromp()->dtypep(), nodep->fromp(), "Unlinked data type");
         AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefToEnump();
-        UINFO(9, "     from dt " << fromDtp << endl);
+        UINFO(9, "     from dt " << fromDtp);
         const AstMemberSel* const fromSel = VN_CAST(nodep->fromp(), MemberSel);
         if (AstClocking* const clockingp = fromSel && fromSel->varp()
                                                ? VN_CAST(fromSel->varp()->firstAbovep(), Clocking)
                                                : nullptr) {
             // In:  MEMBERSEL{MEMBERSEL{vifaceref, "cb", cb_event}, "clockvar", null}
             // Out: MEMBERSEL{vifaceref, "clockvar", clockvar}
-            UINFO(9, "     from clocking " << clockingp << endl);
+            UINFO(9, "     from clocking " << clockingp);
             if (AstVar* const varp = memberSelClocking(nodep, clockingp)) {
                 if (!varp->didWidth()) userIterate(varp, nullptr);
                 AstMemberSel* fromp = VN_AS(nodep->fromp(), MemberSel);
@@ -3060,7 +3060,7 @@ class WidthVisitor final : public VNVisitor {
                     = VN_CAST(nodep->fromp()->dtypep(), IfaceRefDType)) {
                     nodep->varp()->sensIfacep(adtypep->ifacep());
                 }
-                UINFO(9, "     done clocking msel " << nodep << endl);
+                UINFO(9, "     done clocking msel " << nodep);
                 nodep->didWidth(true);  // Must not visit again: will confuse scopes
                 return;
             }
@@ -3083,7 +3083,7 @@ class WidthVisitor final : public VNVisitor {
                     nodep->didWidth(true);
                     return;
                 }
-                UINFO(1, "found object " << foundp << endl);
+                UINFO(1, "found object " << foundp);
                 nodep->v3fatalSrc("MemberSel of non-variable\n"
                                   << nodep->warnContextPrimary() << '\n'
                                   << foundp->warnOther() << "... Location of found object\n"
@@ -3168,10 +3168,10 @@ class WidthVisitor final : public VNVisitor {
                     // We don't support constraints yet, so just keep as unlinked for now
                     // Presumably we'll next see a constraint_mode AstMethodCall
                     nodep->dtypep(nodep->findConstraintRefDType());
-                    UINFO(9, "Unsupported constraint select " << nodep << endl);
+                    UINFO(9, "Unsupported constraint select " << nodep);
                     return true;
                 }
-                UINFO(1, "found object " << foundp << endl);
+                UINFO(1, "found object " << foundp);
                 nodep->v3fatalSrc("MemberSel of non-variable\n"
                                   << nodep->warnContextPrimary() << '\n'
                                   << foundp->warnOther() << "... Location of found object\n"
@@ -3236,16 +3236,16 @@ class WidthVisitor final : public VNVisitor {
             = VN_CAST(m_memberMap.findMember(adtypep, nodep->name()), MemberDType)) {
             if (m_attrp) {  // Looking for the base of the attribute
                 nodep->dtypep(memberp);
-                UINFO(9, "   MEMBERSEL(attr) -> " << nodep << endl);
-                UINFO(9, "           dt-> " << nodep->dtypep() << endl);
+                UINFO(9, "   MEMBERSEL(attr) -> " << nodep);
+                UINFO(9, "           dt-> " << nodep->dtypep());
             } else if (adtypep->packed()) {
                 AstSel* const newp = new AstSel{nodep->fileline(), nodep->fromp()->unlinkFrBack(),
                                                 memberp->lsb(), memberp->width()};
                 // Must skip over the member to find the union; as the member may disappear later
                 newp->dtypep(memberp->subDTypep()->skipRefToEnump());
                 newp->didWidth(true);  // Don't replace dtype with basic type
-                UINFO(9, "   MEMBERSEL -> " << newp << endl);
-                UINFO(9, "           dt-> " << newp->dtypep() << endl);
+                UINFO(9, "   MEMBERSEL -> " << newp);
+                UINFO(9, "           dt-> " << newp->dtypep());
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 // Should be able to treat it as a normal-ish nodesel - maybe.
@@ -3256,8 +3256,8 @@ class WidthVisitor final : public VNVisitor {
                 // Must skip over the member to find the union; as the member may disappear later
                 newp->dtypep(memberp->subDTypep()->skipRefToEnump());
                 newp->didWidth(true);  // Don't replace dtype with basic type
-                UINFO(9, "   MEMBERSEL -> " << newp << endl);
-                UINFO(9, "           dt-> " << newp->dtypep() << endl);
+                UINFO(9, "   MEMBERSEL -> " << newp);
+                UINFO(9, "           dt-> " << newp->dtypep());
                 nodep->replaceWith(newp);
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 // Should be able to treat it as a normal-ish nodesel - maybe.
@@ -3279,7 +3279,7 @@ class WidthVisitor final : public VNVisitor {
     }
 
     void visit(AstMethodCall* nodep) override {
-        UINFO(5, "   METHODCALL " << nodep << endl);
+        UINFO(5, "   METHODCALL " << nodep);
         if (nodep->didWidth()) return;
         if (debug() >= 9) nodep->dumpTree("-  mts-in: ");
         // Should check types the method requires, but at present we don't do much
@@ -3290,7 +3290,7 @@ class WidthVisitor final : public VNVisitor {
         UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, "Unsized expression");
         AstNodeDType* const fromDtp = nodep->fromp()->dtypep()->skipRefToEnump();
         AstBasicDType* const basicp = fromDtp ? fromDtp->basicp() : nullptr;
-        UINFO(9, "     from dt " << fromDtp << endl);
+        UINFO(9, "     from dt " << fromDtp);
         userIterate(fromDtp, WidthVP{SELF, BOTH}.p());
         if (nodep->name() == "rand_mode") {
             methodCallRandMode(nodep);
@@ -3718,7 +3718,7 @@ class WidthVisitor final : public VNVisitor {
         } else if (const AstNodeSel* const ichildp = VN_CAST(childp, NodeSel)) {
             methodCallLValueRecurse(nodep, ichildp->fromp(), access);
         } else {
-            UINFO(1, "    Related node: " << childp << endl);
+            UINFO(1, "    Related node: " << childp);
             nodep->v3warn(E_UNSUPPORTED, "Unsupported: Non-variable on LHS of built-in method '"
                                              << nodep->prettyName() << "'");
         }
@@ -3947,10 +3947,10 @@ class WidthVisitor final : public VNVisitor {
     }
     void methodCallIfaceRef(AstMethodCall* nodep, AstIfaceRefDType* adtypep) {
         AstIface* const ifacep = adtypep->ifacep();
-        UINFO(5, __FUNCTION__ << ":" << nodep << endl);
+        UINFO(5, __FUNCTION__ << ":" << nodep);
         if (AstNodeFTask* const ftaskp
             = VN_CAST(m_memberMap.findMember(ifacep, nodep->name()), NodeFTask)) {
-            UINFO(5, __FUNCTION__ << "AstNodeFTask" << nodep << endl);
+            UINFO(5, __FUNCTION__ << "AstNodeFTask" << nodep);
             userIterate(ftaskp, nullptr);
             if (ftaskp->isStatic()) {
                 AstNodeExpr* argsp = nullptr;
@@ -4452,7 +4452,7 @@ class WidthVisitor final : public VNVisitor {
         }
         // The AstNodeAssign visitor will be soon be replacing this node, make sure it gets it
         if (!VN_IS(nodep->backp(), NodeAssign)) {
-            UINFO(1, "Got backp " << nodep->backp() << endl);
+            UINFO(1, "Got backp " << nodep->backp());
             nodep->v3error(
                 "dynamic new() not expected in this context (expected under an assign)");
             return;
@@ -4468,7 +4468,7 @@ class WidthVisitor final : public VNVisitor {
 
     void visit(AstPattern* nodep) override {
         if (nodep->didWidthAndSet()) return;
-        UINFO(9, "PATTERN " << nodep << endl);
+        UINFO(9, "PATTERN " << nodep);
         if (nodep->childDTypep()) {  // data_type '{ pattern }
             nodep->dtypep(iterateEditMoveDTypep(nodep, nodep->subDTypep()));
         }
@@ -4485,7 +4485,7 @@ class WidthVisitor final : public VNVisitor {
         {
             dtypep = dtypep->skipRefp();
             nodep->dtypep(dtypep);
-            UINFO(9, "  dtypep " << dtypep << endl);
+            UINFO(9, "  dtypep " << dtypep);
             nodep->dtypep(dtypep);
             // Determine replication count, and replicate initial value as
             // widths need to be individually determined
@@ -4733,7 +4733,7 @@ class WidthVisitor final : public VNVisitor {
     void patternArray(AstPattern* nodep, AstNodeArrayDType* arrayDtp, AstPatMember* defaultp) {
         const VNumRange range = arrayDtp->declRange();
         PatVecMap patmap = patVectorMap(nodep, range);
-        UINFO(9, "ent " << range.left() << " to " << range.right() << endl);
+        UINFO(9, "ent " << range.left() << " to " << range.right());
         AstNode* newp = nullptr;
         bool allConstant = true;
         const bool isConcat = nodep->itemsp() && VN_AS(nodep->itemsp(), PatMember)->isConcat();
@@ -4879,7 +4879,7 @@ class WidthVisitor final : public VNVisitor {
         const AstBasicDType* bdtypep = VN_AS(vdtypep, BasicDType);
         const VNumRange range = bdtypep->declRange();
         PatVecMap patmap = patVectorMap(nodep, range);
-        UINFO(9, "ent " << range.hi() << " to " << range.lo() << endl);
+        UINFO(9, "ent " << range.hi() << " to " << range.lo());
         AstNodeExpr* newp = nullptr;
         for (int ent = range.hi(); ent >= range.lo(); --ent) {
             AstPatMember* newpatp = nullptr;
@@ -4983,7 +4983,7 @@ class WidthVisitor final : public VNVisitor {
         AstNodeDType* const vdtypep = m_vup->dtypeNullp();
         UASSERT_OBJ(vdtypep, nodep, "Pattern member type not assigned by AstPattern visitor");
         nodep->dtypep(vdtypep);
-        UINFO(9, "   PATMEMBER " << nodep << endl);
+        UINFO(9, "   PATMEMBER " << nodep);
         UASSERT_OBJ(!nodep->lhssp()->nextp(), nodep,
                     "PatMember value should be singular w/replicates removed");
         // Need to propagate assignment type downwards, even on prelim
@@ -5047,7 +5047,7 @@ class WidthVisitor final : public VNVisitor {
         if (AstAttrOf* const exprap = VN_CAST(nodep->exprp(), AttrOf)) {
             if (exprap->attrType() == VAttrType::TYPEID) {
                 AstNodeDType* const exprDtp = VN_AS(exprap->fromp(), NodeDType);
-                UINFO(9, "case type exprDtp " << exprDtp << endl);
+                UINFO(9, "case type exprDtp " << exprDtp);
                 // V3Param may have a pointer to this case statement, and we need
                 // dotted references to remain properly named, so rather than
                 // removing we convert it to a "normal" expression "case (1) ..."
@@ -5192,9 +5192,9 @@ class WidthVisitor final : public VNVisitor {
                 return;
             }
             fromDtp = fromDtp->skipRefp();
-            UINFO(9, "- foreachArg " << argsp << endl);
-            UINFO(9, "-   from on  " << fromp << endl);
-            UINFO(9, "-   from dtp " << fromDtp << endl);
+            UINFO(9, "- foreachArg " << argsp);
+            UINFO(9, "-   from on  " << fromp);
+            UINFO(9, "-   from dtp " << fromDtp);
 
             if (VN_IS(fromDtp, NodeArrayDType) || VN_IS(fromDtp, DynArrayDType)
                 || VN_IS(fromDtp, QueueDType)) {
@@ -5377,7 +5377,7 @@ class WidthVisitor final : public VNVisitor {
         // Just let all arguments seek their natural sizes
         userIterateChildren(nodep, WidthVP{SELF, BOTH}.p());
         //
-        UINFO(9, "  Display in " << nodep->text() << endl);
+        UINFO(9, "  Display in " << nodep->text());
         string newFormat;
         bool inPct = false;
         AstNodeExpr* argp = nodep->exprsp();
@@ -5524,7 +5524,7 @@ class WidthVisitor final : public VNVisitor {
             }
         }
         nodep->text(newFormat);
-        UINFO(9, "  Display out " << nodep->text() << endl);
+        UINFO(9, "  Display out " << nodep->text());
     }
     void visit(AstCReturn* nodep) override {
         assertAtStatement(nodep);
@@ -5868,8 +5868,8 @@ class WidthVisitor final : public VNVisitor {
                                    << modSize << ","
                                    << " and expression which is an interface array of size "
                                    << exprSize << ".");
-                    UINFO(1, "    Related lo: " << modDTypep << endl);
-                    UINFO(1, "    Related hi: " << conDTypep << endl);
+                    UINFO(1, "    Related lo: " << modDTypep);
+                    UINFO(1, "    Related hi: " << conDTypep);
                 } else if ((exprArrayp && !modArrayp) || (!exprArrayp && modArrayp)) {
                     nodep->v3error("Illegal " << nodep->prettyOperatorName() << ","
                                               << " mismatch between port which is"
@@ -5877,8 +5877,8 @@ class WidthVisitor final : public VNVisitor {
                                               << " and expression which is"
                                               << (exprArrayp ? "" : " not")
                                               << " an array. (IEEE 1800-2023 7.6)");
-                    UINFO(1, "    Related lo: " << modDTypep << endl);
-                    UINFO(1, "    Related hi: " << conDTypep << endl);
+                    UINFO(1, "    Related lo: " << modDTypep);
+                    UINFO(1, "    Related hi: " << conDTypep);
                 }
                 iterateCheckAssign(nodep, "pin connection", nodep->exprp(), FINAL, subDTypep);
             }
@@ -6100,7 +6100,7 @@ class WidthVisitor final : public VNVisitor {
     void processFTaskRefArgs(AstNodeFTaskRef* nodep) {
         // For arguments, is assignment-like context; see IEEE rules in AstNodeAssign
         // Function hasn't been widthed, so make it so.
-        UINFO(5, "  FTASKREF " << nodep << endl);
+        UINFO(5, "  FTASKREF " << nodep);
         UASSERT_OBJ(nodep->taskp(), nodep, "Unlinked");
         if (nodep->didWidth()) return;
         userIterate(nodep->taskp(), nullptr);
@@ -6121,7 +6121,7 @@ class WidthVisitor final : public VNVisitor {
                 // pointer, so need to iterate separately later
                 if (portp->attrSFormat()
                     && (!VN_IS(pinp, SFormatF) || pinp->nextp())) {  // Not already done
-                    UINFO(4, "   sformat via metacomment: " << nodep << endl);
+                    UINFO(4, "   sformat via metacomment: " << nodep);
                     VNRelinker handle;
                     argp->unlinkFrBackWithNext(&handle);  // Format + additional args, if any
                     AstNodeExpr* argsp = nullptr;
@@ -6154,7 +6154,7 @@ class WidthVisitor final : public VNVisitor {
                          && !(VN_IS(pinp, VarRef)
                               && VN_AS(pinp, VarRef)->varp()->basicp()->keyword()
                                      == VBasicDTypeKwd::STRING)) {
-                    UINFO(4, "   Add CvtPackString: " << pinp << endl);
+                    UINFO(4, "   Add CvtPackString: " << pinp);
                     VNRelinker handle;
                     pinp->unlinkFrBack(&handle);  // No next, that's the next pin
                     AstNodeExpr* const newp = new AstCvtPackString{pinp->fileline(), pinp};
@@ -6233,7 +6233,7 @@ class WidthVisitor final : public VNVisitor {
     void visit(AstNodeFTaskRef* nodep) override {
         // For arguments, is assignment-like context; see IEEE rules in AstNodeAssign
         // Function hasn't been widthed, so make it so.
-        UINFO(5, "  FTASKREF " << nodep << endl);
+        UINFO(5, "  FTASKREF " << nodep);
         AstWith* withp = nullptr;
         if (nodep->name() == "rand_mode" || nodep->name() == "constraint_mode") {
             v3Global.useRandomizeMethods(true);
@@ -6774,12 +6774,12 @@ class WidthVisitor final : public VNVisitor {
                         "Type compare expects type reference");
             AstNodeDType* const lhsDtp = VN_AS(lhsap->fromp(), NodeDType);
             AstNodeDType* const rhsDtp = VN_AS(rhsap->fromp(), NodeDType);
-            UINFO(9, "==type lhsDtp " << lhsDtp << endl);
-            UINFO(9, "==type rhsDtp " << lhsDtp << endl);
+            UINFO(9, "==type lhsDtp " << lhsDtp);
+            UINFO(9, "==type rhsDtp " << lhsDtp);
             const bool invert = VN_IS(nodep, NeqT);
             const bool identical
                 = AstNode::computeCastable(lhsDtp, rhsDtp, nodep) == VCastable::SAMEISH;
-            UINFO(9, "== " << identical << endl);
+            UINFO(9, "== " << identical);
             const bool eq = invert ^ identical;
             AstNode* const newp = new AstConst{nodep->fileline(), AstConst::BitTrue{}, eq};
             nodep->replaceWith(newp);
@@ -6954,7 +6954,7 @@ class WidthVisitor final : public VNVisitor {
         // because the rhs could be larger, and we need to have proper editing to get the widths
         // to be the same for our operations.
         //
-        // if (debug() >= 9) { UINFO(0,"rus "<<m_vup<<endl); nodep->dumpTree("-  rusin: "); }
+        // if (debug() >= 9) { UINFO(0, "rus " << m_vup); nodep->dumpTree("-  rusin: "); }
         if (m_vup->prelim()) {  // First stage evaluation
             // Determine expression widths only relying on what's in the subops
             userIterateAndNext(nodep->lhsp(), WidthVP{CONTEXT_DET, PRELIM}.p());
@@ -7064,8 +7064,7 @@ class WidthVisitor final : public VNVisitor {
         // node, while the output dtype is the *expected* sign.
         // It is reasonable to have sign extension with unsigned output,
         // for example $unsigned(a)+$signed(b), the SIGNED(B) will be unsigned dtype out
-        UINFO(4,
-              "  widthExtend_(r=" << static_cast<int>(extendRule) << ") old: " << nodep << endl);
+        UINFO(4, "  widthExtend_(r=" << static_cast<int>(extendRule) << ") old: " << nodep);
         if (extendRule == EXTEND_OFF) return;
         AstConst* const constp = VN_CAST(nodep, Const);
         const int expWidth = expDTypep->width();
@@ -7112,7 +7111,7 @@ class WidthVisitor final : public VNVisitor {
             nodep = newp;
         }
         nodep->dtypep(expDTypep);
-        UINFO(4, "             _new: " << nodep << endl);
+        UINFO(4, "             _new: " << nodep);
     }
 
     void fixWidthReduce(AstNodeExpr* nodep) {
@@ -7123,7 +7122,7 @@ class WidthVisitor final : public VNVisitor {
         // Attempt to fix it quietly
         const int expWidth = 1;
         const int expSigned = false;
-        UINFO(4, "  widthReduce_old: " << nodep << endl);
+        UINFO(4, "  widthReduce_old: " << nodep);
         AstConst* const constp = VN_CAST(nodep, Const);
         if (constp) {
             V3Number num(nodep, expWidth);
@@ -7152,7 +7151,7 @@ class WidthVisitor final : public VNVisitor {
             nodep = newp;
         }
         nodep->dtypeChgWidthSigned(expWidth, expWidth, VSigning::fromBool(expSigned));
-        UINFO(4, "             _new: " << nodep << endl);
+        UINFO(4, "             _new: " << nodep);
     }
 
     bool fixAutoExtend(AstNodeExpr*& nodepr, int expWidth) {
@@ -7358,7 +7357,7 @@ class WidthVisitor final : public VNVisitor {
                             V3Number selected{constp, 8};
                             selected.opSel(constp->num(), cindex * 8 + 7, cindex * 8);
                             UINFO(0, "   aindex=" << aindex << "  cindex=" << cindex
-                                                  << "  c=" << selected << endl);
+                                                  << "  c=" << selected);
                             if (!selected.isFourState()) {
                                 if (const uint32_t c = selected.toUInt()) {
                                     newp->addIndexValuep(
@@ -7367,7 +7366,7 @@ class WidthVisitor final : public VNVisitor {
                                 }
                             }
                         }
-                        UINFO(6, "   unpackFromString: " << nodep << endl);
+                        UINFO(6, "   unpackFromString: " << nodep);
                         rhsp->replaceWith(newp);
                         VL_DO_DANGLING(pushDeletep(rhsp), rhsp);
                         rhsp = newp;
@@ -7400,7 +7399,7 @@ class WidthVisitor final : public VNVisitor {
         // For DOUBLE under a logical op, add implied test against zero, never a warning
         AstNodeDType* const underVDTypep = underp ? underp->dtypep()->skipRefp() : nullptr;
         if (underp && underVDTypep->isDouble()) {
-            UINFO(6, "   spliceCvtCmpD0: " << underp << endl);
+            UINFO(6, "   spliceCvtCmpD0: " << underp);
             VNRelinker linker;
             underp->unlinkFrBack(&linker);
             AstNode* const newp
@@ -7509,7 +7508,7 @@ class WidthVisitor final : public VNVisitor {
                             std::max(subDTypep->width(), underp->width()),
                             std::max(subDTypep->widthMin(), underp->widthMin()),
                             VSigning::fromBool(underp->isSigned()));
-                        UINFO(9, "Assignment of opposite-signed RHS to LHS: " << nodep << endl);
+                        UINFO(9, "Assignment of opposite-signed RHS to LHS: " << nodep);
                     }
                     underp = userIterateSubtreeReturnEdits(underp, WidthVP{subDTypep, FINAL}.p());
                 } else {
@@ -7659,7 +7658,7 @@ class WidthVisitor final : public VNVisitor {
         // For integer used in REAL context, convert to real
         // We don't warn here, "2.0 * 2" is common and reasonable
         if (nodep && !nodep->dtypep()->skipRefp()->isDouble()) {
-            UINFO(6, "   spliceCvtD: " << nodep << endl);
+            UINFO(6, "   spliceCvtD: " << nodep);
             VNRelinker linker;
             nodep->unlinkFrBack(&linker);
             AstNodeExpr* newp;
@@ -7678,7 +7677,7 @@ class WidthVisitor final : public VNVisitor {
         // IEEE-2012 11.8.1: Signed: Type coercion creates signed
         // 11.8.2: Argument to convert is self-determined
         if (nodep && nodep->dtypep()->skipRefp()->isDouble()) {
-            UINFO(6, "   spliceCvtS: " << nodep << endl);
+            UINFO(6, "   spliceCvtS: " << nodep);
             VNRelinker linker;
             nodep->unlinkFrBack(&linker);
             if (const AstConst* const constp = VN_CAST(nodep, Const)) {
@@ -7701,7 +7700,7 @@ class WidthVisitor final : public VNVisitor {
         // IEEE-2012 11.8.1: Signed: Type coercion creates signed
         // 11.8.2: Argument to convert is self-determined
         if (nodep && !(nodep->dtypep()->basicp() && nodep->dtypep()->basicp()->isString())) {
-            UINFO(6, "   spliceCvtString: " << nodep << endl);
+            UINFO(6, "   spliceCvtString: " << nodep);
             VNRelinker linker;
             nodep->unlinkFrBack(&linker);
             AstNodeExpr* const newp = new AstCvtPackString{nodep->fileline(), nodep};
@@ -7754,7 +7753,7 @@ class WidthVisitor final : public VNVisitor {
             nodep->v3fatalSrc("Node needs sign change, but bad case: " << nodep);
             break;
         }
-        UINFO(6, "   ReplaceWithUOrSVersion: " << nodep << " w/ " << newp << endl);
+        UINFO(6, "   ReplaceWithUOrSVersion: " << nodep << " w/ " << newp);
         nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return newp;
@@ -7792,7 +7791,7 @@ class WidthVisitor final : public VNVisitor {
             nodep->v3fatalSrc("Node needs conversion to double, but bad case: " << nodep);
             break;
         }
-        UINFO(6, "   ReplaceWithDVersion: " << nodep << " w/ " << newp << endl);
+        UINFO(6, "   ReplaceWithDVersion: " << nodep << " w/ " << newp);
         nodep->replaceWith(newp);
         // No width change; the default created type (bool or double) is correct
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -7824,7 +7823,7 @@ class WidthVisitor final : public VNVisitor {
             nodep->v3fatalSrc("Node needs conversion to string, but bad case: " << nodep);
             break;
         }
-        UINFO(6, "   ReplaceWithNVersion: " << nodep << " w/ " << newp << endl);
+        UINFO(6, "   ReplaceWithNVersion: " << nodep << " w/ " << newp);
         nodep->replaceWith(newp);
         // No width change; the default created type (bool or string) is correct
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -7843,7 +7842,7 @@ class WidthVisitor final : public VNVisitor {
             nodep->v3fatalSrc("Node needs conversion to double, but bad case: " << nodep);
             break;
         }
-        UINFO(6, "   ReplaceWithDVersion: " << nodep << " w/ " << newp << endl);
+        UINFO(6, "   ReplaceWithDVersion: " << nodep << " w/ " << newp);
         nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return newp;
@@ -7888,7 +7887,7 @@ class WidthVisitor final : public VNVisitor {
         const bool child1 = (parentp->getChildDTypep() == dtnodep);
         const bool child2 = (parentp->getChild2DTypep() == dtnodep);
         if (child1 || child2) {
-            UINFO(9, "iterateEditMoveDTypep child iterating " << dtnodep << endl);
+            UINFO(9, "iterateEditMoveDTypep child iterating " << dtnodep);
             // Iterate, this might edit the dtypes which means dtnodep now lost
             VL_DO_DANGLING(userIterate(dtnodep, nullptr), dtnodep);
             // Figure out the new dtnodep, remained a child of parent so find it there
@@ -7898,12 +7897,12 @@ class WidthVisitor final : public VNVisitor {
                         "iterateEditMoveDTypep didn't get width resolution of "
                             << dtnodep->prettyTypeName());
             // Move to under netlist
-            UINFO(9, "iterateEditMoveDTypep child moving " << dtnodep << endl);
+            UINFO(9, "iterateEditMoveDTypep child moving " << dtnodep);
             dtnodep->unlinkFrBack();
             v3Global.rootp()->typeTablep()->addTypesp(dtnodep);
         }
         if (!dtnodep->didWidth()) {
-            UINFO(9, "iterateEditMoveDTypep pointer iterating " << dtnodep << endl);
+            UINFO(9, "iterateEditMoveDTypep pointer iterating " << dtnodep);
             // See notes in visit(AstBracketArrayDType*)
             UASSERT_OBJ(!VN_IS(dtnodep, BracketArrayDType), parentp,
                         "Brackets should have been iterated as children");
@@ -7920,7 +7919,7 @@ class WidthVisitor final : public VNVisitor {
         AstNodeDType* dtypep = nodep->skipRefp();
         VNumRange declRange;  // ranged() set false
         for (int i = 1; i <= dim; ++i) {
-            // UINFO(9, "   dim at "<<dim<<"  "<<dtypep<<endl);
+            // UINFO(9, "   dim at "<<dim<<"  "<<dtypep);
             declRange = VNumRange{};  // ranged() set false
             if (const AstNodeArrayDType* const adtypep = VN_CAST(dtypep, NodeArrayDType)) {
                 declRange = adtypep->declRange();
@@ -7942,7 +7941,7 @@ class WidthVisitor final : public VNVisitor {
         case VAttrType::DIM_BITS: {
             int bits = 1;
             while (dtypep) {
-                // UINFO(9, "   bits at "<<bits<<"  "<<dtypep<<endl);
+                // UINFO(9, "   bits at " << bits << "  " << dtypep);
                 if (const AstNodeArrayDType* const adtypep = VN_CAST(dtypep, NodeArrayDType)) {
                     bits *= adtypep->declRange().elements();
                     dtypep = adtypep->subDTypep()->skipRefp();
@@ -7979,7 +7978,7 @@ class WidthVisitor final : public VNVisitor {
         }
         if (!valp) valp = new AstConst{fileline, AstConst::Signed32{}, val};
         UINFO(9, " $dimension " << attrType.ascii() << "(" << cvtToHex(dtypep) << "," << dim
-                                << ")=" << valp << endl);
+                                << ")=" << valp);
         return valp;
     }
     AstVar* dimensionVarp(AstNodeDType* nodep, VAttrType attrType, uint32_t msbdim) {
@@ -8039,7 +8038,7 @@ class WidthVisitor final : public VNVisitor {
         const auto pair = nodep->tableMap().emplace(attrType, nullptr);
         if (pair.second) {
             UINFO(9, "Construct Venumtab attr=" << attrType.ascii() << " assoc=" << assoc
-                                                << " max=" << msbdim << " for " << nodep << endl);
+                                                << " max=" << msbdim << " for " << nodep);
             AstNodeDType* basep;
             if (attrType == VAttrType::ENUM_NAME) {
                 basep = nodep->findStringDType();
@@ -8229,7 +8228,7 @@ class WidthVisitor final : public VNVisitor {
     }
 
     void makeOpenArrayShell(AstNodeFTaskRef* nodep) {
-        UINFO(4, "Replicate openarray function " << nodep->taskp() << endl);
+        UINFO(4, "Replicate openarray function " << nodep->taskp());
         AstNodeFTask* const oldTaskp = nodep->taskp();
         oldTaskp->dpiOpenParentInc();
         UASSERT_OBJ(!oldTaskp->dpiOpenChild(), oldTaskp,
@@ -8277,7 +8276,7 @@ class WidthVisitor final : public VNVisitor {
 
     void assertAtStatement(AstNode* nodep) {
         if (VL_UNCOVERABLE(m_vup && !m_vup->selfDtm())) {
-            UINFO(1, "-: " << m_vup << endl);
+            UINFO(1, "-: " << m_vup);
             nodep->v3fatalSrc("No dtype expected at statement " << nodep->prettyTypeName());
         }
     }
@@ -8377,7 +8376,7 @@ public:
 // Width class functions
 
 void V3Width::width(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     {
         // We should do it in bottom-up module order, but it works in any order.
         const WidthClearVisitor cvisitor{nodep};
@@ -8391,7 +8390,7 @@ void V3Width::width(AstNetlist* nodep) {
 //! Single node parameter propagation
 //! Smaller step... Only do a single node for parameter propagation
 AstNode* V3Width::widthParamsEdit(AstNode* nodep) {
-    UINFO(4, __FUNCTION__ << ": " << nodep << endl);
+    UINFO(4, __FUNCTION__ << ": " << nodep);
     // We should do it in bottom-up module order, but it works in any order.
     WidthVisitor visitor{true, false};
     nodep = visitor.mainAcceptEdit(nodep);
@@ -8410,7 +8409,7 @@ AstNode* V3Width::widthParamsEdit(AstNode* nodep) {
 //! @return  Pointer to the edited node.
 AstNode* V3Width::widthGenerateParamsEdit(
     AstNode* nodep) {  //!< [in] AST whose parameters widths are to be analyzed.
-    UINFO(4, __FUNCTION__ << ": " << nodep << endl);
+    UINFO(4, __FUNCTION__ << ": " << nodep);
     // We should do it in bottom-up module order, but it works in any order.
     WidthVisitor visitor{true, true};
     nodep = visitor.mainAcceptEdit(nodep);
diff --git a/src/V3WidthCommit.cpp b/src/V3WidthCommit.cpp
index 4b9bbeb12..53e2e152f 100644
--- a/src/V3WidthCommit.cpp
+++ b/src/V3WidthCommit.cpp
@@ -65,7 +65,7 @@ private:
         if (AstBasicDType* const bdtypep = VN_CAST(nodep, BasicDType)) {
             AstBasicDType* const newp = nodep->findInsertSameDType(bdtypep);
             if (newp != bdtypep && debug() >= 9) {
-                UINFO(9, "dtype replacement ");
+                UINFO_PREFIX("dtype replacement ");
                 nodep->dumpSmall(std::cout);
                 std::cout << "  ---->  ";
                 newp->dumpSmall(std::cout);
@@ -112,8 +112,8 @@ private:
                 how = "'protected'";
             }
             if (how) {
-                UINFO(9, "refclass " << refClassp << endl);
-                UINFO(9, "defclass " << defClassp << endl);
+                UINFO(9, "refclass " << refClassp);
+                UINFO(9, "defclass " << defClassp);
                 nodep->v3warn(ENCAPSULATED, nodep->prettyNameQ()
                                                 << " is hidden as " << how
                                                 << " within this context (IEEE 1800-2023 8.18)\n"
@@ -170,7 +170,7 @@ private:
     void visit(AstCastWrap* nodep) override {
         iterateChildren(nodep);
         editDType(nodep);
-        UINFO(6, " Replace " << nodep << " w/ " << nodep->lhsp() << endl);
+        UINFO(6, " Replace " << nodep << " w/ " << nodep->lhsp());
         nodep->replaceWith(nodep->lhsp()->unlinkFrBack());
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -326,7 +326,7 @@ public:
 // V3WidthCommit class functions
 
 void V3WidthCommit::widthCommit(AstNetlist* nodep) {
-    UINFO(2, __FUNCTION__ << ": " << endl);
+    UINFO(2, __FUNCTION__ << ":");
     { WidthCommitVisitor{nodep}; }  // Destruct before checking
     V3Global::dumpCheckGlobalTree("widthcommit", 0, dumpTreeEitherLevel() >= 6);
 }
diff --git a/src/V3WidthRemove.h b/src/V3WidthRemove.h
index beaafdf04..b50bffdc4 100644
--- a/src/V3WidthRemove.h
+++ b/src/V3WidthRemove.h
@@ -36,7 +36,7 @@ class WidthRemoveVisitor final : public VNVisitor {
     VL_DEFINE_DEBUG_FUNCTIONS;
 
     void replaceWithSignedVersion(AstNode* nodep, AstNode* newp) {
-        UINFO(6, " Replace " << nodep << " w/ " << newp << endl);
+        UINFO(6, " Replace " << nodep << " w/ " << newp);
         nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index fbed8af3a..38fbd3b25 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -69,7 +69,7 @@ class WidthSelVisitor final : public VNVisitor {
     };
     static FromData fromDataForArray(AstNode* nodep, AstNode* basefromp) {
         // What is the data type and information for this SEL-ish's from()?
-        UINFO(9, "  fromData start ddtypep = " << basefromp << endl);
+        UINFO(9, "  fromData start ddtypep = " << basefromp);
         VNumRange fromRange;  // constructs to isRanged(false)
         while (basefromp) {
             if (VN_IS(basefromp, AttrOf)) {
@@ -81,7 +81,7 @@ class WidthSelVisitor final : public VNVisitor {
         UASSERT_OBJ(basefromp && basefromp->dtypep(), nodep, "Select with no from dtype");
         AstNodeDType* const ddtypep = basefromp->dtypep()->skipRefp();
         AstNodeDType* const errp = ddtypep;
-        UINFO(9, "  fromData.ddtypep = " << ddtypep << endl);
+        UINFO(9, "  fromData.ddtypep = " << ddtypep);
         if (const AstNodeArrayDType* const adtypep = VN_CAST(ddtypep, NodeArrayDType)) {
             fromRange = adtypep->declRange();
         } else if (VN_IS(ddtypep, AssocArrayDType)) {
@@ -226,7 +226,7 @@ class WidthSelVisitor final : public VNVisitor {
     void visit(AstSelBit* nodep) override {
         // Select of a non-width specified part of an array, i.e. "array[2]"
         // This select style has a lsb and msb (no user specified width)
-        UINFO(6, "SELBIT " << nodep << endl);
+        UINFO(6, "SELBIT " << nodep);
         if (debug() >= 9) nodep->backp()->dumpTree("-  SELBT0: ");
         // lhsp/rhsp do not need to be constant
         AstNodeExpr* const fromp = nodep->fromp()->unlinkFrBack();
@@ -235,7 +235,7 @@ class WidthSelVisitor final : public VNVisitor {
         const FromData fromdata = fromDataForArray(nodep, fromp);
         AstNodeDType* const ddtypep = fromdata.m_dtypep;
         const VNumRange fromRange = fromdata.m_fromRange;
-        UINFO(6, "  ddtypep " << ddtypep << endl);
+        UINFO(6, "  ddtypep " << ddtypep);
         if (const AstUnpackArrayDType* const adtypep = VN_CAST(ddtypep, UnpackArrayDType)) {
             // SELBIT(array, index) -> ARRAYSEL(array, index)
             AstNodeExpr* subp = rhsp;
@@ -327,7 +327,7 @@ class WidthSelVisitor final : public VNVisitor {
             } else {
                 newp = new AstGetcRefN{nodep->fileline(), fromp, rhsp};
             }
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         } else if (VN_IS(ddtypep, BasicDType)) {
@@ -337,7 +337,7 @@ class WidthSelVisitor final : public VNVisitor {
                              // Unsized so width from user
                              new AstConst{nodep->fileline(), AstConst::Unsized32{}, 1}};
             newp->declRange(fromRange);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             if (debug() >= 9) newp->dumpTree("-  SELBTn: ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -348,7 +348,7 @@ class WidthSelVisitor final : public VNVisitor {
                              // Unsized so width from user
                              new AstConst{nodep->fileline(), AstConst::Unsized32{}, 1}};
             newp->declRange(fromRange);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             if (debug() >= 9) newp->dumpTree("-  SELBTn: ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -365,7 +365,7 @@ class WidthSelVisitor final : public VNVisitor {
         // Select of a range specified part of an array, i.e. "array[2:3]"
         // SELEXTRACT(from,msb,lsb) -> SEL(from, lsb, 1+msb-lsb)
         // This select style has a (msb or lsb) and width
-        UINFO(6, "SELEXTRACT " << nodep << endl);
+        UINFO(6, "SELEXTRACT " << nodep);
         // if (debug() >= 9) nodep->dumpTree("-  SELEX0: ");
         // Below 2 lines may change nodep->widthp()
         V3Const::constifyParamsNoWarnEdit(nodep->leftp());  // May relink pointed to node
@@ -393,7 +393,7 @@ class WidthSelVisitor final : public VNVisitor {
             newp->dtypep(ddtypep);
             newp->didWidth(true);
             newp->protect(false);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
             return;
@@ -483,7 +483,7 @@ class WidthSelVisitor final : public VNVisitor {
             AstSel* const newp
                 = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange), widthp};
             newp->declRange(fromRange);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             // if (debug() >= 9) newp->dumpTree("-  SELEXnew: ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -505,14 +505,14 @@ class WidthSelVisitor final : public VNVisitor {
             AstSel* const newp
                 = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange), widthp};
             newp->declRange(fromRange);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             // if (debug() >= 9) newp->dumpTree("-  SELEXnew: ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         } else {  // nullptr=bad extract, or unknown node type
             nodep->v3error("Illegal range select; type already selected, or bad dimension: "
                            << "data type is " << fromdata.m_errp->prettyDTypeNameQ());
-            UINFO(1, "    Related ddtype: " << ddtypep << endl);
+            UINFO(1, "    Related ddtype: " << ddtypep);
             // How to recover?  We'll strip a dimension.
             nodep->replaceWith(fromp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -526,7 +526,7 @@ class WidthSelVisitor final : public VNVisitor {
     void replaceSelPlusMinus(AstNodePreSel* nodep) {
         // Select of a range specified with +: or -:, i.e. "array[2+:3], [2-:3]"
         // This select style has a lsb and width
-        UINFO(6, "SELPLUS/MINUS " << nodep << endl);
+        UINFO(6, "SELPLUS/MINUS " << nodep);
         // Below 2 lines may change nodep->widthp()
         if (debug() >= 9) nodep->dumpTree("-  SELPM0: ");
         V3Width::widthParamsEdit(nodep->rhsp());  // constifyEdit doesn't ensure widths finished
@@ -611,7 +611,7 @@ class WidthSelVisitor final : public VNVisitor {
             AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, newwidthp};
             newp->declRange(fromRange);
             newp->declElWidth(elwidth);
-            UINFO(6, "   new " << newp << endl);
+            UINFO(6, "   new " << newp);
             if (debug() >= 9) newp->dumpTree("-  SELNEW: ");
             nodep->replaceWith(newp);
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
@@ -649,7 +649,7 @@ public:
 // Width class functions
 
 AstNode* V3Width::widthSelNoIterEdit(AstNode* nodep) {
-    UINFO(4, __FUNCTION__ << ": " << nodep << endl);
+    UINFO(4, __FUNCTION__ << ": " << nodep);
     WidthSelVisitor visitor;
     nodep = visitor.mainAcceptEdit(nodep);
     return nodep;
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 5f25e88fa..1add95bdd 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -648,7 +648,7 @@ static void process() {
 }
 
 static void verilate(const string& argString) {
-    UINFO(1, "Option --verilate: Start Verilation\n");
+    UINFO(1, "Option --verilate: Start Verilation");
 
     // Can we skip doing everything if times are ok?
     V3File::addSrcDepend(v3Global.opt.buildDepBin());
@@ -656,7 +656,7 @@ static void verilate(const string& argString) {
         && V3File::checkTimes(v3Global.opt.hierTopDataDir() + "/" + v3Global.opt.prefix()
                                   + "__verFiles.dat",
                               argString)) {
-        UINFO(1, "--skip-identical: No change to any source files, exiting\n");
+        UINFO(1, "--skip-identical: No change to any source files, exiting");
         return;
     }
     // Undocumented debugging - cannot be a switch as then command line
@@ -696,7 +696,7 @@ static void verilate(const string& argString) {
         V3PreShell::selfTest();
         V3Broken::selfTest();
         V3ThreadPool::selfTest();
-        UINFO(2, "selfTest done\n");
+        UINFO(2, "selfTest done");
     }
 
     // Read first filename
@@ -792,7 +792,7 @@ static void execBuildJob() {
     UASSERT(v3Global.opt.gmake(), "--build requires GNU Make.");
     UASSERT(!v3Global.opt.cmake(), "--build cannot use CMake.");
     VlOs::DeltaWallTime buildWallTime{true};
-    UINFO(1, "Start Build\n");
+    UINFO(1, "Start Build");
 
     const string cmdStr = buildMakeCmd(v3Global.opt.prefix() + ".mk", "");
     V3Os::filesystemFlushBuildDir(v3Global.opt.hierTopDataDir());
@@ -852,7 +852,7 @@ int main(int argc, char** argv) {
     if (v3Global.opt.verilate()) {
         verilate(argString);
     } else {
-        UINFO(1, "Option --no-verilate: Skip Verilation\n");
+        UINFO(1, "Option --no-verilate: Skip Verilation");
     }
 
     if (v3Global.hierPlanp() && v3Global.opt.gmake()) {
@@ -874,5 +874,5 @@ int main(int argc, char** argv) {
         V3Stats::summaryReport();
     }
 
-    UINFO(1, "Done, Exiting...\n");
+    UINFO(1, "Done, Exiting...");
 }
diff --git a/src/VlcBucket.h b/src/VlcBucket.h
index 203d86290..ba4bc92ec 100644
--- a/src/VlcBucket.h
+++ b/src/VlcBucket.h
@@ -42,7 +42,7 @@ class VlcBuckets final {
         const uint64_t oldsize = m_dataSize;
         if (m_dataSize < point) m_dataSize = (point + 64) & ~63ULL;  // Keep power of two
         m_dataSize *= 2;
-        // UINFO(9, "Realloc "<<allocSize()<<" for "<<point<<"  "<<cvtToHex(m_datap)<<endl);
+        // UINFO(9, "Realloc " << allocSize() << " for " << point << "  " << cvtToHex(m_datap));
         uint64_t* const newp = static_cast<uint64_t*>(std::realloc(m_datap, allocSize()));
         if (VL_UNCOVERABLE(!newp)) {
             // cppcheck-suppress doubleFree  // cppcheck 1.90 bug - realloc doesn't free on fail
@@ -68,7 +68,7 @@ public:
     // METHODS
     void addData(uint64_t point, uint64_t hits) {
         if (hits >= sufficient()) {
-            // UINFO(9,"     addData "<<point<<" "<<hits<<" size="<<m_dataSize<<endl);
+            // UINFO(9, "     addData " << point << " " << hits << " size=" << m_dataSize);
             if (point >= m_dataSize) allocate(point);
             m_datap[point / 64] |= covBit(point);
             m_bucketsCovered++;
diff --git a/src/VlcMain.cpp b/src/VlcMain.cpp
index 328359b25..56916b5b7 100644
--- a/src/VlcMain.cpp
+++ b/src/VlcMain.cpp
@@ -87,7 +87,7 @@ void VlcOptions::parseOptsList(int argc, char** argv) {
     // Note argc and argv DO NOT INCLUDE the filename in [0]!!!
     // May be called recursively when there are -f files.
     for (int i = 0; i < argc;) {
-        UINFO(9, " Option: " << argv[i] << endl);
+        UINFO(9, " Option: " << argv[i]);
         if (argv[i][0] == '-') {
             if (const int consumed = parser.parse(i, argc, argv)) {
                 i += consumed;
@@ -161,7 +161,7 @@ int main(int argc, char** argv) {
     // Final writing shouldn't throw warnings, but...
     V3Error::abortIfWarnings();
 
-    UINFO(1, "Done, Exiting...\n");
+    UINFO(1, "Done, Exiting...");
 }
 
 // Local Variables:
diff --git a/src/VlcPoint.h b/src/VlcPoint.h
index f26d10dde..30b97e834 100644
--- a/src/VlcPoint.h
+++ b/src/VlcPoint.h
@@ -138,7 +138,7 @@ public:
 
     // METHODS
     void dump() {
-        UINFO(2, "dumpPoints...\n");
+        UINFO(2, "dumpPoints...");
         VlcPoint::dumpHeader(std::cout);
         for (const auto& i : *this) {
             const VlcPoint& point = pointNumber(i.second);
diff --git a/src/VlcTest.h b/src/VlcTest.h
index 32de7d662..d8c9c751c 100644
--- a/src/VlcTest.h
+++ b/src/VlcTest.h
@@ -109,7 +109,7 @@ public:
 
     // METHODS
     void dump(bool bucketsToo) {
-        UINFO(2, "dumpTests...\n");
+        UINFO(2, "dumpTests...");
         VlcTest::dumpHeader();
         for (const auto& testp : m_tests) testp->dump(bucketsToo);
     }
diff --git a/src/VlcTop.cpp b/src/VlcTop.cpp
index c4930f349..8294bdeb9 100644
--- a/src/VlcTop.cpp
+++ b/src/VlcTop.cpp
@@ -31,7 +31,7 @@
 //######################################################################
 
 void VlcTop::readCoverage(const string& filename, bool nonfatal) {
-    UINFO(2, "readCoverage " << filename << endl);
+    UINFO(2, "readCoverage " << filename);
 
     std::ifstream is{filename.c_str()};
     if (!is) {
@@ -44,7 +44,7 @@ void VlcTop::readCoverage(const string& filename, bool nonfatal) {
 
     while (!is.eof()) {
         const string line = V3Os::getline(is);
-        // UINFO(9," got "<<line<<endl);
+        // UINFO(9, " got " << line);
         if (line[0] == 'C') {
             string::size_type secspace = 3;
             for (; secspace < line.length(); secspace++) {
@@ -54,7 +54,7 @@ void VlcTop::readCoverage(const string& filename, bool nonfatal) {
             if (!opt.isTypeMatch(point.c_str())) continue;
 
             const uint64_t hits = std::atoll(line.c_str() + secspace + 1);
-            // UINFO(9,"   point '"<<point<<"'"<<" "<<hits<<endl);
+            // UINFO(9, "   point '" << point << "'" << " " << hits);
 
             const uint64_t pointnum = points().findAddPoint(point, hits);
             if (opt.rank()) {  // Only if ranking - uses a lot of memory
@@ -68,7 +68,7 @@ void VlcTop::readCoverage(const string& filename, bool nonfatal) {
 }
 
 void VlcTop::writeCoverage(const string& filename) {
-    UINFO(2, "writeCoverage " << filename << endl);
+    UINFO(2, "writeCoverage " << filename);
 
     std::ofstream os{filename.c_str()};
     if (!os) {
@@ -84,7 +84,7 @@ void VlcTop::writeCoverage(const string& filename) {
 }
 
 void VlcTop::writeInfo(const string& filename) {
-    UINFO(2, "writeInfo " << filename << endl);
+    UINFO(2, "writeInfo " << filename);
 
     std::ofstream os{filename.c_str()};
     if (!os) {
@@ -156,7 +156,7 @@ struct CmpComputrons final {
 };
 
 void VlcTop::rank() {
-    UINFO(2, "rank...\n");
+    UINFO(2, "rank...");
     uint64_t nextrank = 1;
 
     // Sort by computrons, so fast tests get selected first
@@ -180,8 +180,8 @@ void VlcTop::rank() {
     // then hierarchically solve a small subset of tests, and take resulting
     // solution and move up to larger subset of tests.  (Aka quick sort.)
     while (true) {
-        if (debug()) {
-            UINFO(9, "Left on iter" << nextrank << ": ");  // LCOV_EXCL_LINE
+        if (debug() >= 9) {
+            UINFO_PREFIX("Left on iter" << nextrank << ": ");  // LCOV_EXCL_LINE
             remaining.dump();  // LCOV_EXCL_LINE
         }
         VlcTest* bestTestp = nullptr;
@@ -216,7 +216,7 @@ void VlcTop::annotateCalc() {
         if (!filename.empty() && lineno != 0) {
             VlcSource& source = sources().findNewSource(filename);
             UINFO(9, "AnnoCalc count " << filename << ":" << lineno << ":" << point.column() << " "
-                                       << point.count() << " " << point.linescov() << '\n');
+                                       << point.count() << " " << point.linescov());
             // Base coverage
             source.insertPoint(lineno, &point);
             // Additional lines covered by this statement
@@ -254,12 +254,12 @@ void VlcTop::annotateCalcNeeded() {
     int totOk = 0;
     for (auto& si : m_sources) {
         VlcSource& source = si.second;
-        // UINFO(1,"Source "<<source.name()<<endl);
+        // UINFO(1, "Source " << source.name());
         if (opt.annotateAll()) source.needed(true);
         VlcSource::LinenoMap& lines = source.lines();
         for (auto& li : lines) {
             VlcSourceCount& sc = li.second;
-            // UINFO(0, "Source "<<source.name()<<":"<<sc.lineno()<<":"<<sc.column()<<endl);
+            // UINFO(0, "Source " << source.name() << ":" << sc.lineno() << ":" << sc.column());
             ++totCases;
             if (opt.countOk(sc.minCount())) {
                 ++totOk;
@@ -283,7 +283,7 @@ void VlcTop::annotateOutputFiles(const string& dirname) {
         const string filename = source.name();
         const string outfilename = dirname + "/" + V3Os::filenameNonDir(filename);
 
-        UINFO(1, "annotateOutputFile " << filename << " -> " << outfilename << endl);
+        UINFO(1, "annotateOutputFile " << filename << " -> " << outfilename);
 
         std::ifstream is{filename.c_str()};
         if (!is) {
@@ -310,8 +310,8 @@ void VlcTop::annotateOutputFiles(const string& dirname) {
                 os << "        " << line << '\n';
             } else {
                 VlcSourceCount& sc = lit->second;
-                // UINFO(0,"Source
-                // "<<source.name()<<":"<<sc.lineno()<<":"<<sc.column()<<endl);
+                // UINFO(0, "Source " << source.name() << ":" << sc.lineno() << ":" <<
+                // sc.column());
                 const bool minOk = opt.countOk(sc.minCount());
                 const bool maxOk = opt.countOk(sc.maxCount());
                 if (minOk) {
diff --git a/src/astgen b/src/astgen
index c7f98404f..41f311f2d 100755
--- a/src/astgen
+++ b/src/astgen
@@ -451,7 +451,7 @@ class Cpt:
                 self.print("\t// " + typefunc['comment'] + "\n")
                 self.print("\tif (" + typefunc['match_if'] + ") {\n")
                 self.print("\t    UINFO(" + str(typefunc['uinfo_level']) + ", cvtToHex(nodep)" +
-                           " << \" " + typefunc['uinfo'] + "\\n\");\n")
+                           " << \" " + typefunc['uinfo'] + "\");\n")
                 self.print("\t    " + typefunc['exec_func'] + "\n")
                 self.print("\t    return true;\n")
                 self.print("\t}\n")

From 7c427d4cc3774bdba2ef66f71442043680d25881 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 22 May 2025 21:32:34 -0400
Subject: [PATCH 101/211] Sort compile options to force ccache miss

---
 configure.ac | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/configure.ac b/configure.ac
index 7ea13e2cd..e4f53b20b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -432,10 +432,10 @@ AC_SUBST(HAVE_COROUTINES)
 
 # Flags for compiling Verilator internals including parser always
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Qunused-arguments)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
+_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Xclang -fno-pch-timestamp)
 _MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-faligned-new)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-unused-parameter)
-_MY_CXX_CHECK_OPT(CFG_CXXFLAGS_SRC,-Wno-shadow)
 AC_SUBST(CFG_CXXFLAGS_SRC)
 
 # Flags for compiling Verilator parser always (in addition to above CFG_CXXFLAGS_SRC)

From 90d4cf1361e86bebabc4a5c181d56bd3e73d2908 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 23 May 2025 23:38:34 +0200
Subject: [PATCH 102/211] Internals: V3Coverage cleanup. No functional change.
 (#6033)

---
 src/V3Coverage.cpp | 67 +++++++++++++++++++++++-----------------------
 1 file changed, 33 insertions(+), 34 deletions(-)

diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 0ae403193..0ee911e69 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -386,7 +386,7 @@ class CoverageVisitor final : public VNVisitor {
 
                 ToggleEnt newvec{""s, new AstVarRef{fl_nowarn, nodep, VAccess::READ},
                                  new AstVarRef{fl_nowarn, chgVarp, VAccess::WRITE}};
-                toggleVarRecurse(nodep->dtypeSkipRefp(), 0, newvec, nodep, chgVarp);
+                toggleVarRecurse(nodep->dtypeSkipRefp(), 0, newvec, nodep);
                 newvec.cleanup();
             }
         }
@@ -399,22 +399,22 @@ class CoverageVisitor final : public VNVisitor {
             varp->fileline(),
             newCoverInc(varp->fileline(), "", "v_toggle",
                         hierPrefix + varp->name() + above.m_comment, "", 0, ""),
-            above.m_varRefp->cloneTree(true), above.m_chgRefp->cloneTree(true)};
+            above.m_varRefp->cloneTree(false), above.m_chgRefp->cloneTree(false)};
         m_modp->addStmtsp(newp);
     }
 
-    void toggleVarRecurse(AstNodeDType* dtypep, int depth,  // per-iteration
-                          const ToggleEnt& above, AstVar* varp, AstVar* chgVarp) {  // Constant
+    void toggleVarRecurse(const AstNodeDType* const dtypep, const int depth,  // per-iteration
+                          const ToggleEnt& above, const AstVar* const varp) {  // Constant
         if (const AstBasicDType* const bdtypep = VN_CAST(dtypep, BasicDType)) {
             if (bdtypep->isRanged()) {
                 for (int index_docs = bdtypep->lo(); index_docs < bdtypep->hi() + 1;
                      ++index_docs) {
                     const int index_code = index_docs - bdtypep->lo();
                     ToggleEnt newent{above.m_comment + "["s + cvtToStr(index_docs) + "]",
-                                     new AstSel{varp->fileline(), above.m_varRefp->cloneTree(true),
-                                                index_code, 1},
-                                     new AstSel{varp->fileline(), above.m_chgRefp->cloneTree(true),
-                                                index_code, 1}};
+                                     new AstSel{varp->fileline(),
+                                                above.m_varRefp->cloneTree(false), index_code, 1},
+                                     new AstSel{varp->fileline(),
+                                                above.m_chgRefp->cloneTree(false), index_code, 1}};
                     toggleVarBottom(newent, varp);
                     newent.cleanup();
                 }
@@ -426,11 +426,10 @@ class CoverageVisitor final : public VNVisitor {
                 const int index_code = index_docs - adtypep->lo();
                 ToggleEnt newent{above.m_comment + "["s + cvtToStr(index_docs) + "]",
                                  new AstArraySel{varp->fileline(),
-                                                 above.m_varRefp->cloneTree(true), index_code},
+                                                 above.m_varRefp->cloneTree(false), index_code},
                                  new AstArraySel{varp->fileline(),
-                                                 above.m_chgRefp->cloneTree(true), index_code}};
-                toggleVarRecurse(adtypep->subDTypep()->skipRefp(), depth + 1, newent, varp,
-                                 chgVarp);
+                                                 above.m_chgRefp->cloneTree(false), index_code}};
+                toggleVarRecurse(adtypep->subDTypep()->skipRefp(), depth + 1, newent, varp);
                 newent.cleanup();
             }
         } else if (const AstPackArrayDType* const adtypep = VN_CAST(dtypep, PackArrayDType)) {
@@ -438,12 +437,11 @@ class CoverageVisitor final : public VNVisitor {
                 const AstNodeDType* const subtypep = adtypep->subDTypep()->skipRefp();
                 const int index_code = index_docs - adtypep->lo();
                 ToggleEnt newent{above.m_comment + "["s + cvtToStr(index_docs) + "]",
-                                 new AstSel{varp->fileline(), above.m_varRefp->cloneTree(true),
+                                 new AstSel{varp->fileline(), above.m_varRefp->cloneTree(false),
                                             index_code * subtypep->width(), subtypep->width()},
-                                 new AstSel{varp->fileline(), above.m_chgRefp->cloneTree(true),
+                                 new AstSel{varp->fileline(), above.m_chgRefp->cloneTree(false),
                                             index_code * subtypep->width(), subtypep->width()}};
-                toggleVarRecurse(adtypep->subDTypep()->skipRefp(), depth + 1, newent, varp,
-                                 chgVarp);
+                toggleVarRecurse(adtypep->subDTypep()->skipRefp(), depth + 1, newent, varp);
                 newent.cleanup();
             }
         } else if (const AstStructDType* const adtypep = VN_CAST(dtypep, StructDType)) {
@@ -452,12 +450,13 @@ class CoverageVisitor final : public VNVisitor {
                      itemp = VN_AS(itemp->nextp(), MemberDType)) {
                     AstNodeDType* const subtypep = itemp->subDTypep()->skipRefp();
                     const int index_code = itemp->lsb();
-                    ToggleEnt newent{above.m_comment + "."s + itemp->name(),
-                                     new AstSel{varp->fileline(), above.m_varRefp->cloneTree(true),
-                                                index_code, subtypep->width()},
-                                     new AstSel{varp->fileline(), above.m_chgRefp->cloneTree(true),
-                                                index_code, subtypep->width()}};
-                    toggleVarRecurse(subtypep, depth + 1, newent, varp, chgVarp);
+                    ToggleEnt newent{
+                        above.m_comment + "."s + itemp->name(),
+                        new AstSel{varp->fileline(), above.m_varRefp->cloneTree(false), index_code,
+                                   subtypep->width()},
+                        new AstSel{varp->fileline(), above.m_chgRefp->cloneTree(false), index_code,
+                                   subtypep->width()}};
+                    toggleVarRecurse(subtypep, depth + 1, newent, varp);
                     newent.cleanup();
                 }
             } else {
@@ -465,13 +464,13 @@ class CoverageVisitor final : public VNVisitor {
                      itemp = VN_AS(itemp->nextp(), MemberDType)) {
                     AstNodeDType* const subtypep = itemp->subDTypep()->skipRefp();
                     AstNodeExpr* const varRefp = new AstStructSel{
-                        varp->fileline(), above.m_varRefp->cloneTree(true), itemp->name()};
+                        varp->fileline(), above.m_varRefp->cloneTree(false), itemp->name()};
                     AstNodeExpr* const chgRefp = new AstStructSel{
-                        varp->fileline(), above.m_chgRefp->cloneTree(true), itemp->name()};
+                        varp->fileline(), above.m_chgRefp->cloneTree(false), itemp->name()};
                     varRefp->dtypep(subtypep);
                     chgRefp->dtypep(subtypep);
                     ToggleEnt newent{above.m_comment + "."s + itemp->name(), varRefp, chgRefp};
-                    toggleVarRecurse(subtypep, depth + 1, newent, varp, chgVarp);
+                    toggleVarRecurse(subtypep, depth + 1, newent, varp);
                     newent.cleanup();
                 }
             }
@@ -481,19 +480,19 @@ class CoverageVisitor final : public VNVisitor {
                 AstNodeDType* const subtypep = itemp->subDTypep()->skipRefp();
                 if (adtypep->packed()) {
                     ToggleEnt newent{above.m_comment + "."s + itemp->name(),
-                                     above.m_varRefp->cloneTree(true),
-                                     above.m_chgRefp->cloneTree(true)};
-                    toggleVarRecurse(subtypep, depth + 1, newent, varp, chgVarp);
+                                     above.m_varRefp->cloneTree(false),
+                                     above.m_chgRefp->cloneTree(false)};
+                    toggleVarRecurse(subtypep, depth + 1, newent, varp);
                     newent.cleanup();
                 } else {
                     AstNodeExpr* const varRefp = new AstStructSel{
-                        varp->fileline(), above.m_varRefp->cloneTree(true), itemp->name()};
+                        varp->fileline(), above.m_varRefp->cloneTree(false), itemp->name()};
                     AstNodeExpr* const chgRefp = new AstStructSel{
-                        varp->fileline(), above.m_chgRefp->cloneTree(true), itemp->name()};
+                        varp->fileline(), above.m_chgRefp->cloneTree(false), itemp->name()};
                     varRefp->dtypep(subtypep);
                     chgRefp->dtypep(subtypep);
                     ToggleEnt newent{above.m_comment + "."s + itemp->name(), varRefp, chgRefp};
-                    toggleVarRecurse(subtypep, depth + 1, newent, varp, chgVarp);
+                    toggleVarRecurse(subtypep, depth + 1, newent, varp);
                     newent.cleanup();
                 }
             }
@@ -734,7 +733,7 @@ class CoverageVisitor final : public VNVisitor {
             for (CoverTerm& term : expr) {
                 comment += (first ? "" : " && ") + term.m_emitV
                            + "==" + (term.m_objective ? "1" : "0");
-                AstNodeExpr* const clonep = term.m_exprp->cloneTree(true);
+                AstNodeExpr* const clonep = term.m_exprp->cloneTree(false);
                 AstNodeExpr* const termp = term.m_objective ? clonep : new AstLogNot{fl, clonep};
                 if (condp) {
                     condp = new AstLogAnd{fl, condp, termp};
@@ -932,11 +931,11 @@ class CoverageVisitor final : public VNVisitor {
             const int width = lhsp->dtypep()->width();
             const size_t expected = std::is_same<T_Oper, AstXor>::value ? 0x1 << width : width + 1;
             if (checkMaxExprs(expected)) return;
-            AstNodeExpr* unrolledp = new AstSel{fl, lhsp->cloneTree(true),
+            AstNodeExpr* unrolledp = new AstSel{fl, lhsp->cloneTree(false),
                                                 new AstConst{fl, static_cast<uint32_t>(width - 1)},
                                                 new AstConst{fl, 1}};
             for (int bit = width - 2; bit >= 0; bit--) {
-                AstSel* const selp = new AstSel{fl, lhsp->cloneTree(true),
+                AstSel* const selp = new AstSel{fl, lhsp->cloneTree(false),
                                                 new AstConst{fl, static_cast<uint32_t>(bit)},
                                                 new AstConst{fl, 1}};
                 unrolledp = new T_Oper{fl, selp, unrolledp};

From 22d484d54df8f925871677f827c736c98353ed54 Mon Sep 17 00:00:00 2001
From: Petr Nohavica <petr.nohavica@gmail.com>
Date: Sat, 24 May 2025 23:59:23 +0200
Subject: [PATCH 103/211] Fix associative arrays with enum keys (#6034) (#6035)

---
 docs/CONTRIBUTORS              |  1 +
 src/V3Width.cpp                |  7 +++++-
 test_regress/t/t_assoc_enum.py | 18 ++++++++++++++
 test_regress/t/t_assoc_enum.v  | 44 ++++++++++++++++++++++++++++++++++
 4 files changed, 69 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_assoc_enum.py
 create mode 100644 test_regress/t/t_assoc_enum.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 02759c300..9a50ac9bb 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -183,6 +183,7 @@ Pengcheng Xu
 Peter Debacker
 Peter Horvath
 Peter Monsson
+Petr Nohavica
 Philip Axer
 Philipp Wagner
 Pierre-Henri Horrein
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index acc3b0647..1b23f494a 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4802,7 +4802,12 @@ class WidthVisitor final : public VNVisitor {
              patp = VN_AS(patp->nextp(), PatMember)) {
             patp->dtypep(arrayDtp->subDTypep());
             AstNodeExpr* const valuep = patternMemberValueIterate(patp);
-            AstNode* keyp = patp->keyp();
+            AstNode* keyp;
+            if (patp->varrefp()) {
+                keyp = patp->varrefp();
+            } else {
+                keyp = patp->keyp();
+            }
             if (!keyp) {
                 patp->v3error("Missing pattern key (need an expression then a ':')");
                 keyp = new AstConst{nodep->fileline(), AstConst::Signed32{}, 0};
diff --git a/test_regress/t/t_assoc_enum.py b/test_regress/t/t_assoc_enum.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_assoc_enum.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_assoc_enum.v b/test_regress/t/t_assoc_enum.v
new file mode 100644
index 000000000..485e3205f
--- /dev/null
+++ b/test_regress/t/t_assoc_enum.v
@@ -0,0 +1,44 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0x exp=%0x (%s !== %s)\n", `__FILE__,`__LINE__, (gotv), (expv), `"gotv`", `"expv`"); `stop; end while(0);
+`define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+class X;
+   typedef enum int {
+        INITIAL, RUNNING, SUSPENDED, COMPLETING, DONE
+   } state_t;
+
+   static string state_names[state_t] = '{
+        INITIAL:    "INITIAL",
+        RUNNING:    "RUNNING",
+        SUSPENDED:  "SUSPENDED",
+        COMPLETING: "COMPLETING",
+        DONE:       "DONE"
+   };
+   protected state_t state;
+
+   function new();
+      this.state = INITIAL;
+      `checks(state_names[this.state], "INITIAL");
+      this.state = RUNNING;
+      `checks(state_names[this.state], "RUNNING");
+   endfunction
+
+endclass
+
+module t;/*AUTOARG*/
+
+
+initial begin
+   X x = new;
+   $finish;
+end
+
+
+
+endmodule

From c9fa54536e7f8d58dd94c5f4d5b92b1e82a5f3b1 Mon Sep 17 00:00:00 2001
From: Paul Swirhun <63216497+paul-demo@users.noreply.github.com>
Date: Mon, 26 May 2025 05:58:20 -0700
Subject: [PATCH 104/211] Tests: Fix MacOS test driver when child process
 finishes (#6032) (#6038)

os.read(fd, 1) returns b'' on MacOS when the
child process exits, whereas it must be throwing an OSError
on other platforms.
---
 test_regress/driver.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/test_regress/driver.py b/test_regress/driver.py
index cd49c6d8f..fd766c7b3 100755
--- a/test_regress/driver.py
+++ b/test_regress/driver.py
@@ -1734,6 +1734,9 @@ class VlTest:
                     try:
                         data = os.read(fd, 1)
                         self._run_output(data, logfh, tee)
+                        # Parent detects child termination by checking for b''
+                        if not data:
+                            break
                     except OSError:
                         break
 

From 9cc4cc0efd137a9e7d627428f7cdf32183f918d0 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bachm44@gmail.com>
Date: Mon, 26 May 2025 15:37:35 +0200
Subject: [PATCH 105/211] Add `--hierarchical-threads` (#6037)

---
 bin/verilator                                 |   1 +
 docs/guide/exe_verilator.rst                  |  10 +
 src/V3EmitCModel.cpp                          |   5 +-
 src/V3ExecGraph.cpp                           |  21 +-
 src/V3Options.cpp                             |   4 +
 src/V3Options.h                               |   2 +
 .../t/t_flag_hierarchical_threads_bad.out     |   2 +
 .../t/t_flag_hierarchical_threads_bad.py      |  18 ++
 test_regress/t/t_hier_block_chained.py        |  42 ++++
 test_regress/t/t_hier_block_chained.v         | 212 ++++++++++++++++++
 test_regress/t/t_hier_block_chained.vlt       |  14 ++
 test_regress/t/t_hier_block_perf.py           |  16 +-
 12 files changed, 331 insertions(+), 16 deletions(-)
 create mode 100644 test_regress/t/t_flag_hierarchical_threads_bad.out
 create mode 100755 test_regress/t/t_flag_hierarchical_threads_bad.py
 create mode 100755 test_regress/t/t_hier_block_chained.py
 create mode 100644 test_regress/t/t_hier_block_chained.v
 create mode 100644 test_regress/t/t_hier_block_chained.vlt

diff --git a/bin/verilator b/bin/verilator
index 5ec9a5ef0..3ab656be9 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -383,6 +383,7 @@ detailed descriptions of these arguments.
     --help                      Show this help
     --hierarchical              Enable hierarchical Verilation
     --hierarchical-params-file <name> Internal option that specifies parameters file for hier blocks
+    --hierarchical-threads <threads>  Number of threads for hierarchical scheduling
      -I<dir>                    Directory to search for includes
     --if-depth <value>          Tune IFDEPTH warning
      +incdir+<dir>              Directory to search for includes
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 290f07c0e..477a74fde 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -777,6 +777,16 @@ Summary:
    for deparametrized modules with :option:`/*verilator&32;hier_block*/`
    metacomment. See :ref:`Hierarchical Verilation`.
 
+.. option:: --hierarchical-threads <threads>
+
+   Specifies the number of threads used for scheduling hierarchical blocks.
+   The main use-case of this option is to provide possiblity for scheduling
+   multi-thread hierarchical blocks on multiple threads without increasing
+   parallelism of the whole design.
+
+   Set to :vlopt:`--threads` by default. For optimal performance should not exceed
+   CPU core count.
+
 .. option:: -I<dir>
 
    See :vlopt:`-y`.
diff --git a/src/V3EmitCModel.cpp b/src/V3EmitCModel.cpp
index 5517e0db3..dce801f25 100644
--- a/src/V3EmitCModel.cpp
+++ b/src/V3EmitCModel.cpp
@@ -503,8 +503,11 @@ class EmitCModel final : public EmitCFunc {
                         + "::hierName() const { return vlSymsp->name(); }\n");
         putns(modp, "const char* " + topClassName() + "::modelName() const { return \""
                         + topClassName() + "\"; }\n");
+        const int threads = v3Global.opt.hierChild()
+                                ? v3Global.opt.threads()
+                                : std::max(v3Global.opt.threads(), v3Global.opt.hierThreads());
         putns(modp, "unsigned " + topClassName() + "::threads() const { return "
-                        + cvtToStr(v3Global.opt.threads()) + "; }\n");
+                        + cvtToStr(threads) + "; }\n");
         putns(modp, "void " + topClassName()
                         + "::prepareClone() const { contextp()->prepareClone(); }\n");
         putns(modp, "void " + topClassName() + "::atClone() const {\n");
diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index 8a011fcfd..e20ff26d4 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -341,13 +341,16 @@ class PackThreads final {
 
     // MEMBERS
     const uint32_t m_nThreads;  // Number of threads
+    const uint32_t m_nHierThreads;  // Number of threads used for hierarchical tasks
     const uint32_t m_sandbagNumerator;  // Numerator padding for est runtime
     const uint32_t m_sandbagDenom;  // Denominator padding for est runtime
 
     // CONSTRUCTORS
     explicit PackThreads(uint32_t nThreads = v3Global.opt.threads(),
+                         uint32_t nHierThreads = v3Global.opt.hierThreads(),
                          unsigned sandbagNumerator = 30, unsigned sandbagDenom = 100)
         : m_nThreads{nThreads}
+        , m_nHierThreads{nHierThreads}
         , m_sandbagNumerator{sandbagNumerator}
         , m_sandbagDenom{sandbagDenom} {}
     ~PackThreads() = default;
@@ -419,7 +422,7 @@ class PackThreads final {
         SchedulingMode mode = SchedulingMode::SCHEDULING;
 
         // Time each thread is occupied until
-        std::vector<uint32_t> busyUntil(m_nThreads, 0);
+        std::vector<uint32_t> busyUntil(std::max(m_nThreads, m_nHierThreads), 0);
 
         // MTasks ready to be assigned next. All their dependencies are already assigned.
         std::set<ExecMTask*, MTaskCmp> readyMTasks;
@@ -479,7 +482,7 @@ class PackThreads final {
 
             if (!bestMtaskp && mode == SchedulingMode::WIDE_TASK_DISCOVERED) {
                 mode = SchedulingMode::WIDE_TASK_SCHEDULING;
-                const uint32_t size = m_nThreads / maxThreadWorkers;
+                const uint32_t size = m_nHierThreads / maxThreadWorkers;
                 UASSERT(size, "Thread pool size should be bigger than 0");
                 // If no tasks were added to the normal thread schedule, clear it.
                 if (schedule.mtaskState.empty()) result.clear();
@@ -584,8 +587,9 @@ public:
         new V3GraphEdge{&graph, t3, t5, 1};
         new V3GraphEdge{&graph, t4, t6, 1};
 
-        constexpr uint32_t threads = 6;
-        PackThreads packer{threads,
+        constexpr uint32_t threads = 2;
+        constexpr uint32_t hierThreads = 6;
+        PackThreads packer{threads, hierThreads,
                            3,  // Sandbag numerator
                            10};  // Sandbag denom
 
@@ -599,7 +603,7 @@ public:
         UASSERT_SELFTEST(const ExecMTask*, scheduled[0].threads[0][0], t0);
         UASSERT_SELFTEST(const ExecMTask*, scheduled[0].threads[0][1], t1);
 
-        UASSERT_SELFTEST(size_t, scheduled[1].threads.size(), threads / 3);
+        UASSERT_SELFTEST(size_t, scheduled[1].threads.size(), hierThreads / 3);
         UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][0], t2);
         UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[0][1], t3);
         UASSERT_SELFTEST(const ExecMTask*, scheduled[1].threads[1][0], t4);
@@ -689,14 +693,15 @@ public:
         */
         new V3GraphEdge{&graph, t0, t1, 1};
 
-        constexpr uint32_t threads = 2;
-        PackThreads packer{threads,
+        constexpr uint32_t threads = 1;
+        constexpr uint32_t hierThreads = 2;
+        PackThreads packer{threads, hierThreads,
                            3,  // Sandbag numerator
                            10};  // Sandbag denom
 
         const std::vector<ThreadSchedule> scheduled = packer.pack(graph);
         UASSERT_SELFTEST(size_t, scheduled.size(), 2);
-        UASSERT_SELFTEST(size_t, scheduled[0].threads.size(), threads / 2);
+        UASSERT_SELFTEST(size_t, scheduled[0].threads.size(), hierThreads / 2);
         UASSERT_SELFTEST(size_t, scheduled[0].threads[0].size(), 1);
         for (size_t i = 1; i < scheduled[0].threads.size(); ++i)
             UASSERT_SELFTEST(size_t, scheduled[0].threads[i].size(), 0);
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index be8814730..7cd9b5fe4 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -1602,6 +1602,10 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
             m_threads = 1;
         }
     });
+    DECL_OPTION("-hierarchical-threads", CbVal, [this, fl](const char* valp) {
+        m_hierThreads = std::atoi(valp);
+        if (m_hierThreads < 0) fl->v3fatal("--hierarchical-threads must be >= 0: " << valp);
+    });
     DECL_OPTION("-threads-coarsen", OnOff, &m_threadsCoarsen).undocumented();  // Debug
     DECL_OPTION("-threads-dpi", CbVal, [this, fl](const char* valp) {
         if (!std::strcmp(valp, "all")) {
diff --git a/src/V3Options.h b/src/V3Options.h
index 0fa4e94f2..6c7fb6acd 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -316,6 +316,7 @@ private:
     int         m_expandLimit = 64;  // main switch: --expand-limit
     int         m_gateStmts = 100;    // main switch: --gate-stmts
     int         m_hierChild = 0;      // main switch: --hierarchical-child
+    int         m_hierThreads = 0;      // main switch: --hierarchical-threads
     int         m_ifDepth = 0;      // main switch: --if-depth
     int         m_inlineMult = 2000;   // main switch: --inline-mult
     int         m_instrCountDpi = 200;   // main switch: --instr-count-dpi
@@ -741,6 +742,7 @@ public:
 
     bool hierarchical() const { return m_hierarchical; }
     int hierChild() const VL_MT_SAFE { return m_hierChild; }
+    int hierThreads() const VL_MT_SAFE { return m_hierThreads == 0 ? m_threads : m_hierThreads; }
     bool hierTop() const VL_MT_SAFE { return !m_hierChild && !m_hierBlocks.empty(); }
     const V3HierBlockOptSet& hierBlocks() const { return m_hierBlocks; }
     // Directory to save .tree, .dot, .dat, .vpp for hierarchical block top
diff --git a/test_regress/t/t_flag_hierarchical_threads_bad.out b/test_regress/t/t_flag_hierarchical_threads_bad.out
new file mode 100644
index 000000000..858c9146f
--- /dev/null
+++ b/test_regress/t/t_flag_hierarchical_threads_bad.out
@@ -0,0 +1,2 @@
+%Error: --hierarchical-threads must be >= 0: -2
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_flag_hierarchical_threads_bad.py b/test_regress/t/t_flag_hierarchical_threads_bad.py
new file mode 100755
index 000000000..f6f2005d4
--- /dev/null
+++ b/test_regress/t/t_flag_hierarchical_threads_bad.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=True,
+          verilator_flags2=['--hierarchical-threads -2'],
+          expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_hier_block_chained.py b/test_regress/t/t_hier_block_chained.py
new file mode 100755
index 000000000..4ed5f7ff7
--- /dev/null
+++ b/test_regress/t/t_hier_block_chained.py
@@ -0,0 +1,42 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt_all')
+test.init_benchmarksim()
+test.cycles = (int(test.benchmark) if test.benchmark else 100000)
+test.sim_time = test.cycles * 10 + 1000
+
+THREADS = 2
+HIER_BLOCK_THREADS = 2
+HIER_THREADS = 4
+
+config_file = test.t_dir + "/" + test.name + ".vlt"
+
+test.compile(
+    benchmarksim=1,
+    v_flags2=[
+        config_file, "+define+SIM_CYCLES=" + str(test.cycles), "--hierarchical", "--stats",
+        "-Wno-UNOPTFLAT",
+        (f"-DWORKERS={HIER_BLOCK_THREADS}" if test.vltmt and HIER_BLOCK_THREADS > 1 else ""),
+        (f"--hierarchical-threads {HIER_THREADS}" if test.vltmt and HIER_THREADS > 1 else "")
+    ],
+    threads=(THREADS if test.vltmt else 1),
+    context_threads=(max(HIER_THREADS, THREADS) if test.vltmt else 1))
+
+if test.vltmt:
+    test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
+                   r'Optimizations, Thread schedule count\s+(\d+)', 1)
+    test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
+                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 2)
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_hier_block_chained.v b/test_regress/t/t_hier_block_chained.v
new file mode 100644
index 000000000..57ccbba99
--- /dev/null
+++ b/test_regress/t/t_hier_block_chained.v
@@ -0,0 +1,212 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+// Based on tests emitted by t_gate_tree.py
+
+module t (clk);
+  input clk;
+
+  logic reset;
+
+   reg [255:0] v2_0;
+   reg [255:0] v1_0;
+   reg [255:0] v1_1;
+   reg [255:0] v1_2;
+   reg [255:0] v1_3;
+   reg [255:0] v1_4;
+   reg [255:0] v1_5;
+   reg [255:0] v1_6;
+   reg [255:0] v1_7;
+   reg [255:0] dummy;
+
+   Calculate calc0(.clk(clk), .reset(reset), .v1_0(v1_0), .v1_1(dummy), .v1_2(dummy), .v1_3(dummy), .v1_4(dummy), .v1_5(dummy), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc1(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(v1_1), .v1_2(dummy), .v1_3(dummy), .v1_4(dummy), .v1_5(dummy), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc2(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(v1_2), .v1_3(dummy), .v1_4(dummy), .v1_5(dummy), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc3(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(dummy), .v1_3(v1_3), .v1_4(dummy), .v1_5(dummy), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc4(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(dummy), .v1_3(dummy), .v1_4(v1_4), .v1_5(dummy), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc5(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(dummy), .v1_3(dummy), .v1_4(dummy), .v1_5(v1_5), .v1_6(dummy), .v1_7(dummy));
+   Calculate calc6(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(dummy), .v1_3(dummy), .v1_4(dummy), .v1_5(dummy), .v1_6(v1_6), .v1_7(dummy));
+   Calculate calc7(.clk(clk), .reset(reset), .v1_0(dummy), .v1_1(dummy), .v1_2(dummy), .v1_3(dummy), .v1_4(dummy), .v1_5(dummy), .v1_6(dummy), .v1_7(v1_7));
+   always @ (posedge clk) v2_0 <= v1_0 + v1_1 + v1_2 + v1_3 + v1_4 + v1_5 + v1_6 + v1_7;
+   Check chk(.clk(clk), .reset(reset), .v2_0(v2_0));
+endmodule
+
+module Check(input clk, output logic reset, input reg [255:0] v2_0);
+  integer cyc=0;
+   always @ (posedge clk) begin
+      cyc <= cyc + 1;
+`ifdef TEST_VERBOSE
+         $write("[%0t] rst=%0x  v0_0=%0x  v1_0=%0x  result=%0x\n", $time, reset, v0_0, v1_0, v2_0);
+`endif
+      if (cyc==0) begin
+         reset <= 1;
+      end
+      else if (cyc==10) begin
+         reset <= 0;
+      end
+`ifndef SIM_CYCLES
+ `define SIM_CYCLES 99
+`endif
+      else if (cyc==`SIM_CYCLES) begin
+         if (v2_0 != 256'd2017) $stop;
+         $write("VARS=64 WIDTH=256 WORKINGSET=2KB\n");
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+
+endmodule
+
+module Calculate(input clk,
+   input reset,
+   output reg [255:0] v1_0,
+   output reg [255:0] v1_1,
+   output reg [255:0] v1_2,
+   output reg [255:0] v1_3,
+   output reg [255:0] v1_4,
+   output reg [255:0] v1_5,
+   output reg [255:0] v1_6,
+   output reg [255:0] v1_7
+   );
+   reg [255:0] v0_0;
+   reg [255:0] v0_1;
+   reg [255:0] v0_2;
+   reg [255:0] v0_3;
+   reg [255:0] v0_4;
+   reg [255:0] v0_5;
+   reg [255:0] v0_6;
+   reg [255:0] v0_7;
+   reg [255:0] v0_8;
+   reg [255:0] v0_9;
+   reg [255:0] v0_10;
+   reg [255:0] v0_11;
+   reg [255:0] v0_12;
+   reg [255:0] v0_13;
+   reg [255:0] v0_14;
+   reg [255:0] v0_15;
+   reg [255:0] v0_16;
+   reg [255:0] v0_17;
+   reg [255:0] v0_18;
+   reg [255:0] v0_19;
+   reg [255:0] v0_20;
+   reg [255:0] v0_21;
+   reg [255:0] v0_22;
+   reg [255:0] v0_23;
+   reg [255:0] v0_24;
+   reg [255:0] v0_25;
+   reg [255:0] v0_26;
+   reg [255:0] v0_27;
+   reg [255:0] v0_28;
+   reg [255:0] v0_29;
+   reg [255:0] v0_30;
+   reg [255:0] v0_31;
+   reg [255:0] v0_32;
+   reg [255:0] v0_33;
+   reg [255:0] v0_34;
+   reg [255:0] v0_35;
+   reg [255:0] v0_36;
+   reg [255:0] v0_37;
+   reg [255:0] v0_38;
+   reg [255:0] v0_39;
+   reg [255:0] v0_40;
+   reg [255:0] v0_41;
+   reg [255:0] v0_42;
+   reg [255:0] v0_43;
+   reg [255:0] v0_44;
+   reg [255:0] v0_45;
+   reg [255:0] v0_46;
+   reg [255:0] v0_47;
+   reg [255:0] v0_48;
+   reg [255:0] v0_49;
+   reg [255:0] v0_50;
+   reg [255:0] v0_51;
+   reg [255:0] v0_52;
+   reg [255:0] v0_53;
+   reg [255:0] v0_54;
+   reg [255:0] v0_55;
+   reg [255:0] v0_56;
+   reg [255:0] v0_57;
+   reg [255:0] v0_58;
+   reg [255:0] v0_59;
+   reg [255:0] v0_60;
+   reg [255:0] v0_61;
+   reg [255:0] v0_62;
+   reg [255:0] v0_63;
+
+   always @ (posedge clk) v0_0 <= reset ? 256'd1 : v0_1;
+   always @ (posedge clk) v0_1 <= reset ? 256'd1 : v0_2;
+   always @ (posedge clk) v0_2 <= reset ? 256'd2 : v0_3;
+   always @ (posedge clk) v0_3 <= reset ? 256'd3 : v0_4;
+   always @ (posedge clk) v0_4 <= reset ? 256'd4 : v0_5;
+   always @ (posedge clk) v0_5 <= reset ? 256'd5 : v0_6;
+   always @ (posedge clk) v0_6 <= reset ? 256'd6 : v0_7;
+   always @ (posedge clk) v0_7 <= reset ? 256'd7 : v0_0;
+   always @ (posedge clk) v0_8 <= reset ? 256'd8 : v0_9;
+   always @ (posedge clk) v0_9 <= reset ? 256'd9 : v0_10;
+   always @ (posedge clk) v0_10 <= reset ? 256'd10 : v0_11;
+   always @ (posedge clk) v0_11 <= reset ? 256'd11 : v0_12;
+   always @ (posedge clk) v0_12 <= reset ? 256'd12 : v0_13;
+   always @ (posedge clk) v0_13 <= reset ? 256'd13 : v0_14;
+   always @ (posedge clk) v0_14 <= reset ? 256'd14 : v0_15;
+   always @ (posedge clk) v0_15 <= reset ? 256'd15 : v0_8;
+   always @ (posedge clk) v0_16 <= reset ? 256'd16 : v0_17;
+   always @ (posedge clk) v0_17 <= reset ? 256'd17 : v0_18;
+   always @ (posedge clk) v0_18 <= reset ? 256'd18 : v0_19;
+   always @ (posedge clk) v0_19 <= reset ? 256'd19 : v0_20;
+   always @ (posedge clk) v0_20 <= reset ? 256'd20 : v0_21;
+   always @ (posedge clk) v0_21 <= reset ? 256'd21 : v0_22;
+   always @ (posedge clk) v0_22 <= reset ? 256'd22 : v0_23;
+   always @ (posedge clk) v0_23 <= reset ? 256'd23 : v0_16;
+   always @ (posedge clk) v0_24 <= reset ? 256'd24 : v0_25;
+   always @ (posedge clk) v0_25 <= reset ? 256'd25 : v0_26;
+   always @ (posedge clk) v0_26 <= reset ? 256'd26 : v0_27;
+   always @ (posedge clk) v0_27 <= reset ? 256'd27 : v0_28;
+   always @ (posedge clk) v0_28 <= reset ? 256'd28 : v0_29;
+   always @ (posedge clk) v0_29 <= reset ? 256'd29 : v0_30;
+   always @ (posedge clk) v0_30 <= reset ? 256'd30 : v0_31;
+   always @ (posedge clk) v0_31 <= reset ? 256'd31 : v0_24;
+   always @ (posedge clk) v0_32 <= reset ? 256'd32 : v0_33;
+   always @ (posedge clk) v0_33 <= reset ? 256'd33 : v0_34;
+   always @ (posedge clk) v0_34 <= reset ? 256'd34 : v0_35;
+   always @ (posedge clk) v0_35 <= reset ? 256'd35 : v0_36;
+   always @ (posedge clk) v0_36 <= reset ? 256'd36 : v0_37;
+   always @ (posedge clk) v0_37 <= reset ? 256'd37 : v0_38;
+   always @ (posedge clk) v0_38 <= reset ? 256'd38 : v0_39;
+   always @ (posedge clk) v0_39 <= reset ? 256'd39 : v0_32;
+   always @ (posedge clk) v0_40 <= reset ? 256'd40 : v0_41;
+   always @ (posedge clk) v0_41 <= reset ? 256'd41 : v0_42;
+   always @ (posedge clk) v0_42 <= reset ? 256'd42 : v0_43;
+   always @ (posedge clk) v0_43 <= reset ? 256'd43 : v0_44;
+   always @ (posedge clk) v0_44 <= reset ? 256'd44 : v0_45;
+   always @ (posedge clk) v0_45 <= reset ? 256'd45 : v0_46;
+   always @ (posedge clk) v0_46 <= reset ? 256'd46 : v0_47;
+   always @ (posedge clk) v0_47 <= reset ? 256'd47 : v0_40;
+   always @ (posedge clk) v0_48 <= reset ? 256'd48 : v0_49;
+   always @ (posedge clk) v0_49 <= reset ? 256'd49 : v0_50;
+   always @ (posedge clk) v0_50 <= reset ? 256'd50 : v0_51;
+   always @ (posedge clk) v0_51 <= reset ? 256'd51 : v0_52;
+   always @ (posedge clk) v0_52 <= reset ? 256'd52 : v0_53;
+   always @ (posedge clk) v0_53 <= reset ? 256'd53 : v0_54;
+   always @ (posedge clk) v0_54 <= reset ? 256'd54 : v0_55;
+   always @ (posedge clk) v0_55 <= reset ? 256'd55 : v0_48;
+   always @ (posedge clk) v0_56 <= reset ? 256'd56 : v0_57;
+   always @ (posedge clk) v0_57 <= reset ? 256'd57 : v0_58;
+   always @ (posedge clk) v0_58 <= reset ? 256'd58 : v0_59;
+   always @ (posedge clk) v0_59 <= reset ? 256'd59 : v0_60;
+   always @ (posedge clk) v0_60 <= reset ? 256'd60 : v0_61;
+   always @ (posedge clk) v0_61 <= reset ? 256'd61 : v0_62;
+   always @ (posedge clk) v0_62 <= reset ? 256'd62 : v0_63;
+   always @ (posedge clk) v0_63 <= reset ? 256'd63 : v0_56;
+
+   always @ (posedge clk) v1_0 <= v0_0 + v0_1 + v0_2 + v0_3 + v0_4 + v0_5 + v0_6 + v0_7;
+   always @ (posedge clk) v1_1 <= v0_8 + v0_9 + v0_10 + v0_11 + v0_12 + v0_13 + v0_14 + v0_15;
+   always @ (posedge clk) v1_2 <= v0_16 + v0_17 + v0_18 + v0_19 + v0_20 + v0_21 + v0_22 + v0_23;
+   always @ (posedge clk) v1_3 <= v0_24 + v0_25 + v0_26 + v0_27 + v0_28 + v0_29 + v0_30 + v0_31;
+   always @ (posedge clk) v1_4 <= v0_32 + v0_33 + v0_34 + v0_35 + v0_36 + v0_37 + v0_38 + v0_39;
+   always @ (posedge clk) v1_5 <= v0_40 + v0_41 + v0_42 + v0_43 + v0_44 + v0_45 + v0_46 + v0_47;
+   always @ (posedge clk) v1_6 <= v0_48 + v0_49 + v0_50 + v0_51 + v0_52 + v0_53 + v0_54 + v0_55;
+   always @ (posedge clk) v1_7 <= v0_56 + v0_57 + v0_58 + v0_59 + v0_60 + v0_61 + v0_62 + v0_63;
+endmodule
diff --git a/test_regress/t/t_hier_block_chained.vlt b/test_regress/t/t_hier_block_chained.vlt
new file mode 100644
index 000000000..9740d5a91
--- /dev/null
+++ b/test_regress/t/t_hier_block_chained.vlt
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+`verilator_config
+
+hier_block -module "Calculate"
+hier_block -module "Check"
+
+`ifdef WORKERS
+hier_workers -module "Calculate" -workers `WORKERS
+`endif
diff --git a/test_regress/t/t_hier_block_perf.py b/test_regress/t/t_hier_block_perf.py
index b36132b41..5847c7588 100755
--- a/test_regress/t/t_hier_block_perf.py
+++ b/test_regress/t/t_hier_block_perf.py
@@ -14,9 +14,9 @@ test.init_benchmarksim()
 test.cycles = (int(test.benchmark) if test.benchmark else 100000)
 test.sim_time = test.cycles * 10 + 1000
 
-THREADS = int(os.environ["THREADS"]) if "THREADS" in os.environ else 4
-HIER_BLOCK_THREADS = int(
-    os.environ["HIER_BLOCK_THREADS"]) if "HIER_BLOCK_THREADS" in os.environ else 2
+THREADS = 2
+HIER_BLOCK_THREADS = 2
+HIER_THREADS = 4
 
 config_file = test.t_dir + "/" + test.name + ".vlt"
 
@@ -25,18 +25,20 @@ test.compile(
     v_flags2=[
         config_file, "+define+SIM_CYCLES=" + str(test.cycles), "--prof-exec", "--hierarchical",
         "--stats", "-Wno-UNOPTFLAT",
-        (f"-DWORKERS={HIER_BLOCK_THREADS}" if test.vltmt and HIER_BLOCK_THREADS > 1 else "")
+        (f"-DWORKERS={HIER_BLOCK_THREADS}" if test.vltmt and HIER_BLOCK_THREADS > 1 else ""),
+        (f"--hierarchical-threads {HIER_THREADS}" if test.vltmt and HIER_THREADS > 1 else "")
     ],
-    threads=(THREADS if test.vltmt else 1))
+    threads=(THREADS if test.vltmt else 1),
+    context_threads=(HIER_THREADS if test.vltmt else 1))
 
 test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
                r'Optimizations, Hierarchical DPI wrappers with costs\s+(\d+)', 6)
 
 if test.vltmt:
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
-                   r'Optimizations, Thread schedule count\s+(\d+)', 4)
+                   r'Optimizations, Thread schedule count\s+(\d+)', 1)
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
-                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 12)
+                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 2)
 
 test.execute(all_run_flags=[
     "+verilator+prof+exec+start+2",

From e84fe36518b4757b89eaf0409447429438baaef3 Mon Sep 17 00:00:00 2001
From: Paul Swirhun <63216497+paul-demo@users.noreply.github.com>
Date: Mon, 26 May 2025 06:50:40 -0700
Subject: [PATCH 106/211] Tests: Add test coverage for stream to packed N-dim
 arrays (#6039)

---
 test_regress/t/t_stream_unpack.v | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/test_regress/t/t_stream_unpack.v b/test_regress/t/t_stream_unpack.v
index fce34bb57..901fc421b 100644
--- a/test_regress/t/t_stream_unpack.v
+++ b/test_regress/t/t_stream_unpack.v
@@ -31,6 +31,8 @@ module t (/*AUTOARG*/);
       logic [15:0] d;
       logic [3:0] e [2];
       logic f [8];
+      logic [1:0][7:0] g;
+      logic [1:0][1:0][3:0] h;
 
       { >> bit {arr}} = bit6;
       `checkp(arr, "'{'h1, 'h1, 'h1, 'h0, 'h0, 'h0} ");
@@ -211,6 +213,12 @@ module t (/*AUTOARG*/);
       `checkp(e, "'{'h1, 'h7} ");
       `checkp(f, "'{'h0, 'h0, 'h1, 'h0, 'h0, 'h0, 'h1, 'h1} ");
 
+      g = { << 8 {16'hABCD}};
+      `checkh(g, 16'hCDAB);
+
+      h = { << 8 {16'hABCD}};
+      `checkh(h, 16'hCDAB);
+
       $write("*-* All Finished *-*\n");
       $finish;
    end

From 4b041c636fec7b246e74ee0699676b3972a44e1a Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Tue, 27 May 2025 09:31:55 -0400
Subject: [PATCH 107/211] Fix --x-initial and --x-assign random stability
 (#2662) (#5958) (#6018) (#6025)

---
 Changes                                       |  1 +
 include/verilated.cpp                         | 74 ++++++++++++++++++
 include/verilated_funcs.h                     | 10 +++
 src/V3AstNodeExpr.h                           | 20 +----
 src/V3EmitCFunc.cpp                           | 39 ++++++++--
 src/V3EmitCFunc.h                             | 16 +++-
 src/V3EmitCImp.cpp                            |  2 +
 src/V3Options.cpp                             |  1 +
 src/V3String.cpp                              | 43 +++++++++++
 src/V3String.h                                |  2 +
 src/V3UniqueNames.h                           |  5 +-
 src/V3Unknown.cpp                             |  9 +--
 test_regress/t/t_debug_emitv.py               | 21 +++--
 test_regress/t/t_flag_xinitial_unique.py      |  4 +-
 test_regress/t/t_x_assign.cpp                 | 24 +++---
 test_regress/t/t_x_assign_unique_2.py         | 24 ++++++
 test_regress/t/t_x_rand_mt_stability.out      | 17 +++++
 test_regress/t/t_x_rand_mt_stability.py       | 24 ++++++
 test_regress/t/t_x_rand_mt_stability_add.out  | 17 +++++
 test_regress/t/t_x_rand_mt_stability_add.py   | 19 +++++
 .../t/t_x_rand_mt_stability_add_trace.out     | 17 +++++
 .../t/t_x_rand_mt_stability_add_trace.py      | 19 +++++
 .../t/t_x_rand_mt_stability_trace.out         | 17 +++++
 test_regress/t/t_x_rand_mt_stability_trace.py | 19 +++++
 .../t/t_x_rand_mt_stability_zeros.out         | 17 +++++
 test_regress/t/t_x_rand_mt_stability_zeros.py | 19 +++++
 test_regress/t/t_x_rand_stability.out         | 17 +++++
 test_regress/t/t_x_rand_stability.py          | 23 ++++++
 test_regress/t/t_x_rand_stability.v           | 76 +++++++++++++++++++
 test_regress/t/t_x_rand_stability_add.out     | 17 +++++
 test_regress/t/t_x_rand_stability_add.py      | 19 +++++
 .../t/t_x_rand_stability_add_trace.out        | 17 +++++
 .../t/t_x_rand_stability_add_trace.py         | 19 +++++
 test_regress/t/t_x_rand_stability_trace.out   | 17 +++++
 test_regress/t/t_x_rand_stability_trace.py    | 19 +++++
 test_regress/t/t_x_rand_stability_zeros.out   | 17 +++++
 test_regress/t/t_x_rand_stability_zeros.py    | 19 +++++
 37 files changed, 692 insertions(+), 48 deletions(-)
 create mode 100755 test_regress/t/t_x_assign_unique_2.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_add.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_add.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_add_trace.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_add_trace.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_trace.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_trace.py
 create mode 100644 test_regress/t/t_x_rand_mt_stability_zeros.out
 create mode 100755 test_regress/t/t_x_rand_mt_stability_zeros.py
 create mode 100644 test_regress/t/t_x_rand_stability.out
 create mode 100755 test_regress/t/t_x_rand_stability.py
 create mode 100644 test_regress/t/t_x_rand_stability.v
 create mode 100644 test_regress/t/t_x_rand_stability_add.out
 create mode 100755 test_regress/t/t_x_rand_stability_add.py
 create mode 100644 test_regress/t/t_x_rand_stability_add_trace.out
 create mode 100755 test_regress/t/t_x_rand_stability_add_trace.py
 create mode 100644 test_regress/t/t_x_rand_stability_trace.out
 create mode 100755 test_regress/t/t_x_rand_stability_trace.py
 create mode 100644 test_regress/t/t_x_rand_stability_zeros.out
 create mode 100755 test_regress/t/t_x_rand_stability_zeros.py

diff --git a/Changes b/Changes
index 6f7dcbc93..2610fffdd 100644
--- a/Changes
+++ b/Changes
@@ -24,6 +24,7 @@ Verilator 5.037 devel
 * Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
 * Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
diff --git a/include/verilated.cpp b/include/verilated.cpp
index 0fc525de1..928e21524 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -406,6 +406,38 @@ IData VL_URANDOM_SEEDED_II(IData seed) VL_MT_SAFE {
     Verilated::threadContextp()->randSeed(static_cast<int>(seed));
     return VL_RANDOM_I();
 }
+
+IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    IData data = ~0;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        data = rng.rand64();
+    }
+    data &= VL_MASK_I(obits);
+    return data;
+}
+
+QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() == 0) return 0;
+    QData data = ~0ULL;
+    if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
+        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        data = rng.rand64();
+    }
+    data &= VL_MASK_Q(obits);
+    return data;
+}
+
+WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                 uint64_t salt) VL_MT_UNSAFE {
+    if (Verilated::threadContextp()->randReset() != 2) { return VL_RAND_RESET_W(obits, outwp); }
+    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
+    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
+    return outwp;
+}
+
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -1700,6 +1732,48 @@ IData VL_SSCANF_INNX(int, const std::string& ld, const std::string& format, int
     return got;
 }
 
+// MurmurHash64A
+uint64_t VL_MURMUR64_HASH(const char* key) VL_PURE {
+    const size_t len = strlen(key);
+    const uint64_t seed = 0;
+    const uint64_t m = 0xc6a4a7935bd1e995ULL;
+    const int r = 47;
+
+    uint64_t h = seed ^ (len * m);
+
+    const uint64_t* data = (const uint64_t*)key;
+    const uint64_t* end = data + (len / 8);
+
+    while (data != end) {
+        uint64_t k = *data++;
+
+        k *= m;
+        k ^= k >> r;
+        k *= m;
+
+        h ^= k;
+        h *= m;
+    }
+
+    const unsigned char* data2 = (const unsigned char*)data;
+
+    switch (len & 7) {
+    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
+    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
+    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
+    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
+    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
+    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
+    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
+    };
+
+    h ^= h >> r;
+    h *= m;
+    h ^= h >> r;
+
+    return h;
+}
+
 IData VL_FREAD_I(int width, int array_lsb, int array_size, void* memp, IData fpi, IData start,
                  IData count) VL_MT_SAFE {
     // While threadsafe, each thread can only access different file handles
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 712ce7277..ca3ca8fe0 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -101,6 +101,14 @@ inline IData VL_URANDOM_RANGE_I(IData hi, IData lo) {
     }
 }
 
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (init time only, var-specific PRNG)
+extern WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                        uint64_t salt) VL_MT_UNSAFE;
+
 /// Random reset a signal of given width (init time only)
 extern IData VL_RAND_RESET_I(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
@@ -2819,6 +2827,8 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr)
 }
 extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE;
 
+uint64_t VL_MURMUR64_HASH(const char* key) VL_PURE;
+
 //======================================================================
 
 #endif  // Guard
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index aac157825..f83def594 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1802,14 +1802,8 @@ class AstRand final : public AstNodeExpr {
     // Return a random number, based upon width()
     // @astgen op1 := seedp : Optional[AstNode]
     const bool m_urandom = false;  // $urandom vs $random
-    const bool m_reset = false;  // Random reset, versus always random
 public:
     class Reset {};
-    AstRand(FileLine* fl, Reset, AstNodeDType* dtp, bool reset)
-        : ASTGEN_SUPER_Rand(fl)
-        , m_reset{reset} {
-        dtypep(dtp);
-    }
     AstRand(FileLine* fl, AstNode* seedp, bool urandom)
         : ASTGEN_SUPER_Rand(fl)
         , m_urandom{urandom} {
@@ -1821,14 +1815,6 @@ public:
                        : (m_urandom ? "%f$urandom()" : "%f$random()");
     }
     string emitC() override {
-        if (m_reset) {
-            if (v3Global.opt.xAssign() == "unique") {
-                return "VL_RAND_RESET_ASSIGN_%nq(%nw, %P)";
-            } else {
-                // This follows xInitial randomization
-                return "VL_RAND_RESET_%nq(%nw, %P)";
-            }
-        }
         if (seedp()) {
             if (urandom()) {
                 return "VL_URANDOM_SEEDED_%nq%lq(%li)";
@@ -1845,14 +1831,12 @@ public:
     bool cleanOut() const override { return false; }
     bool isGateOptimizable() const override { return false; }
     bool isPredictOptimizable() const override { return false; }
-    bool isPure() override { return !m_reset && !seedp(); }
+    bool isPure() override { return !seedp(); }
     int instrCount() const override { return INSTR_COUNT_PLI; }
     bool sameNode(const AstNode* /*samep*/) const override { return true; }
     bool combinable(const AstRand* samep) const {
-        return !seedp() && !samep->seedp() && reset() == samep->reset()
-               && urandom() == samep->urandom();
+        return !seedp() && !samep->seedp() && urandom() == samep->urandom();
     }
-    bool reset() const { return m_reset; }
     bool urandom() const { return m_urandom; }
 };
 class AstRandRNG final : public AstNodeExpr {
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index 34971f85f..f9587b4b4 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -753,7 +753,9 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                || varp->isFuncLocal()  // Randomization too slow
                || (basicp && basicp->isZeroInit())
                || (v3Global.opt.underlineZero() && !varp->name().empty() && varp->name()[0] == '_')
-               || (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0"));
+               || (varp->isXTemp()
+                       ? (v3Global.opt.xAssign() != "unique")
+                       : (v3Global.opt.xInitial() == "fast" || v3Global.opt.xInitial() == "0")));
         const bool slow = !varp->isFuncLocal() && !varp->isClassMember();
         splitSizeInc(1);
         if (dtypep->isWide()) {  // Handle unpacked; not basicp->isWide
@@ -766,9 +768,20 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                     out += cvtToStr(constp->num().edataWord(w)) + "U;\n";
                 }
             } else {
-                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(") : "VL_RAND_RESET_W(";
+                out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(")
+                              : "VL_SCOPED_RAND_RESET_W(";
                 out += cvtToStr(dtypep->widthMin());
-                out += ", " + varNameProtected + suffix + ");\n";
+                out += ", " + varNameProtected + suffix;
+                if (!zeroit) {
+                    emitVarResetScopeHash();
+                    const uint64_t salt = VString::hashMurmur(varp->prettyName());
+                    out += ", ";
+                    out += m_classOrPackage ? m_classOrPackageHash : "__VscopeHash";
+                    out += ", ";
+                    out += std::to_string(salt);
+                    out += "ull";
+                }
+                out += ");\n";
             }
             return out;
         } else {
@@ -781,9 +794,13 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
             if (zeroit || (v3Global.opt.xInitialEdge() && varp->isUsedClock())) {
                 out += " = 0;\n";
             } else {
-                out += " = VL_RAND_RESET_";
+                emitVarResetScopeHash();
+                const uint64_t salt = VString::hashMurmur(varp->prettyName());
+                out += " = VL_SCOPED_RAND_RESET_";
                 out += dtypep->charIQWN();
-                out += "(" + cvtToStr(dtypep->widthMin()) + ");\n";
+                out += "(" + cvtToStr(dtypep->widthMin()) + ", "
+                       + (m_classOrPackage ? m_classOrPackageHash : "__VscopeHash") + ", "
+                       + std::to_string(salt) + "ull);\n";
             }
             return out;
         }
@@ -792,3 +809,15 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
     }
     return "";
 }
+
+void EmitCFunc::emitVarResetScopeHash() {
+    if (VL_LIKELY(m_createdScopeHash)) { return; }
+    if (m_classOrPackage) {
+        m_classOrPackageHash
+            = std::to_string(VString::hashMurmur(m_classOrPackage->name())) + "ULL";
+    } else {
+        puts(string("const uint64_t __VscopeHash = VL_MURMUR64_HASH(")
+             + (m_useSelfForThis ? "vlSelf" : "this") + "->name());\n");
+    }
+    m_createdScopeHash = true;
+}
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index d270a9e2a..13399eee0 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -120,6 +120,7 @@ class EmitCFunc VL_NOT_FINAL : public EmitCConstInit {
     int m_labelNum = 0;  // Next label number
     bool m_inUC = false;  // Inside an AstUCStmt or AstUCExpr
     bool m_emitConstInit = false;  // Emitting constant initializer
+    bool m_createdScopeHash = false;  // Already created a scope hash
 
     // State associated with processing $display style string formatting
     struct EmitDispState final {
@@ -150,6 +151,8 @@ protected:
     const AstNodeModule* m_modp = nullptr;  // Current module being emitted
     const AstCFunc* m_cfuncp = nullptr;  // Current function being emitted
     bool m_instantiatesOwnProcess = false;
+    const AstClassPackage* m_classOrPackage = nullptr;  // Pointer to current class or package
+    string m_classOrPackageHash;  // Hash of class or package name
 
     bool constructorNeedsProcess(const AstClass* const classp) {
         const AstNode* const newp = m_memberMap.findMember(classp, "new");
@@ -223,6 +226,7 @@ public:
     string emitVarResetRecurse(const AstVar* varp, bool constructing,
                                const string& varNameProtected, AstNodeDType* dtypep, int depth,
                                const string& suffix);
+    void emitVarResetScopeHash();
     void emitChangeDet();
     void emitConstInit(AstNode* initp) {
         // We should refactor emit to produce output into a provided buffer, not go through members
@@ -294,6 +298,7 @@ public:
         VL_RESTORER(m_useSelfForThis);
         VL_RESTORER(m_cfuncp);
         VL_RESTORER(m_instantiatesOwnProcess);
+        VL_RESTORER(m_createdScopeHash);
         m_cfuncp = nodep;
         m_instantiatesOwnProcess = false;
 
@@ -612,6 +617,7 @@ public:
             putnbs(argrefp, argrefp->dtypep()->cType(argrefp->nameProtect(), false, false));
         }
         puts(") {\n");
+        VL_RESTORER(m_createdScopeHash);
         iterateAndNextConstNull(nodep->exprp());
         puts("}\n");
     }
@@ -965,12 +971,14 @@ public:
     void visit(AstJumpBlock* nodep) override {
         nodep->labelNum(++m_labelNum);
         putns(nodep, "{\n");  // Make it visually obvious label jumps outside these
+        VL_RESTORER(m_createdScopeHash);
         iterateAndNextConstNull(nodep->stmtsp());
         iterateAndNextConstNull(nodep->endStmtsp());
         puts("}\n");
     }
     void visit(AstCLocalScope* nodep) override {
         putns(nodep, "{\n");
+        VL_RESTORER(m_createdScopeHash);
         iterateAndNextConstNull(nodep->stmtsp());
         puts("}\n");
     }
@@ -981,6 +989,7 @@ public:
         putns(nodep, "__Vlabel" + cvtToStr(nodep->blockp()->labelNum()) + ": ;\n");
     }
     void visit(AstWhile* nodep) override {
+        VL_RESTORER(m_createdScopeHash);
         iterateAndNextConstNull(nodep->precondsp());
         putns(nodep, "while (");
         iterateAndNextConstNull(nodep->condp());
@@ -999,7 +1008,10 @@ public:
         iterateAndNextConstNull(nodep->condp());
         if (!nodep->branchPred().unknown()) puts("))");
         puts(") {\n");
-        iterateAndNextConstNull(nodep->thensp());
+        {
+            VL_RESTORER(m_createdScopeHash);
+            iterateAndNextConstNull(nodep->thensp());
+        }
         puts("}");
         if (!nodep->elsesp()) {
             puts("\n");
@@ -1008,6 +1020,7 @@ public:
                 puts(" else ");
                 iterateAndNextConstNull(nodep->elsesp());
             } else {
+                VL_RESTORER(m_createdScopeHash);
                 puts(" else {\n");
                 iterateAndNextConstNull(nodep->elsesp());
                 puts("}\n");
@@ -1015,6 +1028,7 @@ public:
         }
     }
     void visit(AstExprStmt* nodep) override {
+        VL_RESTORER(m_createdScopeHash);
         // GCC allows compound statements in expressions, but this is not standard.
         // So we use an immediate-evaluation lambda and comma operator
         putnbs(nodep, "([&]() {\n");
diff --git a/src/V3EmitCImp.cpp b/src/V3EmitCImp.cpp
index fd6fbdc6b..f8e0990bf 100644
--- a/src/V3EmitCImp.cpp
+++ b/src/V3EmitCImp.cpp
@@ -506,7 +506,9 @@ class EmitCImp final : EmitCFunc {
         };
 
         gather(modp);
+        VL_RESTORER(m_classOrPackage);
         if (const AstClassPackage* const packagep = VN_CAST(modp, ClassPackage)) {
+            m_classOrPackage = packagep;
             gather(packagep->classp());
         }
 
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 7cd9b5fe4..86a7c0c16 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -2106,6 +2106,7 @@ V3Options::V3Options() {
     m_makeDir = "obj_dir";
     m_unusedRegexp = "*unused*";
     m_xAssign = "fast";
+    m_xInitial = "unique";
 
     m_defaultLanguage = V3LangCode::mostRecent();
 
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 5cbcd3dab..7cd304692 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -342,6 +342,49 @@ string VString::aOrAn(const char* word) {
     }
 }
 
+// MurmurHash64A
+uint64_t VString::hashMurmur(const string& str) VL_PURE {
+    const char* key = str.c_str();
+    const size_t len = str.size();
+    const uint64_t seed = 0;
+    const uint64_t m = 0xc6a4a7935bd1e995ULL;
+    const int r = 47;
+
+    uint64_t h = seed ^ (len * m);
+
+    const uint64_t* data = (const uint64_t*)key;
+    const uint64_t* end = data + (len / 8);
+
+    while (data != end) {
+        uint64_t k = *data++;
+
+        k *= m;
+        k ^= k >> r;
+        k *= m;
+
+        h ^= k;
+        h *= m;
+    }
+
+    const unsigned char* data2 = (const unsigned char*)data;
+
+    switch (len & 7) {
+    case 7: h ^= uint64_t(data2[6]) << 48; /* fallthrough */
+    case 6: h ^= uint64_t(data2[5]) << 40; /* fallthrough */
+    case 5: h ^= uint64_t(data2[4]) << 32; /* fallthrough */
+    case 4: h ^= uint64_t(data2[3]) << 24; /* fallthrough */
+    case 3: h ^= uint64_t(data2[2]) << 16; /* fallthrough */
+    case 2: h ^= uint64_t(data2[1]) << 8; /* fallthrough */
+    case 1: h ^= uint64_t(data2[0]); h *= m; /* fallthrough */
+    };
+
+    h ^= h >> r;
+    h *= m;
+    h ^= h >> r;
+
+    return h;
+}
+
 //######################################################################
 // VHashSha256
 
diff --git a/src/V3String.h b/src/V3String.h
index fb9b87106..f40b46b8a 100644
--- a/src/V3String.h
+++ b/src/V3String.h
@@ -141,6 +141,8 @@ public:
     // Return proper article (a/an) for a word. May be inaccurate for some special words
     static string aOrAn(const char* word);
     static string aOrAn(const string& word) { return aOrAn(word.c_str()); }
+    // Hash the string
+    static uint64_t hashMurmur(const string& str) VL_PURE;
 };
 
 //######################################################################
diff --git a/src/V3UniqueNames.h b/src/V3UniqueNames.h
index 41886942b..a61627834 100644
--- a/src/V3UniqueNames.h
+++ b/src/V3UniqueNames.h
@@ -71,7 +71,10 @@ public:
 
     // Return hash of node as string, prepended with the prefix if any, appended with a unique
     // suffix each time we are called with a node that hashes to the same value.
-    std::string get(const AstNode* nodep) { return get(V3Hasher::uncachedHash(nodep).toString()); }
+    std::string get(const AstNode* nodep) {
+        if (nodep == nullptr) { return get(""); }
+        return get(V3Hasher::uncachedHash(nodep).toString());
+    }
 
     // Reset to initial state (as if just constructed)
     void reset() { m_multiplicity.clear(); }
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index 6a489fb16..d5c3b3061 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -344,7 +344,7 @@ class UnknownVisitor final : public VNVisitor {
                 // We use the special XTEMP type so it doesn't break pure functions
                 UASSERT_OBJ(m_modp, nodep, "X number not under module");
                 AstVar* const newvarp
-                    = new AstVar{nodep->fileline(), VVarType::XTEMP, m_xrandNames->get(nodep),
+                    = new AstVar{nodep->fileline(), VVarType::XTEMP, m_xrandNames->get(nullptr),
                                  VFlagLogicPacked{}, nodep->width()};
                 newvarp->lifetime(VLifetime::STATIC);
                 ++m_statUnkVars;
@@ -359,10 +359,9 @@ class UnknownVisitor final : public VNVisitor {
                         nodep->fileline(),
                         new AstVarRef{nodep->fileline(), newvarp, VAccess::WRITE},
                         new AstOr{nodep->fileline(), new AstConst{nodep->fileline(), numb1},
-                                  new AstAnd{nodep->fileline(),
-                                             new AstConst{nodep->fileline(), numbx},
-                                             new AstRand{nodep->fileline(), AstRand::Reset{},
-                                                         nodep->dtypep(), true}}}}};
+                                  new AstAnd{
+                                      nodep->fileline(), new AstConst{nodep->fileline(), numbx},
+                                      new AstVarRef{nodep->fileline(), newvarp, VAccess::READ}}}}};
                 // Add inits in front of other statement.
                 // In the future, we should stuff the initp into the module's constructor.
                 AstNode* const afterp = m_modp->stmtsp()->unlinkFrBackWithNext();
diff --git a/test_regress/t/t_debug_emitv.py b/test_regress/t/t_debug_emitv.py
index 227968047..f8d03f1e7 100755
--- a/test_regress/t/t_debug_emitv.py
+++ b/test_regress/t/t_debug_emitv.py
@@ -9,23 +9,30 @@
 
 import vltest_bootstrap
 
-test.scenarios('vlt')
+test.scenarios("vlt")
 
 test.lint(
     # We also have dump-tree turned on, so hit a lot of AstNode*::dump() functions
     # Likewise XML
     v_flags=["--lint-only --dumpi-tree 9 --dumpi-V3EmitV 9 --debug-emitv"])
 
-output_v = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
+output_vs = test.glob_some(test.obj_dir + "/" + test.vm_prefix + "_*_width.tree.v")
 
-test.files_identical(output_v, test.golden_filename)
+for output_v in output_vs:
+    test.files_identical(output_v, test.golden_filename)
 
 if test.verbose:
     # Print if that the output Verilog is clean
     # TODO not yet round-trip clean
-    test.run(cmd=[os.environ["VERILATOR_ROOT"] + "/bin/verilator", "--lint-only", output_v],
-             logfile=test.obj_dir + "/sim_roundtrip.log",
-             fails=True,
-             verilator_run=True)
+    test.run(
+        cmd=[
+            os.environ["VERILATOR_ROOT"] + "/bin/verilator",
+            "--lint-only",
+            output_vs[0],
+        ],
+        logfile=test.obj_dir + "/sim_roundtrip.log",
+        fails=True,
+        verilator_run=True,
+    )
 
 test.passes()
diff --git a/test_regress/t/t_flag_xinitial_unique.py b/test_regress/t/t_flag_xinitial_unique.py
index 64ac07036..9d4ede6ae 100755
--- a/test_regress/t/t_flag_xinitial_unique.py
+++ b/test_regress/t/t_flag_xinitial_unique.py
@@ -9,13 +9,13 @@
 
 import vltest_bootstrap
 
-test.scenarios('vlt_all')
+test.scenarios("vlt_all")
 
 test.compile(verilator_flags2=["--x-initial unique"])
 
 test.execute()
 
 files = glob.glob(test.obj_dir + "/" + test.vm_prefix + "___024root__DepSet_*__Slow.cpp")
-test.file_grep_any(files, r'VL_RAND_RESET')
+test.file_grep_any(files, r"VL_SCOPED_RAND_RESET")
 
 test.passes()
diff --git a/test_regress/t/t_x_assign.cpp b/test_regress/t/t_x_assign.cpp
index bfb80ffff..36aa6371f 100644
--- a/test_regress/t/t_x_assign.cpp
+++ b/test_regress/t/t_x_assign.cpp
@@ -21,31 +21,37 @@ double sc_time_stamp() { return 0; }
 # define EXPECTED 0
 #elif defined(T_X_ASSIGN_1)
 # define EXPECTED 1
-#elif defined(T_X_ASSIGN_UNIQUE_0)
-# define EXPECTED 0
-#elif defined(T_X_ASSIGN_UNIQUE_1)
-# define EXPECTED 1
-#else
-# error "Don't know expectd output for test" #TEST
 #endif
 // clang-format on
 
 int main(int argc, const char** argv) {
-    VM_PREFIX* top = new VM_PREFIX{};
-
 #if defined(T_X_ASSIGN_UNIQUE_0)
     Verilated::randReset(0);
 #elif defined(T_X_ASSIGN_UNIQUE_1)
     Verilated::randReset(1);
+#elif defined(T_X_ASSIGN_UNIQUE_2)
+    Verilated::randReset(2);
 #endif
 
+    VM_PREFIX* top = new VM_PREFIX{};
+
     // Evaluate one clock posedge
     top->clk = 0;
     top->eval();
     top->clk = 1;
     top->eval();
 
-#if defined(T_X_ASSIGN_UNIQUE_0) || defined(T_X_ASSIGN_UNIQUE_1)
+#if defined(T_X_ASSIGN_UNIQUE_0)
+    if (top->o_int != 0) {
+        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
+        exit(1);
+    }
+#elif defined(T_X_ASSIGN_UNIQUE_1)
+    if (top->o_int != -1) {
+        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
+        exit(1);
+    }
+#elif defined(T_X_ASSIGN_UNIQUE_2)
     if (top->o_int == 0 || top->o_int == -1) {
         vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not unique");
         exit(1);
diff --git a/test_regress/t/t_x_assign_unique_2.py b/test_regress/t/t_x_assign_unique_2.py
new file mode 100755
index 000000000..f5cc5d72a
--- /dev/null
+++ b/test_regress/t/t_x_assign_unique_2.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt_all")
+test.pli_filename = "t/t_x_assign.cpp"
+test.top_filename = "t/t_x_assign.v"
+
+test.compile(
+    make_top_shell=False,
+    make_main=False,
+    verilator_flags2=["--x-assign unique --exe", "--x-initial 0", test.pli_filename],
+)
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability.out b/test_regress/t/t_x_rand_mt_stability.out
new file mode 100644
index 000000000..0eecc36cb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x486aeb2d
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability.py b/test_regress/t/t_x_rand_mt_stability.py
new file mode 100755
index 000000000..459473d4d
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+import glob
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
+
+other_logs = [x for x in glob.glob("t/t_x_rand_mt_stability_*.out") if "_zero" not in x]
+for other_log in other_logs:
+    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_mt_stability_add.out b/test_regress/t/t_x_rand_mt_stability_add.out
new file mode 100644
index 000000000..0eecc36cb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x486aeb2d
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add.py b/test_regress/t/t_x_rand_mt_stability_add.py
new file mode 100755
index 000000000..0dc0f0af8
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.out b/test_regress/t/t_x_rand_mt_stability_add_trace.out
new file mode 100644
index 000000000..0eecc36cb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x486aeb2d
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_add_trace.py b/test_regress/t/t_x_rand_mt_stability_add_trace.py
new file mode 100755
index 000000000..0e6d3dc4f
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_add_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.out b/test_regress/t/t_x_rand_mt_stability_trace.out
new file mode 100644
index 000000000..0eecc36cb
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x486aeb2d
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_trace.py b/test_regress/t/t_x_rand_mt_stability_trace.py
new file mode 100755
index 000000000..b7248be24
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.out b/test_regress/t/t_x_rand_mt_stability_zeros.out
new file mode 100644
index 000000000..1426e7828
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_zeros.out
@@ -0,0 +1,17 @@
+uninitialized = 0x00000000
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0x00000000
+big = 0x0000000000000000000000000000000000000000000000000000000000000000
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x0
+top.t.the_sub_yes_inline_2 no_init 0x0
+top.t.the_sub_no_inline_1 no_init 0x0
+top.t.the_sub_no_inline_2 no_init 0x0
+rand = 0xb3cf9302
+rand = 0xf0acf3e4
+rand = 0xca0ac74c
+rand = 0x4eddfc2c
+rand = 0x1919db69
+x_assigned = 0x00000000
+Last rand = 0x2d118c9b
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.py b/test_regress/t/t_x_rand_mt_stability_zeros.py
new file mode 100755
index 000000000..a82b8586d
--- /dev/null
+++ b/test_regress/t/t_x_rand_mt_stability_zeros.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vltmt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability.out b/test_regress/t/t_x_rand_stability.out
new file mode 100644
index 000000000..6a22ff04e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x486aeb2d
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability.py b/test_regress/t/t_x_rand_stability.py
new file mode 100755
index 000000000..a08c45ed6
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+import glob
+
+test.scenarios("vlt")
+
+test.compile(verilator_flags2=["--x-initial unique"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
+
+other_logs = [x for x in glob.glob("t/t_x_rand_stability_*.out") if "_zero" not in x]
+for other_log in other_logs:
+    test.files_identical(test.golden_filename, other_log)
diff --git a/test_regress/t/t_x_rand_stability.v b/test_regress/t/t_x_rand_stability.v
new file mode 100644
index 000000000..5642333f8
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability.v
@@ -0,0 +1,76 @@
+// DESCRIPTION: Verilator: Confirm x randomization stability
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+    int cyc = 0;
+
+    logic [31:0] uninitialized;
+    logic [31:0] x_assigned = '0;
+`ifdef ADD_SIGNAL
+    logic [31:0] added;
+    logic [31:0] x_assigned_added = '0;
+`endif
+    logic [31:0] unused;
+    logic [31:0] x_assigned_unused = '0;
+    logic [31:0] uninitialized2;
+    logic [255:0] big;
+    int random_init = $random();
+
+    sub_no_inline the_sub_no_inline_1();
+    sub_no_inline the_sub_no_inline_2();
+    sub_yes_inline the_sub_yes_inline_1();
+    sub_yes_inline the_sub_yes_inline_2();
+
+    initial begin
+        $display("uninitialized = 0x%x", uninitialized);
+        $display("x_assigned (initial) = 0x%x", x_assigned);
+        $display("uninitialized2 = 0x%x", uninitialized2);
+        $display("big = 0x%x", big);
+        $display("random_init = 0x%x", random_init);
+    end
+
+    always @(posedge clk) begin
+        x_assigned_unused = 'x;
+        x_assigned <= 'x;
+`ifdef ADD_SIGNAL
+        x_assigned_added <= 'x;
+`endif
+        cyc <= cyc + 1;
+        $display("rand = 0x%x", $random());
+        if (cyc == 4) begin
+            $display("x_assigned = 0x%x", x_assigned);
+`ifndef NOT_RAND
+            if (uninitialized == uninitialized2) $stop();
+            if (the_sub_yes_inline_1.no_init == the_sub_yes_inline_2.no_init) $stop();
+            if (the_sub_no_inline_1.no_init == the_sub_no_inline_2.no_init) $stop();
+`endif
+`ifdef ADD_SIGNAL
+            if (added == 0) $stop();
+            if (x_assigned_added == 0) $stop();
+`endif
+            $display("Last rand = 0x%x", $random());
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+
+endmodule
+
+module sub_no_inline; /* verilator no_inline_module */
+    logic [63:0] no_init;
+    initial $display("%m no_init 0x%0x", no_init);
+endmodule
+
+module sub_yes_inline; /* verilator inline_module */
+    logic [63:0] no_init;
+    initial $display("%m no_init 0x%0x", no_init);
+endmodule
diff --git a/test_regress/t/t_x_rand_stability_add.out b/test_regress/t/t_x_rand_stability_add.out
new file mode 100644
index 000000000..6a22ff04e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x486aeb2d
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add.py b/test_regress/t/t_x_rand_stability_add.py
new file mode 100755
index 000000000..c2766d031
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_add_trace.out b/test_regress/t/t_x_rand_stability_add_trace.out
new file mode 100644
index 000000000..6a22ff04e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x486aeb2d
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_add_trace.py b/test_regress/t/t_x_rand_stability_add_trace.py
new file mode 100755
index 000000000..ea6207b6e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_add_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DADD_SIGNAL", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_trace.out b/test_regress/t/t_x_rand_stability_trace.out
new file mode 100644
index 000000000..6a22ff04e
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_trace.out
@@ -0,0 +1,17 @@
+uninitialized = 0xf5bbcbc0
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0xa979eb54
+big = 0xa20c93ac50d8c57d4c80949aa68e82775da6af98ce08f75dc6ccfad97b059a33
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x4a544f7798b83fc8
+top.t.the_sub_yes_inline_2 no_init 0x19b7000ee0472c9
+top.t.the_sub_no_inline_1 no_init 0x38121a34978975dd
+top.t.the_sub_no_inline_2 no_init 0x9022c84ae0fa3cf6
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x486aeb2d
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_trace.py b/test_regress/t/t_x_rand_stability_trace.py
new file mode 100755
index 000000000..05c2f308d
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_trace.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "--trace"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+2"], expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_x_rand_stability_zeros.out b/test_regress/t/t_x_rand_stability_zeros.out
new file mode 100644
index 000000000..d54e3ecd4
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_zeros.out
@@ -0,0 +1,17 @@
+uninitialized = 0x00000000
+x_assigned (initial) = 0x00000000
+uninitialized2 = 0x00000000
+big = 0x0000000000000000000000000000000000000000000000000000000000000000
+random_init = 0x952aaa76
+top.t.the_sub_yes_inline_1 no_init 0x0
+top.t.the_sub_yes_inline_2 no_init 0x0
+top.t.the_sub_no_inline_1 no_init 0x0
+top.t.the_sub_no_inline_2 no_init 0x0
+rand = 0xe3e54aaa
+rand = 0xe85acf2d
+rand = 0x15e12c6a
+rand = 0x0f7f28c0
+rand = 0xe189c52a
+x_assigned = 0x00000000
+Last rand = 0xf0700dbf
+*-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_zeros.py b/test_regress/t/t_x_rand_stability_zeros.py
new file mode 100755
index 000000000..c872e4dd0
--- /dev/null
+++ b/test_regress/t/t_x_rand_stability_zeros.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+test.top_filename = "t/t_x_rand_stability.v"
+
+test.compile(verilator_flags2=["--x-initial unique", "-DNOT_RAND"])
+
+test.execute(all_run_flags=["+verilator+rand+reset+0"], expect_filename=test.golden_filename)
+
+test.passes()

From 66259d8909c69938379a260d6f1ea445e2c6c784 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Tue, 27 May 2025 10:11:56 -0400
Subject: [PATCH 108/211] Fix GCC 10 read-only linker error (#6040)

---
 src/V3ExecGraph.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index e20ff26d4..473e42620 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -312,6 +312,7 @@ public:
 
 uint32_t ThreadSchedule::s_nextId = 0;
 std::unordered_map<const ExecMTask*, ThreadSchedule::MTaskState> ThreadSchedule::mtaskState{};
+constexpr double V3ExecGraph::ThreadSchedule::s_threadBoxWidth;
 
 //######################################################################
 // PackThreads

From 76aced4d40afde8430281fcc1a28e97f9084fa87 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Tue, 27 May 2025 18:35:21 -0400
Subject: [PATCH 109/211] Fix parameter types of user defined arrays (#6042)

---
 src/V3LinkDot.cpp             | 65 ++++++++++++++++++++++++++---------
 test_regress/t/t_type_param.v | 24 +++++++++++++
 2 files changed, 73 insertions(+), 16 deletions(-)

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 4ecb8d429..a853690fe 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2353,6 +2353,9 @@ class LinkDotResolveVisitor final : public VNVisitor {
     std::map<AstNode*, AstPin*> m_usedPins;  // Pin used in this cell, map to duplicate
     std::map<std::string, AstNodeModule*> m_modulesToRevisit;  // Modules to revisit a second time
     AstNode* m_lastDeferredp = nullptr;  // Last node which requested a revisit of its module
+    bool m_maybePackedArray
+        = false;  // Array select parse trees may actually be packed array datatypes
+    AstNodeDType* m_packedArrayDtp = nullptr;  // Datatype reference for packed array
 
     struct DotStates final {
         DotPosition m_dotPos;  // Scope part of dotted resolution
@@ -3401,8 +3404,12 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (ok) {
                     AstRefDType* const refp = new AstRefDType{nodep->fileline(), nodep->name()};
                     refp->typedefp(defp);
-                    replaceWithCheckBreak(nodep, refp);
-                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    if (m_maybePackedArray) {
+                        m_packedArrayDtp = refp;
+                    } else {
+                        replaceWithCheckBreak(nodep, refp);
+                        VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                    }
                 }
             } else if (AstParamTypeDType* const defp = VN_CAST(foundp->nodep(), ParamTypeDType)) {
                 ok = (m_ds.m_dotPos == DP_NONE || m_ds.m_dotPos == DP_SCOPE);
@@ -4048,22 +4055,48 @@ class LinkDotResolveVisitor final : public VNVisitor {
             m_ds.m_dotErr = true;
             return;
         }
-        iterateAndNextNull(nodep->fromp());
-        symIterateNull(nodep->rhsp(), m_curSymp);
-        symIterateNull(nodep->thsp(), m_curSymp);
+        AstNodeDType* packedArrayDtp = nullptr;  // Datatype reference for packed array
+        {
+            VL_RESTORER(m_packedArrayDtp);
+            {
+                VL_RESTORER(m_maybePackedArray);
+                m_maybePackedArray = true;
+                iterateAndNextNull(nodep->fromp());
+            }
+            symIterateNull(nodep->rhsp(), m_curSymp);
+            symIterateNull(nodep->thsp(), m_curSymp);
 
-        if (nodep->attrp()) {
-            AstNode* const attrp = nodep->attrp()->unlinkFrBack();
-            VL_DO_DANGLING(attrp->deleteTree(), attrp);
-        }
-        AstNode* const basefromp = AstArraySel::baseFromp(nodep, false);
-        if (VN_IS(basefromp, Replicate)) {
-            // From {...}[...] syntax in IEEE 2017
-            if (basefromp) UINFO(9, indent() << " Related node: " << basefromp);
-        } else {
-            nodep->attrp(new AstAttrOf{nodep->fileline(), VAttrType::VAR_BASE,
-                                       basefromp->cloneTree(false)});
+            if (m_packedArrayDtp) {
+                AstRange* const newRangep
+                    = new AstRange(nodep->fileline(), nodep->rhsp()->unlinkFrBack(),
+                                   nodep->thsp()->unlinkFrBack());
+                AstPackArrayDType* newArrayTypep
+                    = new AstPackArrayDType(nodep->fileline(), m_packedArrayDtp, newRangep);
+                newArrayTypep->childDTypep(m_packedArrayDtp);
+                newArrayTypep->refDTypep(nullptr);
+                if (m_maybePackedArray) {
+                    packedArrayDtp = newArrayTypep;
+                } else {
+                    replaceWithCheckBreak(nodep, newArrayTypep);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
+                }
+            } else {
+                if (nodep->attrp()) {
+                    AstNode* const attrp = nodep->attrp()->unlinkFrBack();
+                    VL_DO_DANGLING(attrp->deleteTree(), attrp);
+                }
+                AstNode* const basefromp = AstArraySel::baseFromp(nodep, false);
+                if (VN_IS(basefromp, Replicate)) {
+                    // From {...}[...] syntax in IEEE 2017
+                    if (basefromp) UINFO(9, indent() << " Related node: " << basefromp);
+                } else {
+                    nodep->attrp(new AstAttrOf{nodep->fileline(), VAttrType::VAR_BASE,
+                                               basefromp->cloneTree(false)});
+                }
+            }
         }
+
+        if (packedArrayDtp) { m_packedArrayDtp = packedArrayDtp; }
     }
     void visit(AstMemberSel* nodep) override {
         // checkNoDot not appropriate, can be under a dot
diff --git a/test_regress/t/t_type_param.v b/test_regress/t/t_type_param.v
index 891f7da2a..1bb4f7f9f 100644
--- a/test_regress/t/t_type_param.v
+++ b/test_regress/t/t_type_param.v
@@ -40,6 +40,20 @@ module t();
    foo #(.bar (logic [ $bits(qux3) - 1 : 0]))
    foo_inst3 (.bar_size (bar_size3));
 
+   typedef struct packed {
+       logic foo;
+       logic bar;
+   } some_struct_t;
+   int bar_size4;
+
+   foo #(.bar (some_struct_t [7:0]))
+   foo_inst4 (.bar_size (bar_size4));
+
+   int bar_size5;
+
+   foo #(.bar (some_struct_t [2:0] [5:0]))
+   foo_inst5 (.bar_size (bar_size5));
+
    localparam bar_bits = 13;
    int bar_size_wrapper;
 
@@ -82,6 +96,16 @@ module t();
                  bar_size3, $bits(qux3));
          $stop();
       end
+      if (bar_size4 != $bits(some_struct_t)*8) begin
+         $display("%m: bar_size4 != bits of some_struct_t * 8 (%0d, %0d)",
+                 bar_size4, $bits(some_struct_t) * 8);
+         $stop();
+      end
+      if (bar_size5 != $bits(some_struct_t)*3*6) begin
+         $display("%m: bar_size5 != bits of some_struct_t * 3 * 6 (%0d, %0d)",
+                 bar_size5, $bits(some_struct_t) * 3 * 6);
+         $stop();
+      end
       if (bar_size_wrapper != bar_bits) begin
          $display("%m: bar_size_wrapper != bar_bits (%0d, %0d)",
                  bar_size_wrapper, bar_bits);

From 5fcd0e52e72e9f5e28d27fbfd763b6a12a65aca9 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Tue, 27 May 2025 21:14:09 -0400
Subject: [PATCH 110/211] Fix casting to arrays of enums (#6044)

---
 src/V3Ast.cpp           | 2 +-
 test_regress/t/t_cast.v | 9 +++++++++
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index a55d9e45e..2514a53bd 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -1583,7 +1583,7 @@ static VCastable computeCastableImp(const AstNodeDType* toDtp, const AstNodeDTyp
         return VCastable::COMPATIBLE;
     } else if (toNumericable) {
         if (fromNumericable) return VCastable::COMPATIBLE;
-    } else if (VN_IS(toDtp, EnumDType)) {
+    } else if (VN_IS(toBaseDtp, EnumDType)) {
         if (VN_IS(fromBaseDtp, EnumDType) && toDtp->sameTree(fromDtp))
             return VCastable::ENUM_IMPLICIT;
         if (fromNumericable) return VCastable::ENUM_EXPLICIT;
diff --git a/test_regress/t/t_cast.v b/test_regress/t/t_cast.v
index 7d19dc870..98fba7f4e 100644
--- a/test_regress/t/t_cast.v
+++ b/test_regress/t/t_cast.v
@@ -28,6 +28,8 @@ module t;
       ONE = 1
    } enum_t;
 
+   typedef enum_t [3:0] enums_t;
+
    packed_t pdata;
    packed_t pdata_reg;
    packed2_t pdata2_reg;
@@ -37,6 +39,7 @@ module t;
 
    mc_t o;
    enum_t e;
+   enums_t es;
 
    intf the_intf();
 
@@ -69,6 +72,7 @@ module t;
    logic [31:0] thirty_two_bits;
    two_dee_t two_dee_sig;
 
+   int i;
    initial begin
       if (logic8bit != 8'h12) $stop;
       if (4'shf > 4'sh0) $stop;
@@ -95,6 +99,11 @@ module t;
       e = enum_t'(pdata_reg);
       if (e != ONE) $stop;
 
+      es = {ONE, ONE, ONE, ONE};
+      for (i = 0; i < 4; i++) if (es[i] != ONE) $stop;
+      es = enums_t'(64'h0001_0001_0001_0001);
+      for (i = 0; i < 4; i++) if (es[i] != ONE) $stop;
+
       o = tocast_t'(4'b1);
       if (o != 4'b1) $stop;
 

From 7dbe4f18075b0635d834d141ed9322266957c2e7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Thu, 29 May 2025 16:31:57 +0200
Subject: [PATCH 111/211] Fix V3OrderParallel scoring contraction hang (#6052)

---
 src/V3OrderParallel.cpp                       | 145 +++++++++---------
 test_regress/t/t_instr_count_dpi_large.cpp    |  12 ++
 test_regress/t/t_instr_count_dpi_large.py     |  27 ++++
 test_regress/t/t_instr_count_dpi_large.v      |  26 ++++
 .../t/t_instr_count_dpi_large_hier.py         |  29 ++++
 5 files changed, 170 insertions(+), 69 deletions(-)
 create mode 100644 test_regress/t/t_instr_count_dpi_large.cpp
 create mode 100755 test_regress/t/t_instr_count_dpi_large.py
 create mode 100644 test_regress/t/t_instr_count_dpi_large.v
 create mode 100755 test_regress/t/t_instr_count_dpi_large_hier.py

diff --git a/src/V3OrderParallel.cpp b/src/V3OrderParallel.cpp
index 4111d244b..8dbe5291c 100644
--- a/src/V3OrderParallel.cpp
+++ b/src/V3OrderParallel.cpp
@@ -127,7 +127,7 @@ constexpr unsigned PART_SIBLING_EDGE_LIMIT = 26;
 // and we probably don't want a huge number of mTaskGraphp in practice anyway
 // (50 to 100 is typical.)
 //
-// If the user doesn't give one with '--threads-max-mTaskGraphp', we'll set the
+// If the user doesn't give one with '--threads-max-mtasks', we'll set the
 // maximum # of MTasks to
 //  (# of threads * PART_DEFAULT_MAX_MTASKS_PER_THREAD)
 constexpr unsigned PART_DEFAULT_MAX_MTASKS_PER_THREAD = 50;
@@ -137,7 +137,7 @@ constexpr unsigned PART_DEFAULT_MAX_MTASKS_PER_THREAD = 50;
 //######################################################################
 // Misc graph and assertion utilities
 
-static void partCheckCachedScoreVsActual(uint32_t cached, uint32_t actual) {
+static void partCheckCachedScoreVsActual(uint64_t cached, uint64_t actual) {
 #if PART_STEPPED_COST
     // Cached CP might be a little bigger than actual, due to stepped CPs.
     // Example:
@@ -160,8 +160,8 @@ static void partCheckCachedScoreVsActual(uint32_t cached, uint32_t actual) {
 struct EdgeKey final {
     // Node: Structure layout chosen to minimize padding in PairingHeap<*>::Node
     uint64_t m_id;  // Unique ID part of edge score
-    uint32_t m_score;  // Score part of ID
-    void increase(uint32_t score) {
+    uint64_t m_score;  // Score part of ID
+    void increase(uint64_t score) {
         UDEBUGONLY(UASSERT(score >= m_score, "Must increase"););
         m_score = score;
     }
@@ -179,7 +179,7 @@ using EdgeHeap = PairingHeap<EdgeKey>;
 struct MergeCandidateKey final {
     // Note: Structure layout chosen to minimize padding in PairingHeap<*>::Node
     uint64_t m_id;  // Unique ID part of edge score
-    uint32_t m_score;  // Score part of ID
+    uint64_t m_score;  // Score part of ID
     bool operator<(const MergeCandidateKey& other) const {
         // First by Score then by ID, but notice that we want minimums using a max-heap, so reverse
         return m_score > other.m_score || (m_score == other.m_score && m_id > other.m_id);
@@ -222,7 +222,7 @@ public:
     bool mergeWouldCreateCycle() const;  // Instead of virtual method
 
     inline void rescore();
-    uint32_t score() const { return m_key.m_score; }
+    uint64_t score() const { return m_key.m_score; }
 
     static MergeCandidate* heapNodeToElem(MergeCandidateScoreboard::Node* nodep) {
         return static_cast<MergeCandidate*>(nodep);
@@ -290,7 +290,7 @@ public:
     // with updated critical path.
     void resetCriticalPaths();
 
-    uint32_t cachedCp(GraphWay way) const { return m_edgeHeapNode[way].key().m_score; }
+    uint64_t cachedCp(GraphWay way) const { return m_edgeHeapNode[way].key().m_score; }
 
     // Convert from the address of the m_edgeHeapNode[way] in an MTaskEdge back to the MTaskEdge
     static const MTaskEdge* toMTaskEdge(GraphWay way, const EdgeHeap::Node* nodep) {
@@ -327,12 +327,12 @@ private:
 
     // Cost estimate for this LogicMTask, derived from V3InstrCount.
     // In abstract time units.
-    uint32_t m_cost = 0;
+    uint64_t m_cost = 0;
 
     // Cost of critical paths going FORWARD from graph-start to the start
     // of this vertex, and also going REVERSE from the end of the graph to
     // the end of the vertex. Same units as m_cost.
-    std::array<uint32_t, GraphWay::NUM_WAYS> m_critPathCost;
+    std::array<uint64_t, GraphWay::NUM_WAYS> m_critPathCost;
 
     const uint32_t m_id;  // Unique LogicMTask ID number
     static uint32_t s_nextId;  // Next ID number to use
@@ -361,7 +361,7 @@ public:
         : V3GraphVertex{graphp}
         , m_id{s_nextId++} {
         UASSERT(s_nextId < 0xFFFFFFFFUL, "Too many mTaskGraphp");
-        for (uint32_t& item : m_critPathCost) item = 0;
+        for (uint64_t& item : m_critPathCost) item = 0;
         if (mVtxp) {
             m_mVertices.linkBack(mVtxp);
             if (const OrderLogicVertex* const olvp = mVtxp->logicp()) {
@@ -392,10 +392,10 @@ public:
     // the final C++ output.
     uint32_t id() const { return m_id; }
     // Abstract cost of every logic mtask
-    uint32_t cost() const VL_MT_SAFE { return m_cost; }
-    void setCost(uint32_t cost) { m_cost = cost; }  // For tests only
-    uint32_t stepCost() const { return stepCost(m_cost); }
-    static uint32_t stepCost(uint32_t cost) {
+    uint64_t cost() const VL_MT_SAFE { return m_cost; }
+    void setCost(uint64_t cost) { m_cost = cost; }  // For tests only
+    uint64_t stepCost() const { return stepCost(m_cost); }
+    static uint64_t stepCost(uint64_t cost) {
 #if PART_STEPPED_COST
         // Round cost up to the nearest 5%. Use this when computing all
         // critical paths. The idea is that critical path changes don't
@@ -410,7 +410,7 @@ public:
         logcost = ceil(logcost);
         logcost = logcost / 20.0;
 
-        const uint32_t stepCost = static_cast<uint32_t>(exp(logcost));
+        const uint64_t stepCost = static_cast<uint64_t>(exp(logcost));
         UDEBUGONLY(UASSERT_STATIC(stepCost >= cost, "stepped cost error exceeded"););
         UDEBUGONLY(UASSERT_STATIC(stepCost <= ((cost * 11 / 10)), "stepped cost error exceeded"););
         return stepCost;
@@ -426,7 +426,7 @@ public:
         // Add to the edge heap
         LogicMTask* const relativep = edgep->furtherMTaskp<N_Way>();
         // Value is !way cp to this edge
-        const uint32_t cp = relativep->stepCost() + relativep->critPathCost(inv);
+        const uint64_t cp = relativep->stepCost() + relativep->critPathCost(inv);
         //
         m_edgeHeap[way].insert(&edgep->m_edgeHeapNode[way], {relativep->id(), cp});
     }
@@ -462,8 +462,8 @@ public:
         for (const V3GraphEdge& edge : edges<N_Way>()) {
             const LogicMTask* const relativep
                 = static_cast<const LogicMTask*>(edge.furtherp<N_Way>());
-            const uint32_t cachedCp = static_cast<const MTaskEdge&>(edge).cachedCp(way);
-            const uint32_t cp = relativep->critPathCost(way.invert()) + relativep->stepCost();
+            const uint64_t cachedCp = static_cast<const MTaskEdge&>(edge).cachedCp(way);
+            const uint64_t cp = relativep->critPathCost(way.invert()) + relativep->stepCost();
             partCheckCachedScoreVsActual(cachedCp, cp);
         }
     }
@@ -477,10 +477,10 @@ public:
         return out.str();
     }
 
-    void setCritPathCost(GraphWay way, uint32_t cost) { m_critPathCost[way] = cost; }
-    uint32_t critPathCost(GraphWay way) const { return m_critPathCost[way]; }
+    void setCritPathCost(GraphWay way, uint64_t cost) { m_critPathCost[way] = cost; }
+    uint64_t critPathCost(GraphWay way) const { return m_critPathCost[way]; }
     template <GraphWay::en N_Way>
-    uint32_t critPathCostWithout(const V3GraphEdge* withoutp) const {
+    uint64_t critPathCostWithout(const V3GraphEdge* withoutp) const {
         const GraphWay way{N_Way};
         const GraphWay inv = way.invert();
         // Compute the critical path cost wayward to this node, without considering edge
@@ -574,7 +574,7 @@ public:
 
         // Follow the entire critical path
         std::vector<const LogicMTask*> path;
-        uint32_t totalCost = 0;
+        uint64_t totalCost = 0;
         for (const LogicMTask* nextp = startp; nextp;) {
             path.push_back(nextp);
             totalCost += nextp->cost();
@@ -624,25 +624,25 @@ bool MergeCandidate::mergeWouldCreateCycle() const {
                          : static_cast<const MTaskEdge*>(this)->mergeWouldCreateCycle();
 }
 
-static uint32_t siblingScore(const SiblingMC* sibsp) {
+static uint64_t siblingScore(const SiblingMC* sibsp) {
     const LogicMTask* const ap = sibsp->ap();
     const LogicMTask* const bp = sibsp->bp();
-    const uint32_t mergedCpCostFwd
+    const uint64_t mergedCpCostFwd
         = std::max(ap->critPathCost(GraphWay::FORWARD), bp->critPathCost(GraphWay::FORWARD));
-    const uint32_t mergedCpCostRev
+    const uint64_t mergedCpCostRev
         = std::max(ap->critPathCost(GraphWay::REVERSE), bp->critPathCost(GraphWay::REVERSE));
     return mergedCpCostRev + mergedCpCostFwd + LogicMTask::stepCost(ap->cost() + bp->cost());
 }
 
-static uint32_t edgeScore(const MTaskEdge* edgep) {
+static uint64_t edgeScore(const MTaskEdge* edgep) {
     // Score this edge. Lower is better. The score is the new local CP
     // length if we merge these mTaskGraphp.  ("Local" means the longest
     // critical path running through the merged node.)
     const LogicMTask* const top = edgep->toMTaskp();
     const LogicMTask* const fromp = edgep->fromMTaskp();
-    const uint32_t mergedCpCostFwd = std::max(fromp->critPathCost(GraphWay::FORWARD),
+    const uint64_t mergedCpCostFwd = std::max(fromp->critPathCost(GraphWay::FORWARD),
                                               top->critPathCostWithout<GraphWay::FORWARD>(edgep));
-    const uint32_t mergedCpCostRev = std::max(fromp->critPathCostWithout<GraphWay::REVERSE>(edgep),
+    const uint64_t mergedCpCostRev = std::max(fromp->critPathCostWithout<GraphWay::REVERSE>(edgep),
                                               top->critPathCost(GraphWay::REVERSE));
     return mergedCpCostRev + mergedCpCostFwd + LogicMTask::stepCost(fromp->cost() + top->cost());
 }
@@ -724,7 +724,7 @@ static void partInitHalfCriticalPaths(V3Graph& mTaskGraph, bool checkOnly) {
     for (const V3GraphVertex* vertexp; (vertexp = order.nextp());) {
         const LogicMTask* const mtaskcp = static_cast<const LogicMTask*>(vertexp);
         LogicMTask* const mtaskp = const_cast<LogicMTask*>(mtaskcp);
-        uint32_t cpCost = 0;
+        uint64_t cpCost = 0;
 #if VL_DEBUG
         std::unordered_set<V3GraphVertex*> relatives;
 #endif
@@ -739,7 +739,7 @@ static void partInitHalfCriticalPaths(V3Graph& mTaskGraph, bool checkOnly) {
 #endif
             const LogicMTask* const relativep = static_cast<LogicMTask*>(edge.furtherp<rev>());
             cpCost = std::max(cpCost, (relativep->critPathCost(way)
-                                       + static_cast<uint32_t>(relativep->stepCost())));
+                                       + static_cast<uint64_t>(relativep->stepCost())));
         }
         if (checkOnly) {
             partCheckCachedScoreVsActual(mtaskp->critPathCost(way), cpCost);
@@ -798,8 +798,8 @@ class PropagateCp final {
     // We keep pending vertices in a heap during critical path propagation
     struct PendingKey final {
         LogicMTask* m_mtaskp;  // The vertex in the heap
-        uint32_t m_score;  // The score of this entry
-        void increase(uint32_t score) {
+        uint64_t m_score;  // The score of this entry
+        void increase(uint64_t score) {
             UDEBUGONLY(UASSERT(score >= m_score, "Must increase"););
             m_score = score;
         }
@@ -861,7 +861,7 @@ private:
     }
 
 public:
-    void cpHasIncreased(V3GraphVertex* vxp, uint32_t newInclusiveCp) {
+    void cpHasIncreased(V3GraphVertex* vxp, uint64_t newInclusiveCp) {
         constexpr GraphWay way{N_Way};
         constexpr GraphWay inv{way.invert()};
 
@@ -877,13 +877,13 @@ public:
                 relativep->m_edgeHeap[inv].increaseKey(&edgeHeapNode, newInclusiveCp);
             }
 
-            const uint32_t critPathCost = relativep->critPathCost(way);
+            const uint64_t critPathCost = relativep->critPathCost(way);
 
             if (critPathCost >= newInclusiveCp) continue;
 
             // relativep's critPathCost() is out of step with its longest !wayward edge.
             // Schedule that to be resolved.
-            const uint32_t newVal = newInclusiveCp - critPathCost;
+            const uint64_t newVal = newInclusiveCp - critPathCost;
 
             if (PendingHeapNode* const nodep = static_cast<PendingHeapNode*>(relativep->userp())) {
                 // Already in heap. Increase score if needed.
@@ -924,16 +924,16 @@ public:
             m_pendingHeap.remove(maxp);
             // Pick up values
             LogicMTask* const mtaskp = maxp->key().m_mtaskp;
-            const uint32_t cpGrowBy = maxp->key().m_score;
+            const uint64_t cpGrowBy = maxp->key().m_score;
             // Free the heap node, we are done with it
             freeNode(maxp);
             mtaskp->userp(nullptr);
             // Update the critPathCost of mtaskp, that was out-of-date with respect to its edges
-            const uint32_t startCp = mtaskp->critPathCost(way);
-            const uint32_t newCp = startCp + cpGrowBy;
+            const uint64_t startCp = mtaskp->critPathCost(way);
+            const uint64_t newCp = startCp + cpGrowBy;
             if (VL_UNLIKELY(m_slowAsserts)) {
                 // Check that CP matches that of the longest edge wayward of vxp.
-                const uint32_t edgeCp = mtaskp->m_edgeHeap[inv].max()->key().m_score;
+                const uint64_t edgeCp = mtaskp->m_edgeHeap[inv].max()->key().m_score;
                 UASSERT_OBJ(edgeCp == newCp, mtaskp, "CP doesn't match longest wayward edge");
                 // Confirm that we only set each node's CP once.  That's an
                 // important property of PropagateCp which allows it to be far
@@ -1114,15 +1114,17 @@ class Contraction final {
     // TYPES
     // New CP information for mtaskp reflecting an upcoming merge
     struct NewCp final {
-        uint32_t cp;
-        uint32_t propagateCp;
+        uint64_t cp;
+        uint64_t propagateCp;
         bool propagate;
     };
 
     // MEMBERS
     V3Graph& m_mTaskGraph;  // The Mtask graph
-    uint32_t m_scoreLimit;  // Sloppy score allowed when picking merges
-    uint32_t m_scoreLimitBeforeRescore = 0xffffffff;  // Next score rescore at
+    uint64_t m_scoreLimit;  // Sloppy score allowed when picking merges
+    uint64_t m_scoreLimitBeforeRescore
+        = std::numeric_limits<decltype(m_scoreLimitBeforeRescore)>::max();  // Next score rescore
+                                                                            // at
     unsigned m_mergesSinceRescore = 0;  // Merges since last rescore
     const bool m_slowAsserts;  // Take extra time to validate algorithm
     MergeCandidateScoreboard m_sb;  // Scoreboard
@@ -1135,7 +1137,7 @@ class Contraction final {
 
 public:
     // CONSTRUCTORS
-    Contraction(V3Graph& mTaskGraph, uint32_t scoreLimit, LogicMTask* entryMTaskp,
+    Contraction(V3Graph& mTaskGraph, uint64_t scoreLimit, LogicMTask* entryMTaskp,
                 LogicMTask* exitMTaskp, bool slowAsserts)
         : m_mTaskGraph{mTaskGraph}
         , m_scoreLimit{scoreLimit}
@@ -1199,9 +1201,9 @@ public:
                 UASSERT(!m_sb.needsRescore(mergeCanp),
                         "Need-rescore items should not be returned by bestp");
             }
-            const uint32_t cachedScore = mergeCanp->score();
+            const uint64_t cachedScore = mergeCanp->score();
             mergeCanp->rescore();
-            const uint32_t actualScore = mergeCanp->score();
+            const uint64_t actualScore = mergeCanp->score();
 
             if (actualScore > cachedScore) {
                 // Cached score is out-of-date.
@@ -1226,12 +1228,16 @@ public:
                     // limit and keep going...
                     const unsigned mtaskCount = m_mTaskGraph.vertices().size();
                     if (mtaskCount > maxMTasks) {
-                        const uint32_t oldLimit = m_scoreLimit;
+                        const uint64_t oldLimit = m_scoreLimit;
                         m_scoreLimit = (m_scoreLimit * 120) / 100;
-                        v3Global.rootp()->fileline()->v3warn(
-                            UNOPTTHREADS, "Thread scheduler is unable to provide requested "
-                                          "parallelism; suggest asking for fewer threads.");
-                        UINFO(1,
+                        FileLine* const flp = v3Global.rootp()->fileline();
+                        if (!flp->warnIsOff(V3ErrorCode::UNOPTTHREADS)) {
+                            flp->v3warn(UNOPTTHREADS,
+                                        "Thread scheduler is unable to provide requested "
+                                        "parallelism; suggest asking for fewer threads.");
+                            flp->modifyWarnOff(V3ErrorCode::UNOPTTHREADS, true);
+                        }
+                        UINFO(6,
                               "Critical path limit was=" << oldLimit << " now=" << m_scoreLimit);
                         continue;
                     }
@@ -1322,7 +1328,7 @@ private:
         // Return new wayward-CP for mtaskp reflecting its upcoming merge
         // with otherp. Set 'result.propagate' if mtaskp's wayward
         // relatives will see a new wayward CP from this merge.
-        uint32_t newCp;
+        uint64_t newCp;
         if (mergeEdgep) {
             if (mtaskp == mergeEdgep->furtherp<way>()) {
                 newCp = std::max(otherp->critPathCost(way),
@@ -1335,8 +1341,8 @@ private:
             newCp = std::max(otherp->critPathCost(way), mtaskp->critPathCost(way));
         }
 
-        const uint32_t origRelativesCp = mtaskp->critPathCost(way) + mtaskp->stepCost();
-        const uint32_t newRelativesCp
+        const uint64_t origRelativesCp = mtaskp->critPathCost(way) + mtaskp->stepCost();
+        const uint64_t newRelativesCp
             = newCp + LogicMTask::stepCost(mtaskp->cost() + otherp->cost());
 
         NewCp result;
@@ -1506,7 +1512,8 @@ private:
         UINFO(6, "Did rescore. Merges since previous = " << m_mergesSinceRescore);
 
         m_mergesSinceRescore = 0;
-        m_scoreLimitBeforeRescore = 0xffffffff;
+        m_scoreLimitBeforeRescore
+            = std::numeric_limits<decltype(m_scoreLimitBeforeRescore)>::max();
     }
 
     void makeSiblingMC(LogicMTask* ap, LogicMTask* bp) {
@@ -1545,8 +1552,8 @@ private:
         // functions are efficient enough and using more optimized methods (e.g.: sorting networks)
         // has no measurable benefit.
         struct alignas(16) SortingRecord final {
-            uint64_t m_id;
-            uint32_t m_cp;
+            uint64_t m_cp;
+            uint32_t m_id;
             uint8_t m_idx;
             static_assert(PART_SIBLING_EDGE_LIMIT <= std::numeric_limits<uint8_t>::max(),
                           "m_idx must fit all indices into 'neighbors'");
@@ -1689,7 +1696,7 @@ public:
         selfTestChain();
     }
 
-    static void apply(V3Graph& mTaskGraph, uint32_t scoreLimit, LogicMTask* entryMTaskp,
+    static void apply(V3Graph& mTaskGraph, uint64_t scoreLimit, LogicMTask* entryMTaskp,
                       LogicMTask* exitMTaskp, bool slowAsserts) {
         Contraction{mTaskGraph, scoreLimit, entryMTaskp, exitMTaskp, slowAsserts};
     }
@@ -2056,18 +2063,18 @@ static void debugMTaskGraphStats(V3Graph& graph, const string& stage) {
 
     UINFO(4, "\n");
     UINFO(4, " Stats for " << stage);
-    uint32_t mtaskCount = 0;
-    uint32_t totalCost = 0;
-    std::array<uint32_t, 32> mtaskCostHist;
-    mtaskCostHist.fill(0);
+    uint64_t mtaskCount = 0;
+    uint64_t totalCost = 0;
+    constexpr int scoreBits = std::numeric_limits<uint64_t>::digits;
+    std::array<uint64_t, scoreBits> mtaskCostHist{};
     for (const V3GraphVertex& mtask : graph.vertices()) {
         ++mtaskCount;
-        uint32_t mtaskCost = mtask.as<const LogicMTask>()->cost();
+        uint64_t mtaskCost = mtask.as<const LogicMTask>()->cost();
         totalCost += mtaskCost;
 
         unsigned log2Cost = 0;
         while (mtaskCost >>= 1) ++log2Cost;
-        UASSERT(log2Cost < 32, "log2Cost overflow in debugMTaskGraphStats");
+        UASSERT(log2Cost < scoreBits, "log2Cost overflow in debugMTaskGraphStats");
         ++mtaskCostHist[log2Cost];
     }
     UINFO(4, "  Total mtask cost = " << totalCost);
@@ -2075,7 +2082,7 @@ static void debugMTaskGraphStats(V3Graph& graph, const string& stage) {
     UINFO(4, "  Avg cost / mtask = " << ((mtaskCount > 0) ? cvtToStr(totalCost / mtaskCount)
                                                           : "INF!"));
     UINFO(4, "  Histogram of mtask costs:");
-    for (unsigned i = 0; i < 32; ++i) {
+    for (unsigned i = 0; i < scoreBits; ++i) {
         if (mtaskCostHist[i]) {
             UINFO(4, "    2^" << i << ": " << mtaskCostHist[i]);
             V3Stats::addStat("MTask graph, " + stage + ", mtask cost 2^" + (i < 10 ? " " : "")
@@ -2185,8 +2192,8 @@ class Partitioner final {
         return fanIn + fanOut == 4;
     }
 
-    uint32_t setupMTaskDeps() VL_MT_DISABLED {
-        uint32_t totalGraphCost = 0;
+    uint64_t setupMTaskDeps() VL_MT_DISABLED {
+        uint64_t totalGraphCost = 0;
 
         // Artificial single entry point vertex in the MTask graph to allow sibling merges.
         // This is required as otherwise disjoint sub-graphs could not be merged, but the
@@ -2280,7 +2287,7 @@ class Partitioner final {
         // OrderMoveVertex. Over time, we'll merge MTasks together and
         // eventually each MTask will wrap a large number of MTaskMoveVertices
         // (and the logic nodes therein.)
-        const uint32_t totalGraphCost = setupMTaskDeps();
+        const uint64_t totalGraphCost = setupMTaskDeps();
 
         debugMTaskGraphStats(*m_mTaskGraphp, "initial");
 
@@ -2328,7 +2335,7 @@ class Partitioner final {
             // when scheduling them.
             const unsigned fudgeNumerator = 3;
             const unsigned fudgeDenominator = 5;
-            const uint32_t cpLimit
+            const uint64_t cpLimit
                 = ((totalGraphCost * fudgeNumerator) / (targetParFactor * fudgeDenominator));
             UINFO(4, "Partitioner set cpLimit = " << cpLimit);
 
diff --git a/test_regress/t/t_instr_count_dpi_large.cpp b/test_regress/t/t_instr_count_dpi_large.cpp
new file mode 100644
index 000000000..5e7b3b122
--- /dev/null
+++ b/test_regress/t/t_instr_count_dpi_large.cpp
@@ -0,0 +1,12 @@
+// -*- mode: C++; c-file-style: "cc-mode" -*-
+//*************************************************************************
+//
+// Copyright 2025 by Antmicro. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+//
+//*************************************************************************
+
+extern "C" void dpii_call(void) {}
diff --git a/test_regress/t/t_instr_count_dpi_large.py b/test_regress/t/t_instr_count_dpi_large.py
new file mode 100755
index 000000000..6f1f40d34
--- /dev/null
+++ b/test_regress/t/t_instr_count_dpi_large.py
@@ -0,0 +1,27 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vltmt')
+test.clean_objs()
+
+test.compile(
+    v_flags2=["t/t_instr_count_dpi_large.cpp"],
+    verilator_flags2=[
+        "--instr-count-dpi 999999999",
+        # Force UNOPTTHREADS error to cause Contraction limit increase beyond UINT32
+        "--threads-max-mtasks 1",
+        "-Wno-UNOPTTHREADS"
+    ],
+    threads=2)
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_instr_count_dpi_large.v b/test_regress/t/t_instr_count_dpi_large.v
new file mode 100644
index 000000000..56824ce4b
--- /dev/null
+++ b/test_regress/t/t_instr_count_dpi_large.v
@@ -0,0 +1,26 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+
+module t(clk);
+   input clk;
+   sub_0 sub_0(clk);
+   sub_1 sub_1(clk);
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
+
+import "DPI-C" context function void dpii_call();
+
+module sub_0(input clk); /*verilator hier_block*/
+   always @(posedge clk) dpii_call();
+endmodule
+
+module sub_1(input clk); /*verilator hier_block*/
+   always @(posedge clk) dpii_call();
+endmodule
diff --git a/test_regress/t/t_instr_count_dpi_large_hier.py b/test_regress/t/t_instr_count_dpi_large_hier.py
new file mode 100755
index 000000000..e0d5bdaf5
--- /dev/null
+++ b/test_regress/t/t_instr_count_dpi_large_hier.py
@@ -0,0 +1,29 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vltmt')
+test.clean_objs()
+test.top_filename = "t/t_instr_count_dpi_large.v"
+
+test.compile(
+    v_flags2=["t/t_instr_count_dpi_large.cpp"],
+    verilator_flags2=[
+        "--hierarchical",
+        "--instr-count-dpi 999999999",
+        # Force UNOPTTHREADS error to cause Contraction limit increase beyond UINT32
+        "--threads-max-mtasks 1",
+        "-Wno-UNOPTTHREADS"
+    ],
+    threads=2)
+
+test.execute()
+
+test.passes()

From b0d1f720e01f95a871e6ac9c55a1acb82682a72f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 29 May 2025 18:58:22 -0400
Subject: [PATCH 112/211] Tests: Rename t_dpi_instr_count_large

---
 ..._instr_count_dpi_large.cpp => t_dpi_instr_count_large.cpp} | 0
 ...{t_instr_count_dpi_large.py => t_dpi_instr_count_large.py} | 2 +-
 .../{t_instr_count_dpi_large.v => t_dpi_instr_count_large.v}  | 0
 ...ount_dpi_large_hier.py => t_dpi_instr_count_large_hier.py} | 4 ++--
 4 files changed, 3 insertions(+), 3 deletions(-)
 rename test_regress/t/{t_instr_count_dpi_large.cpp => t_dpi_instr_count_large.cpp} (100%)
 rename test_regress/t/{t_instr_count_dpi_large.py => t_dpi_instr_count_large.py} (93%)
 rename test_regress/t/{t_instr_count_dpi_large.v => t_dpi_instr_count_large.v} (100%)
 rename test_regress/t/{t_instr_count_dpi_large_hier.py => t_dpi_instr_count_large_hier.py} (88%)

diff --git a/test_regress/t/t_instr_count_dpi_large.cpp b/test_regress/t/t_dpi_instr_count_large.cpp
similarity index 100%
rename from test_regress/t/t_instr_count_dpi_large.cpp
rename to test_regress/t/t_dpi_instr_count_large.cpp
diff --git a/test_regress/t/t_instr_count_dpi_large.py b/test_regress/t/t_dpi_instr_count_large.py
similarity index 93%
rename from test_regress/t/t_instr_count_dpi_large.py
rename to test_regress/t/t_dpi_instr_count_large.py
index 6f1f40d34..09a785c38 100755
--- a/test_regress/t/t_instr_count_dpi_large.py
+++ b/test_regress/t/t_dpi_instr_count_large.py
@@ -13,7 +13,7 @@ test.scenarios('vltmt')
 test.clean_objs()
 
 test.compile(
-    v_flags2=["t/t_instr_count_dpi_large.cpp"],
+    v_flags2=["t/t_dpi_instr_count_large.cpp"],
     verilator_flags2=[
         "--instr-count-dpi 999999999",
         # Force UNOPTTHREADS error to cause Contraction limit increase beyond UINT32
diff --git a/test_regress/t/t_instr_count_dpi_large.v b/test_regress/t/t_dpi_instr_count_large.v
similarity index 100%
rename from test_regress/t/t_instr_count_dpi_large.v
rename to test_regress/t/t_dpi_instr_count_large.v
diff --git a/test_regress/t/t_instr_count_dpi_large_hier.py b/test_regress/t/t_dpi_instr_count_large_hier.py
similarity index 88%
rename from test_regress/t/t_instr_count_dpi_large_hier.py
rename to test_regress/t/t_dpi_instr_count_large_hier.py
index e0d5bdaf5..1ecd190a0 100755
--- a/test_regress/t/t_instr_count_dpi_large_hier.py
+++ b/test_regress/t/t_dpi_instr_count_large_hier.py
@@ -11,10 +11,10 @@ import vltest_bootstrap
 
 test.scenarios('vltmt')
 test.clean_objs()
-test.top_filename = "t/t_instr_count_dpi_large.v"
+test.top_filename = "t/t_dpi_instr_count_large.v"
 
 test.compile(
-    v_flags2=["t/t_instr_count_dpi_large.cpp"],
+    v_flags2=["t/t_dpi_instr_count_large.cpp"],
     verilator_flags2=[
         "--hierarchical",
         "--instr-count-dpi 999999999",

From 40881d7e79061b0954e0b58747eaea3db821d630 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 29 May 2025 18:59:51 -0400
Subject: [PATCH 113/211] Commentary: Changes update

---
 Changes                      | 8 ++++++--
 docs/guide/exe_verilator.rst | 9 ++++-----
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/Changes b/Changes
index 2610fffdd..911d8012c 100644
--- a/Changes
+++ b/Changes
@@ -13,7 +13,7 @@ Verilator 5.037 devel
 
 **Other:**
 
-* Support redeclaring type as non-type; major parsing change (#2412) (#6020).
+* Support redeclaring type as non-type; major parsing change (#2412) (#6020) (#6042) (#6044).
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
@@ -23,8 +23,9 @@ Verilator 5.037 devel
 * Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
 * Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
 * Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
+* Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
-* Fix --x-initial and --x-assign random stability (#2662) (#5958). [Todd Strader]
+* Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
@@ -45,6 +46,9 @@ Verilator 5.037 devel
 * Fix concatenation and type casting (#6012) (#6013). [Todd Strader]
 * Fix wrong optimization result of shifted out variable (#6016) (#6019). [Yutetsu TAKATSUKASA]
 * Fix missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
+* Fix associative arrays with enum keys (#6034) (#6035). [Petr Nohavica]
+* Fix GCC 10 read-only linker error (#6040). [Todd Strader]
+* Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
 
 
 Verilator 5.036 2025-04-27
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 477a74fde..8858e25dd 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -780,12 +780,11 @@ Summary:
 .. option:: --hierarchical-threads <threads>
 
    Specifies the number of threads used for scheduling hierarchical blocks.
-   The main use-case of this option is to provide possiblity for scheduling
-   multi-thread hierarchical blocks on multiple threads without increasing
-   parallelism of the whole design.
+   This allows scheduling multi-thread hierarchical blocks on multiple
+   threads, without increasing the parallelism of the entire design.
 
-   Set to :vlopt:`--threads` by default. For optimal performance should not exceed
-   CPU core count.
+   Set to :vlopt:`--threads` by default. For optimal performance should not
+   exceed the CPU thread count.
 
 .. option:: -I<dir>
 

From 8031ca2616805a393f9c2614110a2559ecc733ac Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 29 May 2025 21:02:00 -0400
Subject: [PATCH 114/211] Add `MODMISSING` error, in place of unnamed error
 (#6054).

---
 Changes                               |  1 +
 docs/guide/warnings.rst               | 13 +++++++++++++
 src/V3Error.h                         |  8 +++++---
 src/V3Width.cpp                       | 13 +++++++------
 test_regress/t/t_gen_missing_bad.out  | 24 ++++++++++++------------
 test_regress/t/t_gen_nonconst_bad.out | 20 ++++++++++----------
 test_regress/t/t_inst_long_bad.out    |  8 ++++----
 test_regress/t/t_lint_modmissing.py   | 16 ++++++++++++++++
 test_regress/t/t_lint_modmissing.v    | 10 ++++++++++
 9 files changed, 78 insertions(+), 35 deletions(-)
 create mode 100755 test_regress/t/t_lint_modmissing.py
 create mode 100644 test_regress/t/t_lint_modmissing.v

diff --git a/Changes b/Changes
index 911d8012c..f8540fb54 100644
--- a/Changes
+++ b/Changes
@@ -24,6 +24,7 @@ Verilator 5.037 devel
 * Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
 * Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
 * Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
+* Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 24f525105..d78fac0c5 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1180,6 +1180,19 @@ List Of Warnings
    discarded.
 
 
+.. option:: MODMISSING
+
+   .. TODO better example
+
+   Error that a module, typically referenced by a cell, was not found.
+   This is typically fatal, but may be suppressed in some linting
+   situations with missing libraries.
+
+   Ignoring this error will cause the cell definition to be discarded.
+   Simulation results will likely be wrong, so typically used only with
+   lint-only.
+
+
 .. option:: MULTIDRIVEN
 
    Warns that the specified signal comes from multiple :code:`always`
diff --git a/src/V3Error.h b/src/V3Error.h
index f96e1d81a..633299f80 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -120,6 +120,7 @@ public:
         MINTYPMAXDLY,   // Unsupported: min/typ/max delay expressions
         MISINDENT,      // Misleading indentation
         MODDUP,         // Duplicate module
+        MODMISSING,     // Error: missing module
         MULTIDRIVEN,    // Driven from multiple blocks
         MULTITOP,       // Multiple top level modules
         NEWERSTD,       // Newer language standard required
@@ -208,7 +209,7 @@ public:
             "IFDEPTH", "IGNOREDRETURN",
             "IMPERFECTSCH", "IMPLICIT", "IMPLICITSTATIC", "IMPORTSTAR", "IMPURE",
             "INCABSPATH", "INFINITELOOP", "INITIALDLY", "INSECURE",
-            "LATCH", "LITENDIAN", "MINTYPMAXDLY", "MISINDENT", "MODDUP",
+            "LATCH", "LITENDIAN", "MINTYPMAXDLY", "MISINDENT", "MODDUP", "MODMISSING",
             "MULTIDRIVEN", "MULTITOP", "NEWERSTD", "NOLATCH", "NONSTD", "NULLPORT", "PINCONNECTEMPTY",
             "PINMISSING", "PINNOCONNECT",  "PINNOTFOUND", "PKGNODECL", "PREPROCZERO", "PROCASSINIT", "PROCASSWIRE",
             "PROFOUTOFDATE", "PROTECTED", "RANDC", "REALCVT", "REDEFMACRO", "RISEFALLDLY",
@@ -248,8 +249,9 @@ public:
     bool pretendError() const VL_MT_SAFE {
         return (m_e == ASSIGNIN || m_e == BADSTDPRAGMA || m_e == BADVLTPRAGMA || m_e == BLKANDNBLK
                 || m_e == BLKLOOPINIT || m_e == CONTASSREG || m_e == ENCAPSULATED
-                || m_e == ENDLABEL || m_e == ENUMVALUE || m_e == IMPURE || m_e == PINNOTFOUND
-                || m_e == PKGNODECL || m_e == PROCASSWIRE || m_e == ZEROREPL  // Says IEEE
+                || m_e == ENDLABEL || m_e == ENUMVALUE || m_e == IMPURE || m_e == MODMISSING
+                || m_e == PINNOTFOUND || m_e == PKGNODECL || m_e == PROCASSWIRE
+                || m_e == ZEROREPL  // Says IEEE
         );
     }
     // Warnings to mention manual
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 1b23f494a..88f510db1 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5898,12 +5898,13 @@ class WidthVisitor final : public VNVisitor {
                 // We've resolved parameters and hit a module that we couldn't resolve.  It's
                 // finally time to report it.
                 // Note only here in V3Width as this is first visitor after V3Dead.
-                nodep->modNameFileline()->v3error(
-                    "Cannot find file containing module: '"
-                    << nodep->modName() << "'\n"
-                    << nodep->modNameFileline()->warnContextPrimary()
-                    << V3Error::warnAdditionalInfo()
-                    << v3Global.opt.filePathLookedMsg(nodep->modNameFileline(), nodep->modName()));
+                nodep->modNameFileline()->v3warn(
+                    MODMISSING, "Cannot find file containing module: '"
+                                    << nodep->modName() << "'\n"
+                                    << nodep->modNameFileline()->warnContextPrimary()
+                                    << V3Error::warnAdditionalInfo()
+                                    << v3Global.opt.filePathLookedMsg(nodep->modNameFileline(),
+                                                                      nodep->modName()));
             }
             if (nodep->rangep()) userIterateAndNext(nodep->rangep(), WidthVP{SELF, BOTH}.p());
             userIterateAndNext(nodep->pinsp(), nullptr);
diff --git a/test_regress/t/t_gen_missing_bad.out b/test_regress/t/t_gen_missing_bad.out
index 4a16da624..cf46263f1 100644
--- a/test_regress/t/t_gen_missing_bad.out
+++ b/test_regress/t/t_gen_missing_bad.out
@@ -1,15 +1,15 @@
-%Error: t/t_gen_missing.v:43:20: Cannot find file containing module: 'foo_not_needed'
+%Error-MODMISSING: t/t_gen_missing.v:43:20: Cannot find file containing module: 'foo_not_needed'
    43 |                    foo_not_needed i_foo(.x(foo[j]), .y(bar[j]));
       |                    ^~~~~~~~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-        ... Looked in:
-             t/foo_not_needed
-             t/foo_not_needed.v
-             t/foo_not_needed.sv
-             foo_not_needed
-             foo_not_needed.v
-             foo_not_needed.sv
-             obj_vlt/t_gen_missing_bad/foo_not_needed
-             obj_vlt/t_gen_missing_bad/foo_not_needed.v
-             obj_vlt/t_gen_missing_bad/foo_not_needed.sv
+                   ... For error description see https://verilator.org/warn/MODMISSING?v=latest
+                   ... Looked in:
+                        t/foo_not_needed
+                        t/foo_not_needed.v
+                        t/foo_not_needed.sv
+                        foo_not_needed
+                        foo_not_needed.v
+                        foo_not_needed.sv
+                        obj_vlt/t_gen_missing_bad/foo_not_needed
+                        obj_vlt/t_gen_missing_bad/foo_not_needed.v
+                        obj_vlt/t_gen_missing_bad/foo_not_needed.sv
 %Error: Exiting due to
diff --git a/test_regress/t/t_gen_nonconst_bad.out b/test_regress/t/t_gen_nonconst_bad.out
index 9c7aa3c0c..138517066 100644
--- a/test_regress/t/t_gen_nonconst_bad.out
+++ b/test_regress/t/t_gen_nonconst_bad.out
@@ -1,13 +1,13 @@
-%Error: t/t_gen_nonconst_bad.v:8:4: Cannot find file containing module: 'nfound'
+%Error-MODMISSING: t/t_gen_nonconst_bad.v:8:4: Cannot find file containing module: 'nfound'
     8 |    nfound nfound();
       |    ^~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-        ... This may be because there's no search path specified with -I<dir>.
-        ... Looked in:
-             nfound
-             nfound.v
-             nfound.sv
-             obj_dir/nfound
-             obj_dir/nfound.v
-             obj_dir/nfound.sv
+                   ... For error description see https://verilator.org/warn/MODMISSING?v=latest
+                   ... This may be because there's no search path specified with -I<dir>.
+                   ... Looked in:
+                        nfound
+                        nfound.v
+                        nfound.sv
+                        obj_dir/nfound
+                        obj_dir/nfound.v
+                        obj_dir/nfound.sv
 %Error: Exiting due to
diff --git a/test_regress/t/t_inst_long_bad.out b/test_regress/t/t_inst_long_bad.out
index fcf60e3cc..c903f6b35 100644
--- a/test_regress/t/t_inst_long_bad.out
+++ b/test_regress/t/t_inst_long_bad.out
@@ -1,7 +1,7 @@
-%Error: t/t_inst_long_bad.v:9:3: Cannot find file containing module: 'long_long_long_long_long_long___Vhsh1JZCXQVBM1QiASYlLmgTuAXYyUr7VAbJYwVHfiAD'
+%Error-MODMISSING: t/t_inst_long_bad.v:9:3: Cannot find file containing module: 'long_long_long_long_long_long___Vhsh1JZCXQVBM1QiASYlLmgTuAXYyUr7VAbJYwVHfiAD'
     9 |   long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_long_ inst ();
       |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-        ... Note: Name is longer than 127 characters; automatic file lookup may have failed due to OS filename length limits.
-        ... Suggest putting filename with this module/package onto command line instead.
+                   ... For error description see https://verilator.org/warn/MODMISSING?v=latest
+                   ... Note: Name is longer than 127 characters; automatic file lookup may have failed due to OS filename length limits.
+                   ... Suggest putting filename with this module/package onto command line instead.
 %Error: Exiting due to
diff --git a/test_regress/t/t_lint_modmissing.py b/test_regress/t/t_lint_modmissing.py
new file mode 100755
index 000000000..f81c3d68d
--- /dev/null
+++ b/test_regress/t/t_lint_modmissing.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint()
+
+test.passes()
diff --git a/test_regress/t/t_lint_modmissing.v b/test_regress/t/t_lint_modmissing.v
new file mode 100644
index 000000000..6a6d7284e
--- /dev/null
+++ b/test_regress/t/t_lint_modmissing.v
@@ -0,0 +1,10 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2011 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(input i);
+   // verilator lint_off MODMISSING
+   foobar sub(i);
+endmodule

From 8a8f04153a7c712cc0441b86d51132008d6c1225 Mon Sep 17 00:00:00 2001
From: Nick Brereton <85175726+nbstrike@users.noreply.github.com>
Date: Thu, 29 May 2025 22:11:47 -0400
Subject: [PATCH 115/211] Fix method calls and new to access interface arrays
 (#5973)

---
 src/V3Inst.cpp                             | 98 +++++++++++-----------
 test_regress/t/t_interface_dearray.v       | 15 +++-
 test_regress/t/t_interface_dearray_bad.out | 30 ++++---
 test_regress/t/t_interface_dearray_bad.v   |  3 +-
 4 files changed, 78 insertions(+), 68 deletions(-)

diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index a59bf55fc..5b356f638 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -465,33 +465,32 @@ private:
             VL_DO_DANGLING(pushDeletep(nodep), nodep);
         }
     }
-
-    void visit(AstNodeAssign* nodep) override {
-        if (AstArraySel* const arrselp = VN_CAST(nodep->rhsp(), ArraySel)) {
-            // handle single element selection from RHS array
-            if (const AstUnpackArrayDType* const arrp
-                = VN_CAST(arrselp->fromp()->dtypep()->skipRefp(), UnpackArrayDType)) {
-                if (!VN_IS(arrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
-                if (VN_AS(arrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) return;
-                V3Const::constifyParamsEdit(arrselp->bitp());
-                const AstConst* const constp = VN_CAST(arrselp->bitp(), Const);
-                if (!constp) {
-                    arrselp->bitp()->v3warn(E_UNSUPPORTED,
-                                            "Non-constant index in RHS interface array selection");
-                    return;
-                }
-                const string index = AstNode::encodeNumber(constp->toSInt());
-                const AstVarRef* const varrefp = VN_CAST(arrselp->fromp(), VarRef);
-                UASSERT_OBJ(varrefp, arrselp, "No interface varref under array");
-                AstVarXRef* const newp = new AstVarXRef{
-                    nodep->fileline(), varrefp->name() + "__BRA__" + index + "__KET__", "",
-                    VAccess::READ};
-                newp->dtypep(arrp->subDTypep());
-                newp->classOrPackagep(varrefp->classOrPackagep());
-                arrselp->addNextHere(newp);
-                VL_DO_DANGLING(arrselp->unlinkFrBack()->deleteTree(), arrselp);
+    void visit(AstArraySel* nodep) override {
+        if (const AstUnpackArrayDType* const arrp
+            = VN_CAST(nodep->fromp()->dtypep()->skipRefp(), UnpackArrayDType)) {
+            if (!VN_IS(arrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
+            if (VN_AS(arrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) return;
+            V3Const::constifyParamsEdit(nodep->bitp());
+            const AstConst* const constp = VN_CAST(nodep->bitp(), Const);
+            if (!constp) {
+                nodep->bitp()->v3warn(E_UNSUPPORTED,
+                                      "Non-constant index in RHS interface array selection");
+                return;
             }
-        } else if (AstSliceSel* const arrslicep = VN_CAST(nodep->rhsp(), SliceSel)) {
+            const string index = AstNode::encodeNumber(constp->toSInt());
+            const AstVarRef* const varrefp = VN_CAST(nodep->fromp(), VarRef);
+            UASSERT_OBJ(varrefp, nodep, "No interface varref under array");
+            AstVarXRef* const newp = new AstVarXRef{
+                nodep->fileline(), varrefp->name() + "__BRA__" + index + "__KET__", "",
+                VAccess::READ};
+            newp->dtypep(arrp->subDTypep());
+            newp->classOrPackagep(varrefp->classOrPackagep());
+            nodep->addNextHere(newp);
+            VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
+        }
+    }
+    void visit(AstNodeAssign* nodep) override {
+        if (AstSliceSel* const arrslicep = VN_CAST(nodep->rhsp(), SliceSel)) {
             if (const AstUnpackArrayDType* const arrp
                 = VN_CAST(arrslicep->fromp()->dtypep(), UnpackArrayDType)) {
                 if (!VN_IS(arrp->subDTypep(), IfaceRefDType)) return;
@@ -500,15 +499,20 @@ private:
                 return;
             }
         } else {
-            if (const AstUnpackArrayDType* const lhsarrp
-                = VN_CAST(nodep->lhsp()->dtypep()->skipRefp(), UnpackArrayDType)) {
-                if (const AstUnpackArrayDType* const rhsarrp
-                    = VN_CAST(nodep->rhsp()->dtypep()->skipRefp(), UnpackArrayDType)) {
+            if (const AstUnpackArrayDType* const rhsarrp
+                = VN_CAST(nodep->rhsp()->dtypep()->skipRefp(), UnpackArrayDType)) {
+                if (const AstUnpackArrayDType* const lhsarrp
+                    = VN_CAST(nodep->lhsp()->dtypep()->skipRefp(), UnpackArrayDType)) {
                     // copy between arrays
                     if (!VN_IS(lhsarrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
                     if (!VN_IS(rhsarrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
                     if (VN_AS(rhsarrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual())
                         return;
+                    if (!VN_AS(lhsarrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) {
+                        nodep->v3warn(E_UNSUPPORTED, "Unexpected target of interface assignment ["
+                                                         << rhsarrp->prettyDTypeNameQ() << "]");
+                        return;
+                    }
                     if (lhsarrp->elementsConst() != rhsarrp->elementsConst()) {
                         nodep->v3warn(E_UNSUPPORTED,
                                       "Array size mismatch in interface assignment");
@@ -518,30 +522,17 @@ private:
                         const string index = AstNode::encodeNumber(i);
                         AstNodeExpr* lhsp = nullptr;
                         if (AstVarRef* const varrefp = VN_CAST(nodep->lhsp(), VarRef)) {
-                            if (VN_AS(lhsarrp->subDTypep()->skipRefp(), IfaceRefDType)
-                                    ->isVirtual()) {
-                                AstVarRef* const newvarp = varrefp->cloneTree(false);
-                                AstArraySel* newarrselp = new AstArraySel(
-                                    nodep->fileline(), newvarp,
-                                    new AstConst(nodep->fileline(),
-                                                 V3Number(nodep->fileline(), 32, i)));
-                                lhsp = newarrselp;
-                            } else {
-                                AstVarXRef* const newvarrefp = new AstVarXRef{
-                                    nodep->fileline(),
-                                    varrefp->name() + "__BRA__" + index + "__KET__", "",
-                                    VAccess::WRITE};
-                                newvarrefp->dtypep(lhsarrp->subDTypep()->skipRefp());
-                                newvarrefp->classOrPackagep(varrefp->classOrPackagep());
-                                lhsp = newvarrefp;
-                            }
+                            AstVarRef* const newvarp = varrefp->cloneTree(false);
+                            AstArraySel* newarrselp = new AstArraySel{
+                                nodep->fileline(), newvarp,
+                                new AstConst{nodep->fileline(), static_cast<uint32_t>(i)}};
+                            lhsp = newarrselp;
                         } else if (AstMemberSel* const prevselp
                                    = VN_CAST(nodep->lhsp(), MemberSel)) {
                             AstMemberSel* membselp = prevselp->cloneTree(false);
-                            AstArraySel* newarrselp = new AstArraySel(
+                            AstArraySel* newarrselp = new AstArraySel{
                                 nodep->fileline(), membselp,
-                                new AstConst(nodep->fileline(),
-                                             V3Number(nodep->fileline(), 32, i)));
+                                new AstConst{nodep->fileline(), static_cast<uint32_t>(i)}};
                             lhsp = newarrselp;
                         } else {
                             nodep->v3warn(E_UNSUPPORTED,
@@ -557,15 +548,20 @@ private:
                         AstAssign* const assignp = new AstAssign(nodep->fileline(), lhsp, rhsp);
                         nodep->addNextHere(assignp);
                     }
-                    VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
+                    return;
                 }
             }
         }
+        iterateChildren(nodep);
     }
 
     //--------------------
     void visit(AstNodeExpr*) override {}  // Accelerate
     void visit(AstNode* nodep) override { iterateChildren(nodep); }
+    void visit(AstNew* nodep) override { iterateChildren(nodep); }
+    void visit(AstMethodCall* nodep) override { iterateChildren(nodep); }
+    void visit(AstArg* nodep) override { iterateChildren(nodep); }
 
 public:
     // CONSTRUCTORS
diff --git a/test_regress/t/t_interface_dearray.v b/test_regress/t/t_interface_dearray.v
index f3cdc8081..a8bee53b2 100644
--- a/test_regress/t/t_interface_dearray.v
+++ b/test_regress/t/t_interface_dearray.v
@@ -10,25 +10,34 @@ endinterface
 typedef virtual A a_t;
 typedef a_t a_array_t[6];
 
+class B;
+  function new(virtual A va);
+  endfunction
+endclass
+
 class C;
    a_array_t vif;
+
+   function void set(int index, a_t iface);
+      vif[index] = iface;
+   endfunction
 endclass
 
 module tb_top();
-   A a[6](), b[6]();
+   A a[6]();
    C c, d, e;
    a_array_t g;
 
    initial begin
       static a_t aa = a[0];
 
-      b = a;
+      B b = new(a[0]);
 
       c = new();
       c.vif = a;
 
       d = new();
-      d.vif[0] = a[0];
+      d.set(0, a[0]);
       d.vif[1] = a[1];
 
       g[0] = a[0];
diff --git a/test_regress/t/t_interface_dearray_bad.out b/test_regress/t/t_interface_dearray_bad.out
index 39486d611..143493309 100644
--- a/test_regress/t/t_interface_dearray_bad.out
+++ b/test_regress/t/t_interface_dearray_bad.out
@@ -1,23 +1,27 @@
-%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:25:13: Array size mismatch in interface assignment
-                                                     : ... note: In instance 'tb_top'
-   25 |       c.vif = b;
-      |             ^
+%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:23:9: Unexpected target of interface assignment ['IFACEREFDTYPE$[0:5]']
+                                                    : ... note: In instance 'tb_top'
+   23 |       a = f;
+      |         ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_interface_dearray_bad.v:30:23: Expecting expression to be constant, but variable isn't const: 'i'
+%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:26:13: Array size mismatch in interface assignment
+                                                     : ... note: In instance 'tb_top'
+   26 |       c.vif = b;
+      |             ^
+%Error: t/t_interface_dearray_bad.v:31:23: Expecting expression to be constant, but variable isn't const: 'i'
                                          : ... note: In instance 'tb_top'
-   30 |          d.vif[i] = a[i];
+   31 |          d.vif[i] = a[i];
       |                       ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:30:23: Non-constant index in RHS interface array selection
+%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:31:23: Non-constant index in RHS interface array selection
                                                      : ... note: In instance 'tb_top'
-   30 |          d.vif[i] = a[i];
+   31 |          d.vif[i] = a[i];
       |                       ^
-%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:34:16: Interface slices unsupported
+%Error-UNSUPPORTED: t/t_interface_dearray_bad.v:35:16: Interface slices unsupported
                                                      : ... note: In instance 'tb_top'
-   34 |       e.vif = b[0:5];
+   35 |       e.vif = b[0:5];
       |                ^
-%Error: Internal Error: t/t_interface_dearray_bad.v:25:15: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): 'm_varp && !m_varp->brokeExists()' @ ./V3Ast__gen_impl.h:#
+%Error: Internal Error: t/t_interface_dearray_bad.v:23:11: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): 'm_varp && !m_varp->brokeExists()' @ ./V3Ast__gen_impl.h:#
                                                          : ... note: In instance 'tb_top'
-   25 |       c.vif = b;
-      |               ^
+   23 |       a = f;
+      |           ^
                         ... This fatal error may be caused by the earlier error(s); resolve those first.
diff --git a/test_regress/t/t_interface_dearray_bad.v b/test_regress/t/t_interface_dearray_bad.v
index d90fbc5c4..cde795595 100644
--- a/test_regress/t/t_interface_dearray_bad.v
+++ b/test_regress/t/t_interface_dearray_bad.v
@@ -15,11 +15,12 @@ class C;
 endclass
 
 module tb_top();
-   A a[6](), b[7]();
+   A a[6](), b[7](), f[6]();
    C c, d, e;
    a_array_t g;
 
    initial begin
+      a = f;
 
       c = new();
       c.vif = b;

From 79de1ff5073b87ada0470f91cb6a8128a6d14ff1 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 31 May 2025 07:38:15 -0400
Subject: [PATCH 116/211] Fix WIDTHCONCAT on packed pattern assignment (#6045).

---
 Changes                                 |  1 +
 src/V3Width.cpp                         |  3 +++
 test_regress/t/t_lint_width_arraydecl.v | 24 ++++++++++++++++++++++++
 3 files changed, 28 insertions(+)

diff --git a/Changes b/Changes
index f8540fb54..a62177081 100644
--- a/Changes
+++ b/Changes
@@ -49,6 +49,7 @@ Verilator 5.037 devel
 * Fix missing FreeBSD include (#6027) (#6028). [Joel Bodenmann]
 * Fix associative arrays with enum keys (#6034) (#6035). [Petr Nohavica]
 * Fix GCC 10 read-only linker error (#6040). [Todd Strader]
+* Fix WIDTHCONCAT on packed pattern assignment (#6045). [Dan Petrisko]
 * Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
 
 
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 88f510db1..c1eecc786 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4722,6 +4722,9 @@ class WidthVisitor final : public VNVisitor {
                 newp = valuep;
             } else {
                 AstConcat* const concatp = new AstConcat{patp->fileline(), newp, valuep};
+                // Have resolved widths, no reason to warn about widths on the concat itself
+                newp->fileline()->modifyWarnOff(V3ErrorCode::WIDTHCONCAT, true);
+                valuep->fileline()->modifyWarnOff(V3ErrorCode::WIDTHCONCAT, true);
                 newp = concatp;
                 newp->dtypeSetLogicSized(concatp->lhsp()->width() + concatp->rhsp()->width(),
                                          nodep->dtypep()->numeric());
diff --git a/test_regress/t/t_lint_width_arraydecl.v b/test_regress/t/t_lint_width_arraydecl.v
index 5de0ecc50..55a3d0e4c 100644
--- a/test_regress/t/t_lint_width_arraydecl.v
+++ b/test_regress/t/t_lint_width_arraydecl.v
@@ -14,8 +14,32 @@ module t(
          input [UADDR_WIDTH-1:0] mAddr,
          output logic [UROM_WIDTH-1:0] mOutput);
 
+   // Issue #3959
    reg [UROM_WIDTH-1:0] uRam[UROM_DEPTH];
 
    always @(posedge clk) mOutput <= uRam[mAddr];
 
+   // Issue #6045
+   typedef enum logic [1:0] { e_0, e_1, e_2, e_3 } enum_e;
+
+   typedef struct packed {
+      integer unsigned x;
+      integer unsigned y;
+   } foo_s;
+
+   typedef struct packed {
+      integer unsigned y;
+   } bar_s;
+
+   // Warning due to concatenation, but this is actually a member assignment
+   localparam foo_s foo = '{
+      y: (1 << e_0) | (1 << e_3)
+      , default: '0
+   };
+
+   // No warning
+   localparam bar_s bar = '{
+      y: (1 << e_0) | (1 << e_3)
+   };
+
 endmodule

From cfbcfd913c9cdc45198707d5476a55992fbe8303 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Sat, 31 May 2025 07:55:00 -0400
Subject: [PATCH 117/211] Fix packed array deduction (#6046)

---
 src/V3LinkDot.cpp                   | 24 ++++++++++++------------
 test_regress/t/t_bitsel_2d_slice.py | 18 ++++++++++++++++++
 test_regress/t/t_bitsel_2d_slice.v  | 29 +++++++++++++++++++++++++++++
 test_regress/t/t_type_param.v       | 14 ++++++++++++++
 4 files changed, 73 insertions(+), 12 deletions(-)
 create mode 100755 test_regress/t/t_bitsel_2d_slice.py
 create mode 100644 test_regress/t/t_bitsel_2d_slice.v

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index a853690fe..92d9154b9 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2353,9 +2353,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
     std::map<AstNode*, AstPin*> m_usedPins;  // Pin used in this cell, map to duplicate
     std::map<std::string, AstNodeModule*> m_modulesToRevisit;  // Modules to revisit a second time
     AstNode* m_lastDeferredp = nullptr;  // Last node which requested a revisit of its module
-    bool m_maybePackedArray
-        = false;  // Array select parse trees may actually be packed array datatypes
     AstNodeDType* m_packedArrayDtp = nullptr;  // Datatype reference for packed array
+    bool m_inPackedArray = false;  // Currently traversing a packed array tree
 
     struct DotStates final {
         DotPosition m_dotPos;  // Scope part of dotted resolution
@@ -2811,7 +2810,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         // Early return() above when deleted
     }
     void visit(AstDot* nodep) override {
-        // Legal under a DOT: AstDot, AstParseRef, AstPackageRef, AstNodeSel
+        // Legal under a DOT: AstDot, AstParseRef, AstPackageRef, AstNodeSel, AstPackArrayDType
         //    also a DOT can be part of an expression, but only above plus
         //    AstFTaskRef are legal children
         // Dot(PackageRef, ParseRef(text))
@@ -3404,7 +3403,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (ok) {
                     AstRefDType* const refp = new AstRefDType{nodep->fileline(), nodep->name()};
                     refp->typedefp(defp);
-                    if (m_maybePackedArray) {
+                    if (VN_IS(nodep->backp(), SelExtract)) {
                         m_packedArrayDtp = refp;
                     } else {
                         replaceWithCheckBreak(nodep, refp);
@@ -4058,11 +4057,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
         AstNodeDType* packedArrayDtp = nullptr;  // Datatype reference for packed array
         {
             VL_RESTORER(m_packedArrayDtp);
-            {
-                VL_RESTORER(m_maybePackedArray);
-                m_maybePackedArray = true;
-                iterateAndNextNull(nodep->fromp());
-            }
+            iterateAndNextNull(nodep->fromp());
             symIterateNull(nodep->rhsp(), m_curSymp);
             symIterateNull(nodep->thsp(), m_curSymp);
 
@@ -4074,7 +4069,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     = new AstPackArrayDType(nodep->fileline(), m_packedArrayDtp, newRangep);
                 newArrayTypep->childDTypep(m_packedArrayDtp);
                 newArrayTypep->refDTypep(nullptr);
-                if (m_maybePackedArray) {
+                if (VN_IS(nodep->backp(), SelExtract)) {
                     packedArrayDtp = newArrayTypep;
                 } else {
                     replaceWithCheckBreak(nodep, newArrayTypep);
@@ -4576,8 +4571,13 @@ class LinkDotResolveVisitor final : public VNVisitor {
     void visit(AstAttrOf* nodep) override { iterateChildren(nodep); }
 
     void visit(AstNode* nodep) override {
-        LINKDOT_VISIT_START();
-        checkNoDot(nodep);
+        VL_RESTORER(m_inPackedArray);
+        if (VN_IS(nodep, PackArrayDType)) {
+            m_inPackedArray = true;
+        } else if (!m_inPackedArray) {
+            LINKDOT_VISIT_START();
+            checkNoDot(nodep);
+        }
         iterateChildren(nodep);
     }
 
diff --git a/test_regress/t/t_bitsel_2d_slice.py b/test_regress/t/t_bitsel_2d_slice.py
new file mode 100755
index 000000000..c39e83d77
--- /dev/null
+++ b/test_regress/t/t_bitsel_2d_slice.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("simulator")
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_bitsel_2d_slice.v b/test_regress/t/t_bitsel_2d_slice.v
new file mode 100644
index 000000000..c81e7be24
--- /dev/null
+++ b/test_regress/t/t_bitsel_2d_slice.v
@@ -0,0 +1,29 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+    input clk;
+
+    localparam int width = 8;
+    typedef logic [width-1:0] [15:0] two_dee_t;
+    typedef logic[$clog2(width)-1:0] index_t;
+
+    two_dee_t the_two_dee;
+
+    initial begin
+        the_two_dee[index_t'(5)][7:0] = 8'hab;
+        the_two_dee[index_t'(5)][15:8] = 8'h12;
+    end
+
+    always @ (posedge clk) begin
+        if (the_two_dee[5] != 16'h12ab) $stop();
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+endmodule
diff --git a/test_regress/t/t_type_param.v b/test_regress/t/t_type_param.v
index 1bb4f7f9f..61ca69b19 100644
--- a/test_regress/t/t_type_param.v
+++ b/test_regress/t/t_type_param.v
@@ -4,6 +4,10 @@
 // without warranty, 2019 by Todd Strader.
 // SPDX-License-Identifier: CC0-1.0
 
+package some_package;
+    typedef logic [15:0] two_bytes_t;
+endpackage
+
 module foo
   #(parameter type bar = logic)
    (output int bar_size);
@@ -54,6 +58,11 @@ module t();
    foo #(.bar (some_struct_t [2:0] [5:0]))
    foo_inst5 (.bar_size (bar_size5));
 
+   int bar_size6;
+
+   foo #(.bar (some_package::two_bytes_t [4-1:0]))
+   foo_inst6 (.bar_size (bar_size6));
+
    localparam bar_bits = 13;
    int bar_size_wrapper;
 
@@ -106,6 +115,11 @@ module t();
                  bar_size5, $bits(some_struct_t) * 3 * 6);
          $stop();
       end
+      if (bar_size6 != $bits(some_package::two_bytes_t)*4) begin
+         $display("%m: bar_size6 != bits of some_package::two_bytes_t * 4 (%0d, %0d)",
+                 bar_size6, $bits(some_package::two_bytes_t) * 4);
+         $stop();
+      end
       if (bar_size_wrapper != bar_bits) begin
          $display("%m: bar_size_wrapper != bar_bits (%0d, %0d)",
                  bar_size_wrapper, bar_bits);

From 593da4e38f9d86bdf537c8d5b5dc6333dea60ea2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 4 Jun 2025 21:43:30 -0400
Subject: [PATCH 118/211] Internals: Fix missing const. No functional change.

---
 src/V3AstNodeDType.h | 2 +-
 src/V3AstNodes.cpp   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 8542bfa1f..635095644 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -158,7 +158,7 @@ public:
     bool widthSized() const VL_MT_SAFE { return !m_widthMin || m_widthMin == m_width; }
     bool generic() const VL_MT_SAFE { return m_generic; }
     void generic(bool flag) { m_generic = flag; }
-    std::pair<uint32_t, uint32_t> dimensions(bool includeBasic);
+    std::pair<uint32_t, uint32_t> dimensions(bool includeBasic) const;
     uint32_t arrayUnpackedElements() const;  // 1, or total multiplication of all dimensions
     static int uniqueNumInc() { return ++s_uniqueNum; }
     const char* charIQWN() const {
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index d046745a4..9b5c9947f 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1034,11 +1034,11 @@ uint32_t AstNodeDType::arrayUnpackedElements() const {
     return entries;
 }
 
-std::pair<uint32_t, uint32_t> AstNodeDType::dimensions(bool includeBasic) {
+std::pair<uint32_t, uint32_t> AstNodeDType::dimensions(bool includeBasic) const {
     // How many array dimensions (packed,unpacked) does this Var have?
     uint32_t packed = 0;
     uint32_t unpacked = 0;
-    for (AstNodeDType* dtypep = this; dtypep;) {
+    for (const AstNodeDType* dtypep = this; dtypep;) {
         dtypep = dtypep->skipRefp();  // Skip AstRefDType/AstTypedef, or return same node
         if (const AstNodeArrayDType* const adtypep = VN_CAST(dtypep, NodeArrayDType)) {
             if (VN_IS(adtypep, PackArrayDType)) {

From ed46878f7bbe7e84bb9799c7006cc3ebac7edb6c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 4 Jun 2025 21:43:46 -0400
Subject: [PATCH 119/211] Fix virtual interface array typedef expressions
 (#6057).

---
 Changes                              |  1 +
 src/V3Inst.cpp                       | 72 +++++++++++++++-------------
 test_regress/t/t_interface_array3.py | 18 +++++++
 test_regress/t/t_interface_array3.v  | 54 +++++++++++++++++++++
 4 files changed, 111 insertions(+), 34 deletions(-)
 create mode 100755 test_regress/t/t_interface_array3.py
 create mode 100644 test_regress/t/t_interface_array3.v

diff --git a/Changes b/Changes
index a62177081..290b04282 100644
--- a/Changes
+++ b/Changes
@@ -51,6 +51,7 @@ Verilator 5.037 devel
 * Fix GCC 10 read-only linker error (#6040). [Todd Strader]
 * Fix WIDTHCONCAT on packed pattern assignment (#6045). [Dan Petrisko]
 * Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix virtual interface array typedef expressions (#6057).
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index 5b356f638..d9e320c7b 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -85,10 +85,11 @@ class InstVisitor final : public VNVisitor {
                 m_cellp->addNextHere(assp);
                 if (debug() >= 9) assp->dumpTree("-     _new: ");
             } else if (nodep->modVarp()->isIfaceRef()
-                       || (VN_IS(nodep->modVarp()->subDTypep(), UnpackArrayDType)
-                           && VN_IS(
-                               VN_AS(nodep->modVarp()->subDTypep(), UnpackArrayDType)->subDTypep(),
-                               IfaceRefDType))) {
+                       || (VN_IS(nodep->modVarp()->dtypep()->skipRefp(), UnpackArrayDType)
+                           && VN_IS(VN_AS(nodep->modVarp()->dtypep()->skipRefp(), UnpackArrayDType)
+                                        ->subDTypep()
+                                        ->skipRefp(),
+                                    IfaceRefDType))) {
                 // Create an AstAssignVarScope for Vars to Cells so we can
                 // link with their scope later
                 AstNodeExpr* const lhsp = new AstVarXRef{exprp->fileline(), nodep->modVarp(),
@@ -133,7 +134,7 @@ private:
 
     // VISITORS
     void visit(AstVar* nodep) override {
-        if (VN_IS(nodep->dtypep(), IfaceRefDType)) {
+        if (VN_IS(nodep->dtypep()->skipRefp(), IfaceRefDType)) {
             UINFO(8, "   dm-1-VAR    " << nodep);
             insert(nodep);
         }
@@ -185,20 +186,22 @@ private:
 
     // VISITORS
     void visit(AstVar* nodep) override {
-        if (VN_IS(nodep->dtypep(), UnpackArrayDType)
-            && VN_IS(VN_AS(nodep->dtypep(), UnpackArrayDType)->subDTypep(), IfaceRefDType)) {
-            if (VN_AS(VN_AS(nodep->dtypep(), UnpackArrayDType)->subDTypep(), IfaceRefDType)
+        AstNode* const dtp = nodep->dtypep()->skipRefp();
+        if (VN_IS(dtp, UnpackArrayDType)
+            && VN_IS(VN_AS(dtp, UnpackArrayDType)->subDTypep()->skipRefp(), IfaceRefDType)) {
+            if (VN_AS(VN_AS(dtp, UnpackArrayDType)->subDTypep()->skipRefp(), IfaceRefDType)
                     ->isVirtual())
                 return;
             UINFO(8, "   dv-vec-VAR    " << nodep);
-            AstUnpackArrayDType* const arrdtype = VN_AS(nodep->dtypep(), UnpackArrayDType);
+            AstUnpackArrayDType* const arrdtype = VN_AS(dtp, UnpackArrayDType);
             AstNode* prevp = nullptr;
             for (int i = arrdtype->lo(); i <= arrdtype->hi(); ++i) {
                 const string varNewName = nodep->name() + "__BRA__" + cvtToStr(i) + "__KET__";
                 UINFO(8, "VAR name insert " << varNewName << "  " << nodep);
                 if (!m_deModVars.find(varNewName)) {
                     AstIfaceRefDType* const ifaceRefp
-                        = VN_AS(arrdtype->subDTypep(), IfaceRefDType)->cloneTree(false);
+                        = VN_AS(arrdtype->subDTypep()->skipRefp(), IfaceRefDType)
+                              ->cloneTree(false);
                     arrdtype->addNextHere(ifaceRefp);
                     ifaceRefp->cellp(nullptr);
 
@@ -233,11 +236,13 @@ private:
             m_cellRangep = nodep->rangep();
 
             AstVar* const ifaceVarp = VN_CAST(nodep->nextp(), Var);
+            AstNodeDType* const ifaceVarDtp
+                = ifaceVarp ? ifaceVarp->dtypep()->skipRefp() : nullptr;
             const bool isIface
-                = ifaceVarp && VN_IS(ifaceVarp->dtypep(), UnpackArrayDType)
-                  && VN_IS(VN_AS(ifaceVarp->dtypep(), UnpackArrayDType)->subDTypep(),
+                = ifaceVarp && VN_IS(ifaceVarDtp, UnpackArrayDType)
+                  && VN_IS(VN_AS(ifaceVarDtp, UnpackArrayDType)->subDTypep()->skipRefp(),
                            IfaceRefDType)
-                  && !VN_AS(VN_AS(ifaceVarp->dtypep(), UnpackArrayDType)->subDTypep(),
+                  && !VN_AS(VN_AS(ifaceVarDtp, UnpackArrayDType)->subDTypep()->skipRefp(),
                             IfaceRefDType)
                           ->isVirtual();
 
@@ -261,10 +266,9 @@ private:
                 // If this AstCell is actually an interface instantiation, also clone the IfaceRef
                 // within the same parent module as the cell
                 if (isIface) {
-                    AstUnpackArrayDType* const arrdtype
-                        = VN_AS(ifaceVarp->dtypep(), UnpackArrayDType);
+                    AstUnpackArrayDType* const arrdtype = VN_AS(ifaceVarDtp, UnpackArrayDType);
                     AstIfaceRefDType* const origIfaceRefp
-                        = VN_AS(arrdtype->subDTypep(), IfaceRefDType);
+                        = VN_AS(arrdtype->subDTypep()->skipRefp(), IfaceRefDType);
                     origIfaceRefp->cellp(nullptr);
                     AstVar* const varNewp = ifaceVarp->cloneTree(false);
                     AstIfaceRefDType* const ifaceRefp = origIfaceRefp->cloneTree(false);
@@ -306,14 +310,14 @@ private:
     void visit(AstPin* nodep) override {
         // Any non-direct pins need reconnection with a part-select
         if (!nodep->exprp()) return;  // No-connect
+        const AstNodeDType* expDtp = nodep->exprp()->dtypep()->skipRefp();
         if (m_cellRangep) {
             UINFO(4, "   PIN  " << nodep);
             const int modwidth = nodep->modVarp()->width();
             const int expwidth = nodep->exprp()->width();
             const std::pair<uint32_t, uint32_t> pinDim
-                = nodep->modVarp()->dtypep()->dimensions(false);
-            const std::pair<uint32_t, uint32_t> expDim
-                = nodep->exprp()->dtypep()->dimensions(false);
+                = nodep->modVarp()->dtypep()->skipRefp()->dimensions(false);
+            const std::pair<uint32_t, uint32_t> expDim = expDtp->dimensions(false);
             UINFO(4, "   PINVAR  " << nodep->modVarp());
             UINFO(4, "   EXP     " << nodep->exprp());
             UINFO(4, "   expwidth=" << expwidth << " modwidth=" << modwidth
@@ -321,8 +325,7 @@ private:
                                     << "  pinDim(p,u)=" << pinDim.first << "," << pinDim.second);
             if (expDim.second == pinDim.second + 1) {
                 // Connection to array, where array dimensions match the instant dimension
-                const AstRange* const rangep
-                    = VN_AS(nodep->exprp()->dtypep(), UnpackArrayDType)->rangep();
+                const AstRange* const rangep = VN_AS(expDtp, UnpackArrayDType)->rangep();
                 const int arraySelNum = rangep->ascending()
                                             ? (rangep->elementsConst() - 1 - m_instSelNum)
                                             : m_instSelNum;
@@ -358,9 +361,9 @@ private:
         }  // end expanding ranged cell
         else if (AstArraySel* const arrselp = VN_CAST(nodep->exprp(), ArraySel)) {
             if (const AstUnpackArrayDType* const arrp
-                = VN_CAST(arrselp->fromp()->dtypep(), UnpackArrayDType)) {
-                if (!VN_IS(arrp->subDTypep(), IfaceRefDType)) return;
-                if (VN_AS(arrp->subDTypep(), IfaceRefDType)->isVirtual()) return;
+                = VN_CAST(arrselp->fromp()->dtypep()->skipRefp(), UnpackArrayDType)) {
+                if (!VN_IS(arrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
+                if (VN_AS(arrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) return;
                 // Interface pin attaches to one element of arrayed interface
                 V3Const::constifyParamsEdit(arrselp->bitp());
                 const AstConst* const constp = VN_CAST(arrselp->bitp(), Const);
@@ -386,9 +389,9 @@ private:
         } else {
             AstVar* const pinVarp = nodep->modVarp();
             const AstUnpackArrayDType* const pinArrp
-                = VN_CAST(pinVarp->dtypep(), UnpackArrayDType);
-            if (!pinArrp || !VN_IS(pinArrp->subDTypep(), IfaceRefDType)) return;
-            if (VN_AS(pinArrp->subDTypep(), IfaceRefDType)->isVirtual()) return;
+                = VN_CAST(pinVarp->dtypep()->skipRefp(), UnpackArrayDType);
+            if (!pinArrp || !VN_IS(pinArrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
+            if (VN_AS(pinArrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) return;
             // Arrayed pin/var attaches to arrayed submodule lower port/var, expand it
             AstNode* prevp = nullptr;
             AstNode* prevPinp = nullptr;
@@ -403,7 +406,8 @@ private:
                 if (!pinVarp->backp()) {
                     varNewp = m_deModVars.find(varNewName);
                 } else {
-                    AstIfaceRefDType* const ifaceRefp = VN_AS(pinArrp->subDTypep(), IfaceRefDType);
+                    AstIfaceRefDType* const ifaceRefp
+                        = VN_AS(pinArrp->subDTypep()->skipRefp(), IfaceRefDType);
                     ifaceRefp->cellp(nullptr);
                     varNewp = pinVarp->cloneTree(false);
                     varNewp->name(varNewName);
@@ -435,13 +439,14 @@ private:
                     UASSERT_OBJ(VN_IS(slicep->rhsp(), Const), slicep, "Slices should be constant");
                     const int slice_index
                         = slicep->declRange().left() + in * slicep->declRange().leftToRightInc();
-                    const auto* const exprArrp = VN_AS(varrefp->dtypep(), UnpackArrayDType);
+                    const auto* const exprArrp
+                        = VN_AS(varrefp->dtypep()->skipRefp(), UnpackArrayDType);
                     UASSERT_OBJ(exprArrp, slicep, "Slice of non-array");
                     expr_i = slice_index + exprArrp->lo();
                 } else if (!varrefp) {
                     newp->exprp()->v3error("Unexpected connection to arrayed port");
                 } else if (const auto* const exprArrp
-                           = VN_CAST(varrefp->dtypep(), UnpackArrayDType)) {
+                           = VN_CAST(varrefp->dtypep()->skipRefp(), UnpackArrayDType)) {
                     expr_i = exprArrp->left() + in * exprArrp->declRange().leftToRightInc();
                 }
 
@@ -492,9 +497,9 @@ private:
     void visit(AstNodeAssign* nodep) override {
         if (AstSliceSel* const arrslicep = VN_CAST(nodep->rhsp(), SliceSel)) {
             if (const AstUnpackArrayDType* const arrp
-                = VN_CAST(arrslicep->fromp()->dtypep(), UnpackArrayDType)) {
-                if (!VN_IS(arrp->subDTypep(), IfaceRefDType)) return;
-                if (VN_AS(arrp->subDTypep(), IfaceRefDType)->isVirtual()) return;
+                = VN_CAST(arrslicep->fromp()->dtypep()->skipRefp(), UnpackArrayDType)) {
+                if (!VN_IS(arrp->subDTypep()->skipRefp(), IfaceRefDType)) return;
+                if (VN_AS(arrp->subDTypep()->skipRefp(), IfaceRefDType)->isVirtual()) return;
                 arrslicep->v3warn(E_UNSUPPORTED, "Interface slices unsupported");
                 return;
             }
@@ -557,7 +562,6 @@ private:
     }
 
     //--------------------
-    void visit(AstNodeExpr*) override {}  // Accelerate
     void visit(AstNode* nodep) override { iterateChildren(nodep); }
     void visit(AstNew* nodep) override { iterateChildren(nodep); }
     void visit(AstMethodCall* nodep) override { iterateChildren(nodep); }
diff --git a/test_regress/t/t_interface_array3.py b/test_regress/t/t_interface_array3.py
new file mode 100755
index 000000000..bd059b0f2
--- /dev/null
+++ b/test_regress/t/t_interface_array3.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_interface_array3.v b/test_regress/t/t_interface_array3.v
new file mode 100644
index 000000000..da93b3cf3
--- /dev/null
+++ b/test_regress/t/t_interface_array3.v
@@ -0,0 +1,54 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+interface my_ifc ();
+   logic sig;
+   modport master ( output sig );
+   modport slave ( input sig );
+endinterface
+
+package my_pkg;
+   typedef virtual my_ifc my_vif;
+   function void my_func;
+      input my_vif in_vif;
+      begin
+         in_vif.sig = 1'b1;
+      end
+   endfunction
+endpackage
+
+module dut (input logic clk, my_ifc.slave sif[2]);
+   generate
+      genvar i;
+      for (i=0; i<2; i++) begin
+         always_ff @( posedge clk ) begin
+            if (sif[i].sig == 1'b1) $display("Hello World %0d", i);
+         end
+      end
+   endgenerate
+endmodule
+
+module t;
+   import my_pkg::*;
+
+   logic clk;
+   my_ifc sif[2] ();
+
+   dut DUT (.*);
+
+   initial begin
+      clk = 0;
+      forever #(5) clk = ~clk;
+   end
+
+   initial begin
+      repeat (4) @(posedge clk);
+      my_func(sif[0]);
+      my_func(sif[1]);
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 1a3fd920633f584a5ee84f935c9020903172f942 Mon Sep 17 00:00:00 2001
From: Ryszard Rozak <rrozak@antmicro.com>
Date: Fri, 6 Jun 2025 12:28:29 +0200
Subject: [PATCH 120/211] Tests: Fix t_interface_array2 tests (#6065)

---
 test_regress/t/t_interface_array2.py          | 2 +-
 test_regress/t/t_interface_array2.v           | 2 ++
 test_regress/t/t_interface_array2_coverage.py | 2 +-
 test_regress/t/t_interface_array2_noinl.py    | 2 +-
 4 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/test_regress/t/t_interface_array2.py b/test_regress/t/t_interface_array2.py
index d4f986441..d30a25fe8 100755
--- a/test_regress/t/t_interface_array2.py
+++ b/test_regress/t/t_interface_array2.py
@@ -11,7 +11,7 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-test.compile()
+test.compile(timing_loop=True, v_flags2=["--timing"])
 
 test.execute()
 
diff --git a/test_regress/t/t_interface_array2.v b/test_regress/t/t_interface_array2.v
index ced787689..db5433194 100644
--- a/test_regress/t/t_interface_array2.v
+++ b/test_regress/t/t_interface_array2.v
@@ -54,12 +54,14 @@ module t
         genvar j;
         for (j = 0;j < N-1; j++) begin
             initial begin
+               #1;
                if (ifs[j].logic_in_intf != data[j]) $stop;
             end
         end
     endgenerate
 
     initial begin
+       #1;
        if (ifs[5].logic_in_intf != ~ifs[4].logic_in_intf) $stop;
        $write("*-* All Finished *-*\n");
        $finish;
diff --git a/test_regress/t/t_interface_array2_coverage.py b/test_regress/t/t_interface_array2_coverage.py
index 4b8df9ff0..c0c4569f2 100755
--- a/test_regress/t/t_interface_array2_coverage.py
+++ b/test_regress/t/t_interface_array2_coverage.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('simulator')
 test.top_filename = "t/t_interface_array2.v"
 
-test.compile(v_flags2=["--coverage"])
+test.compile(timing_loop=True, v_flags2=["--coverage --timing"])
 
 test.execute()
 
diff --git a/test_regress/t/t_interface_array2_noinl.py b/test_regress/t/t_interface_array2_noinl.py
index 2c6d02725..4e3a93da0 100755
--- a/test_regress/t/t_interface_array2_noinl.py
+++ b/test_regress/t/t_interface_array2_noinl.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('simulator')
 test.top_filename = "t/t_interface_array2.v"
 
-test.compile(v_flags2=["-fno-inline"])
+test.compile(timing_loop=True, v_flags2=["-fno-inline --timing"])
 
 test.execute()
 

From 9fc223d3eeceb0e01f201ebfb1592f9922990a2c Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 6 Jun 2025 09:59:05 -0400
Subject: [PATCH 121/211] Commentary: FPGA PROCASSINIT guidance (#6067)

---
 docs/guide/warnings.rst | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index d78fac0c5..a26b39bf5 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -1473,7 +1473,9 @@ List Of Warnings
    Warns that the specified signal is given an initial value where it is
    declared, and is also driven in an always process.  Typically such
    initial values should instead be set using a reset signal inside the
-   process, to match requirements of hardware synthesis tools.
+   process, to match requirements of ASIC synthesis tools.  However,
+   declaration initializers are a valid FPGA design idiom and therefore,
+   FPGA users may want to disable this warning.
 
    Faulty example:
 

From d49efa79df39fd34a84438f1b85c8d35f637190c Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 6 Jun 2025 11:29:33 -0400
Subject: [PATCH 122/211] Fix type operator for interface signals (#6050)
 (#6049)

---
 src/V3Param.cpp                 |  5 ++--
 test_regress/t/t_param_type6.py | 18 ++++++++++++
 test_regress/t/t_param_type6.v  | 52 +++++++++++++++++++++++++++++++++
 test_regress/t/t_type.v         | 23 +++++++++++++++
 test_regress/t/t_type_array.py  | 18 ++++++++++++
 test_regress/t/t_type_array.v   | 22 ++++++++++++++
 6 files changed, 136 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_param_type6.py
 create mode 100644 test_regress/t/t_param_type6.v
 create mode 100755 test_regress/t/t_type_array.py
 create mode 100644 test_regress/t/t_type_array.v

diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index b2da22bde..20eada2ff 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -767,6 +767,7 @@ class ParamProcessor final {
             }
         } else if (AstParamTypeDType* const modvarp = pinp->modPTypep()) {
             AstNodeDType* rawTypep = VN_CAST(pinp->exprp(), NodeDType);
+            if (rawTypep) V3Width::widthParamsEdit(rawTypep);
             AstNodeDType* exprp = rawTypep ? rawTypep->skipRefToNonRefp() : nullptr;
             const AstNodeDType* const origp = modvarp->skipRefToNonRefp();
             if (!exprp) {
@@ -945,7 +946,7 @@ class ParamProcessor final {
 
         for (auto* stmtp = srcModpr->stmtsp(); stmtp; stmtp = stmtp->nextp()) {
             if (AstParamTypeDType* dtypep = VN_CAST(stmtp, ParamTypeDType)) {
-                if (VN_IS(dtypep->skipRefp(), VoidDType)) {
+                if (VN_IS(dtypep->skipRefOrNullp(), VoidDType)) {
                     nodep->v3error(
                         "Class parameter type without default value is never given value"
                         << " (IEEE 1800-2023 6.20.1): " << dtypep->prettyNameQ());
@@ -1234,7 +1235,7 @@ class ParamVisitor final : public VNVisitor {
     }
     void visit(AstParamTypeDType* nodep) override {
         iterateChildren(nodep);
-        if (VN_IS(nodep->skipRefp(), VoidDType)) {
+        if (VN_IS(nodep->skipRefOrNullp(), VoidDType)) {
             nodep->v3error("Parameter type without default value is never given value"
                            << " (IEEE 1800-2023 6.20.1): " << nodep->prettyNameQ());
         }
diff --git a/test_regress/t/t_param_type6.py b/test_regress/t/t_param_type6.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_param_type6.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_param_type6.v b/test_regress/t/t_param_type6.v
new file mode 100644
index 000000000..c423bf589
--- /dev/null
+++ b/test_regress/t/t_param_type6.v
@@ -0,0 +1,52 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+interface intf #(
+    parameter type the_type = bit
+);
+    the_type foo;
+endinterface
+
+interface no_param_intf;
+    logic [13:0] bar;
+endinterface
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+
+    intf #(.the_type (logic [7:0])) intf_eight();
+    no_param_intf the_no_param_intf();
+    sub #(.type_bits (8)) sub_eight (
+        .intf_pin (intf_eight),
+        .no_param_intf_pin (the_no_param_intf)
+    );
+
+    // finish report
+    always @ (posedge clk) begin
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+endmodule
+
+module sub #(
+    parameter int type_bits
+)(
+    intf intf_pin,
+    no_param_intf no_param_intf_pin
+);
+
+    localparam type intf_type = type(intf_pin.foo);
+    localparam type no_param_intf_type = type(no_param_intf_pin.bar);
+    initial begin
+        if ($bits(intf_type) != type_bits) $stop();
+        if ($bits(no_param_intf_type) != 14) $stop();
+    end
+
+endmodule
diff --git a/test_regress/t/t_type.v b/test_regress/t/t_type.v
index ce40dee79..b5f6c2e7f 100644
--- a/test_regress/t/t_type.v
+++ b/test_regress/t/t_type.v
@@ -9,8 +9,12 @@ module t(/*AUTOARG*/);
    real x;
    real y;
    var type(x+y) z;
+   localparam type x_type = type(x);
+   x_type value;
 
    initial begin
+      value = 1.234;
+      if (value != 1.234) $stop();
       x = 1.2;
       y = 2.3;
       z = x + y;
@@ -21,4 +25,23 @@ module t(/*AUTOARG*/);
       $finish;
    end
 
+   localparam type x_minus_y_type = type(x-y);
+   sub_real #(.the_type (x_minus_y_type)) the_sub_real_1();
+   sub_real #(.the_type (type(x-y))) the_sub_real_2();
+   localparam type type1 = type(x*y);
+   type1 type1_var;
+   localparam type type2 = type(type1_var/y);
+   sub_real #(.the_type (type2)) the_sub_real_3();
+
+endmodule
+
+module sub_real #(
+    parameter type the_type = bit
+) ();
+    the_type the_value;
+
+    initial begin
+        the_value = 4.567;
+        if (the_value != 4.567) $stop();
+    end
 endmodule
diff --git a/test_regress/t/t_type_array.py b/test_regress/t/t_type_array.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_type_array.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_type_array.v b/test_regress/t/t_type_array.v
new file mode 100644
index 000000000..e2b7ac40e
--- /dev/null
+++ b/test_regress/t/t_type_array.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t(/*AUTOARG*/);
+
+   typedef int arr_t [5];
+   arr_t arr;
+   localparam type arr_type = type(arr);
+   arr_type arr_prime;
+
+   initial begin
+      arr[3] = 123;
+      arr_prime = arr;
+      if (arr_prime[3] != 123) $stop();
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From db03b9538915a89b11b59cec50ebd7f5fd0d015e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 6 Jun 2025 17:17:25 -0400
Subject: [PATCH 123/211] Commentary: Changes update

---
 Changes | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Changes b/Changes
index 290b04282..19d88ee3e 100644
--- a/Changes
+++ b/Changes
@@ -33,6 +33,7 @@ Verilator 5.037 devel
 * Fix constant propagation of post-expand stages (#5955) (#5963) (#5969) (#5972) (#5983).
 * Fix sign extension of signed compared with unsigned case items (#5968).
 * Fix always processes ignoring $finish (#5971). [Hennadii Chernyshchyk]
+* Fix method calls and new to access interface arrays (#5973). [Nick Brereton]
 * Fix streaming to/from packed arrays (#5976). [Geza Lore]
 * Fix segfault writing timestamp to VCD after buffer flush (#5978) (#5980). [Dominick Grochowina]
 * Fix inconsistent assignment error with split-var (#5984) (#5988). [Yutetsu TAKATSUKASA]
@@ -50,6 +51,7 @@ Verilator 5.037 devel
 * Fix associative arrays with enum keys (#6034) (#6035). [Petr Nohavica]
 * Fix GCC 10 read-only linker error (#6040). [Todd Strader]
 * Fix WIDTHCONCAT on packed pattern assignment (#6045). [Dan Petrisko]
+* Fix type operator for interface signals (#6049) (#6050). [Todd Strader]
 * Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix virtual interface array typedef expressions (#6057).
 

From 54e637c72ba5e6bbc7d46e0c72c261aa6566cd6b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 6 Jun 2025 17:18:02 -0400
Subject: [PATCH 124/211] Fix `--skip-identical` skipping on some errors
 (#6066).

---
 Changes           | 1 +
 src/V3Error.cpp   | 3 ++-
 src/V3Error.h     | 7 +++++++
 src/Verilator.cpp | 3 ++-
 4 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/Changes b/Changes
index 19d88ee3e..13540bc1d 100644
--- a/Changes
+++ b/Changes
@@ -54,6 +54,7 @@ Verilator 5.037 devel
 * Fix type operator for interface signals (#6049) (#6050). [Todd Strader]
 * Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix virtual interface array typedef expressions (#6057).
+* Fix `--skip-identical` skipping on some errors (#6066). [Todd Strader]
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 9f1d791c3..3688e9355 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -349,13 +349,14 @@ string V3Error::stripMetaText(const string& text, bool stripContext) VL_PURE {
 }
 
 void V3Error::abortIfWarnings() {
+    if (!isErrorOrWarn()) return;
     const bool exwarn = warnFatal() && warnCount();
     if (errorCount() && exwarn) {
         v3fatalMany("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s), "  //
                                       << V3Error::s().warnCount() << " warning(s)\n");
     } else if (errorCount()) {
         v3fatalMany("Exiting due to " << std::dec << V3Error::s().errorCount() << " error(s)\n");
-    } else if (exwarn) {
+    } else {
         v3fatalMany("Exiting due to " << std::dec << V3Error::s().warnCount() << " warning(s)\n");
     }
 }
diff --git a/src/V3Error.h b/src/V3Error.h
index 633299f80..5a59caba1 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -413,6 +413,9 @@ public:
     void incWarnings() VL_REQUIRES(m_mutex) { ++m_warnCount; }
     void incErrors() VL_REQUIRES(m_mutex) { ++m_errCount; }
     int errorCount() VL_REQUIRES(m_mutex) { return m_errCount; }
+    bool isErrorOrWarn() VL_REQUIRES(m_mutex) {
+        return errorCount() || (warnFatal() && warnCount());
+    }
     bool pretendError(int errorCode) VL_REQUIRES(m_mutex) { return m_pretendError[errorCode]; }
     void pretendError(V3ErrorCode code, bool flag) VL_REQUIRES(m_mutex) {
         if (code == V3ErrorCode::WIDTH) {
@@ -528,6 +531,10 @@ public:
         const V3RecursiveLockGuard guard{s().m_mutex};
         return s().isError(code, supp);
     }
+    static bool isErrorOrWarn() VL_MT_SAFE_EXCLUDES(s().m_mutex) {
+        const V3RecursiveLockGuard guard{s().m_mutex};
+        return s().isErrorOrWarn();
+    }
     static void abortIfErrors() {
         if (errorCount()) abortIfWarnings();
     }
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 1add95bdd..315c2c271 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -755,7 +755,8 @@ static void verilate(const string& argString) {
                                  + "__idmap.xml");
     }
 
-    if (v3Global.opt.skipIdentical().isTrue() || v3Global.opt.makeDepend().isTrue()) {
+    if ((v3Global.opt.skipIdentical().isTrue() || v3Global.opt.makeDepend().isTrue())
+        && !V3Error::isErrorOrWarn()) {
         V3File::writeTimes(v3Global.opt.hierTopDataDir() + "/" + v3Global.opt.prefix()
                                + "__verFiles.dat",
                            argString);

From a0446979904d0d2ca1ac4cc557ff62d9f5f3b1c5 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 6 Jun 2025 21:13:31 -0400
Subject: [PATCH 125/211] Fix signed cast (#6912) (#6068)

---
 src/V3Width.cpp                 |  8 +++++---
 test_regress/t/t_cast_signed.py | 18 ++++++++++++++++++
 test_regress/t/t_cast_signed.v  | 23 +++++++++++++++++++++++
 3 files changed, 46 insertions(+), 3 deletions(-)
 create mode 100755 test_regress/t/t_cast_signed.py
 create mode 100644 test_regress/t/t_cast_signed.v

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index c1eecc786..ef28884e3 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2128,9 +2128,11 @@ class WidthVisitor final : public VNVisitor {
             if (debug() >= 9) nodep->dumpTree("-  CastPre: ");
             // if (debug()) nodep->backp()->dumpTree("-  CastPreUpUp: ");
             if (AstSigned* const fromp = VN_CAST(nodep->fromp(), Signed)) {
-                AstNode* const lhsp = fromp->lhsp()->unlinkFrBack();
-                fromp->replaceWith(lhsp);
-                VL_DO_DANGLING(fromp->deleteTree(), fromp);
+                if (VN_IS(fromp->lhsp(), NodeStream)) {
+                    AstNode* const lhsp = fromp->lhsp()->unlinkFrBack();
+                    fromp->replaceWith(lhsp);
+                    VL_DO_DANGLING(fromp->deleteTree(), fromp);
+                }
             }
             userIterateAndNext(nodep->fromp(), WidthVP{SELF, PRELIM}.p());
             if (debug() >= 9) nodep->dumpTree("-  CastDit: ");
diff --git a/test_regress/t/t_cast_signed.py b/test_regress/t/t_cast_signed.py
new file mode 100755
index 000000000..c39e83d77
--- /dev/null
+++ b/test_regress/t/t_cast_signed.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("simulator")
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_cast_signed.v b/test_regress/t/t_cast_signed.v
new file mode 100644
index 000000000..d9cc53979
--- /dev/null
+++ b/test_regress/t/t_cast_signed.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+
+   logic [7:0] smaller;
+   logic [15:0] bigger;
+   typedef logic [15:0] bigger_t;
+
+   initial begin
+      smaller = 8'hfa;
+      bigger = bigger_t'(signed'(smaller));
+      $display("%x", bigger); // NOCOMMIT
+      if (bigger != 16'hfffa) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule

From 5b2dc5268145cb50fc354beb767e1947c964ee4f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 7 Jun 2025 17:20:48 -0400
Subject: [PATCH 126/211] Fix array bounds checking with class member selects
 (#5996) (#5997).

---
 Changes                           |  1 +
 src/V3Unknown.cpp                 |  2 +-
 test_regress/t/t_select_bound3.py | 18 ++++++++++++++++++
 test_regress/t/t_select_bound3.v  | 28 ++++++++++++++++++++++++++++
 4 files changed, 48 insertions(+), 1 deletion(-)
 create mode 100755 test_regress/t/t_select_bound3.py
 create mode 100644 test_regress/t/t_select_bound3.v

diff --git a/Changes b/Changes
index 13540bc1d..4cf930058 100644
--- a/Changes
+++ b/Changes
@@ -40,6 +40,7 @@ Verilator 5.037 devel
 * Fix AstAssignW conversion (#5991) (#5992). [Ryszard Rozak, Antmicro Ltd.]
 * Fix const-bit-op-tree with single-bit masks (#5993) (#5998). [Yutetsu TAKATSUKASA]
 * Fix arithmetic right-shift by constants over 32 bits (#5994). [Zhen Yan]
+* Fix array bounds checking with class member selects (#5996) (#5997). [Krzysztof Starecki]
 * Fix checking for too-wide divide and modulus (#6003) (#6006). [Zhen Yan]
 * Fix folding of LteS in DfgPeephole (#6000) (#6004). [Geza Lore]
 * Fix slicing of AstExprStmt nodes (#6005). [Ryszard Rozak, Antmicro Ltd.]
diff --git a/src/V3Unknown.cpp b/src/V3Unknown.cpp
index d5c3b3061..2536862ac 100644
--- a/src/V3Unknown.cpp
+++ b/src/V3Unknown.cpp
@@ -102,7 +102,7 @@ class UnknownVisitor final : public VNVisitor {
 
         // Scan back to put the condlvalue above all selects (IE top of the lvalue)
         while (VN_IS(prep->backp(), NodeSel) || VN_IS(prep->backp(), Sel)
-               || VN_IS(prep->backp(), StructSel)) {
+               || VN_IS(prep->backp(), MemberSel) || VN_IS(prep->backp(), StructSel)) {
             prep = VN_AS(prep->backp(), NodeExpr);
         }
         FileLine* const fl = nodep->fileline();
diff --git a/test_regress/t/t_select_bound3.py b/test_regress/t/t_select_bound3.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_select_bound3.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_select_bound3.v b/test_regress/t/t_select_bound3.v
new file mode 100644
index 000000000..19f6ac8f7
--- /dev/null
+++ b/test_regress/t/t_select_bound3.v
@@ -0,0 +1,28 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// Copyright 2025 by Wilson Snyder. This program is free software; you can
+// redistribute it and/or modify it under the terms of either the GNU
+// Lesser General Public License Version 3 or the Perl Artistic License
+// Version 2.0.
+// SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+class cls;
+   int m_field;
+endclass
+
+module t();
+   cls inst[2];
+
+   initial begin
+      // Loop (even just 1 iteration) is needed to reproduce the error
+      for (int i = 0; i < 2; ++i) begin
+         inst[i] = new();
+         inst[i].m_field = i;
+      end
+      for (int i = 0; i < 2; ++i) begin
+         if (inst[i].m_field != i) $stop;
+      end
+      $write("*-* All Finished *-*\n");
+      $finish;
+    end
+endmodule

From a6bae7f196f26387f73e4e8bade1e20dc6d7ea14 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 8 Jun 2025 11:12:39 +0100
Subject: [PATCH 127/211] DFG peephole: Only push SEL through COND when SEL is
 the only sink. (#6071)

This avoids potential O(n) logic duplication where 'n' is the fanout of
the COND node.

Fixes #6064.
---
 src/V3DfgPeephole.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index f297d45bd..ff3b42020 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -844,7 +844,8 @@ class V3DfgPeephole final : public DfgVisitor {
         // Sel from Cond
         if (DfgCond* const condp = fromp->cast<DfgCond>()) {
             // If at least one of the branches are a constant, push the select past the cond
-            if (condp->thenp()->is<DfgConst>() || condp->elsep()->is<DfgConst>()) {
+            if (!condp->hasMultipleSinks()
+                && (condp->thenp()->is<DfgConst>() || condp->elsep()->is<DfgConst>())) {
                 APPLYING(PUSH_SEL_THROUGH_COND) {
                     // The new 'then' vertex
                     DfgSel* const newThenp = make<DfgSel>(vtxp, condp->thenp(), lsb);

From d9534ec6266b6dbc43cbad17c8bb4fdc2638c8da Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Mon, 9 Jun 2025 17:59:01 -0400
Subject: [PATCH 128/211] Fix x assign vs init randomization (#6075)

---
 include/verilated.cpp                         | 32 ++++++++++++++-----
 include/verilated_funcs.h                     | 17 ++++++----
 src/V3EmitCFunc.cpp                           |  4 ++-
 test_regress/t/t_x_assign.cpp                 | 21 +++++-------
 test_regress/t/t_x_assign_unique_2.py         | 24 --------------
 .../t/t_x_rand_mt_stability_zeros.out         |  2 +-
 test_regress/t/t_x_rand_stability_zeros.out   |  2 +-
 7 files changed, 47 insertions(+), 55 deletions(-)
 delete mode 100755 test_regress/t/t_x_assign_unique_2.py

diff --git a/include/verilated.cpp b/include/verilated.cpp
index 928e21524..a1e6975a0 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -438,6 +438,30 @@ WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
     return outwp;
 }
 
+IData VL_SCOPED_RAND_RESET_ASSIGN_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    IData data = ~0;
+    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    data = rng.rand64();
+    data &= VL_MASK_I(obits);
+    return data;
+}
+
+QData VL_SCOPED_RAND_RESET_ASSIGN_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
+    QData data = ~0ULL;
+    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    data = rng.rand64();
+    data &= VL_MASK_Q(obits);
+    return data;
+}
+
+WDataOutP VL_SCOPED_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                        uint64_t salt) VL_MT_UNSAFE {
+    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
+    outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
+    return outwp;
+}
+
 IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
@@ -447,7 +471,6 @@ IData VL_RAND_RESET_I(int obits) VL_MT_SAFE {
     data &= VL_MASK_I(obits);
     return data;
 }
-IData VL_RAND_RESET_ASSIGN_I(int obits) VL_MT_SAFE { return VL_RANDOM_I() & VL_MASK_I(obits); }
 
 QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE {
     if (Verilated::threadContextp()->randReset() == 0) return 0;
@@ -459,18 +482,11 @@ QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE {
     return data;
 }
 
-QData VL_RAND_RESET_ASSIGN_Q(int obits) VL_MT_SAFE { return VL_RANDOM_Q() & VL_MASK_Q(obits); }
-
 WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = VL_RAND_RESET_I(32);
     outwp[VL_WORDS_I(obits) - 1] = VL_RAND_RESET_I(32) & VL_MASK_E(obits);
     return outwp;
 }
-WDataOutP VL_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp) VL_MT_SAFE {
-    for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = VL_RAND_RESET_ASSIGN_I(32);
-    outwp[VL_WORDS_I(obits) - 1] = VL_RAND_RESET_ASSIGN_I(32) & VL_MASK_E(obits);
-    return outwp;
-}
 WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE {
     // Not inlined to speed up compilation of slowpath code
     return VL_ZERO_W(obits, outwp);
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index ca3ca8fe0..412549b7a 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -109,6 +109,16 @@ extern QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt
 extern WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
                                         uint64_t salt) VL_MT_UNSAFE;
 
+/// Random reset a signal of given width (assign time only)
+extern IData VL_SCOPED_RAND_RESET_ASSIGN_I(int obits, uint64_t scopeHash,
+                                           uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (assign time only)
+extern QData VL_SCOPED_RAND_RESET_ASSIGN_Q(int obits, uint64_t scopeHash,
+                                           uint64_t salt) VL_MT_UNSAFE;
+/// Random reset a signal of given width (assign time only)
+extern WDataOutP VL_SCOPED_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp, uint64_t scopeHash,
+                                               uint64_t salt) VL_MT_UNSAFE;
+
 /// Random reset a signal of given width (init time only)
 extern IData VL_RAND_RESET_I(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
@@ -116,13 +126,6 @@ extern QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE;
 /// Random reset a signal of given width (init time only)
 extern WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE;
 
-/// Random reset a signal of given width (assign time only)
-extern IData VL_RAND_RESET_ASSIGN_I(int obits) VL_MT_SAFE;
-/// Random reset a signal of given width (assign time only)
-extern QData VL_RAND_RESET_ASSIGN_Q(int obits) VL_MT_SAFE;
-/// Random reset a signal of given width (assign time only)
-extern WDataOutP VL_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp) VL_MT_SAFE;
-
 /// Zero reset a signal (slow - else use VL_ZERO_W)
 extern WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE;
 
diff --git a/src/V3EmitCFunc.cpp b/src/V3EmitCFunc.cpp
index f9587b4b4..ebec542ab 100644
--- a/src/V3EmitCFunc.cpp
+++ b/src/V3EmitCFunc.cpp
@@ -769,7 +769,8 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                 }
             } else {
                 out += zeroit ? (slow ? "VL_ZERO_RESET_W(" : "VL_ZERO_W(")
-                              : "VL_SCOPED_RAND_RESET_W(";
+                              : (varp->isXTemp() ? "VL_SCOPED_RAND_RESET_ASSIGN_W("
+                                                 : "VL_SCOPED_RAND_RESET_W(");
                 out += cvtToStr(dtypep->widthMin());
                 out += ", " + varNameProtected + suffix;
                 if (!zeroit) {
@@ -797,6 +798,7 @@ string EmitCFunc::emitVarResetRecurse(const AstVar* varp, bool constructing,
                 emitVarResetScopeHash();
                 const uint64_t salt = VString::hashMurmur(varp->prettyName());
                 out += " = VL_SCOPED_RAND_RESET_";
+                if (varp->isXTemp()) out += "ASSIGN_";
                 out += dtypep->charIQWN();
                 out += "(" + cvtToStr(dtypep->widthMin()) + ", "
                        + (m_classOrPackage ? m_classOrPackageHash : "__VscopeHash") + ", "
diff --git a/test_regress/t/t_x_assign.cpp b/test_regress/t/t_x_assign.cpp
index 36aa6371f..eec3f5816 100644
--- a/test_regress/t/t_x_assign.cpp
+++ b/test_regress/t/t_x_assign.cpp
@@ -29,8 +29,6 @@ int main(int argc, const char** argv) {
     Verilated::randReset(0);
 #elif defined(T_X_ASSIGN_UNIQUE_1)
     Verilated::randReset(1);
-#elif defined(T_X_ASSIGN_UNIQUE_2)
-    Verilated::randReset(2);
 #endif
 
     VM_PREFIX* top = new VM_PREFIX{};
@@ -41,17 +39,7 @@ int main(int argc, const char** argv) {
     top->clk = 1;
     top->eval();
 
-#if defined(T_X_ASSIGN_UNIQUE_0)
-    if (top->o_int != 0) {
-        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
-        exit(1);
-    }
-#elif defined(T_X_ASSIGN_UNIQUE_1)
-    if (top->o_int != -1) {
-        vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not correct");
-        exit(1);
-    }
-#elif defined(T_X_ASSIGN_UNIQUE_2)
+#if defined(T_X_ASSIGN_UNIQUE_0) || defined(T_X_ASSIGN_UNIQUE_1)
     if (top->o_int == 0 || top->o_int == -1) {
         vl_fatal(__FILE__, __LINE__, "TOP.t", "x assign was not unique");
         exit(1);
@@ -61,6 +49,13 @@ int main(int argc, const char** argv) {
         vl_fatal(__FILE__, __LINE__, "TOP.t", "incorrect module output");
         exit(1);
     }
+
+    uint32_t o_int_expected = EXPECTED ? 0xffffffff : 0;
+
+    if (top->o_int != o_int_expected) {
+        vl_fatal(__FILE__, __LINE__, "TOP.t", "incorrect module output");
+        exit(1);
+    }
 #endif
 
     VL_DO_DANGLING(delete top, top);
diff --git a/test_regress/t/t_x_assign_unique_2.py b/test_regress/t/t_x_assign_unique_2.py
deleted file mode 100755
index f5cc5d72a..000000000
--- a/test_regress/t/t_x_assign_unique_2.py
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/usr/bin/env python3
-# DESCRIPTION: Verilator: Verilog Test driver/expect definition
-#
-# Copyright 2024 by Wilson Snyder. This program is free software; you can
-# redistribute it and/or modify it under the terms of either the GNU
-# Lesser General Public License Version 3 or the Perl Artistic License
-# Version 2.0.
-# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
-
-import vltest_bootstrap
-
-test.scenarios("vlt_all")
-test.pli_filename = "t/t_x_assign.cpp"
-test.top_filename = "t/t_x_assign.v"
-
-test.compile(
-    make_top_shell=False,
-    make_main=False,
-    verilator_flags2=["--x-assign unique --exe", "--x-initial 0", test.pli_filename],
-)
-
-test.execute()
-
-test.passes()
diff --git a/test_regress/t/t_x_rand_mt_stability_zeros.out b/test_regress/t/t_x_rand_mt_stability_zeros.out
index 1426e7828..573a7650c 100644
--- a/test_regress/t/t_x_rand_mt_stability_zeros.out
+++ b/test_regress/t/t_x_rand_mt_stability_zeros.out
@@ -12,6 +12,6 @@ rand = 0xf0acf3e4
 rand = 0xca0ac74c
 rand = 0x4eddfc2c
 rand = 0x1919db69
-x_assigned = 0x00000000
+x_assigned = 0x486aeb2d
 Last rand = 0x2d118c9b
 *-* All Finished *-*
diff --git a/test_regress/t/t_x_rand_stability_zeros.out b/test_regress/t/t_x_rand_stability_zeros.out
index d54e3ecd4..fe1f4ba0a 100644
--- a/test_regress/t/t_x_rand_stability_zeros.out
+++ b/test_regress/t/t_x_rand_stability_zeros.out
@@ -12,6 +12,6 @@ rand = 0xe85acf2d
 rand = 0x15e12c6a
 rand = 0x0f7f28c0
 rand = 0xe189c52a
-x_assigned = 0x00000000
+x_assigned = 0x486aeb2d
 Last rand = 0xf0700dbf
 *-* All Finished *-*

From 07394fcafa152dcadd838be8ee67068b45959935 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 10 Jun 2025 13:06:05 +0100
Subject: [PATCH 129/211] Automatically publish scheduled RTLMeter results
 (#6074)

Update RTLMeter workflow to automatically push the performance numbers
from scheduled (nightly) runs to verilator/verilator-rtlmeter-results
---
 .github/workflows/reusable-rtlmeter-run.yml | 15 +++-
 .github/workflows/rtlmeter.yml              | 94 +++++++++++++++------
 2 files changed, 79 insertions(+), 30 deletions(-)

diff --git a/.github/workflows/reusable-rtlmeter-run.yml b/.github/workflows/reusable-rtlmeter-run.yml
index e3d62fd3b..c61044e03 100644
--- a/.github/workflows/reusable-rtlmeter-run.yml
+++ b/.github/workflows/reusable-rtlmeter-run.yml
@@ -16,10 +16,17 @@ on:
         description: "Compiler to use: 'gcc' or 'clang'"
         type: string
         required: true
+      # Note: The combination of 'cases' and 'run-name' must be unique for all
+      # invocations of this workflow within a run of the parent workflow.
+      # These two are used together to generate a unique results file name.
       cases:
         description: "RTLMeter cases to run"
         type: string
         required: true
+      run-name:
+        description: "Run name (identifier) to add to collated results"
+        type: string
+        required: true
       compileArgs:
         description: "Additional Verilator command line arguments"
         type: string
@@ -93,10 +100,10 @@ jobs:
         id: results
         working-directory: rtlmeter
         run: |
-          # 'inputs.cases' has special characters, use its md5sum as unique id
-          hash=$(md5sum <<< '${{ inputs.cases }}' | awk '{print $1}')
+          # Use 'inputs.cases' and 'inputs.run-name' to generate a unique file name
+          hash=$(md5sum <<< '${{ inputs.cases }} ${{ inputs.run-name }}' | awk '{print $1}')
           echo "hash=${hash}" >> $GITHUB_OUTPUT
-          ./rtlmeter collate > ../results-${hash}.json
+          ./rtlmeter collate --runName "${{ inputs.run-name }}"  > ../results-${hash}.json
 
       - name: Report results
         working-directory: rtlmeter
@@ -107,7 +114,7 @@ jobs:
         uses: actions/upload-artifact@v4
         with:
           path: results-${{ steps.results.outputs.hash }}.json
-          name: rtlmeter-results-${{ inputs.runs-on }}-${{ inputs.cc }}-${{ steps.results.outputs.hash }}
+          name: rtlmeter-results-${{ steps.results.outputs.hash }}
           overwrite: true
           retention-days: 2
 
diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index 0d575b03d..0472470c9 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -48,6 +48,7 @@ jobs:
       runs-on: ubuntu-24.04
       cc: gcc
       cases: ${{ matrix.cases }}
+      run-name: "gcc"
       compileArgs: ""
       executeArgs: ""
     strategy:
@@ -88,6 +89,7 @@ jobs:
       runs-on: ubuntu-24.04
       cc: clang
       cases: ${{ matrix.cases }}
+      run-name: "clang --threads 4"
       compileArgs: "--threads 4"
       executeArgs: ""
     strategy:
@@ -128,38 +130,78 @@ jobs:
     if: ${{ (contains(needs.*.result, 'success') || contains(needs.*.result, 'failure')) && !cancelled() }}
     runs-on: ubuntu-24.04
     steps:
-      - name: Download all GCC results
+      - name: Download all results
         uses: actions/download-artifact@v4
         with:
-          pattern: rtlmeter-results-ubuntu-24.04-gcc-*
-          path: all-results-gcc-${{ github.run_id }}
+          pattern: rtlmeter-results-*
+          path: all-results-${{ github.run_id }}
           merge-multiple: true
-      - name: Download all Clang results
-        uses: actions/download-artifact@v4
-        with:
-          pattern: rtlmeter-results-ubuntu-24.04-clang-*
-          path: all-results-clang-${{ github.run_id }}
-          merge-multiple: true
-      - name: Tar up results
+      - name: Tar up all results into single archive
         run: |
-          # Ensure combined result directories exists in case of no results
-          mkdir -p all-results-gcc-${{ github.run_id }}
-          mkdir -p all-results-clang-${{ github.run_id }}
-          ls -la all-results*
-          # Tar up each directory
-          tar --posix -c -z -f all-results-gcc-${{ github.run_id }}.tar.gz all-results-gcc-${{ github.run_id }}
-          tar --posix -c -z -f all-results-clang-${{ github.run_id }}.tar.gz all-results-clang-${{ github.run_id }}
-      - name: Upload combined GCC results
+          # Ensure combined result directory exists in case of no results
+          mkdir -p all-results-${{ github.run_id }}
+          ls -la all-results-${{ github.run_id }}
+          # Tar up the results directory
+          tar --posix -c -z -f all-results-${{ github.run_id }}.tar.gz all-results-${{ github.run_id }}
+      - name: Upload combined results
         uses: actions/upload-artifact@v4
         with:
-          path: all-results-gcc-${{ github.run_id }}.tar.gz
-          name: "all-results-gcc"
+          path: all-results-${{ github.run_id }}.tar.gz
+          name: all-results
           overwrite: true
           retention-days: 30
-      - name: Upload combined Clang results
-        uses: actions/upload-artifact@v4
+
+  publish-results:
+    name: Publish results to verilator/verilator-rtlmeter-results
+    needs: combine-results
+    # Only run on scheduled builds on the main repository. We also restrict
+    # the publishing to run only on the first run_attempt. This is required
+    # to prevent multiple uploads the same day (if rerunning), as the
+    # dashboard UI currently assumes there is only one data point per
+    # calendar day. Results from reruns can be imported manually if needed.
+    if: ${{ github.event_name == 'schedule' && github.repository == 'verilator/verilator' && github.run_attempt == 1 && contains(needs.*.result, 'success') && !cancelled() }}
+    runs-on: ubuntu-24.04
+    steps:
+      - name: Download combined results
+        uses: actions/download-artifact@v4
         with:
-          path: all-results-clang-${{ github.run_id }}.tar.gz
-          name: "all-results-clang"
-          overwrite: true
-          retention-days: 30
+          name: all-results
+          path: results
+      - name: Extract combined results
+        working-directory: results
+        run: |
+            tar xzfv all-results-${{ github.run_id }}.tar.gz
+            ls -la
+      # Pushing to verilator/verilator-rtlmeter-results requires elevated permissions
+      - name: Generate access token
+        id: generate-token
+        uses: actions/create-github-app-token@v2.0.6
+        with:
+          app-id: ${{ vars.RTLMETER_RESULTS_CI_APP_ID }}
+          private-key: ${{ secrets.RTLMETER_RESULTS_CI_APP_PRIVATE_KEY }}
+          owner: verilator
+          repositories: verilator-rtlmeter-results
+      - name: Checkout verilator-rtlmeter-results
+        uses: actions/checkout@v4
+        with:
+          repository: "verilator/verilator-rtlmeter-results"
+          token: ${{ steps.generate-token.outputs.token }}
+          path: verilator-rtlmeter-results
+      - name: Import results
+        id: import-results
+        working-directory: verilator-rtlmeter-results
+        run: |
+          for f in $(find ../results -name "*.json"); do \
+            echo "Importing $f"; \
+            ./bin/add-rtlmeter-result $f; \
+          done
+          test -z "$(git status --porcelain)" || echo "valid=1" >> "$GITHUB_OUTPUT"
+      - name: Push to verilator-rtlmeter-results
+        if: ${{ steps.import-results.outputs.valid }}
+        working-directory: verilator-rtlmeter-results
+        run: |
+          git config --global user.email "action@example.com"
+          git config --global user.name "github action"
+          git add .
+          git commit -m "Verilator CI: Results of 'RTLMeter' workflow run #${{ github.run_number }}"
+          git push origin

From 86d2ea8c70fd8c810e6b19e5c689e5392b9db8d1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Tue, 10 Jun 2025 14:17:26 +0200
Subject: [PATCH 130/211] Optimize DPI temporary 'for' loop performance (#6079)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
---
 src/V3Task.cpp | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index e7bdcea80..23d42ad3e 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -1944,6 +1944,7 @@ string V3Task::assignInternalToDpi(AstVar* portp, bool isPtr, const string& frSu
     // But for now, we'll just text-bash it.
     const string frName = frPrefix + portp->name() + frSuffix;
     const string toName = portp->name() + toSuffix;
+    const string idx = portp->name() + "__Vidx";
     size_t unpackSize = 1;  // non-unpacked array is treated as size 1
     int unpackDim = 0;
     if (AstUnpackArrayDType* const unpackp
@@ -1954,17 +1955,23 @@ string V3Task::assignInternalToDpi(AstVar* portp, bool isPtr, const string& frSu
     }
     if (portp->basicp()->isDpiBitVec() || portp->basicp()->isDpiLogicVec()) {
         const bool isBit = portp->basicp()->isDpiBitVec();
-        const string idx = portp->name() + "__Vidx";
-        stmt = "for (size_t " + idx + " = 0; " + idx + " < " + cvtToStr(unpackSize) + "; ++" + idx
-               + ") ";
+        const bool needsFor = unpackSize > 1;
+        if (needsFor) {
+            stmt = "for (size_t " + idx + " = 0; " + idx + " < " + cvtToStr(unpackSize) + "; ++"
+                   + idx + ") ";
+        }
+
         stmt += (isBit ? "VL_SET_SVBV_"s : "VL_SET_SVLV_"s)
                 + portp->dtypep()->skipRefp()->charIQWN() + "(" + cvtToStr(portp->width()) + ", ";
-        stmt += toName + " + " + cvtToStr(portp->dtypep()->skipRefp()->widthWords()) + " * " + idx
-                + ", ";
+        stmt += toName;
+        if (needsFor) {
+            stmt += " + " + cvtToStr(portp->dtypep()->skipRefp()->widthWords()) + " * " + idx;
+        }
+        stmt += ", ";
         if (unpackDim > 0) {  // Access multi-dimensional array as a 1D array
             stmt += "(&" + frName;
             for (int i = 0; i < unpackDim; ++i) stmt += "[0]";
-            stmt += ")[" + idx + "])";
+            stmt += ")[" + (needsFor ? idx : "0") + "])";
         } else {
             stmt += frName + ")";
         }
@@ -1973,11 +1980,13 @@ string V3Task::assignInternalToDpi(AstVar* portp, bool isPtr, const string& frSu
             = portp->basicp() && portp->basicp()->keyword() == VBasicDTypeKwd::CHANDLE;
         const bool isString
             = portp->basicp() && portp->basicp()->keyword() == VBasicDTypeKwd::STRING;
-        const string idx = portp->name() + "__Vidx";
-        stmt = "for (size_t " + idx + " = 0; " + idx + " < " + cvtToStr(unpackSize) + "; ++" + idx
-               + ") ";
+        const string unpackAt = unpackSize > 1 ? "[" + idx + "]" : "[0]";
         if (unpackDim > 0) {
-            stmt += toName + "[" + idx + "]";
+            const string forStmt = unpackSize > 1
+                                       ? "for (size_t " + idx + " = 0; " + idx + " < "
+                                             + cvtToStr(unpackSize) + "; ++" + idx + ") "
+                                       : "";
+            stmt += forStmt + toName + unpackAt;
         } else {
             if (isPtr) stmt += "*";  // DPI outputs are pointers
             stmt += toName;
@@ -1990,7 +1999,7 @@ string V3Task::assignInternalToDpi(AstVar* portp, bool isPtr, const string& frSu
         if (unpackDim > 0) {
             stmt += "(&" + frName;
             for (int i = 0; i < unpackDim; ++i) stmt += "[0]";
-            stmt += ")[" + idx + "]";
+            stmt += ")" + unpackAt;
         } else {
             stmt += frName;
         }

From 1c357ba5082ac1b1d1e2dcb564f69614fe82582d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Jun 2025 07:45:32 -0400
Subject: [PATCH 131/211] Commentary

---
 docs/guide/warnings.rst | 31 +++++++++++++++++++++++++------
 1 file changed, 25 insertions(+), 6 deletions(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index a26b39bf5..3827c9b89 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -173,6 +173,8 @@ List Of Warnings
 
    This error may be disabled with a lint_off BADSTDPRAGMA metacomment.
 
+   Ignoring this warning will cause the pragma to be ignored.
+
 
 .. option:: BADVLTPRAGMA
 
@@ -189,6 +191,8 @@ List Of Warnings
 
    This error may be disabled with a lint_off BADVLTPRAGMA metacomment.
 
+   Ignoring this warning will cause the pragma to be ignored.
+
 
 .. option:: BLKANDNBLK
 
@@ -498,7 +502,8 @@ List Of Warnings
 
 .. option:: DEFOVERRIDE
 
-   Warns that a macro definition within the code is being overridden by a command line directive:
+   Warns that a macro definition within the code is being overridden by a
+   command line directive:
 
    For example, running Verilator with :code:`<+define+\<DUP\>=\<def2\>>` and
 
@@ -1103,8 +1108,6 @@ List Of Warnings
 
 .. option:: LITENDIAN
 
-   .. TODO better example
-
    The naming of this warning is in contradiction with the common
    interpretation of little endian. It was therefore renamed to
    :option:`ASCRANGE`. While :option:`LITENDIAN` remains for
@@ -1249,6 +1252,8 @@ List Of Warnings
    modules' signals seem identical, e.g., multiple modules with a "clk"
    input.
 
+   Ignoring this warning will make multiple tops, as described in (3) above.
+
 
 .. option:: NEEDTIMINGOPT
 
@@ -1291,6 +1296,9 @@ List Of Warnings
    :code:`$psprintf` system function is replaced by its standard equivalent
    :code:`$sformatf`.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
 
 .. option:: NOTIMING
 
@@ -1420,6 +1428,7 @@ List Of Warnings
    declared before being used. However, several standard libraries
    including UVM violate this, and other tools do not warn.
 
+
 .. option:: PORTSHORT
 
    Warns that an output port is connected to a constant.
@@ -1467,6 +1476,9 @@ List Of Warnings
    The portable way to suppress this warning is to use a define value other
    than zero, when it is to be used in a preprocessor expression.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
 
 .. option:: PROCASSINIT
 
@@ -1529,7 +1541,7 @@ List Of Warnings
    inside the protected region will be partly checked for correctness but is
    otherwise ignored.
 
-   Suppressing the warning may make Verilator differ from a simulator that
+   Ignoring the warning may make Verilator differ from a simulator that
    accepts the protected code.
 
 
@@ -1547,6 +1559,9 @@ List Of Warnings
    Warns that a real number is being implicitly rounded to an integer, with
    possible loss of precision.
 
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
    Faulty example:
 
    .. code-block:: sv
@@ -1576,8 +1591,12 @@ List Of Warnings
 
 .. option:: REDEFMACRO
 
-   Warns that the code has redefined the same macro with a different value,
-   for example:
+   Warns that the code has redefined the same macro with a different value.
+
+   Ignoring this warning will only suppress the lint check; it will
+   simulate correctly.
+
+   For example:
 
    .. code-block:: sv
       :linenos:

From b553502d8a927f0b41d789b158bef8eea1fd826a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Jun 2025 08:13:34 -0400
Subject: [PATCH 132/211] Fix number dumps to show 'null'

---
 src/V3Number.cpp | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index b73ea73e9..d8cbf465f 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -533,12 +533,9 @@ V3Number& V3Number::setMask(int nbits, int lsb) {
 
 string V3Number::ascii(bool prefixed, bool cleanVerilog) const VL_MT_STABLE {
     // Correct number of zero bits/width matters
+    if (is1Step()) return "1step";
+    if (isNull()) return "null";
     std::ostringstream out;
-
-    if (is1Step()) {
-        out << "1step";
-        return out.str();
-    }
     if (isDouble()) {
         out.precision(17);
         if (VL_UNCOVERABLE(width() != 64)) {

From 75a36a6ef8ac38169e9688a05f138ec07b103427 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Jun 2025 08:22:43 -0400
Subject: [PATCH 133/211] Commentary: Changes update

---
 Changes | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index 4cf930058..263654108 100644
--- a/Changes
+++ b/Changes
@@ -26,7 +26,8 @@ Verilator 5.037 devel
 * Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
 * Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
-* Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025). [Todd Strader]
+* Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
@@ -55,6 +56,7 @@ Verilator 5.037 devel
 * Fix type operator for interface signals (#6049) (#6050). [Todd Strader]
 * Fix V3OrderParallel scoring contraction hang (#6052). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix virtual interface array typedef expressions (#6057).
+* Fix DFG peephole select conditionals (#6064) (#6071). [Geza Lore]
 * Fix `--skip-identical` skipping on some errors (#6066). [Todd Strader]
 
 

From 58ea7ad3613a37911cdf0f61147d628dd654a7bd Mon Sep 17 00:00:00 2001
From: Kamil Rakoczy <krakoczy@antmicro.com>
Date: Tue, 10 Jun 2025 18:03:26 +0200
Subject: [PATCH 134/211] Fix class typedef elaboration (#6080)

---
 src/V3Param.cpp                           |  4 ++--
 test_regress/t/t_forward_nested_typedef.v | 11 +++++++++++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/src/V3Param.cpp b/src/V3Param.cpp
index 20eada2ff..d3ceb7a24 100644
--- a/src/V3Param.cpp
+++ b/src/V3Param.cpp
@@ -1167,7 +1167,7 @@ class ParamVisitor final : public VNVisitor {
     void relinkDots() {
         for (AstDot* const dotp : m_dots) {
             const AstClassOrPackageRef* const classRefp = VN_AS(dotp->lhsp(), ClassOrPackageRef);
-            const AstClass* const lhsClassp = VN_AS(classRefp->classOrPackageNodep(), Class);
+            const AstClass* const lhsClassp = VN_AS(classRefp->classOrPackageSkipp(), Class);
             AstClassOrPackageRef* const rhsp = VN_AS(dotp->rhsp(), ClassOrPackageRef);
             for (auto* itemp = lhsClassp->membersp(); itemp; itemp = itemp->nextp()) {
                 if (itemp->name() == rhsp->name()) {
@@ -1323,7 +1323,7 @@ class ParamVisitor final : public VNVisitor {
         // by a class with actual parameter values.
         const AstClass* lhsClassp = nullptr;
         const AstClassOrPackageRef* const classRefp = VN_CAST(nodep->lhsp(), ClassOrPackageRef);
-        if (classRefp) lhsClassp = VN_CAST(classRefp->classOrPackageNodep(), Class);
+        if (classRefp) lhsClassp = VN_CAST(classRefp->classOrPackageSkipp(), Class);
         AstNode* rhsDefp = nullptr;
         AstClassOrPackageRef* const rhsp = VN_CAST(nodep->rhsp(), ClassOrPackageRef);
         if (rhsp) rhsDefp = rhsp->classOrPackageNodep();
diff --git a/test_regress/t/t_forward_nested_typedef.v b/test_regress/t/t_forward_nested_typedef.v
index 5d2c54fed..ff643e21c 100644
--- a/test_regress/t/t_forward_nested_typedef.v
+++ b/test_regress/t/t_forward_nested_typedef.v
@@ -6,12 +6,18 @@
 
 typedef class Bar;
 typedef Bar Baz;
+typedef Quux #(16, 32) Quux_t;
+typedef Quux_t Quuux_t;
 
 module t;
     initial begin
         Bar::Qux::boo(1);
         Baz::Qux::boo(1);
+        Quux_t::Qux::boo(1);
+        Quuux_t::Qux::boo(1);
         if (!Bar::Qux::finish) $stop;
+        if (!Quux_t::Qux::finish) $stop;
+        if (!Quuux_t::Qux::finish) $stop;
         $write("*-* All Finished *-*\n");
         $finish;
     end
@@ -34,3 +40,8 @@ endclass
 class Bar;
     typedef Foo#(Bar) Qux;
 endclass
+
+class Quux #(PARA_A = 1, PARA_B = 2);
+    typedef Quux #(PARA_A, PARA_B) this_t;
+    typedef Foo#(this_t) Qux;
+endclass

From ac06b6fc4f7bc7393ce4d77574b55df263ed8a2e Mon Sep 17 00:00:00 2001
From: Paul Swirhun <63216497+paul-demo@users.noreply.github.com>
Date: Tue, 10 Jun 2025 14:23:16 -0700
Subject: [PATCH 135/211] Fix streaming operator packing order (#5903) (#6077)

---
 include/verilated_funcs.h         | 43 ++++++++++---------
 test_regress/t/t_stream_dynamic.v | 71 +++++++++++++++++++++++++++----
 test_regress/t/t_stream_unpack.v  | 64 ++++++++++++++++++++++++++++
 3 files changed, 151 insertions(+), 27 deletions(-)

diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index 412549b7a..e62e9f172 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -1607,19 +1607,21 @@ static inline WDataOutP VL_STREAML_WWI(int lbits, WDataOutP owp, WDataInP const
 
 static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<CData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<IData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
 static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<SData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<IData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<IData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
 static inline IData VL_PACK_I_RI(int obits, int lbits, const VlQueue<IData>& q) {
     IData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(q.size() - 1 - i) << (i * lbits);
     return ret;
 }
 
@@ -1648,19 +1650,22 @@ static inline IData VL_PACK_I_UI(int obits, int lbits, const VlUnpacked<IData, N
 
 static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<CData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
 static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<SData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
 static inline QData VL_PACK_Q_RI(int obits, int lbits, const VlQueue<IData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= static_cast<QData>(q.at(i)) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i)
+        ret |= static_cast<QData>(q.at(q.size() - 1 - i)) << (i * lbits);
     return ret;
 }
 
@@ -1690,7 +1695,7 @@ static inline QData VL_PACK_Q_UI(int obits, int lbits, const VlUnpacked<IData, N
 
 static inline QData VL_PACK_Q_RQ(int obits, int lbits, const VlQueue<QData>& q) {
     QData ret = 0;
-    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(i) << (i * lbits);
+    for (size_t i = 0; i < q.size(); ++i) ret |= q.at(q.size() - 1 - i) << (i * lbits);
     return ret;
 }
 
@@ -1705,7 +1710,7 @@ static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
                                      const VlQueue<CData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
@@ -1713,7 +1718,7 @@ static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
                                      const VlQueue<SData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - i - 1), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
@@ -1721,7 +1726,7 @@ static inline WDataOutP VL_PACK_W_RI(int obits, int lbits, WDataOutP owp,
                                      const VlQueue<IData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WI(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WI(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
@@ -1756,7 +1761,7 @@ static inline WDataOutP VL_PACK_W_RQ(int obits, int lbits, WDataOutP owp,
                                      const VlQueue<QData>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WQ(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WQ(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
@@ -1774,7 +1779,7 @@ static inline WDataOutP VL_PACK_W_RW(int obits, int lbits, WDataOutP owp,
                                      const VlQueue<VlWide<N_Words>>& q) {
     VL_MEMSET_ZERO_W(owp + 1, VL_WORDS_I(obits) - 1);
     for (size_t i = 0; i < q.size(); ++i)
-        _vl_insert_WW(owp, q.at(i), i * lbits + lbits - 1, i * lbits);
+        _vl_insert_WW(owp, q.at(q.size() - 1 - i), i * lbits + lbits - 1, i * lbits);
     return owp;
 }
 
@@ -2230,49 +2235,49 @@ static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<CData>& q, IData
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<SData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_I(int lbits, int rbits, VlQueue<IData>& q, IData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<CData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<SData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_Q(int lbits, int rbits, VlQueue<IData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const IData mask = VL_MASK_I(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RQ_Q(int lbits, int rbits, VlQueue<QData>& q, QData from) {
     const size_t size = (rbits + lbits - 1) / lbits;
     q.renew(size);
     const QData mask = VL_MASK_Q(lbits);
-    for (size_t i = 0; i < size; ++i) q.atWrite(i) = (from >> (i * lbits)) & mask;
+    for (size_t i = 0; i < size; ++i) q.atWrite(q.size() - 1 - i) = (from >> (i * lbits)) & mask;
 }
 
 static inline void VL_UNPACK_RI_W(int lbits, int rbits, VlQueue<CData>& q, WDataInP rwp) {
diff --git a/test_regress/t/t_stream_dynamic.v b/test_regress/t/t_stream_dynamic.v
index 3a7c57948..e9bdc97d9 100644
--- a/test_regress/t/t_stream_dynamic.v
+++ b/test_regress/t/t_stream_dynamic.v
@@ -14,7 +14,7 @@ typedef enum bit [5:0] {
 } enum_t;
 
 module t (/*AUTOARG*/);
-   initial begin
+   task test1;
       bit arr[];
       bit [1:0] arr2[$];
       bit [5:0] arr6[$];
@@ -36,9 +36,7 @@ module t (/*AUTOARG*/);
       arr160 = '{2{160'h0123456789abcdef0123456789abcdef01234567}};
 
       { >> bit {arr}} = bit6;
-      `checkp(arr, "'{'h0, 'h0, 'h0, 'h1, 'h1, 'h1} ");  // Majority rules
-      // `checkp(arr, "'{'h1, 'h1, 'h1, 'h0, 'h0, 'h0} ");  // VCS
-
+      `checkp(arr, "'{'h1, 'h1, 'h1, 'h0, 'h0, 'h0} ");
       ans = { >> bit {arr} };
       `checkh(ans, bit6);
 
@@ -46,8 +44,7 @@ module t (/*AUTOARG*/);
       `checkh(ans_enum, bit6);
 
       { << bit {arr}} = bit6;
-      `checkp(arr, "'{'h1, 'h1, 'h1, 'h0, 'h0, 'h0} ");  // Majority rules
-      // `checkp(arr, "'{'h0, 'h0, 'h0, 'h1, 'h1, 'h1} ");  // VCS
+      `checkp(arr, "'{'h0, 'h0, 'h0, 'h1, 'h1, 'h1} ");
 
       ans = { << bit {arr} };
       `checkh(ans, bit6);
@@ -58,7 +55,7 @@ module t (/*AUTOARG*/);
 `ifdef VERILATOR
       // This set flags errors on other simulators
       { >> bit[1:0] {arr2}} = bit6;
-      `checkp(arr2, "'{'h0, 'h2, 'h3} ");
+      `checkp(arr2, "'{'h3, 'h2, 'h0} ");
 
       ans = { >> bit[1:0] {arr2} };
       `checkh(ans, bit6);
@@ -67,7 +64,7 @@ module t (/*AUTOARG*/);
       `checkh(ans_enum, bit6);
 
       { << bit[1:0] {arr2}} = bit6;
-      `checkp(arr2, "'{'h3, 'h2, 'h0} ");
+      `checkp(arr2, "'{'h0, 'h2, 'h3} ");
 
       ans = { << bit[1:0] {arr2} };
       `checkh(ans, bit6);
@@ -143,6 +140,64 @@ module t (/*AUTOARG*/);
       `checkh(arr160[0], 160'h67452301efcdab8967452301efcdab8967452301);
       { << byte {arr160} } = bit320;
       `checkh(arr160[0], 160'h0123456789abcdef0123456789abcdef01234567);
+   endtask
+
+   task test2;
+      byte unpack [8];  // [0] is left-most for purposes of streaming
+      bit [63:0] bits;  // [63] is left-most for purposes of streaming
+      longint word;   // [63] is left-most for purposes of streaming
+
+      // Using packed bits
+      $display("Test2");
+      bits = {8'hfa, 8'hde, 8'hca, 8'hfe,
+              8'hde, 8'had, 8'hbe, 8'hef};
+      word = {>>{bits}};
+     `checkh(word, 64'hfadecafedeadbeef);
+      word = {<<8{bits}};
+     `checkh(word, 64'hefbeaddefecadefa);
+
+      // Using byte unpacked array
+      unpack = '{8'hfa, 8'hde, 8'hca, 8'hfe,
+                 8'hde, 8'had, 8'hbe, 8'hef};
+     `checkh(unpack[0], 8'hfa);
+     `checkh(unpack[7], 8'hef);
+      word = {>>{unpack}};
+     `checkh(word, 64'hfadecafedeadbeef);
+      word = {<<8{unpack}};
+     `checkh(word, 64'hefbeaddefecadefa);
+   endtask
+
+   task test3;
+      byte dyn8 [];  // [0] is left-most for purposes of streaming
+      longint word;   // [63] is left-most for purposes of streaming
+      // verilator lint_off ASCRANGE
+      bit [0:63] rbits;  // [63] is still left-most for purposes of streaming
+      // verilator lint_on ASCRANGE
+
+      // Using byte dynamic array
+      dyn8 = new[8]('{8'hfa, 8'hde, 8'hca, 8'hfe,
+                      8'hde, 8'had, 8'hbe, 8'hef});
+     `checkh(dyn8[0], 8'hfa);
+     `checkh(dyn8[7], 8'hef);
+      word = {>>{dyn8}};
+     `checkh(word, 64'hfadecafedeadbeef);
+      word = {<<1{dyn8}};
+     `checkh(word, 64'hf77db57b7f537b5f);
+      word = {<<8{dyn8}};
+     `checkh(word, 64'hefbeaddefecadefa);
+
+      rbits = {>>{dyn8}};
+      `checkh(rbits, 64'hfadecafedeadbeef);
+      rbits = {<<1{dyn8}};
+      `checkh(rbits, 64'hf77db57b7f537b5f);
+      rbits = {<<8{dyn8}};
+      `checkh(rbits, 64'hefbeaddefecadefa);
+   endtask
+
+   initial begin;
+      test1();
+      test2();
+      test3();
       $write("*-* All Finished *-*\n");
       $finish;
    end
diff --git a/test_regress/t/t_stream_unpack.v b/test_regress/t/t_stream_unpack.v
index 901fc421b..b83ea9174 100644
--- a/test_regress/t/t_stream_unpack.v
+++ b/test_regress/t/t_stream_unpack.v
@@ -33,6 +33,14 @@ module t (/*AUTOARG*/);
       logic f [8];
       logic [1:0][7:0] g;
       logic [1:0][1:0][3:0] h;
+      byte i [];
+      longint j;
+      int k;
+      int l [];
+      logic [127:0] m;
+      longint n [];
+      logic [255:0] o;
+      logic [127:0] p[];
 
       { >> bit {arr}} = bit6;
       `checkp(arr, "'{'h1, 'h1, 'h1, 'h0, 'h0, 'h0} ");
@@ -219,6 +227,62 @@ module t (/*AUTOARG*/);
       h = { << 8 {16'hABCD}};
       `checkh(h, 16'hCDAB);
 
+      i = new[8]('{8'hfa, 8'hde, 8'hca, 8'hfe,
+                   8'hde, 8'had, 8'hbe, 8'hef});
+      `checkh(i[0], 8'hfa);
+      `checkh(i[7], 8'hef);
+      j = {>>{i}};
+      `checkh(j, 64'hfadecafedeadbeef);
+      j = {<<8{i}};
+      `checkh(j, 64'hefbeaddefecadefa);
+
+      i = new[4]('{8'hba, 8'hbe, 8'hfa, 8'hce});
+      k = {>>{i}};
+      `checkh(k, 32'hbabeface);
+      k = {<<8{i}};
+      `checkh(k, 32'hcefabeba);
+
+      i = new[8]('{8'hba, 8'hbe, 8'hfa, 8'hce, 8'hde, 8'had, 8'hbe, 8'hef});
+      j = {>>{i}};
+      `checkh(j, 64'hbabefacedeadbeef);
+      j = {<<8{i}};
+      `checkh(j, 64'hefbeaddecefabeba);
+
+      i = new[16]('{8'hba, 8'hbe, 8'hfa, 8'hce, 8'hde, 8'had, 8'hbe, 8'hef,
+                    8'hde, 8'had, 8'hbe, 8'hef, 8'hde, 8'had, 8'hbe, 8'hef});
+      m = {>>{i}};
+      `checkh(m, 128'hbabefacedeadbeefdeadbeefdeadbeef);
+      m = {<<8{i}};
+      `checkh(m, 128'hefbeaddeefbeaddeefbeaddecefabeba);
+
+      l = new[2]('{32'hbabeface, 32'hdeadbeef});
+      j = {>>{l}};
+      `checkh(j, 64'hbabefacedeadbeef);
+      j = {<<8{l}};
+      `checkh(j, 64'hefbeaddecefabeba);
+
+      l = new[4]('{32'hbabeface, 32'hdeadbeef, 32'hdeadbeef, 32'hdeadbeef});
+      m = {>>{l}};
+      `checkh(m, 128'hbabefacedeadbeefdeadbeefdeadbeef);
+      m = {<<8{l}};
+       `checkh(m, 128'hefbeaddeefbeaddeefbeaddecefabeba);
+
+      n = new[2]('{64'hfadecafedeadbeef, 64'habcd0123456789ab});
+      m = {>>{n}};
+      `checkh(m, 128'hfadecafedeadbeefabcd0123456789ab);
+      m = {<<64{n}};
+      `checkh(m, 128'habcd0123456789abfadecafedeadbeef);
+
+      p = new[2]('{128'hfadecafedeadbeefabcd0123456789ab,
+                   128'habcd0123456789abfadecafedeadbeef});
+      o = {>>{p}};
+      `checkh(o, 256'hfadecafedeadbeefabcd0123456789ababcd0123456789abfadecafedeadbeef);
+      o = {<<128{p}};
+      `checkh(o, 256'habcd0123456789abfadecafedeadbeeffadecafedeadbeefabcd0123456789ab);
+      {>>{p}} = o;
+      `checkh(p[0], 128'hfadecafedeadbeefabcd0123456789ab);
+      `checkh(p[1], 128'habcd0123456789abfadecafedeadbeef);
+
       $write("*-* All Finished *-*\n");
       $finish;
    end

From 4925f9ad73ea229f9a804021105a2fc666f319d7 Mon Sep 17 00:00:00 2001
From: Paul Swirhun <63216497+paul-demo@users.noreply.github.com>
Date: Tue, 10 Jun 2025 14:39:13 -0700
Subject: [PATCH 136/211] Support 1-bit params with -G and -pvalue (#6051)
 (#6082)

---
 src/V3AstNodes.cpp                 | 2 +-
 test_regress/t/t_flag_parameter.v  | 9 +++++++++
 test_regress/t/t_flag_parameter.vc | 8 ++++++++
 3 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 9b5c9947f..8981bfc0c 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -425,7 +425,7 @@ AstConst* AstConst::parseParamLiteral(FileLine* fl, const string& literal) {
         // the Verilog literal parser.
         char* endp;
         const int v = strtol(literal.c_str(), &endp, 0);
-        if ((v != 0) && (endp[0] == 0)) {  // C literal
+        if ((v != 0) && (v != 1) && (endp[0] == 0)) {  // C literal
             return new AstConst{fl, AstConst::Signed32{}, v};
         } else {  // Try a Verilog literal (fatals if not)
             return new AstConst{fl, AstConst::StringToParse{}, literal.c_str()};
diff --git a/test_regress/t/t_flag_parameter.v b/test_regress/t/t_flag_parameter.v
index f4f330d26..68759b7d4 100644
--- a/test_regress/t/t_flag_parameter.v
+++ b/test_regress/t/t_flag_parameter.v
@@ -57,6 +57,11 @@ module t;
    parameter int71 = 1;
    parameter int72 = 1;
 
+   parameter bit bit0to0 = 0;
+   parameter bit bit1to1 = 1;
+   parameter bit bit0to1 = 0;
+   parameter bit bit1to0 = 1;
+
    initial begin
       `check(string1,"New String");
       `check(string2,"New String");
@@ -88,6 +93,10 @@ module t;
       `check(int62,32'hdeadbeef);
       `check(int71,-1000);
       `check(int72,-1000);
+      `check(bit0to0, 1'b0);
+      `check(bit1to1, 1'b1);
+      `check(bit0to1, 1'b1);
+      `check(bit1to0, 1'b0);
 
       // Check parameter assigned simple integer literal is signed
       if ((int11 << 27) >>> 31 != -1) $stop;
diff --git a/test_regress/t/t_flag_parameter.vc b/test_regress/t/t_flag_parameter.vc
index 35687e39e..6bac0b290 100644
--- a/test_regress/t/t_flag_parameter.vc
+++ b/test_regress/t/t_flag_parameter.vc
@@ -28,3 +28,11 @@
 -pvalue+int62="32'hdead_beef"
 -Gint71=-1000
 -pvalue+int72=-1000
+-Gbit0to0=0
+-pvalue+bit0to0=0
+-Gbit1to1=1
+-pvalue+bit1to1=1
+-Gbit0to1=1
+-pvalue+bit0to1=1
+-Gbit1to0=0
+-pvalue+bit1to0=0

From 4990b441209eda44b2a2982c17402f225b927a21 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 10 Jun 2025 20:17:32 -0400
Subject: [PATCH 137/211] Fix trace hierarchicalName runtime errors (#5668)
 (#6076).

---
 Changes                                       |   1 +
 include/verilated_fst_c.cpp                   |  29 +-
 include/verilated_saif_c.cpp                  |  38 ++-
 include/verilated_trace.h                     |   3 +-
 include/verilated_vcd_c.cpp                   |  41 +--
 src/V3TraceDecl.cpp                           |  52 +--
 test_regress/t/t_clocker.out                  |   7 +-
 test_regress/t/t_cover_line_trace.out         |   2 +-
 test_regress/t/t_cover_trace_always.out       |   2 -
 test_regress/t/t_flag_csplit_groups.py        |   2 +-
 test_regress/t/t_hier_trace_noinl.out         |  76 ++---
 .../t/t_interface_ref_trace_noinl.out         |   3 +-
 test_regress/t/t_timing_osc.out               |   2 -
 test_regress/t/t_timing_trace.out             |   2 -
 test_regress/t/t_timing_trace_fst.out         |   4 +-
 test_regress/t/t_timing_trace_saif.out        |   2 -
 test_regress/t/t_trace_binary.out             |   2 -
 test_regress/t/t_trace_class.out              |   2 -
 test_regress/t/t_trace_complex.out            | 300 +++++++++---------
 test_regress/t/t_trace_complex_fst.out        |  34 +-
 test_regress/t/t_trace_complex_params.out     | 300 +++++++++---------
 test_regress/t/t_trace_complex_params_fst.out |  34 +-
 test_regress/t/t_trace_complex_structs.out    |   2 +-
 .../t/t_trace_complex_structs_fst.out         |  34 +-
 test_regress/t/t_trace_event.out              |   2 -
 test_regress/t/t_trace_event_fst.out          |   4 +-
 test_regress/t/t_trace_no_top_name.out        |   2 -
 test_regress/t/t_trace_no_top_name2.v         |  12 +-
 test_regress/t/t_trace_no_top_name2_fst.out   |  32 +-
 test_regress/t/t_trace_no_top_name2_saif.out  |  36 +++
 test_regress/t/t_trace_no_top_name2_vcd.out   |   4 +
 test_regress/t/t_trace_param_override.out     |   2 -
 test_regress/t/t_trace_public.out             |   4 +-
 test_regress/t/t_trace_timing1.out            |   2 -
 34 files changed, 563 insertions(+), 511 deletions(-)

diff --git a/Changes b/Changes
index 263654108..b6eeff672 100644
--- a/Changes
+++ b/Changes
@@ -28,6 +28,7 @@ Verilator 5.037 devel
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
+* Fix trace hierarchicalName runtime errors (#5668) (#6076). [Paul Swirhun]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp
index cbe47ba31..bd2281030 100644
--- a/include/verilated_fst_c.cpp
+++ b/include/verilated_fst_c.cpp
@@ -140,7 +140,6 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, uint32_t elemen
 // TODO: should return std::optional<fstScopeType>, but I can't have C++17
 static std::pair<bool, fstScopeType> toFstScopeType(VerilatedTracePrefixType type) {
     switch (type) {
-    case VerilatedTracePrefixType::ROOTIO_MODULE: return {true, FST_ST_VCD_MODULE};
     case VerilatedTracePrefixType::SCOPE_MODULE: return {true, FST_ST_VCD_MODULE};
     case VerilatedTracePrefixType::SCOPE_INTERFACE: return {true, FST_ST_VCD_INTERFACE};
     case VerilatedTracePrefixType::STRUCT_PACKED:
@@ -152,19 +151,23 @@ static std::pair<bool, fstScopeType> toFstScopeType(VerilatedTracePrefixType typ
 
 void VerilatedFst::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
     assert(!m_prefixStack.empty());  // Constructor makes an empty entry
-    std::string pname = name;
-    // An empty name means this is the root of a model created with name()=="".  The
-    // tools get upset if we try to pass this as empty, so we put the signals under a
-    // new scope, but the signals further down will be peers, not children (as usual
-    // for name()!="")
-    // Terminate earlier $root?
-    if (m_prefixStack.back().second == VerilatedTracePrefixType::ROOTIO_MODULE) popPrefix();
-    if (pname.empty()) {  // Start new temporary root
-        pname = "$rootio";  // VCD names are not backslash escaped
-        m_prefixStack.emplace_back("", VerilatedTracePrefixType::ROOTIO_WRAPPER);
-        type = VerilatedTracePrefixType::ROOTIO_MODULE;
+    // An empty name means this is the root of a model created with
+    // name()=="".  The tools get upset if we try to pass this as empty, so
+    // we put the signals under a new $rootio scope, but the signals
+    // further down will be peers, not children (as usual for name()!="").
+    const std::string prevPrefix = m_prefixStack.back().first;
+    if (name == "$rootio" && !prevPrefix.empty()) {
+        // Upper has name, we can suppress inserting $rootio, but still push so popPrefix works
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
+    } else if (name.empty()) {
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
     }
-    const std::string newPrefix = m_prefixStack.back().first + pname;
+
+    // This code assumes a signal at a given prefix level is declared before
+    // any pushPrefix are done at that same level.
+    const std::string newPrefix = prevPrefix + name;
     const auto pair = toFstScopeType(type);
     const bool properScope = pair.first;
     const fstScopeType scopeType = pair.second;
diff --git a/include/verilated_saif_c.cpp b/include/verilated_saif_c.cpp
index 9e6cd7d9a..326b2571a 100644
--- a/include/verilated_saif_c.cpp
+++ b/include/verilated_saif_c.cpp
@@ -475,18 +475,25 @@ void VerilatedSaif::printIndent() {
 }
 
 void VerilatedSaif::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
-    std::string pname = name;
-
-    if (m_prefixStack.back().second == VerilatedTracePrefixType::ROOTIO_MODULE) popPrefix();
-    if (pname.empty()) {
-        pname = "$rootio";
-        type = VerilatedTracePrefixType::ROOTIO_MODULE;
+    assert(!m_prefixStack.empty());  // Constructor makes an empty entry
+    // An empty name means this is the root of a model created with
+    // name()=="".  The tools get upset if we try to pass this as empty, so
+    // we put the signals under a new $rootio scope, but the signals
+    // further down will be peers, not children (as usual for name()!="").
+    const std::string prevPrefix = m_prefixStack.back().first;
+    if (name == "$rootio" && !prevPrefix.empty()) {
+        // Upper has name, we can suppress inserting $rootio, but still push so popPrefix works
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
+    } else if (name.empty()) {
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
     }
 
     if (type != VerilatedTracePrefixType::ARRAY_UNPACKED
         && type != VerilatedTracePrefixType::ARRAY_PACKED) {
 
-        std::string scopePath = m_prefixStack.back().first + pname;
+        std::string scopePath = prevPrefix + name;
         std::string scopeName = lastWord(scopePath);
 
         auto newScope = std::make_unique<VerilatedSaifActivityScope>(
@@ -502,23 +509,22 @@ void VerilatedSaif::pushPrefix(const std::string& name, VerilatedTracePrefixType
         m_currentScope = newScopePtr;
     }
 
-    std::string newPrefix = m_prefixStack.back().first + pname;
-    if (type != VerilatedTracePrefixType::ARRAY_UNPACKED
-        && type != VerilatedTracePrefixType::ARRAY_PACKED) {
-        newPrefix += ' ';
-    }
-
-    m_prefixStack.emplace_back(newPrefix, type);
+    const std::string newPrefix = prevPrefix + name;
+    bool properScope = (type != VerilatedTracePrefixType::ARRAY_UNPACKED
+                        && type != VerilatedTracePrefixType::ARRAY_PACKED
+                        && type != VerilatedTracePrefixType::ROOTIO_WRAPPER);
+    m_prefixStack.emplace_back(newPrefix + (properScope ? " " : ""), type);
 }
 
 void VerilatedSaif::popPrefix() {
     if (m_prefixStack.back().second != VerilatedTracePrefixType::ARRAY_UNPACKED
         && m_prefixStack.back().second != VerilatedTracePrefixType::ARRAY_PACKED
-        && m_currentScope != nullptr) {
+        && m_prefixStack.back().second != VerilatedTracePrefixType::ROOTIO_WRAPPER
+        && m_currentScope) {
         m_currentScope = m_currentScope->parentScope();
     }
-
     m_prefixStack.pop_back();
+    assert(!m_prefixStack.empty());  // Always one left, the constructor's initial one
 }
 
 void VerilatedSaif::declare(const uint32_t code, uint32_t fidx, const char* name,
diff --git a/include/verilated_trace.h b/include/verilated_trace.h
index a297087c6..3d3d73b53 100644
--- a/include/verilated_trace.h
+++ b/include/verilated_trace.h
@@ -53,8 +53,7 @@ enum class VerilatedTracePrefixType : uint8_t {
     // Note: Entries must match VTracePrefixType (by name, not necessarily by value)
     ARRAY_PACKED,
     ARRAY_UNPACKED,
-    ROOTIO_MODULE,  // $rootio, used when name()=="", other modules become peers
-    ROOTIO_WRAPPER,  // "Above" ROOTIO_MODULE
+    ROOTIO_WRAPPER,  // $rootio suppressed due to name()!=""
     SCOPE_MODULE,
     SCOPE_INTERFACE,
     STRUCT_PACKED,
diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp
index 4b6588522..ee4581a0d 100644
--- a/include/verilated_vcd_c.cpp
+++ b/include/verilated_vcd_c.cpp
@@ -323,43 +323,46 @@ void VerilatedVcd::printIndent(int level_change) {
 
 void VerilatedVcd::pushPrefix(const std::string& name, VerilatedTracePrefixType type) {
     assert(!m_prefixStack.empty());  // Constructor makes an empty entry
-    std::string pname = name;
-    // An empty name means this is the root of a model created with name()=="".  The
-    // tools get upset if we try to pass this as empty, so we put the signals under a
-    // new scope, but the signals further down will be peers, not children (as usual
-    // for name()!="")
-    // Terminate earlier $root?
-    if (m_prefixStack.back().second == VerilatedTracePrefixType::ROOTIO_MODULE) popPrefix();
-    if (pname.empty()) {  // Start new temporary root
-        pname = "$rootio";  // VCD names are not backslash escaped
-        m_prefixStack.emplace_back("", VerilatedTracePrefixType::ROOTIO_WRAPPER);
-        type = VerilatedTracePrefixType::ROOTIO_MODULE;
+    // An empty name means this is the root of a model created with
+    // name()=="".  The tools get upset if we try to pass this as empty, so
+    // we put the signals under a new $rootio scope, but the signals
+    // further down will be peers, not children (as usual for name()!="").
+    const std::string prevPrefix = m_prefixStack.back().first;
+    if (name == "$rootio" && !prevPrefix.empty()) {
+        // Upper has name, we can suppress inserting $rootio, but still push so popPrefix works
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
+    } else if (name.empty()) {
+        m_prefixStack.emplace_back(prevPrefix, VerilatedTracePrefixType::ROOTIO_WRAPPER);
+        return;
     }
-    std::string newPrefix = m_prefixStack.back().first + pname;
+
+    const std::string newPrefix = prevPrefix + name;
+    bool properScope = false;
     switch (type) {
-    case VerilatedTracePrefixType::ROOTIO_MODULE:
     case VerilatedTracePrefixType::SCOPE_MODULE:
     case VerilatedTracePrefixType::SCOPE_INTERFACE:
     case VerilatedTracePrefixType::STRUCT_PACKED:
     case VerilatedTracePrefixType::STRUCT_UNPACKED:
     case VerilatedTracePrefixType::UNION_PACKED: {
+        properScope = true;
+        break;
+    }
+    default: break;
+    }
+    if (properScope) {
         printIndent(1);
         printStr("$scope module ");
         const std::string n = lastWord(newPrefix);
         printStr(n.c_str());
         printStr(" $end\n");
-        newPrefix += ' ';
-        break;
     }
-    default: break;
-    }
-    m_prefixStack.emplace_back(newPrefix, type);
+    m_prefixStack.emplace_back(newPrefix + (properScope ? " " : ""), type);
 }
 
 void VerilatedVcd::popPrefix() {
     assert(!m_prefixStack.empty());
     switch (m_prefixStack.back().second) {
-    case VerilatedTracePrefixType::ROOTIO_MODULE:
     case VerilatedTracePrefixType::SCOPE_MODULE:
     case VerilatedTracePrefixType::SCOPE_INTERFACE:
     case VerilatedTracePrefixType::STRUCT_PACKED:
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 35b0459f5..40359fbaf 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -120,14 +120,11 @@ class TraceDeclVisitor final : public VNVisitor {
     // - A sub scope (stored as the cell corresponding to the sub scope)
     // Note: members are non-const to allow copy during sorting
     class TraceEntry final {
-        // AstVarScope under scope being traced
-        AstVarScope* m_vscp{nullptr};
-        // Sub scope (as AstCell) under scope being traced
-        AstCell* m_cellp{nullptr};
-        // Path to enclosing module in original hierarchy (non-trivail due to inlining)
-        std::string m_path;
-        // Name of signal/subscope
-        std::string m_name;
+        AstVarScope* m_vscp = nullptr;  // AstVarScope under scope being traced
+        AstCell* m_cellp = nullptr;  // Sub scope (as AstCell) under scope being traced
+        std::string m_path;  // Path to enclosing module in original hierarchy
+        std::string m_name;  // Name of signal/subscope
+        bool m_rootio = false;  // Is part of $rootio, if model at runtime uses name()=""
 
         void init(const std::string& name) {
             // Compute path in hierarchy and item name
@@ -147,12 +144,21 @@ class TraceDeclVisitor final : public VNVisitor {
             : m_cellp{cellp} {
             init(cellp->name());
         }
-
+        int operatorCompare(const TraceEntry& b) const {
+            if (rootio() && !b.rootio()) return true;
+            if (!rootio() && b.rootio()) return false;
+            if (const int cmp = path().compare(b.path())) return cmp < 0;
+            if (const int cmp = fileline().operatorCompare(b.fileline())) return cmp < 0;
+            return name() < b.name();
+        }
         AstVarScope* vscp() const { return m_vscp; }
         AstCell* cellp() const { return m_cellp; }
         const std::string& path() const { return m_path; }
+        void path(const std::string& path) { m_path = path; }
         const std::string& name() const { return m_name; }
         FileLine& fileline() const { return m_vscp ? *m_vscp->fileline() : *m_cellp->fileline(); }
+        bool rootio() const { return m_rootio; }
+        void rootio(bool flag) { m_rootio = flag; }
     };
     std::vector<TraceEntry> m_entries;  // Trace entries under current scope
     AstVarScope* m_traVscp = nullptr;  // Current AstVarScope we are constructing AstTraceDecls for
@@ -367,23 +373,29 @@ class TraceDeclVisitor final : public VNVisitor {
         }
 
         if (!m_entries.empty()) {
-            // Sort trace entries, first by enclosing instance (necessary for
-            // single traversal of hierarchy during initialization), then by
-            // source location, then by name.
-            std::stable_sort(m_entries.begin(), m_entries.end(),
-                             [](const TraceEntry& a, const TraceEntry& b) {
-                                 if (const int cmp = a.path().compare(b.path())) return cmp < 0;
-                                 if (const int cmp = a.fileline().operatorCompare(b.fileline()))
-                                     return cmp < 0;
-                                 return a.name() < b.name();
-                             });
+            if (nodep->name() == "TOP") {
+                UINFO(9, " Add $rootio " << nodep);
+                for (TraceEntry& entry : m_entries) {
+                    if (entry.path() == "" && entry.vscp()) entry.rootio(true);
+                }
+            }
+
+            // Sort trace entries, first by if a $root io, then by enclosing instance
+            // (necessary for single traversal of hierarchy during initialization), then
+            // by source location, then by name.
+            std::stable_sort(
+                m_entries.begin(), m_entries.end(),
+                [](const TraceEntry& a, const TraceEntry& b) { return a.operatorCompare(b); });
 
             // Build trace initialization functions for this AstScope
             FileLine* const flp = nodep->fileline();
             PathAdjustor pathAdjustor{flp, [&](AstNodeStmt* stmtp) { addToSubFunc(stmtp); }};
             for (const TraceEntry& entry : m_entries) {
                 // Adjust name prefix based on path in hierarchy
-                pathAdjustor.adjust(entry.path());
+                UINFO(9, "path='" << entry.path() << "' name='" << entry.name() << "' "
+                                  << (entry.cellp() ? static_cast<AstNode*>(entry.cellp())
+                                                    : static_cast<AstNode*>(entry.vscp())));
+                pathAdjustor.adjust(entry.rootio() ? "$rootio" : entry.path());
 
                 m_traName = entry.name();
 
diff --git a/test_regress/t/t_clocker.out b/test_regress/t/t_clocker.out
index d6623fe9f..3074da7ad 100644
--- a/test_regress/t/t_clocker.out
+++ b/test_regress/t/t_clocker.out
@@ -1,14 +1,13 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
-
  $scope module top $end
-  $scope module $unit $end
-   $var wire 32 + ID_MSB [31:0] $end
-  $upscope $end
   $var wire 1 # clk $end
   $var wire 1 $ res $end
   $var wire 8 % res8 [7:0] $end
   $var wire 16 & res16 [15:0] $end
+  $scope module $unit $end
+   $var wire 32 + ID_MSB [31:0] $end
+  $upscope $end
   $scope module t $end
    $var wire 1 # clk $end
    $var wire 1 $ res $end
diff --git a/test_regress/t/t_cover_line_trace.out b/test_regress/t/t_cover_line_trace.out
index 57d893c2b..bd95a37b4 100644
--- a/test_regress/t/t_cover_line_trace.out
+++ b/test_regress/t/t_cover_line_trace.out
@@ -1,6 +1,7 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 4! clk $end
   $scope module t $end
    $var wire 1 4! clk $end
    $var wire 1 A toggle $end
@@ -175,7 +176,6 @@ $timescale 1ps $end
     $var wire 32 '! vlCoverageLineTrace_t_cover_line__276_block [31:0] $end
    $upscope $end
   $upscope $end
-  $var wire 1 4! clk $end
   $scope module my_pkg $end
    $var wire 32 + x [31:0] $end
    $var wire 32 , vlCoverageLineTrace_t_cover_line__300_block [31:0] $end
diff --git a/test_regress/t/t_cover_trace_always.out b/test_regress/t/t_cover_trace_always.out
index c7994eb12..417236b8b 100644
--- a/test_regress/t/t_cover_trace_always.out
+++ b/test_regress/t/t_cover_trace_always.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var wire 1 $ p $end
   $var wire 1 % q $end
diff --git a/test_regress/t/t_flag_csplit_groups.py b/test_regress/t/t_flag_csplit_groups.py
index 3f259b08b..d02a0d351 100755
--- a/test_regress/t/t_flag_csplit_groups.py
+++ b/test_regress/t/t_flag_csplit_groups.py
@@ -124,7 +124,7 @@ test.file_grep_not(test.obj_dir + "/" + test.vm_prefix + "_classes.mk", "vm_clas
 test.file_grep_not(test.obj_dir + "/" + test.vm_prefix + "_classes.mk", "vm_classes_2")
 
 # Check combine count
-test.file_grep(test.stats, r'Node count, CFILE + (\d+)', (231 if test.vltmt else 211))
+test.file_grep(test.stats, r'Node count, CFILE + (\d+)', (234 if test.vltmt else 214))
 test.file_grep(test.stats, r'Makefile targets, VM_CLASSES_FAST + (\d+)', 2)
 test.file_grep(test.stats, r'Makefile targets, VM_CLASSES_SLOW + (\d+)', 2)
 
diff --git a/test_regress/t/t_hier_trace_noinl.out b/test_regress/t/t_hier_trace_noinl.out
index dc81eb685..1bb69f35d 100644
--- a/test_regress/t/t_hier_trace_noinl.out
+++ b/test_regress/t/t_hier_trace_noinl.out
@@ -1,6 +1,8 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 # clk $end
+  $var wire 1 $ reset_l $end
   $scope module t $end
    $var wire 1 # clk $end
    $var wire 1 $ reset_l $end
@@ -13,10 +15,10 @@ $timescale 1ps $end
     $var wire 1 $ reset_l $end
    $upscope $end
   $upscope $end
-  $var wire 1 # clk $end
-  $var wire 1 $ reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top $end
+  $var wire 1 & clk $end
+  $var wire 1 ' reset_l $end
   $scope module sub_top $end
    $var wire 1 & clk $end
    $var wire 1 ' reset_l $end
@@ -53,10 +55,10 @@ $timescale 1ps $end
     $var wire 1 ' reset_l $end
    $upscope $end
   $upscope $end
-  $var wire 1 & clk $end
-  $var wire 1 ' reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top $end
+  $var wire 1 ) clk $end
+  $var wire 1 * reset_l $end
   $scope module sub_top $end
    $var wire 1 ) clk $end
    $var wire 1 * reset_l $end
@@ -93,136 +95,134 @@ $timescale 1ps $end
     $var wire 1 * reset_l $end
    $upscope $end
   $upscope $end
-  $var wire 1 ) clk $end
-  $var wire 1 * reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u0 $end
+  $var wire 1 , clk $end
+  $var wire 1 - reset_l $end
   $scope module detail_code $end
    $var wire 1 , clk $end
    $var wire 1 - reset_l $end
   $upscope $end
-  $var wire 1 , clk $end
-  $var wire 1 - reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u1 $end
+  $var wire 1 / clk $end
+  $var wire 1 0 reset_l $end
   $scope module detail_code $end
    $var wire 1 / clk $end
    $var wire 1 0 reset_l $end
   $upscope $end
-  $var wire 1 / clk $end
-  $var wire 1 0 reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u2 $end
+  $var wire 1 2 clk $end
+  $var wire 1 3 reset_l $end
   $scope module detail_code $end
    $var wire 1 2 clk $end
    $var wire 1 3 reset_l $end
   $upscope $end
-  $var wire 1 2 clk $end
-  $var wire 1 3 reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u3 $end
+  $var wire 1 5 clk $end
+  $var wire 1 6 reset_l $end
   $scope module detail_code $end
    $var wire 1 5 clk $end
    $var wire 1 6 reset_l $end
   $upscope $end
-  $var wire 1 5 clk $end
-  $var wire 1 6 reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u4 $end
+  $var wire 1 8 clk $end
+  $var wire 1 9 reset_l $end
   $scope module detail_code $end
    $var wire 1 8 clk $end
    $var wire 1 9 reset_l $end
   $upscope $end
-  $var wire 1 8 clk $end
-  $var wire 1 9 reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u5 $end
+  $var wire 1 ; clk $end
+  $var wire 1 < reset_l $end
   $scope module detail_code $end
    $var wire 1 ; clk $end
    $var wire 1 < reset_l $end
   $upscope $end
-  $var wire 1 ; clk $end
-  $var wire 1 < reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u6 $end
+  $var wire 1 > clk $end
+  $var wire 1 ? reset_l $end
   $scope module detail_code $end
    $var wire 1 > clk $end
    $var wire 1 ? reset_l $end
   $upscope $end
-  $var wire 1 > clk $end
-  $var wire 1 ? reset_l $end
  $upscope $end
  $scope module top.t.u0_sub_top.sub_top.u7 $end
+  $var wire 1 A clk $end
+  $var wire 1 B reset_l $end
   $scope module detail_code $end
    $var wire 1 A clk $end
    $var wire 1 B reset_l $end
   $upscope $end
-  $var wire 1 A clk $end
-  $var wire 1 B reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u0 $end
+  $var wire 1 D clk $end
+  $var wire 1 E reset_l $end
   $scope module detail_code $end
    $var wire 1 D clk $end
    $var wire 1 E reset_l $end
   $upscope $end
-  $var wire 1 D clk $end
-  $var wire 1 E reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u1 $end
+  $var wire 1 G clk $end
+  $var wire 1 H reset_l $end
   $scope module detail_code $end
    $var wire 1 G clk $end
    $var wire 1 H reset_l $end
   $upscope $end
-  $var wire 1 G clk $end
-  $var wire 1 H reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u2 $end
+  $var wire 1 J clk $end
+  $var wire 1 K reset_l $end
   $scope module detail_code $end
    $var wire 1 J clk $end
    $var wire 1 K reset_l $end
   $upscope $end
-  $var wire 1 J clk $end
-  $var wire 1 K reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u3 $end
+  $var wire 1 M clk $end
+  $var wire 1 N reset_l $end
   $scope module detail_code $end
    $var wire 1 M clk $end
    $var wire 1 N reset_l $end
   $upscope $end
-  $var wire 1 M clk $end
-  $var wire 1 N reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u4 $end
+  $var wire 1 P clk $end
+  $var wire 1 Q reset_l $end
   $scope module detail_code $end
    $var wire 1 P clk $end
    $var wire 1 Q reset_l $end
   $upscope $end
-  $var wire 1 P clk $end
-  $var wire 1 Q reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u5 $end
+  $var wire 1 S clk $end
+  $var wire 1 T reset_l $end
   $scope module detail_code $end
    $var wire 1 S clk $end
    $var wire 1 T reset_l $end
   $upscope $end
-  $var wire 1 S clk $end
-  $var wire 1 T reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u6 $end
+  $var wire 1 V clk $end
+  $var wire 1 W reset_l $end
   $scope module detail_code $end
    $var wire 1 V clk $end
    $var wire 1 W reset_l $end
   $upscope $end
-  $var wire 1 V clk $end
-  $var wire 1 W reset_l $end
  $upscope $end
  $scope module top.t.u1_sub_top.sub_top.u7 $end
+  $var wire 1 Y clk $end
+  $var wire 1 Z reset_l $end
   $scope module detail_code $end
    $var wire 1 Y clk $end
    $var wire 1 Z reset_l $end
   $upscope $end
-  $var wire 1 Y clk $end
-  $var wire 1 Z reset_l $end
  $upscope $end
 $enddefinitions $end
 
diff --git a/test_regress/t/t_interface_ref_trace_noinl.out b/test_regress/t/t_interface_ref_trace_noinl.out
index a3bd6bbac..c46aa5d53 100644
--- a/test_regress/t/t_interface_ref_trace_noinl.out
+++ b/test_regress/t/t_interface_ref_trace_noinl.out
@@ -1,7 +1,7 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
-
  $scope module top $end
+  $var wire 1 0 clk $end
   $scope module t $end
    $var wire 1 0 clk $end
    $var wire 32 # cyc [31:0] $end
@@ -294,7 +294,6 @@ $timescale 1ps $end
     $upscope $end
    $upscope $end
   $upscope $end
-  $var wire 1 0 clk $end
  $upscope $end
 $enddefinitions $end
 
diff --git a/test_regress/t/t_timing_osc.out b/test_regress/t/t_timing_osc.out
index afcbdeb10..2eb647fb5 100644
--- a/test_regress/t/t_timing_osc.out
+++ b/test_regress/t/t_timing_osc.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1fs $end
- $scope module $rootio $end
- $upscope $end
  $scope module tb_osc $end
   $var wire 1 # dco_out $end
   $scope module dco $end
diff --git a/test_regress/t/t_timing_trace.out b/test_regress/t/t_timing_trace.out
index 504e3a2bc..206cd8995 100644
--- a/test_regress/t/t_timing_trace.out
+++ b/test_regress/t/t_timing_trace.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var wire 32 * CLK_PERIOD [31:0] $end
   $var wire 32 + CLK_HALF_PERIOD [31:0] $end
diff --git a/test_regress/t/t_timing_trace_fst.out b/test_regress/t/t_timing_trace_fst.out
index fe5088ccd..e1cad43b5 100644
--- a/test_regress/t/t_timing_trace_fst.out
+++ b/test_regress/t/t_timing_trace_fst.out
@@ -1,5 +1,5 @@
 $date
-	Fri May  2 07:32:42 2025
+	Tue Jun 10 19:01:39 2025
 
 $end
 $version
@@ -8,8 +8,6 @@ $end
 $timescale
 	1ps
 $end
-$scope module $rootio $end
-$upscope $end
 $scope module t $end
 $var parameter 32 ! CLK_PERIOD [31:0] $end
 $var parameter 32 " CLK_HALF_PERIOD [31:0] $end
diff --git a/test_regress/t/t_timing_trace_saif.out b/test_regress/t/t_timing_trace_saif.out
index 8b2e73be3..87cd788db 100644
--- a/test_regress/t/t_timing_trace_saif.out
+++ b/test_regress/t/t_timing_trace_saif.out
@@ -6,8 +6,6 @@
 (DIVIDER / )
 (TIMESCALE 1ps)
 (DURATION 100)
- (INSTANCE $rootio
- )
  (INSTANCE t
   (NET
    (CLK_PERIOD\[0\] (T0 100) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
diff --git a/test_regress/t/t_trace_binary.out b/test_regress/t/t_trace_binary.out
index 6ba7d249c..cec4aa1d5 100644
--- a/test_regress/t/t_trace_binary.out
+++ b/test_regress/t/t_trace_binary.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var wire 32 # sig [31:0] $end
  $upscope $end
diff --git a/test_regress/t/t_trace_class.out b/test_regress/t/t_trace_class.out
index caa31e989..a7c8f9fe0 100644
--- a/test_regress/t/t_trace_class.out
+++ b/test_regress/t/t_trace_class.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module $unit::Cls__P0__Vclpkg $end
   $var wire 32 # PARAM [31:0] $end
  $upscope $end
diff --git a/test_regress/t/t_trace_complex.out b/test_regress/t/t_trace_complex.out
index 6b27eefc7..82004c937 100644
--- a/test_regress/t/t_trace_complex.out
+++ b/test_regress/t/t_trace_complex.out
@@ -1,38 +1,38 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 = clk $end
   $scope module $unit $end
    $var wire 1 # global_bit $end
   $upscope $end
-  $var wire 1 4 clk $end
   $scope module t $end
-   $var wire 1 4 clk $end
-   $var wire 32 5 cyc [31:0] $end
-   $var wire 2 ) v_strp [1:0] $end
-   $var wire 4 * v_strp_strp [3:0] $end
-   $var wire 2 - v_unip_strp [1:0] $end
-   $var wire 2 . v_arrp [2:1] $end
-   $var wire 4 $ v_arrp_arrp [3:0] $end
-   $var wire 4 / v_arrp_strp [3:0] $end
+   $var wire 1 = clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 2 % v_strp [1:0] $end
+   $var wire 4 & v_strp_strp [3:0] $end
+   $var wire 2 ' v_unip_strp [1:0] $end
+   $var wire 2 ( v_arrp [2:1] $end
+   $var wire 4 ) v_arrp_arrp [3:0] $end
+   $var wire 4 * v_arrp_strp [3:0] $end
    $var wire 1 > v_arru[1] $end
    $var wire 1 ? v_arru[2] $end
    $var wire 1 @ v_arru_arru[3][1] $end
    $var wire 1 A v_arru_arru[3][2] $end
    $var wire 1 B v_arru_arru[4][1] $end
    $var wire 1 C v_arru_arru[4][2] $end
-   $var wire 2 6 v_arru_arrp[3] [2:1] $end
-   $var wire 2 7 v_arru_arrp[4] [2:1] $end
-   $var wire 2 8 v_arru_strp[3] [1:0] $end
-   $var wire 2 9 v_arru_strp[4] [1:0] $end
-   $var real 64 % v_real $end
-   $var real 64 : v_arr_real[0] $end
-   $var real 64 < v_arr_real[1] $end
+   $var wire 2 + v_arru_arrp[3] [2:1] $end
+   $var wire 2 , v_arru_arrp[4] [2:1] $end
+   $var wire 2 - v_arru_strp[3] [1:0] $end
+   $var wire 2 . v_arru_strp[4] [1:0] $end
+   $var real 64 / v_real $end
+   $var real 64 1 v_arr_real[0] $end
+   $var real 64 3 v_arr_real[1] $end
    $var wire 64 D v_chandle [63:0] $end
-   $var wire 64 0 v_str32x2 [63:0] $end
-   $var wire 32 + v_enumed [31:0] $end
-   $var wire 32 , v_enumed2 [31:0] $end
-   $var wire 3 2 v_enumb [2:0] $end
-   $var wire 6 3 v_enumb2_str [5:0] $end
+   $var wire 64 5 v_str32x2 [63:0] $end
+   $var wire 32 7 v_enumed [31:0] $end
+   $var wire 32 8 v_enumed2 [31:0] $end
+   $var wire 3 9 v_enumb [2:0] $end
+   $var wire 6 : v_enumb2_str [5:0] $end
    $var wire 8 F unpacked_array[-2] [7:0] $end
    $var wire 8 G unpacked_array[-1] [7:0] $end
    $var wire 8 H unpacked_array[0] [7:0] $end
@@ -47,9 +47,9 @@ $timescale 1ps $end
     $var wire 32 L PARAM [31:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 ' b [31:0] $end
+    $var wire 32 ; b [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 ( a [31:0] $end
+     $var wire 32 < a [31:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
@@ -59,28 +59,28 @@ $enddefinitions $end
 
 #0
 1#
-b0000 $
-r0 %
-b00000000000000000000000000000000 '
-b00000000000000000000000000000000 (
-b00 )
+b00000000000000000000000000000000 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000000 +
-b00000000000000000000000000000000 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000000000000000000000000000000011111111 0
-b000 2
-b000000 3
-04
-b00000000000000000000000000000000 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0 :
-r0 <
+r0 /
+r0 1
+r0 3
+b0000000000000000000000000000000000000000000000000000000011111111 5
+b00000000000000000000000000000000 7
+b00000000000000000000000000000000 8
+b000 9
+b000000 :
+b00000000000000000000000000000000 ;
+b00000000000000000000000000000000 <
+0=
 0>
 0?
 0@
@@ -96,139 +96,139 @@ b00000000000000000000000000000100 J
 b00000000000000000000000000000010 K
 b00000000000000000000000000000011 L
 #10
-b1111 $
-r0.1 %
-b00000000000000000000000000000101 '
-b00000000000000000000000000000101 (
-b11 )
+b00000000000000000000000000000001 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000001 +
-b00000000000000000000000000000010 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000000100000000000000000000000011111110 0
-b111 2
-14
-b00000000000000000000000000000001 5
-b11 6
-b11 7
-b11 8
-b11 9
-r0.2 :
-r0.3 <
+r0.1 /
+r0.2 1
+r0.3 3
+b0000000000000000000000000000000100000000000000000000000011111110 5
+b00000000000000000000000000000001 7
+b00000000000000000000000000000010 8
+b111 9
+b00000000000000000000000000000101 ;
+b00000000000000000000000000000101 <
+1=
 #15
-04
+0=
 #20
-b0000 $
-r0.2 %
-b00 )
+b00000000000000000000000000000010 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000010 +
-b00000000000000000000000000000100 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000001000000000000000000000000011111101 0
-b110 2
-b111111 3
-14
-b00000000000000000000000000000010 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0.4 :
-r0.6 <
+r0.2 /
+r0.4 1
+r0.6 3
+b0000000000000000000000000000001000000000000000000000000011111101 5
+b00000000000000000000000000000010 7
+b00000000000000000000000000000100 8
+b110 9
+b111111 :
+1=
 #25
-04
+0=
 #30
-b1111 $
-r0.3 %
-b11 )
+b00000000000000000000000000000011 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000011 +
-b00000000000000000000000000000110 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000001100000000000000000000000011111100 0
-b101 2
-b110110 3
-14
-b00000000000000000000000000000011 5
-b11 6
-b11 7
-b11 8
-b11 9
-r0.6000000000000001 :
-r0.8999999999999999 <
+r0.3 /
+r0.6000000000000001 1
+r0.8999999999999999 3
+b0000000000000000000000000000001100000000000000000000000011111100 5
+b00000000000000000000000000000011 7
+b00000000000000000000000000000110 8
+b101 9
+b110110 :
+1=
 #35
-04
+0=
 #40
-b0000 $
-r0.4 %
-b00 )
+b00000000000000000000000000000100 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000100 +
-b00000000000000000000000000001000 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000010000000000000000000000000011111011 0
-b100 2
-b101101 3
-14
-b00000000000000000000000000000100 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0.8 :
-r1.2 <
+r0.4 /
+r0.8 1
+r1.2 3
+b0000000000000000000000000000010000000000000000000000000011111011 5
+b00000000000000000000000000000100 7
+b00000000000000000000000000001000 8
+b100 9
+b101101 :
+1=
 #45
-04
+0=
 #50
-b1111 $
-r0.5 %
-b11 )
+b00000000000000000000000000000101 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000101 +
-b00000000000000000000000000001010 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000010100000000000000000000000011111010 0
-b011 2
-b100100 3
-14
-b00000000000000000000000000000101 5
-b11 6
-b11 7
-b11 8
-b11 9
-r1 :
-r1.5 <
+r0.5 /
+r1 1
+r1.5 3
+b0000000000000000000000000000010100000000000000000000000011111010 5
+b00000000000000000000000000000101 7
+b00000000000000000000000000001010 8
+b011 9
+b100100 :
+1=
 #55
-04
+0=
 #60
-b0000 $
-r0.6 %
-b00 )
+b00000000000000000000000000000110 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000110 +
-b00000000000000000000000000001100 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000011000000000000000000000000011111001 0
-b010 2
-b011011 3
-14
-b00000000000000000000000000000110 5
-b00 6
-b00 7
-b00 8
-b00 9
-r1.2 :
-r1.8 <
+r0.6 /
+r1.2 1
+r1.8 3
+b0000000000000000000000000000011000000000000000000000000011111001 5
+b00000000000000000000000000000110 7
+b00000000000000000000000000001100 8
+b010 9
+b011011 :
+1=
diff --git a/test_regress/t/t_trace_complex_fst.out b/test_regress/t/t_trace_complex_fst.out
index e0cd14241..0cf966dc5 100644
--- a/test_regress/t/t_trace_complex_fst.out
+++ b/test_regress/t/t_trace_complex_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Jan 25 08:01:43 2024
+	Tue Jun 10 19:02:36 2025
 
 $end
 $version
@@ -11,12 +11,12 @@ $end
 $scope module top $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
+$var wire 1 ! clk $end
 $scope module $unit $end
-$var bit 1 ! global_bit $end
+$var bit 1 " global_bit $end
 $upscope $end
-$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 " clk $end
+$var wire 1 ! clk $end
 $var integer 32 # cyc [31:0] $end
 $var bit 2 $ v_strp [1:0] $end
 $var bit 4 % v_strp_strp [3:0] $end
@@ -105,11 +105,11 @@ b00 &
 b0000 %
 b00 $
 b00000000000000000000000000000000 #
-0"
-1!
+1"
+0!
 $end
 #10
-1"
+1!
 b00000000000000000000000000000001 #
 b11 $
 b1111 %
@@ -131,9 +131,9 @@ b111 ;
 b00000000000000000000000000000101 D
 b00000000000000000000000000000101 E
 #15
-0"
+0!
 #20
-1"
+1!
 b110 ;
 b00000000000000000000000000000100 :
 b00000000000000000000000000000010 9
@@ -154,9 +154,9 @@ b00 $
 b00000000000000000000000000000010 #
 b111111 <
 #25
-0"
+0!
 #30
-1"
+1!
 b110110 <
 b00000000000000000000000000000011 #
 b11 $
@@ -177,9 +177,9 @@ b00000000000000000000000000000011 9
 b00000000000000000000000000000110 :
 b101 ;
 #35
-0"
+0!
 #40
-1"
+1!
 b100 ;
 b00000000000000000000000000001000 :
 b00000000000000000000000000000100 9
@@ -200,9 +200,9 @@ b00 $
 b00000000000000000000000000000100 #
 b101101 <
 #45
-0"
+0!
 #50
-1"
+1!
 b100100 <
 b00000000000000000000000000000101 #
 b11 $
@@ -223,9 +223,9 @@ b00000000000000000000000000000101 9
 b00000000000000000000000000001010 :
 b011 ;
 #55
-0"
+0!
 #60
-1"
+1!
 b010 ;
 b00000000000000000000000000001100 :
 b00000000000000000000000000000110 9
diff --git a/test_regress/t/t_trace_complex_params.out b/test_regress/t/t_trace_complex_params.out
index 6b27eefc7..82004c937 100644
--- a/test_regress/t/t_trace_complex_params.out
+++ b/test_regress/t/t_trace_complex_params.out
@@ -1,38 +1,38 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 = clk $end
   $scope module $unit $end
    $var wire 1 # global_bit $end
   $upscope $end
-  $var wire 1 4 clk $end
   $scope module t $end
-   $var wire 1 4 clk $end
-   $var wire 32 5 cyc [31:0] $end
-   $var wire 2 ) v_strp [1:0] $end
-   $var wire 4 * v_strp_strp [3:0] $end
-   $var wire 2 - v_unip_strp [1:0] $end
-   $var wire 2 . v_arrp [2:1] $end
-   $var wire 4 $ v_arrp_arrp [3:0] $end
-   $var wire 4 / v_arrp_strp [3:0] $end
+   $var wire 1 = clk $end
+   $var wire 32 $ cyc [31:0] $end
+   $var wire 2 % v_strp [1:0] $end
+   $var wire 4 & v_strp_strp [3:0] $end
+   $var wire 2 ' v_unip_strp [1:0] $end
+   $var wire 2 ( v_arrp [2:1] $end
+   $var wire 4 ) v_arrp_arrp [3:0] $end
+   $var wire 4 * v_arrp_strp [3:0] $end
    $var wire 1 > v_arru[1] $end
    $var wire 1 ? v_arru[2] $end
    $var wire 1 @ v_arru_arru[3][1] $end
    $var wire 1 A v_arru_arru[3][2] $end
    $var wire 1 B v_arru_arru[4][1] $end
    $var wire 1 C v_arru_arru[4][2] $end
-   $var wire 2 6 v_arru_arrp[3] [2:1] $end
-   $var wire 2 7 v_arru_arrp[4] [2:1] $end
-   $var wire 2 8 v_arru_strp[3] [1:0] $end
-   $var wire 2 9 v_arru_strp[4] [1:0] $end
-   $var real 64 % v_real $end
-   $var real 64 : v_arr_real[0] $end
-   $var real 64 < v_arr_real[1] $end
+   $var wire 2 + v_arru_arrp[3] [2:1] $end
+   $var wire 2 , v_arru_arrp[4] [2:1] $end
+   $var wire 2 - v_arru_strp[3] [1:0] $end
+   $var wire 2 . v_arru_strp[4] [1:0] $end
+   $var real 64 / v_real $end
+   $var real 64 1 v_arr_real[0] $end
+   $var real 64 3 v_arr_real[1] $end
    $var wire 64 D v_chandle [63:0] $end
-   $var wire 64 0 v_str32x2 [63:0] $end
-   $var wire 32 + v_enumed [31:0] $end
-   $var wire 32 , v_enumed2 [31:0] $end
-   $var wire 3 2 v_enumb [2:0] $end
-   $var wire 6 3 v_enumb2_str [5:0] $end
+   $var wire 64 5 v_str32x2 [63:0] $end
+   $var wire 32 7 v_enumed [31:0] $end
+   $var wire 32 8 v_enumed2 [31:0] $end
+   $var wire 3 9 v_enumb [2:0] $end
+   $var wire 6 : v_enumb2_str [5:0] $end
    $var wire 8 F unpacked_array[-2] [7:0] $end
    $var wire 8 G unpacked_array[-1] [7:0] $end
    $var wire 8 H unpacked_array[0] [7:0] $end
@@ -47,9 +47,9 @@ $timescale 1ps $end
     $var wire 32 L PARAM [31:0] $end
    $upscope $end
    $scope module unnamedblk1 $end
-    $var wire 32 ' b [31:0] $end
+    $var wire 32 ; b [31:0] $end
     $scope module unnamedblk2 $end
-     $var wire 32 ( a [31:0] $end
+     $var wire 32 < a [31:0] $end
     $upscope $end
    $upscope $end
   $upscope $end
@@ -59,28 +59,28 @@ $enddefinitions $end
 
 #0
 1#
-b0000 $
-r0 %
-b00000000000000000000000000000000 '
-b00000000000000000000000000000000 (
-b00 )
+b00000000000000000000000000000000 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000000 +
-b00000000000000000000000000000000 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000000000000000000000000000000011111111 0
-b000 2
-b000000 3
-04
-b00000000000000000000000000000000 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0 :
-r0 <
+r0 /
+r0 1
+r0 3
+b0000000000000000000000000000000000000000000000000000000011111111 5
+b00000000000000000000000000000000 7
+b00000000000000000000000000000000 8
+b000 9
+b000000 :
+b00000000000000000000000000000000 ;
+b00000000000000000000000000000000 <
+0=
 0>
 0?
 0@
@@ -96,139 +96,139 @@ b00000000000000000000000000000100 J
 b00000000000000000000000000000010 K
 b00000000000000000000000000000011 L
 #10
-b1111 $
-r0.1 %
-b00000000000000000000000000000101 '
-b00000000000000000000000000000101 (
-b11 )
+b00000000000000000000000000000001 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000001 +
-b00000000000000000000000000000010 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000000100000000000000000000000011111110 0
-b111 2
-14
-b00000000000000000000000000000001 5
-b11 6
-b11 7
-b11 8
-b11 9
-r0.2 :
-r0.3 <
+r0.1 /
+r0.2 1
+r0.3 3
+b0000000000000000000000000000000100000000000000000000000011111110 5
+b00000000000000000000000000000001 7
+b00000000000000000000000000000010 8
+b111 9
+b00000000000000000000000000000101 ;
+b00000000000000000000000000000101 <
+1=
 #15
-04
+0=
 #20
-b0000 $
-r0.2 %
-b00 )
+b00000000000000000000000000000010 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000010 +
-b00000000000000000000000000000100 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000001000000000000000000000000011111101 0
-b110 2
-b111111 3
-14
-b00000000000000000000000000000010 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0.4 :
-r0.6 <
+r0.2 /
+r0.4 1
+r0.6 3
+b0000000000000000000000000000001000000000000000000000000011111101 5
+b00000000000000000000000000000010 7
+b00000000000000000000000000000100 8
+b110 9
+b111111 :
+1=
 #25
-04
+0=
 #30
-b1111 $
-r0.3 %
-b11 )
+b00000000000000000000000000000011 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000011 +
-b00000000000000000000000000000110 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000001100000000000000000000000011111100 0
-b101 2
-b110110 3
-14
-b00000000000000000000000000000011 5
-b11 6
-b11 7
-b11 8
-b11 9
-r0.6000000000000001 :
-r0.8999999999999999 <
+r0.3 /
+r0.6000000000000001 1
+r0.8999999999999999 3
+b0000000000000000000000000000001100000000000000000000000011111100 5
+b00000000000000000000000000000011 7
+b00000000000000000000000000000110 8
+b101 9
+b110110 :
+1=
 #35
-04
+0=
 #40
-b0000 $
-r0.4 %
-b00 )
+b00000000000000000000000000000100 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000100 +
-b00000000000000000000000000001000 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000010000000000000000000000000011111011 0
-b100 2
-b101101 3
-14
-b00000000000000000000000000000100 5
-b00 6
-b00 7
-b00 8
-b00 9
-r0.8 :
-r1.2 <
+r0.4 /
+r0.8 1
+r1.2 3
+b0000000000000000000000000000010000000000000000000000000011111011 5
+b00000000000000000000000000000100 7
+b00000000000000000000000000001000 8
+b100 9
+b101101 :
+1=
 #45
-04
+0=
 #50
-b1111 $
-r0.5 %
-b11 )
+b00000000000000000000000000000101 $
+b11 %
+b1111 &
+b11 '
+b11 (
+b1111 )
 b1111 *
-b00000000000000000000000000000101 +
-b00000000000000000000000000001010 ,
+b11 +
+b11 ,
 b11 -
 b11 .
-b1111 /
-b0000000000000000000000000000010100000000000000000000000011111010 0
-b011 2
-b100100 3
-14
-b00000000000000000000000000000101 5
-b11 6
-b11 7
-b11 8
-b11 9
-r1 :
-r1.5 <
+r0.5 /
+r1 1
+r1.5 3
+b0000000000000000000000000000010100000000000000000000000011111010 5
+b00000000000000000000000000000101 7
+b00000000000000000000000000001010 8
+b011 9
+b100100 :
+1=
 #55
-04
+0=
 #60
-b0000 $
-r0.6 %
-b00 )
+b00000000000000000000000000000110 $
+b00 %
+b0000 &
+b00 '
+b00 (
+b0000 )
 b0000 *
-b00000000000000000000000000000110 +
-b00000000000000000000000000001100 ,
+b00 +
+b00 ,
 b00 -
 b00 .
-b0000 /
-b0000000000000000000000000000011000000000000000000000000011111001 0
-b010 2
-b011011 3
-14
-b00000000000000000000000000000110 5
-b00 6
-b00 7
-b00 8
-b00 9
-r1.2 :
-r1.8 <
+r0.6 /
+r1.2 1
+r1.8 3
+b0000000000000000000000000000011000000000000000000000000011111001 5
+b00000000000000000000000000000110 7
+b00000000000000000000000000001100 8
+b010 9
+b011011 :
+1=
diff --git a/test_regress/t/t_trace_complex_params_fst.out b/test_regress/t/t_trace_complex_params_fst.out
index 663f71da5..73f2152c0 100644
--- a/test_regress/t/t_trace_complex_params_fst.out
+++ b/test_regress/t/t_trace_complex_params_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Jan 25 08:07:29 2024
+	Tue Jun 10 19:02:39 2025
 
 $end
 $version
@@ -11,12 +11,12 @@ $end
 $scope module top $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
+$var wire 1 ! clk $end
 $scope module $unit $end
-$var bit 1 ! global_bit $end
+$var bit 1 " global_bit $end
 $upscope $end
-$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 " clk $end
+$var wire 1 ! clk $end
 $var integer 32 # cyc [31:0] $end
 $var bit 2 $ v_strp [1:0] $end
 $var bit 4 % v_strp_strp [3:0] $end
@@ -105,11 +105,11 @@ b00 &
 b0000 %
 b00 $
 b00000000000000000000000000000000 #
-0"
-1!
+1"
+0!
 $end
 #10
-1"
+1!
 b00000000000000000000000000000001 #
 b11 $
 b1111 %
@@ -131,9 +131,9 @@ b111 ;
 b00000000000000000000000000000101 D
 b00000000000000000000000000000101 E
 #15
-0"
+0!
 #20
-1"
+1!
 b110 ;
 b00000000000000000000000000000100 :
 b00000000000000000000000000000010 9
@@ -154,9 +154,9 @@ b00 $
 b00000000000000000000000000000010 #
 b111111 <
 #25
-0"
+0!
 #30
-1"
+1!
 b110110 <
 b00000000000000000000000000000011 #
 b11 $
@@ -177,9 +177,9 @@ b00000000000000000000000000000011 9
 b00000000000000000000000000000110 :
 b101 ;
 #35
-0"
+0!
 #40
-1"
+1!
 b100 ;
 b00000000000000000000000000001000 :
 b00000000000000000000000000000100 9
@@ -200,9 +200,9 @@ b00 $
 b00000000000000000000000000000100 #
 b101101 <
 #45
-0"
+0!
 #50
-1"
+1!
 b100100 <
 b00000000000000000000000000000101 #
 b11 $
@@ -223,9 +223,9 @@ b00000000000000000000000000000101 9
 b00000000000000000000000000001010 :
 b011 ;
 #55
-0"
+0!
 #60
-1"
+1!
 b010 ;
 b00000000000000000000000000001100 :
 b00000000000000000000000000000110 9
diff --git a/test_regress/t/t_trace_complex_structs.out b/test_regress/t/t_trace_complex_structs.out
index 62af1451c..ee2694794 100644
--- a/test_regress/t/t_trace_complex_structs.out
+++ b/test_regress/t/t_trace_complex_structs.out
@@ -1,10 +1,10 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 I clk $end
   $scope module $unit $end
    $var wire 1 # global_bit $end
   $upscope $end
-  $var wire 1 I clk $end
   $scope module t $end
    $var wire 1 I clk $end
    $var wire 32 $ cyc [31:0] $end
diff --git a/test_regress/t/t_trace_complex_structs_fst.out b/test_regress/t/t_trace_complex_structs_fst.out
index e55bcf96f..54d3858d3 100644
--- a/test_regress/t/t_trace_complex_structs_fst.out
+++ b/test_regress/t/t_trace_complex_structs_fst.out
@@ -1,5 +1,5 @@
 $date
-	Thu Jan 25 08:09:51 2024
+	Tue Jun 10 19:02:40 2025
 
 $end
 $version
@@ -11,12 +11,12 @@ $end
 $scope module top $end
 $attrbegin misc 07 t.enumed_t 4 ZERO ONE TWO THREE 00000000000000000000000000000000 00000000000000000000000000000001 00000000000000000000000000000010 00000000000000000000000000000011 1 $end
 $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end
+$var wire 1 ! clk $end
 $scope module $unit $end
-$var bit 1 ! global_bit $end
+$var bit 1 " global_bit $end
 $upscope $end
-$var wire 1 " clk $end
 $scope module t $end
-$var wire 1 " clk $end
+$var wire 1 ! clk $end
 $var integer 32 # cyc [31:0] $end
 $scope struct v_strp $end
 $var bit 1 $ b1 $end
@@ -151,11 +151,11 @@ b00 ,
 0%
 0$
 b00000000000000000000000000000000 #
-0"
-1!
+1"
+0!
 $end
 #10
-1"
+1!
 b00000000000000000000000000000001 #
 1$
 1%
@@ -189,9 +189,9 @@ b111 G
 b00000000000000000000000000000101 N
 b00000000000000000000000000000101 O
 #15
-0"
+0!
 #20
-1"
+1!
 b110 G
 b00000000000000000000000000000100 F
 b00000000000000000000000000000010 E
@@ -225,9 +225,9 @@ b00000000000000000000000000000010 #
 b111 H
 b111 I
 #25
-0"
+0!
 #30
-1"
+1!
 b110 I
 b110 H
 b00000000000000000000000000000011 #
@@ -261,9 +261,9 @@ b00000000000000000000000000000011 E
 b00000000000000000000000000000110 F
 b101 G
 #35
-0"
+0!
 #40
-1"
+1!
 b100 G
 b00000000000000000000000000001000 F
 b00000000000000000000000000000100 E
@@ -297,9 +297,9 @@ b00000000000000000000000000000100 #
 b101 H
 b101 I
 #45
-0"
+0!
 #50
-1"
+1!
 b100 I
 b100 H
 b00000000000000000000000000000101 #
@@ -333,9 +333,9 @@ b00000000000000000000000000000101 E
 b00000000000000000000000000001010 F
 b011 G
 #55
-0"
+0!
 #60
-1"
+1!
 b010 G
 b00000000000000000000000000001100 F
 b00000000000000000000000000000110 E
diff --git a/test_regress/t/t_trace_event.out b/test_regress/t/t_trace_event.out
index 33f528708..13b11089b 100644
--- a/test_regress/t/t_trace_event.out
+++ b/test_regress/t/t_trace_event.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var event 1 # ev_test $end
   $var wire 32 $ i [31:0] $end
diff --git a/test_regress/t/t_trace_event_fst.out b/test_regress/t/t_trace_event_fst.out
index bda112149..c67115be4 100644
--- a/test_regress/t/t_trace_event_fst.out
+++ b/test_regress/t/t_trace_event_fst.out
@@ -1,5 +1,5 @@
 $date
-	Sun Sep 22 22:54:12 2024
+	Tue Jun 10 19:02:19 2025
 
 $end
 $version
@@ -8,8 +8,6 @@ $end
 $timescale
 	1ps
 $end
-$scope module $rootio $end
-$upscope $end
 $scope module t $end
 $var event 1 ! ev_test $end
 $var int 32 " i [31:0] $end
diff --git a/test_regress/t/t_trace_no_top_name.out b/test_regress/t/t_trace_no_top_name.out
index 5eef24e61..2905133f4 100644
--- a/test_regress/t/t_trace_no_top_name.out
+++ b/test_regress/t/t_trace_no_top_name.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module another_top $end
   $var wire 1 # b $end
  $upscope $end
diff --git a/test_regress/t/t_trace_no_top_name2.v b/test_regress/t/t_trace_no_top_name2.v
index b1f408cb6..4d02a9029 100644
--- a/test_regress/t/t_trace_no_top_name2.v
+++ b/test_regress/t/t_trace_no_top_name2.v
@@ -4,6 +4,14 @@
 // any use, without warranty, 2024 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+package foo_pkg;
+   function int foo_func;
+      input int b;
+      int b_current;
+      return 0;
+   endfunction
+endpackage
+
 module sub;
    int a = 1212;
 endmodule
@@ -13,7 +21,9 @@ module t (/*AUTOARG*/
    clk
    );
    input clk;
-   int   cyc;
+   int cyc;
+
+   import foo_pkg::*;
 
    sub sub();
 
diff --git a/test_regress/t/t_trace_no_top_name2_fst.out b/test_regress/t/t_trace_no_top_name2_fst.out
index 81393e41f..51bb6dce5 100644
--- a/test_regress/t/t_trace_no_top_name2_fst.out
+++ b/test_regress/t/t_trace_no_top_name2_fst.out
@@ -1,5 +1,5 @@
 $date
-	Sat Sep 21 08:10:39 2024
+	Tue Jun 10 18:57:59 2025
 
 $end
 $version
@@ -11,67 +11,71 @@ $end
 $scope module $rootio $end
 $var wire 1 ! clk $end
 $upscope $end
+$scope module foo_pkg $end
+$var int 32 " foo_func__Vstatic__b_current [31:0] $end
+$upscope $end
 $scope module t $end
 $var wire 1 ! clk $end
-$var int 32 " cyc [31:0] $end
+$var int 32 # cyc [31:0] $end
 $scope module sub $end
-$var int 32 # a [31:0] $end
+$var int 32 $ a [31:0] $end
 $upscope $end
 $upscope $end
 $enddefinitions $end
 #0
 $dumpvars
-b00000000000000000000010010111100 #
+b00000000000000000000010010111100 $
+b00000000000000000000000000000000 #
 b00000000000000000000000000000000 "
 0!
 $end
 #1
 1!
-b00000000000000000000000000000001 "
+b00000000000000000000000000000001 #
 #2
 0!
 #3
 1!
-b00000000000000000000000000000010 "
+b00000000000000000000000000000010 #
 #4
 0!
 #5
 1!
-b00000000000000000000000000000011 "
+b00000000000000000000000000000011 #
 #6
 0!
 #7
 1!
-b00000000000000000000000000000100 "
+b00000000000000000000000000000100 #
 #8
 0!
 #9
 1!
-b00000000000000000000000000000101 "
+b00000000000000000000000000000101 #
 #10
 0!
 #11
 1!
-b00000000000000000000000000000110 "
+b00000000000000000000000000000110 #
 #12
 0!
 #13
 1!
-b00000000000000000000000000000111 "
+b00000000000000000000000000000111 #
 #14
 0!
 #15
 1!
-b00000000000000000000000000001000 "
+b00000000000000000000000000001000 #
 #16
 0!
 #17
 1!
-b00000000000000000000000000001001 "
+b00000000000000000000000000001001 #
 #18
 0!
 #19
 1!
-b00000000000000000000000000001010 "
+b00000000000000000000000000001010 #
 #20
 0!
diff --git a/test_regress/t/t_trace_no_top_name2_saif.out b/test_regress/t/t_trace_no_top_name2_saif.out
index 8c984483e..99ad2662c 100644
--- a/test_regress/t/t_trace_no_top_name2_saif.out
+++ b/test_regress/t/t_trace_no_top_name2_saif.out
@@ -11,6 +11,42 @@
    (clk (T0 10) (T1 10) (TZ 0) (TX 0) (TB 0) (TC 20))
   )
  )
+ (INSTANCE foo_pkg
+  (NET
+   (foo_func__Vstatic__b_current\[0\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[1\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[2\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[3\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[4\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[5\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[6\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[7\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[8\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[9\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[10\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[11\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[12\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[13\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[14\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[15\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[16\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[17\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[18\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[19\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[20\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[21\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[22\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[23\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[24\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[25\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[26\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[27\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[28\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[29\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[30\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+   (foo_func__Vstatic__b_current\[31\] (T0 20) (T1 0) (TZ 0) (TX 0) (TB 0) (TC 0))
+  )
+ )
  (INSTANCE t
   (NET
    (clk (T0 10) (T1 10) (TZ 0) (TX 0) (TB 0) (TC 20))
diff --git a/test_regress/t/t_trace_no_top_name2_vcd.out b/test_regress/t/t_trace_no_top_name2_vcd.out
index 45e6e891c..7835046a5 100644
--- a/test_regress/t/t_trace_no_top_name2_vcd.out
+++ b/test_regress/t/t_trace_no_top_name2_vcd.out
@@ -3,6 +3,9 @@ $timescale 1ps $end
  $scope module $rootio $end
   $var wire 1 # clk $end
  $upscope $end
+ $scope module foo_pkg $end
+  $var wire 32 & foo_func__Vstatic__b_current [31:0] $end
+ $upscope $end
  $scope module t $end
   $var wire 1 # clk $end
   $var wire 32 $ cyc [31:0] $end
@@ -17,6 +20,7 @@ $enddefinitions $end
 0#
 b00000000000000000000000000000000 $
 b00000000000000000000010010111100 %
+b00000000000000000000000000000000 &
 #1
 1#
 b00000000000000000000000000000001 $
diff --git a/test_regress/t/t_trace_param_override.out b/test_regress/t/t_trace_param_override.out
index c139f47f0..e896822d2 100644
--- a/test_regress/t/t_trace_param_override.out
+++ b/test_regress/t/t_trace_param_override.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var wire 32 # POVERRODE [31:0] $end
   $var wire 32 $ PORIG [31:0] $end
diff --git a/test_regress/t/t_trace_public.out b/test_regress/t/t_trace_public.out
index 1ded6ffc4..c545c91dc 100644
--- a/test_regress/t/t_trace_public.out
+++ b/test_regress/t/t_trace_public.out
@@ -1,6 +1,8 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
  $scope module top $end
+  $var wire 1 5 CLK $end
+  $var wire 1 6 RESET $end
   $scope module t $end
    $var wire 1 5 CLK $end
    $var wire 1 # RESET $end
@@ -23,8 +25,6 @@ $timescale 1ps $end
     $var wire 128 1 i128 [63:-64] $end
    $upscope $end
   $upscope $end
-  $var wire 1 5 CLK $end
-  $var wire 1 6 RESET $end
  $upscope $end
 $enddefinitions $end
 
diff --git a/test_regress/t/t_trace_timing1.out b/test_regress/t/t_trace_timing1.out
index 9aa36ef0b..ac703d8cc 100644
--- a/test_regress/t/t_trace_timing1.out
+++ b/test_regress/t/t_trace_timing1.out
@@ -1,7 +1,5 @@
 $version Generated by VerilatedVcd $end
 $timescale 1ps $end
- $scope module $rootio $end
- $upscope $end
  $scope module t $end
   $var wire 32 % CLOCK_CYCLE [31:0] $end
   $var wire 1 # rst $end

From dc307270f74e0f8a27579e13b828c1ea3050a3cb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bart=C5=82omiej=20Chmiel?= <bchmiel@antmicro.com>
Date: Thu, 12 Jun 2025 13:15:46 +0200
Subject: [PATCH 138/211] Fix nested hier blocks workers error (#6087)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Signed-off-by: Bartłomiej Chmiel <bchmiel@antmicro.com>
---
 src/V3Config.cpp                            | 32 +++++++++++++++------
 src/V3Config.h                              |  2 +-
 src/V3HierBlock.cpp                         |  4 +--
 test_regress/t/t_hier_block_threads_bad.out |  4 +--
 4 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/src/V3Config.cpp b/src/V3Config.cpp
index 91482d6a1..f245cf9aa 100644
--- a/src/V3Config.cpp
+++ b/src/V3Config.cpp
@@ -532,6 +532,18 @@ public:
 //######################################################################
 // Resolve modules and files in the design
 
+class V3ConfigResolverHierWorkerEntry final {
+    const int m_workers;
+    FileLine* const m_flp;
+
+public:
+    explicit V3ConfigResolverHierWorkerEntry(int workers, FileLine* flp)
+        : m_workers{workers}
+        , m_flp{flp} {}
+    int workers() const { return m_workers; }
+    FileLine* flp() const { return m_flp; }
+};
+
 class V3ConfigResolver final {
     enum ProfileDataMode : uint8_t { NONE = 0, MTASK = 1, HIER_DPI = 2 };
     V3ConfigModuleResolver m_modules;  // Access to module names (with wildcards)
@@ -540,8 +552,7 @@ class V3ConfigResolver final {
     std::unordered_map<string, std::unordered_map<string, uint64_t>>
         m_profileData;  // Access to profile_data records
     uint8_t m_mode = NONE;
-    std::unordered_map<string, int> m_hierWorkers;
-    FileLine* m_hierWorkersFileLine = nullptr;
+    std::unordered_map<string, V3ConfigResolverHierWorkerEntry> m_hierWorkers;
     FileLine* m_profileFileLine = nullptr;
 
     V3ConfigResolver() = default;
@@ -572,16 +583,19 @@ public:
         // Empty key for hierarchical DPI wrapper costs.
         return getProfileData(hierDpi, "");
     }
-    void addHierWorkers(FileLine* fl, const string& model, int workers) {
-        if (!m_hierWorkersFileLine) m_hierWorkersFileLine = fl;
-        m_hierWorkers[model] = workers;
+    void addHierWorkers(FileLine* flp, const string& model, int workers) {
+        m_hierWorkers.emplace(std::piecewise_construct, std::forward_as_tuple(model),
+                              std::forward_as_tuple(workers, flp));
     }
     int getHierWorkers(const string& model) const {
         const auto mit = m_hierWorkers.find(model);
         // Assign a single worker if no specified.
-        return mit != m_hierWorkers.cend() ? mit->second : 0;
+        return mit != m_hierWorkers.cend() ? mit->second.workers() : 0;
+    }
+    FileLine* getHierWorkersFileLine(const string& model) const {
+        const auto mit = m_hierWorkers.find(model);
+        return mit != m_hierWorkers.cend() ? mit->second.flp() : v3Global.rootp()->fileline();
     }
-    FileLine* getHierWorkersFileLine() const { return m_hierWorkersFileLine; }
     uint64_t getProfileData(const string& model, const string& key) const {
         const auto mit = m_profileData.find(model);
         if (mit == m_profileData.cend()) return 0;
@@ -760,8 +774,8 @@ void V3Config::applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar
 int V3Config::getHierWorkers(const string& model) {
     return V3ConfigResolver::s().getHierWorkers(model);
 }
-FileLine* V3Config::getHierWorkersFileLine() {
-    return V3ConfigResolver::s().getHierWorkersFileLine();
+FileLine* V3Config::getHierWorkersFileLine(const string& model) {
+    return V3ConfigResolver::s().getHierWorkersFileLine(model);
 }
 uint64_t V3Config::getProfileData(const string& hierDpi) {
     return V3ConfigResolver::s().getProfileData(hierDpi);
diff --git a/src/V3Config.h b/src/V3Config.h
index 34b1aad55..6cae9e04f 100644
--- a/src/V3Config.h
+++ b/src/V3Config.h
@@ -54,7 +54,7 @@ public:
     static void applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp);
 
     static int getHierWorkers(const string& model);
-    static FileLine* getHierWorkersFileLine();
+    static FileLine* getHierWorkersFileLine(const string& model);
     static uint64_t getProfileData(const string& hierDpi);
     static uint64_t getProfileData(const string& model, const string& key);
     static FileLine* getProfileDataFileLine();
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index c0e2d8955..41d542993 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -192,8 +192,8 @@ V3StringList V3HierBlock::commandArgs(bool forCMake) const {
     const int blockThreads = V3Config::getHierWorkers(m_modp->origName());
     if (blockThreads > 1) {
         if (hasParent()) {
-            V3Config::getHierWorkersFileLine()->v3warn(
-                E_UNSUPPORTED, "Specifying workers for nested hierarchical blocks");
+            V3Config::getHierWorkersFileLine(m_modp->origName())
+                ->v3warn(E_UNSUPPORTED, "Specifying workers for nested hierarchical blocks");
         } else {
             if (v3Global.opt.threads() < blockThreads) {
                 m_modp->v3error("Hierarchical blocks cannot be scheduled on more threads than in "
diff --git a/test_regress/t/t_hier_block_threads_bad.out b/test_regress/t/t_hier_block_threads_bad.out
index 108e3acbd..c82c09c9b 100644
--- a/test_regress/t/t_hier_block_threads_bad.out
+++ b/test_regress/t/t_hier_block_threads_bad.out
@@ -3,8 +3,8 @@
    23 | module Core(input clk); /*verilator hier_block*/ 
       |        ^~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error-UNSUPPORTED: t/t_hier_block_threads_bad.vlt:8:1: Specifying workers for nested hierarchical blocks
-    8 | hier_workers -module "Core" -workers 8
+%Error-UNSUPPORTED: t/t_hier_block_threads_bad.vlt:9:1: Specifying workers for nested hierarchical blocks
+    9 | hier_workers -module "SubCore" -workers 8
       | ^~~~~~~~~~~~
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
 %Error: Exiting due to

From 206a0b4fd2b2f8632859adca12a47db411cd9140 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Thu, 12 Jun 2025 11:53:10 -0400
Subject: [PATCH 139/211] Fix casting reals to large integrals (#6085)

---
 src/V3Width.cpp               |  4 ++--
 test_regress/t/t_real_cast.py | 18 ++++++++++++++++
 test_regress/t/t_real_cast.v  | 39 +++++++++++++++++++++++++++++++++++
 3 files changed, 59 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_real_cast.py
 create mode 100644 test_regress/t/t_real_cast.v

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index ef28884e3..86e7ef5b1 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2168,7 +2168,7 @@ class WidthVisitor final : public VNVisitor {
             // Note we don't sign fromp() that would make the algorithm O(n^2) if lots of casting.
             AstNodeExpr* newp = nullptr;
             if (bad) {
-            } else if (const AstBasicDType* const basicp = toDtp->basicp()) {
+            } else if (AstBasicDType* const basicp = toDtp->basicp()) {
                 if (!basicp->isString() && fromDtp->isString()) {
                     newp = new AstNToI{nodep->fileline(), nodep->fromp()->unlinkFrBack(), toDtp};
                 } else if (!basicp->isDouble() && !fromDtp->isDouble()) {
@@ -2192,7 +2192,7 @@ class WidthVisitor final : public VNVisitor {
                     }
                 } else if (!basicp->isDouble() && nodep->fromp()->isDouble()) {
                     newp = new AstRToIRoundS{nodep->fileline(), nodep->fromp()->unlinkFrBack()};
-                    newp->dtypeChgSigned(basicp->isSigned());
+                    newp->dtypep(basicp);
                 } else if (basicp->isSigned() && !nodep->fromp()->isSigned()) {
                     newp = new AstSigned{nodep->fileline(), nodep->fromp()->unlinkFrBack()};
                 } else if (!basicp->isSigned() && nodep->fromp()->isSigned()) {
diff --git a/test_regress/t/t_real_cast.py b/test_regress/t/t_real_cast.py
new file mode 100755
index 000000000..0e36f03cc
--- /dev/null
+++ b/test_regress/t/t_real_cast.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_real_cast.v b/test_regress/t/t_real_cast.v
new file mode 100644
index 000000000..bd698541e
--- /dev/null
+++ b/test_regress/t/t_real_cast.v
@@ -0,0 +1,39 @@
+// DESCRIPTION: Verilator: Confirm x randomization stability
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+
+    typedef logic [85:0] big_t;
+    localparam big_t foo = big_t'(8.531630271583128e+16);
+
+    big_t bar;
+    int cyc;
+    real some_real;
+
+    initial begin
+        cyc = 0;
+        some_real = 5.123;
+    end
+
+    always_comb bar = big_t'(some_real);
+
+    always @(posedge clk) begin
+        cyc <= cyc + 1;
+        some_real <= some_real * 1.234e4;
+        if (cyc == 6) begin
+            if (foo != 86'd85316302715831280) $stop();
+            if (bar != 86'd18089031459271914704338944) $stop();
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+
+endmodule

From 47f5a6a52ba5fb84821943877bf65ab3ff2041f0 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Thu, 12 Jun 2025 12:47:58 -0400
Subject: [PATCH 140/211] Fix unpacked to packed parameter assignment (#6088)
 (#6081)

---
 src/V3Const.cpp                              |  5 ---
 test_regress/t/t_unpacked_to_packed_param.py | 18 ++++++++++
 test_regress/t/t_unpacked_to_packed_param.v  | 38 ++++++++++++++++++++
 3 files changed, 56 insertions(+), 5 deletions(-)
 create mode 100755 test_regress/t/t_unpacked_to_packed_param.py
 create mode 100644 test_regress/t/t_unpacked_to_packed_param.v

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 40dbbca62..b5c89be43 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -2752,11 +2752,6 @@ class ConstVisitor final : public VNVisitor {
             } else {
                 AstNode* const fromp = nodep->fromp()->unlinkFrBack();
                 nodep->replaceWithKeepDType(fromp);
-                if (VN_IS(fromp->dtypep()->skipRefp(), NodeArrayDType)) {
-                    // Strip off array to find what array references
-                    fromp->dtypeFrom(
-                        VN_AS(fromp->dtypep()->skipRefp(), NodeArrayDType)->subDTypep());
-                }
                 VL_DO_DANGLING(pushDeletep(nodep), nodep);
             }
         }
diff --git a/test_regress/t/t_unpacked_to_packed_param.py b/test_regress/t/t_unpacked_to_packed_param.py
new file mode 100755
index 000000000..0e36f03cc
--- /dev/null
+++ b/test_regress/t/t_unpacked_to_packed_param.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios("vlt")
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_unpacked_to_packed_param.v b/test_regress/t/t_unpacked_to_packed_param.v
new file mode 100644
index 000000000..f8db8786b
--- /dev/null
+++ b/test_regress/t/t_unpacked_to_packed_param.v
@@ -0,0 +1,38 @@
+// DESCRIPTION: Verilator: Confirm x randomization stability
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+
+    always @(posedge clk) begin
+        $write("*-* All Finished *-*\n");
+        $finish;
+    end
+
+    localparam logic [1:0][7:0] foo_unpacked [2:0] = '{"12", "34", "56"};
+    localparam logic [2:0][1:0][7:0] foo_packed = '{"12", "34", "56"};
+
+    sub #(
+        .foos ({foo_unpacked[0], foo_unpacked[1], foo_unpacked[2]})
+    ) the_unpacked_sub();
+
+    sub #(
+        .foos ({foo_packed[0], foo_packed[1], foo_packed[2]})
+    ) the_packed_sub();
+
+endmodule
+
+module sub #(
+    parameter logic [2:0][1:0][7:0] foos
+);
+    initial begin
+        if (foos != "563412") $stop;
+    end
+endmodule

From bca2e2c16e4fbd9a532cf8be10e00ee3bce63426 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 15 Jun 2025 16:00:11 +0100
Subject: [PATCH 141/211] Optimize DFG De Morgan patterns (#6090)

It's ok if the replaced vertex has multiple sinks, this pattern cannot
increase the size of logic even then.
---
 src/V3DfgPeephole.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index ff3b42020..cd1915f06 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -895,8 +895,8 @@ class V3DfgPeephole final : public DfgVisitor {
         DfgVertex* const rhsp = vtxp->rhsp();
         FileLine* const flp = vtxp->fileline();
 
-        // Bubble pushing
-        if (!vtxp->hasMultipleSinks() && !lhsp->hasMultipleSinks() && !rhsp->hasMultipleSinks()) {
+        // Bubble pushing (De Morgan)
+        if (!lhsp->hasMultipleSinks() && !rhsp->hasMultipleSinks()) {
             if (DfgNot* const lhsNotp = lhsp->cast<DfgNot>()) {
                 if (DfgNot* const rhsNotp = rhsp->cast<DfgNot>()) {
                     APPLYING(REPLACE_AND_OF_NOT_AND_NOT) {
@@ -964,8 +964,8 @@ class V3DfgPeephole final : public DfgVisitor {
         DfgVertex* const rhsp = vtxp->rhsp();
         FileLine* const flp = vtxp->fileline();
 
-        // Bubble pushing
-        if (!vtxp->hasMultipleSinks() && !lhsp->hasMultipleSinks() && !rhsp->hasMultipleSinks()) {
+        // Bubble pushing (De Morgan)
+        if (!lhsp->hasMultipleSinks() && !rhsp->hasMultipleSinks()) {
             if (DfgNot* const lhsNotp = lhsp->cast<DfgNot>()) {
                 if (DfgNot* const rhsNotp = rhsp->cast<DfgNot>()) {
                     APPLYING(REPLACE_OR_OF_NOT_AND_NOT) {

From d059806dbdfe76596063ad84444d7a313f419a62 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 15 Jun 2025 18:12:37 +0100
Subject: [PATCH 142/211] Fix Dfg eliminateVar pass to remove more variables
 (#6091)

Failing to reset the work list pointer in vertices leads to not removing
some redundant variables if they become redundant after having been
considered once already.
---
 src/V3DfgPasses.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 5c82ba149..5b6ffb81a 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -263,6 +263,8 @@ void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
         DfgVertex* const vtxp = workListp;
         // Detach the head
         workListp = vtxp->getUser<DfgVertex*>();
+        // Reset user pointer so it can be added back to the work list later
+        vtxp->setUser<DfgVertex*>(nullptr);
         // Prefetch next item
         VL_PREFETCH_RW(workListp);
 

From 4c2eb8c0b8587e66899eb3bf6cd53ffbd1acc37e Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 15 Jun 2025 14:51:56 -0400
Subject: [PATCH 143/211] Commentary: Fix broken links

---
 docs/guide/contributors.rst  | 4 ++--
 docs/guide/exe_verilator.rst | 2 +-
 docs/guide/install.rst       | 2 +-
 docs/guide/warnings.rst      | 8 ++++----
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/docs/guide/contributors.rst b/docs/guide/contributors.rst
index 504ca4698..3d6881f3f 100644
--- a/docs/guide/contributors.rst
+++ b/docs/guide/contributors.rst
@@ -23,8 +23,8 @@ Contributors
 Many people have provided ideas and other assistance with Verilator.
 
 Verilator is receiving significant development support from the `CHIPS
-Alliance <https://chipsalliance.org>`_, `Antmicro Ltd
-<https://antmicro.com>`_ and `Shunyao CAD <https://shunyaocad.com>`_.
+Alliance <https://chipsalliance.org>`_, and `Antmicro Ltd
+<https://antmicro.com>`_.
 
 Previous major corporate sponsors of Verilator, by providing significant
 contributions of time or funds include: Antmicro Ltd., Atmel Corporation,
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 8858e25dd..938152af8 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -398,7 +398,7 @@ Summary:
    Enables diagnostics output into a Static Analysis Results Interchange
    Format (SARIF) file, a standard, JSON-based format for the output of
    static analysis tools such as linters.  See
-   [SARIF](http://sarifweb.azurewebsites.net/),
+   [SARIF](https://sarifweb.azurewebsites.net/),
    [sarif-tools](https://github.com/microsoft/sarif-tools), and the [SARIF
    web-based viewer](https://microsoft.github.io/sarif-web-component/).
 
diff --git a/docs/guide/install.rst b/docs/guide/install.rst
index d54e7c5d0..333dde197 100644
--- a/docs/guide/install.rst
+++ b/docs/guide/install.rst
@@ -194,7 +194,7 @@ Install Z3
 ^^^^^^^^^^
 
 In order to use constrained randomization the `Z3 Theorem Prover
-<https://github.com/z3prover/z3#readme>`__ must be installed, however this is
+<https://github.com/z3prover/z3>`__ must be installed, however this is
 not required at Verilator build time. There are other compatible SMT solvers,
 like CVC5/CVC4, but they are not guaranteed to work. Since different solvers are
 faster for different scenarios, the solver to use at run-time can be specified
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 3827c9b89..66ea9de5d 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -363,8 +363,8 @@ List Of Warnings
 
    Warns that it is better style to use casez, and "?" in place of
    "x"'s.  See
-   `http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf
-   <http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_rev1_1.pdf>`_
+   `http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase.pdf
+   <http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase.pdf>`_
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
@@ -438,8 +438,8 @@ List Of Warnings
    is suppressed, Verilator, like synthesis, will convert this to a
    non-delayed assignment, which may result in logic races or other
    nasties.  See
-   `http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA_rev1_2.pdf
-   <http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA_rev1_2.pdf>`_
+   `http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA.pdf
+   <http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA.pdf>`_
 
    Ignoring this warning may make Verilator simulations differ from other
    simulators.

From 173e9d2a947e55aba8c95bcac010ae970af90b69 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 15 Jun 2025 14:52:28 -0400
Subject: [PATCH 144/211] Commentary: Changes update

---
 Changes | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index b6eeff672..8f7eb7d17 100644
--- a/Changes
+++ b/Changes
@@ -17,6 +17,7 @@ Verilator 5.037 devel
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
+* Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
 * Support parameter forward types.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
@@ -27,8 +28,11 @@ Verilator 5.037 devel
 * Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Optimize DFG De Morgan patterns (#6090). [Geza Lore]
+* Optimize DFG variable elimination (#6091). [Geza Lore]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
-* Fix trace hierarchicalName runtime errors (#5668) (#6076). [Paul Swirhun]
+* Fix trace hierarchical-name runtime errors (#5668) (#6076). [Paul Swirhun]
+* Fix streaming operator packing order (#5903) (#6077). [Paul Swirhun]
 * Fix filename backslash escapes in C code (#5947).
 * Fix C++ widths in V3Expand (#5953) (#5975). [Geza Lore]
 * Fix dependencies from different hierarchical schedules (#5954). [Bartłomiej Chmiel, Antmicro Ltd.]
@@ -59,6 +63,10 @@ Verilator 5.037 devel
 * Fix virtual interface array typedef expressions (#6057).
 * Fix DFG peephole select conditionals (#6064) (#6071). [Geza Lore]
 * Fix `--skip-identical` skipping on some errors (#6066). [Todd Strader]
+* Fix class typedef elaboration (#6080). [Kamil Rakoczy, Antmicro Ltd.]
+* Fix unpacked to packed parameter assignment (#6081) (#6088). [Todd Strader]
+* Fix casting reals to large integrals (#6085). [Todd Strader]
+* Fix nested hier blocks workers error (#6087). [Bartłomiej Chmiel, Antmicro Ltd.]
 
 
 Verilator 5.036 2025-04-27

From 5e5b5ab69d505c13222856b160d4a8d951efbb73 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 15 Jun 2025 23:10:42 +0100
Subject: [PATCH 145/211] Restrict Dfg PUSH_SEL_THROUGH_CONCAT pattern (#6092)

This pattern is bit dubious and can blow up the size of the logic.
Restrict it to only apply if it strictly does not increase DFG size.
---
 src/V3DfgPeephole.cpp | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index cd1915f06..ead99f657 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -774,12 +774,9 @@ class V3DfgPeephole final : public DfgVisitor {
                     DfgSel* const replacementp = make<DfgSel>(vtxp, lhsp, lsb - rhsp->width());
                     replace(vtxp, replacementp);
                 }
-            } else if (lsb == 0 || msb == concatp->width() - 1  //
-                       || lhsp->is<DfgConst>() || rhsp->is<DfgConst>()  //
-                       || !concatp->hasMultipleSinks()) {
-                // If the select straddles both sides, but at least one of the sides is wholly
-                // selected, or at least one of the sides is a Const, or this concat has no other
-                // use, then push the Sel past the Concat
+            } else if (!concatp->hasMultipleSinks()) {
+                // If the select straddles both sides, the Concat has no other use,
+                // then push the Sel past the Concat
                 APPLYING(PUSH_SEL_THROUGH_CONCAT) {
                     const uint32_t rSelWidth = rhsp->width() - lsb;
                     const uint32_t lSelWidth = width - rSelWidth;

From 832629c6026710f15dbe694b1f0424376e6f8f97 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 16 Jun 2025 12:25:44 +0100
Subject: [PATCH 146/211] Internals: Refactor DFG getCanonicalVariable for
 reusability (#6094)

This changes hashed names in the generated code, but otherwise no
functional change.
---
 src/V3Dfg.cpp           | 73 ++++++++++++++++++++++++++++++++++++
 src/V3Dfg.h             | 14 ++++++-
 src/V3DfgPasses.h       |  5 ---
 src/V3DfgRegularize.cpp | 82 ++++++++---------------------------------
 4 files changed, 101 insertions(+), 73 deletions(-)

diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index 2dd3c3a7a..65b9e4da4 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -55,6 +55,30 @@ void DfgGraph::addGraph(DfgGraph& other) {
     m_opVertices.splice(m_opVertices.end(), other.m_opVertices);
 }
 
+std::string DfgGraph::makeUniqueName(const std::string& prefix, size_t n) {
+    // Construct the tmpNameStub if we have not done so yet
+    if (m_tmpNameStub.empty()) {
+        // Use the hash of the graph name (avoid long names and non-identifiers)
+        const std::string name = V3Hash{m_name}.toString();
+        // We need to keep every variable globally unique, and graph hashed
+        // names might not be, so keep a static table to track multiplicity
+        static std::unordered_map<std::string, uint32_t> s_multiplicity;
+        m_tmpNameStub += '_' + name + '_' + std::to_string(s_multiplicity[name]++) + '_';
+    }
+    // Assemble the globally unique name
+    return "__Vdfg" + prefix + m_tmpNameStub + std::to_string(n);
+}
+
+DfgVertexVar* DfgGraph::makeNewVar(FileLine* flp, const std::string& name, AstNodeDType* dtypep) {
+    // Add AstVar to containing module
+    AstVar* const varp = new AstVar{flp, VVarType::MODULETEMP, name, dtypep};
+    modulep()->addStmtsp(varp);
+
+    // Create and return the corresponding variable vertex
+    if (VN_IS(varp->dtypeSkipRefp(), UnpackArrayDType)) return new DfgVarArray{*this, varp};
+    return new DfgVarPacked{*this, varp};
+}
+
 static const string toDotId(const DfgVertex& vtx) { return '"' + cvtToHex(&vtx) + '"'; }
 
 // Dump one DfgVertex in Graphviz format
@@ -411,6 +435,55 @@ uint32_t DfgVertex::fanout() const {
     return result;
 }
 
+DfgVarPacked* DfgVertex::getResultVar() {
+    UASSERT_OBJ(!this->is<DfgVarArray>(), this, "Arrays are not supported by " << __FUNCTION__);
+
+    // It's easy if the vertex is already a variable ...
+    if (DfgVarPacked* const varp = this->cast<DfgVarPacked>()) return varp;
+
+    // Inspect existing variables fully written by this vertex, and choose one
+    DfgVarPacked* resp = nullptr;
+    this->forEachSink([&resp](DfgVertex& sink) {
+        DfgVarPacked* const varp = sink.cast<DfgVarPacked>();
+        if (!varp) return;
+        if (!varp->isDrivenFullyByDfg()) return;
+        // Ignore SystemC variables, they cannot participate in expressions or
+        // be assigned rvalue expressions.
+        if (varp->varp()->isSc()) return;
+        // First variable found
+        if (!resp) {
+            resp = varp;
+            return;
+        }
+        // Prefer those variables that must be kept anyway
+        const bool keepOld = resp->keep() || resp->hasDfgRefs();
+        const bool keepNew = varp->keep() || varp->hasDfgRefs();
+        if (keepOld != keepNew) {
+            if (!keepOld) resp = varp;
+            return;
+        }
+        // Prefer those that already have module references
+        if (resp->hasModRefs() != varp->hasModRefs()) {
+            if (!resp->hasModRefs()) resp = varp;
+            return;
+        }
+        // Prefer the earlier one in source order
+        const FileLine& oldFlp = *(resp->fileline());
+        const FileLine& newFlp = *(varp->fileline());
+        if (const int cmp = oldFlp.operatorCompare(newFlp)) {
+            if (cmp > 0) resp = varp;
+            return;
+        }
+        // Prefer the one with the lexically smaller name
+        if (const int cmp = resp->varp()->name().compare(varp->varp()->name())) {
+            if (cmp > 0) resp = varp;
+            return;
+        }
+        // 'resp' and 'varp' are all the same, keep using the existing 'resp'
+    });
+    return resp;
+}
+
 void DfgVertex::unlinkDelete(DfgGraph& dfg) {
     // Unlink source edges
     forEachSourceEdge([](DfgEdge& edge, size_t) { edge.unlinkSource(); });
diff --git a/src/V3Dfg.h b/src/V3Dfg.h
index 3a6e9f154..efb610aa3 100644
--- a/src/V3Dfg.h
+++ b/src/V3Dfg.h
@@ -280,6 +280,10 @@ public:
     // Fanout (number of sinks) of this vertex (expensive to compute)
     uint32_t fanout() const VL_MT_DISABLED;
 
+    // Return a canonical variable vertex that holds the value of this vertex,
+    // or nullptr if no such variable exists in the graph. This is O(fanout).
+    DfgVarPacked* getResultVar() VL_MT_DISABLED;
+
     // Unlink from container (graph or builder), then delete this vertex
     void unlinkDelete(DfgGraph& dfg) VL_MT_DISABLED;
 
@@ -636,7 +640,8 @@ class DfgGraph final {
     uint32_t m_userCnt = 0;  // Vertex user data generation counter
     // Parent of the graph (i.e.: the module containing the logic represented by this graph).
     AstModule* const m_modulep;
-    const string m_name;  // Name of graph (for debugging)
+    const std::string m_name;  // Name of graph - need not be unique
+    std::string m_tmpNameStub{""};  // Name stub for temporary variables - computed lazy
 
 public:
     // CONSTRUCTOR
@@ -685,6 +690,13 @@ public:
     // Add contents of other graph to this graph. Leaves other graph empty.
     void addGraph(DfgGraph& other) VL_MT_DISABLED;
 
+    // Genarete a unique name. The provided 'prefix' and 'n' values will be part of the name, and
+    // must be unique (as a pair) in each invocation for this graph.
+    std::string makeUniqueName(const std::string& prefix, size_t n) VL_MT_DISABLED;
+
+    // Create a new variable with the given name and data type
+    DfgVertexVar* makeNewVar(FileLine*, const std::string& name, AstNodeDType*) VL_MT_DISABLED;
+
     // Split this graph into individual components (unique sub-graphs with no edges between them).
     // Also removes any vertices that are not weakly connected to any variable.
     // Leaves 'this' graph empty.
diff --git a/src/V3DfgPasses.h b/src/V3DfgPasses.h
index 59eb73312..ef8984786 100644
--- a/src/V3DfgPasses.h
+++ b/src/V3DfgPasses.h
@@ -43,14 +43,9 @@ public:
 class V3DfgRegularizeContext final {
     const std::string m_label;  // Label to apply to stats
 
-    // Used to generate unique names for different DFGs within the same hashed name
-    std::unordered_map<std::string, uint32_t> m_multiplicity;
-
 public:
     VDouble0 m_temporariesIntroduced;  // Number of temporaries introduced
 
-    std::string tmpNamePrefix(const DfgGraph&);  // Return prefix to use for given graph
-
     explicit V3DfgRegularizeContext(const std::string& label)
         : m_label{label} {}
     ~V3DfgRegularizeContext() VL_MT_DISABLED;
diff --git a/src/V3DfgRegularize.cpp b/src/V3DfgRegularize.cpp
index 182b891bb..0dd3e6da8 100644
--- a/src/V3DfgRegularize.cpp
+++ b/src/V3DfgRegularize.cpp
@@ -26,73 +26,13 @@
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
-std::string V3DfgRegularizeContext::tmpNamePrefix(const DfgGraph& dfg) {
-    // cppcheck-suppress unreadVariable  // cppcheck bug
-    V3Hash hash{dfg.modulep()->name()};
-    hash += m_label;
-    std::string name = hash.toString();
-    const uint32_t sequenceNumber = m_multiplicity[name]++;
-    name += '_' + std::to_string(sequenceNumber);
-    return name;
-}
-
 class DfgRegularize final {
     DfgGraph& m_dfg;  // The graph being processed
     V3DfgRegularizeContext& m_ctx;  // The optimization context for stats
 
     // Prefix of temporary variable names
-    const std::string m_tmpNamePrefix = "__VdfgRegularize_" + m_ctx.tmpNamePrefix(m_dfg) + '_';
     size_t m_nTmps = 0;  // Number of temporaries added to this graph - for variable names only
 
-    // Return canonical variable that can be used to hold the value of this vertex
-    DfgVarPacked* getCanonicalVariable(DfgVertex& vtx) {
-        // First gather all existing variables fully written by this vertex. Ignore SystemC
-        // variables, those cannot act as canonical variables, as they cannot participate in
-        // expressions or be assigned rvalues.
-        std::vector<DfgVarPacked*> varVtxps;
-        vtx.forEachSink([&](DfgVertex& sink) {
-            if (DfgVarPacked* const varVtxp = sink.cast<DfgVarPacked>()) {
-                if (varVtxp->isDrivenFullyByDfg() && !varVtxp->varp()->isSc()) {
-                    varVtxps.push_back(varVtxp);
-                }
-            }
-        });
-
-        if (!varVtxps.empty()) {
-            // There is at least one usable, existing variable. Pick the first one in source
-            // order for deterministic results.
-            std::stable_sort(varVtxps.begin(), varVtxps.end(),
-                             [](const DfgVarPacked* ap, const DfgVarPacked* bp) {
-                                 // Prefer those variables that must be kept anyway
-                                 const bool keepA = ap->keep() || ap->hasDfgRefs();
-                                 const bool keepB = bp->keep() || bp->hasDfgRefs();
-                                 if (keepA != keepB) return keepA;
-                                 // Prefer those that already have module references, so we don't
-                                 // have to support recursive substitutions.
-                                 if (ap->hasModRefs() != bp->hasModRefs()) return ap->hasModRefs();
-                                 // Otherwise source order
-                                 const FileLine& aFl = *(ap->fileline());
-                                 const FileLine& bFl = *(bp->fileline());
-                                 if (const int cmp = aFl.operatorCompare(bFl)) return cmp < 0;
-                                 // Fall back on names if all else fails
-                                 return ap->varp()->name() < bp->varp()->name();
-                             });
-            return varVtxps.front();
-        }
-
-        // We need to introduce a temporary
-        ++m_ctx.m_temporariesIntroduced;
-
-        // Add temporary AstVar to containing module
-        FileLine* const flp = vtx.fileline();
-        const std::string name = m_tmpNamePrefix + std::to_string(m_nTmps++);
-        AstVar* const varp = new AstVar{flp, VVarType::MODULETEMP, name, vtx.dtypep()};
-        m_dfg.modulep()->addStmtsp(varp);
-
-        // Create and return a variable vertex for the temporary
-        return new DfgVarPacked{m_dfg, varp};
-    }
-
     // Insert intermediate variables for vertices with multiple sinks (or use an existing one)
     DfgRegularize(DfgGraph& dfg, V3DfgRegularizeContext& ctx)
         : m_dfg{dfg}
@@ -117,19 +57,27 @@ class DfgRegularize final {
 
             if (!needsIntermediateVariable) continue;
 
-            // This is an op which has multiple sinks. Ensure it is assigned to a variable.
-            DfgVarPacked* const varp = getCanonicalVariable(vtx);
-            if (varp->arity()) {
-                // Existing variable
+            // This is an op that requires a result variable. Ensure it is
+            // assigned to one, and redirect other sinks read that variable.
+            if (DfgVarPacked* const varp = vtx.getResultVar()) {
+                // A variable already exists
+                UASSERT_OBJ(varp->arity() == 1, varp, "Result variable with multiple drivers");
                 FileLine* const flp = varp->driverFileLine(0);
                 varp->sourceEdge(0)->unlinkSource();
                 varp->resetSources();
                 vtx.replaceWith(varp);
                 varp->addDriver(flp, 0, &vtx);
             } else {
-                // Temporary variable
-                vtx.replaceWith(varp);
-                varp->addDriver(vtx.fileline(), 0, &vtx);
+                // Need to create an intermediate variable
+                const std::string name = m_dfg.makeUniqueName("Regularize", m_nTmps);
+                FileLine* const flp = vtx.fileline();
+                DfgVarPacked* const newp
+                    = m_dfg.makeNewVar(flp, name, vtx.dtypep())->as<DfgVarPacked>();
+                ++m_nTmps;
+                ++m_ctx.m_temporariesIntroduced;
+                // Replace vertex with the variable and add back driver
+                vtx.replaceWith(newp);
+                newp->addDriver(vtx.fileline(), 0, &vtx);
             }
         }
     }

From de2818c73333c9ed287bf7a2a4c5365495920724 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 16 Jun 2025 16:35:31 +0100
Subject: [PATCH 147/211] Add RTLMeter badge and note in internals docs (#6095)

---
 README.rst         |  4 +++-
 docs/internals.rst | 35 +++++++++++++++++++++++++++++++++++
 2 files changed, 38 insertions(+), 1 deletion(-)

diff --git a/README.rst b/README.rst
index a4b39dc0e..d957472d5 100644
--- a/README.rst
+++ b/README.rst
@@ -1,7 +1,7 @@
 .. Github doesn't render images unless absolute URL
 .. Do not know of a conditional tag, "only: github" nor "github display" works
 
-|badge1| |badge2| |badge3| |badge4| |badge5| |badge7|
+|badge1| |badge2| |badge3| |badge4| |badge5| |badge7| |badge8|
 
 .. |badge1| image:: https://img.shields.io/badge/Website-Verilator.org-181717.svg
     :target: https://verilator.org
@@ -15,6 +15,8 @@
     :target: https://hub.docker.com/r/verilator/verilator
 .. |badge7| image:: https://github.com/verilator/verilator/workflows/build/badge.svg
     :target: https://github.com/verilator/verilator/actions?query=workflow%3Abuild
+.. |badge8| image:: https://img.shields.io/github/actions/workflow/status/verilator/verilator/rtlmeter.yml?branch=master&event=schedule&label=benchmarks
+    :target: https://verilator.github.io/verilator-rtlmeter-results
 
 
 Welcome to Verilator
diff --git a/docs/internals.rst b/docs/internals.rst
index 67b6d289c..816d457f7 100644
--- a/docs/internals.rst
+++ b/docs/internals.rst
@@ -1569,6 +1569,41 @@ environment can check their branches too by enabling the build workflow:
 
 -  Click Enable workflow.
 
+Benchmarking
+------------
+
+For benchmarking the effects of changes (simulation speed, memory consumption,
+verilation time, etc.), you can use `RTLMeter
+<https://github.com/verilator/rtlmeter>`__, a benchmark suite designed for this
+purpose. The scripts provided with RTLMeter have many capabilities. For full
+details, see the `documentation of RTLMeter
+<https://verilator.github.io/rtlmeter>`__ itself.
+
+For a quick check, you an run the following after putting ``verilator`` on your
+``PATH``:
+
+.. code:: shell
+
+  ./rtlmeter run --cases "+standard" --workRoot work-a
+  ./rtlmeter report work-a
+
+To compare against an alternate version, again put that alternate ``verilator``
+on your ``PATH`` then run:
+
+.. code:: shell
+
+  ./rtlmeter run --cases "+standard" --workRoot work-b
+  ./rtlmeter compare work-a work-b
+
+The continuous integration system in GitHub Actions runs this benchmark suite
+nightly on the master branch. The performance numbers from these nightly runs
+can be viewed via the `RTLMeter results dashboard
+<https://verilator.github.io/verilator-rtlmeter-results>`__. Note that these
+results are collected on GitHub hosted runners. These are virtual machines
+operating in a potentially noisy environment, so time measurements can have
+significant variance. Experience shows that a ~20% time difference can be
+reliably measured on GitHub hosted runners, and smaller differences are
+noticeable over a few days of reruns as trends emerge from the noise.
 
 Fuzzing
 -------

From 277611bcdd4d9420c82fa0c363aebdba47f57aee Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 16 Jun 2025 23:14:24 +0100
Subject: [PATCH 148/211] Add DFG binToOneHot pass to generate one-hot decoders
 (#6096)

Somewhat commonly, there is code out there that compares an expression (or
variable) against many different constants, e.g. a one-hot decoder:

```systemverilog
  assign oneHot = {x == 3, x == 2, x == 1, x == 0};
```

If the width of the expression is sufficiently large, this can blow up
a GCC pass and take an egregious amount of memory and time to compile.

Adding a new DFG pass that will generate a cheap one-hot decoder:
to compute:

```systemverilog
  wire [$bits(x)-1:0] idx = <the expression being compared many times>
  reg tab [1<<$bits(x)] = '{default: 0};
  reg [$bits(x)-1:0] pre = '0;

  always_comb begin
    tab[pre] = 0;
    tab[idx] = 1;
    pre = idx ; // This assignment marked to avoid a false UNOPFTLAT
  end
```

We then replace the comparisons `x == CONST` with `tab[CONST]`.

This is generally performance neutral, but avoids the compile time and memory
blowup with GCC (128GB+ -> 1GB in one example).

We do not apply this if the comparisons seem to be part of a `COMPARE ?
val : COND` conditional tree, which the C++ compilers can turn into jump
tables.

This enables all XiangShan configurations from RTLMeter to now build with GCC,
so in this patch we enabled those in the nightly runs.
---
 .github/workflows/rtlmeter.yml         |   6 +-
 include/verilated_types.h              |   5 +
 src/V3AstNodeOther.h                   |   2 +-
 src/V3AstNodes.cpp                     |   1 +
 src/V3Dfg.h                            |   5 +
 src/V3DfgPasses.cpp                    | 244 ++++++++++++++
 src/V3DfgPasses.h                      |  13 +
 src/V3DfgVertices.h                    |   2 +
 test_regress/t/t_dfg_bin_to_one_hot.py |  21 ++
 test_regress/t/t_dfg_bin_to_one_hot.v  | 421 +++++++++++++++++++++++++
 10 files changed, 716 insertions(+), 4 deletions(-)
 create mode 100755 test_regress/t/t_dfg_bin_to_one_hot.py
 create mode 100644 test_regress/t/t_dfg_bin_to_one_hot.v

diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index 0472470c9..bb972dfab 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -72,10 +72,10 @@ jobs:
           - "VeeR-EL2:hiperf*"
           - "Vortex:mini:*"
           - "Vortex:sane:*"
-          # - "XiangShan:default-chisel3:* !*:linux"
-          # - "XiangShan:default-chisel6:* !*:linux"
+          - "XiangShan:default-chisel3:* !*:linux"
+          - "XiangShan:default-chisel6:* !*:linux"
           - "XiangShan:mini-chisel3:* !*:linux"
-          # - "XiangShan:mini-chisel6:* !*:linux"
+          - "XiangShan:mini-chisel6:* !*:linux"
           - "XuanTie-E902:*"
           - "XuanTie-E906:*"
           - "XuanTie-C906:*"
diff --git a/include/verilated_types.h b/include/verilated_types.h
index 70e131423..91f9e8cba 100644
--- a/include/verilated_types.h
+++ b/include/verilated_types.h
@@ -1332,6 +1332,11 @@ public:
     const WData* data() const { return &m_storage[0]; }
 
     constexpr std::size_t size() const { return N_Depth; }
+
+    void fill(const T_Value& value) {
+        std::fill(std::begin(m_storage), std::end(m_storage), value);
+    }
+
     // To fit C++14
     template <std::size_t N_CurrentDimension = 0, typename U = T_Value>
     int find_length(int dimension, std::false_type) const {
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 5aa5b6a0f..af08c34e6 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1916,7 +1916,7 @@ class AstVar final : public AstNode {
     bool m_isWrittenByDpi : 1;  // This variable can be written by a DPI Export
     bool m_isWrittenBySuspendable : 1;  // This variable can be written by a suspendable process
     bool m_ignorePostWrite : 1;  // Ignore writes in 'Post' blocks during ordering
-    bool m_ignoreSchedWrite : 1;  // Ignore writes in scheduling (for coverage increments)
+    bool m_ignoreSchedWrite : 1;  // Ignore writes in scheduling (for special optimizations)
 
     void init() {
         m_ansi = false;
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 8981bfc0c..2e6e8b792 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -3004,6 +3004,7 @@ void AstCMethodHard::setPurity() {
                                                           {"evaluate", false},
                                                           {"evaluation", false},
                                                           {"exists", true},
+                                                          {"fill", false},
                                                           {"find", true},
                                                           {"find_first", true},
                                                           {"find_first_index", true},
diff --git a/src/V3Dfg.h b/src/V3Dfg.h
index efb610aa3..a9b495a4e 100644
--- a/src/V3Dfg.h
+++ b/src/V3Dfg.h
@@ -284,6 +284,11 @@ public:
     // or nullptr if no such variable exists in the graph. This is O(fanout).
     DfgVarPacked* getResultVar() VL_MT_DISABLED;
 
+    // If the node has a single sink, return it, otherwise return nullptr
+    DfgVertex* singleSink() const {
+        return m_sinksp && !m_sinksp->m_nextp ? m_sinksp->m_sinkp : nullptr;
+    }
+
     // Unlink from container (graph or builder), then delete this vertex
     void unlinkDelete(DfgGraph& dfg) VL_MT_DISABLED;
 
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 5b6ffb81a..6fd90bb86 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -25,6 +25,11 @@
 
 VL_DEFINE_DEBUG_FUNCTIONS;
 
+V3DfgBinToOneHotContext::~V3DfgBinToOneHotContext() {
+    V3Stats::addStat("Optimizations, DFG " + m_label + " BinToOneHot, decoders created",
+                     m_decodersCreated);
+}
+
 V3DfgCseContext::~V3DfgCseContext() {
     V3Stats::addStat("Optimizations, DFG " + m_label + " CSE, expressions eliminated",
                      m_eliminated);
@@ -226,6 +231,244 @@ void V3DfgPasses::removeUnused(DfgGraph& dfg) {
     }
 }
 
+void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
+    const auto userDataInUse = dfg.userDataInUse();
+
+    // Structure to keep track of comparison details
+    struct Term final {
+        DfgVertex* m_vtxp;  // Vertex to replace
+        bool m_inv;  // '!=', instead of '=='
+        Term() = default;
+        Term(DfgVertex* vtxp, bool inv)
+            : m_vtxp{vtxp}
+            , m_inv{inv} {}
+    };
+
+    // Map from 'value beign compared' -> 'terms', stored in DfgVertex::user()
+    using Val2Terms = std::map<uint32_t, std::vector<Term>>;
+    // Allocator for Val2Terms, so it's cleaned up on return
+    std::deque<Val2Terms> val2TermsAllocator;
+    // List of vertices that are used as sources
+    std::vector<DfgVertex*> srcps;
+
+    // Only consider input variables from a reasonable range:
+    // - not too big to avoid huge tables, you are doomed anyway at that point..
+    // - not too small, as it's probably not worth it
+    constexpr uint32_t WIDTH_MIN = 7;
+    constexpr uint32_t WIDTH_MAX = 20;
+    const auto widthOk = [](const DfgVertex* vtxp) {
+        const uint32_t width = vtxp->width();
+        return WIDTH_MIN <= width && width <= WIDTH_MAX;
+    };
+
+    // Do not convert terms that look like they are in a Cond tree
+    // the C++ compiler can generate jump tables for these
+    const std::function<bool(const DfgVertex*, bool)> useOk
+        = [&](const DfgVertex* vtxp, bool inv) -> bool {
+        // Go past a single 'Not' sink, which is common
+        if (DfgVertex* const sinkp = vtxp->singleSink()) {
+            if (sinkp->is<DfgNot>()) return useOk(sinkp, !inv);
+        }
+        return !vtxp->findSink<DfgCond>([vtxp, inv](const DfgCond& sink) {
+            if (sink.condp() != vtxp) return false;
+            return inv ? sink.thenp()->is<DfgCond>() : sink.elsep()->is<DfgCond>();
+        });
+    };
+
+    // Look at all comparison nodes and build the 'Val2Terms' map for each source vertex
+    uint32_t nTerms = 0;
+    for (DfgVertex& vtx : dfg.opVertices()) {
+        DfgVertex* srcp = nullptr;
+        uint32_t val = 0;
+        bool inv = false;
+        if (DfgEq* const eqp = vtx.cast<DfgEq>()) {
+            DfgConst* const constp = eqp->lhsp()->cast<DfgConst>();
+            if (!constp || !widthOk(constp) || !useOk(eqp, false)) continue;
+            srcp = eqp->rhsp();
+            val = constp->toU32();
+            inv = false;
+        } else if (DfgNeq* const neqp = vtx.cast<DfgNeq>()) {
+            DfgConst* const constp = neqp->lhsp()->cast<DfgConst>();
+            if (!constp || !widthOk(constp) || !useOk(neqp, true)) continue;
+            srcp = neqp->rhsp();
+            val = constp->toU32();
+            inv = true;
+        } else if (DfgRedAnd* const redAndp = vtx.cast<DfgRedAnd>()) {
+            srcp = redAndp->srcp();
+            if (!widthOk(srcp) || !useOk(redAndp, false)) continue;
+            val = (1U << srcp->width()) - 1;
+            inv = false;
+        } else if (DfgRedOr* const redOrp = vtx.cast<DfgRedOr>()) {
+            srcp = redOrp->srcp();
+            if (!widthOk(srcp) || !useOk(redOrp, true)) continue;
+            val = 0;
+            inv = true;
+        } else {
+            // Not a comparison-like vertex
+            continue;
+        }
+        // Grab the Val2Terms entry
+        Val2Terms*& val2Termspr = srcp->user<Val2Terms*>();
+        if (!val2Termspr) {
+            // Remeber and allocate on first encounter
+            srcps.emplace_back(srcp);
+            val2TermsAllocator.emplace_back();
+            val2Termspr = &val2TermsAllocator.back();
+        }
+        // Record term
+        (*val2Termspr)[val].emplace_back(&vtx, inv);
+        ++nTerms;
+    }
+
+    // Somewhat arbitrarily, only apply if more than 64 unique comparisons are required
+    constexpr uint32_t TERM_LIMIT = 65;
+    // This should hold, otherwise we do redundant work gathering terms that will never be used
+    static_assert((1U << WIDTH_MIN) >= TERM_LIMIT, "TERM_LIMIT too big relative to 2**WIDTH_MIN");
+
+    // Fast path exit if we surely don't need to convet anything
+    if (nTerms < TERM_LIMIT) return;
+
+    // Sequence numbers for name generation
+    size_t nTables = 0;
+
+    // Create decoders for each srcp
+    for (DfgVertex* const srcp : srcps) {
+        const Val2Terms& val2Terms = *srcp->getUser<Val2Terms*>();
+
+        // If not enough terms in this vertex, ignore
+        if (val2Terms.size() < TERM_LIMIT) continue;
+
+        // Width of the decoded binary value
+        const uint32_t width = srcp->width();
+        // Number of bits in the input operand
+        const uint32_t nBits = 1U << width;
+
+        // Construct the decoder by converting many "const == vtx" by:
+        // - Adding a single decoder block, where 'tab' is zero initialized:
+        //     always_comb begin
+        //        tab[pre] = 0;
+        //        tab[vtx] = 1;
+        //        pre = vtx;
+        //     end
+        //   We mark 'pre' so the write is ignored during scheduling, so this
+        //   won't cause a combinational cycle.
+        //   Note that albeit this looks like partial udpates to 'tab', the
+        //   actual result is that only one value in 'tab' is ever one, while
+        //   all the others are always zero.
+        // - and replace the comparisons with 'tab[const]'
+
+        FileLine* const flp = srcp->fileline();
+
+        // Required data types
+        AstNodeDType* const idxDTypep = srcp->dtypep();
+        AstNodeDType* const bitDTypep = DfgVertex::dtypeForWidth(1);
+        AstUnpackArrayDType* const tabDTypep = new AstUnpackArrayDType{
+            flp, bitDTypep, new AstRange{flp, static_cast<int>(nBits - 1), 0}};
+        v3Global.rootp()->typeTablep()->addTypesp(tabDTypep);
+
+        // The index variable
+        DfgVarPacked* const idxVtxp = [&]() {
+            // If there is an existing result variable, use that, otherwise create a new variable
+            DfgVarPacked* varp = srcp->getResultVar();
+            if (!varp) {
+                const std::string name = dfg.makeUniqueName("BinToOneHot_Idx", nTables);
+                varp = dfg.makeNewVar(flp, name, idxDTypep)->as<DfgVarPacked>();
+                varp->varp()->isInternal(true);
+            }
+            varp->setHasModRefs();
+            return varp;
+        }();
+        // The previous index variable - we don't need a vertex for this
+        AstVar* const preVarp = [&]() {
+            const std::string name = dfg.makeUniqueName("BinToOneHot_Pre", nTables);
+            AstVar* const varp = new AstVar{flp, VVarType::MODULETEMP, name, idxDTypep};
+            dfg.modulep()->addStmtsp(varp);
+            varp->isInternal(true);
+            varp->noReset(true);
+            varp->setIgnoreSchedWrite();
+            return varp;
+        }();
+        // The table variable
+        DfgVarArray* const tabVtxp = [&]() {
+            const std::string name = dfg.makeUniqueName("BinToOneHot_Tab", nTables);
+            DfgVarArray* const varp = dfg.makeNewVar(flp, name, tabDTypep)->as<DfgVarArray>();
+            varp->varp()->isInternal(true);
+            varp->varp()->noReset(true);
+            varp->setHasModRefs();
+            return varp;
+        }();
+
+        ++nTables;
+        ++ctx.m_decodersCreated;
+
+        // Initialize 'tab' and 'pre' variables statically
+        AstInitialStatic* const initp = new AstInitialStatic{flp, nullptr};
+        dfg.modulep()->addStmtsp(initp);
+        {  // pre = 0
+            initp->addStmtsp(new AstAssign{
+                flp,  //
+                new AstVarRef{flp, preVarp, VAccess::WRITE},  //
+                new AstConst{flp, AstConst::WidthedValue{}, static_cast<int>(width), 0}});
+        }
+        {  // tab.fill(0)
+            AstCMethodHard* const callp = new AstCMethodHard{
+                flp, new AstVarRef{flp, tabVtxp->varp(), VAccess::WRITE}, "fill"};
+            callp->addPinsp(new AstConst{flp, AstConst::BitFalse{}});
+            callp->dtypeSetVoid();
+            initp->addStmtsp(callp->makeStmt());
+        }
+
+        // Build the decoder logic
+        AstAlways* const logicp = new AstAlways{flp, VAlwaysKwd::ALWAYS_COMB, nullptr, nullptr};
+        dfg.modulep()->addStmtsp(logicp);
+        {  // tab[pre] = 0;
+            logicp->addStmtsp(new AstAssign{
+                flp,  //
+                new AstArraySel{flp, new AstVarRef{flp, tabVtxp->varp(), VAccess::WRITE},
+                                new AstVarRef{flp, preVarp, VAccess::READ}},  //
+                new AstConst{flp, AstConst::BitFalse{}}});
+        }
+        {  // tab[idx] = 1
+            logicp->addStmtsp(new AstAssign{
+                flp,  //
+                new AstArraySel{flp, new AstVarRef{flp, tabVtxp->varp(), VAccess::WRITE},
+                                new AstVarRef{flp, idxVtxp->varp(), VAccess::READ}},  //
+                new AstConst{flp, AstConst::BitTrue{}}});
+        }
+        {  // pre = idx
+            logicp->addStmtsp(new AstAssign{flp,  //
+                                            new AstVarRef{flp, preVarp, VAccess::WRITE},  //
+                                            new AstVarRef{flp, idxVtxp->varp(), VAccess::READ}});
+        }
+
+        // Replace terms with ArraySels
+        for (const auto& pair : val2Terms) {
+            const uint32_t val = pair.first;
+            const std::vector<Term>& terms = pair.second;
+            // Create the ArraySel
+            FileLine* const flp = terms.front().m_vtxp->fileline();
+            DfgArraySel* const aselp = new DfgArraySel{dfg, flp, bitDTypep};
+            aselp->fromp(tabVtxp);
+            aselp->bitp(new DfgConst{dfg, flp, width, val});
+            // The inverted value, if needed
+            DfgNot* notp = nullptr;
+            // Repalce the terms
+            for (const Term& term : terms) {
+                if (term.m_inv) {
+                    if (!notp) {
+                        notp = new DfgNot{dfg, flp, bitDTypep};
+                        notp->srcp(aselp);
+                    }
+                    term.m_vtxp->replaceWith(notp);
+                } else {
+                    term.m_vtxp->replaceWith(aselp);
+                }
+                VL_DO_DANGLING(term.m_vtxp->unlinkDelete(dfg), term.m_vtxp);
+            }
+        }
+    }
+}
+
 void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
     const auto userDataInUse = dfg.userDataInUse();
 
@@ -355,6 +598,7 @@ void V3DfgPasses::optimize(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
     apply(3, "input           ", [&]() {});
     apply(4, "inlineVars      ", [&]() { inlineVars(dfg); });
     apply(4, "cse0            ", [&]() { cse(dfg, ctx.m_cseContext0); });
+    apply(4, "binToOneHot     ", [&]() { binToOneHot(dfg, ctx.m_binToOneHotContext); });
     if (v3Global.opt.fDfgPeephole()) {
         apply(4, "peephole        ", [&]() { peephole(dfg, ctx.m_peepholeContext); });
         // We just did CSE above, so without peephole there is no need to run it again these
diff --git a/src/V3DfgPasses.h b/src/V3DfgPasses.h
index ef8984786..efb33a505 100644
--- a/src/V3DfgPasses.h
+++ b/src/V3DfgPasses.h
@@ -30,6 +30,16 @@ class DfgGraph;
 // Various context objects hold data that need to persist across invocations
 // of a DFG pass.
 
+class V3DfgBinToOneHotContext final {
+    const std::string m_label;  // Label to apply to stats
+
+public:
+    VDouble0 m_decodersCreated;  // Number of bianry to one-hot decoders created
+    explicit V3DfgBinToOneHotContext(const std::string& label)
+        : m_label{label} {}
+    ~V3DfgBinToOneHotContext() VL_MT_DISABLED;
+};
+
 class V3DfgCseContext final {
     const std::string m_label;  // Label to apply to stats
 
@@ -82,6 +92,7 @@ public:
     VDouble0 m_nonRepWidth;  // Equations non-representable due to width mismatch
     VDouble0 m_resultEquations;  // Number of result combinational equations
 
+    V3DfgBinToOneHotContext m_binToOneHotContext{m_label};
     V3DfgCseContext m_cseContext0{m_label + " 1st"};
     V3DfgCseContext m_cseContext1{m_label + " 2nd"};
     V3DfgPeepholeContext m_peepholeContext{m_label};
@@ -117,6 +128,8 @@ AstModule* dfgToAst(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 // Intermediate/internal operations
 //===========================================================================
 
+// Construct binary to oneHot decoders
+void binToOneHot(DfgGraph&, V3DfgBinToOneHotContext&) VL_MT_DISABLED;
 // Common subexpression elimination
 void cse(DfgGraph&, V3DfgCseContext&) VL_MT_DISABLED;
 // Inline fully driven variables
diff --git a/src/V3DfgVertices.h b/src/V3DfgVertices.h
index 206342384..d4375d6e7 100644
--- a/src/V3DfgVertices.h
+++ b/src/V3DfgVertices.h
@@ -110,6 +110,8 @@ public:
         return static_cast<size_t>(num().toUInt());
     }
 
+    uint32_t toU32() const { return static_cast<size_t>(num().toUInt()); }
+
     bool isZero() const { return num().isEqZero(); }
     bool isOnes() const { return num().isEqAllOnes(width()); }
 
diff --git a/test_regress/t/t_dfg_bin_to_one_hot.py b/test_regress/t/t_dfg_bin_to_one_hot.py
new file mode 100755
index 000000000..1612ac838
--- /dev/null
+++ b/test_regress/t/t_dfg_bin_to_one_hot.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.compile(verilator_flags2=["--stats"])
+
+test.execute()
+
+test.file_grep(test.stats, r'Optimizations, DFG pre inline BinToOneHot, decoders created\s+(\d+)',
+               2)
+
+test.passes()
diff --git a/test_regress/t/t_dfg_bin_to_one_hot.v b/test_regress/t/t_dfg_bin_to_one_hot.v
new file mode 100644
index 000000000..165a23f3c
--- /dev/null
+++ b/test_regress/t/t_dfg_bin_to_one_hot.v
@@ -0,0 +1,421 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define check(got ,exp) do if ((got) !== (exp)) begin $write("%%Error: %s:%0d: cyc=%0d got='h%x exp='h%x\n", `__FILE__,`__LINE__, cyc, (got), (exp)); `stop; end while(0)
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   reg [31:0] cyc = 0;
+   reg [6:0] cntA = 0;
+   reg [6:0] cntB = 0;
+   reg [6:0] cntC = 0;
+
+   always @ (posedge clk) begin
+      cyc <= cyc + 1;
+      if (cyc[0])  cntA <= cntA + 7'd1;
+      if (cntA[0]) cntB <= cntB + 7'd1;
+      if (cntB[0]) cntC <= cntC + 7'd1;
+
+      if (cyc == 99) begin
+         $write("*-* All Finished *-*\n");
+         $finish;
+      end
+   end
+
+   // Should create decoder
+   wire [127:0] cntAOneHot = {
+     cntA == 7'd127,
+     cntA == 7'd126,
+     cntA == 7'd125,
+     cntA == 7'd124,
+     cntA == 7'd123,
+     cntA == 7'd122,
+     cntA == 7'd121,
+     cntA == 7'd120,
+     cntA == 7'd119,
+     cntA == 7'd118,
+     cntA == 7'd117,
+     cntA == 7'd116,
+     cntA == 7'd115,
+     cntA == 7'd114,
+     cntA == 7'd113,
+     cntA == 7'd112,
+     cntA == 7'd111,
+     cntA == 7'd110,
+     cntA == 7'd109,
+     cntA == 7'd108,
+     cntA == 7'd107,
+     cntA == 7'd106,
+     cntA == 7'd105,
+     cntA == 7'd104,
+     cntA == 7'd103,
+     cntA == 7'd102,
+     cntA == 7'd101,
+     cntA == 7'd100,
+     cntA == 7'd99,
+     cntA == 7'd98,
+     cntA == 7'd97,
+     cntA == 7'd96,
+     cntA == 7'd95,
+     cntA == 7'd94,
+     cntA == 7'd93,
+     cntA == 7'd92,
+     cntA == 7'd91,
+     cntA == 7'd90,
+     cntA == 7'd89,
+     cntA == 7'd88,
+     cntA == 7'd87,
+     cntA == 7'd86,
+     cntA == 7'd85,
+     cntA == 7'd84,
+     cntA == 7'd83,
+     cntA == 7'd82,
+     cntA == 7'd81,
+     cntA == 7'd80,
+     cntA == 7'd79,
+     cntA == 7'd78,
+     cntA == 7'd77,
+     cntA == 7'd76,
+     cntA == 7'd75,
+     cntA == 7'd74,
+     cntA == 7'd73,
+     cntA == 7'd72,
+     cntA == 7'd71,
+     cntA == 7'd70,
+     cntA == 7'd69,
+     cntA == 7'd68,
+     cntA == 7'd67,
+     cntA == 7'd66,
+     cntA == 7'd65,
+     cntA == 7'd64,
+     cntA == 7'd63,
+     cntA == 7'd62,
+     cntA == 7'd61,
+     cntA == 7'd60,
+     cntA == 7'd59,
+     cntA == 7'd58,
+     cntA == 7'd57,
+     cntA == 7'd56,
+     cntA == 7'd55,
+     cntA == 7'd54,
+     cntA == 7'd53,
+     cntA == 7'd52,
+     cntA == 7'd51,
+     cntA == 7'd50,
+     cntA == 7'd49,
+     cntA == 7'd48,
+     cntA == 7'd47,
+     cntA == 7'd46,
+     cntA == 7'd45,
+     cntA == 7'd44,
+     cntA == 7'd43,
+     cntA == 7'd42,
+     cntA == 7'd41,
+     cntA == 7'd40,
+     cntA == 7'd39,
+     cntA == 7'd38,
+     cntA == 7'd37,
+     cntA == 7'd36,
+     cntA == 7'd35,
+     cntA == 7'd34,
+     cntA == 7'd33,
+     cntA == 7'd32,
+     cntA == 7'd31,
+     cntA == 7'd30,
+     cntA == 7'd29,
+     cntA == 7'd28,
+     cntA == 7'd27,
+     cntA == 7'd26,
+     cntA == 7'd25,
+     cntA == 7'd24,
+     cntA == 7'd23,
+     cntA == 7'd22,
+     cntA == 7'd21,
+     cntA == 7'd20,
+     cntA == 7'd19,
+     cntA == 7'd18,
+     cntA == 7'd17,
+     cntA == 7'd16,
+     cntA == 7'd15,
+     cntA == 7'd14,
+     cntA == 7'd13,
+     cntA == 7'd12,
+     cntA == 7'd11,
+     cntA == 7'd10,
+     cntA == 7'd9,
+     cntA == 7'd8,
+     cntA == 7'd7,
+     cntA == 7'd6,
+     cntA == 7'd5,
+     cntA == 7'd4,
+     cntA == 7'd3,
+     cntA == 7'd2,
+     cntA == 7'd1,
+     cntA == 7'd0
+   };
+
+   // Should create decoder
+   wire stupidWayToWriteConstOne = 1'b0
+     + (cntB == 7'd127)
+     + (cntB == 7'd126)
+     + (cntB == 7'd125)
+     + (cntB == 7'd124)
+     + (cntB == 7'd123)
+     + (cntB == 7'd122)
+     + (cntB == 7'd121)
+     + (cntB == 7'd120)
+     + (cntB == 7'd119)
+     + (cntB == 7'd118)
+     + (cntB == 7'd117)
+     + (cntB == 7'd116)
+     + (cntB == 7'd115)
+     + (cntB == 7'd114)
+     + (cntB == 7'd113)
+     + (cntB == 7'd112)
+     + (cntB == 7'd111)
+     + (cntB == 7'd110)
+     + (cntB == 7'd109)
+     + (cntB == 7'd108)
+     + (cntB == 7'd107)
+     + (cntB == 7'd106)
+     + (cntB == 7'd105)
+     + (cntB == 7'd104)
+     + (cntB == 7'd103)
+     + (cntB == 7'd102)
+     + (cntB == 7'd101)
+     + (cntB == 7'd100)
+     + (cntB == 7'd99)
+     + (cntB == 7'd98)
+     + (cntB == 7'd97)
+     + (cntB == 7'd96)
+     + (cntB == 7'd95)
+     + (cntB == 7'd94)
+     + (cntB == 7'd93)
+     + (cntB == 7'd92)
+     + (cntB == 7'd91)
+     + (cntB == 7'd90)
+     + (cntB == 7'd89)
+     + (cntB == 7'd88)
+     + (cntB == 7'd87)
+     + (cntB == 7'd86)
+     + (cntB == 7'd85)
+     + (cntB == 7'd84)
+     + (cntB == 7'd83)
+     + (cntB == 7'd82)
+     + (cntB == 7'd81)
+     + (cntB == 7'd80)
+     + (cntB == 7'd79)
+     + (cntB == 7'd78)
+     + (cntB == 7'd77)
+     + (cntB == 7'd76)
+     + (cntB == 7'd75)
+     + (cntB == 7'd74)
+     + (cntB == 7'd73)
+     + (cntB == 7'd72)
+     + (cntB == 7'd71)
+     + (cntB == 7'd70)
+     + (cntB == 7'd69)
+     + (cntB == 7'd68)
+     + (cntB == 7'd67)
+     + (cntB == 7'd66)
+     + (cntB == 7'd65)
+     + (cntB == 7'd64)
+     + (cntB == 7'd63)
+     + (cntB == 7'd62)
+     + (cntB == 7'd61)
+     + (cntB == 7'd60)
+     + (cntB == 7'd59)
+     + (cntB == 7'd58)
+     + (cntB == 7'd57)
+     + (cntB == 7'd56)
+     + (cntB == 7'd55)
+     + (cntB == 7'd54)
+     + (cntB == 7'd53)
+     + (cntB == 7'd52)
+     + (cntB == 7'd51)
+     + (cntB == 7'd50)
+     + (cntB == 7'd49)
+     + (cntB == 7'd48)
+     + (cntB == 7'd47)
+     + (cntB == 7'd46)
+     + (cntB == 7'd45)
+     + (cntB == 7'd44)
+     + (cntB == 7'd43)
+     + (cntB == 7'd42)
+     + (cntB == 7'd41)
+     + (cntB == 7'd40)
+     + (cntB == 7'd39)
+     + (cntB == 7'd38)
+     + (cntB == 7'd37)
+     + (cntB == 7'd36)
+     + (cntB == 7'd35)
+     + (cntB == 7'd34)
+     + (cntB == 7'd33)
+     + (cntB == 7'd32)
+     + (cntB == 7'd31)
+     + (cntB == 7'd30)
+     + (cntB == 7'd29)
+     + (cntB == 7'd28)
+     + (cntB == 7'd27)
+     + (cntB == 7'd26)
+     + (cntB == 7'd25)
+     + (cntB == 7'd24)
+     + (cntB == 7'd23)
+     + (cntB == 7'd22)
+     + (cntB == 7'd21)
+     + (cntB == 7'd20)
+     + (cntB == 7'd19)
+     + (cntB == 7'd18)
+     + (cntB <= 7'd17);
+
+   // Should not create decoder
+   wire [6:0] twiceCntC =
+     cntC == 7'd127 ? (7'd127 * 7'd2) :
+     cntC == 7'd126 ? (7'd126 * 7'd2) :
+     cntC == 7'd125 ? (7'd125 * 7'd2) :
+     cntC == 7'd124 ? (7'd124 * 7'd2) :
+     cntC == 7'd123 ? (7'd123 * 7'd2) :
+     cntC == 7'd122 ? (7'd122 * 7'd2) :
+     cntC == 7'd121 ? (7'd121 * 7'd2) :
+     cntC == 7'd120 ? (7'd120 * 7'd2) :
+     cntC == 7'd119 ? (7'd119 * 7'd2) :
+     cntC == 7'd118 ? (7'd118 * 7'd2) :
+     cntC == 7'd117 ? (7'd117 * 7'd2) :
+     cntC == 7'd116 ? (7'd116 * 7'd2) :
+     cntC == 7'd115 ? (7'd115 * 7'd2) :
+     cntC == 7'd114 ? (7'd114 * 7'd2) :
+     cntC == 7'd113 ? (7'd113 * 7'd2) :
+     cntC == 7'd112 ? (7'd112 * 7'd2) :
+     cntC == 7'd111 ? (7'd111 * 7'd2) :
+     cntC == 7'd110 ? (7'd110 * 7'd2) :
+     cntC == 7'd109 ? (7'd109 * 7'd2) :
+     cntC == 7'd108 ? (7'd108 * 7'd2) :
+     cntC == 7'd107 ? (7'd107 * 7'd2) :
+     cntC == 7'd106 ? (7'd106 * 7'd2) :
+     cntC == 7'd105 ? (7'd105 * 7'd2) :
+     cntC == 7'd104 ? (7'd104 * 7'd2) :
+     cntC == 7'd103 ? (7'd103 * 7'd2) :
+     cntC == 7'd102 ? (7'd102 * 7'd2) :
+     cntC == 7'd101 ? (7'd101 * 7'd2) :
+     cntC == 7'd100 ? (7'd100 * 7'd2) :
+     cntC == 7'd99 ? (7'd99 * 7'd2) :
+     cntC == 7'd98 ? (7'd98 * 7'd2) :
+     cntC == 7'd97 ? (7'd97 * 7'd2) :
+     cntC == 7'd96 ? (7'd96 * 7'd2) :
+     cntC == 7'd95 ? (7'd95 * 7'd2) :
+     cntC == 7'd94 ? (7'd94 * 7'd2) :
+     cntC == 7'd93 ? (7'd93 * 7'd2) :
+     cntC == 7'd92 ? (7'd92 * 7'd2) :
+     cntC == 7'd91 ? (7'd91 * 7'd2) :
+     cntC == 7'd90 ? (7'd90 * 7'd2) :
+     cntC == 7'd89 ? (7'd89 * 7'd2) :
+     cntC == 7'd88 ? (7'd88 * 7'd2) :
+     cntC == 7'd87 ? (7'd87 * 7'd2) :
+     cntC == 7'd86 ? (7'd86 * 7'd2) :
+     cntC == 7'd85 ? (7'd85 * 7'd2) :
+     cntC == 7'd84 ? (7'd84 * 7'd2) :
+     cntC == 7'd83 ? (7'd83 * 7'd2) :
+     cntC == 7'd82 ? (7'd82 * 7'd2) :
+     cntC == 7'd81 ? (7'd81 * 7'd2) :
+     cntC == 7'd80 ? (7'd80 * 7'd2) :
+     cntC == 7'd79 ? (7'd79 * 7'd2) :
+     cntC == 7'd78 ? (7'd78 * 7'd2) :
+     cntC == 7'd77 ? (7'd77 * 7'd2) :
+     cntC == 7'd76 ? (7'd76 * 7'd2) :
+     cntC == 7'd75 ? (7'd75 * 7'd2) :
+     cntC == 7'd74 ? (7'd74 * 7'd2) :
+     cntC == 7'd73 ? (7'd73 * 7'd2) :
+     cntC == 7'd72 ? (7'd72 * 7'd2) :
+     cntC == 7'd71 ? (7'd71 * 7'd2) :
+     cntC == 7'd70 ? (7'd70 * 7'd2) :
+     cntC == 7'd69 ? (7'd69 * 7'd2) :
+     cntC == 7'd68 ? (7'd68 * 7'd2) :
+     cntC == 7'd67 ? (7'd67 * 7'd2) :
+     cntC == 7'd66 ? (7'd66 * 7'd2) :
+     cntC == 7'd65 ? (7'd65 * 7'd2) :
+     cntC == 7'd64 ? (7'd64 * 7'd2) :
+     cntC == 7'd63 ? (7'd63 * 7'd2) :
+     cntC == 7'd62 ? (7'd62 * 7'd2) :
+     cntC == 7'd61 ? (7'd61 * 7'd2) :
+     cntC == 7'd60 ? (7'd60 * 7'd2) :
+     cntC == 7'd59 ? (7'd59 * 7'd2) :
+     cntC == 7'd58 ? (7'd58 * 7'd2) :
+     cntC == 7'd57 ? (7'd57 * 7'd2) :
+     cntC == 7'd56 ? (7'd56 * 7'd2) :
+     cntC == 7'd55 ? (7'd55 * 7'd2) :
+     cntC == 7'd54 ? (7'd54 * 7'd2) :
+     cntC == 7'd53 ? (7'd53 * 7'd2) :
+     cntC == 7'd52 ? (7'd52 * 7'd2) :
+     cntC == 7'd51 ? (7'd51 * 7'd2) :
+     cntC == 7'd50 ? (7'd50 * 7'd2) :
+     cntC == 7'd49 ? (7'd49 * 7'd2) :
+     cntC == 7'd48 ? (7'd48 * 7'd2) :
+     cntC == 7'd47 ? (7'd47 * 7'd2) :
+     cntC == 7'd46 ? (7'd46 * 7'd2) :
+     cntC == 7'd45 ? (7'd45 * 7'd2) :
+     cntC == 7'd44 ? (7'd44 * 7'd2) :
+     cntC == 7'd43 ? (7'd43 * 7'd2) :
+     cntC == 7'd42 ? (7'd42 * 7'd2) :
+     cntC == 7'd41 ? (7'd41 * 7'd2) :
+     cntC == 7'd40 ? (7'd40 * 7'd2) :
+     cntC == 7'd39 ? (7'd39 * 7'd2) :
+     cntC == 7'd38 ? (7'd38 * 7'd2) :
+     cntC == 7'd37 ? (7'd37 * 7'd2) :
+     cntC == 7'd36 ? (7'd36 * 7'd2) :
+     cntC == 7'd35 ? (7'd35 * 7'd2) :
+     cntC == 7'd34 ? (7'd34 * 7'd2) :
+     cntC == 7'd33 ? (7'd33 * 7'd2) :
+     cntC == 7'd32 ? (7'd32 * 7'd2) :
+     cntC == 7'd31 ? (7'd31 * 7'd2) :
+     cntC == 7'd30 ? (7'd30 * 7'd2) :
+     cntC == 7'd29 ? (7'd29 * 7'd2) :
+     cntC == 7'd28 ? (7'd28 * 7'd2) :
+     cntC == 7'd27 ? (7'd27 * 7'd2) :
+     cntC == 7'd26 ? (7'd26 * 7'd2) :
+     cntC == 7'd25 ? (7'd25 * 7'd2) :
+     cntC == 7'd24 ? (7'd24 * 7'd2) :
+     cntC == 7'd23 ? (7'd23 * 7'd2) :
+     cntC == 7'd22 ? (7'd22 * 7'd2) :
+     cntC == 7'd21 ? (7'd21 * 7'd2) :
+     cntC == 7'd20 ? (7'd20 * 7'd2) :
+     cntC == 7'd19 ? (7'd19 * 7'd2) :
+     cntC == 7'd18 ? (7'd18 * 7'd2) :
+     cntC == 7'd17 ? (7'd17 * 7'd2) :
+     cntC == 7'd16 ? (7'd16 * 7'd2) :
+     cntC == 7'd15 ? (7'd15 * 7'd2) :
+     cntC == 7'd14 ? (7'd14 * 7'd2) :
+     cntC == 7'd13 ? (7'd13 * 7'd2) :
+     cntC == 7'd12 ? (7'd12 * 7'd2) :
+     cntC == 7'd11 ? (7'd11 * 7'd2) :
+     cntC == 7'd10 ? (7'd10 * 7'd2) :
+     cntC == 7'd9 ? (7'd9 * 7'd2) :
+     cntC == 7'd8 ? (7'd8 * 7'd2) :
+     cntC == 7'd7 ? (7'd7 * 7'd2) :
+     cntC == 7'd6 ? (7'd6 * 7'd2) :
+     cntC == 7'd5 ? (7'd5 * 7'd2) :
+     cntC == 7'd4 ? (7'd4 * 7'd2) :
+     cntC == 7'd3 ? (7'd3 * 7'd2) :
+     cntC == 7'd2 ? (7'd2 * 7'd2) :
+     cntC == 7'd1 ? (7'd1 * 7'd2) : 7'd0;
+
+   always @(posedge clk) begin
+      `check(cntAOneHot[cntA], 1'b1);
+      for (int i = 0; i < $bits(cntAOneHot); i = i + 1) begin
+          if (i == int'(cntA)) continue;
+         `check(cntAOneHot[i], 1'b0);
+      end
+
+      `check(stupidWayToWriteConstOne, 1'b1);
+
+      `check(twiceCntC, cntC * 7'd2);
+   end
+
+endmodule

From 5b410e9331b1543889287a965d0ea016d9a6b6d7 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 16 Jun 2025 17:44:06 -0700
Subject: [PATCH 149/211] CI: Add actor to help cancel-in-progress group
 (#6097)

---
 .github/workflows/build.yml   | 2 +-
 .github/workflows/msbuild.yml | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index f5d4e7978..73221e8c0 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -21,7 +21,7 @@ defaults:
     working-directory: repo
 
 concurrency:
-  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  group: ${{ github.workflow }}-${{ github.actor }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
   cancel-in-progress: true
 
 jobs:
diff --git a/.github/workflows/msbuild.yml b/.github/workflows/msbuild.yml
index 4555e497d..d4c801767 100644
--- a/.github/workflows/msbuild.yml
+++ b/.github/workflows/msbuild.yml
@@ -22,7 +22,7 @@ defaults:
   run:
     working-directory: repo
 concurrency:
-  group: ${{ github.workflow }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
+  group: ${{ github.workflow }}-${{ github.actor }}-${{ github.event_name == 'pull_request' && github.ref || github.run_id }}
   cancel-in-progress: true
 jobs:
   windows:

From 48600c77b5c989d7f305e7eadefedddd323cf566 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 17 Jun 2025 15:53:47 +0100
Subject: [PATCH 150/211] Fix DFG binToOneHot table index missing driver
 (#6100)

---
 src/V3DfgPasses.cpp                    |   1 +
 test_regress/t/t_dfg_bin_to_one_hot.py |   2 +-
 test_regress/t/t_dfg_bin_to_one_hot.v  | 138 +++++++++++++++++++++++++
 3 files changed, 140 insertions(+), 1 deletion(-)

diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 6fd90bb86..1408fe40d 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -374,6 +374,7 @@ void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
                 const std::string name = dfg.makeUniqueName("BinToOneHot_Idx", nTables);
                 varp = dfg.makeNewVar(flp, name, idxDTypep)->as<DfgVarPacked>();
                 varp->varp()->isInternal(true);
+                varp->addDriver(flp, 0, srcp);
             }
             varp->setHasModRefs();
             return varp;
diff --git a/test_regress/t/t_dfg_bin_to_one_hot.py b/test_regress/t/t_dfg_bin_to_one_hot.py
index 1612ac838..ae6ade37b 100755
--- a/test_regress/t/t_dfg_bin_to_one_hot.py
+++ b/test_regress/t/t_dfg_bin_to_one_hot.py
@@ -16,6 +16,6 @@ test.compile(verilator_flags2=["--stats"])
 test.execute()
 
 test.file_grep(test.stats, r'Optimizations, DFG pre inline BinToOneHot, decoders created\s+(\d+)',
-               2)
+               3)
 
 test.passes()
diff --git a/test_regress/t/t_dfg_bin_to_one_hot.v b/test_regress/t/t_dfg_bin_to_one_hot.v
index 165a23f3c..2f1e3ee2b 100644
--- a/test_regress/t/t_dfg_bin_to_one_hot.v
+++ b/test_regress/t/t_dfg_bin_to_one_hot.v
@@ -162,6 +162,138 @@ module t (/*AUTOARG*/
      cntA == 7'd0
    };
 
+   // Should create decoder - with temporary needed for index variabls
+   wire [127:0] notCntAOneHot = {
+     ~cntA == 7'd127,
+     ~cntA == 7'd126,
+     ~cntA == 7'd125,
+     ~cntA == 7'd124,
+     ~cntA == 7'd123,
+     ~cntA == 7'd122,
+     ~cntA == 7'd121,
+     ~cntA == 7'd120,
+     ~cntA == 7'd119,
+     ~cntA == 7'd118,
+     ~cntA == 7'd117,
+     ~cntA == 7'd116,
+     ~cntA == 7'd115,
+     ~cntA == 7'd114,
+     ~cntA == 7'd113,
+     ~cntA == 7'd112,
+     ~cntA == 7'd111,
+     ~cntA == 7'd110,
+     ~cntA == 7'd109,
+     ~cntA == 7'd108,
+     ~cntA == 7'd107,
+     ~cntA == 7'd106,
+     ~cntA == 7'd105,
+     ~cntA == 7'd104,
+     ~cntA == 7'd103,
+     ~cntA == 7'd102,
+     ~cntA == 7'd101,
+     ~cntA == 7'd100,
+     ~cntA == 7'd99,
+     ~cntA == 7'd98,
+     ~cntA == 7'd97,
+     ~cntA == 7'd96,
+     ~cntA == 7'd95,
+     ~cntA == 7'd94,
+     ~cntA == 7'd93,
+     ~cntA == 7'd92,
+     ~cntA == 7'd91,
+     ~cntA == 7'd90,
+     ~cntA == 7'd89,
+     ~cntA == 7'd88,
+     ~cntA == 7'd87,
+     ~cntA == 7'd86,
+     ~cntA == 7'd85,
+     ~cntA == 7'd84,
+     ~cntA == 7'd83,
+     ~cntA == 7'd82,
+     ~cntA == 7'd81,
+     ~cntA == 7'd80,
+     ~cntA == 7'd79,
+     ~cntA == 7'd78,
+     ~cntA == 7'd77,
+     ~cntA == 7'd76,
+     ~cntA == 7'd75,
+     ~cntA == 7'd74,
+     ~cntA == 7'd73,
+     ~cntA == 7'd72,
+     ~cntA == 7'd71,
+     ~cntA == 7'd70,
+     ~cntA == 7'd69,
+     ~cntA == 7'd68,
+     ~cntA == 7'd67,
+     ~cntA == 7'd66,
+     ~cntA == 7'd65,
+     ~cntA == 7'd64,
+     ~cntA == 7'd63,
+     ~cntA == 7'd62,
+     ~cntA == 7'd61,
+     ~cntA == 7'd60,
+     ~cntA == 7'd59,
+     ~cntA == 7'd58,
+     ~cntA == 7'd57,
+     ~cntA == 7'd56,
+     ~cntA == 7'd55,
+     ~cntA == 7'd54,
+     ~cntA == 7'd53,
+     ~cntA == 7'd52,
+     ~cntA == 7'd51,
+     ~cntA == 7'd50,
+     ~cntA == 7'd49,
+     ~cntA == 7'd48,
+     ~cntA == 7'd47,
+     ~cntA == 7'd46,
+     ~cntA == 7'd45,
+     ~cntA == 7'd44,
+     ~cntA == 7'd43,
+     ~cntA == 7'd42,
+     ~cntA == 7'd41,
+     ~cntA == 7'd40,
+     ~cntA == 7'd39,
+     ~cntA == 7'd38,
+     ~cntA == 7'd37,
+     ~cntA == 7'd36,
+     ~cntA == 7'd35,
+     ~cntA == 7'd34,
+     ~cntA == 7'd33,
+     ~cntA == 7'd32,
+     ~cntA == 7'd31,
+     ~cntA == 7'd30,
+     ~cntA == 7'd29,
+     ~cntA == 7'd28,
+     ~cntA == 7'd27,
+     ~cntA == 7'd26,
+     ~cntA == 7'd25,
+     ~cntA == 7'd24,
+     ~cntA == 7'd23,
+     ~cntA == 7'd22,
+     ~cntA == 7'd21,
+     ~cntA == 7'd20,
+     ~cntA == 7'd19,
+     ~cntA == 7'd18,
+     ~cntA == 7'd17,
+     ~cntA == 7'd16,
+     ~cntA == 7'd15,
+     ~cntA == 7'd14,
+     ~cntA == 7'd13,
+     ~cntA == 7'd12,
+     ~cntA == 7'd11,
+     ~cntA == 7'd10,
+     ~cntA == 7'd9,
+     ~cntA == 7'd8,
+     ~cntA == 7'd7,
+     ~cntA == 7'd6,
+     ~cntA == 7'd5,
+     ~cntA == 7'd4,
+     ~cntA == 7'd3,
+     ~cntA == 7'd2,
+     ~cntA == 7'd1,
+     ~cntA == 7'd0
+   };
+
    // Should create decoder
    wire stupidWayToWriteConstOne = 1'b0
      + (cntB == 7'd127)
@@ -413,6 +545,12 @@ module t (/*AUTOARG*/
          `check(cntAOneHot[i], 1'b0);
       end
 
+      `check(notCntAOneHot[~cntA], 1'b1);
+      for (int i = 0; i < $bits(notCntAOneHot); i = i + 1) begin
+          if (i == {25'd0, ~cntA}) continue;
+         `check(notCntAOneHot[i], 1'b0);
+      end
+
       `check(stupidWayToWriteConstOne, 1'b1);
 
       `check(twiceCntC, cntC * 7'd2);

From 75df36bc8f49a32d37a3ea60051c4b987991b02b Mon Sep 17 00:00:00 2001
From: Peter Birch <peter.birch@intuity-design.co.uk>
Date: Wed, 18 Jun 2025 00:59:18 +0100
Subject: [PATCH 151/211] Add hint of the signed rhsval in oversized
 replication error (#6098)

---
 docs/CONTRIBUTORS                   | 1 +
 src/V3Number.cpp                    | 2 +-
 test_regress/t/t_math_repl2_bad.out | 2 +-
 3 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 9a50ac9bb..459fe8b03 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -180,6 +180,7 @@ Paul Wright
 Pawel Jewstafjew
 Pawel Sagan
 Pengcheng Xu
+Peter Birch
 Peter Debacker
 Peter Horvath
 Peter Monsson
diff --git a/src/V3Number.cpp b/src/V3Number.cpp
index d8cbf465f..7856c04c4 100644
--- a/src/V3Number.cpp
+++ b/src/V3Number.cpp
@@ -1474,7 +1474,7 @@ V3Number& V3Number::opRepl(const V3Number& lhs,
     if (rhsval > (1UL << 24)) {
         v3error("More than a 16 Mbit replication, perhaps the replication factor"
                 " was two's-complement negative: "
-                << rhsval);
+                << rhsval << " (" << static_cast<int32_t>(rhsval) << ")");
     } else if (rhsval > 8192) {
         v3warn(WIDTHCONCAT, "More than a 8k bit replication is probably wrong: " << rhsval);
     }
diff --git a/test_regress/t/t_math_repl2_bad.out b/test_regress/t/t_math_repl2_bad.out
index 4b392e65d..3f21714bb 100644
--- a/test_regress/t/t_math_repl2_bad.out
+++ b/test_regress/t/t_math_repl2_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_math_repl2_bad.v:28:30: More than a 16 Mbit replication, perhaps the replication factor was two's-complement negative: 4294967291
+%Error: t/t_math_repl2_bad.v:28:30: More than a 16 Mbit replication, perhaps the replication factor was two's-complement negative: 4294967291 (-5)
                                   : ... note: In instance 't'
    28 |          out <= {{(P24 - P29){1'b0}}, in};
       |                              ^

From 49fe12963405453629e0f782203876fd73860b1b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 18 Jun 2025 08:56:32 -0400
Subject: [PATCH 152/211] Fix `--lib-create` with double-underscore (#6099).

---
 Changes                          |  1 +
 src/V3ProtectLib.cpp             | 22 +++++++++++++---------
 test_regress/t/t_lib_prot_comb.v | 12 ++++++------
 3 files changed, 20 insertions(+), 15 deletions(-)

diff --git a/Changes b/Changes
index 8f7eb7d17..b377e110b 100644
--- a/Changes
+++ b/Changes
@@ -67,6 +67,7 @@ Verilator 5.037 devel
 * Fix unpacked to packed parameter assignment (#6081) (#6088). [Todd Strader]
 * Fix casting reals to large integrals (#6085). [Todd Strader]
 * Fix nested hier blocks workers error (#6087). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Fix `--lib-create` with double-underscore (#6099).
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index aec3c1bd4..663c0faaa 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -459,8 +459,9 @@ class ProtectVisitor final : public VNVisitor {
         handleInput(varp);
         m_seqPortsp->addNodesp(varp->cloneTree(false));
         if (m_hasClk) {
-            m_seqParamsp->addText(fl, varp->name() + "\n");
-            m_clkSensp->addText(fl, "posedge " + varp->name() + " or negedge " + varp->name());
+            m_seqParamsp->addText(fl, varp->prettyName() + "\n");
+            m_clkSensp->addText(fl, "posedge " + varp->prettyName() + " or negedge "
+                                        + varp->prettyName());
         }
         m_cSeqParamsp->addText(fl, varp->dpiArgType(true, false) + "\n");
         m_cSeqClksp->addText(fl, cInputConnection(varp));
@@ -470,9 +471,9 @@ class ProtectVisitor final : public VNVisitor {
         FileLine* const fl = varp->fileline();
         handleInput(varp);
         m_comboPortsp->addNodesp(varp->cloneTree(false));
-        m_comboParamsp->addText(fl, varp->name() + "\n");
+        m_comboParamsp->addText(fl, varp->prettyName() + "\n");
         m_comboIgnorePortsp->addNodesp(varp->cloneTree(false));
-        if (m_hasClk) m_comboIgnoreParamsp->addText(fl, varp->name() + "\n");
+        if (m_hasClk) m_comboIgnoreParamsp->addText(fl, varp->prettyName() + "\n");
         m_cComboParamsp->addText(fl, varp->dpiArgType(true, false) + "\n");
         m_cComboInsp->addText(fl, cInputConnection(varp));
         m_cIgnoreParamsp->addText(fl, varp->dpiArgType(true, false) + "\n");
@@ -490,10 +491,10 @@ class ProtectVisitor final : public VNVisitor {
         FileLine* const fl = varp->fileline();
         m_modPortsp->addNodesp(varp->cloneTree(false));
         m_comboPortsp->addNodesp(varp->cloneTree(false));
-        m_comboParamsp->addText(fl, varp->name() + "_combo__V\n");
+        m_comboParamsp->addText(fl, varp->prettyName() + "_combo__V\n");
         if (m_hasClk) {
             m_seqPortsp->addNodesp(varp->cloneTree(false));
-            m_seqParamsp->addText(fl, varp->name() + "_tmp__V\n");
+            m_seqParamsp->addText(fl, varp->prettyName() + "_tmp__V\n");
         }
 
         addLocalVariable(m_comboDeclsp, varp, "_combo__V");
@@ -502,10 +503,13 @@ class ProtectVisitor final : public VNVisitor {
             addLocalVariable(m_seqDeclsp, varp, "_seq__V");
             addLocalVariable(m_tmpDeclsp, varp, "_tmp__V");
 
-            m_nbAssignsp->addText(fl, varp->name() + "_seq__V <= " + varp->name() + "_tmp__V;\n");
-            m_seqAssignsp->addText(fl, varp->name() + " = " + varp->name() + "_seq__V;\n");
+            m_nbAssignsp->addText(fl, varp->prettyName() + "_seq__V <= " + varp->prettyName()
+                                          + "_tmp__V;\n");
+            m_seqAssignsp->addText(fl,
+                                   varp->prettyName() + " = " + varp->prettyName() + "_seq__V;\n");
         }
-        m_comboAssignsp->addText(fl, varp->name() + " = " + varp->name() + "_combo__V;\n");
+        m_comboAssignsp->addText(fl,
+                                 varp->prettyName() + " = " + varp->prettyName() + "_combo__V;\n");
         m_cComboParamsp->addText(fl, varp->dpiArgType(true, false) + "\n");
         m_cComboOutsp->addText(fl,
                                V3Task::assignInternalToDpi(varp, true, "", "", "handlep__V->"));
diff --git a/test_regress/t/t_lib_prot_comb.v b/test_regress/t/t_lib_prot_comb.v
index 9b8e9e96d..b4716efa0 100644
--- a/test_regress/t/t_lib_prot_comb.v
+++ b/test_regress/t/t_lib_prot_comb.v
@@ -4,8 +4,8 @@
 // SPDX-License-Identifier: CC0-1.0
 
 `ifdef PROCESS_TOP
-`define CHECK if (out0 != (in0 ^ in1) || out1 != (in0 | in1) || out2 != (in0 & in1)) begin \
-   $display("Mismatch in0:%b in1:%b out0:%b out1:%b out2:%b", in0, in1, out0, out1, out2); \
+`define CHECK if (out0 != (in0 ^ in1) || out1 != (in0 | in1) || out2__under != (in0 & in1)) begin \
+   $display("Mismatch in0:%b in1:%b out0:%b out1:%b out2:%b", in0, in1, out0, out1, out2__under); \
    $stop; \
    end
 
@@ -17,10 +17,10 @@ module t (/*AUTOARG*/
 
 
    logic in0, in1;
-   logic out0, out1, out2;
+   logic out0, out1, out2__under;
    logic [31:0] count = 0;
    // actually XOR and OR and AND
-   secret i_secret(.in0(in0), .in1(in1), .out0(out0), .out1(out1), .out2(out2));
+   secret i_secret(.in0(in0), .in1(in1), .out0(out0), .out1(out1), .out2__under(out2__under));
 
    always @(posedge clk) begin
       count <= count + 32'd1;
@@ -48,9 +48,9 @@ module t (/*AUTOARG*/
 endmodule
 
 `else
-module secret(input in0, input in1, output out0, output out1, output out2);
+module secret(input in0, input in1, output out0, output out1, output out2__under);
    assign out0 = in0 ^ in1;
    assign out1 = in0 | in1;
-   assign out2 = in0 & in1;
+   assign out2__under = in0 & in1;
 endmodule
 `endif

From c0b505849cac4fb0c912378405271a0959ab176b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 22 Jun 2025 05:21:21 -0700
Subject: [PATCH 153/211] Require C++20 for configure (#6101) (#6107)

---
 configure.ac | 45 ++++++++++++++++++++++++++++++++++-----------
 1 file changed, 34 insertions(+), 11 deletions(-)

diff --git a/configure.ac b/configure.ac
index e4f53b20b..6104d0b3b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -137,6 +137,21 @@ AC_ARG_ENABLE([longtests],
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 
+# Disable version check
+AC_MSG_CHECKING(whether to disable version check)
+AC_ARG_ENABLE([version-check],
+              [AS_HELP_STRING([--disable-version-check],
+                              [disable minimum compile version check.
+                              use only when instructed by developers])],
+              [case "${enableval}" in
+                yes) CFG_VERSION_CHECK=yes ;;
+                no)  CFG_VERSION_CHECK=no ;;
+                *)   AC_MSG_ERROR([bad value ${enableval} for --disable-version-check]) ;;
+               esac],
+              CFG_VERSION_CHECK=yes)
+AC_SUBST(CFG_VERSION_CHECK)
+AC_MSG_RESULT($CFG_VERSION_CHECK)
+
 AC_CHECK_PROG(HAVE_Z3,z3,yes)
 AC_CHECK_PROG(HAVE_CVC5,cvc5,yes)
 AC_CHECK_PROG(HAVE_CVC4,cvc4,yes)
@@ -333,6 +348,7 @@ AC_DEFUN([_MY_CXX_CHECK_CORO_SET],
       if test "$_my_result" = "yes" ; then
         $1="$2"
         AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])
+        CFG_HAVE_COROUTINES=yes
       fi
     fi
   ])
@@ -401,12 +417,12 @@ AC_SUBST(CFG_CXXFLAGS_PROFILE)
 
 # Flag to select newest language standard supported
 # Macros work such that first option that passes is the one we take
-# Currently enable c++17/c++14 due to packaged SystemC dependency
-# c++17 is the newest that Verilator is regularly tested to support
+# Beware using flags that are not required, as can break packaged SystemC
+# c++20 is the newest that Verilator is regularly tested to support
 # c++14 is the oldest that Verilator supports
 # gnu is required for Cygwin to compile verilated.h successfully
-#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
-#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
+_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
@@ -559,7 +575,7 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
     # Set $_my_result
     AC_LINK_IFELSE(
      [AC_LANG_PROGRAM([#include <thread>
-#if (__cplusplus < 201402L)
+#if (__cplusplus < 202002L)
 # error "Too old"
 #endif
     ], [[ ]])],
@@ -575,13 +591,13 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
 # Add $CFG_CXXFLAGS_STD only if can't compile correctly otherwise,
 # as adding std= when not needed can cause errors with the C++ std library.
 CFG_CXXFLAGS_STD=$CFG_CXXFLAGS_STD_NEWEST
-AC_MSG_CHECKING(whether $CXX supports C++14)
+AC_MSG_CHECKING(whether $CXX supports C++20)
 _MY_CXX_CHECK_CXX_VER()
 AC_MSG_RESULT($_my_result)
 if test "$_my_result" = "no" ; then
    CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_STD"
    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE $CFG_CXXFLAGS_STD"
-   AC_MSG_CHECKING(whether $CXX supports C++14 with $CFG_CXXFLAGS_STD)
+   AC_MSG_CHECKING(whether $CXX supports C++20 with $CFG_CXXFLAGS_STD)
    _MY_CXX_CHECK_CXX_VER()
    AC_MSG_RESULT($_my_result)
 else
@@ -589,12 +605,19 @@ else
    # make sure we use the same std flag while compiling verilator and verilated design
    CFG_CXXFLAGS_STD=""
 fi
-if test "$_my_result" = "no" ; then
-   AC_MSG_NOTICE([[]])
-   AC_MSG_ERROR([[the $CXX compiler appears to not support C++14.
+if test "$CFG_VERSION_CHECK" != "no" ; then
+  if test "$_my_result" = "no" ; then
+     AC_MSG_NOTICE([[]])
+     AC_MSG_ERROR([[the $CXX compiler appears to not support C++20.
 
-Verilator requires a C++14 or newer compiler.]])
+Verilator requires a C++20 or newer compiler.]])
+  fi
+  if test "$CFG_HAVE_COROUTINES" != "yes" ; then
+     AC_MSG_NOTICE([[]])
+     AC_MSG_ERROR([[the $CXX compiler appears to not support coroutines.
 
+Verilator requires a C++20 or newer compiler.]])
+  fi
 fi
 AC_SUBST(CFG_CXXFLAGS_STD)
 

From d35e4a2b60159fab7bfc7d895dc5e101cefc46ce Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 23 Jun 2025 19:22:10 +0100
Subject: [PATCH 154/211] Improve memory usage for SenTrees in
 V3OrderProcessDomains (#6112)

---
 src/V3OrderProcessDomains.cpp | 33 +++++++++++++++++++++++++++++----
 1 file changed, 29 insertions(+), 4 deletions(-)

diff --git a/src/V3OrderProcessDomains.cpp b/src/V3OrderProcessDomains.cpp
index 190447d2f..2b7bd4943 100644
--- a/src/V3OrderProcessDomains.cpp
+++ b/src/V3OrderProcessDomains.cpp
@@ -64,13 +64,28 @@ class V3OrderProcessDomains final {
                                              : "");
     }
 
-    // Make a domain that merges the two domains
+    // Make a domain that merges the two domains, but don't yet simplify or add to global list
     AstSenTree* combineDomains(AstSenTree* ap, AstSenTree* bp) {
         if (ap == bp) return ap;
         if (ap == m_deleteDomainp) return bp;
         UASSERT_OBJ(bp != m_deleteDomainp, bp, "'bp' Should not be delete domain");
-        AstSenTree* const senTreep = ap->cloneTree(false);
-        senTreep->addSensesp(bp->sensesp()->cloneTree(true));
+        // If either tree has a backp, it is an existing tree, otherwise it is an intermediae
+        // created in this function.
+        // Clone existing 'ap' tree, or reuse intermediate
+        AstSenTree* const senTreep = ap->backp() ? ap->cloneTree(false) : ap;
+        // Clone or move items from 'bp'
+        if (bp->backp()) {
+            senTreep->addSensesp(bp->sensesp()->cloneTree(true));
+        } else {
+            senTreep->addSensesp(bp->sensesp()->unlinkFrBackWithNext());
+            VL_DO_DANGLING(bp->deleteTree(), bp);
+        }
+        return senTreep;
+    }
+
+    AstSenTree* simplifyDomain(AstSenTree* senTreep) {
+        // If it has a back pointer, then it is already one of the existing global trees
+        if (senTreep->backp()) return senTreep;
         V3Const::constifyExpensiveEdit(senTreep);  // Remove duplicates
         senTreep->multi(true);  // Comment that it was made from 2 domains
         AstSenTree* const resultp = m_finder.getSenTree(senTreep);
@@ -99,7 +114,10 @@ class V3OrderProcessDomains final {
             // For logic, start with the explicit hybrid sensitivities
             OrderLogicVertex* const lvtxp = vtxp->cast<OrderLogicVertex>();
             if (lvtxp) domainp = lvtxp->hybridp();
-            if (domainp) UINFO(6, "      hybr d=" << debugDomain(domainp) << " " << vtxp);
+            if (domainp) {
+                UINFO(6, "      hybr d=" << debugDomain(domainp) << " " << vtxp);
+                UASSERT(domainp->backp(), "Hybrid senTree should have backp");
+            }
 
             // For each incoming edge, examine the source vertex
             for (V3GraphEdge& edge : vtxp->inEdges()) {
@@ -114,6 +132,8 @@ class V3OrderProcessDomains final {
                 UINFO(6, "      from d=" << debugDomain(fromDomainp) << " " << fromVtxp);
                 UASSERT(fromDomainp == m_deleteDomainp || !fromDomainp->hasCombo(),
                         "There should be no need for combinational domains");
+                UASSERT(fromDomainp == m_deleteDomainp || fromDomainp->backp(),
+                        "Driver SenTree should have backp");
 
                 // Add in any external domains of variables
                 if (OrderVarVertex* const varVtxp = fromVtxp->cast<OrderVarVertex>()) {
@@ -125,6 +145,8 @@ class V3OrderProcessDomains final {
                                                  << " because of " << vscp);
                         UASSERT_OBJ(!externalDomainp->hasCombo(), vscp,
                                     "There should be no need for combinational domains");
+                        UASSERT_OBJ(externalDomainp->backp(), vscp,
+                                    "External SenTree should have backp()");
                         fromDomainp = combineDomains(fromDomainp, externalDomainp);
                     }
                 }
@@ -145,6 +167,9 @@ class V3OrderProcessDomains final {
             if (!domainp) {
                 domainp = m_deleteDomainp;
                 if (lvtxp) m_logicpsToDelete.push_back(lvtxp);
+            } else {
+                // Simplify and create canonical global SenTree
+                domainp = simplifyDomain(domainp);
             }
 
             // Set the domain of the vertex

From 2daa09a25540eeddf583d1dea8238633f54629a0 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 23 Jun 2025 22:58:26 +0100
Subject: [PATCH 155/211] Optimize constify within Expand and Subst (#6111)

These passes blow up the Ast size on some designs, so delaying running V3Const
until after the whole pass can notably increase peak memory usage. In this
patch we apply V3Const per CFunc within these passes, which saves on memory.
Added -fno-const-eager to disable the intra-pass V3Const application, for
debugging.
---
 docs/guide/exe_verilator.rst                  |  2 ++
 src/V3Expand.cpp                              | 10 ++++++++++
 src/V3Options.cpp                             |  1 +
 src/V3Options.h                               |  2 ++
 src/V3Subst.cpp                               |  7 +++++++
 .../t/t_case_66bits_no_const_eager.py         | 19 +++++++++++++++++++
 6 files changed, 41 insertions(+)
 create mode 100755 test_regress/t/t_case_66bits_no_const_eager.py

diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 938152af8..684d5646d 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -590,6 +590,8 @@ Summary:
 
 .. option:: -fno-const-bit-op-tree
 
+.. option:: -fno-const-eager
+
 .. option:: -fno-dedup
 
 .. option:: -fno-dfg
diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp
index a0109d51e..952eb2d40 100644
--- a/src/V3Expand.cpp
+++ b/src/V3Expand.cpp
@@ -357,6 +357,16 @@ class ExpandVisitor final : public VNVisitor {
     }
 
     // VISITORS
+    void visit(AstCFunc* nodep) override {
+        iterateChildren(nodep);
+
+        // Constant fold here, as Ast size can likely be reduced
+        if (v3Global.opt.fConstEager()) {
+            AstNode* const editedp = V3Const::constifyEditCpp(nodep);
+            UASSERT_OBJ(editedp == nodep, editedp, "Should not have replaced CFunc");
+        }
+    }
+
     void visit(AstExtend* nodep) override {
         if (nodep->user1SetOnce()) return;  // Process once
         iterateChildren(nodep);
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 86a7c0c16..257b1c7fe 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -1320,6 +1320,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     DECL_OPTION("-fconst", FOnOff, &m_fConst);
     DECL_OPTION("-fconst-before-dfg", FOnOff, &m_fConstBeforeDfg);
     DECL_OPTION("-fconst-bit-op-tree", FOnOff, &m_fConstBitOpTree);
+    DECL_OPTION("-fconst-eager", FOnOff, &m_fConstEager);
     DECL_OPTION("-fdead-assigns", FOnOff, &m_fDeadAssigns);
     DECL_OPTION("-fdead-cells", FOnOff, &m_fDeadCells);
     DECL_OPTION("-fdedup", FOnOff, &m_fDedupe);
diff --git a/src/V3Options.h b/src/V3Options.h
index 6c7fb6acd..8d5a2de1d 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -389,6 +389,7 @@ private:
     bool m_fConst;       // main switch: -fno-const: constant folding
     bool m_fConstBeforeDfg = true;  // main switch: -fno-const-before-dfg for testing only!
     bool m_fConstBitOpTree;  // main switch: -fno-const-bit-op-tree constant bit op tree
+    bool m_fConstEager = true;  // main switch: -fno-const-eagerly run V3Const during passes
     bool m_fDedupe;      // main switch: -fno-dedupe: logic deduplication
     bool m_fDfgPeephole = true; // main switch: -fno-dfg-peephole
     bool m_fDfgPreInline;    // main switch: -fno-dfg-pre-inline and -fno-dfg
@@ -701,6 +702,7 @@ public:
     bool fConst() const { return m_fConst; }
     bool fConstBeforeDfg() const { return m_fConstBeforeDfg; }
     bool fConstBitOpTree() const { return m_fConstBitOpTree; }
+    bool fConstEager() const { return m_fConstEager; }
     bool fDedupe() const { return m_fDedupe; }
     bool fDfgPeephole() const { return m_fDfgPeephole; }
     bool fDfgPreInline() const { return m_fDfgPreInline; }
diff --git a/src/V3Subst.cpp b/src/V3Subst.cpp
index 19fd3d9d8..98ceea886 100644
--- a/src/V3Subst.cpp
+++ b/src/V3Subst.cpp
@@ -26,6 +26,7 @@
 
 #include "V3Subst.h"
 
+#include "V3Const.h"
 #include "V3Stats.h"
 
 #include <algorithm>
@@ -361,6 +362,12 @@ class SubstVisitor final : public VNVisitor {
         iterateChildren(nodep);
         for (SubstVarEntry& ip : m_entries) ip.deleteUnusedAssign();
         m_entries.clear();
+
+        // Constant fold here, as Ast size can likely be reduced
+        if (v3Global.opt.fConstEager()) {
+            AstNode* const editedp = V3Const::constifyEditCpp(nodep);
+            UASSERT_OBJ(editedp == nodep, editedp, "Should not have replaced CFunc");
+        }
     }
 
     void visit(AstNode* nodep) override {
diff --git a/test_regress/t/t_case_66bits_no_const_eager.py b/test_regress/t/t_case_66bits_no_const_eager.py
new file mode 100755
index 000000000..2ce516e24
--- /dev/null
+++ b/test_regress/t/t_case_66bits_no_const_eager.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = "t/t_case_66bits.v"
+
+test.compile(verilator_flags2=['-fno-const-eager'])
+
+test.execute()
+
+test.passes()

From 11998ccc5858d680f4621c9662ceda5de26b2847 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 23 Jun 2025 18:35:16 -0400
Subject: [PATCH 156/211] Revert requiring C++20 until SystemC sorted (#6101)
 (#6107)

---
 configure.ac | 45 +++++++++++----------------------------------
 1 file changed, 11 insertions(+), 34 deletions(-)

diff --git a/configure.ac b/configure.ac
index 6104d0b3b..e4f53b20b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -137,21 +137,6 @@ AC_ARG_ENABLE([longtests],
 AC_SUBST(CFG_WITH_LONGTESTS)
 AC_MSG_RESULT($CFG_WITH_LONGTESTS)
 
-# Disable version check
-AC_MSG_CHECKING(whether to disable version check)
-AC_ARG_ENABLE([version-check],
-              [AS_HELP_STRING([--disable-version-check],
-                              [disable minimum compile version check.
-                              use only when instructed by developers])],
-              [case "${enableval}" in
-                yes) CFG_VERSION_CHECK=yes ;;
-                no)  CFG_VERSION_CHECK=no ;;
-                *)   AC_MSG_ERROR([bad value ${enableval} for --disable-version-check]) ;;
-               esac],
-              CFG_VERSION_CHECK=yes)
-AC_SUBST(CFG_VERSION_CHECK)
-AC_MSG_RESULT($CFG_VERSION_CHECK)
-
 AC_CHECK_PROG(HAVE_Z3,z3,yes)
 AC_CHECK_PROG(HAVE_CVC5,cvc5,yes)
 AC_CHECK_PROG(HAVE_CVC4,cvc4,yes)
@@ -348,7 +333,6 @@ AC_DEFUN([_MY_CXX_CHECK_CORO_SET],
       if test "$_my_result" = "yes" ; then
         $1="$2"
         AC_DEFINE([HAVE_COROUTINES],[1],[Defined if coroutines are supported by $CXX])
-        CFG_HAVE_COROUTINES=yes
       fi
     fi
   ])
@@ -417,12 +401,12 @@ AC_SUBST(CFG_CXXFLAGS_PROFILE)
 
 # Flag to select newest language standard supported
 # Macros work such that first option that passes is the one we take
-# Beware using flags that are not required, as can break packaged SystemC
-# c++20 is the newest that Verilator is regularly tested to support
+# Currently enable c++17/c++14 due to packaged SystemC dependency
+# c++17 is the newest that Verilator is regularly tested to support
 # c++14 is the oldest that Verilator supports
 # gnu is required for Cygwin to compile verilated.h successfully
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
-_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++20)
+#_MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++20)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=c++17)
 _MY_CXX_CHECK_SET(CFG_CXXFLAGS_STD_NEWEST,-std=gnu++14)
@@ -575,7 +559,7 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
     # Set $_my_result
     AC_LINK_IFELSE(
      [AC_LANG_PROGRAM([#include <thread>
-#if (__cplusplus < 202002L)
+#if (__cplusplus < 201402L)
 # error "Too old"
 #endif
     ], [[ ]])],
@@ -591,13 +575,13 @@ AC_DEFUN([_MY_CXX_CHECK_CXX_VER],
 # Add $CFG_CXXFLAGS_STD only if can't compile correctly otherwise,
 # as adding std= when not needed can cause errors with the C++ std library.
 CFG_CXXFLAGS_STD=$CFG_CXXFLAGS_STD_NEWEST
-AC_MSG_CHECKING(whether $CXX supports C++20)
+AC_MSG_CHECKING(whether $CXX supports C++14)
 _MY_CXX_CHECK_CXX_VER()
 AC_MSG_RESULT($_my_result)
 if test "$_my_result" = "no" ; then
    CXXFLAGS="$CXXFLAGS $CFG_CXXFLAGS_STD"
    CFG_CXX_FLAGS_CMAKE="$CFG_CXX_FLAGS_CMAKE $CFG_CXXFLAGS_STD"
-   AC_MSG_CHECKING(whether $CXX supports C++20 with $CFG_CXXFLAGS_STD)
+   AC_MSG_CHECKING(whether $CXX supports C++14 with $CFG_CXXFLAGS_STD)
    _MY_CXX_CHECK_CXX_VER()
    AC_MSG_RESULT($_my_result)
 else
@@ -605,19 +589,12 @@ else
    # make sure we use the same std flag while compiling verilator and verilated design
    CFG_CXXFLAGS_STD=""
 fi
-if test "$CFG_VERSION_CHECK" != "no" ; then
-  if test "$_my_result" = "no" ; then
-     AC_MSG_NOTICE([[]])
-     AC_MSG_ERROR([[the $CXX compiler appears to not support C++20.
+if test "$_my_result" = "no" ; then
+   AC_MSG_NOTICE([[]])
+   AC_MSG_ERROR([[the $CXX compiler appears to not support C++14.
 
-Verilator requires a C++20 or newer compiler.]])
-  fi
-  if test "$CFG_HAVE_COROUTINES" != "yes" ; then
-     AC_MSG_NOTICE([[]])
-     AC_MSG_ERROR([[the $CXX compiler appears to not support coroutines.
+Verilator requires a C++14 or newer compiler.]])
 
-Verilator requires a C++20 or newer compiler.]])
-  fi
 fi
 AC_SUBST(CFG_CXXFLAGS_STD)
 

From 544cb4a90fcf9231706b6155254e0f6bf201c5de Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 23 Jun 2025 18:37:44 -0400
Subject: [PATCH 157/211] Fix decoding octal string escapes with 1-2 digits
 (#6108).

---
 Changes                          |  1 +
 src/V3String.cpp                 | 15 ++++++++---
 test_regress/t/t_string_octal.py | 18 +++++++++++++
 test_regress/t/t_string_octal.v  | 43 ++++++++++++++++++++++++++++++++
 4 files changed, 73 insertions(+), 4 deletions(-)
 create mode 100755 test_regress/t/t_string_octal.py
 create mode 100644 test_regress/t/t_string_octal.v

diff --git a/Changes b/Changes
index b377e110b..b0d64fbf5 100644
--- a/Changes
+++ b/Changes
@@ -68,6 +68,7 @@ Verilator 5.037 devel
 * Fix casting reals to large integrals (#6085). [Todd Strader]
 * Fix nested hier blocks workers error (#6087). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix `--lib-create` with double-underscore (#6099).
+* Fix decoding octal string escapes with 1-2 digits (#6108).
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3String.cpp b/src/V3String.cpp
index 7cd304692..ba0fcbfc7 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -160,16 +160,18 @@ string VString::unquoteSVString(const string& text, string& errOut) {
             if (std::isdigit(*cp)) {
                 octal_val = octal_val * 8 + (*cp - '0');
                 if (++octal_digits == 3) {
-                    octal_digits = 0;
-                    quoted = false;
                     newtext += octal_val;
+                    octal_digits = 0;
+                    octal_val = 0;
+                    quoted = false;
                 }
             } else {
                 if (octal_digits) {
                     // Spec allows 1-3 digits
-                    octal_digits = 0;
-                    quoted = false;
                     newtext += octal_val;
+                    octal_digits = 0;
+                    octal_val = 0;
+                    quoted = false;
                     --cp;  // Backup to reprocess terminating character as non-escaped
                     continue;
                 }
@@ -200,6 +202,11 @@ string VString::unquoteSVString(const string& text, string& errOut) {
                 }
             }
         } else if (*cp == '\\') {
+            if (octal_digits) {
+                newtext += octal_val;
+                octal_digits = 0;
+                octal_val = 0;
+            }
             quoted = true;
             octal_digits = 0;
         } else {
diff --git a/test_regress/t/t_string_octal.py b/test_regress/t/t_string_octal.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_string_octal.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_string_octal.v b/test_regress/t/t_string_octal.v
new file mode 100644
index 000000000..035c31a7b
--- /dev/null
+++ b/test_regress/t/t_string_octal.v
@@ -0,0 +1,43 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checko(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module t;
+   string s;
+   initial begin
+      s = $sformatf("\099 \119 \121"); // Q Q Q
+      // $display("%o %o %o %o %o", s[0], s[1], s[2], s[3], s[4]);
+      // Results vary by simulator.  Some possibilities:
+      // 0 0 0 0 0
+      // 40 71 71 40 11
+      // 71 71 40 11 071
+
+      s = $sformatf("\088 \108 \110"); // H H H
+      // $display("%o %o %o %o %o", s[0], s[1], s[2], s[3], s[4]);
+      // Results vary by simulator.  Some possibilities:
+      // 0 0 0 0 0
+      // 40 70 70 40 10
+      // 70 70 40 10 70
+
+      s = $sformatf("\102\3\12."); // B\023\312.
+      // $display("%o %o %o %o %o", s[0], s[1], s[2], s[3], s[4]);
+      `checko(s[0], 8'o102);
+      `checko(s[1], 8'o003);
+      `checko(s[2], 8'o012);
+      `checko(s[3], 8'o056);
+
+      s = $sformatf("\102.\3.\12\103"); // B.\023.C
+      // $display("%o %o %o %o %o", s[0], s[1], s[2], s[3], s[4]);
+      `checko(s[0], 8'o102);
+      `checko(s[2], 8'o003);
+      `checko(s[4], 8'o012);
+      `checko(s[5], 8'o103);
+      $display("*-* All Finished *-*");
+      $finish;
+   end
+endmodule

From a9e9ab50bdf2165695301b20583a196bdfd9e556 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 23 Jun 2025 18:40:49 -0400
Subject: [PATCH 158/211] Commentary: Changes update

---
 Changes           | 6 ++++++
 docs/spelling.txt | 5 +++++
 2 files changed, 11 insertions(+)

diff --git a/Changes b/Changes
index b0d64fbf5..5120975d3 100644
--- a/Changes
+++ b/Changes
@@ -26,10 +26,15 @@ Verilator 5.037 devel
 * Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
 * Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
 * Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
+* Add DFG binToOneHot pass to generate one-hot decoders (#6096). [Geza Lore]
+* Add hint of the signed right-hand-side in oversized replication error (#6098). [Peter Birch]
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
+* Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
 * Optimize DFG De Morgan patterns (#6090). [Geza Lore]
 * Optimize DFG variable elimination (#6091). [Geza Lore]
+* Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
+* Optimize constification within Expand and Subst stages (#6111). [Geza Lore]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
 * Fix trace hierarchical-name runtime errors (#5668) (#6076). [Paul Swirhun]
 * Fix streaming operator packing order (#5903) (#6077). [Paul Swirhun]
@@ -68,6 +73,7 @@ Verilator 5.037 devel
 * Fix casting reals to large integrals (#6085). [Todd Strader]
 * Fix nested hier blocks workers error (#6087). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Fix `--lib-create` with double-underscore (#6099).
+* Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
 * Fix decoding octal string escapes with 1-2 digits (#6108).
 
 
diff --git a/docs/spelling.txt b/docs/spelling.txt
index de38771b8..648365b4b 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -405,6 +405,7 @@ Stroebel
 Strouble
 Stucki
 Su
+Subst
 Suguimoto
 Sundararajan
 Sunderland
@@ -537,6 +538,7 @@ basename
 bbox
 benchmarking
 biguint
+binToOneHot
 bindir
 biops
 bisonpre
@@ -585,7 +587,9 @@ conf
 config
 const
 constexpr
+constification
 constpool
+contify
 coredump
 coroutine
 coroutines
@@ -878,6 +882,7 @@ onehot
 ooo
 oprofile
 ortegon
+oversized
 oversubscription
 parallelized
 param

From 916d473effb2c58b4f2aa530098060398f58c42a Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 24 Jun 2025 16:59:09 +0100
Subject: [PATCH 159/211] Internals: Replace unnecessary AstSel::widthp() child
 node with const in node (#6117)

---
 src/V3AstNodeExpr.h                          | 112 +++++++-------
 src/V3AstNodes.cpp                           |   4 +-
 src/V3Clean.cpp                              |   2 +-
 src/V3Const.cpp                              |  60 +++-----
 src/V3Coverage.cpp                           |   8 +-
 src/V3Delayed.cpp                            |  18 +--
 src/V3DfgAstToDfg.cpp                        |   8 +-
 src/V3DfgDfgToAst.cpp                        |  10 +-
 src/V3EmitCFunc.h                            |   4 +-
 src/V3EmitV.cpp                              |   8 +-
 src/V3EmitXml.cpp                            |   5 +
 src/V3Gate.cpp                               |   8 +-
 src/V3Hasher.cpp                             |   5 +
 src/V3InstrCount.cpp                         |   1 -
 src/V3LinkLValue.cpp                         |   1 -
 src/V3Randomize.cpp                          |  26 ++--
 src/V3Simulate.h                             |  22 +--
 src/V3SplitVar.cpp                           |  26 +---
 src/V3Tristate.cpp                           |   2 +-
 src/V3Width.cpp                              |  12 +-
 src/V3WidthSel.cpp                           |  40 ++---
 test_regress/t/t_cover_expr.out              |  18 +--
 test_regress/t/t_cover_expr_max.out          |  18 +--
 test_regress/t/t_cover_expr_trace.out        |  18 +--
 test_regress/t/t_cover_line_expr.out         |  18 +--
 test_regress/t/t_debug_emitv.out             |   2 +-
 test_regress/t/t_json_only_flat_vlvbound.out | 150 ++++++++-----------
 test_regress/t/t_xml_flat_vlvbound.out       |  24 +--
 28 files changed, 276 insertions(+), 354 deletions(-)

diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index f83def594..f21b2b178 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -3415,6 +3415,65 @@ public:
     int instrCount() const override { return widthInstrs() * 2; }
     bool stringFlavor() const override { return true; }
 };
+class AstSel final : public AstNodeBiop {
+    // *Resolved* (tyep checked) multiple bit range extraction. Always const width
+    // @astgen alias op1 := fromp
+    // @astgen alias op2 := lsbp
+    VNumRange m_declRange;  // Range of the 'from' array if isRanged() is set, else invalid
+    int m_declElWidth;  // If a packed array, the number of bits per element
+    // Selection width (!= this->width() from V3Clean onwards, != this->widthMin() in V3Width)
+    int m_widthConst;
+
+public:
+    AstSel(FileLine* fl, AstNodeExpr* fromp, AstNodeExpr* lsbp, int bitwidth)
+        : ASTGEN_SUPER_Sel(fl, fromp, lsbp)
+        , m_declElWidth{1}
+        , m_widthConst{bitwidth} {
+        dtypeSetLogicSized(bitwidth, VSigning::UNSIGNED);
+    }
+    AstSel(FileLine* fl, AstNodeExpr* fromp, int lsb, int bitwidth)
+        : ASTGEN_SUPER_Sel(fl, fromp, new AstConst(fl, lsb))  // Need () constructor
+        , m_declElWidth{1}
+        , m_widthConst{bitwidth} {
+        dtypeSetLogicSized(bitwidth, VSigning::UNSIGNED);
+    }
+    ASTGEN_MEMBERS_AstSel;
+    AstNodeExpr* cloneType(AstNodeExpr* lhsp, AstNodeExpr* rhsp) override {
+        return new AstSel{fileline(), lhsp, rhsp, widthConst()};
+    }
+    void dump(std::ostream& str) const override;
+    void dumpJson(std::ostream& str) const override;
+    void numberOperate(V3Number& out, const V3Number& from, const V3Number& bit) override {
+        out.opSel(from, bit.toUInt() + widthConst() - 1, bit.toUInt());
+    }
+    string emitVerilog() override { V3ERROR_NA_RETURN(""); }
+    string emitC() override {
+        return widthConst() == 1 ? "VL_BITSEL_%nq%lq%rqI(%lw, %P, %li, %ri)"
+               : isWide()        ? "VL_SEL_%nq%lq%rqI(%nw, %lw, %P, %li, %ri, %nw)"
+                                 : "VL_SEL_%nq%lq%rqI(%lw, %P, %li, %ri, %nw)";
+    }
+    string emitSMT() const override { return "((_ extract %t %r) %l)"; }
+    bool cleanOut() const override { return false; }
+    bool cleanLhs() const override { return true; }
+    bool cleanRhs() const override { return true; }
+    bool sizeMattersLhs() const override { return false; }
+    bool sizeMattersRhs() const override { return false; }
+    bool sameNode(const AstNode* otherp) const override {
+        return widthConst() == VN_DBG_AS(otherp, Sel)->widthConst();
+    }
+    int instrCount() const override {
+        return widthInstrs() * (VN_CAST(lsbp(), Const) ? 3 : 10) + 1;
+    }
+    int widthConst() const { return m_widthConst; }
+    void widthConst(int value) { m_widthConst = value; }
+    int lsbConst() const { return VN_AS(lsbp(), Const)->toSInt(); }
+    int msbConst() const { return lsbConst() + widthConst() - 1; }
+    VNumRange& declRange() VL_MT_STABLE { return m_declRange; }
+    const VNumRange& declRange() const VL_MT_STABLE { return m_declRange; }
+    void declRange(const VNumRange& flag) { m_declRange = flag; }
+    int declElWidth() const { return m_declElWidth; }
+    void declElWidth(int flag) { m_declElWidth = flag; }
+};
 class AstShiftL final : public AstNodeBiop {
 public:
     AstShiftL(FileLine* fl, AstNodeExpr* lhsp, AstNodeExpr* rhsp, int setwidth = 0)
@@ -4693,59 +4752,6 @@ public:
     bool sizeMattersRhs() const override { return false; }
     bool sizeMattersThs() const override { return false; }
 };
-class AstSel final : public AstNodeTriop {
-    // Multiple bit range extraction
-    // @astgen alias op1 := fromp
-    // @astgen alias op2 := lsbp
-    // @astgen alias op3 := widthp
-    VNumRange m_declRange;  // Range of the 'from' array if isRanged() is set, else invalid
-    int m_declElWidth;  // If a packed array, the number of bits per element
-public:
-    AstSel(FileLine* fl, AstNodeExpr* fromp, AstNodeExpr* lsbp, AstNodeExpr* widthp)
-        : ASTGEN_SUPER_Sel(fl, fromp, lsbp, widthp)
-        , m_declElWidth{1} {
-        if (VN_IS(widthp, Const)) {
-            dtypeSetLogicSized(VN_AS(widthp, Const)->toUInt(), VSigning::UNSIGNED);
-        }
-    }
-    AstSel(FileLine* fl, AstNodeExpr* fromp, int lsb, int bitwidth)
-        : ASTGEN_SUPER_Sel(fl, fromp, new AstConst(fl, lsb),  // Need () constructor
-                           new AstConst(fl, bitwidth))  // Need () constructor
-        , m_declElWidth{1} {
-        dtypeSetLogicSized(bitwidth, VSigning::UNSIGNED);
-    }
-    ASTGEN_MEMBERS_AstSel;
-    void dump(std::ostream& str) const override;
-    void dumpJson(std::ostream& str) const override;
-    void numberOperate(V3Number& out, const V3Number& from, const V3Number& bit,
-                       const V3Number& width) override {
-        out.opSel(from, bit.toUInt() + width.toUInt() - 1, bit.toUInt());
-    }
-    string emitVerilog() override { V3ERROR_NA_RETURN(""); }
-    string emitC() override {
-        return widthp()->isOne() ? "VL_BITSEL_%nq%lq%rq%tq(%lw, %P, %li, %ri)"
-               : isWide()        ? "VL_SEL_%nq%lq%rq%tq(%nw,%lw, %P, %li, %ri, %ti)"
-                                 : "VL_SEL_%nq%lq%rq%tq(%lw, %P, %li, %ri, %ti)";
-    }
-    string emitSMT() const override { return "((_ extract %t %r) %l)"; }
-    bool cleanOut() const override { return false; }
-    bool cleanLhs() const override { return true; }
-    bool cleanRhs() const override { return true; }
-    bool cleanThs() const override { return true; }
-    bool sizeMattersLhs() const override { return false; }
-    bool sizeMattersRhs() const override { return false; }
-    bool sizeMattersThs() const override { return false; }
-    bool sameNode(const AstNode*) const override { return true; }
-    int instrCount() const override { return widthInstrs() * (VN_CAST(lsbp(), Const) ? 3 : 10); }
-    int widthConst() const { return VN_AS(widthp(), Const)->toSInt(); }
-    int lsbConst() const { return VN_AS(lsbp(), Const)->toSInt(); }
-    int msbConst() const { return lsbConst() + widthConst() - 1; }
-    VNumRange& declRange() VL_MT_STABLE { return m_declRange; }
-    const VNumRange& declRange() const VL_MT_STABLE { return m_declRange; }
-    void declRange(const VNumRange& flag) { m_declRange = flag; }
-    int declElWidth() const { return m_declElWidth; }
-    void declElWidth(int flag) { m_declElWidth = flag; }
-};
 class AstSliceSel final : public AstNodeTriop {
     // Multiple array element extraction
     // @astgen alias op1 := fromp
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 2e6e8b792..59bed182c 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -2358,13 +2358,15 @@ void AstPatMember::dumpJson(std::ostream& str) const {
 void AstNodeTriop::dump(std::ostream& str) const { this->AstNodeExpr::dump(str); }
 void AstNodeTriop::dumpJson(std::ostream& str) const { dumpJsonGen(str); }
 void AstSel::dump(std::ostream& str) const {
-    this->AstNodeTriop::dump(str);
+    this->AstNodeBiop::dump(str);
+    str << " widthConst=" << this->widthConst();
     if (declRange().ranged()) {
         str << " decl" << declRange() << "]";
         if (declElWidth() != 1) str << "/" << declElWidth();
     }
 }
 void AstSel::dumpJson(std::ostream& str) const {
+    dumpJsonNumFunc(str, widthConst);
     if (declRange().ranged()) {
         dumpJsonStr(str, "declRange", cvtToStr(declRange()));
         dumpJsonNumFunc(str, declElWidth);
diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp
index c4dc07ff3..35a84f778 100644
--- a/src/V3Clean.cpp
+++ b/src/V3Clean.cpp
@@ -233,7 +233,7 @@ class CleanVisitor final : public VNVisitor {
         setClean(nodep, true);
     }
     void visit(AstSel* nodep) override {
-        operandTriop(nodep);
+        operandBiop(nodep);
         setClean(nodep, nodep->cleanOut());
     }
     void visit(AstUCFunc* nodep) override {
diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index b5c89be43..9c94bab16 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -1310,8 +1310,7 @@ class ConstVisitor final : public VNVisitor {
                     >= VN_AS(nodep->fromp(), NodeVarRef)->varp()->widthWords()));
     }
     bool operandSelFull(const AstSel* nodep) {
-        return (VN_IS(nodep->lsbp(), Const) && VN_IS(nodep->widthp(), Const)
-                && nodep->lsbConst() == 0
+        return (VN_IS(nodep->lsbp(), Const) && nodep->lsbConst() == 0
                 && static_cast<int>(nodep->widthConst()) == nodep->fromp()->width());
     }
     bool operandSelExtend(AstSel* nodep) {
@@ -1319,8 +1318,7 @@ class ConstVisitor final : public VNVisitor {
         // SEL(EXTEND(any,width,...),(width-1),0) -> ...
         // Since select's return unsigned, this is always an extend
         AstExtend* const extendp = VN_CAST(nodep->fromp(), Extend);
-        if (!(m_doV && extendp && VN_IS(nodep->lsbp(), Const) && VN_IS(nodep->widthp(), Const)
-              && nodep->lsbConst() == 0
+        if (!(m_doV && extendp && VN_IS(nodep->lsbp(), Const) && nodep->lsbConst() == 0
               && static_cast<int>(nodep->widthConst()) == extendp->lhsp()->width()))
             return false;
         VL_DO_DANGLING(replaceWChild(nodep, extendp->lhsp()), nodep);
@@ -1330,9 +1328,7 @@ class ConstVisitor final : public VNVisitor {
         // SEL(ADD(a,b),(width-1),0) -> ADD(SEL(a),SEL(b))
         // Add or any operation which doesn't care if we discard top bits
         AstNodeBiop* const bip = VN_CAST(nodep->fromp(), NodeBiop);
-        if (!(m_doV && bip && VN_IS(nodep->lsbp(), Const) && VN_IS(nodep->widthp(), Const)
-              && nodep->lsbConst() == 0))
-            return false;
+        if (!(m_doV && bip && VN_IS(nodep->lsbp(), Const) && nodep->lsbConst() == 0)) return false;
         if (debug() >= 9) nodep->dumpTree("-  SEL(BI)-in: ");
         AstNodeExpr* const bilhsp = bip->lhsp()->unlinkFrBack();
         AstNodeExpr* const birhsp = bip->rhsp()->unlinkFrBack();
@@ -1347,8 +1343,7 @@ class ConstVisitor final : public VNVisitor {
         // becomes thought other optimizations
         // SEL(SHIFTR({a},{b}),{lsb},{width}) -> SEL({a},{lsb+b},{width})
         AstShiftR* const shiftp = VN_CAST(nodep->fromp(), ShiftR);
-        if (!(m_doV && shiftp && VN_IS(shiftp->rhsp(), Const) && VN_IS(nodep->lsbp(), Const)
-              && VN_IS(nodep->widthp(), Const))) {
+        if (!(m_doV && shiftp && VN_IS(shiftp->rhsp(), Const) && VN_IS(nodep->lsbp(), Const))) {
             return false;
         }
         AstNodeExpr* const ap = shiftp->lhsp();
@@ -1420,14 +1415,13 @@ class ConstVisitor final : public VNVisitor {
         // Find range of dtype we are selecting from
         // Similar code in V3Unknown::AstSel
         const bool doit = true;
-        if (m_warn && VN_IS(nodep->lsbp(), Const) && VN_IS(nodep->widthp(), Const) && doit) {
+        if (m_warn && VN_IS(nodep->lsbp(), Const) && doit) {
             const int maxDeclBit = nodep->declRange().hiMaxSelect() * nodep->declElWidth()
                                    + (nodep->declElWidth() - 1);
-            if (VN_AS(nodep->lsbp(), Const)->num().isFourState()
-                || VN_AS(nodep->widthp(), Const)->num().isFourState()) {
+            if (VN_AS(nodep->lsbp(), Const)->num().isFourState()) {
                 nodep->v3error("Selection index is constantly unknown or tristated: "
                                "lsb="
-                               << nodep->lsbp()->name() << " width=" << nodep->widthp()->name());
+                               << nodep->lsbp()->name() << " width=" << nodep->widthConst());
                 // Replacing nodep will make a mess above, so we replace the offender
                 replaceZero(nodep->lsbp());
             } else if (nodep->declRange().ranged()
@@ -1510,10 +1504,8 @@ class ConstVisitor final : public VNVisitor {
         if (!lfromp || !rfromp || !lfromp->sameGateTree(rfromp)) return false;
         const AstConst* const lstart = VN_CAST(lhsp->lsbp(), Const);
         const AstConst* const rstart = VN_CAST(rhsp->lsbp(), Const);
-        const AstConst* const lwidth = VN_CAST(lhsp->widthp(), Const);
-        const AstConst* const rwidth = VN_CAST(rhsp->widthp(), Const);
-        if (!lstart || !rstart || !lwidth || !rwidth) return false;  // too complicated
-        const int rend = (rstart->toSInt() + rwidth->toSInt());
+        if (!lstart || !rstart) return false;  // too complicated
+        const int rend = (rstart->toSInt() + rhsp->widthConst());
         return (rend == lstart->toSInt());
     }
     bool ifMergeAdjacent(AstNodeExpr* lhsp, AstNodeExpr* rhsp) {
@@ -1543,10 +1535,8 @@ class ConstVisitor final : public VNVisitor {
         if (!lfromp || !rfromp || !lfromp->sameGateTree(rfromp)) return false;
         AstConst* const lstart = VN_CAST(lselp->lsbp(), Const);
         AstConst* const rstart = VN_CAST(rselp->lsbp(), Const);
-        AstConst* const lwidth = VN_CAST(lselp->widthp(), Const);
-        AstConst* const rwidth = VN_CAST(rselp->widthp(), Const);
-        if (!lstart || !rstart || !lwidth || !rwidth) return false;  // too complicated
-        const int rend = (rstart->toSInt() + rwidth->toSInt());
+        if (!lstart || !rstart) return false;  // too complicated
+        const int rend = (rstart->toSInt() + rselp->widthConst());
         // a[i:j] a[j-1:k]
         if (rend == lstart->toSInt()) return true;
         // a[i:0] a[msb:j]
@@ -2566,7 +2556,6 @@ class ConstVisitor final : public VNVisitor {
         // SEL(SEL({x},a,b),c,d) => SEL({x},a+c,d)
         AstSel* const belowp = VN_AS(nodep->fromp(), Sel);
         AstNodeExpr* const fromp = belowp->fromp()->unlinkFrBack();
-        AstNodeExpr* const widthp = nodep->widthp()->unlinkFrBack();
         AstNodeExpr* const lsb1p = nodep->lsbp()->unlinkFrBack();
         AstNodeExpr* const lsb2p = belowp->lsbp()->unlinkFrBack();
         // Eliminate lower range
@@ -2594,7 +2583,7 @@ class ConstVisitor final : public VNVisitor {
             newlsbp = new AstAdd{lsb1p->fileline(), lhsp, rhsp};
             newlsbp->dtypeFrom(widep);
         }
-        AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, widthp};
+        AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, nodep->widthConst()};
         nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -2636,8 +2625,6 @@ class ConstVisitor final : public VNVisitor {
         AstNodeExpr* const fromp = repp->srcp();
         AstConst* const lsbp = VN_CAST(nodep->lsbp(), Const);
         if (!lsbp) return false;
-        AstNodeExpr* const widthp = nodep->widthp();
-        if (!VN_IS(widthp, Const)) return false;
         UASSERT_OBJ(fromp->width(), nodep, "Not widthed");
         if ((lsbp->toUInt() / fromp->width())
             != ((lsbp->toUInt() + nodep->width() - 1) / fromp->width())) {
@@ -2645,10 +2632,9 @@ class ConstVisitor final : public VNVisitor {
         }
         //
         fromp->unlinkFrBack();
-        widthp->unlinkFrBack();
-        AstSel* const newp
-            = new AstSel{nodep->fileline(), fromp,
-                         new AstConst{lsbp->fileline(), lsbp->toUInt() % fromp->width()}, widthp};
+        AstSel* const newp = new AstSel{
+            nodep->fileline(), fromp,
+            new AstConst{lsbp->fileline(), lsbp->toUInt() % fromp->width()}, nodep->widthConst()};
         nodep->replaceWithKeepDType(newp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
         return true;
@@ -2705,14 +2691,13 @@ class ConstVisitor final : public VNVisitor {
         AstNodeBiop* const fromp = VN_AS(nodep->fromp()->unlinkFrBack(), NodeBiop);
         UASSERT_OBJ(fromp, nodep, "Called on non biop");
         AstNodeExpr* const lsbp = nodep->lsbp()->unlinkFrBack();
-        AstNodeExpr* const widthp = nodep->widthp()->unlinkFrBack();
         //
         AstNodeExpr* const bilhsp = fromp->lhsp()->unlinkFrBack();
         AstNodeExpr* const birhsp = fromp->rhsp()->unlinkFrBack();
         //
-        fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp->cloneTreePure(true),
-                               widthp->cloneTreePure(true)});
-        fromp->rhsp(new AstSel{nodep->fileline(), birhsp, lsbp, widthp});
+        fromp->lhsp(
+            new AstSel{nodep->fileline(), bilhsp, lsbp->cloneTreePure(true), nodep->widthConst()});
+        fromp->rhsp(new AstSel{nodep->fileline(), birhsp, lsbp, nodep->widthConst()});
         nodep->replaceWithKeepDType(fromp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -2721,11 +2706,10 @@ class ConstVisitor final : public VNVisitor {
         AstNodeUniop* const fromp = VN_AS(nodep->fromp()->unlinkFrBack(), NodeUniop);
         UASSERT_OBJ(fromp, nodep, "Called on non biop");
         AstNodeExpr* const lsbp = nodep->lsbp()->unlinkFrBack();
-        AstNodeExpr* const widthp = nodep->widthp()->unlinkFrBack();
         //
         AstNodeExpr* const bilhsp = fromp->lhsp()->unlinkFrBack();
         //
-        fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp, widthp});
+        fromp->lhsp(new AstSel{nodep->fileline(), bilhsp, lsbp, nodep->widthConst()});
         nodep->replaceWithKeepDType(fromp);
         VL_DO_DANGLING(pushDeletep(nodep), nodep);
     }
@@ -3771,9 +3755,9 @@ class ConstVisitor final : public VNVisitor {
     TREEOPV("AstSel{$fromp.castSub, operandSelBiLower(nodep)}", "DONE");
     TREEOPV("AstSel{$fromp.castXor, operandSelBiLower(nodep)}", "DONE");
     TREEOPV("AstSel{$fromp.castShiftR, operandSelShiftLower(nodep)}",   "DONE");
-    TREEOPA("AstSel{$fromp.castConst, $lsbp.castConst, $widthp.castConst, }",   "replaceConst(nodep)");
-    TREEOPV("AstSel{$fromp.castConcat, $lsbp.castConst, $widthp.castConst, }",  "replaceSelConcat(nodep)");
-    TREEOPV("AstSel{$fromp.castReplicate, $lsbp.castConst, $widthp.castConst, operandSelReplicate(nodep) }",    "DONE");
+    TREEOPA("AstSel{$fromp.castConst, $lsbp.castConst, }",   "replaceConst(nodep)");
+    TREEOPV("AstSel{$fromp.castConcat, $lsbp.castConst, }",  "replaceSelConcat(nodep)");
+    TREEOPV("AstSel{$fromp.castReplicate, $lsbp.castConst, operandSelReplicate(nodep) }",    "DONE");
     // V3Tristate requires selects below BufIf1.
     // Also do additional operators that are bit-independent, but only definite
     // win if bit select is a constant (otherwise we may need to compute bit index several times)
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index 0ee911e69..a5ef8f363 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -931,13 +931,11 @@ class CoverageVisitor final : public VNVisitor {
             const int width = lhsp->dtypep()->width();
             const size_t expected = std::is_same<T_Oper, AstXor>::value ? 0x1 << width : width + 1;
             if (checkMaxExprs(expected)) return;
-            AstNodeExpr* unrolledp = new AstSel{fl, lhsp->cloneTree(false),
-                                                new AstConst{fl, static_cast<uint32_t>(width - 1)},
-                                                new AstConst{fl, 1}};
+            AstNodeExpr* unrolledp = new AstSel{
+                fl, lhsp->cloneTree(false), new AstConst{fl, static_cast<uint32_t>(width - 1)}, 1};
             for (int bit = width - 2; bit >= 0; bit--) {
                 AstSel* const selp = new AstSel{fl, lhsp->cloneTree(false),
-                                                new AstConst{fl, static_cast<uint32_t>(bit)},
-                                                new AstConst{fl, 1}};
+                                                new AstConst{fl, static_cast<uint32_t>(bit)}, 1};
                 unrolledp = new T_Oper{fl, selp, unrolledp};
             }
             iterate(unrolledp);
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 56bef3a3d..0ff531812 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -358,7 +358,7 @@ class DelayedVisitor final : public VNVisitor {
     // Insert new statements before 'insertp'.
     // Returns a read reference to the temporary variable.
     AstVarRef* createWidened(FileLine* flp, AstScope* scopep, AstNodeDType* dtypep,
-                             AstNodeExpr* sLsbp, AstNodeExpr* sWidthp, const std::string& name,
+                             AstNodeExpr* sLsbp, int sWidth, const std::string& name,
                              AstNodeExpr* valuep, AstNode* insertp) {
         // Create temporary variable.
         AstVarScope* const tp = createTemp(flp, scopep, name, dtypep);
@@ -369,7 +369,7 @@ class DelayedVisitor final : public VNVisitor {
             new AstAssign{flp, new AstVarRef{flp, tp, VAccess::WRITE}, zerop});
         // Set the selected bits to 'valuep'
         AstSel* const selp = new AstSel{flp, new AstVarRef{flp, tp, VAccess::WRITE},
-                                        sLsbp->cloneTreePure(true), sWidthp->cloneTreePure(true)};
+                                        sLsbp->cloneTreePure(true), sWidth};
         insertp->addHereThisAsNext(new AstAssign{flp, selp, valuep});
         // This is the expression to get the value of the temporary
         return new AstVarRef{flp, tp, VAccess::READ};
@@ -633,22 +633,21 @@ class DelayedVisitor final : public VNVisitor {
                 // Need to create a mask and widen the value to element size.
                 lhsNodep = lSelp->fromp();
                 AstNodeExpr* const sLsbp = lSelp->lsbp();
-                AstConst* const sWidthp = VN_AS(lSelp->widthp(), Const);
+                const int sWidth = lSelp->widthConst();
 
                 // Create mask value
                 maskp = [&]() -> AstNodeExpr* {
                     // Constant mask we can compute here
                     if (AstConst* const cLsbp = VN_CAST(sLsbp, Const)) {
                         AstConst* const cp = new AstConst{flp, AstConst::DTyped{}, eDTypep};
-                        cp->num().setMask(sWidthp->toSInt(), cLsbp->toSInt());
+                        cp->num().setMask(sWidth, cLsbp->toSInt());
                         return cp;
                     }
 
                     // A non-constant mask we must compute at run-time.
-                    AstConst* const onesp
-                        = new AstConst{flp, AstConst::WidthedValue{}, sWidthp->toSInt(), 0};
+                    AstConst* const onesp = new AstConst{flp, AstConst::WidthedValue{}, sWidth, 0};
                     onesp->num().setAllBits1();
-                    return createWidened(flp, scopep, eDTypep, sLsbp, sWidthp,
+                    return createWidened(flp, scopep, eDTypep, sLsbp, sWidth,
                                          "__VdlyMask" + baseName, onesp, nodep);
                 }();
 
@@ -659,14 +658,13 @@ class DelayedVisitor final : public VNVisitor {
                         if (AstConst* const cLsbp = VN_CAST(sLsbp, Const)) {
                             AstConst* const cp = new AstConst{flp, AstConst::DTyped{}, eDTypep};
                             cp->num().setAllBits0();
-                            cp->num().opSelInto(cValuep->num(), cLsbp->toSInt(),
-                                                sWidthp->toSInt());
+                            cp->num().opSelInto(cValuep->num(), cLsbp->toSInt(), sWidth);
                             return cp;
                         }
                     }
 
                     // A non-constant value we must adjust.
-                    return createWidened(flp, scopep, eDTypep, sLsbp, sWidthp,  //
+                    return createWidened(flp, scopep, eDTypep, sLsbp, sWidth,  //
                                          "__VdlyElem" + baseName, valuep, nodep);
                 }();
             } else {
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index aa5f8715e..e02a14e3f 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -172,7 +172,7 @@ class AstToDfgVisitor final : public VNVisitor {
         if (AstSel* const selp = VN_CAST(nodep, Sel)) {
             AstVarRef* const vrefp = VN_CAST(selp->fromp(), VarRef);
             const AstConst* const lsbp = VN_CAST(selp->lsbp(), Const);
-            if (!vrefp || !lsbp || !VN_IS(selp->widthp(), Const)) {
+            if (!vrefp || !lsbp) {
                 ++m_ctx.m_nonRepLhs;
                 return false;
             }
@@ -555,11 +555,7 @@ class AstToDfgVisitor final : public VNVisitor {
     void visit(AstSel* nodep) override {
         UASSERT_OBJ(!nodep->user1p(), nodep, "Already has Dfg vertex");
         if (unhandled(nodep)) return;
-        if (!VN_IS(nodep->widthp(), Const)) {  // This should never be taken, but paranoia
-            m_foundUnhandled = true;
-            ++m_ctx.m_nonRepNode;
-            return;
-        }
+
         iterate(nodep->fromp());
         if (m_foundUnhandled) return;
 
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index ce094ccd0..410d98e48 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -173,8 +173,8 @@ class DfgToAstVisitor final : DfgVisitor {
                 FileLine* const flp = dfgVarp->driverFileLine(idx);
                 AstVarRef* const refp = new AstVarRef{flp, dfgVarp->varp(), VAccess::WRITE};
                 AstConst* const lsbp = new AstConst{flp, dfgVarp->driverLsb(idx)};
-                AstConst* const widthp = new AstConst{flp, edge.sourcep()->width()};
-                AstSel* const lhsp = new AstSel{flp, refp, lsbp, widthp};
+                const int width = static_cast<int>(edge.sourcep()->width());
+                AstSel* const lhsp = new AstSel{flp, refp, lsbp, width};
                 // Add assignment of the value to the selected bits
                 addResultEquation(flp, lhsp, rhsp);
             });
@@ -218,16 +218,14 @@ class DfgToAstVisitor final : DfgVisitor {
         FileLine* const flp = vtxp->fileline();
         AstNodeExpr* const fromp = convertDfgVertexToAstNodeExpr(vtxp->fromp());
         AstConst* const lsbp = new AstConst{flp, vtxp->lsb()};
-        AstConst* const widthp = new AstConst{flp, vtxp->width()};
-        m_resultp = new AstSel{flp, fromp, lsbp, widthp};
+        m_resultp = new AstSel{flp, fromp, lsbp, static_cast<int>(vtxp->width())};
     }
 
     void visit(DfgMux* vtxp) override {
         FileLine* const flp = vtxp->fileline();
         AstNodeExpr* const fromp = convertDfgVertexToAstNodeExpr(vtxp->fromp());
         AstNodeExpr* const lsbp = convertDfgVertexToAstNodeExpr(vtxp->lsbp());
-        AstConst* const widthp = new AstConst{flp, vtxp->width()};
-        m_resultp = new AstSel{flp, fromp, lsbp, widthp};
+        m_resultp = new AstSel{flp, fromp, lsbp, static_cast<int>(vtxp->width())};
     }
 
     // The rest of the 'visit' methods are generated by 'astgen'
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 13399eee0..99cc3a259 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -421,6 +421,7 @@ public:
         bool decind = false;
         bool rhs = true;
         if (AstSel* const selp = VN_CAST(nodep->lhsp(), Sel)) {
+            UASSERT_OBJ(selp->widthMin() == selp->widthConst(), selp, "Width mismatch");
             if (selp->widthMin() == 1) {
                 putnbs(nodep, "VL_ASSIGNBIT_");
                 emitIQW(selp->fromp());
@@ -1260,7 +1261,8 @@ public:
     }
     void visit(AstSel* nodep) override {
         // Note ASSIGN checks for this on a LHS
-        emitOpName(nodep, nodep->emitC(), nodep->fromp(), nodep->lsbp(), nodep->widthp());
+        UASSERT_OBJ(nodep->widthMin() == nodep->widthConst(), nodep, "Width mismatch");
+        emitOpName(nodep, nodep->emitC(), nodep->fromp(), nodep->lsbp(), nullptr);
     }
     void visit(AstReplicate* nodep) override {
         if (nodep->srcp()->widthMin() == 1 && !nodep->isWide()) {
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 3facbbc5d..794c64b73 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -642,11 +642,11 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst {
         }
         puts("[");
         if (VN_IS(nodep->lsbp(), Const)) {
-            if (nodep->widthp()->isOne()) {
+            if (nodep->widthConst() == 1) {
                 puts(cvtToStr(VN_AS(nodep->lsbp(), Const)->toSInt() + offset));
             } else {
-                puts(cvtToStr(VN_AS(nodep->lsbp(), Const)->toSInt()
-                              + VN_AS(nodep->widthp(), Const)->toSInt() + offset - 1));
+                puts(cvtToStr(VN_AS(nodep->lsbp(), Const)->toSInt() + nodep->widthConst() + offset
+                              - 1));
                 puts(":");
                 puts(cvtToStr(VN_AS(nodep->lsbp(), Const)->toSInt() + offset));
             }
@@ -657,7 +657,7 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst {
                 puts(cvtToStr(offset));
             }
             putfs(nodep, "+:");
-            iterateAndNextConstNull(nodep->widthp());
+            puts(cvtToStr(nodep->widthConst()));
             puts("]");
         }
         puts("]");
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index 2fb2d1896..ee43b621f 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -255,6 +255,11 @@ class EmitXmlFileVisitor final : public VNVisitorConst {
         putsQuoted(nodep->funcp() ? nodep->funcp()->name() : nodep->name());
         outputChildrenEnd(nodep, "");
     }
+    void visit(AstSel* nodep) override {
+        outputTag(nodep, "");
+        puts(" widthConst=\"" + cvtToStr(nodep->widthConst()) + "\"");
+        outputChildrenEnd(nodep, "");
+    }
 
     // Data types
     void visit(AstBasicDType* nodep) override {
diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp
index b19e2516f..e7368142f 100644
--- a/src/V3Gate.cpp
+++ b/src/V3Gate.cpp
@@ -457,7 +457,7 @@ class GateClkDecomp final {
 
         // RHS
         if (const AstSel* const rselp = VN_CAST(rhsp, Sel)) {
-            if (VN_IS(rselp->lsbp(), Const) && VN_IS(rselp->widthp(), Const)) {
+            if (VN_IS(rselp->lsbp(), Const)) {
                 if (clkOffset < rselp->lsbConst() || clkOffset > rselp->msbConst()) return;
                 clkOffset -= rselp->lsbConst();
             } else {
@@ -473,7 +473,7 @@ class GateClkDecomp final {
 
         // LHS
         if (const AstSel* const lselp = VN_CAST(lhsp, Sel)) {
-            if (VN_IS(lselp->lsbp(), Const) && VN_IS(lselp->widthp(), Const)) {
+            if (VN_IS(lselp->lsbp(), Const)) {
                 clkOffset += lselp->lsbConst();
             } else {
                 return;
@@ -1248,10 +1248,8 @@ class GateMergeAssignments final {
         if (!pRefp || !cRefp || !cRefp->sameNode(pRefp)) return nullptr;  // not the same var
 
         const AstConst* const pstart = VN_CAST(prevSelp->lsbp(), Const);
-        const AstConst* const pwidth = VN_CAST(prevSelp->widthp(), Const);
         const AstConst* const cstart = VN_CAST(currSelp->lsbp(), Const);
-        const AstConst* const cwidth = VN_CAST(currSelp->widthp(), Const);
-        if (!pstart || !pwidth || !cstart || !cwidth) return nullptr;  // too complicated
+        if (!pstart || !cstart) return nullptr;  // too complicated
 
         if (currSelp->msbConst() + 1 == prevSelp->lsbConst()) {
             return new AstSel{cRefp->fileline(), cRefp->cloneTree(false), currSelp->lsbConst(),
diff --git a/src/V3Hasher.cpp b/src/V3Hasher.cpp
index b6fee854b..c9561cc2f 100644
--- a/src/V3Hasher.cpp
+++ b/src/V3Hasher.cpp
@@ -215,6 +215,11 @@ class HasherVisitor final : public VNVisitorConst {
     void visit(AstNodeExpr* nodep) override {
         m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, []() {});
     }
+    void visit(AstSel* nodep) override {
+        m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [this, nodep]() {  //
+            m_hash += nodep->widthConst();
+        });
+    }
     void visit(AstConst* nodep) override {
         m_hash += hashNodeAndIterate(nodep, HASH_DTYPE, HASH_CHILDREN, [this, nodep]() {  //
             m_hash += nodep->num().toHash();
diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp
index 404f61166..15851c9c4 100644
--- a/src/V3InstrCount.cpp
+++ b/src/V3InstrCount.cpp
@@ -140,7 +140,6 @@ private:
         // the fromp() node which could be disproportionately large.
         const VisitBase vb{this, nodep};
         iterateAndNextConstNull(nodep->lsbp());
-        iterateAndNextConstNull(nodep->widthp());
     }
     void visit(AstConcat* nodep) override {
         if (m_ignoreRemaining) return;
diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp
index 79a22193d..39de33ef1 100644
--- a/src/V3LinkLValue.cpp
+++ b/src/V3LinkLValue.cpp
@@ -270,7 +270,6 @@ class LinkLValueVisitor final : public VNVisitor {
         // Only set lvalues on the from
         m_setRefLvalue = VAccess::NOCHANGE;
         iterateAndNextNull(nodep->lsbp());
-        iterateAndNextNull(nodep->widthp());
     }
     void visit(AstNodeSel* nodep) override {
         VL_RESTORER(m_setRefLvalue);
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 1f9f0edbd..97b38e744 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -503,9 +503,15 @@ class ConstraintExprVisitor final : public VNVisitor {
         UASSERT_OBJ(smtExpr != "", nodep,
                     "Node needs randomization constraint, but no emitSMT: " << nodep);
 
-        if (lhsp) lhsp = VN_AS(iterateSubtreeReturnEdits(lhsp->unlinkFrBack()), NodeExpr);
-        if (rhsp) rhsp = VN_AS(iterateSubtreeReturnEdits(rhsp->unlinkFrBack()), NodeExpr);
-        if (thsp) thsp = VN_AS(iterateSubtreeReturnEdits(thsp->unlinkFrBack()), NodeExpr);
+        if (lhsp)
+            lhsp = VN_AS(iterateSubtreeReturnEdits(lhsp->backp() ? lhsp->unlinkFrBack() : lhsp),
+                         NodeExpr);
+        if (rhsp)
+            rhsp = VN_AS(iterateSubtreeReturnEdits(rhsp->backp() ? rhsp->unlinkFrBack() : rhsp),
+                         NodeExpr);
+        if (thsp)
+            thsp = VN_AS(iterateSubtreeReturnEdits(thsp->backp() ? thsp->unlinkFrBack() : thsp),
+                         NodeExpr);
 
         AstNodeExpr* argsp = nullptr;
         for (string::iterator pos = smtExpr.begin(); pos != smtExpr.end(); ++pos) {
@@ -704,13 +710,11 @@ class ConstraintExprVisitor final : public VNVisitor {
     void visit(AstSel* nodep) override {
         if (editFormat(nodep)) return;
         VNRelinker handle;
-        AstNodeExpr* const widthp = nodep->widthp()->unlinkFrBack(&handle);
         FileLine* const fl = nodep->fileline();
-        AstNodeExpr* const msbp
-            = new AstSFormatF{fl, "%1d", false,
-                              new AstAdd{fl, nodep->lsbp()->cloneTreePure(false),
-                                         new AstSub{fl, widthp, new AstConst{fl, 1}}}};
-        handle.relink(msbp);
+        AstNodeExpr* const msbp = new AstSFormatF{
+            fl, "%1d", false,
+            new AstAdd{fl, nodep->lsbp()->cloneTreePure(false),
+                       new AstConst{fl, static_cast<uint32_t>(nodep->widthConst() - 1)}}};
         AstNodeExpr* const lsbp
             = new AstSFormatF{fl, "%1d", false, nodep->lsbp()->unlinkFrBack(&handle)};
         handle.relink(lsbp);
@@ -1562,9 +1566,7 @@ class RandomizeVisitor final : public VNVisitor {
                         fl,
                         new AstSub{fl, tempRefp,
                                    new AstConst{fl, static_cast<uint32_t>(aryDTypep->lo())}},
-                        new AstConst{fl, 0},
-                        new AstConst{
-                            fl, static_cast<uint32_t>(V3Number::log2b(aryDTypep->hi()) + 1)}}};
+                        new AstConst{fl, 0}, V3Number::log2b(aryDTypep->hi()) + 1}};
             } else if (VN_IS(tempDTypep, AssocArrayDType))
                 tempElementp = new AstAssocSel{fl, tempExprp, tempRefp};
             else if (VN_IS(tempDTypep, QueueDType))
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index f62f7dc75..f92183ea8 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -581,23 +581,13 @@ private:
         }
     }
     void visit(AstNodeBiop* nodep) override {
-        if (!optimizable()) return;  // Accelerate
-        checkNodeInfo(nodep);
-        iterateChildrenConst(nodep);
-        if (!m_checkOnly && optimizable()) {
-            nodep->numberOperate(newConst(nodep)->num(), fetchConst(nodep->lhsp())->num(),
-                                 fetchConst(nodep->rhsp())->num());
-        }
-    }
-    void visit(AstNodeTriop* nodep) override {
         if (!optimizable()) return;  // Accelerate
         checkNodeInfo(nodep);
         iterateChildrenConst(nodep);
         if (!m_checkOnly && optimizable()) {
             AstConst* const valuep = newConst(nodep);
             nodep->numberOperate(newConst(nodep)->num(), fetchConst(nodep->lhsp())->num(),
-                                 fetchConst(nodep->rhsp())->num(),
-                                 fetchConst(nodep->thsp())->num());
+                                 fetchConst(nodep->rhsp())->num());
             // See #5490. 'numberOperate' on partially out of range select yields 'x' bits,
             // but in reality it would yield '0's without V3Table, so force 'x' bits to '0',
             // to ensure the result is the same with and without V3Table.
@@ -607,6 +597,16 @@ private:
             }
         }
     }
+    void visit(AstNodeTriop* nodep) override {
+        if (!optimizable()) return;  // Accelerate
+        checkNodeInfo(nodep);
+        iterateChildrenConst(nodep);
+        if (!m_checkOnly && optimizable()) {
+            nodep->numberOperate(newConst(nodep)->num(), fetchConst(nodep->lhsp())->num(),
+                                 fetchConst(nodep->rhsp())->num(),
+                                 fetchConst(nodep->thsp())->num());
+        }
+    }
     void visit(AstNodeQuadop* nodep) override {
         if (!optimizable()) return;  // Accelerate
         checkNodeInfo(nodep);
diff --git a/src/V3SplitVar.cpp b/src/V3SplitVar.cpp
index 346e98961..7bbfe1ed5 100644
--- a/src/V3SplitVar.cpp
+++ b/src/V3SplitVar.cpp
@@ -381,8 +381,6 @@ public:
                 m_refs.erase(refp);
             } else if (AstVarRef* const refp = VN_CAST(selp->lsbp(), VarRef)) {
                 m_refs.erase(refp);
-            } else if (AstVarRef* const refp = VN_CAST(selp->widthp(), VarRef)) {
-                m_refs.erase(refp);
             }
             UASSERT_OBJ(reinterpret_cast<uintptr_t>(selp->op1p()) != 1, selp, "stale");
             visitor->iterate(selp);
@@ -1010,28 +1008,19 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
         }
         UASSERT_OBJ(varp->attrSplitVar() || varp->user2(), varp, "must be a split candidate");
 
-        const std::array<AstConst*, 2> consts
-            = {{VN_CAST(nodep->lsbp(), Const),
-                VN_CAST(nodep->widthp(), Const)}};  // GCC 3.8.0 wants {{}}
-        if (consts[0] && consts[1]) {  // OK
+        if (AstConst* const lsbConstp = VN_CAST(nodep->lsbp(), Const)) {  // OK
             refit->second.append(
-                PackedVarRefEntry(nodep, consts[0]->toSInt() + refit->second.basicp()->lo(),
-                                  consts[1]->toUInt()),
+                PackedVarRefEntry(nodep, lsbConstp->toSInt() + refit->second.basicp()->lo(),
+                                  nodep->widthConst()),
                 vrefp->access());
             UINFO(5, varp->prettyName()
-                         << " [" << consts[0]->toSInt() << ":+" << consts[1]->toSInt()
+                         << " [" << lsbConstp->toSInt() << ":+" << nodep->widthConst()
                          << "] lsb:" << refit->second.basicp()->lo());
         } else {
             if (varp->attrSplitVar()) {
                 warnNoSplit(vrefp->varp(), nodep, "its bit range cannot be determined statically");
                 varp->attrSplitVar(false);
             }
-            if (!consts[0]) {
-                UINFO(4, "LSB " << nodep->lsbp() << " is expected to be constant, but not");
-            }
-            if (!consts[1]) {
-                UINFO(4, "WIDTH " << nodep->widthp() << " is expected to be constant, but not");
-            }
             m_refs.erase(varp);
             iterateChildren(nodep);
         }
@@ -1261,15 +1250,10 @@ class SplitPackedVarVisitor final : public VNVisitor, public SplitVarImpl {
                 info.ineligible = true;
                 continue;
             }
-            AstConst* const widthConstp = VN_CAST(selp->widthp(), Const);
-            if (!widthConstp) {
-                info.ineligible = true;
-                continue;
-            }
 
             // All good, record the selection range
             const int32_t lsb = lsbConstp->toSInt();
-            const int32_t msb = lsb + widthConstp->toSInt() - 1;
+            const int32_t msb = lsb + selp->widthConst() - 1;
             info.ranges.emplace_back(lsb, msb);
         }
 
diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp
index c5edf8c12..be40fec9a 100644
--- a/src/V3Tristate.cpp
+++ b/src/V3Tristate.cpp
@@ -1160,7 +1160,7 @@ class TristateVisitor final : public TristateBaseVisitor {
                     AstNodeExpr* const en1p = getEnp(nodep->fromp());
                     AstNodeExpr* const enp
                         = new AstSel{nodep->fileline(), en1p, nodep->lsbp()->cloneTreePure(true),
-                                     nodep->widthp()->cloneTree(true)};
+                                     nodep->widthConst()};
                     UINFO(9, "       newsel " << enp);
                     nodep->user1p(enp);  // propagate up SEL(fromp->enable, value)
                     m_tgraph.didProcess(nodep);
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 86e7ef5b1..048480fb9 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -972,16 +972,7 @@ class WidthVisitor final : public VNVisitor {
             userIterateAndNext(nodep->fromp(), WidthVP{CONTEXT_DET, PRELIM}.p());
             userIterateAndNext(nodep->lsbp(), WidthVP{SELF, PRELIM}.p());
             checkCvtUS(nodep->fromp());
-            iterateCheckSizedSelf(nodep, "Select Width", nodep->widthp(), SELF, BOTH);
             iterateCheckSizedSelf(nodep, "Select LHS", nodep->fromp(), SELF, BOTH);
-            V3Const::constifyParamsEdit(nodep->widthp());  // widthp may change
-            const AstConst* const widthConstp = VN_CAST(nodep->widthp(), Const);
-            if (!widthConstp) {
-                nodep->v3error(
-                    "Width of bit extract isn't a constant");  // Impossible? // LCOV_EXCL_LINE
-                nodep->dtypeSetBit();
-                return;
-            }
             int width = nodep->widthConst();
             if (width <= 0) {
                 nodep->v3error("Width of bit extract must be positive (IEEE 1800-2023 11.5.1)");
@@ -997,8 +988,7 @@ class WidthVisitor final : public VNVisitor {
                                   << nodep->msbConst() << "<" << nodep->lsbConst());
                 width = (nodep->lsbConst() - nodep->msbConst() + 1);
                 nodep->dtypeSetLogicSized(width, VSigning::UNSIGNED);
-                pushDeletep(nodep->widthp());
-                nodep->widthp()->replaceWith(new AstConst(nodep->widthp()->fileline(), width));
+                nodep->widthConst(width);
                 pushDeletep(nodep->lsbp());
                 nodep->lsbp()->replaceWith(new AstConst{nodep->lsbp()->fileline(), 0});
             }
diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp
index 38fbd3b25..b53e2ae3c 100644
--- a/src/V3WidthSel.cpp
+++ b/src/V3WidthSel.cpp
@@ -262,8 +262,7 @@ class WidthSelVisitor final : public VNVisitor {
             // cppcheck-suppress zerodivcond
             const int elwidth = adtypep->width() / fromRange.elements();
             AstSel* const newp = new AstSel{
-                nodep->fileline(), fromp, newMulConst(nodep->fileline(), elwidth, subp),
-                new AstConst(nodep->fileline(), AstConst::Unsized32{}, elwidth)};
+                nodep->fileline(), fromp, newMulConst(nodep->fileline(), elwidth, subp), elwidth};
             newp->declRange(fromRange);
             newp->declElWidth(elwidth);
             newp->dtypeFrom(adtypep->subDTypep());  // Need to strip off array reference
@@ -333,9 +332,7 @@ class WidthSelVisitor final : public VNVisitor {
         } else if (VN_IS(ddtypep, BasicDType)) {
             // SELBIT(range, index) -> SEL(array, index, 1)
             AstSel* const newp
-                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(rhsp, fromRange),
-                             // Unsized so width from user
-                             new AstConst{nodep->fileline(), AstConst::Unsized32{}, 1}};
+                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(rhsp, fromRange), 1};
             newp->declRange(fromRange);
             UINFO(6, "   new " << newp);
             if (debug() >= 9) newp->dumpTree("-  SELBTn: ");
@@ -344,9 +341,7 @@ class WidthSelVisitor final : public VNVisitor {
         } else if (VN_IS(ddtypep, NodeUOrStructDType)) {  // A bit from the packed struct
             // SELBIT(range, index) -> SEL(array, index, 1)
             AstSel* const newp
-                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(rhsp, fromRange),
-                             // Unsized so width from user
-                             new AstConst{nodep->fileline(), AstConst::Unsized32{}, 1}};
+                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(rhsp, fromRange), 1};
             newp->declRange(fromRange);
             UINFO(6, "   new " << newp);
             if (debug() >= 9) newp->dumpTree("-  SELBTn: ");
@@ -449,10 +444,10 @@ class WidthSelVisitor final : public VNVisitor {
                 lsb = x;
             }
             const int elwidth = adtypep->width() / fromRange.elements();
-            AstSel* const newp = new AstSel{
-                nodep->fileline(), fromp,
-                newMulConst(nodep->fileline(), elwidth, newSubLsbOf(lsbp, fromRange)),
-                new AstConst(nodep->fileline(), AstConst::Unsized32{}, (msb - lsb + 1) * elwidth)};
+            AstSel* const newp
+                = new AstSel{nodep->fileline(), fromp,
+                             newMulConst(nodep->fileline(), elwidth, newSubLsbOf(lsbp, fromRange)),
+                             (msb - lsb + 1) * elwidth};
             newp->declRange(fromRange);
             newp->declElWidth(elwidth);
             newp->dtypeFrom(sliceDType(adtypep, msb, lsb));
@@ -477,11 +472,8 @@ class WidthSelVisitor final : public VNVisitor {
                 msb = lsb;
                 lsb = x;
             }
-            AstNodeExpr* const widthp = new AstConst(
-                msbp->fileline(), AstConst::Unsized32{},  // Unsized so width from user
-                msb + 1 - lsb);
-            AstSel* const newp
-                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange), widthp};
+            AstSel* const newp = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange),
+                                            msb + 1 - lsb};
             newp->declRange(fromRange);
             UINFO(6, "   new " << newp);
             // if (debug() >= 9) newp->dumpTree("-  SELEXnew: ");
@@ -499,11 +491,8 @@ class WidthSelVisitor final : public VNVisitor {
                 msb = lsb;
                 lsb = x;
             }
-            AstNodeExpr* const widthp = new AstConst(
-                msbp->fileline(), AstConst::Unsized32{},  // Unsized so width from user
-                msb + 1 - lsb);
-            AstSel* const newp
-                = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange), widthp};
+            AstSel* const newp = new AstSel{nodep->fileline(), fromp, newSubLsbOf(lsbp, fromRange),
+                                            msb + 1 - lsb};
             newp->declRange(fromRange);
             UINFO(6, "   new " << newp);
             // if (debug() >= 9) newp->dumpTree("-  SELEXnew: ");
@@ -581,11 +570,10 @@ class WidthSelVisitor final : public VNVisitor {
                    || (VN_IS(ddtypep, NodeUOrStructDType)
                        && VN_AS(ddtypep, NodeUOrStructDType)->packedUnsup())) {
             int elwidth = 1;
-            AstNodeExpr* newwidthp = widthp;
+            int newwidth = width;
             if (const AstPackArrayDType* const adtypep = VN_CAST(ddtypep, PackArrayDType)) {
                 elwidth = adtypep->width() / fromRange.elements();
-                newwidthp
-                    = new AstConst(nodep->fileline(), AstConst::Unsized32{}, width * elwidth);
+                newwidth = width * elwidth;
             }
             AstNodeExpr* newlsbp = nullptr;
             if (VN_IS(nodep, SelPlus)) {
@@ -608,7 +596,7 @@ class WidthSelVisitor final : public VNVisitor {
                 nodep->v3fatalSrc("Bad Case");
             }
             if (elwidth != 1) newlsbp = newMulConst(nodep->fileline(), elwidth, newlsbp);
-            AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, newwidthp};
+            AstSel* const newp = new AstSel{nodep->fileline(), fromp, newlsbp, newwidth};
             newp->declRange(fromRange);
             newp->declElWidth(elwidth);
             UINFO(6, "   new " << newp);
diff --git a/test_regress/t/t_cover_expr.out b/test_regress/t/t_cover_expr.out
index 7f74da584..2886f1501 100644
--- a/test_regress/t/t_cover_expr.out
+++ b/test_regress/t/t_cover_expr.out
@@ -206,15 +206,15 @@
                 if (0 == 1) begin
                     for (int loop_var = 0; loop_var < 1; loop_var++) begin
 %000000                 if (cyc[loop_var] && t2) $write("");
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==0) => 0 hier=top.t
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==1 && t2==1) => 1 hier=top.t
 -000000  point: comment=(t2==0) => 0 hier=top.t
                     end
                 end
                 // stop at the first layer even if there's more to find
 %000007         if ((cyc[3+32'(t1 && t2)+:2] == cyc[5+32'(t3 || t4)+:2]) || cyc[31]) $write("");
--000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==0 && cyc[31]==0) => 0 hier=top.t
--000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==1) => 1 hier=top.t
+-000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==0 && cyc[31]==0) => 0 hier=top.t
+-000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==1) => 1 hier=top.t
 -000000  point: comment=(cyc[31]==1) => 1 hier=top.t
                 // impossible branches and redundant terms
 %000005         if ((t1 && t2) && ~(t1 && t3) && (t1 || t4)) $write("");
@@ -233,12 +233,12 @@
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 // demonstrate current limitations of term matching scheme
 %000005         if ((cyc[0] && cyc[1]) && ~(cyc[1-1] && cyc[2]) && (cyc[2-2] || cyc[3])) $write("");
--000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==1 && cyc[2]==1) => 0 hier=top.t
--000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==0 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==1 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==0 && cyc[3]==0) => 0 hier=top.t
 -000004  point: comment=(cyc[0]==0) => 0 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[3]==1) => 1 hier=top.t
--000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
 -000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 //verilator coverage_off
diff --git a/test_regress/t/t_cover_expr_max.out b/test_regress/t/t_cover_expr_max.out
index a8f977fc3..ee7dca17a 100644
--- a/test_regress/t/t_cover_expr_max.out
+++ b/test_regress/t/t_cover_expr_max.out
@@ -206,15 +206,15 @@
                 if (0 == 1) begin
                     for (int loop_var = 0; loop_var < 1; loop_var++) begin
 %000000                 if (cyc[loop_var] && t2) $write("");
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==0) => 0 hier=top.t
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==1 && t2==1) => 1 hier=top.t
 -000000  point: comment=(t2==0) => 0 hier=top.t
                     end
                 end
                 // stop at the first layer even if there's more to find
 %000007         if ((cyc[3+32'(t1 && t2)+:2] == cyc[5+32'(t3 || t4)+:2]) || cyc[31]) $write("");
--000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==0 && cyc[31]==0) => 0 hier=top.t
--000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==1) => 1 hier=top.t
+-000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==0 && cyc[31]==0) => 0 hier=top.t
+-000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==1) => 1 hier=top.t
 -000000  point: comment=(cyc[31]==1) => 1 hier=top.t
                 // impossible branches and redundant terms
 %000005         if ((t1 && t2) && ~(t1 && t3) && (t1 || t4)) $write("");
@@ -233,12 +233,12 @@
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 // demonstrate current limitations of term matching scheme
 %000005         if ((cyc[0] && cyc[1]) && ~(cyc[1-1] && cyc[2]) && (cyc[2-2] || cyc[3])) $write("");
--000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==1 && cyc[2]==1) => 0 hier=top.t
--000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==0 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==1 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==0 && cyc[3]==0) => 0 hier=top.t
 -000004  point: comment=(cyc[0]==0) => 0 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[3]==1) => 1 hier=top.t
--000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
 -000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 //verilator coverage_off
diff --git a/test_regress/t/t_cover_expr_trace.out b/test_regress/t/t_cover_expr_trace.out
index 7f74da584..2886f1501 100644
--- a/test_regress/t/t_cover_expr_trace.out
+++ b/test_regress/t/t_cover_expr_trace.out
@@ -206,15 +206,15 @@
                 if (0 == 1) begin
                     for (int loop_var = 0; loop_var < 1; loop_var++) begin
 %000000                 if (cyc[loop_var] && t2) $write("");
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==0) => 0 hier=top.t
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==1 && t2==1) => 1 hier=top.t
 -000000  point: comment=(t2==0) => 0 hier=top.t
                     end
                 end
                 // stop at the first layer even if there's more to find
 %000007         if ((cyc[3+32'(t1 && t2)+:2] == cyc[5+32'(t3 || t4)+:2]) || cyc[31]) $write("");
--000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==0 && cyc[31]==0) => 0 hier=top.t
--000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==1) => 1 hier=top.t
+-000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==0 && cyc[31]==0) => 0 hier=top.t
+-000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==1) => 1 hier=top.t
 -000000  point: comment=(cyc[31]==1) => 1 hier=top.t
                 // impossible branches and redundant terms
 %000005         if ((t1 && t2) && ~(t1 && t3) && (t1 || t4)) $write("");
@@ -233,12 +233,12 @@
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 // demonstrate current limitations of term matching scheme
 %000005         if ((cyc[0] && cyc[1]) && ~(cyc[1-1] && cyc[2]) && (cyc[2-2] || cyc[3])) $write("");
--000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==1 && cyc[2]==1) => 0 hier=top.t
--000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==0 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==1 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==0 && cyc[3]==0) => 0 hier=top.t
 -000004  point: comment=(cyc[0]==0) => 0 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[3]==1) => 1 hier=top.t
--000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
 -000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
                 //verilator coverage_off
diff --git a/test_regress/t/t_cover_line_expr.out b/test_regress/t/t_cover_line_expr.out
index 27b905e6d..e6a1ec2b0 100644
--- a/test_regress/t/t_cover_line_expr.out
+++ b/test_regress/t/t_cover_line_expr.out
@@ -282,16 +282,16 @@
 %000000                 if (cyc[loop_var] && t2) $write("");
 -000000  point: comment=if hier=top.t
 -000000  point: comment=else hier=top.t
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==0) => 0 hier=top.t
--000000  point: comment=(cyc[loop_var[4:0]+:32'h1]]==1 && t2==1) => 1 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==0) => 0 hier=top.t
+-000000  point: comment=(cyc[loop_var[4:0]+:1]]==1 && t2==1) => 1 hier=top.t
 -000000  point: comment=(t2==0) => 0 hier=top.t
                     end
                 end
                 // stop at the first layer even if there's more to find
 %000007         if ((cyc[3+32'(t1 && t2)+:2] == cyc[5+32'(t3 || t4)+:2]) || cyc[31]) $write("");
 -000002  point: comment=else hier=top.t
--000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==0 && cyc[31]==0) => 0 hier=top.t
--000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:32'sh2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:32'sh2]])==1) => 1 hier=top.t
+-000002  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==0 && cyc[31]==0) => 0 hier=top.t
+-000007  point: comment=((cyc[(32'sh3 + (t1 && t2))[4:0]+:2]] == cyc[(32'sh5 + (t3 || t4))[4:0]+:2]])==1) => 1 hier=top.t
 -000000  point: comment=(cyc[31]==1) => 1 hier=top.t
 -000007  point: comment=if hier=top.t
                 // impossible branches and redundant terms
@@ -316,12 +316,12 @@
                 // demonstrate current limitations of term matching scheme
 %000008         if ((cyc[0] && cyc[1]) && ~(cyc[1-1] && cyc[2]) && (cyc[2-2] || cyc[3])) $write("");
 -000008  point: comment=else hier=top.t
--000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==1 && cyc[2]==1) => 0 hier=top.t
--000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==0 && cyc[3]==0) => 0 hier=top.t
+-000002  point: comment=(cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==1 && cyc[2]==1) => 0 hier=top.t
+-000003  point: comment=(cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==0 && cyc[3]==0) => 0 hier=top.t
 -000004  point: comment=(cyc[0]==0) => 0 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
--000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:32'h1]]==0 && cyc[3]==1) => 1 hier=top.t
--000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:32'h1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
+-000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[(32'sh1 - 32'sh1)[4:0]+:1]]==0 && cyc[3]==1) => 1 hier=top.t
+-000001  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[(32'sh2 - 32'sh2)[4:0]+:1]]==1) => 1 hier=top.t
 -000000  point: comment=(cyc[0]==1 && cyc[1]==1 && cyc[2]==0 && cyc[3]==1) => 1 hier=top.t
 -000005  point: comment=(cyc[1]==0) => 0 hier=top.t
 -000001  point: comment=if hier=top.t
diff --git a/test_regress/t/t_debug_emitv.out b/test_regress/t/t_debug_emitv.out
index f4a7202ff..322c8fcfb 100644
--- a/test_regress/t/t_debug_emitv.out
+++ b/test_regress/t/t_debug_emitv.out
@@ -59,7 +59,7 @@ module Vt_debug_emitv_t;
                 $write("");
             end
             if (downto_32[(ident('sh21) - 'h20)[5:0] + 32
-                +:'h1]]) begin
+                +:1]]) begin
                 $write("");
             end
             if ((| downto_32[48:40])) begin
diff --git a/test_regress/t/t_json_only_flat_vlvbound.out b/test_regress/t/t_json_only_flat_vlvbound.out
index 6200acfad..286b824e9 100644
--- a/test_regress/t/t_json_only_flat_vlvbound.out
+++ b/test_regress/t/t_json_only_flat_vlvbound.out
@@ -103,12 +103,12 @@
                 {"type":"CONST","name":"2'h0","addr":"(WC)","loc":"d,19:34,19:39","dtypep":"(XC)"}
               ],
                "rhsp": [
-                {"type":"SEL","name":"","addr":"(YC)","loc":"d,19:20,19:21","dtypep":"(XC)","declRange":"[15:0]","declElWidth":1,
+                {"type":"SEL","name":"","addr":"(YC)","loc":"d,19:20,19:21","dtypep":"(XC)","widthConst":2,"declRange":"[15:0]","declElWidth":1,
                  "fromp": [
                   {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__val","addr":"(ZC)","loc":"d,19:17,19:20","dtypep":"(H)","access":"RD","varp":"(CB)","varScopep":"(BB)","classOrPackagep":"UNLINKED"}
                 ],
                  "lsbp": [
-                  {"type":"SEL","name":"","addr":"(AD)","loc":"d,19:22,19:23","dtypep":"(BD)",
+                  {"type":"SEL","name":"","addr":"(AD)","loc":"d,19:22,19:23","dtypep":"(BD)","widthConst":4,
                    "fromp": [
                     {"type":"MULS","name":"","addr":"(CD)","loc":"d,19:22,19:23","dtypep":"(NC)",
                      "lhsp": [
@@ -120,188 +120,164 @@
                   ],
                    "lsbp": [
                     {"type":"CONST","name":"32'h0","addr":"(FD)","loc":"d,19:22,19:23","dtypep":"(GD)"}
-                  ],
-                   "widthp": [
-                    {"type":"CONST","name":"32'h4","addr":"(HD)","loc":"d,19:22,19:23","dtypep":"(GD)"}
                   ]}
-                ],
-                 "widthp": [
-                  {"type":"CONST","name":"32'sh2","addr":"(ID)","loc":"d,19:28,19:29","dtypep":"(NC)"}
                 ]}
               ]}
             ],
              "lhsp": [
-              {"type":"SEL","name":"","addr":"(JD)","loc":"d,19:10,19:11","dtypep":"(RC)","declRange":"[6:0]","declElWidth":1,
+              {"type":"SEL","name":"","addr":"(HD)","loc":"d,19:10,19:11","dtypep":"(RC)","widthConst":1,"declRange":"[6:0]","declElWidth":1,
                "fromp": [
-                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__ret","addr":"(KD)","loc":"d,19:7,19:10","dtypep":"(K)","access":"WR","varp":"(EB)","varScopep":"(DB)","classOrPackagep":"UNLINKED"}
+                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__ret","addr":"(ID)","loc":"d,19:7,19:10","dtypep":"(K)","access":"WR","varp":"(EB)","varScopep":"(DB)","classOrPackagep":"UNLINKED"}
               ],
                "lsbp": [
-                {"type":"SEL","name":"","addr":"(LD)","loc":"d,19:11,19:12","dtypep":"(MD)",
+                {"type":"SEL","name":"","addr":"(JD)","loc":"d,19:11,19:12","dtypep":"(KD)","widthConst":3,
                  "fromp": [
-                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(ND)","loc":"d,19:11,19:12","dtypep":"(GB)","access":"RD","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
+                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(LD)","loc":"d,19:11,19:12","dtypep":"(GB)","access":"RD","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
                 ],
                  "lsbp": [
-                  {"type":"CONST","name":"32'h0","addr":"(OD)","loc":"d,19:11,19:12","dtypep":"(GD)"}
-                ],
-                 "widthp": [
-                  {"type":"CONST","name":"32'h3","addr":"(PD)","loc":"d,19:11,19:12","dtypep":"(GD)"}
+                  {"type":"CONST","name":"32'h0","addr":"(MD)","loc":"d,19:11,19:12","dtypep":"(GD)"}
                 ]}
-              ],
-               "widthp": [
-                {"type":"CONST","name":"32'h1","addr":"(QD)","loc":"d,19:10,19:11","dtypep":"(GD)"}
               ]}
             ],"timingControlp": []}
           ],
            "incsp": [
-            {"type":"ASSIGN","name":"","addr":"(RD)","loc":"d,18:24,18:26","dtypep":"(GB)",
+            {"type":"ASSIGN","name":"","addr":"(ND)","loc":"d,18:24,18:26","dtypep":"(GB)",
              "rhsp": [
-              {"type":"ADD","name":"","addr":"(SD)","loc":"d,18:24,18:26","dtypep":"(GD)",
+              {"type":"ADD","name":"","addr":"(OD)","loc":"d,18:24,18:26","dtypep":"(GD)",
                "lhsp": [
-                {"type":"CONST","name":"32'h1","addr":"(TD)","loc":"d,18:24,18:26","dtypep":"(GD)"}
+                {"type":"CONST","name":"32'h1","addr":"(PD)","loc":"d,18:24,18:26","dtypep":"(GD)"}
               ],
                "rhsp": [
-                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(UD)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"RD","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
+                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(QD)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"RD","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
               ]}
             ],
              "lhsp": [
-              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(VD)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"WR","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
+              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__i","addr":"(RD)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"WR","varp":"(HB)","varScopep":"(FB)","classOrPackagep":"UNLINKED"}
             ],"timingControlp": []}
           ]},
-          {"type":"ASSIGN","name":"","addr":"(WD)","loc":"d,21:5,21:11","dtypep":"(K)",
+          {"type":"ASSIGN","name":"","addr":"(SD)","loc":"d,21:5,21:11","dtypep":"(K)",
            "rhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__ret","addr":"(XD)","loc":"d,21:12,21:15","dtypep":"(K)","access":"RD","varp":"(EB)","varScopep":"(DB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__ret","addr":"(TD)","loc":"d,21:12,21:15","dtypep":"(K)","access":"RD","varp":"(EB)","varScopep":"(DB)","classOrPackagep":"UNLINKED"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(YD)","loc":"d,21:5,21:11","dtypep":"(K)","access":"WR","varp":"(AB)","varScopep":"(Z)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(UD)","loc":"d,21:5,21:11","dtypep":"(K)","access":"WR","varp":"(AB)","varScopep":"(Z)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []},
-          {"type":"ASSIGN","name":"","addr":"(ZD)","loc":"d,24:14,24:15","dtypep":"(K)",
+          {"type":"ASSIGN","name":"","addr":"(VD)","loc":"d,24:14,24:15","dtypep":"(K)",
            "rhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(AE)","loc":"d,24:16,24:19","dtypep":"(K)","access":"RD","varp":"(AB)","varScopep":"(Z)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__0__Vfuncout","addr":"(WD)","loc":"d,24:16,24:19","dtypep":"(K)","access":"RD","varp":"(AB)","varScopep":"(Z)","classOrPackagep":"UNLINKED"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"o_a","addr":"(BE)","loc":"d,24:10,24:13","dtypep":"(K)","access":"WR","varp":"(J)","varScopep":"(T)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"o_a","addr":"(XD)","loc":"d,24:10,24:13","dtypep":"(K)","access":"WR","varp":"(J)","varScopep":"(T)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []}
         ]},
-        {"type":"ALWAYS","name":"","addr":"(CE)","loc":"d,25:14,25:15","keyword":"always","isSuspendable":false,"needProcess":false,"sensesp": [],
+        {"type":"ALWAYS","name":"","addr":"(YD)","loc":"d,25:14,25:15","keyword":"always","isSuspendable":false,"needProcess":false,"sensesp": [],
          "stmtsp": [
-          {"type":"COMMENT","name":"Function: foo","addr":"(DE)","loc":"d,25:16,25:19"},
-          {"type":"ASSIGN","name":"","addr":"(EE)","loc":"d,25:20,25:23","dtypep":"(H)",
+          {"type":"COMMENT","name":"Function: foo","addr":"(ZD)","loc":"d,25:16,25:19"},
+          {"type":"ASSIGN","name":"","addr":"(AE)","loc":"d,25:20,25:23","dtypep":"(H)",
            "rhsp": [
-            {"type":"VARREF","name":"i_b","addr":"(FE)","loc":"d,25:20,25:23","dtypep":"(H)","access":"RD","varp":"(I)","varScopep":"(S)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"i_b","addr":"(BE)","loc":"d,25:20,25:23","dtypep":"(H)","access":"RD","varp":"(I)","varScopep":"(S)","classOrPackagep":"UNLINKED"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__val","addr":"(GE)","loc":"d,15:57,15:60","dtypep":"(H)","access":"WR","varp":"(LB)","varScopep":"(KB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__val","addr":"(CE)","loc":"d,15:57,15:60","dtypep":"(H)","access":"WR","varp":"(LB)","varScopep":"(KB)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []},
-          {"type":"CRESET","name":"","addr":"(HE)","loc":"d,16:17,16:20","constructing":false,
+          {"type":"CRESET","name":"","addr":"(DE)","loc":"d,16:17,16:20","constructing":false,
            "varrefp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(IE)","loc":"d,16:17,16:20","dtypep":"(K)","access":"WR","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(EE)","loc":"d,16:17,16:20","dtypep":"(K)","access":"WR","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
           ]},
-          {"type":"CRESET","name":"","addr":"(JE)","loc":"d,17:13,17:14","constructing":false,
+          {"type":"CRESET","name":"","addr":"(FE)","loc":"d,17:13,17:14","constructing":false,
            "varrefp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(KE)","loc":"d,17:13,17:14","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(GE)","loc":"d,17:13,17:14","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
           ]},
-          {"type":"ASSIGN","name":"","addr":"(LE)","loc":"d,18:11,18:12","dtypep":"(GB)",
+          {"type":"ASSIGN","name":"","addr":"(HE)","loc":"d,18:11,18:12","dtypep":"(GB)",
            "rhsp": [
-            {"type":"CONST","name":"32'sh0","addr":"(ME)","loc":"d,18:12,18:13","dtypep":"(NC)"}
+            {"type":"CONST","name":"32'sh0","addr":"(IE)","loc":"d,18:12,18:13","dtypep":"(NC)"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(NE)","loc":"d,18:10,18:11","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(JE)","loc":"d,18:10,18:11","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []},
-          {"type":"WHILE","name":"","addr":"(OE)","loc":"d,18:5,18:8","precondsp": [],
+          {"type":"WHILE","name":"","addr":"(KE)","loc":"d,18:5,18:8","precondsp": [],
            "condp": [
-            {"type":"GTS","name":"","addr":"(PE)","loc":"d,18:18,18:19","dtypep":"(RC)",
+            {"type":"GTS","name":"","addr":"(LE)","loc":"d,18:18,18:19","dtypep":"(RC)",
              "lhsp": [
-              {"type":"CONST","name":"32'sh7","addr":"(QE)","loc":"d,18:20,18:21","dtypep":"(NC)"}
+              {"type":"CONST","name":"32'sh7","addr":"(ME)","loc":"d,18:20,18:21","dtypep":"(NC)"}
             ],
              "rhsp": [
-              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(RE)","loc":"d,18:16,18:17","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(NE)","loc":"d,18:16,18:17","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
             ]}
           ],
            "stmtsp": [
-            {"type":"ASSIGN","name":"","addr":"(SE)","loc":"d,19:14,19:15","dtypep":"(RC)",
+            {"type":"ASSIGN","name":"","addr":"(OE)","loc":"d,19:14,19:15","dtypep":"(RC)",
              "rhsp": [
-              {"type":"EQ","name":"","addr":"(TE)","loc":"d,19:31,19:33","dtypep":"(RC)",
+              {"type":"EQ","name":"","addr":"(PE)","loc":"d,19:31,19:33","dtypep":"(RC)",
                "lhsp": [
-                {"type":"CONST","name":"2'h0","addr":"(UE)","loc":"d,19:34,19:39","dtypep":"(XC)"}
+                {"type":"CONST","name":"2'h0","addr":"(QE)","loc":"d,19:34,19:39","dtypep":"(XC)"}
               ],
                "rhsp": [
-                {"type":"SEL","name":"","addr":"(VE)","loc":"d,19:20,19:21","dtypep":"(XC)","declRange":"[15:0]","declElWidth":1,
+                {"type":"SEL","name":"","addr":"(RE)","loc":"d,19:20,19:21","dtypep":"(XC)","widthConst":2,"declRange":"[15:0]","declElWidth":1,
                  "fromp": [
-                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__val","addr":"(WE)","loc":"d,19:17,19:20","dtypep":"(H)","access":"RD","varp":"(LB)","varScopep":"(KB)","classOrPackagep":"UNLINKED"}
+                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__val","addr":"(SE)","loc":"d,19:17,19:20","dtypep":"(H)","access":"RD","varp":"(LB)","varScopep":"(KB)","classOrPackagep":"UNLINKED"}
                 ],
                  "lsbp": [
-                  {"type":"SEL","name":"","addr":"(XE)","loc":"d,19:22,19:23","dtypep":"(BD)",
+                  {"type":"SEL","name":"","addr":"(TE)","loc":"d,19:22,19:23","dtypep":"(BD)","widthConst":4,
                    "fromp": [
-                    {"type":"MULS","name":"","addr":"(YE)","loc":"d,19:22,19:23","dtypep":"(NC)",
+                    {"type":"MULS","name":"","addr":"(UE)","loc":"d,19:22,19:23","dtypep":"(NC)",
                      "lhsp": [
-                      {"type":"CONST","name":"32'sh2","addr":"(ZE)","loc":"d,19:23,19:24","dtypep":"(NC)"}
+                      {"type":"CONST","name":"32'sh2","addr":"(VE)","loc":"d,19:23,19:24","dtypep":"(NC)"}
                     ],
                      "rhsp": [
-                      {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(AF)","loc":"d,19:21,19:22","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+                      {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(WE)","loc":"d,19:21,19:22","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
                     ]}
                   ],
                    "lsbp": [
-                    {"type":"CONST","name":"32'h0","addr":"(BF)","loc":"d,19:22,19:23","dtypep":"(GD)"}
-                  ],
-                   "widthp": [
-                    {"type":"CONST","name":"32'h4","addr":"(CF)","loc":"d,19:22,19:23","dtypep":"(GD)"}
+                    {"type":"CONST","name":"32'h0","addr":"(XE)","loc":"d,19:22,19:23","dtypep":"(GD)"}
                   ]}
-                ],
-                 "widthp": [
-                  {"type":"CONST","name":"32'sh2","addr":"(DF)","loc":"d,19:28,19:29","dtypep":"(NC)"}
                 ]}
               ]}
             ],
              "lhsp": [
-              {"type":"SEL","name":"","addr":"(EF)","loc":"d,19:10,19:11","dtypep":"(RC)","declRange":"[6:0]","declElWidth":1,
+              {"type":"SEL","name":"","addr":"(YE)","loc":"d,19:10,19:11","dtypep":"(RC)","widthConst":1,"declRange":"[6:0]","declElWidth":1,
                "fromp": [
-                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(FF)","loc":"d,19:7,19:10","dtypep":"(K)","access":"WR","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
+                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(ZE)","loc":"d,19:7,19:10","dtypep":"(K)","access":"WR","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
               ],
                "lsbp": [
-                {"type":"SEL","name":"","addr":"(GF)","loc":"d,19:11,19:12","dtypep":"(MD)",
+                {"type":"SEL","name":"","addr":"(AF)","loc":"d,19:11,19:12","dtypep":"(KD)","widthConst":3,
                  "fromp": [
-                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(HF)","loc":"d,19:11,19:12","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+                  {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(BF)","loc":"d,19:11,19:12","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
                 ],
                  "lsbp": [
-                  {"type":"CONST","name":"32'h0","addr":"(IF)","loc":"d,19:11,19:12","dtypep":"(GD)"}
-                ],
-                 "widthp": [
-                  {"type":"CONST","name":"32'h3","addr":"(JF)","loc":"d,19:11,19:12","dtypep":"(GD)"}
+                  {"type":"CONST","name":"32'h0","addr":"(CF)","loc":"d,19:11,19:12","dtypep":"(GD)"}
                 ]}
-              ],
-               "widthp": [
-                {"type":"CONST","name":"32'h1","addr":"(KF)","loc":"d,19:10,19:11","dtypep":"(GD)"}
               ]}
             ],"timingControlp": []}
           ],
            "incsp": [
-            {"type":"ASSIGN","name":"","addr":"(LF)","loc":"d,18:24,18:26","dtypep":"(GB)",
+            {"type":"ASSIGN","name":"","addr":"(DF)","loc":"d,18:24,18:26","dtypep":"(GB)",
              "rhsp": [
-              {"type":"ADD","name":"","addr":"(MF)","loc":"d,18:24,18:26","dtypep":"(GD)",
+              {"type":"ADD","name":"","addr":"(EF)","loc":"d,18:24,18:26","dtypep":"(GD)",
                "lhsp": [
-                {"type":"CONST","name":"32'h1","addr":"(NF)","loc":"d,18:24,18:26","dtypep":"(GD)"}
+                {"type":"CONST","name":"32'h1","addr":"(FF)","loc":"d,18:24,18:26","dtypep":"(GD)"}
               ],
                "rhsp": [
-                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(OF)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+                {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(GF)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"RD","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
               ]}
             ],
              "lhsp": [
-              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(PF)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
+              {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(HF)","loc":"d,18:23,18:24","dtypep":"(GB)","access":"WR","varp":"(PB)","varScopep":"(OB)","classOrPackagep":"UNLINKED"}
             ],"timingControlp": []}
           ]},
-          {"type":"ASSIGN","name":"","addr":"(QF)","loc":"d,21:5,21:11","dtypep":"(K)",
+          {"type":"ASSIGN","name":"","addr":"(IF)","loc":"d,21:5,21:11","dtypep":"(K)",
            "rhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(RF)","loc":"d,21:12,21:15","dtypep":"(K)","access":"RD","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(JF)","loc":"d,21:12,21:15","dtypep":"(K)","access":"RD","varp":"(NB)","varScopep":"(MB)","classOrPackagep":"UNLINKED"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__Vfuncout","addr":"(SF)","loc":"d,21:5,21:11","dtypep":"(K)","access":"WR","varp":"(JB)","varScopep":"(IB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__Vfuncout","addr":"(KF)","loc":"d,21:5,21:11","dtypep":"(K)","access":"WR","varp":"(JB)","varScopep":"(IB)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []},
-          {"type":"ASSIGN","name":"","addr":"(TF)","loc":"d,25:14,25:15","dtypep":"(K)",
+          {"type":"ASSIGN","name":"","addr":"(LF)","loc":"d,25:14,25:15","dtypep":"(K)",
            "rhsp": [
-            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__Vfuncout","addr":"(UF)","loc":"d,25:16,25:19","dtypep":"(K)","access":"RD","varp":"(JB)","varScopep":"(IB)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"__Vfunc_vlvbound_test.foo__1__Vfuncout","addr":"(MF)","loc":"d,25:16,25:19","dtypep":"(K)","access":"RD","varp":"(JB)","varScopep":"(IB)","classOrPackagep":"UNLINKED"}
           ],
            "lhsp": [
-            {"type":"VARREF","name":"o_b","addr":"(VF)","loc":"d,25:10,25:13","dtypep":"(K)","access":"WR","varp":"(L)","varScopep":"(U)","classOrPackagep":"UNLINKED"}
+            {"type":"VARREF","name":"o_b","addr":"(NF)","loc":"d,25:10,25:13","dtypep":"(K)","access":"WR","varp":"(L)","varScopep":"(U)","classOrPackagep":"UNLINKED"}
           ],"timingControlp": []}
         ]}
       ],"inlinesp": []}
@@ -324,16 +300,16 @@
     {"type":"BASICDTYPE","name":"logic","addr":"(H)","loc":"d,9:11,9:16","dtypep":"(H)","keyword":"logic","range":"15:0","generic":true,"rangep": []},
     {"type":"BASICDTYPE","name":"logic","addr":"(K)","loc":"d,11:12,11:17","dtypep":"(K)","keyword":"logic","range":"6:0","generic":true,"rangep": []},
     {"type":"BASICDTYPE","name":"integer","addr":"(GB)","loc":"d,17:5,17:12","dtypep":"(GB)","keyword":"integer","range":"31:0","generic":true,"rangep": []},
-    {"type":"BASICDTYPE","name":"logic","addr":"(MD)","loc":"d,19:10,19:11","dtypep":"(MD)","keyword":"logic","range":"2:0","generic":true,"rangep": []},
+    {"type":"BASICDTYPE","name":"logic","addr":"(KD)","loc":"d,19:10,19:11","dtypep":"(KD)","keyword":"logic","range":"2:0","generic":true,"rangep": []},
     {"type":"BASICDTYPE","name":"logic","addr":"(GD)","loc":"d,19:11,19:12","dtypep":"(GD)","keyword":"logic","range":"31:0","generic":true,"rangep": []},
     {"type":"BASICDTYPE","name":"logic","addr":"(BD)","loc":"d,19:20,19:21","dtypep":"(BD)","keyword":"logic","range":"3:0","generic":true,"rangep": []},
     {"type":"BASICDTYPE","name":"logic","addr":"(NC)","loc":"d,18:12,18:13","dtypep":"(NC)","keyword":"logic","range":"31:0","generic":true,"rangep": []}
   ]},
   {"type":"CONSTPOOL","name":"","addr":"(D)","loc":"a,0:0,0:0",
    "modulep": [
-    {"type":"MODULE","name":"@CONST-POOL@","addr":"(WF)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
+    {"type":"MODULE","name":"@CONST-POOL@","addr":"(OF)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
-      {"type":"SCOPE","name":"@CONST-POOL@","addr":"(XF)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(WF)","varsp": [],"blocksp": [],"inlinesp": []}
+      {"type":"SCOPE","name":"@CONST-POOL@","addr":"(PF)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(OF)","varsp": [],"blocksp": [],"inlinesp": []}
     ],"activesp": []}
   ]}
 ]}
diff --git a/test_regress/t/t_xml_flat_vlvbound.out b/test_regress/t/t_xml_flat_vlvbound.out
index 3864164df..9361e33ee 100644
--- a/test_regress/t/t_xml_flat_vlvbound.out
+++ b/test_regress/t/t_xml_flat_vlvbound.out
@@ -86,27 +86,23 @@
                 <assign loc="d,19,14,19,15" dtype_id="5">
                   <eq loc="d,19,31,19,33" dtype_id="5">
                     <const loc="d,19,34,19,39" name="2&apos;h0" dtype_id="6"/>
-                    <sel loc="d,19,20,19,21" dtype_id="6">
+                    <sel loc="d,19,20,19,21" dtype_id="6" widthConst="2">
                       <varref loc="d,19,17,19,20" name="__Vfunc_vlvbound_test.foo__0__val" dtype_id="1"/>
-                      <sel loc="d,19,22,19,23" dtype_id="7">
+                      <sel loc="d,19,22,19,23" dtype_id="7" widthConst="4">
                         <muls loc="d,19,22,19,23" dtype_id="4">
                           <const loc="d,19,23,19,24" name="32&apos;sh2" dtype_id="4"/>
                           <varref loc="d,19,21,19,22" name="__Vfunc_vlvbound_test.foo__0__i" dtype_id="3"/>
                         </muls>
                         <const loc="d,19,22,19,23" name="32&apos;h0" dtype_id="8"/>
-                        <const loc="d,19,22,19,23" name="32&apos;h4" dtype_id="8"/>
                       </sel>
-                      <const loc="d,19,28,19,29" name="32&apos;sh2" dtype_id="4"/>
                     </sel>
                   </eq>
-                  <sel loc="d,19,10,19,11" dtype_id="5">
+                  <sel loc="d,19,10,19,11" dtype_id="5" widthConst="1">
                     <varref loc="d,19,7,19,10" name="__Vfunc_vlvbound_test.foo__0__ret" dtype_id="2"/>
-                    <sel loc="d,19,11,19,12" dtype_id="9">
+                    <sel loc="d,19,11,19,12" dtype_id="9" widthConst="3">
                       <varref loc="d,19,11,19,12" name="__Vfunc_vlvbound_test.foo__0__i" dtype_id="3"/>
                       <const loc="d,19,11,19,12" name="32&apos;h0" dtype_id="8"/>
-                      <const loc="d,19,11,19,12" name="32&apos;h3" dtype_id="8"/>
                     </sel>
-                    <const loc="d,19,10,19,11" name="32&apos;h1" dtype_id="8"/>
                   </sel>
                 </assign>
               </begin>
@@ -158,27 +154,23 @@
                 <assign loc="d,19,14,19,15" dtype_id="5">
                   <eq loc="d,19,31,19,33" dtype_id="5">
                     <const loc="d,19,34,19,39" name="2&apos;h0" dtype_id="6"/>
-                    <sel loc="d,19,20,19,21" dtype_id="6">
+                    <sel loc="d,19,20,19,21" dtype_id="6" widthConst="2">
                       <varref loc="d,19,17,19,20" name="__Vfunc_vlvbound_test.foo__1__val" dtype_id="1"/>
-                      <sel loc="d,19,22,19,23" dtype_id="7">
+                      <sel loc="d,19,22,19,23" dtype_id="7" widthConst="4">
                         <muls loc="d,19,22,19,23" dtype_id="4">
                           <const loc="d,19,23,19,24" name="32&apos;sh2" dtype_id="4"/>
                           <varref loc="d,19,21,19,22" name="__Vfunc_vlvbound_test.foo__1__i" dtype_id="3"/>
                         </muls>
                         <const loc="d,19,22,19,23" name="32&apos;h0" dtype_id="8"/>
-                        <const loc="d,19,22,19,23" name="32&apos;h4" dtype_id="8"/>
                       </sel>
-                      <const loc="d,19,28,19,29" name="32&apos;sh2" dtype_id="4"/>
                     </sel>
                   </eq>
-                  <sel loc="d,19,10,19,11" dtype_id="5">
+                  <sel loc="d,19,10,19,11" dtype_id="5" widthConst="1">
                     <varref loc="d,19,7,19,10" name="__Vfunc_vlvbound_test.foo__1__ret" dtype_id="2"/>
-                    <sel loc="d,19,11,19,12" dtype_id="9">
+                    <sel loc="d,19,11,19,12" dtype_id="9" widthConst="3">
                       <varref loc="d,19,11,19,12" name="__Vfunc_vlvbound_test.foo__1__i" dtype_id="3"/>
                       <const loc="d,19,11,19,12" name="32&apos;h0" dtype_id="8"/>
-                      <const loc="d,19,11,19,12" name="32&apos;h3" dtype_id="8"/>
                     </sel>
-                    <const loc="d,19,10,19,11" name="32&apos;h1" dtype_id="8"/>
                   </sel>
                 </assign>
               </begin>

From f9f70383fa2c00742565ee4f4e9aaab7c6640a8a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 24 Jun 2025 17:29:44 -0400
Subject: [PATCH 160/211] Fix instability in non-data type internal error

---
 src/V3LinkDot.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 92d9154b9..e93f321e0 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2611,8 +2611,10 @@ class LinkDotResolveVisitor final : public VNVisitor {
         if (oldp->wouldBreak(newp)) {
             newp->v3error(
                 "Data type used where a non-data type is expected: " << newp->prettyNameQ());
+            oldp->replaceWith(new AstConst{newp->fileline(), AstConst::BitFalse{}});
+        } else {
+            oldp->replaceWith(newp);
         }
-        oldp->replaceWith(newp);
     }
 
     // Marks the current module to be revisited after the initial AST iteration

From 6af694b04b6d84c23da077f84f77d317f7ce571a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 24 Jun 2025 17:30:05 -0400
Subject: [PATCH 161/211] Support `$timeformat` with missing arguments (#6113).

---
 Changes                           |  1 +
 include/verilated.cpp             | 11 ++++++-----
 include/verilated_funcs.h         |  3 ++-
 src/V3AstNodeOther.h              |  8 ++++----
 src/V3EmitCFunc.h                 | 28 ++++++++++++++++++++++++----
 src/V3Width.cpp                   |  9 +++++----
 src/verilog.y                     |  8 +++++++-
 test_regress/t/t_display_time.out |  5 +++++
 test_regress/t/t_display_time.v   | 15 +++++++++++++++
 9 files changed, 69 insertions(+), 19 deletions(-)

diff --git a/Changes b/Changes
index 5120975d3..4e1f71fe7 100644
--- a/Changes
+++ b/Changes
@@ -18,6 +18,7 @@ Verilator 5.037 devel
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
+* Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
 * Support parameter forward types.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
diff --git a/include/verilated.cpp b/include/verilated.cpp
index a1e6975a0..eb59da7fa 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -2567,12 +2567,13 @@ void VL_PRINTTIMESCALE(const char* namep, const char* timeunitp,
     VL_PRINTF_MT("Time scale of %s is %s / %s\n", namep, timeunitp,
                  contextp->timeprecisionString());
 }
-void VL_TIMEFORMAT_IINI(int units, int precision, const std::string& suffix, int width,
+void VL_TIMEFORMAT_IINI(bool hasUnits, int units, bool hasPrecision, int precision, bool hasSuffix,
+                        const std::string& suffix, bool hasWidth, int width,
                         VerilatedContext* contextp) VL_MT_SAFE {
-    contextp->impp()->timeFormatUnits(units);
-    contextp->impp()->timeFormatPrecision(precision);
-    contextp->impp()->timeFormatSuffix(suffix);
-    contextp->impp()->timeFormatWidth(width);
+    if (hasUnits) contextp->impp()->timeFormatUnits(units);
+    if (hasPrecision) contextp->impp()->timeFormatPrecision(precision);
+    if (hasSuffix) contextp->impp()->timeFormatSuffix(suffix);
+    if (hasWidth) contextp->impp()->timeFormatWidth(width);
 }
 
 //======================================================================
diff --git a/include/verilated_funcs.h b/include/verilated_funcs.h
index e62e9f172..03b3ed685 100644
--- a/include/verilated_funcs.h
+++ b/include/verilated_funcs.h
@@ -2800,7 +2800,8 @@ extern IData VL_SSCANF_INNX(int lbits, const std::string& ld, const std::string&
 extern void VL_SFORMAT_NX(int obits_ignored, std::string& output, const std::string& format,
                           int argc, ...) VL_MT_SAFE;
 extern std::string VL_SFORMATF_N_NX(const std::string& format, int argc, ...) VL_MT_SAFE;
-extern void VL_TIMEFORMAT_IINI(int units, int precision, const std::string& suffix, int width,
+extern void VL_TIMEFORMAT_IINI(bool hasUnits, int units, bool hasPrecision, int precision,
+                               bool hasSuffix, const std::string& suffix, bool hasWidth, int width,
                                VerilatedContext* contextp) VL_MT_SAFE;
 extern IData VL_VALUEPLUSARGS_INW(int rbits, const std::string& ld, WDataOutP rwp) VL_MT_SAFE;
 inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, CData& rdr) VL_MT_SAFE {
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index af08c34e6..6dfe7d32e 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -3490,10 +3490,10 @@ public:
 };
 class AstTimeFormat final : public AstNodeStmt {
     // Parents: stmtlist
-    // @astgen op1 := unitsp : AstNodeExpr
-    // @astgen op2 := precisionp : AstNodeExpr
-    // @astgen op3 := suffixp : AstNodeExpr
-    // @astgen op4 := widthp : AstNodeExpr
+    // @astgen op1 := unitsp : Optional[AstNodeExpr]
+    // @astgen op2 := precisionp : Optional[AstNodeExpr]
+    // @astgen op3 := suffixp : Optional[AstNodeExpr]
+    // @astgen op4 := widthp : Optional[AstNodeExpr]
 public:
     AstTimeFormat(FileLine* fl, AstNodeExpr* unitsp, AstNodeExpr* precisionp, AstNodeExpr* suffixp,
                   AstNodeExpr* widthp)
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index 99cc3a259..a5bc9f002 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -1083,13 +1083,33 @@ public:
     }
     void visit(AstTimeFormat* nodep) override {
         putns(nodep, "VL_TIMEFORMAT_IINI(");
-        iterateAndNextConstNull(nodep->unitsp());
+        if (nodep->unitsp()) {
+            puts("true, ");
+            iterateAndNextConstNull(nodep->unitsp());
+        } else {
+            puts("false, 0");
+        }
         puts(", ");
-        iterateAndNextConstNull(nodep->precisionp());
+        if (nodep->precisionp()) {
+            puts("true, ");
+            iterateAndNextConstNull(nodep->precisionp());
+        } else {
+            puts("false, 0");
+        }
         puts(", ");
-        emitCvtPackStr(nodep->suffixp());
+        if (nodep->suffixp()) {
+            puts("true, ");
+            emitCvtPackStr(nodep->suffixp());
+        } else {
+            puts("false, \"\"");
+        }
         puts(", ");
-        iterateAndNextConstNull(nodep->widthp());
+        if (nodep->widthp()) {
+            puts("true, ");
+            iterateAndNextConstNull(nodep->widthp());
+        } else {
+            puts("false, 0");
+        }
         puts(", vlSymsp->_vm_contextp__);\n");
     }
     void visit(AstTimePrecision* nodep) override {
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 048480fb9..aa4fff739 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -5718,10 +5718,11 @@ class WidthVisitor final : public VNVisitor {
     }
     void visit(AstTimeFormat* nodep) override {
         assertAtStatement(nodep);
-        iterateCheckSigned32(nodep, "units", nodep->unitsp(), BOTH);
-        iterateCheckSigned32(nodep, "precision", nodep->precisionp(), BOTH);
-        iterateCheckString(nodep, "suffix", nodep->suffixp(), BOTH);
-        iterateCheckSigned32(nodep, "width", nodep->widthp(), BOTH);
+        if (nodep->unitsp()) iterateCheckSigned32(nodep, "units", nodep->unitsp(), BOTH);
+        if (nodep->precisionp())
+            iterateCheckSigned32(nodep, "precision", nodep->precisionp(), BOTH);
+        if (nodep->suffixp()) iterateCheckString(nodep, "suffix", nodep->suffixp(), BOTH);
+        if (nodep->widthp()) iterateCheckSigned32(nodep, "width", nodep->widthp(), BOTH);
     }
     void visit(AstUCStmt* nodep) override {
         // Just let all arguments seek their natural sizes
diff --git a/src/verilog.y b/src/verilog.y
index 3e4ed1251..fc3dc5224 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -4362,8 +4362,14 @@ system_t_call<nodeStmtp>:       // IEEE: system_tf_call (as task)
         |       yD_PRINTTIMESCALE                       { $$ = new AstPrintTimeScale{$1}; }
         |       yD_PRINTTIMESCALE '(' ')'               { $$ = new AstPrintTimeScale{$1}; }
         |       yD_PRINTTIMESCALE '(' idClassSel ')'    { $$ = new AstPrintTimeScale{$1}; DEL($3); }
-        |       yD_TIMEFORMAT '(' expr ',' expr ',' expr ',' expr ')'
+        |       yD_TIMEFORMAT '(' exprE ',' exprE ',' exprE ',' exprE ')'
                         { $$ = new AstTimeFormat{$1, $3, $5, $7, $9}; }
+        |       yD_TIMEFORMAT '(' exprE ',' exprE ',' exprE ')'
+                        { $$ = new AstTimeFormat{$1, $3, $5, $7, nullptr}; }
+        |       yD_TIMEFORMAT '(' exprE ',' exprE ')'
+                        { $$ = new AstTimeFormat{$1, $3, $5, nullptr, nullptr}; }
+        |       yD_TIMEFORMAT '(' exprE ')'
+                        { $$ = new AstTimeFormat{$1, $3, nullptr, nullptr, nullptr}; }
         //
         |       yD_READMEMB '(' expr ',' idClassSel ')'                         { $$ = new AstReadMem{$1, false, $3, $5, nullptr, nullptr}; }
         |       yD_READMEMB '(' expr ',' idClassSel ',' expr ')'                { $$ = new AstReadMem{$1, false, $3, $5, $7, nullptr}; }
diff --git a/test_regress/t/t_display_time.out b/test_regress/t/t_display_time.out
index 9f28e2cd5..93b8a3cb5 100644
--- a/test_regress/t/t_display_time.out
+++ b/test_regress/t/t_display_time.out
@@ -3,5 +3,10 @@ default:   [10] 0t time [                  10] No0 time  p=                  10
 -9,0,,10:  [10] 0t time [        10] No0 time  p=                  10 0p='ha
 -9,0,ns,5: [10ns] 0t time [ 10ns] No0 time  p=                  10 0p='ha
 -9,3,ns,8: [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
+-9,3,ns  : [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
+-9,3:      [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
+-9:        [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
+:          [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
+-9,,,:     [10.000ns] 0t time [10.000ns] No0 time  p=                  10 0p='ha
 
 *-* All Finished *-*
diff --git a/test_regress/t/t_display_time.v b/test_regress/t/t_display_time.v
index 72b84a94c..f5d4c75da 100644
--- a/test_regress/t/t_display_time.v
+++ b/test_regress/t/t_display_time.v
@@ -30,6 +30,21 @@ module t (/*AUTOARG*/
          $timeformat(-9, 3, "ns", 8);
          $write("-9,3,ns,8: [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
                 $time, $time, $time, $time);
+         $timeformat(-9, 3, "ns");
+         $write("-9,3,ns  : [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
+                $time, $time, $time, $time);
+         $timeformat(-9, 3);
+         $write("-9,3:      [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
+                $time, $time, $time, $time);
+         $timeformat(-9);
+         $write("-9:        [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
+                $time, $time, $time, $time);
+         $timeformat();
+         $write(":          [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
+                $time, $time, $time, $time);
+         $timeformat(-9,,,);
+         $write("-9,,,:     [%0t] 0t time [%t] No0 time  p=%p 0p=%0p\n",
+                $time, $time, $time, $time);
          $write("\n");
          $write("*-* All Finished *-*\n");
          $finish;

From 51545b36cac3281607631a735fd9413598f7b345 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 24 Jun 2025 17:58:55 -0400
Subject: [PATCH 162/211] Internals: Add format-make rule and standardize
 Makefile indents. No functional change intended.

---
 .bake.toml                            |  30 ++
 Makefile.in                           | 203 +++++++-------
 docs/Makefile                         |   2 +-
 examples/cmake_hello_c/Makefile       |  30 +-
 examples/cmake_hello_sc/Makefile      |  60 ++--
 examples/cmake_protect_lib/Makefile   |  30 +-
 examples/cmake_tracing_c/Makefile     |  30 +-
 examples/cmake_tracing_sc/Makefile    |  60 ++--
 examples/json_py/Makefile             |  10 +-
 examples/make_hello_binary/Makefile   |   8 +-
 examples/make_hello_c/Makefile        |   8 +-
 examples/make_hello_sc/Makefile       |  12 +-
 examples/make_protect_lib/Makefile    |   9 +-
 examples/make_tracing_c/Makefile      |  12 +-
 examples/make_tracing_c/Makefile_obj  |   4 +-
 examples/make_tracing_sc/Makefile     |  16 +-
 examples/make_tracing_sc/Makefile_obj |   4 +-
 include/verilated.mk.in               |  88 +++---
 src/Makefile.in                       |  16 +-
 src/Makefile_obj.in                   | 384 +++++++++++++-------------
 test_regress/Makefile                 |  13 +-
 21 files changed, 535 insertions(+), 494 deletions(-)
 create mode 100644 .bake.toml

diff --git a/.bake.toml b/.bake.toml
new file mode 100644
index 000000000..414bc7b5e
--- /dev/null
+++ b/.bake.toml
@@ -0,0 +1,30 @@
+# mbake configuration file
+
+[formatter]
+# Indentation settings
+use_tabs = true
+tab_width = 2
+
+# Spacing settings
+space_around_assignment = true
+space_before_colon = false
+space_after_colon = true
+
+# Line continuation settings
+normalize_line_continuations = true
+max_line_length = 100
+
+# PHONY settings
+group_phony_declarations = false
+phony_at_top = false
+auto_insert_phony_declarations = false
+
+# General settings
+remove_trailing_whitespace = true
+ensure_final_newline = true
+normalize_empty_lines = true
+max_consecutive_empty_lines = 2
+
+# Global settings
+debug = false
+verbose = false
diff --git a/Makefile.in b/Makefile.in
index 88a239a6f..9b227e719 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -104,45 +104,45 @@ PACKAGE_VERSION = @PACKAGE_VERSION@
 SHELL = /bin/sh
 
 SUBDIRS = docs src test_regress \
-	examples/cmake_hello_c \
-	examples/cmake_hello_sc \
-	examples/cmake_tracing_c \
-	examples/cmake_tracing_sc \
-	examples/cmake_protect_lib \
-	examples/make_hello_binary \
-	examples/make_hello_c \
-	examples/make_hello_sc \
-	examples/make_tracing_c \
-	examples/make_tracing_sc \
-	examples/make_protect_lib \
-	examples/json_py \
+  examples/cmake_hello_c \
+  examples/cmake_hello_sc \
+  examples/cmake_tracing_c \
+  examples/cmake_tracing_sc \
+  examples/cmake_protect_lib \
+  examples/make_hello_binary \
+  examples/make_hello_c \
+  examples/make_hello_sc \
+  examples/make_tracing_c \
+  examples/make_tracing_sc \
+  examples/make_protect_lib \
+  examples/json_py \
 
 INFOS = verilator.html verilator.pdf
 
 INFOS_OLD = README README.html README.pdf
 
 EXAMPLES_FIRST = \
-	examples/make_hello_c \
-	examples/make_hello_sc \
+  examples/make_hello_c \
+  examples/make_hello_sc \
 
 EXAMPLES = $(EXAMPLES_FIRST) $(filter-out $(EXAMPLES_FIRST), $(sort $(wildcard examples/*)))
 
 # See uninstall also - don't put wildcards in this variable, it might uninstall other stuff
 # No verilator_ccache_report.1, verilator_difftree.1 as those are not bin/ installed
 VL_INST_MAN_FILES = \
-	verilator.1 \
-	verilator_coverage.1 \
-	verilator_gantt.1 \
-	verilator_profcfunc.1 \
+  verilator.1 \
+  verilator_coverage.1 \
+  verilator_gantt.1 \
+  verilator_profcfunc.1 \
 
 default: all
 all: all_nomsg msg_test
 all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
 
-.PHONY:verilator_exe
-.PHONY:verilator_bin$(EXEEXT)
-.PHONY:verilator_bin_dbg$(EXEEXT)
-.PHONY:verilator_coverage_bin_dbg$(EXEEXT)
+.PHONY: verilator_exe
+.PHONY: verilator_bin$(EXEEXT)
+.PHONY: verilator_bin_dbg$(EXEEXT)
+.PHONY: verilator_coverage_bin_dbg$(EXEEXT)
 verilator_exe verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_coverage_bin_dbg$(EXEEXT):
 	@echo ------------------------------------------------------------
 	@echo "making verilator in src"
@@ -151,7 +151,7 @@ verilator_exe verilator_bin$(EXEEXT) verilator_bin_dbg$(EXEEXT) verilator_covera
 ######################################################################
 # Tests
 
-.PHONY:msg_test
+.PHONY: msg_test
 msg_test: all_nomsg
 	@echo "Build complete!"
 	@echo
@@ -213,8 +213,8 @@ verilator.html:
 verilator.pdf: Makefile
 	$(MAKE) -C docs verilator.pdf
 
-TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
-	${srcdir}/*.in ${srcdir}/*.pod
+TAGFILES = ${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/*.in \
+  ${srcdir}/*.in ${srcdir}/*.pod
 
 TAGS: $(TAGFILES)
 	etags $(TAGFILES)
@@ -228,43 +228,45 @@ doxygen:
 spelling:
 	$(MAKE) -C docs spelling
 
-
 ######################################################################
 # Install
 
 # Public executables intended to be invoked directly by the user
 # Don't put wildcards in these variables, it might cause an uninstall of other stuff
-VL_INST_PUBLIC_SCRIPT_FILES = verilator \
-                              verilator_coverage \
-                              verilator_gantt \
-                              verilator_profcfunc \
+VL_INST_PUBLIC_SCRIPT_FILES = \
+  verilator \
+  verilator_coverage \
+  verilator_gantt \
+  verilator_profcfunc \
 
-VL_INST_PUBLIC_BIN_FILES = verilator_bin$(EXEEXT) \
-                           verilator_bin_dbg$(EXEEXT) \
-                           verilator_coverage_bin_dbg$(EXEEXT) \
+VL_INST_PUBLIC_BIN_FILES = \
+  verilator_bin$(EXEEXT) \
+  verilator_bin_dbg$(EXEEXT) \
+  verilator_coverage_bin_dbg$(EXEEXT) \
 
 # Private executabels intended to be invoked by internals
 # Don't put wildcards in these variables, it might cause an uninstall of other stuff
-VL_INST_PRIVATE_SCRIPT_FILES = verilator_ccache_report \
-                               verilator_includer \
+VL_INST_PRIVATE_SCRIPT_FILES = \
+  verilator_ccache_report \
+  verilator_includer \
 
 VL_INST_INC_BLDDIR_FILES = \
-	include/verilated_config.h \
-	include/verilated.mk \
+  include/verilated_config.h \
+  include/verilated.mk \
 
 # Files under srcdir, instead of build time
 VL_INST_INC_SRCDIR_FILES = \
-	include/*.[chv]* \
-	include/*.vlt \
-	include/*.sv \
-	include/gtkwave/*.[chv]* \
-	include/vltstd/*.[chv]* \
+  include/*.[chv]* \
+  include/*.vlt \
+  include/*.sv \
+  include/gtkwave/*.[chv]* \
+  include/vltstd/*.[chv]* \
 
 VL_INST_DATA_SRCDIR_FILES = \
-	examples/*/*.[chv]* \
-	examples/*/CMakeLists.txt \
-	examples/*/Makefile* \
-	examples/*/vl_* \
+  examples/*/*.[chv]* \
+  examples/*/CMakeLists.txt \
+  examples/*/Makefile* \
+  examples/*/vl_* \
 
 mkbindirs:
 	$(MKINSTALLDIRS) $(DESTDIR)$(pkgdatadir)/bin
@@ -400,19 +402,20 @@ CPPCHECK6_CPP = $(wildcard $(srcdir)/src/V3[P-Z]*.cpp)
 CPPCHECK7_CPP = $(wildcard $(srcdir)/src/V3[L-R]*.cpp)
 CPPCHECK8_CPP = $(wildcard $(srcdir)/src/V3[S-Z]*.cpp)
 CHECK_CPP = $(CPPCHECK1_CPP) $(CPPCHECK2_CPP) $(CPPCHECK3_CPP) $(CPPCHECK4_CPP) \
-	$(CPPCHECK5_CPP) $(CPPCHECK6_CPP) $(CPPCHECK7_CPP) $(CPPCHECK8_CPP)
+  $(CPPCHECK5_CPP) $(CPPCHECK6_CPP) $(CPPCHECK7_CPP) $(CPPCHECK8_CPP)
 CHECK_H = $(wildcard \
-	$(srcdir)/include/*.h \
-	$(srcdir)/src/*.h )
+  $(srcdir)/include/*.h \
+  $(srcdir)/src/*.h )
 CHECK_YL = $(wildcard \
-	$(srcdir)/src/*.y \
-	$(srcdir)/src/*.l )
+  $(srcdir)/src/*.y \
+  $(srcdir)/src/*.l )
 CPPCHECK = src/cppcheck_filtered cppcheck
 CPPCHECK_FLAGS = --enable=all --inline-suppr \
-	--suppress=cstyleCast --suppress=useInitializationList \
-	--suppress=nullPointer --suppress=nullPointerRedundantCheck --suppress=ctunullpointer \
-	--suppress=unusedFunction --suppress=unusedScopedObject \
-	--suppress=useStlAlgorithm
+  --suppress=cstyleCast --suppress=useInitializationList \
+  --suppress=nullPointer --suppress=nullPointerRedundantCheck --suppress=ctunullpointer \
+  --suppress=unusedFunction --suppress=unusedScopedObject \
+  --suppress=useStlAlgorithm \
+
 CPPCHECK_FLAGS += --xml
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP))
 CPPCHECK_INC = -I$(srcdir)/include -I$(srcdir)/include/gtkwave -I$(srcdir)/include/vltstd -I$(srcdir)/src/obj_dbg -I$(srcdir)/src
@@ -437,8 +440,8 @@ cppcheck-8:
 
 CLANGTIDY = clang-tidy
 CLANGTIDY_FLAGS = -config='' \
-	-header-filter='.*' \
-	-checks='-fuchsia-*,-cppcoreguidelines-avoid-c-arrays,-cppcoreguidelines-init-variables,-cppcoreguidelines-avoid-goto,-modernize-avoid-c-arrays,-readability-magic-numbers,-readability-simplify-boolean-expr,-cppcoreguidelines-macro-usage' \
+  -header-filter='.*' \
+  -checks='-fuchsia-*,-cppcoreguidelines-avoid-c-arrays,-cppcoreguidelines-init-variables,-cppcoreguidelines-avoid-goto,-modernize-avoid-c-arrays,-readability-magic-numbers,-readability-simplify-boolean-expr,-cppcoreguidelines-macro-usage' \
 
 CLANGTIDY_DEP = $(subst .cpp,.cpp.tidy,$(CHECK_CPP))
 CLANGTIDY_DEFS = -DVL_DEBUG=1 -DVL_CPPCHECK=1
@@ -476,50 +479,58 @@ yamlfix:
 
 # CMake files
 CMAKE_FILES = \
-	CMakeLists.txt \
-	examples/*/CMakeLists.txt \
-	src/CMakeLists.txt \
-	test_regress/CMakeLists.txt \
-	*.cmake.in \
+  CMakeLists.txt \
+  examples/*/CMakeLists.txt \
+  src/CMakeLists.txt \
+  test_regress/CMakeLists.txt \
+  *.cmake.in \
+
+# Makefiles
+MAKE_FILES = \
+  Makefile*.in \
+  docs/Makefile* \
+  include/verilated.mk.in \
+  examples/*/Makefile* \
+  src/Makefile*.in \
+  test_regress/Makefile* \
 
 # Python programs, subject to format and lint
 PY_PROGRAMS = \
-	bin/verilator_ccache_report \
-	bin/verilator_difftree \
-	bin/verilator_gantt \
-	bin/verilator_includer \
-	bin/verilator_profcfunc \
-	examples/json_py/vl_file_copy \
-	examples/json_py/vl_hier_graph \
-	docs/guide/conf.py \
-	docs/bin/vl_sphinx_extract \
-	docs/bin/vl_sphinx_fix \
-	src/astgen \
-	src/bisonpre \
-	src/config_rev \
-	src/cppcheck_filtered \
-	src/flexfix \
-	src/vlcovgen \
-	src/.gdbinit.py \
-	test_regress/*.py \
-	test_regress/t/*.pf \
-	nodist/clang_check_attributes \
-	nodist/code_coverage \
-	nodist/dot_importer \
-	nodist/fuzzer/actual_fail \
-	nodist/fuzzer/generate_dictionary \
-	nodist/install_test \
-	nodist/log_changes \
+  bin/verilator_ccache_report \
+  bin/verilator_difftree \
+  bin/verilator_gantt \
+  bin/verilator_includer \
+  bin/verilator_profcfunc \
+  examples/json_py/vl_file_copy \
+  examples/json_py/vl_hier_graph \
+  docs/guide/conf.py \
+  docs/bin/vl_sphinx_extract \
+  docs/bin/vl_sphinx_fix \
+  src/astgen \
+  src/bisonpre \
+  src/config_rev \
+  src/cppcheck_filtered \
+  src/flexfix \
+  src/vlcovgen \
+  src/.gdbinit.py \
+  test_regress/*.py \
+  test_regress/t/*.pf \
+  nodist/clang_check_attributes \
+  nodist/code_coverage \
+  nodist/dot_importer \
+  nodist/fuzzer/actual_fail \
+  nodist/fuzzer/generate_dictionary \
+  nodist/install_test \
+  nodist/log_changes \
 
 # Python files, subject to format but not lint
 PY_FILES = \
-	$(PY_PROGRAMS) \
-	nodist/code_coverage.dat \
-	test_regress/t/*.py \
+  $(PY_PROGRAMS) \
+  nodist/code_coverage.dat \
+  test_regress/t/*.py \
 
 # Python files, test_regress tests
-PY_TEST_FILES = \
-	test_regress/t/*.py \
+PY_TEST_FILES = test_regress/t/*.py
 
 YAPF = yapf3
 YAPF_FLAGS = -i --parallel
@@ -533,6 +544,12 @@ GERSEMI_FLAGS = -i
 format-cmake:
 	$(GERSEMI) $(GERSEMI_FLAGS) $(CMAKE_FILES)
 
+MBAKE = mbake
+MBAKE_FLAGS = format --config ./.bake.toml
+
+format-make:
+	$(MBAKE) $(MBAKE_FLAGS) $(MAKE_FILES)
+
 format-yaml: yamlfix
 
 PYLINT = pylint
diff --git a/docs/Makefile b/docs/Makefile
index a0d42140b..98b2f47d8 100644
--- a/docs/Makefile
+++ b/docs/Makefile
@@ -25,7 +25,7 @@ BUILDDIR = _build
 
 SPHINXOPTS ?= -c guide -j 4
 ifneq ($(VERILATOR_ANALYTICS_ID),)
-SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
+  SPHINXOPTS += -D html_theme_options.analytics_id=$(VERILATOR_ANALYTICS_ID)
 endif
 
 ######################################################################
diff --git a/examples/cmake_hello_c/Makefile b/examples/cmake_hello_c/Makefile
index 584c55a03..a6bb88304 100644
--- a/examples/cmake_hello_c/Makefile
+++ b/examples/cmake_hello_c/Makefile
@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)
diff --git a/examples/cmake_hello_sc/Makefile b/examples/cmake_hello_sc/Makefile
index 7a7e2b64d..df2a9bd52 100644
--- a/examples/cmake_hello_sc/Makefile
+++ b/examples/cmake_hello_sc/Makefile
@@ -20,46 +20,44 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-	TARGET := nocmake
-else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifneq ($(CMAKE_GT_3_8),true)
-TARGET := oldcmake
+  TARGET := nocmake
 else
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifneq ($(CMAKE_GT_3_8),true)
+    TARGET := oldcmake
+  else
+    # Check if SC exists via a verilator call (empty if not)
+    SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
-# Check if SC exists via a verilator call (empty if not)
-SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
+    # Test whether SystemC is installed with CMake support
+    # This will print a CMake error about processing arguments that can (currently) be ignored.
+    ifneq (,$(SYSTEMC_EXISTS))
+      FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+      ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+        SYSTEMC_SET := true
+      endif
+    endif
 
-# Test whether SystemC is installed with CMake support
-# This will print a CMake error about processing arguments that can (currently) be ignored.
-ifneq (,$(SYSTEMC_EXISTS))
-FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
-ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
-SYSTEMC_SET := true
-endif
-endif
-
-ifeq ($(SYSTEMC_SET), true)
-TARGET := run
-else
-TARGET := nosc
-endif
-
-endif
+    ifeq ($(SYSTEMC_SET), true)
+      TARGET := run
+    else
+      TARGET := nosc
+    endif
+  endif
 endif
 
 default: $(TARGET)
diff --git a/examples/cmake_protect_lib/Makefile b/examples/cmake_protect_lib/Makefile
index 6bec54bf3..e33a41038 100644
--- a/examples/cmake_protect_lib/Makefile
+++ b/examples/cmake_protect_lib/Makefile
@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)
diff --git a/examples/cmake_tracing_c/Makefile b/examples/cmake_tracing_c/Makefile
index 220ec52fb..4a14fbc1e 100644
--- a/examples/cmake_tracing_c/Makefile
+++ b/examples/cmake_tracing_c/Makefile
@@ -20,28 +20,28 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-TARGET := nocmake
+  TARGET := nocmake
 else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifeq ($(CMAKE_GT_3_8),true)
-TARGET := run
-else
-TARGET := oldcmake
-endif
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifeq ($(CMAKE_GT_3_8),true)
+    TARGET := run
+  else
+    TARGET := oldcmake
+  endif
 endif
 
 default: $(TARGET)
diff --git a/examples/cmake_tracing_sc/Makefile b/examples/cmake_tracing_sc/Makefile
index b479eddf8..2346cfebd 100644
--- a/examples/cmake_tracing_sc/Makefile
+++ b/examples/cmake_tracing_sc/Makefile
@@ -20,46 +20,44 @@
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 ######################################################################
 
 # Check if CMake is installed and of correct version
 ifeq ($(shell which cmake),)
-	TARGET := nocmake
-else
-CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
-CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
-CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
-CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
-ifneq ($(CMAKE_GT_3_8),true)
-TARGET := oldcmake
+  TARGET := nocmake
 else
+  CMAKE_VERSION := $(shell cmake --version | grep -o '[0-9][.0-9]\+')
+  CMAKE_MAJOR := $(shell echo $(CMAKE_VERSION) | cut -f1 -d.)
+  CMAKE_MINOR := $(shell echo $(CMAKE_VERSION) | cut -f2 -d.)
+  CMAKE_GT_3_8 := $(shell [ $(CMAKE_MAJOR) -gt 3 -o \( $(CMAKE_MAJOR) -eq 3 -a $(CMAKE_MINOR) -ge 8 \) ] && echo true)
+  ifneq ($(CMAKE_GT_3_8),true)
+    TARGET := oldcmake
+  else
+    # Check if SC exists via a verilator call (empty if not)
+    SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
-# Check if SC exists via a verilator call (empty if not)
-SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
+    # Test whether SystemC is installed with CMake support
+    # This will print a CMake error about processing arguments that can (currently) be ignored.
+    ifneq (,$(SYSTEMC_EXISTS))
+      FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
+      ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
+        SYSTEMC_SET := true
+      endif
+    endif
 
-# Test whether SystemC is installed with CMake support
-# This will print a CMake error about processing arguments that can (currently) be ignored.
-ifneq (,$(SYSTEMC_EXISTS))
-FINDSC := $(shell mkdir -p build && cd build && cmake --find-package -DNAME=SystemCLanguage -DCMAKE_USE_PTHREADS_INIT=ON -DCOMPILER_ID=GNU -DLANGUAGE=CXX -DMODE=EXIST -DThreads_FOUND=ON)
-ifneq (,$(findstring SystemCLanguage found,$(FINDSC)))
-SYSTEMC_SET := true
-endif
-endif
-
-ifeq ($(SYSTEMC_SET), true)
-TARGET := run
-else
-TARGET := nosc
-endif
-
-endif
+    ifeq ($(SYSTEMC_SET), true)
+      TARGET := run
+    else
+      TARGET := nosc
+    endif
+  endif
 endif
 
 default: $(TARGET)
diff --git a/examples/json_py/Makefile b/examples/json_py/Makefile
index 1a6f5cd38..0f530185e 100644
--- a/examples/json_py/Makefile
+++ b/examples/json_py/Makefile
@@ -15,10 +15,10 @@
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 DOT = dot
@@ -31,9 +31,9 @@ PYTHON_VERSION_MINOR := $(word 2,${PYTHON_VERSION_FULL})
 PYTHON_GE_3_5 := $(shell [ ${PYTHON_VERSION_MAJOR} -eq 3 -a ${PYTHON_VERSION_MINOR} -ge 5 ] && echo true)
 
 ifeq (${PYTHON_GE_3_5},true)
-default: test
+  default: test
 else
-default: python_message
+  default: python_message
 endif
 
 python_message:
diff --git a/examples/make_hello_binary/Makefile b/examples/make_hello_binary/Makefile
index 19bec2dd0..476d4829a 100644
--- a/examples/make_hello_binary/Makefile
+++ b/examples/make_hello_binary/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,10 +26,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 default:
diff --git a/examples/make_hello_c/Makefile b/examples/make_hello_c/Makefile
index 98ce3a67e..95f2d3ca6 100644
--- a/examples/make_hello_c/Makefile
+++ b/examples/make_hello_c/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,10 +26,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 default:
diff --git a/examples/make_hello_sc/Makefile b/examples/make_hello_sc/Makefile
index 20a26d034..20ee646f4 100644
--- a/examples/make_hello_sc/Makefile
+++ b/examples/make_hello_sc/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -26,19 +26,19 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 # Check if SC exists via a verilator call (empty if not)
 SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 
 ifneq ($(SYSTEMC_EXISTS),)
-default: run
+  default: run
 else
-default: nosc
+  default: nosc
 endif
 
 run:
diff --git a/examples/make_protect_lib/Makefile b/examples/make_protect_lib/Makefile
index 5628db9c6..f4cc7a0b0 100644
--- a/examples/make_protect_lib/Makefile
+++ b/examples/make_protect_lib/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,10 +23,10 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
+  VERILATOR = verilator
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
 endif
 
 VERILATOR_FLAGS =
@@ -90,7 +90,6 @@ run:
 	@echo "To see waveforms, open logs/vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 
diff --git a/examples/make_tracing_c/Makefile b/examples/make_tracing_c/Makefile
index 060c4fa39..e501bc502 100644
--- a/examples/make_tracing_c/Makefile
+++ b/examples/make_tracing_c/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,12 +23,12 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 
 # Generate C++ in executable form
diff --git a/examples/make_tracing_c/Makefile_obj b/examples/make_tracing_c/Makefile_obj
index d91039d21..d18fe44e1 100644
--- a/examples/make_tracing_c/Makefile_obj
+++ b/examples/make_tracing_c/Makefile_obj
@@ -32,7 +32,7 @@ CPPFLAGS += -DVL_DEBUG=1
 # For testing inside Verilator, "configure --enable-ccwarn" will do this
 # automatically; otherwise you may want this unconditionally enabled
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-USER_CPPFLAGS_WALL += -W -Werror -Wall
+  USER_CPPFLAGS_WALL += -W -Werror -Wall
 endif
 
 # See the benchmarking section of bin/verilator.
@@ -51,5 +51,5 @@ OPT_FAST = -Os -fstrict-aliasing
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif
diff --git a/examples/make_tracing_sc/Makefile b/examples/make_tracing_sc/Makefile
index b7b312d94..b5565a330 100644
--- a/examples/make_tracing_sc/Makefile
+++ b/examples/make_tracing_sc/Makefile
@@ -13,7 +13,7 @@
 # Check for sanity to avoid later confusion
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -23,12 +23,12 @@ endif
 # package install, and verilator is in your path. Otherwise find the
 # binary relative to $VERILATOR_ROOT (such as when inside the git sources).
 ifeq ($(VERILATOR_ROOT),)
-VERILATOR = verilator
-VERILATOR_COVERAGE = verilator_coverage
+  VERILATOR = verilator
+  VERILATOR_COVERAGE = verilator_coverage
 else
-export VERILATOR_ROOT
-VERILATOR = $(VERILATOR_ROOT)/bin/verilator
-VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
+  export VERILATOR_ROOT
+  VERILATOR = $(VERILATOR_ROOT)/bin/verilator
+  VERILATOR_COVERAGE = $(VERILATOR_ROOT)/bin/verilator_coverage
 endif
 
 VERILATOR_FLAGS =
@@ -60,9 +60,9 @@ SYSTEMC_EXISTS := $(shell $(VERILATOR) --get-supported SYSTEMC)
 ######################################################################
 
 ifneq ($(SYSTEMC_EXISTS),)
-default: run
+  default: run
 else
-default: nosc
+  default: nosc
 endif
 
 run:
diff --git a/examples/make_tracing_sc/Makefile_obj b/examples/make_tracing_sc/Makefile_obj
index be55d066c..834bfc7ba 100644
--- a/examples/make_tracing_sc/Makefile_obj
+++ b/examples/make_tracing_sc/Makefile_obj
@@ -31,7 +31,7 @@ CPPFLAGS += -Wno-deprecated
 # For testing inside Verilator, "configure --enable-ccwarn" will do this
 # automatically; otherwise you may want this unconditionally enabled
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-USER_CPPFLAGS_WALL += -W -Werror -Wall
+  USER_CPPFLAGS_WALL += -W -Werror -Wall
 endif
 
 # If you build your own rules from scratch, note you need to include
@@ -61,5 +61,5 @@ sim_main.o: sim_main.cpp $(VM_PREFIX).h
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif
diff --git a/include/verilated.mk.in b/include/verilated.mk.in
index e89880a2d..a7a1f021c 100644
--- a/include/verilated.mk.in
+++ b/include/verilated.mk.in
@@ -69,7 +69,7 @@ export CCACHE_SLOPPINESS
 # Make checks
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 ######################################################################
@@ -81,20 +81,20 @@ UNAME_S := $(shell uname -s)
 
 # Add -MMD -MP if you're using a recent version of GCC.
 VK_CPPFLAGS_ALWAYS += \
-		-MMD \
-		-I$(VERILATOR_ROOT)/include \
-		-I$(VERILATOR_ROOT)/include/vltstd \
-		-DVM_COVERAGE=$(VM_COVERAGE) \
-		-DVM_SC=$(VM_SC) \
-		-DVM_TIMING=$(VM_TIMING) \
-		-DVM_TRACE=$(VM_TRACE) \
-		-DVM_TRACE_FST=$(VM_TRACE_FST) \
-		-DVM_TRACE_VCD=$(VM_TRACE_VCD) \
-		-DVM_TRACE_SAIF=$(VM_TRACE_SAIF) \
-		$(CFG_CXXFLAGS_NO_UNUSED) \
+  -MMD \
+  -I$(VERILATOR_ROOT)/include \
+  -I$(VERILATOR_ROOT)/include/vltstd \
+  -DVM_COVERAGE=$(VM_COVERAGE) \
+  -DVM_SC=$(VM_SC) \
+  -DVM_TIMING=$(VM_TIMING) \
+  -DVM_TRACE=$(VM_TRACE) \
+  -DVM_TRACE_FST=$(VM_TRACE_FST) \
+  -DVM_TRACE_VCD=$(VM_TRACE_VCD) \
+  -DVM_TRACE_SAIF=$(VM_TRACE_SAIF) \
+  $(CFG_CXXFLAGS_NO_UNUSED) \
 
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-VK_CPPFLAGS_WALL += -Wall $(CFG_CXXFLAGS_WEXTRA) -Werror
+  VK_CPPFLAGS_WALL += -Wall $(CFG_CXXFLAGS_WEXTRA) -Werror
 endif
 
 CPPFLAGS += -I. $(VK_CPPFLAGS_WALL) $(VK_CPPFLAGS_ALWAYS)
@@ -103,7 +103,7 @@ VPATH += ..
 VPATH += $(VERILATOR_ROOT)/include
 VPATH += $(VERILATOR_ROOT)/include/vltstd
 
-LDFLAGS  += $(CFG_LDFLAGS_VERILATED)
+LDFLAGS += $(CFG_LDFLAGS_VERILATED)
 
 #OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE
 #OPT = -ggdb -DPRINTINITSTR
@@ -112,19 +112,19 @@ CPPFLAGS += $(OPT)
 # On macOS, specify all weak symbols as dynamic_lookup.
 # Otherwise, you get undefined symbol errors.
 ifeq ($(UNAME_S),Darwin)
-	LDFLAGS += -Wl,-U,__Z15vl_time_stamp64v,-U,__Z13sc_time_stampv
+  LDFLAGS += -Wl,-U,__Z15vl_time_stamp64v,-U,__Z13sc_time_stampv
 endif
 
 # Allow upper level user makefiles to specify flags they want.
 # These aren't ever set by Verilator, so users are free to override them.
 CPPFLAGS += $(USER_CPPFLAGS)
-LDFLAGS  += $(USER_LDFLAGS)
-LDLIBS   += $(USER_LDLIBS)
+LDFLAGS += $(USER_LDFLAGS)
+LDLIBS += $(USER_LDLIBS)
 
 # Add flags from -CFLAGS and -LDFLAGS on Verilator command line
 CPPFLAGS += $(VM_USER_CFLAGS)
-LDFLAGS  += $(VM_USER_LDFLAGS)
-LDLIBS   += $(VM_USER_LDLIBS)
+LDFLAGS += $(VM_USER_LDFLAGS)
+LDLIBS += $(VM_USER_LDLIBS)
 
 ######################################################################
 # Optimization control.
@@ -148,7 +148,7 @@ OPT_GLOBAL = -Os
 
 ifeq ($(VM_PROFC),1)
   CPPFLAGS += $(CFG_CXXFLAGS_PROFILE)
-  LDFLAGS  += $(CFG_CXXFLAGS_PROFILE)
+  LDFLAGS += $(CFG_CXXFLAGS_PROFILE)
 endif
 
 #######################################################################
@@ -156,12 +156,12 @@ endif
 
 ifeq ($(VM_SC),1)
   CPPFLAGS += $(SYSTEMC_CXX_FLAGS) $(addprefix -I, $(SYSTEMC_INCLUDE))
-  LDFLAGS  += $(SYSTEMC_CXX_FLAGS) $(addprefix -L, $(SYSTEMC_LIBDIR))
-  SC_LIBS   = -lsystemc
- ifneq ($(wildcard $(SYSTEMC_LIBDIR)/*numeric_bit*),)
-  # SystemC 1.2.1beta
-  SC_LIBS   += -lnumeric_bit -lqt
- endif
+  LDFLAGS += $(SYSTEMC_CXX_FLAGS) $(addprefix -L, $(SYSTEMC_LIBDIR))
+  SC_LIBS = -lsystemc
+  ifneq ($(wildcard $(SYSTEMC_LIBDIR)/*numeric_bit*),)
+    # SystemC 1.2.1beta
+    SC_LIBS += -lnumeric_bit -lqt
+  endif
 endif
 
 #######################################################################
@@ -171,12 +171,11 @@ CPPFLAGS += $(CFG_CXXFLAGS_STD)
 LDLIBS += $(CFG_LDLIBS_THREADS)
 
 ifneq ($(VM_TIMING),0)
- ifneq ($(VM_TIMING),)
-  CPPFLAGS += $(CFG_CXXFLAGS_COROUTINES)
- endif
+  ifneq ($(VM_TIMING),)
+    CPPFLAGS += $(CFG_CXXFLAGS_COROUTINES)
+  endif
 endif
 
-
 #######################################################################
 ### Aggregates
 
@@ -258,7 +257,6 @@ endif
 
 $(VM_PREFIX)__ALL.a: $(VK_OBJS) $(VM_HIER_LIBS)
 
-
 ######################################################################
 ### Compile rules
 
@@ -269,24 +267,24 @@ ifneq ($(VM_DEFAULT_RULES),0)
 #
 # These rules put OPT_FAST/OPT_SLOW/OPT_GLOBAL before the other flags to
 # allow USER_CPPFLAGS to override them
-%.o: %.cpp
+  %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
-$(VK_OBJS_FAST): %.o: %.cpp $(VK_PCH_H).fast.gch
+  $(VK_OBJS_FAST): %.o: %.cpp $(VK_PCH_H).fast.gch
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_FAST) -c -o $@ $<
 
-$(VK_OBJS_SLOW): %.o: %.cpp $(VK_PCH_H).slow.gch
+  $(VK_OBJS_SLOW): %.o: %.cpp $(VK_PCH_H).slow.gch
 	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(VK_PCH_I_SLOW) -c -o $@ $<
 
-$(VK_GLOBAL_OBJS): %.o: %.cpp
+  $(VK_GLOBAL_OBJS): %.o: %.cpp
 	$(OBJCACHE) $(CXX) $(OPT_GLOBAL) $(CXXFLAGS) $(CPPFLAGS) -c -o $@ $<
 
 # Precompile a header file
 # PCH's compiler flags must match exactly the rules' above FAST/SLOW
 # arguments used for the .cpp files, or the PCH file won't be used.
-%.fast.gch: %
+  %.fast.gch: %
 	$(OBJCACHE) $(CXX) $(OPT_FAST) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
-%.slow.gch: %
+  %.slow.gch: %
 	$(OBJCACHE) $(CXX) $(OPT_SLOW) $(CXXFLAGS) $(CPPFLAGS) $(CFG_CXXFLAGS_PCH) $< -o $@
 
 endif
@@ -313,22 +311,22 @@ ifneq ($(findstring ccache-report,$(MAKECMDGOALS)),)
   # Remove previous logfiles and report
   $(shell rm -rf $(VK_CCACHE_LOGDIR) $(VK_CCACHE_REPORT))
 
-$(VK_CCACHE_LOGDIR):
+  $(VK_CCACHE_LOGDIR):
 	mkdir -p $@
 
-$(VK_OBJS): | $(VK_CCACHE_LOGDIR)
+  $(VK_OBJS): | $(VK_CCACHE_LOGDIR)
 
-$(VK_OBJS): export CCACHE_LOGFILE=$(VK_CCACHE_LOGDIR)/$@.log
+  $(VK_OBJS): export CCACHE_LOGFILE=$(VK_CCACHE_LOGDIR)/$@.log
 
-$(VK_CCACHE_REPORT): $(VK_OBJS)
+  $(VK_CCACHE_REPORT): $(VK_OBJS)
 	$(VERILATOR_CCACHE_REPORT) -o $@ $(VK_CCACHE_LOGDIR)
 
-.PHONY: ccache-report
-ccache-report: $(VK_CCACHE_REPORT)
+  .PHONY: ccache-report
+  ccache-report: $(VK_CCACHE_REPORT)
 	@cat $<
 
 # ccache-report runs last
-ccache-report: $(VK_OTHER_GOALS)
+  ccache-report: $(VK_OTHER_GOALS)
 endif
 
 ######################################################################
@@ -358,5 +356,5 @@ debug-make::
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif
diff --git a/src/Makefile.in b/src/Makefile.in
index daf96c38e..1fb95ab68 100644
--- a/src/Makefile.in
+++ b/src/Makefile.in
@@ -30,7 +30,7 @@ debug: dbg
 optimize: opt
 
 ifneq ($(words $(CURDIR)),1)
- $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
+  $(error Unsupported: GNU Make cannot build in directories containing spaces, build elsewhere: '$(CURDIR)')
 endif
 
 UNDER_GIT = $(wildcard ${srcdir}/../.git/logs/HEAD)
@@ -50,9 +50,9 @@ else
 endif
 
 ifneq ($(BEAR),)
-BEAR_OBJ_OPT := $(BEAR) --append --output obj_dbg/compile_commands.json --
+  BEAR_OBJ_OPT := $(BEAR) --append --output obj_dbg/compile_commands.json --
 else
-BEAR_OBJ_OPT :=
+  BEAR_OBJ_OPT :=
 endif
 
 #*********************************************************************
@@ -70,11 +70,11 @@ obj_dbg:
 
 opt: ../bin/verilator_bin$(EXEEXT)
 ifeq ($(VERILATOR_NO_OPT_BUILD),1)  # Faster laptop development... One build
-../bin/verilator_bin$(EXEEXT): ../bin/verilator_bin_dbg$(EXEEXT)
+  ../bin/verilator_bin$(EXEEXT): ../bin/verilator_bin_dbg$(EXEEXT)
 	-cp -p $< $@.tmp
 	-mv -f $@.tmp $@
 else
-../bin/verilator_bin$(EXEEXT): obj_opt ../bin prefiles
+  ../bin/verilator_bin$(EXEEXT): obj_opt ../bin prefiles
 	$(MAKE) -C obj_opt -j 1  TGT=../$@ -f ../Makefile_obj serial
 	$(MAKE) -C obj_opt       TGT=../$@ -f ../Makefile_obj
 endif
@@ -89,9 +89,9 @@ dbg: ../bin/verilator_bin_dbg$(EXEEXT) ../bin/verilator_coverage_bin_dbg$(EXEEXT
 	$(MAKE) -C obj_dbg       TGT=../$@ VL_DEBUG=1 VL_VLCOV=1 -f ../Makefile_obj
 
 ifneq ($(VERILATOR_NO_OPT_BUILD),1)  # Faster laptop development... don't rebuild each commit
- ifneq ($(UNDER_GIT),)  # If local git tree... else don't burden users
-GIT_CHANGE_DEP = ${srcdir}/../.git/logs/HEAD
- endif
+  ifneq ($(UNDER_GIT),)  # If local git tree... else don't burden users
+    GIT_CHANGE_DEP = ${srcdir}/../.git/logs/HEAD
+  endif
 endif
 
 prefiles::
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 12269dea2..87a585fde 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -21,13 +21,13 @@
 # from a level lower, so we need to move up if it's relative, not if absolute.
 config_srcdir = @srcdir@
 ifeq ($(config_srcdir),.)
- srcdir = ..
+  srcdir = ..
 else  # Run an experiment
- ifeq ($(wildcard $(config_srcdir)/../Makefile_obj.in),)
-   srcdir = $(config_srcdir)
- else
-   srcdir = $(config_srcdir)/..
- endif
+  ifeq ($(wildcard $(config_srcdir)/../Makefile_obj.in),)
+    srcdir = $(config_srcdir)
+  else
+    srcdir = $(config_srcdir)/..
+  endif
 endif
 
 incdir = $(srcdir)/../include
@@ -81,14 +81,14 @@ TGT = ../../verilator_bin$(EXEEXT)
 
 #################
 ifeq ($(VL_NOOPT),1)
-CPPFLAGS += -O0
+  CPPFLAGS += -O0
 else ifeq ($(VL_DEBUG),)
-# Optimize
-CPPFLAGS += -O3
+  # Optimize
+  CPPFLAGS += -O3
 else
-# Debug
-CPPFLAGS += @CFG_CXXFLAGS_DEBUG@ -DVL_DEBUG -D_GLIBCXX_DEBUG
-LDFLAGS += @CFG_LDFLAGS_DEBUG@
+  # Debug
+  CPPFLAGS += @CFG_CXXFLAGS_DEBUG@ -DVL_DEBUG -D_GLIBCXX_DEBUG
+  LDFLAGS += @CFG_LDFLAGS_DEBUG@
 endif
 #################
 
@@ -104,35 +104,35 @@ CPPFLAGS += -I. -I$(bldsrc) -I$(srcdir) -I$(incdir) -I../../include
 #CPPFLAGS += -DVL_LEAK_CHECKS  # If running valgrind or other hunting tool
 CPPFLAGS += -MP # Only works on recent GCC versions
 ifeq ($(CFG_WITH_CCWARN),yes)  # Local... Else don't burden users
-CPPFLAGS += -W -Wall $(CFG_CXXFLAGS_WEXTRA) $(CFG_CXXFLAGS_SRC) -Werror
-#CPPFLAGS += -pedantic-errors
+  CPPFLAGS += -W -Wall $(CFG_CXXFLAGS_WEXTRA) $(CFG_CXXFLAGS_SRC) -Werror
+  #CPPFLAGS += -pedantic-errors
 else
-CPPFLAGS += $(CFG_CXXFLAGS_SRC)
+  CPPFLAGS += $(CFG_CXXFLAGS_SRC)
 endif
 LDFLAGS += $(CFG_LDFLAGS_SRC)
 
-CPPFLAGSWALL   = $(CPPFLAGS)
+CPPFLAGSWALL = $(CPPFLAGS)
 CPPFLAGSPARSER = $(CPPFLAGS) $(CFG_CXXFLAGS_PARSER)
 
 # Allow RPM builds to specify hardcoded data directories
 # To do this:
 ifeq ($(CFG_WITH_DEFENV),yes)
- CPPFLAGS += -DDEFENV_SYSTEMC=\"$(SYSTEMC)\"
- CPPFLAGS += -DDEFENV_SYSTEMC_ARCH=\"$(SYSTEMC_ARCH)\"
- CPPFLAGS += -DDEFENV_SYSTEMC_INCLUDE=\"$(SYSTEMC_INCLUDE)\"
- CPPFLAGS += -DDEFENV_SYSTEMC_LIBDIR=\"$(SYSTEMC_LIBDIR)\"
- ifeq ($(VERILATOR_ROOT),)  # Use what we're given, or intuit
-  CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(pkgdatadir)\"
- else
-  CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(VERILATOR_ROOT)\"
- endif
- ifneq ($(CFG_WITH_SOLVER),no)
-  CPPFLAGS += -DDEFENV_VERILATOR_SOLVER='"$(CFG_WITH_SOLVER)"'
- else
-  ifneq ($(VERILATOR_SOLVER),)
-   CPPFLAGS += -DDEFENV_VERILATOR_SOLVER='"$(VERILATOR_SOLVER)"'
+  CPPFLAGS += -DDEFENV_SYSTEMC=\"$(SYSTEMC)\"
+  CPPFLAGS += -DDEFENV_SYSTEMC_ARCH=\"$(SYSTEMC_ARCH)\"
+  CPPFLAGS += -DDEFENV_SYSTEMC_INCLUDE=\"$(SYSTEMC_INCLUDE)\"
+  CPPFLAGS += -DDEFENV_SYSTEMC_LIBDIR=\"$(SYSTEMC_LIBDIR)\"
+  ifeq ($(VERILATOR_ROOT),)  # Use what we're given, or intuit
+    CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(pkgdatadir)\"
+  else
+    CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(VERILATOR_ROOT)\"
+  endif
+  ifneq ($(CFG_WITH_SOLVER),no)
+    CPPFLAGS += -DDEFENV_VERILATOR_SOLVER='"$(CFG_WITH_SOLVER)"'
+  else
+    ifneq ($(VERILATOR_SOLVER),)
+      CPPFLAGS += -DDEFENV_VERILATOR_SOLVER='"$(VERILATOR_SOLVER)"'
+    endif
   endif
- endif
 endif
 
 HEADERS = $(wildcard V*.h v*.h)
@@ -171,175 +171,175 @@ maintainer-copy::
 #### Top executable
 
 RAW_OBJS = \
-	V3Const__gen.o \
-	V3Error.o \
-	V3FileLine.o \
-	V3Graph.o \
-	V3GraphAcyc.o \
-	V3GraphAlg.o \
-	V3GraphPathChecker.o \
-	V3GraphTest.o \
-	V3Hash.o \
-	V3OptionParser.o \
-	V3Os.o \
-	V3ParseGrammar.o \
-	V3ParseImp.o \
-	V3ParseLex.o \
-	V3PreProc.o \
-	V3PreShell.o \
-	V3String.o \
-	V3ThreadPool.o \
-	V3Waiver.o \
-	Verilator.o \
+  V3Const__gen.o \
+  V3Error.o \
+  V3FileLine.o \
+  V3Graph.o \
+  V3GraphAcyc.o \
+  V3GraphAlg.o \
+  V3GraphPathChecker.o \
+  V3GraphTest.o \
+  V3Hash.o \
+  V3OptionParser.o \
+  V3Os.o \
+  V3ParseGrammar.o \
+  V3ParseImp.o \
+  V3ParseLex.o \
+  V3PreProc.o \
+  V3PreShell.o \
+  V3String.o \
+  V3ThreadPool.o \
+  V3Waiver.o \
+  Verilator.o \
 
 RAW_OBJS_PCH_ASTMT = \
-	V3Ast.o \
-	V3AstNodes.o \
-	V3Broken.o \
-	V3Config.o \
-	V3EmitCBase.o \
-	V3EmitCConstPool.o \
-	V3EmitCFunc.o \
-	V3EmitCHeaders.o \
-	V3EmitCImp.o \
-	V3EmitCInlines.o \
-	V3EmitCPch.o \
-	V3EmitV.o \
-	V3File.o \
-	V3FuncOpt.o \
-	V3Global.o \
-	V3Hasher.o \
-	V3Number.o \
-	V3Options.o \
-	V3Stats.o \
-	V3StatsReport.o \
-	V3VariableOrder.o \
+  V3Ast.o \
+  V3AstNodes.o \
+  V3Broken.o \
+  V3Config.o \
+  V3EmitCBase.o \
+  V3EmitCConstPool.o \
+  V3EmitCFunc.o \
+  V3EmitCHeaders.o \
+  V3EmitCImp.o \
+  V3EmitCInlines.o \
+  V3EmitCPch.o \
+  V3EmitV.o \
+  V3File.o \
+  V3FuncOpt.o \
+  V3Global.o \
+  V3Hasher.o \
+  V3Number.o \
+  V3Options.o \
+  V3Stats.o \
+  V3StatsReport.o \
+  V3VariableOrder.o \
 
 RAW_OBJS_PCH_ASTNOMT = \
-	V3Active.o \
-	V3ActiveTop.o \
-	V3Assert.o \
-	V3AssertPre.o \
-	V3Begin.o \
-	V3Branch.o \
-	V3CCtors.o \
-	V3CUse.o \
-	V3Case.o \
-	V3Cast.o \
-	V3Class.o \
-	V3Clean.o \
-	V3Clock.o \
-	V3Combine.o \
-	V3Common.o \
-	V3Coverage.o \
-	V3CoverageJoin.o \
-	V3Dead.o \
-	V3Delayed.o \
-	V3Depth.o \
-	V3DepthBlock.o \
-	V3Descope.o \
-	V3Dfg.o \
-	V3DfgAstToDfg.o \
-	V3DfgCache.o \
-	V3DfgDecomposition.o \
-	V3DfgDfgToAst.o \
-	V3DfgOptimizer.o \
-	V3DfgPasses.o \
-	V3DfgPeephole.o \
-	V3DfgRegularize.o \
-	V3DiagSarif.o \
-	V3DupFinder.o \
-	V3EmitCMain.o \
-	V3EmitCMake.o \
-	V3EmitCModel.o \
-	V3EmitCSyms.o \
-	V3EmitMk.o \
-	V3EmitMkJson.o \
-	V3EmitXml.o \
-	V3ExecGraph.o \
-	V3Expand.o \
-	V3Force.o \
-	V3Fork.o \
-	V3Gate.o \
-	V3HierBlock.o \
-	V3Inline.o \
-	V3Inst.o \
-	V3InstrCount.o \
-	V3Interface.o \
-	V3Life.o \
-	V3LifePost.o \
-	V3LinkCells.o \
-	V3LinkDot.o \
-	V3LinkInc.o \
-	V3LinkJump.o \
-	V3LinkLValue.o \
-	V3LinkLevel.o \
-	V3LinkParse.o \
-	V3LinkResolve.o \
-	V3Localize.o \
-	V3MergeCond.o \
-	V3Name.o \
-	V3Order.o \
-	V3OrderGraphBuilder.o \
-	V3OrderMoveGraph.o \
-	V3OrderParallel.o \
-	V3OrderProcessDomains.o \
-	V3OrderSerial.o \
-	V3Param.o \
-	V3Premit.o \
-	V3ProtectLib.o \
-	V3Randomize.o \
-	V3Reloop.o \
-	V3Sampled.o \
-	V3Sched.o \
-	V3SchedAcyclic.o \
-	V3SchedPartition.o \
-	V3SchedReplicate.o \
-	V3SchedTiming.o \
-	V3SchedVirtIface.o \
-	V3Scope.o \
-	V3Scoreboard.o \
-	V3Slice.o \
-	V3Split.o \
-	V3SplitAs.o \
-	V3SplitVar.o \
-	V3StackCount.o \
-	V3Subst.o \
-	V3TSP.o \
-	V3Table.o \
-	V3Task.o \
-	V3Timing.o \
-	V3Trace.o \
-	V3TraceDecl.o \
-	V3Tristate.o \
-	V3Udp.o \
-	V3Undriven.o \
-	V3Unknown.o \
-	V3Unroll.o \
-	V3Width.o \
-	V3WidthCommit.o \
-	V3WidthSel.o \
+  V3Active.o \
+  V3ActiveTop.o \
+  V3Assert.o \
+  V3AssertPre.o \
+  V3Begin.o \
+  V3Branch.o \
+  V3CCtors.o \
+  V3CUse.o \
+  V3Case.o \
+  V3Cast.o \
+  V3Class.o \
+  V3Clean.o \
+  V3Clock.o \
+  V3Combine.o \
+  V3Common.o \
+  V3Coverage.o \
+  V3CoverageJoin.o \
+  V3Dead.o \
+  V3Delayed.o \
+  V3Depth.o \
+  V3DepthBlock.o \
+  V3Descope.o \
+  V3Dfg.o \
+  V3DfgAstToDfg.o \
+  V3DfgCache.o \
+  V3DfgDecomposition.o \
+  V3DfgDfgToAst.o \
+  V3DfgOptimizer.o \
+  V3DfgPasses.o \
+  V3DfgPeephole.o \
+  V3DfgRegularize.o \
+  V3DiagSarif.o \
+  V3DupFinder.o \
+  V3EmitCMain.o \
+  V3EmitCMake.o \
+  V3EmitCModel.o \
+  V3EmitCSyms.o \
+  V3EmitMk.o \
+  V3EmitMkJson.o \
+  V3EmitXml.o \
+  V3ExecGraph.o \
+  V3Expand.o \
+  V3Force.o \
+  V3Fork.o \
+  V3Gate.o \
+  V3HierBlock.o \
+  V3Inline.o \
+  V3Inst.o \
+  V3InstrCount.o \
+  V3Interface.o \
+  V3Life.o \
+  V3LifePost.o \
+  V3LinkCells.o \
+  V3LinkDot.o \
+  V3LinkInc.o \
+  V3LinkJump.o \
+  V3LinkLValue.o \
+  V3LinkLevel.o \
+  V3LinkParse.o \
+  V3LinkResolve.o \
+  V3Localize.o \
+  V3MergeCond.o \
+  V3Name.o \
+  V3Order.o \
+  V3OrderGraphBuilder.o \
+  V3OrderMoveGraph.o \
+  V3OrderParallel.o \
+  V3OrderProcessDomains.o \
+  V3OrderSerial.o \
+  V3Param.o \
+  V3Premit.o \
+  V3ProtectLib.o \
+  V3Randomize.o \
+  V3Reloop.o \
+  V3Sampled.o \
+  V3Sched.o \
+  V3SchedAcyclic.o \
+  V3SchedPartition.o \
+  V3SchedReplicate.o \
+  V3SchedTiming.o \
+  V3SchedVirtIface.o \
+  V3Scope.o \
+  V3Scoreboard.o \
+  V3Slice.o \
+  V3Split.o \
+  V3SplitAs.o \
+  V3SplitVar.o \
+  V3StackCount.o \
+  V3Subst.o \
+  V3TSP.o \
+  V3Table.o \
+  V3Task.o \
+  V3Timing.o \
+  V3Trace.o \
+  V3TraceDecl.o \
+  V3Tristate.o \
+  V3Udp.o \
+  V3Undriven.o \
+  V3Unknown.o \
+  V3Unroll.o \
+  V3Width.o \
+  V3WidthCommit.o \
+  V3WidthSel.o \
 
 # verilator_coverage
 VLCOV_OBJS = \
-	VlcMain.o \
+  VlcMain.o \
 
 NON_STANDALONE_HEADERS = \
-	V3AstInlines.h \
-	V3AstNodeDType.h \
-	V3AstNodeExpr.h \
-	V3AstNodeOther.h \
-	V3DfgVertices.h \
-	V3ThreadPool.h \
-	V3WidthRemove.h \
+  V3AstInlines.h \
+  V3AstNodeDType.h \
+  V3AstNodeExpr.h \
+  V3AstNodeOther.h \
+  V3DfgVertices.h \
+  V3ThreadPool.h \
+  V3WidthRemove.h \
 
 AST_DEFS := \
-	V3AstNodeDType.h \
-	V3AstNodeExpr.h \
-	V3AstNodeOther.h \
+  V3AstNodeDType.h \
+  V3AstNodeExpr.h \
+  V3AstNodeOther.h \
 
 DFG_DEFS := \
-	V3DfgVertices.h
+  V3DfgVertices.h
 
 #### astgen common flags
 
@@ -350,11 +350,11 @@ ASTGENFLAGS += $(foreach f,$(DFG_DEFS),--dfgdef $f)
 #### Linking
 
 ifeq ($(VL_VLCOV),)
-PREDEP_H = V3Ast__gen_forward_class_decls.h
-OBJS += $(RAW_OBJS) $(RAW_OBJS_PCH_ASTMT) $(RAW_OBJS_PCH_ASTNOMT)
+  PREDEP_H = V3Ast__gen_forward_class_decls.h
+  OBJS += $(RAW_OBJS) $(RAW_OBJS_PCH_ASTMT) $(RAW_OBJS_PCH_ASTNOMT)
 else
-PREDEP_H =
-OBJS += $(VLCOV_OBJS)
+  PREDEP_H =
+  OBJS += $(VLCOV_OBJS)
 endif
 
 $(TGT): $(PREDEP_H) $(OBJS)
@@ -454,5 +454,5 @@ header_cc: $(addsuffix __header_cc.o, $(basename $(HEADER_CC_H)))
 
 DEPS := $(wildcard *.d)
 ifneq ($(DEPS),)
-include $(DEPS)
+  include $(DEPS)
 endif
diff --git a/test_regress/Makefile b/test_regress/Makefile
index 4df2bb3df..38e88f14f 100644
--- a/test_regress/Makefile
+++ b/test_regress/Makefile
@@ -36,7 +36,7 @@ endif
 
 # Run tests in parallel.
 ifeq ($(CFG_WITH_LONGTESTS),yes)
- DRIVER_FLAGS ?= -j 0 --quiet --rerun
+  DRIVER_FLAGS ?= -j 0 --quiet --rerun
 endif
 
 .SUFFIXES:
@@ -75,7 +75,7 @@ random:
 
 random_forever:
 	while ( VERILATOR_NO_DEBUG=1 CPPFLAGS_ADD=-Wno-error $(MAKE) random ) ; do \
-		echo ; \
+	  echo ; \
 	done
 
 #######################################################################
@@ -102,10 +102,11 @@ TEST_SNAP_DIR ?= snapshot
 # Command to diff directories
 TEST_DIFF_TOOL ?= $(if $(shell which icdiff), icdiff -N -r, diff -r)
 
-TEST_SNAP_IGNORE := *.status *.log *.dat *.d *.o *.a *.so *stats*.txt *.html \
-                    *.includecache *.out *.fst *.fst.vcd *.tree *.tree*.json \
-                    *.dot *.csv *.xml *.hash *.cmake gmon.out.* CMakeFiles \
-                    profile_exec.vcd t_pgo_threads
+TEST_SNAP_IGNORE := \
+  *.status *.log *.dat *.d *.o *.a *.so *stats*.txt *.html \
+  *.includecache *.out *.fst *.fst.vcd *.tree *.tree*.json \
+  *.dot *.csv *.xml *.hash *.cmake gmon.out.* CMakeFiles \
+  profile_exec.vcd t_pgo_threads
 
 define TEST_SNAP_template
 mkdir -p $(TEST_SNAP_DIR)

From 88d0d85ca63c31405c29cc4d5dc44b9a5380b66c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 24 Jun 2025 18:29:38 -0400
Subject: [PATCH 163/211] Internals: Apply format-yaml. No functional change.

---
 .github/workflows/rtlmeter.yml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index bb972dfab..e4d7a9eb3 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -170,8 +170,8 @@ jobs:
       - name: Extract combined results
         working-directory: results
         run: |
-            tar xzfv all-results-${{ github.run_id }}.tar.gz
-            ls -la
+          tar xzfv all-results-${{ github.run_id }}.tar.gz
+          ls -la
       # Pushing to verilator/verilator-rtlmeter-results requires elevated permissions
       - name: Generate access token
         id: generate-token

From 3209bee3b32f20b4fd91ece46d3d71c63b3b1d98 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 25 Jun 2025 04:56:52 -0400
Subject: [PATCH 164/211] Fix colon-divide operator without space (#6121).

---
 Changes                            | 1 +
 src/verilog.l                      | 8 ++++----
 test_regress/t/t_constraint_dist.v | 2 +-
 3 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/Changes b/Changes
index 4e1f71fe7..c988ff412 100644
--- a/Changes
+++ b/Changes
@@ -76,6 +76,7 @@ Verilator 5.037 devel
 * Fix `--lib-create` with double-underscore (#6099).
 * Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
 * Fix decoding octal string escapes with 1-2 digits (#6108).
+* Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/verilog.l b/src/verilog.l
index 722ed6f3b..69ecd8d7a 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -647,9 +647,9 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   /* Default PLI rule */
 <V95,V01NC,V01C,V05,VA5,S05,S09,S12,S17,S23,SAX>{
   "$"[a-zA-Z0-9_$]+     { const string str (yytext, yyleng);
-                                  yylval.strp = PARSEP->newString(AstNode::encodeName(str));
-                                  FL; return yaD_PLI;
-                                }
+                          yylval.strp = PARSEP->newString(AstNode::encodeName(str));
+                          FL; return yaD_PLI;
+                        }
 }
 
   /************************************************************************/
@@ -896,7 +896,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   "@@"                  { FL; return yP_ATAT; }
   "::"                  { FL; return yP_COLONCOLON; }
   ":="                  { FL; return yP_COLONEQ; }
-  ":/"[^\/\*]           { FL; return yP_COLONDIV; }  /* : then comment is not ":/" */
+  ":/"/[^\/\*]          { FL; return yP_COLONDIV; }  /* : then comment is not ":/" */
   "|->"                 { FL; return yP_ORMINUSGT; }
   "|=>"                 { FL; return yP_OREQGT; }
   /* Some simulators allow whitespace here. Grr */
diff --git a/test_regress/t/t_constraint_dist.v b/test_regress/t/t_constraint_dist.v
index 343a7aad5..b138a3e33 100644
--- a/test_regress/t/t_constraint_dist.v
+++ b/test_regress/t/t_constraint_dist.v
@@ -28,7 +28,7 @@ class C;
    int arr[3] = '{5, 6, 7};
    constraint distrib {
       x dist { [1:3] := 0, [5:6], [9:15] :/ 0 };
-      y dist { [1:3] := 0, 5, 6 := 8, [9:15] :/ 0 };
+      y dist { [1:3] := 0, 5, 6 := 8, [9:15] :/0 };  // /0 intentional to check yP_COLONDIV
       x < 20;
    };
    constraint distinside {

From 6cd0948c8cbf7214e42ea4d1bab511a0e5716e8a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 25 Jun 2025 21:10:46 -0400
Subject: [PATCH 165/211] Internals: Standardize Makefile indents. No
 functional change intended.

---
 Makefile.in                       | 2 +-
 examples/json_py/Makefile         | 4 +---
 examples/make_tracing_c/Makefile  | 1 -
 examples/make_tracing_sc/Makefile | 1 -
 test_regress/Makefile             | 4 ++--
 5 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/Makefile.in b/Makefile.in
index 9b227e719..c63fa0c28 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -469,7 +469,7 @@ CLANGFORMAT_FILES = $(CHECK_CPP) $(CHECK_H) $(CHECK_YL) test_regress/t/*.c* test
 
 format-c clang-format:
 	@$(CLANGFORMAT) --version | egrep 14.0 > /dev/null \
-		|| echo "*** You are not using clang-format-14, indents may differ from master's ***"
+	|| echo "*** You are not using clang-format-14, indents may differ from master's ***"
 	$(CLANGFORMAT) $(CLANGFORMAT_FLAGS) $(CLANGFORMAT_FILES)
 
 YAMLFIX = YAMLFIX_WHITELINES=1 YAMLFIX_LINE_LENGTH=130 YAMLFIX_preserve_quotes=true yamlfix
diff --git a/examples/json_py/Makefile b/examples/json_py/Makefile
index 0f530185e..c5e69028c 100644
--- a/examples/json_py/Makefile
+++ b/examples/json_py/Makefile
@@ -39,9 +39,7 @@ endif
 python_message:
 	@echo "Found Python version ${PYTHON_VERSION}, but require >= 3.5"
 
-test: \
-	test-vl_file_copy \
-	test-vl_hier_graph \
+test: test-vl_file_copy test-vl_hier_graph
 
 test-vl_file_copy:
 	@echo "-- vl_file_copy example"
diff --git a/examples/make_tracing_c/Makefile b/examples/make_tracing_c/Makefile
index e501bc502..179705bff 100644
--- a/examples/make_tracing_c/Makefile
+++ b/examples/make_tracing_c/Makefile
@@ -89,7 +89,6 @@ run:
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 
diff --git a/examples/make_tracing_sc/Makefile b/examples/make_tracing_sc/Makefile
index b5565a330..68d2b51ae 100644
--- a/examples/make_tracing_sc/Makefile
+++ b/examples/make_tracing_sc/Makefile
@@ -98,7 +98,6 @@ run:
 	@echo "To see waveforms, open vlt_dump.vcd in a waveform viewer"
 	@echo
 
-
 ######################################################################
 # Other targets
 
diff --git a/test_regress/Makefile b/test_regress/Makefile
index 38e88f14f..6204221c0 100644
--- a/test_regress/Makefile
+++ b/test_regress/Makefile
@@ -130,5 +130,5 @@ impl-test-diff:
 
 .PHONY: test-diff
 test-diff:
-	$(MAKE) impl-test-diff | grep -v "Only in obj_" | \
-    $$(git config --default less --global --get core.pager)
+	$(MAKE) impl-test-diff | grep -v "Only in obj_" \
+	| $$(git config --default less --global --get core.pager)

From 2df0390c04f7485fe8cbcef7b39aa7df78e1555d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 25 Jun 2025 21:14:25 -0400
Subject: [PATCH 166/211] Commentary

---
 src/V3Begin.cpp | 2 +-
 src/V3Width.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp
index cc2fd557f..0484b9038 100644
--- a/src/V3Begin.cpp
+++ b/src/V3Begin.cpp
@@ -423,7 +423,7 @@ static AstNode* createForeachLoopRanged(AstNodeForeach* nodep, AstNode* bodysp,
                                                                    : VNType::atGteS);
 }
 AstNode* V3Begin::convertToWhile(AstForeach* nodep) {
-    // if (debug()) dumpTree(cout, "-  foreach-old: ");
+    // if (debug()) dumpTree("-  foreach-old: ");
     const AstSelLoopVars* const loopsp = VN_CAST(nodep->arrayp(), SelLoopVars);
     UASSERT_OBJ(loopsp, nodep, "No loop variables under foreach");
     AstNodeExpr* const fromp = loopsp->fromp();
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index aa4fff739..d3924d87a 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2203,7 +2203,7 @@ class WidthVisitor final : public VNVisitor {
             // if (debug()) nodep->backp()->dumpTree("-  CastOutUpUp: ");
         }
         if (m_vup->final()) {
-            if (debug() >= 9) nodep->dumpTree(cout, "-  CastFPit: ");
+            if (debug() >= 9) nodep->dumpTree("-  CastFPit: ");
             iterateCheck(nodep, "value", nodep->fromp(), SELF, FINAL, nodep->fromp()->dtypep(),
                          EXTEND_EXP, false);
             if (debug() >= 9) nodep->dumpTree("-  CastFin: ");

From 818e6d3ebf04ed444df46ce653488601eb3de455 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Thu, 26 Jun 2025 10:51:01 +0100
Subject: [PATCH 167/211] Disable Vortex:sane:sgem pending fix

This design has a BLKANDNBLK warning which might or might not cause
problems depending on how the ordering ended up. See #6122.
---
 .github/workflows/rtlmeter.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index e4d7a9eb3..a2b7df5a6 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -112,7 +112,7 @@ jobs:
           - "VeeR-EL2:default*"
           - "VeeR-EL2:hiperf*"
           - "Vortex:mini:*"
-          - "Vortex:sane:*"
+          - "Vortex:sane:* !Vortex:sane:sgemm"
           - "XiangShan:default-chisel3:* !*:linux"
           - "XiangShan:default-chisel6:* !*:linux"
           - "XiangShan:mini-chisel3:* !*:linux"

From d183b4edde16640c06c7ad4f376ef56d7679bf6b Mon Sep 17 00:00:00 2001
From: Kamil Rakoczy <krakoczy@antmicro.com>
Date: Thu, 26 Jun 2025 16:28:58 +0200
Subject: [PATCH 168/211] Fix variables declared in fork after taskify (#6126)

---
 src/V3Fork.cpp                 | 4 ++++
 test_regress/t/t_var_in_fork.v | 8 ++++++++
 2 files changed, 12 insertions(+)

diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 10f765ca7..4948ed955 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -605,6 +605,10 @@ class ForkVisitor final : public VNVisitor {
         m_modp->addStmtsp(taskp);
         UINFO(9, "new " << taskp);
 
+        // We created a task from fork, so make sure that all
+        // local (to this new task) variables are marked as funcLocal
+        for (AstVar* const localp : m_forkLocalsp) localp->funcLocal(true);
+
         AstTaskRef* const taskrefp = new AstTaskRef{nodep->fileline(), taskp, m_capturedVarRefsp};
         AstStmtExpr* const taskcallp = taskrefp->makeStmt();
         // Replaced nodes will be revisited, so we don't need to "lift" the arguments
diff --git a/test_regress/t/t_var_in_fork.v b/test_regress/t/t_var_in_fork.v
index b47ef920d..9aaa3f3c7 100644
--- a/test_regress/t/t_var_in_fork.v
+++ b/test_regress/t/t_var_in_fork.v
@@ -47,6 +47,14 @@ module t();
     $display("Static variable: %d", static_var);
     if (static_var != 1)
       $stop;
+    fork
+      begin
+          automatic int my_auto_var = 0;
+          my_auto_var++;
+          $display("Automatic variable in fork: %d", my_auto_var);
+          if (my_auto_var != 1) $stop;
+      end
+    join_none
     $write("*-* All Finished *-*\n");
     $finish;
   end

From 2c5e9a785a4adfa100c3d9e43c11b0e2eba37ec9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 17:36:15 -0400
Subject: [PATCH 169/211] Standardize indent of emitted makefile

---
 src/V3EmitMk.cpp | 45 +++++++++++++++++++++------------------------
 src/V3File.h     |  8 ++++++++
 2 files changed, 29 insertions(+), 24 deletions(-)

diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 3a71b5300..1c5d2983f 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -494,7 +494,7 @@ public:
     }
 
     void putMakeClassEntry(V3OutMkFile& of, const string& name) {
-        of.puts("\t" + V3Os::filenameNonDirExt(name) + " \\\n");
+        of.puts("  " + V3Os::filenameNonDirExt(name) + " \\\n");
         ++m_putClassCount;
     }
 
@@ -618,7 +618,6 @@ public:
             }
         }
 
-        of.puts("\n");
         of.putsHeader();
     }
 
@@ -643,17 +642,16 @@ public:
         }
         of.puts("\n### Constants...\n");
         of.puts("# Perl executable (from $PERL, defaults to 'perl' if not set)\n");
-        of.puts("PERL = " + V3OutFormatter::quoteNameControls(V3Options::getenvPERL()) + "\n");
+        of.putSet("PERL", V3OutFormatter::quoteNameControls(V3Options::getenvPERL()));
         of.puts("# Python3 executable (from $PYTHON3, defaults to 'python3' if not set)\n");
-        of.puts("PYTHON3 = " + V3OutFormatter::quoteNameControls(V3Options::getenvPYTHON3())
-                + "\n");
+        of.putSet("PYTHON3", V3OutFormatter::quoteNameControls(V3Options::getenvPYTHON3()));
         of.puts("# Path to Verilator kit (from $VERILATOR_ROOT)\n");
-        of.puts("VERILATOR_ROOT = "
-                + V3OutFormatter::quoteNameControls(V3Options::getenvVERILATOR_ROOT()) + "\n");
+        of.putSet("VERILATOR_ROOT",
+                  V3OutFormatter::quoteNameControls(V3Options::getenvVERILATOR_ROOT()));
         of.puts("# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)\n");
-        of.puts("SYSTEMC_INCLUDE ?= "s + V3Options::getenvSYSTEMC_INCLUDE() + "\n");
+        of.putSetQ("SYSTEMC_INCLUDE", V3Options::getenvSYSTEMC_INCLUDE());
         of.puts("# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)\n");
-        of.puts("SYSTEMC_LIBDIR ?= "s + V3Options::getenvSYSTEMC_LIBDIR() + "\n");
+        of.putSetQ("SYSTEMC_LIBDIR", V3Options::getenvSYSTEMC_LIBDIR());
 
         // Only check it if we really need the value
         if (v3Global.opt.systemC() && !V3Options::systemCFound()) {
@@ -664,22 +662,22 @@ public:
 
         of.puts("\n### Switches...\n");
         of.puts("# C++ code coverage  0/1 (from --prof-c)\n");
-        of.puts("VM_PROFC = "s + ((v3Global.opt.profC()) ? "1" : "0") + "\n");
+        of.putSet("VM_PROFC", ((v3Global.opt.profC()) ? "1" : "0"));
         of.puts("# SystemC output mode?  0/1 (from --sc)\n");
-        of.puts("VM_SC = "s + ((v3Global.opt.systemC()) ? "1" : "0") + "\n");
+        of.putSet("VM_SC", ((v3Global.opt.systemC()) ? "1" : "0"));
         of.puts("# Legacy or SystemC output mode?  0/1 (from --sc)\n");
-        of.puts("VM_SP_OR_SC = $(VM_SC)\n");
+        of.putSet("VM_SP_OR_SC", "$(VM_SC)");
         of.puts("# Deprecated\n");
-        of.puts("VM_PCLI = "s + (v3Global.opt.systemC() ? "0" : "1") + "\n");
+        of.putSet("VM_PCLI", (v3Global.opt.systemC() ? "0" : "1"));
         of.puts(
             "# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)\n");
         of.puts("VM_SC_TARGET_ARCH = "s + V3Options::getenvSYSTEMC_ARCH() + "\n");
 
         of.puts("\n### Vars...\n");
         of.puts("# Design prefix (from --prefix)\n");
-        of.puts("VM_PREFIX = "s + v3Global.opt.prefix() + "\n");
+        of.putSet("VM_PREFIX", v3Global.opt.prefix());
         of.puts("# Module prefix (from --prefix)\n");
-        of.puts("VM_MODPREFIX = "s + v3Global.opt.modPrefix() + "\n");
+        of.putSet("VM_MODPREFIX", v3Global.opt.modPrefix());
 
         of.puts("# User CFLAGS (from -CFLAGS on Verilator command line)\n");
         of.puts("VM_USER_CFLAGS = \\\n");
@@ -689,13 +687,13 @@ public:
                     + "\"' \\\n");
         if (!v3Global.opt.libCreate().empty()) of.puts("\t-fPIC \\\n");
         const V3StringList& cFlags = v3Global.opt.cFlags();
-        for (const string& i : cFlags) of.puts("\t" + i + " \\\n");
+        for (const string& i : cFlags) of.puts("  " + i + " \\\n");
         of.puts("\n");
 
         of.puts("# User LDLIBS (from -LDFLAGS on Verilator command line)\n");
         of.puts("VM_USER_LDLIBS = \\\n");
         const V3StringList& ldLibs = v3Global.opt.ldLibs();
-        for (const string& i : ldLibs) of.puts("\t" + i + " \\\n");
+        for (const string& i : ldLibs) of.puts("  " + i + " \\\n");
         of.puts("\n");
 
         V3StringSet dirs;
@@ -703,7 +701,7 @@ public:
         of.puts("VM_USER_CLASSES = \\\n");
         const V3StringSet& cppFiles = v3Global.opt.cppFiles();
         for (const auto& cppfile : cppFiles) {
-            of.puts("\t" + V3Os::filenameNonDirExt(cppfile) + " \\\n");
+            of.puts("  " + V3Os::filenameNonDirExt(cppfile) + " \\\n");
             const string dir
                 = V3Os::filenameRelativePath(V3Os::filenameDir(cppfile), v3Global.opt.makeDir());
             dirs.insert(dir);
@@ -714,10 +712,10 @@ public:
 
         of.puts("# User .cpp directories (from .cpp's on Verilator command line)\n");
         of.puts("VM_USER_DIR = \\\n");
-        for (const auto& i : dirs) of.puts("\t" + i + " \\\n");
+        for (const auto& i : dirs) of.puts("  " + i + " \\\n");
         of.puts("\n");
 
-        of.puts("\n### Default rules...\n");
+        of.puts("### Default rules...\n");
         of.puts("# Include list of all generated classes\n");
         of.puts("include " + v3Global.opt.prefix() + "_classes.mk\n");
         if (v3Global.opt.hierTop()) {
@@ -792,7 +790,6 @@ public:
                     + " libverilated.a $(VM_PREFIX)__ALL.a\n");
         }
 
-        of.puts("\n");
         of.putsHeader();
     }
 
@@ -818,12 +815,12 @@ class EmitMkHierVerilation final {
         of.puts("VM_HIER_VERILATOR := " + verilator_wrapper + "\n");
         of.puts("VM_HIER_INPUT_FILES := \\\n");
         const V3StringList& vFiles = v3Global.opt.vFiles();
-        for (const string& i : vFiles) of.puts("\t" + V3Os::filenameRealPath(i) + " \\\n");
+        for (const string& i : vFiles) of.puts("  " + V3Os::filenameRealPath(i) + " \\\n");
         of.puts("\n");
         const V3StringSet& libraryFiles = v3Global.opt.libraryFiles();
         of.puts("VM_HIER_VERILOG_LIBS := \\\n");
         for (const string& i : libraryFiles) {
-            of.puts("\t" + V3Os::filenameRealPath(i) + " \\\n");
+            of.puts("  " + V3Os::filenameRealPath(i) + " \\\n");
         }
         of.puts("\n");
     }
@@ -851,7 +848,7 @@ class EmitMkHierVerilation final {
             = m_planp->hierBlocksSorted();  // leaf comes first
         // List in order of leaf-last order so that linker can resolve dependency
         for (const auto& block : vlstd::reverse_view(blocks)) {
-            of.puts("\t" + block->hierLibFilename(true) + " \\\n");
+            of.puts("  " + block->hierLibFilename(true) + " \\\n");
         }
         of.puts("\n");
 
diff --git a/src/V3File.h b/src/V3File.h
index 1470ec4eb..5c75ed1a5 100644
--- a/src/V3File.h
+++ b/src/V3File.h
@@ -389,6 +389,14 @@ public:
     // No automatic indentation yet.
     void puts(const char* strg) { putsNoTracking(strg); }
     void puts(const string& strg) { putsNoTracking(strg); }
+    // Put VARIABLE = VALUE
+    void putSet(const string& var, const string& value) {
+        puts(VString::dot(var + " =", " ", value) + "\n");
+    }
+    // Put VARIABLE ?= VALUE
+    void putSetQ(const string& var, const string& value) {
+        puts(VString::dot(var + " ?=", " ", value) + "\n");
+    }
 };
 
 class V3OutScFile final : public V3OutCFile {

From 993f65f3b4edc064d9c1aa0d8fa296fa9dc4d811 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 17:36:56 -0400
Subject: [PATCH 170/211] Internals/CI: Format cmakefiles using mbake

---
 .github/workflows/format.yml |  1 +
 Makefile.in                  |  4 +--
 docs/guide/install.rst       |  2 +-
 verilator-config.cmake.in    | 57 +++++++++++++++++++++++++++++-------
 4 files changed, 50 insertions(+), 14 deletions(-)

diff --git a/.github/workflows/format.yml b/.github/workflows/format.yml
index ba0d6a892..d0b16f48b 100644
--- a/.github/workflows/format.yml
+++ b/.github/workflows/format.yml
@@ -28,6 +28,7 @@ jobs:
         run: |
           bash ci/ci-install.bash &&
           sudo apt-get install clang-format-14 yapf3 &&
+          sudo pip3 install gersemi mbake &&
           git config --global user.email "action@example.com" &&
           git config --global user.name "github action"
       - name: Format code
diff --git a/Makefile.in b/Makefile.in
index c63fa0c28..f3f22f548 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -461,7 +461,7 @@ analyzer-include:
 	scan-build $(MAKE) -k examples
 
 format:
-	$(MAKE) -j 4 format-c format-py format-exec
+	$(MAKE) -j 5 format-c format-cmake format-exec format-py
 
 CLANGFORMAT = clang-format-14
 CLANGFORMAT_FLAGS = -i
@@ -539,7 +539,7 @@ format-py yapf:
 	$(YAPF) $(YAPF_FLAGS) $(PY_FILES)
 
 GERSEMI = gersemi
-GERSEMI_FLAGS = -i
+GERSEMI_FLAGS = -i --no-warn-about-unknown-commands
 
 format-cmake:
 	$(GERSEMI) $(GERSEMI_FLAGS) $(CMAKE_FILES)
diff --git a/docs/guide/install.rst b/docs/guide/install.rst
index 333dde197..9e1783b57 100644
--- a/docs/guide/install.rst
+++ b/docs/guide/install.rst
@@ -159,7 +159,7 @@ Those developing Verilator itself may also want these (see internals.rst):
 
    sudo apt-get install clang clang-format-14 cmake gdb gprof graphviz lcov
    sudo apt-get install python3-clang python3-distro yapf3 bear jq
-   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe ruff sarif-tools
+   sudo pip3 install sphinx sphinx_rtd_theme sphinxcontrib-spelling breathe gersemi mbake ruff sarif-tools
    sudo pip3 install git+https://github.com/antmicro/astsee.git
    cpan install Pod::Perldoc
 
diff --git a/verilator-config.cmake.in b/verilator-config.cmake.in
index e5babed69..13e386511 100644
--- a/verilator-config.cmake.in
+++ b/verilator-config.cmake.in
@@ -237,7 +237,10 @@ function(verilate TARGET)
         if(NOT VERILATE_TRACE_VCD)
             set(VERILATE_TRACE_VCD TRUE)
         endif()
-        message(DEPRECATION "The `TRACE` argument is deprecated. Please use `TRACE_VCD` instead.")
+        message(
+            DEPRECATION
+            "The `TRACE` argument is deprecated. Please use `TRACE_VCD` instead."
+        )
     endif()
 
     if(NOT VERILATE_SOURCES)
@@ -444,7 +447,9 @@ function(verilate TARGET)
         json_get_list(JSOURCES_USER_CLASSES "${MANIFEST}" sources user_classes)
         json_get_list(JSOURCES_DEPS "${MANIFEST}" sources deps)
 
-        file(WRITE ${VDIR}/${VERILATE_PREFIX}.cmake
+        file(
+            WRITE
+            ${VDIR}/${VERILATE_PREFIX}.cmake
             "# Verilated -*- CMake -*-\n"
             "# DESCRIPTION: Verilator output: CMake include script with class lists\n"
             "#\n"
@@ -496,7 +501,9 @@ function(verilate TARGET)
         json_get_submodules(JSUBMODULES JNSUBMODULES "${MANIFEST}")
 
         if(JNSUBMODULES)
-            file(APPEND ${VDIR}/${VERILATE_PREFIX}.cmake
+            file(
+                APPEND
+                ${VDIR}/${VERILATE_PREFIX}.cmake
                 "# Verilate hierarchical blocks\n"
                 "get_target_property(TOP_TARGET_NAME \"\${TARGET}\" NAME)\n"
             )
@@ -514,30 +521,58 @@ function(verilate TARGET)
                 set(SUBMODULE_VERILATE_ARGS "")
 
                 if(NOT ${I} STREQUAL ${JNSUBMODULES})
-                    string(APPEND SUBMODULE_CMAKE
+                    string(
+                        APPEND
+                        SUBMODULE_CMAKE
                         "add_library(${JSUBMODULE_PREFIX} STATIC)\n"
                         "target_link_libraries(\${TOP_TARGET_NAME} PRIVATE ${JSUBMODULE_PREFIX})\n"
                     )
 
                     if(JSUBMODULE_DEPS)
-                        string(APPEND SUBMODULE_CMAKE "target_link_libraries(${JSUBMODULE_PREFIX} INTERFACE ${JSUBMODULE_DEPS})\n")
+                        string(
+                            APPEND
+                            SUBMODULE_CMAKE
+                            "target_link_libraries(${JSUBMODULE_PREFIX} INTERFACE ${JSUBMODULE_DEPS})\n"
+                        )
                     endif()
 
-                    string(APPEND SUBMODULE_VERILATE_ARGS "${JSUBMODULE_PREFIX} PREFIX ${JSUBMODULE_PREFIX} TOP_MODULE ${JSUBMODULE_TOP} DIRECTORY ${JSUBMODULE_DIRECTORY} SOURCES ${JSUBMODULE_SOURCES}")
+                    string(
+                        APPEND
+                        SUBMODULE_VERILATE_ARGS
+                        "${JSUBMODULE_PREFIX} PREFIX ${JSUBMODULE_PREFIX} TOP_MODULE ${JSUBMODULE_TOP} DIRECTORY ${JSUBMODULE_DIRECTORY} SOURCES ${JSUBMODULE_SOURCES}"
+                    )
                 else()
-                    string(APPEND SUBMODULE_CMAKE "# Verilate the top module that refers to lib-create wrappers of above\n")
-                    string(APPEND SUBMODULE_VERILATE_ARGS "\${TOP_TARGET_NAME} PREFIX ${JSUBMODULE_PREFIX} TOP_MODULE ${JSUBMODULE_TOP} DIRECTORY ${JSUBMODULE_DIRECTORY} SOURCES ${JSUBMODULE_SOURCES}")
+                    string(
+                        APPEND
+                        SUBMODULE_CMAKE
+                        "# Verilate the top module that refers to lib-create wrappers of above\n"
+                    )
+                    string(
+                        APPEND
+                        SUBMODULE_VERILATE_ARGS
+                        "\${TOP_TARGET_NAME} PREFIX ${JSUBMODULE_PREFIX} TOP_MODULE ${JSUBMODULE_TOP} DIRECTORY ${JSUBMODULE_DIRECTORY} SOURCES ${JSUBMODULE_SOURCES}"
+                    )
                 endif()
 
                 if(JSUBMODILE_VERILATOR_ARGS)
-                    string(APPEND SUBMODULE_VERILATE_ARGS " VERILATOR_ARGS -f ${JSUBMODILE_VERILATOR_ARGS}")
+                    string(
+                        APPEND
+                        SUBMODULE_VERILATE_ARGS
+                        " VERILATOR_ARGS -f ${JSUBMODILE_VERILATOR_ARGS}"
+                    )
                 endif()
 
                 if(JSUBMODULE_CFLAGS)
-                    string(APPEND SUBMODULE_VERILATE_ARGS " -CFLAGS ${JSUBMODULE_CFLAGS}")
+                    string(
+                        APPEND
+                        SUBMODULE_VERILATE_ARGS
+                        " -CFLAGS ${JSUBMODULE_CFLAGS}"
+                    )
                 endif()
 
-                file(APPEND ${VDIR}/${VERILATE_PREFIX}.cmake
+                file(
+                    APPEND
+                    ${VDIR}/${VERILATE_PREFIX}.cmake
                     "${SUBMODULE_CMAKE}"
                     "verilate(${SUBMODULE_VERILATE_ARGS})\n"
                 )

From 68e1ed55f68514ecbc5e6d69d4b789af99d2e63b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 17:42:10 -0400
Subject: [PATCH 171/211] Commentary: Changes update

---
 Changes           | 1 +
 docs/spelling.txt | 1 +
 2 files changed, 2 insertions(+)

diff --git a/Changes b/Changes
index c988ff412..164d9e92a 100644
--- a/Changes
+++ b/Changes
@@ -77,6 +77,7 @@ Verilator 5.037 devel
 * Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
 * Fix decoding octal string escapes with 1-2 digits (#6108).
 * Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
+* Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
 
 
 Verilator 5.036 2025-04-27
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 648365b4b..4a8a63c3b 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -1040,6 +1040,7 @@ swrite
 synthesizeable
 sys
 systemc
+taskify
 tcmalloc
 tenghtt
 testbench

From e422c183fff610233a442a13dc20739241c8dd80 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 18:16:21 -0400
Subject: [PATCH 172/211] Fix method calls without parenthesis (#6127).

---
 Changes                                   |  1 +
 src/V3LinkDot.cpp                         |  6 +++++-
 test_regress/t/t_fallback_bad.out         |  6 +++---
 test_regress/t/t_func_no_paren.py         | 16 ++++++++++++++++
 test_regress/t/t_func_no_paren.v          | 23 +++++++++++++++++++++++
 test_regress/t/t_fuzz_always_bad.out      |  2 +-
 test_regress/t/t_inst_missing_dot_bad.out |  2 +-
 7 files changed, 50 insertions(+), 6 deletions(-)
 create mode 100755 test_regress/t/t_func_no_paren.py
 create mode 100644 test_regress/t/t_func_no_paren.v

diff --git a/Changes b/Changes
index 164d9e92a..2da5b8239 100644
--- a/Changes
+++ b/Changes
@@ -78,6 +78,7 @@ Verilator 5.037 devel
 * Fix decoding octal string escapes with 1-2 digits (#6108).
 * Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
 * Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
+* Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index e93f321e0..9a06cb1b4 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3123,9 +3123,13 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 expectWhat = "scope/variable";
                 allowScope = true;
                 allowVar = true;
-            } else if (m_ds.m_dotPos == DP_NONE || m_ds.m_dotPos == DP_FINAL) {
+            } else if (m_ds.m_dotPos == DP_NONE) {
                 expectWhat = "variable";
                 allowVar = true;
+            } else if (m_ds.m_dotPos == DP_FINAL) {
+                expectWhat = "variable/method";
+                allowFTask = true;
+                allowVar = true;
             } else {
                 UINFO(1, "ds=" << m_ds.ascii());
                 nodep->v3fatalSrc("Unhandled VParseRefExp");
diff --git a/test_regress/t/t_fallback_bad.out b/test_regress/t/t_fallback_bad.out
index 0555c5429..6d2ba11ae 100644
--- a/test_regress/t/t_fallback_bad.out
+++ b/test_regress/t/t_fallback_bad.out
@@ -5,10 +5,10 @@
 %Error: t/t_fallback_bad.v:27:15: Can't find definition of task/function: 'tsk'
    27 |          this.tsk;
       |               ^~~
-%Error: t/t_fallback_bad.v:28:16: Can't find definition of variable: 'f'
+%Error: t/t_fallback_bad.v:28:16: Can't find definition of variable/method: 'f'
    28 |          super.f = 8;
       |                ^
-%Error: t/t_fallback_bad.v:29:15: Can't find definition of variable: 'f'
+%Error: t/t_fallback_bad.v:29:15: Can't find definition of variable/method: 'f'
    29 |          this.f = 8;
       |               ^
 %Error: t/t_fallback_bad.v:30:20: Can't find definition of 'tsk' in dotted task/function: 'sub1.sub2.tsk'
@@ -21,7 +21,7 @@
 %Error: t/t_fallback_bad.v:32:15: Can't find definition of task/function: 'tsk'
    32 |          pkg::tsk();
       |               ^~~
-%Error: t/t_fallback_bad.v:33:20: Can't find definition of 'f' in dotted variable: 'sub1.sub2.f'
+%Error: t/t_fallback_bad.v:33:20: Can't find definition of 'f' in dotted variable/method: 'sub1.sub2.f'
    33 |          sub1.sub2.f = 8;
       |                    ^
 %Error: t/t_fallback_bad.v:34:20: Can't find definition of 'f' in dotted scope/variable: 'sub1.sub2.f'
diff --git a/test_regress/t/t_func_no_paren.py b/test_regress/t/t_func_no_paren.py
new file mode 100755
index 000000000..cca4c9e73
--- /dev/null
+++ b/test_regress/t/t_func_no_paren.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint()
+
+test.passes()
diff --git a/test_regress/t/t_func_no_paren.v b/test_regress/t/t_func_no_paren.v
new file mode 100644
index 000000000..5a65f3dd5
--- /dev/null
+++ b/test_regress/t/t_func_no_paren.v
@@ -0,0 +1,23 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+package pkg;
+   class tb_cpu_seq_item;
+      virtual function void uvm_report_error(string message);
+         $display("%s", message);
+      endfunction
+      virtual function string get_type_name();
+         return "GTN";
+      endfunction
+      virtual function bit do_compare( tb_cpu_seq_item rhs, int comparer);
+         uvm_report_error($sformatf("this is of type %s, rhs is of type %s", this.get_type_name(), rhs.get_type_name()));
+         uvm_report_error($sformatf("this is of type %s, rhs is of type %s", this.get_type_name, rhs.get_type_name));
+      endfunction
+   endclass
+endpackage
+
+module t;
+endmodule
diff --git a/test_regress/t/t_fuzz_always_bad.out b/test_regress/t/t_fuzz_always_bad.out
index 33980192a..b864866de 100644
--- a/test_regress/t/t_fuzz_always_bad.out
+++ b/test_regress/t/t_fuzz_always_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_fuzz_always_bad.v:10:15: Can't find definition of 'a' in dotted variable: 'c.a'
+%Error: t/t_fuzz_always_bad.v:10:15: Can't find definition of 'a' in dotted variable/method: 'c.a'
    10 |    always @ c.a c:h;
       |               ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_inst_missing_dot_bad.out b/test_regress/t/t_inst_missing_dot_bad.out
index 6c108c5ed..f71c190a1 100644
--- a/test_regress/t/t_inst_missing_dot_bad.out
+++ b/test_regress/t/t_inst_missing_dot_bad.out
@@ -2,7 +2,7 @@
     9 |       $display("a=", missing.a);
       |                      ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_inst_missing_dot_bad.v:9:30: Can't find definition of 'a' in dotted variable: 'missing.a'
+%Error: t/t_inst_missing_dot_bad.v:9:30: Can't find definition of 'a' in dotted variable/method: 'missing.a'
     9 |       $display("a=", missing.a);
       |                              ^
 %Error: Exiting due to

From 75229cc03de85acde1a3c198b12a4cc46ec19e5b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 18:34:20 -0400
Subject: [PATCH 173/211] Fix `pre_randomize`/`post_randomize` when no
 randomize (#6122).

---
 Changes                                     |  1 +
 src/V3LinkDot.cpp                           |  1 +
 test_regress/t/t_randomize_prepost.v        | 90 +++++++++++++--------
 test_regress/t/t_randomize_prepost_alone.py | 16 ++++
 test_regress/t/t_randomize_prepost_alone.v  | 22 +++++
 5 files changed, 95 insertions(+), 35 deletions(-)
 create mode 100755 test_regress/t/t_randomize_prepost_alone.py
 create mode 100644 test_regress/t/t_randomize_prepost_alone.v

diff --git a/Changes b/Changes
index 2da5b8239..991815d20 100644
--- a/Changes
+++ b/Changes
@@ -77,6 +77,7 @@ Verilator 5.037 devel
 * Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
 * Fix decoding octal string escapes with 1-2 digits (#6108).
 * Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
+* Fix `pre_randomize`/`post_randomize` when no randomize (#6122). [Alex Solomatnikov]
 * Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
 * Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
 
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 9a06cb1b4..969f510dd 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3957,6 +3957,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     // Resolved in V3Width
                 } else if (nodep->name() == "randomize" || nodep->name() == "srandom"
                            || nodep->name() == "get_randstate" || nodep->name() == "set_randstate"
+                           || nodep->name() == "pre_randomize" || nodep->name() == "post_randomize"
                            || nodep->name() == "rand_mode" || nodep->name() == "constraint_mode") {
                     if (AstClass* const classp = VN_CAST(m_modp, Class)) {
                         nodep->classOrPackagep(classp);
diff --git a/test_regress/t/t_randomize_prepost.v b/test_regress/t/t_randomize_prepost.v
index 07b749c43..204881f52 100644
--- a/test_regress/t/t_randomize_prepost.v
+++ b/test_regress/t/t_randomize_prepost.v
@@ -4,52 +4,72 @@
 // any use, without warranty, 2022 by Wilson Snyder.
 // SPDX-License-Identifier: CC0-1.0
 
+`define stop $stop
+`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
 typedef enum int {
    RANDOMIZED = 20
 } enumed_t;
 
-class Cls;
-   int       pre;
-   rand enumed_t r;
-   int       post;
+class Base;
+  int m_pre;
+  rand enumed_t r;
+  int m_post;
 
-   function void pre_randomize;
-      if (pre != 0) $stop;
-      $display("%d", r);
-      if (r != enumed_t'(0)) $stop;
-      if (post != 0) $stop;
-      pre = 10;
-   endfunction
+  function void pre_randomize;
+    `checkd(m_pre, 0);
+    `checkd(r, enumed_t'(0));
+    `checkd(m_post, 0);
+    m_pre = 10;
+  endfunction
 
-   function void post_randomize;
-      if (pre != 10) $stop;
-      if (r != RANDOMIZED) $stop;
-      if (post != 0) $stop;
-      post = 30;
-   endfunction
+  function void post_randomize;
+    `checkd(m_pre, 10);
+    `checkd(r, RANDOMIZED);
+    `checkd(m_post, 0);
+    m_post = 30;
+  endfunction
+endclass
+
+class Cls extends Base;
+  int m_cpre;
+  int m_cpost;
+  function void pre_randomize;
+     m_cpre = 111;
+     super.pre_randomize();
+  endfunction
+
+  function void post_randomize;
+     m_cpost = 222;
+     super.post_randomize();
+  endfunction
 endclass
 
 module t (/*AUTOARG*/);
 
-   initial begin
-      Cls c;
-      int rand_result;
+  initial begin
+    Cls c;
+    int rand_result;
 
-      c = new;
-      rand_result = c.randomize();
-      if (rand_result != 1) $stop;
-      if (c.pre != 10) $stop;
-      if (c.r != RANDOMIZED) $stop;
-      if (c.post != 30) $stop;
+    c = new;
+    rand_result = c.randomize();
+    `checkd(rand_result, 1);
+    `checkd(c.m_pre, 10);
+    `checkd(c.m_cpre, 111);
+    `checkd(c.r, RANDOMIZED);
+    `checkd(c.m_post, 30);
+    `checkd(c.m_cpost, 222);
 
-      c = new;
-      rand_result = c.randomize() with { r == RANDOMIZED; };
-      if (rand_result != 1) $stop;
-      if (c.pre != 10) $stop;
-      if (c.r != RANDOMIZED) $stop;
-      if (c.post != 30) $stop;
+    c = new;
+    rand_result = c.randomize() with { r == RANDOMIZED; };
+    `checkd(rand_result, 1);
+    `checkd(c.m_pre, 10);
+    `checkd(c.m_cpre, 111);
+    `checkd(c.r, RANDOMIZED);
+    `checkd(c.m_post, 30);
+    `checkd(c.m_cpost, 222);
 
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
 endmodule
diff --git a/test_regress/t/t_randomize_prepost_alone.py b/test_regress/t/t_randomize_prepost_alone.py
new file mode 100755
index 000000000..cca4c9e73
--- /dev/null
+++ b/test_regress/t/t_randomize_prepost_alone.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint()
+
+test.passes()
diff --git a/test_regress/t/t_randomize_prepost_alone.v b/test_regress/t/t_randomize_prepost_alone.v
new file mode 100644
index 000000000..b6bdfd06a
--- /dev/null
+++ b/test_regress/t/t_randomize_prepost_alone.v
@@ -0,0 +1,22 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+package uvm_pkg;
+  class uvm_sequence_item;
+  endclass
+endpackage
+
+package tb_cpu_pkg;
+  import uvm_pkg::*;
+  class tb_cpu_seq_item extends uvm_sequence_item;
+    function void pre_randomize();
+      super.pre_randomize();
+    endfunction
+    function void post_randomize();
+      super.post_randomize();
+    endfunction
+  endclass
+endpackage

From 17c2512d03dc807c70c812199b95edb31c69e90f Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 26 Jun 2025 18:35:49 -0400
Subject: [PATCH 174/211] Fix `pre_randomize`/`post_randomize` when no
 randomize (#6128).

---
 Changes | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Changes b/Changes
index 991815d20..0395f46bf 100644
--- a/Changes
+++ b/Changes
@@ -77,9 +77,9 @@ Verilator 5.037 devel
 * Fix DFG binToOneHot table index missing driver (#6100). [Geza Lore]
 * Fix decoding octal string escapes with 1-2 digits (#6108).
 * Fix colon-divide operator without space (#6121). [Alex Solomatnikov]
-* Fix `pre_randomize`/`post_randomize` when no randomize (#6122). [Alex Solomatnikov]
 * Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
 * Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
+* Fix `pre_randomize`/`post_randomize` when no randomize (#6128). [Alex Solomatnikov]
 
 
 Verilator 5.036 2025-04-27

From 73696f0a71e601444a0b2daa4495e893dee7f736 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Fri, 27 Jun 2025 15:47:13 -0400
Subject: [PATCH 175/211] Tests: Add coverpoints test (#6118)

---
 test_regress/driver.py                        | 13 +++++-
 .../t/t_covergroup_coverpoints_unsup.out      | 29 +++++++++++++
 .../t/t_covergroup_coverpoints_unsup.py       | 20 +++++++++
 .../t/t_covergroup_coverpoints_unsup.v        | 43 +++++++++++++++++++
 4 files changed, 103 insertions(+), 2 deletions(-)
 create mode 100644 test_regress/t/t_covergroup_coverpoints_unsup.out
 create mode 100755 test_regress/t/t_covergroup_coverpoints_unsup.py
 create mode 100644 test_regress/t/t_covergroup_coverpoints_unsup.v

diff --git a/test_regress/driver.py b/test_regress/driver.py
index fd766c7b3..3cf46ab10 100755
--- a/test_regress/driver.py
+++ b/test_regress/driver.py
@@ -735,10 +735,19 @@ class VlTest:
         self.nc_define = 'NC'
         self.nc_flags = [
             "+licqueue", "+nowarn+LIBNOU", "+define+NC=1", "-q", "+assert", "+sv", "-c",
-            ("+access+r" if Args.trace else "")
+            "-xmlibdirname", (self.obj_dir + "/xcelium.d"), ("+access+r" if Args.trace else "")
         ]
         self.nc_flags2 = []  # Overridden in some sim files
-        self.nc_run_flags = ["+licqueue", "-q", "+assert", "+sv", "-R"]
+        self.nc_run_flags = [
+            "+licqueue",
+            "-q",
+            "+assert",
+            "+sv",
+            "-R",
+            "-covoverwrite",
+            "-xmlibdirname",
+            (self.obj_dir + "/xcelium.d"),
+        ]
         # ModelSim
         self.ms_define = 'MS'
         self.ms_flags = [
diff --git a/test_regress/t/t_covergroup_coverpoints_unsup.out b/test_regress/t/t_covergroup_coverpoints_unsup.out
new file mode 100644
index 000000000..456364f10
--- /dev/null
+++ b/test_regress/t/t_covergroup_coverpoints_unsup.out
@@ -0,0 +1,29 @@
+%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:21:5: Ignoring unsupported: covergroup
+   21 |     covergroup cg @(posedge clk);
+      |     ^~~~~~~~~~
+                   ... For warning description see https://verilator.org/warn/COVERIGN?v=latest
+                   ... Use "/* verilator lint_off COVERIGN */" and lint_on around source to disable this message.
+%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:21:19: Ignoring unsupported: coverage clocking event
+   21 |     covergroup cg @(posedge clk);
+      |                   ^
+%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:22:9: Ignoring unsupported: coverpoint
+   22 |         coverpoint a;
+      |         ^~~~~~~~~~
+%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:24:31: Ignoring unsupported: cover bin specification
+   24 |             bins the_bins [5] = { [0:20] };
+      |                               ^
+%Warning-COVERIGN: t/t_covergroup_coverpoints_unsup.v:23:9: Ignoring unsupported: coverpoint
+   23 |         coverpoint b {
+      |         ^~~~~~~~~~
+%Error: t/t_covergroup_coverpoints_unsup.v:35:48: Member 'a' not found in class 'cg'
+                                                : ... note: In instance 't'
+   35 |             $display("coverage a = %f", the_cg.a.get_inst_coverage());
+      |                                                ^
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error-UNSUPPORTED: t/t_covergroup_coverpoints_unsup.v:35:50: Unsupported: Member call on object 'CONST '1'h0'' which is a 'BASICDTYPE 'logic''
+                                                            : ... note: In instance 't'
+   35 |             $display("coverage a = %f", the_cg.a.get_inst_coverage());
+      |                                                  ^~~~~~~~~~~~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Verilator internal fault, sorry. Suggest trying --debug --gdbbt
+%Error: Command Failed
diff --git a/test_regress/t/t_covergroup_coverpoints_unsup.py b/test_regress/t/t_covergroup_coverpoints_unsup.py
new file mode 100755
index 000000000..e137e7309
--- /dev/null
+++ b/test_regress/t/t_covergroup_coverpoints_unsup.py
@@ -0,0 +1,20 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+if test.vlt_all:
+    test.lint(fails=True, expect_filename=test.golden_filename)
+else:
+    test.compile(nc_flags2=["-coverage", "functional"])
+    test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_covergroup_coverpoints_unsup.v b/test_regress/t/t_covergroup_coverpoints_unsup.v
new file mode 100644
index 000000000..8bff89487
--- /dev/null
+++ b/test_regress/t/t_covergroup_coverpoints_unsup.v
@@ -0,0 +1,43 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+    logic [3:0]  a;
+    int   b;
+    int cyc = 0;
+
+    always @(posedge clk) begin
+        cyc <= cyc + 1;
+    end
+
+    covergroup cg @(posedge clk);
+        coverpoint a;
+        coverpoint b {
+            bins the_bins [5] = { [0:20] };
+        }
+    endgroup
+
+    cg the_cg = new;
+
+    assign a = cyc[3:0];
+    assign b = cyc;
+
+    always @(posedge clk) begin
+        if (cyc == 14) begin
+            $display("coverage a = %f", the_cg.a.get_inst_coverage());
+            $display("coverage b = %f", the_cg.b.get_inst_coverage());
+            if (the_cg.a.get_inst_coverage() != 15/16.0) $stop();
+            if (the_cg.b.get_inst_coverage() != 4/5.0) $stop();
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+endmodule

From 3defaf8ffb18b521ddd95af4e53d8fce99b2ea4b Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 27 Jun 2025 20:38:01 -0400
Subject: [PATCH 176/211] Rename Verilator Config Files to Verilator Control
 Files.

Avoids conflict with IEEE `config`.  No functional change intended.
---
 docs/guide/exe_verilator.rst        |  39 ++--
 docs/guide/extensions.rst           |  42 ++---
 docs/guide/languages.rst            |   4 +-
 docs/guide/simulating.rst           |   2 +-
 docs/guide/verilating.rst           |   2 +-
 src/CMakeLists.txt                  |   4 +-
 src/Makefile_obj.in                 |   2 +-
 src/{V3Config.cpp => V3Control.cpp} | 282 ++++++++++++++--------------
 src/{V3Config.h => V3Control.h}     |   4 +-
 src/V3ExecGraph.cpp                 |   8 +-
 src/V3FileLine.cpp                  |   6 +-
 src/V3HierBlock.cpp                 |   8 +-
 src/V3LinkParse.cpp                 |  12 +-
 src/V3OrderParallel.cpp             |   6 +-
 src/V3PreProc.cpp                   |   8 +-
 src/V3ProtectLib.cpp                |   6 +-
 src/V3Task.cpp                      |   4 +-
 src/V3TraceDecl.cpp                 |   4 +-
 src/verilog.y                       |  62 +++---
 19 files changed, 253 insertions(+), 252 deletions(-)
 rename src/{V3Config.cpp => V3Control.cpp} (72%)
 rename src/{V3Config.h => V3Control.h} (97%)

diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 684d5646d..281e390aa 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -1808,7 +1808,7 @@ Summary:
    them systematically.
 
    The generated file is in the Verilator Configuration format, see
-   :ref:`Verilator Configuration Files`. The standard file extension is ".vlt".
+   :ref:`Verilator Control Files`. The standard file extension is ".vlt".
    These files can directly be consumed by Verilator, typically by placing
    the filename as part of the Verilator command line options. Waiver files
    need to be listed on the command line before listing the files they are
@@ -2049,20 +2049,20 @@ Summary:
    filenames.
 
 
-.. _Verilator Configuration Files:
+.. _Verilator Control Files:
 
-=============================
-Verilator Configuration Files
-=============================
+=======================
+Verilator Control Files
+=======================
 
 In addition to the command line, warnings and other features for the
-:command:`verilator` command may be controlled with Verilator Configuration
+:command:`verilator` command may be controlled with Verilator Control
 Files, not to be confused with IEEE Configurations blocks
-(`config...endconfig`) inside a file.  Typically named with the `.vlt`
-extension, what makes it a Verilator Configuration File is the
-:option:`\`verilator_config` directive.  These files, when named `.vlt`,
-are read before source code files; if this behavior is undesired, name the
-config file with a `.v` suffix.
+(`config...endconfig`).  Typically named with the `.vlt` extension, what
+makes it a Verilator Control File is the :option:`\`verilator_config`
+directive.  These files, when named `.vlt`, are read before source code
+files; if this behavior is undesired, name the control file with a `.v` or
+other suffix.
 
 An example:
 
@@ -2074,19 +2074,20 @@ An example:
 
 This disables WIDTH warnings globally, and CASEX for a specific file.
 
-Verilator configuration files are fed through the normal Verilog
+Verilator control files are fed through the normal Verilog
 preprocessor prior to parsing, so "\`ifdef", "\`define", and comments may
-be used as if the configuration file was standard Verilog code.
+be used as if the control file was standard Verilog code.
 
-Note that file or line-specific configuration only applies to files read
-after the configuration file. It is therefore recommended to pass the
-configuration file to Verilator as the first file.
+Note that file or line-specific control only applies to files read
+after the control file. It is therefore recommended to pass the
+control file to Verilator as the first file.
 
-The grammar of configuration commands is as follows:
+The grammar of control commands is as follows:
 
 .. option:: `verilator_config
 
-   Take the remaining text and treat it as Verilator configuration commands.
+   Take the remaining text and treat it as Verilator Control File commands.
+   See :ref:`Verilator Control Files`.
 
 .. option:: clock_enable -module "<modulename>" -var "<signame>"
 
@@ -2237,7 +2238,7 @@ The grammar of configuration commands is as follows:
    wildcard should be designed to match a single line; it is unspecified if
    the wildcard is allowed to match across multiple lines. The input
    contents does not include :vlopt:`--std <--no-std>` standard files, nor
-   configuration files (with :code:`verilator_config`). Typical use for
+   control files (with :code:`verilator_config`). Typical use for
    this is to match a version number present in the Verilog sources, so
    that the waiver will only apply to that version of the sources.
 
diff --git a/docs/guide/extensions.rst b/docs/guide/extensions.rst
index 1d54ca0b2..dae79bdea 100644
--- a/docs/guide/extensions.rst
+++ b/docs/guide/extensions.rst
@@ -30,7 +30,7 @@ or "`ifdef`"'s may break other tools.
 
    Specifies the entire begin/end block should be ignored for coverage
    analysis.  Must be inside a code block, e.g., within a begin/end pair.
-   Same as :option:`coverage_block_off` in :ref:`Verilator Configuration Files`.
+   Same as :option:`coverage_block_off` in :ref:`Verilator Control Files`.
 
 .. option:: `error [string]
 
@@ -136,14 +136,14 @@ or "`ifdef`"'s may break other tools.
 .. option:: `verilator_config
 
    Take the remaining text up to the next :option:`\`verilog` mode switch
-   and treat it as Verilator configuration commands.  See :ref:`Verilator
-   Configuration Files`.
+   and treat it as Verilator Control File commands.  See :ref:`Verilator
+   Control Files`.
 
 .. option:: `VERILATOR_TIMING
 
    The VERILATOR_TIMING define is set when :vlopt:`--timing` is used to
    allow an "\`ifdef" of code dependent on this feature.  Note that this define
-   is not affected by the :option:`timing_off` configuration file option
+   is not affected by the :option:`timing_off` control file option
    nor timing metacomments.
 
 .. option:: `verilog
@@ -246,7 +246,7 @@ or "`ifdef`"'s may break other tools.
    the scheduling algorithm, sometimes required for correct clock behavior,
    and always improving performance.
 
-   Same as :option:`clock_enable` configuration file option.
+   Same as :option:`clock_enable` control file option.
 
 
    .. t_dist_docs_style ignore /*verilator&32;no_clocker*/
@@ -265,7 +265,7 @@ or "`ifdef`"'s may break other tools.
    Specifies the entire begin/end block should be ignored for coverage
    analysis purposes.
 
-   Same as :option:`coverage_block_off` configuration file option.
+   Same as :option:`coverage_block_off` control file option.
 
 .. option:: /*verilator&32;coverage_off*/
 
@@ -313,7 +313,7 @@ or "`ifdef`"'s may break other tools.
    submodules will be named :code:`{submodule}__DOT__{subsignal}` as C++
    does not allow "." in signal names.
 
-   Same as :option:`inline` configuration file option.
+   Same as :option:`inline` control file option.
 
 .. option:: /*verilator&32;isolate_assignments*/
 
@@ -356,7 +356,7 @@ or "`ifdef`"'s may break other tools.
            end
          end
 
-   Same as :option:`isolate_assignments` configuration file option.
+   Same as :option:`isolate_assignments` control file option.
 
 .. option:: /*verilator&32;lint_off <msg>*/
 
@@ -395,7 +395,7 @@ or "`ifdef`"'s may break other tools.
    Specifies the module the comment appears in should not be inlined into
    any modules that use this module.
 
-   Same as :option:`no_inline` configuration file option.
+   Same as :option:`no_inline` control file option.
 
 .. option:: /*verilator&32;no_inline_task*/
 
@@ -406,7 +406,7 @@ or "`ifdef`"'s may break other tools.
    must be pure; they cannot reference any variables outside the task
    itself.
 
-   Same as :option:`no_inline` configuration file option.
+   Same as :option:`no_inline` control file option.
 
 .. option:: /*verilator&32;public*/ (on parameter)
 
@@ -440,7 +440,7 @@ or "`ifdef`"'s may break other tools.
    You may want to use DPI exports instead, as it's compatible with other
    simulators.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public*/ (on typedef enum)
 
@@ -463,7 +463,7 @@ or "`ifdef`"'s may break other tools.
    function that accesses the variable.  This is nicer as it provides an
    obvious entry point compatible across simulators.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public_[|flat|flat_rd|flat_rw]_on [@(<edge_list>)]*/ (as scope)
 
@@ -496,14 +496,14 @@ or "`ifdef`"'s may break other tools.
    the name of the signal or path to it may change based upon the module
    inlining which takes place.
 
-   Same as :option:`public_flat` configuration file option.
+   Same as :option:`public_flat` control file option.
 
 .. option:: /*verilator&32;public_flat_rd*/ (on variable)
 
    Used after an input, output, register, or wire declaration to indicate
    the signal should be declared public_flat (see above), but read-only.
 
-   Same as :option:`public_flat_rd` configuration file option.
+   Same as :option:`public_flat_rd` control file option.
 
 .. option:: /*verilator&32;public_flat_rw @(<edge_list>)*/ (on variable)
 
@@ -513,7 +513,7 @@ or "`ifdef`"'s may break other tools.
    given sensitivity edge list. Use of this is implied when using the
    :vlopt:`--public-flat-rw` option.
 
-   Same as :option:`public_flat_rw` configuration file option.
+   Same as :option:`public_flat_rw` control file option.
 
 .. option:: /*verilator&32;public_module*/
 
@@ -523,7 +523,7 @@ or "`ifdef`"'s may break other tools.
    contains public signals or \`systemc_ directives.  Use of this is
    implied when using the :vlopt:`--public` option.
 
-   Same as :option:`public` configuration file option.
+   Same as :option:`public` control file option.
 
 .. option:: /*verilator&32;public_off*/
 
@@ -538,7 +538,7 @@ or "`ifdef`"'s may break other tools.
    In general, you should avoid using this attribute when unnecessary, as
    the performance decreases significantly with increasing usage of sc_bv.
 
-   Same as :option:`sc_bv` configuration file option.
+   Same as :option:`sc_bv` control file option.
 
 .. option:: /*verilator&32;sc_clock*/
 
@@ -556,7 +556,7 @@ or "`ifdef`"'s may break other tools.
    $display-like behavior.  See the :file:`test_regress/t/t_dpi_display.v`
    file for an example.
 
-   Same as :option:`sformat` configuration file option.
+   Same as :option:`sformat` control file option.
 
 .. option:: /*verilator&32;split_var*/
 
@@ -603,7 +603,7 @@ or "`ifdef`"'s may break other tools.
          assign bar    = tmp[1] + c;
 
 
-   Same as :option:`split_var` configuration file option.
+   Same as :option:`split_var` control file option.
 
 .. option:: /*verilator&32;tag <text...>*/
 
@@ -618,14 +618,14 @@ or "`ifdef`"'s may break other tools.
    :option:`--no-timing`), and :code:`fork`/:code:`join*` blocks are
    converted into :code:`begin`/:code:`end` blocks.
 
-   Same as :option:`timing_off` configuration file option.
+   Same as :option:`timing_off` control file option.
 
 .. option:: /*verilator&32;timing_on*/
 
    Re-enable all timing constructs after this metacomment (only applicable
    after :option:`timing_off`).
 
-   Same as :option:`timing_on` configuration file option.
+   Same as :option:`timing_on` control file option.
 
 .. option:: /*verilator&32;trace_init_task*/
 
diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index 62c50b706..beb66229c 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -6,7 +6,7 @@ Input Languages
 ***************
 
 This section describes the languages Verilator takes as input.  See also
-:ref:`Verilator Configuration Files`.
+:ref:`Verilator Control Files`.
 
 
 Language Standard Support
@@ -168,7 +168,7 @@ files. The :option:`/*verilator&32;timing_off*/` and
 the encompassed timing controls and forks, regardless of the chosen
 :vlopt:`--timing` or :vlopt:`--no-timing` option. This can also be achieved
 using the :option:`timing_off` and :option:`timing_off` options in Verilator
-configuration files.
+Control Files.
 
 
 .. _Language Limitations:
diff --git a/docs/guide/simulating.rst b/docs/guide/simulating.rst
index 29231ef81..c18126a8a 100644
--- a/docs/guide/simulating.rst
+++ b/docs/guide/simulating.rst
@@ -315,7 +315,7 @@ Suppressing Coverage
 Using :option:`/*verilator&32;coverage_off*/` and
 :option:`/*verilator&32;coverage_on*/` around a block of code will disable
 and enable coverage respectively around that block. Or, use the
-:option:`coverage_block_off` configuration file option.
+:option:`coverage_block_off` control file option.
 
 Verilator automatically disables coverage of lines and branches with a
 $stop in them, as it is assumed that $stop branches contain an error check
diff --git a/docs/guide/verilating.rst b/docs/guide/verilating.rst
index 9b0d3f15b..dd760e8ea 100644
--- a/docs/guide/verilating.rst
+++ b/docs/guide/verilating.rst
@@ -94,7 +94,7 @@ There are two ways to mark a module:
 
 * Write :option:`/*verilator&32;hier_block*/` metacomment in HDL code.
 
-* Add a :option:`hier_block` line in the :ref:`Verilator Configuration Files`.
+* Add a :option:`hier_block` line in the :ref:`Verilator Control Files`.
 
 Then pass the :vlopt:`--hierarchical` option to Verilator.
 
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 5294a5384..9e53bb0e9 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -61,7 +61,7 @@ set(HEADERS
     V3Clock.h
     V3Combine.h
     V3Common.h
-    V3Config.h
+    V3Control.h
     V3Const.h
     V3Coverage.h
     V3CoverageJoin.h
@@ -216,7 +216,7 @@ set(COMMON_SOURCES
     V3Clock.cpp
     V3Combine.cpp
     V3Common.cpp
-    V3Config.cpp
+    V3Control.cpp
     V3Const__gen.cpp
     V3Coverage.cpp
     V3CoverageJoin.cpp
diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in
index 87a585fde..d160a3ab8 100644
--- a/src/Makefile_obj.in
+++ b/src/Makefile_obj.in
@@ -196,7 +196,7 @@ RAW_OBJS_PCH_ASTMT = \
   V3Ast.o \
   V3AstNodes.o \
   V3Broken.o \
-  V3Config.o \
+  V3Control.o \
   V3EmitCBase.o \
   V3EmitCConstPool.o \
   V3EmitCFunc.o \
diff --git a/src/V3Config.cpp b/src/V3Control.cpp
similarity index 72%
rename from src/V3Config.cpp
rename to src/V3Control.cpp
index f245cf9aa..69647d346 100644
--- a/src/V3Config.cpp
+++ b/src/V3Control.cpp
@@ -1,6 +1,6 @@
 // -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
-// DESCRIPTION: Verilator: Configuration Files
+// DESCRIPTION: Verilator: Verilator Control Files (.vlt) handling
 //
 // Code available from: https://verilator.org
 //
@@ -16,7 +16,7 @@
 
 #include "V3PchAstMT.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 
 #include "V3String.h"
 
@@ -34,7 +34,7 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 // cache of resolved entities. Entities stored in this container need an update
 // function that takes a reference of this type to join multiple entities into one.
 template <typename T>
-class V3ConfigWildcardResolver final {
+class V3ControlWildcardResolver final {
     mutable V3Mutex m_mutex;  // protects members
     // Pattern strings (wildcard, or simple name) to entities
     std::map<const std::string, T> m_mapPatterns VL_GUARDED_BY(m_mutex);
@@ -42,11 +42,11 @@ class V3ConfigWildcardResolver final {
     std::map<const std::string, std::unique_ptr<T>> m_mapResolved VL_GUARDED_BY(m_mutex);
 
 public:
-    V3ConfigWildcardResolver() = default;
-    ~V3ConfigWildcardResolver() = default;
+    V3ControlWildcardResolver() = default;
+    ~V3ControlWildcardResolver() = default;
 
     /// Update into maps from other
-    void update(const V3ConfigWildcardResolver& other) VL_MT_SAFE_EXCLUDES(m_mutex)
+    void update(const V3ControlWildcardResolver& other) VL_MT_SAFE_EXCLUDES(m_mutex)
         VL_EXCLUDES(other.m_mutex) {
         V3LockGuard lock{m_mutex};
         V3LockGuard otherLock{other.m_mutex};
@@ -84,23 +84,23 @@ public:
 };
 
 // Only public_flat_rw has the sensitity tree
-class V3ConfigVarAttr final {
+class V3ControlVarAttr final {
 public:
     VAttrType m_type;  // Type of attribute
     AstSenTree* m_sentreep;  // Sensitivity tree for public_flat_rw
-    explicit V3ConfigVarAttr(VAttrType type)
+    explicit V3ControlVarAttr(VAttrType type)
         : m_type{type}
         , m_sentreep{nullptr} {}
-    V3ConfigVarAttr(VAttrType type, AstSenTree* sentreep)
+    V3ControlVarAttr(VAttrType type, AstSenTree* sentreep)
         : m_type{type}
         , m_sentreep{sentreep} {}
 };
 
 // Overload vector with the required update function and to apply all entries
-class V3ConfigVar final : public std::vector<V3ConfigVarAttr> {
+class V3ControlVar final : public std::vector<V3ControlVarAttr> {
 public:
     // Update from other by copying all attributes
-    void update(const V3ConfigVar& node) {
+    void update(const V3ControlVar& node) {
         reserve(size() + node.size());
         insert(end(), node.begin(), node.end());
     }
@@ -116,12 +116,12 @@ public:
     }
 };
 
-using V3ConfigVarResolver = V3ConfigWildcardResolver<V3ConfigVar>;
+using V3ControlVarResolver = V3ControlWildcardResolver<V3ControlVar>;
 
 //======================================================================
 
 class WildcardContents final {
-    // Not mutex protected, current calling from V3Config::waive is protected by error's mutex
+    // Not mutex protected, current calling from V3Control::waive is protected by error's mutex
     // MEMBERS
     std::map<const std::string, bool> m_mapPatterns;  // Pattern match results
     std::deque<string> m_lines;  // Source text lines
@@ -185,15 +185,15 @@ public:
 //######################################################################
 // Function or task: Have variables and properties
 
-class V3ConfigFTask final {
-    V3ConfigVarResolver m_vars;  // Variables in function/task
+class V3ControlFTask final {
+    V3ControlVarResolver m_vars;  // Variables in function/task
     bool m_isolate = false;  // Isolate function return
     bool m_noinline = false;  // Don't inline function/task
     bool m_public = false;  // Public function/task
 
 public:
-    V3ConfigFTask() = default;
-    void update(const V3ConfigFTask& f) {
+    V3ControlFTask() = default;
+    void update(const V3ControlFTask& f) {
         // Don't overwrite true with false
         if (f.m_isolate) m_isolate = true;
         if (f.m_noinline) m_noinline = true;
@@ -201,7 +201,7 @@ public:
         m_vars.update(f.m_vars);
     }
 
-    V3ConfigVarResolver& vars() { return m_vars; }
+    V3ControlVarResolver& vars() { return m_vars; }
 
     void setIsolate(bool set) { m_isolate = set; }
     void setNoInline(bool set) { m_noinline = set; }
@@ -217,23 +217,23 @@ public:
     }
 };
 
-using V3ConfigFTaskResolver = V3ConfigWildcardResolver<V3ConfigFTask>;
+using V3ControlFTaskResolver = V3ControlWildcardResolver<V3ControlFTask>;
 
 //######################################################################
 // Modules have tasks, variables, named blocks and properties
 
-class V3ConfigModule final {
-    V3ConfigFTaskResolver m_tasks;  // Functions/tasks in module
-    V3ConfigVarResolver m_vars;  // Variables in module
+class V3ControlModule final {
+    V3ControlFTaskResolver m_tasks;  // Functions/tasks in module
+    V3ControlVarResolver m_vars;  // Variables in module
     std::unordered_set<std::string> m_coverageOffBlocks;  // List of block names for coverage_off
     std::set<VPragmaType> m_modPragmas;  // List of Pragmas for modules
     bool m_inline = false;  // Whether to force the inline
     bool m_inlineValue = false;  // The inline value (on/off)
 
 public:
-    V3ConfigModule() = default;
+    V3ControlModule() = default;
 
-    void update(const V3ConfigModule& m) {
+    void update(const V3ControlModule& m) {
         m_tasks.update(m.m_tasks);
         m_vars.update(m.m_vars);
         for (const string& i : m.m_coverageOffBlocks) m_coverageOffBlocks.insert(i);
@@ -246,8 +246,8 @@ public:
         }
     }
 
-    V3ConfigFTaskResolver& ftasks() { return m_tasks; }
-    V3ConfigVarResolver& vars() { return m_vars; }
+    V3ControlFTaskResolver& ftasks() { return m_tasks; }
+    V3ControlVarResolver& vars() { return m_vars; }
 
     void addCoverageBlockOff(const string& name) { m_coverageOffBlocks.insert(name); }
     void setInline(bool set) {
@@ -284,7 +284,7 @@ public:
     }
 };
 
-using V3ConfigModuleResolver = V3ConfigWildcardResolver<V3ConfigModule>;
+using V3ControlModuleResolver = V3ControlWildcardResolver<V3ControlModule>;
 
 //######################################################################
 // Files have:
@@ -292,17 +292,17 @@ using V3ConfigModuleResolver = V3ConfigWildcardResolver<V3ConfigModule>;
 //  - Line attributes: Attributes attached to lines
 
 // lint/coverage/tracing on/off
-class V3ConfigIgnoresLine final {
+class V3ControlIgnoresLine final {
 public:
     const int m_lineno;  // Line number to make change at
     const V3ErrorCode m_code;  // Error code
     const bool m_on;  // True to enable message
-    V3ConfigIgnoresLine(V3ErrorCode code, int lineno, bool on)
+    V3ControlIgnoresLine(V3ErrorCode code, int lineno, bool on)
         : m_lineno{lineno}
         , m_code{code}
         , m_on{on} {}
-    ~V3ConfigIgnoresLine() = default;
-    bool operator<(const V3ConfigIgnoresLine& rh) const {
+    ~V3ControlIgnoresLine() = default;
+    bool operator<(const V3ControlIgnoresLine& rh) const {
         if (m_lineno < rh.m_lineno) return true;
         if (m_lineno > rh.m_lineno) return false;
         if (m_code < rh.m_code) return true;
@@ -312,13 +312,13 @@ public:
         return (m_on > rh.m_on);
     }
 };
-std::ostream& operator<<(std::ostream& os, const V3ConfigIgnoresLine& rhs) {
+std::ostream& operator<<(std::ostream& os, const V3ControlIgnoresLine& rhs) {
     return os << rhs.m_lineno << ", " << rhs.m_code << ", " << rhs.m_on;
 }
 
 // Some attributes are attached to entities of the occur on a fileline
 // and multiple attributes can be attached to a line
-using V3ConfigLineAttribute = std::bitset<VPragmaType::ENUM_SIZE>;
+using V3ControlLineAttribute = std::bitset<VPragmaType::ENUM_SIZE>;
 
 class WaiverSetting final {
 public:
@@ -339,9 +339,9 @@ public:
 };
 
 // File entity
-class V3ConfigFile final {
-    using LineAttrMap = std::map<int, V3ConfigLineAttribute>;  // Map line->bitset of attributes
-    using IgnLines = std::multiset<V3ConfigIgnoresLine>;  // list of {line,code,on}
+class V3ControlFile final {
+    using LineAttrMap = std::map<int, V3ControlLineAttribute>;  // Map line->bitset of attributes
+    using IgnLines = std::multiset<V3ControlIgnoresLine>;  // list of {line,code,on}
     using Waivers = std::vector<WaiverSetting>;  // List of {code,wildcard string}
 
     LineAttrMap m_lineAttrs;  // Attributes to line mapping
@@ -361,11 +361,11 @@ class V3ConfigFile final {
     }
 
 public:
-    V3ConfigFile() {
+    V3ControlFile() {
         m_lastIgnore.lineno = -1;
         m_lastIgnore.it = m_ignLines.begin();
     }
-    void update(const V3ConfigFile& file) {
+    void update(const V3ControlFile& file) {
         // Copy in all Attributes
         for (const auto& itr : file.m_lineAttrs) m_lineAttrs[itr.first] |= itr.second;
         // Copy in all ignores
@@ -377,7 +377,7 @@ public:
     }
     void addLineAttribute(int lineno, VPragmaType attr) { m_lineAttrs[lineno].set(attr); }
     void addIgnore(V3ErrorCode code, int lineno, bool on) {
-        m_ignLines.insert(V3ConfigIgnoresLine{code, lineno, on});
+        m_ignLines.insert(V3ControlIgnoresLine{code, lineno, on});
         m_lastIgnore.it = m_ignLines.begin();
     }
     void addIgnoreMatch(V3ErrorCode code, const string& contents, const string& match) {
@@ -433,23 +433,23 @@ public:
     }
 };
 
-using V3ConfigFileResolver = V3ConfigWildcardResolver<V3ConfigFile>;
+using V3ControlFileResolver = V3ControlWildcardResolver<V3ControlFile>;
 
 //######################################################################
 // ScopeTrace tracking
 
-class V3ConfigScopeTraceEntry final {
+class V3ControlScopeTraceEntry final {
 public:
     const string m_scope;  // Scope or regexp to match
     const bool m_on = false;  // True to enable message
     int m_levels = 0;  // # levels, 0 = all, 1 = only this, ...
     // CONSTRUCTORS
-    V3ConfigScopeTraceEntry(const string& scope, bool on, int levels)
+    V3ControlScopeTraceEntry(const string& scope, bool on, int levels)
         : m_scope{scope}
         , m_on{on}
         , m_levels{levels} {}
-    ~V3ConfigScopeTraceEntry() = default;
-    bool operator<(const V3ConfigScopeTraceEntry& other) const {
+    ~V3ControlScopeTraceEntry() = default;
+    bool operator<(const V3ControlScopeTraceEntry& other) const {
         if (m_on < other.m_on) return true;
         if (m_on > other.m_on) return false;
         if (m_levels < other.m_levels) return true;
@@ -458,36 +458,36 @@ public:
     }
 };
 
-// Tracks what matches are known to hit against V3ConfigScopeTraceEntries
-class V3ConfigScopeTraceEntryMatch final {
+// Tracks what matches are known to hit against V3ControlScopeTraceEntries
+class V3ControlScopeTraceEntryMatch final {
 public:
-    const V3ConfigScopeTraceEntry* m_entryp;
+    const V3ControlScopeTraceEntry* m_entryp;
     const string m_scopepart;
-    V3ConfigScopeTraceEntryMatch(const V3ConfigScopeTraceEntry* entryp, const string& scopepart)
+    V3ControlScopeTraceEntryMatch(const V3ControlScopeTraceEntry* entryp, const string& scopepart)
         : m_entryp{entryp}
         , m_scopepart{scopepart} {}
-    bool operator<(const V3ConfigScopeTraceEntryMatch& other) const {
+    bool operator<(const V3ControlScopeTraceEntryMatch& other) const {
         if (m_entryp < other.m_entryp) return true;
         if (m_entryp > other.m_entryp) return false;
         return m_scopepart < other.m_scopepart;
     }
 };
 
-class V3ConfigScopeTraceResolver final {
-    std::vector<V3ConfigScopeTraceEntry> m_entries;  // User specified on/offs and levels
-    std::map<V3ConfigScopeTraceEntryMatch, bool> m_matchCache;  // Matching entries for speed
+class V3ControlScopeTraceResolver final {
+    std::vector<V3ControlScopeTraceEntry> m_entries;  // User specified on/offs and levels
+    std::map<V3ControlScopeTraceEntryMatch, bool> m_matchCache;  // Matching entries for speed
 
 public:
     void addScopeTraceOn(bool on, const string& scope, int levels) {
         UINFO(9, "addScopeTraceOn " << on << " '" << scope << "' "
                                     << " levels=" << levels);
-        m_entries.emplace_back(V3ConfigScopeTraceEntry{scope, on, levels});
+        m_entries.emplace_back(V3ControlScopeTraceEntry{scope, on, levels});
         m_matchCache.clear();
     }
 
-    bool getEntryMatch(const V3ConfigScopeTraceEntry* entp, const string& scopepart) {
+    bool getEntryMatch(const V3ControlScopeTraceEntry* entp, const string& scopepart) {
         // Return if a entry matches the scopepart, with memoization
-        const V3ConfigScopeTraceEntryMatch key{entp, scopepart};
+        const V3ControlScopeTraceEntryMatch key{entp, scopepart};
         const auto pair = m_matchCache.emplace(key, false);
         if (pair.second) pair.first->second = VString::wildmatch(scopepart, entp->m_scope);
         return pair.first->second;
@@ -532,40 +532,40 @@ public:
 //######################################################################
 // Resolve modules and files in the design
 
-class V3ConfigResolverHierWorkerEntry final {
+class V3ControlResolverHierWorkerEntry final {
     const int m_workers;
     FileLine* const m_flp;
 
 public:
-    explicit V3ConfigResolverHierWorkerEntry(int workers, FileLine* flp)
+    explicit V3ControlResolverHierWorkerEntry(int workers, FileLine* flp)
         : m_workers{workers}
         , m_flp{flp} {}
     int workers() const { return m_workers; }
     FileLine* flp() const { return m_flp; }
 };
 
-class V3ConfigResolver final {
+class V3ControlResolver final {
     enum ProfileDataMode : uint8_t { NONE = 0, MTASK = 1, HIER_DPI = 2 };
-    V3ConfigModuleResolver m_modules;  // Access to module names (with wildcards)
-    V3ConfigFileResolver m_files;  // Access to file names (with wildcards)
-    V3ConfigScopeTraceResolver m_scopeTraces;  // Regexp to trace enables
+    V3ControlModuleResolver m_modules;  // Access to module names (with wildcards)
+    V3ControlFileResolver m_files;  // Access to file names (with wildcards)
+    V3ControlScopeTraceResolver m_scopeTraces;  // Regexp to trace enables
     std::unordered_map<string, std::unordered_map<string, uint64_t>>
         m_profileData;  // Access to profile_data records
     uint8_t m_mode = NONE;
-    std::unordered_map<string, V3ConfigResolverHierWorkerEntry> m_hierWorkers;
+    std::unordered_map<string, V3ControlResolverHierWorkerEntry> m_hierWorkers;
     FileLine* m_profileFileLine = nullptr;
 
-    V3ConfigResolver() = default;
-    ~V3ConfigResolver() = default;
+    V3ControlResolver() = default;
+    ~V3ControlResolver() = default;
 
 public:
-    static V3ConfigResolver& s() {
-        static V3ConfigResolver s_singleton;
+    static V3ControlResolver& s() {
+        static V3ControlResolver s_singleton;
         return s_singleton;
     }
-    V3ConfigModuleResolver& modules() { return m_modules; }
-    V3ConfigFileResolver& files() { return m_files; }
-    V3ConfigScopeTraceResolver& scopeTraces() { return m_scopeTraces; }
+    V3ControlModuleResolver& modules() { return m_modules; }
+    V3ControlFileResolver& files() { return m_files; }
+    V3ControlScopeTraceResolver& scopeTraces() { return m_scopeTraces; }
 
     void addProfileData(FileLine* fl, const string& hierDpi, uint64_t cost) {
         // Empty key for hierarchical DPI wrapper costs.
@@ -607,76 +607,76 @@ public:
 };
 
 //######################################################################
-// V3Config
+// V3Control
 
-void V3Config::addCaseFull(const string& filename, int lineno) {
-    V3ConfigFile& file = V3ConfigResolver::s().files().at(filename);
+void V3Control::addCaseFull(const string& filename, int lineno) {
+    V3ControlFile& file = V3ControlResolver::s().files().at(filename);
     file.addLineAttribute(lineno, VPragmaType::FULL_CASE);
 }
 
-void V3Config::addCaseParallel(const string& filename, int lineno) {
-    V3ConfigFile& file = V3ConfigResolver::s().files().at(filename);
+void V3Control::addCaseParallel(const string& filename, int lineno) {
+    V3ControlFile& file = V3ControlResolver::s().files().at(filename);
     file.addLineAttribute(lineno, VPragmaType::PARALLEL_CASE);
 }
 
-void V3Config::addCoverageBlockOff(const string& filename, int lineno) {
-    V3ConfigFile& file = V3ConfigResolver::s().files().at(filename);
+void V3Control::addCoverageBlockOff(const string& filename, int lineno) {
+    V3ControlFile& file = V3ControlResolver::s().files().at(filename);
     file.addLineAttribute(lineno, VPragmaType::COVERAGE_BLOCK_OFF);
 }
 
-void V3Config::addCoverageBlockOff(const string& module, const string& blockname) {
-    V3ConfigResolver::s().modules().at(module).addCoverageBlockOff(blockname);
+void V3Control::addCoverageBlockOff(const string& module, const string& blockname) {
+    V3ControlResolver::s().modules().at(module).addCoverageBlockOff(blockname);
 }
 
-void V3Config::addHierWorkers(FileLine* fl, const string& model, int workers) {
-    V3ConfigResolver::s().addHierWorkers(fl, model, workers);
+void V3Control::addHierWorkers(FileLine* fl, const string& model, int workers) {
+    V3ControlResolver::s().addHierWorkers(fl, model, workers);
 }
 
-void V3Config::addIgnore(V3ErrorCode code, bool on, const string& filename, int min, int max) {
+void V3Control::addIgnore(V3ErrorCode code, bool on, const string& filename, int min, int max) {
     if (filename == "*") {
         FileLine::globalWarnOff(code, !on);
     } else {
-        V3ConfigResolver::s().files().at(filename).addIgnore(code, min, on);
-        if (max) V3ConfigResolver::s().files().at(filename).addIgnore(code, max, !on);
+        V3ControlResolver::s().files().at(filename).addIgnore(code, min, on);
+        if (max) V3ControlResolver::s().files().at(filename).addIgnore(code, max, !on);
     }
 }
 
-void V3Config::addIgnoreMatch(V3ErrorCode code, const string& filename, const string& contents,
-                              const string& match) {
-    V3ConfigResolver::s().files().at(filename).addIgnoreMatch(code, contents, match);
+void V3Control::addIgnoreMatch(V3ErrorCode code, const string& filename, const string& contents,
+                               const string& match) {
+    V3ControlResolver::s().files().at(filename).addIgnoreMatch(code, contents, match);
 }
 
-void V3Config::addInline(FileLine* fl, const string& module, const string& ftask, bool on) {
+void V3Control::addInline(FileLine* fl, const string& module, const string& ftask, bool on) {
     if (ftask.empty()) {
-        V3ConfigResolver::s().modules().at(module).setInline(on);
+        V3ControlResolver::s().modules().at(module).setInline(on);
     } else {
         if (!on) {
             fl->v3error("Unsupported: no_inline for tasks");
         } else {
-            V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setNoInline(on);
+            V3ControlResolver::s().modules().at(module).ftasks().at(ftask).setNoInline(on);
         }
     }
 }
 
-void V3Config::addModulePragma(const string& module, VPragmaType pragma) {
-    V3ConfigResolver::s().modules().at(module).addModulePragma(pragma);
+void V3Control::addModulePragma(const string& module, VPragmaType pragma) {
+    V3ControlResolver::s().modules().at(module).addModulePragma(pragma);
 }
 
-void V3Config::addProfileData(FileLine* fl, const string& hierDpi, uint64_t cost) {
-    V3ConfigResolver::s().addProfileData(fl, hierDpi, cost);
+void V3Control::addProfileData(FileLine* fl, const string& hierDpi, uint64_t cost) {
+    V3ControlResolver::s().addProfileData(fl, hierDpi, cost);
 }
 
-void V3Config::addProfileData(FileLine* fl, const string& model, const string& key,
-                              uint64_t cost) {
-    V3ConfigResolver::s().addProfileData(fl, model, key, cost);
+void V3Control::addProfileData(FileLine* fl, const string& model, const string& key,
+                               uint64_t cost) {
+    V3ControlResolver::s().addProfileData(fl, model, key, cost);
 }
 
-void V3Config::addScopeTraceOn(bool on, const string& scope, int levels) {
-    V3ConfigResolver::s().scopeTraces().addScopeTraceOn(on, scope, levels);
+void V3Control::addScopeTraceOn(bool on, const string& scope, int levels) {
+    V3ControlResolver::s().scopeTraces().addScopeTraceOn(on, scope, levels);
 }
 
-void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftask,
-                          const string& var, VAttrType attr, AstSenTree* sensep) {
+void V3Control::addVarAttr(FileLine* fl, const string& module, const string& ftask,
+                           const string& var, VAttrType attr, AstSenTree* sensep) {
     // Semantics: sensep only if public_flat_rw
     if ((attr != VAttrType::VAR_PUBLIC_FLAT_RW) && sensep) {
         sensep->v3error("sensitivity not expected for attribute");
@@ -688,15 +688,15 @@ void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftas
             if (ftask.empty()) {
                 fl->v3error("isolate_assignments only applies to signals or functions/tasks");
             } else {
-                V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setIsolate(true);
+                V3ControlResolver::s().modules().at(module).ftasks().at(ftask).setIsolate(true);
             }
         } else if (attr == VAttrType::VAR_PUBLIC) {
             if (ftask.empty()) {
                 // public module, this is the only exception from var here
-                V3ConfigResolver::s().modules().at(module).addModulePragma(
+                V3ControlResolver::s().modules().at(module).addModulePragma(
                     VPragmaType::PUBLIC_MODULE);
             } else {
-                V3ConfigResolver::s().modules().at(module).ftasks().at(ftask).setPublic(true);
+                V3ControlResolver::s().modules().at(module).ftasks().at(ftask).setPublic(true);
             }
         } else {
             fl->v3error("missing -var");
@@ -708,61 +708,61 @@ void V3Config::addVarAttr(FileLine* fl, const string& module, const string& ftas
             } else if (!ftask.empty()) {
                 fl->v3error("Signals inside functions/tasks cannot be marked forceable");
             } else {
-                V3ConfigResolver::s().modules().at(module).vars().at(var).push_back(
-                    V3ConfigVarAttr{attr});
+                V3ControlResolver::s().modules().at(module).vars().at(var).push_back(
+                    V3ControlVarAttr{attr});
             }
         } else {
-            V3ConfigModule& mod = V3ConfigResolver::s().modules().at(module);
+            V3ControlModule& mod = V3ControlResolver::s().modules().at(module);
             if (ftask.empty()) {
-                mod.vars().at(var).push_back(V3ConfigVarAttr{attr, sensep});
+                mod.vars().at(var).push_back(V3ControlVarAttr{attr, sensep});
             } else {
-                mod.ftasks().at(ftask).vars().at(var).push_back(V3ConfigVarAttr{attr, sensep});
+                mod.ftasks().at(ftask).vars().at(var).push_back(V3ControlVarAttr{attr, sensep});
             }
         }
     }
 }
 
-void V3Config::applyCase(AstCase* nodep) {
+void V3Control::applyCase(AstCase* nodep) {
     const string& filename = nodep->fileline()->filename();
-    V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename);
+    V3ControlFile* filep = V3ControlResolver::s().files().resolve(filename);
     if (filep) filep->applyCase(nodep);
 }
 
-void V3Config::applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep) {
+void V3Control::applyCoverageBlock(AstNodeModule* modulep, AstBegin* nodep) {
     const string& filename = nodep->fileline()->filename();
-    V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename);
+    V3ControlFile* filep = V3ControlResolver::s().files().resolve(filename);
     if (filep) filep->applyBlock(nodep);
     const string& modname = modulep->name();
-    V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname);
+    V3ControlModule* modp = V3ControlResolver::s().modules().resolve(modname);
     if (modp) modp->applyBlock(nodep);
 }
 
-void V3Config::applyIgnores(FileLine* filelinep) {
+void V3Control::applyIgnores(FileLine* filelinep) {
     const string& filename = filelinep->filename();
-    V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filename);
+    V3ControlFile* filep = V3ControlResolver::s().files().resolve(filename);
     if (filep) filep->applyIgnores(filelinep);
 }
 
-void V3Config::applyModule(AstNodeModule* modulep) {
+void V3Control::applyModule(AstNodeModule* modulep) {
     const string& modname = modulep->origName();
-    V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname);
+    V3ControlModule* modp = V3ControlResolver::s().modules().resolve(modname);
     if (modp) modp->apply(modulep);
 }
 
-void V3Config::applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp) {
+void V3Control::applyFTask(AstNodeModule* modulep, AstNodeFTask* ftaskp) {
     const string& modname = modulep->name();
-    V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modname);
+    V3ControlModule* modp = V3ControlResolver::s().modules().resolve(modname);
     if (!modp) return;
-    const V3ConfigFTask* const ftp = modp->ftasks().resolve(ftaskp->name());
+    const V3ControlFTask* const ftp = modp->ftasks().resolve(ftaskp->name());
     if (ftp) ftp->apply(ftaskp);
 }
 
-void V3Config::applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp) {
-    V3ConfigVar* vp;
-    V3ConfigModule* modp = V3ConfigResolver::s().modules().resolve(modulep->name());
+void V3Control::applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar* varp) {
+    V3ControlVar* vp;
+    V3ControlModule* modp = V3ControlResolver::s().modules().resolve(modulep->name());
     if (!modp) return;
     if (ftaskp) {
-        V3ConfigFTask* ftp = modp->ftasks().resolve(ftaskp->name());
+        V3ControlFTask* ftp = modp->ftasks().resolve(ftaskp->name());
         if (!ftp) return;
         vp = ftp->vars().resolve(varp->name());
     } else {
@@ -771,33 +771,33 @@ void V3Config::applyVarAttr(AstNodeModule* modulep, AstNodeFTask* ftaskp, AstVar
     if (vp) vp->apply(varp);
 }
 
-int V3Config::getHierWorkers(const string& model) {
-    return V3ConfigResolver::s().getHierWorkers(model);
+int V3Control::getHierWorkers(const string& model) {
+    return V3ControlResolver::s().getHierWorkers(model);
 }
-FileLine* V3Config::getHierWorkersFileLine(const string& model) {
-    return V3ConfigResolver::s().getHierWorkersFileLine(model);
+FileLine* V3Control::getHierWorkersFileLine(const string& model) {
+    return V3ControlResolver::s().getHierWorkersFileLine(model);
 }
-uint64_t V3Config::getProfileData(const string& hierDpi) {
-    return V3ConfigResolver::s().getProfileData(hierDpi);
+uint64_t V3Control::getProfileData(const string& hierDpi) {
+    return V3ControlResolver::s().getProfileData(hierDpi);
 }
-uint64_t V3Config::getProfileData(const string& model, const string& key) {
-    return V3ConfigResolver::s().getProfileData(model, key);
+uint64_t V3Control::getProfileData(const string& model, const string& key) {
+    return V3ControlResolver::s().getProfileData(model, key);
 }
-FileLine* V3Config::getProfileDataFileLine() {
-    return V3ConfigResolver::s().getProfileDataFileLine();
+FileLine* V3Control::getProfileDataFileLine() {
+    return V3ControlResolver::s().getProfileDataFileLine();
 }
-bool V3Config::getScopeTraceOn(const string& scope) {
-    return V3ConfigResolver::s().scopeTraces().getScopeTraceOn(scope);
+bool V3Control::getScopeTraceOn(const string& scope) {
+    return V3ControlResolver::s().scopeTraces().getScopeTraceOn(scope);
 }
 
-void V3Config::contentsPushText(const string& text) { return WildcardContents::pushText(text); }
+void V3Control::contentsPushText(const string& text) { return WildcardContents::pushText(text); }
 
-bool V3Config::containsMTaskProfileData() {
-    return V3ConfigResolver::s().containsMTaskProfileData();
+bool V3Control::containsMTaskProfileData() {
+    return V3ControlResolver::s().containsMTaskProfileData();
 }
 
-bool V3Config::waive(FileLine* filelinep, V3ErrorCode code, const string& message) {
-    V3ConfigFile* filep = V3ConfigResolver::s().files().resolve(filelinep->filename());
+bool V3Control::waive(FileLine* filelinep, V3ErrorCode code, const string& message) {
+    V3ControlFile* filep = V3ControlResolver::s().files().resolve(filelinep->filename());
     if (!filep) return false;
     return filep->waive(code, message);
 }
diff --git a/src/V3Config.h b/src/V3Control.h
similarity index 97%
rename from src/V3Config.h
rename to src/V3Control.h
index 6cae9e04f..ff26e5ab6 100644
--- a/src/V3Config.h
+++ b/src/V3Control.h
@@ -1,6 +1,6 @@
 // -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
-// DESCRIPTION: Verilator: Configuration Files
+// DESCRIPTION: Verilator: Verilator Control Files (.vlt) handling
 //
 // Code available from: https://verilator.org
 //
@@ -27,7 +27,7 @@
 
 //######################################################################
 
-class V3Config final {
+class V3Control final {
 public:
     static void addCaseFull(const string& file, int lineno);
     static void addCaseParallel(const string& file, int lineno);
diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index 473e42620..b470041d1 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -18,7 +18,7 @@
 
 #include "V3ExecGraph.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3EmitCBase.h"
 #include "V3File.h"
 #include "V3GraphStream.h"
@@ -799,7 +799,7 @@ void fillinCosts(V3Graph* execMTaskGraphp) {
         // This estimate is 64 bits, but the final mtask graph algorithm needs 32 bits
         const uint64_t costEstimate = V3InstrCount::count(mtp->bodyp(), false);
         const uint64_t costProfiled
-            = V3Config::getProfileData(v3Global.opt.prefix(), mtp->hashName());
+            = V3Control::getProfileData(v3Global.opt.prefix(), mtp->hashName());
         if (costProfiled) {
             UINFO(5, "Profile data for mtask " << mtp->id() << " " << mtp->hashName()
                                                << " cost override " << costProfiled);
@@ -830,8 +830,8 @@ void fillinCosts(V3Graph* execMTaskGraphp) {
     }
 
     if (missingProfiles) {
-        if (FileLine* const fl = V3Config::getProfileDataFileLine()) {
-            if (V3Config::containsMTaskProfileData()) {
+        if (FileLine* const fl = V3Control::getProfileDataFileLine()) {
+            if (V3Control::containsMTaskProfileData()) {
                 fl->v3warn(PROFOUTOFDATE, "Profile data for mtasks may be out of date. "
                                               << missingProfiles << " of " << totalEstimates
                                               << " mtasks had no data");
diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp
index ffa8fdc45..1631d6e4a 100644
--- a/src/V3FileLine.cpp
+++ b/src/V3FileLine.cpp
@@ -24,7 +24,7 @@
 #include "V3String.h"
 #ifndef V3ERROR_NO_GLOBAL_
 # include "V3Global.h"
-# include "V3Config.h"
+# include "V3Control.h"
 # include "V3File.h"
 #endif
 #include "V3Waiver.h"
@@ -305,7 +305,7 @@ void FileLine::forwardToken(const char* textp, size_t size, bool trackLines) {
 
 void FileLine::applyIgnores() {
 #ifndef V3ERROR_NO_GLOBAL_
-    V3Config::applyIgnores(this);  // Toggle warnings based on global config file
+    V3Control::applyIgnores(this);  // Toggle warnings based on global config file
 #endif
 }
 
@@ -441,7 +441,7 @@ void FileLine::v3errorEnd(std::ostringstream& sstr, const string& extra)
             nsstr << add;
         }
         const string waiverText = V3Error::stripMetaText(wsstr.str(), false);
-        m_waive = V3Config::waive(this, V3Error::s().errorCode(), waiverText);
+        m_waive = V3Control::waive(this, V3Error::s().errorCode(), waiverText);
         if (m_waive) {
             V3Error::s().suppressThisWarning();
         } else {
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index 41d542993..b248a6f21 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -38,7 +38,7 @@
 // Here is more detailed internal process.
 // 1) Parser adds VPragmaType::HIER_BLOCK of AstPragma to modules
 //    that are marked with /*verilator hier_block*/ metacomment in Verilator run a).
-// 2) If module type parameters are present, V3Config marks hier param modules
+// 2) If module type parameters are present, V3Control marks hier param modules
 // (marked with hier_params verilator config pragma) as modp->hierParams(true).
 // This is done in run b), de-parametrized modules are mapped with their params one-to-one.
 // 3) AstModule with HIER_BLOCK pragma is marked modp->hierBlock(true)
@@ -88,7 +88,7 @@
 
 #include "V3HierBlock.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3EmitV.h"
 #include "V3File.h"
 #include "V3Os.h"
@@ -189,10 +189,10 @@ V3StringList V3HierBlock::commandArgs(bool forCMake) const {
     if (!params().gTypeParams().empty())
         opts.push_back(" --hierarchical-params-file " + typeParametersFilename());
 
-    const int blockThreads = V3Config::getHierWorkers(m_modp->origName());
+    const int blockThreads = V3Control::getHierWorkers(m_modp->origName());
     if (blockThreads > 1) {
         if (hasParent()) {
-            V3Config::getHierWorkersFileLine(m_modp->origName())
+            V3Control::getHierWorkersFileLine(m_modp->origName())
                 ->v3warn(E_UNSUPPORTED, "Specifying workers for nested hierarchical blocks");
         } else {
             if (v3Global.opt.threads() < blockThreads) {
diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp
index cd0a309bb..c1128b796 100644
--- a/src/V3LinkParse.cpp
+++ b/src/V3LinkParse.cpp
@@ -22,7 +22,7 @@
 
 #include "V3LinkParse.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3Stats.h"
 
 #include <set>
@@ -181,7 +181,7 @@ class LinkParseVisitor final : public VNVisitor {
             // Mark class methods
             if (VN_IS(m_modp, Class)) nodep->classMethod(true);
 
-            V3Config::applyFTask(m_modp, nodep);
+            V3Control::applyFTask(m_modp, nodep);
             cleanFileline(nodep);
             VL_RESTORER(m_ftaskp);
             VL_RESTORER(m_lifetime);
@@ -340,7 +340,7 @@ class LinkParseVisitor final : public VNVisitor {
         }
 
         // Maybe this variable has a signal attribute
-        V3Config::applyVarAttr(m_modp, m_ftaskp, nodep);
+        V3Control::applyVarAttr(m_modp, m_ftaskp, nodep);
 
         if (v3Global.opt.anyPublicFlat() && nodep->varType().isVPIAccessible()) {
             if (v3Global.opt.publicFlatRW()) {
@@ -616,7 +616,7 @@ class LinkParseVisitor final : public VNVisitor {
         iterateChildren(nodep);
     }
     void visit(AstNodeModule* nodep) override {
-        V3Config::applyModule(nodep);
+        V3Control::applyModule(nodep);
         ++m_statModules;
 
         VL_RESTORER(m_modp);
@@ -676,7 +676,7 @@ class LinkParseVisitor final : public VNVisitor {
     void visit(AstRestrict* nodep) override { visitIterateNoValueMod(nodep); }
 
     void visit(AstBegin* nodep) override {
-        V3Config::applyCoverageBlock(m_modp, nodep);
+        V3Control::applyCoverageBlock(m_modp, nodep);
         cleanFileline(nodep);
         VL_RESTORER(m_beginDepth);
         m_beginDepth++;
@@ -754,7 +754,7 @@ class LinkParseVisitor final : public VNVisitor {
         }
     }
     void visit(AstCase* nodep) override {
-        V3Config::applyCase(nodep);
+        V3Control::applyCase(nodep);
         cleanFileline(nodep);
         iterateChildren(nodep);
     }
diff --git a/src/V3OrderParallel.cpp b/src/V3OrderParallel.cpp
index 8dbe5291c..52057018e 100644
--- a/src/V3OrderParallel.cpp
+++ b/src/V3OrderParallel.cpp
@@ -20,7 +20,7 @@
 
 #include "V3PchAstNoMT.h"  // VL_MT_DISABLED_CODE_UNIT
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3ExecGraph.h"
 #include "V3File.h"
 #include "V3Graph.h"
@@ -1719,7 +1719,7 @@ class DpiImportCallVisitor final : public VNVisitor {
                                  : !v3Global.opt.threadsDpiUnpure()) {
                 // If hierarchical DPI wrapper cost is not found or is of a 0 cost,
                 // we have a normal DPI which induces DPI hazard by default.
-                m_hasDpiHazard = V3Config::getProfileData(nodep->cname()) == 0;
+                m_hasDpiHazard = V3Control::getProfileData(nodep->cname()) == 0;
                 UINFO(9, "DPI wrapper '" << nodep->cname()
                                          << "' has dpi hazard = " << m_hasDpiHazard);
             }
@@ -1753,7 +1753,7 @@ class DpiThreadsVisitor final : public VNVisitorConst {
 
     // METHODS
     void visit(AstCFunc* nodep) override {
-        m_threads = std::max(m_threads, V3Config::getHierWorkers(nodep->cname()));
+        m_threads = std::max(m_threads, V3Control::getHierWorkers(nodep->cname()));
         iterateChildrenConst(nodep);
     }
     void visit(AstNodeCCall* nodep) override { iterateConst(nodep->funcp()); }
diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp
index 0cb788bc4..a29d7c750 100644
--- a/src/V3PreProc.cpp
+++ b/src/V3PreProc.cpp
@@ -21,7 +21,7 @@
 
 #include "V3PreProc.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3Error.h"
 #include "V3File.h"
 #include "V3Global.h"
@@ -846,7 +846,7 @@ void V3PreProcImp::openFile(FileLine*, VInFilter* filterp, const string& filenam
     flsp->newContent();
     for (const string& i : wholefile) flsp->contentp()->pushText(i);
 
-    // Save contents for V3Config --contents
+    // Save contents for V3Control --contents
     if (filename != V3Options::getStdPackagePath()) {
         bool containsVlt = false;
         for (const string& i : wholefile) {
@@ -857,7 +857,7 @@ void V3PreProcImp::openFile(FileLine*, VInFilter* filterp, const string& filenam
             }
         }
         if (!containsVlt) {
-            for (const string& i : wholefile) V3Config::contentsPushText(i);
+            for (const string& i : wholefile) V3Control::contentsPushText(i);
         }
     }
 
@@ -906,7 +906,7 @@ void V3PreProcImp::openFile(FileLine*, VInFilter* filterp, const string& filenam
         FileLine* const fl = new FileLine{flsp};
         fl->contentLineno(eof_lineno);
         fl->column(eof_newline + 1, eof_newline + 1);
-        V3Config::applyIgnores(fl);  // As preprocessor hasn't otherwise applied yet
+        V3Control::applyIgnores(fl);  // As preprocessor hasn't otherwise applied yet
         fl->v3warn(EOFNEWLINE, "Missing newline at end of file (POSIX 3.206).\n"
                                    << fl->warnMore() << "... Suggest add newline.");
     }
diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp
index 663c0faaa..f11cdb9a2 100644
--- a/src/V3ProtectLib.cpp
+++ b/src/V3ProtectLib.cpp
@@ -18,7 +18,7 @@
 
 #include "V3ProtectLib.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3Hasher.h"
 #include "V3InstrCount.h"
 #include "V3String.h"
@@ -126,10 +126,10 @@ class ProtectVisitor final : public VNVisitor {
 
         txtp->addText(fl, "hier_workers -hier-dpi \"" + m_libName
                               + "_protectlib_combo_update\" -workers 16'd"
-                              + std::to_string(V3Config::getHierWorkers(m_libName)) + "\n");
+                              + std::to_string(V3Control::getHierWorkers(m_libName)) + "\n");
         txtp->addText(fl, "hier_workers -hier-dpi \"" + m_libName
                               + "_protectlib_seq_update\" -workers 16'd"
-                              + std::to_string(V3Config::getHierWorkers(m_libName)) + "\n");
+                              + std::to_string(V3Control::getHierWorkers(m_libName)) + "\n");
         // No workers for combo_ignore
         txtp->addText(fl, "`verilog\n");
         txtp->addText(fl, "`endif\n");
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 23d42ad3e..54a810f2d 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -27,8 +27,8 @@
 
 #include "V3Task.h"
 
-#include "V3Config.h"
 #include "V3Const.h"
+#include "V3Control.h"
 #include "V3EmitCBase.h"
 #include "V3Graph.h"
 #include "V3Stats.h"
@@ -997,7 +997,7 @@ class TaskVisitor final : public VNVisitor {
         funcp->protect(false);
         funcp->dpiPure(nodep->dpiPure());
 
-        const int cost = static_cast<int>(V3Config::getProfileData(funcp->name()));
+        const int cost = static_cast<int>(V3Control::getProfileData(funcp->name()));
         m_statHierDpisWithCosts += (cost != 0);
         funcp->cost(cost);
 
diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp
index 40359fbaf..bbc2d4e47 100644
--- a/src/V3TraceDecl.cpp
+++ b/src/V3TraceDecl.cpp
@@ -24,7 +24,7 @@
 
 #include "V3TraceDecl.h"
 
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3EmitCBase.h"
 #include "V3Stats.h"
 
@@ -184,7 +184,7 @@ class TraceDeclVisitor final : public VNVisitor {
                 if (!prettyName.empty() && prettyName[0] == '_') return "Leading underscore";
                 if (prettyName.find("._") != string::npos) return "Inlined leading underscore";
             }
-            if (!V3Config::getScopeTraceOn(prettyName)) return "Vlt scope trace_off";
+            if (!V3Control::getScopeTraceOn(prettyName)) return "Vlt scope trace_off";
         }
         return nullptr;
     }
diff --git a/src/verilog.y b/src/verilog.y
index fc3dc5224..832af56b7 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -23,7 +23,7 @@
 #endif
 // clang-format on
 #include "V3Ast.h"
-#include "V3Config.h"
+#include "V3Control.h"
 #include "V3Global.h"
 #include "V3ParseImp.h"  // Defines YYTYPE; before including bison header
 
@@ -7713,93 +7713,93 @@ colon<fl>:                      // Generic colon that isn't making a label (e.g.
 vltItem:
         //                      // TODO support arbitrary order of arguments
                 vltOffFront
-                        { V3Config::addIgnore($1, false, "*", 0, 0); }
+                        { V3Control::addIgnore($1, false, "*", 0, 0); }
         |       vltOffFront vltDFile
-                        { V3Config::addIgnore($1, false, *$2, 0, 0); }
+                        { V3Control::addIgnore($1, false, *$2, 0, 0); }
         |       vltOffFront vltDFile yVLT_D_LINES yaINTNUM
-                        { V3Config::addIgnore($1, false, *$2, $4->toUInt(), $4->toUInt() + 1); }
+                        { V3Control::addIgnore($1, false, *$2, $4->toUInt(), $4->toUInt() + 1); }
         |       vltOffFront vltDFile yVLT_D_LINES yaINTNUM '-' yaINTNUM
-                        { V3Config::addIgnore($1, false, *$2, $4->toUInt(), $6->toUInt() + 1); }
+                        { V3Control::addIgnore($1, false, *$2, $4->toUInt(), $6->toUInt() + 1); }
         |       vltOffFront vltDFile vltDMatch
                         { if (($1 == V3ErrorCode::I_COVERAGE) || ($1 == V3ErrorCode::I_TRACING)) {
                               $<fl>1->v3error("Argument -match only supported for lint_off");
                           } else {
-                              V3Config::addIgnoreMatch($1, *$2, "", *$3);
+                              V3Control::addIgnoreMatch($1, *$2, "", *$3);
                           }}
         |       vltOffFront vltDFile vltDContents
                         { if (($1 == V3ErrorCode::I_COVERAGE) || ($1 == V3ErrorCode::I_TRACING)) {
                               $<fl>1->v3error("Argument -match only supported for lint_off");
                           } else {
-                              V3Config::addIgnoreMatch($1, *$2, *$3, "*");
+                              V3Control::addIgnoreMatch($1, *$2, *$3, "*");
                           }}
         |       vltOffFront vltDFile vltDContents vltDMatch
                         { if (($1 == V3ErrorCode::I_COVERAGE) || ($1 == V3ErrorCode::I_TRACING)) {
                               $<fl>1->v3error("Argument -match only supported for lint_off");
                           } else {
-                              V3Config::addIgnoreMatch($1, *$2, *$3, *$4);
+                              V3Control::addIgnoreMatch($1, *$2, *$3, *$4);
                           }}
         |       vltOffFront vltDScope
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off");
                           } else {
-                              V3Config::addScopeTraceOn(false, *$2, 0);
+                              V3Control::addScopeTraceOn(false, *$2, 0);
                           }}
         |       vltOffFront vltDScope vltDLevels
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off_off");
                           } else {
-                              V3Config::addScopeTraceOn(false, *$2, $3->toUInt());
+                              V3Control::addScopeTraceOn(false, *$2, $3->toUInt());
                           }}
         |       vltOnFront
-                        { V3Config::addIgnore($1, true, "*", 0, 0); }
+                        { V3Control::addIgnore($1, true, "*", 0, 0); }
         |       vltOnFront vltDFile
-                        { V3Config::addIgnore($1, true, *$2, 0, 0); }
+                        { V3Control::addIgnore($1, true, *$2, 0, 0); }
         |       vltOnFront vltDFile yVLT_D_LINES yaINTNUM
-                        { V3Config::addIgnore($1, true, *$2, $4->toUInt(), $4->toUInt() + 1); }
+                        { V3Control::addIgnore($1, true, *$2, $4->toUInt(), $4->toUInt() + 1); }
         |       vltOnFront vltDFile yVLT_D_LINES yaINTNUM '-' yaINTNUM
-                        { V3Config::addIgnore($1, true, *$2, $4->toUInt(), $6->toUInt() + 1); }
+                        { V3Control::addIgnore($1, true, *$2, $4->toUInt(), $6->toUInt() + 1); }
         |       vltOnFront vltDScope
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off");
                           } else {
-                              V3Config::addScopeTraceOn(true, *$2, 0);
+                              V3Control::addScopeTraceOn(true, *$2, 0);
                           }}
         |       vltOnFront vltDScope vltDLevels
                         { if ($1 != V3ErrorCode::I_TRACING) {
                               $<fl>1->v3error("Argument -scope only supported for tracing_on/off_off");
                           } else {
-                              V3Config::addScopeTraceOn(true, *$2, $3->toUInt());
+                              V3Control::addScopeTraceOn(true, *$2, $3->toUInt());
                           }}
         |       vltVarAttrFront vltDModuleE vltDFTaskE vltVarAttrVarE attr_event_controlE
-                        { V3Config::addVarAttr($<fl>1, *$2, *$3, *$4, $1, $5); }
+                        { V3Control::addVarAttr($<fl>1, *$2, *$3, *$4, $1, $5); }
         |       vltInlineFront vltDModuleE vltDFTaskE
-                        { V3Config::addInline($<fl>1, *$2, *$3, $1); }
+                        { V3Control::addInline($<fl>1, *$2, *$3, $1); }
         |       yVLT_COVERAGE_BLOCK_OFF vltDFile
-                        { V3Config::addCoverageBlockOff(*$2, 0); }
+                        { V3Control::addCoverageBlockOff(*$2, 0); }
         |       yVLT_COVERAGE_BLOCK_OFF vltDFile yVLT_D_LINES yaINTNUM
-                        { V3Config::addCoverageBlockOff(*$2, $4->toUInt()); }
+                        { V3Control::addCoverageBlockOff(*$2, $4->toUInt()); }
         |       yVLT_COVERAGE_BLOCK_OFF vltDModule vltDBlock
-                        { V3Config::addCoverageBlockOff(*$2, *$3); }
+                        { V3Control::addCoverageBlockOff(*$2, *$3); }
         |       yVLT_FULL_CASE vltDFile
-                        { V3Config::addCaseFull(*$2, 0); }
+                        { V3Control::addCaseFull(*$2, 0); }
         |       yVLT_FULL_CASE vltDFile yVLT_D_LINES yaINTNUM
-                        { V3Config::addCaseFull(*$2, $4->toUInt()); }
+                        { V3Control::addCaseFull(*$2, $4->toUInt()); }
         |       yVLT_HIER_BLOCK vltDModuleE
-                        { V3Config::addModulePragma(*$2, VPragmaType::HIER_BLOCK); }
+                        { V3Control::addModulePragma(*$2, VPragmaType::HIER_BLOCK); }
         |       yVLT_HIER_PARAMS vltDModuleE
-                        { V3Config::addModulePragma(*$2, VPragmaType::HIER_PARAMS); }
+                        { V3Control::addModulePragma(*$2, VPragmaType::HIER_PARAMS); }
         |       yVLT_HIER_WORKERS vltDModuleE vltDWorkers
-                        { V3Config::addHierWorkers($<fl>1, *$2, $3->toSInt()); }
+                        { V3Control::addHierWorkers($<fl>1, *$2, $3->toSInt()); }
         |       yVLT_HIER_WORKERS vltDHierDpi vltDWorkers
-                        { V3Config::addHierWorkers($<fl>1, *$2, $3->toSInt()); }
+                        { V3Control::addHierWorkers($<fl>1, *$2, $3->toSInt()); }
         |       yVLT_PARALLEL_CASE vltDFile
-                        { V3Config::addCaseParallel(*$2, 0); }
+                        { V3Control::addCaseParallel(*$2, 0); }
         |       yVLT_PARALLEL_CASE vltDFile yVLT_D_LINES yaINTNUM
-                        { V3Config::addCaseParallel(*$2, $4->toUInt()); }
+                        { V3Control::addCaseParallel(*$2, $4->toUInt()); }
         |       yVLT_PROFILE_DATA vltDHierDpi vltDCost
-                        { V3Config::addProfileData($<fl>1, *$2, $3->toUQuad()); }
+                        { V3Control::addProfileData($<fl>1, *$2, $3->toUQuad()); }
         |       yVLT_PROFILE_DATA vltDModel vltDMtask vltDCost
-                        { V3Config::addProfileData($<fl>1, *$2, *$3, $4->toUQuad()); }
+                        { V3Control::addProfileData($<fl>1, *$2, *$3, $4->toUQuad()); }
         ;
 
 vltOffFront<errcodeen>:

From 189d0942027123fd52c24f25f31e1470299baa94 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 27 Jun 2025 22:31:51 -0400
Subject: [PATCH 177/211] Commentary

---
 docs/guide/warnings.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 66ea9de5d..fe32bf4ca 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -37,7 +37,7 @@ Warnings may be disabled in multiple ways:
    propagate upwards to any parent file (file that included the file with
    the lint_off).
 
-#. Disable the warning using :ref:`Verilator Configuration Files` with a
+#. Disable the warning using :ref:`Verilator Control Files` with a
    :option:`lint_off` command.  This is useful when a script suppresses
    warnings, and the Verilog source should not be changed.  This method also
    allows matching on the warning text.

From f508dadc9734f332b7ba33bc1feca05cd30a22fc Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Jun 2025 08:23:43 -0400
Subject: [PATCH 178/211] Support `specparam` (#5767).

---
 Changes                                       |  1 +
 src/V3Ast.h                                   | 13 +++--
 src/V3ParseImp.cpp                            |  8 +++-
 src/verilog.y                                 | 48 +++++++++++++++++--
 test_regress/t/t_flag_wpedantic_bad.out       |  2 +-
 test_regress/t/t_lint_pkg_colon_bad.out       |  2 +-
 test_regress/t/t_param_type_bad.out           |  2 +-
 test_regress/t/t_pp_circ_subst_bad.out        |  2 +-
 test_regress/t/t_pp_circ_subst_bad2.out       |  2 +-
 .../{t_specparam_unsup.py => t_specparam.py}  |  4 +-
 test_regress/t/t_specparam.v                  | 44 +++++++++++++++++
 test_regress/t/t_specparam_unsup.out          |  5 --
 test_regress/t/t_specparam_unsup.v            | 16 -------
 13 files changed, 113 insertions(+), 36 deletions(-)
 rename test_regress/t/{t_specparam_unsup.py => t_specparam.py} (87%)
 create mode 100644 test_regress/t/t_specparam.v
 delete mode 100644 test_regress/t/t_specparam_unsup.out
 delete mode 100644 test_regress/t/t_specparam_unsup.v

diff --git a/Changes b/Changes
index 0395f46bf..797a9217f 100644
--- a/Changes
+++ b/Changes
@@ -19,6 +19,7 @@ Verilator 5.037 devel
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
 * Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
+* Support `specparam` (#5767).
 * Support parameter forward types.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 54ebbe1a8..e7ae60bf6 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -923,6 +923,7 @@ public:
         UNKNOWN,
         GPARAM,
         LPARAM,
+        SPECPARAM,
         GENVAR,
         VAR,  // Reg, integer, logic, etc
         SUPPLY0,
@@ -951,9 +952,10 @@ public:
     constexpr operator en() const { return m_e; }
     const char* ascii() const {
         static const char* const names[]
-            = {"?",    "GPARAM",    "LPARAM",     "GENVAR",   "VAR",     "SUPPLY0",  "SUPPLY1",
-               "WIRE", "WREAL",     "TRIAND",     "TRIOR",    "TRIWIRE", "TRI0",     "TRI1",
-               "PORT", "BLOCKTEMP", "MODULETEMP", "STMTTEMP", "XTEMP",   "IFACEREF", "MEMBER"};
+            = {"?",        "GPARAM",  "LPARAM",   "SPECPARAM", "GENVAR",    "VAR",
+               "SUPPLY0",  "SUPPLY1", "WIRE",     "WREAL",     "TRIAND",    "TRIOR",
+               "TRIWIRE",  "TRI0",    "TRI1",     "PORT",      "BLOCKTEMP", "MODULETEMP",
+               "STMTTEMP", "XTEMP",   "IFACEREF", "MEMBER"};
         return names[m_e];
     }
     bool isParam() const { return m_e == GPARAM || m_e == LPARAM; }
@@ -983,8 +985,8 @@ public:
         return (m_e == BLOCKTEMP || m_e == MODULETEMP || m_e == STMTTEMP || m_e == XTEMP);
     }
     bool isVPIAccessible() const {
-        return (m_e == VAR || m_e == GPARAM || m_e == LPARAM || m_e == PORT || m_e == WIRE
-                || m_e == TRI0 || m_e == TRI1);
+        return (m_e == VAR || m_e == GPARAM || m_e == LPARAM || m_e == SPECPARAM || m_e == PORT
+                || m_e == WIRE || m_e == TRI0 || m_e == TRI1);
     }
 
     const char* traceSigKind() const {
@@ -993,6 +995,7 @@ public:
             /* UNKNOWN:      */ "",  // Should not be traced
             /* GPARAM:       */ "PARAMETER",
             /* LPARAM:       */ "PARAMETER",
+            /* SPECPARAM:    */ "PARAMETER",
             /* GENVAR:       */ "PARAMETER",
             /* VAR:          */ "VAR",
             /* SUPPLY0:      */ "SUPPLY0",
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 3c2f7bc93..e50935548 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -688,7 +688,13 @@ void V3ParseImp::tokenPipelineSym() {
     int token = yylval.token;
     if (token == yaID__LEX || token == yaID__CC || token == yaID__aTYPE) {
         importIfInStd(yylval.fl, *(yylval.strp));
-        if (token == yaID__LEX) token = yaID__ETC;
+        if (token == yaID__LEX) {
+            if (VString::startsWith(*(yylval.strp), "PATHPULSE__024a")) {
+                token = yaID__PATHPULSE;
+            } else {
+                token = yaID__ETC;
+            }
+        }
     }
     m_afterColonColon = token == yP_COLONCOLON;
     yylval.token = token;
diff --git a/src/verilog.y b/src/verilog.y
index 832af56b7..ccbb6c084 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -426,6 +426,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<strp>            yaID__ETC       "IDENTIFIER"
 %token<strp>            yaID__CC        "IDENTIFIER-::"
 %token<strp>            yaID__LEX       "IDENTIFIER-in-lex"
+%token<strp>            yaID__PATHPULSE "IDENTIFIER-for-pathpulse"
 %token<strp>            yaID__aINST     "IDENTIFIER-for-instance"
 %token<strp>            yaID__aTYPE     "IDENTIFIER-for-type"
 //                      Can't predecode aFUNCTION, can declare after use
@@ -5787,12 +5788,42 @@ specify_itemList<nodep>:            // IEEE: { specify_item }
         ;
 
 specify_item<nodep>:                // ==IEEE: specify_item
-                system_timing_check                     { $$ = $1; }
+                specparam_declaration                   { $$ = $1; }
+        |       system_timing_check                     { $$ = $1; }
         |       junkToSemiList ';'                      { $$ = nullptr; }
         ;
 
 specparam_declaration<nodep>:       // ==IEEE: specparam_declaration
-                ySPECPARAM junkToSemiList ';'           { $$ = nullptr; }
+                specparam_declarationFront list_of_specparam_assignments ';'
+                        { $$ = $2; }
+        ;
+
+specparam_declarationFront:     // IEEE: part of specparam_declaration
+        //                      // Front must execute first so VARDTYPE is ready before list of vars
+                ySPECPARAM
+                        { VARRESET_NONLIST(SPECPARAM);
+                          AstNodeDType* dtp = new AstBasicDType{$1, VBasicDTypeKwd::DOUBLE};
+                          VARDTYPE(dtp); }
+        |       ySPECPARAM packed_dimension
+                        { VARRESET_NONLIST(SPECPARAM);
+                          AstNodeDType* const dtp = GRAMMARP->addRange(
+                                    new AstBasicDType{$2->fileline(), LOGIC_IMPLICIT}, $2, true);
+                          VARDTYPE(dtp); }
+        ;
+
+list_of_specparam_assignments<varp>:  // ==IEEE: list_of_specparam_assignments
+                specparam_assignment                    { $$ = $1; }
+        |       list_of_specparam_assignments ',' specparam_assignment  { $$ = $1->addNext($3); }
+        ;
+
+specparam_assignment<varp>:     // ==IEEE: specparam_assignment
+                idNotPathpulse sigAttrListE '=' minTypMax
+                        { $$ = VARDONEA($<fl>1, *$1, nullptr, $2);
+                          if ($4) $$->valuep($4); }
+        //                      //  IEEE: pulse_control_specparam
+        |       idPathpulse sigAttrListE '=' '(' minTypMax ',' minTypMax ')'
+                        { $$ = VARDONEA($<fl>1, *$1, nullptr, $2);
+                          if ($5) $$->valuep($5); }
         ;
 
 system_timing_check<nodep>:         // ==IEEE: system_timing_check
@@ -5851,7 +5882,7 @@ junkToSemiList:
         ;
 
 junkToSemi:
-                BISONPRE_NOT(';',yENDSPECIFY,yENDMODULE,yD_SETUPHOLD)        { }
+                BISONPRE_NOT(';',yD_SETUPHOLD,yENDMODULE,yENDSPECIFY,ySPECPARAM)        { }
         |       error {}
         ;
 
@@ -5860,16 +5891,27 @@ junkToSemi:
 
 id<strp>:
                 yaID__ETC                               { $$ = $1; $<fl>$ = $<fl>1; }
+        |       yaID__PATHPULSE                         { $$ = $1; $<fl>$ = $<fl>1; }
         |       idRandomize                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
 idAny<strp>:  // Any kind of identifier
                 yaID__ETC                               { $$ = $1; $<fl>$ = $<fl>1; }
+        |       yaID__PATHPULSE                         { $$ = $1; $<fl>$ = $<fl>1; }
         |       yaID__aINST                             { $$ = $1; $<fl>$ = $<fl>1; }
         |       yaID__aTYPE                             { $$ = $1; $<fl>$ = $<fl>1; }
         |       idRandomize                             { $$ = $1; $<fl>$ = $<fl>1; }
         ;
 
+idNotPathpulse<strp>:  // Id excluding specparam PATHPULSE$, IEEE: part of specparam_assignment
+                yaID__ETC                               { $$ = $1; $<fl>$ = $<fl>1; }
+        |       idRandomize                             { $$ = $1; $<fl>$ = $<fl>1; }
+        ;
+
+idPathpulse<strp>:  // Id for specparam PATHPULSE$, IEEE: part of pulse_control_specparam
+                yaID__PATHPULSE                         { $$ = $1; $<fl>$ = $<fl>1; }
+        ;
+
 idAnyAsParseRef<parseRefp>:  // Any kind of identifier as a ParseRef
                 idAny
                         { $$ = new AstParseRef{$<fl>1, VParseRefExp::PX_TEXT, *$1}; }
diff --git a/test_regress/t/t_flag_wpedantic_bad.out b/test_regress/t/t_flag_wpedantic_bad.out
index c955c513e..0942660a4 100644
--- a/test_regress/t/t_flag_wpedantic_bad.out
+++ b/test_regress/t/t_flag_wpedantic_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_flag_wpedantic_bad.v:8:8: syntax error, unexpected global, expecting IDENTIFIER or do or final or randomize
+%Error: t/t_flag_wpedantic_bad.v:8:8: syntax error, unexpected global
     8 |    reg global;
       |        ^~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_lint_pkg_colon_bad.out b/test_regress/t/t_lint_pkg_colon_bad.out
index b0e76fd25..184edb770 100644
--- a/test_regress/t/t_lint_pkg_colon_bad.out
+++ b/test_regress/t/t_lint_pkg_colon_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_lint_pkg_colon_bad.v:8:8: syntax error, unexpected IDENTIFIER-::, expecting IDENTIFIER or do or final or randomize
+%Error: t/t_lint_pkg_colon_bad.v:8:8: syntax error, unexpected IDENTIFIER-::
     8 |    reg mispkgb::bar_t b;
       |        ^~~~~~~
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_param_type_bad.out b/test_regress/t/t_param_type_bad.out
index a9bf7634b..4e3c370a5 100644
--- a/test_regress/t/t_param_type_bad.out
+++ b/test_regress/t/t_param_type_bad.out
@@ -1,4 +1,4 @@
-%Error: t/t_param_type_bad.v:9:27: syntax error, unexpected INTEGER NUMBER, expecting IDENTIFIER or IDENTIFIER-for-instance or IDENTIFIER-for-type or randomize
+%Error: t/t_param_type_bad.v:9:27: syntax error, unexpected INTEGER NUMBER
     9 |    localparam type bad2 = 2;   
       |                           ^
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
diff --git a/test_regress/t/t_pp_circ_subst_bad.out b/test_regress/t/t_pp_circ_subst_bad.out
index d45c9c044..d84fad3d0 100644
--- a/test_regress/t/t_pp_circ_subst_bad.out
+++ b/test_regress/t/t_pp_circ_subst_bad.out
@@ -1,4 +1,4 @@
 %Error: t/t_pp_circ_subst_bad.v:8:80001: Too many preprocessor tokens on a line (>40000); perhaps recursive `define
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type, expecting IDENTIFIER or do or final or randomize
+%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type
 %Error: Exiting due to
diff --git a/test_regress/t/t_pp_circ_subst_bad2.out b/test_regress/t/t_pp_circ_subst_bad2.out
index 5af9aac7f..03c509a5c 100644
--- a/test_regress/t/t_pp_circ_subst_bad2.out
+++ b/test_regress/t/t_pp_circ_subst_bad2.out
@@ -1,4 +1,4 @@
 %Error: t/t_pp_circ_subst_bad.v:8:40002: Too many preprocessor tokens on a line (>20000); perhaps recursive `define
         ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type, expecting IDENTIFIER or do or final or randomize
+%Error: t/t_pp_circ_subst_bad.v:8:5: syntax error, unexpected IDENTIFIER-for-type
 %Error: Exiting due to
diff --git a/test_regress/t/t_specparam_unsup.py b/test_regress/t/t_specparam.py
similarity index 87%
rename from test_regress/t/t_specparam_unsup.py
rename to test_regress/t/t_specparam.py
index e33e10acf..c78c28783 100755
--- a/test_regress/t/t_specparam_unsup.py
+++ b/test_regress/t/t_specparam.py
@@ -11,6 +11,8 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(fails=True, expect_filename=test.golden_filename)
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
 
 test.passes()
diff --git a/test_regress/t/t_specparam.v b/test_regress/t/t_specparam.v
new file mode 100644
index 000000000..67ab38219
--- /dev/null
+++ b/test_regress/t/t_specparam.v
@@ -0,0 +1,44 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+  specify
+    specparam tdevice_PU = 3e8;
+    specparam Tdelay11 = 1.1;
+    // verilator lint_off MINTYPMAXDLY
+    specparam Tmintypmax = 1.0:1.1:1.2;
+    specparam PATHPULSE$a$b = (3.0:3.1:3.2, 4.0:4.1:4.2);
+    specparam randomize = 1;  // Special parser corner-case
+  endspecify
+
+  // Support in other simulators is limited for module specparams
+  specparam Tmod34 = 3.4, Tmod35 = 3.5;  // IEEE 6.20.5 allowed in body
+  // Support in other simulators is limited for ranged specparams
+  specparam [5:2] Tranged = 4'b1011;
+
+  localparam real PATHPULSE$normal$var = 6.78;
+
+  reg PoweredUp;
+  wire DelayIn, DelayOut;
+
+  assign #tdevice_PU DelayOut = DelayIn;
+
+  initial begin
+    PoweredUp = 1'b0;
+    #tdevice_PU PoweredUp = 1'b1;
+    if (Tdelay11 != 1.1) $stop;
+`ifdef VERILATOR
+    if (Tmintypmax != 1.1) $stop;
+    if (PATHPULSE$a$b != 3.1) $stop;
+`endif
+    if (Tranged != 4'b1011) $stop;
+    if (Tmod34 != 3.4) $stop;
+    if (Tmod35 != 3.5) $stop;
+    if (PATHPULSE$normal$var != 6.78) $stop;
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
+endmodule
diff --git a/test_regress/t/t_specparam_unsup.out b/test_regress/t/t_specparam_unsup.out
deleted file mode 100644
index 776aaa222..000000000
--- a/test_regress/t/t_specparam_unsup.out
+++ /dev/null
@@ -1,5 +0,0 @@
-%Error: t/t_specparam_unsup.v:14:8: Can't find definition of variable: 'tdevice_PU'
-   14 |       #tdevice_PU PoweredUp = 1'b1;
-      |        ^~~~~~~~~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: Exiting due to
diff --git a/test_regress/t/t_specparam_unsup.v b/test_regress/t/t_specparam_unsup.v
deleted file mode 100644
index cd0a08072..000000000
--- a/test_regress/t/t_specparam_unsup.v
+++ /dev/null
@@ -1,16 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2025 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-module t ();
-   reg PoweredUp;
-   specify
-      specparam tdevice_PU = 3e8;
-   endspecify
-   initial begin
-      PoweredUp = 1'b0;
-      #tdevice_PU PoweredUp = 1'b1;
-   end
-endmodule

From 62e5e3aa0cb5452fe9002f0bbd1471ef82f8d821 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Jun 2025 09:43:02 -0400
Subject: [PATCH 179/211] Fix interface array connections with non-zero low
 declaration index.

---
 Changes                              |  1 +
 src/V3Inst.cpp                       |  4 +--
 test_regress/t/t_interface_array4.py | 18 ++++++++++
 test_regress/t/t_interface_array4.v  | 53 ++++++++++++++++++++++++++++
 4 files changed, 74 insertions(+), 2 deletions(-)
 create mode 100755 test_regress/t/t_interface_array4.py
 create mode 100644 test_regress/t/t_interface_array4.v

diff --git a/Changes b/Changes
index 797a9217f..d7532cb9f 100644
--- a/Changes
+++ b/Changes
@@ -81,6 +81,7 @@ Verilator 5.037 devel
 * Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
 * Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
 * Fix `pre_randomize`/`post_randomize` when no randomize (#6128). [Alex Solomatnikov]
+* Fix interface array connections with non-zero low declaration index.
 
 
 Verilator 5.036 2025-04-27
diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp
index d9e320c7b..4fc415479 100644
--- a/src/V3Inst.cpp
+++ b/src/V3Inst.cpp
@@ -373,7 +373,7 @@ private:
                         "Unsupported: Non-constant index when passing interface to module");
                     return;
                 }
-                const string index = AstNode::encodeNumber(constp->toSInt());
+                const string index = AstNode::encodeNumber(constp->toSInt() + arrp->lo());
                 if (VN_IS(arrselp->fromp(), SliceSel))
                     arrselp->fromp()->v3error("Unsupported: interface slices");
                 const AstVarRef* const varrefp = VN_CAST(arrselp->fromp(), VarRef);
@@ -482,7 +482,7 @@ private:
                                       "Non-constant index in RHS interface array selection");
                 return;
             }
-            const string index = AstNode::encodeNumber(constp->toSInt());
+            const string index = AstNode::encodeNumber(constp->toSInt() + arrp->lo());
             const AstVarRef* const varrefp = VN_CAST(nodep->fromp(), VarRef);
             UASSERT_OBJ(varrefp, nodep, "No interface varref under array");
             AstVarXRef* const newp = new AstVarXRef{
diff --git a/test_regress/t/t_interface_array4.py b/test_regress/t/t_interface_array4.py
new file mode 100755
index 000000000..bd059b0f2
--- /dev/null
+++ b/test_regress/t/t_interface_array4.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--binary'])
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_interface_array4.v b/test_regress/t/t_interface_array4.v
new file mode 100644
index 000000000..f16386c9b
--- /dev/null
+++ b/test_regress/t/t_interface_array4.v
@@ -0,0 +1,53 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+interface Ifc;
+  logic req, grant;
+  logic [7:0] addr, data;
+endinterface
+
+class Cls;
+  virtual Ifc bus;
+  int m_i;
+  function new(virtual Ifc s, int i);
+    bus = s;
+    m_i = i;
+  endfunction
+  task request();
+    bus.req <= 1'b1;
+  endtask
+  task wait_for_bus();
+    @(posedge bus.grant);
+  endtask
+endclass
+
+module devA (Ifc s);
+endmodule
+module devB (Ifc s);
+endmodule
+
+module top;
+  Ifc s14[1:4] ();
+  devA a1 (s14[1]);
+  devB b1 (s14[2]);
+  devA a2 (s14[3]);
+  devB b2 (s14[4]);
+
+  Ifc s65[6:5] ();
+  devA a3 (s65[5]);
+  devB b3 (s65[6]);
+
+  initial begin
+    Cls t14[1:4];
+    Cls t65[6:5];
+    t14[1] = new(s14[1], 1);
+    t14[2] = new(s14[2], 2);
+    t14[3] = new(s14[3], 3);
+    t14[4] = new(s14[4], 4);
+    t65[5] = new(s65[5], 5);
+    t65[6] = new(s65[6], 6);
+  end
+endmodule

From b914cda1c7949c1252179208b402d554d7aa1158 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Jun 2025 12:29:41 -0400
Subject: [PATCH 180/211] Internals: cppcheck cleanups. No functional change.

---
 Makefile.in                   |  8 ++++---
 include/verilated.cpp         | 20 +++++++-----------
 include/verilated_random.h    | 25 +++++++++++-----------
 include/verilated_threads.cpp | 39 ++++++++++++++++++-----------------
 include/verilated_threads.h   |  1 +
 include/verilated_vpi.cpp     |  2 +-
 src/V3Assert.cpp              |  1 +
 src/V3AstNodes.cpp            |  2 ++
 src/V3Delayed.cpp             |  2 ++
 src/V3Dfg.cpp                 |  1 +
 src/V3DfgAstToDfg.cpp         |  4 ++++
 src/V3DfgPasses.cpp           |  8 +++----
 src/V3DfgPeephole.cpp         | 10 ++++-----
 src/V3EmitCBase.cpp           |  2 +-
 src/V3EmitMk.cpp              |  2 +-
 src/V3Error.cpp               | 10 +++++----
 src/V3ParseImp.cpp            |  4 ++--
 src/V3SchedTiming.cpp         |  1 +
 src/V3String.cpp              |  2 +-
 src/V3Task.cpp                | 12 +++++------
 20 files changed, 85 insertions(+), 71 deletions(-)

diff --git a/Makefile.in b/Makefile.in
index f3f22f548..f22aec998 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -411,10 +411,12 @@ CHECK_YL = $(wildcard \
   $(srcdir)/src/*.l )
 CPPCHECK = src/cppcheck_filtered cppcheck
 CPPCHECK_FLAGS = --enable=all --inline-suppr \
-  --suppress=cstyleCast --suppress=useInitializationList \
-  --suppress=nullPointer --suppress=nullPointerRedundantCheck --suppress=ctunullpointer \
+  --suppress=cstyleCast --suppress=ctunullpointer \
+  --suppress=derefInvalidIteratorRedundantCheck \
+  --suppress=nullPointer --suppress=nullPointerRedundantCheck \
+  --suppress=templateRecursion \
   --suppress=unusedFunction --suppress=unusedScopedObject \
-  --suppress=useStlAlgorithm \
+  --suppress=useInitializationList --suppress=useStlAlgorithm \
 
 CPPCHECK_FLAGS += --xml
 CPPCHECK_DEP = $(subst .cpp,.cppcheck,$(CHECK_CPP))
diff --git a/include/verilated.cpp b/include/verilated.cpp
index eb59da7fa..f0a7f0630 100644
--- a/include/verilated.cpp
+++ b/include/verilated.cpp
@@ -411,7 +411,7 @@ IData VL_SCOPED_RAND_RESET_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     IData data = ~0;
     if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
-        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
         data = rng.rand64();
     }
     data &= VL_MASK_I(obits);
@@ -422,7 +422,7 @@ QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT
     if (Verilated::threadContextp()->randReset() == 0) return 0;
     QData data = ~0ULL;
     if (Verilated::threadContextp()->randReset() != 1) {  // if 2, randomize
-        VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+        VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
         data = rng.rand64();
     }
     data &= VL_MASK_Q(obits);
@@ -432,31 +432,27 @@ QData VL_SCOPED_RAND_RESET_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT
 WDataOutP VL_SCOPED_RAND_RESET_W(int obits, WDataOutP outwp, uint64_t scopeHash,
                                  uint64_t salt) VL_MT_UNSAFE {
     if (Verilated::threadContextp()->randReset() != 2) { return VL_RAND_RESET_W(obits, outwp); }
-    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
     for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
     outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
     return outwp;
 }
 
 IData VL_SCOPED_RAND_RESET_ASSIGN_I(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
-    IData data = ~0;
-    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
-    data = rng.rand64();
-    data &= VL_MASK_I(obits);
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    const IData data = rng.rand64() & VL_MASK_I(obits);
     return data;
 }
 
 QData VL_SCOPED_RAND_RESET_ASSIGN_Q(int obits, uint64_t scopeHash, uint64_t salt) VL_MT_UNSAFE {
-    QData data = ~0ULL;
-    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
-    data = rng.rand64();
-    data &= VL_MASK_Q(obits);
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
+    const QData data = rng.rand64() & VL_MASK_Q(obits);
     return data;
 }
 
 WDataOutP VL_SCOPED_RAND_RESET_ASSIGN_W(int obits, WDataOutP outwp, uint64_t scopeHash,
                                         uint64_t salt) VL_MT_UNSAFE {
-    VlRNG rng(Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt);
+    VlRNG rng{Verilated::threadContextp()->randSeed() ^ scopeHash ^ salt};
     for (int i = 0; i < VL_WORDS_I(obits) - 1; ++i) outwp[i] = rng.rand64();
     outwp[VL_WORDS_I(obits) - 1] = rng.rand64() & VL_MASK_E(obits);
     return outwp;
diff --git a/include/verilated_random.h b/include/verilated_random.h
index fc08596db..f144b179d 100644
--- a/include/verilated_random.h
+++ b/include/verilated_random.h
@@ -409,7 +409,7 @@ public:
     // Record a flat (non-class) element into the array variable table
     template <typename T>
     typename std::enable_if<!std::is_class<T>::value, void>::type
-    record_arr_table(T& var, const std::string name, int dimension, std::vector<IData> indices,
+    record_arr_table(T& var, const std::string& name, int dimension, std::vector<IData> indices,
                      std::vector<size_t> idxWidths) {
         const std::string key = generateKey(name, m_index);
         m_arr_vars[key] = std::make_shared<ArrayInfo>(name, &var, m_index, indices, idxWidths);
@@ -418,7 +418,7 @@ public:
 
     // Recursively record all elements in an unpacked array
     template <typename T, std::size_t N_Depth>
-    void record_arr_table(VlUnpacked<T, N_Depth>& var, const std::string name, int dimension,
+    void record_arr_table(VlUnpacked<T, N_Depth>& var, const std::string& name, int dimension,
                           std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (N_Depth != 0)) {
             idxWidths.push_back(32);
@@ -434,7 +434,7 @@ public:
 
     // Recursively record all elements in a queue
     template <typename T>
-    void record_arr_table(VlQueue<T>& var, const std::string name, int dimension,
+    void record_arr_table(VlQueue<T>& var, const std::string& name, int dimension,
                           std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             idxWidths.push_back(32);
@@ -449,8 +449,9 @@ public:
 
     // Recursively record all elements in an associative array
     template <typename T_Key, typename T_Value>
-    void record_arr_table(VlAssocArray<T_Key, T_Value>& var, const std::string name, int dimension,
-                          std::vector<IData> indices, std::vector<size_t> idxWidths) {
+    void record_arr_table(VlAssocArray<T_Key, T_Value>& var, const std::string& name,
+                          int dimension, std::vector<IData> indices,
+                          std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             for (auto it = var.begin(); it != var.end(); ++it) {
                 const T_Key& key = it->first;
@@ -478,7 +479,7 @@ public:
     // Register a single structArray element via write_var
     template <typename T>
     typename std::enable_if<VlContainsCustomStruct<T>::value, void>::type
-    record_struct_arr(T& var, const std::string name, int dimension, std::vector<IData> indices,
+    record_struct_arr(T& var, const std::string& name, int dimension, std::vector<IData> indices,
                       std::vector<size_t> idxWidths) {
         std::ostringstream oss;
         for (size_t i = 0; i < indices.size(); ++i) {
@@ -492,7 +493,7 @@ public:
 
     // Recursively process VlUnpacked of structs
     template <typename T, std::size_t N_Depth>
-    void record_struct_arr(VlUnpacked<T, N_Depth>& var, const std::string name, int dimension,
+    void record_struct_arr(VlUnpacked<T, N_Depth>& var, const std::string& name, int dimension,
                            std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if (dimension > 0 && N_Depth != 0) {
             constexpr size_t idx_width = 1 << VL_CLOG2_CE_Q(VL_CLOG2_CE_Q(N_Depth) + 1);
@@ -507,7 +508,7 @@ public:
 
     // Recursively process VlQueue of structs
     template <typename T>
-    void record_struct_arr(VlQueue<T>& var, const std::string name, int dimension,
+    void record_struct_arr(VlQueue<T>& var, const std::string& name, int dimension,
                            std::vector<IData> indices, std::vector<size_t> idxWidths) {
         if ((dimension > 0) && (var.size() != 0)) {
             idxWidths.push_back(32);
@@ -521,9 +522,9 @@ public:
 
     // Recursively process associative arrays of structs
     template <typename T_Key, typename T_Value>
-    void record_struct_arr(VlAssocArray<T_Key, T_Value>& var, const std::string name,
-                           int dimension, std::vector<IData> indices,
-                           std::vector<size_t> idxWidths) {
+    void record_struct_arr(VlAssocArray<T_Key, T_Value>& var, const std::string& name,
+                           int dimension, const std::vector<IData>& indices,
+                           const std::vector<size_t>& idxWidths) {
         if ((dimension > 0) && (!var.empty())) {
             for (auto it = var.begin(); it != var.end(); ++it) {
                 const T_Key& key = it->first;
@@ -551,7 +552,7 @@ public:
 
     // Helper: Register all members of a user-defined struct
     template <typename T, std::size_t... I>
-    void modifyMembers(T& obj, std::index_sequence<I...>, std::string baseName) {
+    void modifyMembers(T& obj, std::index_sequence<I...>, const std::string& baseName) {
         // Use the indices to access each member via std::get
         (void)std::initializer_list<int>{
             (write_var(std::get<I>(obj.getMembers(obj)), obj.memberWidth()[I],
diff --git a/include/verilated_threads.cpp b/include/verilated_threads.cpp
index 06c500bca..9c883b43a 100644
--- a/include/verilated_threads.cpp
+++ b/include/verilated_threads.cpp
@@ -135,7 +135,7 @@ bool VlThreadPool::isNumactlRunning() {
 }
 
 std::string VlThreadPool::numaAssign() {
-#if defined(__linux) || defined(CPU_ZERO)  // Linux-like; assume we have pthreads etc
+#if defined(__linux) || defined(CPU_ZERO) || defined(VL_CPPCHECK)  // Linux-like pthreads
     // If not under numactl, make a reasonable processor affinity selection
     if (isNumactlRunning()) return "running under numactl";  // User presumably set affinity
     const int num_threads = static_cast<int>(m_workers.size());
@@ -157,24 +157,25 @@ std::string VlThreadPool::numaAssign() {
     std::map<int, int> processor_core;
     std::multimap<int, int> core_processors;
     std::set<int> cores;
-    int processor = -1;
-    int core = -1;
-    while (!is.eof()) {
-        std::string line;
-        std::getline(is, line);
-        static std::string::size_type pos = line.find(":");
-        int number = -1;
-        if (pos != std::string::npos) number = atoi(line.c_str() + pos + 1);
-        if (line.compare(0, std::strlen("processor"), "processor") == 0) {
-            processor = number;
-            core = -1;
-        } else if (line.compare(0, std::strlen("core id"), "core id") == 0) {
-            core = number;
-            // std::cout << "p" << processor << " socket " << socket << " c" << core << std::endl;
-            cores.emplace(core);
-            processor_core[processor] = core;
-            core_processors.emplace(core, processor);
-            unassigned_processors.push_back(processor);
+    {
+        int processor = -1;
+        while (!is.eof()) {
+            std::string line;
+            std::getline(is, line);
+            static std::string::size_type pos = line.find(":");
+            int number = -1;
+            if (pos != std::string::npos) number = atoi(line.c_str() + pos + 1);
+            if (line.compare(0, std::strlen("processor"), "processor") == 0) {
+                processor = number;
+            } else if (line.compare(0, std::strlen("core id"), "core id") == 0) {
+                const int core = number;
+                // std::cout << "p" << processor << " socket " << socket << " c" << core <<
+                // std::endl;
+                cores.emplace(core);
+                processor_core[processor] = core;
+                core_processors.emplace(core, processor);
+                unassigned_processors.push_back(processor);
+            }
         }
     }
 
diff --git a/include/verilated_threads.h b/include/verilated_threads.h
index c2f05a480..643ebcf0b 100644
--- a/include/verilated_threads.h
+++ b/include/verilated_threads.h
@@ -241,6 +241,7 @@ public:
 private:
     VL_UNCOPYABLE(VlThreadPool);
 
+    // cppcheck-suppress unusedPrivateFunction
     static bool isNumactlRunning();
     std::string numaAssign();
 };
diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp
index 5af4bc916..a244b9e48 100644
--- a/include/verilated_vpi.cpp
+++ b/include/verilated_vpi.cpp
@@ -2537,6 +2537,7 @@ void vl_vpi_put_word_gen(const VerilatedVpioVar* vop, T word, size_t bitCount, s
             = (info.m_datap[info.m_wordOffset + 1] & ~info.m_maskHi)
               | ((word >> (wordBits - info.m_bitOffset)) & info.m_maskHi);
     }
+    // cppcheck-has-bug-suppress unreadVariable
     info.m_datap[info.m_wordOffset] = (info.m_datap[info.m_wordOffset] & ~info.m_maskLo)
                                       | ((word << info.m_bitOffset) & info.m_maskLo);
 }
@@ -2978,7 +2979,6 @@ void vl_get_value_array_vectors(unsigned index, const unsigned num, const unsign
                                 p_vpi_vecval dst) {
     static_assert(std::is_unsigned<T>::value,
                   "type T is not unsigned");  // ensure logical right shift
-    const unsigned element_size_bytes = VL_BYTES_I(packedSize);
     const unsigned element_size_words = VL_WORDS_I(packedSize);
     if (sizeof(T) == sizeof(QData)) {
         for (unsigned i = 0; i < num; ++i) {
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index d62f01066..83ccfcc5c 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -53,6 +53,7 @@ class AssertVisitor final : public VNVisitor {
     // METHODS
     static AstNodeExpr* assertOnCond(FileLine* fl, VAssertType type,
                                      VAssertDirectiveType directiveType) {
+        // cppcheck-suppress missingReturn
         switch (directiveType) {
         case VAssertDirectiveType::INTRINSIC: return new AstConst{fl, AstConst::BitTrue{}};
         case VAssertDirectiveType::VIOLATION_CASE: {
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 59bed182c..c94976487 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -3072,7 +3072,9 @@ void AstCMethodHard::setPurity() {
         return;
     }
     auto isPureIt = isPureMethod.find(name());
+    // cppcheck-suppress derefInvalidIteratorRedundantCheck
     UASSERT_OBJ(isPureIt != isPureMethod.end(), this, "Unknown purity of method " + name());
+    // cppcheck-suppress derefInvalidIteratorRedundantCheck
     m_pure = isPureIt->second;
     if (!m_pure) return;
     if (!fromp()->isPure()) m_pure = false;
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index 0ff531812..e8c8e5203 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -167,6 +167,8 @@ class DelayedVisitor final : public VNVisitor {
         } m_kitUnion;
 
     public:
+        VarScopeInfo() = default;
+        ~VarScopeInfo() = default;
         // Accessors for the above union fields
         auto& shadowVariableKit() {
             UASSERT(m_scheme == Scheme::ShadowVar, "Inconsistent Scheme");
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index 65b9e4da4..7d6dede3d 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -443,6 +443,7 @@ DfgVarPacked* DfgVertex::getResultVar() {
 
     // Inspect existing variables fully written by this vertex, and choose one
     DfgVarPacked* resp = nullptr;
+    // cppcheck-has-bug-suppress constParameter
     this->forEachSink([&resp](DfgVertex& sink) {
         DfgVarPacked* const varp = sink.cast<DfgVarPacked>();
         if (!varp) return;
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index e02a14e3f..7773d46ce 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -165,6 +165,7 @@ class AstToDfgVisitor final : public VNVisitor {
         if (AstVarRef* const vrefp = VN_CAST(nodep, VarRef)) {
             m_foundUnhandled = false;
             visit(vrefp);
+            // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
             getVertex(vrefp)->as<DfgVarPacked>()->addDriver(flp, 0, vtxp);
             return true;
@@ -178,6 +179,7 @@ class AstToDfgVisitor final : public VNVisitor {
             }
             m_foundUnhandled = false;
             visit(vrefp);
+            // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
             getVertex(vrefp)->as<DfgVarPacked>()->addDriver(flp, lsbp->toUInt(), vtxp);
             return true;
@@ -191,6 +193,7 @@ class AstToDfgVisitor final : public VNVisitor {
             }
             m_foundUnhandled = false;
             visit(vrefp);
+            // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
             getVertex(vrefp)->as<DfgVarArray>()->addDriver(flp, idxp->toUInt(), vtxp);
             return true;
@@ -244,6 +247,7 @@ class AstToDfgVisitor final : public VNVisitor {
 
         m_foundUnhandled = false;
         iterate(rhsp);
+        // cppcheck-has-bug-suppress knownConditionTrueFalse
         if (m_foundUnhandled) {
             revertUncommittedVertices();
             markReferenced(nodep);
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 1408fe40d..19a226f4a 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -447,17 +447,17 @@ void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
             const uint32_t val = pair.first;
             const std::vector<Term>& terms = pair.second;
             // Create the ArraySel
-            FileLine* const flp = terms.front().m_vtxp->fileline();
-            DfgArraySel* const aselp = new DfgArraySel{dfg, flp, bitDTypep};
+            FileLine* const aflp = terms.front().m_vtxp->fileline();
+            DfgArraySel* const aselp = new DfgArraySel{dfg, aflp, bitDTypep};
             aselp->fromp(tabVtxp);
-            aselp->bitp(new DfgConst{dfg, flp, width, val});
+            aselp->bitp(new DfgConst{dfg, aflp, width, val});
             // The inverted value, if needed
             DfgNot* notp = nullptr;
             // Repalce the terms
             for (const Term& term : terms) {
                 if (term.m_inv) {
                     if (!notp) {
-                        notp = new DfgNot{dfg, flp, bitDTypep};
+                        notp = new DfgNot{dfg, aflp, bitDTypep};
                         notp->srcp(aselp);
                     }
                     term.m_vtxp->replaceWith(notp);
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index ead99f657..5056e45b6 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -345,14 +345,14 @@ class V3DfgPeephole final : public DfgVisitor {
         // Make associative trees right leaning to reduce pattern variations, and for better CSE
         bool changed = false;
         while (true) {
-            Vertex* const lhsp = vtxp->lhsp()->template cast<Vertex>();
-            if (!lhsp || lhsp->hasMultipleSinks()) break;
+            Vertex* const alhsp = vtxp->lhsp()->template cast<Vertex>();
+            if (!alhsp || alhsp->hasMultipleSinks()) break;
 
             APPLYING(RIGHT_LEANING_ASSOC) {
                 // Rotate the expression tree rooted at 'vtxp' to the right, producing a
                 // right-leaning tree
-                DfgVertex* const ap = lhsp->lhsp();
-                DfgVertex* const bp = lhsp->rhsp();
+                DfgVertex* const ap = alhsp->lhsp();
+                DfgVertex* const bp = alhsp->rhsp();
                 DfgVertex* const cp = vtxp->rhsp();
 
                 AstNodeDType* const rootDtyptp = vtxp->dtypep();
@@ -364,7 +364,7 @@ class V3DfgPeephole final : public DfgVisitor {
                 }
 
                 Vertex* const childp = make<Vertex>(vtxp->fileline(), childDtyptp, bp, cp);
-                Vertex* const rootp = make<Vertex>(lhsp->fileline(), rootDtyptp, ap, childp);
+                Vertex* const rootp = make<Vertex>(alhsp->fileline(), rootDtyptp, ap, childp);
                 replace(vtxp, rootp);
                 changed = true;
                 vtxp = rootp;
diff --git a/src/V3EmitCBase.cpp b/src/V3EmitCBase.cpp
index 5f8b81e66..a84980080 100644
--- a/src/V3EmitCBase.cpp
+++ b/src/V3EmitCBase.cpp
@@ -278,7 +278,7 @@ void EmitCBaseVisitorConst::emitVarAccessors(const AstVar* nodep) {
 
 void EmitCBaseVisitorConst::emitModCUse(const AstNodeModule* modp, VUseType useType) {
     bool nl = false;
-    forModCUse(modp, useType, [&](string entry) {
+    forModCUse(modp, useType, [&](const string& entry) {
         puts(entry);
         nl = true;
     });
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 1c5d2983f..9b8a61c58 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -78,7 +78,7 @@ private:
     std::vector<WorkList*> m_concatenableListsByDescSize;  // Lists sorted by size, descending
 
     EmitGroup(std::vector<FilenameWithScore> inputFiles, uint64_t totalScore,
-              std::string groupFilePrefix)
+              const std::string& groupFilePrefix)
         : m_inputFiles{std::move(inputFiles)}
         , m_totalScore{totalScore}
         , m_groupFilePrefix{groupFilePrefix} {}
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 3688e9355..0ef6e50fb 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -172,10 +172,12 @@ void V3ErrorGuarded::v3errorEndGuts(std::ostringstream& sstr, const string& extr
 
     // If suppressed print only first line to reduce verbosity
     string firstLine = msg;
-    string::size_type pos;
-    if ((pos = firstLine.find('\n')) != string::npos) {
-        firstLine.erase(pos, firstLine.length() - pos);
-        firstLine += "...";
+    {
+        string::size_type pos;
+        if ((pos = firstLine.find('\n')) != string::npos) {
+            firstLine.erase(pos, firstLine.length() - pos);
+            firstLine += "...";
+        }
     }
     if (m_errorSuppressed) msg = firstLine;
     // Suppress duplicate messages
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index e50935548..f1ba202b6 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -552,8 +552,8 @@ int V3ParseImp::tokenPipelineId(int token) {
     VL_RESTORER(yylval);  // Remember value, as about to read ahead
     if (m_tokenLastBison.token != '@' && m_tokenLastBison.token != '#'
         && m_tokenLastBison.token != '.') {
-        if (const size_t depth = tokenPipeScanIdInst(0)) return yaID__aINST;
-        if (const size_t depth = tokenPipeScanIdType(0)) return yaID__aTYPE;
+        if (tokenPipeScanIdInst(0)) return yaID__aINST;
+        if (tokenPipeScanIdType(0)) return yaID__aTYPE;
     }
     if (nexttok == '#') {  // e.g. class_type parameter_value_assignment '::'
         const size_t depth = tokenPipeScanParam(0, false);
diff --git a/src/V3SchedTiming.cpp b/src/V3SchedTiming.cpp
index 97d2a827d..b0dbda05f 100644
--- a/src/V3SchedTiming.cpp
+++ b/src/V3SchedTiming.cpp
@@ -342,6 +342,7 @@ void transformForks(AstNetlist* const netlistp) {
             m_funcp = nodep;
             m_awaitMoved = false;
             iterateChildren(nodep);
+            // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (nodep->isCoroutine() && m_awaitMoved
                 && !nodep->stmtsp()->exists([](AstCAwait*) { return true; })) {
                 // co_return at the end (either that or a co_await is required in a coroutine
diff --git a/src/V3String.cpp b/src/V3String.cpp
index ba0fcbfc7..4176e9b07 100644
--- a/src/V3String.cpp
+++ b/src/V3String.cpp
@@ -204,7 +204,7 @@ string VString::unquoteSVString(const string& text, string& errOut) {
         } else if (*cp == '\\') {
             if (octal_digits) {
                 newtext += octal_val;
-                octal_digits = 0;
+                // below: octal_digits = 0;
                 octal_val = 0;
             }
             quoted = true;
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 54a810f2d..d569ad780 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -451,12 +451,12 @@ class TaskVisitor final : public VNVisitor {
         AstNodeExpr* postRhsp = new AstVarRef{newvscp->fileline(), newvscp, VAccess::READ};
         if (AstResizeLValue* soutPinp = VN_CAST(outPinp, ResizeLValue)) {
             outPinp = soutPinp->lhsp();
-            if (AstNodeUniop* soutPinp = VN_CAST(outPinp, Extend)) {
-                outPinp = soutPinp->lhsp();
-            } else if (AstNodeUniop* soutPinp = VN_CAST(outPinp, ExtendS)) {
-                outPinp = soutPinp->lhsp();
-            } else if (AstSel* soutPinp = VN_CAST(outPinp, Sel)) {
-                outPinp = soutPinp->fromp();
+            if (AstNodeUniop* aoutPinp = VN_CAST(outPinp, Extend)) {
+                outPinp = aoutPinp->lhsp();
+            } else if (AstNodeUniop* aoutPinp = VN_CAST(outPinp, ExtendS)) {
+                outPinp = aoutPinp->lhsp();
+            } else if (AstSel* aoutPinp = VN_CAST(outPinp, Sel)) {
+                outPinp = aoutPinp->fromp();
             } else {
                 outPinp->v3fatalSrc("Inout pin resizing should have had extend or select");
             }

From bc892deacc6ebee3f2bea02f53f538056e894e4c Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sat, 28 Jun 2025 20:45:45 +0100
Subject: [PATCH 181/211] Safely support non-overlapping blocking/non-blocking
 assignments (#6137)

The manual for the BLKANDNBLK warning describes that it is safe to
disable that error if the updated ranges are non-overlapping. This
however was not true (see the added t_nba_mixed_update* tests).

In this patch we change V3Delayed to use a new ShadowVarMasked
scheme for variables that have mixed blocking and non-blocking
updates (or the FlagUnique scheme for unpacked variables), which
is in fact safe to use when the updated parts are non-overlapping.

Furthermore, mixed assignments are safe as far as scheduling is
concerned if either:

- They are to independent parts (bits/members/etc) (with this patch)
- Or if the blocking assignment is in clocked (or suspendable) logic.

The risk in scheduling is a race between the Post scheduled NBA
commit, and blocking assignments in combinational logic, which might
order incorrectly.

The second point highlights that we can handle stuff like this safely,
which is sometimes used in testbenches:

```systemverilog
always @(posedge clk) begin
    if ($time == 0) a = 0;
end

always @(posedge clk) begin
    if ($time > 0) a <= 2;
end
````

The only dangerous case is:

```systemverilog
always @(posedge clk) foo[idx] <= val;
assign foo[0] = bar;
```

Whit this patch, this will still resolve fine at run-time if 'idx' is
never zero, but might resolve incorrectly if 'idx' is zero.

With the above in mind, the BLKANDNBLK warning is now only issued if:

- We can't prove that the assignments are to non-overlapping bits
- And the blocking assignment is in combinational logic

These are the cases that genuinely require user attention to resolve.

With this patch, there are no more BLKANDNBLK warnings in the RTLMeter
designs.

Fixes #6122.
---
 .github/workflows/rtlmeter.yml                |   2 +-
 docs/guide/warnings.rst                       |  23 +-
 src/V3AstNodeOther.h                          |   4 +
 src/V3Delayed.cpp                             | 320 +++++++++++++++---
 src/V3Force.cpp                               |   9 +-
 src/V3OrderGraphBuilder.cpp                   |   9 +-
 test_regress/t/t_altera_lpm.v                 |   1 -
 .../t_assign_on_rhs_of_nonblocking_unsup.out  |  11 -
 test_regress/t/t_enum_huge_methods.v          |   6 -
 test_regress/t/t_force.v                      |   2 +-
 test_regress/t/t_mem_multidim.v               |   2 -
 ...ocking_unsup.py => t_nba_assign_on_rhs.py} |   6 +-
 ...blocking_unsup.v => t_nba_assign_on_rhs.v} |   0
 test_regress/t/t_nba_mixed_update_clocked.py  |  24 ++
 test_regress/t/t_nba_mixed_update_clocked.v   |  59 ++++
 test_regress/t/t_nba_mixed_update_comb.py     |  24 ++
 test_regress/t/t_nba_mixed_update_comb.v      |  72 ++++
 test_regress/t/t_order_blkandnblk_bad.out     |  29 +-
 test_regress/t/t_order_blkandnblk_bad.v       |  14 +-
 test_regress/t/t_order_clkinst.v              |   1 -
 test_regress/t/t_order_comboclkloop.v         |   1 -
 test_regress/t/t_param_if_blk.v               |   2 -
 22 files changed, 521 insertions(+), 100 deletions(-)
 delete mode 100644 test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.out
 rename test_regress/t/{t_assign_on_rhs_of_nonblocking_unsup.py => t_nba_assign_on_rhs.py} (83%)
 rename test_regress/t/{t_assign_on_rhs_of_nonblocking_unsup.v => t_nba_assign_on_rhs.v} (100%)
 create mode 100755 test_regress/t/t_nba_mixed_update_clocked.py
 create mode 100644 test_regress/t/t_nba_mixed_update_clocked.v
 create mode 100755 test_regress/t/t_nba_mixed_update_comb.py
 create mode 100644 test_regress/t/t_nba_mixed_update_comb.v

diff --git a/.github/workflows/rtlmeter.yml b/.github/workflows/rtlmeter.yml
index a2b7df5a6..e4d7a9eb3 100644
--- a/.github/workflows/rtlmeter.yml
+++ b/.github/workflows/rtlmeter.yml
@@ -112,7 +112,7 @@ jobs:
           - "VeeR-EL2:default*"
           - "VeeR-EL2:hiperf*"
           - "Vortex:mini:*"
-          - "Vortex:sane:* !Vortex:sane:sgemm"
+          - "Vortex:sane:*"
           - "XiangShan:default-chisel3:* !*:linux"
           - "XiangShan:default-chisel6:* !*:linux"
           - "XiangShan:mini-chisel3:* !*:linux"
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index fe32bf4ca..11257859d 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -211,23 +211,32 @@ List Of Warnings
    public task, or when the blocking and non-blocking assignments have
    non-overlapping bits and structure members.
 
+   From Verilator 5.038, this warning is only issued when Verilator can't prove that
+   the assignments are to non-overlapping sub-parts, and the blocking
+   assignment is in combinational logic (which is the case where simulation
+   results might differ from other simulators). Review any BLKANDNBLK
+   cases carefully after this version, and sign them off as
+   described above, only if know for sure the updates are not to overlapping
+   parts of the signal.
+
    Generally, this is caused by a register driven by both combo logic and a
    flop:
 
    .. code-block:: sv
 
-         logic [1:0] foo;
-         always @(posedge clk)  foo[0] <= ...
-         always_comb foo[1] = ...
+         logic [3:0] foo;
+         always @(posedge clk) foo[index] <= ...  // With index != 0
+         always_comb foo[0] = ...
 
    Instead, use a different register for the flop:
 
    .. code-block:: sv
 
-         logic [1:0] foo;
-         always @(posedge clk)  foo_flopped[0] <= ...
-         always_comb foo[0] = foo_flopped[0];
-         always_comb foo[1] = ...
+         logic [3:0] foo;
+         logic [3:1] foo_flopped;
+         always @(posedge clk) foo_flopped[index] <= ... // With index != 0
+         always_comb foo[0] = ...
+         always_comb foo[3:1] = foo_flopped;
 
    Or, this may also avoid the error:
 
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 6dfe7d32e..d72ebcd9b 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -1915,6 +1915,7 @@ class AstVar final : public AstNode {
     bool m_isForcedByCode : 1;  // May be forced/released from AstAssignForce/AstRelease
     bool m_isWrittenByDpi : 1;  // This variable can be written by a DPI Export
     bool m_isWrittenBySuspendable : 1;  // This variable can be written by a suspendable process
+    bool m_ignorePostRead : 1;  // Ignore reads in 'Post' blocks during ordering
     bool m_ignorePostWrite : 1;  // Ignore writes in 'Post' blocks during ordering
     bool m_ignoreSchedWrite : 1;  // Ignore writes in scheduling (for special optimizations)
 
@@ -1961,6 +1962,7 @@ class AstVar final : public AstNode {
         m_isForcedByCode = false;
         m_isWrittenByDpi = false;
         m_isWrittenBySuspendable = false;
+        m_ignorePostRead = false;
         m_ignorePostWrite = false;
         m_ignoreSchedWrite = false;
         m_attrClocker = VVarAttrClocker::CLOCKER_UNKNOWN;
@@ -2118,6 +2120,8 @@ public:
     void setWrittenByDpi() { m_isWrittenByDpi = true; }
     bool isWrittenBySuspendable() const { return m_isWrittenBySuspendable; }
     void setWrittenBySuspendable() { m_isWrittenBySuspendable = true; }
+    bool ignorePostRead() const { return m_ignorePostRead; }
+    void setIgnorePostRead() { m_ignorePostRead = true; }
     bool ignorePostWrite() const { return m_ignorePostWrite; }
     void setIgnorePostWrite() { m_ignorePostWrite = true; }
     bool ignoreSchedWrite() const { return m_ignoreSchedWrite; }
diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp
index e8c8e5203..0ba1758d9 100644
--- a/src/V3Delayed.cpp
+++ b/src/V3Delayed.cpp
@@ -71,6 +71,18 @@
 //      if (__VdlySet__LHS) a[__VdlyDim0__LHS][__VdlyDim1__LHS] = __VdlyVal__LHS;
 // Multiple consecutive NBAs of compatible form can share the same  __VdlySet* flag
 //
+// "Shadow variable masked" scheme. Used for packed target variables that
+// have both blocking and non-blocking updates. E.g.:
+//   LHS[Index] <= RHS;
+//   When there is also LHS[SomeNonOverlappingIndex] = RHS2;
+// is converted to:
+//  - In the original logic, replace the AstAssignDelay with:
+//      __Vdly__LHS[Index] = RHS;
+//      __VdlyMask__LHS[Index] = '1;
+//  - Add new "Post-scheduled" logic:
+//      LHS = (__Vdly__LHS & __VdlyMask__LHS) | (LHS & ~__VdlyMask__LHS);
+//      __VdlyMask__LHS = '0;
+//
 // "Unique flag" scheme. Used for all variables updated by NBAs
 // in suspendable processees or forks. E.g.:
 //   #1 LHS <= RHS;
@@ -124,6 +136,7 @@ class DelayedVisitor final : public VNVisitor {
         Undecided = 0,
         UnsupportedCompoundArrayInLoop,
         ShadowVar,
+        ShadowVarMasked,
         FlagShared,
         FlagUnique,
         ValueQueueWhole,
@@ -152,6 +165,10 @@ class DelayedVisitor final : public VNVisitor {
             struct {  // Stuff needed for Scheme::ShadowVar
                 AstVarScope* vscp;  // The shadow variable
             } m_shadowVariableKit;
+            struct {  // Stuff needed for Scheme::ShadowVarMasked
+                AstVarScope* vscp;  // The shadow variable
+                AstVarScope* maskp;  // The mask variable
+            } m_shadowVarMaskedKit;
             struct {  // Stuff needed for Scheme::FlagShared
                 AstActive* activep;  // The active block for the Pre/Post logic
                 AstAlwaysPost* postp;  // The post block for commiting results
@@ -174,6 +191,10 @@ class DelayedVisitor final : public VNVisitor {
             UASSERT(m_scheme == Scheme::ShadowVar, "Inconsistent Scheme");
             return m_kitUnion.m_shadowVariableKit;
         }
+        auto& shadowVarMaskedKit() {
+            UASSERT(m_scheme == Scheme::ShadowVarMasked, "Inconsistent Scheme");
+            return m_kitUnion.m_shadowVarMaskedKit;
+        }
         auto& flagSharedKit() {
             UASSERT(m_scheme == Scheme::FlagShared, "Inconsistent Scheme");
             return m_kitUnion.m_flagSharedKit;
@@ -202,6 +223,18 @@ class DelayedVisitor final : public VNVisitor {
         void addSensitivity(AstSenTree* nodep) { addSensitivity(nodep->sensesp()); }
     };
 
+    // Data structure to keep track of all writes to
+    struct WriteReference final {
+        AstVarRef* m_refp = nullptr;  // The reference
+        bool m_isNBA = false;  // True if an NBA write
+        bool m_inNonComb = false;  // True if reference is known to be in non-combinational logic
+        WriteReference() = default;
+        WriteReference(AstVarRef* refp, bool isNBA, bool inNonComb)
+            : m_refp{refp}
+            , m_isNBA{isNBA}
+            , m_inNonComb{inNonComb} {}
+    };
+
     // Data required to lower AstAssignDelay later
     struct NBA final {
         AstAssignDly* nodep = nullptr;  // The NBA this record refers to
@@ -215,10 +248,13 @@ class DelayedVisitor final : public VNVisitor {
     //  AstNodeModule::user1p() -> std::unorded_map<std::string, AstVar*> temp map via m_varMap
     //  AstVarScope::user1p()   -> VarScopeInfo via m_vscpInfo
     //  AstVarScope::user2p()   -> AstVarRef*: First write reference to the Variable
+    //  AstVarScope::user3p()   -> std::vector<WriteReference> via m_writeRefs;
     const VNUser1InUse m_user1InUse{};
     const VNUser2InUse m_user2InUse{};
+    const VNUser3InUse m_user3InUse{};
     AstUser1Allocator<AstNodeModule, std::unordered_map<std::string, AstVar*>> m_varMap;
     AstUser1Allocator<AstVarScope, VarScopeInfo> m_vscpInfo;
+    AstUser3Allocator<AstVarScope, std::vector<WriteReference>> m_writeRefs;
 
     // STATE - across all visitors
     std::set<AstSenTree*> m_timingDomains;  // Timing resume domains
@@ -230,6 +266,7 @@ class DelayedVisitor final : public VNVisitor {
     bool m_inLoop = false;  // True in for loops
     bool m_inSuspendableOrFork = false;  // True in suspendable processes and forks
     bool m_ignoreBlkAndNBlk = false;  // Suppress delayed assignment BLKANDNBLK
+    bool m_inNonCombLogic = false;  // We are in non-combinational logic
     AstVarRef* m_currNbaLhsRefp = nullptr;  // Current NBA LHS variable reference
 
     // STATE - during NBA conversion (after visit)
@@ -240,6 +277,7 @@ class DelayedVisitor final : public VNVisitor {
 
     // STATE - Statistic tracking
     VDouble0 m_nSchemeShadowVar;  // Number of variables using Scheme::ShadowVar
+    VDouble0 m_nSchemeShadowVarMasked;  // Number of variabels using Scheme::ShadowVarMasked
     VDouble0 m_nSchemeFlagShared;  // Number of variables using Scheme::FlagShared
     VDouble0 m_nSchemeFlagUnique;  // Number of variables using Scheme::FlagUnique
     VDouble0 m_nSchemeValueQueuesWhole;  //  Number of variables using Scheme::ValueQueueWhole
@@ -248,15 +286,129 @@ class DelayedVisitor final : public VNVisitor {
 
     // METHODS
 
+    // Return true iff a variable is assigned by both blocking and nonblocking
+    // assignments. Issue BLKANDNBLK error if we can't prove the mixed
+    // assignments are to independent bits and the blocking assignment can be
+    // in combinational logic, which is something we can't safely implement
+    // still.
+    bool checkMixedUsage(const AstVarScope* vscp, bool isIntegralOrPacked) {
+
+        struct Ref final {
+            AstVarRef* m_refp;  // The reference
+            bool m_inNonComb;  // True if known to be in non-combinational logic
+            int m_lsb;  // LSB of accessed range
+            int m_msb;  // MSB of accessed range
+            Ref(AstVarRef* refp, bool inNonComb, int lsb, int msb)
+                : m_refp{refp}
+                , m_inNonComb{inNonComb}
+                , m_lsb{lsb}
+                , m_msb{msb} {}
+        };
+
+        std::vector<Ref> blkRefs;  // Blocking writes
+        std::vector<Ref> nbaRefs;  // Non-blockign writes
+
+        const int width = isIntegralOrPacked ? vscp->width() : 1;
+
+        for (const auto& writeRef : m_writeRefs(vscp)) {
+            int lsb = 0;
+            int msb = width - 1;
+            if (const AstSel* const selp = VN_CAST(writeRef.m_refp->backp(), Sel)) {
+                if (VN_IS(selp->lsbp(), Const)) {
+                    lsb = selp->lsbConst();
+                    msb = selp->msbConst();
+                }
+            }
+            if (writeRef.m_isNBA) {
+                nbaRefs.emplace_back(writeRef.m_refp, writeRef.m_inNonComb, lsb, msb);
+            } else {
+                blkRefs.emplace_back(writeRef.m_refp, writeRef.m_inNonComb, lsb, msb);
+            }
+        }
+        // We only run this function on targets of NBAs, so there should be at least one...
+        UASSERT_OBJ(!nbaRefs.empty(), vscp, "Did not record NBA write");
+        // If no blocking upadte, then we are good
+        if (blkRefs.empty()) return false;
+
+        // If the blocking assignment is in non-combinational logic (i.e.:
+        // in logic that has an explicit trigger), then we can safely
+        // implement it (there is no race between clocked logic and post
+        // scheduled logic), so need not error
+        blkRefs.erase(std::remove_if(blkRefs.begin(), blkRefs.end(),
+                                     [](const Ref& ref) { return ref.m_inNonComb; }),
+                      blkRefs.end());
+
+        // If nothing left, then we need not error
+        if (blkRefs.empty()) return true;
+
+        // If not a packed variable, warn here as we can't prove independence
+        if (!isIntegralOrPacked) {
+            const Ref& blkRef = blkRefs.front();
+            const Ref& nbaRef = nbaRefs.front();
+            vscp->v3warn(
+                BLKANDNBLK,
+                "Unsupported: Blocking and non-blocking assignments to same non-packed variable: "
+                    << vscp->varp()->prettyNameQ() << '\n'
+                    << vscp->warnContextPrimary() << '\n'
+                    << blkRef.m_refp->warnOther() << "... Location of blocking assignment\n"
+                    << blkRef.m_refp->warnContextSecondary() << '\n'
+                    << nbaRef.m_refp->warnOther() << "... Location of nonblocking assignment\n"
+                    << nbaRef.m_refp->warnContextSecondary());
+            return true;
+        }
+
+        // We need to error if we can't prove the written bits are independent
+
+        // Sort refs by interval
+        const auto lessThanRef = [](const Ref& a, const Ref& b) {
+            if (a.m_lsb != b.m_lsb) return a.m_lsb < b.m_lsb;
+            return a.m_msb < b.m_msb;
+        };
+        std::stable_sort(blkRefs.begin(), blkRefs.end(), lessThanRef);
+        std::stable_sort(nbaRefs.begin(), nbaRefs.end(), lessThanRef);
+        // Iterate both vectors, checking for overlap
+        auto bIt = blkRefs.begin();
+        auto nIt = nbaRefs.begin();
+        while (bIt != blkRefs.end() && nIt != nbaRefs.end()) {
+            if (lessThanRef(*bIt, *nIt)) {
+                if (nIt->m_lsb <= bIt->m_msb) break;  // Stop on Overlap
+                ++bIt;
+            } else {
+                if (bIt->m_lsb <= nIt->m_msb) break;  // Stop on Overlap
+                ++nIt;
+            }
+        }
+
+        // If we found an overlapping range that cannot be safely implemented, then wran...
+        if (bIt != blkRefs.end() && nIt != nbaRefs.end()) {
+            const Ref& blkRef = *bIt;
+            const Ref& nbaRef = *nIt;
+            vscp->v3warn(BLKANDNBLK,
+                         "Unsupported: Blocking and non-blocking assignments to "
+                         "potentially overlapping bits of same packed variable: "
+                             << vscp->varp()->prettyNameQ() << '\n'
+                             << vscp->warnContextPrimary() << '\n'
+                             << blkRef.m_refp->warnOther() << "... Location of blocking assignment"
+                             << " (bits [" << blkRef.m_msb << ":" << blkRef.m_lsb << "])\n"
+                             << blkRef.m_refp->warnContextSecondary() << '\n'
+                             << nbaRef.m_refp->warnOther()
+                             << "... Location of nonblocking assignment"
+                             << " (bits [" << nbaRef.m_msb << ":" << nbaRef.m_lsb << "])\n"
+                             << nbaRef.m_refp->warnContextSecondary());
+        }
+
+        return true;
+    }
+
     // Choose the NBA scheme used for the given variable.
-    static Scheme chooseScheme(const AstVarScope* vscp, const VarScopeInfo& vscpInfo) {
+    Scheme chooseScheme(const AstVarScope* vscp, const VarScopeInfo& vscpInfo) {
         UASSERT_OBJ(vscpInfo.m_scheme == Scheme::Undecided, vscp, "NBA scheme already decided");
 
         const AstNodeDType* const dtypep = vscp->dtypep()->skipRefp();
         // Unpacked arrays
         if (const AstUnpackArrayDType* const uaDTypep = VN_CAST(dtypep, UnpackArrayDType)) {
             // Basic underlying type of elements, if any.
-            AstBasicDType* const basicp = uaDTypep->basicp();
+            const AstBasicDType* const basicp = uaDTypep->basicp();
             // If used in a loop, we must have a dynamic commit queue. (Also works in suspendables)
             if (vscpInfo.m_inLoop) {
                 // Arrays with compound element types are currently not supported in loops
@@ -281,6 +433,25 @@ class DelayedVisitor final : public VNVisitor {
 
         // In a suspendable of fork, we must use the unique flag scheme, TODO: why?
         if (vscpInfo.m_inSuspOrFork) return Scheme::FlagUnique;
+
+        const bool isIntegralOrPacked = dtypep->isIntegralOrPacked();
+        // Check for mixed usage (this also warns if not OK)
+        if (checkMixedUsage(vscp, isIntegralOrPacked)) {
+            // If it's a variable updated by both blocking and non-blocking
+            // asignments, use the ShadowVarMasked schem if masked update is
+            // possible. This can handle blocking and non-blocking updates to
+            // inpdendent parts correctly at run-time, and always works, even
+            // in loops or other dynamic context.
+            if (isIntegralOrPacked) return Scheme::ShadowVarMasked;
+            // If it's inside a loop, use Scheme::ShadowVar, which is safe,
+            // but will generate incorrect code if a partial update is used
+            if (vscpInfo.m_inLoop) return Scheme::ShadowVar;
+            // Otherwise (for not packed variables), use the FlagUnique scheme,
+            // which at least handles partial updates correctly, but might break
+            // in loops or other dynamic context
+            return Scheme::FlagUnique;
+        }
+
         // Otherwise use the simple shadow variable scheme
         return Scheme::ShadowVar;
     }
@@ -350,7 +521,12 @@ class DelayedVisitor final : public VNVisitor {
             nodep = arrSelp->fromp();
         }
         // What remains must be an AstVarRef, or some sort of select, we assume can reuse it.
-        UASSERT_OBJ(nodep->isPure(), lhsp, "Malformed LHS in NBA");
+        if (const AstAssocSel* const aselp = VN_CAST(nodep, AssocSel)) {
+            UASSERT_OBJ(aselp->fromp()->isPure() && aselp->bitp()->isPure(), lhsp,
+                        "Malformed LHS in NBA");
+        } else {
+            UASSERT_OBJ(nodep->isPure(), lhsp, "Malformed LHS in NBA");
+        }
         // Now have been converted to use the captured values
         return lhsp;
     }
@@ -410,6 +586,70 @@ class DelayedVisitor final : public VNVisitor {
         });
     }
 
+    // Scheme::ShadowVarMasked
+    void prepareSchemeShadowVarMasked(AstVarScope* vscp, VarScopeInfo& vscpInfo) {
+        UASSERT_OBJ(vscpInfo.m_scheme == Scheme::ShadowVarMasked, vscp, "Inconsistent NBA scheme");
+        FileLine* const flp = vscp->fileline();
+        AstScope* const scopep = vscp->scopep();
+        // Create the shadow variable
+        const std::string shadowName = "__Vdly__" + vscp->varp()->shortName();
+        AstVarScope* const shadowVscp = createTemp(flp, scopep, shadowName, vscp->dtypep());
+        vscpInfo.shadowVarMaskedKit().vscp = shadowVscp;
+        // Create the makk variable
+        const std::string maskName = "__VdlyMask__" + vscp->varp()->shortName();
+        AstVarScope* const maskVscp = createTemp(flp, scopep, maskName, vscp->dtypep());
+        maskVscp->varp()->setIgnorePostWrite();
+        vscpInfo.shadowVarMaskedKit().maskp = maskVscp;
+        // Create the AstActive for the Post logic
+        AstActive* const activep
+            = new AstActive{flp, "nba-shadow-var-masked", vscpInfo.senTreep()};
+        activep->sensesStorep(vscpInfo.senTreep());
+        scopep->addBlocksp(activep);
+        // Add 'Post' scheduled process for the commit and mask clear
+        AstAlwaysPost* const postp = new AstAlwaysPost{flp};
+        activep->addStmtsp(postp);
+        // Add the commit - vscp = (shadowVscp & maskVscp) | (vscp & ~maskVscp);
+        postp->addStmtsp(new AstAssign{
+            flp, new AstVarRef{flp, vscp, VAccess::WRITE},
+            new AstOr{flp,
+                      new AstAnd{flp, new AstVarRef{flp, shadowVscp, VAccess::READ},
+                                 new AstVarRef{flp, maskVscp, VAccess::READ}},
+                      new AstAnd{flp, new AstVarRef{flp, vscp, VAccess::READ},
+                                 new AstNot{flp, new AstVarRef{flp, maskVscp, VAccess::READ}}}}});
+        vscp->varp()->setIgnorePostRead();
+        // Clar the mask - maskVscp = '0;
+        postp->addStmtsp(
+            new AstAssign{flp, new AstVarRef{flp, maskVscp, VAccess::WRITE},
+                          new AstConst{flp, AstConst::WidthedValue{}, maskVscp->width(), 0}});
+    }
+    void convertSchemeShadowVarMasked(AstAssignDly* nodep, AstVarScope* vscp,
+                                      VarScopeInfo& vscpInfo) {
+        UASSERT_OBJ(vscpInfo.m_scheme == Scheme::ShadowVarMasked, vscp, "Inconsistent NBA scheme");
+        AstVarScope* const shadowVscp = vscpInfo.shadowVarMaskedKit().vscp;
+        AstVarScope* const maskVscp = vscpInfo.shadowVarMaskedKit().maskp;
+
+        AstNodeExpr* lhsClonep = nodep->lhsp()->cloneTree(false);
+
+        // Replace the write ref on the LHS with the shadow variable
+        nodep->lhsp()->foreach([&](AstVarRef* const refp) {
+            if (!refp->access().isWriteOnly()) return;
+            UASSERT_OBJ(refp->varScopep() == vscp, nodep, "NBA not setting expected variable");
+            refp->varScopep(shadowVscp);
+            refp->varp(shadowVscp->varp());
+        });
+        // Set the same bits in the mask to 1
+        lhsClonep->foreach([&](AstVarRef* const refp) {
+            if (!refp->access().isWriteOnly()) return;
+            UASSERT_OBJ(refp->varScopep() == vscp, nodep, "NBA not setting expected variable");
+            refp->varScopep(maskVscp);
+            refp->varp(maskVscp->varp());
+        });
+        FileLine* const flp = nodep->fileline();
+        AstConst* const onesp = new AstConst{flp, AstConst::DTyped{}, lhsClonep->dtypep()};
+        onesp->num().setAllBits1();
+        nodep->addNextHere(new AstAssign{flp, lhsClonep, onesp});
+    }
+
     // Scheme::FlagShared
     void prepareSchemeFlagShared(AstVarScope* vscp, VarScopeInfo& vscpInfo) {
         UASSERT_OBJ(vscpInfo.m_scheme == Scheme::FlagShared, vscp, "Inconsistent NBA scheme");
@@ -705,51 +945,19 @@ class DelayedVisitor final : public VNVisitor {
         pushDeletep(nodep->unlinkFrBack());
     }
 
-    // Record and warn if a variable is assigned by both blocking and nonblocking assignments
-    void checkVarUsage(AstVarRef* nodep, bool nonBlocking) {
+    // Record where a variable is assigned
+    void recordWriteRef(AstVarRef* nodep, bool nonBlocking) {
         // Ignore references in certain contexts
         if (m_ignoreBlkAndNBlk) return;
-        // Ignore if warning is disabled on this reference (used by V3Force).
-        if (nodep->fileline()->warnIsOff(V3ErrorCode::BLKANDNBLK)) return;
         // Ignore if it's an array
         // TODO: we do this because it used to be the previous behaviour.
         //       Is it still required, or should we warn for arrays as well?
         //       Scheduling is no different for them...
+        //       Clarification: This is OK for arrays of primitive types, but
+        //       arrays that use the ShadowVar scheme don't work...
         if (VN_IS(nodep->varScopep()->dtypep()->skipRefp(), UnpackArrayDType)) return;
 
-        // Mark ref as blocking/non-blocking
-        nodep->user1(nonBlocking);
-
-        AstVarScope* const vscp = nodep->varScopep();
-
-        // Pick up/set the first reference to this variable
-        const AstVarRef* const firstRefp = VN_AS(vscp->user2p(), VarRef);
-        if (!firstRefp) {
-            vscp->user2p(nodep);
-            return;
-        }
-
-        // If both blocking/non-blocking, it's OK
-        if (firstRefp->user1() == static_cast<int>(nonBlocking)) return;
-
-        // Otherwise warn that both blocking and non-blocking assignments are used
-        const auto containingAssignment = [](const AstNode* nodep) -> const AstNode* {
-            while (!VN_IS(nodep, NodeAssign)) nodep = nodep->backp();
-            return nodep;
-        };
-
-        const AstNode* nonblockingp = nonBlocking ? nodep : firstRefp;
-        if (const AstNode* np = containingAssignment(nonblockingp)) nonblockingp = np;
-        const AstNode* blockingp = nonBlocking ? firstRefp : nodep;
-        if (const AstNode* np = containingAssignment(blockingp)) blockingp = np;
-        vscp->v3warn(BLKANDNBLK,
-                     "Unsupported: Blocked and non-blocking assignments to same variable: "
-                         << vscp->varp()->prettyNameQ() << '\n'
-                         << vscp->warnContextPrimary() << '\n'
-                         << blockingp->warnOther() << "... Location of blocking assignment\n"
-                         << blockingp->warnContextSecondary() << '\n'
-                         << nonblockingp->warnOther() << "... Location of nonblocking assignment\n"
-                         << nonblockingp->warnContextSecondary());
+        m_writeRefs(nodep->varScopep()).emplace_back(nodep, nonBlocking, m_inNonCombLogic);
     }
 
     // VISITORS
@@ -773,6 +981,11 @@ class DelayedVisitor final : public VNVisitor {
                 prepareSchemeShadowVar(vscp, vscpInfo);
                 break;
             }
+            case Scheme::ShadowVarMasked: {
+                ++m_nSchemeShadowVarMasked;
+                prepareSchemeShadowVarMasked(vscp, vscpInfo);
+                break;
+            }
             case Scheme::FlagShared: {
                 ++m_nSchemeFlagShared;
                 prepareSchemeFlagShared(vscp, vscpInfo);
@@ -816,6 +1029,10 @@ class DelayedVisitor final : public VNVisitor {
                 convertSchemeShadowVar(nbap, vscp, vscpInfo);
                 break;
             }
+            case Scheme::ShadowVarMasked: {
+                convertSchemeShadowVarMasked(nbap, vscp, vscpInfo);
+                break;
+            }
             case Scheme::FlagShared: {
                 convertSchemeFlagShared(nbap, vscp, vscpInfo);
                 break;
@@ -844,9 +1061,11 @@ class DelayedVisitor final : public VNVisitor {
         UASSERT_OBJ(!m_activep, nodep, "Should not nest");
         VL_RESTORER(m_activep);
         VL_RESTORER(m_ignoreBlkAndNBlk);
+        VL_RESTORER(m_inNonCombLogic);
         m_activep = nodep;
         AstSenTree* const senTreep = nodep->sensesp();
         m_ignoreBlkAndNBlk = senTreep->hasStatic() || senTreep->hasInitial();
+        m_inNonCombLogic = senTreep->hasClocked();
         iterateChildren(nodep);
     }
     void visit(AstNodeProcedure* nodep) override {
@@ -854,8 +1073,14 @@ class DelayedVisitor final : public VNVisitor {
         {
             VL_RESTORER(m_inSuspendableOrFork);
             VL_RESTORER(m_procp);
+            VL_RESTORER(m_ignoreBlkAndNBlk);
+            VL_RESTORER(m_inNonCombLogic);
             m_inSuspendableOrFork = nodep->isSuspendable();
             m_procp = nodep;
+            if (m_inSuspendableOrFork) {
+                m_ignoreBlkAndNBlk = false;
+                m_inNonCombLogic = true;
+            }
             iterateChildren(nodep);
         }
         if (m_timingDomains.empty()) return;
@@ -1013,8 +1238,8 @@ class DelayedVisitor final : public VNVisitor {
         nba.nodep = nodep;
         nba.vscp = vscp;
 
-        // Check var usage
-        checkVarUsage(m_currNbaLhsRefp, true);
+        // Record write reference
+        recordWriteRef(m_currNbaLhsRefp, true);
 
         iterateChildren(nodep);
     }
@@ -1023,14 +1248,8 @@ class DelayedVisitor final : public VNVisitor {
         if (nodep == m_currNbaLhsRefp) return;
         // Only care about write refs
         if (!nodep->access().isWriteOrRW()) return;
-        // Check var usage
-        checkVarUsage(nodep, false);
-    }
-    void visit(AstNodeReadWriteMem* nodep) override {
-        VL_RESTORER(m_ignoreBlkAndNBlk);
-        // $readmem/$writemem often used in mem models so we suppress BLKANDNBLK warnings
-        m_ignoreBlkAndNBlk = true;
-        iterateChildren(nodep);
+        // Record write reference
+        recordWriteRef(nodep, false);
     }
     void visit(AstNodeFor* nodep) override {  // LCOV_EXCL_LINE
         nodep->v3fatalSrc("For statements should have been converted to while statements");
@@ -1054,6 +1273,7 @@ public:
     explicit DelayedVisitor(AstNetlist* nodep) { iterate(nodep); }
     ~DelayedVisitor() override {
         V3Stats::addStat("NBA, variables using ShadowVar scheme", m_nSchemeShadowVar);
+        V3Stats::addStat("NBA, variables using ShadowVarMasked scheme", m_nSchemeShadowVarMasked);
         V3Stats::addStat("NBA, variables using FlagShared scheme", m_nSchemeFlagShared);
         V3Stats::addStat("NBA, variables using FlagUnique scheme", m_nSchemeFlagUnique);
         V3Stats::addStat("NBA, variables using ValueQueueWhole scheme", m_nSchemeValueQueuesWhole);
diff --git a/src/V3Force.cpp b/src/V3Force.cpp
index eeb8e9f9c..ae144dc4f 100644
--- a/src/V3Force.cpp
+++ b/src/V3Force.cpp
@@ -272,10 +272,8 @@ class ForceConvertVisitor final : public VNVisitor {
         // it is a variable, and not a net, set the original signal to the forced value, as it
         // needs to retain the forced value until the next procedural update, which might happen on
         // a later eval. Luckily we can do all this in a single assignment.
-        FileLine* const fl_nowarn = new FileLine{flp};
-        fl_nowarn->warnOff(V3ErrorCode::BLKANDNBLK, true);
         AstAssign* const resetRdp
-            = new AstAssign{fl_nowarn, lhsp->cloneTreePure(false), lhsp->unlinkFrBack()};
+            = new AstAssign{flp, lhsp->cloneTreePure(false), lhsp->unlinkFrBack()};
         // Replace write refs on the LHS
         resetRdp->lhsp()->foreach([this](AstNodeVarRef* refp) {
             if (refp->access() != VAccess::WRITE) return;
@@ -283,10 +281,7 @@ class ForceConvertVisitor final : public VNVisitor {
             AstVarScope* const newVscp = vscp->varp()->isContinuously()
                                              ? m_state.getForceComponents(vscp).m_rdVscp
                                              : vscp;
-            // Disable BLKANDNBLK for this reference
-            FileLine* const flp = new FileLine{refp->fileline()};
-            flp->warnOff(V3ErrorCode::BLKANDNBLK, true);
-            AstVarRef* const newpRefp = new AstVarRef{flp, newVscp, VAccess::WRITE};
+            AstVarRef* const newpRefp = new AstVarRef{refp->fileline(), newVscp, VAccess::WRITE};
             refp->replaceWith(newpRefp);
             VL_DO_DANGLING(refp->deleteTree(), refp);
         });
diff --git a/src/V3OrderGraphBuilder.cpp b/src/V3OrderGraphBuilder.cpp
index 7a13de9ce..96b346c05 100644
--- a/src/V3OrderGraphBuilder.cpp
+++ b/src/V3OrderGraphBuilder.cpp
@@ -254,8 +254,15 @@ class OrderGraphBuilder final : public VNVisitor {
             // Update VarUsage
             varscp->user2(varscp->user2() | VU_CON);
             // Add edges
-            if (!m_inClocked || m_inPost) {
+            if (m_inPost) {
                 // Combinational logic
+                if (!varscp->varp()->ignorePostRead() && m_readTriggersCombLogic(varscp)) {
+                    // Ignore explicit sensitivities
+                    OrderVarVertex* const varVxp = getVarVertex(varscp, VarVertexType::STD);
+                    // Add edge from consumed VarStdVertex -> to consuming LogicVertex
+                    m_graphp->addHardEdge(varVxp, m_logicVxp, WEIGHT_MEDIUM);
+                }
+            } else if (!m_inClocked) {  // Combinational logic
                 if (m_readTriggersCombLogic(varscp)) {
                     // Ignore explicit sensitivities
                     OrderVarVertex* const varVxp = getVarVertex(varscp, VarVertexType::STD);
diff --git a/test_regress/t/t_altera_lpm.v b/test_regress/t/t_altera_lpm.v
index 95e16b454..c4419af90 100644
--- a/test_regress/t/t_altera_lpm.v
+++ b/test_regress/t/t_altera_lpm.v
@@ -46,7 +46,6 @@
 //END_MODULE_NAME--------------------------------------------------------------
 
 //See also: https://github.com/twosigma/verilator_support
-// verilator lint_off BLKANDNBLK
 // verilator lint_off COMBDLY
 // verilator lint_off INITIALDLY
 // verilator lint_off MULTIDRIVEN
diff --git a/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.out b/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.out
deleted file mode 100644
index e4937d2bd..000000000
--- a/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.out
+++ /dev/null
@@ -1,11 +0,0 @@
-%Error-BLKANDNBLK: t/t_assign_on_rhs_of_nonblocking_unsup.v:15:8: Unsupported: Blocked and non-blocking assignments to same variable: 't.x'
-   15 |    int x;
-      |        ^
-                   t/t_assign_on_rhs_of_nonblocking_unsup.v:24:18: ... Location of blocking assignment
-   24 |          y <= (x = 2);
-      |                  ^
-                   t/t_assign_on_rhs_of_nonblocking_unsup.v:21:12: ... Location of nonblocking assignment
-   21 |          x <= 1;
-      |            ^~
-                   ... For error description see https://verilator.org/warn/BLKANDNBLK?v=latest
-%Error: Exiting due to
diff --git a/test_regress/t/t_enum_huge_methods.v b/test_regress/t/t_enum_huge_methods.v
index 0c7e1de6d..400836f87 100644
--- a/test_regress/t/t_enum_huge_methods.v
+++ b/test_regress/t/t_enum_huge_methods.v
@@ -49,21 +49,15 @@ module t (/*AUTOARG*/
       end
       //
       else if (cyc == 10) begin
-         /* verilator lint_off BLKANDNBLK */
          i_cast <= $cast(e, 60'h1234);
-         /* verilator lint_on BLKANDNBLK */
       end
       else if (cyc == 11) begin
          `checkh(i_cast, 0);
-         /* verilator lint_off BLKANDNBLK */
          i_cast <= $cast(e, 60'h1);
-         /* verilator lint_on BLKANDNBLK */
       end
       else if (cyc == 12) begin
          `checkh(i_cast, 1);
-         /* verilator lint_off BLKANDNBLK */
          i_cast <= $cast(e, 60'h1234_4567_abcd);
-         /* verilator lint_on BLKANDNBLK */
       end
       else if (cyc == 13) begin
          `checkh(i_cast, 1);
diff --git a/test_regress/t/t_force.v b/test_regress/t/t_force.v
index d6c9fce56..1cf0d1142 100644
--- a/test_regress/t/t_force.v
+++ b/test_regress/t/t_force.v
@@ -114,7 +114,7 @@ module t(/*AUTOARG*/
          release r;
       end
       else if (cyc == 45) begin
-         `checkr(r, 1.25);
+         `checkr(r, 2.5);
       end
       //
       else if (cyc == 99) begin
diff --git a/test_regress/t/t_mem_multidim.v b/test_regress/t/t_mem_multidim.v
index a81d5319d..ca1307553 100644
--- a/test_regress/t/t_mem_multidim.v
+++ b/test_regress/t/t_mem_multidim.v
@@ -12,11 +12,9 @@ module t (/*AUTOARG*/
    input clk;
 
    // verilator lint_off ASCRANGE
-   // verilator lint_off BLKANDNBLK
    //               3    3    4
    reg [71:0] memw [2:0][1:3][5:2];
    reg [7:0]  memn [2:0][1:3][5:2];
-   // verilator lint_on  BLKANDNBLK
 
    integer cyc; initial cyc = 0;
    reg [63:0] crc;
diff --git a/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.py b/test_regress/t/t_nba_assign_on_rhs.py
similarity index 83%
rename from test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.py
rename to test_regress/t/t_nba_assign_on_rhs.py
index 31228c9a7..fc5a55e3f 100755
--- a/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.py
+++ b/test_regress/t/t_nba_assign_on_rhs.py
@@ -9,8 +9,10 @@
 
 import vltest_bootstrap
 
-test.scenarios('linter')
+test.scenarios('vlt')
 
-test.lint(fails=True, expect_filename=test.golden_filename)
+test.compile()
+
+test.execute()
 
 test.passes()
diff --git a/test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.v b/test_regress/t/t_nba_assign_on_rhs.v
similarity index 100%
rename from test_regress/t/t_assign_on_rhs_of_nonblocking_unsup.v
rename to test_regress/t/t_nba_assign_on_rhs.v
diff --git a/test_regress/t/t_nba_mixed_update_clocked.py b/test_regress/t/t_nba_mixed_update_clocked.py
new file mode 100755
index 000000000..5b4c97c80
--- /dev/null
+++ b/test_regress/t/t_nba_mixed_update_clocked.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt_all')
+
+test.compile(verilator_flags2=["--stats", "--unroll-count", "1"])
+
+test.execute()
+
+test.file_grep(test.stats, r'NBA, variables using ShadowVar scheme\s+(\d+)', 1)
+test.file_grep(test.stats, r'NBA, variables using ShadowVarMasked scheme\s+(\d+)', 2)
+test.file_grep(test.stats, r'NBA, variables using FlagUnique scheme\s+(\d+)', 1)
+test.file_grep(test.stats, r'Optimizations, Unrolled Loops\s+(\d+)', 0)
+test.file_grep_not(test.stats, r'Warnings, Suppressed BLKANDNBLK')
+
+test.passes()
diff --git a/test_regress/t/t_nba_mixed_update_clocked.v b/test_regress/t/t_nba_mixed_update_clocked.v
new file mode 100644
index 000000000..abdf54e54
--- /dev/null
+++ b/test_regress/t/t_nba_mixed_update_clocked.v
@@ -0,0 +1,59 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define check(got ,exp) do if ((got) !== (exp)) begin $write("%%Error: %s:%0d: cyc=%0d got='h%x exp='h%x\n", `__FILE__,`__LINE__, cyc, (got), (exp)); `stop; end while(0)
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+  input clk;
+
+  reg [31:0] cyc = 0;
+
+  // 'x' has both blocking and non-blocking update, with the blocking
+  // update in **clocked** logic
+  reg [1:0] x = 2'b00;
+  // '{y1, y0}' should have exactly the same value as 'x', at all times
+  reg y0 = 1'b0;
+  reg y1 = 1'b0;
+  // 'z[0]' should equal '{8{x[0]}', 'z[1]' should equal '{8{x[1]}}'
+  reg [1:0][7:0] z;
+  // 'pair.a' should equal 'x[0]', 'pair.b' should equal 'x[1]'
+  struct {
+    logic a;
+    logic b;
+  } pair = '{a: 1'b0, b: 1'b0};
+
+  always @(posedge clk) begin
+     $display("cyc = %d (%08x) x[1] = %0d, x[0] = %0d, y1 = %0d, y0 = %0d z[1] = %02x z[1] = %02x pair.a = %0d pair.b = %0d",
+              cyc, cyc, x[1], x[0], y1, y0, z[1], z[0], pair.a, pair.b);
+     `check(x[0], cyc[0]);
+     `check(x[1], cyc[0]);
+     `check(y0, cyc[0]);
+     `check(y1, cyc[0]);
+     `check(z[0], {8{cyc[0]}});
+     `check(z[1], {8{cyc[0]}});
+     `check(pair.a, cyc[0]);
+     `check(pair.b, cyc[0]);
+     x[1] <= ~x[1];
+     y1 <= ~y1;
+     for (int i = 0; i < 8; ++i) z[1][i] <= ~z[1][i];
+     pair.b <= ~pair.b;
+     cyc = cyc + 1;
+     x[0] = cyc[0];
+     y0 = cyc[0];
+     for (int i = 0; i < 8; ++i) z[0][i] = cyc[0];
+     pair.a = cyc[0];
+     if (cyc == 99) begin
+       $display(x);
+       $write("*-* All Finished *-*\n");
+       $finish;
+     end
+  end
+
+endmodule
diff --git a/test_regress/t/t_nba_mixed_update_comb.py b/test_regress/t/t_nba_mixed_update_comb.py
new file mode 100755
index 000000000..b0c605c48
--- /dev/null
+++ b/test_regress/t/t_nba_mixed_update_comb.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt_all')
+
+test.compile(verilator_flags2=["--stats", "--unroll-count", "1"])
+
+test.execute()
+
+test.file_grep(test.stats, r'NBA, variables using ShadowVar scheme\s+(\d+)', 1)
+test.file_grep(test.stats, r'NBA, variables using ShadowVarMasked scheme\s+(\d+)', 2)
+test.file_grep(test.stats, r'NBA, variables using FlagUnique scheme\s+(\d+)', 1)
+test.file_grep(test.stats, r'Optimizations, Unrolled Loops\s+(\d+)', 0)
+test.file_grep(test.stats, r'Warnings, Suppressed BLKANDNBLK\s+(\d+)', 2)
+
+test.passes()
diff --git a/test_regress/t/t_nba_mixed_update_comb.v b/test_regress/t/t_nba_mixed_update_comb.v
new file mode 100644
index 000000000..aa91ac00e
--- /dev/null
+++ b/test_regress/t/t_nba_mixed_update_comb.v
@@ -0,0 +1,72 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define check(got ,exp) do if ((got) !== (exp)) begin $write("%%Error: %s:%0d: cyc=%0d got='h%x exp='h%x\n", `__FILE__,`__LINE__, cyc, (got), (exp)); `stop; end while(0)
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+  input clk;
+
+
+  reg [31:0] cyc = 0;
+  reg [31:0] sameAsCycButCantBeOptimized_0;
+  reg [31:0] sameAsCycButCantBeOptimized_1;
+  reg [31:0] sameAsCycButCantBeOptimized_2;
+
+  // 'x' has both blocking and non-blocking update, with the blocking
+  // update in **combinational** logic
+  reg [1:0] x = 2'b00;
+  // '{y1, y0}' should have exactly the same value as 'x', at all times
+  reg y0 = 1'b0;
+  reg y1 = 1'b0;
+  // 'z[0]' should equal '{8{x[0]}', 'z[1]' should equal '{8{x[1]}}'
+  // verilator lint_off BLKANDNBLK
+  reg [1:0][7:0] z;
+  // verilator lint_on BLKANDNBLK
+  // 'pair.a' should equal 'x[0]', 'pair.b' should equal 'x[1]'
+  // verilator lint_off BLKANDNBLK
+  struct {
+    logic a;
+    logic b;
+  } pair = '{a: 1'b0, b: 1'b0};
+  // verilator lint_on BLKANDNBLK
+
+  assign x[0] = cyc[0];
+  assign y0 = sameAsCycButCantBeOptimized_0[0];
+  always_comb begin
+     for (int i = 0; i < 8; ++i) z[0][i] = sameAsCycButCantBeOptimized_1[0];
+  end
+  assign pair.a = sameAsCycButCantBeOptimized_2[0];
+
+  always @(posedge clk) begin
+     $display("cyc = %d (%08x) x[1] = %0d, x[0] = %0d, y1 = %0d, y0 = %0d z[1] = %02x z[1] = %02x", cyc, cyc, x[1], x[0], y1, y0, z[1], z[0]);
+     `check(x[0], cyc[0]);
+     `check(x[1], cyc[0]);
+     `check(y0, cyc[0]);
+     `check(y1, cyc[0]);
+     `check(z[0], {8{cyc[0]}});
+     `check(z[1], {8{cyc[0]}});
+     `check(pair.a, cyc[0]);
+     `check(pair.b, cyc[0]);
+     x[1] <= ~x[1];
+     y1 <= ~y1;
+     for (int i = 0; i < 8; ++i) z[1][i] <= ~z[1][i];
+     pair.b <= ~pair.b;
+     cyc = cyc + 1;
+     sameAsCycButCantBeOptimized_0 = cyc;
+     sameAsCycButCantBeOptimized_1 = cyc;
+     sameAsCycButCantBeOptimized_2 = cyc;
+     if (cyc == 99) begin
+       $display(x);
+       $write("*-* All Finished *-*\n");
+       $finish;
+     end
+  end
+
+endmodule
diff --git a/test_regress/t/t_order_blkandnblk_bad.out b/test_regress/t/t_order_blkandnblk_bad.out
index 6c6d38ba8..64452a103 100644
--- a/test_regress/t/t_order_blkandnblk_bad.out
+++ b/test_regress/t/t_order_blkandnblk_bad.out
@@ -1,11 +1,30 @@
-%Error-BLKANDNBLK: t/t_order_blkandnblk_bad.v:18:21: Unsupported: Blocked and non-blocking assignments to same variable: 't.array'
+%Warning-MULTIDRIVEN: t/t_order_blkandnblk_bad.v:33:6: Variable also written to in always_comb (IEEE 1800-2023 9.2.2.2): 'unpacked'
+                                                     : ... note: In instance 't'
+                      t/t_order_blkandnblk_bad.v:33:6: 
+   33 |      unpacked.b <= unpacked.a;
+      |      ^~~~~~~~
+                      t/t_order_blkandnblk_bad.v:30:16: ... Location of always_comb write
+   30 |    always_comb unpacked.a = i;
+      |                ^~~~~~~~
+                      ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=latest
+                      ... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message.
+%Error-BLKANDNBLK: t/t_order_blkandnblk_bad.v:18:21: Unsupported: Blocking and non-blocking assignments to potentially overlapping bits of same packed variable: 't.array'
    18 |    logic [1:0][3:0] array;
       |                     ^~~~~
-                   t/t_order_blkandnblk_bad.v:20:25: ... Location of blocking assignment
+                   t/t_order_blkandnblk_bad.v:20:25: ... Location of blocking assignment (bits [3:0])
    20 |    always_comb array[0] = i;
       |                         ^
-                   t/t_order_blkandnblk_bad.v:23:15: ... Location of nonblocking assignment
-   23 |      array[1] <= array[0];
-      |               ^~
+                   t/t_order_blkandnblk_bad.v:23:6: ... Location of nonblocking assignment (bits [3:0])
+   23 |      array[0] <= array[0];
+      |      ^~~~~
                    ... For error description see https://verilator.org/warn/BLKANDNBLK?v=latest
+%Error-BLKANDNBLK: t/t_order_blkandnblk_bad.v:28:6: Unsupported: Blocking and non-blocking assignments to same non-packed variable: 't.unpacked'
+   28 |    } unpacked;
+      |      ^~~~~~~~
+                   t/t_order_blkandnblk_bad.v:30:16: ... Location of blocking assignment
+   30 |    always_comb unpacked.a = i;
+      |                ^~~~~~~~
+                   t/t_order_blkandnblk_bad.v:33:6: ... Location of nonblocking assignment
+   33 |      unpacked.b <= unpacked.a;
+      |      ^~~~~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_order_blkandnblk_bad.v b/test_regress/t/t_order_blkandnblk_bad.v
index 9955a06b9..32506aca1 100644
--- a/test_regress/t/t_order_blkandnblk_bad.v
+++ b/test_regress/t/t_order_blkandnblk_bad.v
@@ -20,8 +20,18 @@ module t (/*AUTOARG*/
    always_comb array[0] = i;
 
    always @ (posedge clk)
-     array[1] <= array[0];
+     array[0] <= array[0];
 
-   assign o = array[idx];
+   struct {
+     logic [3:0] a;
+     logic [3:0] b;
+   } unpacked;
+
+   always_comb unpacked.a = i;
+
+   always @ (posedge clk)
+     unpacked.b <= unpacked.a;
+
+   assign o = array[idx] + unpacked.a;
 
 endmodule
diff --git a/test_regress/t/t_order_clkinst.v b/test_regress/t/t_order_clkinst.v
index a54fa9397..2b0bf2509 100644
--- a/test_regress/t/t_order_clkinst.v
+++ b/test_regress/t/t_order_clkinst.v
@@ -14,7 +14,6 @@ module t (/*AUTOARG*/
    // verilator lint_off LATCH
    // verilator lint_off UNOPT
    // verilator lint_off UNOPTFLAT
-   // verilator lint_off BLKANDNBLK
    // verilator lint_off MULTIDRIVEN
 
    reg         c1_start; initial c1_start = 0;
diff --git a/test_regress/t/t_order_comboclkloop.v b/test_regress/t/t_order_comboclkloop.v
index 341024aea..52185ca0c 100644
--- a/test_regress/t/t_order_comboclkloop.v
+++ b/test_regress/t/t_order_comboclkloop.v
@@ -10,7 +10,6 @@ module t (/*AUTOARG*/
    );
    input clk;
 
-   // verilator lint_off BLKANDNBLK
    // verilator lint_off COMBDLY
    // verilator lint_off LATCH
    // verilator lint_off UNOPT
diff --git a/test_regress/t/t_param_if_blk.v b/test_regress/t/t_param_if_blk.v
index ad660b739..5bacd5eb4 100644
--- a/test_regress/t/t_param_if_blk.v
+++ b/test_regress/t/t_param_if_blk.v
@@ -92,9 +92,7 @@ module Test
    output logic [7:0] datao
    );
 
-   // verilator lint_off BLKANDNBLK
    logic [7:0]        datat;
-   // verilator lint_on BLKANDNBLK
 
    for (genvar i = 0; i < 8; i++) begin
       if (i%4 != 3) begin

From 93f447dd4af94bda9c29e72acad1cb9b422af685 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Jun 2025 17:12:03 -0400
Subject: [PATCH 182/211] Support constant functions with left-hand-side
 concatenates.

---
 Changes                       |   1 +
 src/V3Simulate.h              | 103 ++++++++++++++++++++++++----------
 test_regress/t/t_func_const.v |   9 +++
 3 files changed, 82 insertions(+), 31 deletions(-)

diff --git a/Changes b/Changes
index d7532cb9f..a3bf6a698 100644
--- a/Changes
+++ b/Changes
@@ -21,6 +21,7 @@ Verilator 5.037 devel
 * Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
 * Support `specparam` (#5767).
 * Support parameter forward types.
+* Support constant functions with left-hand-side concatenates.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
diff --git a/src/V3Simulate.h b/src/V3Simulate.h
index f92183ea8..106a83ca9 100644
--- a/src/V3Simulate.h
+++ b/src/V3Simulate.h
@@ -696,15 +696,14 @@ private:
         }
     }
 
-    void handleAssignArray(AstNodeAssign* nodep, AstArraySel* selp) {
-        iterateAndNextConstNull(nodep->rhsp());  // Value to assign
+    void handleAssignArray(AstNodeAssign* nodep, AstArraySel* selp, AstNodeExpr* valueFromp) {
         // At present we only handle single dimensional assignments
         // To do better, we need the concept of lvalues, or similar, to know where/how to insert
         checkNodeInfo(selp);
         iterateAndNextConstNull(selp->bitp());  // Bit index
         AstVarRef* const varrefp = VN_CAST(selp->fromp(), VarRef);
         if (!varrefp) {
-            clearOptimizable(nodep, "Array select LHS isn't simple variable");
+            clearOptimizable(selp->fromp(), "Array select LHS isn't simple variable");
             return;
         }
         AstUnpackArrayDType* const arrayp
@@ -736,7 +735,7 @@ private:
                 m_reclaimValuesp.push_back(initp);
             }
             const uint32_t index = fetchConst(selp->bitp())->toUInt();
-            AstNodeExpr* const valuep = newTrackedClone(fetchValue(nodep->rhsp()));
+            AstNodeExpr* const valuep = newTrackedClone(fetchValue(valueFromp));
             UINFO(9, "     set val[" << index << "] = " << valuep);
             // Values are in the "real" tree under the InitArray so can eventually extract it,
             // Not in the usual setValue (via m_varAux)
@@ -745,10 +744,9 @@ private:
             assignOutValue(nodep, vscp, initp);
         }
     }
-    void handleAssignSel(AstNodeAssign* nodep, AstSel* selp) {
+    void handleAssignSel(AstNodeAssign* nodep, AstSel* selp, AstNodeExpr* valueFromp) {
         AstVarRef* varrefp = nullptr;
         V3Number lsb{nodep};
-        iterateAndNextConstNull(nodep->rhsp());  // Value to assign
         handleAssignSelRecurse(nodep, selp, varrefp /*ref*/, lsb /*ref*/, 0);
         if (!m_checkOnly && optimizable()) {
             UASSERT_OBJ(varrefp, nodep,
@@ -768,7 +766,7 @@ private:
                     outconstp->num().setAllBitsX();
                 }
             }
-            outconstp->num().opSelInto(fetchConst(nodep->rhsp())->num(), lsb, selp->widthConst());
+            outconstp->num().opSelInto(fetchConst(valueFromp)->num(), lsb, selp->widthConst());
             assignOutValue(nodep, vscp, outconstp);
         }
     }
@@ -790,10 +788,73 @@ private:
                 lsbRef.opAdd(sublsb, fetchConst(selp->lsbp())->num());
             }
         } else {
-            clearOptimizable(nodep, "Select LHS isn't simple variable");
+            clearOptimizable(selp->fromp(), "Select LHS isn't simple variable");
+        }
+    }
+    void handleAssignRecurse(AstNodeAssign* nodep, AstNodeExpr* lhsp, AstNodeExpr* valueFromp) {
+        if (!optimizable()) return;
+        if (AstArraySel* const selp = VN_CAST(lhsp, ArraySel)) {
+            if (!m_params) {
+                clearOptimizable(lhsp, "Assign LHS has select");
+                return;
+            }
+            handleAssignArray(nodep, selp, valueFromp);
+        } else if (AstConcat* const selp = VN_CAST(lhsp, Concat)) {
+            checkNodeInfo(selp);
+            AstBasicDType* const rhsBasicp
+                = VN_CAST(selp->rhsp()->dtypep()->skipRefp(), BasicDType);
+            if (!rhsBasicp) {
+                clearOptimizable(lhsp, "Assign LHS concat of non-basic type");
+                return;
+            }
+            // Split value into left and right concat values
+            if (!m_checkOnly) {
+                {
+                    AstConst* const outconstp
+                        = new AstConst{selp->lhsp()->fileline(), AstConst::WidthedValue{},
+                                       selp->lhsp()->width(), 0};
+                    outconstp->num().opSel(fetchConst(valueFromp)->num(),
+                                           selp->lhsp()->width() + selp->rhsp()->width() + 1,
+                                           selp->rhsp()->width());
+                    newValue(selp->lhsp(), outconstp);
+                }
+                {
+                    AstConst* const outconstp
+                        = new AstConst{selp->rhsp()->fileline(), AstConst::WidthedValue{},
+                                       selp->rhsp()->widthMin(), 0};
+                    outconstp->num().opSel(fetchConst(valueFromp)->num(),
+                                           selp->rhsp()->width() - 1, 0);
+                    newValue(selp->rhsp(), outconstp);
+                }
+            }
+            handleAssignRecurse(nodep, selp->lhsp(), selp->lhsp());
+            handleAssignRecurse(nodep, selp->rhsp(), selp->rhsp());
+        } else if (AstReplicate* const selp = VN_CAST(lhsp, Replicate)) {
+            checkNodeInfo(selp);
+            iterateAndNextConstNull(selp->countp());
+            AstConst* const countp = VN_CAST(selp->countp(), Const);
+            if (!countp || !countp->num().isEqOne()) {
+                clearOptimizable(selp, "Replicate LHS count isn't one");
+                return;
+            }
+            handleAssignRecurse(nodep, selp->srcp(), valueFromp);
+        } else if (AstSel* const selp = VN_CAST(lhsp, Sel)) {
+            if (!m_params) {
+                clearOptimizable(lhsp, "Assign LHS has select");
+                return;
+            }
+            handleAssignSel(nodep, selp, valueFromp);
+        } else if (VN_IS(lhsp, VarRef)) {
+            if (m_checkOnly) {
+                iterateAndNextConstNull(lhsp);
+            } else {
+                AstNode* const vscp = varOrScope(VN_CAST(lhsp, VarRef));
+                assignOutValue(nodep, vscp, fetchValue(valueFromp));
+            }
+        } else {
+            clearOptimizable(lhsp, "Assign LHS isn't simple variable");
         }
     }
-
     void visit(AstNodeAssign* nodep) override {
         if (jumpingOver(nodep)) return;
         if (!optimizable()) return;  // Accelerate
@@ -812,28 +873,8 @@ private:
             m_anyAssignComb = true;
         }
 
-        if (AstSel* const selp = VN_CAST(nodep->lhsp(), Sel)) {
-            if (!m_params) {
-                clearOptimizable(nodep, "LHS has select");
-                return;
-            }
-            handleAssignSel(nodep, selp);
-        } else if (AstArraySel* const selp = VN_CAST(nodep->lhsp(), ArraySel)) {
-            if (!m_params) {
-                clearOptimizable(nodep, "LHS has select");
-                return;
-            }
-            handleAssignArray(nodep, selp);
-        } else if (!VN_IS(nodep->lhsp(), VarRef)) {
-            clearOptimizable(nodep, "LHS isn't simple variable");
-        } else if (m_checkOnly) {
-            iterateChildrenConst(nodep);
-        } else if (optimizable()) {
-            iterateAndNextConstNull(nodep->rhsp());
-            if (!optimizable()) return;
-            AstNode* const vscp = varOrScope(VN_CAST(nodep->lhsp(), VarRef));
-            assignOutValue(nodep, vscp, fetchValue(nodep->rhsp()));
-        }
+        iterateAndNextConstNull(nodep->rhsp());  // Value to assign
+        handleAssignRecurse(nodep, nodep->lhsp(), nodep->rhsp());
     }
     void visit(AstArraySel* nodep) override {
         checkNodeInfo(nodep);
diff --git a/test_regress/t/t_func_const.v b/test_regress/t/t_func_const.v
index 2d8487195..d1abd415e 100644
--- a/test_regress/t/t_func_const.v
+++ b/test_regress/t/t_func_const.v
@@ -19,6 +19,7 @@ module t;
    localparam P6 = f_return(P4);
    localparam P3 = 3;
    localparam P128 = f_package();
+   localparam [15:0] PSEL = f_concat_sel(16'h4321);
 
    typedef struct packed {
       logic [7:0] data;
@@ -50,6 +51,7 @@ module t;
       if (bigparam.second != 1'b0) $stop;
       if (bigparam.data != 32'hfff12fff) $stop;
       if (P128 != 128) $stop;
+      if (PSEL != 16'h1234) $stop;
       $write("*-* All Finished *-*\n");
       $finish;
    end
@@ -127,4 +129,11 @@ module t;
       result.second = second;
       return result;
    endfunction
+
+   function [15:0] f_concat_sel(input [15:0] in);
+      reg [3:0] tmp1, tmp2, tmp3, tmp4;
+      {tmp4, tmp3, tmp2, tmp1} = in;
+      f_concat_sel = {tmp1, tmp2, tmp3, tmp4};
+   endfunction
+
 endmodule

From 5d32fc56ac70b925e5cd2c0f4b142e7357e104ca Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sat, 28 Jun 2025 20:32:19 -0400
Subject: [PATCH 183/211] Support 'config' parsing, but not functionally

---
 src/V3AstNodeOther.h                          |  74 ++++++++-
 src/V3AstNodes.cpp                            |  16 ++
 src/V3LinkCells.cpp                           |  21 ++-
 src/V3SymTable.h                              |   5 +-
 src/verilog.l                                 |  14 +-
 src/verilog.y                                 | 141 +++++++++++++++++-
 test_regress/t/t_config_libmap.out            |   3 -
 test_regress/t/t_config_param.out             |  20 +++
 test_regress/t/t_config_param.py              |  21 +++
 test_regress/t/t_config_param.v               |  30 ++++
 test_regress/t/t_config_unsup.out             |  77 ++++++++++
 test_regress/t/t_config_unsup.py              |  16 ++
 test_regress/t/t_config_unsup.v               |  49 ++++++
 test_regress/t/t_lint_rsvd_bad.out            |  36 -----
 test_regress/t/t_lint_rsvd_bad.v              |  19 ---
 test_regress/t/t_mod_dot.py                   |  25 ++++
 test_regress/t/t_mod_dot.v                    |  12 ++
 test_regress/t/t_mod_dup_bad_lib.out          |  19 +++
 ..._lint_rsvd_bad.py => t_mod_dup_bad_lib.py} |   6 +-
 test_regress/t/t_mod_dup_bad_lib.v            |  18 +++
 20 files changed, 548 insertions(+), 74 deletions(-)
 create mode 100644 test_regress/t/t_config_param.out
 create mode 100755 test_regress/t/t_config_param.py
 create mode 100644 test_regress/t/t_config_param.v
 create mode 100644 test_regress/t/t_config_unsup.out
 create mode 100755 test_regress/t/t_config_unsup.py
 create mode 100644 test_regress/t/t_config_unsup.v
 delete mode 100644 test_regress/t/t_lint_rsvd_bad.out
 delete mode 100644 test_regress/t/t_lint_rsvd_bad.v
 create mode 100755 test_regress/t/t_mod_dot.py
 create mode 100644 test_regress/t/t_mod_dot.v
 create mode 100644 test_regress/t/t_mod_dup_bad_lib.out
 rename test_regress/t/{t_lint_rsvd_bad.py => t_mod_dup_bad_lib.py} (73%)
 create mode 100644 test_regress/t/t_mod_dup_bad_lib.v

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index d72ebcd9b..d55606b57 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -953,9 +953,9 @@ public:
     AstClocking(FileLine* fl, const std::string& name, AstSenItem* sensesp,
                 AstClockingItem* itemsp, bool isDefault, bool isGlobal)
         : ASTGEN_SUPER_Clocking(fl)
+        , m_name{name}
         , m_isDefault{isDefault}
         , m_isGlobal{isGlobal} {
-        m_name = name;
         this->sensesp(sensesp);
         addItemsp(itemsp);
     }
@@ -994,6 +994,78 @@ public:
     void outputp(AstClockingItem* outputp) { m_outputp = outputp; }
     bool maybePointedTo() const override VL_MT_SAFE { return true; }
 };
+class AstConfig final : public AstNode {
+    // Parents: NETLIST
+    // @astgen op1 := designp : List[AstConfigCell]
+    // @astgen op2 := itemsp : List[AstNode]
+    std::string m_name;  // Config block name
+
+public:
+    AstConfig(FileLine* fl, const std::string& name, AstNode* itemsp)
+        : ASTGEN_SUPER_Config(fl)
+        , m_name{name} {
+        addItemsp(itemsp);
+    }
+    ASTGEN_MEMBERS_AstConfig;
+    std::string name() const override VL_MT_STABLE { return m_name; }
+};
+class AstConfigCell final : public AstNode {
+    // Parents: CONFIGRULE
+    std::string m_libname;  // Cell library, or ""
+    std::string m_cellname;  // Cell name within library
+
+public:
+    AstConfigCell(FileLine* fl, const std::string& libname, const std::string& cellname)
+        : ASTGEN_SUPER_ConfigCell(fl)
+        , m_libname{libname}
+        , m_cellname{cellname} {}
+    ASTGEN_MEMBERS_AstConfigCell;
+    std::string name() const override VL_MT_STABLE { return m_libname + "." + m_cellname; }
+    std::string libname() const VL_MT_STABLE { return m_libname; }
+    std::string cellname() const VL_MT_STABLE { return m_cellname; }
+};
+class AstConfigRule final : public AstNode {
+    // Parents: CONFIG
+    // @astgen op1 := cellp : Optional[AstNode]  // Cells to apply to, or nullptr=default
+    // @astgen op2 := usep : List[AstNode]  // Use or design to apply
+    const bool m_isCell;  // Declared as "cell" versus "instance"
+
+public:
+    AstConfigRule(FileLine* fl, AstNode* cellp, AstNode* usep, bool isCell)
+        : ASTGEN_SUPER_ConfigRule(fl)
+        , m_isCell{isCell} {
+        this->cellp(cellp);
+        addUsep(usep);
+    }
+    ASTGEN_MEMBERS_AstConfigRule;
+    bool isCell() const VL_MT_STABLE { return m_isCell; }
+    void dump(std::ostream& str) const override;
+    void dumpJson(std::ostream& str) const override;
+};
+class AstConfigUse final : public AstNode {
+    // Parents: CONFIGRULE
+    // @astgen op1 := paramsp : List[AstPin]
+    std::string m_libname;  // Use library, or ""
+    std::string m_cellname;  // Use name within library
+    const bool m_isConfig;  // ":config"; Config, not module/primitive name
+
+public:
+    AstConfigUse(FileLine* fl, const std::string& libname, const std::string& cellname,
+                 AstPin* paramsp, bool isConfig)
+        : ASTGEN_SUPER_ConfigUse(fl)
+        , m_libname{libname}
+        , m_cellname{cellname}
+        , m_isConfig{isConfig} {
+        addParamsp(paramsp);
+    }
+    ASTGEN_MEMBERS_AstConfigUse;
+    std::string name() const override VL_MT_STABLE { return m_libname + "." + m_cellname; }
+    std::string libname() const VL_MT_STABLE { return m_libname; }
+    std::string cellname() const VL_MT_STABLE { return m_cellname; }
+    bool isConfig() const VL_MT_STABLE { return m_isConfig; }
+    void dump(std::ostream& str) const override;
+    void dumpJson(std::ostream& str) const override;
+};
 class AstConstPool final : public AstNode {
     // Container for const static data
     // @astgen op1 := modulep : AstModule // m_modp below TODO: fix this mess
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index c94976487..aabf0d51f 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1806,6 +1806,22 @@ void AstClocking::dumpJson(std::ostream& str) const {
     dumpJsonBoolFunc(str, isGlobal);
     dumpJsonGen(str);
 }
+void AstConfigRule::dump(std::ostream& str) const {
+    this->AstNode::dump(str);
+    if (isCell()) str << " [CELL]";
+}
+void AstConfigRule::dumpJson(std::ostream& str) const {
+    dumpJsonBoolFunc(str, isCell);
+    dumpJsonGen(str);
+}
+void AstConfigUse::dump(std::ostream& str) const {
+    this->AstNode::dump(str);
+    if (isConfig()) str << " [CONFIG]";
+}
+void AstConfigUse::dumpJson(std::ostream& str) const {
+    dumpJsonBoolFunc(str, isConfig);
+    dumpJsonGen(str);
+}
 void AstDisplay::dump(std::ostream& str) const {
     this->AstNodeStmt::dump(str);
     str << " [" << displayType().ascii() << "]";
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 30c87c470..1c464b8d1 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -562,6 +562,23 @@ class LinkCellsVisitor final : public VNVisitor {
         iterateAndNextNull(nodep->attrsp());
     }
 
+    void visit(AstConfig* nodep) override {
+        nodep->v3warn(E_UNSUPPORTED, "Unsupported: config");
+        iterateChildren(nodep);
+    }
+    void visit(AstConfigCell* nodep) override {
+        nodep->v3warn(E_UNSUPPORTED, "Unsupported: config cell");
+        iterateChildren(nodep);
+    }
+    void visit(AstConfigRule* nodep) override {
+        nodep->v3warn(E_UNSUPPORTED, "Unsupported: config rule");
+        iterateChildren(nodep);
+    }
+    void visit(AstConfigUse* nodep) override {
+        nodep->v3warn(E_UNSUPPORTED, "Unsupported: config use");
+        iterateChildren(nodep);
+    }
+
     void visit(AstNode* nodep) override { iterateChildren(nodep); }
 
     // METHODS
@@ -623,7 +640,9 @@ public:
         }
         iterate(nodep);
     }
-    ~LinkCellsVisitor() override = default;
+    ~LinkCellsVisitor() override {
+        if (debug() >= 5 || dumpGraphLevel() >= 5) { m_mods.dumpFilePrefixed("linkcells"); }
+    }
 };
 
 //######################################################################
diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index a65b55b58..09d2460ce 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -117,7 +117,7 @@ public:
     void exported(bool flag) { m_exported = flag; }
     bool imported() const { return m_imported; }
     void imported(bool flag) { m_imported = flag; }
-    void insert(const string& name, VSymEnt* entp) {
+    VSymEnt* insert(const string& name, VSymEnt* entp) {
         UINFO(9, "     SymInsert se" << cvtToHex(this) << " '" << name << "' se" << cvtToHex(entp)
                                      << "  " << entp->nodep());
         if (name != "" && m_idNameMap.find(name) != m_idNameMap.end()) {
@@ -130,6 +130,7 @@ public:
         } else {
             m_idNameMap.emplace(name, entp);
         }
+        return entp;
     }
     void reinsert(const string& name, VSymEnt* entp) {
         const auto it = m_idNameMap.find(name);
@@ -150,7 +151,7 @@ public:
                      << (it == m_idNameMap.end() ? "NONE"
                                                  : "se" + cvtToHex(it->second)
                                                        + " n=" + cvtToHex(it->second->nodep())));
-        if (it != m_idNameMap.end()) return (it->second);
+        if (it != m_idNameMap.end()) return it->second;
         return nullptr;
     }
     VSymEnt* findIdFallback(const string& name) const {
diff --git a/src/verilog.l b/src/verilog.l
index 69ecd8d7a..c22bf9987 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -441,19 +441,19 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   /* Verilog 2001 Config */
 <V01C,V05,VA5,S05,S09,S12,S17,S23,SAX>{
   /*     Generic unsupported keywords */
-  "cell"                { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "config"              { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "design"              { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "endconfig"           { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "cell"                { FL; return yCELL; }
+  "config"              { FL; return yCONFIG; }
+  "design"              { FL; return yDESIGN; }
+  "endconfig"           { FL; return yENDCONFIG; }
   "incdir"              { FL; ERROR_RSVD_WORD("Verilog 2001-config lib.map"); }
   "include"             { FL; yylval.fl->v3warn(E_UNSUPPORTED, "Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'\n"
                                                 << yylval.fl->warnMore() << "... Suggest unless in a lib.map file,"
                                                 " want `include instead");
                           FL_BRK; }
-  "instance"            { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
-  "liblist"             { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "instance"            { FL; return yINSTANCE; }
+  "liblist"             { FL; return yLIBLIST; }
   "library"             { FL; ERROR_RSVD_WORD("Verilog 2001-config lib.map"); }
-  "use"                 { FL; ERROR_RSVD_WORD("Verilog 2001-config"); }
+  "use"                 { FL; return yUSE; }
 }
 
   /* Verilog 2005 */
diff --git a/src/verilog.y b/src/verilog.y
index ccbb6c084..d627010ca 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -575,11 +575,13 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yCASE           "case"
 %token<fl>              yCASEX          "casex"
 %token<fl>              yCASEZ          "casez"
+%token<fl>              yCELL           "cell"
 %token<fl>              yCHANDLE        "chandle"
 %token<fl>              yCHECKER        "checker"
 %token<fl>              yCLASS          "class"
 %token<fl>              yCLOCKING       "clocking"
 %token<fl>              yCMOS           "cmos"
+%token<fl>              yCONFIG         "config"
 %token<fl>              yCONSTRAINT     "constraint"
 %token<fl>              yCONST__ETC     "const"
 %token<fl>              yCONST__LEX     "const-in-lex"
@@ -593,6 +595,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yDEASSIGN       "deassign"
 %token<fl>              yDEFAULT        "default"
 %token<fl>              yDEFPARAM       "defparam"
+%token<fl>              yDESIGN         "design"
 %token<fl>              yDISABLE        "disable"
 %token<fl>              yDIST           "dist"
 %token<fl>              yDO             "do"
@@ -603,6 +606,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yENDCHECKER     "endchecker"
 %token<fl>              yENDCLASS       "endclass"
 %token<fl>              yENDCLOCKING    "endclocking"
+%token<fl>              yENDCONFIG      "endconfig"
 %token<fl>              yENDFUNCTION    "endfunction"
 %token<fl>              yENDGENERATE    "endgenerate"
 %token<fl>              yENDGROUP       "endgroup"
@@ -650,6 +654,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yINOUT          "inout"
 %token<fl>              yINPUT          "input"
 %token<fl>              yINSIDE         "inside"
+%token<fl>              yINSTANCE       "instance"
 %token<fl>              yINT            "int"
 %token<fl>              yINTEGER        "integer"
 %token<fl>              yINTERCONNECT   "interconnect"
@@ -659,6 +664,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yJOIN_ANY       "join_any"
 %token<fl>              yJOIN_NONE      "join_none"
 %token<fl>              yLET            "let"
+%token<fl>              yLIBLIST        "liblist"
 %token<fl>              yLOCALPARAM     "localparam"
 %token<fl>              yLOCAL__COLONCOLON "local-then-::"
 %token<fl>              yLOCAL__ETC     "local"
@@ -774,6 +780,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yUNTIL          "until"
 %token<fl>              yUNTIL_WITH     "until_with"
 %token<fl>              yUNTYPED        "untyped"
+%token<fl>              yUSE            "use"
 %token<fl>              yVAR            "var"
 %token<fl>              yVECTORED       "vectored"
 %token<fl>              yVIRTUAL__CLASS "virtual-then-class"
@@ -1212,7 +1219,7 @@ description:                    // ==IEEE: description
         |       package_declaration                     { }
         |       package_itemTop                         { if ($1) PARSEP->unitPackage($1->fileline())->addStmtsp($1); }
         |       bind_directive                          { if ($1) PARSEP->unitPackage($1->fileline())->addStmtsp($1); }
-        //UNSUP config_declaration                      { }
+        |       config_declaration                      { }
         //                      // Verilator only
         |       yaT_RESETALL                            { }  // Else, under design, and illegal based on IEEE 22.3
         |       yaT_NOUNCONNECTED                       { PARSEP->unconnectedDrive(VOptionBool::OPT_DEFAULT_FALSE); }
@@ -7720,8 +7727,140 @@ colon<fl>:                      // Generic colon that isn't making a label (e.g.
 //**********************************************************************
 // Config - config...endconfig
 
+config_declaration:  // == IEEE: config_declaration
+                yCONFIG idAny/*config_identifier*/ ';'
+        /*cont*/    configParameterListE design_statement config_rule_statementListE
+        /*cont*/    yENDCONFIG endLabelE
+                { AstConfig* const newp = new AstConfig{$1, *$2, $4};
+                  newp->addItemsp($5);
+                  newp->addItemsp($6);
+                  GRAMMARP->endLabel($<fl>7, *$2, $8);
+                  PARSEP->rootp()->addMiscsp(newp); }
+        ;
+
+configParameterListE<nodep>:  // IEEE: { local_parameter_declaration ';' }
+                /* empty */                             { $$ = nullptr; }
+        |       configParameterList                     { $$ = $1; }
+        ;
+
+configParameterList<nodep>:  // IEEE: part of config_declaration
+                configParameter                         { $$ = nullptr; }
+        |       configParameterList configParameter     { $$ = addNextNull($1, $2); }
+        ;
+
+configParameter<nodep>:  // IEEE: part of config_declaration
+                parameter_declaration ';'
+                        { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: config localparam declaration"); }
+        ;
+
+design_statement<nodep>:  // == IEEE: design_statement
+                yDESIGN configCellList ';'              { $$ = $2; }
+        ;
+
+configCellList<configCellp>:  // IEEE: part of design_statement
+                configCell                              { $$ = $1; }
+        |       configCellList configCell               { $$ = addNextNull($1, $2); }
+        ;
+
+configCell<configCellp>:  // IEEE: part of design_statement, part of cell_clause
+                idAny/*cell_identifier*/
+                        { $$ = new AstConfigCell{$<fl>1, "", *$1}; }
+        |       idAny/*library_identifier*/ '.' idAny/*cell_identifier*/
+                        { $$ = new AstConfigCell{$<fl>1, *$1, *$3}; }
+        ;
+
+config_rule_statementListE<nodep>:  // IEEE: { config_rule }
+                /* empty */                             { $$ = nullptr; }
+        |       config_rule_statementList               { $$ = $1; }
+        ;
+
+config_rule_statementList<nodep>:  // IEEE: { config_rule }
+                config_rule_statement                   { $$ = $1; }
+        |       config_rule_statementList config_rule_statement   { $$ = addNextNull($1, $2); }
+        ;
+
+config_rule_statement<nodep>:  // == IEEE: config_rule_statement
+        //                      // IEEE: default_clause
+                yDEFAULT liblist_clause ';'
+                        { $$ = new AstConfigRule{$1, nullptr, $2, false}; }
+        //                      // IEEE: inst_clause
+        |       yINSTANCE inst_name liblist_clause ';'
+                        { $$ = new AstConfigRule{$1, $2, $3, false}; }
+        |       yINSTANCE inst_name use_clause ';'
+                        { $$ = new AstConfigRule{$1, $2, $3, false}; }
+        //                      // IEEE: cell_clause
+        |       yCELL configCell liblist_clause ';'
+                        { $$ = new AstConfigRule{$1, $2, $3, true}; }
+        |       yCELL configCell use_clause ';'
+                        { $$ = new AstConfigRule{$1, $2, $3, true}; }
+        |       error ';'
+                        { $$ = nullptr; }
+        ;
+
+inst_name<nodeExprp>:  // == IEEE: inst_name
+                idAnyAsParseRef/*topmodule_identifier*/
+                        { $$ = $1; }
+        |       idAnyAsParseRef/*topmodule_identifier*/ inst_nameInstanceList
+                        { $$ = new AstDot{$<fl>1, false, $1, $2}; }
+        ;
+
+inst_nameInstanceList<nodeExprp>:  // IEEE: part of inst_name
+                '.' idAnyAsParseRef/*instance_identifier*/
+                        { $$ = $2; }
+        |       inst_nameInstanceList '.' idAnyAsParseRef/*instance_identifier*/
+                        { $$ = new AstDot{$<fl>2, false, $1, $3}; }
+        ;
+
+liblist_clause<nodep>:  // == IEEE: liblist_clause
+                yLIBLIST                                { $$ = nullptr; }
+        |       yLIBLIST liblistLibraryList             { $$ = $2; }
+        ;
+
+liblistLibraryList<nodeExprp>:  // IEEE: part of liblist_clause
+                idAnyAsParseRef/*library_identifier*/
+                        { $$ = $1; }
+        |       liblistLibraryList idAnyAsParseRef/*library_identifier*/
+                        { $$ = addNextNull($1, $2); }
+        ;
+
+use_clause<nodep>:  // == IEEE: use_clause
+                yUSE idAny/*cell_identifier*/ useAssignmentListE colonConfigE
+                        { $$ = new AstConfigUse{$1, "", *$2, $3, $4}; }
+        |       yUSE idAny/*library_identifier*/ '.' idAny/*cell_identifier*/ useAssignmentListE colonConfigE
+                        { $$ = new AstConfigUse{$1, *$2, *$4, $5, $6}; }
+        |       yUSE useAssignmentListE colonConfigE
+                        { $$ = new AstConfigUse{$1, "", "", $2, $3}; }
+        ;
+
+useAssignmentListE<pinp>:  // IEEE: part of use clause
+                /* empty */                             { $$ = nullptr; }
+        //                      // IEEE is missing the '#' '(', but examples need it
+        |       '#' '(' ')'                             { $$ = nullptr; }
+        |       '#' '(' useAssignmentList ')'           { $$ = $3; }
+        ;
+
+useAssignmentList<pinp>:  // IEEE: part of use_clause
+                useAssignment                           { $$ = $1; }
+        |       useAssignmentList ',' useAssignment     { $$ = addNextNull($1, $3); }
+        ;
+
+useAssignment<pinp>:  // IEEE: part of use_clause
+        //                      // IEEE: named_parameter_assignment
+                '.' idAny/*parameter_identifier*/ '(' ')'
+                        { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: 'config use' parameter assignment"); }
+        |       '.' idAny/*parameter_identifier*/ '(' exprOrDataType ')'
+                        { $$ = nullptr; BBUNSUP($<fl>1, "Unsupported: 'config use' parameter assignment"); }
+        ;
+
+colonConfigE<cbool>:  // IEEE: [ ':' yCONFIG]
+                /* empty */                             { $$ = false; }
+        |       ':' yCONFIG                             { $$ = true; }
+        ;
+
 //**********************************************************************
 // Config - lib.map
+//
+// TODO when implement this support, add -libmap option which takes multiple files.
 
 //UNSUP library_text:  // == IEEE: library_text (note is top-level entry point)
 //UNSUP         library_description                     { }
diff --git a/test_regress/t/t_config_libmap.out b/test_regress/t/t_config_libmap.out
index 0415f7ac2..56ad3db45 100644
--- a/test_regress/t/t_config_libmap.out
+++ b/test_regress/t/t_config_libmap.out
@@ -26,7 +26,4 @@
 %Error-UNSUPPORTED: t/t_config_libmap.map:17:1: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
    17 | library gatelib .
       | ^~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_config_libmap.map:20:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
-%Error-UNSUPPORTED: t/t_config_libmap.map:21:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
-%Error-UNSUPPORTED: t/t_config_libmap.map:22:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
 %Error: Exiting due to
diff --git a/test_regress/t/t_config_param.out b/test_regress/t/t_config_param.out
new file mode 100644
index 000000000..8c756c7aa
--- /dev/null
+++ b/test_regress/t/t_config_param.out
@@ -0,0 +1,20 @@
+%Error-UNSUPPORTED: t/t_config_param.v:24:4: Unsupported: config localparam declaration
+   24 |    localparam P1 = "cfg.p1";
+      |    ^~~~~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_config_param.v:25:4: Unsupported: config localparam declaration
+   25 |    localparam P2 = "cfg.p2";
+      |    ^~~~~~~~~~
+%Error-UNSUPPORTED: t/t_config_param.v:27:26: Unsupported: 'config use' parameter assignment
+   27 |    instance t.u_1a use #(.P1(), .P2("override.u_a.p2"));
+      |                          ^
+%Error-UNSUPPORTED: t/t_config_param.v:27:33: Unsupported: 'config use' parameter assignment
+   27 |    instance t.u_1a use #(.P1(), .P2("override.u_a.p2"));
+      |                                 ^
+%Error-UNSUPPORTED: t/t_config_param.v:29:26: Unsupported: 'config use' parameter assignment
+   29 |    instance t.u_1c use #(.P1(P1), .P2(P2));
+      |                          ^
+%Error-UNSUPPORTED: t/t_config_param.v:29:35: Unsupported: 'config use' parameter assignment
+   29 |    instance t.u_1c use #(.P1(P1), .P2(P2));
+      |                                   ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_config_param.py b/test_regress/t/t_config_param.py
new file mode 100755
index 000000000..60b7d73ba
--- /dev/null
+++ b/test_regress/t/t_config_param.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(verilator_flags2=["--lint-only"],
+          fails=test.vlt_all,
+          expect_filename=test.golden_filename)
+
+# Sort so that 'initial' scheduling order is not relevant
+# test.files_identical_sorted(test.run_log_filename, test.golden_filename, is_logfile=True)
+
+test.passes()
diff --git a/test_regress/t/t_config_param.v b/test_regress/t/t_config_param.v
new file mode 100644
index 000000000..c0dc43af9
--- /dev/null
+++ b/test_regress/t/t_config_param.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module m1;
+   parameter string P1 = "p1.unchanged";
+   parameter string P2 = "p2.unchanged";
+   initial $display("m1 %%m=%m %%l=%l P1=%s P2=%s", P1, P2);
+endmodule
+
+module t;
+
+   m1 u_1a();
+   m1 u_1b();
+   m1 u_1c();
+
+   final $write("*-* All Finished *-*\n");
+
+endmodule
+
+config cfg1;
+   localparam P1 = "cfg.p1";
+   localparam P2 = "cfg.p2";
+   design t;
+   instance t.u_1a use #(.P1(), .P2("override.u_a.p2"));
+   instance t.u_1b use #();  // All parameters back to default
+   instance t.u_1c use #(.P1(P1), .P2(P2));
+endconfig
diff --git a/test_regress/t/t_config_unsup.out b/test_regress/t/t_config_unsup.out
new file mode 100644
index 000000000..988eca8a9
--- /dev/null
+++ b/test_regress/t/t_config_unsup.out
@@ -0,0 +1,77 @@
+%Error-UNSUPPORTED: t/t_config_unsup.v:24:1: Unsupported: config
+   24 | config cfg;
+      | ^~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_config_unsup.v:25:11: Unsupported: config cell
+   25 |    design t;
+      |           ^
+%Error-UNSUPPORTED: t/t_config_unsup.v:28:4: Unsupported: config rule
+   28 |    default liblist;   
+      |    ^~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:29:4: Unsupported: config rule
+   29 |    default liblist liba libb;
+      |    ^~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:32:4: Unsupported: config rule
+   32 |    instance t.m20 liblist;   
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:33:4: Unsupported: config rule
+   33 |    instance t.m21 liblist libc;
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:34:4: Unsupported: config rule
+   34 |    instance t.m22 liblist libc libd;   
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:35:4: Unsupported: config rule
+   35 |    instance t.m23 liblist libc libd;   
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:36:4: Unsupported: config rule
+   36 |    instance t.m24 liblist libc libd;   
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:39:4: Unsupported: config rule
+   39 |    instance t.m30 use cell_identifier;
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:39:19: Unsupported: config use
+   39 |    instance t.m30 use cell_identifier;
+      |                   ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:40:4: Unsupported: config rule
+   40 |    instance t.m31 use lib_id.cell_id;
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:40:19: Unsupported: config use
+   40 |    instance t.m31 use lib_id.cell_id;
+      |                   ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:41:4: Unsupported: config rule
+   41 |    instance t.m32 use #();
+      |    ^~~~~~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:41:19: Unsupported: config use
+   41 |    instance t.m32 use #();
+      |                   ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:44:4: Unsupported: config rule
+   44 |    cell m40 liblist libc libd;
+      |    ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:44:9: Unsupported: config cell
+   44 |    cell m40 liblist libc libd;
+      |         ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:45:4: Unsupported: config rule
+   45 |    cell work.m41 liblist libc libd;
+      |    ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:45:9: Unsupported: config cell
+   45 |    cell work.m41 liblist libc libd;
+      |         ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:46:4: Unsupported: config rule
+   46 |    cell m42 use m42alt;
+      |    ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:46:9: Unsupported: config cell
+   46 |    cell m42 use m42alt;
+      |         ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:46:13: Unsupported: config use
+   46 |    cell m42 use m42alt;
+      |             ^~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:47:4: Unsupported: config rule
+   47 |    cell work.m43 use work.m43alt;
+      |    ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:47:9: Unsupported: config cell
+   47 |    cell work.m43 use work.m43alt;
+      |         ^~~~
+%Error-UNSUPPORTED: t/t_config_unsup.v:47:18: Unsupported: config use
+   47 |    cell work.m43 use work.m43alt;
+      |                  ^~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_config_unsup.py b/test_regress/t/t_config_unsup.py
new file mode 100755
index 000000000..e30916148
--- /dev/null
+++ b/test_regress/t/t_config_unsup.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=test.vlt_all, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_config_unsup.v b/test_regress/t/t_config_unsup.v
new file mode 100644
index 000000000..3e047e50a
--- /dev/null
+++ b/test_regress/t/t_config_unsup.v
@@ -0,0 +1,49 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   m10 u_10();
+   m20 u_20();
+   m21 u_21();
+   m22 u_22();
+   m23 u_23();
+   m24 u_24();
+   m30 u_30();
+   m31 u_31();
+   m32 u_32();
+   m40 u_40();
+   m41 u_41();
+   m42 u_42();
+   m43 u_43();
+   final $write("*-* All Finished *-*\n");
+endmodule
+
+config cfg;
+   design t;
+
+   // Test uses m10
+   default liblist;  // Ignored
+   default liblist liba libb;
+
+   // Test uses m20-29
+   instance t.m20 liblist;  // Use parent's cell library
+   instance t.m21 liblist libc;
+   instance t.m22 liblist libc libd;  // m22 in libc
+   instance t.m23 liblist libc libd;  // m23 in libd
+   instance t.m24 liblist libc libd;  // m24 in default (libb)
+
+   // Test uses m30-39
+   instance t.m30 use cell_identifier;
+   instance t.m31 use lib_id.cell_id;
+   instance t.m32 use #();
+
+   // Test uses m40-49
+   cell m40 liblist libc libd;
+   cell work.m41 liblist libc libd;
+   cell m42 use m42alt;
+   cell work.m43 use work.m43alt;
+
+endconfig
diff --git a/test_regress/t/t_lint_rsvd_bad.out b/test_regress/t/t_lint_rsvd_bad.out
deleted file mode 100644
index c98cecae5..000000000
--- a/test_regress/t/t_lint_rsvd_bad.out
+++ /dev/null
@@ -1,36 +0,0 @@
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config'
-    7 | config cfgBad;
-      | ^~~~~~~~~~~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
-%Error: t/t_lint_rsvd_bad.v:7:14: syntax error, unexpected IDENTIFIER
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:8:4: Unsupported: Verilog 2001-config reserved word not implemented: 'design'
-    8 |    design rtlLib.top;
-      |    ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:9:12: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
-    9 |    default liblist rtlLib;
-      |            ^~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:4: Unsupported: Verilog 2001-config reserved word not implemented: 'instance'
-   10 |    instance top.a2 liblist gateLib;
-      |    ^~~~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:10:28: Unsupported: Verilog 2001-config reserved word not implemented: 'liblist'
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:11:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
-                                            : ... Suggest unless in a lib.map file, want `include instead
-   11 |    include none;
-      |    ^~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:12:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'library'
-   12 |    library rtlLib *.v;
-      |    ^~~~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:13:4: Unsupported: Verilog 2001-config lib.map reserved word not implemented: 'include'
-                                            : ... Suggest unless in a lib.map file, want `include instead
-   13 |    include aa;
-      |    ^~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:14:4: Unsupported: Verilog 2001-config reserved word not implemented: 'use'
-   14 |    use gateLib;
-      |    ^~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:4: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
-   15 |    cell rtlLib.cell;
-      |    ^~~~~~~~
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:15:20: Unsupported: Verilog 2001-config reserved word not implemented: 'cell'
-%Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:16:1: Unsupported: Verilog 2001-config reserved word not implemented: 'endconfig'
-%Error: Exiting due to
diff --git a/test_regress/t/t_lint_rsvd_bad.v b/test_regress/t/t_lint_rsvd_bad.v
deleted file mode 100644
index aaef81658..000000000
--- a/test_regress/t/t_lint_rsvd_bad.v
+++ /dev/null
@@ -1,19 +0,0 @@
-// DESCRIPTION: Verilator: Verilog Test module
-//
-// This file ONLY is placed under the Creative Commons Public Domain, for
-// any use, without warranty, 2019 by Wilson Snyder.
-// SPDX-License-Identifier: CC0-1.0
-
-config cfgBad;
-   design rtlLib.top;
-   default liblist rtlLib;
-   instance top.a2 liblist gateLib;
-   include none;
-   library rtlLib *.v;
-   include aa;
-   use gateLib;
-   cell rtlLib.cell;
-endconfig
-
-module t;
-endmodule
diff --git a/test_regress/t/t_mod_dot.py b/test_regress/t/t_mod_dot.py
new file mode 100755
index 000000000..463f66f1f
--- /dev/null
+++ b/test_regress/t/t_mod_dot.py
@@ -0,0 +1,25 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+# This doesn't use the general compile rule as we want to make sure we form
+# prefix properly using post-escaped identifiers
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator",
+    "--cc",
+    "--Mdir " + test.obj_dir + "/t_mod_dot",
+    "--exe --build --main",
+    't/t_mod_dot.v',
+],
+         verilator_run=True)
+
+test.passes()
diff --git a/test_regress/t/t_mod_dot.v b/test_regress/t/t_mod_dot.v
new file mode 100644
index 000000000..c86095ba0
--- /dev/null
+++ b/test_regress/t/t_mod_dot.v
@@ -0,0 +1,12 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2020 by engr248.
+// SPDX-License-Identifier: CC0-1.0
+
+module \foo.bar (/*AUTOARG*/);
+   initial begin
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule
diff --git a/test_regress/t/t_mod_dup_bad_lib.out b/test_regress/t/t_mod_dup_bad_lib.out
new file mode 100644
index 000000000..cc0bdb504
--- /dev/null
+++ b/test_regress/t/t_mod_dup_bad_lib.out
@@ -0,0 +1,19 @@
+%Warning-MODDUP: t/t_mod_dup_bad_lib.v:14:8: Duplicate declaration of module: 'a'
+   14 | module a();
+      |        ^
+                 t/t_mod_dup_bad_lib.v:7:8: ... Location of original declaration
+    7 | module a();
+      |        ^
+                 ... For warning description see https://verilator.org/warn/MODDUP?v=latest
+                 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message.
+%Warning-MULTITOP: t/t_mod_dup_bad_lib.v:17:8: Multiple top level modules
+                                             : ... Suggest see manual; fix the duplicates, or use --top-module to select top.
+                   ... For warning description see https://verilator.org/warn/MULTITOP?v=latest
+                   ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message.
+                                             : ... Top module 'test'
+   10 | module test();
+      |        ^~~~
+                                             : ... Top module 'b'
+   17 | module b();
+      |        ^
+%Error: Exiting due to
diff --git a/test_regress/t/t_lint_rsvd_bad.py b/test_regress/t/t_mod_dup_bad_lib.py
similarity index 73%
rename from test_regress/t/t_lint_rsvd_bad.py
rename to test_regress/t/t_mod_dup_bad_lib.py
index acbdae169..a19988f61 100755
--- a/test_regress/t/t_lint_rsvd_bad.py
+++ b/test_regress/t/t_mod_dup_bad_lib.py
@@ -9,10 +9,8 @@
 
 import vltest_bootstrap
 
-test.scenarios('linter')
+test.scenarios('vlt')
 
-test.lint(verilator_flags2=["--lint-only -Wwarn-REALCVT"],
-          fails=True,
-          expect_filename=test.golden_filename)
+test.lint(verilator_flag2=["--work liba"], fails=True, expect_filename=test.golden_filename)
 
 test.passes()
diff --git a/test_regress/t/t_mod_dup_bad_lib.v b/test_regress/t/t_mod_dup_bad_lib.v
new file mode 100644
index 000000000..ad2b678af
--- /dev/null
+++ b/test_regress/t/t_mod_dup_bad_lib.v
@@ -0,0 +1,18 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2008 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module a();
+endmodule
+
+module test();
+   a a();
+endmodule
+
+module a();
+endmodule
+
+module b();
+endmodule

From c3d86626ee15fe057c429f1a590b7a79e35cd349 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Sun, 29 Jun 2025 14:56:44 +0100
Subject: [PATCH 184/211] Internals: Remove unused AstNodeModule 'activesp'
 child (#6138)

---
 src/V3AstNodeOther.h                          |  1 -
 test_regress/t/t_constraint_json_only.out     |  8 ++---
 test_regress/t/t_dump_json.out                |  6 ++--
 test_regress/t/t_json_only_begin_hier.out     |  8 ++---
 test_regress/t/t_json_only_debugcheck.out     |  6 ++--
 test_regress/t/t_json_only_first.out          |  8 ++---
 test_regress/t/t_json_only_flat.out           |  4 +--
 .../t/t_json_only_flat_no_inline_mod.out      |  4 +--
 test_regress/t/t_json_only_flat_pub_mod.out   |  4 +--
 test_regress/t/t_json_only_flat_vlvbound.out  |  4 +--
 test_regress/t/t_json_only_output.out         |  4 +--
 test_regress/t/t_json_only_tag.out            |  6 ++--
 test_regress/t/t_var_port_json_only.out       | 32 +++++++++----------
 13 files changed, 47 insertions(+), 48 deletions(-)

diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index d55606b57..694b5057e 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -222,7 +222,6 @@ class AstNodeModule VL_NOT_FINAL : public AstNode {
     // excluding $unit package stuff
     // @astgen op1 := inlinesp : List[AstNode]
     // @astgen op2 := stmtsp : List[AstNode]
-    // @astgen op3 := activesp : List[AstActive]
     string m_name;  // Name of the module
     const string m_origName;  // Name of the module, ignoring name() changes, for dot lookup
     string m_someInstanceName;  // Hierarchical name of some arbitrary instance of this module.
diff --git a/test_regress/t/t_constraint_json_only.out b/test_regress/t/t_constraint_json_only.out
index 2c356ebbd..0217c68b2 100644
--- a/test_regress/t/t_constraint_json_only.out
+++ b/test_regress/t/t_constraint_json_only.out
@@ -14,7 +14,7 @@
         {"type":"FINISH","name":"","addr":"(N)","loc":"d,74:7,74:14"}
       ]}
     ]}
-  ],"activesp": []},
+  ]},
   {"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","level":3,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"CLASS","name":"Packet","addr":"(O)","loc":"d,7:1,7:6","isExtended":false,"isInterfaceClass":false,"isVirtual":false,"origName":"Packet","level":4,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","classOrPackagep":"UNLINKED","inlinesp": [],
@@ -50,8 +50,8 @@
       ],"scopeNamep": []},
       {"type":"FUNC","name":"new","addr":"(KB)","loc":"d,7:1,7:6","dtypep":"(LB)","method":true,"dpiExport":false,"dpiImport":false,"dpiOpenChild":false,"dpiOpenParent":false,"isExternDef":false,"isExternProto":false,"prototype":false,"recursive":false,"taskPublic":false,"cname":"new","fvarp": [],"classOrPackagep": [],"stmtsp": [],"scopeNamep": []},
       {"type":"VAR","name":"constraint","addr":"(MB)","loc":"d,7:1,7:6","dtypep":"(NB)","origName":"constraint","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"MEMBER","dtypeName":"VlRandomizer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-    ],"activesp": [],"extendsp": []}
-  ],"activesp": []}
+    ],"extendsp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(LB)",
@@ -80,6 +80,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(SB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(TB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(SB)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_dump_json.out b/test_regress/t/t_dump_json.out
index 0f42f85bc..fa903003a 100644
--- a/test_regress/t/t_dump_json.out
+++ b/test_regress/t/t_dump_json.out
@@ -430,7 +430,7 @@
         ]}
       ]}
     ]}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"Test","addr":"(PB)","loc":"e,66:8,66:12","isChecker":false,"isProgram":false,"origName":"Test","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"PORT","name":"out","addr":"(YG)","loc":"e,68:4,68:7","exprp": []},
@@ -514,7 +514,7 @@
         ]}
       ]}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(HI)",
@@ -543,6 +543,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(LI)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(MI)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(LI)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_begin_hier.out b/test_regress/t/t_json_only_begin_hier.out
index 9707df322..6ec35fd4b 100644
--- a/test_regress/t/t_json_only_begin_hier.out
+++ b/test_regress/t/t_json_only_begin_hier.out
@@ -22,7 +22,7 @@
       ]},
       {"type":"CELL","name":"submod_3","addr":"(S)","loc":"d,31:21,31:29","origName":"submod_3","recursive":false,"modp":"(K)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
     ]}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"submod","addr":"(K)","loc":"d,10:8,10:14","isChecker":false,"isProgram":false,"origName":"submod","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"BEGIN","name":"submod_gen","addr":"(T)","loc":"d,12:19,12:29","generate":true,"genfor":false,"implied":false,"needProcess":false,"unnamed":false,"genforp": [],
@@ -35,8 +35,8 @@
       {"type":"CELL","name":"submod_l1","addr":"(Z)","loc":"d,17:17,17:26","origName":"submod_l1","recursive":false,"modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
     ]},
     {"type":"CELL","name":"submod_l0","addr":"(AB)","loc":"d,19:13,19:22","origName":"submod_l0","recursive":false,"modp":"(Y)","pinsp": [],"paramsp": [],"rangep": [],"intfRefsp": []}
-  ],"activesp": []},
-  {"type":"MODULE","name":"submod2","addr":"(Y)","loc":"d,7:8,7:15","isChecker":false,"isProgram":false,"origName":"submod2","level":4,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],"stmtsp": [],"activesp": []}
+  ]},
+  {"type":"MODULE","name":"submod2","addr":"(Y)","loc":"d,7:8,7:15","isChecker":false,"isProgram":false,"origName":"submod2","level":4,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],"stmtsp": []}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -49,6 +49,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(BB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(CB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BB)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_debugcheck.out b/test_regress/t/t_json_only_debugcheck.out
index d5b880cbb..dd7f9d6b7 100644
--- a/test_regress/t/t_json_only_debugcheck.out
+++ b/test_regress/t/t_json_only_debugcheck.out
@@ -2819,7 +2819,7 @@
       ]}
     ],"finalsp": []},
     {"type":"CUSE","name":"$unit","addr":"(JPB)","loc":"a,0:0,0:0","useType":"INT_FWD"}
-  ],"activesp": []},
+  ]},
   {"type":"PACKAGE","name":"$unit","addr":"(E)","loc":"a,0:0,0:0","origName":"__024unit","level":0,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"__Venumtab_enum_next1","addr":"(JC)","loc":"d,17:12,17:16","dtypep":"(IC)","origName":"__Venumtab_enum_next1","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":true,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"MODULETEMP","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
@@ -2901,7 +2901,7 @@
         {"type":"VARREF","name":"__Venumtab_enum_name1","addr":"(PQB)","loc":"d,17:12,17:16","dtypep":"(OM)","access":"WR","varp":"(PM)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
       ]}
     ],"finalsp": []}
-  ],"activesp": []}
+  ]}
 ],
  "filesp": [
   {"type":"CFILE","name":"obj_vlt/t_json_only_debugcheck/Vt_json_only_debugcheck__Syms.cpp","addr":"(QQB)","loc":"a,0:0,0:0","source":true,"slow":true,"tblockp": []},
@@ -2990,6 +2990,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(URB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"TOP","addr":"(VRB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(URB)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_first.out b/test_regress/t/t_json_only_first.out
index af1d36e8b..2689c200c 100644
--- a/test_regress/t/t_json_only_first.out
+++ b/test_regress/t/t_json_only_first.out
@@ -36,7 +36,7 @@
         {"type":"VARREF","name":"clk","addr":"(GB)","loc":"d,27:42,27:45","dtypep":"(I)","access":"RD","varp":"(H)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
       ]}
     ],"paramsp": [],"rangep": [],"intfRefsp": []}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mod2","addr":"(X)","loc":"d,46:8,46:12","isChecker":false,"isProgram":false,"origName":"mod2","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"clk","addr":"(FB)","loc":"d,48:10,48:13","dtypep":"(I)","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
@@ -49,7 +49,7 @@
      "lhsp": [
       {"type":"VARREF","name":"q","addr":"(JB)","loc":"d,53:13,53:14","dtypep":"(G)","access":"WR","varp":"(CB)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
     ],"timingControlp": [],"strengthSpecp": []}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mod1__W4","addr":"(M)","loc":"d,31:8,31:12","isChecker":false,"isProgram":false,"origName":"mod1","level":3,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"WIDTH","addr":"(KB)","loc":"d,32:15,32:20","dtypep":"(LB)","origName":"WIDTH","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"GPARAM","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":true,"isParam":true,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],
@@ -82,7 +82,7 @@
         {"type":"VARREF","name":"q","addr":"(VB)","loc":"d,42:6,42:7","dtypep":"(G)","access":"WR","varp":"(O)","varScopep":"UNLINKED","classOrPackagep":"UNLINKED"}
       ],"timingControlp": []}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -96,6 +96,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(WB)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(XB)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(WB)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_flat.out b/test_regress/t/t_json_only_flat.out
index fec83ce8c..7b72c6a5c 100644
--- a/test_regress/t/t_json_only_flat.out
+++ b/test_regress/t/t_json_only_flat.out
@@ -135,7 +135,7 @@
         ],"timingControlp": [],"strengthSpecp": []}
       ],"inlinesp": []}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -149,6 +149,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(BD)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(CD)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(BD)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_flat_no_inline_mod.out b/test_regress/t/t_json_only_flat_no_inline_mod.out
index 23e7e78cd..8b82551b9 100644
--- a/test_regress/t/t_json_only_flat_no_inline_mod.out
+++ b/test_regress/t/t_json_only_flat_no_inline_mod.out
@@ -30,7 +30,7 @@
         ],"timingControlp": []}
       ],"inlinesp": []}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -42,6 +42,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(U)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_flat_pub_mod.out b/test_regress/t/t_json_only_flat_pub_mod.out
index 23e7e78cd..8b82551b9 100644
--- a/test_regress/t/t_json_only_flat_pub_mod.out
+++ b/test_regress/t/t_json_only_flat_pub_mod.out
@@ -30,7 +30,7 @@
         ],"timingControlp": []}
       ],"inlinesp": []}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -42,6 +42,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(U)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(V)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(U)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_flat_vlvbound.out b/test_regress/t/t_json_only_flat_vlvbound.out
index 286b824e9..906354bc8 100644
--- a/test_regress/t/t_json_only_flat_vlvbound.out
+++ b/test_regress/t/t_json_only_flat_vlvbound.out
@@ -290,7 +290,7 @@
     {"type":"VAR","name":"__Vfunc_vlvbound_test.foo__1__val","addr":"(LB)","loc":"d,15:57,15:60","dtypep":"(H)","origName":"__Vfunc_vlvbound_test__DOT__foo__1__val","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
     {"type":"VAR","name":"__Vfunc_vlvbound_test.foo__1__ret","addr":"(NB)","loc":"d,16:17,16:20","dtypep":"(K)","origName":"__Vfunc_vlvbound_test__DOT__foo__1__ret","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
     {"type":"VAR","name":"__Vfunc_vlvbound_test.foo__1__i","addr":"(PB)","loc":"d,17:13,17:14","dtypep":"(GB)","origName":"__Vfunc_vlvbound_test__DOT__foo__1__i","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"NONE","varType":"BLOCKTEMP","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -310,6 +310,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(OF)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(PF)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(OF)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_output.out b/test_regress/t/t_json_only_output.out
index aa1b3275a..6b48a8b04 100644
--- a/test_regress/t/t_json_only_output.out
+++ b/test_regress/t/t_json_only_output.out
@@ -3,7 +3,7 @@
   {"type":"MODULE","name":"m","addr":"(E)","loc":"d,7:8,7:9","isChecker":false,"isProgram":false,"origName":"m","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"clk","addr":"(F)","loc":"d,8:10,8:13","dtypep":"(G)","origName":"clk","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -15,6 +15,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(H)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(I)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(H)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_json_only_tag.out b/test_regress/t/t_json_only_tag.out
index 78ce2196e..18f7938c2 100644
--- a/test_regress/t/t_json_only_tag.out
+++ b/test_regress/t/t_json_only_tag.out
@@ -47,7 +47,7 @@
         ]}
       ]}
     ]}
-  ],"activesp": []},
+  ]},
   {"type":"IFACE","name":"ifc","addr":"(M)","loc":"d,7:11,7:14","origName":"ifc","level":3,"modPublic":false,"inLibrary":true,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"value","addr":"(W)","loc":"d,8:12,8:17","dtypep":"(V)","origName":"value","isSc":false,"isPrimaryIO":false,"direction":"NONE","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"VAR","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
@@ -55,7 +55,7 @@
      "varsp": [
       {"type":"MODPORTVARREF","name":"value","addr":"(NB)","loc":"d,9:32,9:37","direction":"OUTPUT","varp":"(W)"}
     ]}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"(JB)",
@@ -94,6 +94,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}
diff --git a/test_regress/t/t_var_port_json_only.out b/test_regress/t/t_var_port_json_only.out
index db3b69425..f441175aa 100644
--- a/test_regress/t/t_var_port_json_only.out
+++ b/test_regress/t/t_var_port_json_only.out
@@ -3,68 +3,68 @@
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    "stmtsp": [
     {"type":"VAR","name":"x_inout_wire_integer","addr":"(F)","loc":"d,18:27,18:47","dtypep":"(G)","origName":"x_inout_wire_integer","isSc":false,"isPrimaryIO":false,"direction":"INOUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh5","addr":"(H)","loc":"d,24:8,24:11","isChecker":false,"isProgram":false,"origName":"mh5","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"x_input_wire_logic","addr":"(I)","loc":"d,24:19,24:37","dtypep":"(J)","origName":"x_input_wire_logic","isSc":false,"isPrimaryIO":false,"direction":"INPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh6","addr":"(K)","loc":"d,26:8,26:11","isChecker":false,"isProgram":false,"origName":"mh6","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh7","addr":"(M)","loc":"d,28:8,28:11","isChecker":false,"isProgram":false,"origName":"mh7","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
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   {"type":"MODULE","name":"mh8","addr":"(O)","loc":"d,30:8,30:11","isChecker":false,"isProgram":false,"origName":"mh8","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
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   {"type":"MODULE","name":"mh9","addr":"(Q)","loc":"d,32:8,32:11","isChecker":false,"isProgram":false,"origName":"mh9","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh10","addr":"(S)","loc":"d,34:8,34:12","isChecker":false,"isProgram":false,"origName":"mh10","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
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   {"type":"MODULE","name":"mh11","addr":"(V)","loc":"d,36:8,36:12","isChecker":false,"isProgram":false,"origName":"mh11","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
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   {"type":"MODULE","name":"mh12","addr":"(X)","loc":"d,38:8,38:12","isChecker":false,"isProgram":false,"origName":"mh12","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh13","addr":"(AB)","loc":"d,40:8,40:12","isChecker":false,"isProgram":false,"origName":"mh13","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh17","addr":"(DB)","loc":"d,50:8,50:12","isChecker":false,"isProgram":false,"origName":"mh17","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh18","addr":"(GB)","loc":"d,52:8,52:12","isChecker":false,"isProgram":false,"origName":"mh18","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh19","addr":"(JB)","loc":"d,54:8,54:12","isChecker":false,"isProgram":false,"origName":"mh19","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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     {"type":"VAR","name":"y_output_var_integer","addr":"(LB)","loc":"d,54:72,54:92","dtypep":"(G)","origName":"y_output_var_integer","isSc":false,"isPrimaryIO":false,"direction":"OUTPUT","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"integer","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh20","addr":"(MB)","loc":"d,56:8,56:12","isChecker":false,"isProgram":false,"origName":"mh20","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
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-  ],"activesp": []},
+  ]},
   {"type":"MODULE","name":"mh21","addr":"(PB)","loc":"d,58:8,58:12","isChecker":false,"isProgram":false,"origName":"mh21","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"1ps","inlinesp": [],
    "stmtsp": [
     {"type":"VAR","name":"ref_var_logic_u6","addr":"(QB)","loc":"d,58:17,58:33","dtypep":"(RB)","origName":"ref_var_logic_u6","isSc":false,"isPrimaryIO":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []},
     {"type":"VAR","name":"y_ref_var_logic","addr":"(SB)","loc":"d,58:41,58:56","dtypep":"(J)","origName":"y_ref_var_logic","isSc":false,"isPrimaryIO":false,"direction":"REF","isConst":false,"isPullup":false,"isPulldown":false,"isUsedClock":false,"isSigPublic":false,"isLatched":false,"isUsedLoopIdx":false,"noReset":false,"attrIsolateAssign":false,"attrFileDescr":false,"isDpiOpenArray":false,"isFuncReturn":false,"isFuncLocal":false,"attrClocker":"UNKNOWN","lifetime":"VSTATIC","varType":"PORT","dtypeName":"logic","isSigUserRdPublic":false,"isSigUserRWPublic":false,"isGParam":false,"isParam":false,"attrScBv":false,"attrSFormat":false,"ignorePostWrite":false,"ignoreSchedWrite":false,"sensIfacep":"UNLINKED","childDTypep": [],"delayp": [],"valuep": [],"attrsp": []}
-  ],"activesp": []}
+  ]}
 ],"filesp": [],
  "miscsp": [
   {"type":"TYPETABLE","name":"","addr":"(C)","loc":"a,0:0,0:0","constraintRefp":"UNLINKED","emptyQueuep":"UNLINKED","queueIndexp":"UNLINKED","streamp":"UNLINKED","voidp":"UNLINKED",
@@ -100,6 +100,6 @@
     {"type":"MODULE","name":"@CONST-POOL@","addr":"(AC)","loc":"a,0:0,0:0","isChecker":false,"isProgram":false,"origName":"@CONST-POOL@","level":0,"modPublic":false,"inLibrary":false,"dead":false,"recursiveClone":false,"recursive":false,"timeunit":"NONE","inlinesp": [],
      "stmtsp": [
       {"type":"SCOPE","name":"@CONST-POOL@","addr":"(BC)","loc":"a,0:0,0:0","aboveScopep":"UNLINKED","aboveCellp":"UNLINKED","modp":"(AC)","varsp": [],"blocksp": [],"inlinesp": []}
-    ],"activesp": []}
+    ]}
   ]}
 ]}

From 916a89761eb4194aac77bcea777c19b04e25a1b1 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Sun, 29 Jun 2025 20:17:27 -0400
Subject: [PATCH 185/211] Add `--work` library-selection option (#5891
 partial).

---
 Changes                              |  1 +
 bin/verilator                        |  1 +
 docs/guide/exe_verilator.rst         | 17 +++++-
 docs/guide/languages.rst             |  3 +-
 docs/guide/verilating.rst            | 34 ++++++++++++
 docs/spelling.txt                    |  1 +
 src/V3Ast.cpp                        |  5 ++
 src/V3AstNodeOther.h                 | 42 +++++++-------
 src/V3AstNodes.cpp                   |  6 +-
 src/V3Class.cpp                      |  3 +-
 src/V3EmitCMake.cpp                  | 20 +++++--
 src/V3EmitMk.cpp                     |  9 ++-
 src/V3EmitMkJson.cpp                 | 12 ++--
 src/V3Fork.cpp                       |  3 +-
 src/V3Global.cpp                     | 31 +++++------
 src/V3HierBlock.cpp                  | 13 ++---
 src/V3LinkCells.cpp                  | 83 ++++++++++++++++++++--------
 src/V3LinkLevel.cpp                  |  2 +-
 src/V3LinkResolve.cpp                |  3 +-
 src/V3Options.cpp                    | 38 +++++++------
 src/V3Options.h                      | 54 ++++++++++++++----
 src/V3Parse.h                        |  2 +-
 src/V3ParseImp.cpp                   |  8 ++-
 src/V3ParseImp.h                     |  4 +-
 src/verilog.y                        | 18 +++---
 test_regress/t/t_config_work.out     |  5 ++
 test_regress/t/t_config_work.py      | 22 ++++++++
 test_regress/t/t_config_work.v       | 11 ++++
 test_regress/t/t_config_work__liba.v | 14 +++++
 test_regress/t/t_config_work__libb.v | 14 +++++
 test_regress/t/t_display.out         |  8 +--
 test_regress/t/t_sys_sformat.v       |  2 +-
 32 files changed, 350 insertions(+), 139 deletions(-)
 create mode 100644 test_regress/t/t_config_work.out
 create mode 100755 test_regress/t/t_config_work.py
 create mode 100644 test_regress/t/t_config_work.v
 create mode 100644 test_regress/t/t_config_work__liba.v
 create mode 100644 test_regress/t/t_config_work__libb.v

diff --git a/Changes b/Changes
index a3bf6a698..a2ba53512 100644
--- a/Changes
+++ b/Changes
@@ -26,6 +26,7 @@ Verilator 5.037 devel
 * Add BADVLTPRAGMA on unknown Verilator pragmas (#5945). [Shou-Li Hsu]
 * Add ternary operator into branch coverage (#5880). [Ryszard Rozak, Antmicro Ltd.]
 * Add aggregate type error checks (#5570) (#5950). [Shou-Li Hsu]
+* Add `--work` library-selection option (#5891 partial).
 * Add `--filter-type` to verilator_coverage (#6030). [Ryszard Rozak, Antmicro Ltd.]
 * Add `--hierarchical-threads` (#6037). [Bartłomiej Chmiel]
 * Add `MODMISSING` error, in place of unnamed error (#6054). [Paul Swirhun]
diff --git a/bin/verilator b/bin/verilator
index 3ab656be9..2709e6cd0 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -513,6 +513,7 @@ detailed descriptions of these arguments.
      -Wno-fatal                 Disable fatal exit on warnings
      -Wno-lint                  Disable all lint warnings
      -Wno-style                 Disable all style warnings
+     -work <libname>            Set config library for following files
      -Wpedantic                 Warn on compliance-test issues
      -Wwarn-<message>           Enable specified warning message
      -Wwarn-lint                Enable lint warning message
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 281e390aa..78c54f463 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -1596,8 +1596,8 @@ Summary:
    When the input Verilog contains more than one top-level module,
    it specifies the name of the module to become the top-level module,
    and sets the default for :vlopt:`--prefix` if not explicitly specified.
-   This is not needed with standard designs with only one top.  See also
-   :option:`MULTITOP` warning.
+   This is not needed with standard designs with only one top.
+   See :ref:`Finding and Binding Modules`.
 
 .. option:: --trace
 
@@ -1881,6 +1881,19 @@ Summary:
    ``-Wno-UNUSEDGENVAR`` ``-Wno-UNUSEDPARAM`` ``-Wno-UNUSEDSIGNAL``
    ``-Wno-VARHIDDEN``.
 
+.. option:: -work <libname>
+
+   Use the specified Verilog config library name for all cells read after
+   this argument.  May be specified multiple times, it will apply to cells
+   read between the given arguments.  E.g. `-work liba a.v -work libb b.v`
+   will use `liba` for modules inside `a.v` or in cells resolved
+   hierarchically under those modules, and will use `libb` for modules
+   inside `b.v` or hierarchically under.
+
+   Defaults to "work" (IEEE 1800-2023 3.3.1).
+
+   See :ref:`Finding and Binding Modules`.
+
 .. option:: -Wpedantic
 
    Warn on any construct demanded by IEEE, and disable all Verilator
diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index beb66229c..24f2e0fbd 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -478,7 +478,8 @@ shortreal
   other simulators either do not support float, or convert likewise.
 
 specify specparam
-  All specify blocks and timing checks are ignored.
+  All timing checks and specify blocks (except specparam, which is
+  supported) are ignored.
 
 uwire
   Verilator does not perform warning checking on uwires; it treats the
diff --git a/docs/guide/verilating.rst b/docs/guide/verilating.rst
index dd760e8ea..ab0d0b7d8 100644
--- a/docs/guide/verilating.rst
+++ b/docs/guide/verilating.rst
@@ -66,6 +66,40 @@ Once a model is built, the next step is typically for the user to run it,
 see :ref:`Simulating`.
 
 
+.. _Finding and Binding Modules:
+
+Finding and Binding Modules
+===========================
+
+Verilator provides several mechanisms to find the source code containing a
+module, primitive, interface, or program ("module" in this section) and
+bind them to an instantiation.  These capabilities are similar to the
+"Precompiling in a single-pass" use model described in IEEE 1800-2023
+33.5.1, although `config` is not yet supported.
+
+Verilator first reads all files provided on the command line and
+:vlopt:`-f` files, and parses all modules within.  Each module is assigned
+to the most recent library specified with :vlopt:`-work`, thus `-work liba
+a.v -work libb b.v` will assign modules in `a.v` to `liba` and modules in
+`b.v` to `libb`.
+
+If a module is not defined from a file on the command-line, Verilator
+attempts to find a filename constructed from the module name using
+:vlopt:`-y` and `+libext`.
+
+Binding begins with the :vlopt:`--top` module, if provided. If not provided
+Verilator attempts to figure out the top module itself, and if multiple
+tops result a :option:`MULTITOP` warning is issued which may be suppressed
+(see details in :option:`MULTITOP`).
+
+Verilator will attempt to bind lower unresolved instances first in the same
+library name as the parent's instantiation library, and if not found search
+globally across all libraries in the order modules were declared.  This
+allows otherwise conflicting duplicate module names between libraries to
+coexist uniquely within each library name.  When IEEE `config use` is
+supported, more complicated selections will be able to be specified.
+
+
 .. _Hierarchical Verilation:
 
 Hierarchical Verilation
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 4a8a63c3b..192d4ea7d 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -332,6 +332,7 @@ Prabhat
 Prabhu
 Prateek
 Pre
+Precompiling
 Preprocess
 Pretet
 Pretl
diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp
index 2514a53bd..4d7bcd99e 100644
--- a/src/V3Ast.cpp
+++ b/src/V3Ast.cpp
@@ -193,6 +193,11 @@ string AstNode::prettyName(const string& namein) VL_PURE {
                 pos += 7;
                 continue;
             }
+            if (0 == std::strncmp(pos, "__LIB__", 7)) {
+                pretty = "";  // Trim library name before module name
+                pos += 7;
+                continue;
+            }
             if (0 == std::strncmp(pos, "__PVT__", 7)) {
                 pretty += "";
                 pos += 7;
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 694b5057e..2a4304ccf 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -226,6 +226,7 @@ class AstNodeModule VL_NOT_FINAL : public AstNode {
     const string m_origName;  // Name of the module, ignoring name() changes, for dot lookup
     string m_someInstanceName;  // Hierarchical name of some arbitrary instance of this module.
                                 // Used for user messages only.
+    string m_libname;  // Work library
     int m_level = 0;  // 1=top module, 2=cell off top module, ...
     VLifetime m_lifetime;  // Lifetime
     VTimescale m_timeunit;  // Global time unit
@@ -243,10 +244,11 @@ class AstNodeModule VL_NOT_FINAL : public AstNode {
     bool m_recursive : 1;  // Recursive module
     bool m_recursiveClone : 1;  // If recursive, what module it clones, otherwise nullptr
 protected:
-    AstNodeModule(VNType t, FileLine* fl, const string& name)
+    AstNodeModule(VNType t, FileLine* fl, const string& name, const string& libname)
         : AstNode{t, fl}
         , m_name{name}
         , m_origName{name}
+        , m_libname{libname}
         , m_modPublic{false}
         , m_modTrace{false}
         , m_inLibrary{false}
@@ -275,6 +277,8 @@ public:
     void inLibrary(bool flag) { m_inLibrary = flag; }
     void level(int level) { m_level = level; }
     int level() const VL_MT_SAFE { return m_level; }
+    string libname() const { return m_libname; }
+    string prettyLibnameQ() const { return "'" + prettyName(libname()) + "'"; }
     bool isTop() const VL_MT_SAFE { return level() == 1; }
     bool modPublic() const { return m_modPublic; }
     void modPublic(bool flag) { m_modPublic = flag; }
@@ -2507,8 +2511,8 @@ class AstClass final : public AstNodeModule {
     bool m_virtual = false;  // Virtual class
 
 public:
-    AstClass(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_Class(fl, name) {}
+    AstClass(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_Class(fl, name, libname) {}
     ASTGEN_MEMBERS_AstClass;
     string verilogKwd() const override { return "class"; }
     bool maybePointedTo() const override VL_MT_SAFE { return true; }
@@ -2581,8 +2585,8 @@ class AstClassPackage final : public AstNodeModule {
     // @astgen ptr := m_classp : Optional[AstClass]  // Class package this is under
     //                                     // (weak pointer, hard link is other way)
 public:
-    AstClassPackage(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_ClassPackage(fl, name) {}
+    AstClassPackage(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_ClassPackage(fl, name, libname) {}
     ASTGEN_MEMBERS_AstClassPackage;
     string verilogKwd() const override { return "classpackage"; }
     bool timescaleMatters() const override { return false; }
@@ -2592,8 +2596,8 @@ public:
 class AstIface final : public AstNodeModule {
     // A module declaration
 public:
-    AstIface(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_Iface(fl, name) {}
+    AstIface(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_Iface(fl, name, libname) {}
     ASTGEN_MEMBERS_AstIface;
     // Interfaces have `timescale applicability but lots of code seems to
     // get false warnings if we enable this
@@ -2607,13 +2611,13 @@ class AstModule final : public AstNodeModule {
 public:
     class Checker {};  // for constructor type-overload selection
     class Program {};  // for constructor type-overload selection
-    AstModule(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_Module(fl, name) {}
-    AstModule(FileLine* fl, const string& name, Checker)
-        : ASTGEN_SUPER_Module(fl, name)
+    AstModule(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_Module(fl, name, libname) {}
+    AstModule(FileLine* fl, const string& name, const string& libname, Checker)
+        : ASTGEN_SUPER_Module(fl, name, libname)
         , m_isChecker{true} {}
-    AstModule(FileLine* fl, const string& name, Program)
-        : ASTGEN_SUPER_Module(fl, name)
+    AstModule(FileLine* fl, const string& name, const string& libname, Program)
+        : ASTGEN_SUPER_Module(fl, name, libname)
         , m_isProgram{true} {}
     ASTGEN_MEMBERS_AstModule;
     string verilogKwd() const override {
@@ -2628,8 +2632,8 @@ public:
 class AstNotFoundModule final : public AstNodeModule {
     // A missing module declaration
 public:
-    AstNotFoundModule(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_NotFoundModule(fl, name) {}
+    AstNotFoundModule(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_NotFoundModule(fl, name, libname) {}
     ASTGEN_MEMBERS_AstNotFoundModule;
     string verilogKwd() const override { return "/*not-found-*/ module"; }
     bool timescaleMatters() const override { return false; }
@@ -2637,8 +2641,8 @@ public:
 class AstPackage final : public AstNodeModule {
     // A package declaration
 public:
-    AstPackage(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_Package(fl, name) {}
+    AstPackage(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_Package(fl, name, libname) {}
     ASTGEN_MEMBERS_AstPackage;
     string verilogKwd() const override { return "package"; }
     bool timescaleMatters() const override { return !isDollarUnit(); }
@@ -2648,8 +2652,8 @@ public:
 class AstPrimitive final : public AstNodeModule {
     // A primitive declaration
 public:
-    AstPrimitive(FileLine* fl, const string& name)
-        : ASTGEN_SUPER_Primitive(fl, name) {}
+    AstPrimitive(FileLine* fl, const string& name, const string& libname)
+        : ASTGEN_SUPER_Primitive(fl, name, libname) {}
     ASTGEN_MEMBERS_AstPrimitive;
     string verilogKwd() const override { return "primitive"; }
     bool timescaleMatters() const override { return false; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index aabf0d51f..02c5a498e 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -1353,7 +1353,7 @@ AstBasicDType* AstTypeTable::findInsertSameDType(AstBasicDType* nodep) {
 
 AstConstPool::AstConstPool(FileLine* fl)
     : ASTGEN_SUPER_ConstPool(fl)
-    , m_modp{new AstModule{fl, "@CONST-POOL@"}}
+    , m_modp{new AstModule{fl, "@CONST-POOL@", "work"}}
     , m_scopep{new AstScope{fl, m_modp, "@CONST-POOL@", nullptr, nullptr}} {
     this->modulep(m_modp);
     m_modp->addStmtsp(m_scopep);
@@ -2298,7 +2298,7 @@ void AstNetlist::dumpJson(std::ostream& str) const {
 }
 AstPackage* AstNetlist::dollarUnitPkgAddp() {
     if (!m_dollarUnitPkgp) {
-        m_dollarUnitPkgp = new AstPackage{fileline(), AstPackage::dollarUnitName()};
+        m_dollarUnitPkgp = new AstPackage{fileline(), AstPackage::dollarUnitName(), "work"};
         // packages are always libraries; don't want to make them a "top"
         m_dollarUnitPkgp->inLibrary(true);
         m_dollarUnitPkgp->modTrace(false);  // may reconsider later
@@ -2325,6 +2325,7 @@ void AstNodeModule::dump(std::ostream& str) const {
         str << " [RECURSIVE]";
     }
     str << " [" << timeunit() << "]";
+    if (libname() != "work") str << " libname=" << libname();
 }
 void AstNodeModule::dumpJson(std::ostream& str) const {
     dumpJsonStrFunc(str, origName);
@@ -2335,6 +2336,7 @@ void AstNodeModule::dumpJson(std::ostream& str) const {
     dumpJsonBoolFunc(str, recursiveClone);
     dumpJsonBoolFunc(str, recursive);
     dumpJsonStr(str, "timeunit", timeunit().ascii());
+    if (libname() != "work") dumpJsonStr(str, "libname=", libname());
     dumpJsonGen(str);
 }
 void AstPackageExport::dump(std::ostream& str) const {
diff --git a/src/V3Class.cpp b/src/V3Class.cpp
index af9bfddde..a3a1a3aaf 100644
--- a/src/V3Class.cpp
+++ b/src/V3Class.cpp
@@ -93,7 +93,7 @@ class ClassVisitor final : public VNVisitor {
         // Make containing package
         // Note origName is the same as the class origName so errors look correct
         AstClassPackage* const packagep
-            = new AstClassPackage{nodep->fileline(), nodep->origName()};
+            = new AstClassPackage{nodep->fileline(), nodep->origName(), nodep->libname()};
         packagep->name(nodep->name() + "__Vclpkg");
         nodep->editCountInc();
         nodep->classOrPackagep(packagep);
@@ -138,6 +138,7 @@ class ClassVisitor final : public VNVisitor {
     }
     void visit(AstNodeModule* nodep) override {
         // Visit for NodeModules that are not AstClass (AstClass is-a AstNodeModule)
+        // Classes are always under a Package (perhaps $unit) or a module
         VL_RESTORER(m_prefix);
         VL_RESTORER(m_modp);
         m_modp = nodep;
diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp
index c76e33c4d..0949ce3fa 100644
--- a/src/V3EmitCMake.cpp
+++ b/src/V3EmitCMake.cpp
@@ -39,11 +39,21 @@ class CMakeEmitter final {
     template <typename T_List>
     static string cmake_list(const T_List& strs) {
         string s;
-        for (auto it = strs.begin(); it != strs.end(); ++it) {
+        for (auto& itr : strs) {
+            if (!s.empty()) s += ' ';
             s += '"';
-            s += V3OutFormatter::quoteNameControls(*it);
+            s += V3OutFormatter::quoteNameControls(itr);
+            s += '"';
+        }
+        return s;
+    }
+    static string cmake_list(const VFileLibList& strs) {
+        string s;
+        for (auto& itr : strs) {
+            if (!s.empty()) s += ' ';
+            s += '"';
+            s += V3OutFormatter::quoteNameControls(itr.filename());
             s += '"';
-            if (it != strs.end()) s += ' ';
         }
         return s;
     }
@@ -193,8 +203,8 @@ class CMakeEmitter final {
                 *of << " ";
                 const string vFile = hblockp->vFileIfNecessary();
                 if (!vFile.empty()) *of << vFile << " ";
-                const V3StringList& vFiles = v3Global.opt.vFiles();
-                for (const string& i : vFiles) *of << V3Os::filenameRealPath(i) << " ";
+                for (const auto& i : v3Global.opt.vFiles())
+                    *of << V3Os::filenameRealPath(i.filename()) << " ";
                 *of << " VERILATOR_ARGS ";
                 *of << "-f " << hblockp->commandArgsFilename(true)
                     << " -CFLAGS -fPIC"  // hierarchical block will be static, but may be linked
diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp
index 9b8a61c58..6b96ebcca 100644
--- a/src/V3EmitMk.cpp
+++ b/src/V3EmitMk.cpp
@@ -814,13 +814,12 @@ class EmitMkHierVerilation final {
         const string verilator_wrapper = V3Os::filenameDir(fullpath_bin) + "/verilator";
         of.puts("VM_HIER_VERILATOR := " + verilator_wrapper + "\n");
         of.puts("VM_HIER_INPUT_FILES := \\\n");
-        const V3StringList& vFiles = v3Global.opt.vFiles();
-        for (const string& i : vFiles) of.puts("  " + V3Os::filenameRealPath(i) + " \\\n");
+        for (const auto& i : v3Global.opt.vFiles())
+            of.puts("  " + V3Os::filenameRealPath(i.filename()) + " \\\n");
         of.puts("\n");
-        const V3StringSet& libraryFiles = v3Global.opt.libraryFiles();
         of.puts("VM_HIER_VERILOG_LIBS := \\\n");
-        for (const string& i : libraryFiles) {
-            of.puts("  " + V3Os::filenameRealPath(i) + " \\\n");
+        for (const auto& i : v3Global.opt.libraryFiles()) {
+            of.puts("  " + V3Os::filenameRealPath(i.filename()) + " \\\n");
         }
         of.puts("\n");
     }
diff --git a/src/V3EmitMkJson.cpp b/src/V3EmitMkJson.cpp
index 09bfc6271..843e7fe87 100644
--- a/src/V3EmitMkJson.cpp
+++ b/src/V3EmitMkJson.cpp
@@ -133,9 +133,9 @@ class V3EmitMkJsonEmitter final {
                 const string vFile = hblockp->vFileIfNecessary();
                 if (!vFile.empty()) sources.emplace_back(vFile);
 
-                const V3StringList& vFiles = v3Global.opt.vFiles();
-                for (const string& i : vFiles)
-                    sources.emplace_back(V3Os::filenameSlashPath(V3Os::filenameRealPath(i)));
+                for (const auto& i : v3Global.opt.vFiles())
+                    sources.emplace_back(
+                        V3Os::filenameSlashPath(V3Os::filenameRealPath(i.filename())));
 
                 std::vector<std::string> cflags;
                 cflags.emplace_back("-fPIC");
@@ -156,9 +156,9 @@ class V3EmitMkJsonEmitter final {
             for (const auto& itr : *planp)
                 sources.emplace_back(makeDir + "/" + itr.second->hierWrapperFilename(true));
 
-            const V3StringList& vFiles = v3Global.opt.vFiles();
-            for (const string& i : vFiles)
-                sources.emplace_back(V3Os::filenameSlashPath(V3Os::filenameRealPath(i)));
+            for (const auto& itr : v3Global.opt.vFiles())
+                sources.emplace_back(
+                    V3Os::filenameSlashPath(V3Os::filenameRealPath(itr.filename())));
 
             of.begin()
                 .put("prefix", v3Global.opt.prefix())
diff --git a/src/V3Fork.cpp b/src/V3Fork.cpp
index 4948ed955..c5faa2110 100644
--- a/src/V3Fork.cpp
+++ b/src/V3Fork.cpp
@@ -81,7 +81,8 @@ public:
     ForkDynScopeInstance& createInstancePrototype() {
         UASSERT_OBJ(!m_instance.initialized(), m_procp, "Dynamic scope already instantiated.");
 
-        m_instance.m_classp = new AstClass{m_procp->fileline(), generateDynScopeClassName()};
+        m_instance.m_classp
+            = new AstClass{m_procp->fileline(), generateDynScopeClassName(), m_modp->libname()};
         UINFO(9, "new dynscope class " << m_instance.m_classp);
         m_instance.m_refDTypep
             = new AstClassRefDType{m_procp->fileline(), m_instance.m_classp, nullptr};
diff --git a/src/V3Global.cpp b/src/V3Global.cpp
index 56ce737f9..bd1c5e30a 100644
--- a/src/V3Global.cpp
+++ b/src/V3Global.cpp
@@ -60,42 +60,39 @@ void V3Global::readFiles() {
     if (v3Global.opt.stdWaiver()) {
         parser.parseFile(
             new FileLine{V3Options::getStdWaiverPath()}, V3Options::getStdWaiverPath(), false,
-            "Cannot find verilated_std_waiver.vlt containing built-in lint waivers: ");
+            "work", "Cannot find verilated_std_waiver.vlt containing built-in lint waivers: ");
     }
     // Read .vlt files
-    const V3StringSet& vltFiles = v3Global.opt.vltFiles();
-    for (const string& filename : vltFiles) {
-        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filename, false,
-                         "Cannot find file containing .vlt file: ");
+    for (auto& filelib : v3Global.opt.vltFiles()) {
+        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filelib.filename(), false,
+                         filelib.libname(), "Cannot find file containing .vlt file: ");
     }
 
     // Parse the std package
     if (v3Global.opt.stdPackage()) {
         parser.parseFile(new FileLine{V3Options::getStdPackagePath()},
-                         V3Options::getStdPackagePath(), false,
+                         V3Options::getStdPackagePath(), false, "work",
                          "Cannot find verilated_std.sv containing built-in std:: definitions: ");
     }
 
     // Read top module
-    const V3StringList& vFiles = v3Global.opt.vFiles();
-    for (const string& filename : vFiles) {
-        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filename, false,
-                         "Cannot find file containing module: ");
+    for (const auto& filelib : v3Global.opt.vFiles()) {
+        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filelib.filename(), false,
+                         filelib.libname(), "Cannot find file containing module: ");
     }
 
     // Read libraries
     // To be compatible with other simulators,
     // this needs to be done after the top file is read
-    const V3StringSet& libraryFiles = v3Global.opt.libraryFiles();
-    for (const string& filename : libraryFiles) {
-        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filename, true,
-                         "Cannot find file containing library module: ");
+    for (const auto& filelib : v3Global.opt.libraryFiles()) {
+        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filelib.filename(), true,
+                         filelib.libname(), "Cannot find file containing library module: ");
     }
 
     // Read hierarchical type parameter file
-    const string filename = v3Global.opt.hierParamFile();
-    if (!filename.empty()) {
-        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filename, false,
+    for (const auto& filelib : v3Global.opt.hierParamFile()) {
+        parser.parseFile(new FileLine{FileLine::commandLineFilename()}, filelib.filename(), false,
+                         filelib.libname(),
                          "Cannot open file containing hierarchical parameter declarations: ");
     }
 
diff --git a/src/V3HierBlock.cpp b/src/V3HierBlock.cpp
index b248a6f21..77ba1992f 100644
--- a/src/V3HierBlock.cpp
+++ b/src/V3HierBlock.cpp
@@ -116,12 +116,11 @@ static void V3HierWriteCommonInputs(const V3HierBlock* hblockp, std::ostream* of
     if (hblockp) topModuleFile = hblockp->vFileIfNecessary();
     if (!forCMake) {
         if (!topModuleFile.empty()) *of << topModuleFile << "\n";
-        const V3StringList& vFiles = v3Global.opt.vFiles();
-        for (const string& i : vFiles) *of << i << "\n";
+        for (const auto& i : v3Global.opt.vFiles()) *of << i.filename() << "\n";
     }
-    const V3StringSet& libraryFiles = v3Global.opt.libraryFiles();
-    for (const string& i : libraryFiles) {
-        if (V3Os::filenameRealPath(i) != topModuleFile) *of << "-v " << i << "\n";
+    for (const auto& i : v3Global.opt.libraryFiles()) {
+        if (V3Os::filenameRealPath(i.filename()) != topModuleFile)
+            *of << "-v " << i.filename() << "\n";
     }
 }
 
@@ -251,9 +250,9 @@ string V3HierBlock::hierGeneratedFilenames(bool withDir) const {
 
 string V3HierBlock::vFileIfNecessary() const {
     string filename = V3Os::filenameRealPath(m_modp->fileline()->filename());
-    for (const string& v : v3Global.opt.vFiles()) {
+    for (const auto& v : v3Global.opt.vFiles()) {
         // Already listed in vFiles, so no need to add the file.
-        if (filename == V3Os::filenameRealPath(v)) return "";
+        if (filename == V3Os::filenameRealPath(v.filename())) return "";
     }
     return filename;
 }
diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 1c464b8d1..ed3d5872f 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -127,14 +127,34 @@ class LinkCellsVisitor final : public VNVisitor {
         const V3GraphEdge* const edgep = new V3GraphEdge{&m_graph, fromp, top, weight, cuttable};
         UINFO(9, "    newEdge " << edgep << " " << fromp->name() << " -> " << top->name());
     }
-
-    AstNodeModule* findModuleSym(const string& modName) {
-        const VSymEnt* const foundp = m_mods.rootp()->findIdFallback(modName);
-        return foundp ? VN_AS(foundp->nodep(), NodeModule) : nullptr;
+    void insertModInLib(const string& name, const string& libname, AstNodeModule* nodep) {
+        // Be able to find the module under it's library using the name it was given
+        VSymEnt* libSymp = m_mods.rootp()->findIdFlat(libname);
+        if (!libSymp)
+            libSymp = m_mods.rootp()->insert(libname, new VSymEnt{&m_mods, v3Global.rootp()});
+        libSymp->insert(name, new VSymEnt{&m_mods, nodep});
     }
 
-    AstNodeModule* resolveModule(AstNode* nodep, const string& modName) {
-        AstNodeModule* modp = findModuleSym(modName);
+    AstNodeModule* findModuleLibSym(const string& modName, const string& libname) {
+        // Given module name and library name, find within that exact library
+        const VSymEnt* const libSymp = m_mods.rootp()->findIdFallback(libname);
+        if (!libSymp) return nullptr;
+        const VSymEnt* const foundp = libSymp->findIdFallback(modName);
+        return foundp ? VN_AS(foundp->nodep(), NodeModule) : nullptr;
+    }
+    AstNodeModule* findModuleSym(const string& modName, const string& libname) {
+        // Given module and library to start search in, resolve using config library choices
+        // TODO support IEEE config library search order
+        // First search local library
+        AstNodeModule* foundp = findModuleLibSym(modName, libname);
+        if (foundp) return foundp;
+        // THen search global
+        foundp = findModuleLibSym(modName, "__GLOBAL");
+        return foundp;
+    }
+
+    AstNodeModule* resolveModule(AstNode* nodep, const string& modName, const string& libname) {
+        AstNodeModule* modp = findModuleSym(modName, libname);
         if (!modp) {
             // Read-subfile
             // If file not found, make AstNotFoundModule, rather than error out.
@@ -142,12 +162,12 @@ class LinkCellsVisitor final : public VNVisitor {
             const string prettyName = AstNode::prettyName(modName);
             V3Parse parser{v3Global.rootp(), m_filterp};
             // true below -> other simulators treat modules in link-found files as library cells
-            parser.parseFile(nodep->fileline(), prettyName, true, "");
+            parser.parseFile(nodep->fileline(), prettyName, true, m_modp->libname(), "");
             V3Error::abortIfErrors();
             // We've read new modules, grab new pointers to their names
             readModNames();
             // Check again
-            modp = findModuleSym(modName);
+            modp = findModuleSym(modName, libname);
             if (!modp) {
                 // This shouldn't throw a message as parseFile will create
                 // a AstNotFoundModule for us
@@ -188,7 +208,7 @@ class LinkCellsVisitor final : public VNVisitor {
             m_modp = nodep;
             UINFO(4, "Link Module: " << nodep);
             if (nodep->fileline()->filebasenameNoExt() != nodep->prettyName()
-                && !v3Global.opt.isLibraryFile(nodep->fileline()->filename())
+                && !v3Global.opt.isLibraryFile(nodep->fileline()->filename(), nodep->libname())
                 && !VN_IS(nodep, NotFoundModule) && !nodep->recursiveClone()
                 && !nodep->internal()) {
                 // We only complain once per file, otherwise library-like files
@@ -228,7 +248,7 @@ class LinkCellsVisitor final : public VNVisitor {
         UINFO(4, "Link IfaceRef: " << nodep);
         // Use findIdUpward instead of findIdFlat; it doesn't matter for now
         // but we might support modules-under-modules someday.
-        AstNodeModule* const modp = resolveModule(nodep, nodep->ifaceName());
+        AstNodeModule* const modp = resolveModule(nodep, nodep->ifaceName(), m_modp->libname());
         if (modp) {
             if (VN_IS(modp, Iface)) {
                 // Track module depths, so can sort list from parent down to children
@@ -259,7 +279,7 @@ class LinkCellsVisitor final : public VNVisitor {
         // Package Import: We need to do the package before the use of a package
         iterateChildren(nodep);
         if (!nodep->packagep()) {
-            AstNodeModule* const modp = resolveModule(nodep, nodep->pkgName());
+            AstNodeModule* const modp = resolveModule(nodep, nodep->pkgName(), m_modp->libname());
             if (AstPackage* const pkgp = VN_CAST(modp, Package)) nodep->packagep(pkgp);
             if (!nodep->packagep()) {
                 nodep->v3error("Export package not found: " << nodep->prettyPkgNameQ());
@@ -271,7 +291,7 @@ class LinkCellsVisitor final : public VNVisitor {
         // Package Import: We need to do the package before the use of a package
         iterateChildren(nodep);
         if (!nodep->packagep()) {
-            AstNodeModule* const modp = resolveModule(nodep, nodep->pkgName());
+            AstNodeModule* const modp = resolveModule(nodep, nodep->pkgName(), m_modp->libname());
             if (AstPackage* const pkgp = VN_CAST(modp, Package)) nodep->packagep(pkgp);
             // If not found, V3LinkDot will report errors
             if (!nodep->packagep()) {
@@ -289,7 +309,7 @@ class LinkCellsVisitor final : public VNVisitor {
         // this move to post param, which would mean we do not auto-read modules
         // and means we cannot compute module levels until later.
         UINFO(4, "Link Bind: " << nodep);
-        AstNodeModule* const modp = resolveModule(nodep, nodep->name());
+        AstNodeModule* const modp = resolveModule(nodep, nodep->name(), m_modp->libname());
         if (modp) {
             AstNode* const cellsp = nodep->cellsp()->unlinkFrBackWithNext();
             // Module may have already linked, so need to pick up these new cells
@@ -325,7 +345,7 @@ class LinkCellsVisitor final : public VNVisitor {
             UINFO(4, "Link Cell: " << nodep);
             // Use findIdFallback instead of findIdFlat; it doesn't matter for now
             // but we might support modules-under-modules someday.
-            AstNodeModule* cellmodp = resolveModule(nodep, nodep->modName());
+            AstNodeModule* cellmodp = resolveModule(nodep, nodep->modName(), m_modp->libname());
             if (cellmodp) {
                 if (cellmodp == m_modp || cellmodp->user2p() == m_modp) {
                     UINFO(1, "Self-recursive module " << cellmodp);
@@ -529,7 +549,7 @@ class LinkCellsVisitor final : public VNVisitor {
             if (pinp->name() == "") pinp->name("__paramNumber" + cvtToStr(pinp->pinNum()));
         }
         if (m_varp) {  // Parser didn't know what was interface, resolve now
-            AstNodeModule* const varModp = findModuleSym(nodep->name());
+            AstNodeModule* const varModp = findModuleSym(nodep->name(), m_modp->libname());
             if (AstIface* const ifacep = VN_CAST(varModp, Iface)) {
                 // Might be an interface, but might also not really be due to interface being
                 // hidden by another declaration.  Assume it is relevant and order as-if.
@@ -591,21 +611,26 @@ class LinkCellsVisitor final : public VNVisitor {
         // Look at all modules, and store pointers to all module names
         for (AstNodeModule *nextp, *nodep = v3Global.rootp()->modulesp(); nodep; nodep = nextp) {
             nextp = VN_AS(nodep->nextp(), NodeModule);
-            if (v3Global.opt.hierChild() && nodep->name() == hierIt->second.origName()) {
+            if (v3Global.opt.hierChild() && nodep->origName() == hierIt->second.origName()) {
                 nodep->name(hierIt->first);  // Change name of this module to be mangled name
                                              // considering parameter
             }
-            const AstNodeModule* const foundp = findModuleSym(nodep->name());
-            if (foundp && foundp != nodep) {
-                if (!(foundp->fileline()->warnIsOff(V3ErrorCode::MODDUP)
+            const AstNodeModule* const libFoundp = findModuleLibSym(nodep->origName(), nodep->libname());
+            const AstNodeModule* const globalFoundp = findModuleLibSym(nodep->name(), "__GLOBAL");
+            if (libFoundp && libFoundp == nodep) {
+                // Ok
+            } else if (libFoundp && !globalFoundp) {
+                nodep->v3fatalSrc("Module should be found globally if inserted in lib");
+            } else if (libFoundp) {
+                if (!(libFoundp->fileline()->warnIsOff(V3ErrorCode::MODDUP)
                       || nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP)
                       || hierBlocks.find(nodep->name()) != hierBlocks.end())) {
                     nodep->v3warn(MODDUP, "Duplicate declaration of module: "
                                               << nodep->prettyNameQ() << '\n'
                                               << nodep->warnContextPrimary() << '\n'
-                                              << foundp->warnOther()
+                                              << libFoundp->warnOther()
                                               << "... Location of original declaration\n"
-                                              << foundp->warnContextSecondary());
+                                              << libFoundp->warnContextSecondary());
                 }
                 if (VN_IS(nodep, Package)) {
                     // Packages may be imported, we instead rename to be unique
@@ -614,8 +639,16 @@ class LinkCellsVisitor final : public VNVisitor {
                     nodep->unlinkFrBack();
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 }
-            } else if (!foundp) {
-                m_mods.rootp()->insert(nodep->name(), new VSymEnt{&m_mods, nodep});
+            } else if (!libFoundp && globalFoundp && globalFoundp != nodep) {
+                // ...__LIB__ stripped by prettyName
+                const string newName = nodep->libname() + "__LIB__" + nodep->origName();
+                UINFO(9, "Module rename as in multiple libraries " << newName << " <- " << nodep);
+                insertModInLib(nodep->origName(), nodep->libname(), nodep);  // Original name
+                nodep->name(newName);
+                insertModInLib(nodep->name(), "__GLOBAL", nodep);
+            } else if (!libFoundp) {
+                insertModInLib(nodep->origName(), nodep->libname(), nodep);
+                insertModInLib(nodep->name(), "__GLOBAL", nodep);
             }
         }
         // if (debug() >= 9) m_mods.dump(cout, "-syms: ");
@@ -641,7 +674,9 @@ public:
         iterate(nodep);
     }
     ~LinkCellsVisitor() override {
-        if (debug() >= 5 || dumpGraphLevel() >= 5) { m_mods.dumpFilePrefixed("linkcells"); }
+        if (debug() >= 5 || dumpGraphLevel() >= 5) {
+            m_mods.dumpFilePrefixed("linkcells");
+        }
     }
 };
 
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 8f068d741..e5b834eb9 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -164,7 +164,7 @@ void V3LinkLevel::wrapTop(AstNetlist* rootp) {
         return;
     }
 
-    AstNodeModule* const newmodp = new AstModule{oldmodp->fileline(), "$root"};
+    AstNodeModule* const newmodp = new AstModule{oldmodp->fileline(), "$root", oldmodp->libname()};
     newmodp->name(AstNode::encodeName(newmodp->name()));  // so origName is nice
     // Make the new module first in the list
     oldmodp->unlinkFrBackWithNext();
diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp
index 85eb490f9..9694dc6c5 100644
--- a/src/V3LinkResolve.cpp
+++ b/src/V3LinkResolve.cpp
@@ -313,7 +313,8 @@ class LinkResolveVisitor final : public VNVisitor {
                         nodep->v3warn(E_UNSUPPORTED, "Unsupported: %l in $fscanf");
                         fmt = "";
                     }
-                    if (m_modp) fmt = VString::quotePercent(m_modp->prettyName());
+                    if (m_modp)
+                        fmt = AstNode::prettyName(m_modp->libname()) + "." + m_modp->prettyName();
                     break;
                 default:  // Most operators, just move to next argument
                     if (!V3Number::displayedFmtLegal(ch, isScan)) {
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 257b1c7fe..e0916c629 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -380,10 +380,12 @@ bool V3Options::isFuture0(const string& flag) const {
 bool V3Options::isFuture1(const string& flag) const {
     return m_future1s.find(flag) != m_future1s.end();
 }
-bool V3Options::isLibraryFile(const string& filename) const {
-    return m_libraryFiles.find(filename) != m_libraryFiles.end();
+bool V3Options::isLibraryFile(const string& filename, const string& libname) const {
+    return m_libraryFiles.find({filename, libname}) != m_libraryFiles.end();
+}
+void V3Options::addLibraryFile(const string& filename, const string& libname) {
+    m_libraryFiles.insert({filename, libname});
 }
-void V3Options::addLibraryFile(const string& filename) { m_libraryFiles.insert(filename); }
 bool V3Options::isClocker(const string& signame) const {
     return m_clockers.find(signame) != m_clockers.end();
 }
@@ -392,12 +394,14 @@ bool V3Options::isNoClocker(const string& signame) const {
     return m_noClockers.find(signame) != m_noClockers.end();
 }
 void V3Options::addNoClocker(const string& signame) { m_noClockers.insert(signame); }
-void V3Options::addVFile(const string& filename) {
+void V3Options::addVFile(const string& filename, const string& libname) {
     // We use a list for v files, because it's legal to have includes
     // in a specific order and multiple of them.
-    m_vFiles.push_back(filename);
+    m_vFiles.push_back({filename, libname});
+}
+void V3Options::addVltFile(const string& filename, const string& libname) {
+    m_vltFiles.insert({filename, libname});
 }
-void V3Options::addVltFile(const string& filename) { m_vltFiles.insert(filename); }
 void V3Options::addForceInc(const string& filename) { m_forceIncs.push_back(filename); }
 
 void V3Options::addLineArg(const string& arg) { m_impp->m_lineArgs.push_back(arg); }
@@ -416,7 +420,7 @@ string V3Options::allArgsString() const VL_MT_SAFE {
 // Delete some options for Verilation of the hierarchical blocks.
 string V3Options::allArgsStringForHierBlock(bool forTop) const {
     std::set<string> vFiles;
-    for (const auto& vFile : m_vFiles) vFiles.insert(vFile);
+    for (const auto& vFile : m_vFiles) vFiles.insert(vFile.filename());
     string out;
     bool stripArg = false;
     bool stripArgIfNum = false;
@@ -1058,16 +1062,16 @@ void V3Options::parseOpts(FileLine* fl, int argc, char** argv) VL_MT_DISABLED {
 
     // Default certain options and error check
     // Detailed error, since this is what we often get when run with minimal arguments
-    const V3StringList& vFilesList = vFiles();
-    if (vFilesList.empty()) {
+    if (vFiles().empty()) {
         v3fatal("verilator: No Input Verilog file specified on command line, "
                 "see verilator --help for more information\n");
     }
 
     // Default prefix to the filename
     if (prefix() == "" && topModule() != "") m_prefix = "V"s + AstNode::encodeName(topModule());
-    if (prefix() == "" && vFilesList.size() >= 1)
-        m_prefix = "V"s + AstNode::encodeName(V3Os::filenameNonDirExt(*(vFilesList.begin())));
+    if (prefix() == "" && vFiles().size() >= 1)
+        m_prefix
+            = "V"s + AstNode::encodeName(V3Os::filenameNonDirExt(vFiles().begin()->filename()));
     if (modPrefix() == "") m_modPrefix = prefix();
 
     // Find files in makedir
@@ -1386,8 +1390,9 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
         m_hierBlocks.emplace(opt.mangledName(), opt);
     });
     DECL_OPTION("-hierarchical-child", Set, &m_hierChild);
-    DECL_OPTION("-hierarchical-params-file", CbVal,
-                [this](const char* optp) { m_hierParamsFile = optp; });
+    DECL_OPTION("-hierarchical-params-file", CbVal, [this](const char* optp) {
+        m_hierParamsFile.push_back({optp, work()});
+    });
 
     DECL_OPTION("-I", CbPartialMatch,
                 [this, &optdir](const char* optp) { addIncDirUser(parseFileArg(optdir, optp)); });
@@ -1699,7 +1704,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
         std::exit(0);
     });
     DECL_OPTION("-v", CbVal, [this, &optdir](const char* valp) {
-        V3Options::addLibraryFile(parseFileArg(optdir, valp));
+        V3Options::addLibraryFile(parseFileArg(optdir, valp), work());
     });
     DECL_OPTION("-valgrind", CbCall, []() {});  // Processed only in bin/verilator shell
     DECL_OPTION("-verilate", OnOff, &m_verilate);
@@ -1762,6 +1767,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     DECL_OPTION("-Wno-style", CbCall, []() { FileLine::globalWarnStyleOff(true); });
     DECL_OPTION("-Wno-UNUSED", CbCall, []() { FileLine::globalWarnUnusedOff(true); });
     DECL_OPTION("-Wno-WIDTH", CbCall, []() { FileLine::globalWarnOff(V3ErrorCode::WIDTH, true); });
+    DECL_OPTION("-work", Set, &m_work);
     DECL_OPTION("-Wpedantic", CbCall, [this]() {
         m_pedantic = true;
         V3Error::pretendError(V3ErrorCode::ASSIGNIN, false);
@@ -1888,9 +1894,9 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
                        || suffixed(filename, ".so")) {
                 V3Options::addLdLibs(filename);
             } else if (suffixed(filename, ".vlt")) {
-                V3Options::addVltFile(filename);
+                V3Options::addVltFile(filename, work());
             } else {
-                V3Options::addVFile(filename);
+                V3Options::addVFile(filename, work());
             }
             ++i;
         }
diff --git a/src/V3Options.h b/src/V3Options.h
index 8d5a2de1d..3ab444cee 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -59,6 +59,34 @@ constexpr bool operator==(const VOptionBool& lhs, const VOptionBool& rhs) {
 constexpr bool operator==(const VOptionBool& lhs, VOptionBool::en rhs) { return lhs.m_e == rhs; }
 constexpr bool operator==(VOptionBool::en lhs, const VOptionBool& rhs) { return lhs == rhs.m_e; }
 
+//######################################################################
+
+class VFileLibName final {
+    // Filename and libname pair
+    const string m_filename;  // Filename
+    const string m_libname;  // Libname
+public:
+    VFileLibName(const string& filename, const string& libname)
+        : m_filename{filename}
+        , m_libname{libname} {}
+    VFileLibName(const VFileLibName& rhs)
+        : m_filename{rhs.m_filename}
+        , m_libname{rhs.m_libname} {}
+    string filename() const { return m_filename; }
+    string libname() const { return m_libname; }
+    bool operator==(const VFileLibName& rhs) const {
+        return m_filename == rhs.m_filename && m_libname == rhs.m_libname;
+    }
+    bool operator<(const VFileLibName& rhs) const {
+        if (m_filename < rhs.m_filename) return true;
+        if (m_filename > rhs.m_filename) return false;
+        return m_libname < rhs.m_libname;
+    }
+};
+
+using VFileLibList = std::vector<VFileLibName>;
+using VFileLibSet = std::set<VFileLibName>;
+
 // ######################################################################
 
 class VTimescale final {
@@ -207,11 +235,11 @@ private:
     V3StringSet m_futures;      // argument: -Wfuture- list
     V3StringSet m_future0s;     // argument: -future list
     V3StringSet m_future1s;     // argument: -future1 list
-    V3StringSet m_libraryFiles; // argument: Verilog -v files
+    VFileLibSet m_libraryFiles; // argument: Verilog -v files
     V3StringSet m_clockers;     // argument: Verilog -clk signals
     V3StringSet m_noClockers;   // argument: Verilog -noclk signals
-    V3StringList m_vFiles;      // argument: Verilog files to read
-    V3StringSet m_vltFiles;     // argument: Verilator config files to read
+    VFileLibList m_vFiles;      // argument: Verilog files to read
+    VFileLibSet m_vltFiles;     // argument: Verilator config files to read
     V3StringList m_forceIncs;   // argument: -FI
     DebugLevelMap m_debugLevel; // argument: --debugi-<srcfile/tag> <level>
     DebugLevelMap m_dumpLevel;  // argument: --dumpi-<srcfile/tag> <level>
@@ -359,7 +387,7 @@ private:
     string      m_diagnosticsSarifOutput;  // main switch: --diagnostics-sarif-output
     string      m_exeName;      // main switch: -o {name}
     string      m_flags;        // main switch: -f {name}
-    string      m_hierParamsFile; // main switch: --hierarchical-params-file
+    VFileLibList m_hierParamsFile; // main switch: --hierarchical-params-file
     string      m_jsonOnlyOutput;    // main switch: --json-only-output
     string      m_jsonOnlyMetaOutput;    // main switch: --json-only-meta-output
     string      m_l2Name;       // main switch: --l2name; "" for top-module's name
@@ -373,6 +401,7 @@ private:
     string      m_topModule;    // main switch: --top-module
     string      m_unusedRegexp; // main switch: --unused-regexp
     string      m_waiverOutput;  // main switch: --waiver-output {filename}
+    string      m_work = "work";  // main switch: --work {libname}
     string      m_xAssign;      // main switch: --x-assign
     string      m_xInitial;     // main switch: --x-initial
     string      m_xmlOutput;    // main switch: --xml-output
@@ -463,11 +492,11 @@ public:
     void addCompilerIncludes(const string& filename);
     void addLdLibs(const string& filename);
     void addMakeFlags(const string& filename);
-    void addLibraryFile(const string& filename);
+    void addLibraryFile(const string& filename, const string& libname);
     void addClocker(const string& signame);
     void addNoClocker(const string& signame);
-    void addVFile(const string& filename);
-    void addVltFile(const string& filename);
+    void addVFile(const string& filename, const string& libname);
+    void addVltFile(const string& filename, const string& libname);
     void addForceInc(const string& filename);
     bool available() const VL_MT_SAFE { return m_available; }
     void ccSet();
@@ -642,7 +671,7 @@ public:
                                                 : m_diagnosticsSarifOutput;
     }
     string exeName() const { return m_exeName != "" ? m_exeName : prefix(); }
-    string hierParamFile() const { return m_hierParamsFile; }
+    VFileLibList hierParamFile() const { return m_hierParamsFile; }
     string jsonOnlyOutput() const { return m_jsonOnlyOutput; }
     string jsonOnlyMetaOutput() const { return m_jsonOnlyMetaOutput; }
     string l2Name() const { return m_l2Name; }
@@ -668,6 +697,7 @@ public:
     bool noTraceTop() const { return m_noTraceTop; }
     string unusedRegexp() const { return m_unusedRegexp; }
     string waiverOutput() const { return m_waiverOutput; }
+    string work() const { return m_work; }
     bool isWaiverOutput() const { return !m_waiverOutput.empty(); }
     string xAssign() const { return m_xAssign; }
     string xInitial() const { return m_xInitial; }
@@ -678,9 +708,9 @@ public:
     const V3StringSet& compilerIncludes() const { return m_compilerIncludes; }
     const V3StringList& ldLibs() const { return m_ldLibs; }
     const V3StringList& makeFlags() const { return m_makeFlags; }
-    const V3StringSet& libraryFiles() const { return m_libraryFiles; }
-    const V3StringList& vFiles() const { return m_vFiles; }
-    const V3StringSet& vltFiles() const { return m_vltFiles; }
+    const VFileLibSet& libraryFiles() const { return m_libraryFiles; }
+    const VFileLibList& vFiles() const { return m_vFiles; }
+    const VFileLibSet& vltFiles() const { return m_vltFiles; }
     const V3StringList& forceIncs() const { return m_forceIncs; }
 
     bool hasParameter(const string& name);
@@ -690,7 +720,7 @@ public:
     bool isFuture(const string& flag) const;
     bool isFuture0(const string& flag) const;
     bool isFuture1(const string& flag) const;
-    bool isLibraryFile(const string& filename) const;
+    bool isLibraryFile(const string& filename, const string& libname) const;
     bool isClocker(const string& signame) const;
     bool isNoClocker(const string& signame) const;
 
diff --git a/src/V3Parse.h b/src/V3Parse.h
index f471f0136..6068988ed 100644
--- a/src/V3Parse.h
+++ b/src/V3Parse.h
@@ -43,7 +43,7 @@ public:
     // METHODS
     // Preprocess and read the Verilog file specified into the netlist database
     void parseFile(FileLine* fileline, const string& modname, bool inLibrary,
-                   const string& errmsg) VL_MT_DISABLED;
+                   const string& libname, const string& errmsg) VL_MT_DISABLED;
 
     // Push preprocessed text to the lexer
     static void ppPushText(V3ParseImp* impp, const string& text) VL_MT_DISABLED;
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index f1ba202b6..9150910f4 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -294,6 +294,7 @@ void V3ParseImp::preprocDumps(std::ostream& os, bool forInputs) {
 }
 
 void V3ParseImp::parseFile(FileLine* fileline, const string& modfilename, bool inLibrary,
+                           const string& libname,
                            const string& errmsg) {  // "" for no error, make fake node
     const string nondirname = V3Os::filenameNonDir(modfilename);
     const string modname = V3Os::filenameNonDirExt(modfilename);
@@ -303,13 +304,14 @@ void V3ParseImp::parseFile(FileLine* fileline, const string& modfilename, bool i
     m_lexFileline->newContent();
     m_bisonLastFileline = m_lexFileline;
     m_inLibrary = inLibrary;
+    m_libname = libname;
 
     // Preprocess into m_ppBuffer
     const bool ok = V3PreShell::preproc(fileline, modfilename, m_filterp, this, errmsg);
     if (!ok) {
         if (errmsg != "") return;  // Threw error already
         // Create fake node for later error reporting
-        AstNodeModule* const nodep = new AstNotFoundModule{fileline, modname};
+        AstNodeModule* const nodep = new AstNotFoundModule{fileline, modname, libname};
         v3Global.rootp()->addModulesp(nodep);
         return;
     }
@@ -745,8 +747,8 @@ V3Parse::~V3Parse() {  //
     VL_DO_CLEAR(delete m_impp, m_impp = nullptr);
 }
 void V3Parse::parseFile(FileLine* fileline, const string& modname, bool inLibrary,
-                        const string& errmsg) {
-    m_impp->parseFile(fileline, modname, inLibrary, errmsg);
+                        const string& libname, const string& errmsg) {
+    m_impp->parseFile(fileline, modname, inLibrary, libname, errmsg);
 }
 void V3Parse::ppPushText(V3ParseImp* impp, const string& text) {
     if (text != "") impp->ppPushText(text);
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index 9dededfdb..c87e182a5 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -150,6 +150,7 @@ class V3ParseImp final {
     FileLine* m_bisonLastFileline = nullptr;  // Filename/linenumber of last token
 
     bool m_inLibrary = false;  // Currently reading a library vs. regular file
+    string m_libname;  // Config library name (or --work)
     int m_lexKwdDepth = 0;  // Inside a `begin_keywords
     int m_lexKwdLast;  // Last LEX state in `begin_keywords
     VOptionBool m_unconnectedDrive;  // Last unconnected drive
@@ -254,6 +255,7 @@ public:
     // Return next token, for bison, since bison isn't class based, use a global THIS
     AstNetlist* rootp() const { return m_rootp; }
     bool inLibrary() const { return m_inLibrary; }
+    string libname() const { return m_libname; }
     VOptionBool unconnectedDrive() const { return m_unconnectedDrive; }
     void unconnectedDrive(const VOptionBool flag) { m_unconnectedDrive = flag; }
 
@@ -287,7 +289,7 @@ public:
     int tokenToBison() VL_MT_DISABLED;  // Pass token to bison
 
     void parseFile(FileLine* fileline, const string& modfilename, bool inLibrary,
-                   const string& errmsg) VL_MT_DISABLED;
+                   const string& libname, const string& errmsg) VL_MT_DISABLED;
     void dumpInputsFile() VL_MT_DISABLED;
     static void candidatePli(VSpellCheck* spellerp) VL_MT_DISABLED;
 
diff --git a/src/verilog.y b/src/verilog.y
index d627010ca..468036835 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -1250,7 +1250,7 @@ package_declaration:            // ==IEEE: package_declaration
 
 packageFront<nodeModulep>:
                 yPACKAGE lifetimeE idAny ';'
-                        { $$ = new AstPackage{$<fl>3, *$3};
+                        { $$ = new AstPackage{$<fl>3, *$3, PARSEP->libname()};
                           if ($$->name() == "std") {
                               if ($$->fileline()->filename() != V3Options::getStdPackagePath()) {
                                   $$->v3error("Redeclaring the 'std' package is not allowed");
@@ -1394,7 +1394,7 @@ modFront<nodeModulep>:
         //                      // General note: all *Front functions must call symPushNew before
         //                      // any formal arguments, as the arguments must land in the new scope.
                 yMODULE lifetimeE idAny
-                        { $$ = new AstModule{$<fl>3, *$3};
+                        { $$ = new AstModule{$<fl>3, *$3, PARSEP->libname()};
                           $$->lifetime($2);
                           $$->inLibrary(PARSEP->inLibrary() || $$->fileline()->celldefineOn());
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
@@ -1415,7 +1415,7 @@ importsAndParametersE<nodep>:   // IEEE: common part of module_declaration, inte
 
 udpFront<nodeModulep>:
                 yPRIMITIVE lifetimeE idAny
-                        { $$ = new AstPrimitive{$<fl>3, *$3};
+                        { $$ = new AstPrimitive{$<fl>3, *$3, PARSEP->libname()};
                           $$->inLibrary(true);
                           $$->lifetime($2);
                           $$->modTrace(false);
@@ -1685,7 +1685,7 @@ interface_declaration:          // IEEE: interface_declaration + interface_nonan
 
 intFront<nodeModulep>:
                 yINTERFACE lifetimeE idAny/*new_interface*/
-                        { $$ = new AstIface{$<fl>3, *$3};
+                        { $$ = new AstIface{$<fl>3, *$3, PARSEP->libname()};
                           $$->inLibrary(true);
                           $$->lifetime($2);
                           PARSEP->rootp()->addModulesp($$); }
@@ -1772,7 +1772,7 @@ program_declaration:            // IEEE: program_declaration + program_nonansi_h
 
 pgmFront<nodeModulep>:
                 yPROGRAM lifetimeE idAny/*new_program*/
-                        { $$ = new AstModule{$<fl>3, *$3, AstModule::Program{}};
+                        { $$ = new AstModule{$<fl>3, *$3, PARSEP->libname(), AstModule::Program{}};
                           $$->lifetime($2);
                           $$->inLibrary(PARSEP->inLibrary() || $$->fileline()->celldefineOn());
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
@@ -6792,7 +6792,7 @@ covergroup_declaration<nodep>:  // ==IEEE: covergroup_declaration
 
 covergroup_declarationFront<classp>:  // IEEE: part of covergroup_declaration
                 yCOVERGROUP idAny
-                        { $$ = new AstClass{$<fl>2, *$2};
+                        { $$ = new AstClass{$<fl>2, *$2, PARSEP->libname()};
                           BBCOVERIGN($<fl>1, "Ignoring unsupported: covergroup"); }
         ;
 
@@ -7196,7 +7196,7 @@ checker_declaration<nodeModulep>:  // ==IEEE: part of checker_declaration
 
 checkerFront<nodeModulep>:  // IEEE: part of checker_declaration
                 yCHECKER idAny/*checker_identifier*/
-                        { $$ = new AstModule{$<fl>2, *$2, AstModule::Checker{}};
+                        { $$ = new AstModule{$<fl>2, *$2, PARSEP->libname(), AstModule::Checker{}};
                           $$->modTrace(GRAMMARP->allTracingOn($$->fileline()));
                           $$->timeunit(PARSEP->timeLastUnit());
                           $$->unconnectedDrive(PARSEP->unconnectedDrive()); }
@@ -7327,14 +7327,14 @@ class_declaration<nodep>:       // ==IEEE: part of class_declaration
 classFront<classp>:             // IEEE: part of class_declaration
         //                      // IEEE 1800-2023: lifetimeE replaced with final_specifierE
                 classVirtualE yCLASS final_specifierE lifetimeE idAny/*class_identifier*/
-                        { $$ = new AstClass{$2, *$5};
+                        { $$ = new AstClass{$2, *$5, PARSEP->libname()};
                           $$->baseOverride($3);
                           $$->isVirtual($1);
                           v3Global.setHasClasses(); }
         //                      // IEEE: part of interface_class_declaration
         //                      // IEEE 1800-2023: lifetimeE removed
         |       yINTERFACE yCLASS idAny/*class_identifier*/
-                        { $$ = new AstClass{$2, *$3};
+                        { $$ = new AstClass{$2, *$3, PARSEP->libname()};
                           $$->isInterfaceClass(true);
                           v3Global.setHasClasses(); }
         ;
diff --git a/test_regress/t/t_config_work.out b/test_regress/t/t_config_work.out
new file mode 100644
index 000000000..0e99db9dd
--- /dev/null
+++ b/test_regress/t/t_config_work.out
@@ -0,0 +1,5 @@
+*-* All Finished *-*
+liba:m1 %m=t.u_1 %l=liba.m1
+liba:m3 %m=t.u_1.u_13 %l=liba.m3
+libb:m2 %m=t.u_2 %l=libb.m2
+libb:m3 %m=t.u_2.u_23 %l=libb.m3
diff --git a/test_regress/t/t_config_work.py b/test_regress/t/t_config_work.py
new file mode 100755
index 000000000..04abe3314
--- /dev/null
+++ b/test_regress/t/t_config_work.py
@@ -0,0 +1,22 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(
+    verilator_flags2=['--binary', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v'])
+
+test.execute()
+
+# Sort so that 'initial' scheduling order is not relevant
+test.files_identical_sorted(test.run_log_filename, test.golden_filename, is_logfile=True)
+
+test.passes()
diff --git a/test_regress/t/t_config_work.v b/test_regress/t/t_config_work.v
new file mode 100644
index 000000000..6f3705a76
--- /dev/null
+++ b/test_regress/t/t_config_work.v
@@ -0,0 +1,11 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+   m1 u_1();
+   m2 u_2();
+   final $write("*-* All Finished *-*\n");
+endmodule
diff --git a/test_regress/t/t_config_work__liba.v b/test_regress/t/t_config_work__liba.v
new file mode 100644
index 000000000..539d98c20
--- /dev/null
+++ b/test_regress/t/t_config_work__liba.v
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module m1;
+  m3 u_13();
+  initial $display("liba:m1 %%m=%m %%l=%l");
+endmodule
+
+module m3;  // Module name duplicated between libraries
+  initial $display("liba:m3 %%m=%m %%l=%l");
+endmodule
diff --git a/test_regress/t/t_config_work__libb.v b/test_regress/t/t_config_work__libb.v
new file mode 100644
index 000000000..b756b5fa5
--- /dev/null
+++ b/test_regress/t/t_config_work__libb.v
@@ -0,0 +1,14 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module m2;
+  m3 u_23();
+  initial $display("libb:m2 %%m=%m %%l=%l");
+endmodule
+
+module m3;  // Module name duplicated between libraries
+  initial $display("libb:m3 %%m=%m %%l=%l");
+endmodule
diff --git a/test_regress/t/t_display.out b/test_regress/t/t_display.out
index dee744f90..79cf4f30a 100644
--- a/test_regress/t/t_display.out
+++ b/test_regress/t/t_display.out
@@ -1,8 +1,8 @@
 [0] In top.t: Hi
-[0] In top.t.sub.write_m (sub)
-[0] In top.t.sub.write_m.subblock (sub)
-[0] In top.t.sub2.write_m (sub2)
-[0] In top.t.sub2.write_m.subblock2 (sub2)
+[0] In top.t.sub.write_m (work.sub)
+[0] In top.t.sub.write_m.subblock (work.sub)
+[0] In top.t.sub2.write_m (work.sub2)
+[0] In top.t.sub2.write_m.subblock2 (work.sub2)
 a: -0.4=> 0.4  0  0  0
 [0] Back \ Quote "
 [0] %b=000001100 %0b=1100  %b=00000101010111011101110111100110011001100 %0b=101010111011101110111100110011001100  %b=000001010101111000001001000110100010101100111100000010010001101000101011001111000 %0b=1010101111000001001000110100010101100111100000010010001101000101011001111000
diff --git a/test_regress/t/t_sys_sformat.v b/test_regress/t/t_sys_sformat.v
index ae1af86aa..564d66ec8 100644
--- a/test_regress/t/t_sys_sformat.v
+++ b/test_regress/t/t_sys_sformat.v
@@ -58,7 +58,7 @@ module t;
 
       $swrite(str2, "lib=%l");
 `ifdef TEST_VERBOSE  $display("chkl %0s",str2);  `endif
-      if (str2 !== "lib=t") $stop;
+      if (str2 !== "lib=work.t") $stop;
 
       str3 = $sformatf("u=%u", {"a","b","c","d"}); // Value selected so is printable
 `ifdef TEST_VERBOSE  $display("chku %s", str3);  `endif

From b27bd6526ab574b59a187af213c3af36d0639d5f Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Mon, 30 Jun 2025 01:00:56 +0000
Subject: [PATCH 186/211] Apply 'make format'

---
 src/V3LinkCells.cpp             | 7 +++----
 test_regress/t/t_config_work.py | 5 +++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index ed3d5872f..87934aa34 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -615,7 +615,8 @@ class LinkCellsVisitor final : public VNVisitor {
                 nodep->name(hierIt->first);  // Change name of this module to be mangled name
                                              // considering parameter
             }
-            const AstNodeModule* const libFoundp = findModuleLibSym(nodep->origName(), nodep->libname());
+            const AstNodeModule* const libFoundp
+                = findModuleLibSym(nodep->origName(), nodep->libname());
             const AstNodeModule* const globalFoundp = findModuleLibSym(nodep->name(), "__GLOBAL");
             if (libFoundp && libFoundp == nodep) {
                 // Ok
@@ -674,9 +675,7 @@ public:
         iterate(nodep);
     }
     ~LinkCellsVisitor() override {
-        if (debug() >= 5 || dumpGraphLevel() >= 5) {
-            m_mods.dumpFilePrefixed("linkcells");
-        }
+        if (debug() >= 5 || dumpGraphLevel() >= 5) { m_mods.dumpFilePrefixed("linkcells"); }
     }
 };
 
diff --git a/test_regress/t/t_config_work.py b/test_regress/t/t_config_work.py
index 04abe3314..45a18e197 100755
--- a/test_regress/t/t_config_work.py
+++ b/test_regress/t/t_config_work.py
@@ -11,8 +11,9 @@ import vltest_bootstrap
 
 test.scenarios('simulator')
 
-test.compile(
-    verilator_flags2=['--binary', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v'])
+test.compile(verilator_flags2=[
+    '--binary', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v'
+])
 
 test.execute()
 

From db854fc3d229c8b9fb0bda637ee5315f05406c5e Mon Sep 17 00:00:00 2001
From: Tobias Rosenkranz <trosenkranz@users.noreply.github.com>
Date: Mon, 30 Jun 2025 14:04:18 +0200
Subject: [PATCH 187/211] Improve docker image size (#6139)

---
 Changes                  | 1 +
 ci/docker/run/Dockerfile | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index a2ba53512..3ef0a0cd5 100644
--- a/Changes
+++ b/Changes
@@ -35,6 +35,7 @@ Verilator 5.037 devel
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
+* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH, Germany]
 * Optimize DFG De Morgan patterns (#6090). [Geza Lore]
 * Optimize DFG variable elimination (#6091). [Geza Lore]
 * Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
diff --git a/ci/docker/run/Dockerfile b/ci/docker/run/Dockerfile
index 24128ccc9..7f9ea5ff6 100644
--- a/ci/docker/run/Dockerfile
+++ b/ci/docker/run/Dockerfile
@@ -48,7 +48,8 @@ RUN git clone "${REPO}" verilator && \
     make && \
     make install && \
     cd .. && \
-    rm -r verilator
+    rm -r verilator && \
+    ccache -C
 
 COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh
 

From d455ec6229e638827d007b8701b62b24761d214c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 30 Jun 2025 18:33:50 -0400
Subject: [PATCH 188/211] Fix `specparam` PATHPULSE broken recent commit
 (#6142).

---
 Changes            | 2 +-
 src/V3ParseImp.cpp | 2 +-
 src/verilog.y      | 3 +++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/Changes b/Changes
index 3ef0a0cd5..8a57e0fa4 100644
--- a/Changes
+++ b/Changes
@@ -19,7 +19,7 @@ Verilator 5.037 devel
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
 * Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
-* Support `specparam` (#5767).
+* Support `specparam` (#5767) (#6142).
 * Support parameter forward types.
 * Support constant functions with left-hand-side concatenates.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 9150910f4..36d25f859 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -691,7 +691,7 @@ void V3ParseImp::tokenPipelineSym() {
     if (token == yaID__LEX || token == yaID__CC || token == yaID__aTYPE) {
         importIfInStd(yylval.fl, *(yylval.strp));
         if (token == yaID__LEX) {
-            if (VString::startsWith(*(yylval.strp), "PATHPULSE__024a")) {
+            if (VString::startsWith(*(yylval.strp), "PATHPULSE__024")) {
                 token = yaID__PATHPULSE;
             } else {
                 token = yaID__ETC;
diff --git a/src/verilog.y b/src/verilog.y
index 468036835..8de5f392e 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -5828,6 +5828,9 @@ specparam_assignment<varp>:     // ==IEEE: specparam_assignment
                         { $$ = VARDONEA($<fl>1, *$1, nullptr, $2);
                           if ($4) $$->valuep($4); }
         //                      //  IEEE: pulse_control_specparam
+        |       idPathpulse sigAttrListE '=' '(' minTypMax ')'
+                        { $$ = VARDONEA($<fl>1, *$1, nullptr, $2);
+                          if ($5) $$->valuep($5); }
         |       idPathpulse sigAttrListE '=' '(' minTypMax ',' minTypMax ')'
                         { $$ = VARDONEA($<fl>1, *$1, nullptr, $2);
                           if ($5) $$->valuep($5); }

From cd0f35fe6773e8e3286d961a7b9b4be3c6cfe7e5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Mon, 30 Jun 2025 20:30:27 -0400
Subject: [PATCH 189/211] Fix recursive module assertion, broken recent lib
 commit (#5891 partial fix)

---
 src/V3LinkCells.cpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index 87934aa34..0c2bb15b4 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -621,7 +621,9 @@ class LinkCellsVisitor final : public VNVisitor {
             if (libFoundp && libFoundp == nodep) {
                 // Ok
             } else if (libFoundp && !globalFoundp) {
-                nodep->v3fatalSrc("Module should be found globally if inserted in lib");
+                // Clones are locally made and don't need to user-resolve globally
+                UASSERT_OBJ(nodep->recursiveClone(), nodep,
+                            "Module should be found globally if inserted in lib");
             } else if (libFoundp) {
                 if (!(libFoundp->fileline()->warnIsOff(V3ErrorCode::MODDUP)
                       || nodep->fileline()->warnIsOff(V3ErrorCode::MODDUP)

From 9598ef9315b4c450faaf771f4e1e608a128edb59 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 1 Jul 2025 05:45:10 -0400
Subject: [PATCH 190/211] Internals: Avoid - in enum name

---
 src/V3Ast.h                              | 2 +-
 test_regress/t/t_randomize_method_with.v | 6 +++---
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/V3Ast.h b/src/V3Ast.h
index e7ae60bf6..20715688e 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1737,7 +1737,7 @@ public:
     };
     enum en m_e;
     const char* ascii() const {
-        static const char* const names[] = {"NONE", "RAND", "RANDC", "RAND-INLINE"};
+        static const char* const names[] = {"NONE", "RAND", "RANDC", "RAND_INLINE"};
         return names[m_e];
     }
     VRandAttr()
diff --git a/test_regress/t/t_randomize_method_with.v b/test_regress/t/t_randomize_method_with.v
index d6436baf2..29c8bb2b9 100644
--- a/test_regress/t/t_randomize_method_with.v
+++ b/test_regress/t/t_randomize_method_with.v
@@ -89,12 +89,12 @@ function automatic int return_2();
 endfunction
 
 class Cls;
-   rand int a;
-   rand int b;
+  rand int a;
+  rand int b;
 endclass
 
 class Cls2 extends Cls;
-   rand int c;
+  rand int c;
 endclass
 
 module mwith();

From 73da5e51a6ad131ad65ed18531445d137ad20313 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 1 Jul 2025 08:07:54 -0400
Subject: [PATCH 191/211] Commentary: Changes update

---
 Changes           | 5 +++--
 docs/spelling.txt | 2 ++
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/Changes b/Changes
index 8a57e0fa4..25f4c0d95 100644
--- a/Changes
+++ b/Changes
@@ -18,8 +18,9 @@ Verilator 5.037 devel
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
 * Support 1-bit params with -G and -pvalue (#6051) (#6082). [Paul Swirhun]
-* Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
 * Support `specparam` (#5767) (#6142).
+* Support `$timeformat` with missing arguments (#6113). [Alex Solomatnikov]
+* Support non-overlapping blocking/non-blocking assignments (#6137). [Geza Lore]
 * Support parameter forward types.
 * Support constant functions with left-hand-side concatenates.
 * Add PROCINITASSIGN on initial assignments to process variables (#2481). [Niraj Menon]
@@ -35,7 +36,7 @@ Verilator 5.037 devel
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
-* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH, Germany]
+* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH.]
 * Optimize DFG De Morgan patterns (#6090). [Geza Lore]
 * Optimize DFG variable elimination (#6091). [Geza Lore]
 * Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 192d4ea7d..a25ae9352 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -144,6 +144,7 @@ Gileadi
 Giri
 Gisselquist
 Gladkikh
+GmbH
 Goessling
 Gonnen
 Goorah
@@ -544,6 +545,7 @@ bindir
 biops
 bisonpre
 bitOpTree
+bitaggregat
 bitop
 bitstoreal
 blackbox

From e01580519407f9c6c00b22edcc2d7dbc0b3edfd3 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 1 Jul 2025 08:57:08 -0400
Subject: [PATCH 192/211] Fix stripping  on randomize (#6144 partial)

---
 src/V3Width.cpp | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index d3924d87a..8ebdac773 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -6300,7 +6300,10 @@ class WidthVisitor final : public VNVisitor {
             }
         }
         UASSERT_OBJ(nodep->taskp(), nodep, "Unlinked");
-        if (nodep->didWidth()) return;
+        if (nodep->didWidth()) {
+            nodep->addPinsp(withp);
+            return;
+        }
         if ((nodep->taskp()->classMethod() && !nodep->taskp()->isStatic())
             && !VN_IS(m_procedurep, InitialAutomatic)
             && (!m_ftaskp || !m_ftaskp->classMethod() || m_ftaskp->isStatic()) && !m_constraintp) {

From 7a3f1f16caaf2bdaf8e499e98820edcc289c6928 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Tue, 1 Jul 2025 22:55:08 +0100
Subject: [PATCH 193/211] Optimize DFG before V3Gate (#6141)

---
 docs/guide/exe_verilator.rst                  |   8 +-
 src/V3Dfg.cpp                                 |  87 ++++++++--
 src/V3Dfg.h                                   |  51 +++++-
 src/V3DfgAstToDfg.cpp                         | 164 +++++++++++++-----
 src/V3DfgDecomposition.cpp                    |  16 +-
 src/V3DfgDfgToAst.cpp                         |  89 +++++++---
 src/V3DfgOptimizer.cpp                        | 128 ++++++++------
 src/V3DfgPasses.cpp                           |  50 ++++--
 src/V3DfgPasses.h                             |   8 +-
 src/V3DfgPatternStats.h                       |   4 +-
 src/V3DfgPeephole.cpp                         |   4 +-
 src/V3DfgRegularize.cpp                       |   7 +-
 src/V3DfgVertices.h                           |  20 ++-
 src/V3Options.cpp                             |   3 +
 src/V3Options.h                               |   2 +
 src/Verilator.cpp                             |   5 +
 test_regress/t/t_dfg_peephole.py              |   2 +-
 .../t/t_dfg_stats_patterns_post_inline.py     |   2 +-
 .../t/t_dfg_stats_patterns_pre_inline.py      |   2 +-
 .../t/t_dfg_stats_patterns_scoped.out         |  50 ++++++
 test_regress/t/t_dfg_stats_patterns_scoped.py |  21 +++
 test_regress/t/t_hier_block_chained.py        |   4 +-
 test_regress/t/t_inst_tree_inl0_pub1.py       |   2 +-
 test_regress/t/t_inst_tree_inl1_pub0.py       |   3 +-
 test_regress/t/t_opt_const_dfg.py             |   2 +-
 test_regress/t/t_unopt_combo_bad.out          |   2 +-
 26 files changed, 555 insertions(+), 181 deletions(-)
 create mode 100644 test_regress/t/t_dfg_stats_patterns_scoped.out
 create mode 100755 test_regress/t/t_dfg_stats_patterns_scoped.py

diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 78c54f463..1ec9a8f3b 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -597,8 +597,8 @@ Summary:
 .. option:: -fno-dfg
 
    Rarely needed. Disable all use of the DFG-based combinational logic
-   optimizer.  Alias for :vlopt:`-fno-dfg-pre-inline` and
-   :vlopt:`-fno-dfg-post-inline`.
+   optimizer.  Alias for :vlopt:`-fno-dfg-pre-inline`,
+   :vlopt:`-fno-dfg-post-inline` and :vlopt:`-fno-dfg-scoped`.
 
 .. option:: -fno-dfg-peephole
 
@@ -616,6 +616,10 @@ Summary:
 
    Rarely needed. Do not apply the DFG optimizer before inlining.
 
+.. option:: -fno-dfg-scoped
+
+   Rarely needed. Do not apply the DFG optimizer across module scopes.
+
 .. option:: -fno-expand
 
 .. option:: -fno-func-opt
diff --git a/src/V3Dfg.cpp b/src/V3Dfg.cpp
index 7d6dede3d..3d037be60 100644
--- a/src/V3Dfg.cpp
+++ b/src/V3Dfg.cpp
@@ -26,8 +26,8 @@ VL_DEFINE_DEBUG_FUNCTIONS;
 // DfgGraph
 //------------------------------------------------------------------------------
 
-DfgGraph::DfgGraph(AstModule& module, const string& name)
-    : m_modulep{&module}
+DfgGraph::DfgGraph(AstModule* modulep, const string& name)
+    : m_modulep{modulep}
     , m_name{name} {}
 
 DfgGraph::~DfgGraph() {
@@ -69,14 +69,31 @@ std::string DfgGraph::makeUniqueName(const std::string& prefix, size_t n) {
     return "__Vdfg" + prefix + m_tmpNameStub + std::to_string(n);
 }
 
-DfgVertexVar* DfgGraph::makeNewVar(FileLine* flp, const std::string& name, AstNodeDType* dtypep) {
-    // Add AstVar to containing module
-    AstVar* const varp = new AstVar{flp, VVarType::MODULETEMP, name, dtypep};
-    modulep()->addStmtsp(varp);
+DfgVertexVar* DfgGraph::makeNewVar(FileLine* flp, const std::string& name, AstNodeDType* dtypep,
+                                   AstScope* scopep) {
+    UASSERT_OBJ(!!scopep != !!modulep(), flp,
+                "makeNewVar scopep should only be provided for a scoped DfgGraph");
 
-    // Create and return the corresponding variable vertex
-    if (VN_IS(varp->dtypeSkipRefp(), UnpackArrayDType)) return new DfgVarArray{*this, varp};
-    return new DfgVarPacked{*this, varp};
+    // Create AstVar
+    AstVar* const varp = new AstVar{flp, VVarType::MODULETEMP, name, dtypep};
+
+    if (scopep) {
+        // Add AstVar to the scope's module
+        scopep->modp()->addStmtsp(varp);
+        // Create AstVarScope
+        AstVarScope* const vscp = new AstVarScope{flp, scopep, varp};
+        // Add to scope
+        scopep->addVarsp(vscp);
+        // Create and return the corresponding variable vertex
+        if (VN_IS(varp->dtypeSkipRefp(), UnpackArrayDType)) return new DfgVarArray{*this, vscp};
+        return new DfgVarPacked{*this, vscp};
+    } else {
+        // Add AstVar to containing module
+        modulep()->addStmtsp(varp);
+        // Create and return the corresponding variable vertex
+        if (VN_IS(varp->dtypeSkipRefp(), UnpackArrayDType)) return new DfgVarArray{*this, varp};
+        return new DfgVarPacked{*this, varp};
+    }
 }
 
 static const string toDotId(const DfgVertex& vtx) { return '"' + cvtToHex(&vtx) + '"'; }
@@ -85,9 +102,10 @@ static const string toDotId(const DfgVertex& vtx) { return '"' + cvtToHex(&vtx)
 static void dumpDotVertex(std::ostream& os, const DfgVertex& vtx) {
 
     if (const DfgVarPacked* const varVtxp = vtx.cast<DfgVarPacked>()) {
+        AstNode* const nodep = varVtxp->nodep();
         AstVar* const varp = varVtxp->varp();
         os << toDotId(vtx);
-        os << " [label=\"" << varp->name() << "\nW" << varVtxp->width() << " / F"
+        os << " [label=\"" << nodep->name() << "\nW" << varVtxp->width() << " / F"
            << varVtxp->fanout() << '"';
 
         if (varp->direction() == VDirection::INPUT) {
@@ -112,10 +130,11 @@ static void dumpDotVertex(std::ostream& os, const DfgVertex& vtx) {
     }
 
     if (const DfgVarArray* const arrVtxp = vtx.cast<DfgVarArray>()) {
+        AstNode* const nodep = arrVtxp->nodep();
         AstVar* const varp = arrVtxp->varp();
         const int elements = VN_AS(arrVtxp->dtypep(), UnpackArrayDType)->elementsConst();
         os << toDotId(vtx);
-        os << " [label=\"" << varp->name() << "[" << elements << "]\"";
+        os << " [label=\"" << nodep->name() << "[" << elements << "]\"";
         if (varp->direction() == VDirection::INPUT) {
             os << ", shape=box3d, style=filled, fillcolor=chartreuse2";  // Green
         } else if (varp->direction() == VDirection::OUTPUT) {
@@ -299,7 +318,7 @@ void DfgGraph::dumpDotAllVarConesPrefixed(const string& label) const {
         if (!sinkp) return;
 
         // Open output file
-        const string coneName{prefix + sinkp->varp()->name()};
+        const string coneName{prefix + sinkp->nodep()->name()};
         const string fileName{v3Global.debugFilename(coneName) + ".dot"};
         const std::unique_ptr<std::ofstream> os{V3File::new_ofstream(fileName)};
         if (os->fail()) v3fatal("Can't write file: " << fileName);
@@ -476,7 +495,7 @@ DfgVarPacked* DfgVertex::getResultVar() {
             return;
         }
         // Prefer the one with the lexically smaller name
-        if (const int cmp = resp->varp()->name().compare(varp->varp()->name())) {
+        if (const int cmp = resp->nodep()->name().compare(varp->nodep()->name())) {
             if (cmp > 0) resp = varp;
             return;
         }
@@ -485,6 +504,38 @@ DfgVarPacked* DfgVertex::getResultVar() {
     return resp;
 }
 
+AstScope* DfgVertex::scopep(ScopeCache& cache, bool tryResultVar) VL_MT_DISABLED {
+    // If this is a variable, we are done
+    if (DfgVertexVar* const varp = this->cast<DfgVertexVar>()) return varp->varScopep()->scopep();
+
+    // Try the result var first if instructed (usully only in the recursive case)
+    if (tryResultVar) {
+        if (DfgVertexVar* const varp = this->getResultVar()) return varp->varScopep()->scopep();
+    }
+
+    // Look up cache
+    const auto pair = cache.emplace(this, nullptr);
+    if (pair.second) {
+        // Find scope based on sources, falling back on the root scope
+        AstScope* const rootp = v3Global.rootp()->topScopep()->scopep();
+        AstScope* foundp = rootp;
+        const auto edges = sourceEdges();
+        for (size_t i = 0; i < edges.second; ++i) {
+            DfgEdge& edge = edges.first[i];
+            foundp = edge.sourcep()->scopep(cache, true);
+            if (foundp != rootp) break;
+        }
+        pair.first->second = foundp;
+    }
+
+    // If the cache entry exists, but have not set the mapping yet, then we have a circualr graph
+    UASSERT_OBJ(pair.first->second, this,
+                "DfgVertex::scopep called on graph with circular operations");
+
+    // Done
+    return pair.first->second;
+}
+
 void DfgVertex::unlinkDelete(DfgGraph& dfg) {
     // Unlink source edges
     forEachSourceEdge([](DfgEdge& edge, size_t) { edge.unlinkSource(); });
@@ -521,15 +572,17 @@ V3Hash DfgSel::selfHash() const { return V3Hash{lsb()}; }
 // DfgVertexVar ----------
 
 bool DfgVertexVar::selfEquals(const DfgVertex& that) const {
-    UASSERT_OBJ(varp() != that.as<DfgVertexVar>()->varp(), this,
-                "There should only be one DfgVertexVar for a given AstVar");
+    UASSERT_OBJ(nodep()->type() == that.as<DfgVertexVar>()->nodep()->type(), this,
+                "Both DfgVertexVar should be scoped or unscoped");
+    UASSERT_OBJ(nodep() != that.as<DfgVertexVar>()->nodep(), this,
+                "There should only be one DfgVertexVar for a given AstVar or AstVarScope");
     return false;
 }
 
 V3Hash DfgVertexVar::selfHash() const {
     V3Hash hash;
-    hash += m_varp->name();
-    hash += m_varp->varType();
+    hash += nodep()->name();
+    hash += varp()->varType();
     return hash;
 }
 
diff --git a/src/V3Dfg.h b/src/V3Dfg.h
index a9b495a4e..e4df1e06a 100644
--- a/src/V3Dfg.h
+++ b/src/V3Dfg.h
@@ -203,16 +203,17 @@ public:
 
     // Return data type used to represent the type of 'nodep' when converted to a DfgVertex
     static AstNodeDType* dtypeFor(const AstNode* nodep) {
-        UDEBUGONLY(UASSERT_OBJ(isSupportedDType(nodep->dtypep()), nodep, "Unsupported dtype"););
+        const AstNodeDType* const dtypep = nodep->dtypep()->skipRefp();
+        UDEBUGONLY(UASSERT_OBJ(isSupportedDType(dtypep), nodep, "Unsupported dtype"););
         // For simplicity, all packed types are represented with a fixed type
-        if (AstUnpackArrayDType* const typep = VN_CAST(nodep->dtypep(), UnpackArrayDType)) {
+        if (const AstUnpackArrayDType* const typep = VN_CAST(dtypep, UnpackArrayDType)) {
             AstNodeDType* const adtypep = new AstUnpackArrayDType{
                 typep->fileline(), dtypeForWidth(typep->subDTypep()->width()),
                 typep->rangep()->cloneTree(false)};
             v3Global.rootp()->typeTablep()->addTypesp(adtypep);
             return adtypep;
         }
-        return dtypeForWidth(nodep->width());
+        return dtypeForWidth(dtypep->width());
     }
 
     // Source location
@@ -284,6 +285,18 @@ public:
     // or nullptr if no such variable exists in the graph. This is O(fanout).
     DfgVarPacked* getResultVar() VL_MT_DISABLED;
 
+    // Cache type for 'scopep' below
+    using ScopeCache = std::unordered_map<const DfgVertex*, AstScope*>;
+
+    // Retrieve the prefred AstScope this vertex belongs to. For variable
+    // vertices this is defined. For operation vertices, we try to find a
+    // scope based on variables in the upstream logic cone (inputs). If
+    // there isn't one, (beceuse the whole upstream cone is constant...),
+    // then the root scope is returned. If 'tryResultVar' is true, we will
+    // condier the scope of 'getResultVar' first, if it exists.
+    // Only call this with a scoped DfgGraph
+    AstScope* scopep(ScopeCache& cache, bool tryResultVar = false) VL_MT_DISABLED;
+
     // If the node has a single sink, return it, otherwise return nullptr
     DfgVertex* singleSink() const {
         return m_sinksp && !m_sinksp->m_nextp ? m_sinksp->m_sinkp : nullptr;
@@ -643,14 +656,15 @@ class DfgGraph final {
     size_t m_size = 0;  // Number of vertices in the graph
     uint32_t m_userCurrent = 0;  // Vertex user data generation number currently in use
     uint32_t m_userCnt = 0;  // Vertex user data generation counter
-    // Parent of the graph (i.e.: the module containing the logic represented by this graph).
+    // Parent of the graph (i.e.: the module containing the logic represented by this graph),
+    // or nullptr when run after V3Scope
     AstModule* const m_modulep;
     const std::string m_name;  // Name of graph - need not be unique
     std::string m_tmpNameStub{""};  // Name stub for temporary variables - computed lazy
 
 public:
     // CONSTRUCTOR
-    explicit DfgGraph(AstModule& module, const string& name = "") VL_MT_DISABLED;
+    explicit DfgGraph(AstModule* modulep, const string& name = "") VL_MT_DISABLED;
     ~DfgGraph() VL_MT_DISABLED;
     VL_UNCOPYABLE(DfgGraph);
 
@@ -662,7 +676,7 @@ public:
     inline void removeVertex(DfgVertex& vtx);
     // Number of vertices in this graph
     size_t size() const { return m_size; }
-    // Parent module
+    // Parent module - or nullptr when run after V3Scope
     AstModule* modulep() const { return m_modulep; }
     // Name of this graph
     const string& name() const { return m_name; }
@@ -699,8 +713,11 @@ public:
     // must be unique (as a pair) in each invocation for this graph.
     std::string makeUniqueName(const std::string& prefix, size_t n) VL_MT_DISABLED;
 
-    // Create a new variable with the given name and data type
-    DfgVertexVar* makeNewVar(FileLine*, const std::string& name, AstNodeDType*) VL_MT_DISABLED;
+    // Create a new variable with the given name and data type. For a Scoped
+    // Dfg, the AstScope where the corresponding AstVarScope will be inserted
+    // must be provided
+    DfgVertexVar* makeNewVar(FileLine*, const std::string& name, AstNodeDType*,
+                             AstScope*) VL_MT_DISABLED;
 
     // Split this graph into individual components (unique sub-graphs with no edges between them).
     // Also removes any vertices that are not weakly connected to any variable.
@@ -890,6 +907,24 @@ bool DfgVertex::isOnes() const {
     return false;
 }
 
+//------------------------------------------------------------------------------
+// Inline method definitions - for DfgVertexVar
+//------------------------------------------------------------------------------
+
+DfgVertexVar::DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVar* varp, uint32_t initialCapacity)
+    : DfgVertexVariadic{dfg, type, varp->fileline(), dtypeFor(varp), initialCapacity}
+    , m_varp{varp}
+    , m_varScopep{nullptr} {
+    UASSERT_OBJ(dfg.modulep(), varp, "Un-scoped DfgVertexVar created in scoped DfgGraph");
+}
+DfgVertexVar::DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVarScope* vscp,
+                           uint32_t initialCapacity)
+    : DfgVertexVariadic{dfg, type, vscp->fileline(), dtypeFor(vscp), initialCapacity}
+    , m_varp{vscp->varp()}
+    , m_varScopep{vscp} {
+    UASSERT_OBJ(!dfg.modulep(), vscp, "Scoped DfgVertexVar created in un-scoped DfgGraph");
+}
+
 //------------------------------------------------------------------------------
 // Inline method definitions - for DfgGraph
 //------------------------------------------------------------------------------
diff --git a/src/V3DfgAstToDfg.cpp b/src/V3DfgAstToDfg.cpp
index 7773d46ce..b0532ee95 100644
--- a/src/V3DfgAstToDfg.cpp
+++ b/src/V3DfgAstToDfg.cpp
@@ -69,6 +69,7 @@ DfgSliceSel* makeVertex<DfgSliceSel, AstSliceSel>(const AstSliceSel*, DfgGraph&)
 
 }  // namespace
 
+template <bool T_Scoped>
 class AstToDfgVisitor final : public VNVisitor {
     // NODE STATE
 
@@ -87,6 +88,9 @@ class AstToDfgVisitor final : public VNVisitor {
             , m_lsb{lsb} {}
     };
 
+    using RootType = std::conditional_t<T_Scoped, AstNetlist, AstModule>;
+    using VariableType = std::conditional_t<T_Scoped, AstVarScope, AstVar>;
+
     // STATE
 
     DfgGraph* const m_dfgp;  // The graph being built
@@ -98,14 +102,33 @@ class AstToDfgVisitor final : public VNVisitor {
     std::vector<DfgVarArray*> m_varArrayps;  // All the DfgVarArray vertices we created.
 
     // METHODS
+    static VariableType* getTarget(const AstVarRef* refp) {
+        // TODO: remove the useless reinterpret_casts when C++17 'if constexpr' actually works
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            return reinterpret_cast<VariableType*>(refp->varScopep());
+        } else {
+            return reinterpret_cast<VariableType*>(refp->varp());
+        }
+    }
+
+    static AstVar* getAstVar(VariableType* vp) {
+        // TODO: remove the useless reinterpret_casts when C++17 'if constexpr' actually works
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            return reinterpret_cast<AstVarScope*>(vp)->varp();
+        } else {
+            return reinterpret_cast<AstVar*>(vp);
+        }
+    }
+
     void markReferenced(AstNode* nodep) {
         nodep->foreach([this](const AstVarRef* refp) {
             // No need to (and in fact cannot) mark variables with unsupported dtypes
             if (!DfgVertex::isSupportedDType(refp->varp()->dtypep())) return;
+            VariableType* const tgtp = getTarget(refp);
             // Mark vertex as having a module reference outside current DFG
-            getNet(refp->varp())->setHasModRefs();
+            getNet(tgtp)->setHasModRefs();
             // Mark variable as written from non-DFG logic
-            if (refp->access().isWriteOrRW()) refp->varp()->user3(true);
+            if (refp->access().isWriteOrRW()) tgtp->user3(true);
         });
     }
 
@@ -116,24 +139,24 @@ class AstToDfgVisitor final : public VNVisitor {
         m_uncommittedVertices.clear();
     }
 
-    DfgVertexVar* getNet(AstVar* varp) {
-        if (!varp->user1p()) {
-            // Note DfgVertexVar vertices are not added to m_uncommittedVertices, because we
+    DfgVertexVar* getNet(VariableType* vp) {
+        if (!vp->user1p()) {
+            // vp DfgVertexVar vertices are not added to m_uncommittedVertices, because we
             // want to hold onto them via AstVar::user1p, and the AstVar might be referenced via
             // multiple AstVarRef instances, so we will never revert a DfgVertexVar once
             // created. We will delete unconnected variable vertices at the end.
-            if (VN_IS(varp->dtypep()->skipRefp(), UnpackArrayDType)) {
-                DfgVarArray* const vtxp = new DfgVarArray{*m_dfgp, varp};
-                varp->user1p();
+            if (VN_IS(vp->dtypep()->skipRefp(), UnpackArrayDType)) {
+                DfgVarArray* const vtxp = new DfgVarArray{*m_dfgp, vp};
+                vp->user1p();
                 m_varArrayps.push_back(vtxp);
-                varp->user1p(vtxp);
+                vp->user1p(vtxp);
             } else {
-                DfgVarPacked* const vtxp = new DfgVarPacked{*m_dfgp, varp};
+                DfgVarPacked* const vtxp = new DfgVarPacked{*m_dfgp, vp};
                 m_varPackedps.push_back(vtxp);
-                varp->user1p(vtxp);
+                vp->user1p(vtxp);
             }
         }
-        return varp->user1u().to<DfgVertexVar*>();
+        return vp->user1u().template to<DfgVertexVar*>();
     }
 
     DfgVertex* getVertex(AstNode* nodep) {
@@ -167,7 +190,7 @@ class AstToDfgVisitor final : public VNVisitor {
             visit(vrefp);
             // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
-            getVertex(vrefp)->as<DfgVarPacked>()->addDriver(flp, 0, vtxp);
+            getVertex(vrefp)->template as<DfgVarPacked>()->addDriver(flp, 0, vtxp);
             return true;
         }
         if (AstSel* const selp = VN_CAST(nodep, Sel)) {
@@ -181,7 +204,7 @@ class AstToDfgVisitor final : public VNVisitor {
             visit(vrefp);
             // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
-            getVertex(vrefp)->as<DfgVarPacked>()->addDriver(flp, lsbp->toUInt(), vtxp);
+            getVertex(vrefp)->template as<DfgVarPacked>()->addDriver(flp, lsbp->toUInt(), vtxp);
             return true;
         }
         if (AstArraySel* const selp = VN_CAST(nodep, ArraySel)) {
@@ -195,7 +218,7 @@ class AstToDfgVisitor final : public VNVisitor {
             visit(vrefp);
             // cppcheck-has-bug-suppress knownConditionTrueFalse
             if (m_foundUnhandled) return false;
-            getVertex(vrefp)->as<DfgVarArray>()->addDriver(flp, idxp->toUInt(), vtxp);
+            getVertex(vrefp)->template as<DfgVarArray>()->addDriver(flp, idxp->toUInt(), vtxp);
             return true;
         }
         if (AstConcat* const concatp = VN_CAST(nodep, Concat)) {
@@ -334,18 +357,21 @@ class AstToDfgVisitor final : public VNVisitor {
                     const uint32_t bEnd = b.m_lsb + bWidth;
                     const uint32_t overlapEnd = std::min(aEnd, bEnd) - 1;
 
-                    if (a.m_fileline->operatorCompare(*b.m_fileline) != 0) {
-                        varp->varp()->v3warn(  //
+                    if (a.m_fileline->operatorCompare(*b.m_fileline) != 0
+                        && !varp->varp()->isUsedLoopIdx()  // Loop index often abused, so suppress
+                    ) {
+                        AstNode* const vp = varp->varScopep()
+                                                ? static_cast<AstNode*>(varp->varScopep())
+                                                : static_cast<AstNode*>(varp->varp());
+                        vp->v3warn(  //
                             MULTIDRIVEN,
                             "Bits ["  //
                                 << overlapEnd << ":" << b.m_lsb << "] of signal "
-                                << varp->varp()->prettyNameQ()
-                                << " have multiple combinational drivers\n"
+                                << vp->prettyNameQ() << " have multiple combinational drivers\n"
                                 << a.m_fileline->warnOther() << "... Location of first driver\n"
                                 << a.m_fileline->warnContextPrimary() << '\n'
                                 << b.m_fileline->warnOther() << "... Location of other driver\n"
-                                << b.m_fileline->warnContextSecondary()
-                                << varp->varp()->warnOther()
+                                << b.m_fileline->warnContextSecondary() << vp->warnOther()
                                 << "... Only the first driver will be respected");
                     }
 
@@ -437,19 +463,55 @@ class AstToDfgVisitor final : public VNVisitor {
         m_foundUnhandled = true;
         markReferenced(nodep);
     }
+
+    void visit(AstNetlist* nodep) override { iterateAndNextNull(nodep->modulesp()); }
+    void visit(AstModule* nodep) override { iterateAndNextNull(nodep->stmtsp()); }
+    void visit(AstTopScope* nodep) override { iterate(nodep->scopep()); }
+    void visit(AstScope* nodep) override { iterateChildren(nodep); }
+    void visit(AstActive* nodep) override {
+        if (nodep->hasCombo()) {
+            iterateChildren(nodep);
+        } else {
+            markReferenced(nodep);
+        }
+    }
+
     void visit(AstCell* nodep) override { markReferenced(nodep); }
     void visit(AstNodeProcedure* nodep) override { markReferenced(nodep); }
-    void visit(AstVar* nodep) override {
-        if (nodep->isSc()) return;
-        // No need to (and in fact cannot) handle variables with unsupported dtypes
-        if (!DfgVertex::isSupportedDType(nodep->dtypep())) return;
 
-        // Mark variables with external references
-        if (nodep->isIO()  // Ports
-            || nodep->user2()  // Target of a hierarchical reference
-            || nodep->isForced()  // Forced
-        ) {
-            getNet(nodep)->setHasExtRefs();
+    void visit(AstVar* nodep) override {
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            return;
+        } else {
+            if (nodep->isSc()) return;
+            // No need to (and in fact cannot) handle variables with unsupported dtypes
+            if (!DfgVertex::isSupportedDType(nodep->dtypep())) return;
+
+            // Mark variables with external references
+            if (nodep->isIO()  // Ports
+                || nodep->user2()  // Target of a hierarchical reference
+                || nodep->isForced()  // Forced
+            ) {
+                getNet(reinterpret_cast<VariableType*>(nodep))->setHasExtRefs();
+            }
+        }
+    }
+
+    void visit(AstVarScope* nodep) override {
+        if VL_CONSTEXPR_CXX17 (!T_Scoped) {
+            return;
+        } else {
+            if (nodep->varp()->isSc()) return;
+            // No need to (and in fact cannot) handle variables with unsupported dtypes
+            if (!DfgVertex::isSupportedDType(nodep->dtypep())) return;
+
+            // Mark variables with external references
+            if (nodep->varp()->isIO()  // Ports
+                || nodep->user2()  // Target of a hierarchical reference
+                || nodep->varp()->isForced()  // Forced
+            ) {
+                getNet(reinterpret_cast<VariableType*>(nodep))->setHasExtRefs();
+            }
         }
     }
 
@@ -538,6 +600,17 @@ class AstToDfgVisitor final : public VNVisitor {
             return;
         }
 
+        // If the referenced variable is not in a regular module, then do not
+        // convert it. This is especially needed for variabels in interfaces
+        // which might be referenced via virtual intefaces, which cannot be
+        // resovled statically.
+        if (T_Scoped && !VN_IS(nodep->varScopep()->scopep()->modp(), Module)) {
+            markReferenced(nodep);
+            m_foundUnhandled = true;
+            ++m_ctx.m_nonRepVarRef;
+            return;
+        }
+
         // Sadly sometimes AstVarRef does not have the same dtype as the referenced variable
         if (!DfgVertex::isSupportedDType(nodep->varp()->dtypep())) {
             m_foundUnhandled = true;
@@ -545,7 +618,7 @@ class AstToDfgVisitor final : public VNVisitor {
             return;
         }
 
-        nodep->user1p(getNet(nodep->varp()));
+        nodep->user1p(getNet(getTarget(nodep)));
     }
 
     void visit(AstConst* nodep) override {
@@ -585,13 +658,22 @@ class AstToDfgVisitor final : public VNVisitor {
 // The rest of the 'visit' methods are generated by 'astgen'
 #include "V3Dfg__gen_ast_to_dfg.h"
 
+    static DfgGraph* makeDfg(RootType& root) {
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            return new DfgGraph{nullptr, "netlist"};
+        } else {
+            AstModule* const modp = VN_AS((AstNode*)&(root), Module);  // Remove this when C++17
+            return new DfgGraph{modp, modp->name()};
+        }
+    }
+
     // CONSTRUCTOR
-    explicit AstToDfgVisitor(AstModule& module, V3DfgOptimizationContext& ctx)
-        : m_dfgp{new DfgGraph{module, module.name()}}
+    explicit AstToDfgVisitor(RootType& root, V3DfgOptimizationContext& ctx)
+        : m_dfgp{makeDfg(root)}
         , m_ctx{ctx} {
         // Build the DFG
-        iterateChildren(&module);
-        UASSERT_OBJ(m_uncommittedVertices.empty(), &module, "Uncommitted vertices remain");
+        iterate(&root);
+        UASSERT_OBJ(m_uncommittedVertices.empty(), &root, "Uncommitted vertices remain");
 
         // Canonicalize variables
         canonicalizePacked();
@@ -599,11 +681,15 @@ class AstToDfgVisitor final : public VNVisitor {
     }
 
 public:
-    static DfgGraph* apply(AstModule& module, V3DfgOptimizationContext& ctx) {
-        return AstToDfgVisitor{module, ctx}.m_dfgp;
+    static DfgGraph* apply(RootType& root, V3DfgOptimizationContext& ctx) {
+        return AstToDfgVisitor{root, ctx}.m_dfgp;
     }
 };
 
 DfgGraph* V3DfgPasses::astToDfg(AstModule& module, V3DfgOptimizationContext& ctx) {
-    return AstToDfgVisitor::apply(module, ctx);
+    return AstToDfgVisitor</* T_Scoped: */ false>::apply(module, ctx);
+}
+
+DfgGraph* V3DfgPasses::astToDfg(AstNetlist& netlist, V3DfgOptimizationContext& ctx) {
+    return AstToDfgVisitor</* T_Scoped: */ true>::apply(netlist, ctx);
 }
diff --git a/src/V3DfgDecomposition.cpp b/src/V3DfgDecomposition.cpp
index a6b540763..cc9c3e76a 100644
--- a/src/V3DfgDecomposition.cpp
+++ b/src/V3DfgDecomposition.cpp
@@ -96,7 +96,7 @@ class SplitIntoComponents final {
         // Allocate the component graphs
         m_components.resize(m_componentCounter - 1);
         for (size_t i = 1; i < m_componentCounter; ++i) {
-            m_components[i - 1].reset(new DfgGraph{*m_dfg.modulep(), m_prefix + cvtToStr(i - 1)});
+            m_components[i - 1].reset(new DfgGraph{m_dfg.modulep(), m_prefix + cvtToStr(i - 1)});
         }
         // Move the vertices to the component graphs
         moveVertices(m_dfg.varVertices());
@@ -317,9 +317,17 @@ class ExtractCyclicComponents final {
         DfgVertexVar*& clonep = m_clones[&vtx][component];
         if (!clonep) {
             if (DfgVarPacked* const pVtxp = vtx.cast<DfgVarPacked>()) {
-                clonep = new DfgVarPacked{m_dfg, pVtxp->varp()};
+                if (AstVarScope* const vscp = pVtxp->varScopep()) {
+                    clonep = new DfgVarPacked{m_dfg, vscp};
+                } else {
+                    clonep = new DfgVarPacked{m_dfg, pVtxp->varp()};
+                }
             } else if (DfgVarArray* const aVtxp = vtx.cast<DfgVarArray>()) {
-                clonep = new DfgVarArray{m_dfg, aVtxp->varp()};
+                if (AstVarScope* const vscp = aVtxp->varScopep()) {
+                    clonep = new DfgVarArray{m_dfg, vscp};
+                } else {
+                    clonep = new DfgVarArray{m_dfg, aVtxp->varp()};
+                }
             }
             UASSERT_OBJ(clonep, &vtx, "Unhandled 'DfgVertexVar' sub-type");
             if (vtx.hasModRefs()) clonep->setHasModRefs();
@@ -466,7 +474,7 @@ class ExtractCyclicComponents final {
         // Allocate result graphs
         m_components.resize(m_nonTrivialSCCs);
         for (size_t i = 0; i < m_nonTrivialSCCs; ++i) {
-            m_components[i].reset(new DfgGraph{*m_dfg.modulep(), m_prefix + cvtToStr(i)});
+            m_components[i].reset(new DfgGraph{m_dfg.modulep(), m_prefix + cvtToStr(i)});
         }
 
         // Fix up edges crossing components (we can only do this at variable boundaries, and the
diff --git a/src/V3DfgDfgToAst.cpp b/src/V3DfgDfgToAst.cpp
index 410d98e48..f62f3f3a3 100644
--- a/src/V3DfgDfgToAst.cpp
+++ b/src/V3DfgDfgToAst.cpp
@@ -125,20 +125,57 @@ AstSliceSel* makeNode<AstSliceSel, DfgSliceSel, AstNodeExpr*, AstNodeExpr*, AstN
 
 }  // namespace
 
+template <bool T_Scoped>
 class DfgToAstVisitor final : DfgVisitor {
+    // NODE STATE
+
+    // AstScope::user1p  // The combinational AstActive under this scope
+    const VNUser1InUse m_user1InUse;
+
+    // TYPES
+    using VariableType = std::conditional_t<T_Scoped, AstVarScope, AstVar>;
+
     // STATE
 
-    AstModule* const m_modp;  // The parent/result module
+    AstModule* const m_modp;  // The parent/result module - This is nullptr when T_Scoped
     V3DfgOptimizationContext& m_ctx;  // The optimization context for stats
     AstNodeExpr* m_resultp = nullptr;  // The result node of the current traversal
-    // Map from DfgVertex to the AstVar holding the value of that DfgVertex after conversion
-    std::unordered_map<const DfgVertex*, AstVar*> m_resultVars;
-    // Map from an AstVar, to the canonical AstVar that can be substituted for that AstVar
-    std::unordered_map<AstVar*, AstVar*> m_canonVars;
-    V3UniqueNames m_tmpNames{"__VdfgTmp"};  // For generating temporary names
 
     // METHODS
 
+    static VariableType* getNode(const DfgVertexVar* vtxp) {
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            return reinterpret_cast<VariableType*>(vtxp->varScopep());
+        } else {
+            return reinterpret_cast<VariableType*>(vtxp->varp());
+        }
+    }
+
+    static AstActive* getCombActive(AstScope* scopep) {
+        if (!scopep->user1p()) {
+            // Try to find the existing combinational AstActive
+            for (AstNode* nodep = scopep->blocksp(); nodep; nodep = nodep->nextp()) {
+                AstActive* const activep = VN_CAST(nodep, Active);
+                if (!activep) continue;
+                if (activep->hasCombo()) {
+                    scopep->user1p(activep);
+                    break;
+                }
+            }
+            // If there isn't one, create a new one
+            if (!scopep->user1p()) {
+                FileLine* const flp = scopep->fileline();
+                AstSenTree* const senTreep
+                    = new AstSenTree{flp, new AstSenItem{flp, AstSenItem::Combo{}}};
+                AstActive* const activep = new AstActive{flp, "", senTreep};
+                activep->sensesStorep(senTreep);
+                scopep->addBlocksp(activep);
+                scopep->user1p(activep);
+            }
+        }
+        return VN_AS(scopep->user1p(), Active);
+    }
+
     AstNodeExpr* convertDfgVertexToAstNodeExpr(DfgVertex* vtxp) {
         UASSERT_OBJ(!m_resultp, vtxp, "Result already computed");
         UASSERT_OBJ(!vtxp->hasMultipleSinks() || vtxp->is<DfgVertexVar>()
@@ -151,8 +188,16 @@ class DfgToAstVisitor final : DfgVisitor {
         return resultp;
     }
 
-    void addResultEquation(FileLine* flp, AstNodeExpr* lhsp, AstNodeExpr* rhsp) {
-        m_modp->addStmtsp(new AstAssignW{flp, lhsp, rhsp});
+    void addResultEquation(const DfgVertexVar* vtxp, FileLine* flp, AstNodeExpr* lhsp,
+                           AstNodeExpr* rhsp) {
+        AstAssignW* const assignp = new AstAssignW{flp, lhsp, rhsp};
+        if VL_CONSTEXPR_CXX17 (T_Scoped) {
+            // Add it to the scope holding the target variable
+            getCombActive(vtxp->varScopep()->scopep())->addStmtsp(assignp);
+        } else {
+            // Add it to the parend module of the DfgGraph
+            m_modp->addStmtsp(assignp);
+        }
         ++m_ctx.m_resultEquations;
     }
 
@@ -160,9 +205,9 @@ class DfgToAstVisitor final : DfgVisitor {
         if (dfgVarp->isDrivenFullyByDfg()) {
             // Whole variable is driven. Render driver and assign directly to whole variable.
             FileLine* const flp = dfgVarp->driverFileLine(0);
-            AstVarRef* const lhsp = new AstVarRef{flp, dfgVarp->varp(), VAccess::WRITE};
+            AstVarRef* const lhsp = new AstVarRef{flp, getNode(dfgVarp), VAccess::WRITE};
             AstNodeExpr* const rhsp = convertDfgVertexToAstNodeExpr(dfgVarp->source(0));
-            addResultEquation(flp, lhsp, rhsp);
+            addResultEquation(dfgVarp, flp, lhsp, rhsp);
         } else {
             // Variable is driven partially. Render each driver as a separate assignment.
             dfgVarp->forEachSourceEdge([&](const DfgEdge& edge, size_t idx) {
@@ -171,12 +216,12 @@ class DfgToAstVisitor final : DfgVisitor {
                 AstNodeExpr* const rhsp = convertDfgVertexToAstNodeExpr(edge.sourcep());
                 // Create select LValue
                 FileLine* const flp = dfgVarp->driverFileLine(idx);
-                AstVarRef* const refp = new AstVarRef{flp, dfgVarp->varp(), VAccess::WRITE};
+                AstVarRef* const refp = new AstVarRef{flp, getNode(dfgVarp), VAccess::WRITE};
                 AstConst* const lsbp = new AstConst{flp, dfgVarp->driverLsb(idx)};
                 const int width = static_cast<int>(edge.sourcep()->width());
                 AstSel* const lhsp = new AstSel{flp, refp, lsbp, width};
                 // Add assignment of the value to the selected bits
-                addResultEquation(flp, lhsp, rhsp);
+                addResultEquation(dfgVarp, flp, lhsp, rhsp);
             });
         }
     }
@@ -189,11 +234,11 @@ class DfgToAstVisitor final : DfgVisitor {
             AstNodeExpr* const rhsp = convertDfgVertexToAstNodeExpr(edge.sourcep());
             // Create select LValue
             FileLine* const flp = dfgVarp->driverFileLine(idx);
-            AstVarRef* const refp = new AstVarRef{flp, dfgVarp->varp(), VAccess::WRITE};
+            AstVarRef* const refp = new AstVarRef{flp, getNode(dfgVarp), VAccess::WRITE};
             AstConst* const idxp = new AstConst{flp, dfgVarp->driverIndex(idx)};
             AstArraySel* const lhsp = new AstArraySel{flp, refp, idxp};
             // Add assignment of the value to the selected bits
-            addResultEquation(flp, lhsp, rhsp);
+            addResultEquation(dfgVarp, flp, lhsp, rhsp);
         });
     }
 
@@ -203,11 +248,11 @@ class DfgToAstVisitor final : DfgVisitor {
     }  // LCOV_EXCL_STOP
 
     void visit(DfgVarPacked* vtxp) override {
-        m_resultp = new AstVarRef{vtxp->fileline(), vtxp->varp(), VAccess::READ};
+        m_resultp = new AstVarRef{vtxp->fileline(), getNode(vtxp), VAccess::READ};
     }
 
     void visit(DfgVarArray* vtxp) override {
-        m_resultp = new AstVarRef{vtxp->fileline(), vtxp->varp(), VAccess::READ};
+        m_resultp = new AstVarRef{vtxp->fileline(), getNode(vtxp), VAccess::READ};
     }
 
     void visit(DfgConst* vtxp) override {  //
@@ -254,11 +299,13 @@ class DfgToAstVisitor final : DfgVisitor {
     }
 
 public:
-    static AstModule* apply(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
-        return DfgToAstVisitor{dfg, ctx}.m_modp;
-    }
+    static void apply(DfgGraph& dfg, V3DfgOptimizationContext& ctx) { DfgToAstVisitor{dfg, ctx}; }
 };
 
-AstModule* V3DfgPasses::dfgToAst(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
-    return DfgToAstVisitor::apply(dfg, ctx);
+void V3DfgPasses::dfgToAst(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
+    if (dfg.modulep()) {
+        DfgToAstVisitor</* T_Scoped: */ false>::apply(dfg, ctx);
+    } else {
+        DfgToAstVisitor</* T_Scoped: */ true>::apply(dfg, ctx);
+    }
 }
diff --git a/src/V3DfgOptimizer.cpp b/src/V3DfgOptimizer.cpp
index cf3a2393e..64c03fb80 100644
--- a/src/V3DfgOptimizer.cpp
+++ b/src/V3DfgOptimizer.cpp
@@ -236,75 +236,101 @@ void V3DfgOptimizer::extract(AstNetlist* netlistp) {
     V3Global::dumpCheckGlobalTree("dfg-extract", 0, dumpTreeEitherLevel() >= 3);
 }
 
+static void process(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
+    // Extract the cyclic sub-graphs. We do this because a lot of the optimizations assume a
+    // DAG, and large, mostly acyclic graphs could not be optimized due to the presence of
+    // small cycles.
+    const std::vector<std::unique_ptr<DfgGraph>>& cyclicComponents
+        = dfg.extractCyclicComponents("cyclic");
+
+    // Split the remaining acyclic DFG into [weakly] connected components
+    const std::vector<std::unique_ptr<DfgGraph>>& acyclicComponents
+        = dfg.splitIntoComponents("acyclic");
+
+    // Quick sanity check
+    UASSERT_OBJ(dfg.size() == 0, dfg.modulep(), "DfgGraph should have become empty");
+
+    // For each acyclic component
+    for (auto& component : acyclicComponents) {
+        if (dumpDfgLevel() >= 7) component->dumpDotFilePrefixed(ctx.prefix() + "source");
+        // Optimize the component
+        V3DfgPasses::optimize(*component, ctx);
+        // Add back under the main DFG (we will convert everything back in one go)
+        dfg.addGraph(*component);
+    }
+
+    // Eliminate redundant variables. Run this on the whole acyclic DFG. It needs to traverse
+    // the module/netlist to perform variable substitutions. Doing this by component would do
+    // redundant traversals and can be extremely slow when we have many components.
+    V3DfgPasses::eliminateVars(dfg, ctx.m_eliminateVarsContext);
+
+    // For each cyclic component
+    for (auto& component : cyclicComponents) {
+        if (dumpDfgLevel() >= 7) component->dumpDotFilePrefixed(ctx.prefix() + "source");
+        // Converting back to Ast assumes the 'regularize' pass was run, so we must run it
+        V3DfgPasses::regularize(*component, ctx.m_regularizeContext);
+        // Add back under the main DFG (we will convert everything back in one go)
+        dfg.addGraph(*component);
+    }
+}
+
 void V3DfgOptimizer::optimize(AstNetlist* netlistp, const string& label) {
     UINFO(2, __FUNCTION__ << ":");
 
     // NODE STATE
-    // AstVar::user1 -> Used by V3DfgPasses::astToDfg, V3DfgPasses::eliminateVars
+    // AstVar::user1 -> Used by:
+    //                    - V3DfgPasses::astToDfg,
+    //                    - V3DfgPasses::eliminateVars,
+    //                    - V3DfgPasses::dfgToAst,
     // AstVar::user2 -> bool: Flag indicating referenced by AstVarXRef (set just below)
-    // AstVar::user3 -> bool: Flag indicating written by logic not representable as DFG
+    // AstVar::user3, AstVarScope::user3
+    //               -> bool: Flag indicating written by logic not representable as DFG
     //                        (set by V3DfgPasses::astToDfg)
     const VNUser2InUse user2InUse;
     const VNUser3InUse user3InUse;
 
-    // Mark cross-referenced variables
-    netlistp->foreach([](const AstVarXRef* xrefp) { xrefp->varp()->user2(true); });
-
     V3DfgOptimizationContext ctx{label};
 
-    // Run the optimization phase
-    for (AstNode* nodep = netlistp->modulesp(); nodep; nodep = nodep->nextp()) {
-        // Only optimize proper modules
-        AstModule* const modp = VN_CAST(nodep, Module);
-        if (!modp) continue;
+    if (!netlistp->topScopep()) {
+        // Pre V3Scope application. Run on each module separately.
 
-        UINFO(4, "Applying DFG optimization to module '" << modp->name() << "'");
-        ++ctx.m_modules;
+        // Mark cross-referenced variables
+        netlistp->foreach([](const AstVarXRef* xrefp) { xrefp->varp()->user2(true); });
 
-        // Build the DFG of this module
-        const std::unique_ptr<DfgGraph> dfg{V3DfgPasses::astToDfg(*modp, ctx)};
+        // Run the optimization phase
+        for (AstNode* nodep = netlistp->modulesp(); nodep; nodep = nodep->nextp()) {
+            // Only optimize proper modules
+            AstModule* const modp = VN_CAST(nodep, Module);
+            if (!modp) continue;
+
+            UINFO(4, "Applying DFG optimization to module '" << modp->name() << "'");
+            ++ctx.m_modules;
+
+            // Build the DFG of this module
+            const std::unique_ptr<DfgGraph> dfg{V3DfgPasses::astToDfg(*modp, ctx)};
+            if (dumpDfgLevel() >= 8) dfg->dumpDotFilePrefixed(ctx.prefix() + "whole-input");
+
+            // Actually process the graph
+            process(*dfg, ctx);
+
+            // Convert back to Ast
+            if (dumpDfgLevel() >= 8) dfg->dumpDotFilePrefixed(ctx.prefix() + "whole-optimized");
+            V3DfgPasses::dfgToAst(*dfg, ctx);
+        }
+    } else {
+        // Post V3Scope application. Run on whole netlist.
+        UINFO(4, "Applying DFG optimization to entire netlist");
+
+        // Build the DFG of the whole design
+        const std::unique_ptr<DfgGraph> dfg{V3DfgPasses::astToDfg(*netlistp, ctx)};
         if (dumpDfgLevel() >= 8) dfg->dumpDotFilePrefixed(ctx.prefix() + "whole-input");
 
-        // Extract the cyclic sub-graphs. We do this because a lot of the optimizations assume a
-        // DAG, and large, mostly acyclic graphs could not be optimized due to the presence of
-        // small cycles.
-        const std::vector<std::unique_ptr<DfgGraph>>& cyclicComponents
-            = dfg->extractCyclicComponents("cyclic");
-
-        // Split the remaining acyclic DFG into [weakly] connected components
-        const std::vector<std::unique_ptr<DfgGraph>>& acyclicComponents
-            = dfg->splitIntoComponents("acyclic");
-
-        // Quick sanity check
-        UASSERT_OBJ(dfg->size() == 0, nodep, "DfgGraph should have become empty");
-
-        // For each acyclic component
-        for (auto& component : acyclicComponents) {
-            if (dumpDfgLevel() >= 7) component->dumpDotFilePrefixed(ctx.prefix() + "source");
-            // Optimize the component
-            V3DfgPasses::optimize(*component, ctx);
-            // Add back under the main DFG (we will convert everything back in one go)
-            dfg->addGraph(*component);
-        }
-
-        // Eliminate redundant variables. Run this on the whole acyclic DFG. It needs to traverse
-        // the module to perform variable substitutions. Doing this by component would do
-        // redundant traversals and can be extremely slow in large modules with many components.
-        V3DfgPasses::eliminateVars(*dfg, ctx.m_eliminateVarsContext);
-
-        // For each cyclic component
-        for (auto& component : cyclicComponents) {
-            if (dumpDfgLevel() >= 7) component->dumpDotFilePrefixed(ctx.prefix() + "source");
-            // Converting back to Ast assumes the 'regularize' pass was run, so we must run it
-            V3DfgPasses::regularize(*component, ctx.m_regularizeContext);
-            // Add back under the main DFG (we will convert everything back in one go)
-            dfg->addGraph(*component);
-        }
+        // Actually process the graph
+        process(*dfg, ctx);
 
         // Convert back to Ast
         if (dumpDfgLevel() >= 8) dfg->dumpDotFilePrefixed(ctx.prefix() + "whole-optimized");
-        AstModule* const resultModp = V3DfgPasses::dfgToAst(*dfg, ctx);
-        UASSERT_OBJ(resultModp == modp, modp, "Should be the same module");
+        V3DfgPasses::dfgToAst(*dfg, ctx);
     }
 
     V3Global::dumpCheckGlobalTree("dfg-optimize", 0, dumpTreeEitherLevel() >= 3);
diff --git a/src/V3DfgPasses.cpp b/src/V3DfgPasses.cpp
index 19a226f4a..63130699e 100644
--- a/src/V3DfgPasses.cpp
+++ b/src/V3DfgPasses.cpp
@@ -232,6 +232,8 @@ void V3DfgPasses::removeUnused(DfgGraph& dfg) {
 }
 
 void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
+    UASSERT(dfg.modulep(), "binToOneHot only works with unscoped DfgGraphs for now");
+
     const auto userDataInUse = dfg.userDataInUse();
 
     // Structure to keep track of comparison details
@@ -372,7 +374,7 @@ void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
             DfgVarPacked* varp = srcp->getResultVar();
             if (!varp) {
                 const std::string name = dfg.makeUniqueName("BinToOneHot_Idx", nTables);
-                varp = dfg.makeNewVar(flp, name, idxDTypep)->as<DfgVarPacked>();
+                varp = dfg.makeNewVar(flp, name, idxDTypep, nullptr)->as<DfgVarPacked>();
                 varp->varp()->isInternal(true);
                 varp->addDriver(flp, 0, srcp);
             }
@@ -392,7 +394,8 @@ void V3DfgPasses::binToOneHot(DfgGraph& dfg, V3DfgBinToOneHotContext& ctx) {
         // The table variable
         DfgVarArray* const tabVtxp = [&]() {
             const std::string name = dfg.makeUniqueName("BinToOneHot_Tab", nTables);
-            DfgVarArray* const varp = dfg.makeNewVar(flp, name, tabDTypep)->as<DfgVarArray>();
+            DfgVarArray* const varp
+                = dfg.makeNewVar(flp, name, tabDTypep, nullptr)->as<DfgVarArray>();
             varp->varp()->isInternal(true);
             varp->varp()->noReset(true);
             varp->setHasModRefs();
@@ -496,9 +499,10 @@ void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
         workListp = &vtx;
     };
 
-    // List of variables we are replacing
-    std::vector<AstVar*> replacedVariables;
+    // List of variables (AstVar or AstVarScope) we are replacing
+    std::vector<AstNode*> replacedVariables;
     // AstVar::user1p() : AstVar* -> The replacement variables
+    // AstVarScope::user1p() : AstVarScope* -> The replacement variables
     const VNUser1InUse user1InUse;
 
     // Process the work list
@@ -541,7 +545,7 @@ void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
             // If it is only referenced in this DFG, it can be removed
             ++ctx.m_varsRemoved;
             varp->replaceWith(varp->source(0));
-            varp->varp()->unlinkFrBack()->deleteTree();
+            varp->nodep()->unlinkFrBack()->deleteTree();
         } else if (DfgVarPacked* const driverp = varp->source(0)->cast<DfgVarPacked>()) {
             // If it's driven from another variable, it can be replaced by that. However, we do not
             // want to propagate SystemC variables into the design.
@@ -549,9 +553,11 @@ void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
             // Mark it for replacement
             ++ctx.m_varsReplaced;
             UASSERT_OBJ(!varp->hasSinks(), varp, "Variable inlining should make this impossible");
-            UASSERT(!varp->varp()->user1p(), "Replacement already exists");
-            replacedVariables.emplace_back(varp->varp());
-            varp->varp()->user1p(driverp->varp());
+            // Grab the AstVar/AstVarScope
+            AstNode* const nodep = varp->nodep();
+            UASSERT_OBJ(!nodep->user1p(), nodep, "Replacement already exists");
+            replacedVariables.emplace_back(nodep);
+            nodep->user1p(driverp->nodep());
         } else {
             // Otherwise this *is* the canonical var
             continue;
@@ -566,16 +572,24 @@ void V3DfgPasses::eliminateVars(DfgGraph& dfg, V3DfgEliminateVarsContext& ctx) {
     // Job done if no replacements possible
     if (replacedVariables.empty()) return;
 
-    // Apply variable replacements in the module
-    VNDeleter deleter;
-    dfg.modulep()->foreach([&](AstVarRef* refp) {
-        AstVar* varp = refp->varp();
-        while (AstVar* const replacementp = VN_AS(varp->user1p(), Var)) varp = replacementp;
-        refp->varp(varp);
-    });
+    // Apply variable replacements
+    if (AstModule* const modp = dfg.modulep()) {
+        modp->foreach([&](AstVarRef* refp) {
+            AstVar* varp = refp->varp();
+            while (AstVar* const replacep = VN_AS(varp->user1p(), Var)) varp = replacep;
+            refp->varp(varp);
+        });
+    } else {
+        v3Global.rootp()->foreach([&](AstVarRef* refp) {
+            AstVarScope* vscp = refp->varScopep();
+            while (AstVarScope* const replacep = VN_AS(vscp->user1p(), VarScope)) vscp = replacep;
+            refp->varScopep(vscp);
+            refp->varp(vscp->varp());
+        });
+    }
 
     // Remove the replaced variables
-    for (AstVar* const varp : replacedVariables) varp->unlinkFrBack()->deleteTree();
+    for (AstNode* const nodep : replacedVariables) nodep->unlinkFrBack()->deleteTree();
 }
 
 void V3DfgPasses::optimize(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
@@ -599,7 +613,9 @@ void V3DfgPasses::optimize(DfgGraph& dfg, V3DfgOptimizationContext& ctx) {
     apply(3, "input           ", [&]() {});
     apply(4, "inlineVars      ", [&]() { inlineVars(dfg); });
     apply(4, "cse0            ", [&]() { cse(dfg, ctx.m_cseContext0); });
-    apply(4, "binToOneHot     ", [&]() { binToOneHot(dfg, ctx.m_binToOneHotContext); });
+    if (dfg.modulep()) {
+        apply(4, "binToOneHot     ", [&]() { binToOneHot(dfg, ctx.m_binToOneHotContext); });
+    }
     if (v3Global.opt.fDfgPeephole()) {
         apply(4, "peephole        ", [&]() { peephole(dfg, ctx.m_peepholeContext); });
         // We just did CSE above, so without peephole there is no need to run it again these
diff --git a/src/V3DfgPasses.h b/src/V3DfgPasses.h
index efb33a505..3893c5d67 100644
--- a/src/V3DfgPasses.h
+++ b/src/V3DfgPasses.h
@@ -117,12 +117,14 @@ namespace V3DfgPasses {
 // constructed DfgGraph.
 DfgGraph* astToDfg(AstModule&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
+// Same as above, but for the entire netlist, after V3Scope
+DfgGraph* astToDfg(AstNetlist&, V3DfgOptimizationContext&) VL_MT_DISABLED;
+
 // Optimize the given DfgGraph
 void optimize(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
-// Convert DfgGraph back into Ast, and insert converted graph back into its parent module.
-// Returns the parent module.
-AstModule* dfgToAst(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
+// Convert DfgGraph back into Ast, and insert converted graph back into the Ast.
+void dfgToAst(DfgGraph&, V3DfgOptimizationContext&) VL_MT_DISABLED;
 
 //===========================================================================
 // Intermediate/internal operations
diff --git a/src/V3DfgPatternStats.h b/src/V3DfgPatternStats.h
index 6163c7505..d9597d00b 100644
--- a/src/V3DfgPatternStats.h
+++ b/src/V3DfgPatternStats.h
@@ -28,7 +28,7 @@ class V3DfgPatternStats final {
     static constexpr uint32_t MAX_PATTERN_DEPTH = 4;
 
     std::map<std::string, std::string> m_internedConsts;  // Interned constants
-    std::map<const AstVar*, std::string> m_internedVars;  // Interned variables
+    std::map<const AstNode*, std::string> m_internedVars;  // Interned variables
     std::map<uint32_t, std::string> m_internedSelLsbs;  // Interned lsb value for selects
     std::map<uint32_t, std::string> m_internedWordWidths;  // Interned widths
     std::map<uint32_t, std::string> m_internedWideWidths;  // Interned widths
@@ -51,7 +51,7 @@ class V3DfgPatternStats final {
     }
 
     const std::string& internVar(const DfgVertexVar& vtx) {
-        const auto pair = m_internedVars.emplace(vtx.varp(), "v");
+        const auto pair = m_internedVars.emplace(vtx.nodep(), "v");
         if (pair.second) pair.first->second += toLetters(m_internedVars.size() - 1);
         return pair.first->second;
     }
diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index 5056e45b6..a1adf0af9 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -403,8 +403,8 @@ class V3DfgPeephole final : public DfgVisitor {
         // If both sides are variable references, order the side in some defined way. This
         // allows CSE to later merge 'a op b' with 'b op a'.
         if (lhsp->is<DfgVertexVar>() && rhsp->is<DfgVertexVar>()) {
-            AstVar* const lVarp = lhsp->as<DfgVertexVar>()->varp();
-            AstVar* const rVarp = rhsp->as<DfgVertexVar>()->varp();
+            AstNode* const lVarp = lhsp->as<DfgVertexVar>()->nodep();
+            AstNode* const rVarp = rhsp->as<DfgVertexVar>()->nodep();
             if (lVarp->name() > rVarp->name()) {
                 APPLYING(SWAP_VAR_IN_COMMUTATIVE_BINARY) {
                     Vertex* const replacementp = make<Vertex>(vtxp, rhsp, lhsp);
diff --git a/src/V3DfgRegularize.cpp b/src/V3DfgRegularize.cpp
index 0dd3e6da8..2b9c72b54 100644
--- a/src/V3DfgRegularize.cpp
+++ b/src/V3DfgRegularize.cpp
@@ -38,6 +38,10 @@ class DfgRegularize final {
         : m_dfg{dfg}
         , m_ctx{ctx} {
 
+        // Scope cache for below
+        const bool scoped = !dfg.modulep();
+        DfgVertex::ScopeCache scopeCache;
+
         // Ensure intermediate values used multiple times are written to variables
         for (DfgVertex& vtx : m_dfg.opVertices()) {
             const bool needsIntermediateVariable = [&]() {
@@ -71,8 +75,9 @@ class DfgRegularize final {
                 // Need to create an intermediate variable
                 const std::string name = m_dfg.makeUniqueName("Regularize", m_nTmps);
                 FileLine* const flp = vtx.fileline();
+                AstScope* const scopep = scoped ? vtx.scopep(scopeCache) : nullptr;
                 DfgVarPacked* const newp
-                    = m_dfg.makeNewVar(flp, name, vtx.dtypep())->as<DfgVarPacked>();
+                    = m_dfg.makeNewVar(flp, name, vtx.dtypep(), scopep)->as<DfgVarPacked>();
                 ++m_nTmps;
                 ++m_ctx.m_temporariesIntroduced;
                 // Replace vertex with the variable and add back driver
diff --git a/src/V3DfgVertices.h b/src/V3DfgVertices.h
index d4375d6e7..833c3c869 100644
--- a/src/V3DfgVertices.h
+++ b/src/V3DfgVertices.h
@@ -40,6 +40,7 @@
 
 class DfgVertexVar VL_NOT_FINAL : public DfgVertexVariadic {
     AstVar* const m_varp;  // The AstVar associated with this vertex (not owned by this vertex)
+    AstVarScope* const m_varScopep;  // The AstVarScope associated with this vertex (not owned)
     bool m_hasDfgRefs = false;  // This AstVar is referenced in a different DFG of the module
     bool m_hasModRefs = false;  // This AstVar is referenced outside the DFG, but in the module
     bool m_hasExtRefs = false;  // This AstVar is referenced from outside the module
@@ -48,14 +49,17 @@ class DfgVertexVar VL_NOT_FINAL : public DfgVertexVariadic {
     V3Hash selfHash() const final VL_MT_DISABLED;
 
 public:
-    DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVar* varp, uint32_t initialCapacity)
-        : DfgVertexVariadic{dfg, type, varp->fileline(), dtypeFor(varp), initialCapacity}
-        , m_varp{varp} {}
+    inline DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVar* varp, uint32_t initialCapacity);
+    inline DfgVertexVar(DfgGraph& dfg, VDfgType type, AstVarScope* vscp, uint32_t initialCapacity);
     ASTGEN_MEMBERS_DfgVertexVar;
 
     bool isDrivenByDfg() const { return arity() > 0; }
 
     AstVar* varp() const { return m_varp; }
+    AstVarScope* varScopep() const { return m_varScopep; }
+    AstNode* nodep() const {
+        return m_varScopep ? static_cast<AstNode*>(m_varScopep) : static_cast<AstNode*>(m_varp);
+    }
     bool hasDfgRefs() const { return m_hasDfgRefs; }
     void setHasDfgRefs() { m_hasDfgRefs = true; }
     bool hasModRefs() const { return m_hasModRefs; }
@@ -73,7 +77,7 @@ public:
         // Keep if public
         if (varp()->isSigPublic()) return true;
         // Keep if written in non-DFG code
-        if (varp()->user3()) return true;
+        if (nodep()->user3()) return true;
         // Otherwise it can be removed
         return false;
     }
@@ -181,7 +185,11 @@ class DfgVarArray final : public DfgVertexVar {
 public:
     DfgVarArray(DfgGraph& dfg, AstVar* varp)
         : DfgVertexVar{dfg, dfgType(), varp, 4u} {
-        UASSERT_OBJ(VN_IS(varp->dtypeSkipRefp(), UnpackArrayDType), varp, "Non array DfgVarArray");
+        UASSERT_OBJ(VN_IS(dtypep(), UnpackArrayDType), varp, "Non array DfgVarArray");
+    }
+    DfgVarArray(DfgGraph& dfg, AstVarScope* vscp)
+        : DfgVertexVar{dfg, dfgType(), vscp, 4u} {
+        UASSERT_OBJ(VN_IS(dtypep(), UnpackArrayDType), vscp, "Non array DfgVarArray");
     }
     ASTGEN_MEMBERS_DfgVarArray;
 
@@ -239,6 +247,8 @@ class DfgVarPacked final : public DfgVertexVar {
 public:
     DfgVarPacked(DfgGraph& dfg, AstVar* varp)
         : DfgVertexVar{dfg, dfgType(), varp, 1u} {}
+    DfgVarPacked(DfgGraph& dfg, AstVarScope* vscp)
+        : DfgVertexVar{dfg, dfgType(), vscp, 1u} {}
     ASTGEN_MEMBERS_DfgVarPacked;
 
     bool isDrivenFullyByDfg() const {
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index e0916c629..6c4f4fbe3 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -1331,6 +1331,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     DECL_OPTION("-fdfg", CbFOnOff, [this](bool flag) {
         m_fDfgPreInline = flag;
         m_fDfgPostInline = flag;
+        m_fDfgScoped = flag;
     });
     DECL_OPTION("-fdfg-peephole", FOnOff, &m_fDfgPeephole);
     DECL_OPTION("-fdfg-peephole-", CbPartialMatch, [this](const char* optp) {  //
@@ -1341,6 +1342,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
     });
     DECL_OPTION("-fdfg-pre-inline", FOnOff, &m_fDfgPreInline);
     DECL_OPTION("-fdfg-post-inline", FOnOff, &m_fDfgPostInline);
+    DECL_OPTION("-fdfg-scoped", FOnOff, &m_fDfgScoped);
     DECL_OPTION("-fexpand", FOnOff, &m_fExpand);
     DECL_OPTION("-ffunc-opt", CbFOnOff, [this](bool flag) {  //
         m_fFuncSplitCat = flag;
@@ -2182,6 +2184,7 @@ void V3Options::optimize(int level) {
     m_fDedupe = flag;
     m_fDfgPreInline = flag;
     m_fDfgPostInline = flag;
+    m_fDfgScoped = flag;
     m_fDeadAssigns = flag;
     m_fDeadCells = flag;
     m_fExpand = flag;
diff --git a/src/V3Options.h b/src/V3Options.h
index 3ab444cee..e70fbe4ad 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -423,6 +423,7 @@ private:
     bool m_fDfgPeephole = true; // main switch: -fno-dfg-peephole
     bool m_fDfgPreInline;    // main switch: -fno-dfg-pre-inline and -fno-dfg
     bool m_fDfgPostInline;   // main switch: -fno-dfg-post-inline and -fno-dfg
+    bool m_fDfgScoped;       // main switch: -fno-dfg-scoped and -fno-dfg
     bool m_fDeadAssigns;     // main switch: -fno-dead-assigns: remove dead assigns
     bool m_fDeadCells;   // main switch: -fno-dead-cells: remove dead cells
     bool m_fExpand;      // main switch: -fno-expand: expansion of C macros
@@ -737,6 +738,7 @@ public:
     bool fDfgPeephole() const { return m_fDfgPeephole; }
     bool fDfgPreInline() const { return m_fDfgPreInline; }
     bool fDfgPostInline() const { return m_fDfgPostInline; }
+    bool fDfgScoped() const { return m_fDfgScoped; }
     bool fDfgPeepholeEnabled(const std::string& name) const {
         return !m_fDfgPeepholeDisabled.count(name);
     }
diff --git a/src/Verilator.cpp b/src/Verilator.cpp
index 315c2c271..2af5b973a 100644
--- a/src/Verilator.cpp
+++ b/src/Verilator.cpp
@@ -405,6 +405,11 @@ static void process() {
             // forcing.
             V3Force::forceAll(v3Global.rootp());
 
+            if (v3Global.opt.fDfgScoped()) {
+                // Scoped DFG optimization
+                V3DfgOptimizer::optimize(v3Global.rootp(), "scoped");
+            }
+
             // Gate-based logic elimination; eliminate signals and push constant across cell
             // boundaries Instant propagation makes lots-o-constant reduction possibilities.
             if (v3Global.opt.fGate()) {
diff --git a/test_regress/t/t_dfg_peephole.py b/test_regress/t/t_dfg_peephole.py
index dcb2cae87..0466a34e1 100755
--- a/test_regress/t/t_dfg_peephole.py
+++ b/test_regress/t/t_dfg_peephole.py
@@ -96,7 +96,7 @@ def check(name):
     name = name.lower()
     name = re.sub(r'_', ' ', name)
     test.file_grep(test.obj_dir + "/obj_opt/Vopt__stats.txt",
-                   r'DFG\s+(pre|post) inline Peephole, ' + name + r'\s+([1-9]\d*)')
+                   r'DFG\s+(pre inline|post inline|scoped) Peephole, ' + name + r'\s+([1-9]\d*)')
 
 
 # Check all optimizations defined in
diff --git a/test_regress/t/t_dfg_stats_patterns_post_inline.py b/test_regress/t/t_dfg_stats_patterns_post_inline.py
index 0813e38de..329b7557b 100755
--- a/test_regress/t/t_dfg_stats_patterns_post_inline.py
+++ b/test_regress/t/t_dfg_stats_patterns_post_inline.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('vlt')
 test.top_filename = "t/t_dfg_stats_patterns.v"
 
-test.compile(verilator_flags2=["--stats --no-skip-identical -fno-dfg-pre-inline"])
+test.compile(verilator_flags2=["--stats --no-skip-identical -fno-dfg-pre-inline -fno-dfg-scoped"])
 
 fn = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "__stats_dfg_patterns*")
 test.files_identical(fn, test.golden_filename)
diff --git a/test_regress/t/t_dfg_stats_patterns_pre_inline.py b/test_regress/t/t_dfg_stats_patterns_pre_inline.py
index 4fac195a5..bd1a3ca67 100755
--- a/test_regress/t/t_dfg_stats_patterns_pre_inline.py
+++ b/test_regress/t/t_dfg_stats_patterns_pre_inline.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('vlt')
 test.top_filename = "t/t_dfg_stats_patterns.v"
 
-test.compile(verilator_flags2=["--stats --no-skip-identical -fno-dfg-post-inline"])
+test.compile(verilator_flags2=["--stats --no-skip-identical -fno-dfg-post-inline -fno-dfg-scoped"])
 
 fn = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "__stats_dfg_patterns*")
 test.files_identical(fn, test.golden_filename)
diff --git a/test_regress/t/t_dfg_stats_patterns_scoped.out b/test_regress/t/t_dfg_stats_patterns_scoped.out
new file mode 100644
index 000000000..cf35ac494
--- /dev/null
+++ b/test_regress/t/t_dfg_stats_patterns_scoped.out
@@ -0,0 +1,50 @@
+DFG 'scoped' patterns with depth 1
+            3 (NOT vA:a)*:a
+            2 (AND _A:a _B:a):a
+            2 (REPLICATE _A:a cA:a)*:b
+            1 (AND _A:a _B:a)*:a
+            1 (CONCAT '0:a _A:b):A
+            1 (NOT _A:a):a
+            1 (REPLICATE _A:1 cA:a)*:b
+            1 (REPLICATE _A:a cA:b)*:b
+            1 (REPLICATE _A:a cA:b)*:c
+            1 (SEL@0 _A:a):1
+            1 (SEL@0 _A:a):b
+            1 (SEL@A _A:a):1
+
+DFG 'scoped' patterns with depth 2
+            2 (AND (NOT vA:a)*:a (NOT vB:a)*:a):a
+            1 (AND (NOT vA:a)*:a (NOT vB:a)*:a)*:a
+            1 (CONCAT '0:a (REPLICATE _A:a cA:a)*:b):A
+            1 (NOT (REPLICATE _A:a cA:b)*:b):b
+            1 (REPLICATE (NOT _A:a):a cA:a)*:b
+            1 (REPLICATE (REPLICATE _A:1 cA:a)*:b cB:a)*:c
+            1 (REPLICATE (REPLICATE _A:a cA:b)*:b cA:b)*:c
+            1 (REPLICATE (REPLICATE _A:a cA:b)*:c cA:b)*:b
+            1 (REPLICATE (SEL@A _A:a):1 cA:b)*:c
+            1 (SEL@0 (AND _A:a _B:a)*:a):1
+            1 (SEL@0 (REPLICATE _A:a cA:a)*:b):c
+            1 (SEL@A (AND _A:a _B:a)*:a):1
+
+DFG 'scoped' patterns with depth 3
+            1 (CONCAT '0:a (REPLICATE (REPLICATE _A:b cA:a)*:a cA:a)*:c):A
+            1 (NOT (REPLICATE (REPLICATE _A:a cA:b)*:c cA:b)*:b):b
+            1 (REPLICATE (NOT (REPLICATE _A:a cA:b)*:b):b cA:b)*:c
+            1 (REPLICATE (REPLICATE (REPLICATE _A:1 cA:a)*:b cB:a)*:c cB:a)*:a
+            1 (REPLICATE (REPLICATE (REPLICATE _A:a cA:b)*:c cA:b)*:b cA:b)*:d
+            1 (REPLICATE (REPLICATE (SEL@A _A:a):1 cA:b)*:c cB:b)*:d
+            1 (REPLICATE (SEL@A (AND _A:a _B:a)*:a):1 cA:b)*:c
+            1 (SEL@0 (AND (NOT vA:a)*:a (NOT vB:a)*:a)*:a):1
+            1 (SEL@0 (REPLICATE (NOT _A:a):a cA:a)*:b):c
+            1 (SEL@A (AND (NOT vA:a)*:a (NOT vB:a)*:a)*:a):1
+
+DFG 'scoped' patterns with depth 4
+            1 (CONCAT '0:a (REPLICATE (REPLICATE (REPLICATE _A:b cA:a)*:c cA:a)*:a cA:a)*:d):A
+            1 (NOT (REPLICATE (REPLICATE (REPLICATE _A:1 cA:a)*:b cB:a)*:c cB:a)*:a):a
+            1 (REPLICATE (NOT (REPLICATE (REPLICATE _A:a cA:b)*:c cA:b)*:b):b cA:b)*:d
+            1 (REPLICATE (REPLICATE (REPLICATE (REPLICATE _A:1 cA:a)*:b cB:a)*:c cB:a)*:a cB:a)*:d
+            1 (REPLICATE (REPLICATE (REPLICATE (SEL@A _A:a):1 cA:b)*:c cB:b)*:d cB:b)*:b
+            1 (REPLICATE (REPLICATE (SEL@A (AND _A:a _B:a)*:a):1 cA:b)*:c cB:b)*:d
+            1 (REPLICATE (SEL@A (AND (NOT vA:a)*:a (NOT vB:a)*:a)*:a):1 cA:b)*:c
+            1 (SEL@0 (REPLICATE (NOT (REPLICATE _A:a cA:b)*:b):b cA:b)*:c):d
+
diff --git a/test_regress/t/t_dfg_stats_patterns_scoped.py b/test_regress/t/t_dfg_stats_patterns_scoped.py
new file mode 100755
index 000000000..afd635460
--- /dev/null
+++ b/test_regress/t/t_dfg_stats_patterns_scoped.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+test.top_filename = "t/t_dfg_stats_patterns.v"
+
+test.compile(
+    verilator_flags2=["--stats --no-skip-identical -fno-dfg-pre-inline -fno-dfg-post-inline"])
+
+fn = test.glob_one(test.obj_dir + "/" + test.vm_prefix + "__stats_dfg_patterns*")
+test.files_identical(fn, test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_hier_block_chained.py b/test_regress/t/t_hier_block_chained.py
index 4ed5f7ff7..553bf8ea4 100755
--- a/test_regress/t/t_hier_block_chained.py
+++ b/test_regress/t/t_hier_block_chained.py
@@ -33,9 +33,9 @@ test.compile(
 
 if test.vltmt:
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
-                   r'Optimizations, Thread schedule count\s+(\d+)', 1)
+                   r'Optimizations, Thread schedule count\s+(\d+)', 2)
     test.file_grep(test.obj_dir + "/V" + test.name + "__hier.dir/V" + test.name + "__stats.txt",
-                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 2)
+                   r'Optimizations, Thread schedule total tasks\s+(\d+)', 3)
 
 test.execute()
 
diff --git a/test_regress/t/t_inst_tree_inl0_pub1.py b/test_regress/t/t_inst_tree_inl0_pub1.py
index 3fa932f0e..4e35f9ef5 100755
--- a/test_regress/t/t_inst_tree_inl0_pub1.py
+++ b/test_regress/t/t_inst_tree_inl0_pub1.py
@@ -42,7 +42,7 @@ if test.vlt_all:
     # We expect to combine sequent functions across multiple instances of
     # l2, l3, l4, l5. If this number drops, please confirm this has not broken.
     test.file_grep(test.stats, r'Optimizations, Combined CFuncs\s+(\d+)',
-                   (85 if test.vltmt else 67))
+                   (91 if test.vltmt else 87))
 
     # Everything should use relative references
     check_relative_refs("t", True)
diff --git a/test_regress/t/t_inst_tree_inl1_pub0.py b/test_regress/t/t_inst_tree_inl1_pub0.py
index a22a7e648..437358a66 100755
--- a/test_regress/t/t_inst_tree_inl1_pub0.py
+++ b/test_regress/t/t_inst_tree_inl1_pub0.py
@@ -15,7 +15,8 @@ test.top_filename = "t/t_inst_tree.v"
 out_filename = test.obj_dir + "/V" + test.name + ".tree.json"
 
 test.compile(v_flags2=[
-    "--no-json-edit-nums", "-fno-dfg-post-inline", test.t_dir + "/t_inst_tree_inl1_pub0.vlt"
+    "--no-json-edit-nums", "-fno-dfg-post-inline", "-fno-dfg-scoped", test.t_dir +
+    "/t_inst_tree_inl1_pub0.vlt"
 ])
 
 if test.vlt_all:
diff --git a/test_regress/t/t_opt_const_dfg.py b/test_regress/t/t_opt_const_dfg.py
index 6fd2ea9bc..45033fc3f 100755
--- a/test_regress/t/t_opt_const_dfg.py
+++ b/test_regress/t/t_opt_const_dfg.py
@@ -18,7 +18,7 @@ test.compile(verilator_flags2=["-Wno-UNOPTTHREADS", "--stats", test.pli_filename
 test.execute()
 
 if test.vlt:
-    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 43)
+    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 38)
     test.file_grep(test.stats, r'SplitVar, packed variables split automatically\s+(\d+)', 1)
 
 test.passes()
diff --git a/test_regress/t/t_unopt_combo_bad.out b/test_regress/t/t_unopt_combo_bad.out
index 8cd58f59f..bee8bc003 100644
--- a/test_regress/t/t_unopt_combo_bad.out
+++ b/test_regress/t/t_unopt_combo_bad.out
@@ -4,7 +4,7 @@
                     ... For warning description see https://verilator.org/warn/UNOPTFLAT?v=latest
                     ... Use "/* verilator lint_off UNOPTFLAT */" and lint_on around source to disable this message.
                     t/t_unopt_combo.v:23:25:      Example path: t.b
-                    t/t_unopt_combo.v:124:4:      Example path: ALWAYS
+                    t/t_unopt_combo.v:137:14:      Example path: ASSIGNW
                     t/t_unopt_combo.v:24:25:      Example path: t.c
                     t/t_unopt_combo.v:81:4:      Example path: ALWAYS
                     t/t_unopt_combo.v:23:25:      Example path: t.b

From 73ca2ab99739fdb748fa53f3a74e48c452829d35 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 1 Jul 2025 18:00:04 -0400
Subject: [PATCH 194/211] Support `$past_gclk`

---
 src/V3AssertPre.cpp           |  8 ++--
 src/V3AstNodeExpr.h           |  4 +-
 src/V3EmitV.cpp               |  6 ++-
 src/V3Width.cpp               |  1 +
 src/verilog.l                 |  1 +
 src/verilog.y                 |  4 +-
 test_regress/t/t_past_funcs.v | 87 +++++++++++++++++------------------
 7 files changed, 60 insertions(+), 51 deletions(-)

diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp
index 8d1bc1e5a..1a680d828 100644
--- a/src/V3AssertPre.cpp
+++ b/src/V3AssertPre.cpp
@@ -460,7 +460,7 @@ private:
         if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
         AstSenTree* sentreep = nodep->sentreep();
         if (sentreep) sentreep->unlinkFrBack();
-        AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
+        AstNodeExpr* const past = new AstPast{fl, exprp};
         past->dtypeFrom(exprp);
         exprp = new AstAnd{fl, past, new AstNot{fl, exprp->cloneTreePure(false)}};
         exprp->dtypeSetBit();
@@ -481,7 +481,7 @@ private:
         if (exprp->width() > 1) exprp = new AstSel{fl, exprp, 0, 1};
         AstSenTree* sentreep = nodep->sentreep();
         if (sentreep) sentreep->unlinkFrBack();
-        AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
+        AstNodeExpr* const past = new AstPast{fl, exprp};
         past->dtypeFrom(exprp);
         exprp = new AstAnd{fl, new AstNot{fl, past}, exprp->cloneTreePure(false)};
         exprp->dtypeSetBit();
@@ -496,7 +496,7 @@ private:
         AstNodeExpr* exprp = nodep->exprp()->unlinkFrBack();
         AstSenTree* sentreep = nodep->sentreep();
         if (sentreep) sentreep->unlinkFrBack();
-        AstNodeExpr* const past = new AstPast{fl, exprp, nullptr};
+        AstNodeExpr* const past = new AstPast{fl, exprp};
         past->dtypeFrom(exprp);
         exprp = new AstEq{fl, past, exprp->cloneTreePure(false)};
         exprp->dtypeSetBit();
@@ -514,7 +514,7 @@ private:
 
         if (m_disablep) lhsp = new AstAnd{fl, new AstNot{fl, m_disablep}, lhsp};
 
-        AstNodeExpr* const past = new AstPast{fl, lhsp, nullptr};
+        AstNodeExpr* const past = new AstPast{fl, lhsp};
         past->dtypeFrom(lhsp);
         AstNodeExpr* const exprp = new AstOr{fl, new AstNot{fl, past}, rhsp};
         exprp->dtypeSetBit();
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index f21b2b178..48bba5822 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -1732,10 +1732,12 @@ class AstPast final : public AstNodeExpr {
     // @astgen op2 := ticksp : Optional[AstNode]
     // @astgen op3 := sentreep : Optional[AstSenTree]
 public:
-    AstPast(FileLine* fl, AstNodeExpr* exprp, AstNode* ticksp)
+    AstPast(FileLine* fl, AstNodeExpr* exprp, AstNode* ticksp = nullptr,
+            AstSenTree* sentreep = nullptr)
         : ASTGEN_SUPER_Past(fl) {
         this->exprp(exprp);
         this->ticksp(ticksp);
+        this->sentreep(sentreep);
     }
     ASTGEN_MEMBERS_AstPast;
     string emitVerilog() override { V3ERROR_NA_RETURN(""); }
diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp
index 794c64b73..df122080b 100644
--- a/src/V3EmitV.cpp
+++ b/src/V3EmitV.cpp
@@ -395,9 +395,13 @@ class EmitVBaseVisitorConst VL_NOT_FINAL : public EmitCBaseVisitorConst {
     void visit(AstPast* nodep) override {
         putfs(nodep, "$past(");
         iterateAndNextConstNull(nodep->exprp());
-        if (nodep->ticksp()) {
+        if (nodep->ticksp() || nodep->sentreep()) {
             puts(", ");
             iterateAndNextConstNull(nodep->ticksp());
+            if (nodep->sentreep()) {
+                puts(", ");
+                iterateAndNextConstNull(nodep->sentreep());
+            }
         }
         puts(")");
     }
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 8ebdac773..3d0b01b6a 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1356,6 +1356,7 @@ class WidthVisitor final : public VNVisitor {
                     }
                 }
             }
+            userIterate(nodep->sentreep(), nullptr);
         }
     }
     void visit(AstRose* nodep) override {
diff --git a/src/verilog.l b/src/verilog.l
index c22bf9987..754368e1c 100644
--- a/src/verilog.l
+++ b/src/verilog.l
@@ -488,6 +488,7 @@ vnum    {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5}
   "$onehot"             { FL; return yD_ONEHOT; }
   "$onehot0"            { FL; return yD_ONEHOT0; }
   "$past"               { FL; return yD_PAST; }
+  "$past_gclk"          { FL; return yD_PAST_GCLK; }
   "$right"              { FL; return yD_RIGHT; }
   "$root"               { FL; return yD_ROOT; }
   "$rose"               { FL; return yD_ROSE; }
diff --git a/src/verilog.y b/src/verilog.y
index 8de5f392e..2149b4d3e 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -911,6 +911,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yD_ONEHOT       "$onehot"
 %token<fl>              yD_ONEHOT0      "$onehot0"
 %token<fl>              yD_PAST         "$past"
+%token<fl>              yD_PAST_GCLK    "$past_gclk"
 %token<fl>              yD_POW          "$pow"
 %token<fl>              yD_PRINTTIMESCALE "$printtimescale"
 %token<fl>              yD_RANDOM       "$random"
@@ -4491,7 +4492,7 @@ system_f_call_or_t<nodeExprp>:      // IEEE: part of system_tf_call (can be task
         |       yD_LOW '(' exprOrDataType ',' expr ')'  { $$ = new AstAttrOf{$1, VAttrType::DIM_LOW, $3, $5}; }
         |       yD_ONEHOT '(' expr ')'                  { $$ = new AstOneHot{$1, $3}; }
         |       yD_ONEHOT0 '(' expr ')'                 { $$ = new AstOneHot0{$1, $3}; }
-        |       yD_PAST '(' expr ')'                    { $$ = new AstPast{$1, $3, nullptr}; }
+        |       yD_PAST '(' expr ')'                    { $$ = new AstPast{$1, $3}; }
         |       yD_PAST '(' expr ',' exprE ')'          { $$ = new AstPast{$1, $3, $5}; }
         |       yD_PAST '(' expr ',' exprE ',' exprE ')'
                         { if ($7) BBUNSUP($1, "Unsupported: $past expr2 and/or clock arguments");
@@ -4499,6 +4500,7 @@ system_f_call_or_t<nodeExprp>:      // IEEE: part of system_tf_call (can be task
         |       yD_PAST '(' expr ',' exprE ',' exprE ',' clocking_eventE ')'
                         { if ($7 || $9) BBUNSUP($1, "Unsupported: $past expr2 and/or clock arguments");
                           $$ = new AstPast{$1, $3, $5}; }
+        |       yD_PAST_GCLK '(' expr ')'               { $$ = new AstPast{$1, $3, nullptr, GRAMMARP->createGlobalClockSenTree($1)}; }
         |       yD_POW '(' expr ',' expr ')'            { $$ = new AstPowD{$1, $3, $5}; }
         |       yD_RANDOM '(' expr ')'                  { $$ = new AstRand{$1, $3, false}; }
         |       yD_RANDOM parenE                        { $$ = new AstRand{$1, nullptr, false}; }
diff --git a/test_regress/t/t_past_funcs.v b/test_regress/t/t_past_funcs.v
index 74ba1dc76..78969cd0d 100644
--- a/test_regress/t/t_past_funcs.v
+++ b/test_regress/t/t_past_funcs.v
@@ -5,9 +5,9 @@
 // SPDX-License-Identifier: Unlicense
 
 module t (/*AUTOARG*/
-   // Inputs
-   clk
-   );
+  // Inputs
+  clk
+  );
 
    input clk;
    integer cyc; initial cyc=1;
@@ -41,16 +41,16 @@ module t (/*AUTOARG*/
 endmodule
 
 module Test (/*AUTOARG*/
-   // Inputs
-   clk, in
-   );
+  // Inputs
+  clk, in
+  );
 
    input clk;
    input [31:0] in;
 
-   reg [31:0]   dly0 = 0;
-   reg [31:0]   dly1 = 1;
-   reg [31:0]   dly2 = -1;
+   reg [31:0] dly0 = 0;
+   reg [31:0] dly1 = 0;
+   reg [31:0] dly2 = 0;
 
    // If called in an assertion, sequence, or property, the appropriate clocking event.
    // Otherwise, if called in a disable condition or a clock expression in an assertion, sequence, or prop, explicit.
@@ -60,33 +60,34 @@ module Test (/*AUTOARG*/
 
    always @(posedge clk) begin
       dly0 <= in;
-      dly1 <= in;
-      dly2 <= in;
+      dly1 <= dly0;
+      dly2 <= dly1;
       // In clock expression
       $write("in=%0d, dly0=%0d, rose=%0d, past=%0d\n", in, dly0, $rose(dly0), $past(dly0));
       if ($rose(dly0[4])) $stop;
-      if ($fell(dly1[4])) $stop;
-      if ($stable(dly2)) $stop;
-      if (!$changed(dly2)) $stop;
+      if ($fell(dly0[4])) $stop;
+      if (!$stable(dly0[4])) $stop;
+      if ($changed(dly0[4])) $stop;
    end
 
-   assert property (@(posedge clk) $rose(dly0) || dly0%2==0);
-   assert property (@(posedge clk) $fell(dly1) || dly1%2==1);
-   assert property (@(posedge clk) !$stable(dly2));
-   assert property (@(posedge clk) $changed(dly2));
+   assert property (@(posedge clk) $rose(dly0) || dly0%2==0 || dly2 < 3);
+   assert property (@(posedge clk) $fell(dly1) || dly1%2==1 || dly2 < 3);
+   assert property (@(posedge clk) !$stable(dly2) || dly2 < 3);
+   assert property (@(posedge clk) $changed(dly2) || dly2 < 3);
 
    global clocking @(posedge clk); endclocking
-   always @ ($global_clock) $display("%d", in);
+   always @ ($global_clock) $display("gc in=%0d", in);
    //
-   assert property (@(posedge clk) $rose(dly0, $global_clock) || dly0%2==0);
-   assert property (@(posedge clk) $fell(dly1, $global_clock) || dly1%2==1);
-   assert property (@(posedge clk) !$stable(dly2, $global_clock));
-   assert property (@(posedge clk) $changed(dly2, $global_clock));
+   assert property (@(posedge clk) $rose(dly0, $global_clock) || dly0%2==0 || dly2 < 3);
+   assert property (@(posedge clk) $fell(dly1, $global_clock) || dly1%2==1 || dly2 < 3);
+   assert property (@(posedge clk) !$stable(dly2, $global_clock) || dly2 < 3);
+   assert property (@(posedge clk) $changed(dly2, $global_clock) || dly2 < 3);
    //
-   assert property (@(posedge clk) $rose_gclk(dly0) || dly0%2==0);
-   assert property (@(posedge clk) $fell_gclk(dly1) || dly1%2==1);
-   assert property (@(posedge clk) !$stable_gclk(dly2));
-   assert property (@(posedge clk) $changed_gclk(dly2));
+   assert property (@(posedge clk) $rose_gclk(dly0) || dly0%2==0 || dly2 < 3);
+   assert property (@(posedge clk) $fell_gclk(dly1) || dly1%2==1 || dly2 < 3);
+   assert property (@(posedge clk) $past_gclk(dly1) == dly2 || dly2 < 3);
+   assert property (@(posedge clk) !$stable_gclk(dly2) || dly2 < 3);
+   assert property (@(posedge clk) $changed_gclk(dly2) || dly2 < 3);
 
    // global_clocking_future_functions are not supported yet:
    // $changing_gclk     global_clocking_future_function
@@ -99,21 +100,21 @@ endmodule
 
 
 module Test2 (/*AUTOARG*/
-   // Inputs
-   clk, in
-   );
+  // Inputs
+  clk, in
+  );
 
    input clk;
    input [31:0] in;
 
-   reg [31:0]   dly0;
-   reg [31:0]   dly1 = 1;
-   reg [31:0]   dly2;
+   reg [31:0] dly0 = 0;
+   reg [31:0] dly1 = 0;
+   reg [31:0] dly2 = 0;
 
    always @(posedge clk) begin
       dly0 <= in;
-      dly1 <= in;
-      dly2 <= in;
+      dly1 <= dly0;
+      dly2 <= dly1;
       if ($rose(dly0[31:4])) $stop;
       if ($fell(dly1[31:4])) $stop;
       if (!$stable(dly2[31:4])) $stop;
@@ -122,23 +123,21 @@ module Test2 (/*AUTOARG*/
 
    default clocking @(posedge clk); endclocking
 
-   assert property ($rose(dly0[0]) || dly0%2==0);
-   assert property ($fell(dly1[0]) || dly1%2==1);
-   assert property ($stable(dly2[31:4]));
-   assert property (!$changed(dly2[31:4]));
+   assert property ($rose(dly0[0]) || dly0%2==0 || dly2 < 3);
+   assert property ($fell(dly1[0]) || dly1%2==1 || dly2 < 3);
+   assert property ($stable(dly2[31:4]) || dly2 < 3);
+   assert property (!$changed(dly2[31:4]) || dly2 < 3);
 endmodule
 
 module Test3 (/*AUTOARG*/
-   // Inputs
-   clk, in
-   );
+  // Inputs
+  clk, in
+  );
 
    input clk;
    input [31:0] in;
 
    // Check the named form of global clocking
    global clocking gck @(posedge clk); endclocking
-   always @ (gck) $display("%d", in);
-   always @ ($global_clock) $display("%d", in);
 
 endmodule

From ae0f29ed37fd1571def77f2f6bceb31aece898fc Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Wed, 2 Jul 2025 18:43:10 -0400
Subject: [PATCH 195/211] Fix wide non-blocking assignment mis-optimization
 (#6150) (#6152)

---
 src/V3Const.cpp                              |  5 +-
 test_regress/t/t_cover_line_wide_ternary.out | 67 ++++++++++++++++++++
 test_regress/t/t_cover_line_wide_ternary.py  | 31 +++++++++
 test_regress/t/t_cover_line_wide_ternary.v   | 47 ++++++++++++++
 4 files changed, 148 insertions(+), 2 deletions(-)
 create mode 100644 test_regress/t/t_cover_line_wide_ternary.out
 create mode 100755 test_regress/t/t_cover_line_wide_ternary.py
 create mode 100644 test_regress/t/t_cover_line_wide_ternary.v

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 9c94bab16..7bb65f963 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -2107,8 +2107,9 @@ class ConstVisitor final : public VNVisitor {
                 AstVar* const tempPurep = new AstVar{rhsp->fileline(), VVarType::BLOCKTEMP,
                                                      m_concswapNames.get(rhsp), rhsp->dtypep()};
                 m_modp->addStmtsp(tempPurep);
-                AstNodeAssign* const asnp = nodep->cloneType(
-                    new AstVarRef{rhsp->fileline(), tempPurep, VAccess::WRITE}, rhsp);
+                AstAssign* const asnp = new AstAssign(
+                    nodep->fileline(), new AstVarRef{rhsp->fileline(), tempPurep, VAccess::WRITE},
+                    rhsp);
                 nodep->addHereThisAsNext(asnp);
                 nodep->rhsp(new AstVarRef{rhsp->fileline(), tempPurep, VAccess::READ});
             } else if (need_temp) {
diff --git a/test_regress/t/t_cover_line_wide_ternary.out b/test_regress/t/t_cover_line_wide_ternary.out
new file mode 100644
index 000000000..8b5f49c7f
--- /dev/null
+++ b/test_regress/t/t_cover_line_wide_ternary.out
@@ -0,0 +1,67 @@
+//      // verilator_coverage annotation
+        // DESCRIPTION: Verilator: Verilog Test module
+        //
+        // This file ONLY is placed under the Creative Commons Public Domain, for
+        // any use, without warranty, 2024 by Wilson Snyder.
+        // SPDX-License-Identifier: CC0-1.0
+        
+        interface intf();
+            logic foo;
+            logic [31:0] bar;
+            logic [127:0] baz;
+        endinterface
+        
+        module t (/*AUTOARG*/
+            // Inputs
+            clk
+            );
+        
+            input clk;
+        
+            integer cyc;
+%000001     initial cyc=1;
+-000001  point: comment=block hier=top.t
+        
+            intf intfs [2] ();
+            intf intf_sel();
+        
+%000001     always_comb begin
+-000001  point: comment=block hier=top.t
+%000001         intfs[0].bar = 123;
+-000001  point: comment=block hier=top.t
+%000001         intfs[1].bar = 456;
+-000001  point: comment=block hier=top.t
+            end
+        
+%000009     always @ (posedge clk) begin
+-000009  point: comment=block hier=top.t
+%000009         {intf_sel.foo, intf_sel.bar, intf_sel.baz} <=
+-000009  point: comment=block hier=top.t
+%000009             cyc[0] ?
+-000009  point: comment=cond_then hier=top.t
+-000009  point: comment=cond_else hier=top.t
+%000009             {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
+-000009  point: comment=cond_then hier=top.t
+%000009             {intfs[0].foo, intfs[0].bar, intfs[0].baz};
+-000009  point: comment=cond_else hier=top.t
+            end
+        
+%000009     always @ (posedge clk) begin
+-000009  point: comment=block hier=top.t
+%000009         cyc <= cyc + 1;
+-000009  point: comment=block hier=top.t
+%000008         if (cyc==9) begin
+-000008  point: comment=else hier=top.t
+-000001  point: comment=if hier=top.t
+%000001             $display("bar = %0d", intf_sel.bar);
+-000001  point: comment=if hier=top.t
+%000001             if (intf_sel.bar != 123) $stop();
+-000001  point: comment=else hier=top.t
+%000001             $write("*-* All Finished *-*\n");
+-000001  point: comment=if hier=top.t
+%000001             $finish;
+-000001  point: comment=if hier=top.t
+                end
+            end
+        endmodule
+        
diff --git a/test_regress/t/t_cover_line_wide_ternary.py b/test_regress/t/t_cover_line_wide_ternary.py
new file mode 100755
index 000000000..39124e9dd
--- /dev/null
+++ b/test_regress/t/t_cover_line_wide_ternary.py
@@ -0,0 +1,31 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+from pathlib import Path
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=['--cc', '--coverage-line'])
+
+test.execute()
+
+test.run(cmd=[
+    os.environ["VERILATOR_ROOT"] + "/bin/verilator_coverage",
+    "--annotate-points",
+    "--annotate",
+    test.obj_dir + "/annotated",
+    test.obj_dir + "/coverage.dat",
+],
+         verilator_run=True)
+
+top = Path(test.top_filename)
+test.files_identical(test.obj_dir + f"/annotated/{top.name}", test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_cover_line_wide_ternary.v b/test_regress/t/t_cover_line_wide_ternary.v
new file mode 100644
index 000000000..fdd1bfba7
--- /dev/null
+++ b/test_regress/t/t_cover_line_wide_ternary.v
@@ -0,0 +1,47 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2024 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+interface intf();
+    logic foo;
+    logic [31:0] bar;
+    logic [127:0] baz;
+endinterface
+
+module t (/*AUTOARG*/
+    // Inputs
+    clk
+    );
+
+    input clk;
+
+    integer cyc;
+    initial cyc=1;
+
+    intf intfs [2] ();
+    intf intf_sel();
+
+    always_comb begin
+        intfs[0].bar = 123;
+        intfs[1].bar = 456;
+    end
+
+    always @ (posedge clk) begin
+        {intf_sel.foo, intf_sel.bar, intf_sel.baz} <=
+            cyc[0] ?
+            {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
+            {intfs[0].foo, intfs[0].bar, intfs[0].baz};
+    end
+
+    always @ (posedge clk) begin
+        cyc <= cyc + 1;
+        if (cyc==9) begin
+            $display("bar = %0d", intf_sel.bar);
+            if (intf_sel.bar != 123) $stop();
+            $write("*-* All Finished *-*\n");
+            $finish;
+        end
+    end
+endmodule

From bb41c6b26b9b1231f619e65d9c5d588bc5647ea9 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 2 Jul 2025 18:47:27 -0400
Subject: [PATCH 196/211] Internals: Fix wrong fileline on some parsing
 scan-aheads.

---
 src/V3ParseImp.cpp | 17 ++++++++++++++---
 src/V3ParseImp.h   |  1 +
 2 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 36d25f859..9f7ac78d6 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -380,6 +380,15 @@ void V3ParseImp::dumpInputsFile() {
     VL_DO_DANGLING(delete ofp, ofp);
 }
 
+void V3ParseImp::dumpTokensAhead(int line) {  // LCOV_EXCL_START
+    int i = 0;
+    UINFO(1, "dumpTokensAhead @ " << line << " [ ] " << yylval);
+    for (auto t : m_tokensAhead) {
+        UINFO(1, "dumpTokensAhead @ " << line << " [" << i << "] " << t);
+        ++i;
+    }
+}  // LCOV_EXCL_STOP
+
 void V3ParseImp::lexFile(const string& modname) {
     // Prepare for lexing
     UINFO(3, "Lexing " << modname);
@@ -396,8 +405,11 @@ void V3ParseImp::tokenPull() {
     // Pull token from lex into the pipeline
     // This corrupts yylval, must save/restore if required
     // Fetch next token from prefetch or real lexer
+    VL_RESTORER(yylval);
     yylexReadTok();  // sets yylval
+    UINFO(9, "tokenPulled " << yylval);
     m_tokensAhead.push_back(yylval);
+    if (debug() >= 10) dumpTokensAhead(__LINE__);
 }
 
 const V3ParseBisonYYSType* V3ParseImp::tokenPeekp(size_t depth) {
@@ -583,9 +595,7 @@ void V3ParseImp::tokenPipeline() {
         || token == yWITH__LEX  //
         || token == yaID__LEX  //
     ) {
-        if (debugFlex() >= 6) {
-            cout << "   tokenPipeline: reading ahead to find possible strength" << endl;
-        }
+        if (debugFlex() >= 6) UINFO(0, "tokenPipeline: reading ahead");
         const V3ParseBisonYYSType curValue = yylval;  // Remember value, as about to read ahead
         const V3ParseBisonYYSType* nexttokp = tokenPeekp(0);
         const int nexttok = nexttokp->token;
@@ -711,6 +721,7 @@ int V3ParseImp::tokenToBison() {
 
     if (debug() >= 6 || debugFlex() >= 6
         || debugBison() >= 6) {  // --debugi-flex and --debugi-bison
+        if (debug() >= 10) dumpTokensAhead(__LINE__);
         cout << "tokenToBison  " << yylval << endl;
     }
     return yylval.token;
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index c87e182a5..f4527f194 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -291,6 +291,7 @@ public:
     void parseFile(FileLine* fileline, const string& modfilename, bool inLibrary,
                    const string& libname, const string& errmsg) VL_MT_DISABLED;
     void dumpInputsFile() VL_MT_DISABLED;
+    void dumpTokensAhead(int line) VL_MT_DISABLED;
     static void candidatePli(VSpellCheck* spellerp) VL_MT_DISABLED;
 
 private:

From 77908447e6718dc43b84f438b7b81778300d2b61 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 2 Jul 2025 19:54:57 -0400
Subject: [PATCH 197/211] Support scoped `new` (#4199).

---
 Changes                                   |  1 +
 src/V3AstNodeExpr.h                       | 10 ++-
 src/V3AstNodes.cpp                        | 11 ++++
 src/V3ParseImp.cpp                        | 32 ++++++++++
 src/V3ParseImp.h                          |  1 +
 src/V3Width.cpp                           | 25 ++++++--
 src/verilog.y                             | 33 +++++++---
 test_regress/t/t_class_new_scoped.out     | 14 -----
 test_regress/t/t_class_new_scoped.py      |  4 +-
 test_regress/t/t_class_new_scoped.v       | 76 +++++++++++------------
 test_regress/t/t_class_new_scoped_bad.out |  6 ++
 test_regress/t/t_class_new_scoped_bad.py  | 16 +++++
 test_regress/t/t_class_new_scoped_bad.v   | 19 ++++++
 test_regress/t/t_class_new_typed.py       | 18 ++++++
 test_regress/t/t_class_new_typed.v        | 30 +++++++++
 15 files changed, 228 insertions(+), 68 deletions(-)
 delete mode 100644 test_regress/t/t_class_new_scoped.out
 create mode 100644 test_regress/t/t_class_new_scoped_bad.out
 create mode 100755 test_regress/t/t_class_new_scoped_bad.py
 create mode 100644 test_regress/t/t_class_new_scoped_bad.v
 create mode 100755 test_regress/t/t_class_new_typed.py
 create mode 100644 test_regress/t/t_class_new_typed.v

diff --git a/Changes b/Changes
index 25f4c0d95..0907c0684 100644
--- a/Changes
+++ b/Changes
@@ -14,6 +14,7 @@ Verilator 5.037 devel
 **Other:**
 
 * Support redeclaring type as non-type; major parsing change (#2412) (#6020) (#6042) (#6044).
+* Support scoped `new` (#4199).
 * Support constrained random for associative arrays (#5985) (#5986). [Yilou Wang]
 * Support assignments to concatenations with impure RHS (#6002). [Ryszard Rozak, Antmicro Ltd.]
 * Support SARIF JSON diagnostic output with `--diagnostics-sarif`. (#6017)
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 48bba5822..970b6e54a 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -4472,14 +4472,20 @@ class AstNew final : public AstNodeFTaskRef {
     // New as constructor
     // Don't need the class we are extracting from, as the "fromp()"'s datatype can get us to it
     bool m_isImplicit = false;  // Implicitly generated from extends args
+    bool m_isScoped = false;  // Had :: scope when parsed
 public:
-    AstNew(FileLine* fl, AstNodeExpr* pinsp)
-        : ASTGEN_SUPER_New(fl, "new", pinsp) {}
+    AstNew(FileLine* fl, AstNodeExpr* pinsp, bool isScoped = false)
+        : ASTGEN_SUPER_New(fl, "new", pinsp)
+        , m_isScoped{isScoped} {}
     ASTGEN_MEMBERS_AstNew;
+    void dump(std::ostream& str = std::cout) const override;
+    void dumpJson(std::ostream& str = std::cout) const override;
     bool sameNode(const AstNode* /*samep*/) const override { return true; }
     int instrCount() const override { return widthInstrs(); }
     bool isImplicit() const { return m_isImplicit; }
     void isImplicit(bool flag) { m_isImplicit = flag; }
+    bool isScoped() const { return m_isScoped; }
+    void isScoped(bool flag) { m_isScoped = flag; }
 };
 class AstTaskRef final : public AstNodeFTaskRef {
     // A reference to a task
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 02c5a498e..7903046c6 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -454,6 +454,17 @@ void AstNetlist::timeprecisionMerge(FileLine*, const VTimescale& value) {
     }
 }
 
+void AstNew::dump(std::ostream& str) const {
+    this->AstNode::dump(str);
+    if (isImplicit()) str << " [IMPLICIT]";
+    if (isScoped()) str << " [SCOPED]";
+}
+void AstNew::dumpJson(std::ostream& str) const {
+    dumpJsonBoolFunc(str, isImplicit);
+    dumpJsonBoolFunc(str, isScoped);
+    dumpJsonGen(str);
+}
+
 bool AstVar::isSigPublic() const {
     return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp() && !isGenVar()))
            && !isIfaceRef();
diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp
index 9f7ac78d6..89e1f8245 100644
--- a/src/V3ParseImp.cpp
+++ b/src/V3ParseImp.cpp
@@ -557,6 +557,33 @@ size_t V3ParseImp::tokenPipeScanTypeEq(size_t depth) {
     return depth;
 }
 
+size_t V3ParseImp::tokenPipeScanEqNew(size_t depth) {
+    // Search around IEEE class_new to see if is expression
+    // Return location of following token, or input if not found
+    // '=' { packageClassScopeNoId } yNEW__LEX
+    UINFO(9, "tokenPipelineScanEqNew tok=" << yylval.token);
+    UASSERT(yylval.token == '=', "Start with '='");
+    while (true) {
+        const int tok = tokenPeekp(depth)->token;
+        if (tok == 0) {  // LCOV_EXCL_BR_LINE
+            UINFO(9, "tokenPipeScanEqNew hit EOF; probably syntax error to come");
+            break;  // LCOV_EXCL_LINE
+        } else if (tok == yNEW__LEX) {
+            break;
+        } else if (tok == yaID__LEX) {
+            ++depth;  // yaID__LEX
+            depth = tokenPipeScanParam(depth, false);
+            if (tokenPeekp(depth)->token != yP_COLONCOLON) return 0;
+            ++depth;  // yP_COLONCOLON
+            continue;
+        } else {
+            return 0;  // Miss
+        }
+        ++depth;
+    }
+    return depth;
+}
+
 int V3ParseImp::tokenPipelineId(int token) {
     const V3ParseBisonYYSType* nexttokp = tokenPeekp(0);  // First char after yaID
     const int nexttok = nexttokp->token;
@@ -585,6 +612,7 @@ void V3ParseImp::tokenPipeline() {
     // If a paren, read another
     if (token == '('  //
         || token == ':'  //
+        || token == '='  //
         || token == yCONST__LEX  //
         || token == yGLOBAL__LEX  //
         || token == yLOCAL__LEX  //
@@ -609,6 +637,10 @@ void V3ParseImp::tokenPipeline() {
             } else if (nexttok == yFORK) {
                 token = yP_COLON__FORK;
             }
+        } else if (token == '=') {
+            if (nexttokp->token == yNEW__LEX || tokenPipeScanEqNew(0)) {
+                token = yP_EQ__NEW;
+            }  // else still '='
         } else if (token == yCONST__LEX) {
             if (nexttok == yREF) {
                 token = yCONST__REF;
diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h
index f4527f194..5e210691c 100644
--- a/src/V3ParseImp.h
+++ b/src/V3ParseImp.h
@@ -308,6 +308,7 @@ private:
     size_t tokenPipeScanBracket(size_t depth) VL_MT_DISABLED;
     size_t tokenPipeScanParam(size_t depth, bool forInst) VL_MT_DISABLED;
     size_t tokenPipeScanTypeEq(size_t depth) VL_MT_DISABLED;
+    size_t tokenPipeScanEqNew(size_t depth) VL_MT_DISABLED;
     const V3ParseBisonYYSType* tokenPeekp(size_t depth) VL_MT_DISABLED;
     void preprocDumps(std::ostream& os, bool forInputs) VL_MT_DISABLED;
 };
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 3d0b01b6a..8ca414718 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -4383,11 +4383,28 @@ class WidthVisitor final : public VNVisitor {
         bool assign = false;
         if (VN_IS(nodep->backp(), Assign)) {  // assignment case
             assign = true;
-            AstClassRefDType* const refp
-                = m_vup ? VN_CAST(m_vup->dtypeNullSkipRefp(), ClassRefDType) : nullptr;
+            AstNode* warnp = nullptr;
+            AstClassRefDType* refp = nullptr;
+
+            if (nodep->isScoped()) {  // = ClassOrPackage::new
+                UASSERT_OBJ(nodep->classOrPackagep(), nodep, "Unlinked classOrPackage");
+                warnp = nodep->classOrPackagep();
+                if (AstClass* const classp = VN_CAST(warnp, Class)) {
+                    AstClassRefDType* const adtypep
+                        = new AstClassRefDType{nodep->fileline(), classp, nullptr};
+                    v3Global.rootp()->typeTablep()->addTypesp(adtypep);
+                    refp = adtypep;
+                }
+            } else {  // = new
+                warnp = m_vup->dtypeNullp();
+                refp = m_vup ? VN_CAST(m_vup->dtypeNullSkipRefp(), ClassRefDType) : nullptr;
+            }
             if (!refp) {  // e.g. int a = new;
-                nodep->v3error("new() assignment not legal to non-class data type "
-                               + (m_vup->dtypeNullp() ? m_vup->dtypep()->prettyDTypeNameQ() : ""));
+                nodep->v3error("new() assignment not legal to non-class "
+                               + (VN_IS(warnp, NodeDType) ? (
+                                      "data type "s + VN_AS(warnp, NodeDType)->prettyDTypeNameQ())
+                                  : warnp ? warnp->prettyNameQ()
+                                          : ""));
                 nodep->dtypep(m_vup->dtypep());
                 return;
             }
diff --git a/src/verilog.y b/src/verilog.y
index 2149b4d3e..54475e915 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -531,7 +531,7 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              ':'  // See also yP_COLON__BEGIN or yP_COLON__FORK
 %token<fl>              ';'
 %token<fl>              '<'
-%token<fl>              '='
+%token<fl>              '='  // See also yP_EQ__NEW
 %token<fl>              '>'
 %token<fl>              '?'
 %token<fl>              '@'
@@ -1024,8 +1024,9 @@ BISONPRE_VERSION(3.7,%define api.header.include {"V3ParseBison.h"})
 %token<fl>              yP_SSRIGHT      ">>>"
 %token<fl>              yP_POW          "**"
 
-%token<fl>              yP_COLON__BEGIN ":-begin"
-%token<fl>              yP_COLON__FORK  ":-fork"
+%token<fl>              yP_COLON__BEGIN ":-then-begin"
+%token<fl>              yP_COLON__FORK  ":-then-fork"
+%token<fl>              yP_EQ__NEW      "=-then-new"
 %token<fl>              yP_PAR__IGNORE  "(-ignored"     // Used when sequence_expr:expr:( is ignored
 %token<fl>              yP_PAR__STRENGTH "(-for-strength"
 
@@ -2377,10 +2378,12 @@ variable_decl_assignment<varp>: // ==IEEE: variable_decl_assignment
         |       idSVKwd                                 { $$ = nullptr; }
         //
         //                      // IEEE: "dynamic_array_variable_identifier '[' ']' [ '=' dynamic_array_new ]"
-        //                      // Matches above with variable_dimensionE = "[]"
+        |       id variable_dimensionListE sigAttrListE yP_EQ__NEW dynamic_array_new
+                        { $$ = VARDONEA($<fl>1, *$1, $2, $3); $$->valuep($5); }
         //                      // IEEE: "class_variable_identifier [ '=' class_new ]"
         //                      // variable_dimensionE must be empty
-        //                      // Pushed into variable_declExpr:dynamic_array_new
+        |       id variable_dimensionListE sigAttrListE yP_EQ__NEW class_new
+                        { $$ = VARDONEA($<fl>1, *$1, $2, $3); $$->valuep($5); }
         ;
 
 list_of_tf_variable_identifiers<nodep>: // ==IEEE: list_of_tf_variable_identifiers
@@ -3666,8 +3669,8 @@ statement_item<nodep>:          // IEEE: statement_item
         //                      // IEEE: blocking_assignment
         //                      // 1800-2009 restricts LHS of assignment to new to not have a range
         //                      // This is ignored to avoid conflicts
-        |       fexprLvalue '=' class_newNoScope ';'    { $$ = new AstAssign{$2, $1, $3}; }
-        |       fexprLvalue '=' dynamic_array_new ';'   { $$ = new AstAssign{$2, $1, $3}; }
+        |       fexprLvalue yP_EQ__NEW dynamic_array_new ';'   { $$ = new AstAssign{$2, $1, $3}; }
+        |       fexprLvalue yP_EQ__NEW class_new ';'    { $$ = new AstAssign{$2, $1, $3}; }
         //                      // IEEE: inc_or_dec_expression
         |       finc_or_dec_expression ';'              { $$ = $1; }
         //
@@ -3919,7 +3922,19 @@ pinc_or_dec_expression<nodeExprp>:  // IEEE: inc_or_dec_expression (for property
 //UNSUP         BISONPRE_COPY(inc_or_dec_expression,{s/~l~/pev_/g})     // {copied}
 //UNSUP ;
 
-class_newNoScope<nodeExprp>:    // IEEE: class_new but no packageClassScope (issue #4199)
+class_new<nodeExprp>:    // IEEE: class_new
+        //                      // See V3ParseImp::tokenPipeScanEqNew that searches for '=' ... yNEW__LEX
+                class_newNoScope
+                        { $$ = $1; }
+        //                      // Special precedence so (...) doesn't match expr
+        //                      // A scope is not legal in front of a AstNewCopy
+        |       packageClassScopeNoId yNEW__ETC
+                        { $$ = AstDot::newIfPkg($<fl>2, $1, new AstNew{$2,  nullptr, true}); }
+        |       packageClassScopeNoId yNEW__PAREN '(' list_of_argumentsE ')'
+                        { $$ = AstDot::newIfPkg($<fl>2, $1, new AstNew{$2, $4, true}); }
+        ;
+
+class_newNoScope<nodeExprp>:    // IEEE: class_new but no packageClassScope
         //                      // Special precedence so (...) doesn't match expr
                 yNEW__ETC                               { $$ = new AstNew{$1,  nullptr}; }
         |       yNEW__ETC expr                          { $$ = new AstNewCopy{$1, $2}; }
@@ -7425,7 +7440,7 @@ class_typeExtImpOne<nodeExprp>:  // part of IEEE: class_type, where we either ge
 
 //=== Below rules assume special scoping per above
 
-packageClassScopeNoId<nodep>:   // IEEE: [package_scope] not followed by yaID
+packageClassScopeNoId<nodeExprp>:  // IEEE: [package_scope] not followed by yaID
                 packageClassScope                       { $$ = $1; }
         ;
 
diff --git a/test_regress/t/t_class_new_scoped.out b/test_regress/t/t_class_new_scoped.out
deleted file mode 100644
index 6fab6fab6..000000000
--- a/test_regress/t/t_class_new_scoped.out
+++ /dev/null
@@ -1,14 +0,0 @@
-%Error: t/t_class_new_scoped.v:45:21: syntax error, unexpected new, expecting IDENTIFIER-for-type
-   45 |       b = ClsNoArg::new;
-      |                     ^~~
-        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
-%Error: t/t_class_new_scoped.v:50:19: syntax error, unexpected new-then-paren, expecting IDENTIFIER-for-type
-   50 |       b = ClsArg::new(20, 1);
-      |                   ^~~
-%Error: t/t_class_new_scoped.v:55:27: syntax error, unexpected new-then-paren, expecting IDENTIFIER-for-type
-   55 |       b = ClsParam#(100)::new(33);
-      |                           ^~~
-%Error: t/t_class_new_scoped.v:60:27: syntax error, unexpected new-then-paren, expecting IDENTIFIER-for-type
-   60 |       b = ClsParam#(200)::new(44);
-      |                           ^~~
-%Error: Exiting due to
diff --git a/test_regress/t/t_class_new_scoped.py b/test_regress/t/t_class_new_scoped.py
index e33e10acf..fc5a55e3f 100755
--- a/test_regress/t/t_class_new_scoped.py
+++ b/test_regress/t/t_class_new_scoped.py
@@ -11,6 +11,8 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(fails=True, expect_filename=test.golden_filename)
+test.compile()
+
+test.execute()
 
 test.passes()
diff --git a/test_regress/t/t_class_new_scoped.v b/test_regress/t/t_class_new_scoped.v
index e1c5d1f65..e3b503126 100644
--- a/test_regress/t/t_class_new_scoped.v
+++ b/test_regress/t/t_class_new_scoped.v
@@ -8,59 +8,59 @@
 `define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d: got=%0d exp=%0d (%s !== %s)\n", `__FILE__,`__LINE__, (gotv), (expv), `"gotv`", `"expv`"); `stop; end while(0);
 
 class Base;
-   int imembera = 10;
-   function new(int i);
-      imembera = i;
-   endfunction
+  int m_ia = 10;
+  function new(int i);
+    m_ia = i;
+  endfunction
 endclass
 
 class ClsNoArg extends Base;
-   function new();
-      super.new(5);
-   endfunction : new
+  function new();
+    super.new(5);
+  endfunction : new
 endclass
 
 class ClsArg extends Base;
-   function new(int i, int j);
-      super.new(i + j);
-   endfunction
+  function new(int i, int j);
+    super.new(i + j);
+  endfunction
 endclass
 
 class ClsParam #(int ADD = 100) extends Base;
-   function new(int def = 42);
-      super.new(def + ADD);
-   endfunction
+  function new(int def = 42);
+    super.new(def + ADD);
+  endfunction
 endclass
 
 module t (/*AUTOARG*/);
-   initial begin
-      Base b;
-      ClsNoArg c1;
-      ClsArg c2;
-      ClsParam#(100) c3;
-      ClsParam#(200) c4;
+  initial begin
+    Base b;
+    ClsNoArg c1;
+    ClsArg c2;
+    ClsParam#(100) c3;
+    ClsParam#(200) c4;
 
-      c1 = new;
-      `checkd(c1.imembera, 5);
-      b = ClsNoArg::new;
-      `checkd(b.imembera, 5);
+    c1 = new;
+    `checkd(c1.m_ia, 5);
+    b = ClsNoArg::new;
+    `checkd(b.m_ia, 5);
 
-      c2 = new(20, 1);
-      `checkd(c2.imembera, 21);
-      b = ClsArg::new(20, 1);
-      `checkd(b.imembera, 21);
+    c2 = new(20, 1);
+    `checkd(c2.m_ia, 21);
+    b = ClsArg::new(20, 1);
+    `checkd(b.m_ia, 21);
 
-      c3 = new(33);
-      `checkd(c3.imembera, 133);
-      b = ClsParam#(100)::new(33);
-      `checkd(b.imembera, 133);
+    c3 = new(33);
+    `checkd(c3.m_ia, 133);
+    b = ClsParam#(100)::new(33);
+    `checkd(b.m_ia, 133);
 
-      c4 = new(44);
-      `checkd(c4.imembera, 244);
-      b = ClsParam#(200)::new(44);
-      `checkd(b.imembera, 244);
+    c4 = new(44);
+    `checkd(c4.m_ia, 244);
+    b = ClsParam#(200)::new(44);
+    `checkd(b.m_ia, 244);
 
-      $write("*-* All Finished *-*\n");
-      $finish;
-   end
+    $write("*-* All Finished *-*\n");
+    $finish;
+  end
 endmodule
diff --git a/test_regress/t/t_class_new_scoped_bad.out b/test_regress/t/t_class_new_scoped_bad.out
new file mode 100644
index 000000000..12fc842e7
--- /dev/null
+++ b/test_regress/t/t_class_new_scoped_bad.out
@@ -0,0 +1,6 @@
+%Error: t/t_class_new_scoped_bad.v:17:16: new() assignment not legal to non-class 'Pkg'
+                                        : ... note: In instance 't'
+   17 |       c = Pkg::new;   
+      |                ^~~
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
+%Error: Exiting due to
diff --git a/test_regress/t/t_class_new_scoped_bad.py b/test_regress/t/t_class_new_scoped_bad.py
new file mode 100755
index 000000000..31228c9a7
--- /dev/null
+++ b/test_regress/t/t_class_new_scoped_bad.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('linter')
+
+test.lint(fails=True, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_class_new_scoped_bad.v b/test_regress/t/t_class_new_scoped_bad.v
new file mode 100644
index 000000000..bf9c78f59
--- /dev/null
+++ b/test_regress/t/t_class_new_scoped_bad.v
@@ -0,0 +1,19 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+
+package Pkg;
+endpackage
+
+class C;
+endclass
+
+module t;
+   C c;
+   initial begin
+      c = Pkg::new;  // Bad
+   end
+endmodule
diff --git a/test_regress/t/t_class_new_typed.py b/test_regress/t/t_class_new_typed.py
new file mode 100755
index 000000000..d4f986441
--- /dev/null
+++ b/test_regress/t/t_class_new_typed.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_class_new_typed.v b/test_regress/t/t_class_new_typed.v
new file mode 100644
index 000000000..e2a8c5bdf
--- /dev/null
+++ b/test_regress/t/t_class_new_typed.v
@@ -0,0 +1,30 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t ();
+class SuperCls;
+   int s = 2;
+   function new(int def = 3);
+      s = def;
+   endfunction
+endclass
+
+class Cls extends SuperCls;
+   function new(int def = 42);
+      s = def;
+   endfunction
+endclass
+
+   SuperCls super_obj;
+
+   initial begin
+      super_obj = Cls::new;
+      if (super_obj.s != 42) $stop;
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+endmodule

From 4ddc64983695630c7818866148320a76a99ace46 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Wed, 2 Jul 2025 20:54:47 -0400
Subject: [PATCH 198/211] Add UNSUPPORTED rather than syntax error on
 pullup/pulldown strengths

---
 src/verilog.y                       | 27 +++++++++++++++++---
 test_regress/t/t_tri_pull_unsup.out | 38 +++++++++++++++++++++++++++++
 test_regress/t/t_tri_pull_unsup.py  | 16 ++++++++++++
 test_regress/t/t_tri_pull_unsup.v   | 36 +++++++++++++++++++++++++++
 4 files changed, 114 insertions(+), 3 deletions(-)
 create mode 100644 test_regress/t/t_tri_pull_unsup.out
 create mode 100755 test_regress/t/t_tri_pull_unsup.py
 create mode 100644 test_regress/t/t_tri_pull_unsup.v

diff --git a/src/verilog.y b/src/verilog.y
index 54475e915..d68171115 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -5541,8 +5541,8 @@ gateDecl<nodep>:
         |       yNOR    driveStrengthE delay_controlE gateNorList ';'     { $$ = $4; STRENGTH_LIST($4, $2, AssignW); DELAY_LIST($3, $4); }
         |       yXOR    driveStrengthE delay_controlE gateXorList ';'     { $$ = $4; STRENGTH_LIST($4, $2, AssignW); DELAY_LIST($3, $4); }
         |       yXNOR   driveStrengthE delay_controlE gateXnorList ';'    { $$ = $4; STRENGTH_LIST($4, $2, AssignW); DELAY_LIST($3, $4); }
-        |       yPULLUP   delay_controlE gatePullupList ';'     { $$ = $3; DELAY_LIST($2, $3); }
-        |       yPULLDOWN delay_controlE gatePulldownList ';'   { $$ = $3; DELAY_LIST($2, $3); }
+        |       yPULLDOWN pulldown_strengthE delay_controlE gatePulldownList ';'   { $$ = $4; DELAY_LIST($3, $4); }
+        |       yPULLUP   pullup_strengthE   delay_controlE gatePullupList ';'     { $$ = $4; DELAY_LIST($3, $4); }
         |       yNMOS     delay_controlE gateBufif1List ';'     { $$ = $3; DELAY_LIST($2, $3); }
         |       yPMOS     delay_controlE gateBufif0List ';'     { $$ = $3; DELAY_LIST($2, $3); }
         //
@@ -5759,7 +5759,6 @@ driveStrengthE<nodep>:
         |       driveStrength                           { $$ = $1; }
         ;
 
-
 driveStrength<nodep>:
                 yP_PAR__STRENGTH strength0 ',' strength1 ')' { $$ = new AstStrengthSpec{$1, $2, $4}; }
         |       yP_PAR__STRENGTH strength1 ',' strength0 ')' { $$ = new AstStrengthSpec{$1, $4, $2}; }
@@ -5769,6 +5768,28 @@ driveStrength<nodep>:
         |       yP_PAR__STRENGTH yHIGHZ1 ',' strength0 ')' { BBUNSUP($<fl>2, "Unsupported: highz strength"); }
         ;
 
+pulldown_strengthE<nodep>:  // IEEE: [ pulldown_strength ]
+                /* empty */                             { $$ = nullptr; }
+        |       pulldown_strength                       { $$ = $1; }
+        ;
+
+pulldown_strength<nodep>:  // IEEE: pulldown_strength
+                yP_PAR__STRENGTH strength0 ',' strength1 ')'  { BBUNSUP($<fl>2, "Unsupported: pulldown strength"); }
+        |       yP_PAR__STRENGTH strength1 ',' strength0 ')'  { BBUNSUP($<fl>2, "Unsupported: pulldown strength"); }
+        |       yP_PAR__STRENGTH strength0 ')'                { BBUNSUP($<fl>2, "Unsupported: pulldown strength"); }
+        ;
+
+pullup_strengthE<nodep>:  // IEEE: [ pullup_strength ]
+                /* empty */                             { $$ = nullptr; }
+        |       pullup_strength                         { $$ = $1; }
+        ;
+
+pullup_strength<nodep>:  // IEEE: pullup_strength
+                yP_PAR__STRENGTH strength0 ',' strength1 ')'  { BBUNSUP($<fl>2, "Unsupported: pullup strength"); }
+        |       yP_PAR__STRENGTH strength1 ',' strength0 ')'  { BBUNSUP($<fl>2, "Unsupported: pullup strength"); }
+        |       yP_PAR__STRENGTH strength1 ')'                { BBUNSUP($<fl>2, "Unsupported: pullup strength"); }
+        ;
+
 //************************************************
 // Tables
 
diff --git a/test_regress/t/t_tri_pull_unsup.out b/test_regress/t/t_tri_pull_unsup.out
new file mode 100644
index 000000000..1ac22dac5
--- /dev/null
+++ b/test_regress/t/t_tri_pull_unsup.out
@@ -0,0 +1,38 @@
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:15:11: Unsupported: pullup strength
+   15 |   pullup (supply1) pu1(a);
+      |           ^~~~~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:16:11: Unsupported: pullup strength
+   16 |   pullup (strong1) pu2(a);
+      |           ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:17:11: Unsupported: pullup strength
+   17 |   pullup (pull1) pu3(a);
+      |           ^~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:18:11: Unsupported: pullup strength
+   18 |   pullup (weak1) pu4(a);
+      |           ^~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:19:11: Unsupported: pullup strength
+   19 |   pullup (supply1, supply0) pu5(a);
+      |           ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:20:11: Unsupported: pullup strength
+   20 |   pullup (strong0, strong1) pu6(a);
+      |           ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:29:13: Unsupported: pulldown strength
+   29 |   pulldown (supply0) pd1(a);
+      |             ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:30:13: Unsupported: pulldown strength
+   30 |   pulldown (strong0) pd2(a);
+      |             ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:31:13: Unsupported: pulldown strength
+   31 |   pulldown (pull0) pd3(a);
+      |             ^~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:32:13: Unsupported: pulldown strength
+   32 |   pulldown (weak0) pd4(a);
+      |             ^~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:33:13: Unsupported: pulldown strength
+   33 |   pulldown (supply0, supply1) pd5(a);
+      |             ^~~~~~~
+%Error-UNSUPPORTED: t/t_tri_pull_unsup.v:34:13: Unsupported: pulldown strength
+   34 |   pulldown (strong1, strong0) pd6(a);
+      |             ^~~~~~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_tri_pull_unsup.py b/test_regress/t/t_tri_pull_unsup.py
new file mode 100755
index 000000000..6585af685
--- /dev/null
+++ b/test_regress/t/t_tri_pull_unsup.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('vlt')
+
+test.lint(fails=test.vlt_all, expect_filename=test.golden_filename)
+
+test.passes()
diff --git a/test_regress/t/t_tri_pull_unsup.v b/test_regress/t/t_tri_pull_unsup.v
new file mode 100644
index 000000000..b20379429
--- /dev/null
+++ b/test_regress/t/t_tri_pull_unsup.v
@@ -0,0 +1,36 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+module t;
+  wire u1;
+  wire u2;
+  wire u3;
+  wire u4;
+  wire u5;
+  wire u6;
+
+  pullup (supply1) pu1(a);
+  pullup (strong1) pu2(a);
+  pullup (pull1) pu3(a);
+  pullup (weak1) pu4(a);
+  pullup (supply1, supply0) pu5(a);
+  pullup (strong0, strong1) pu6(a);
+
+  wire d1;
+  wire d2;
+  wire d3;
+  wire d4;
+  wire d5;
+  wire d6;
+
+  pulldown (supply0) pd1(a);
+  pulldown (strong0) pd2(a);
+  pulldown (pull0) pd3(a);
+  pulldown (weak0) pd4(a);
+  pulldown (supply0, supply1) pd5(a);
+  pulldown (strong1, strong0) pd6(a);
+
+endmodule

From e0c3b4226205cda86e5963c83165127be56ae58f Mon Sep 17 00:00:00 2001
From: Paul Swirhun <63216497+paul-demo@users.noreply.github.com>
Date: Wed, 2 Jul 2025 19:56:10 -0700
Subject: [PATCH 199/211] Fix developer build error on MacOS/Flex2.6.4
 (https://github.com/verilator/verilator/pull/6153)

---
 src/V3LinkDot.cpp | 2 ++
 src/flexfix       | 6 +++++-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 969f510dd..64eaf05fe 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -3365,6 +3365,8 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     ok = true;
                     m_ds.m_dotText = "";
+                } else {
+                    (void)defp;  // Prevent unused variable warning
                 }
             } else if (AstEnumItem* const valuep = VN_CAST(foundp->nodep(), EnumItem)) {
                 if (allowVar) {
diff --git a/src/flexfix b/src/flexfix
index a6479b8e1..b834453c3 100755
--- a/src/flexfix
+++ b/src/flexfix
@@ -18,13 +18,17 @@ for line in sys.stdin:
     # Fix flex 2.6.1 warning
     line = re.sub(r'for \( i = 0; i < _yybytes_len; \+\+i \)',
                   r'for ( i = 0; (yy_size_t)(i) < (yy_size_t)(_yybytes_len); ++i )', line)
-    # Fix flex 2.6.0 warning
+    # Fix flex 2.6.0+ sign comparison warnings
     line = re.sub(
         r'\(\(int\) \(\(yy_n_chars\) \+ number_to_move\) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size\)',
         r'((int) ((yy_n_chars) + number_to_move) > (int) YY_CURRENT_BUFFER_LVALUE->yy_buf_size)',
         line)
     line = re.sub(r' number_to_move == YY_MORE_ADJ ', r' (int)number_to_move == (int)YY_MORE_ADJ ',
                   line)
+    line = re.sub(
+        r'\(\(\(yy_n_chars\) \+ number_to_move\) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size\)',
+        r'(((int)(yy_n_chars) + (int)number_to_move) > (int)YY_CURRENT_BUFFER_LVALUE->yy_buf_size)',
+        line)
     # Fix flex 2.5.4 namespace omission
     line = re.sub(r'^class istream;', '#include <iostream>\nusing namespace std;\n', line)
     # Fix flex 2.5.31 redefinition

From 92970bd9a0a13864b1f94f93f4268c23e6494f82 Mon Sep 17 00:00:00 2001
From: Tobias Rosenkranz <trosenkranz@users.noreply.github.com>
Date: Thu, 3 Jul 2025 21:29:03 +0200
Subject: [PATCH 200/211] Update docker base image to Ubuntu 24.04 (#6147)

---
 .github/workflows/docker.yml  |  2 +-
 Changes                       |  3 ++-
 ci/docker/buildenv/Dockerfile |  4 +++-
 ci/docker/buildenv/README.rst | 14 +++++++-------
 ci/docker/run/Dockerfile      |  2 +-
 5 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/.github/workflows/docker.yml b/.github/workflows/docker.yml
index fa59cadb2..484415e1a 100644
--- a/.github/workflows/docker.yml
+++ b/.github/workflows/docker.yml
@@ -29,7 +29,7 @@ jobs:
 
   build:
 
-    runs-on: ubuntu-22.04
+    runs-on: ubuntu-24.04
 
     strategy:
       matrix:
diff --git a/Changes b/Changes
index 0907c0684..c87779c35 100644
--- a/Changes
+++ b/Changes
@@ -37,7 +37,7 @@ Verilator 5.037 devel
 * Improve hierarchical scheduling visualization in V3ExecGraph (#6009). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
-* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH.]
+* Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH]
 * Optimize DFG De Morgan patterns (#6090). [Geza Lore]
 * Optimize DFG variable elimination (#6091). [Geza Lore]
 * Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
@@ -87,6 +87,7 @@ Verilator 5.037 devel
 * Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
 * Fix `pre_randomize`/`post_randomize` when no randomize (#6128). [Alex Solomatnikov]
 * Fix interface array connections with non-zero low declaration index.
+* Update docker base image (#6147). [Tobias Rosenkranz, bitaggregat GmbH]
 
 
 Verilator 5.036 2025-04-27
diff --git a/ci/docker/buildenv/Dockerfile b/ci/docker/buildenv/Dockerfile
index 7e13feca8..520735317 100644
--- a/ci/docker/buildenv/Dockerfile
+++ b/ci/docker/buildenv/Dockerfile
@@ -6,7 +6,7 @@
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-FROM ubuntu:22.04
+FROM ubuntu:24.04
 
 # Create the user
 RUN groupadd verilator \
@@ -36,12 +36,14 @@ RUN apt-get update \
                         help2man \
                         libfl2 \
                         libfl-dev \
+                        libclang-rt-18-dev \
                         libgoogle-perftools-dev \
                         libsystemc \
                         libsystemc-dev \
                         numactl \
                         perl \
                         python3 \
+                        python3-distro \
                         wget \
                         z3 \
                         zlib1g \
diff --git a/ci/docker/buildenv/README.rst b/ci/docker/buildenv/README.rst
index 64d82509b..5ee9e4e95 100644
--- a/ci/docker/buildenv/README.rst
+++ b/ci/docker/buildenv/README.rst
@@ -13,7 +13,7 @@ Verilator build. It uses the following parameters:
 
 -  Source revision (default: master)
 
--  Compiler (GCC 10.3.0, clang 10.0.0, default: 10.3.0)
+-  Compiler (GCC 13.3.0, clang 18.1.3, default: 13.3.0)
 
 The container is published as ``verilator/verilator-buildenv`` on `docker
 hub
@@ -31,18 +31,18 @@ To also run tests:
 
    docker run -ti verilator/verilator-buildenv test
 
-To change the compiler:
+To change the compiler use the `-e` switch to pass environment variables:
 
 ::
 
-   docker run -ti -e CC=clang-10 -e CXX=clang++-10 verilator/verilator-buildenv test
+   docker run -ti -e CC=clang-18 -e CXX=clang++-18 verilator/verilator-buildenv test
 
-The tests that involve gdb are not working due to security restrictions.
-To run those too:
+The tests, that involve numactl are not working due to security restrictions.
+To run those too, add the CAP_SYS_NICE capability during the start of the container:
 
 ::
 
-   docker run -ti -e CC=clang-10 -e CXX=clang++-10 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+   docker run -ti --cap-add=CAP_SYS_NICE verilator/verilator-buildenv test
 
 Rather then building using a remote git repository you may prefer to use a
 working copy on the local filesystem. Mount the local working copy path as
@@ -52,7 +52,7 @@ top of a repository:
 
 ::
 
-   docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test
+   docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` verilator/verilator-buildenv test
 
 
 Rebuilding
diff --git a/ci/docker/run/Dockerfile b/ci/docker/run/Dockerfile
index 7f9ea5ff6..32391c69f 100644
--- a/ci/docker/run/Dockerfile
+++ b/ci/docker/run/Dockerfile
@@ -6,7 +6,7 @@
 # Version 2.0.
 # SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
 
-FROM ubuntu:22.04
+FROM ubuntu:24.04
 
 RUN apt-get update \
     && DEBIAN_FRONTEND=noninteractive \

From 08fef668cda93e186e744fc7a1881a43fc379e97 Mon Sep 17 00:00:00 2001
From: Todd Strader <todd.strader@gmail.com>
Date: Thu, 3 Jul 2025 18:00:39 -0400
Subject: [PATCH 201/211] Fix more wide ternary + coverage cases (#6155)

---
 src/V3Const.cpp                              |  9 +++--
 test_regress/t/t_cover_line_wide_ternary.out | 39 +++++++++++++++++---
 test_regress/t/t_cover_line_wide_ternary.v   | 26 ++++++++++---
 3 files changed, 60 insertions(+), 14 deletions(-)

diff --git a/src/V3Const.cpp b/src/V3Const.cpp
index 7bb65f963..690e70db2 100644
--- a/src/V3Const.cpp
+++ b/src/V3Const.cpp
@@ -2107,9 +2107,12 @@ class ConstVisitor final : public VNVisitor {
                 AstVar* const tempPurep = new AstVar{rhsp->fileline(), VVarType::BLOCKTEMP,
                                                      m_concswapNames.get(rhsp), rhsp->dtypep()};
                 m_modp->addStmtsp(tempPurep);
-                AstAssign* const asnp = new AstAssign(
-                    nodep->fileline(), new AstVarRef{rhsp->fileline(), tempPurep, VAccess::WRITE},
-                    rhsp);
+                AstVarRef* const tempPureRefp
+                    = new AstVarRef{rhsp->fileline(), tempPurep, VAccess::WRITE};
+                AstNodeAssign* const asnp
+                    = VN_IS(nodep, AssignDly)
+                          ? new AstAssign(nodep->fileline(), tempPureRefp, rhsp)
+                          : nodep->cloneType(tempPureRefp, rhsp);
                 nodep->addHereThisAsNext(asnp);
                 nodep->rhsp(new AstVarRef{rhsp->fileline(), tempPurep, VAccess::READ});
             } else if (need_temp) {
diff --git a/test_regress/t/t_cover_line_wide_ternary.out b/test_regress/t/t_cover_line_wide_ternary.out
index 8b5f49c7f..71e8134ec 100644
--- a/test_regress/t/t_cover_line_wide_ternary.out
+++ b/test_regress/t/t_cover_line_wide_ternary.out
@@ -23,7 +23,9 @@
 -000001  point: comment=block hier=top.t
         
             intf intfs [2] ();
-            intf intf_sel();
+            intf intf_sel_ff();
+            intf intf_sel_comb();
+            intf intf_sel_assign();
         
 %000001     always_comb begin
 -000001  point: comment=block hier=top.t
@@ -33,9 +35,9 @@
 -000001  point: comment=block hier=top.t
             end
         
-%000009     always @ (posedge clk) begin
+%000009     always_ff @ (posedge clk) begin
 -000009  point: comment=block hier=top.t
-%000009         {intf_sel.foo, intf_sel.bar, intf_sel.baz} <=
+%000009         {intf_sel_ff.foo, intf_sel_ff.bar, intf_sel_ff.baz} <=
 -000009  point: comment=block hier=top.t
 %000009             cyc[0] ?
 -000009  point: comment=cond_then hier=top.t
@@ -46,6 +48,29 @@
 -000009  point: comment=cond_else hier=top.t
             end
         
+ 000010     always_comb begin
++000010  point: comment=block hier=top.t
+ 000010         {intf_sel_comb.foo, intf_sel_comb.bar, intf_sel_comb.baz} =
++000010  point: comment=block hier=top.t
+ 000010             cyc[0] ?
++000010  point: comment=cond_then hier=top.t
++000010  point: comment=cond_else hier=top.t
+ 000010             {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
++000010  point: comment=cond_then hier=top.t
+ 000010             {intfs[0].foo, intfs[0].bar, intfs[0].baz};
++000010  point: comment=cond_else hier=top.t
+            end
+        
+            assign
+                {intf_sel_assign.foo, intf_sel_assign.bar, intf_sel_assign.baz} =
+ 000010             cyc[0] ?
++000010  point: comment=cond_then hier=top.t
++000010  point: comment=cond_else hier=top.t
+ 000010             {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
++000010  point: comment=cond_then hier=top.t
+ 000010             {intfs[0].foo, intfs[0].bar, intfs[0].baz};
++000010  point: comment=cond_else hier=top.t
+        
 %000009     always @ (posedge clk) begin
 -000009  point: comment=block hier=top.t
 %000009         cyc <= cyc + 1;
@@ -53,9 +78,11 @@
 %000008         if (cyc==9) begin
 -000008  point: comment=else hier=top.t
 -000001  point: comment=if hier=top.t
-%000001             $display("bar = %0d", intf_sel.bar);
--000001  point: comment=if hier=top.t
-%000001             if (intf_sel.bar != 123) $stop();
+%000001             if (intf_sel_ff.bar != 123) $stop();
+-000001  point: comment=else hier=top.t
+%000001             if (intf_sel_comb.bar != 456) $stop();
+-000001  point: comment=else hier=top.t
+%000001             if (intf_sel_assign.bar != 456) $stop();
 -000001  point: comment=else hier=top.t
 %000001             $write("*-* All Finished *-*\n");
 -000001  point: comment=if hier=top.t
diff --git a/test_regress/t/t_cover_line_wide_ternary.v b/test_regress/t/t_cover_line_wide_ternary.v
index fdd1bfba7..dcbf2d040 100644
--- a/test_regress/t/t_cover_line_wide_ternary.v
+++ b/test_regress/t/t_cover_line_wide_ternary.v
@@ -21,25 +21,41 @@ module t (/*AUTOARG*/
     initial cyc=1;
 
     intf intfs [2] ();
-    intf intf_sel();
+    intf intf_sel_ff();
+    intf intf_sel_comb();
+    intf intf_sel_assign();
 
     always_comb begin
         intfs[0].bar = 123;
         intfs[1].bar = 456;
     end
 
-    always @ (posedge clk) begin
-        {intf_sel.foo, intf_sel.bar, intf_sel.baz} <=
+    always_ff @ (posedge clk) begin
+        {intf_sel_ff.foo, intf_sel_ff.bar, intf_sel_ff.baz} <=
             cyc[0] ?
             {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
             {intfs[0].foo, intfs[0].bar, intfs[0].baz};
     end
 
+    always_comb begin
+        {intf_sel_comb.foo, intf_sel_comb.bar, intf_sel_comb.baz} =
+            cyc[0] ?
+            {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
+            {intfs[0].foo, intfs[0].bar, intfs[0].baz};
+    end
+
+    assign
+        {intf_sel_assign.foo, intf_sel_assign.bar, intf_sel_assign.baz} =
+            cyc[0] ?
+            {intfs[1].foo, intfs[1].bar, intfs[1].baz} :
+            {intfs[0].foo, intfs[0].bar, intfs[0].baz};
+
     always @ (posedge clk) begin
         cyc <= cyc + 1;
         if (cyc==9) begin
-            $display("bar = %0d", intf_sel.bar);
-            if (intf_sel.bar != 123) $stop();
+            if (intf_sel_ff.bar != 123) $stop();
+            if (intf_sel_comb.bar != 456) $stop();
+            if (intf_sel_assign.bar != 456) $stop();
             $write("*-* All Finished *-*\n");
             $finish;
         end

From 6c9cbaef620c37ecab11621b8c549fb8514ff37d Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 18:59:32 -0400
Subject: [PATCH 202/211] Internals: Clean up some constructors. No functional
 change intended.

---
 include/verilated_random.h | 10 +++++-----
 src/V3Ast.h                |  2 +-
 src/V3AstNodeDType.h       | 28 ++++++++++++++--------------
 src/V3AstNodeExpr.h        | 14 +++++++-------
 src/V3AstNodeOther.h       | 12 ++++++------
 src/V3AstNodes.cpp         |  2 +-
 src/V3CUse.cpp             |  2 +-
 src/V3Coverage.cpp         |  2 +-
 src/V3EmitCFunc.h          |  4 ++--
 src/V3ExecGraph.cpp        |  2 +-
 src/V3LinkDot.cpp          |  2 +-
 src/V3MergeCond.cpp        |  4 ++--
 src/V3OptionParser.h       |  2 +-
 src/V3Randomize.cpp        |  8 ++++----
 src/V3SymTable.h           | 34 +++++++++++++++++-----------------
 src/V3Undriven.cpp         |  2 +-
 src/V3UniqueNames.h        |  2 +-
 17 files changed, 66 insertions(+), 66 deletions(-)

diff --git a/include/verilated_random.h b/include/verilated_random.h
index f144b179d..1fdf61629 100644
--- a/include/verilated_random.h
+++ b/include/verilated_random.h
@@ -45,11 +45,11 @@ public:
 
     ArrayInfo(const std::string& name, void* datap, int index, const std::vector<IData>& indices,
               const std::vector<size_t>& idxWidths)
-        : m_name(name)
-        , m_datap(datap)
-        , m_index(index)
-        , m_indices(indices)
-        , m_idxWidths(idxWidths) {}
+        : m_name{name}
+        , m_datap{datap}
+        , m_index{index}
+        , m_indices{indices}
+        , m_idxWidths{idxWidths} {}
 };
 using ArrayInfoMap = std::map<std::string, std::shared_ptr<const ArrayInfo>>;
 
diff --git a/src/V3Ast.h b/src/V3Ast.h
index 20715688e..dd350519f 100644
--- a/src/V3Ast.h
+++ b/src/V3Ast.h
@@ -1415,7 +1415,7 @@ public:
 
     // cppcheck-suppress noExplicitConstructor
     constexpr VStrength(en strengthLevel)
-        : m_e(strengthLevel) {}
+        : m_e{strengthLevel} {}
     explicit VStrength(int _e)
         : m_e(static_cast<en>(_e)) {}  // Need () or GCC 4.8 false warning
     constexpr operator en() const { return m_e; }
diff --git a/src/V3AstNodeDType.h b/src/V3AstNodeDType.h
index 635095644..1a43f4ef0 100644
--- a/src/V3AstNodeDType.h
+++ b/src/V3AstNodeDType.h
@@ -245,12 +245,12 @@ protected:
         numeric(VSigning::fromBool(numericUnpack.isSigned()));
     }
     AstNodeUOrStructDType(const AstNodeUOrStructDType& other)
-        : AstNodeDType(other)
-        , m_name(other.m_name)
-        , m_uniqueNum(uniqueNumInc())
-        , m_packed(other.m_packed)
-        , m_isFourstate(other.m_isFourstate)
-        , m_constrainedRand(false) {}
+        : AstNodeDType{other}
+        , m_name{other.m_name}
+        , m_uniqueNum{uniqueNumInc()}
+        , m_packed{other.m_packed}
+        , m_isFourstate{other.m_isFourstate}
+        , m_constrainedRand{false} {}
 
 public:
     ASTGEN_MEMBERS_AstNodeUOrStructDType;
@@ -684,8 +684,8 @@ public:
     }
     AstDefImplicitDType(const AstDefImplicitDType& other)
         : AstNodeDType(other)
-        , m_name(other.m_name)
-        , m_uniqueNum(uniqueNumInc()) {}
+        , m_name{other.m_name}
+        , m_uniqueNum{uniqueNumInc()} {}
     ASTGEN_MEMBERS_AstDefImplicitDType;
     int uniqueNum() const { return m_uniqueNum; }
     bool sameNode(const AstNode* samep) const override {
@@ -800,9 +800,9 @@ public:
         widthFromSub(subDTypep());
     }
     AstEnumDType(const AstEnumDType& other)
-        : AstNodeDType(other)
-        , m_name(other.m_name)
-        , m_uniqueNum(uniqueNumInc()) {}
+        : AstNodeDType{other}
+        , m_name{other.m_name}
+        , m_uniqueNum{uniqueNumInc()} {}
     ASTGEN_MEMBERS_AstEnumDType;
 
     const char* broken() const override;
@@ -925,7 +925,7 @@ public:
                    AstNode* valuep)
         : ASTGEN_SUPER_MemberDType(fl)
         , m_name{name}
-        , m_constrainedRand(false) {
+        , m_constrainedRand{false} {
         childDTypep(dtp);  // Only for parser
         this->valuep(valuep);
         dtypep(nullptr);  // V3Width will resolve
@@ -934,7 +934,7 @@ public:
     AstMemberDType(FileLine* fl, const string& name, AstNodeDType* dtp)
         : ASTGEN_SUPER_MemberDType(fl)
         , m_name{name}
-        , m_constrainedRand(false) {
+        , m_constrainedRand{false} {
         UASSERT(dtp, "AstMember created with no dtype");
         refDTypep(dtp);
         dtypep(this);
@@ -1434,7 +1434,7 @@ public:
     // isSoft implies packed
     AstUnionDType(FileLine* fl, bool isSoft, VSigning numericUnpack)
         : ASTGEN_SUPER_UnionDType(fl, numericUnpack)
-        , m_isSoft(isSoft) {
+        , m_isSoft{isSoft} {
         packed(packed() | m_isSoft);
     }
     ASTGEN_MEMBERS_AstUnionDType;
diff --git a/src/V3AstNodeExpr.h b/src/V3AstNodeExpr.h
index 970b6e54a..8be95ea1f 100644
--- a/src/V3AstNodeExpr.h
+++ b/src/V3AstNodeExpr.h
@@ -820,14 +820,14 @@ public:
         : ASTGEN_SUPER_ConsDynArray(fl) {}
     explicit AstConsDynArray(FileLine* fl, bool lhsIsValue, AstNode* lhsp)
         : ASTGEN_SUPER_ConsDynArray(fl)
-        , m_lhsIsValue(lhsIsValue) {
+        , m_lhsIsValue{lhsIsValue} {
         this->lhsp(lhsp);
     }
     explicit AstConsDynArray(FileLine* fl, bool lhsIsValue, AstNode* lhsp, bool rhsIsValue,
                              AstNode* rhsp)
         : ASTGEN_SUPER_ConsDynArray(fl)
-        , m_lhsIsValue(lhsIsValue)
-        , m_rhsIsValue(rhsIsValue) {
+        , m_lhsIsValue{lhsIsValue}
+        , m_rhsIsValue{rhsIsValue} {
         this->lhsp(lhsp);
         this->rhsp(rhsp);
     }
@@ -902,14 +902,14 @@ public:
         : ASTGEN_SUPER_ConsQueue(fl) {}
     explicit AstConsQueue(FileLine* fl, bool lhsIsValue, AstNode* lhsp)
         : ASTGEN_SUPER_ConsQueue(fl)
-        , m_lhsIsValue(lhsIsValue) {
+        , m_lhsIsValue{lhsIsValue} {
         this->lhsp(lhsp);
     }
     explicit AstConsQueue(FileLine* fl, bool lhsIsValue, AstNode* lhsp, bool rhsIsValue,
                           AstNode* rhsp)
         : ASTGEN_SUPER_ConsQueue(fl)
-        , m_lhsIsValue(lhsIsValue)
-        , m_rhsIsValue(rhsIsValue) {
+        , m_lhsIsValue{lhsIsValue}
+        , m_rhsIsValue{rhsIsValue} {
         this->lhsp(lhsp);
         this->rhsp(rhsp);
     }
@@ -1605,7 +1605,7 @@ public:
     AstLambdaArgRef(FileLine* fl, const string& name, bool index)
         : ASTGEN_SUPER_LambdaArgRef(fl)
         , m_name{name}
-        , m_index(index) {}
+        , m_index{index} {}
     bool sameNode(const AstNode* /*samep*/) const override { return true; }
     string emitVerilog() override { return name(); }
     string emitC() override { V3ERROR_NA_RETURN(""); }
diff --git a/src/V3AstNodeOther.h b/src/V3AstNodeOther.h
index 2a4304ccf..6502a8838 100644
--- a/src/V3AstNodeOther.h
+++ b/src/V3AstNodeOther.h
@@ -510,7 +510,7 @@ public:
     AstNodeReadWriteMem(VNType t, FileLine* fl, bool hex, AstNodeExpr* filenamep,
                         AstNodeExpr* memp, AstNodeExpr* lsbp, AstNodeExpr* msbp)
         : AstNodeStmt{t, fl}
-        , m_isHex(hex) {
+        , m_isHex{hex} {
         this->filenamep(filenamep);
         this->memp(memp);
         this->lsbp(lsbp);
@@ -1114,7 +1114,7 @@ class AstConstraint final : public AstNode {
 public:
     AstConstraint(FileLine* fl, const string& name, AstNode* itemsp)
         : ASTGEN_SUPER_Constraint(fl)
-        , m_name(name) {
+        , m_name{name} {
         addItemsp(itemsp);
     }
     ASTGEN_MEMBERS_AstConstraint;
@@ -1579,7 +1579,7 @@ public:
     AstPragma(FileLine* fl, VPragmaType pragType, const VTimescale& timescale)
         : ASTGEN_SUPER_Pragma(fl)
         , m_pragType{pragType}
-        , m_timescale(timescale) {}
+        , m_timescale{timescale} {}
     ASTGEN_MEMBERS_AstPragma;
     VPragmaType pragType() const { return m_pragType; }  // *=type of the pragma
     bool isPredictOptimizable() const override { return false; }
@@ -2880,7 +2880,7 @@ class AstCReset final : public AstNodeStmt {
 public:
     AstCReset(FileLine* fl, AstVarRef* varrefp, bool constructing)
         : ASTGEN_SUPER_CReset(fl)
-        , m_constructing(constructing) {
+        , m_constructing{constructing} {
         this->varrefp(varrefp);
     }
     ASTGEN_MEMBERS_AstCReset;
@@ -3518,7 +3518,7 @@ class AstStop final : public AstNodeStmt {
 public:
     AstStop(FileLine* fl, bool isFatal)
         : ASTGEN_SUPER_Stop(fl)
-        , m_isFatal(isFatal) {}
+        , m_isFatal{isFatal} {}
     ASTGEN_MEMBERS_AstStop;
     void dump(std::ostream& str) const override;
     void dumpJson(std::ostream& str) const override;
@@ -4094,7 +4094,7 @@ public:
     explicit AstTextBlock(FileLine* fl, const string& textp = "", bool tracking = false,
                           bool commas = false)
         : ASTGEN_SUPER_TextBlock(fl, textp, tracking)
-        , m_commas(commas) {}
+        , m_commas{commas} {}
     ASTGEN_MEMBERS_AstTextBlock;
     bool commas() const { return m_commas; }
     void commas(bool flag) { m_commas = flag; }
diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp
index 7903046c6..5c073487b 100644
--- a/src/V3AstNodes.cpp
+++ b/src/V3AstNodes.cpp
@@ -788,7 +788,7 @@ string AstVar::dpiTmpVarType(const string& varName) const {
 
     public:
         explicit converter(const string& name)
-            : m_name(name) {}
+            : m_name{name} {}
     };
     return converter{varName}.convert(this);
 }
diff --git a/src/V3CUse.cpp b/src/V3CUse.cpp
index 46505673f..e51507c39 100644
--- a/src/V3CUse.cpp
+++ b/src/V3CUse.cpp
@@ -92,7 +92,7 @@ class CUseVisitor final : public VNVisitorConst {
 public:
     // CONSTRUCTORS
     explicit CUseVisitor(AstNodeModule* modp)
-        : m_modp(modp) {
+        : m_modp{modp} {
         iterateConst(modp);
 
         for (auto& used : m_didUse) {
diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp
index a5ef8f363..3ec67eb85 100644
--- a/src/V3Coverage.cpp
+++ b/src/V3Coverage.cpp
@@ -83,7 +83,7 @@ class CoverageVisitor final : public VNVisitor {
         CoverTerm(AstNodeExpr* exprp, bool objective, const string& emitV)
             : m_exprp{exprp}
             , m_objective{objective}
-            , m_emitV(emitV) {}
+            , m_emitV{emitV} {}
     };
     using CoverExpr = std::deque<CoverTerm>;
     using CoverExprs = std::list<CoverExpr>;
diff --git a/src/V3EmitCFunc.h b/src/V3EmitCFunc.h
index a5bc9f002..491e6c5a2 100644
--- a/src/V3EmitCFunc.h
+++ b/src/V3EmitCFunc.h
@@ -93,7 +93,7 @@ class EmitCLazyDecls final : public VNVisitorConst {
 
 public:
     explicit EmitCLazyDecls(EmitCBaseVisitorConst& emitter)
-        : m_emitter(emitter) {}
+        : m_emitter{emitter} {}
     void emit(AstNode* nodep) {
         m_needsBlankLine = false;
         iterateChildrenConst(nodep);
@@ -1513,7 +1513,7 @@ public:
     }  // LCOV_EXCL_STOP
 
     EmitCFunc()
-        : m_lazyDecls(*this) {}
+        : m_lazyDecls{*this} {}
     EmitCFunc(AstNode* nodep, V3OutCFile* ofp, AstCFile* cfilep, bool trackText = false)
         : EmitCFunc{} {
         setOutputFile(ofp, cfilep);
diff --git a/src/V3ExecGraph.cpp b/src/V3ExecGraph.cpp
index b470041d1..69735a309 100644
--- a/src/V3ExecGraph.cpp
+++ b/src/V3ExecGraph.cpp
@@ -88,7 +88,7 @@ public:
     static std::unordered_map<const ExecMTask*, MTaskState> mtaskState;
 
     explicit ThreadSchedule(uint32_t nThreads)
-        : m_id(s_nextId++)
+        : m_id{s_nextId++}
         , threads{nThreads} {}
     ThreadSchedule(ThreadSchedule&&) = default;
     ThreadSchedule& operator=(ThreadSchedule&&) = default;
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index 64eaf05fe..e43da39fb 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -211,7 +211,7 @@ public:
     LinkDotState(AstNetlist* rootp, VLinkDotStep step)
         : m_syms{rootp}
         , m_mods{rootp}
-        , m_step(step) {
+        , m_step{step} {
         UINFO(4, __FUNCTION__ << ": ");
         s_errorThisp = this;
         V3Error::errorExitCb(preErrorDumpHandler);  // If get error, dump self
diff --git a/src/V3MergeCond.cpp b/src/V3MergeCond.cpp
index 52aa77532..4860affd6 100644
--- a/src/V3MergeCond.cpp
+++ b/src/V3MergeCond.cpp
@@ -276,7 +276,7 @@ class CodeMotionAnalysisVisitor final : public VNVisitorConst {
 
     // CONSTRUCTOR
     CodeMotionAnalysisVisitor(AstNode* nodep, StmtPropertiesAllocator& stmtProperties)
-        : m_stmtProperties(stmtProperties) {
+        : m_stmtProperties{stmtProperties} {
         iterateAndNextConstNull(nodep);
     }
 
@@ -399,7 +399,7 @@ class CodeMotionOptimizeVisitor final : public VNVisitor {
 
     // CONSTRUCTOR
     CodeMotionOptimizeVisitor(AstNode* nodep, const StmtPropertiesAllocator& stmtProperties)
-        : m_stmtProperties(stmtProperties) {
+        : m_stmtProperties{stmtProperties} {
         // We assert the given node is at the head of the list otherwise we might move a node
         // before the given node. This is easy to fix in the above iteration with a check on a
         // boundary node we should not move past, if we ever need to do so.
diff --git a/src/V3OptionParser.h b/src/V3OptionParser.h
index b7bcc60b9..ac70c07c4 100644
--- a/src/V3OptionParser.h
+++ b/src/V3OptionParser.h
@@ -153,7 +153,7 @@ public:
 
     // CONSTRUCTORS
     explicit AppendHelper(V3OptionParser& parser)
-        : m_parser(parser) {}
+        : m_parser{parser} {}
 };
 
 #define V3OPTION_PARSER_DECL_TAGS \
diff --git a/src/V3Randomize.cpp b/src/V3Randomize.cpp
index 97b38e744..de73e9523 100644
--- a/src/V3Randomize.cpp
+++ b/src/V3Randomize.cpp
@@ -1206,9 +1206,9 @@ class CaptureVisitor final : public VNVisitor {
 
 public:
     explicit CaptureVisitor(AstNode* const nodep, AstNodeModule* callerp, AstClass* const targetp)
-        : m_argsp(nullptr)
-        , m_callerp(callerp)
-        , m_targetp(targetp) {
+        : m_argsp{nullptr}
+        , m_callerp{callerp}
+        , m_targetp{targetp} {
         iterateAndNextNull(nodep);
     }
 
@@ -2355,7 +2355,7 @@ class RandomizeVisitor final : public VNVisitor {
 public:
     // CONSTRUCTORS
     explicit RandomizeVisitor(AstNetlist* nodep)
-        : m_inlineUniqueNames("__Vrandwith") {
+        : m_inlineUniqueNames{"__Vrandwith"} {
         createRandomizeClassVars(nodep);
         iterate(nodep);
         nodep->foreach([&](AstConstraint* constrp) {
diff --git a/src/V3SymTable.h b/src/V3SymTable.h
index 09d2460ce..c2bf5028f 100644
--- a/src/V3SymTable.h
+++ b/src/V3SymTable.h
@@ -46,12 +46,12 @@ class VSymEnt final {
     using IdNameMap = std::multimap<std::string, VSymEnt*>;
     IdNameMap m_idNameMap;  // Hash of variables by name
     AstNode* m_nodep;  // Node that entry belongs to
-    VSymEnt* m_fallbackp;  // Table "above" this one in name scope, for fallback resolution
-    VSymEnt* m_parentp;  // Table that created this table, dot notation needed to resolve into it
-    AstNodeModule* m_classOrPackagep;  // Package node is in (for V3LinkDot, unused here)
+    VSymEnt* m_fallbackp = nullptr;  // Table "above" this in name scope, for fallback resolution
+    VSymEnt* m_parentp = nullptr;  // Table that created this
+    AstNodeModule* m_classOrPackagep = nullptr;  // Package node is in (for V3LinkDot, unused here)
     string m_symPrefix;  // String to prefix symbols with (for V3LinkDot, unused here)
-    bool m_exported;  // Allow importing
-    bool m_imported;  // Was imported
+    bool m_exported = true;  // Allow importing
+    bool m_imported = false;  // Was imported
 #ifdef VL_DEBUG
     VL_DEFINE_DEBUG_FUNCTIONS;
 #else
@@ -68,6 +68,11 @@ public:
            << std::setw(0) << std::right;
         os << "  se" << cvtToHex(this) << std::setw(0);
         os << "  fallb=se" << cvtToHex(m_fallbackp);
+        if (m_imported || m_exported) {
+            os << "  ";
+            if (m_imported) os << "[I]";
+            if (m_exported) os << "[E]";
+        }
         if (m_symPrefix != "") os << "  symPrefix=" << m_symPrefix;
         if (nodep()) os << "  n=" << nodep();
         os << '\n';
@@ -332,25 +337,20 @@ protected:
 //######################################################################
 
 inline VSymEnt::VSymEnt(VSymGraph* graphp, AstNode* nodep)
-    : m_nodep(nodep) {
+    : m_nodep{nodep} {
     // No argument to set fallbackp, as generally it's wrong to set it in the new call,
     // Instead it needs to be set on a "findOrNew()" return, as it may have been new'ed
     // by an earlier search insertion.
-    m_fallbackp = nullptr;
-    m_parentp = nullptr;
-    m_classOrPackagep = nullptr;
-    m_exported = true;
-    m_imported = false;
     graphp->pushNewEnt(this);
 }
 
 inline VSymEnt::VSymEnt(VSymGraph* graphp, const VSymEnt* symp)
-    : m_nodep(symp->m_nodep) {
-    m_fallbackp = symp->m_fallbackp;
-    m_parentp = symp->m_parentp;
-    m_classOrPackagep = symp->m_classOrPackagep;
-    m_exported = symp->m_exported;
-    m_imported = symp->m_imported;
+    : m_nodep{symp->m_nodep}
+    , m_fallbackp{symp->m_fallbackp}
+    , m_parentp{symp->m_parentp}
+    , m_classOrPackagep{symp->m_classOrPackagep}
+    , m_exported{symp->m_exported}
+    , m_imported{symp->m_imported} {
     graphp->pushNewEnt(this);
 }
 
diff --git a/src/V3Undriven.cpp b/src/V3Undriven.cpp
index ca8492353..800b367c3 100644
--- a/src/V3Undriven.cpp
+++ b/src/V3Undriven.cpp
@@ -56,7 +56,7 @@ class UndrivenVarEntry final {
 public:
     // CONSTRUCTORS
     explicit UndrivenVarEntry(AstVar* varp)
-        : m_varp(varp) {  // Construction for when a var is used
+        : m_varp{varp} {  // Construction for when a var is used
         UINFO(9, "create " << varp);
         m_wholeFlags.resize(FLAGS_PER_BIT);
         for (int i = 0; i < FLAGS_PER_BIT; i++) m_wholeFlags[i] = false;
diff --git a/src/V3UniqueNames.h b/src/V3UniqueNames.h
index a61627834..66f3f6d7a 100644
--- a/src/V3UniqueNames.h
+++ b/src/V3UniqueNames.h
@@ -38,7 +38,7 @@ public:
     V3UniqueNames() = default;
     explicit V3UniqueNames(const std::string& prefix, bool addSuffix = true)
         : m_prefix{prefix}
-        , m_addSuffix(addSuffix) {
+        , m_addSuffix{addSuffix} {
         if (!m_prefix.empty()) {
             UASSERT(VString::startsWith(m_prefix, "__V"), "Prefix must start with '__V'");
             UASSERT(!VString::endsWith(m_prefix, "_"), "Prefix must not end with '_'");

From e3c7dee6ef5d5399f27799782b11f50f16d7c025 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 19:07:50 -0400
Subject: [PATCH 203/211] Internals: Add UINFOTREE method

---
 src/V3Error.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/src/V3Error.h b/src/V3Error.h
index 5a59caba1..d4d7a6656 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -639,12 +639,27 @@ void v3errorEndFatal(std::ostringstream& sstr)
             std::cout << ss.str(); \
         } \
     } while (false)
+
 /// Print the prefix of UINFO, but no newline.  No level argument, as
 /// always need an if() at the caller site to determine if rest of the line
 /// gets printed or not
 #define UINFO_PREFIX(stmsg) \
     do { std::cout << "- " << V3Error::lineStr(__FILE__, __LINE__) << stmsg; } while (false)
 
+/// Based on debug level, call UINFO then dumpTree on nodep, using given message prefix
+/// If dt_msg = "", use the uinfo_msg; note any uinfo_msg side effects will happen twice.
+#define UINFOTREE(level, nodep, uinfo_msg, dt_msg) \
+    do { \
+        if (VL_UNCOVERABLE(debug() >= (level))) { \
+            UINFO(level, uinfo_msg); \
+            std::ostringstream ss; \
+            ss << dt_msg; \
+            if (ss.str().empty()) ss << uinfo_msg; \
+            if (nodep) \
+                nodep->dumpTree("- "s + V3Error::lineStr(__FILE__, __LINE__) + ss.str() + " - "); \
+        } \
+    } while (false)
+
 /// Compile statements only when debug build
 #ifdef VL_DEBUG
 #define UDEBUGONLY(stmts) \

From 1cd65e90bdec5cea8d5296a72b03deef46221964 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 19:11:09 -0400
Subject: [PATCH 204/211] Commentary: Changes update

---
 Changes | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Changes b/Changes
index c87779c35..9064d011d 100644
--- a/Changes
+++ b/Changes
@@ -38,9 +38,11 @@ Verilator 5.037 devel
 * Improve DPI temporary 'for' loop performance (#6079). [Bartłomiej Chmiel, Antmicro Ltd.]
 * Improve memory usage for SenTrees in V3OrderProcessDomains (#6112). [Geza Lore]
 * Improve docker image size (#6139). [Tobias Rosenkranz, bitaggregat GmbH]
+* Update docker base image to Ubuntu 24.04 (#6147). [Tobias Rosenkranz, bitaggregat GmbH]
 * Optimize DFG De Morgan patterns (#6090). [Geza Lore]
 * Optimize DFG variable elimination (#6091). [Geza Lore]
 * Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
+* Optimize DFG before V3Gate (#6141). [Geza Lore]
 * Optimize constification within Expand and Subst stages (#6111). [Geza Lore]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
 * Fix trace hierarchical-name runtime errors (#5668) (#6076). [Paul Swirhun]
@@ -86,8 +88,9 @@ Verilator 5.037 devel
 * Fix variables declared in fork after taskify (#6126). [Kamil Rakoczy, Antmicro Ltd.]
 * Fix method calls without parenthesis (#6127). [Alex Solomatnikov]
 * Fix `pre_randomize`/`post_randomize` when no randomize (#6128). [Alex Solomatnikov]
+* Fix wide non-blocking assignment mis-optimization (#6150) (#6152) (#6155). [Todd Strader]
 * Fix interface array connections with non-zero low declaration index.
-* Update docker base image (#6147). [Tobias Rosenkranz, bitaggregat GmbH]
+* Fix developer build error on MacOS/Flex2.6.4 (#6153). [Paul Swirhun]
 
 
 Verilator 5.036 2025-04-27

From f77af4e6f65e28bf218e47cbaf07e5398b69aea2 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 19:36:28 -0400
Subject: [PATCH 205/211] Important: Change `--assert` to be the default; use
 `--no-assert` for legacy behavior and faster runtimes.

---
 Changes                                       |  4 ++++
 bin/verilator                                 |  4 ++--
 docs/guide/exe_verilator.rst                  | 14 ++++++++++----
 docs/guide/faq.rst                            |  2 +-
 docs/guide/languages.rst                      | 14 +++++++-------
 docs/guide/simulating.rst                     | 11 +++++------
 docs/guide/warnings.rst                       |  4 ++--
 src/V3Assert.cpp                              |  2 +-
 src/V3Options.cpp                             |  5 ++++-
 src/V3Options.h                               |  6 +++---
 test_regress/t/t_assert_disabled.py           |  2 +-
 test_regress/t/t_assert_procedural_clk_bad.py |  2 +-
 test_regress/t/t_assert_synth_off.py          |  3 ++-
 test_regress/t/t_debug_emitv.out              |  2 +-
 14 files changed, 44 insertions(+), 31 deletions(-)

diff --git a/Changes b/Changes
index 9064d011d..b594569e1 100644
--- a/Changes
+++ b/Changes
@@ -11,6 +11,10 @@ contributors that suggested or implemented a given issue are shown in []. Thanks
 Verilator 5.037 devel
 ==========================
 
+**Important:**
+
+* Change `--assert` to be the default; use `--no-assert` for legacy behavior and faster runtimes.
+
 **Other:**
 
 * Support redeclaring type as non-type; major parsing change (#2412) (#6020) (#6042) (#6044).
diff --git a/bin/verilator b/bin/verilator
index 2709e6cd0..f27e64c84 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -311,8 +311,8 @@ detailed descriptions of these arguments.
      +1800-2012ext+<ext>        Use SystemVerilog 2012 with file extension <ext>
      +1800-2017ext+<ext>        Use SystemVerilog 2017 with file extension <ext>
      +1800-2023ext+<ext>        Use SystemVerilog 2023 with file extension <ext>
-    --assert                    Enable all assertions
-    --assert-case               Enable unique/unique0/priority case related checks
+    --no-assert                 Disable all assertions
+    --no-assert-case            Disable unique/unique0/priority-case assertions
     --autoflush                 Flush streams after all $displays
     --bbox-sys                  Blackbox unknown $system calls
     --bbox-unsup                Blackbox unsupported language features
diff --git a/docs/guide/exe_verilator.rst b/docs/guide/exe_verilator.rst
index 1ec9a8f3b..a98de32eb 100644
--- a/docs/guide/exe_verilator.rst
+++ b/docs/guide/exe_verilator.rst
@@ -86,13 +86,19 @@ Summary:
       grammar and other semantic extensions which might not be legal when
       set to an older standard.
 
-.. option:: --assert
+.. option:: --no-assert
 
-   Enable all assertions. Implies :vlopt:`--assert-case`.
+   Disable all assertions. Implies :vlopt:`--no-assert-case`.
 
-.. option:: --assert-case
+   In versions before 5.038, these were disabled by default, and `--assert`
+   was required to enable assertions.
 
-   Enable unique/unique0/priority case related checks.
+.. option:: --no-assert-case
+
+   Disable unique/unique0/priority case related checks.
+
+   In versions before 5.038, these were disabled by default, and `--assert`
+   or `--assert-case` was required to enable case assertions.
 
 .. option:: --autoflush
 
diff --git a/docs/guide/faq.rst b/docs/guide/faq.rst
index 3b634adc6..d1bf9f530 100644
--- a/docs/guide/faq.rst
+++ b/docs/guide/faq.rst
@@ -335,7 +335,7 @@ How do I prevent my assertions from firing during reset?
 
 Call :code:`Verilated::assertOn(false)` before you first call the model,
 then turn it back on after reset.  It defaults to true.  When false, all
-assertions controlled by :vlopt:`--assert` are disabled.
+assertions are disabled.
 
 
 Why do I get "undefined reference to sc_time_stamp()?
diff --git a/docs/guide/languages.rst b/docs/guide/languages.rst
index 24f2e0fbd..4a4d8762b 100644
--- a/docs/guide/languages.rst
+++ b/docs/guide/languages.rst
@@ -90,14 +90,14 @@ wreal.
 Synthesis Directive Assertion Support
 -------------------------------------
 
-With the :vlopt:`--assert` option, Verilator reads any
+Verilator reads any :code:`//synopsys full_case` or :code:`//synopsys
+parallel_case` directives.  The same applies to any :code:`//ambit
+synthesis`, :code:`//cadence` or :code:`//pragma` directives of the same
+form.
 
-:code:`//synopsys full_case` or :code:`//synopsys parallel_case`
-directives.  The same applies to any :code:`//ambit synthesis`,
-:code:`//cadence` or :code:`//pragma` directives of the same form.
-
-When these synthesis directives are discovered, Verilator will either
-formally prove the directive to be true, or, failing that, will insert the
+When these synthesis directives are discovered, unless
+:vlopt:`--no-assert-case` option is used, Verilator will either formally
+prove the directive to be true, or, failing that, will insert the
 appropriate code to detect failing cases at simulation runtime and print an
 "Assertion failed" error message.
 
diff --git a/docs/guide/simulating.rst b/docs/guide/simulating.rst
index c18126a8a..5758af4d3 100644
--- a/docs/guide/simulating.rst
+++ b/docs/guide/simulating.rst
@@ -76,12 +76,14 @@ Benchmarking & Optimization
 For best performance, run Verilator with the :vlopt:`-O3`
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-initial>`
-:vlopt:`--noassert <--assert>` options.  The :vlopt:`-O3`
+:vlopt:`--no-assert` options.  The :vlopt:`-O3`
 option will require a longer time to run Verilator, and
 :vlopt:`--x-assign fast <--x-assign>`
 :vlopt:`--x-initial fast <--x-assign>`
-may increase the risk of reset bugs in trade for performance; see the above
-documentation for these options.
+may increase the risk of reset bugs in trade for performance.  The
+:vlopt:`--no-assert` will suppress checking assertions, which is faster and
+appropriate for known-good models running software, but may hide design
+errors.  See the above documentation for these options.
 
 If using Verilated multithreaded, consider overriding Verilator's default
 thread-to-processor assignment by using ``numactl``; see
@@ -203,9 +205,6 @@ With :vlopt:`--coverage` or :vlopt:`--coverage-user`, Verilator will
 translate functional coverage points the user has inserted manually in
 SystemVerilog code through into the Verilated model.
 
-Currently, all functional coverage points are specified using SystemVerilog
-assertion syntax, which must be separately enabled with :vlopt:`--assert`.
-
 For example, the following SystemVerilog statement will add a coverage
 point under the coverage name "DefaultClock":
 
diff --git a/docs/guide/warnings.rst b/docs/guide/warnings.rst
index 11257859d..d377d6236 100644
--- a/docs/guide/warnings.rst
+++ b/docs/guide/warnings.rst
@@ -333,8 +333,8 @@ List Of Warnings
    Unique case statements that select on an enumerated variable, where all
    of the enumerated values are covered by case items, are considered
    complete even if the case statement does not cover illegal
-   non-enumerated values (IEEE 1800-2023 12.5.3).  To check that illegal
-   values are not hit, use :vlopt:`--assert`.
+   non-enumerated values (IEEE 1800-2023 12.5.3).  Verilator checks that
+   illegal values are not hit, unless :vlopt:`--no-assert-case` was used.
 
    Ignoring this warning will only suppress the lint check; it will
    simulate correctly.
diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp
index 83ccfcc5c..bd1423034 100644
--- a/src/V3Assert.cpp
+++ b/src/V3Assert.cpp
@@ -57,7 +57,7 @@ class AssertVisitor final : public VNVisitor {
         switch (directiveType) {
         case VAssertDirectiveType::INTRINSIC: return new AstConst{fl, AstConst::BitTrue{}};
         case VAssertDirectiveType::VIOLATION_CASE: {
-            if (v3Global.opt.assertCaseOn()) {
+            if (v3Global.opt.assertCase()) {
                 return new AstCExpr{fl, "vlSymsp->_vm_contextp__->assertOn()", 1};
             }
             // If assertions are off, have constant propagation rip them out later
diff --git a/src/V3Options.cpp b/src/V3Options.cpp
index 6c4f4fbe3..4c99cdbba 100644
--- a/src/V3Options.cpp
+++ b/src/V3Options.cpp
@@ -1180,7 +1180,10 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc,
                 [this](const char* optp) { addLangExt(optp, V3LangCode::L1800_2023); });
 
     // Minus options
-    DECL_OPTION("-assert", OnOff, &m_assert);
+    DECL_OPTION("-assert", CbOnOff, [this](bool flag) {
+        m_assert = flag;
+        m_assertCase = flag;
+    });
     DECL_OPTION("-assert-case", OnOff, &m_assertCase);
     DECL_OPTION("-autoflush", OnOff, &m_autoflush);
 
diff --git a/src/V3Options.h b/src/V3Options.h
index e70fbe4ad..2d062fcb9 100644
--- a/src/V3Options.h
+++ b/src/V3Options.h
@@ -251,8 +251,8 @@ private:
     bool m_preprocResolve = false;  // main switch: --preproc-resolve
     bool m_makePhony = false;       // main switch: -MP
     bool m_preprocNoLine = false;   // main switch: -P
-    bool m_assert = false;          // main switch: --assert
-    bool m_assertCase = false;      // main switch: --assert-case
+    bool m_assert = true;           // main switch: --assert
+    bool m_assertCase = true;       // main switch: --assert-case
     bool m_autoflush = false;       // main switch: --autoflush
     bool m_bboxSys = false;         // main switch: --bbox-sys
     bool m_bboxUnsup = false;       // main switch: --bbox-unsup
@@ -520,7 +520,7 @@ public:
     bool stdWaiver() const { return m_stdWaiver; }
     bool structsPacked() const { return m_structsPacked; }
     bool assertOn() const { return m_assert; }  // assertOn as __FILE__ may be defined
-    bool assertCaseOn() const { return m_assertCase || m_assert; }
+    bool assertCase() const { return m_assertCase; }
     bool autoflush() const { return m_autoflush; }
     bool bboxSys() const { return m_bboxSys; }
     bool bboxUnsup() const { return m_bboxUnsup; }
diff --git a/test_regress/t/t_assert_disabled.py b/test_regress/t/t_assert_disabled.py
index b45b81326..e6adf4fde 100755
--- a/test_regress/t/t_assert_disabled.py
+++ b/test_regress/t/t_assert_disabled.py
@@ -12,7 +12,7 @@ import vltest_bootstrap
 test.scenarios('simulator')
 test.top_filename = "t/t_assert_on.v"
 
-test.compile()
+test.compile(verilator_flags2=['--no-assert'])
 
 test.execute()
 
diff --git a/test_regress/t/t_assert_procedural_clk_bad.py b/test_regress/t/t_assert_procedural_clk_bad.py
index 7e5bcdfe5..af14b700f 100755
--- a/test_regress/t/t_assert_procedural_clk_bad.py
+++ b/test_regress/t/t_assert_procedural_clk_bad.py
@@ -11,6 +11,6 @@ import vltest_bootstrap
 
 test.scenarios('vlt')
 
-test.lint(expect_filename=test.golden_filename, verilator_flags2=['--assert'], fails=True)
+test.lint(expect_filename=test.golden_filename, fails=True)
 
 test.passes()
diff --git a/test_regress/t/t_assert_synth_off.py b/test_regress/t/t_assert_synth_off.py
index ce86721c2..13a912951 100755
--- a/test_regress/t/t_assert_synth_off.py
+++ b/test_regress/t/t_assert_synth_off.py
@@ -13,7 +13,8 @@ test.scenarios('simulator')
 test.top_filename = "t/t_assert_synth.v"
 
 test.compile(v_flags2=[
-    '+define+FAILING_FULL', '+define+FAILING_PARALLEL', '+define+FAILING_OH', '+define+FAILING_OC'
+    '--no-assert-case', '+define+FAILING_FULL', '+define+FAILING_PARALLEL', '+define+FAILING_OH',
+    '+define+FAILING_OC'
 ])
 
 test.execute()
diff --git a/test_regress/t/t_debug_emitv.out b/test_regress/t/t_debug_emitv.out
index 322c8fcfb..4976ecd1e 100644
--- a/test_regress/t/t_debug_emitv.out
+++ b/test_regress/t/t_debug_emitv.out
@@ -223,7 +223,7 @@ module Vt_debug_emitv_t;
                 $stop;
             end
             case (in)
-                'sh1: begin $display("1");
+                 // synopsys full_case parallel_case'sh1: begin $display("1");
                 end
                 default: begin $display("default");
                 end

From 26c7f1adb6f6d04696f8e684e0352cfdc592cef5 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 20:43:13 -0400
Subject: [PATCH 206/211] Tests: Change default indent to 2 spaces (match
 edaplayground). No functional change.

---
 examples/json_py/sub.v                  |  12 +--
 examples/make_hello_binary/top.v        |   8 +-
 examples/make_hello_c/top.v             |   8 +-
 examples/make_hello_sc/top.v            |   8 +-
 examples/make_protect_lib/secret_impl.v |  40 ++++----
 examples/make_protect_lib/top.v         |  64 ++++++-------
 examples/make_tracing_c/sub.v           |  48 +++++-----
 examples/make_tracing_c/top.v           |  46 ++++-----
 examples/make_tracing_sc/sub.v          |  76 +++++++--------
 examples/make_tracing_sc/top.v          |  28 +++---
 test_regress/t/t_EXAMPLE.v              | 122 ++++++++++++------------
 11 files changed, 230 insertions(+), 230 deletions(-)

diff --git a/examples/json_py/sub.v b/examples/json_py/sub.v
index 3396d47b5..94037d4c4 100644
--- a/examples/json_py/sub.v
+++ b/examples/json_py/sub.v
@@ -7,12 +7,12 @@
 
 module sub
   #(parameter type TYPE_t = logic)
-   (
-    input  TYPE_t in,
-    output TYPE_t out
-    );
+  (
+   input  TYPE_t in,
+   output TYPE_t out
+   );
 
-   // Some simple logic
-   always_comb out = ~in;
+  // Some simple logic
+  always_comb out = ~in;
 
 endmodule
diff --git a/examples/make_hello_binary/top.v b/examples/make_hello_binary/top.v
index 3deb48f2d..20ae7aa9a 100644
--- a/examples/make_hello_binary/top.v
+++ b/examples/make_hello_binary/top.v
@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule
diff --git a/examples/make_hello_c/top.v b/examples/make_hello_c/top.v
index 3deb48f2d..20ae7aa9a 100644
--- a/examples/make_hello_c/top.v
+++ b/examples/make_hello_c/top.v
@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule
diff --git a/examples/make_hello_sc/top.v b/examples/make_hello_sc/top.v
index 3deb48f2d..20ae7aa9a 100644
--- a/examples/make_hello_sc/top.v
+++ b/examples/make_hello_sc/top.v
@@ -7,8 +7,8 @@
 // See also https://verilator.org/guide/latest/examples.html"
 
 module top;
-   initial begin
-      $display("Hello World!");
-      $finish;
-   end
+  initial begin
+    $display("Hello World!");
+    $finish;
+  end
 endmodule
diff --git a/examples/make_protect_lib/secret_impl.v b/examples/make_protect_lib/secret_impl.v
index dc9fe1c6b..f2dc01b09 100644
--- a/examples/make_protect_lib/secret_impl.v
+++ b/examples/make_protect_lib/secret_impl.v
@@ -9,29 +9,29 @@
 
 module secret_impl
   (
-   input [31:0]        a,
-   input [31:0]        b,
+   input [31:0]      a,
+   input [31:0]      b,
    output logic [31:0] x,
-   input               clk,
-   input               reset_l);
+   input          clk,
+   input          reset_l);
 
-   logic [31:0] accum_q;
-   logic [31:0] secret_value;
+  logic [31:0] accum_q;
+  logic [31:0] secret_value;
 
-   initial $display("[%0t] %m: initialized", $time);
+  initial $display("[%0t] %m: initialized", $time);
 
-   always @(posedge clk) begin
-      if (!reset_l) begin
-         accum_q <= 0;
-         secret_value <= 9;
-      end
-      else begin
-         accum_q <= accum_q + a;
-         if (accum_q > 10)
-           x <= b;
-         else
-           x <= a + b + secret_value;
-      end
-   end
+  always @(posedge clk) begin
+    if (!reset_l) begin
+      accum_q <= 0;
+      secret_value <= 9;
+    end
+    else begin
+      accum_q <= accum_q + a;
+      if (accum_q > 10)
+        x <= b;
+      else
+        x <= a + b + secret_value;
+    end
+  end
 
 endmodule
diff --git a/examples/make_protect_lib/top.v b/examples/make_protect_lib/top.v
index 031764292..c80c1b2bb 100644
--- a/examples/make_protect_lib/top.v
+++ b/examples/make_protect_lib/top.v
@@ -8,39 +8,39 @@
 
 module top (input clk);
 
-   int cyc;
-   logic reset_l;
-   logic [31:0] a;
-   logic [31:0] b;
-   logic [31:0] x;
+  int cyc;
+  logic reset_l;
+  logic [31:0] a;
+  logic [31:0] b;
+  logic [31:0] x;
 
-   verilated_secret secret (.a, .b, .x, .clk, .reset_l);
+  verilated_secret secret (.a, .b, .x, .clk, .reset_l);
 
-   always @(posedge clk) begin
-      $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
-      cyc <= cyc + 1;
-      if (cyc == 0) begin
-         reset_l <= 0;
-         a <= 0;
-         b <= 0;
-      end
-      else if (cyc == 1) begin
-         reset_l <= 1;
-         a <= 5;
-         b <= 7;
-      end
-      else if (cyc == 2) begin
-         a <= 6;
-         b <= 2;
-      end
-      else if (cyc == 3) begin
-         a <= 1;
-         b <= 9;
-      end
-      else if (cyc > 4) begin
-         $display("Done");
-         $finish;
-      end
-   end
+  always @(posedge clk) begin
+    $display("[%0t] cyc=%0d a=%0d b=%0d x=%0d", $time, cyc, a, b, x);
+    cyc <= cyc + 1;
+    if (cyc == 0) begin
+      reset_l <= 0;
+      a <= 0;
+      b <= 0;
+    end
+    else if (cyc == 1) begin
+      reset_l <= 1;
+      a <= 5;
+      b <= 7;
+    end
+    else if (cyc == 2) begin
+      a <= 6;
+      b <= 2;
+    end
+    else if (cyc == 3) begin
+      a <= 1;
+      b <= 9;
+    end
+    else if (cyc > 4) begin
+      $display("Done");
+      $finish;
+    end
+  end
 
 endmodule
diff --git a/examples/make_tracing_c/sub.v b/examples/make_tracing_c/sub.v
index 463691411..ad0ad3765 100644
--- a/examples/make_tracing_c/sub.v
+++ b/examples/make_tracing_c/sub.v
@@ -11,32 +11,32 @@ module sub
    input reset_l
    );
 
-   // Example counter/flop
-   reg [31:0] count_c;
-   always_ff @(posedge clk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_c <= 32'h0;
-         // End of automatics
+  // Example counter/flop
+  reg [31:0] count_c;
+  always_ff @(posedge clk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_c <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_c <= count_c + 1;
+      if (count_c >= 3) begin
+        // This write is a magic value the Makefile uses to make sure the
+        // test completes successfully.
+        $write("*-* All Finished *-*\n");
+        $finish;
       end
-      else begin
-         count_c <= count_c + 1;
-         if (count_c >= 3) begin
-            // This write is a magic value the Makefile uses to make sure the
-            // test completes successfully.
-            $write("*-* All Finished *-*\n");
-            $finish;
-         end
-      end
-   end
+    end
+  end
 
-   // An example assertion
-   always_ff @(posedge clk) begin
-      AssertionExample : assert (!reset_l || count_c < 100);
-   end
+  // An example assertion
+  always_ff @(posedge clk) begin
+    AssertionExample : assert (!reset_l || count_c < 100);
+  end
 
-   // And example coverage analysis
-   cover property (@(posedge clk) count_c == 3);
+  // And example coverage analysis
+  cover property (@(posedge clk) count_c == 3);
 
 endmodule
diff --git a/examples/make_tracing_c/top.v b/examples/make_tracing_c/top.v
index dbc852814..c3b140cb2 100644
--- a/examples/make_tracing_c/top.v
+++ b/examples/make_tracing_c/top.v
@@ -11,36 +11,36 @@
 module top
   (
    // Declare some signals so we can see how I/O works
-   input              clk,
-   input              reset_l,
+   input          clk,
+   input          reset_l,
 
    output wire [1:0]  out_small,
    output wire [39:0] out_quad,
    output wire [69:0] out_wide,
-   input [1:0]        in_small,
-   input [39:0]       in_quad,
-   input [69:0]       in_wide
+   input [1:0]      in_small,
+   input [39:0]     in_quad,
+   input [69:0]     in_wide
    );
 
-   // Connect up the outputs, using some trivial logic
-   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+  // Connect up the outputs, using some trivial logic
+  assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+  assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+  assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
-   // And an example sub module. The submodule will print stuff.
-   sub sub (/*AUTOINST*/
-            // Inputs
-            .clk                        (clk),
-            .reset_l                    (reset_l));
+  // And an example sub module. The submodule will print stuff.
+  sub sub (/*AUTOINST*/
+           // Inputs
+           .clk                         (clk),
+           .reset_l                     (reset_l));
 
-   // Print some stuff as an example
-   initial begin
-      if ($test$plusargs("trace") != 0) begin
-         $display("[%0t] Tracing to logs/vlt_dump.vcd...\n", $time);
-         $dumpfile("logs/vlt_dump.vcd");
-         $dumpvars();
-      end
-      $display("[%0t] Model running...\n", $time);
-   end
+  // Print some stuff as an example
+  initial begin
+    if ($test$plusargs("trace") != 0) begin
+      $display("[%0t] Tracing to logs/vlt_dump.vcd...\n", $time);
+      $dumpfile("logs/vlt_dump.vcd");
+      $dumpvars();
+    end
+    $display("[%0t] Model running...\n", $time);
+  end
 
 endmodule
diff --git a/examples/make_tracing_sc/sub.v b/examples/make_tracing_sc/sub.v
index 100a97570..fd84e6177 100644
--- a/examples/make_tracing_sc/sub.v
+++ b/examples/make_tracing_sc/sub.v
@@ -12,47 +12,47 @@ module sub
    input reset_l
    );
 
-   // Example counter/flop
-   reg [31:0] count_f;
-   always_ff @(posedge fastclk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_f <= 32'h0;
-         // End of automatics
-      end
-      else begin
-         count_f <= count_f + 1;
-      end
-   end
+  // Example counter/flop
+  reg [31:0] count_f;
+  always_ff @(posedge fastclk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_f <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_f <= count_f + 1;
+    end
+  end
 
-   // Another example flop
-   reg [31:0] count_c;
-   always_ff @(posedge clk) begin
-      if (!reset_l) begin
-         /*AUTORESET*/
-         // Beginning of autoreset for uninitialized flops
-         count_c <= 32'h0;
-         // End of automatics
+  // Another example flop
+  reg [31:0] count_c;
+  always_ff @(posedge clk) begin
+    if (!reset_l) begin
+      /*AUTORESET*/
+      // Beginning of autoreset for uninitialized flops
+      count_c <= 32'h0;
+      // End of automatics
+    end
+    else begin
+      count_c <= count_c + 1;
+      if (count_c >= 3) begin
+        $display("[%0t] fastclk is %0d times faster than clk\n", $time, count_f / count_c);
+        // This write is a magic value the Makefile uses to make sure the
+        // test completes successfully.
+        $write("*-* All Finished *-*\n");
+        $finish;
       end
-      else begin
-         count_c <= count_c + 1;
-         if (count_c >= 3) begin
-            $display("[%0t] fastclk is %0d times faster than clk\n", $time, count_f / count_c);
-            // This write is a magic value the Makefile uses to make sure the
-            // test completes successfully.
-            $write("*-* All Finished *-*\n");
-            $finish;
-         end
-      end
-   end
+    end
+  end
 
-   // An example assertion
-   always_ff @(posedge clk) begin
-      AssertionExample : assert (!reset_l || count_c < 100);
-   end
+  // An example assertion
+  always_ff @(posedge clk) begin
+    AssertionExample : assert (!reset_l || count_c < 100);
+  end
 
-   // And example coverage analysis
-   cover property (@(posedge clk) count_c == 3);
+  // And example coverage analysis
+  cover property (@(posedge clk) count_c == 3);
 
 endmodule
diff --git a/examples/make_tracing_sc/top.v b/examples/make_tracing_sc/top.v
index a31254951..8543934d2 100644
--- a/examples/make_tracing_sc/top.v
+++ b/examples/make_tracing_sc/top.v
@@ -23,21 +23,21 @@ module top
    input [69:0]       in_wide
    );
 
-   // Connect up the outputs, using some trivial logic
-   assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
-   assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
-   assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
+  // Connect up the outputs, using some trivial logic
+  assign out_small = ~reset_l ? '0 : (in_small + 2'b1);
+  assign out_quad  = ~reset_l ? '0 : (in_quad + 40'b1);
+  assign out_wide  = ~reset_l ? '0 : (in_wide + 70'b1);
 
-   // And an example sub module. The submodule will print stuff.
-   sub sub (/*AUTOINST*/
-            // Inputs
-            .clk                        (clk),
-            .fastclk                    (fastclk),
-            .reset_l                    (reset_l));
+  // And an example sub module. The submodule will print stuff.
+  sub sub (/*AUTOINST*/
+           // Inputs
+           .clk                         (clk),
+           .fastclk                     (fastclk),
+           .reset_l                     (reset_l));
 
-   // Print some stuff as an example
-   initial begin
-      $display("[%0t] Model running...\n", $time);
-   end
+  // Print some stuff as an example
+  initial begin
+    $display("[%0t] Model running...\n", $time);
+  end
 
 endmodule
diff --git a/test_regress/t/t_EXAMPLE.v b/test_regress/t/t_EXAMPLE.v
index a5d815b13..c7a315515 100644
--- a/test_regress/t/t_EXAMPLE.v
+++ b/test_regress/t/t_EXAMPLE.v
@@ -21,80 +21,80 @@
 `define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
 
 module t(/*AUTOARG*/
-   // Inputs
-   clk
-   );
-   input clk;
+  // Inputs
+  clk
+  );
+  input clk;
 
-   int cyc;
-   reg [63:0] crc;
-   reg [63:0] sum;
+  int cyc;
+  reg [63:0] crc;
+  reg [63:0] sum;
 
-   // Take CRC data and apply to testblock inputs
-   wire [31:0] in = crc[31:0];
+  // Take CRC data and apply to testblock inputs
+  wire [31:0] in = crc[31:0];
 
-   /*AUTOWIRE*/
-   // Beginning of automatic wires (for undeclared instantiated-module outputs)
-   wire [31:0]          out;                    // From test of Test.v
-   // End of automatics
+  /*AUTOWIRE*/
+  // Beginning of automatic wires (for undeclared instantiated-module outputs)
+  wire [31:0]           out;                    // From test of Test.v
+  // End of automatics
 
-   Test test(/*AUTOINST*/
-             // Outputs
-             .out                       (out[31:0]),
-             // Inputs
-             .clk                       (clk),
-             .in                        (in[31:0]));
+  Test test(/*AUTOINST*/
+            // Outputs
+            .out                        (out[31:0]),
+            // Inputs
+            .clk                        (clk),
+            .in                         (in[31:0]));
 
-   // Aggregate outputs into a single result vector
-   wire [63:0] result = {32'h0, out};
+  // Aggregate outputs into a single result vector
+  wire [63:0] result = {32'h0, out};
 
-   // Test loop
-   always @(posedge clk) begin
+  // Test loop
+  always @(posedge clk) begin
 `ifdef TEST_VERBOSE
-      $write("[%0t] cyc==%0d crc=%x result=%x\n", $time, cyc, crc, result);
+    $write("[%0t] cyc==%0d crc=%x result=%x\n", $time, cyc, crc, result);
 `endif
-      cyc <= cyc + 1;
-      crc <= {crc[62:0], crc[63] ^ crc[2] ^ crc[0]};
-      sum <= result ^ {sum[62:0], sum[63] ^ sum[2] ^ sum[0]};
-      if (cyc == 0) begin
-         // Setup
-         crc <= 64'h5aef0c8d_d70a4497;
-         sum <= '0;
-      end
-      else if (cyc < 10) begin
-         sum <= '0;
-      end
-      else if (cyc < 90) begin
-      end
-      else if (cyc == 99) begin
-         $write("[%0t] cyc==%0d crc=%x sum=%x\n", $time, cyc, crc, sum);
-         `checkh(crc, 64'hc77bb9b3784ea091);
-         // What checksum will we end up with (above print should match)
-         `checkh(sum, 64'h4afe43fb79d7b71e);
-         $write("*-* All Finished *-*\n");
-         $finish;
-      end
-   end
+    cyc <= cyc + 1;
+    crc <= {crc[62:0], crc[63] ^ crc[2] ^ crc[0]};
+    sum <= result ^ {sum[62:0], sum[63] ^ sum[2] ^ sum[0]};
+    if (cyc == 0) begin
+      // Setup
+      crc <= 64'h5aef0c8d_d70a4497;
+      sum <= '0;
+    end
+    else if (cyc < 10) begin
+      sum <= '0;
+    end
+    else if (cyc < 90) begin
+    end
+    else if (cyc == 99) begin
+      $write("[%0t] cyc==%0d crc=%x sum=%x\n", $time, cyc, crc, sum);
+      `checkh(crc, 64'hc77bb9b3784ea091);
+      // What checksum will we end up with (above print should match)
+      `checkh(sum, 64'h4afe43fb79d7b71e);
+      $write("*-* All Finished *-*\n");
+      $finish;
+    end
+  end
 
 endmodule
 
 module Test(/*AUTOARG*/
-   // Outputs
-   out,
-   // Inputs
-   clk, in
-   );
+  // Outputs
+  out,
+  // Inputs
+  clk, in
+  );
 
-   // Replace this module with the device under test.
-   //
-   // Change the code in the t module to apply values to the inputs and
-   // merge the output values into the result vector.
+  // Replace this module with the device under test.
+  //
+  // Change the code in the t module to apply values to the inputs and
+  // merge the output values into the result vector.
 
-   input clk;
-   input [31:0] in;
-   output reg [31:0] out;
+  input clk;
+  input [31:0] in;
+  output reg [31:0] out;
 
-   always @(posedge clk) begin
-      out <= in;
-   end
+  always @(posedge clk) begin
+    out <= in;
+  end
 endmodule

From 5a6d5ed96bbebc5520f66efc43f9c574ecaf5c0c Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 3 Jul 2025 21:13:04 -0400
Subject: [PATCH 207/211] Support property `iff` and `implies`.

---
 src/verilog.y                             |   4 +-
 test_regress/t/t_property_pexpr.py        |  18 ++++
 test_regress/t/t_property_pexpr.v         |  76 +++++++++++++
 test_regress/t/t_property_pexpr_unsup.out | 126 +++++++++++-----------
 test_regress/t/t_property_pexpr_unsup.v   |   8 --
 5 files changed, 156 insertions(+), 76 deletions(-)
 create mode 100755 test_regress/t/t_property_pexpr.py
 create mode 100644 test_regress/t/t_property_pexpr.v

diff --git a/src/verilog.y b/src/verilog.y
index d68171115..dfdcf3e80 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -6657,10 +6657,10 @@ pexpr<nodeExprp>:  // IEEE: property_expr  (The name pexpr is important as regex
         |       ~o~pexpr yS_UNTIL_WITH pexpr
                         { $$ = $1; BBUNSUP($2, "Unsupported: s_until_with (in property expression)"); }
         |       ~o~pexpr yIMPLIES pexpr
-                        { $$ = $1; BBUNSUP($2, "Unsupported: implies (in property expression)"); }
+                        { $$ = new AstLogOr{$2, new AstLogNot{$2, $1}, $3}; }
         //                      // yIFF also used by event_expression
         |       ~o~pexpr yIFF pexpr
-                        { $$ = $1; BBUNSUP($2, "Unsupported: iff (in property expression)"); }
+                        { $$ = new AstLogEq{$2, $1, $3}; }
         |       yACCEPT_ON '(' expr/*expression_or_dist*/ ')' pexpr  %prec yACCEPT_ON
                         { $$ = $5; BBUNSUP($2, "Unsupported: accept_on (in property expression)"); }
         |       yREJECT_ON '(' expr/*expression_or_dist*/ ')' pexpr  %prec yREJECT_ON
diff --git a/test_regress/t/t_property_pexpr.py b/test_regress/t/t_property_pexpr.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_property_pexpr.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_property_pexpr.v b/test_regress/t/t_property_pexpr.v
new file mode 100644
index 000000000..7967fbfd2
--- /dev/null
+++ b/test_regress/t/t_property_pexpr.v
@@ -0,0 +1,76 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define stop $stop
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0x exp=%0x (%s !== %s)\n", `__FILE__,`__LINE__, (gotv), (expv), `"gotv`", `"expv`"); `stop; end while(0);
+`define checkd(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got=%0d exp=%0d\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+
+module t(/*AUTOARG*/
+  // Inputs
+  clk
+  );
+  input clk;
+
+  int cyc;
+  reg [63:0] crc;
+
+  // Take CRC data and apply to testblock inputs
+  wire a = crc[0];
+  wire b = crc[1];
+
+  /*AUTOWIRE*/
+
+  Test test(.*);
+
+  // Test loop
+  always @(posedge clk) begin
+`ifdef TEST_VERBOSE
+    $write("[%0t] cyc==%0d crc=%x result=%x\n", $time, cyc, crc);
+`endif
+    cyc <= cyc + 1;
+    crc <= {crc[62:0], crc[63] ^ crc[2] ^ crc[0]};
+    if (cyc == 0) begin
+      // Setup
+      crc <= 64'h5aef0c8d_d70a4497;
+    end
+    else if (cyc == 99) begin
+      `checkh(crc, 64'hc77bb9b3784ea091);
+
+      // Result check
+      `checkd(test.count_hits_iff, 48);
+      `checkd(test.count_hits_implies, 24);
+      `checkd(test.count_hits_not, 47);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+    end
+  end
+
+endmodule
+
+module Test(input clk,
+            input int cyc,
+            input a,
+            input b);
+
+  int count_hits_iff;
+  int count_hits_implies;
+  int count_hits_not;
+
+  default disable iff cyc < 5;
+
+  //        property_expr1 iff property_expr2: true if (!property_expr1 && !property_expr2) || (property_expr1 && property_expr2)
+  assert property ( @(negedge clk) a iff b )
+    else count_hits_iff = count_hits_iff + 1;
+
+  //        property_expr1 implies property_expr2: true if !property_expr1 || property_expr2
+  assert property ( @(negedge clk) a implies b )
+    else count_hits_implies = count_hits_implies + 1;
+
+  assert property ( @(negedge clk) not a )
+    else count_hits_not = count_hits_not + 1;
+
+endmodule
diff --git a/test_regress/t/t_property_pexpr_unsup.out b/test_regress/t/t_property_pexpr_unsup.out
index 52541ca1f..1744d8832 100644
--- a/test_regress/t/t_property_pexpr_unsup.out
+++ b/test_regress/t/t_property_pexpr_unsup.out
@@ -17,97 +17,91 @@
 %Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:45:9: Unsupported: s_until_with (in property expression)
    45 |       a s_until_with b;
       |         ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:49:9: Unsupported: implies (in property expression)
-   49 |       a implies b;
-      |         ^~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:53:9: Unsupported: #-# (in property expression)
-   53 |       a #-# b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:49:9: Unsupported: #-# (in property expression)
+   49 |       a #-# b;
       |         ^~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:57:9: Unsupported: #=# (in property expression)
-   57 |       a #=# b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:53:9: Unsupported: #=# (in property expression)
+   53 |       a #=# b;
       |         ^~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:61:7: Unsupported: nexttime (in property expression)
-   61 |       nexttime a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:57:7: Unsupported: nexttime (in property expression)
+   57 |       nexttime a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:65:7: Unsupported: nexttime[] (in property expression)
-   65 |       nexttime [2] a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:61:7: Unsupported: nexttime[] (in property expression)
+   61 |       nexttime [2] a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:69:7: Unsupported: s_nexttime (in property expression)
-   69 |       s_nexttime a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:65:7: Unsupported: s_nexttime (in property expression)
+   65 |       s_nexttime a;
       |       ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:73:7: Unsupported: s_nexttime[] (in property expression)
-   73 |       s_nexttime [2] a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:69:7: Unsupported: s_nexttime[] (in property expression)
+   69 |       s_nexttime [2] a;
       |       ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:16: Unsupported: always (in property expression)
-   77 |       nexttime always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:73:16: Unsupported: always (in property expression)
+   73 |       nexttime always a;
       |                ^~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:7: Unsupported: nexttime (in property expression)
-   77 |       nexttime always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:73:7: Unsupported: nexttime (in property expression)
+   73 |       nexttime always a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:20: Unsupported: always (in property expression)
-   81 |       nexttime [2] always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:20: Unsupported: always (in property expression)
+   77 |       nexttime [2] always a;
       |                    ^~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:7: Unsupported: nexttime[] (in property expression)
-   81 |       nexttime [2] always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:77:7: Unsupported: nexttime[] (in property expression)
+   77 |       nexttime [2] always a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:16: Unsupported: eventually (in property expression)
-   85 |       nexttime eventually a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:16: Unsupported: eventually (in property expression)
+   81 |       nexttime eventually a;
       |                ^~~~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:7: Unsupported: nexttime (in property expression)
-   85 |       nexttime eventually a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:81:7: Unsupported: nexttime (in property expression)
+   81 |       nexttime eventually a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:20: Unsupported: always (in property expression)
-   89 |       nexttime [2] always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:20: Unsupported: always (in property expression)
+   85 |       nexttime [2] always a;
       |                    ^~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:7: Unsupported: nexttime[] (in property expression)
-   89 |       nexttime [2] always a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:85:7: Unsupported: nexttime[] (in property expression)
+   85 |       nexttime [2] always a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:16: Unsupported: s_eventually (in property expression)
-   93 |       nexttime s_eventually a;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:16: Unsupported: s_eventually (in property expression)
+   89 |       nexttime s_eventually a;
+      |                ^~~~~~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:89:7: Unsupported: nexttime (in property expression)
+   89 |       nexttime s_eventually a;
+      |       ^~~~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:35: Unsupported: always (in property expression)
+   93 |       nexttime s_eventually [2:$] always a;
+      |                                   ^~~~~~
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:16: Unsupported: s_eventually[] (in property expression)
+   93 |       nexttime s_eventually [2:$] always a;
       |                ^~~~~~~~~~~~
 %Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:93:7: Unsupported: nexttime (in property expression)
-   93 |       nexttime s_eventually a;
+   93 |       nexttime s_eventually [2:$] always a;
       |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:35: Unsupported: always (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |                                   ^~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:16: Unsupported: s_eventually[] (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |                ^~~~~~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:7: Unsupported: nexttime (in property expression)
-   97 |       nexttime s_eventually [2:$] always a;
-      |       ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:101:17: Unsupported: accept_on (in property expression)
-  101 |       accept_on (a) b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:97:17: Unsupported: accept_on (in property expression)
+   97 |       accept_on (a) b;
       |                 ^
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:105:22: Unsupported: sync_accept_on (in property expression)
-  105 |       sync_accept_on (a) b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:101:22: Unsupported: sync_accept_on (in property expression)
+  101 |       sync_accept_on (a) b;
       |                      ^
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:109:17: Unsupported: reject_on (in property expression)
-  109 |       reject_on (a) b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:105:17: Unsupported: reject_on (in property expression)
+  105 |       reject_on (a) b;
       |                 ^
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:113:22: Unsupported: sync_reject_on (in property expression)
-  113 |       sync_reject_on (a) b;
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:109:22: Unsupported: sync_reject_on (in property expression)
+  109 |       sync_reject_on (a) b;
       |                      ^
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:117:9: Unsupported: iff (in property expression)
-  117 |       a iff b;
-      |         ^~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:120:27: Unsupported: property argument data type
-  120 |    property p_arg_propery(property inprop);
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:112:27: Unsupported: property argument data type
+  112 |    property p_arg_propery(property inprop);
       |                           ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:123:27: Unsupported: sequence argument data type
-  123 |    property p_arg_seqence(sequence inseq);
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:115:27: Unsupported: sequence argument data type
+  115 |    property p_arg_seqence(sequence inseq);
       |                           ^~~~~~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:128:7: Unsupported: property case expression
-  128 |       case (a) endcase
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:120:7: Unsupported: property case expression
+  120 |       case (a) endcase
       |       ^~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:131:7: Unsupported: property case expression
-  131 |       case (a) default: b; endcase
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:123:7: Unsupported: property case expression
+  123 |       case (a) default: b; endcase
       |       ^~~~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:134:7: Unsupported: property case expression
-  134 |       if (a) b
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:126:7: Unsupported: property case expression
+  126 |       if (a) b
       |       ^~
-%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:137:7: Unsupported: property case expression
-  137 |       if (a) b else c
+%Error-UNSUPPORTED: t/t_property_pexpr_unsup.v:129:7: Unsupported: property case expression
+  129 |       if (a) b else c
       |       ^~
 %Error: Exiting due to
diff --git a/test_regress/t/t_property_pexpr_unsup.v b/test_regress/t/t_property_pexpr_unsup.v
index ec806a492..22c81989b 100644
--- a/test_regress/t/t_property_pexpr_unsup.v
+++ b/test_regress/t/t_property_pexpr_unsup.v
@@ -45,10 +45,6 @@ module t (/*AUTOARG*/
       a s_until_with b;
    endproperty
 
-   property p_implies;
-      a implies b;
-   endproperty
-
    property p_poundminuspound1;
       a #-# b;
    endproperty
@@ -113,10 +109,6 @@ module t (/*AUTOARG*/
       sync_reject_on (a) b;
    endproperty
 
-   property p_iff;
-      a iff b;
-   endproperty
-
    property p_arg_propery(property inprop);
       inprop;
    endproperty

From e494cf22a401cec4d15848edbc082ccda359fce6 Mon Sep 17 00:00:00 2001
From: Geza Lore <gezalore@gmail.com>
Date: Mon, 7 Jul 2025 16:25:29 +0100
Subject: [PATCH 208/211] Add DfgPeephole patterns (#6149)

---
 src/V3DfgPeephole.cpp             | 199 ++++++++++++++++++++++++++++--
 src/V3DfgPeephole.h               |  12 ++
 test_regress/t/t_dfg_peephole.v   |  24 +++-
 test_regress/t/t_opt_const_dfg.py |   2 +-
 4 files changed, 221 insertions(+), 16 deletions(-)

diff --git a/src/V3DfgPeephole.cpp b/src/V3DfgPeephole.cpp
index a1adf0af9..8cbe90104 100644
--- a/src/V3DfgPeephole.cpp
+++ b/src/V3DfgPeephole.cpp
@@ -241,6 +241,16 @@ class V3DfgPeephole final : public DfgVisitor {
         return make<Vertex>(examplep->fileline(), examplep->dtypep(), operands...);
     }
 
+    // Check two vertex are the same, or the same constant value
+    static bool isSame(const DfgVertex* ap, const DfgVertex* bp) {
+        if (ap == bp) return true;
+        const DfgConst* const aConstp = ap->cast<DfgConst>();
+        if (!aConstp) return false;
+        const DfgConst* const bConstp = bp->cast<DfgConst>();
+        if (!bConstp) return false;
+        return aConstp->num().isCaseEq(bConstp->num());
+    }
+
     // Note: If any of the following transformers return true, then the vertex was replaced and the
     // caller must not do any further changes, so the caller must check the return value, otherwise
     // there will be hard to debug issues.
@@ -417,6 +427,55 @@ class V3DfgPeephole final : public DfgVisitor {
         return false;
     }
 
+    // Transformations that apply to all distributive and associative binary
+    // vertices 'Other' is the type that is distributive over 'Vertex',
+    // that is: a Other (b Vertex c) == (a Other b) Vertex (a Other c)
+    template <typename Other, typename Vertex>
+    VL_ATTR_WARN_UNUSED_RESULT bool distributiveAndAssociativeBinary(Vertex* vtxp) {
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+        if (!lhsp->hasMultipleSinks() && !rhsp->hasMultipleSinks()) {
+            // Convert '(a Other b) Vertex (a Other c)' and associative
+            // variations to 'a Other (b Vertex c)'
+            if (Other* const lp = lhsp->cast<Other>()) {
+                if (Other* const rp = rhsp->cast<Other>()) {
+                    DfgVertex* const llp = lp->lhsp();
+                    DfgVertex* const lrp = lp->rhsp();
+                    DfgVertex* const rlp = rp->lhsp();
+                    DfgVertex* const rrp = rp->rhsp();
+                    DfgVertex* ap = nullptr;
+                    DfgVertex* bp = nullptr;
+                    DfgVertex* cp = nullptr;
+                    if (llp == rlp) {
+                        ap = llp;
+                        bp = lrp;
+                        cp = rrp;
+                    } else if (llp == rrp) {
+                        ap = llp;
+                        bp = lrp;
+                        cp = rlp;
+                    } else if (lrp == rlp) {
+                        ap = lrp;
+                        bp = llp;
+                        cp = rrp;
+                    } else if (lrp == rrp) {
+                        ap = lrp;
+                        bp = llp;
+                        cp = rlp;
+                    }
+                    if (ap) {
+                        APPLYING(REPLACE_DISTRIBUTIVE_BINARY) {
+                            replace(vtxp, make<Other>(vtxp, ap, make<Vertex>(lhsp, bp, cp)));
+                            return true;
+                        }
+                    }
+                }
+            }
+        }
+
+        return false;
+    }
+
     // Bitwise operation with one side Const, and the other side a Concat
     template <typename Vertex>
     VL_ATTR_WARN_UNUSED_RESULT bool tryPushBitwiseOpThroughConcat(Vertex* vtxp, DfgConst* constp,
@@ -881,15 +940,23 @@ class V3DfgPeephole final : public DfgVisitor {
     //=========================================================================
 
     void visit(DfgAnd* vtxp) override {
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->lhsp()->dtypep(), vtxp, "Mismatched LHS width");
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->rhsp()->dtypep(), vtxp, "Mismatched RHS width");
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+
+        UASSERT_OBJ(vtxp->dtypep() == lhsp->dtypep(), vtxp, "Mismatched LHS width");
+        UASSERT_OBJ(vtxp->dtypep() == rhsp->dtypep(), vtxp, "Mismatched RHS width");
+
+        if (lhsp == rhsp) {
+            APPLYING(REMOVE_AND_WITH_SELF) {
+                replace(vtxp, lhsp);
+                return;
+            }
+        }
 
         if (associativeBinary(vtxp)) return;
 
         if (commutativeBinary(vtxp)) return;
 
-        DfgVertex* const lhsp = vtxp->lhsp();
-        DfgVertex* const rhsp = vtxp->rhsp();
         FileLine* const flp = vtxp->fileline();
 
         // Bubble pushing (De Morgan)
@@ -935,6 +1002,8 @@ class V3DfgPeephole final : public DfgVisitor {
             }
         }
 
+        if (distributiveAndAssociativeBinary<DfgOr, DfgAnd>(vtxp)) return;
+
         if (tryPushBitwiseOpThroughReductions(vtxp)) return;
 
         if (DfgNot* const lhsNotp = lhsp->cast<DfgNot>()) {
@@ -946,19 +1015,38 @@ class V3DfgPeephole final : public DfgVisitor {
                     return;
                 }
             }
+
+            // ~A & (A & _) or ~A & (_ & A) is all zeroes
+            if (DfgAnd* const rhsAndp = rhsp->cast<DfgAnd>()) {
+                if (lhsNotp->srcp() == rhsAndp->lhsp() || lhsNotp->srcp() == rhsAndp->rhsp()) {
+                    APPLYING(REPLACE_CONTRADICTORY_AND_3) {
+                        DfgConst* const replacementp = makeZero(flp, vtxp->width());
+                        replace(vtxp, replacementp);
+                        return;
+                    }
+                }
+            }
         }
     }
 
     void visit(DfgOr* vtxp) override {
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->lhsp()->dtypep(), vtxp, "Mismatched LHS width");
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->rhsp()->dtypep(), vtxp, "Mismatched RHS width");
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+
+        UASSERT_OBJ(vtxp->dtypep() == lhsp->dtypep(), vtxp, "Mismatched LHS width");
+        UASSERT_OBJ(vtxp->dtypep() == rhsp->dtypep(), vtxp, "Mismatched RHS width");
+
+        if (lhsp == rhsp) {
+            APPLYING(REMOVE_OR_WITH_SELF) {
+                replace(vtxp, lhsp);
+                return;
+            }
+        }
 
         if (associativeBinary(vtxp)) return;
 
         if (commutativeBinary(vtxp)) return;
 
-        DfgVertex* const lhsp = vtxp->lhsp();
-        DfgVertex* const rhsp = vtxp->rhsp();
         FileLine* const flp = vtxp->fileline();
 
         // Bubble pushing (De Morgan)
@@ -1027,6 +1115,8 @@ class V3DfgPeephole final : public DfgVisitor {
             }
         }
 
+        if (distributiveAndAssociativeBinary<DfgAnd, DfgOr>(vtxp)) return;
+
         if (tryPushBitwiseOpThroughReductions(vtxp)) return;
 
         if (DfgNot* const lhsNotp = lhsp->cast<DfgNot>()) {
@@ -1039,20 +1129,40 @@ class V3DfgPeephole final : public DfgVisitor {
                     return;
                 }
             }
+
+            // ~A | (A | _) or ~A | (_ | A) is all ones
+            if (DfgOr* const rhsOrp = rhsp->cast<DfgOr>()) {
+                if (lhsNotp->srcp() == rhsOrp->lhsp() || lhsNotp->srcp() == rhsOrp->rhsp()) {
+                    APPLYING(REPLACE_TAUTOLOGICAL_OR_3) {
+                        DfgConst* const replacementp = makeZero(flp, vtxp->width());
+                        replacementp->num().setAllBits1();
+                        replace(vtxp, replacementp);
+                        return;
+                    }
+                }
+            }
         }
     }
 
     void visit(DfgXor* vtxp) override {
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->lhsp()->dtypep(), vtxp, "Mismatched LHS width");
-        UASSERT_OBJ(vtxp->dtypep() == vtxp->rhsp()->dtypep(), vtxp, "Mismatched RHS width");
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+
+        UASSERT_OBJ(vtxp->dtypep() == lhsp->dtypep(), vtxp, "Mismatched LHS width");
+        UASSERT_OBJ(vtxp->dtypep() == rhsp->dtypep(), vtxp, "Mismatched RHS width");
+
+        if (lhsp == rhsp) {
+            APPLYING(REPLACE_XOR_WITH_SELF) {
+                DfgConst* const replacementp = makeZero(vtxp->fileline(), vtxp->width());
+                replace(vtxp, replacementp);
+                return;
+            }
+        }
 
         if (associativeBinary(vtxp)) return;
 
         if (commutativeBinary(vtxp)) return;
 
-        DfgVertex* const lhsp = vtxp->lhsp();
-        DfgVertex* const rhsp = vtxp->rhsp();
-
         if (DfgConst* const lConstp = lhsp->cast<DfgConst>()) {
             if (lConstp->isZero()) {
                 APPLYING(REMOVE_XOR_WITH_ZERO) {
@@ -1252,6 +1362,16 @@ class V3DfgPeephole final : public DfgVisitor {
 
     void visit(DfgLogAnd* vtxp) override {
         if (foldBinary(vtxp)) return;
+
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+
+        if (lhsp->width() == 1 && rhsp->width() == 1) {
+            APPLYING(REPLACE_LOGAND_WITH_AND) {
+                replace(vtxp, make<DfgAnd>(vtxp, lhsp, rhsp));
+                return;
+            }
+        }
     }
 
     void visit(DfgLogEq* vtxp) override {
@@ -1264,6 +1384,16 @@ class V3DfgPeephole final : public DfgVisitor {
 
     void visit(DfgLogOr* vtxp) override {
         if (foldBinary(vtxp)) return;
+
+        DfgVertex* const lhsp = vtxp->lhsp();
+        DfgVertex* const rhsp = vtxp->rhsp();
+
+        if (lhsp->width() == 1 && rhsp->width() == 1) {
+            APPLYING(REPLACE_LOGOR_WITH_OR) {
+                replace(vtxp, make<DfgOr>(vtxp, lhsp, rhsp));
+                return;
+            }
+        }
     }
 
     void visit(DfgLt* vtxp) override {
@@ -1409,6 +1539,13 @@ class V3DfgPeephole final : public DfgVisitor {
             }
         }
 
+        if (isSame(thenp, elsep)) {
+            APPLYING(REMOVE_COND_WITH_BRANCHES_SAME) {
+                replace(vtxp, elsep);
+                return;
+            }
+        }
+
         if (DfgNot* const condNotp = condp->cast<DfgNot>()) {
             if (!condp->hasMultipleSinks() || condNotp->hasMultipleSinks()) {
                 APPLYING(SWAP_COND_WITH_NOT_CONDITION) {
@@ -1447,6 +1584,35 @@ class V3DfgPeephole final : public DfgVisitor {
             }
         }
 
+        if (DfgOr* const condOrp = condp->cast<DfgOr>()) {
+            if (DfgCond* const thenCondp = thenp->cast<DfgCond>()) {
+                if (!thenCondp->hasMultipleSinks()) {
+                    if (condOrp->lhsp() == thenCondp->condp()) {
+                        // '(a | b) ? (a ? x : y) : z' -> 'a ? x : b ? y : z'
+                        APPLYING(REPLACE_COND_OR_THEN_COND_LHS) {
+                            DfgCond* const replacementp
+                                = make<DfgCond>(vtxp, condOrp->lhsp(), thenCondp->thenp(),
+                                                make<DfgCond>(thenCondp, condOrp->rhsp(),
+                                                              thenCondp->elsep(), elsep));
+                            replace(vtxp, replacementp);
+                            return;
+                        }
+                    }
+                    if (condOrp->rhsp() == thenCondp->condp()) {
+                        // '(a | b) ? (a ? x : y) : z' -> 'a ? x : b ? y : z'
+                        APPLYING(REPLACE_COND_OR_THEN_COND_RHS) {
+                            DfgCond* const replacementp
+                                = make<DfgCond>(vtxp, condOrp->rhsp(), thenCondp->thenp(),
+                                                make<DfgCond>(thenCondp, condOrp->lhsp(),
+                                                              thenCondp->elsep(), elsep));
+                            replace(vtxp, replacementp);
+                            return;
+                        }
+                    }
+                }
+            }
+        }
+
         if (vtxp->width() > 1) {
             // 'cond ? a + 1 : a' -> 'a + cond'
             if (DfgAdd* const thenAddp = thenp->cast<DfgAdd>()) {
@@ -1495,6 +1661,13 @@ class V3DfgPeephole final : public DfgVisitor {
                     return;
                 }
             }
+            if (thenp == condp) {  // a ? a : b becomes a | b
+                APPLYING(REPLACE_COND_WITH_THEN_BRANCH_COND) {
+                    DfgOr* const repalcementp = make<DfgOr>(vtxp, condp, elsep);
+                    replace(vtxp, repalcementp);
+                    return;
+                }
+            }
             if (thenp->isOnes()) {  // a ? 1 : b becomes a | b
                 APPLYING(REPLACE_COND_WITH_THEN_BRANCH_ONES) {
                     DfgOr* const repalcementp = make<DfgOr>(vtxp, condp, elsep);
diff --git a/src/V3DfgPeephole.h b/src/V3DfgPeephole.h
index 02895dfa0..f08627660 100644
--- a/src/V3DfgPeephole.h
+++ b/src/V3DfgPeephole.h
@@ -48,11 +48,14 @@
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, PUSH_SEL_THROUGH_REPLICATE) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, PUSH_SEL_THROUGH_SHIFTL) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_AND_WITH_ONES) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_AND_WITH_SELF) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_CONCAT_OF_ADJOINING_SELS) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_COND_WITH_BRANCHES_SAME) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_COND_WITH_FALSE_CONDITION) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_COND_WITH_TRUE_CONDITION) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_FULL_WIDTH_SEL) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_NOT_NOT) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_OR_WITH_SELF) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_OR_WITH_ZERO) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_REDUNDANT_ZEXT_ON_RHS_OF_SHIFT) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REMOVE_REPLICATE_ONCE) \
@@ -68,12 +71,19 @@
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_CONCAT_ZERO_AND_SEL_TOP_WITH_SHIFTR) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_DEC) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_INC) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_OR_THEN_COND_LHS) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_OR_THEN_COND_RHS) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_WITH_ELSE_BRANCH_ONES) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_WITH_ELSE_BRANCH_ZERO) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_WITH_THEN_BRANCH_COND) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_WITH_THEN_BRANCH_ONES) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_COND_WITH_THEN_BRANCH_ZERO) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_CONTRADICTORY_AND) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_CONTRADICTORY_AND_3) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_DISTRIBUTIVE_BINARY) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_EXTEND) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_LOGAND_WITH_AND) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_LOGOR_WITH_OR) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_NESTED_CONCAT_OF_ADJOINING_SELS_ON_LHS) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_NESTED_CONCAT_OF_ADJOINING_SELS_ON_RHS) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_NOT_EQ) \
@@ -86,7 +96,9 @@
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_SEL_FROM_SEL) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_SUB_WITH_NOT) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_TAUTOLOGICAL_OR) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_TAUTOLOGICAL_OR_3) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_XOR_WITH_ONES) \
+    _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, REPLACE_XOR_WITH_SELF) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, RIGHT_LEANING_ASSOC) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, SWAP_COND_WITH_NEQ_CONDITION) \
     _FOR_EACH_DFG_PEEPHOLE_OPTIMIZATION_APPLY(macro, SWAP_COND_WITH_NOT_CONDITION) \
diff --git a/test_regress/t/t_dfg_peephole.v b/test_regress/t/t_dfg_peephole.v
index ae91ea574..fb4644387 100644
--- a/test_regress/t/t_dfg_peephole.v
+++ b/test_regress/t/t_dfg_peephole.v
@@ -124,20 +124,33 @@ module t (
    `signal(REPLACE_NOT_NEQ, ~(rand_a != rand_b));
    `signal(REPLACE_NOT_EQ, ~(srand_a == srand_b));
    `signal(REPLACE_NOT_OF_CONST, ~4'd0);
+   `signal(REPLACE_DISTRIBUTIVE_AND_OR_ABAC, ((rand_a >> 10) | (rand_b >> 10)) & ((rand_a  >> 10) | (srand_b >> 10)));
+   `signal(REPLACE_DISTRIBUTIVE_AND_OR_ABCA, ((rand_a >> 11) | (rand_b >> 11)) & ((srand_b >> 11) | (rand_a  >> 11)));
+   `signal(REPLACE_DISTRIBUTIVE_AND_OR_BAAC, ((rand_b >> 12) | (rand_a >> 12)) & ((rand_a  >> 12) | (srand_b >> 12)));
+   `signal(REPLACE_DISTRIBUTIVE_AND_OR_BACA, ((rand_b >> 13) | (rand_a >> 13)) & ((srand_b >> 13) | (rand_a  >> 13)));
    `signal(REPLACE_AND_OF_NOT_AND_NOT, ~rand_a[1] & ~rand_b[1]);
    `signal(REPLACE_AND_OF_NOT_AND_NEQ, ~rand_a[2] & (rand_b != 64'd2));
    `signal(REPLACE_AND_OF_CONST_AND_CONST, const_a & const_b);
    `signal(REPLACE_AND_WITH_ZERO, 64'd0 & rand_a);
    `signal(REMOVE_AND_WITH_ONES, -64'd1 & rand_a);
+   `signal(REMOVE_AND_WITH_SELF, ~rand_a & ~rand_a);
    `signal(REPLACE_CONTRADICTORY_AND, rand_a & ~rand_a);
+   `signal(REPLACE_CONTRADICTORY_AND_3, ~(rand_a + 1) & ((rand_a + 1) & rand_b));
+   `signal(REPLACE_OR_DISTRIBUTIVE, (rand_a & rand_b) | (rand_a & srand_b));
+   `signal(REPLACE_DISTRIBUTIVE_OR_AND_ABAC, ((rand_a >> 14) & (rand_b >> 14)) | ((rand_a  >> 14) & (srand_b >> 14)));
+   `signal(REPLACE_DISTRIBUTIVE_OR_AND_ABCA, ((rand_a >> 15) & (rand_b >> 15)) | ((srand_b >> 15) & (rand_a  >> 15)));
+   `signal(REPLACE_DISTRIBUTIVE_OR_AND_BAAC, ((rand_b >> 16) & (rand_a >> 16)) | ((rand_a  >> 16) & (srand_b >> 16)));
+   `signal(REPLACE_DISTRIBUTIVE_OR_AND_BACA, ((rand_b >> 17) & (rand_a >> 17)) | ((srand_b >> 17) & (rand_a  >> 17)));
    `signal(REPLACE_OR_OF_NOT_AND_NOT, ~rand_a[3] | ~rand_b[3]);
    `signal(REPLACE_OR_OF_NOT_AND_NEQ, ~rand_a[4] | (rand_b != 64'd3));
    `signal(REPLACE_OR_OF_CONCAT_ZERO_LHS_AND_CONCAT_RHS_ZERO, {2'd0, rand_a[1:0]} | {rand_b[1:0], 2'd0});
    `signal(REPLACE_OR_OF_CONCAT_LHS_ZERO_AND_CONCAT_ZERO_RHS, {rand_a[1:0], 2'd0} | {2'd0, rand_b[1:0]});
    `signal(REPLACE_OR_OF_CONST_AND_CONST, const_a | const_b);
-   `signal(REMOVE_OR_WITH_ZERO, 64'd0 | rand_a);
    `signal(REPLACE_OR_WITH_ONES, -64'd1 | rand_a);
+   `signal(REMOVE_OR_WITH_SELF, ~rand_a | ~rand_a);
+   `signal(REMOVE_OR_WITH_ZERO, 64'd0 | rand_a);
    `signal(REPLACE_TAUTOLOGICAL_OR, rand_a | ~rand_a);
+   `signal(REPLACE_TAUTOLOGICAL_OR_3, ~(rand_a + 1) | ((rand_a + 1) | rand_b));
    `signal(REMOVE_SUB_ZERO, rand_a - 64'd0);
    `signal(REPLACE_SUB_WITH_NOT, rand_a[0] - 1'b1);
    `signal(REMOVE_REDUNDANT_ZEXT_ON_RHS_OF_SHIFT, rand_a << {2'b0, rand_a[2:0]});
@@ -159,9 +172,13 @@ module t (
    `signal(REPLACE_NESTED_CONCAT_OF_ADJOINING_SELS_ON_RHS, {{rand_b, rand_a[10:3]}, rand_a[2:1]});
    `signal(REMOVE_COND_WITH_FALSE_CONDITION, 1'd0 ? rand_a : rand_b);
    `signal(REMOVE_COND_WITH_TRUE_CONDITION, 1'd1 ? rand_a : rand_b);
+   `signal(REMOVE_COND_WITH_BRANCHES_SAME, rand_a[0] ? ~rand_b : ~rand_b);
    `signal(SWAP_COND_WITH_NOT_CONDITION, (~rand_a[0] & 1'd1) ? rand_a : rand_b);
    `signal(SWAP_COND_WITH_NEQ_CONDITION, rand_b != rand_a ? rand_a : rand_b);
    `signal(PULL_NOTS_THROUGH_COND, rand_a[0] ? ~rand_a[4:0] : ~rand_b[4:0]);
+   `signal(REPLACE_COND_OR_THEN_COND_LHS, (rand_a[0] | rand_b[0] ? (rand_a[0] ? rand_a : rand_b) : srand_a));
+   `signal(REPLACE_COND_OR_THEN_COND_RHS, (rand_a[0] | rand_b[0] ? (rand_b[0] ? rand_a : rand_b) : srand_a));
+   `signal(REPLACE_COND_WITH_THEN_BRANCH_COND, rand_a[0] ? rand_a[0] : rand_a[1]);
    `signal(REPLACE_COND_WITH_THEN_BRANCH_ZERO, rand_a[0] ? 1'd0 : rand_a[1]);
    `signal(REPLACE_COND_WITH_THEN_BRANCH_ONES, rand_a[0] ? 1'd1 : rand_a[1]);
    `signal(REPLACE_COND_WITH_ELSE_BRANCH_ZERO, rand_a[0] ? rand_a[1] : 1'd0);
@@ -177,11 +194,14 @@ module t (
    `signal(REMOVE_WIDTH_ONE_REDUCTION_OR,  |rand_a[0]);
    `signal(REMOVE_WIDTH_ONE_REDUCTION_XOR, ^rand_a[0]);
    `signal(REMOVE_XOR_WITH_ZERO, 64'd0 ^ rand_a);
-   `signal(REMOVE_XOR_WITH_ONES, -64'd1 ^ rand_a);
+   `signal(REPLACE_XOR_WITH_SELF, ~rand_a ^ ~rand_a);
+   `signal(REPLACE_XOR_WITH_ONES, -64'd1 ^ rand_a);
    `signal(REPLACE_COND_DEC, randbit_a ? rand_b - 64'b1 : rand_b);
    `signal(REPLACE_COND_INC, randbit_a ? rand_b + 64'b1 : rand_b);
    `signal(NO_REPLACE_COND_DEC, randbit_a ? rand_b - 64'hf000000000000000 : rand_b);
    `signal(NO_REPLACE_COND_INC, randbit_a ? rand_b + 64'hf000000000000000 : rand_b);
+   `signal(REPLACE_LOGAND_WITH_AND, rand_a[0] && rand_a[1]);
+   `signal(REPLACE_LOGOR_WITH_OR, rand_a[0] || rand_a[1]);
    `signal(RIGHT_LEANING_ASSOC, (((rand_a + rand_b) + rand_a) + rand_b));
    `signal(RIGHT_LEANING_CONCET, {{{rand_a, rand_b}, rand_a}, rand_b});
 
diff --git a/test_regress/t/t_opt_const_dfg.py b/test_regress/t/t_opt_const_dfg.py
index 45033fc3f..7fd8decd0 100755
--- a/test_regress/t/t_opt_const_dfg.py
+++ b/test_regress/t/t_opt_const_dfg.py
@@ -18,7 +18,7 @@ test.compile(verilator_flags2=["-Wno-UNOPTTHREADS", "--stats", test.pli_filename
 test.execute()
 
 if test.vlt:
-    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 38)
+    test.file_grep(test.stats, r'Optimizations, Const bit op reduction\s+(\d+)', 37)
     test.file_grep(test.stats, r'SplitVar, packed variables split automatically\s+(\d+)', 1)
 
 test.passes()

From 5777ab75c7de30270d3f4e53c358c26a92c1fa3d Mon Sep 17 00:00:00 2001
From: Igor Zaworski <84542280+igorosky@users.noreply.github.com>
Date: Tue, 8 Jul 2025 16:28:17 +0200
Subject: [PATCH 209/211] Fix crash with --dumpi-V3LinkDot without --debug
 (#6159)

---
 docs/CONTRIBUTORS             |  1 +
 src/V3LinkDot.cpp             | 26 +++++++++++++-------------
 test_regress/t/t_mod_empty.py | 16 ++++++++++++++++
 test_regress/t/t_mod_empty.v  |  8 ++++++++
 4 files changed, 38 insertions(+), 13 deletions(-)
 create mode 100755 test_regress/t/t_mod_empty.py
 create mode 100644 test_regress/t/t_mod_empty.v

diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS
index 459fe8b03..8b3ccd0ed 100644
--- a/docs/CONTRIBUTORS
+++ b/docs/CONTRIBUTORS
@@ -83,6 +83,7 @@ Huang Rui
 Huanghuang Zhou
 HungMingWu
 HyungKi Jeong
+Igor Zaworski
 Ilya Barkov
 Iru Cai
 Ivan Vnučec
diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp
index e43da39fb..313307919 100644
--- a/src/V3LinkDot.cpp
+++ b/src/V3LinkDot.cpp
@@ -2762,7 +2762,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 if (nodep->name() == "__paramNumber1" && m_cellp
                     && VN_IS(m_cellp->modp(), Primitive)) {
                     // Primitive parameter is really a delay we can just ignore
-                    VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
                     return;
                 } else {
                     const string suggest
@@ -3231,7 +3231,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     taskrefp = new AstFuncRef{nodep->fileline(), nodep->name(), nullptr};
                 }
                 nodep->replaceWith(taskrefp);
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 m_ds = lastStates;
                 return;
             } else if (AstVar* const varp = foundToVarp(foundp, nodep, VAccess::READ)) {
@@ -3665,7 +3665,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                             AstVarRef* const newrefp
                                 = new AstVarRef{nodep->fileline(), nodep->varp(), nodep->access()};
                             nodep->replaceWith(newrefp);
-                            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                            VL_DO_DANGLING(pushDeletep(nodep), nodep);
                         }
                     }
                 }
@@ -3693,7 +3693,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     AstVarRef* const newvscp
                         = new AstVarRef{nodep->fileline(), vscp, nodep->access()};
                     nodep->replaceWith(newvscp);
-                    VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                    VL_DO_DANGLING(pushDeletep(nodep), nodep);
                     UINFO(9, indent() << "new " << newvscp);  // Also prints taskp
                 }
             }
@@ -3983,7 +3983,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                     AstNode* addp = pinp;
                                     if (AstArg* const argp = VN_CAST(pinp, Arg)) {
                                         addp = argp->exprp()->unlinkFrBack();
-                                        VL_DO_DANGLING(pinp->deleteTree(), pinp);
+                                        VL_DO_DANGLING(pushDeletep(pinp), pinp);
                                     }
                                     outp = AstNode::addNext(outp, addp);
                                 }
@@ -3991,7 +3991,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                                 newp->dtypep(nodep->dtypep());
                             }
                             nodep->replaceWith(newp);
-                            VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                            VL_DO_DANGLING(pushDeletep(nodep), nodep);
                             return;
                         } else {
                             VSpellCheck speller;
@@ -4431,7 +4431,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                 cpackagep->v3warn(E_UNSUPPORTED,
                                   "Unsupported: Multiple '::' package/class reference");
             }
-            VL_DO_DANGLING(cpackagep->unlinkFrBack()->deleteTree(), cpackagep);
+            VL_DO_DANGLING(pushDeletep(cpackagep->unlinkFrBack()), cpackagep);
         }
         if (m_ds.m_dotp && (m_ds.m_dotPos == DP_PACKAGE || m_ds.m_dotPos == DP_SCOPE)) {
             UASSERT_OBJ(VN_IS(m_ds.m_dotp->lhsp(), ClassOrPackageRef), m_ds.m_dotp->lhsp(),
@@ -4476,7 +4476,7 @@ class LinkDotResolveVisitor final : public VNVisitor {
                     = new AstClassRefDType{nodep->fileline(), defp, paramsp};
                 newp->classOrPackagep(foundp->classOrPackagep());
                 nodep->replaceWith(newp);
-                VL_DO_DANGLING(nodep->deleteTree(), nodep);
+                VL_DO_DANGLING(pushDeletep(nodep), nodep);
                 return;
             } else if (m_insideClassExtParam) {
                 return;
@@ -4508,25 +4508,25 @@ class LinkDotResolveVisitor final : public VNVisitor {
             taskp->dpiExport(true);
             if (nodep->cname() != "") taskp->cname(nodep->cname());
         }
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
     void visit(AstPackageImport* nodep) override {
         // No longer needed
         LINKDOT_VISIT_START();
         checkNoDot(nodep);
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
     void visit(AstPackageExport* nodep) override {
         // No longer needed
         LINKDOT_VISIT_START();
         checkNoDot(nodep);
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
     void visit(AstPackageExportStarStar* nodep) override {
         // No longer needed
         LINKDOT_VISIT_START();
         checkNoDot(nodep);
-        VL_DO_DANGLING(nodep->unlinkFrBack()->deleteTree(), nodep);
+        VL_DO_DANGLING(pushDeletep(nodep->unlinkFrBack()), nodep);
     }
     void visit(AstCellRef* nodep) override {
         LINKDOT_VISIT_START();
@@ -4648,7 +4648,7 @@ void V3LinkDot::linkDotGuts(AstNetlist* rootp, VLinkDotStep step) {
     state.computeIfaceVarSyms();
     state.computeScopeAliases();
     state.dumpSelf();
-    { LinkDotResolveVisitor{rootp, &state}; }
+    LinkDotResolveVisitor visitor{rootp, &state};
     state.dumpSelf();
 }
 
diff --git a/test_regress/t/t_mod_empty.py b/test_regress/t/t_mod_empty.py
new file mode 100755
index 000000000..bf552cd4c
--- /dev/null
+++ b/test_regress/t/t_mod_empty.py
@@ -0,0 +1,16 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile(verilator_flags2=["--cc", "--dumpi-V3LinkDot", "6"])
+
+test.passes()
diff --git a/test_regress/t/t_mod_empty.v b/test_regress/t/t_mod_empty.v
new file mode 100644
index 000000000..e79e0ec68
--- /dev/null
+++ b/test_regress/t/t_mod_empty.v
@@ -0,0 +1,8 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Antmicro.
+// SPDX-License-Identifier: CC0-1.0
+
+module emptyModule;
+endmodule

From 1f0e767b61a1d0efa17cf14bab1eb8eadab29a8a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 8 Jul 2025 17:37:21 -0400
Subject: [PATCH 210/211] Commentary: Changes update

---
 Changes           | 2 ++
 docs/spelling.txt | 1 +
 2 files changed, 3 insertions(+)

diff --git a/Changes b/Changes
index b594569e1..09ba4ad45 100644
--- a/Changes
+++ b/Changes
@@ -47,6 +47,7 @@ Verilator 5.037 devel
 * Optimize DFG variable elimination (#6091). [Geza Lore]
 * Optimize DFG PUSH_SEL_THROUGH_CONCAT pattern (#6092). [Geza Lore]
 * Optimize DFG before V3Gate (#6141). [Geza Lore]
+* Optimize DFG peephole patterns (#6149). [Geza Lore]
 * Optimize constification within Expand and Subst stages (#6111). [Geza Lore]
 * Fix --x-initial and --x-assign random stability (#2662) (#5958) (#6018) (#6025) (#6075). [Todd Strader]
 * Fix trace hierarchical-name runtime errors (#5668) (#6076). [Paul Swirhun]
@@ -95,6 +96,7 @@ Verilator 5.037 devel
 * Fix wide non-blocking assignment mis-optimization (#6150) (#6152) (#6155). [Todd Strader]
 * Fix interface array connections with non-zero low declaration index.
 * Fix developer build error on MacOS/Flex2.6.4 (#6153). [Paul Swirhun]
+* Fix crash with --dumpi-V3LinkDot without --debug (#6159). [Igor Zaworski]
 
 
 Verilator 5.036 2025-04-27
diff --git a/docs/spelling.txt b/docs/spelling.txt
index a25ae9352..ee363f8ae 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -247,6 +247,7 @@ Lesik
 Libenzi
 Licker
 Liland
+LinkDot
 Liu
 Liwei
 Lockhart

From f037ac50b419f675ea23fa38abfc363505d7b43a Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Tue, 8 Jul 2025 23:02:26 -0400
Subject: [PATCH 211/211] Version bump

---
 CMakeLists.txt | 2 +-
 Changes        | 2 +-
 configure.ac   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 8e17aece0..570968aea 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -16,7 +16,7 @@ cmake_minimum_required(VERSION 3.15)
 cmake_policy(SET CMP0091 NEW) # Use MSVC_RUNTIME_LIBRARY to select the runtime
 project(
     Verilator
-    VERSION 5.037
+    VERSION 5.038
     HOMEPAGE_URL https://verilator.org
     LANGUAGES CXX
 )
diff --git a/Changes b/Changes
index 09ba4ad45..e2b00d973 100644
--- a/Changes
+++ b/Changes
@@ -8,7 +8,7 @@ The changes in each Verilator version are described below.  The
 contributors that suggested or implemented a given issue are shown in []. Thanks!
 
 
-Verilator 5.037 devel
+Verilator 5.038 2025-07-08
 ==========================
 
 **Important:**
diff --git a/configure.ac b/configure.ac
index e4f53b20b..5dae8392e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -10,7 +10,7 @@
 # Then 'make maintainer-dist'
 #AC_INIT([Verilator],[#.### YYYY-MM-DD])
 #AC_INIT([Verilator],[#.### devel])
-AC_INIT([Verilator],[5.037 devel],
+AC_INIT([Verilator],[5.038 2025-07-08],
         [https://verilator.org],
         [verilator],[https://verilator.org])