diff --git a/src/verilog.y b/src/verilog.y
index fd931d382..d19f08c31 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -6623,11 +6623,7 @@ sexpr<nodeExprp>:  // ==IEEE: sequence_expr  (The name sexpr is important as reg
         //                      // IEEE: "sequence_expr cycle_delay_range sequence_expr { cycle_delay_range sequence_expr }"
         //                      // Both rules basically mean we can repeat sequences, so make it simpler:
                 cycle_delay_range ~p~sexpr  %prec yP_POUNDPOUND
-                        { $$ = new AstSExpr{$<fl>1, $1, $2};
-                            if (VN_IS($2, LogNot)) {
-                                BBUNSUP($2->fileline(), "Unexpected not in sequence expression context");
-                            }
-                        }
+                        { $$ = new AstSExpr{$<fl>1, $1, $2}; }
         |       ~p~sexpr cycle_delay_range sexpr %prec prPOUNDPOUND_MULTI
                         { $$ = new AstSExpr{$<fl>2, $1, $2, $3}; }
         //
diff --git a/test_regress/t/t_property_sexpr_bad.out b/test_regress/t/t_property_sexpr_bad.out
index 520208d83..3279f25dd 100644
--- a/test_regress/t/t_property_sexpr_bad.out
+++ b/test_regress/t/t_property_sexpr_bad.out
@@ -1,5 +1,6 @@
-%Error-UNSUPPORTED: t/t_property_sexpr_bad.v:20:39: Unexpected not in sequence expression context
+%Error: t/t_property_sexpr_bad.v:20:39: Unexpected 'not' in sequence expression context
+                                      : ... note: In instance 't'
    20 |   assert property (@(posedge clk) ##1 not val);
       |                                       ^~~
-                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+        ... See the manual at https://verilator.org/verilator_doc.html?v=latest for more assistance.
 %Error: Exiting due to