From 2e9e4ae11011b72283af1c7bd52c0c9b51af95ed Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 18 Apr 2021 10:16:18 -0400 Subject: [PATCH] Add an URL on warnings to point to the manual's description. --- Changes | 1 + configure.ac | 1 + src/V3Error.cpp | 14 +++++++++++--- src/V3Error.h | 4 +++- src/config_build.h.in | 2 ++ test_regress/t/t_alias2_unsup.out | 1 + test_regress/t/t_alias_unsup.out | 1 + test_regress/t/t_array_list_bad.out | 1 + test_regress/t/t_assert_comp_bad.out | 1 + test_regress/t/t_assoc_wildcard_unsup.out | 1 + test_regress/t/t_case_x_bad.out | 1 + test_regress/t/t_case_zx_bad.out | 1 + test_regress/t/t_castdyn_castconst_bad.out | 1 + test_regress/t/t_castdyn_unsup_bad.out | 1 + test_regress/t/t_cdc_async_bad.out | 1 + test_regress/t/t_class_class.out | 1 + test_regress/t/t_class_extends_bad.out | 1 + test_regress/t/t_class_local_bad.out | 1 + test_regress/t/t_class_member_bad.out | 1 + test_regress/t/t_class_param.out | 1 + test_regress/t/t_class_param_bad.out | 1 + test_regress/t/t_class_static.out | 1 + test_regress/t/t_class_static_order.out | 1 + test_regress/t/t_class_unsup_bad.out | 1 + test_regress/t/t_class_vparam.out | 1 + test_regress/t/t_clk_first_bad.out | 1 + test_regress/t/t_clk_scope_bad.out | 1 + test_regress/t/t_clocker_bad.out | 1 + test_regress/t/t_concat_large_bad.out | 1 + test_regress/t/t_concat_link_bad.out | 1 + test_regress/t/t_const_bad.out | 1 + test_regress/t/t_delay_stmtdly_bad.out | 1 + test_regress/t/t_dpi_unpack_bad.out | 1 + test_regress/t/t_dynarray_bad.out | 1 + test_regress/t/t_enum_bad_hide.out | 1 + test_regress/t/t_event_control_unsup.out | 1 + test_regress/t/t_event_copy.out | 1 + test_regress/t/t_flag_context_bad.out | 1 + test_regress/t/t_flag_main_sc_bad.out | 1 + test_regress/t/t_flag_topmodule_bad.out | 1 + test_regress/t/t_flag_werror_bad1.out | 1 + test_regress/t/t_flag_werror_bad2.out | 1 + test_regress/t/t_flag_wfatal.out | 1 + test_regress/t/t_for_comma_bad.out | 1 + test_regress/t/t_fork.out | 1 + test_regress/t/t_fork_disable.out | 1 + test_regress/t/t_func_bad.out | 1 + test_regress/t/t_func_bad2.out | 1 + test_regress/t/t_func_bad_width.out | 1 + test_regress/t/t_func_const2_bad.out | 1 + test_regress/t/t_func_const3_bad.out | 1 + test_regress/t/t_func_const_bad.out | 1 + test_regress/t/t_func_const_packed_array_bad.out | 1 + test_regress/t/t_func_const_packed_struct_bad.out | 1 + test_regress/t/t_func_const_packed_struct_bad2.out | 1 + test_regress/t/t_func_const_struct_bad.out | 1 + test_regress/t/t_func_impure_bad.out | 1 + test_regress/t/t_func_tasknsvar_bad.out | 1 + test_regress/t/t_func_void_bad.out | 1 + test_regress/t/t_func_wide_out_bad.out | 1 + test_regress/t/t_fuzz_always_bad.out | 1 + test_regress/t/t_fuzz_genintf_bad.out | 1 + test_regress/t/t_fuzz_triand_bad.out | 1 + test_regress/t/t_gen_cond_bitrange_bad.out | 1 + test_regress/t/t_gen_defparam_unsup_bad.out | 1 + test_regress/t/t_generate_fatal_bad.out | 1 + test_regress/t/t_hier_block1_bad.out | 1 + test_regress/t/t_hierarchy_identifier_bad.out | 1 + test_regress/t/t_increment_bad.out | 1 + test_regress/t/t_initial_dlyass_bad.out | 1 + test_regress/t/t_inst_missing_bad.out | 1 + test_regress/t/t_inst_overwide_bad.out | 1 + test_regress/t/t_inst_pin_realnreal.out | 1 + test_regress/t/t_inst_recurse2_bad.out | 1 + test_regress/t/t_inst_recurse_bad.out | 1 + test_regress/t/t_interface_array_nocolon_bad.out | 1 + test_regress/t/t_interface_top_bad.out | 1 + test_regress/t/t_interface_typedef.out | 1 + test_regress/t/t_lint_always_comb_bad.out | 1 + test_regress/t/t_lint_blksync_bad.out | 1 + test_regress/t/t_lint_bsspace_bad.out | 1 + test_regress/t/t_lint_caseincomplete_bad.out | 1 + test_regress/t/t_lint_cmpconst_bad.out | 1 + test_regress/t/t_lint_colonplus_bad.out | 1 + test_regress/t/t_lint_declfilename_bad.out | 1 + test_regress/t/t_lint_defparam_bad.out | 1 + test_regress/t/t_lint_eofline_bad.out | 1 + test_regress/t/t_lint_ifdepth_bad.out | 1 + test_regress/t/t_lint_implicit_bad.out | 1 + test_regress/t/t_lint_implicit_def_bad.out | 1 + test_regress/t/t_lint_import_name2_bad.out | 1 + test_regress/t/t_lint_importstar_bad.out | 1 + test_regress/t/t_lint_incabspath_bad.out | 1 + test_regress/t/t_lint_infinite.out | 1 + test_regress/t/t_lint_input_eq_bad.out | 1 + test_regress/t/t_lint_latch_bad.out | 1 + test_regress/t/t_lint_latch_bad_2.out | 1 + test_regress/t/t_lint_latch_bad_3.out | 1 + test_regress/t/t_lint_literal_bad.out | 1 + test_regress/t/t_lint_multidriven_bad.out | 1 + test_regress/t/t_lint_nolatch_bad.out | 1 + test_regress/t/t_lint_nullport.out | 1 + test_regress/t/t_lint_once_bad.out | 1 + test_regress/t/t_lint_pindup_bad.out | 1 + test_regress/t/t_lint_pinnotfound_bad.out | 1 + test_regress/t/t_lint_pkg_colon_bad.out | 1 + test_regress/t/t_lint_realcvt_bad.out | 1 + test_regress/t/t_lint_repeat_bad.out | 1 + test_regress/t/t_lint_restore_bad.out | 1 + test_regress/t/t_lint_rsvd_bad.out | 1 + test_regress/t/t_lint_setout_bad.out | 1 + test_regress/t/t_lint_setout_bad_noinl.out | 1 + test_regress/t/t_lint_subout_bad.out | 1 + test_regress/t/t_lint_syncasyncnet_bad.out | 1 + test_regress/t/t_lint_unsigned_bad.out | 1 + test_regress/t/t_lint_unused_bad.out | 1 + test_regress/t/t_lint_unused_iface_bad.out | 1 + test_regress/t/t_lint_width_bad.out | 1 + test_regress/t/t_lint_width_docs_bad.out | 1 + test_regress/t/t_lint_width_genfor_bad.out | 1 + test_regress/t/t_math_countbits_bad.out | 1 + test_regress/t/t_math_shortreal_unsup_bad.out | 1 + test_regress/t/t_math_wide_bad.out | 1 + test_regress/t/t_mem_multi_ref_bad.out | 1 + test_regress/t/t_metacmt_onoff.out | 1 + test_regress/t/t_mod_dup_bad.out | 1 + test_regress/t/t_mod_interface_array3.out | 1 + test_regress/t/t_multitop_sig_bad.out | 1 + test_regress/t/t_order_blkandnblk_bad.out | 1 + test_regress/t/t_order_blkloopinit_bad.out | 1 + test_regress/t/t_order_clkinst_bad.out | 1 + test_regress/t/t_packed_concat_bad.out | 1 + test_regress/t/t_param_concat_bad.out | 1 + test_regress/t/t_param_in_func_bad.out | 1 + test_regress/t/t_param_noval_bad.out | 1 + test_regress/t/t_param_scope_bad.out | 1 + test_regress/t/t_param_sel_range_bad.out | 1 + test_regress/t/t_past_bad.out | 1 + test_regress/t/t_past_unsup_bad.out | 1 + test_regress/t/t_pp_dupdef_bad.out | 1 + test_regress/t/t_priority_case.out | 1 + test_regress/t/t_process.out | 1 + test_regress/t/t_prot_lib_inout_bad.out | 1 + test_regress/t/t_protect_ids_bad.out | 1 + test_regress/t/t_randc_unsup.out | 1 + test_regress/t/t_randomize.out | 1 + test_regress/t/t_randomize_method_types_unsup.out | 1 + test_regress/t/t_randomize_method_unsup.out | 1 + test_regress/t/t_savable_class_bad.out | 1 + test_regress/t/t_select_bad_msb.out | 1 + test_regress/t/t_select_bad_range.out | 1 + test_regress/t/t_select_bad_range2.out | 1 + test_regress/t/t_select_bad_range3.out | 1 + test_regress/t/t_split_var_1_bad.out | 1 + test_regress/t/t_stream_integer_type.out | 1 + test_regress/t/t_struct_unpacked2.out | 1 + test_regress/t/t_struct_unpacked_bad.out | 1 + test_regress/t/t_sys_readmem_assoc_bad.out | 1 + test_regress/t/t_timescale_lint_bad.out | 1 + test_regress/t/t_tri_compass_bad.out | 1 + test_regress/t/t_tri_pull2_bad.out | 1 + test_regress/t/t_tri_pull_bad.out | 1 + test_regress/t/t_tri_pullvec_bad.out | 1 + test_regress/t/t_udp.out | 1 + test_regress/t/t_udp_bad.out | 1 + test_regress/t/t_unopt_combo_bad.out | 1 + test_regress/t/t_unopt_converge_unopt_bad.out | 1 + test_regress/t/t_unoptflat_simple_2_bad.out | 1 + test_regress/t/t_unpacked_concat_bad.out | 1 + test_regress/t/t_vams_kwd_bad.out | 1 + test_regress/t/t_var_bad_hide.out | 1 + test_regress/t/t_var_bad_hide2.out | 1 + test_regress/t/t_var_bad_hide_docs.out | 1 + test_regress/t/t_var_in_assign_bad.out | 1 + test_regress/t/t_var_ref_bad3.out | 1 + test_regress/t/t_var_rsvd_bad.out | 1 + test_regress/t/t_var_static.out | 1 + test_regress/t/t_var_static_param.out | 1 + test_regress/t/t_var_types_bad.out | 1 + test_regress/t/t_vlt_warn_bad.out | 1 + test_regress/t/t_wait.out | 1 + test_regress/t/t_wire_beh1364_bad.out | 1 + test_regress/t/t_wire_beh1800_bad.out | 1 + test_regress/t/t_wire_behp1364_bad.out | 1 + test_regress/t/t_wire_behp1800_bad.out | 1 + 185 files changed, 198 insertions(+), 4 deletions(-) diff --git a/Changes b/Changes index 8b831699d..5ffac9a75 100644 --- a/Changes +++ b/Changes @@ -17,6 +17,7 @@ Verilator 4.201 devel **Minor:** +* Add an URL on warnings to point to the manual's description. * Add EOFNEWLINE warning when missing a newline at EOF. * Changed TIMESCALEMOD from error into a warning. * Verilated signals now use VlWide and VlPacked in place of C arrays. diff --git a/configure.ac b/configure.ac index 810812ab0..e8c5ac7f4 100644 --- a/configure.ac +++ b/configure.ac @@ -21,6 +21,7 @@ AC_CONFIG_FILES(Makefile src/Makefile src/Makefile_obj include/verilated.mk incl AC_MSG_RESULT([configuring for $PACKAGE_STRING]) PACKAGE_VERSION_NUMBER=`AS_ECHO("$PACKAGE_VERSION") | sed 's/ .*//g'` AC_SUBST(PACKAGE_VERSION_NUMBER) +AC_DEFINE_UNQUOTED([PACKAGE_VERSION_NUMBER_STRING],["$PACKAGE_VERSION_NUMBER"],[Package version as a number]) # Ignore automake flags passed by Ubuntu builds AC_ARG_ENABLE([dependency-tracking], diff --git a/src/V3Error.cpp b/src/V3Error.cpp index 13e506916..23921b0ee 100644 --- a/src/V3Error.cpp +++ b/src/V3Error.cpp @@ -39,6 +39,7 @@ bool V3Error::s_errorSuppressed = false; std::array V3Error::s_describedEachWarn; std::array V3Error::s_pretendError; bool V3Error::s_describedWarnings = false; +bool V3Error::s_describedWeb = false; V3Error::MessagesSet V3Error::s_messages; V3Error::ErrorExitCb V3Error::s_errorExitCb = nullptr; @@ -225,13 +226,20 @@ void V3Error::v3errorEnd(std::ostringstream& sstr, const string& locationStr) { } if (!s_errorSuppressed && !(s_errorCode == V3ErrorCode::EC_INFO || s_errorCode == V3ErrorCode::USERINFO)) { + const bool anError = isError(s_errorCode, s_errorSuppressed); + if (s_errorCode >= V3ErrorCode::EC_FIRST_NAMED && !s_describedWeb) { + s_describedWeb = true; + std::cerr << warnMore() << "... For " << (anError ? "error" : "warning") + << " description see https://verilator.org/warn/" << s_errorCode.ascii() + << "?v=" << PACKAGE_VERSION_NUMBER_STRING << endl; + } if (!s_describedEachWarn[s_errorCode] && !s_pretendError[s_errorCode]) { s_describedEachWarn[s_errorCode] = true; if (s_errorCode >= V3ErrorCode::EC_FIRST_WARN && !s_describedWarnings) { + s_describedWarnings = true; std::cerr << warnMore() << "... Use \"/* verilator lint_off " << s_errorCode.ascii() << " */\" and lint_on around source to disable this message." << endl; - s_describedWarnings = true; } if (s_errorCode.dangerous()) { std::cerr << warnMore() << "*** See the manual before disabling this,\n"; @@ -248,7 +256,7 @@ void V3Error::v3errorEnd(std::ostringstream& sstr, const string& locationStr) { s_tellManual = 2; } } - if (isError(s_errorCode, s_errorSuppressed)) { + if (anError) { incErrors(); } else { incWarnings(); @@ -276,7 +284,7 @@ void V3Error::v3errorEnd(std::ostringstream& sstr, const string& locationStr) { } vlAbortOrExit(); - } else if (isError(s_errorCode, s_errorSuppressed)) { + } else if (anError) { // We don't dump tree on any error because a Visitor may be in middle of // a tree cleanup and cause a false broken problem. if (s_errorExitCb) s_errorExitCb(); diff --git a/src/V3Error.h b/src/V3Error.h index a312fe6e9..eb1cff471 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -44,6 +44,7 @@ public: EC_FATALEXIT, // Kill the program, suppress with --quiet-exit EC_FATALSRC, // Kill the program, for internal source errors EC_ERROR, // General error out, can't suppress + EC_FIRST_NAMED, // Just a code so the program knows where to start info/errors // Boolean information we track per-line, but aren't errors I_CELLDEFINE, // Inside cell define from `celldefine/`endcelldefine I_COVERAGE, // Coverage is on/off from /*verilator coverage_on/off*/ @@ -151,7 +152,7 @@ public: // clang-format off static const char* const names[] = { // Leading spaces indicate it can't be disabled. - " MIN", " INFO", " FATAL", " FATALEXIT", " FATALSRC", " ERROR", + " MIN", " INFO", " FATAL", " FATALEXIT", " FATALSRC", " ERROR", " FIRST_NAMED", // Boolean " I_CELLDEFINE", " I_COVERAGE", " I_TRACING", " I_LINT", " I_DEF_NETTYPE_WIRE", // Errors @@ -235,6 +236,7 @@ class V3Error final { private: static bool s_describedWarnings; // Told user how to disable warns + static bool s_describedWeb; // Told user to see web static std::array s_describedEachWarn; // Told user specifics about this warning static std::array diff --git a/src/config_build.h.in b/src/config_build.h.in index 62ca75a08..a6808d09b 100644 --- a/src/config_build.h.in +++ b/src/config_build.h.in @@ -22,6 +22,8 @@ // Autoconf substitutes this with the strings from AC_INIT. #define PACKAGE_STRING "" +#define PACKAGE_VERSION_NUMBER_STRING "0.000" + #define DTVERSION PACKAGE_STRING //********************************************************************** diff --git a/test_regress/t/t_alias2_unsup.out b/test_regress/t/t_alias2_unsup.out index f3414eed9..5b408a195 100644 --- a/test_regress/t/t_alias2_unsup.out +++ b/test_regress/t/t_alias2_unsup.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_alias2_unsup.v:39:4: Unsupported: alias statements 39 | alias b = {a[3:0],a[7:4]}; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_alias_unsup.out b/test_regress/t/t_alias_unsup.out index c43253fa9..617b2d923 100644 --- a/test_regress/t/t_alias_unsup.out +++ b/test_regress/t/t_alias_unsup.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_alias_unsup.v:46:4: Unsupported: alias statements 46 | alias {a[7:0],a[15:8],a[23:16],a[31:24]} = b; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_array_list_bad.out b/test_regress/t/t_array_list_bad.out index 45f539258..ded2a3c8f 100644 --- a/test_regress/t/t_array_list_bad.out +++ b/test_regress/t/t_array_list_bad.out @@ -6,5 +6,6 @@ : ... In instance t 38 | test_out <= '{'0, '0}; | ^~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_assert_comp_bad.out b/test_regress/t/t_assert_comp_bad.out index 5cf3179a8..dddd9af67 100644 --- a/test_regress/t/t_assert_comp_bad.out +++ b/test_regress/t/t_assert_comp_bad.out @@ -10,6 +10,7 @@ : ... In instance t 12 | $warning; | ^~~~~~~~ + ... For warning description see https://verilator.org/warn/USERWARN?v=4.201 ... Use "/* verilator lint_off USERWARN */" and lint_on around source to disable this message. %Warning-USERWARN: t/t_assert_comp_bad.v:13:7: User elaboration-time warning : ... In instance t diff --git a/test_regress/t/t_assoc_wildcard_unsup.out b/test_regress/t/t_assoc_wildcard_unsup.out index 7d4edc557..5939b8009 100644 --- a/test_regress/t/t_assoc_wildcard_unsup.out +++ b/test_regress/t/t_assoc_wildcard_unsup.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_assoc_wildcard_unsup.v:25:19: Unsupported: [*] wildcard associative arrays 25 | string a [*]; | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_case_x_bad.out b/test_regress/t/t_case_x_bad.out index db1e485fa..7647e1bd8 100644 --- a/test_regress/t/t_case_x_bad.out +++ b/test_regress/t/t_case_x_bad.out @@ -1,6 +1,7 @@ %Warning-CASEX: t/t_case_x_bad.v:14:7: Suggest casez (with ?'s) in place of casex (with X's) 14 | casex (value) | ^~~~~ + ... For warning description see https://verilator.org/warn/CASEX?v=4.201 ... Use "/* verilator lint_off CASEX */" and lint_on around source to disable this message. %Warning-CASEWITHX: t/t_case_x_bad.v:19:9: Use of x/? constant in case statement, (perhaps intended casex/casez) 19 | 4'b1xxx: $stop; diff --git a/test_regress/t/t_case_zx_bad.out b/test_regress/t/t_case_zx_bad.out index ca591019c..77bae7948 100644 --- a/test_regress/t/t_case_zx_bad.out +++ b/test_regress/t/t_case_zx_bad.out @@ -1,5 +1,6 @@ %Warning-CASEWITHX: t/t_case_zx_bad.v:16:9: Use of x constant in casez statement, (perhaps intended ?/z in constant) 16 | 4'b1xxx: $stop; | ^~~~~~~ + ... For warning description see https://verilator.org/warn/CASEWITHX?v=4.201 ... Use "/* verilator lint_off CASEWITHX */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_castdyn_castconst_bad.out b/test_regress/t/t_castdyn_castconst_bad.out index cb8251c49..eb69bf69a 100644 --- a/test_regress/t/t_castdyn_castconst_bad.out +++ b/test_regress/t/t_castdyn_castconst_bad.out @@ -3,6 +3,7 @@ : ... Suggest static cast 20 | i = $cast(v, 1); | ^~~~~ + ... For warning description see https://verilator.org/warn/CASTCONST?v=4.201 ... Use "/* verilator lint_off CASTCONST */" and lint_on around source to disable this message. %Warning-CASTCONST: t/t_castdyn_castconst_bad.v:21:11: $cast will always return one as 'CLASSREFDTYPE 'Base'' is always castable from 'CLASSREFDTYPE 'Base'' : ... In instance t diff --git a/test_regress/t/t_castdyn_unsup_bad.out b/test_regress/t/t_castdyn_unsup_bad.out index bb045d2d7..6fc6e0993 100644 --- a/test_regress/t/t_castdyn_unsup_bad.out +++ b/test_regress/t/t_castdyn_unsup_bad.out @@ -3,4 +3,5 @@ : ... Suggest try static cast 13 | $cast(q, aarray); | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_cdc_async_bad.out b/test_regress/t/t_cdc_async_bad.out index 030217948..29b887c6d 100644 --- a/test_regress/t/t_cdc_async_bad.out +++ b/test_regress/t/t_cdc_async_bad.out @@ -1,6 +1,7 @@ %Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:28:21: Logic in path that feeds async reset, via signal: 't.rst2_bad_n' 28 | wire rst2_bad_n = rst0_n | rst1_n; | ^ + ... For warning description see https://verilator.org/warn/CDCRSTLOGIC?v=4.201 ... Use "/* verilator lint_off CDCRSTLOGIC */" and lint_on around source to disable this message. %Warning-CDCRSTLOGIC: See details in obj_vlt/t_cdc_async_bad/Vt_cdc_async_bad__cdc.txt %Warning-CDCRSTLOGIC: t/t_cdc_async_bad.v:53:21: Logic in path that feeds async reset, via signal: 't.rst6a_bad_n' diff --git a/test_regress/t/t_class_class.out b/test_regress/t/t_class_class.out index 0ea383361..52e4f1a5a 100644 --- a/test_regress/t/t_class_class.out +++ b/test_regress/t/t_class_class.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_class_class.v:12:4: Unsupported: class within class 12 | class SubCls; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_class_extends_bad.out b/test_regress/t/t_class_extends_bad.out index b382ead9d..ddb6fa925 100644 --- a/test_regress/t/t_class_extends_bad.out +++ b/test_regress/t/t_class_extends_bad.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_class_extends_bad.v:13:26: Multiple inheritance illegal on non-interface classes (IEEE 1800-2017 8.13), and unsupported for interface classes. 13 | class Cls extends Base1, Base2; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_class_local_bad.out b/test_regress/t/t_class_local_bad.out index 102a251d1..3e302dcb6 100644 --- a/test_regress/t/t_class_local_bad.out +++ b/test_regress/t/t_class_local_bad.out @@ -5,6 +5,7 @@ t/t_class_local_bad.v:71:20: ... Location of definition 15 | local int m_loc = 2; | ^~~~~ + ... For error description see https://verilator.org/warn/ENCAPSULATED?v=4.201 %Error-ENCAPSULATED: t/t_class_local_bad.v:72:20: 'm_prot' is hidden as 'protected' within this context (IEEE 1800-2017 8.18) : ... In instance t 72 | bad(); if (c.m_prot != 20) $stop; diff --git a/test_regress/t/t_class_member_bad.out b/test_regress/t/t_class_member_bad.out index ef2eaedc8..9d42c83c6 100644 --- a/test_regress/t/t_class_member_bad.out +++ b/test_regress/t/t_class_member_bad.out @@ -7,5 +7,6 @@ : ... In instance t 18 | c.memb3 = 3; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_class_param.out b/test_regress/t/t_class_param.out index 1a041787c..9d6a6a7aa 100644 --- a/test_regress/t/t_class_param.out +++ b/test_regress/t/t_class_param.out @@ -2,6 +2,7 @@ : ... In instance t 9 | class Cls #(parameter P = 12); | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_class_param.v:20:11: Unsupported: parameterized classes : ... In instance t 20 | Cls #(.P(4)) c4; diff --git a/test_regress/t/t_class_param_bad.out b/test_regress/t/t_class_param_bad.out index 83375ea19..5b964ef07 100644 --- a/test_regress/t/t_class_param_bad.out +++ b/test_regress/t/t_class_param_bad.out @@ -2,6 +2,7 @@ : ... Suggested alternative: 'PARAMB' 12 | Cls #(.PARAMBAD(1)) c; | ^~~~~~~~ + ... For error description see https://verilator.org/warn/PINNOTFOUND?v=4.201 %Error-PINNOTFOUND: t/t_class_param_bad.v:13:14: Parameter pin not found: '__paramNumber2' 13 | Cls #(13, 1) cd; | ^ diff --git a/test_regress/t/t_class_static.out b/test_regress/t/t_class_static.out index 678029a0e..acf6927d0 100644 --- a/test_regress/t/t_class_static.out +++ b/test_regress/t/t_class_static.out @@ -2,6 +2,7 @@ : ... In instance t 12 | static int c_st = 2; | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_class_static.v:25:18: Unsupported: 'static' function/task variables : ... In instance t 25 | static int st = 2; st++; return st; diff --git a/test_regress/t/t_class_static_order.out b/test_regress/t/t_class_static_order.out index 9565f5068..c11fb5441 100644 --- a/test_regress/t/t_class_static_order.out +++ b/test_regress/t/t_class_static_order.out @@ -2,6 +2,7 @@ : ... In instance t 23 | static ClsZ z = new; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_class_static_order.v:34:16: Unsupported: 'static' class members : ... In instance t 34 | static ClsA a = new; diff --git a/test_regress/t/t_class_unsup_bad.out b/test_regress/t/t_class_unsup_bad.out index f5260c57b..2f41c590f 100644 --- a/test_regress/t/t_class_unsup_bad.out +++ b/test_regress/t/t_class_unsup_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_class_unsup_bad.v:7:1: Unsupported: virtual interface 7 | virtual interface vi_t vi; | ^~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_class_unsup_bad.v:8:1: Unsupported: virtual data type 8 | virtual vi_t vi2; | ^~~~~~~ diff --git a/test_regress/t/t_class_vparam.out b/test_regress/t/t_class_vparam.out index 798dea2ca..02394f30e 100644 --- a/test_regress/t/t_class_vparam.out +++ b/test_regress/t/t_class_vparam.out @@ -2,6 +2,7 @@ : ... In instance t 11 | typedef paramed_class_t#(real, 1) paramed_class_double_t; | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_class_vparam.v:13:56: Unsupported: class parameters : ... In instance t 13 | virtual class vclass #(type CTYPE_t = arg_class_t, int I = 0); diff --git a/test_regress/t/t_clk_first_bad.out b/test_regress/t/t_clk_first_bad.out index d12bc84d9..5245ee96d 100644 --- a/test_regress/t/t_clk_first_bad.out +++ b/test_regress/t/t_clk_first_bad.out @@ -1,5 +1,6 @@ %Warning-DEPRECATED: t/t_clk_first_deprecated.v:12:14: sc_clock is ignored 12 | input clk /*verilator sc_clock*/ ; | ^~~~~~~~~~~~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/DEPRECATED?v=4.201 ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_clk_scope_bad.out b/test_regress/t/t_clk_scope_bad.out index bec10941c..cae7ba966 100644 --- a/test_regress/t/t_clk_scope_bad.out +++ b/test_regress/t/t_clk_scope_bad.out @@ -2,5 +2,6 @@ : ... In instance t.p2 36 | q <= d; | ^ + ... For warning description see https://verilator.org/warn/CLKDATA?v=4.201 ... Use "/* verilator lint_off CLKDATA */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_clocker_bad.out b/test_regress/t/t_clocker_bad.out index eb3477c3c..ec0b9542f 100644 --- a/test_regress/t/t_clocker_bad.out +++ b/test_regress/t/t_clocker_bad.out @@ -1,6 +1,7 @@ %Warning-CLKDATA: t/t_clocker.v:45:17: Clock is assigned to part of data signal 'res8' 45 | assign res8 = {clk_3, 1'b0, clk_4}; | ^ + ... For warning description see https://verilator.org/warn/CLKDATA?v=4.201 ... Use "/* verilator lint_off CLKDATA */" and lint_on around source to disable this message. %Warning-CLKDATA: t/t_clocker.v:46:17: Clock is assigned to part of data signal 'res16' 46 | assign res16 = {count, clk_3, clk_1, clk_4}; diff --git a/test_regress/t/t_concat_large_bad.out b/test_regress/t/t_concat_large_bad.out index a4afc3552..c692aa033 100644 --- a/test_regress/t/t_concat_large_bad.out +++ b/test_regress/t/t_concat_large_bad.out @@ -2,5 +2,6 @@ : ... In instance t 9 | wire [32767:0] a = {32768{1'b1}}; | ^ + ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201 ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_concat_link_bad.out b/test_regress/t/t_concat_link_bad.out index 6760aa004..3af888452 100644 --- a/test_regress/t/t_concat_link_bad.out +++ b/test_regress/t/t_concat_link_bad.out @@ -10,5 +10,6 @@ %Warning-IMPLICIT: t/t_concat_link_bad.v:13:12: Signal definition not found, creating implicitly: 'bar_s' 13 | assign bar_s = {foo_s, foo_s}.f1; | ^~~~~ + ... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201 ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_const_bad.out b/test_regress/t/t_const_bad.out index 6594d207b..ece6e4628 100644 --- a/test_regress/t/t_const_bad.out +++ b/test_regress/t/t_const_bad.out @@ -2,6 +2,7 @@ : ... In instance t 13 | if (68'hx_xxxxxxxx_xxxxxxxx !== 'dX) $stop; | ^~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_const_bad.v:14:39: Unsized constant being X/Z extended to 68 bits: ?32?bzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz : ... In instance t diff --git a/test_regress/t/t_delay_stmtdly_bad.out b/test_regress/t/t_delay_stmtdly_bad.out index a5beee6c4..1d0bb8faa 100644 --- a/test_regress/t/t_delay_stmtdly_bad.out +++ b/test_regress/t/t_delay_stmtdly_bad.out @@ -1,6 +1,7 @@ %Warning-ASSIGNDLY: t/t_delay.v:22:13: Unsupported: Ignoring delay on this assignment/primitive. 22 | assign #(1.2000000000000000) dly1 = dly0 + 32'h1; | ^~~~~~~~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/ASSIGNDLY?v=4.201 ... Use "/* verilator lint_off ASSIGNDLY */" and lint_on around source to disable this message. %Warning-ASSIGNDLY: t/t_delay.v:27:19: Unsupported: Ignoring delay on this assignment/primitive. 27 | dly0 <= #0 32'h11; diff --git a/test_regress/t/t_dpi_unpack_bad.out b/test_regress/t/t_dpi_unpack_bad.out index 735465cf0..fdb556ff2 100644 --- a/test_regress/t/t_dpi_unpack_bad.out +++ b/test_regress/t/t_dpi_unpack_bad.out @@ -2,6 +2,7 @@ : ... In instance t 21 | import_func0(sig0); | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Warning-WIDTH: t/t_dpi_unpack_bad.v:21:7: Operator TASKREF 'import_func0' expects 4 bits on the Function Argument, but Function Argument's VARREF 'sig0' generates 3 bits. : ... In instance t 21 | import_func0(sig0); diff --git a/test_regress/t/t_dynarray_bad.out b/test_regress/t/t_dynarray_bad.out index ad5729bd3..ba0ea8ceb 100644 --- a/test_regress/t/t_dynarray_bad.out +++ b/test_regress/t/t_dynarray_bad.out @@ -2,6 +2,7 @@ : ... In instance t 15 | a = new [s]; | ^~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Internal Error: t/t_dynarray_bad.v:15:16: ../V3Number.cpp:#: Number operation called with non-logic (double or string) argument: '"str"" 15 | a = new [s]; diff --git a/test_regress/t/t_enum_bad_hide.out b/test_regress/t/t_enum_bad_hide.out index 27ce71294..c1fd3b364 100644 --- a/test_regress/t/t_enum_bad_hide.out +++ b/test_regress/t/t_enum_bad_hide.out @@ -4,5 +4,6 @@ t/t_enum_bad_hide.v:7:16: ... Location of original declaration 11 | typedef enum { HIDE_VALUE = 0 } hide_enum_t; | ^~~~~~~~~~ + ... For warning description see https://verilator.org/warn/VARHIDDEN?v=4.201 ... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_event_control_unsup.out b/test_regress/t/t_event_control_unsup.out index 03d17ac22..a3fbe9c7a 100644 --- a/test_regress/t/t_event_control_unsup.out +++ b/test_regress/t/t_event_control_unsup.out @@ -3,6 +3,7 @@ : ... Suggest have one timing control statement per procedure, at the top of the procedure 14 | @(clk); | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_event_control_unsup.v:16:7: Unsupported: timing control statement in this location : ... In instance t : ... Suggest have one timing control statement per procedure, at the top of the procedure diff --git a/test_regress/t/t_event_copy.out b/test_regress/t/t_event_copy.out index 3e54190e6..75578639b 100644 --- a/test_regress/t/t_event_copy.out +++ b/test_regress/t/t_event_copy.out @@ -2,6 +2,7 @@ : ... In instance t 100 | e4 = e3; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_event_copy.v:101:13: Unsupported: assignment of event data type : ... In instance t 101 | e3 = e2; diff --git a/test_regress/t/t_flag_context_bad.out b/test_regress/t/t_flag_context_bad.out index 2fb7fe3ad..118128d94 100644 --- a/test_regress/t/t_flag_context_bad.out +++ b/test_regress/t/t_flag_context_bad.out @@ -1,5 +1,6 @@ %Warning-WIDTH: t/t_flag_context_bad.v:9:19: Operator ASSIGNW expects 3 bits on the Assign RHS, but Assign RHS's CONST '5'h1f' generates 5 bits. : ... In instance t + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-UNUSED: t/t_flag_context_bad.v:9:15: Signal is not used: 'foo' : ... In instance t diff --git a/test_regress/t/t_flag_main_sc_bad.out b/test_regress/t/t_flag_main_sc_bad.out index 13ba2e390..b4d2bbc94 100644 --- a/test_regress/t/t_flag_main_sc_bad.out +++ b/test_regress/t/t_flag_main_sc_bad.out @@ -1,2 +1,3 @@ %Error-UNSUPPORTED: --main not usable with SystemC. Suggest see examples for sc_main(). + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_flag_topmodule_bad.out b/test_regress/t/t_flag_topmodule_bad.out index 181364e4b..0f3d497dd 100644 --- a/test_regress/t/t_flag_topmodule_bad.out +++ b/test_regress/t/t_flag_topmodule_bad.out @@ -1,5 +1,6 @@ %Warning-MULTITOP: t/t_flag_topmodule.v:15:8: Multiple top level modules : ... Suggest see manual; fix the duplicates, or use --top-module to select top. + ... For warning description see https://verilator.org/warn/MULTITOP?v=4.201 ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message. : ... Top module 'a' 7 | module a; diff --git a/test_regress/t/t_flag_werror_bad1.out b/test_regress/t/t_flag_werror_bad1.out index 389d69336..0d65fde0a 100644 --- a/test_regress/t/t_flag_werror_bad1.out +++ b/test_regress/t/t_flag_werror_bad1.out @@ -2,5 +2,6 @@ : ... In instance t 10 | wire [3:0] foo = 6'h2e; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_flag_werror_bad2.out b/test_regress/t/t_flag_werror_bad2.out index 9bf134b8b..ae9811417 100644 --- a/test_regress/t/t_flag_werror_bad2.out +++ b/test_regress/t/t_flag_werror_bad2.out @@ -2,4 +2,5 @@ : ... In instance t 10 | wire [3:0] foo = 6'h2e; | ^ + ... For error description see https://verilator.org/warn/WIDTH?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_flag_wfatal.out b/test_regress/t/t_flag_wfatal.out index 78410d838..19da7e11a 100644 --- a/test_regress/t/t_flag_wfatal.out +++ b/test_regress/t/t_flag_wfatal.out @@ -2,4 +2,5 @@ : ... In instance t 10 | wire [3:0] foo = 6'h2e; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. diff --git a/test_regress/t/t_for_comma_bad.out b/test_regress/t/t_for_comma_bad.out index 6b5a4f416..f09139918 100644 --- a/test_regress/t/t_for_comma_bad.out +++ b/test_regress/t/t_for_comma_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_for_comma_bad.v:27:23: Unsupported: for loop initialization after the first comma 27 | for (integer a=0, integer b=0; a<1; ) ; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_for_comma_bad.v:28:23: Unsupported: for loop initialization after the first comma 28 | for (integer a=0, integer b=0; a<1; a=a+1) ; | ^ diff --git a/test_regress/t/t_fork.out b/test_regress/t/t_fork.out index 03e479d9f..6ecddc01a 100644 --- a/test_regress/t/t_fork.out +++ b/test_regress/t/t_fork.out @@ -2,4 +2,5 @@ : ... In instance t 10 | fork : fblk | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_fork_disable.out b/test_regress/t/t_fork_disable.out index 20a700eb3..1e9b60a94 100644 --- a/test_regress/t/t_fork_disable.out +++ b/test_regress/t/t_fork_disable.out @@ -2,6 +2,7 @@ : ... In instance t 12 | fork | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_fork_disable.v:16:7: Unsupported: disable fork statements : ... In instance t 16 | disable fork; diff --git a/test_regress/t/t_func_bad.out b/test_regress/t/t_func_bad.out index 68a2e95ab..bf3079498 100644 --- a/test_regress/t/t_func_bad.out +++ b/test_regress/t/t_func_bad.out @@ -14,6 +14,7 @@ : ... In instance t 11 | x; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_func_bad.v:14:17: No such argument 'no_such' in function call to FUNC 'f' : ... In instance t 14 | f(.j(1), .no_such(2)); diff --git a/test_regress/t/t_func_bad2.out b/test_regress/t/t_func_bad2.out index 0666509d5..45ebfd990 100644 --- a/test_regress/t/t_func_bad2.out +++ b/test_regress/t/t_func_bad2.out @@ -2,4 +2,5 @@ : ... In instance t 8 | function recurse; | ^~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_func_bad_width.out b/test_regress/t/t_func_bad_width.out index 8948c688a..257dd5a85 100644 --- a/test_regress/t/t_func_bad_width.out +++ b/test_regress/t/t_func_bad_width.out @@ -2,6 +2,7 @@ : ... In instance t 13 | out = MUX (in); | ^~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_func_bad_width.v:13:11: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's FUNCREF 'MUX' generates 32 bits. : ... In instance t diff --git a/test_regress/t/t_func_const2_bad.out b/test_regress/t/t_func_const2_bad.out index 8efe45a6e..551d44cd7 100644 --- a/test_regress/t/t_func_const2_bad.out +++ b/test_regress/t/t_func_const2_bad.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "f_add = 15" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const2_bad.v:22:23: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2' : ... In instance t.b8_a7.c9 diff --git a/test_regress/t/t_func_const3_bad.out b/test_regress/t/t_func_const3_bad.out index 02585e023..6c9c15118 100644 --- a/test_regress/t/t_func_const3_bad.out +++ b/test_regress/t/t_func_const3_bad.out @@ -2,5 +2,6 @@ : ... In instance t.b9k.c9 12 | localparam SOMEP = {BITS{1'b0}}; | ^ + ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201 ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_func_const_bad.out b/test_regress/t/t_func_const_bad.out index 9871a8a45..7ce99926e 100644 --- a/test_regress/t/t_func_const_bad.out +++ b/test_regress/t/t_func_const_bad.out @@ -35,6 +35,7 @@ -Info: "Printing in loop: 1" -Info: "Printing in loop: 2" %Warning-USERFATAL: "Fatal Error" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const_bad.v:50:24: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_bad_fatal' : ... In instance t diff --git a/test_regress/t/t_func_const_packed_array_bad.out b/test_regress/t/t_func_const_packed_array_bad.out index 25a3580a6..b8f7bd61c 100644 --- a/test_regress/t/t_func_const_packed_array_bad.out +++ b/test_regress/t/t_func_const_packed_array_bad.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "f_add = 15" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const_packed_array_bad.v:12:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2' : ... In instance t diff --git a/test_regress/t/t_func_const_packed_struct_bad.out b/test_regress/t/t_func_const_packed_struct_bad.out index 48e0f996f..ebfcf4d4f 100644 --- a/test_regress/t/t_func_const_packed_struct_bad.out +++ b/test_regress/t/t_func_const_packed_struct_bad.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "f_add = 15" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const_packed_struct_bad.v:14:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2' : ... In instance t diff --git a/test_regress/t/t_func_const_packed_struct_bad2.out b/test_regress/t/t_func_const_packed_struct_bad2.out index 7e6d1dcb6..27f87fb17 100644 --- a/test_regress/t/t_func_const_packed_struct_bad2.out +++ b/test_regress/t/t_func_const_packed_struct_bad2.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "f_add = 15" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const_packed_struct_bad2.v:20:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2' : ... In instance t diff --git a/test_regress/t/t_func_const_struct_bad.out b/test_regress/t/t_func_const_struct_bad.out index 804a7d608..00d82b32d 100644 --- a/test_regress/t/t_func_const_struct_bad.out +++ b/test_regress/t/t_func_const_struct_bad.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "f_add = 15" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_func_const_struct_bad.v:17:21: Expecting expression to be constant, but can't determine constant for FUNCREF 'f_add2' : ... In instance t diff --git a/test_regress/t/t_func_impure_bad.out b/test_regress/t/t_func_impure_bad.out index 17a896993..9fb2a10f0 100644 --- a/test_regress/t/t_func_impure_bad.out +++ b/test_regress/t/t_func_impure_bad.out @@ -4,4 +4,5 @@ t/t_func_impure_bad.v:13:7: ... Location of the external reference: 't.sig' 13 | sig = '1; | ^~~ + ... For error description see https://verilator.org/warn/IMPURE?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_func_tasknsvar_bad.out b/test_regress/t/t_func_tasknsvar_bad.out index d7bb3f57c..ffcd633c9 100644 --- a/test_regress/t/t_func_tasknsvar_bad.out +++ b/test_regress/t/t_func_tasknsvar_bad.out @@ -1,6 +1,7 @@ %Error-TASKNSVAR: t/t_func_tasknsvar_bad.v:16:29: Unsupported: Function/task input argument is not simple variable 16 | foo(bus_we_select_from[2]); | ^ + ... For error description see https://verilator.org/warn/TASKNSVAR?v=4.201 %Error: Internal Error: t/t_func_tasknsvar_bad.v:10:7: ../V3Broken.cpp:#: Broken link in node (or something without maybePointedTo): m_varScopep && !m_varScopep->brokeExists() 10 | sig = '1; | ^~~ diff --git a/test_regress/t/t_func_void_bad.out b/test_regress/t/t_func_void_bad.out index 2eaf6b65c..068f830ac 100644 --- a/test_regress/t/t_func_void_bad.out +++ b/test_regress/t/t_func_void_bad.out @@ -1,5 +1,6 @@ %Warning-IGNOREDRETURN: t/t_func_void_bad.v:26:7: Ignoring return value of non-void function (IEEE 1800-2017 13.4.1) 26 | f1(20); | ^~ + ... For warning description see https://verilator.org/warn/IGNOREDRETURN?v=4.201 ... Use "/* verilator lint_off IGNOREDRETURN */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_func_wide_out_bad.out b/test_regress/t/t_func_wide_out_bad.out index 19c2df709..63a6fe26f 100644 --- a/test_regress/t/t_func_wide_out_bad.out +++ b/test_regress/t/t_func_wide_out_bad.out @@ -2,4 +2,5 @@ : ... In instance t 17 | func(msg); | ^~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_fuzz_always_bad.out b/test_regress/t/t_fuzz_always_bad.out index c5691ffd4..d79c7be5c 100644 --- a/test_regress/t/t_fuzz_always_bad.out +++ b/test_regress/t/t_fuzz_always_bad.out @@ -7,4 +7,5 @@ %Error-UNSUPPORTED: t/t_fuzz_always_bad.v:10:14: Unsupported: Complex statement in sensitivity list 10 | always @ c.a c:h; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_fuzz_genintf_bad.out b/test_regress/t/t_fuzz_genintf_bad.out index e9ecf42b4..485e7289b 100644 --- a/test_regress/t/t_fuzz_genintf_bad.out +++ b/test_regress/t/t_fuzz_genintf_bad.out @@ -2,6 +2,7 @@ : ... In instance t 24 | j.e(0), | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Internal Error: t/t_fuzz_genintf_bad.v:24:11: ../V3Width.cpp:#: Unlinked pin data type : ... In instance t 24 | j.e(0), diff --git a/test_regress/t/t_fuzz_triand_bad.out b/test_regress/t/t_fuzz_triand_bad.out index c143c25ba..3343c190b 100644 --- a/test_regress/t/t_fuzz_triand_bad.out +++ b/test_regress/t/t_fuzz_triand_bad.out @@ -2,6 +2,7 @@ : ... In instance t 8 | tri g=g.and.g; | ^~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Internal Error: t/t_fuzz_triand_bad.v:8:12: ../V3Width.cpp:#: Unlinked data type : ... In instance t 8 | tri g=g.and.g; diff --git a/test_regress/t/t_gen_cond_bitrange_bad.out b/test_regress/t/t_gen_cond_bitrange_bad.out index 0c77f2e84..f8856e188 100644 --- a/test_regress/t/t_gen_cond_bitrange_bad.out +++ b/test_regress/t/t_gen_cond_bitrange_bad.out @@ -2,6 +2,7 @@ : ... In instance t.i_test_gen 58 | if ((g < (SIZE + 1)) && MASK[g]) begin | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Warning-SELRANGE: t/t_gen_cond_bitrange_bad.v:70:32: Selection index out of range: 2:2 outside 1:0 : ... In instance t.i_test_gen diff --git a/test_regress/t/t_gen_defparam_unsup_bad.out b/test_regress/t/t_gen_defparam_unsup_bad.out index c876f67af..c6af09329 100644 --- a/test_regress/t/t_gen_defparam_unsup_bad.out +++ b/test_regress/t/t_gen_defparam_unsup_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_gen_defparam_unsup_bad.v:9:16: Unsupported: defparam with more than one dot 9 | defparam a.b.W = 3; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_gen_defparam_unsup_bad.v:9:17: syntax error, unexpected IDENTIFIER, expecting ',' or ';' 9 | defparam a.b.W = 3; | ^ diff --git a/test_regress/t/t_generate_fatal_bad.out b/test_regress/t/t_generate_fatal_bad.out index c23052748..f35ff52e7 100644 --- a/test_regress/t/t_generate_fatal_bad.out +++ b/test_regress/t/t_generate_fatal_bad.out @@ -1,4 +1,5 @@ %Warning-USERFATAL: "boom" + ... For warning description see https://verilator.org/warn/USERFATAL?v=4.201 ... Use "/* verilator lint_off USERFATAL */" and lint_on around source to disable this message. %Error: t/t_generate_fatal_bad.v:13:29: Expecting expression to be constant, but can't determine constant for FUNCREF 'get_baz' : ... In instance t.nested_loop[10].foo2_inst.foo2_loop[1].foo_in_foo2_inst diff --git a/test_regress/t/t_hier_block1_bad.out b/test_regress/t/t_hier_block1_bad.out index ba3f864b1..beffcd4ec 100644 --- a/test_regress/t/t_hier_block1_bad.out +++ b/test_regress/t/t_hier_block1_bad.out @@ -3,6 +3,7 @@ ... Suggest remove verilator hier_block on this module 15 | module t ( | ^ + ... For warning description see https://verilator.org/warn/HIERBLOCK?v=4.201 ... Use "/* verilator lint_off HIERBLOCK */" and lint_on around source to disable this message. %Error: t/t_hier_block1_bad.v:44:32: Modport cannot be used at the hierarchical block boundary : ... In instance t.i_sub1 diff --git a/test_regress/t/t_hierarchy_identifier_bad.out b/test_regress/t/t_hierarchy_identifier_bad.out index 35817198e..3a82d7ef6 100644 --- a/test_regress/t/t_hierarchy_identifier_bad.out +++ b/test_regress/t/t_hierarchy_identifier_bad.out @@ -1,6 +1,7 @@ %Warning-ENDLABEL: t/t_hierarchy_identifier_bad.v:34:10: End label 'if_cnt_finish_bad' does not match begin label 'if_cnt_finish' 34 | end : if_cnt_finish_bad | ^~~~~~~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/ENDLABEL?v=4.201 ... Use "/* verilator lint_off ENDLABEL */" and lint_on around source to disable this message. %Warning-ENDLABEL: t/t_hierarchy_identifier_bad.v:40:10: End label 'generate_for_bad' does not match begin label 'generate_for' 40 | end : generate_for_bad diff --git a/test_regress/t/t_increment_bad.out b/test_regress/t/t_increment_bad.out index 1c07b5c25..41c181a17 100644 --- a/test_regress/t/t_increment_bad.out +++ b/test_regress/t/t_increment_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_increment_bad.v:15:31: Unsupported: Incrementation in this context. 15 | if (0 && test_string[pos++] != "e"); | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_increment_bad.v:16:19: Unsupported: Incrementation in this context. 16 | if (1 || pos-- != 1); | ^~ diff --git a/test_regress/t/t_initial_dlyass_bad.out b/test_regress/t/t_initial_dlyass_bad.out index 315854b57..457395681 100644 --- a/test_regress/t/t_initial_dlyass_bad.out +++ b/test_regress/t/t_initial_dlyass_bad.out @@ -2,6 +2,7 @@ : ... Suggest blocking assignments (=) 18 | a <= 22; | ^~ + ... For warning description see https://verilator.org/warn/INITIALDLY?v=4.201 ... Use "/* verilator lint_off INITIALDLY */" and lint_on around source to disable this message. %Warning-INITIALDLY: t/t_initial_dlyass.v:19:9: Delayed assignments (<=) in initial or final block : ... Suggest blocking assignments (=) diff --git a/test_regress/t/t_inst_missing_bad.out b/test_regress/t/t_inst_missing_bad.out index 38937a462..9bcc8c3a3 100644 --- a/test_regress/t/t_inst_missing_bad.out +++ b/test_regress/t/t_inst_missing_bad.out @@ -1,6 +1,7 @@ %Warning-PINNOCONNECT: t/t_inst_missing_bad.v:9:22: Cell pin is not connected: '__pinNumber2' 9 | sub sub (.ok(ok), , .nc()); | ^ + ... For warning description see https://verilator.org/warn/PINNOCONNECT?v=4.201 ... Use "/* verilator lint_off PINNOCONNECT */" and lint_on around source to disable this message. %Warning-PINCONNECTEMPTY: t/t_inst_missing_bad.v:9:25: Cell pin connected by name with empty reference: 'nc' 9 | sub sub (.ok(ok), , .nc()); diff --git a/test_regress/t/t_inst_overwide_bad.out b/test_regress/t/t_inst_overwide_bad.out index ba813dbf5..1faa3842d 100644 --- a/test_regress/t/t_inst_overwide_bad.out +++ b/test_regress/t/t_inst_overwide_bad.out @@ -2,6 +2,7 @@ : ... In instance t 23 | .outy_w92 (outc_w30), | ^~~~~~~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_inst_overwide.v:24:14: Output port connection 'outz_w22' expects 22 bits on the pin connection, but pin connection's VARREF 'outd_w73' generates 73 bits. : ... In instance t diff --git a/test_regress/t/t_inst_pin_realnreal.out b/test_regress/t/t_inst_pin_realnreal.out index 34eade000..81ab9079e 100755 --- a/test_regress/t/t_inst_pin_realnreal.out +++ b/test_regress/t/t_inst_pin_realnreal.out @@ -2,4 +2,5 @@ : ... In instance t.netlist 51 | pga_model pga0(.in, .gain, .out(pga_out)); | ^~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_inst_recurse2_bad.out b/test_regress/t/t_inst_recurse2_bad.out index dbd22cb94..56c231a8e 100644 --- a/test_regress/t/t_inst_recurse2_bad.out +++ b/test_regress/t/t_inst_recurse2_bad.out @@ -2,4 +2,5 @@ : ... In instance t.looped.looped 18 | module looped ( ); | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_inst_recurse_bad.out b/test_regress/t/t_inst_recurse_bad.out index 68085b345..71d014671 100644 --- a/test_regress/t/t_inst_recurse_bad.out +++ b/test_regress/t/t_inst_recurse_bad.out @@ -2,4 +2,5 @@ ... note: self-recursion (module instantiating itself directly) is supported. 18 | module looped ( ); | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_interface_array_nocolon_bad.out b/test_regress/t/t_interface_array_nocolon_bad.out index 546031d0c..e20652d3d 100644 --- a/test_regress/t/t_interface_array_nocolon_bad.out +++ b/test_regress/t/t_interface_array_nocolon_bad.out @@ -2,6 +2,7 @@ : ... In instance t 26 | foo_intf foos [N] (.x(X)); | ^ + ... For warning description see https://verilator.org/warn/LITENDIAN?v=4.201 ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message. %Warning-LITENDIAN: t/t_interface_array_nocolon_bad.v:27:28: Little endian instance range connecting to vector: left < right of instance range: [1:3] : ... In instance t diff --git a/test_regress/t/t_interface_top_bad.out b/test_regress/t/t_interface_top_bad.out index 9ff12283c..198d9832b 100644 --- a/test_regress/t/t_interface_top_bad.out +++ b/test_regress/t/t_interface_top_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_interface_top_bad.v:17:19: Unsupported: Interfaced port on top level module 17 | ifc.counter_mp c_data | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_interface_top_bad.v:17:4: Parent instance's interface is not found: 'ifc' 17 | ifc.counter_mp c_data | ^~~ diff --git a/test_regress/t/t_interface_typedef.out b/test_regress/t/t_interface_typedef.out index 73fe2430f..7780462e8 100644 --- a/test_regress/t/t_interface_typedef.out +++ b/test_regress/t/t_interface_typedef.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_interface_typedef.v:46:4: Unsupported: SystemVerilog 2005 typedef in this context 46 | typedef ifc_if.struct_t struct_t; | ^~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_interface_typedef.v:51:16: syntax error, unexpected IDENTIFIER 51 | struct_t substruct; | ^~~~~~~~~ diff --git a/test_regress/t/t_lint_always_comb_bad.out b/test_regress/t/t_lint_always_comb_bad.out index 7f198d9e9..190e629fa 100644 --- a/test_regress/t/t_lint_always_comb_bad.out +++ b/test_regress/t/t_lint_always_comb_bad.out @@ -2,6 +2,7 @@ : ... In instance t 29 | temp1 = 'h0; | ^~~~~ + ... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201 %Error-PROCASSWIRE: t/t_lint_always_comb_bad.v:31:9: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'temp1' : ... In instance t 31 | temp1 = (temp1_d1r - 'h1); diff --git a/test_regress/t/t_lint_blksync_bad.out b/test_regress/t/t_lint_blksync_bad.out index 3a5104638..ec1d772e9 100644 --- a/test_regress/t/t_lint_blksync_bad.out +++ b/test_regress/t/t_lint_blksync_bad.out @@ -2,6 +2,7 @@ : ... Suggest delayed assignments (<=) 24 | sync_blk = 1'b1; | ^ + ... For warning description see https://verilator.org/warn/BLKSEQ?v=4.201 ... Use "/* verilator lint_off BLKSEQ */" and lint_on around source to disable this message. %Warning-COMBDLY: t/t_lint_blksync_bad.v:31:18: Delayed assignments (<=) in non-clocked (non flop or latch) block : ... Suggest blocking assignments (=) diff --git a/test_regress/t/t_lint_bsspace_bad.out b/test_regress/t/t_lint_bsspace_bad.out index e7d583699..a201e346f 100644 --- a/test_regress/t/t_lint_bsspace_bad.out +++ b/test_regress/t/t_lint_bsspace_bad.out @@ -1,6 +1,7 @@ %Warning-BSSPACE: t/t_lint_bsspace_bad.v:10:21: Backslash followed by whitespace, perhaps the whitespace is accidental? 10 | `define FOO blak \ | ^ + ... For warning description see https://verilator.org/warn/BSSPACE?v=4.201 ... Use "/* verilator lint_off BSSPACE */" and lint_on around source to disable this message. %Error: t/t_lint_bsspace_bad.v:11:4: syntax error, unexpected IDENTIFIER 11 | blak diff --git a/test_regress/t/t_lint_caseincomplete_bad.out b/test_regress/t/t_lint_caseincomplete_bad.out index ab527489b..270deb3b8 100644 --- a/test_regress/t/t_lint_caseincomplete_bad.out +++ b/test_regress/t/t_lint_caseincomplete_bad.out @@ -1,5 +1,6 @@ %Warning-CASEINCOMPLETE: t/t_lint_caseincomplete_bad.v:15:7: Case values incompletely covered (example pattern 0x1) 15 | case (i) | ^~~~ + ... For warning description see https://verilator.org/warn/CASEINCOMPLETE?v=4.201 ... Use "/* verilator lint_off CASEINCOMPLETE */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_cmpconst_bad.out b/test_regress/t/t_lint_cmpconst_bad.out index a2c156ebf..dd681d790 100644 --- a/test_regress/t/t_lint_cmpconst_bad.out +++ b/test_regress/t/t_lint_cmpconst_bad.out @@ -2,5 +2,6 @@ : ... In instance t 13 | if (uns > 3'b111) $stop; | ^ + ... For warning description see https://verilator.org/warn/CMPCONST?v=4.201 ... Use "/* verilator lint_off CMPCONST */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_colonplus_bad.out b/test_regress/t/t_lint_colonplus_bad.out index 745bf6ae6..c9a14f7fe 100644 --- a/test_regress/t/t_lint_colonplus_bad.out +++ b/test_regress/t/t_lint_colonplus_bad.out @@ -1,5 +1,6 @@ %Warning-COLONPLUS: t/t_lint_colonplus_bad.v:13:25: Perhaps instead of ':+' the intent was '+:'? 13 | output [2:1] z = r[2 :+ 1]; | ^~ + ... For warning description see https://verilator.org/warn/COLONPLUS?v=4.201 ... Use "/* verilator lint_off COLONPLUS */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_declfilename_bad.out b/test_regress/t/t_lint_declfilename_bad.out index 9f9a150d7..781bed362 100644 --- a/test_regress/t/t_lint_declfilename_bad.out +++ b/test_regress/t/t_lint_declfilename_bad.out @@ -1,5 +1,6 @@ %Warning-DECLFILENAME: t/t_lint_declfilename.v:7:8: Filename 't_lint_declfilename' does not match MODULE name: 't' 7 | module t; | ^ + ... For warning description see https://verilator.org/warn/DECLFILENAME?v=4.201 ... Use "/* verilator lint_off DECLFILENAME */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_defparam_bad.out b/test_regress/t/t_lint_defparam_bad.out index 15a90af01..92e0c2afe 100644 --- a/test_regress/t/t_lint_defparam_bad.out +++ b/test_regress/t/t_lint_defparam_bad.out @@ -2,5 +2,6 @@ : ... Suggest use instantiation with #(.P(...etc...)) 10 | defparam sub.P = 2; | ^ + ... For warning description see https://verilator.org/warn/DEFPARAM?v=4.201 ... Use "/* verilator lint_off DEFPARAM */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_eofline_bad.out b/test_regress/t/t_lint_eofline_bad.out index ee6a52af0..fb29efe09 100644 --- a/test_regress/t/t_lint_eofline_bad.out +++ b/test_regress/t/t_lint_eofline_bad.out @@ -1,5 +1,6 @@ %Warning-EOFNEWLINE: obj_vlt/t_lint_eofline_bad/t_lint_eofline_bad.v:4:10: Missing newline at end of file (POSIX 3.206). : ... Suggest add newline. 4 | endmodule | ^ + ... For warning description see https://verilator.org/warn/EOFNEWLINE?v=4.201 ... Use "/* verilator lint_off EOFNEWLINE */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_ifdepth_bad.out b/test_regress/t/t_lint_ifdepth_bad.out index 494d7100b..7ebbe3ae0 100644 --- a/test_regress/t/t_lint_ifdepth_bad.out +++ b/test_regress/t/t_lint_ifdepth_bad.out @@ -2,5 +2,6 @@ : ... In instance t 22 | else if (value==11) begin end | ^~ + ... For warning description see https://verilator.org/warn/IFDEPTH?v=4.201 ... Use "/* verilator lint_off IFDEPTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_implicit_bad.out b/test_regress/t/t_lint_implicit_bad.out index 111126806..8b6f56209 100644 --- a/test_regress/t/t_lint_implicit_bad.out +++ b/test_regress/t/t_lint_implicit_bad.out @@ -1,6 +1,7 @@ %Warning-IMPLICIT: t/t_lint_implicit.v:11:11: Signal definition not found, creating implicitly: 'b' 11 | assign b = 1'b1; | ^ + ... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201 ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message. %Warning-IMPLICIT: t/t_lint_implicit.v:13:14: Signal definition not found, creating implicitly: 'nt0' 13 | or OR0 (nt0, a, b); diff --git a/test_regress/t/t_lint_implicit_def_bad.out b/test_regress/t/t_lint_implicit_def_bad.out index c6248d083..db0db28dd 100644 --- a/test_regress/t/t_lint_implicit_def_bad.out +++ b/test_regress/t/t_lint_implicit_def_bad.out @@ -1,6 +1,7 @@ %Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:13:11: Signal definition not found, creating implicitly: 'imp_warn' 13 | assign imp_warn = 1'b1; | ^~~~~~~~ + ... For warning description see https://verilator.org/warn/IMPLICIT?v=4.201 ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message. %Error: t/t_lint_implicit_def_bad.v:18:11: Signal definition not found, and implicit disabled with `default_nettype: 'imp_err' 18 | assign imp_err = 1'b1; diff --git a/test_regress/t/t_lint_import_name2_bad.out b/test_regress/t/t_lint_import_name2_bad.out index 2bcdce56d..dff3c722b 100644 --- a/test_regress/t/t_lint_import_name2_bad.out +++ b/test_regress/t/t_lint_import_name2_bad.out @@ -1,6 +1,7 @@ %Error-PKGNODECL: t/t_lint_import_name2_bad.v:7:8: Package/class 'missing' not found, and needs to be predeclared (IEEE 1800-2017 26.3) 7 | import missing::sigs; | ^~~~~~~ + ... For error description see https://verilator.org/warn/PKGNODECL?v=4.201 %Error: t/t_lint_import_name2_bad.v:7:8: Importing from missing package 'missing' 7 | import missing::sigs; | ^~~~~~~ diff --git a/test_regress/t/t_lint_importstar_bad.out b/test_regress/t/t_lint_importstar_bad.out index 7eaf12bc7..73618c306 100644 --- a/test_regress/t/t_lint_importstar_bad.out +++ b/test_regress/t/t_lint_importstar_bad.out @@ -1,5 +1,6 @@ %Warning-IMPORTSTAR: t/t_lint_importstar_bad.v:11:12: Import::* in $unit scope may pollute global namespace 11 | import defs::*; | ^~ + ... For warning description see https://verilator.org/warn/IMPORTSTAR?v=4.201 ... Use "/* verilator lint_off IMPORTSTAR */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_incabspath_bad.out b/test_regress/t/t_lint_incabspath_bad.out index c90e6372b..34f4f9b1e 100644 --- a/test_regress/t/t_lint_incabspath_bad.out +++ b/test_regress/t/t_lint_incabspath_bad.out @@ -1,5 +1,6 @@ %Warning-INCABSPATH: t/t_lint_incabspath.v:7:10: Suggest `include with absolute path be made relative, and use +include: /dev/null 7 | `include "/dev/null" | ^~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/INCABSPATH?v=4.201 ... Use "/* verilator lint_off INCABSPATH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_infinite.out b/test_regress/t/t_lint_infinite.out index 04de98f39..afbbe8b41 100644 --- a/test_regress/t/t_lint_infinite.out +++ b/test_regress/t/t_lint_infinite.out @@ -2,6 +2,7 @@ : ... In instance t 10 | forever begin end | ^~~~~~~ + ... For warning description see https://verilator.org/warn/INFINITELOOP?v=4.201 ... Use "/* verilator lint_off INFINITELOOP */" and lint_on around source to disable this message. %Warning-INFINITELOOP: t/t_lint_infinite.v:12:7: Infinite loop (condition always true) : ... In instance t diff --git a/test_regress/t/t_lint_input_eq_bad.out b/test_regress/t/t_lint_input_eq_bad.out index f189a6b88..0ed24b966 100644 --- a/test_regress/t/t_lint_input_eq_bad.out +++ b/test_regress/t/t_lint_input_eq_bad.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_lint_input_eq_bad.v:10:15: Unsupported: Default value on module input: 'i2' 10 | input wire i2 = i | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_lint_latch_bad.out b/test_regress/t/t_lint_latch_bad.out index eeeb70548..2cd7ce388 100644 --- a/test_regress/t/t_lint_latch_bad.out +++ b/test_regress/t/t_lint_latch_bad.out @@ -1,6 +1,7 @@ %Warning-NOLATCH: t/t_lint_latch_bad.v:17:4: No latches detected in always_latch block 17 | always_latch begin | ^~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/NOLATCH?v=4.201 ... Use "/* verilator lint_off NOLATCH */" and lint_on around source to disable this message. %Warning-COMBDLY: t/t_lint_latch_bad.v:25:10: Delayed assignments (<=) in non-clocked (non flop or latch) block : ... Suggest blocking assignments (=) diff --git a/test_regress/t/t_lint_latch_bad_2.out b/test_regress/t/t_lint_latch_bad_2.out index ea37dddf6..c909baf38 100644 --- a/test_regress/t/t_lint_latch_bad_2.out +++ b/test_regress/t/t_lint_latch_bad_2.out @@ -2,5 +2,6 @@ : ... Suggest use of always_latch for intentional latches 11 | always @(a or b) | ^~~~~~ + ... For warning description see https://verilator.org/warn/LATCH?v=4.201 ... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_latch_bad_3.out b/test_regress/t/t_lint_latch_bad_3.out index 9b132b899..809fea09a 100644 --- a/test_regress/t/t_lint_latch_bad_3.out +++ b/test_regress/t/t_lint_latch_bad_3.out @@ -2,6 +2,7 @@ : ... Suggest use of always_latch for intentional latches 18 | always @(reset or en or a or b) | ^~~~~~ + ... For warning description see https://verilator.org/warn/LATCH?v=4.201 ... Use "/* verilator lint_off LATCH */" and lint_on around source to disable this message. %Warning-COMBDLY: t/t_lint_latch_bad_3.v:70:12: Delayed assignments (<=) in non-clocked (non flop or latch) block : ... Suggest blocking assignments (=) diff --git a/test_regress/t/t_lint_literal_bad.out b/test_regress/t/t_lint_literal_bad.out index 88f210ea5..077054d07 100644 --- a/test_regress/t/t_lint_literal_bad.out +++ b/test_regress/t/t_lint_literal_bad.out @@ -1,5 +1,6 @@ %Warning-WIDTH: t/t_lint_literal_bad.v:10:33: Value too large for 8 bit number: 256 10 | localparam the_localparam = 8'd256; | ^~~~~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_multidriven_bad.out b/test_regress/t/t_lint_multidriven_bad.out index 5839d7898..019c1db6f 100644 --- a/test_regress/t/t_lint_multidriven_bad.out +++ b/test_regress/t/t_lint_multidriven_bad.out @@ -5,6 +5,7 @@ t/t_lint_multidriven_bad.v:24:7: ... Location of other driving block 24 | mem[a0] <= d0; | ^~~ + ... For warning description see https://verilator.org/warn/MULTIDRIVEN?v=4.201 ... Use "/* verilator lint_off MULTIDRIVEN */" and lint_on around source to disable this message. %Warning-MULTIDRIVEN: t/t_lint_multidriven_bad.v:19:22: Signal has multiple driving blocks with different clocking: 'out2' t/t_lint_multidriven_bad.v:35:7: ... Location of first driving block diff --git a/test_regress/t/t_lint_nolatch_bad.out b/test_regress/t/t_lint_nolatch_bad.out index 2cdc19da9..dd733be55 100644 --- a/test_regress/t/t_lint_nolatch_bad.out +++ b/test_regress/t/t_lint_nolatch_bad.out @@ -1,5 +1,6 @@ %Warning-NOLATCH: t/t_lint_nolatch_bad.v:11:4: No latches detected in always_latch block 11 | always_latch @(a or b) | ^~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/NOLATCH?v=4.201 ... Use "/* verilator lint_off NOLATCH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_nullport.out b/test_regress/t/t_lint_nullport.out index f35a775cd..f784bfd69 100644 --- a/test_regress/t/t_lint_nullport.out +++ b/test_regress/t/t_lint_nullport.out @@ -1,6 +1,7 @@ %Warning-NULLPORT: t/t_lint_nullport.v:23:13: Null port on module (perhaps extraneous comma) 23 | module t5(a,); | ^ + ... For warning description see https://verilator.org/warn/NULLPORT?v=4.201 ... Use "/* verilator lint_off NULLPORT */" and lint_on around source to disable this message. %Warning-NULLPORT: t/t_lint_nullport.v:27:13: Null port on module (perhaps extraneous comma) 27 | module t6(a,,); diff --git a/test_regress/t/t_lint_once_bad.out b/test_regress/t/t_lint_once_bad.out index fd18cfd0d..f2faa4809 100644 --- a/test_regress/t/t_lint_once_bad.out +++ b/test_regress/t/t_lint_once_bad.out @@ -2,6 +2,7 @@ : ... In instance t.sub3 19 | reg [A:0] unus1; reg [A:0] unus2; | ^~~~~ + ... For warning description see https://verilator.org/warn/UNUSED?v=4.201 ... Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message. %Warning-UNUSED: t/t_lint_once_bad.v:19:34: Signal is not driven, nor used: 'unus2' : ... In instance t.sub3 diff --git a/test_regress/t/t_lint_pindup_bad.out b/test_regress/t/t_lint_pindup_bad.out index a34830565..06f37dba0 100644 --- a/test_regress/t/t_lint_pindup_bad.out +++ b/test_regress/t/t_lint_pindup_bad.out @@ -1,6 +1,7 @@ %Warning-PINMISSING: t/t_lint_pindup_bad.v:19:4: Cell has missing pin: 'exists' 19 | sub (.o(o), | ^~~ + ... For warning description see https://verilator.org/warn/PINMISSING?v=4.201 ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message. %Error: t/t_lint_pindup_bad.v:21:10: Duplicate pin connection: 'i' 21 | .i(i2), diff --git a/test_regress/t/t_lint_pinnotfound_bad.out b/test_regress/t/t_lint_pinnotfound_bad.out index e10eaa161..ddab6577d 100644 --- a/test_regress/t/t_lint_pinnotfound_bad.out +++ b/test_regress/t/t_lint_pinnotfound_bad.out @@ -1,6 +1,7 @@ %Error-PINNOTFOUND: t/t_lint_pinnotfound_bad.v:12:13: Pin not found: 'x' 12 | b b_inst1 (.x(1'b0)); | ^ + ... For error description see https://verilator.org/warn/PINNOTFOUND?v=4.201 %Error-PINNOTFOUND: t/t_lint_pinnotfound_bad.v:13:6: Parameter pin not found: 'PX' 13 | b #(.PX(1'b0)) b_inst2 (); | ^~ diff --git a/test_regress/t/t_lint_pkg_colon_bad.out b/test_regress/t/t_lint_pkg_colon_bad.out index f6a9c2149..3b7702707 100644 --- a/test_regress/t/t_lint_pkg_colon_bad.out +++ b/test_regress/t/t_lint_pkg_colon_bad.out @@ -1,6 +1,7 @@ %Error-PKGNODECL: t/t_lint_pkg_colon_bad.v:7:17: Package/class 'mispkg' not found, and needs to be predeclared (IEEE 1800-2017 26.3) 7 | module t (input mispkg::foo_t a); | ^~~~~~ + ... For error description see https://verilator.org/warn/PKGNODECL?v=4.201 %Error: t/t_lint_pkg_colon_bad.v:7:25: syntax error, unexpected IDENTIFIER, expecting TYPE-IDENTIFIER 7 | module t (input mispkg::foo_t a); | ^~~~~ diff --git a/test_regress/t/t_lint_realcvt_bad.out b/test_regress/t/t_lint_realcvt_bad.out index b21a18477..a240a3eb0 100644 --- a/test_regress/t/t_lint_realcvt_bad.out +++ b/test_regress/t/t_lint_realcvt_bad.out @@ -1,5 +1,6 @@ %Warning-REALCVT: t/t_lint_realcvt_bad.v:10:11: Implicit conversion of real to integer 10 | i = 23.2; | ^~~~ + ... For warning description see https://verilator.org/warn/REALCVT?v=4.201 ... Use "/* verilator lint_off REALCVT */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_repeat_bad.out b/test_regress/t/t_lint_repeat_bad.out index 234280873..80c9ae7ca 100644 --- a/test_regress/t/t_lint_repeat_bad.out +++ b/test_regress/t/t_lint_repeat_bad.out @@ -2,5 +2,6 @@ : ... In instance t.sub2 18 | wire [0:0] b = a; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_restore_bad.out b/test_regress/t/t_lint_restore_bad.out index b01c1a699..7af6654bb 100644 --- a/test_regress/t/t_lint_restore_bad.out +++ b/test_regress/t/t_lint_restore_bad.out @@ -2,5 +2,6 @@ : ... In instance t 19 | initial five = 64'h1; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_rsvd_bad.out b/test_regress/t/t_lint_rsvd_bad.out index c2fd258da..ceba8abfa 100644 --- a/test_regress/t/t_lint_rsvd_bad.out +++ b/test_regress/t/t_lint_rsvd_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_lint_rsvd_bad.v:7:1: Unsupported: Verilog 2001-config reserved word not implemented: 'config' 7 | config cfgBad; | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_lint_rsvd_bad.v:7:8: syntax error, unexpected IDENTIFIER 7 | config cfgBad; | ^~~~~~ diff --git a/test_regress/t/t_lint_setout_bad.out b/test_regress/t/t_lint_setout_bad.out index 2ed7227db..7271445c3 100644 --- a/test_regress/t/t_lint_setout_bad.out +++ b/test_regress/t/t_lint_setout_bad.out @@ -2,4 +2,5 @@ : ... In instance t 17 | .cpu_if_timeout(1'b0) | ^~~~~~~~~~~~~~ + ... For error description see https://verilator.org/warn/PORTSHORT?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_lint_setout_bad_noinl.out b/test_regress/t/t_lint_setout_bad_noinl.out index 2ed7227db..7271445c3 100644 --- a/test_regress/t/t_lint_setout_bad_noinl.out +++ b/test_regress/t/t_lint_setout_bad_noinl.out @@ -2,4 +2,5 @@ : ... In instance t 17 | .cpu_if_timeout(1'b0) | ^~~~~~~~~~~~~~ + ... For error description see https://verilator.org/warn/PORTSHORT?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_lint_subout_bad.out b/test_regress/t/t_lint_subout_bad.out index 32c40ece4..fa5b64ae6 100644 --- a/test_regress/t/t_lint_subout_bad.out +++ b/test_regress/t/t_lint_subout_bad.out @@ -2,6 +2,7 @@ : ... In instance t 12 | sub sub1(.out({32'b0, sig})); | ^~~ + ... For error description see https://verilator.org/warn/PORTSHORT?v=4.201 %Error-PORTSHORT: t/t_lint_subout_bad.v:13:14: Output port is connected to a constant pin, electrical short : ... In instance t 13 | sub sub2(.out({32'b1, sig})); diff --git a/test_regress/t/t_lint_syncasyncnet_bad.out b/test_regress/t/t_lint_syncasyncnet_bad.out index dd4ca5627..8508061a7 100644 --- a/test_regress/t/t_lint_syncasyncnet_bad.out +++ b/test_regress/t/t_lint_syncasyncnet_bad.out @@ -5,5 +5,6 @@ t/t_lint_syncasyncnet_bad.v:34:14: ... Location of sync usage 34 | q2 <= (rst_both_l) ? d : 1'b0; | ^~~~~~~~~~ + ... For warning description see https://verilator.org/warn/SYNCASYNCNET?v=4.201 ... Use "/* verilator lint_off SYNCASYNCNET */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_unsigned_bad.out b/test_regress/t/t_lint_unsigned_bad.out index 861d13a58..8fcfa685a 100644 --- a/test_regress/t/t_lint_unsigned_bad.out +++ b/test_regress/t/t_lint_unsigned_bad.out @@ -2,5 +2,6 @@ : ... In instance t 13 | if (uns < 0) $stop; | ^ + ... For warning description see https://verilator.org/warn/UNSIGNED?v=4.201 ... Use "/* verilator lint_off UNSIGNED */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_unused_bad.out b/test_regress/t/t_lint_unused_bad.out index 745ca8336..2bc76ead2 100644 --- a/test_regress/t/t_lint_unused_bad.out +++ b/test_regress/t/t_lint_unused_bad.out @@ -2,6 +2,7 @@ : ... In instance t.sub 17 | wire [5:0] assunu1 = 0; | ^~~~~~~ + ... For warning description see https://verilator.org/warn/UNUSED?v=4.201 ... Use "/* verilator lint_off UNUSED */" and lint_on around source to disable this message. %Warning-UNDRIVEN: t/t_lint_unused_bad.v:21:17: Bits of signal are not driven: 'udrb2'[14:13,11] : ... In instance t.sub diff --git a/test_regress/t/t_lint_unused_iface_bad.out b/test_regress/t/t_lint_unused_iface_bad.out index 917ccb9fe..691d50820 100644 --- a/test_regress/t/t_lint_unused_iface_bad.out +++ b/test_regress/t/t_lint_unused_iface_bad.out @@ -2,6 +2,7 @@ : ... In instance t.sub 8 | logic sig_udrv; | ^~~~~~~~ + ... For warning description see https://verilator.org/warn/UNDRIVEN?v=4.201 ... Use "/* verilator lint_off UNDRIVEN */" and lint_on around source to disable this message. %Warning-UNUSED: t/t_lint_unused_iface_bad.v:9:10: Signal is not used: 'sig_uusd' : ... In instance t.sub diff --git a/test_regress/t/t_lint_width_bad.out b/test_regress/t/t_lint_width_bad.out index fc4484be1..9fb7e5660 100644 --- a/test_regress/t/t_lint_width_bad.out +++ b/test_regress/t/t_lint_width_bad.out @@ -2,6 +2,7 @@ : ... In instance t 17 | localparam [3:0] XS = 'hx; | ^~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_lint_width_bad.v:47:19: Operator ASSIGNW expects 5 bits on the Assign RHS, but Assign RHS's VARREF 'in' generates 4 bits. : ... In instance t.p4 diff --git a/test_regress/t/t_lint_width_docs_bad.out b/test_regress/t/t_lint_width_docs_bad.out index 132dc2e6d..91057def8 100644 --- a/test_regress/t/t_lint_width_docs_bad.out +++ b/test_regress/t/t_lint_width_docs_bad.out @@ -2,5 +2,6 @@ : ... In instance t 10 | wire int rd_value = array[rd_addr]; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_lint_width_genfor_bad.out b/test_regress/t/t_lint_width_genfor_bad.out index a814e38a8..915fc6c3c 100644 --- a/test_regress/t/t_lint_width_genfor_bad.out +++ b/test_regress/t/t_lint_width_genfor_bad.out @@ -2,6 +2,7 @@ : ... In instance t 25 | rg = g; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_lint_width_genfor_bad.v:26:13: Operator ASSIGN expects 4 bits on the Assign RHS, but Assign RHS's VARREF 'P' generates 32 or 5 bits. : ... In instance t diff --git a/test_regress/t/t_math_countbits_bad.out b/test_regress/t/t_math_countbits_bad.out index def07da32..693cd2dfa 100755 --- a/test_regress/t/t_math_countbits_bad.out +++ b/test_regress/t/t_math_countbits_bad.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_math_countbits_bad.v:14:54: Unsupported: $countbits with more than 3 control fields 14 | assign count = $countbits(32'h123456, '0, '1, 'x, 'z); | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_math_shortreal_unsup_bad.out b/test_regress/t/t_math_shortreal_unsup_bad.out index b73e9626c..c3401572b 100644 --- a/test_regress/t/t_math_shortreal_unsup_bad.out +++ b/test_regress/t/t_math_shortreal_unsup_bad.out @@ -1,5 +1,6 @@ %Warning-SHORTREAL: t/t_math_shortreal_unsup_bad.v:9:4: Unsupported: shortreal being promoted to real (suggest use real instead) 9 | shortreal s; | ^~~~~~~~~ + ... For warning description see https://verilator.org/warn/SHORTREAL?v=4.201 ... Use "/* verilator lint_off SHORTREAL */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_math_wide_bad.out b/test_regress/t/t_math_wide_bad.out index 1c4516c1d..e30757c0f 100644 --- a/test_regress/t/t_math_wide_bad.out +++ b/test_regress/t/t_math_wide_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_math_wide_bad.v:22:18: Unsupported: operator POWSS operator of 576 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h 22 | assign z2 = a ** 3; | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_math_wide_bad.v:23:15: Unsupported: operator ISTORD operator of 64 bits exceeds hardcoded limit VL_MULS_MAX_WORDS in verilatedos.h 23 | assign r = real'(a); | ^~~~ diff --git a/test_regress/t/t_mem_multi_ref_bad.out b/test_regress/t/t_mem_multi_ref_bad.out index 558de331d..8ad024efe 100644 --- a/test_regress/t/t_mem_multi_ref_bad.out +++ b/test_regress/t/t_mem_multi_ref_bad.out @@ -6,6 +6,7 @@ : ... In instance t 15 | dimn[1:0] = 0; | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Error: t/t_mem_multi_ref_bad.v:16:14: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'logic' : ... In instance t diff --git a/test_regress/t/t_metacmt_onoff.out b/test_regress/t/t_metacmt_onoff.out index 7001223a5..46ae4fc1c 100644 --- a/test_regress/t/t_metacmt_onoff.out +++ b/test_regress/t/t_metacmt_onoff.out @@ -2,6 +2,7 @@ : ... In instance t 8 | reg [0:1] show1; /*verilator lint_off LITENDIAN*/ reg [0:2] ign2; /*verilator lint_on LITENDIAN*/ reg [0:3] show3; | ^ + ... For warning description see https://verilator.org/warn/LITENDIAN?v=4.201 ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message. %Warning-LITENDIAN: t/t_metacmt_onoff.v:8:109: Little bit endian vector: left < right of bit range: [0:3] : ... In instance t diff --git a/test_regress/t/t_mod_dup_bad.out b/test_regress/t/t_mod_dup_bad.out index 87b31425b..d194b4b22 100644 --- a/test_regress/t/t_mod_dup_bad.out +++ b/test_regress/t/t_mod_dup_bad.out @@ -4,6 +4,7 @@ t/t_mod_dup_bad.v:7:8: ... Location of original declaration 7 | module a(); | ^ + ... For warning description see https://verilator.org/warn/MODDUP?v=4.201 ... Use "/* verilator lint_off MODDUP */" and lint_on around source to disable this message. %Warning-MULTITOP: t/t_mod_dup_bad.v:17:8: Multiple top level modules : ... Suggest see manual; fix the duplicates, or use --top-module to select top. diff --git a/test_regress/t/t_mod_interface_array3.out b/test_regress/t/t_mod_interface_array3.out index 34ca8e708..1d4e3404f 100644 --- a/test_regress/t/t_mod_interface_array3.out +++ b/test_regress/t/t_mod_interface_array3.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_mod_interface_array3.v:25:20: Unsupported: Multidimensional instances/interfaces. 25 | a_if iface [2:0][1:0]; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_mod_interface_array3.v:27:18: Unsupported: Multidimensional instances/interfaces. 27 | sub i_sub[2:0][1:0] (.s(str)); | ^ diff --git a/test_regress/t/t_multitop_sig_bad.out b/test_regress/t/t_multitop_sig_bad.out index b905115db..9d1b70468 100644 --- a/test_regress/t/t_multitop_sig_bad.out +++ b/test_regress/t/t_multitop_sig_bad.out @@ -1,5 +1,6 @@ %Warning-MULTITOP: t/t_multitop_sig.v:15:8: Multiple top level modules : ... Suggest see manual; fix the duplicates, or use --top-module to select top. + ... For warning description see https://verilator.org/warn/MULTITOP?v=4.201 ... Use "/* verilator lint_off MULTITOP */" and lint_on around source to disable this message. : ... Top module 'a' 7 | module a(in, out); diff --git a/test_regress/t/t_order_blkandnblk_bad.out b/test_regress/t/t_order_blkandnblk_bad.out index 67d333e77..387bf9d05 100644 --- a/test_regress/t/t_order_blkandnblk_bad.out +++ b/test_regress/t/t_order_blkandnblk_bad.out @@ -7,4 +7,5 @@ t/t_order_blkandnblk_bad.v:22:6: ... Location of nonblocking assignment 22 | array[1] <= array[0]; | ^~~~~ + ... For error description see https://verilator.org/warn/BLKANDNBLK?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_order_blkloopinit_bad.out b/test_regress/t/t_order_blkloopinit_bad.out index ec6d432f5..dc78ecf0b 100644 --- a/test_regress/t/t_order_blkloopinit_bad.out +++ b/test_regress/t/t_order_blkloopinit_bad.out @@ -1,4 +1,5 @@ %Error-BLKLOOPINIT: t/t_order_blkloopinit_bad.v:21:19: Unsupported: Delayed assignment to array inside for loops (non-delayed is ok - see docs) 21 | array[i] <= 0; | ^~ + ... For error description see https://verilator.org/warn/BLKLOOPINIT?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_order_clkinst_bad.out b/test_regress/t/t_order_clkinst_bad.out index 2e369155a..4d9f3562d 100644 --- a/test_regress/t/t_order_clkinst_bad.out +++ b/test_regress/t/t_order_clkinst_bad.out @@ -1,6 +1,7 @@ %Warning-IMPERFECTSCH: t/t_order_clkinst.v:19:16: Imperfect scheduling of variable: 't.c1_start' 19 | reg c1_start; initial c1_start = 0; | ^~~~~~~~ + ... For warning description see https://verilator.org/warn/IMPERFECTSCH?v=4.201 ... Use "/* verilator lint_off IMPERFECTSCH */" and lint_on around source to disable this message. %Warning-IMPERFECTSCH: t/t_order_clkinst.v:20:16: Imperfect scheduling of variable: 't.c1_count' 20 | wire [31:0] c1_count; diff --git a/test_regress/t/t_packed_concat_bad.out b/test_regress/t/t_packed_concat_bad.out index 3bbac473d..a0e92e05d 100644 --- a/test_regress/t/t_packed_concat_bad.out +++ b/test_regress/t/t_packed_concat_bad.out @@ -2,6 +2,7 @@ : ... In instance t 17 | localparam bit_int_t [1:0] count_bits = {2{$bits(count_t)}}; | ^~~~~ + ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201 ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message. %Warning-WIDTHCONCAT: t/t_packed_concat_bad.v:18:46: Unsized numbers/parameters not allowed in concatenations. : ... In instance t diff --git a/test_regress/t/t_param_concat_bad.out b/test_regress/t/t_param_concat_bad.out index 5c7036e34..1cc22b953 100644 --- a/test_regress/t/t_param_concat_bad.out +++ b/test_regress/t/t_param_concat_bad.out @@ -2,6 +2,7 @@ : ... In instance t 19 | if ({UNSIZED,UNSIZED+1} != {32'd10, 32'd11}) $stop; | ^~~~~~~ + ... For warning description see https://verilator.org/warn/WIDTHCONCAT?v=4.201 ... Use "/* verilator lint_off WIDTHCONCAT */" and lint_on around source to disable this message. %Warning-WIDTHCONCAT: t/t_param_concat.v:19:22: Unsized numbers/parameters not allowed in replications. : ... In instance t diff --git a/test_regress/t/t_param_in_func_bad.out b/test_regress/t/t_param_in_func_bad.out index 683490111..11d333858 100644 --- a/test_regress/t/t_param_in_func_bad.out +++ b/test_regress/t/t_param_in_func_bad.out @@ -2,4 +2,5 @@ : ... In instance t 24 | localparam logic[7:0] digits[10] | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_param_noval_bad.out b/test_regress/t/t_param_noval_bad.out index 606fca350..bac882641 100644 --- a/test_regress/t/t_param_noval_bad.out +++ b/test_regress/t/t_param_noval_bad.out @@ -6,6 +6,7 @@ : ... In instance t 10 | for (j=0; P; j++) | ^~~ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Error: t/t_param_noval_bad.v:10:7: Non-genvar used in generate for: 'j' : ... In instance t diff --git a/test_regress/t/t_param_scope_bad.out b/test_regress/t/t_param_scope_bad.out index ca3fc7560..d9286ecb4 100644 --- a/test_regress/t/t_param_scope_bad.out +++ b/test_regress/t/t_param_scope_bad.out @@ -1,5 +1,6 @@ %Warning-CASEOVERLAP: t/t_param_scope_bad.v:28:9: Case values overlap (example pattern 0x2) 28 | 2'h2: $stop; | ^~~~ + ... For warning description see https://verilator.org/warn/CASEOVERLAP?v=4.201 ... Use "/* verilator lint_off CASEOVERLAP */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_param_sel_range_bad.out b/test_regress/t/t_param_sel_range_bad.out index a4dec58b9..8e8cf5f93 100644 --- a/test_regress/t/t_param_sel_range_bad.out +++ b/test_regress/t/t_param_sel_range_bad.out @@ -2,5 +2,6 @@ : ... In instance t.u2 43 | r_rst[i] <= r_rst[i-1]; | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_past_bad.out b/test_regress/t/t_past_bad.out index 39a14b562..70144f13b 100644 --- a/test_regress/t/t_past_bad.out +++ b/test_regress/t/t_past_bad.out @@ -14,5 +14,6 @@ : ... In instance t 18 | if ($past(d, 10000)) $stop; | ^~~~~ + ... For warning description see https://verilator.org/warn/TICKCOUNT?v=4.201 ... Use "/* verilator lint_off TICKCOUNT */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_past_unsup_bad.out b/test_regress/t/t_past_unsup_bad.out index 9f8b2bb83..5115fdf14 100644 --- a/test_regress/t/t_past_unsup_bad.out +++ b/test_regress/t/t_past_unsup_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_past_unsup_bad.v:13:11: Unsupported: $past expr2 and clock arguments 13 | if ($past(d, 0, 0)) $stop; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_past_unsup_bad.v:14:11: Unsupported: $past expr2 and clock arguments 14 | if ($past(d, 0, 0, clk)) $stop; | ^~~~~ diff --git a/test_regress/t/t_pp_dupdef_bad.out b/test_regress/t/t_pp_dupdef_bad.out index cb207f1d3..af9756bc6 100644 --- a/test_regress/t/t_pp_dupdef_bad.out +++ b/test_regress/t/t_pp_dupdef_bad.out @@ -1,5 +1,6 @@ %Warning-REDEFMACRO: t/t_pp_dupdef.v:11:20: Redefining existing define: 'DUP', with different value: 'barney' t/t_pp_dupdef.v:11:20: ... Location of previous definition, with value: 'fred' + ... For warning description see https://verilator.org/warn/REDEFMACRO?v=4.201 ... Use "/* verilator lint_off REDEFMACRO */" and lint_on around source to disable this message. %Warning-REDEFMACRO: t/t_pp_dupdef.v:14:33: Redefining existing define: 'DUPP', with different value: 'paramed(x,z) (x*z)' t/t_pp_dupdef.v:14:33: ... Location of previous definition, with value: 'paramed(x) (x)' diff --git a/test_regress/t/t_priority_case.out b/test_regress/t/t_priority_case.out index f3e336f9d..e2705c6d9 100644 --- a/test_regress/t/t_priority_case.out +++ b/test_regress/t/t_priority_case.out @@ -1,6 +1,7 @@ %Warning-CASEOVERLAP: t/t_priority_case.v:34:7: Case item ignored: every matching value is covered by an earlier item 34 | 2'b ?1: out1 = 3'd1; | ^~~~~~ + ... For warning description see https://verilator.org/warn/CASEOVERLAP?v=4.201 ... Use "/* verilator lint_off CASEOVERLAP */" and lint_on around source to disable this message. %Warning-CASEOVERLAP: t/t_priority_case.v:44:7: Case item ignored: every matching value is covered by an earlier item 44 | 2'b ?1: out1 = 3'd1; diff --git a/test_regress/t/t_process.out b/test_regress/t/t_process.out index 7f135af7b..4d1f1a1b8 100644 --- a/test_regress/t/t_process.out +++ b/test_regress/t/t_process.out @@ -4,6 +4,7 @@ %Error-UNSUPPORTED: t/t_process.v:26:20: Unsupported: 'process' 26 | p = process::self(); | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Internal Error: t/t_process.v:26:11: ../V3LinkDot.cpp:#: Bad package link 26 | p = process::self(); | ^~~~~~~ diff --git a/test_regress/t/t_prot_lib_inout_bad.out b/test_regress/t/t_prot_lib_inout_bad.out index b33360f10..733fcc80c 100644 --- a/test_regress/t/t_prot_lib_inout_bad.out +++ b/test_regress/t/t_prot_lib_inout_bad.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_prot_lib_inout_bad.v:9:28: Unsupported: protect-lib port direction: INOUT 9 | inout z, | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_protect_ids_bad.out b/test_regress/t/t_protect_ids_bad.out index da5ad8345..7e32b4b2c 100644 --- a/test_regress/t/t_protect_ids_bad.out +++ b/test_regress/t/t_protect_ids_bad.out @@ -1,5 +1,6 @@ %Error-UNSUPPORTED: Unsupported: Using --protect-ids with --public ... Suggest remove --public. + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Warning-INSECURE: Using --protect-ids with --trace may expose private design details ... Suggest remove --trace. ... Use "/* verilator lint_off INSECURE */" and lint_on around source to disable this message. diff --git a/test_regress/t/t_randc_unsup.out b/test_regress/t/t_randc_unsup.out index 4ca619d14..3e4ca214d 100644 --- a/test_regress/t/t_randc_unsup.out +++ b/test_regress/t/t_randc_unsup.out @@ -1,5 +1,6 @@ %Warning-RANDC: t/t_randc_unsup.v:8:14: Unsupported: Converting 'randc' to 'rand' 8 | randc int i; | ^ + ... For warning description see https://verilator.org/warn/RANDC?v=4.201 ... Use "/* verilator lint_off RANDC */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_randomize.out b/test_regress/t/t_randomize.out index 7f05355de..c51190262 100644 --- a/test_regress/t/t_randomize.out +++ b/test_regress/t/t_randomize.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_randomize.v:11:4: Unsupported: extern constraint 11 | extern constraint ex; | ^~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_randomize.v:29:29: Unsupported: solve before 29 | constraint order { solve length before header; } | ^~~~~~ diff --git a/test_regress/t/t_randomize_method_types_unsup.out b/test_regress/t/t_randomize_method_types_unsup.out index a84c9ae0e..1f5c2bf5d 100644 --- a/test_regress/t/t_randomize_method_types_unsup.out +++ b/test_regress/t/t_randomize_method_types_unsup.out @@ -2,6 +2,7 @@ : ... In instance t 12 | rand int assocarr[string]; | ^~~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_randomize_method_types_unsup.v:13:13: Unsupported: random member variables with type 'int[]' : ... In instance t 13 | rand int dynarr[]; diff --git a/test_regress/t/t_randomize_method_unsup.out b/test_regress/t/t_randomize_method_unsup.out index 5012993da..b394b34f1 100644 --- a/test_regress/t/t_randomize_method_unsup.out +++ b/test_regress/t/t_randomize_method_unsup.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_randomize_method_unsup.v:8:18: Unsupported: 'pre_randomize' 8 | function void pre_randomize; | ^~~~~~~~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_randomize_method_unsup.v:11:18: Unsupported: 'post_randomize' 11 | function void post_randomize; | ^~~~~~~~~~~~~~ diff --git a/test_regress/t/t_savable_class_bad.out b/test_regress/t/t_savable_class_bad.out index 08c051e17..56b78a4de 100644 --- a/test_regress/t/t_savable_class_bad.out +++ b/test_regress/t/t_savable_class_bad.out @@ -1,2 +1,3 @@ %Error-UNSUPPORTED: Unsupported: --savable with dynamic new + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_select_bad_msb.out b/test_regress/t/t_select_bad_msb.out index 2401969bb..f288d49e1 100644 --- a/test_regress/t/t_select_bad_msb.out +++ b/test_regress/t/t_select_bad_msb.out @@ -2,6 +2,7 @@ : ... In instance t 12 | reg [0:22] backwd; | ^ + ... For warning description see https://verilator.org/warn/LITENDIAN?v=4.201 ... Use "/* verilator lint_off LITENDIAN */" and lint_on around source to disable this message. %Warning-SELRANGE: t/t_select_bad_msb.v:16:16: [1:4] Range extract has backward bit ordering, perhaps you wanted [4:1] : ... In instance t diff --git a/test_regress/t/t_select_bad_range.out b/test_regress/t/t_select_bad_range.out index c72a978d5..97f6beeef 100644 --- a/test_regress/t/t_select_bad_range.out +++ b/test_regress/t/t_select_bad_range.out @@ -2,6 +2,7 @@ : ... In instance t 16 | sel = mi[44]; | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Warning-SELRANGE: t/t_select_bad_range.v:17:16: Selection index out of range: 44:41 outside 43:0 : ... In instance t diff --git a/test_regress/t/t_select_bad_range2.out b/test_regress/t/t_select_bad_range2.out index fc2bb2d0d..b45732a65 100644 --- a/test_regress/t/t_select_bad_range2.out +++ b/test_regress/t/t_select_bad_range2.out @@ -2,5 +2,6 @@ : ... In instance t.test 51 | assign out32 = in[3:2]; | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_select_bad_range3.out b/test_regress/t/t_select_bad_range3.out index 30c14d08d..ad9ce0380 100644 --- a/test_regress/t/t_select_bad_range3.out +++ b/test_regress/t/t_select_bad_range3.out @@ -2,5 +2,6 @@ : ... In instance t 19 | assign outwires[12] = inwires[13]; | ^ + ... For warning description see https://verilator.org/warn/SELRANGE?v=4.201 ... Use "/* verilator lint_off SELRANGE */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_split_var_1_bad.out b/test_regress/t/t_split_var_1_bad.out index d606c7a08..b55cafcf3 100644 --- a/test_regress/t/t_split_var_1_bad.out +++ b/test_regress/t/t_split_var_1_bad.out @@ -1,6 +1,7 @@ %Warning-SPLITVAR: t/t_split_var_1_bad.v:7:13: 'should_show_warning_global0' has split_var metacomment, but will not be split because it is not declared in a module. 7 | logic [7:0] should_show_warning_global0 /*verilator split_var*/ ; | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ + ... For warning description see https://verilator.org/warn/SPLITVAR?v=4.201 ... Use "/* verilator lint_off SPLITVAR */" and lint_on around source to disable this message. %Warning-SPLITVAR: t/t_split_var_1_bad.v:8:13: 'should_show_warning_global1' has split_var metacomment, but will not be split because it is not declared in a module. 8 | logic [7:0] should_show_warning_global1 [1:0] /*verilator split_var*/ ; diff --git a/test_regress/t/t_stream_integer_type.out b/test_regress/t/t_stream_integer_type.out index e6d1b0876..a8fd0cf20 100644 --- a/test_regress/t/t_stream_integer_type.out +++ b/test_regress/t/t_stream_integer_type.out @@ -2,6 +2,7 @@ : ... In instance t 118 | packed_data_32 = {<<8{byte_in}}; | ^ + ... For warning description see https://verilator.org/warn/WIDTH?v=4.201 ... Use "/* verilator lint_off WIDTH */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_stream_integer_type.v:119:28: Operator ASSIGN expects 64 bits on the Assign RHS, but Assign RHS's STREAML generates 16 bits. : ... In instance t diff --git a/test_regress/t/t_struct_unpacked2.out b/test_regress/t/t_struct_unpacked2.out index aa812216b..b5f430c28 100644 --- a/test_regress/t/t_struct_unpacked2.out +++ b/test_regress/t/t_struct_unpacked2.out @@ -1,6 +1,7 @@ %Warning-UNPACKED: t/t_struct_unpacked2.v:10:13: Unsupported: Unpacked array in packed struct/union (struct/union converted to unpacked) 10 | int b [2]; | ^ + ... For warning description see https://verilator.org/warn/UNPACKED?v=4.201 ... Use "/* verilator lint_off UNPACKED */" and lint_on around source to disable this message. %Warning-UNPACKED: t/t_struct_unpacked2.v:9:12: Unsupported: Unpacked struct/union : ... In instance x diff --git a/test_regress/t/t_struct_unpacked_bad.out b/test_regress/t/t_struct_unpacked_bad.out index 6e9356b6d..29d8c0208 100644 --- a/test_regress/t/t_struct_unpacked_bad.out +++ b/test_regress/t/t_struct_unpacked_bad.out @@ -2,5 +2,6 @@ : ... In instance x 9 | typedef struct { | ^~~~~~ + ... For warning description see https://verilator.org/warn/UNPACKED?v=4.201 ... Use "/* verilator lint_off UNPACKED */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_sys_readmem_assoc_bad.out b/test_regress/t/t_sys_readmem_assoc_bad.out index bc09fd9cd..220cfebcc 100644 --- a/test_regress/t/t_sys_readmem_assoc_bad.out +++ b/test_regress/t/t_sys_readmem_assoc_bad.out @@ -6,4 +6,5 @@ : ... In instance t 14 | $readmemb("not", assoc_bad_value); | ^~~~~~~~~~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_timescale_lint_bad.out b/test_regress/t/t_timescale_lint_bad.out index dea8a0a8c..771e03304 100644 --- a/test_regress/t/t_timescale_lint_bad.out +++ b/test_regress/t/t_timescale_lint_bad.out @@ -4,5 +4,6 @@ t/t_timescale_lint.v:12:8: ... Location of module with timescale 12 | module t; | ^ + ... For warning description see https://verilator.org/warn/TIMESCALEMOD?v=4.201 ... Use "/* verilator lint_off TIMESCALEMOD */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_tri_compass_bad.out b/test_regress/t/t_tri_compass_bad.out index b07623a7d..b48142931 100644 --- a/test_regress/t/t_tri_compass_bad.out +++ b/test_regress/t/t_tri_compass_bad.out @@ -2,4 +2,5 @@ : ... In instance t 16 | sub sub(i, o); | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_tri_pull2_bad.out b/test_regress/t/t_tri_pull2_bad.out index 98baf9520..67d77c7bc 100644 --- a/test_regress/t/t_tri_pull2_bad.out +++ b/test_regress/t/t_tri_pull2_bad.out @@ -5,4 +5,5 @@ t/t_tri_pull2_bad.v:22:13: ... Location of conflicting pull. 22 | pulldown p2(A); | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_tri_pull_bad.out b/test_regress/t/t_tri_pull_bad.out index e59dcf535..15889fc4f 100644 --- a/test_regress/t/t_tri_pull_bad.out +++ b/test_regress/t/t_tri_pull_bad.out @@ -5,4 +5,5 @@ t/t_tri_pull_bad.v:12:11: ... Location of conflicting pull. 12 | pullup p1(A); | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_tri_pullvec_bad.out b/test_regress/t/t_tri_pullvec_bad.out index 1c5594298..e4b2ce9ca 100644 --- a/test_regress/t/t_tri_pullvec_bad.out +++ b/test_regress/t/t_tri_pullvec_bad.out @@ -5,6 +5,7 @@ t/t_tri_pullvec_bad.v:12:11: ... Location of conflicting pull. 12 | pullup p0 (w[0]); | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_tri_pullvec_bad.v:14:13: Unsupported: Conflicting pull directions. : ... In instance t 14 | pulldown p2 (w[2]); diff --git a/test_regress/t/t_udp.out b/test_regress/t/t_udp.out index 852e2eef0..6cf8a41f4 100644 --- a/test_regress/t/t_udp.out +++ b/test_regress/t/t_udp.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_udp.v:104:4: Unsupported: Verilog 1995 UDP Tables. Use --bbox-unsup to ignore tables. 104 | table | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_udp_bad.out b/test_regress/t/t_udp_bad.out index 451595dd6..f190c275f 100644 --- a/test_regress/t/t_udp_bad.out +++ b/test_regress/t/t_udp_bad.out @@ -1,6 +1,7 @@ %Warning-PINMISSING: t/t_udp_bad.v:10:10: Cell has missing pin: 'c_bad' 10 | udp_x x (a, b); | ^ + ... For warning description see https://verilator.org/warn/PINMISSING?v=4.201 ... Use "/* verilator lint_off PINMISSING */" and lint_on around source to disable this message. %Error: t/t_udp_bad.v:14:18: Pin is not an in/out/inout/interface: 'a_bad' 14 | primitive udp_x (a_bad, b, c_bad); diff --git a/test_regress/t/t_unopt_combo_bad.out b/test_regress/t/t_unopt_combo_bad.out index a4be2fab5..7b31be8ab 100644 --- a/test_regress/t/t_unopt_combo_bad.out +++ b/test_regress/t/t_unopt_combo_bad.out @@ -1,6 +1,7 @@ %Warning-UNOPTFLAT: t/t_unopt_combo.v:24:25: Signal unoptimizable: Feedback to clock or circular logic: 't.c' 24 | wire [31:0] c; | ^ + ... For warning description see https://verilator.org/warn/UNOPTFLAT?v=4.201 ... Use "/* verilator lint_off UNOPTFLAT */" and lint_on around source to disable this message. t/t_unopt_combo.v:24:25: Example path: t.c t/t_unopt_combo.v:81:4: Example path: ALWAYS diff --git a/test_regress/t/t_unopt_converge_unopt_bad.out b/test_regress/t/t_unopt_converge_unopt_bad.out index 2a978fa65..51fd138ee 100644 --- a/test_regress/t/t_unopt_converge_unopt_bad.out +++ b/test_regress/t/t_unopt_converge_unopt_bad.out @@ -1,6 +1,7 @@ %Warning-UNOPT: t/t_unopt_converge.v:19:11: Signal unoptimizable: Feedback to public clock or circular logic: 'x' 19 | output x; | ^ + ... For warning description see https://verilator.org/warn/UNOPT?v=4.201 ... Use "/* verilator lint_off UNOPT */" and lint_on around source to disable this message. t/t_unopt_converge.v:19:11: Example path: x t/t_unopt_converge.v:22:4: Example path: ALWAYS diff --git a/test_regress/t/t_unoptflat_simple_2_bad.out b/test_regress/t/t_unoptflat_simple_2_bad.out index e03cad9b2..3ba06168f 100644 --- a/test_regress/t/t_unoptflat_simple_2_bad.out +++ b/test_regress/t/t_unoptflat_simple_2_bad.out @@ -1,6 +1,7 @@ %Warning-UNOPTFLAT: t/t_unoptflat_simple_2.v:15:15: Signal unoptimizable: Feedback to clock or circular logic: 't.x' 15 | wire [2:0] x; | ^ + ... For warning description see https://verilator.org/warn/UNOPTFLAT?v=4.201 ... Use "/* verilator lint_off UNOPTFLAT */" and lint_on around source to disable this message. t/t_unoptflat_simple_2.v:15:15: Example path: t.x t/t_unoptflat_simple_2.v:17:18: Example path: ASSIGNW diff --git a/test_regress/t/t_unpacked_concat_bad.out b/test_regress/t/t_unpacked_concat_bad.out index 67309b1bd..fccb233a3 100644 --- a/test_regress/t/t_unpacked_concat_bad.out +++ b/test_regress/t/t_unpacked_concat_bad.out @@ -2,6 +2,7 @@ : ... In instance t 17 | localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}}; | ^ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Warning-WIDTHCONCAT: t/t_unpacked_concat_bad.v:17:47: Unsized numbers/parameters not allowed in replications. : ... In instance t 17 | localparam bit_int_t count_bits [1:0] = {2{$bits(count_t)}}; diff --git a/test_regress/t/t_vams_kwd_bad.out b/test_regress/t/t_vams_kwd_bad.out index cc4a86cc1..500595296 100644 --- a/test_regress/t/t_vams_kwd_bad.out +++ b/test_regress/t/t_vams_kwd_bad.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_vams_kwd_bad.v:12:8: Unsupported: AMS reserved word not implemented: 'above' 12 | int above; | ^~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: t/t_vams_kwd_bad.v:12:13: syntax error, unexpected ';', expecting IDENTIFIER or randomize 12 | int above; | ^ diff --git a/test_regress/t/t_var_bad_hide.out b/test_regress/t/t_var_bad_hide.out index 7746fd863..27599dc26 100644 --- a/test_regress/t/t_var_bad_hide.out +++ b/test_regress/t/t_var_bad_hide.out @@ -4,6 +4,7 @@ t/t_var_bad_hide.v:13:12: ... Location of original declaration 13 | integer top; | ^~~ + ... For warning description see https://verilator.org/warn/VARHIDDEN?v=4.201 ... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message. %Warning-VARHIDDEN: t/t_var_bad_hide.v:22:18: Declaration of signal hides declaration in upper scope: 'top' 22 | integer top; diff --git a/test_regress/t/t_var_bad_hide2.out b/test_regress/t/t_var_bad_hide2.out index 3318750c1..ee41a5f0c 100644 --- a/test_regress/t/t_var_bad_hide2.out +++ b/test_regress/t/t_var_bad_hide2.out @@ -4,5 +4,6 @@ t/t_var_bad_hide2.v:7:8: ... Location of original declaration 7 | module t; | ^ + ... For warning description see https://verilator.org/warn/VARHIDDEN?v=4.201 ... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_var_bad_hide_docs.out b/test_regress/t/t_var_bad_hide_docs.out index 3ce6c7460..86ee16b64 100644 --- a/test_regress/t/t_var_bad_hide_docs.out +++ b/test_regress/t/t_var_bad_hide_docs.out @@ -4,5 +4,6 @@ t/t_var_bad_hide_docs.v:7:8: ... Location of original declaration 7 | module t; | ^ + ... For warning description see https://verilator.org/warn/VARHIDDEN?v=4.201 ... Use "/* verilator lint_off VARHIDDEN */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_var_in_assign_bad.out b/test_regress/t/t_var_in_assign_bad.out index 87acaf9f1..a32dcc803 100644 --- a/test_regress/t/t_var_in_assign_bad.out +++ b/test_regress/t/t_var_in_assign_bad.out @@ -1,6 +1,7 @@ %Error-ASSIGNIN: t/t_var_in_assign_bad.v:12:16: Assigning to input/const variable: 'value' 12 | assign value = 4'h0; | ^~~~~ + ... For error description see https://verilator.org/warn/ASSIGNIN?v=4.201 %Error-ASSIGNIN: t/t_var_in_assign_bad.v:21:16: Assigning to input/const variable: 'valueSub' 21 | assign valueSub = 4'h0; | ^~~~~~~~ diff --git a/test_regress/t/t_var_ref_bad3.out b/test_regress/t/t_var_ref_bad3.out index 6ae8e9307..2dc201162 100644 --- a/test_regress/t/t_var_ref_bad3.out +++ b/test_regress/t/t_var_ref_bad3.out @@ -1,4 +1,5 @@ %Error-UNSUPPORTED: t/t_var_ref_bad3.v:10:18: Unsupported: ref/const ref as primary input/output: 'bad_primary_ref' 10 | module t(ref int bad_primary_ref | ^~~~~~~~~~~~~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_var_rsvd_bad.out b/test_regress/t/t_var_rsvd_bad.out index 5a4cd49ab..04bc62b04 100644 --- a/test_regress/t/t_var_rsvd_bad.out +++ b/test_regress/t/t_var_rsvd_bad.out @@ -1,6 +1,7 @@ %Warning-SYMRSVDWORD: t/t_var_rsvd_port.v:12:10: Symbol matches C++ keyword: 'bool' 12 | input bool; | ^~~~ + ... For warning description see https://verilator.org/warn/SYMRSVDWORD?v=4.201 ... Use "/* verilator lint_off SYMRSVDWORD */" and lint_on around source to disable this message. %Warning-SYMRSVDWORD: t/t_var_rsvd_port.v:15:9: Symbol matches C++ keyword: 'switch' : ... In instance t diff --git a/test_regress/t/t_var_static.out b/test_regress/t/t_var_static.out index f6d7a524e..3781d41ac 100644 --- a/test_regress/t/t_var_static.out +++ b/test_regress/t/t_var_static.out @@ -2,6 +2,7 @@ : ... In instance t 20 | static int st = 2; st++; return st; | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_var_static.v:30:18: Unsupported: 'static' function/task variables : ... In instance t 30 | static int st = 2; st++; return st; diff --git a/test_regress/t/t_var_static_param.out b/test_regress/t/t_var_static_param.out index f58144faa..a87e35d6c 100644 --- a/test_regress/t/t_var_static_param.out +++ b/test_regress/t/t_var_static_param.out @@ -2,4 +2,5 @@ : ... In instance t.subb 32 | static int st = 2; st += P; return st; | ^~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error: Exiting due to diff --git a/test_regress/t/t_var_types_bad.out b/test_regress/t/t_var_types_bad.out index e4c100627..291a3db6a 100644 --- a/test_regress/t/t_var_types_bad.out +++ b/test_regress/t/t_var_types_bad.out @@ -21,6 +21,7 @@ %Warning-REALCVT: t/t_var_types_bad.v:46:7: Implicit conversion of real to integer 46 | d_real[0] = 1'b1; | ^~~~~~ + ... For warning description see https://verilator.org/warn/REALCVT?v=4.201 ... Use "/* verilator lint_off REALCVT */" and lint_on around source to disable this message. %Error: t/t_var_types_bad.v:47:17: Illegal bit or array select; type does not have a bit range, or bad dimension: data type is 'real' : ... In instance t diff --git a/test_regress/t/t_vlt_warn_bad.out b/test_regress/t/t_vlt_warn_bad.out index 4e5fcde5a..646936098 100644 --- a/test_regress/t/t_vlt_warn_bad.out +++ b/test_regress/t/t_vlt_warn_bad.out @@ -1,6 +1,7 @@ %Warning-DEPRECATED: t/t_vlt_warn_bad.vlt:12:10: Deprecated -msg in configuration files, use -rule instead. 12 | lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 | ^~~~ + ... For warning description see https://verilator.org/warn/DEPRECATED?v=4.201 ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message. %Warning-WIDTH: t/t_vlt_warn.v:21:33: Operator ASSIGN expects 1 bits on the Assign RHS, but Assign RHS's CONST '2'h3' generates 2 bits. : ... In instance t diff --git a/test_regress/t/t_wait.out b/test_regress/t/t_wait.out index bc88a4f78..d71745e4f 100644 --- a/test_regress/t/t_wait.out +++ b/test_regress/t/t_wait.out @@ -1,6 +1,7 @@ %Error-UNSUPPORTED: t/t_wait.v:12:7: Unsupported: wait statements 12 | wait (value == 1); | ^~~~ + ... For error description see https://verilator.org/warn/UNSUPPORTED?v=4.201 %Error-UNSUPPORTED: t/t_wait.v:14:7: Unsupported: wait statements 14 | wait (0); | ^~~~ diff --git a/test_regress/t/t_wire_beh1364_bad.out b/test_regress/t/t_wire_beh1364_bad.out index 18834bf3a..c53c1ab06 100644 --- a/test_regress/t/t_wire_beh1364_bad.out +++ b/test_regress/t/t_wire_beh1364_bad.out @@ -2,6 +2,7 @@ : ... In instance t 25 | w = '0; | ^ + ... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201 %Error-PROCASSWIRE: t/t_wire_beh1364_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o' : ... In instance t 26 | o = '0; diff --git a/test_regress/t/t_wire_beh1800_bad.out b/test_regress/t/t_wire_beh1800_bad.out index 4300d3caf..8d48b7ac1 100644 --- a/test_regress/t/t_wire_beh1800_bad.out +++ b/test_regress/t/t_wire_beh1800_bad.out @@ -2,6 +2,7 @@ : ... In instance t 25 | w = '0; | ^ + ... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201 %Error-PROCASSWIRE: t/t_wire_beh1800_bad.v:26:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o' : ... In instance t 26 | o = '0; diff --git a/test_regress/t/t_wire_behp1364_bad.out b/test_regress/t/t_wire_behp1364_bad.out index 73e9d1c53..ed4055430 100644 --- a/test_regress/t/t_wire_behp1364_bad.out +++ b/test_regress/t/t_wire_behp1364_bad.out @@ -2,6 +2,7 @@ : ... In instance t 23 | w = '0; | ^ + ... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201 %Error-PROCASSWIRE: t/t_wire_behp1364_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o' : ... In instance t 24 | o = '0; diff --git a/test_regress/t/t_wire_behp1800_bad.out b/test_regress/t/t_wire_behp1800_bad.out index ec76bc00c..200179d4c 100644 --- a/test_regress/t/t_wire_behp1800_bad.out +++ b/test_regress/t/t_wire_behp1800_bad.out @@ -2,6 +2,7 @@ : ... In instance t 23 | w = '0; | ^ + ... For error description see https://verilator.org/warn/PROCASSWIRE?v=4.201 %Error-PROCASSWIRE: t/t_wire_behp1800_bad.v:24:7: Procedural assignment to wire, perhaps intended var (IEEE 1800-2017 6.5): 'o' : ... In instance t 24 | o = '0;