diff --git a/Changes b/Changes
index adcfd0481..db5dca1c6 100644
--- a/Changes
+++ b/Changes
@@ -17,6 +17,10 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ***   Inline C functions that are used only once, msg1525. [Jie Xu]
 
+***   Fix tracing SystemC signals with structures, bug858. [Eivind Liland]
+      Note that SystemC traces will no longer show the signals
+      in the wrapper, they can be seen one level further down.
+
 ****  Fix bare generates in interfaces, bug789. [Bob Newgard]
 
 
diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp
index 3b924c768..9d9c3930a 100644
--- a/src/V3LinkLevel.cpp
+++ b/src/V3LinkLevel.cpp
@@ -130,7 +130,12 @@ void V3LinkLevel::wrapTopCell(AstNetlist* netlistp) {
 		    oldvarp->primaryIO(true);
 		    varp->primaryIO(true);
 		}
-		if (varp->isIO() && v3Global.opt.systemC()) varp->sc(true);
+		if (varp->isIO() && v3Global.opt.systemC()) {
+		    varp->sc(true);
+		    // User can see trace one level down from the wrapper
+		    // Avoids packing & unpacking SC signals a second time
+		    varp->trace(false);
+		}
 
 		AstPin* pinp = new AstPin(oldvarp->fileline(),0,oldvarp->name(),
 					  new AstVarRef(varp->fileline(),
diff --git a/test_regress/t/t_trace_scstruct.pl b/test_regress/t/t_trace_scstruct.pl
new file mode 100755
index 000000000..9c08b40ef
--- /dev/null
+++ b/test_regress/t/t_trace_scstruct.pl
@@ -0,0 +1,17 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    verilator_flags2 => ['--sc --trace --trace-structs --pins-bv 2'],
+    );
+
+#execute ();  # didn't bother with top shell
+
+ok(1);
+1;
diff --git a/test_regress/t/t_trace_scstruct.v b/test_regress/t/t_trace_scstruct.v
new file mode 100644
index 000000000..0993f0fc8
--- /dev/null
+++ b/test_regress/t/t_trace_scstruct.v
@@ -0,0 +1,26 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2014 by Wilson Snyder.
+
+// verilator lint_off UNUSED
+// verilator lint_off UNDRIVEN
+
+//bug858
+
+typedef struct packed {
+    logic m_1;
+    logic m_2;
+} struct_t;
+
+typedef struct packed {
+    logic [94:0] m_1;
+    logic m_2;
+} struct96_t;
+
+module t
+  (
+   input struct_t   test_input,
+   input struct96_t t96
+   );
+endmodule