diff --git a/test_regress/t/t_interface_ref_trace_saif.out b/test_regress/t/t_interface_ref_trace_saif.out
new file mode 100644
index 000000000..560344c41
--- /dev/null
+++ b/test_regress/t/t_interface_ref_trace_saif.out
@@ -0,0 +1,109 @@
+(SAIFILE
+(SAIFVERSION "2.0")
+(DIRECTION "backward")
+(DESIGN "foo")
+(PROGRAM_NAME "Verilator")
+(VERSION "5.032")
+(DIVIDER .)
+(TIMESCALE 1ps)
+(DURATION 210)
+(INSTANCE foo (NET
+(val200[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(val200[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val200[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 5))
+(val200[3] (T0 130) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[4] (T0 70) (T1 140) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[5] (T0 70) (T1 140) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[6] (T0 140) (T1 70) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[10] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(val100[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val100[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 6))
+(val100[3] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 4))
+(val100[4] (T0 50) (T1 160) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val100[5] (T0 180) (T1 30) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[10] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(value[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(value[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 5))
+(value[3] (T0 80) (T1 130) (TZ 0) (TX 0) (TB 0) (TC 3))
+(value[4] (T0 60) (T1 150) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[5] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[8] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[9] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(clk (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 41))
+(cyc[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(cyc[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 10))
+(cyc[2] (T0 120) (T1 90) (TZ 0) (TX 0) (TB 0) (TC 5))
+(cyc[3] (T0 130) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 2))
+(cyc[4] (T0 160) (T1 50) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(value[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(value[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 5))
+(value[3] (T0 130) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 2))
+(value[4] (T0 150) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(val100[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val100[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 6))
+(val100[3] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 3))
+(val100[4] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[5] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(val200[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val200[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 5))
+(val200[3] (T0 80) (T1 130) (TZ 0) (TX 0) (TB 0) (TC 3))
+(val200[4] (T0 70) (T1 140) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(value[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(value[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 5))
+(value[3] (T0 130) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 2))
+(value[4] (T0 140) (T1 70) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(val100[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val100[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 6))
+(val100[3] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 3))
+(val100[4] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[5] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[0] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 21))
+(val200[1] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val200[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 5))
+(val200[3] (T0 80) (T1 130) (TZ 0) (TX 0) (TB 0) (TC 3))
+(val200[4] (T0 60) (T1 150) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(value[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(value[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 5))
+(value[3] (T0 80) (T1 130) (TZ 0) (TX 0) (TB 0) (TC 3))
+(value[4] (T0 70) (T1 140) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[5] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[8] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(value[9] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(val100[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val100[2] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 6))
+(val100[3] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 4))
+(val100[4] (T0 50) (T1 160) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val100[5] (T0 190) (T1 20) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[6] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val100[10] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[0] (T0 100) (T1 110) (TZ 0) (TX 0) (TB 0) (TC 22))
+(val200[1] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 11))
+(val200[2] (T0 110) (T1 100) (TZ 0) (TX 0) (TB 0) (TC 5))
+(val200[3] (T0 130) (T1 80) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[4] (T0 60) (T1 150) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[5] (T0 60) (T1 150) (TZ 0) (TX 0) (TB 0) (TC 2))
+(val200[6] (T0 150) (T1 60) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[7] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+(val200[10] (T0 0) (T1 210) (TZ 0) (TX 0) (TB 0) (TC 1))
+)))
diff --git a/test_regress/t/t_interface_ref_trace_saif.py b/test_regress/t/t_interface_ref_trace_saif.py
new file mode 100755
index 000000000..3ebe41194
--- /dev/null
+++ b/test_regress/t/t_interface_ref_trace_saif.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2024 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+test.top_filename = "t/t_interface_ref_trace.v"
+
+test.compile(verilator_flags2=['--trace-structs --trace-saif'])
+
+test.execute()
+
+test.saif_identical(test.trace_filename, test.golden_filename)
+
+test.passes()