diff --git a/Changes b/Changes
index 6b9dd3ebc..f8b9c231f 100644
--- a/Changes
+++ b/Changes
@@ -23,6 +23,8 @@ indicates the contributor was also the author of the fix; Thanks!
 
 ***   Fix parameters not supported in constant functions, bug474. [Alex Solomatnikov]
 
+****  Fix signed extending biops with WIDTH warning off, bug511. [Junji Hashimoto]
+
 ****  Fix ITOD internal error on real conversions, bug491.  [Alex Solomatnikov]
 
 ****  Fix input and real loosing real data type, bug501.  [Alex Solomatnikov]
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index 1dda3c227..83df5b5f3 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -1053,7 +1053,7 @@ private:
     virtual void visit(AstDisplay* nodep, AstNUser*) {
 	if (nodep->filep()) {
 	    nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
-	    widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	    widthCheckFileDesc(nodep,nodep->filep());
 	}
 	// Just let all arguments seek their natural sizes
 	nodep->iterateChildren(*this,WidthVP(ANYSIZE,0,BOTH).p());
@@ -1062,21 +1062,21 @@ private:
 	nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
 	nodep->filenamep()->iterateAndNext(*this,WidthVP(ANYSIZE,0,BOTH).p());
 	nodep->modep()->iterateAndNext(*this,WidthVP(ANYSIZE,0,BOTH).p());
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstFClose* nodep, AstNUser*) {
 	nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstFEof* nodep, AstNUser*) {
 	nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
 	nodep->dtypeSetLogicSized(32,1,AstNumeric::SIGNED);  // Spec says integer return
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstFFlush* nodep, AstNUser*) {
 	if (nodep->filep()) {
 	    nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
-	    widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	    widthCheckFileDesc(nodep,nodep->filep());
 	}
     }
     virtual void visit(AstFGetC* nodep, AstNUser* vup) {
@@ -1084,7 +1084,7 @@ private:
 	if (vup->c()->prelim()) {
 	    nodep->dtypeSetLogicSized(32,8,AstNumeric::SIGNED);  // Spec says integer return
 	}
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstFGetS* nodep, AstNUser* vup) {
 	nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
@@ -1092,7 +1092,7 @@ private:
 	if (vup->c()->prelim()) {
 	    nodep->dtypeSetSigned32();  // Spec says integer return
 	}
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstFScanF* nodep, AstNUser* vup) {
 	nodep->filep()->iterateAndNext(*this,WidthVP(32,32,BOTH).p());
@@ -1100,7 +1100,7 @@ private:
 	if (vup->c()->prelim()) {
 	    nodep->dtypeSetSigned32();  // Spec says integer return
 	}
-	widthCheck(nodep,"file_descriptor",nodep->filep(),32,32);
+	widthCheckFileDesc(nodep,nodep->filep());
     }
     virtual void visit(AstSScanF* nodep, AstNUser* vup) {
 	nodep->fromp()->iterateAndNext(*this,WidthVP(ANYSIZE,0,BOTH).p());
@@ -1641,8 +1641,8 @@ private:
 		rhsOk = (mwidth >= (nodep->rhsp()->widthMin()));
 	    }
 	    // Error report and change sizes for suboperands of this node.
-	    widthCheck(nodep,"LHS",nodep->lhsp(),width,mwidth,lhsOk);
-	    widthCheck(nodep,"RHS",nodep->rhsp(),width,mwidth,rhsOk);
+	    widthCheck(nodep,"LHS",nodep->lhsp(),nodep->dtypep(),lhsOk);
+	    widthCheck(nodep,"RHS",nodep->rhsp(),nodep->dtypep(),rhsOk);
 	}
     }
 
@@ -1697,8 +1697,8 @@ private:
 		rhsOk = (mwidth >= (nodep->rhsp()->widthMin()));
 	    }
 	    // Error report and change sizes for suboperands of this node.
-	    widthCheck(nodep,"LHS",nodep->lhsp(),width,mwidth,lhsOk);
-	    widthCheck(nodep,"RHS",nodep->rhsp(),width,mwidth,rhsOk);
+	    widthCheck(nodep,"LHS",nodep->lhsp(),nodep->dtypep(),lhsOk);
+	    widthCheck(nodep,"RHS",nodep->rhsp(),nodep->dtypep(),rhsOk);
 	}
 	//if (debug()>=9) nodep->dumpTree(cout,"-rusou-");
     }
@@ -1763,7 +1763,7 @@ private:
 	    // Extend
 	    AstNRelinker linker;
 	    nodep->unlinkFrBack(&linker);
-	    AstNode* newp = (expDTypep->isSigned()
+	    AstNode* newp = ((expDTypep->isSigned() && nodep->isSigned())
 			     ? (new AstExtendS(nodep->fileline(), nodep))->castNode()
 			     : (new AstExtend (nodep->fileline(), nodep))->castNode());
 	    linker.relink(newp);
@@ -1821,6 +1821,10 @@ private:
 	return false; // No change
     }
 
+    void widthCheckFileDesc (AstNode* nodep, AstNode* underp) {
+	AstNodeDType* expDTypep = underp->findUInt32DType();
+	widthCheck(nodep,"file_descriptor",underp,expDTypep,false);
+    }
     void widthCheck (AstNode* nodep, const char* side,
 		     AstNode* underp, int expWidth, int expWidthMin,
 		     bool ignoreWarn=false) {
diff --git a/test_regress/t/t_math_signed.v b/test_regress/t/t_math_signed.v
index 794e17149..be5b7cfba 100644
--- a/test_regress/t/t_math_signed.v
+++ b/test_regress/t/t_math_signed.v
@@ -29,6 +29,15 @@ module t (/*AUTOARG*/
    reg 	[15:0] b_s;
    reg 	[15:0] b_us;
 
+   task check_s(input signed [7:0] i, input [7:0] expval);
+      //$display("check_s %x\n", i);
+      if (i !== expval) $stop;
+   endtask
+   task check_us(input signed [7:0] i, input [7:0] expval);
+      //$display("check_us %x\n", i);
+      if (i !== expval) $stop;
+   endtask
+
    always @* begin
       sr  = a>>b;
       srs = copy_signed(a)>>>b;
@@ -37,6 +46,10 @@ module t (/*AUTOARG*/
       // verilator lint_off WIDTH
       b_s  = b>>>4;		// Signed
       b_us = b[4:0]>>>4;	// Unsigned, due to extract
+      check_s ( 3'b111, 8'h07);
+      check_s (3'sb111, 8'hff);
+      check_us( 3'b111, 8'h07);
+      check_us(3'sb111, 8'hff); // Note we sign extend ignoring function's input requirements
       // verilator lint_on WIDTH
    end
 
diff --git a/test_regress/t/t_math_signed_wire.pl b/test_regress/t/t_math_signed_wire.pl
new file mode 100755
index 000000000..f91289753
--- /dev/null
+++ b/test_regress/t/t_math_signed_wire.pl
@@ -0,0 +1,18 @@
+#!/usr/bin/perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you can
+# redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+
+compile (
+    );
+
+execute (
+    check_finished=>1,
+    );
+
+ok(1);
+1;
diff --git a/test_regress/t/t_math_signed_wire.v b/test_regress/t/t_math_signed_wire.v
new file mode 100644
index 000000000..faa7e53c7
--- /dev/null
+++ b/test_regress/t/t_math_signed_wire.v
@@ -0,0 +1,53 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed into the Public Domain, for any use,
+// without warranty, 2012 by Wilson Snyder.
+
+// bug511
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+   input clk;
+
+   wire [7:0] au;
+   wire [7:0] as;
+
+   Test1 test1 (.au);
+   Test2 test2 (.as);
+
+   // Test loop
+   always @ (posedge clk) begin
+`ifdef TEST_VERBOSE
+      $write("[%0t] result=%x %x\n",$time, au, as);
+`endif
+      if (au != 'h12) $stop;
+      if (as != 'h02) $stop;
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule
+
+module Test1 (output [7:0] au);
+   wire [7:0] 		b;
+   wire signed [3:0] 	c;
+
+   // verilator lint_off WIDTH
+   assign c=-1;  // 'hf
+   assign b=3;   // 'h3
+   assign au=b+c; // 'h12
+   // verilator lint_on WIDTH
+endmodule
+
+
+module Test2 (output [7:0] as);
+   wire signed [7:0] 	b;
+   wire signed [3:0] 	c;
+
+   // verilator lint_off WIDTH
+   assign c=-1;  // 'hf
+   assign b=3;   // 'h3
+   assign as=b+c; // 'h12
+   // verilator lint_on WIDTH
+endmodule