From 2240f42bfa6d04a8fd8cfafa5300e7d9f642fd1a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 3 Dec 2019 06:26:17 -0500 Subject: [PATCH] Fix 64-bit signed power with -1. --- include/verilated.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/verilated.cpp b/include/verilated.cpp index 28ea5029e..13463c190 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -545,10 +545,10 @@ QData VL_POWSS_QQW(int obits, int, int rbits, QData lhs, WDataInP rwp, bool lsign, bool rsign) VL_MT_SAFE { // Skip check for rhs == 0, as short-circuit doesn't save time if (rsign && VL_SIGN_W(rbits, rwp)) { - if (lhs==0) return 0; // "X" - else if (lhs==1) return 1; - else if (lsign && lhs==VL_MASK_I(obits)) { // -1 - if (rwp[0] & 1) return VL_MASK_I(obits); // -1^odd=-1 + if (lhs == 0) return 0; // "X" + else if (lhs == 1) return 1; + else if (lsign && lhs == VL_MASK_Q(obits)) { // -1 + if (rwp[0] & 1) return VL_MASK_Q(obits); // -1^odd=-1 else return 1; // -1^even=1 } return 0;