diff --git a/Changes b/Changes
index a349b1dd8..e578fb38a 100644
--- a/Changes
+++ b/Changes
@@ -35,6 +35,7 @@ Verilator 5.041 devel
 * Fix address sanitizer issues (#6406). [Geza Lore]
 * Fix timing control under fork under function (#6407). [Krzysztof Bieganski, Antmicro Ltd.]
 * Fix memory leaks (#6411). [Geza Lore]
+* Fix parameter implicit type from string (#6414). [Alex Solomatnikov]
 
 
 Verilator 5.040 2025-08-30
diff --git a/src/V3Width.cpp b/src/V3Width.cpp
index e99dbb65b..dc2a997f9 100644
--- a/src/V3Width.cpp
+++ b/src/V3Width.cpp
@@ -2489,6 +2489,9 @@ class WidthVisitor final : public VNVisitor {
                 if (nodep->valuep()->isDouble()) {
                     nodep->dtypeSetDouble();
                     VL_DANGLING(bdtypep);
+                } else if (nodep->valuep()->isString()) {
+                    nodep->dtypeSetString();
+                    VL_DANGLING(bdtypep);
                 } else {
                     int width = 0;
                     const AstBasicDType* const valueBdtypep = nodep->valuep()->dtypep()->basicp();
diff --git a/test_regress/t/t_param_implicit_string.py b/test_regress/t/t_param_implicit_string.py
new file mode 100755
index 000000000..f989a35fb
--- /dev/null
+++ b/test_regress/t/t_param_implicit_string.py
@@ -0,0 +1,18 @@
+#!/usr/bin/env python3
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2025 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+import vltest_bootstrap
+
+test.scenarios('simulator')
+
+test.compile()
+
+test.execute()
+
+test.passes()
diff --git a/test_regress/t/t_param_implicit_string.v b/test_regress/t/t_param_implicit_string.v
new file mode 100644
index 000000000..43f958bb7
--- /dev/null
+++ b/test_regress/t/t_param_implicit_string.v
@@ -0,0 +1,24 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2025 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+// verilog_format: off
+`define stop $stop
+`define checks(gotv,expv) do if ((gotv) != (expv)) begin $write("%%Error: %s:%0d:  got='%s' exp='%s'\n", `__FILE__,`__LINE__, (gotv), (expv)); `stop; end while(0);
+// verilog_format: on
+
+module t;
+  sub u_sub ();
+endmodule
+
+module sub #(
+    parameter INDEX = 4096
+);
+  parameter STRG = $sformatf("stringed[%0d]", INDEX);
+  initial begin
+    `checks(STRG, "stringed[4096]");
+    $finish;
+  end
+endmodule