From 1fc3771cf3293d7b49ced0aa443f1b9f5eb4b77e Mon Sep 17 00:00:00 2001
From: Yilou Wang <wangyilou123@gmail.com>
Date: Sat, 4 Jul 2026 13:35:36 +0200
Subject: [PATCH] fix ci dist test

---
 test_regress/t/t_assert_seq_event_unsup.out |  4 ++++
 test_regress/t/t_assert_seq_event_unsup.v   | 10 ++++++++++
 2 files changed, 14 insertions(+)

diff --git a/test_regress/t/t_assert_seq_event_unsup.out b/test_regress/t/t_assert_seq_event_unsup.out
index cb9b5e11b..4d77a1c85 100644
--- a/test_regress/t/t_assert_seq_event_unsup.out
+++ b/test_regress/t/t_assert_seq_event_unsup.out
@@ -3,4 +3,8 @@
    18 |     @(g) a ##1 b;
       |     ^
                     ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error-UNSUPPORTED: t/t_assert_seq_event_unsup.v:21:12: Unsupported: sequence referenced outside assertion property
+                                                      : ... note: In instance 't'
+   21 |   sequence s_ref;
+      |            ^~~~~
 %Error: Exiting due to
diff --git a/test_regress/t/t_assert_seq_event_unsup.v b/test_regress/t/t_assert_seq_event_unsup.v
index a967b3330..0a39d3734 100644
--- a/test_regress/t/t_assert_seq_event_unsup.v
+++ b/test_regress/t/t_assert_seq_event_unsup.v
@@ -17,8 +17,18 @@ module t (
   sequence s_nonedge;
     @(g) a ##1 b;
   endsequence
+
+  sequence s_ref;
+    @(posedge clk) a;
+  endsequence
   // verilog_format: on
 
+  // Legal: p is never asserted, so s_ref stays referenced outside any
+  // assertion property, which is not yet supported.
+  property p;
+    s_ref;
+  endproperty
+
   initial begin
     @s_nonedge;
   end