diff --git a/docs/guide/exe_verilator_coverage.rst b/docs/guide/exe_verilator_coverage.rst index 142531cd7..ddfd8aa93 100644 --- a/docs/guide/exe_verilator_coverage.rst +++ b/docs/guide/exe_verilator_coverage.rst @@ -61,7 +61,7 @@ data should be written. Points are children of each line coverage- branches or toggle points. When point counts are aggregated into a line, the minimum and maximum counts are used to determine the status of the line (complete, partial, failing) -The count is equal to the minimum of the points. +The count is equal to the maximum of the points. Coverage data is annotated at the beginning of the line and is formatted as a special character followed by the number of coverage hits. The special @@ -84,7 +84,7 @@ to filter the report. // number of hits (0) is below the min. -000000 point: comment=b // Begins with -, because // number of hits (0) is below the min. - ~000000 if (cyc!=0) begin // Begins with ~, because + ~000010 if (cyc!=0) begin // Begins with ~, because // branches are below and above the min. +000010 point: comment=if // The if branch is above the min. -000000 point: comment=else // The else branch is below the min. diff --git a/src/VlcTop.cpp b/src/VlcTop.cpp index a7927a332..55a5753e7 100644 --- a/src/VlcTop.cpp +++ b/src/VlcTop.cpp @@ -120,7 +120,7 @@ void VlcTop::writeInfo(const string& filename) { int branchesHit = 0; for (auto& li : lines) { VlcSourceCount& sc = li.second; - os << "DA:" << sc.lineno() << "," << sc.minCount() << "\n"; + os << "DA:" << sc.lineno() << "," << sc.maxCount() << "\n"; int num_branches = sc.points().size(); if (num_branches == 1) continue; branchesFound += num_branches; @@ -319,7 +319,7 @@ void VlcTop::annotateOutputFiles(const string& dirname) { } else { os << "%"; } - os << std::setfill('0') << std::setw(6) << sc.minCount() << " " << line << '\n'; + os << std::setfill('0') << std::setw(6) << sc.maxCount() << " " << line << '\n'; if (opt.annotatePoints()) { for (auto& pit : sc.points()) pit->dumpAnnotate(os, opt.annotateMin()); diff --git a/test_regress/t/t_cover_line.out b/test_regress/t/t_cover_line.out index 21c0e9b24..f600625a3 100644 --- a/test_regress/t/t_cover_line.out +++ b/test_regress/t/t_cover_line.out @@ -49,7 +49,7 @@ 000010 always @ (posedge clk) begin +000010 point: comment=block -~000000 if (cyc!=0) begin +~000010 if (cyc!=0) begin +000010 point: comment=if -000000 point: comment=else 000010 cyc <= cyc + 1; @@ -57,10 +57,10 @@ 000010 toggle <= '0; +000010 point: comment=if // Single and multiline if -%000001 if (cyc==3) $write(""); +%000009 if (cyc==3) $write(""); -000001 point: comment=if -000009 point: comment=else -%000001 if (cyc==3) +%000009 if (cyc==3) -000001 point: comment=if -000009 point: comment=else %000001 begin @@ -69,10 +69,10 @@ -000001 point: comment=if end // Single and multiline else -%000001 if (cyc==3) ; else $write(""); +%000009 if (cyc==3) ; else $write(""); -000001 point: comment=if -000009 point: comment=else -%000001 if (cyc==3) ; +%000009 if (cyc==3) ; -000001 point: comment=if -000009 point: comment=else else @@ -82,10 +82,10 @@ -000009 point: comment=else end // Single and multiline if else -%000001 if (cyc==3) $write(""); else $write(""); +%000009 if (cyc==3) $write(""); else $write(""); -000001 point: comment=if -000009 point: comment=else -%000001 if (cyc==3) +%000009 if (cyc==3) -000001 point: comment=if -000009 point: comment=else %000001 begin @@ -114,7 +114,7 @@ %000001 $write(""); -000001 point: comment=elsif end -%000001 else if (cyc==5) +%000007 else if (cyc==5) -000001 point: comment=if -000007 point: comment=else %000001 begin @@ -138,10 +138,10 @@ end %000000 do ; while (0); -000000 point: comment=block -~000000 do begin +~000010 do begin +000010 point: comment=if -000000 point: comment=block -~000000 $write(""); +~000010 $write(""); +000010 point: comment=if -000000 point: comment=block %000000 end while (0); @@ -162,7 +162,7 @@ call_task(); `endif end -%000001 else if (cyc==10) begin +%000007 else if (cyc==10) begin -000001 point: comment=if -000007 point: comment=else %000001 $write("*-* All Finished *-*\n"); @@ -190,7 +190,7 @@ input toggle; 000020 always @ (posedge clk) begin +000020 point: comment=block -~000002 if (toggle) begin // CHECK_COVER(0,"top.t.a*",2) +~000018 if (toggle) begin // CHECK_COVER(0,"top.t.a*",2) -000002 point: comment=if +000018 point: comment=else %000002 $write(""); @@ -221,14 +221,14 @@ +000020 point: comment=block 000020 $write(""); // Always covered +000020 point: comment=block -~000000 if (0) begin // CHECK_COVER(0,"top.t.b*",0) +~000020 if (0) begin // CHECK_COVER(0,"top.t.b*",0) -000000 point: comment=if +000020 point: comment=else // Make sure that we don't optimize away zero buckets %000000 $write(""); -000000 point: comment=if end -~000002 if (toggle) begin // CHECK_COVER(0,"top.t.b*",2) +~000018 if (toggle) begin // CHECK_COVER(0,"top.t.b*",2) -000002 point: comment=if +000018 point: comment=else // t.b1 and t.b2 collapse to a count of 2 @@ -254,7 +254,7 @@ -000001 point: comment=block %000001 m_toggle = toggle; -000001 point: comment=block -%000000 if (m_toggle) begin // CHECK_COVER(0,"top.$unit::Cls",1) +%000001 if (m_toggle) begin // CHECK_COVER(0,"top.$unit::Cls",1) -000001 point: comment=if -000000 point: comment=else %000001 $write(""); @@ -263,7 +263,7 @@ endfunction 000011 static function void fstatic(bit toggle); +000011 point: comment=block -~000000 if (1) begin // CHECK_COVER(0,"top.$unit::Cls",1) +~000011 if (1) begin // CHECK_COVER(0,"top.$unit::Cls",1) +000011 point: comment=if -000000 point: comment=else 000011 $write(""); @@ -272,7 +272,7 @@ endfunction 000011 function void fauto(); +000011 point: comment=block -~000000 if (m_toggle) begin // CHECK_COVER(0,"top.$unit::Cls",1) +~000011 if (m_toggle) begin // CHECK_COVER(0,"top.$unit::Cls",1) +000011 point: comment=if -000000 point: comment=else 000011 $write(""); @@ -301,13 +301,13 @@ input external; 000011 begin +000011 point: comment=block -~000001 if (toggle) begin // CHECK_COVER(0,"top.t.t1",1) +~000010 if (toggle) begin // CHECK_COVER(0,"top.t.t1",1) -000001 point: comment=if +000010 point: comment=else %000001 $write(""); -000001 point: comment=if end -~000001 if (external) begin // CHECK_COVER(0,"top.t.t1",1) +~000010 if (external) begin // CHECK_COVER(0,"top.t.t1",1) -000001 point: comment=if +000010 point: comment=else %000001 $write("[%0t] Got external pulse\n", $time); @@ -344,13 +344,13 @@ // verilator coverage_on 000010 always @ (posedge clk) begin +000010 point: comment=block -%000001 if (toggle) begin +%000009 if (toggle) begin -000001 point: comment=if -000009 point: comment=else // because under coverage_module_off %000001 $write(""); -000001 point: comment=if -%000000 if (0) ; // CHECK_COVER(0,"top.t.o1",1) +%000001 if (0) ; // CHECK_COVER(0,"top.t.o1",1) -000000 point: comment=if -000001 point: comment=else end diff --git a/test_regress/t/t_cover_line_cc.info.out b/test_regress/t/t_cover_line_cc.info.out index 23d6cad0f..0747be667 100644 --- a/test_regress/t/t_cover_line_cc.info.out +++ b/test_regress/t/t_cover_line_cc.info.out @@ -3,31 +3,31 @@ SF:t/t_cover_line.v DA:15,1 DA:18,1 DA:47,10 -DA:48,0 +DA:48,10 BRDA:48,0,0,10 BRDA:48,0,1,0 DA:49,10 DA:50,10 -DA:52,1 +DA:52,9 BRDA:52,0,0,1 BRDA:52,0,1,9 -DA:53,1 +DA:53,9 BRDA:53,0,0,1 BRDA:53,0,1,9 DA:54,1 DA:55,1 -DA:58,1 +DA:58,9 BRDA:58,0,0,1 BRDA:58,0,1,9 -DA:59,1 +DA:59,9 BRDA:59,0,0,1 BRDA:59,0,1,9 DA:61,9 DA:62,9 -DA:65,1 +DA:65,9 BRDA:65,0,0,1 BRDA:65,0,1,9 -DA:66,1 +DA:66,9 BRDA:66,0,0,1 BRDA:66,0,1,9 DA:67,1 @@ -40,7 +40,7 @@ DA:77,1 DA:79,1 DA:80,1 DA:81,1 -DA:83,1 +DA:83,7 BRDA:83,0,0,1 BRDA:83,0,1,7 DA:84,1 @@ -51,10 +51,10 @@ DA:92,0 DA:93,0 DA:94,0 DA:96,0 -DA:97,0 +DA:97,10 BRDA:97,0,0,10 BRDA:97,0,1,0 -DA:98,0 +DA:98,10 BRDA:98,0,0,10 BRDA:98,0,1,0 DA:99,0 @@ -62,7 +62,7 @@ DA:102,1 DA:103,1 DA:105,1 DA:107,1 -DA:112,1 +DA:112,7 BRDA:112,0,0,1 BRDA:112,0,1,7 DA:113,1 @@ -70,35 +70,35 @@ DA:114,1 DA:119,1 DA:121,1 DA:132,20 -DA:133,2 +DA:133,18 BRDA:133,0,0,2 BRDA:133,0,1,18 DA:134,2 DA:137,18 DA:156,20 DA:157,20 -DA:158,0 +DA:158,20 BRDA:158,0,0,0 BRDA:158,0,1,20 DA:160,0 -DA:162,2 +DA:162,18 BRDA:162,0,0,2 BRDA:162,0,1,18 DA:164,2 DA:166,18 DA:180,1 DA:181,1 -DA:182,0 +DA:182,1 BRDA:182,0,0,1 BRDA:182,0,1,0 DA:183,1 DA:186,11 -DA:187,0 +DA:187,11 BRDA:187,0,0,11 BRDA:187,0,1,0 DA:188,11 DA:191,11 -DA:192,0 +DA:192,11 BRDA:192,0,0,11 BRDA:192,0,1,0 DA:193,11 @@ -106,11 +106,11 @@ DA:207,10 DA:208,10 DA:211,11 DA:213,11 -DA:214,1 +DA:214,10 BRDA:214,0,0,1 BRDA:214,0,1,10 DA:215,1 -DA:217,1 +DA:217,10 BRDA:217,0,0,1 BRDA:217,0,1,10 DA:218,1 @@ -119,11 +119,11 @@ DA:222,1 DA:223,11 DA:224,11 DA:245,10 -DA:246,1 +DA:246,9 BRDA:246,0,0,1 BRDA:246,0,1,9 DA:248,1 -DA:249,0 +DA:249,1 BRDA:249,0,0,0 BRDA:249,0,1,1 BRF:42 diff --git a/test_regress/t/t_cover_toggle.out b/test_regress/t/t_cover_toggle.out index a6c3482ed..065e014a0 100644 --- a/test_regress/t/t_cover_toggle.out +++ b/test_regress/t/t_cover_toggle.out @@ -34,10 +34,10 @@ const reg aconst = '0; -%000000 reg [1:0][1:0] ptoggle; initial ptoggle=0; +%000002 reg [1:0][1:0] ptoggle; initial ptoggle=0; integer cyc; initial cyc=1; -~000000 wire [7:0] cyc_copy = cyc[7:0]; +~000011 wire [7:0] cyc_copy = cyc[7:0]; %000002 wire toggle_up; typedef struct { @@ -70,7 +70,7 @@ .clk (clk), .toggle (toggle)); -%000000 reg [1:0] memory[121:110]; +%000001 reg [1:0] memory[121:110]; wire [1023:0] largeish = {992'h0, cyc}; // CHECK_COVER_MISSING(-1) @@ -116,7 +116,7 @@ // CHECK_COVER(-1,"top.t.a*",4) // 2 edges * (t.a1 and t.a2) -~000000 input [7:0] cyc_copy; +~000022 input [7:0] cyc_copy; // CHECK_COVER(-1,"top.t.a*","cyc_copy[0]",22) // CHECK_COVER(-2,"top.t.a*","cyc_copy[1]",10) // CHECK_COVER(-3,"top.t.a*","cyc_copy[2]",4) diff --git a/test_regress/t/t_cover_toggle_min.info.out b/test_regress/t/t_cover_toggle_min.info.out index 5b96fc438..a5581bcd2 100644 --- a/test_regress/t/t_cover_toggle_min.info.out +++ b/test_regress/t/t_cover_toggle_min.info.out @@ -1,12 +1,12 @@ TN:verilator_coverage SF:t/t_cover_toggle_min.v -DA:10,0 +DA:10,1 BRDA:10,0,0,1 BRDA:10,0,1,0 -DA:11,0 +DA:11,1 BRDA:11,0,0,0 BRDA:11,0,1,1 -DA:12,1 +DA:12,2 BRDA:12,0,0,2 BRDA:12,0,1,1 BRF:6 diff --git a/test_regress/t/t_cover_toggle_points.out b/test_regress/t/t_cover_toggle_points.out index 5267c11d9..2154b19f1 100644 --- a/test_regress/t/t_cover_toggle_points.out +++ b/test_regress/t/t_cover_toggle_points.out @@ -40,14 +40,14 @@ const reg aconst = '0; -%000000 reg [1:0][1:0] ptoggle; initial ptoggle=0; +%000002 reg [1:0][1:0] ptoggle; initial ptoggle=0; -000002 point: comment=ptoggle[0][0] -000000 point: comment=ptoggle[0][1] -000000 point: comment=ptoggle[1][0] -000000 point: comment=ptoggle[1][1] integer cyc; initial cyc=1; -~000000 wire [7:0] cyc_copy = cyc[7:0]; +~000011 wire [7:0] cyc_copy = cyc[7:0]; +000011 point: comment=cyc_copy[0] -000005 point: comment=cyc_copy[1] -000002 point: comment=cyc_copy[2] @@ -89,7 +89,7 @@ .clk (clk), .toggle (toggle)); -%000000 reg [1:0] memory[121:110]; +%000001 reg [1:0] memory[121:110]; -000001 point: comment=memory[110][0] -000000 point: comment=memory[110][1] -000000 point: comment=memory[111][0] @@ -161,7 +161,7 @@ // CHECK_COVER(-1,"top.t.a*",4) // 2 edges * (t.a1 and t.a2) -~000000 input [7:0] cyc_copy; +~000022 input [7:0] cyc_copy; +000022 point: comment=cyc_copy[0] +000010 point: comment=cyc_copy[1] -000004 point: comment=cyc_copy[2] diff --git a/test_regress/t/t_vlcov_info.info.out b/test_regress/t/t_vlcov_info.info.out index 198c520fe..9e041cf5f 100644 --- a/test_regress/t/t_vlcov_info.info.out +++ b/test_regress/t/t_vlcov_info.info.out @@ -1,6 +1,6 @@ TN:verilator_coverage SF:file1.sp -DA:159,0 +DA:159,22 BRDA:159,0,0,0 BRDA:159,0,1,1 BRDA:159,0,2,20