diff --git a/bin/verilator b/bin/verilator
index 92f6269aa..49b67c1a0 100755
--- a/bin/verilator
+++ b/bin/verilator
@@ -407,7 +407,7 @@ compatibility.
 
 =item --psl
 
-Enable PSL parsing.  Without this switch, psl meta-comments are ignored.
+Enable PSL parsing.  Without this switch, PSL meta-comments are ignored.
 See the --assert flag to enable all assertions, and --coverage-user to
 enable functional coverage.
 
@@ -609,7 +609,7 @@ Then we convert the SystemPerl output to SystemC.
     $SYSTEMPERL/sp_preproc --preproc *.sp
 
 (You can also skip the above sp_preproc by getting pure SystemC from
-verilator by replacing the verilator --sp flag in the previous step with
+Verilator by replacing the verilator --sp flag in the previous step with
 -sc.)
 
 We then can compile it
@@ -938,7 +938,7 @@ call C++ functions from your Verilog code.
 String arguments will be put directly into the output C++ code.  Expression
 arguments will have the code to evaluate the expression inserted.  Thus to
 call a C++ function, $c("func(",a,")") will result in 'func(a)' in the
-output C++ code.  For input arguments, rather then hardcoding variable
+output C++ code.  For input arguments, rather then hard-coding variable
 names in the string $c("func(a)"), instead pass the variable as an
 expression $c("func(",a,")").  This will allow the call to work inside
 Verilog functions where the variable is flattened out, and also enable
@@ -1364,6 +1364,29 @@ Warns that the specified signal comes from multiple always blocks.  This is
 often unsupported by synthesis tools, and is considered bad style.  It will
 also cause longer runtimes due to reduced optimizations.
 
+=item TASKNSVAR
+
+Error when a call to a task or function has a output from that task tied to
+a non-simple signal.  Instead connect the task output to a temporary signal
+of the appropriate width, and use that signal to set the appropriate
+expression as the next statement.  For example:
+
+      task foo; output sig; ... endtask
+      always @* begin
+           foo(bus_we_select_from[2]);   // Will get TASKNSVAR error
+      end
+
+Change this to:
+
+      reg foo_temp_out;
+      always @* begin
+           foo(foo_temp_out);
+           bus_we_select_from[2] = foo_temp_out;
+      end
+
+Verilator doesn't do this conversion for you, as some more complicated
+cases would result in simulator mismatches.
+
 =item UNDRIVEN
 
 Warns that the specified signal is never sourced.
diff --git a/src/V3Error.cpp b/src/V3Error.cpp
index 7cac825bc..bc7d11286 100644
--- a/src/V3Error.cpp
+++ b/src/V3Error.cpp
@@ -92,7 +92,7 @@ void FileLine::lineDirective(const char* textp) {
 
 bool FileLine::warnOff(const string& msg, bool flag) {
     V3ErrorCode code (msg.c_str());
-    if (code == V3ErrorCode::ERROR) {
+    if (code < V3ErrorCode::FIRST_WARN) {
 	return false;
     } else {
 	warnOff(code, flag);
@@ -203,8 +203,9 @@ void V3Error::abortIfErrors() {
 string V3Error::msgPrefix(V3ErrorCode code) {
     if (code==V3ErrorCode::SUPPRESS) return "-arning-suppressed: ";
     else if (code==V3ErrorCode::FATAL) return "%Error: ";
-    else if (code==V3ErrorCode::ERROR
-	     || s_pretendError[code]) return "%Error: ";
+    else if (code==V3ErrorCode::ERROR) return "%Error: ";
+    else if (code<V3ErrorCode::FIRST_WARN
+	     || s_pretendError[code]) return "%Error-"+(string)code.ascii()+": ";
     else return "%Warning-"+(string)code.ascii()+": ";
 }
 
diff --git a/src/V3Error.h b/src/V3Error.h
index 3f2c25798..ce49ee601 100644
--- a/src/V3Error.h
+++ b/src/V3Error.h
@@ -34,9 +34,12 @@ public:
     enum en {
 	SUPPRESS,	// Warning suppressed by user
 	FATAL,		// Kill the program
-	ERROR,		// Error out, can't suppress
+	ERROR,		// General error out, can't suppress
+	// Error codes:
+	TASKNSVAR,	// Error: Task I/O not simple
 	// Warning codes:
 	FIRST_WARN,	// Just a code so the program knows where to start warnings
+	//
 	BLKANDNBLK,	// Blocked and non-blocking assignments to same variable
 	CASEINCOMPLETE,	// Case statement has missing values
 	CASEOVERLAP,	// Case statements overlap
@@ -67,6 +70,7 @@ public:
 	const char* names[] = {
 	    // Leading spaces indicate it can't be disabled.
 	    " SUPPRESS", " FATAL", " ERROR",
+	    "TASKNSVAR",
 	    " FIRST_WARN",
 	    "BLKANDNBLK",
 	    "CASEINCOMPLETE", "CASEOVERLAP", "CASEX", "CMPCONST",
@@ -82,7 +86,7 @@ public:
     bool dangerous() const { return ( m_e==COMBDLY );};
     // Warnings we'll present to the user as errors
     // Later -Werror- options may make more of these.
-    bool pretendError() const { return ( m_e==BLKANDNBLK || m_e==IMPURE );};
+    bool pretendError() const { return ( m_e==BLKANDNBLK || m_e==IMPURE); };
   };
   inline bool operator== (V3ErrorCode lhs, V3ErrorCode rhs) { return (lhs.m_e == rhs.m_e); }
   inline bool operator== (V3ErrorCode lhs, V3ErrorCode::en rhs) { return (lhs.m_e == rhs); }
diff --git a/src/V3Task.cpp b/src/V3Task.cpp
index 75714b1bb..c491699dd 100644
--- a/src/V3Task.cpp
+++ b/src/V3Task.cpp
@@ -348,7 +348,7 @@ private:
 				AstVarScope* localVscp = varrefp->varScopep(); if (!localVscp) varrefp->v3fatalSrc("Null var scope");
 				portp->user2p(localVscp);
 			    } else {
-				pinp->v3error("Unsupported: Function/task input argument is not simple variable");
+				pinp->v3warn(TASKNSVAR,"Unsupported: Function/task input argument is not simple variable");
 			    }
 			}
 			else if (portp->isOutput() && outvscp) {
@@ -360,7 +360,7 @@ private:
 			    if (AstVarRef* varrefp = pinp->castVarRef()) {
 				varrefp->lvalue(true);
 			    } else {
-				pinp->v3error("Unsupported: Task output pin connected to non-variable");
+				pinp->v3warn(TASKNSVAR,"Unsupported: Task output pin connected to non-variable");
 			    }
 			    // Even if it's referencing a varref, we still make a temporary
 			    // Else task(x,x,x) might produce incorrect results
@@ -436,7 +436,7 @@ private:
 			    if (pinp->castVarRef()) {
 				// Connect to this exact variable
 			    } else {
-				pinp->v3error("Unsupported: Function/task input argument is not simple variable");
+				pinp->v3warn(TASKNSVAR,"Unsupported: Function/task input argument is not simple variable");
 			    }
 			}
 			else if (portp->isOutput()) {
@@ -445,7 +445,7 @@ private:
 			    if (AstVarRef* varrefp = pinp->castVarRef()) {
 				varrefp->lvalue(true);
 			    } else {
-				pinp->v3error("Unsupported: Task output pin connected to non-variable");
+				pinp->v3warn(TASKNSVAR,"Unsupported: Task output pin connected to non-variable");
 			    }
 			}
 		    }
diff --git a/test_regress/t/t_math_div.v b/test_regress/t/t_math_div.v
index e5988b60f..d34d87902 100644
--- a/test_regress/t/t_math_div.v
+++ b/test_regress/t/t_math_div.v
@@ -39,7 +39,6 @@ module t (/*AUTOARG*/
 	    a <= 256'h0e17c88f3d5fe51a982646c8e2bd68c3e236ddfddddbdad20a48e039c9f395b8;
 	    divisor <= 61'h1238123771;
 	    a[60] <= 1'b0; divisor[60] <= 1'b0;  // Unsigned
-//$display("FIX");
 	    if (qq!==61'h00000403ad81c0da) $stop;
 	    if (rq!==61'h00000000000090ec) $stop;
 	    if (qqs!==61'h00000403ad81c0da) $stop;