diff --git a/test_regress/t/t_enum_enumvalue_struct_bad.out b/test_regress/t/t_enum_enumvalue_struct_bad.out new file mode 100644 index 000000000..a82c52222 --- /dev/null +++ b/test_regress/t/t_enum_enumvalue_struct_bad.out @@ -0,0 +1,7 @@ +%Error-ENUMVALUE: t/t_enum_enumvalue_struct_bad.v:21:33: Implicit conversion to enum 'MEMBERDTYPE 'a'' from 'logic[31:0]' (IEEE 1800-2017 6.19.3) + : ... note: In instance 't' + : ... Suggest use enum's mnemonic, or static cast + 21 | localparam foo_t FOO0 = '{a: 0, b: 1'b1, u: 1'b1}; + | ^ + ... For error description see https://verilator.org/warn/ENUMVALUE?v=latest +%Error: Exiting due to diff --git a/test_regress/t/t_enum_enumvalue_struct_bad.pl b/test_regress/t/t_enum_enumvalue_struct_bad.pl new file mode 100755 index 000000000..58225a99e --- /dev/null +++ b/test_regress/t/t_enum_enumvalue_struct_bad.pl @@ -0,0 +1,19 @@ +#!/usr/bin/env perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2021 by Wilson Snyder. This program is free software; you +# can redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0 + +scenarios(linter => 1); + +lint( + expect_filename => $Self->{golden_filename}, + fails => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_enum_enumvalue_struct_bad.v b/test_regress/t/t_enum_enumvalue_struct_bad.v new file mode 100644 index 000000000..9b456763f --- /dev/null +++ b/test_regress/t/t_enum_enumvalue_struct_bad.v @@ -0,0 +1,37 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed under the Creative Commons Public Domain, for +// any use, without warranty, 2021 by Wilson Snyder. +// SPDX-License-Identifier: CC0-1.0 + +// See issue #2855 + +package Pkg; + + typedef enum int unsigned { + MODE10 = 10 + } mode_t; + + typedef struct packed { + bit u; + mode_t a; + bit b; + } foo_t; + + localparam foo_t FOO0 = '{a: 0, b: 1'b1, u: 1'b1}; + + localparam foo_t FOO1 = '{a: MODE10, b: 1'b1, u: 1'b1}; + +endpackage + +module t(/*AUTOARG*/); + + initial begin + //if (sum !== `EXPECTED_SUM) $stop; + if (Pkg::FOO0 != {1'b1, 32'd0, 1'b1}) $stop; + if (Pkg::FOO1 != {1'b1, 32'd10, 1'b1}) $stop; + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule