diff --git a/Changes b/Changes
index d27e160fb..f94b253f8 100644
--- a/Changes
+++ b/Changes
@@ -5,6 +5,8 @@ The contributors that suggested a given feature are shown in []. Thanks!
* Verilator 4.007 devel
+*** In --xml-only show the original unmodified names, msg2716. [Kanad Kanhere]
+
**** Fix --trace-lxt2 compile error on MinGW, msg2711. [HyungKi Jeong]
diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp
index dc7134d0b..fe03f4824 100644
--- a/src/V3EmitXml.cpp
+++ b/src/V3EmitXml.cpp
@@ -99,6 +99,7 @@ class EmitXmlFileVisitor : public AstNVisitor {
virtual void visit(AstCell* nodep) {
outputTag(nodep, "instance"); // IEEE: vpiInstance
puts(" defName="); putsQuoted(nodep->modName()); // IEEE vpiDefName
+ puts(" origName="); putsQuoted(nodep->origName());
outputChildrenEnd(nodep, "instance");
}
virtual void visit(AstNetlist* nodep) {
@@ -108,10 +109,16 @@ class EmitXmlFileVisitor : public AstNVisitor {
}
virtual void visit(AstNodeModule* nodep) {
outputTag(nodep, "");
+ puts(" origName="); putsQuoted(nodep->origName());
if (nodep->level()==1 || nodep->level()==2) // ==2 because we don't add wrapper when in XML mode
puts(" topModule=\"1\""); // IEEE vpiTopModule
outputChildrenEnd(nodep, "");
}
+ virtual void visit(AstVar* nodep) {
+ outputTag(nodep, "");
+ puts(" origName="); putsQuoted(nodep->origName());
+ outputChildrenEnd(nodep, "");
+ }
virtual void visit(AstPin* nodep) {
// What we call a pin in verilator is a port in the IEEE spec.
outputTag(nodep, "port"); // IEEE: vpiPort
diff --git a/test_regress/t/t_xml_first.out b/test_regress/t/t_xml_first.out
index 76575f0ca..17ea974d8 100644
--- a/test_regress/t/t_xml_first.out
+++ b/test_regress/t/t_xml_first.out
@@ -10,12 +10,12 @@
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@@ -26,7 +26,7 @@
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@@ -38,10 +38,10 @@
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@@ -54,10 +54,10 @@
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diff --git a/test_regress/t/t_xml_tag.out b/test_regress/t/t_xml_tag.out
index 245e7c760..e23100ee6 100644
--- a/test_regress/t/t_xml_tag.out
+++ b/test_regress/t/t_xml_tag.out
@@ -10,12 +10,12 @@
-
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