diff --git a/src/V3OrderGraph.h b/src/V3OrderGraph.h
index 127253002..fb1fa67dc 100644
--- a/src/V3OrderGraph.h
+++ b/src/V3OrderGraph.h
@@ -1,6 +1,6 @@
 // -*- mode: C++; c-file-style: "cc-mode" -*-
 //*************************************************************************
-// DESCRIPTION: Verilator: Block code ordering
+// DESCRIPTION: Verilator: Ordering constraint graph
 //
 // Code available from: https://verilator.org
 //
diff --git a/src/verilog.y b/src/verilog.y
index 3eba4ed3b..c6a7048de 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -302,11 +302,12 @@ int V3ParseGrammar::s_modTypeImpNum = 0;
 
 #define APPLY_STRENGTH_TO_LIST(beginp, strengthSpecNodep, typeToCast) \
     { \
-        if (AstStrengthSpec* specp = VN_CAST(strengthSpecNodep, StrengthSpec)) \
+        if (AstStrengthSpec* specp = VN_CAST(strengthSpecNodep, StrengthSpec)) { \
             for (auto* nodep = beginp; nodep; nodep = nodep->nextp()) { \
                 auto* const assignp = VN_AS(nodep, typeToCast); \
                 assignp->strengthSpecp(nodep == beginp ? specp : specp->cloneTree(false)); \
             } \
+        } \
     }
 
 static void ERRSVKWD(FileLine* fileline, const string& tokname) {