diff --git a/src/verilog.y b/src/verilog.y index 2869cb3ad..52618d9b9 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -111,6 +111,7 @@ class AstSenTree; AstCase* casep; AstCaseItem* caseitemp; AstConst* constp; + AstFuncRef* funcrefp; AstModule* modulep; AstPin* pinp; AstRange* rangep; @@ -250,6 +251,7 @@ class AstSenTree; %type lhIdVarRef %type lhIdVarXRef %type taskRef +%type funcRef %type idRanged lhIdRanged %type idArrayed lhIdArrayed %type strAsInt strAsText lhConcIdList @@ -800,8 +802,7 @@ exprNoStr: expr yOROR expr { $$ = new AstLogOr ($2,$1,$3); } | yD_TIME { $$ = new AstTime($1); } | yD_UNSIGNED '(' expr ')' { $$ = new AstUnsigned($1,$3); } - | yID '(' eList ')' { $$ = new AstFuncRef($2,*$1,"",$3); } - | pathDotted '.' yID '(' eList ')' { $$ = new AstFuncRef($4,*$3,*$1,$5); } + | funcRef { $$ = $1; } | yINTNUM { $$ = new AstConst(CRELINE(),*$1); } @@ -983,6 +984,10 @@ taskRef: yID { $$ = new AstTaskRef(CRELINE(),*$1,"",NULL);} | pathDotted '.' yID '(' eList ')' { $$ = new AstTaskRef(CRELINE(),*$3,*$1,$5);} ; +funcRef: yID '(' eList ')' { $$ = new AstFuncRef($2,*$1,"",$3); } + | pathDotted '.' yID '(' eList ')' { $$ = new AstFuncRef($4,*$3,*$1,$5); } + ; + idArrayed: idVarXRef { $$ = $1; } | idArrayed '[' expr ']' { $$ = new AstSelBit($2,$1,$3); } // Or AstArraySel, don't know yet. ;