diff --git a/test_regress/driver.py b/test_regress/driver.py index 19e325aff..93040ee28 100755 --- a/test_regress/driver.py +++ b/test_regress/driver.py @@ -451,7 +451,7 @@ class Runner: makecmd = VtOs.getenv_def('VERILATOR_MAKE', os.environ['MAKE']) + " &&" upperdir = 'test_regress/' if re.search(r'test_regress', os.getcwd()) else '' self.fail_msgs.append("\t#" + test.soprint("%Error: " + error_msg) + "\t\t" + makecmd + - " " + upperdir + test.py_filename + + " " + upperdir + test.py_filename + ' ' + ' '.join(self._manual_args()) + " --" + test.scenario + "\n") self.fail_tests.append(test) self.fail_cnt += 1 diff --git a/test_regress/t/t_timing_fork_comb.py b/test_regress/t/t_timing_fork_comb.py index 421aad299..cf21ef4d2 100755 --- a/test_regress/t/t_timing_fork_comb.py +++ b/test_regress/t/t_timing_fork_comb.py @@ -11,13 +11,7 @@ import vltest_bootstrap test.scenarios('simulator') -# Should convert the first always into combo and detect cycle -test.compile(fails=True, verilator_flags2=["--timing"]) - -test.file_grep( - test.compile_log_filename, - r'%Warning-UNOPTFLAT: t/t_timing_fork_comb.v:\d+:\d+: Signal unoptimizable: Circular combinational logic:' -) +test.compile(verilator_flags2=["--exe --main --timing -Wno-UNOPTFLAT"]) test.execute() diff --git a/test_regress/t/t_timing_fork_comb_bad.py b/test_regress/t/t_timing_fork_comb_bad.py index eceb2e20f..1b5d6f77c 100755 --- a/test_regress/t/t_timing_fork_comb_bad.py +++ b/test_regress/t/t_timing_fork_comb_bad.py @@ -9,11 +9,15 @@ import vltest_bootstrap -test.scenarios('simulator') +test.scenarios('vlt') test.top_filename = "t/t_timing_fork_comb.v" -test.compile(verilator_flags2=["--exe --main --timing -Wno-UNOPTFLAT"]) +# Should convert the first always into combo and detect cycle +test.lint(fails=True, verilator_flags2=["--timing"]) -test.execute() +test.file_grep( + test.compile_log_filename, + r'%Warning-UNOPTFLAT: t/t_timing_fork_comb.v:\d+:\d+: Signal unoptimizable: Circular combinational logic:' +) test.passes()