From 0dd45238a70e94d9dbffe2f79972888a1adfa8a7 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 10 Sep 2026 06:39:43 -0400 Subject: [PATCH] Internals: Update verilog_format flags for recent Verible --- nodist/verilog_format | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/nodist/verilog_format b/nodist/verilog_format index abbdfcbb2..dfb12a1f9 100755 --- a/nodist/verilog_format +++ b/nodist/verilog_format @@ -12,20 +12,23 @@ # SPDX-FileCopyrightText: 2026 Wilson Snyder # SPDX-License-Identifier: CC0-1.0 -# These flags tested against verible-v0.0-4080-ga0a8d8eb +# These flags tested against verible-v0.0-4192-g682a1d50 verible-verilog-format \ --inplace \ - --wrap_end_else_clauses \ + \ --assignment_statement_alignment=flush-left \ --case_items_alignment=flush-left \ --class_member_variable_alignment=flush-left \ --distribution_items_alignment=flush-left \ --enum_assignment_statement_alignment=flush-left \ + --expand_coverpoints \ --formal_parameters_alignment=flush-left \ --module_net_variable_alignment=flush-left \ --named_parameter_alignment=flush-left \ --named_port_alignment=flush-left \ + --parameter_declaration_alignment=flush-left \ --port_declarations_alignment=flush-left \ --struct_union_members_alignment=flush-left \ + --wrap_end_else_clauses \ $*