From 3be0eea9959197db4df40db197e807253b9cc7ea Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 8 Dec 2019 13:50:14 -0500 Subject: [PATCH 01/90] devel release --- Changes | 3 +++ configure.ac | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Changes b/Changes index 72b979f6a..b8e0333b4 100644 --- a/Changes +++ b/Changes @@ -2,6 +2,9 @@ Revision history for Verilator The contributors that suggested a given feature are shown in []. Thanks! +* Verilator 4.025 devel + + * Verilator 4.024 2019-12-08 ** Support associative arrays (excluding [*] and pattern assignments), bug544. diff --git a/configure.ac b/configure.ac index 05b891067..2c178ac87 100644 --- a/configure.ac +++ b/configure.ac @@ -6,7 +6,7 @@ #AC_INIT([Verilator],[#.### YYYY-MM-DD]) #AC_INIT([Verilator],[#.### devel]) -AC_INIT([Verilator],[4.024 2019-12-08], +AC_INIT([Verilator],[4.025 devel], [https://verilator.org], [verilator],[https://verilator.org]) # When releasing, also update header of Changes file From cda5c53cf9235501630453f1a295ff6f52fbe8e7 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 8 Dec 2019 15:56:49 -0500 Subject: [PATCH 02/90] Add BOUNDED warning and promote bounded queues to unbounded. --- Changes | 2 + bin/verilator | 8 ++++ src/V3Error.h | 3 +- src/V3ParseGrammar.cpp | 17 +++++--- src/V3Width.cpp | 46 ++++++++++++++------ test_regress/t/t_queue.v | 9 ++++ test_regress/t/t_queue_bounded.pl | 20 +++++++++ test_regress/t/t_queue_bounded.v | 23 ++++++++++ test_regress/t/t_queue_bounded_unsup_bad.out | 3 +- test_regress/t/t_queue_unsup_bad.out | 4 -- 10 files changed, 108 insertions(+), 27 deletions(-) create mode 100755 test_regress/t/t_queue_bounded.pl create mode 100644 test_regress/t/t_queue_bounded.v diff --git a/Changes b/Changes index b8e0333b4..8620ccfb2 100644 --- a/Changes +++ b/Changes @@ -4,6 +4,8 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 4.025 devel +*** Add BOUNDED warning and promote bounded queues to unbounded. + * Verilator 4.024 2019-12-08 diff --git a/bin/verilator b/bin/verilator index 17a9bef07..8972cc341 100755 --- a/bin/verilator +++ b/bin/verilator @@ -3743,6 +3743,14 @@ generally unrolls small loops. You may want to try increasing --unroll-count (and occasionally --unroll-stmts) which will raise the small loop bar to avoid this error. +=item BOUNDED + +This indicates that bounded queues (e.g. "var name[$ : 3]") are +unsupported. + +Ignoring this warning may make Verilator simulations differ from other +simulators. + =item BSSPACE Warns that a backslash is followed by a space then a newline. Likely the diff --git a/src/V3Error.h b/src/V3Error.h index 98ce5220f..8f2892c16 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -105,6 +105,7 @@ public: SYMRSVDWORD, // Symbol is Reserved Word SYNCASYNCNET, // Mixed sync + async reset TICKCOUNT, // Too large tick count + UNBOUNDED, // Unbounded queue UNDRIVEN, // No drivers UNOPT, // Unoptimizable block UNOPTFLAT, // Unoptimizable block after flattening @@ -154,7 +155,7 @@ public: "REALCVT", "REDEFMACRO", "SELRANGE", "SHORTREAL", "STMTDLY", "SYMRSVDWORD", "SYNCASYNCNET", "TICKCOUNT", - "UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNOPTTHREADS", + "UNBOUNDED", "UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNOPTTHREADS", "UNPACKED", "UNSIGNED", "UNUSED", "USERERROR", "USERFATAL", "USERINFO", "USERWARN", "VARHIDDEN", "WIDTH", "WIDTHCONCAT", diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp index 52f9345e3..13155ac15 100644 --- a/src/V3ParseGrammar.cpp +++ b/src/V3ParseGrammar.cpp @@ -116,11 +116,17 @@ AstNodeDType* V3ParseGrammar::createArray(AstNodeDType* basep, if (rangep && isPacked) { arrayp = new AstPackArrayDType (rangep->fileline(), VFlagChildDType(), arrayp, rangep); - } else if (rangep) { - if (VN_IS(rangep->leftp(), Unbounded) - || VN_IS(rangep->rightp(), Unbounded)) { - rangep->v3error("Unsupported: Bounded queues. Suggest use unbounded."); + } else if (VN_IS(nrangep, QueueRange)) { + arrayp = new AstQueueDType + (nrangep->fileline(), VFlagChildDType(), arrayp); + } else if (rangep && (VN_IS(rangep->leftp(), Unbounded) + || VN_IS(rangep->rightp(), Unbounded))) { + if (!VN_IS(rangep->rightp(), Unbounded)) { + rangep->v3warn(UNBOUNDED, + "Unsupported: Bounded queues. Converting to unbounded."); } + arrayp = new AstQueueDType(nrangep->fileline(), VFlagChildDType(), arrayp); + } else if (rangep) { arrayp = new AstUnpackArrayDType (rangep->fileline(), VFlagChildDType(), arrayp, rangep); } else if (VN_IS(nrangep, UnsizedRange)) { @@ -131,9 +137,6 @@ AstNodeDType* V3ParseGrammar::createArray(AstNodeDType* basep, AstNodeDType* keyp = arangep->keyDTypep(); keyp->unlinkFrBack(); arrayp = new AstAssocArrayDType (nrangep->fileline(), VFlagChildDType(), arrayp, keyp); - } else if (VN_IS(nrangep, QueueRange)) { - arrayp = new AstQueueDType - (nrangep->fileline(), VFlagChildDType(), arrayp); } else { UASSERT_OBJ(0, nrangep, "Expected range or unsized range"); } diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 7087eac87..a8bc3140f 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1935,28 +1935,46 @@ private: newp->protect(false); newp->makeStatement(); } else { - nodep->v3error("Unsupported: Queue .delete(index) method, as is O(n) complexity and slow."); AstNode* index_exprp = methodCallQueueIndexExpr(nodep); - newp = new AstCMethodCall(nodep->fileline(), - nodep->fromp()->unlinkFrBack(), - "erase", index_exprp->unlinkFrBack()); - newp->protect(false); - newp->makeStatement(); + if (index_exprp->isZero()) { // delete(0) is a pop_front + newp = new AstCMethodCall(nodep->fileline(), + nodep->fromp()->unlinkFrBack(), + "pop_front", NULL); + newp->dtypeFrom(adtypep->subDTypep()); + newp->protect(false); + newp->didWidth(true); + newp->makeStatement(); + } else { + nodep->v3error("Unsupported: Queue .delete(index) method, as is O(n) complexity and slow."); + newp = new AstCMethodCall(nodep->fileline(), + nodep->fromp()->unlinkFrBack(), + "erase", index_exprp->unlinkFrBack()); + newp->protect(false); + newp->makeStatement(); + } } } else if (nodep->name() == "insert") { - nodep->v3error("Unsupported: Queue .insert method, as is O(n) complexity and slow."); methodOkArguments(nodep, 2, 2); methodCallLValue(nodep, nodep->fromp(), true); AstNode* index_exprp = methodCallQueueIndexExpr(nodep); AstArg* argp = VN_CAST(nodep->pinsp()->nextp(), Arg); iterateCheckTyped(nodep, "insert value", argp->exprp(), adtypep->subDTypep(), BOTH); - newp = new AstCMethodCall(nodep->fileline(), - nodep->fromp()->unlinkFrBack(), - nodep->name(), - index_exprp->unlinkFrBack()); - newp->addPinsp(argp->exprp()->unlinkFrBack()); - newp->protect(false); - newp->makeStatement(); + if (index_exprp->isZero()) { // insert(0, ...) is a push_front + newp = new AstCMethodCall(nodep->fileline(), + nodep->fromp()->unlinkFrBack(), + "push_front", argp->exprp()->unlinkFrBack()); + newp->protect(false); + newp->makeStatement(); + } else { + nodep->v3error("Unsupported: Queue .insert method, as is O(n) complexity and slow."); + newp = new AstCMethodCall(nodep->fileline(), + nodep->fromp()->unlinkFrBack(), + nodep->name(), + index_exprp->unlinkFrBack()); + newp->addPinsp(argp->exprp()->unlinkFrBack()); + newp->protect(false); + newp->makeStatement(); + } } else if (nodep->name() == "pop_front" || nodep->name() == "pop_back") { methodOkArguments(nodep, 0, 0); diff --git a/test_regress/t/t_queue.v b/test_regress/t/t_queue.v index f21b1522f..1eea7f91e 100644 --- a/test_regress/t/t_queue.v +++ b/test_regress/t/t_queue.v @@ -72,6 +72,15 @@ module t (/*AUTOARG*/ i = q.size(); `checkh(i, 0); v = q.pop_front(); `checks(v, ""); // Was empty, optional warning v = q.pop_back(); `checks(v, ""); // Was empty, optional warning + + // COnversion of insert/delete with zero to operator + q.push_front("front"); + q.insert(0, "newfront"); + i = q.size(); `checkh(i, 2); + q.delete(0); + i = q.size(); `checkh(i, 1); + `checks(q[0], "front"); + end // See t_queue_unsup_bad for more unsupported stuff diff --git a/test_regress/t/t_queue_bounded.pl b/test_regress/t/t_queue_bounded.pl new file mode 100755 index 000000000..89a4e77d9 --- /dev/null +++ b/test_regress/t/t_queue_bounded.pl @@ -0,0 +1,20 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_queue_bounded.v b/test_regress/t/t_queue_bounded.v new file mode 100644 index 000000000..4e0898601 --- /dev/null +++ b/test_regress/t/t_queue_bounded.v @@ -0,0 +1,23 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +module t (/*AUTOARG*/); + + // verilator lint_off UNBOUNDED + int q[$ : 3]; + + initial begin + q.push_front(1); + q.push_front(1); + q.push_front(1); + if (q.size() != 3) $stop; + q.push_front(1); + // TODO correct answer when supported: + //if (q.size() != 3) $stop; + $write("*-* All Finished *-*\n"); + $finish; + end + +endmodule diff --git a/test_regress/t/t_queue_bounded_unsup_bad.out b/test_regress/t/t_queue_bounded_unsup_bad.out index 4f610c1f7..d65628337 100644 --- a/test_regress/t/t_queue_bounded_unsup_bad.out +++ b/test_regress/t/t_queue_bounded_unsup_bad.out @@ -1,4 +1,5 @@ -%Error: t/t_queue_bounded_unsup_bad.v:7: Unsupported: Bounded queues. Suggest use unbounded. +%Warning-UNBOUNDED: t/t_queue_bounded_unsup_bad.v:7: Unsupported: Bounded queues. Converting to unbounded. int q[$ : 3]; ^ + ... Use "/* verilator lint_off UNBOUNDED */" and lint_on around source to disable this message. %Error: Exiting due to diff --git a/test_regress/t/t_queue_unsup_bad.out b/test_regress/t/t_queue_unsup_bad.out index 6e37baf6f..b3c20486b 100644 --- a/test_regress/t/t_queue_unsup_bad.out +++ b/test_regress/t/t_queue_unsup_bad.out @@ -6,10 +6,6 @@ : ... In instance t q.delete(1); ^~~~~~ -%Error: t/t_queue_unsup_bad.v:26: Unsupported: Queue .insert method, as is O(n) complexity and slow. - : ... In instance t - q.insert(0, "ins0"); - ^~~~~~ %Error: t/t_queue_unsup_bad.v:27: Unsupported: Queue .insert method, as is O(n) complexity and slow. : ... In instance t q.insert(2, "ins2"); From 700f2072c05bd6e70c23c74684a53dd70ca82f67 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 8 Dec 2019 21:36:38 -0500 Subject: [PATCH 03/90] Framework for WDatas being vectors of 64-bit EDatas, but not supporting this at this time. --- include/verilated.cpp | 105 ++++---- include/verilated.h | 464 ++++++++++++++++++----------------- include/verilated_fst_c.cpp | 5 +- include/verilated_fst_c.h | 2 +- include/verilated_heavy.h | 8 +- include/verilated_threads.h | 2 +- include/verilated_vpi.cpp | 4 +- include/verilatedos.h | 33 ++- src/V3Ast.h | 4 +- src/V3AstNodes.cpp | 18 +- src/V3AstNodes.h | 14 +- src/V3Cast.cpp | 8 +- src/V3Clean.cpp | 12 +- src/V3Const.cpp | 10 +- src/V3EmitC.cpp | 26 +- src/V3Expand.cpp | 93 +++---- src/V3Number.cpp | 16 +- src/V3Number.h | 4 +- src/V3Task.cpp | 12 +- src/V3Trace.cpp | 4 +- test_regress/t/t_math_repl.v | 2 +- 21 files changed, 449 insertions(+), 397 deletions(-) diff --git a/include/verilated.cpp b/include/verilated.cpp index 53dfcdad8..de2e6412f 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -311,7 +311,7 @@ WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp) VL_MT_SAFE { if (i<(VL_WORDS_I(obits)-1)) { outwp[i] = vl_rand64(); } else { - outwp[i] = vl_rand64() & VL_MASK_I(obits); + outwp[i] = vl_rand64() & VL_MASK_E(obits); } } return outwp; @@ -323,7 +323,7 @@ IData VL_RAND_RESET_I(int obits) VL_MT_SAFE { if (Verilated::randReset()!=1) { // if 2, randomize data = VL_RANDOM_I(obits); } - if (obits<32) data &= VL_MASK_I(obits); + data &= VL_MASK_I(obits); return data; } QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE { @@ -332,7 +332,7 @@ QData VL_RAND_RESET_Q(int obits) VL_MT_SAFE { if (Verilated::randReset()!=1) { // if 2, randomize data = VL_RANDOM_Q(obits); } - if (obits<64) data &= VL_MASK_Q(obits); + data &= VL_MASK_Q(obits); return data; } WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE { @@ -340,7 +340,7 @@ WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE { if (i<(VL_WORDS_I(obits)-1)) { outwp[i] = VL_RAND_RESET_I(32); } else { - outwp[i] = VL_RAND_RESET_I(32) & VL_MASK_I(obits); + outwp[i] = VL_RAND_RESET_I(32) & VL_MASK_E(obits); } } return outwp; @@ -356,7 +356,9 @@ WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) VL_MT_SAFE { void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp) VL_MT_SAFE { VL_PRINTF_MT(" Data: w%d: ", lbits); - for (int i=VL_WORDS_I(lbits)-1; i>=0; --i) { VL_PRINTF_MT("%08x ", iwp[i]); } + for (int i = VL_WORDS_I(lbits) - 1; i >= 0; --i) { + VL_PRINTF_MT("%08x ", iwp[i]); + } VL_PRINTF_MT("\n"); } @@ -499,7 +501,7 @@ WDataOutP VL_POW_WWW(int obits, int, int rbits, } WDataOutP VL_POW_WWQ(int obits, int lbits, int rbits, WDataOutP owp, WDataInP lwp, QData rhs) VL_MT_SAFE { - WData rhsw[2]; VL_SET_WQ(rhsw, rhs); + WData rhsw[VL_WQ_WORDS_E]; VL_SET_WQ(rhsw, rhs); return VL_POW_WWW(obits, lbits, rbits, owp, lwp, rhsw); } QData VL_POW_QQW(int, int, int rbits, QData lhs, WDataInP rwp) VL_MT_SAFE { @@ -520,14 +522,14 @@ WDataOutP VL_POWSS_WWW(int obits, int, int rbits, WDataOutP owp, WDataInP lwp, W if (rsign && VL_SIGN_W(rbits, rwp)) { int words = VL_WORDS_I(obits); VL_ZERO_W(obits, owp); - IData lor = 0; // 0=all zeros, ~0=all ones, else mix + EData lor = 0; // 0=all zeros, ~0=all ones, else mix for (int i=1; i < (words-1); ++i) { lor |= lwp[i]; } - lor |= ( (lwp[words-1] == VL_MASK_I(rbits)) ? ~VL_UL(0) : 0); + lor |= ( (lwp[words-1] == VL_MASK_E(rbits)) ? ~VL_EUL(0) : 0); if (lor==0 && lwp[0]==0) { return owp; } // "X" so return 0 else if (lor==0 && lwp[0]==1) { owp[0] = 1; return owp; } // 1 - else if (lsign && lor == ~VL_UL(0) && lwp[0]==~VL_UL(0)) { // -1 + else if (lsign && lor == ~VL_EUL(0) && lwp[0] == ~VL_EUL(0)) { // -1 if (rwp[0] & 1) { return VL_ALLONES_W(obits, owp); } // -1^odd=-1 else { owp[0] = 1; return owp; } // -1^even=1 } @@ -538,7 +540,7 @@ WDataOutP VL_POWSS_WWW(int obits, int, int rbits, WDataOutP owp, WDataInP lwp, W WDataOutP VL_POWSS_WWQ(int obits, int lbits, int rbits, WDataOutP owp, WDataInP lwp, QData rhs, bool lsign, bool rsign) VL_MT_SAFE { - WData rhsw[2]; VL_SET_WQ(rhsw, rhs); + WData rhsw[VL_WQ_WORDS_E]; VL_SET_WQ(rhsw, rhs); return VL_POWSS_WWW(obits, lbits, rbits, owp, lwp, rhsw, lsign, rsign); } QData VL_POWSS_QQW(int obits, int, int rbits, @@ -576,7 +578,7 @@ std::string VL_DECIMAL_NW(int width, WDataInP lwp) VL_MT_SAFE { for (int nibble_bit = 0; nibble_bit < maxdecwidth; nibble_bit+=4) { if ((VL_BITRSHIFT_W(bcd, nibble_bit) & 0xf) >= 5) { VL_ZERO_RESET_W(maxdecwidth, tmp2); - tmp2[VL_BITWORD_I(nibble_bit)] |= 0x3 << VL_BITBIT_I(nibble_bit); + tmp2[VL_BITWORD_E(nibble_bit)] |= VL_EUL(0x3) << VL_BITBIT_E(nibble_bit); VL_ASSIGN_W(maxdecwidth, tmp, bcd); VL_ADD_W(VL_WORDS_I(maxdecwidth), bcd, tmp, tmp2); } @@ -599,7 +601,7 @@ std::string VL_DECIMAL_NW(int width, WDataInP lwp) VL_MT_SAFE { } // Do a va_arg returning a quad, assuming input argument is anything less than wide -#define _VL_VA_ARG_Q(ap, bits) (((bits) <= VL_WORDSIZE) ? va_arg(ap, IData) : va_arg(ap, QData)) +#define _VL_VA_ARG_Q(ap, bits) (((bits) <= VL_IDATASIZE) ? va_arg(ap, IData) : va_arg(ap, QData)) void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SAFE { // Format a Verilog $write style format into the output list @@ -691,7 +693,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA // Deal with all read-and-print somethings const int lbits = va_arg(ap, int); QData ld = 0; - WData qlwp[2]; + WData qlwp[VL_WQ_WORDS_E]; WDataInP lwp; if (lbits <= VL_QUADSIZE) { ld = _VL_VA_ARG_Q(ap, lbits); @@ -724,7 +726,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA static_cast(VL_EXTENDS_QQ(lbits, lbits, ld))); append = tmp; } else { - if (VL_SIGN_I(lbits, lwp[VL_WORDS_I(lbits)-1])) { + if (VL_SIGN_E(lbits, lwp[VL_WORDS_I(lbits) - 1])) { WData neg[VL_VALUE_STRING_MAX_WIDTH/4+2]; VL_NEGATE_W(VL_WORDS_I(lbits), neg, lwp); append = std::string("-") + VL_DECIMAL_NW(lbits, neg); @@ -966,7 +968,7 @@ IData _vl_vsscanf(FILE* fp, // If a fscanf // Deal with all read-and-scan somethings // Note LSBs are preserved if there's an overflow const int obits = va_arg(ap, int); - WData qowp[2] = {0, 0}; + WData qowp[VL_WQ_WORDS_E]; VL_SET_WQ(qowp, VL_ULL(0)); WDataOutP owp = qowp; if (obits > VL_QUADSIZE) { owp = va_arg(ap, WDataOutP); @@ -1055,7 +1057,7 @@ IData _vl_vsscanf(FILE* fp, // If a fscanf CData* p = va_arg(ap, CData*); *p = owp[0]; } else if (obits <= VL_SHORTSIZE) { SData* p = va_arg(ap, SData*); *p = owp[0]; - } else if (obits <= VL_WORDSIZE) { + } else if (obits <= VL_IDATASIZE) { IData* p = va_arg(ap, IData*); *p = owp[0]; } else if (obits <= VL_QUADSIZE) { QData* p = va_arg(ap, QData*); *p = VL_SET_QW(owp); @@ -1112,9 +1114,9 @@ IData VL_FGETS_IXI(int obits, void* destp, IData fpi) VL_MT_SAFE { // any read data. This means we can't know in what location the first // character will finally live, so we need to copy. Yuk. IData bytes = VL_BYTES_I(obits); - char buffer[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; + char buffer[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; // V3Emit has static check that bytes < VL_TO_STRING_MAX_WORDS, but be safe - if (VL_UNCOVERABLE(bytes > VL_TO_STRING_MAX_WORDS*VL_WORDSIZE)) { + if (VL_UNCOVERABLE(bytes > VL_TO_STRING_MAX_WORDS * VL_EDATASIZE)) { VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: fgets buffer overrun"); // LCOV_EXCL_LINE } @@ -1135,20 +1137,22 @@ IData VL_FGETS_IXI(int obits, void* destp, IData fpi) VL_MT_SAFE { IData VL_FOPEN_NI(const std::string& filename, IData mode) VL_MT_SAFE { // While threadsafe, each thread can only access different file handles char modez[5]; - _VL_VINT_TO_STRING(VL_WORDSIZE, modez, &mode); + EData modee = mode; + _VL_VINT_TO_STRING(VL_IDATASIZE, modez, &modee); return VL_FOPEN_S(filename.c_str(), modez); } IData VL_FOPEN_QI(QData filename, IData mode) VL_MT_SAFE { // While threadsafe, each thread can only access different file handles - WData fnw[2]; VL_SET_WQ(fnw, filename); - return VL_FOPEN_WI(2, fnw, mode); + WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename); + return VL_FOPEN_WI(VL_WQ_WORDS_E, fnw, mode); } IData VL_FOPEN_WI(int fnwords, WDataInP filenamep, IData mode) VL_MT_SAFE { // While threadsafe, each thread can only access different file handles - char filenamez[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; - _VL_VINT_TO_STRING(fnwords*VL_WORDSIZE, filenamez, filenamep); + char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; + _VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep); + EData modee = mode; char modez[5]; - _VL_VINT_TO_STRING(VL_WORDSIZE, modez, &mode); + _VL_VINT_TO_STRING(4 * sizeof(char), modez, &modee); return VL_FOPEN_S(filenamez, modez); } IData VL_FOPEN_S(const char* filenamep, const char* modep) VL_MT_SAFE { @@ -1277,7 +1281,7 @@ IData VL_FSCANF_IX(IData fpi, const char* formatp, ...) VL_MT_SAFE { } IData VL_SSCANF_IIX(int lbits, IData ld, const char* formatp, ...) VL_MT_SAFE { - WData fnw[2]; VL_SET_WI(fnw, ld); + WData fnw[VL_WQ_WORDS_E]; VL_SET_WI(fnw, ld); va_list ap; va_start(ap, formatp); @@ -1286,7 +1290,7 @@ IData VL_SSCANF_IIX(int lbits, IData ld, const char* formatp, ...) VL_MT_SAFE { return got; } IData VL_SSCANF_IQX(int lbits, QData ld, const char* formatp, ...) VL_MT_SAFE { - WData fnw[2]; VL_SET_WQ(fnw, ld); + WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, ld); va_list ap; va_start(ap, formatp); @@ -1312,15 +1316,15 @@ IData VL_SSCANF_INX(int, const std::string& ld, const char* formatp, ...) VL_MT_ void VL_WRITEMEM_Q(bool hex, int width, int depth, int array_lsb, int, QData filename, const void* memp, IData start, IData end) VL_MT_SAFE { - WData fnw[2]; VL_SET_WQ(fnw, filename); - return VL_WRITEMEM_W(hex, width, depth, array_lsb,2, fnw, memp, start, end); + WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename); + return VL_WRITEMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end); } void VL_WRITEMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, WDataInP filenamep, const void* memp, IData start, IData end) VL_MT_SAFE { - char filenamez[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; - _VL_VINT_TO_STRING(fnwords*VL_WORDSIZE, filenamez, filenamep); + char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; + _VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep); std::string filenames(filenamez); return VL_WRITEMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end); } @@ -1425,21 +1429,20 @@ void VL_WRITEMEM_N( } else { WDataInP memDatap = reinterpret_cast(memp); WDataInP datap = &memDatap[row_offset * VL_WORDS_I(width)]; - // output as a sequence of VL_WORDSIZE'd words + // output as a sequence of VL_EDATASIZE'd words // from MSB to LSB. Mask off the MSB word which could // contain junk above the top of valid data. - int word_idx = ((width - 1) / VL_WORDSIZE); + int word_idx = ((width - 1) / VL_EDATASIZE); bool first = true; while (word_idx >= 0) { - IData data = datap[word_idx]; + EData data = datap[word_idx]; if (first) { - data &= VL_MASK_I(width); - int top_word_nbits = ((width - 1) & 0x1f) + 1; + data &= VL_MASK_E(width); + int top_word_nbits = ((width - 1) & (VL_EDATASIZE - 1)) + 1; fprintf(fp, memhFormat(top_word_nbits), data); } else { fprintf(fp, "%08x", data); } - word_idx--; first = false; } @@ -1477,7 +1480,7 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size, SData* datap = &(reinterpret_cast(memp))[entry]; if (shift == start_shift) { *datap = 0; } *datap |= (c << shift) & VL_MASK_I(width); - } else if (width <= VL_WORDSIZE) { + } else if (width <= VL_IDATASIZE) { IData* datap = &(reinterpret_cast(memp))[entry]; if (shift == start_shift) { *datap = 0; } *datap |= (c << shift) & VL_MASK_I(width); @@ -1486,10 +1489,10 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size, if (shift == start_shift) { *datap = 0; } *datap |= ((static_cast(c) << static_cast(shift)) & VL_MASK_Q(width)); - } else { - WDataOutP datap = &(reinterpret_cast(memp))[ entry*VL_WORDS_I(width) ]; + } else { + WDataOutP datap = &(reinterpret_cast(memp))[entry * VL_WORDS_I(width)]; if (shift == start_shift) { VL_ZERO_RESET_W(width, datap); } - datap[VL_BITWORD_I(shift)] |= (c << VL_BITBIT_I(shift)); + datap[VL_BITWORD_E(shift)] |= (static_cast(c) << VL_BITBIT_E(shift)); } // Prep for next ++read_count; @@ -1505,14 +1508,14 @@ IData VL_FREAD_I(int width, int array_lsb, int array_size, void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int, QData filename, void* memp, IData start, IData end) VL_MT_SAFE { - WData fnw[2]; VL_SET_WQ(fnw, filename); - return VL_READMEM_W(hex, width, depth, array_lsb, 2, fnw, memp, start, end); + WData fnw[VL_WQ_WORDS_E]; VL_SET_WQ(fnw, filename); + return VL_READMEM_W(hex, width, depth, array_lsb, VL_WQ_WORDS_E, fnw, memp, start, end); } void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords, WDataInP filenamep, void* memp, IData start, IData end) VL_MT_SAFE { - char filenamez[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; - _VL_VINT_TO_STRING(fnwords*VL_WORDSIZE, filenamez, filenamep); + char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; + _VL_VINT_TO_STRING(fnwords * VL_EDATASIZE, filenamez, filenamep); std::string filenames(filenamez); return VL_READMEM_N(hex, width, depth, array_lsb, filenames, memp, start, end); } @@ -1601,7 +1604,7 @@ void VL_READMEM_N( SData* datap = &(reinterpret_cast(memp))[entry]; if (!innum) { *datap = 0; } *datap = ((*datap << shift) + value) & VL_MASK_I(width); - } else if (width<=VL_WORDSIZE) { + } else if (width <= VL_IDATASIZE) { IData* datap = &(reinterpret_cast(memp))[entry]; if (!innum) { *datap = 0; } *datap = ((*datap << shift) + value) & VL_MASK_I(width); @@ -1642,12 +1645,12 @@ void VL_READMEM_N( } IData VL_SYSTEM_IQ(QData lhs) VL_MT_SAFE { - WData lhsw[2]; VL_SET_WQ(lhsw, lhs); - return VL_SYSTEM_IW(2, lhsw); + WData lhsw[VL_WQ_WORDS_E]; VL_SET_WQ(lhsw, lhs); + return VL_SYSTEM_IW(VL_WQ_WORDS_E, lhsw); } IData VL_SYSTEM_IW(int lhswords, WDataInP lhsp) VL_MT_SAFE { - char filenamez[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; - _VL_VINT_TO_STRING(lhswords*VL_WORDSIZE, filenamez, lhsp); + char filenamez[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; + _VL_VINT_TO_STRING(lhswords * VL_EDATASIZE, filenamez, lhsp); int code = system(filenamez); // Yes, system() is threadsafe return code >> 8; // Want exit status } @@ -1803,8 +1806,8 @@ std::string VL_TOUPPER_NN(const std::string& ld) VL_MT_SAFE { std::string VL_CVT_PACK_STR_NW(int lwords, WDataInP lwp) VL_MT_SAFE { // See also _VL_VINT_TO_STRING - char destout[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1]; - int obits = lwords * VL_WORDSIZE; + char destout[VL_TO_STRING_MAX_WORDS * VL_EDATASIZE + 1]; + int obits = lwords * VL_EDATASIZE; int lsb=obits-1; bool start=true; char* destp = destout; diff --git a/include/verilated.h b/include/verilated.h index 51620fc56..7634ef713 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -64,7 +64,8 @@ typedef vluint8_t CData; ///< Verilated pack data, 1-8 bits typedef vluint16_t SData; ///< Verilated pack data, 9-16 bits typedef vluint32_t IData; ///< Verilated pack data, 17-32 bits typedef vluint64_t QData; ///< Verilated pack data, 33-64 bits -typedef vluint32_t WData; ///< Verilated pack data, >64 bits, as an array +typedef vluint32_t EData; ///< Verilated pack element of WData array +typedef EData WData; ///< Verilated pack data, >64 bits, as an array // float F // No typedef needed; Verilator uses float // double D // No typedef needed; Verilator uses double // string N // No typedef needed; Verilator uses string @@ -671,21 +672,21 @@ extern const char* vl_mc_scan_plusargs(const char* prefixp); // PLIish /// Return true if data[bit] set; not 0/1 return, but 0/non-zero return. #define VL_BITISSET_I(data,bit) ((data) & (VL_UL(1) << VL_BITBIT_I(bit))) #define VL_BITISSET_Q(data,bit) ((data) & (VL_ULL(1) << VL_BITBIT_Q(bit))) -#define VL_BITISSET_W(data,bit) ((data)[VL_BITWORD_I(bit)] & (VL_UL(1) << VL_BITBIT_I(bit))) -#define VL_BITISSETLIMIT_W(data,width,bit) \ - (((bit)<(width)) && (data)[VL_BITWORD_I(bit)] & (VL_UL(1) << VL_BITBIT_I(bit))) +#define VL_BITISSET_E(data,bit) ((data) & (VL_EUL(1) << VL_BITBIT_E(bit))) +#define VL_BITISSET_W(data,bit) ((data)[VL_BITWORD_E(bit)] & (VL_EUL(1) << VL_BITBIT_E(bit))) +#define VL_BITISSETLIMIT_W(data,width,bit) (((bit) < (width)) && VL_BITISSET_W(data,bit)) /// Shift appropriate word by bit. Does not account for wrapping between two words -#define VL_BITRSHIFT_W(data,bit) ((data)[VL_BITWORD_I(bit)] >> VL_BITBIT_I(bit)) +#define VL_BITRSHIFT_W(data,bit) ((data)[VL_BITWORD_E(bit)] >> VL_BITBIT_E(bit)) /// Create two 32-bit words from quadword /// WData is always at least 2 words; does not clean upper bits #define VL_SET_WQ(owp,data) { (owp)[0] = static_cast(data); \ - (owp)[1] = static_cast((data)>>VL_WORDSIZE); } + (owp)[1] = static_cast((data) >> VL_EDATASIZE); } #define VL_SET_WI(owp,data) { (owp)[0] = static_cast(data); (owp)[1] = 0; } #define VL_SET_QW(lwp) \ ( (static_cast((lwp)[0])) \ - | (static_cast((lwp)[1]) << (static_cast(VL_WORDSIZE)) )) + | (static_cast((lwp)[1]) << (static_cast(VL_EDATASIZE)) )) #define _VL_SET_QII(ld,rd) ((static_cast(ld)<(rd)) /// Return FILE* from IData @@ -718,8 +719,10 @@ static inline IData VL_RTOIROUND_I_D(double lhs) VL_PURE { // (Requires clean input) #define VL_SIGN_I(nbits,lhs) ((lhs) >> VL_BITBIT_I((nbits) - VL_UL(1))) #define VL_SIGN_Q(nbits,lhs) ((lhs) >> VL_BITBIT_Q((nbits) - VL_ULL(1))) -#define VL_SIGN_W(nbits,rwp) ((rwp)[VL_BITWORD_I((nbits)-VL_UL(1))] >> VL_BITBIT_I((nbits)-VL_UL(1))) -#define VL_SIGNONES_I(nbits,lhs) (-(VL_SIGN_I(nbits, lhs))) +#define VL_SIGN_E(nbits,lhs) ((lhs) >> VL_BITBIT_E((nbits) - VL_EUL(1))) +#define VL_SIGN_W(nbits,rwp) \ + ((rwp)[VL_BITWORD_E((nbits) - VL_EUL(1))] >> VL_BITBIT_E((nbits) - VL_EUL(1))) +#define VL_SIGNONES_E(nbits, lhs) (-(VL_SIGN_E(nbits, lhs))) // Sign bit extended up to MSB, doesn't include unsigned portion // Optimization bug in GCC 3.3 returns different bitmasks to later states for @@ -787,13 +790,13 @@ extern double sc_time_stamp(); #define VL_ASSIGNCLEAN_W(obits,owp,lwp) VL_CLEAN_WW((obits), (obits), (owp), (lwp)) static inline WDataOutP _VL_CLEAN_INPLACE_W(int obits, WDataOutP owp) VL_MT_SAFE { int words = VL_WORDS_I(obits); - owp[words-1] &= VL_MASK_I(obits); + owp[words-1] &= VL_MASK_E(obits); return owp; } static inline WDataOutP VL_CLEAN_WW(int obits, int, WDataOutP owp, WDataInP lwp) VL_MT_SAFE { int words = VL_WORDS_I(obits); for (int i=0; (i < (words-1)); ++i) owp[i] = lwp[i]; - owp[words-1] = lwp[words-1] & VL_MASK_I(obits); + owp[words-1] = lwp[words-1] & VL_MASK_E(obits); return owp; } static inline WDataOutP VL_ZERO_W(int obits, WDataOutP owp) VL_MT_SAFE { @@ -803,8 +806,8 @@ static inline WDataOutP VL_ZERO_W(int obits, WDataOutP owp) VL_MT_SAFE { } static inline WDataOutP VL_ALLONES_W(int obits, WDataOutP owp) VL_MT_SAFE { int words = VL_WORDS_I(obits); - for (int i=0; (i < (words-1)); ++i) owp[i] = ~VL_UL(0); - owp[words-1] = VL_MASK_I(obits); + for (int i = 0; i < (words - 1); ++i) owp[i] = ~VL_EUL(0); + owp[words-1] = VL_MASK_E(obits); return owp; } @@ -832,12 +835,12 @@ static inline void VL_ASSIGNBIT_II(int, int bit, IData& lhsr, IData rhs) VL_PURE } static inline void VL_ASSIGNBIT_QI(int, int bit, QData& lhsr, QData rhs) VL_PURE { lhsr = ((lhsr & ~(VL_ULL(1)<(rhs) << VL_BITBIT_Q(bit))); } static inline void VL_ASSIGNBIT_WI(int, int bit, WDataOutP owp, IData rhs) VL_MT_SAFE { - IData orig = owp[VL_BITWORD_I(bit)]; - owp[VL_BITWORD_I(bit)] = ((orig & ~(VL_UL(1)<(rhs) << VL_BITBIT_E(bit))); } // Alternative form that is an instruction faster when rhs is constant one. static inline void VL_ASSIGNBIT_IO(int, int bit, CData& lhsr, IData) VL_PURE { @@ -853,8 +856,8 @@ static inline void VL_ASSIGNBIT_QO(int, int bit, QData& lhsr, IData) VL_PURE { lhsr = (lhsr | (VL_ULL(1)<((svar).read().get_word(1)))<((svar).read().get_word(1)))< _butemp = (svar).read(); \ for (int i=0; i < words; ++i) { \ - int msb = ((i+1)*VL_WORDSIZE) - 1; \ + int msb = ((i + 1) * VL_IDATASIZE) - 1; \ msb = (msb >= (obits)) ? ((obits)-1) : msb; \ - (owp)[i] = _butemp.range(msb, i*VL_WORDSIZE).to_uint(); \ + (owp)[i] = _butemp.range(msb, i * VL_IDATASIZE).to_uint(); \ } \ - (owp)[words-1] &= VL_MASK_I(obits); \ + (owp)[words-1] &= VL_MASK_E(obits); \ } // Copying verilog format from systemc integers and bit vectors. @@ -906,7 +909,7 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) VL_MT_SAF #define VL_ASSIGN_SWQ(obits,svar,rd) { \ sc_bv<(obits)> _bvtemp; \ _bvtemp.set_word(0, static_cast(rd)); \ - _bvtemp.set_word(1, static_cast((rd)>>VL_WORDSIZE)); \ + _bvtemp.set_word(1, static_cast((rd) >> VL_IDATASIZE)); \ (svar).write(_bvtemp); \ } #define VL_ASSIGN_SWW(obits,svar,rwp) { \ @@ -922,9 +925,9 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) VL_MT_SAF #define VL_ASSIGN_SBW(obits,svar,rwp) { \ sc_biguint<(obits)> _butemp; \ for (int i=0; i < VL_WORDS_I(obits); ++i) { \ - int msb = ((i+1)*VL_WORDSIZE) - 1; \ + int msb = ((i + 1) * VL_IDATASIZE) - 1; \ msb = (msb >= (obits)) ? ((obits)-1) : msb; \ - _butemp.range(msb, i*VL_WORDSIZE) = (rwp)[i]; \ + _butemp.range(msb, i * VL_IDATASIZE) = (rwp)[i]; \ } \ (svar).write(_butemp); \ } @@ -943,17 +946,17 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) VL_MT_SAF static inline WDataOutP VL_EXTEND_WI(int obits, int, WDataOutP owp, IData ld) VL_MT_SAFE { // Note for extracts that obits != lbits owp[0] = ld; - for (int i=1; i < VL_WORDS_I(obits); ++i) owp[i] = 0; + for (int i = 1; i < VL_WORDS_I(obits); ++i) owp[i] = 0; return owp; } static inline WDataOutP VL_EXTEND_WQ(int obits, int, WDataOutP owp, QData ld) VL_MT_SAFE { VL_SET_WQ(owp, ld); - for (int i=2; i < VL_WORDS_I(obits); ++i) owp[i] = 0; + for (int i = VL_WQ_WORDS_E; i < VL_WORDS_I(obits); ++i) owp[i] = 0; return owp; } static inline WDataOutP VL_EXTEND_WW(int obits, int lbits, WDataOutP owp, WDataInP lwp) VL_MT_SAFE { - for (int i=0; i < VL_WORDS_I(lbits); ++i) owp[i] = lwp[i]; - for (int i=VL_WORDS_I(lbits); i < VL_WORDS_I(obits); ++i) owp[i] = 0; + for (int i = 0; i < VL_WORDS_I(lbits); ++i) owp[i] = lwp[i]; + for (int i = VL_WORDS_I(lbits); i < VL_WORDS_I(obits); ++i) owp[i] = 0; return owp; } @@ -970,24 +973,24 @@ static inline QData VL_EXTENDS_QQ(int, int lbits, QData lhs) VL_PURE { } static inline WDataOutP VL_EXTENDS_WI(int obits, int lbits, WDataOutP owp, IData ld) VL_MT_SAFE { - IData sign = VL_SIGNONES_I(lbits, ld); - owp[0] = ld | (sign & ~VL_MASK_I(lbits)); - for (int i=1; i < VL_WORDS_I(obits); ++i) owp[i] = sign; + EData sign = VL_SIGNONES_E(lbits, static_cast(ld)); + owp[0] = ld | (sign & ~VL_MASK_E(lbits)); + for (int i = 1; i < VL_WORDS_I(obits); ++i) owp[i] = sign; return owp; } static inline WDataOutP VL_EXTENDS_WQ(int obits, int lbits, WDataOutP owp, QData ld) VL_MT_SAFE { VL_SET_WQ(owp, ld); - IData sign = VL_SIGNONES_I(lbits, owp[1]); - owp[1] |= sign & ~VL_MASK_I(lbits); - for (int i=2; i < VL_WORDS_I(obits); ++i) owp[i] = sign; + EData sign = VL_SIGNONES_E(lbits, owp[1]); + owp[1] |= sign & ~VL_MASK_E(lbits); + for (int i = VL_WQ_WORDS_E; i < VL_WORDS_I(obits); ++i) owp[i] = sign; return owp; } static inline WDataOutP VL_EXTENDS_WW(int obits, int lbits, WDataOutP owp, WDataInP lwp) VL_MT_SAFE { - for (int i=0; i < VL_WORDS_I(lbits)-1; ++i) owp[i] = lwp[i]; - int lmsw = VL_WORDS_I(lbits)-1; - IData sign = VL_SIGNONES_I(lbits, lwp[lmsw]); - owp[lmsw] = lwp[lmsw] | (sign & ~VL_MASK_I(lbits)); - for (int i=VL_WORDS_I(lbits); i < VL_WORDS_I(obits); ++i) owp[i] = sign; + for (int i = 0; i < VL_WORDS_I(lbits)-1; ++i) owp[i] = lwp[i]; + int lmsw = VL_WORDS_I(lbits) - 1; + EData sign = VL_SIGNONES_E(lbits, lwp[lmsw]); + owp[lmsw] = lwp[lmsw] | (sign & ~VL_MASK_E(lbits)); + for (int i = VL_WORDS_I(lbits); i < VL_WORDS_I(obits); ++i) owp[i] = sign; return owp; } @@ -999,9 +1002,9 @@ static inline WDataOutP VL_EXTENDS_WW(int obits, int lbits, WDataOutP owp, WData #define VL_REDAND_IQ(obits,lbits,lhs) ((lhs) == VL_MASK_Q(lbits)) static inline IData VL_REDAND_IW(int, int lbits, WDataInP lwp) VL_MT_SAFE { int words = VL_WORDS_I(lbits); - IData combine = lwp[0]; - for (int i=1; i < words-1; ++i) combine &= lwp[i]; - combine &= ~VL_MASK_I(lbits) | lwp[words-1]; + EData combine = lwp[0]; + for (int i = 1; i < words - 1; ++i) combine &= lwp[i]; + combine &= ~VL_MASK_E(lbits) | lwp[words-1]; return ((~combine)==0); } @@ -1009,7 +1012,7 @@ static inline IData VL_REDAND_IW(int, int lbits, WDataInP lwp) VL_MT_SAFE { #define VL_REDOR_I(lhs) ((lhs)!=0) #define VL_REDOR_Q(lhs) ((lhs)!=0) static inline IData VL_REDOR_W(int words, WDataInP lwp) VL_MT_SAFE { - IData equal = 0; + EData equal = 0; for (int i=0; i < words; ++i) equal |= lwp[i]; return (equal != 0); } @@ -1061,7 +1064,7 @@ static inline IData VL_REDXOR_64(QData r) VL_PURE { #endif } static inline IData VL_REDXOR_W(int words, WDataInP lwp) VL_MT_SAFE { - IData r = lwp[0]; + EData r = lwp[0]; for (int i=1; i < words; ++i) r ^= lwp[i]; return VL_REDXOR_32(r); } @@ -1078,9 +1081,10 @@ static inline IData VL_COUNTONES_I(IData lhs) VL_PURE { static inline IData VL_COUNTONES_Q(QData lhs) VL_PURE { return VL_COUNTONES_I(static_cast(lhs)) + VL_COUNTONES_I(static_cast(lhs>>32)); } +#define VL_COUNTONES_E VL_COUNTONES_I static inline IData VL_COUNTONES_W(int words, WDataInP lwp) VL_MT_SAFE { - IData r = 0; - for (int i=0; (i < words); ++i) r+=VL_COUNTONES_I(lwp[i]); + EData r = 0; + for (int i = 0; i < words; ++i) r += VL_COUNTONES_E(lwp[i]); return r; } @@ -1091,7 +1095,7 @@ static inline IData VL_ONEHOT_Q(QData lhs) VL_PURE { return (((lhs & (lhs-1))==0) & (lhs!=0)); } static inline IData VL_ONEHOT_W(int words, WDataInP lwp) VL_MT_SAFE { - IData one = 0; + EData one = 0; for (int i=0; (i < words); ++i) { if (lwp[i]) { if (one) return 0; @@ -1136,12 +1140,12 @@ static inline IData VL_CLOG2_Q(QData lhs) VL_PURE { return shifts; } static inline IData VL_CLOG2_W(int words, WDataInP lwp) VL_MT_SAFE { - IData adjust = (VL_COUNTONES_W(words, lwp)==1) ? 0 : 1; + EData adjust = (VL_COUNTONES_W(words, lwp) == 1) ? 0 : 1; for (int i=words-1; i>=0; --i) { if (VL_UNLIKELY(lwp[i])) { // Shorter worst case if predict not taken - for (int bit=31; bit>=0; --bit) { - if (VL_UNLIKELY(VL_BITISSET_I(lwp[i], bit))) { - return i*VL_WORDSIZE + bit + adjust; + for (int bit = VL_EDATASIZE - 1; bit >= 0; --bit) { + if (VL_UNLIKELY(VL_BITISSET_E(lwp[i], bit))) { + return i * VL_EDATASIZE + bit + adjust; } } // Can't get here - one bit must be set @@ -1154,9 +1158,9 @@ static inline IData VL_MOSTSETBITP1_W(int words, WDataInP lwp) VL_MT_SAFE { // MSB set bit plus one; similar to FLS. 0=value is zero for (int i=words-1; i>=0; --i) { if (VL_UNLIKELY(lwp[i])) { // Shorter worst case if predict not taken - for (int bit=31; bit>=0; --bit) { - if (VL_UNLIKELY(VL_BITISSET_I(lwp[i], bit))) { - return i*VL_WORDSIZE + bit + 1; + for (int bit = VL_EDATASIZE - 1; bit >= 0; --bit) { + if (VL_UNLIKELY(VL_BITISSET_E(lwp[i], bit))) { + return i * VL_EDATASIZE + bit + 1; } } // Can't get here - one bit must be set @@ -1217,7 +1221,7 @@ static inline WDataOutP VL_NOT_W(int words, WDataOutP owp, WDataInP lwp) VL_MT_S // Output clean, AND MUST BE CLEAN static inline IData VL_EQ_W(int words, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { - int nequal = 0; + EData nequal = 0; for (int i=0; (i < words); ++i) nequal |= (lwp[i] ^ rwp[i]); return (nequal==0); } @@ -1286,8 +1290,8 @@ static inline int _VL_CMPS_W(int lbits, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { int words = VL_WORDS_I(lbits); int i = words-1; // We need to flip sense if negative comparison - IData lsign = VL_SIGN_I(lbits, lwp[i]); - IData rsign = VL_SIGN_I(lbits, rwp[i]); + EData lsign = VL_SIGN_E(lbits, lwp[i]); + EData rsign = VL_SIGN_E(lbits, rwp[i]); if (!lsign && rsign) return 1; // + > - if (lsign && !rsign) return -1; // - < + for (; i>=0; --i) { @@ -1300,6 +1304,22 @@ static inline int _VL_CMPS_W(int lbits, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { //========================================================================= // Math +// Optimization bug in GCC 2.96 and presumably all-pre GCC 3 versions need this workaround, +// we can't just +//# define VL_NEGATE_I(data) (-(data)) +static inline IData VL_NEGATE_I(IData data) VL_PURE { return -data; } +static inline QData VL_NEGATE_Q(QData data) VL_PURE { return -data; } +static inline EData VL_NEGATE_E(EData data) VL_PURE { return -data; } + +static inline WDataOutP VL_NEGATE_W(int words, WDataOutP owp, WDataInP lwp) VL_MT_SAFE { + EData carry = 1; + for (int i = 0; i < words; ++i) { + owp[i] = ~lwp[i] + carry; + carry = (owp[i] < ~lwp[i]); + } + return owp; +} + // EMIT_RULE: VL_MUL: oclean=dirty; lclean==clean; rclean==clean; // EMIT_RULE: VL_DIV: oclean=dirty; lclean==clean; rclean==clean; // EMIT_RULE: VL_MODDIV: oclean=dirty; lclean==clean; rclean==clean; @@ -1312,40 +1332,25 @@ static inline int _VL_CMPS_W(int lbits, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { static inline WDataOutP VL_ADD_W(int words, WDataOutP owp, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { QData carry = 0; - for (int i=0; i(lwp[i]) + static_cast(rwp[i]); owp[i] = (carry & VL_ULL(0xffffffff)); carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff); } + // Last output word is dirty return owp; } static inline WDataOutP VL_SUB_W(int words, WDataOutP owp, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { QData carry = 0; - for (int i=0; i(lwp[i]) + static_cast(static_cast(~rwp[i]))); - if (i==0) ++carry; // Negation of temp2 - owp[i] = (carry & VL_ULL(0xffffffff)); - carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff); - } - return owp; -} - -// Optimization bug in GCC 2.96 and presumably all-pre GCC 3 versions need this workaround, -// we can't just -//# define VL_NEGATE_I(data) (-(data)) -static inline IData VL_NEGATE_I(IData data) VL_PURE { return -data; } -static inline QData VL_NEGATE_Q(QData data) VL_PURE { return -data; } - -static inline WDataOutP VL_NEGATE_W(int words, WDataOutP owp, WDataInP lwp) VL_MT_SAFE { - QData carry = 0; - for (int i=0; i(static_cast(~lwp[i])); - if (i==0) ++carry; // Negation of temp2 + if (i==0) ++carry; // Negation of rwp owp[i] = (carry & VL_ULL(0xffffffff)); carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff); } + // Last output word is dirty return owp; } @@ -1385,20 +1390,20 @@ static inline WDataOutP VL_MULS_WWW(int, int lbits, int, WData rwstore[VL_MULS_MAX_WORDS]; WDataInP lwusp = lwp; WDataInP rwusp = rwp; - IData lneg = VL_SIGN_I(lbits, lwp[words-1]); + EData lneg = VL_SIGN_E(lbits, lwp[words-1]); if (lneg) { // Negate lhs lwusp = lwstore; VL_NEGATE_W(words, lwstore, lwp); - lwstore[words-1] &= VL_MASK_I(lbits); // Clean it + lwstore[words-1] &= VL_MASK_E(lbits); // Clean it } - IData rneg = VL_SIGN_I(lbits, rwp[words-1]); + EData rneg = VL_SIGN_E(lbits, rwp[words-1]); if (rneg) { // Negate rhs rwusp = rwstore; VL_NEGATE_W(words, rwstore, rwp); - rwstore[words-1] &= VL_MASK_I(lbits); // Clean it + rwstore[words-1] &= VL_MASK_E(lbits); // Clean it } VL_MUL_W(words, owp, lwusp, rwusp); - owp[words-1] &= VL_MASK_I(lbits); // Clean. Note it's ok for the multiply to overflow into the sign bit + owp[words-1] &= VL_MASK_E(lbits); // Clean. Note it's ok for the multiply to overflow into the sign bit if ((lneg ^ rneg) & 1) { // Negate output (not using NEGATE, as owp==lwp) QData carry = 0; for (int i=0; i> VL_ULL(32)) & VL_ULL(0xffffffff); } - //Not needed: owp[words-1] |= 1<(ld); + if (hword == lword) { // know < EData bits because above checks it + EData insmask = (VL_MASK_E(hoffset - loffset + 1)) << loffset; + owp[lword] = (owp[lword] & ~insmask) | ((lde << loffset) & insmask); } else { - IData hinsmask = (VL_MASK_I(hoffset-0+1))<<0; - IData linsmask = (VL_MASK_I(31-loffset+1))<>nbitsonright) & hinsmask); + EData hinsmask = (VL_MASK_E(hoffset - 0 + 1)) << 0; + EData linsmask = (VL_MASK_E((VL_EDATASIZE - 1) - loffset + 1)) << loffset; + int nbitsonright = VL_EDATASIZE - loffset; // bits that end up in lword + owp[lword] = (owp[lword] & ~linsmask) | ((lde << loffset) & linsmask); + owp[hword] = (owp[hword] & ~hinsmask) | ((lde >> nbitsonright) & hinsmask); } } } @@ -1605,11 +1611,11 @@ static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbi // INTERNAL: Stuff large LHS bit 0++ into OUTPUT at specified offset // lwp may be "dirty" static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int lbit) VL_MT_SAFE { - int hoffset = hbit & VL_SIZEBITS_I; - int loffset = lbit & VL_SIZEBITS_I; - int lword = VL_BITWORD_I(lbit); - int words = VL_WORDS_I(hbit-lbit+1); - if (hoffset==VL_SIZEBITS_I && loffset==0) { + int hoffset = hbit & VL_SIZEBITS_E; + int loffset = lbit & VL_SIZEBITS_E; + int lword = VL_BITWORD_E(lbit); + int words = VL_WORDS_I(hbit - lbit + 1); + if (hoffset == VL_SIZEBITS_E && loffset == 0) { // Fast and common case, word based insertion for (int i=0; i>nbitsonright; - IData od = (d & ~linsmask) | (owp[oword] & linsmask); - if (oword==hword) owp[oword] = (owp[oword] & ~hinsmask) | (od & hinsmask); + EData d = lwp[i] >> nbitsonright; + EData od = (d & ~linsmask) | (owp[oword] & linsmask); + if (oword == hword) + owp[oword] = (owp[oword] & ~hinsmask) | (od & hinsmask); else owp[oword] = od; } } @@ -1651,7 +1661,7 @@ static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int } static inline void _VL_INSERT_WQ(int obits, WDataOutP owp, QData ld, int hbit, int lbit) VL_MT_SAFE { - WData lwp[2]; VL_SET_WQ(lwp, ld); + WData lwp[VL_WQ_WORDS_E]; VL_SET_WQ(lwp, ld); _VL_INSERT_WW(obits, owp, lwp, hbit, lbit); } @@ -1748,7 +1758,7 @@ static inline IData VL_STREAML_FAST_III(int, int lbits, int, IData ld, IData rd_ case 4: ret = ((ret >> 16) | (ret << 16)); } - return ret >> (VL_WORDSIZE - lbits); + return ret >> (VL_IDATASIZE - lbits); } static inline QData VL_STREAML_FAST_QQI(int, int lbits, int, QData ld, IData rd_log2) VL_PURE { @@ -1818,8 +1828,8 @@ static inline WDataOutP VL_STREAML_WWI(int, int lbits, int, for (int sbit=0; sbit=1; --i) { - iowp[i] = ((iowp[i]<> (32-rd)) & linsmask); + iowp[i] = ((iowp[i]<> (VL_EDATASIZE - rd)) & linsmask); } iowp[0] = ((iowp[0]<= static_cast(obits)) { // rd may be huge with MSB set for (int i=0; i < VL_WORDS_I(obits); ++i) owp[i] = 0; } else if (bit_shift==0) { // Aligned word shift (<<0,<<32,<<64 etc) @@ -1969,8 +1979,8 @@ static inline QData VL_SHIFTL_QQW(int obits, int, int rbits, QData lhs, WDataInP // expression. Thus consider this when optimizing. (And perhaps have 2 funcs?) static inline WDataOutP VL_SHIFTR_WWI(int obits, int, int, WDataOutP owp, WDataInP lwp, IData rd) VL_MT_SAFE { - int word_shift = VL_BITWORD_I(rd); // Maybe 0 - int bit_shift = VL_BITBIT_I(rd); + int word_shift = VL_BITWORD_E(rd); // Maybe 0 + int bit_shift = VL_BITBIT_E(rd); if (rd >= static_cast(obits)) { // rd may be huge with MSB set for (int i=0; i < VL_WORDS_I(obits); ++i) owp[i] = 0; } else if (bit_shift==0) { // Aligned word shift (>>0,>>32,>>64 etc) @@ -1978,8 +1988,8 @@ static inline WDataOutP VL_SHIFTR_WWI(int obits, int, int, for (int i=0; i < copy_words; ++i) owp[i] = lwp[i+word_shift]; for (int i=copy_words; i < VL_WORDS_I(obits); ++i) owp[i] = 0; } else { - int loffset = rd & VL_SIZEBITS_I; - int nbitsonright = 32-loffset; // bits that end up in lword (know loffset!=0) + int loffset = rd & VL_SIZEBITS_E; + int nbitsonright = VL_EDATASIZE - loffset; // bits that end up in lword (know loffset!=0) // Middle words int words = VL_WORDS_I(obits-rd); for (int i=0; i= static_cast(obits)) { // Shifting past end, sign in all of lbits for (int i=0; i <= lmsw; ++i) owp[i] = sign; - owp[lmsw] &= VL_MASK_I(lbits); + owp[lmsw] &= VL_MASK_E(lbits); } else if (bit_shift==0) { // Aligned word shift (>>0,>>32,>>64 etc) int copy_words = (VL_WORDS_I(obits)-word_shift); for (int i=0; i < copy_words; ++i) owp[i] = lwp[i+word_shift]; - if (copy_words>=0) owp[copy_words-1] |= ~VL_MASK_I(obits) & sign; - for (int i=copy_words; i < VL_WORDS_I(obits); ++i) owp[i] = sign; - owp[lmsw] &= VL_MASK_I(lbits); + if (copy_words >= 0) owp[copy_words - 1] |= ~VL_MASK_E(obits) & sign; + for (int i = copy_words; i < VL_WORDS_I(obits); ++i) owp[i] = sign; + owp[lmsw] &= VL_MASK_E(lbits); } else { - int loffset = rd & VL_SIZEBITS_I; - int nbitsonright = 32-loffset; // bits that end up in lword (know loffset!=0) + int loffset = rd & VL_SIZEBITS_E; + int nbitsonright = VL_EDATASIZE - loffset; // bits that end up in lword (know loffset!=0) // Middle words int words = VL_WORDS_I(obits-rd); for (int i=0; i>32 or more - int lmsw = VL_WORDS_I(obits)-1; - IData sign = VL_SIGNONES_I(lbits, lwp[lmsw]); - for (int j=0; j <= lmsw; ++j) owp[j] = sign; - owp[lmsw] &= VL_MASK_I(lbits); - return owp; - } + EData overshift = 0; // Huge shift 1>>32 or more + for (int i = 1; i < VL_WORDS_I(rbits); ++i) { + overshift |= rwp[i]; + } + if (VL_UNLIKELY(overshift)) { + int lmsw = VL_WORDS_I(obits) - 1; + EData sign = VL_SIGNONES_E(lbits, lwp[lmsw]); + for (int j = 0; j <= lmsw; ++j) owp[j] = sign; + owp[lmsw] &= VL_MASK_E(lbits); + return owp; } return VL_SHIFTRS_WWI(obits, lbits, 32, owp, lwp, rwp[0]); } static inline IData VL_SHIFTRS_IIW(int obits, int lbits, int rbits, IData lhs, WDataInP rwp) VL_MT_SAFE { - for (int i=1; i < VL_WORDS_I(rbits); ++i) { - if (VL_UNLIKELY(rwp[i])) { // Huge shift 1>>32 or more - IData sign = -(lhs >> (lbits-1)); // ffff_ffff if negative - return VL_CLEAN_II(obits, obits, sign); - } + EData overshift = 0; // Huge shift 1>>32 or more + for (int i = 1; i < VL_WORDS_I(rbits); ++i) { + overshift |= rwp[i]; + } + if (VL_UNLIKELY(overshift)) { + IData sign = -(lhs >> (lbits-1)); // ffff_ffff if negative + return VL_CLEAN_II(obits, obits, sign); } return VL_SHIFTRS_III(obits, lbits, 32, lhs, rwp[0]); } static inline QData VL_SHIFTRS_QQW(int obits, int lbits, int rbits, QData lhs, WDataInP rwp) VL_MT_SAFE { - for (int i=1; i < VL_WORDS_I(rbits); ++i) { - if (VL_UNLIKELY(rwp[i])) { // Huge shift 1>>32 or more - QData sign = -(lhs >> (lbits-1)); // ffff_ffff if negative - return VL_CLEAN_QQ(obits, obits, sign); - } + EData overshift = 0; // Huge shift 1>>32 or more + for (int i = 1; i < VL_WORDS_I(rbits); ++i) { + overshift |= rwp[i]; + } + if (VL_UNLIKELY(overshift)) { + QData sign = -(lhs >> (lbits-1)); // ffff_ffff if negative + return VL_CLEAN_QQ(obits, obits, sign); } return VL_SHIFTRS_QQI(obits, lbits, 32, lhs, rwp[0]); } static inline IData VL_SHIFTRS_IIQ(int obits, int lbits, int rbits, IData lhs, QData rhs) VL_PURE { - WData rwp[2]; VL_SET_WQ(rwp, rhs); + WData rwp[VL_WQ_WORDS_E]; VL_SET_WQ(rwp, rhs); return VL_SHIFTRS_IIW(obits, lbits, rbits, lhs, rwp); } static inline QData VL_SHIFTRS_QQQ(int obits, int lbits, int rbits, QData lhs, QData rhs) VL_PURE { - WData rwp[2]; VL_SET_WQ(rwp, rhs); + WData rwp[VL_WQ_WORDS_E]; VL_SET_WQ(rwp, rhs); return VL_SHIFTRS_QQW(obits, lbits, rbits, lhs, rwp); } @@ -2124,12 +2140,12 @@ static inline QData VL_SHIFTRS_QQQ(int obits, int lbits, int rbits, QData lhs, Q #define VL_BITSEL_IQII(obits,lbits,rbits,zbits,lhs,rhs) (static_cast((lhs)>>(rhs))) static inline IData VL_BITSEL_IWII(int, int lbits, int, int, WDataInP lwp, IData rd) VL_MT_SAFE { - int word = VL_BITWORD_I(rd); + int word = VL_BITWORD_E(rd); if (VL_UNLIKELY(rd > static_cast(lbits))) { return ~0; // Spec says you can go outside the range of a array. Don't coredump if so. // We return all 1's as that's more likely to find bugs (?) than 0's. } else { - return (lwp[word]>>VL_BITBIT_I(rd)); + return (lwp[word] >> VL_BITBIT_E(rd)); } } @@ -2144,12 +2160,12 @@ static inline IData VL_SEL_IWII(int, int lbits, int, int, int msb = lsb+width-1; if (VL_UNLIKELY(msb>lbits)) { return ~0; // Spec says you can go outside the range of a array. Don't coredump if so. - } else if (VL_BITWORD_I(msb)==VL_BITWORD_I(static_cast(lsb))) { + } else if (VL_BITWORD_E(msb) == VL_BITWORD_E(static_cast(lsb))) { return VL_BITRSHIFT_W(lwp, lsb); } else { // 32 bit extraction may span two words - int nbitsfromlow = 32-VL_BITBIT_I(lsb); // bits that come from low word - return ((lwp[VL_BITWORD_I(msb)]<lbits)) { return ~0; // Spec says you can go outside the range of a array. Don't coredump if so. - } else if (VL_BITWORD_I(msb)==VL_BITWORD_I(static_cast(lsb))) { + } else if (VL_BITWORD_E(msb) == VL_BITWORD_E(static_cast(lsb))) { return VL_BITRSHIFT_W(lwp, lsb); - } else if (VL_BITWORD_I(msb)==1+VL_BITWORD_I(static_cast(lsb))) { - int nbitsfromlow = 32-VL_BITBIT_I(lsb); - QData hi = (lwp[VL_BITWORD_I(msb)]); + } else if (VL_BITWORD_E(msb) == 1 + VL_BITWORD_E(static_cast(lsb))) { + int nbitsfromlow = VL_EDATASIZE - VL_BITBIT_E(lsb); + QData hi = (lwp[VL_BITWORD_E(msb)]); QData lo = VL_BITRSHIFT_W(lwp, lsb); return (hi<lbits)) { // Outside bounds, for (int i=0; i>loffset; int upperword = i+word_shift+1; - if (upperword <= static_cast(VL_BITWORD_I(msb))) { - owp[i] |= lwp[upperword]<< nbitsfromlow; + if (upperword <= static_cast(VL_BITWORD_E(msb))) { + owp[i] |= lwp[upperword] << nbitsfromlow; } } for (int i=words; i= 0; --w) { v = newval[w]; - for (int i = 28; i >= 0; i-=4) { + for (int i = (32 - 4); i >= 0; i-=4) { s[0] = '0' + ((v>>(i+3))&1); s[1] = '0' + ((v>>(i+2))&1); s[2] = '0' + ((v>>(i+1))&1); diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h index a61a2c199..bda5a66be 100644 --- a/include/verilated_fst_c.h +++ b/include/verilated_fst_c.h @@ -65,7 +65,7 @@ private: std::vector m_valueStrBuffer; char* word2Str(vluint32_t newval, int bits); char* quad2Str(vluint64_t newval, int bits); - char* array2Str(const vluint32_t *newval, int bits); + char* array2Str(const vluint32_t* newval, int bits); public: explicit VerilatedFst(void* fst=NULL); ~VerilatedFst() { if (m_fst == NULL) { fstWriterClose(m_fst); } } diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 03d1824ca..699326971 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -278,14 +278,14 @@ std::string VL_TO_STRING(const VlQueue& obj) { extern std::string VL_CVT_PACK_STR_NW(int lwords, WDataInP lwp) VL_MT_SAFE; inline std::string VL_CVT_PACK_STR_NQ(QData lhs) VL_PURE { - WData lw[2]; VL_SET_WQ(lw, lhs); - return VL_CVT_PACK_STR_NW(2, lw); + WData lw[VL_WQ_WORDS_E]; VL_SET_WQ(lw, lhs); + return VL_CVT_PACK_STR_NW(VL_WQ_WORDS_E, lw); } inline std::string VL_CVT_PACK_STR_NN(const std::string& lhs) VL_PURE { return lhs; } inline std::string VL_CVT_PACK_STR_NI(IData lhs) VL_PURE { - WData lw[1]; lw[0] = lhs; + WData lw[1]; VL_SET_WI(lw, lhs); return VL_CVT_PACK_STR_NW(1, lw); } inline std::string VL_CONCATN_NNN(const std::string& lhs, const std::string& rhs) VL_PURE { @@ -331,7 +331,7 @@ inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, SData& rdr) return got; } inline IData VL_VALUEPLUSARGS_INI(int rbits, const std::string& ld, IData& rdr) VL_MT_SAFE { - WData rwp[2]; // WData must always be at least 2 + WData rwp[2]; IData got = VL_VALUEPLUSARGS_INW(rbits, ld, rwp); if (got) rdr = rwp[0]; return got; diff --git a/include/verilated_threads.h b/include/verilated_threads.h index bb7ef2650..b5e4817d7 100644 --- a/include/verilated_threads.h +++ b/include/verilated_threads.h @@ -153,7 +153,7 @@ public: #elif defined(__APPLE__) vluint32_t info[4]; __cpuid_count(1, 0, info[0], info[1], info[2], info[3]); - /* info[1] is EBX, bits 24-31 are APIC ID */ + // info[1] is EBX, bits 24-31 are APIC ID if ((info[3] & (1 << 9)) == 0) { return -1; // no APIC on chip } else { diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp index f6c780dcd..439b9d555 100644 --- a/include/verilated_vpi.cpp +++ b/include/verilated_vpi.cpp @@ -1333,7 +1333,7 @@ void vpi_get_value(vpiHandle object, p_vpi_value value_p) { VL_FATAL_MT(__FILE__, __LINE__, "", "vpi_get_value with more than VL_MULS_MAX_WORDS; increase and recompile"); } - WDataInP datap = (reinterpret_cast(vop->varDatap())); + WDataInP datap = (reinterpret_cast(vop->varDatap())); for (int i=0; ivarp()->packed().elements()); - WDataOutP datap = (reinterpret_cast(vop->varDatap())); + WDataOutP datap = (reinterpret_cast(vop->varDatap())); for (int i=0; ivalue.vector[i].aval; if (i==(words-1)) { diff --git a/include/verilatedos.h b/include/verilatedos.h index 5be639aee..856b539a0 100644 --- a/include/verilatedos.h +++ b/include/verilatedos.h @@ -317,16 +317,20 @@ typedef unsigned long long vluint64_t; ///< 64-bit unsigned type //========================================================================= // Integer size macros -#define VL_BYTESIZE 8 ///< Bits in a byte -#define VL_SHORTSIZE 16 ///< Bits in a short -#define VL_WORDSIZE 32 ///< Bits in a word -#define VL_QUADSIZE 64 ///< Bits in a quadword -#define VL_WORDSIZE_LOG2 5 ///< log2(VL_WORDSIZE) +#define VL_BYTESIZE 8 ///< Bits in a CData / byte +#define VL_SHORTSIZE 16 ///< Bits in a SData / short +#define VL_IDATASIZE 32 ///< Bits in a IData / word +#define VL_WORDSIZE IDATASIZE ///< Legacy define +#define VL_QUADSIZE 64 ///< Bits in a QData / quadword +#define VL_EDATASIZE 32 ///< Bits in a EData (WData entry) +#define VL_EDATASIZE_LOG2 5 ///< log2(VL_EDATASIZE) /// Bytes this number of bits needs (1 bit=1 byte) #define VL_BYTES_I(nbits) (((nbits) + (VL_BYTESIZE - 1)) / VL_BYTESIZE) -/// Words this number of bits needs (1 bit=1 word) -#define VL_WORDS_I(nbits) (((nbits) + (VL_WORDSIZE - 1)) / VL_WORDSIZE) +/// Words/EDatas this number of bits needs (1 bit=1 word) +#define VL_WORDS_I(nbits) (((nbits) + (VL_EDATASIZE - 1)) / VL_EDATASIZE) +/// Words/EDatas a quad requires +#define VL_WQ_WORDS_E VL_WORDS_I(VL_QUADSIZE) //========================================================================= // Class definition helpers @@ -345,8 +349,9 @@ typedef unsigned long long vluint64_t; ///< 64-bit unsigned type //========================================================================= // Base macros -#define VL_SIZEBITS_I (VL_WORDSIZE - 1) ///< Bit mask for bits in a word +#define VL_SIZEBITS_I (VL_IDATASIZE - 1) ///< Bit mask for bits in a word #define VL_SIZEBITS_Q (VL_QUADSIZE - 1) ///< Bit mask for bits in a quad +#define VL_SIZEBITS_E (VL_EDATASIZE - 1) ///< Bit mask for bits in a quad /// Mask for words with 1's where relevant bits are (0=all bits) #define VL_MASK_I(nbits) (((nbits) & VL_SIZEBITS_I) \ @@ -354,9 +359,15 @@ typedef unsigned long long vluint64_t; ///< 64-bit unsigned type /// Mask for quads with 1's where relevant bits are (0=all bits) #define VL_MASK_Q(nbits) (((nbits) & VL_SIZEBITS_Q) \ ? ((VL_ULL(1) << ((nbits) & VL_SIZEBITS_Q) )-VL_ULL(1)) : VL_ULL(~0)) -#define VL_BITWORD_I(bit) ((bit)/VL_WORDSIZE) ///< Word number for a wide quantity -#define VL_BITBIT_I(bit) ((bit)&VL_SIZEBITS_I) ///< Bit number for a bit in a long -#define VL_BITBIT_Q(bit) ((bit)&VL_SIZEBITS_Q) ///< Bit number for a bit in a quad +/// Mask for EData with 1's where relevant bits are (0=all bits) +#define VL_MASK_E(nbits) VL_MASK_I(nbits) +#define VL_EUL(n) VL_UL(n) ///< Make constant number EData sized + +#define VL_BITWORD_I(bit) ((bit) / VL_IDATASIZE) ///< Word number for sv DPI vectors +#define VL_BITWORD_E(bit) ((bit) >> VL_EDATASIZE_LOG2) ///< Word number for a wide quantity +#define VL_BITBIT_I(bit) ((bit) & VL_SIZEBITS_I) ///< Bit number for a bit in a long +#define VL_BITBIT_Q(bit) ((bit) & VL_SIZEBITS_Q) ///< Bit number for a bit in a quad +#define VL_BITBIT_E(bit) ((bit) & VL_SIZEBITS_E) ///< Bit number for a bit in a EData //========================================================================= // Floating point diff --git a/src/V3Ast.h b/src/V3Ast.h index f8ebc2afb..72cd16bab 100644 --- a/src/V3Ast.h +++ b/src/V3Ast.h @@ -1312,8 +1312,8 @@ public: int widthMin() const; int widthMinV() const { return v3Global.widthMinUsage()==VWidthMinUsage::VERILOG_WIDTH ? widthMin() : width(); } int widthWords() const { return VL_WORDS_I(width()); } - bool isQuad() const { return (width()>VL_WORDSIZE && width()<=VL_QUADSIZE); } - bool isWide() const { return (width()>VL_QUADSIZE); } + bool isQuad() const { return (width() > VL_IDATASIZE && width() <= VL_QUADSIZE); } + bool isWide() const { return (width() > VL_QUADSIZE); } bool isDouble() const; bool isSigned() const; bool isString() const; diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 562b4baca..648fc09ff 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -104,14 +104,14 @@ int AstBasicDType::widthTotalBytes() const { if (width()<=8) return 1; else if (width()<=16) return 2; else if (isQuad()) return 8; - else return widthWords()*(VL_WORDSIZE/8); + else return widthWords() * (VL_EDATASIZE / 8); } int AstNodeClassDType::widthTotalBytes() const { if (width()<=8) return 1; else if (width()<=16) return 2; else if (isQuad()) return 8; - else return widthWords()*(VL_WORDSIZE/8); + else return widthWords() * (VL_EDATASIZE / 8); } int AstNodeClassDType::widthAlignBytes() const { @@ -319,7 +319,7 @@ AstVar::VlArgTypeRecursed AstVar::vlArgTypeRecurse(bool forFunc, const AstNodeDT otype += "CData"+bitvec; } else if (dtypep->widthMin() <= 16) { otype += "SData"+bitvec; - } else if (dtypep->widthMin() <= VL_WORDSIZE) { + } else if (dtypep->widthMin() <= VL_IDATASIZE) { otype += "IData"+bitvec; } else if (dtypep->isQuad()) { otype += "QData"+bitvec; @@ -367,7 +367,7 @@ string AstVar::vlEnumType() const { arg += "VLVT_UINT8"; } else if (widthMin() <= 16) { arg += "VLVT_UINT16"; - } else if (widthMin() <= VL_WORDSIZE) { + } else if (widthMin() <= VL_IDATASIZE) { arg += "VLVT_UINT32"; } else if (isQuad()) { arg += "VLVT_UINT64"; @@ -429,12 +429,12 @@ string AstVar::cPubArgType(bool named, bool forReturn) const { if (isWide() && isReadOnly()) arg += "const "; if (widthMin() == 1) { arg += "bool"; - } else if (widthMin() <= VL_WORDSIZE) { + } else if (widthMin() <= VL_IDATASIZE) { arg += "uint32_t"; - } else if (isWide()) { - arg += "uint32_t"; // []'s added later - } else { + } else if (widthMin() <= VL_QUADSIZE) { arg += "vluint64_t"; + } else { + arg += "uint32_t"; // []'s added later } if (isWide()) { if (forReturn) v3error("Unsupported: Public functions with >64 bit outputs; make an output of a public task instead"); @@ -501,7 +501,7 @@ string AstVar::scType() const { return (string("sc_bv<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >> } else if (widthMin() == 1) { return "bool"; - } else if (widthMin() <= VL_WORDSIZE) { + } else if (widthMin() <= VL_IDATASIZE) { if (widthMin() <= 8 && v3Global.opt.pinsUint8()) { return "uint8_t"; } else if (widthMin() <= 16 && v3Global.opt.pinsUint8()) { diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index bd39323ea..2cb8edf6c 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -109,6 +109,13 @@ public: m_num.width(32, 32); dtypeSetLogicUnsized(32, m_num.widthMin(), AstNumeric::SIGNED); } + class SizedEData {}; // for creator type-overload selection + AstConst(FileLine* fl, SizedEData, vluint64_t num) + : AstNodeMath(fl) + , m_num(this, VL_EDATASIZE, 0) { + m_num.setQuad(num); + dtypeSetLogicSized(VL_EDATASIZE, AstNumeric::UNSIGNED); + } class RealDouble {}; // for creator type-overload selection AstConst(FileLine* fl, RealDouble, double num) : AstNodeMath(fl) @@ -1119,8 +1126,8 @@ class AstWordSel : public AstNodeSel { // Select a single word from a multi-word wide value public: AstWordSel(FileLine* fl, AstNode* fromp, AstNode* bitp) - :AstNodeSel(fl, fromp, bitp) { - dtypeSetUInt32(); // Always used on IData arrays so returns word entities + : AstNodeSel(fl, fromp, bitp) { + dtypeSetUInt32(); // Always used on WData arrays so returns edata size } ASTNODE_NODE_FUNCS(WordSel) virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { return new AstWordSel(this->fileline(), lhsp, rhsp); } @@ -3893,7 +3900,8 @@ public: dtypeFrom(valuep); m_code = 0; m_codeInc = ((arrayRange.ranged() ? arrayRange.elements() : 1) - * valuep->dtypep()->widthWords()); + * valuep->dtypep()->widthWords() + * (VL_EDATASIZE / sizeof(uint32_t))); // A code is always 32-bits m_varType = varp->varType(); m_declKwd = varp->declKwd(); m_declDirection = varp->declDirection(); diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp index 170b0e3df..7409f3b34 100644 --- a/src/V3Cast.cpp +++ b/src/V3Cast.cpp @@ -80,9 +80,9 @@ private: } int castSize(AstNode* nodep) { if (nodep->isQuad()) return VL_QUADSIZE; - else if (nodep->width()<=8) return 8; - else if (nodep->width()<=16) return 16; - else return VL_WORDSIZE; + else if (nodep->width() <= 8) return 8; + else if (nodep->width() <= 16) return 16; + else return VL_IDATASIZE; } void insureCast(AstNode* nodep) { if (castSize(nodep->backp()) != castSize(nodep) @@ -97,7 +97,7 @@ private: // less than has nondeterministic signedness. if (nodep->isQuad() && !nodep->lhsp()->isQuad() && !VN_IS(nodep->lhsp(), CCast)) { - insertCast(nodep->lhsp(), VL_WORDSIZE); + insertCast(nodep->lhsp(), VL_IDATASIZE); } } diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp index e1eb1b9f8..3ea3c435d 100644 --- a/src/V3Clean.cpp +++ b/src/V3Clean.cpp @@ -62,9 +62,9 @@ private: // Width resetting int cppWidth(AstNode* nodep) { - if (nodep->width()<=VL_WORDSIZE) return VL_WORDSIZE; - else if (nodep->width()<=VL_QUADSIZE) return VL_QUADSIZE; - else return nodep->widthWords()*VL_WORDSIZE; + if (nodep->width() <= VL_IDATASIZE) return VL_IDATASIZE; + else if (nodep->width() <= VL_QUADSIZE) return VL_QUADSIZE; + else return nodep->widthWords() * VL_EDATASIZE; } void setCppWidth(AstNode* nodep) { nodep->user2(true); // Don't resize it again @@ -113,8 +113,10 @@ private: } void setClean(AstNode* nodep, bool isClean) { computeCppWidth(nodep); // Just to be sure it's in widthMin - bool wholeUint = ((nodep->widthMin() % VL_WORDSIZE) == 0); // 32,64,... - setCleanState(nodep, ((isClean||wholeUint) ? CS_CLEAN:CS_DIRTY)); + bool wholeUint = (nodep->widthMin() == VL_IDATASIZE + || nodep->widthMin() == VL_QUADSIZE + || (nodep->widthMin() % VL_EDATASIZE) == 0); + setCleanState(nodep, ((isClean || wholeUint) ? CS_CLEAN : CS_DIRTY)); } // Operate on nodes diff --git a/src/V3Const.cpp b/src/V3Const.cpp index 0cc2c266f..967ffd9e9 100644 --- a/src/V3Const.cpp +++ b/src/V3Const.cpp @@ -965,15 +965,15 @@ private: V3Number ones (nodep, nodep->width()); ones.setMask(nodep->width()); if (shift1<0) { - mask1.opShiftR(ones, V3Number(nodep, VL_WORDSIZE, -shift1)); + mask1.opShiftR(ones, V3Number(nodep, VL_IDATASIZE, -shift1)); } else { - mask1.opShiftL(ones, V3Number(nodep, VL_WORDSIZE, shift1)); + mask1.opShiftL(ones, V3Number(nodep, VL_IDATASIZE, shift1)); } V3Number mask (nodep, nodep->width()); if (shift2<0) { - mask.opShiftR(mask1, V3Number(nodep, VL_WORDSIZE, -shift2)); + mask.opShiftR(mask1, V3Number(nodep, VL_IDATASIZE, -shift2)); } else { - mask.opShiftL(mask1, V3Number(nodep, VL_WORDSIZE, shift2)); + mask.opShiftL(mask1, V3Number(nodep, VL_IDATASIZE, shift2)); } if (newshift<0) { newp = new AstShiftR(nodep->fileline(), ap, @@ -1016,8 +1016,6 @@ private: if (( con1p->toSInt() != con2p->toSInt() + sel2p->width()) &&(con2p->toSInt() != con1p->toSInt() + sel1p->width())) return false; bool lsbFirstAssign = (con1p->toUInt() < con2p->toUInt()); - // If the user already has nice 32-bit divisions, keep them to aid later subdivision - //if (VL_BITBIT_I(con1p->toUInt()) == 0) return false; UINFO(4,"replaceAssignMultiSel "<dumpTree(cout, "comb1: "); diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index a2b6a8383..ed5e8dc44 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -691,10 +691,10 @@ public: } virtual void visit(AstCCast* nodep) { // Extending a value of the same word width is just a NOP. - if (nodep->size()>VL_WORDSIZE) { - puts("(QData)("); - } else { + if (nodep->size() <= VL_IDATASIZE) { puts("(IData)("); + } else { + puts("(QData)("); } iterateAndNextNull(nodep->lhsp()); puts(")"); @@ -788,11 +788,11 @@ public: } else if (nodep->isWide()) { int upWidth = nodep->num().widthMin(); int chunks = 0; - if (upWidth > EMITC_NUM_CONSTW*VL_WORDSIZE) { + if (upWidth > EMITC_NUM_CONSTW * VL_EDATASIZE) { // Output e.g. 8 words in groups of e.g. 8 - chunks = (upWidth-1) / (EMITC_NUM_CONSTW*VL_WORDSIZE); - upWidth %= (EMITC_NUM_CONSTW*VL_WORDSIZE); - if (upWidth == 0) upWidth = (EMITC_NUM_CONSTW*VL_WORDSIZE); + chunks = (upWidth-1) / (EMITC_NUM_CONSTW * VL_EDATASIZE); + upWidth %= (EMITC_NUM_CONSTW * VL_EDATASIZE); + if (upWidth == 0) upWidth = (EMITC_NUM_CONSTW * VL_EDATASIZE); } { // Upper e.g. 8 words if (chunks) { @@ -801,7 +801,7 @@ public: puts("X("); puts(cvtToStr(nodep->widthMin())); puts(","); - puts(cvtToStr(chunks*EMITC_NUM_CONSTW*VL_WORDSIZE)); + puts(cvtToStr(chunks * EMITC_NUM_CONSTW * VL_EDATASIZE)); } else { putbs("VL_CONST_W_"); puts(cvtToStr(VL_WORDS_I(upWidth))); @@ -820,8 +820,8 @@ public: for (int word=VL_WORDS_I(upWidth)-1; word>=0; word--) { // Only 32 bits - llx + long long here just to appease CPP format warning ofp()->printf(",0x%08" VL_PRI64 "x", - static_cast(nodep->num().dataWord - (word+chunks*EMITC_NUM_CONSTW))); + static_cast(nodep->num().edataWord + (word+chunks * EMITC_NUM_CONSTW))); } puts(")"); } @@ -830,7 +830,7 @@ public: putbs("VL_CONSTLO_W_"); puts(cvtToStr(EMITC_NUM_CONSTW)); puts("X("); - puts(cvtToStr(chunks*EMITC_NUM_CONSTW*VL_WORDSIZE)); + puts(cvtToStr(chunks * EMITC_NUM_CONSTW * VL_EDATASIZE)); puts(","); if (!assigntop) { puts(assignString); @@ -843,8 +843,8 @@ public: for (int word=EMITC_NUM_CONSTW-1; word>=0; word--) { // Only 32 bits - llx + long long here just to appease CPP format warning ofp()->printf(",0x%08" VL_PRI64 "x", - static_cast(nodep->num().dataWord - (word+chunks*EMITC_NUM_CONSTW))); + static_cast(nodep->num().edataWord + (word+chunks * EMITC_NUM_CONSTW))); } puts(")"); } diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp index 4506fe42f..8f0a456bc 100644 --- a/src/V3Expand.cpp +++ b/src/V3Expand.cpp @@ -55,15 +55,14 @@ private: VL_DEBUG_FUNC; // Declare debug() int longOrQuadWidth(AstNode* nodep) { - // Return 32 or 64... - return (nodep->width()+(VL_WORDSIZE-1)) & ~(VL_WORDSIZE-1); + return (nodep->width() + (VL_EDATASIZE - 1)) & ~(VL_EDATASIZE - 1); } V3Number notWideMask(AstNode* nodep) { - return V3Number(nodep, VL_WORDSIZE, ~VL_MASK_I(nodep->widthMin())); + return V3Number(nodep, VL_EDATASIZE, ~VL_MASK_E(nodep->widthMin())); } V3Number wordMask(AstNode* nodep) { if (nodep->isWide()) { - return V3Number(nodep, VL_WORDSIZE, VL_MASK_I(nodep->widthMin())); + return V3Number(nodep, VL_EDATASIZE, VL_MASK_E(nodep->widthMin())); } else { V3Number mask (nodep, longOrQuadWidth(nodep)); mask.setMask(nodep->widthMin()); @@ -118,13 +117,13 @@ private: return new AstWordSel(nodep->fileline(), nodep->cloneTree(true), new AstConst(nodep->fileline(), word)); - } else if (nodep->isQuad() && word==0) { + } else if (nodep->isQuad() && word == 0) { AstNode* quadfromp = nodep->cloneTree(true); quadfromp->dtypeSetBitUnsized(VL_QUADSIZE, quadfromp->widthMin(), AstNumeric::UNSIGNED); return new AstCCast(nodep->fileline(), quadfromp, - VL_WORDSIZE); + VL_EDATASIZE); } else if (nodep->isQuad() && word==1) { AstNode* quadfromp = nodep->cloneTree(true); quadfromp->dtypeSetBitUnsized(VL_QUADSIZE, quadfromp->widthMin(), @@ -132,10 +131,10 @@ private: return new AstCCast(nodep->fileline(), new AstShiftR(nodep->fileline(), quadfromp, - new AstConst(nodep->fileline(), VL_WORDSIZE), - VL_WORDSIZE), - VL_WORDSIZE); - } else if (!nodep->isWide() && !nodep->isQuad() && word==0) { + new AstConst(nodep->fileline(), VL_EDATASIZE), + VL_EDATASIZE), + VL_EDATASIZE); + } else if (!nodep->isWide() && !nodep->isQuad() && word == 0) { return nodep->cloneTree(true); } else { // Out of bounds return new AstConst(nodep->fileline(), 0); @@ -148,25 +147,25 @@ private: AstNode* newp; // Negative word numbers requested for lhs when it's "before" what we want. // We get a 0 then. - int othword = word - shift/VL_WORDSIZE; + int othword = word - shift / VL_EDATASIZE; AstNode* llowp = newAstWordSelClone(lhsp, othword); - if (int loffset = VL_BITBIT_I(shift)) { + if (int loffset = VL_BITBIT_E(shift)) { AstNode* lhip = newAstWordSelClone(lhsp, othword-1); - int nbitsonright = VL_WORDSIZE-loffset; // bits that end up in lword + int nbitsonright = VL_EDATASIZE - loffset; // bits that end up in lword newp = new AstOr (fl, new AstAnd(fl, - new AstConst(fl, VL_MASK_I(loffset)), + new AstConst(fl, AstConst::SizedEData(), VL_MASK_E(loffset)), new AstShiftR(fl, lhip, new AstConst(fl, nbitsonright), - VL_WORDSIZE)), + VL_EDATASIZE)), new AstAnd(fl, - new AstConst(fl, ~VL_MASK_I(loffset)), + new AstConst(fl, AstConst::SizedEData(), ~VL_MASK_E(loffset)), new AstShiftL(fl, llowp, new AstConst(fl, loffset), - VL_WORDSIZE))); + VL_EDATASIZE))); } else { newp = llowp; } @@ -177,12 +176,12 @@ private: // Return equation to get the VL_BITWORD of a constant or non-constant if (VN_IS(lsbp, Const)) { return new AstConst(lsbp->fileline(), - wordAdder + VL_BITWORD_I(VN_CAST(lsbp, Const)->toUInt())); + wordAdder + VL_BITWORD_E(VN_CAST(lsbp, Const)->toUInt())); } else { AstNode* shiftp = new AstShiftR(lsbp->fileline(), lsbp->cloneTree(true), - new AstConst(lsbp->fileline(), VL_WORDSIZE_LOG2), - VL_WORDSIZE); + new AstConst(lsbp->fileline(), VL_EDATASIZE_LOG2), + VL_EDATASIZE); if (wordAdder != 0) { shiftp = new AstAdd(lsbp->fileline(), // This is indexing a arraysel, so a 32 bit constant is fine @@ -208,10 +207,10 @@ private: // Return equation to get the VL_BITBIT of a constant or non-constant if (VN_IS(lsbp, Const)) { return new AstConst(lsbp->fileline(), - VL_BITBIT_I(VN_CAST(lsbp, Const)->toUInt())); + VL_BITBIT_E(VN_CAST(lsbp, Const)->toUInt())); } else { return new AstAnd(lsbp->fileline(), - new AstConst(lsbp->fileline(), VL_WORDSIZE-1), + new AstConst(lsbp->fileline(), VL_EDATASIZE - 1), dropCondBound(lsbp)->cloneTree(true)); } } @@ -226,8 +225,8 @@ private: } for (int w=0; wwidthWords(); w++) { addWordAssign(nodep, w, new AstConst(nodep->fileline(), - AstConst::WidthedValue(), - VL_WORDSIZE, rhsp->num().dataWord(w))); + AstConst::SizedEData(), + rhsp->num().edataWord(w))); } return true; } @@ -339,7 +338,7 @@ private: addWordAssign(nodep, w, newAstWordSelClone(rhsp->lhsp(), w)); } for (; wwidthWords(); w++) { - addWordAssign(nodep, w, new AstConst(rhsp->fileline(), 0)); + addWordAssign(nodep, w, new AstConst(rhsp->fileline(), AstConst::SizedEData(), 0)); } return true; } @@ -387,7 +386,7 @@ private: // nbitsfromlow <= (lsb==0) ? 64-bitbit(lsb) : 32-bitbit(lsb) AstNode* midshiftp = new AstSub(nodep->lsbp()->fileline(), new AstConst(nodep->lsbp()->fileline(), - VL_WORDSIZE), + VL_EDATASIZE), newSelBitBit(nodep->lsbp())); if (nodep->isQuad()) { midshiftp = @@ -395,7 +394,7 @@ private: new AstEq(nodep->fileline(), new AstConst(nodep->fileline(), 0), newSelBitBit(nodep->lsbp())), - new AstConst(nodep->lsbp()->fileline(), VL_WORDSIZE), + new AstConst(nodep->lsbp()->fileline(), VL_EDATASIZE), midshiftp); } AstNode* midmayp = new AstShiftL(nodep->fileline(), @@ -415,7 +414,7 @@ private: } // If > 32 bits, we might be crossing the second word boundary AstNode* hip = NULL; - if (nodep->widthConst() > VL_WORDSIZE) { + if (nodep->widthConst() > VL_EDATASIZE) { AstNode* hiwordp = // SEL(from,[2+wordnum]) new AstWordSel(nodep->fromp()->fileline(), nodep->fromp()->cloneTree(true), @@ -468,11 +467,11 @@ private: bool expandWide(AstNodeAssign* nodep, AstSel* rhsp) { UASSERT_OBJ(nodep->widthMin() == rhsp->widthConst(), nodep, "Width mismatch"); - if (VN_IS(rhsp->lsbp(), Const) && VL_BITBIT_I(rhsp->lsbConst())==0) { + if (VN_IS(rhsp->lsbp(), Const) && VL_BITBIT_E(rhsp->lsbConst()) == 0) { int lsb = rhsp->lsbConst(); UINFO(8," Wordize ASSIGN(SEL,align) "<widthWords(); w++) { - addWordAssign(nodep, w, newAstWordSelClone(rhsp->fromp(), w + VL_BITWORD_I(lsb))); + addWordAssign(nodep, w, newAstWordSelClone(rhsp->fromp(), w + VL_BITWORD_E(lsb))); } return true; } else { @@ -485,20 +484,21 @@ private: AstNode* lowp = new AstShiftR(rhsp->fileline(), lowwordp, newSelBitBit(rhsp->lsbp()), - VL_WORDSIZE); + VL_EDATASIZE); // Upper bits - V3Number zero (nodep, VL_WORDSIZE, 0); + V3Number zero (nodep, VL_EDATASIZE, 0); AstNode* midwordp = // SEL(from,[1+wordnum]) new AstWordSel(rhsp->fromp()->fileline(), rhsp->fromp()->cloneTree(true), newSelBitWord(rhsp->lsbp(), w+1)); AstNode* midshiftp = new AstSub(rhsp->lsbp()->fileline(), - new AstConst(rhsp->lsbp()->fileline(), VL_WORDSIZE), + new AstConst(rhsp->lsbp()->fileline(), + VL_EDATASIZE), newSelBitBit(rhsp->lsbp())); AstNode* midmayp = new AstShiftL(rhsp->fileline(), midwordp, midshiftp, - VL_WORDSIZE); + VL_EDATASIZE); AstNode* midp = new AstCond(rhsp->fileline(), new AstEq(rhsp->fileline(), new AstConst(rhsp->fileline(), 0), @@ -534,14 +534,15 @@ private: if (destwide) { UINFO(8," ASSIGNSEL(const,wide) "<widthWords(); w++) { - if (w>=VL_BITWORD_I(lsb) && w<=VL_BITWORD_I(msb)) { + if (w >= VL_BITWORD_E(lsb) && w <= VL_BITWORD_E(msb)) { // else we would just be setting it to the same exact value AstNode* oldvalp = newAstWordSelClone(destp, w); fixCloneLvalue(oldvalp); if (!ones) { oldvalp = new AstAnd(lhsp->fileline(), new AstConst(lhsp->fileline(), - maskold.dataWord(w)), + AstConst::SizedEData(), + maskold.edataWord(w)), oldvalp); } addWordAssign(nodep, w, @@ -598,18 +599,18 @@ private: // That's ok as we'd just AND with a larger value, // but oldval would clip the upper bits to sanity newSelBitBit(lhsp->lsbp()), - VL_WORDSIZE)), + VL_EDATASIZE)), oldvalp); } // Restrict the shift amount to 0-31, see bug804. AstNode* shiftp = new AstAnd(nodep->fileline(), lhsp->lsbp()->cloneTree(true), - new AstConst(nodep->fileline(), VL_WORDSIZE-1)); + new AstConst(nodep->fileline(), VL_EDATASIZE - 1)); AstNode* newp = new AstOr(lhsp->fileline(), oldvalp, new AstShiftL(lhsp->fileline(), rhsp, shiftp, - VL_WORDSIZE)); + VL_EDATASIZE)); newp = new AstAssign(nodep->fileline(), new AstWordSel(nodep->fileline(), destp, @@ -762,7 +763,7 @@ private: AstNode* newp; if (lhswidth==1) { newp = new AstNegate(nodep->fileline(), lhsp->cloneTree(true)); - newp->dtypeSetLogicSized(VL_WORDSIZE, + newp->dtypeSetLogicSized(VL_EDATASIZE, AstNumeric::UNSIGNED); // Replicate always unsigned } else { newp = newAstWordSelClone(lhsp, w); @@ -808,10 +809,12 @@ private: } if (VN_IS(nodep, Neq)) { newp = new AstNeq(nodep->fileline(), - new AstConst(nodep->fileline(), 0), newp); + new AstConst(nodep->fileline(), AstConst::SizedEData(), 0), + newp); } else { newp = new AstEq(nodep->fileline(), - new AstConst(nodep->fileline(), 0), newp); + new AstConst(nodep->fileline(), AstConst::SizedEData(), 0), + newp); } replaceWithDelete(nodep, newp); VL_DANGLING(nodep); } @@ -831,7 +834,8 @@ private: newp = (newp==NULL) ? eqp : (new AstOr(nodep->fileline(), newp, eqp)); } newp = new AstNeq(nodep->fileline(), - new AstConst(nodep->fileline(), 0), newp); + new AstConst(nodep->fileline(), AstConst::SizedEData(), 0), + newp); replaceWithDelete(nodep, newp); VL_DANGLING(nodep); } else { UINFO(8," REDOR->EQ "<fileline(), newp, eqp)); } newp = new AstEq(nodep->fileline(), - new AstConst(nodep->fileline(), ~0), newp); + new AstConst(nodep->fileline(), AstConst::SizedEData(), + ~VL_MASK_E(0)), newp); replaceWithDelete(nodep, newp); VL_DANGLING(nodep); } else { UINFO(8," REDAND->EQ "<> ((byte * 8) % VL_EDATASIZE)) & 0xff; } bool V3Number::isEqZero() const { @@ -1656,8 +1660,8 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool return *this; } - int uw = VL_WORDS_I(umsbp1); // aka "m" in the algorithm - int vw = VL_WORDS_I(vmsbp1); // aka "n" in the algorithm + int uw = (umsbp1 + 31) / 32; // aka "m" in the algorithm + int vw = (vmsbp1 + 31) / 32; // aka "n" in the algorithm if (vw == 1) { // Single divisor word breaks rest of algorithm vluint64_t k = 0; @@ -1684,7 +1688,7 @@ V3Number& V3Number::opModDivGuts(const V3Number& lhs, const V3Number& rhs, bool // Algorithm requires divisor MSB to be set // Copy and shift to normalize divisor so MSB of vn[vw-1] is set - int s = 31-VL_BITBIT_I(vmsbp1-1); // shift amount (0...31) + int s = 31 - ((vmsbp1-1) & 31); // shift amount (0...31) uint32_t shift_mask = s ? 0xffffffff : 0; // otherwise >> 32 won't mask the value for (int i = vw-1; i>0; i--) { vn[i] = (rhs.m_value[i] << s) | (shift_mask & (rhs.m_value[i-1] >> (32-s))); diff --git a/src/V3Number.h b/src/V3Number.h index 6a8af81d6..f40f8616d 100644 --- a/src/V3Number.h +++ b/src/V3Number.h @@ -243,8 +243,8 @@ public: string toDecimalU() const; // return ASCII unsigned decimal number double toDouble() const; uint32_t toHash() const; - uint32_t dataWord(int word) const; - uint8_t dataByte(int byte) const { return (dataWord(byte/4) >> (8*(byte&3))) & 0xff; } + uint32_t edataWord(int eword) const; + uint8_t dataByte(int byte) const; uint32_t countOnes() const; uint32_t mostSetBitP1() const; // Highest bit set plus one, IE for 16 return 5, for 0 return 0. diff --git a/src/V3Task.cpp b/src/V3Task.cpp index fbeb93803..049c0c613 100644 --- a/src/V3Task.cpp +++ b/src/V3Task.cpp @@ -630,10 +630,14 @@ private: return new AstCStmt(portp->fileline(), linesp); } // Use a AstCMath, as we want V3Clean to mask off bits that don't make sense. - int cwidth = VL_WORDSIZE; - if (portp->basicp()) cwidth = portp->basicp()->keyword().width(); - if (portp->basicp() - && portp->basicp()->keyword().isBitLogic()) cwidth = VL_WORDSIZE*portp->widthWords(); + int cwidth = VL_IDATASIZE; + if (portp->basicp()) { + if (portp->basicp()->keyword().isBitLogic()) { + cwidth = VL_EDATASIZE * portp->widthWords(); + } else { + cwidth = portp->basicp()->keyword().width(); + } + } AstNode* newp = new AstAssign(portp->fileline(), new AstVarRef(portp->fileline(), portvscp, true), new AstSel(portp->fileline(), diff --git a/src/V3Trace.cpp b/src/V3Trace.cpp index 94aa4cc6f..6197f8594 100644 --- a/src/V3Trace.cpp +++ b/src/V3Trace.cpp @@ -341,8 +341,8 @@ private: AstVarType::MODULETEMP, "__Vm_traceActivity", newArrDtp); } else { - // For tighter code; round to next 32 bit point. - int activityBits = VL_WORDS_I(m_activityNumber)*VL_WORDSIZE; + // For tighter code; round to next word point. + int activityBits = VL_WORDS_I(m_activityNumber) * VL_EDATASIZE; newvarp = new AstVar(m_chgFuncp->fileline(), AstVarType::MODULETEMP, "__Vm_traceActivity", VFlagBitPacked(), activityBits); } diff --git a/test_regress/t/t_math_repl.v b/test_regress/t/t_math_repl.v index b93d64729..6995ef03c 100644 --- a/test_regress/t/t_math_repl.v +++ b/test_regress/t/t_math_repl.v @@ -56,7 +56,7 @@ module t (/*AUTOARG*/ if (cyc!=0) begin cyc <= cyc + 1; `ifdef TEST_VERBOSE - $write("cyc=%0d d=%x %x %x %x %x %x\n", cyc, b, rf, rf2, dualasr, sl_mask, sr_mask); + $write("cyc=%0d d=%x %x %x %x %x %x %x\n", cyc, b, rf, rf2, dualasr, sl_mask, sr_mask, widerep); `endif if (cyc==1) begin biu <= 64'h12451282_abadee00; From 62b0d15d2e37518c3fdb2c3c8284e56e61d2741f Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 8 Dec 2019 22:26:54 -0500 Subject: [PATCH 04/90] Add lint check for bad enum 4-state values. --- src/V3Width.cpp | 11 +++++++++-- test_regress/t/t_enum_x_bad.out | 9 +++++++++ test_regress/t/t_enum_x_bad.pl | 18 ++++++++++++++++++ test_regress/t/t_enum_x_bad.v | 18 ++++++++++++++++++ 4 files changed, 54 insertions(+), 2 deletions(-) create mode 100644 test_regress/t/t_enum_x_bad.out create mode 100755 test_regress/t/t_enum_x_bad.pl create mode 100644 test_regress/t/t_enum_x_bad.v diff --git a/src/V3Width.cpp b/src/V3Width.cpp index a8bc3140f..2ffe7a706 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1452,6 +1452,8 @@ private: if (!itemp->valuep()) { if (num.isEqZero() && itemp != nodep->itemsp()) itemp->v3error("Enum value illegally wrapped around (IEEE 2017 6.19)"); + if (num.isFourState()) + itemp->v3error("Enum value that is unassigned cannot follow value with X/Zs (IEEE 2017 6.19)"); if (!nodep->dtypep()->basicp() && !nodep->dtypep()->basicp()->keyword().isIntNumeric()) { itemp->v3error("Enum names without values only allowed on numeric types"); @@ -1459,7 +1461,12 @@ private: } itemp->valuep(new AstConst(itemp->fileline(), num)); } - num.opAssign(VN_CAST(itemp->valuep(), Const)->num()); + + AstConst* constp = VN_CAST(itemp->valuep(), Const); + if (constp->num().isFourState() && nodep->dtypep()->basicp() + && !nodep->dtypep()->basicp()->isFourstate()) + itemp->v3error("Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19)"); + num.opAssign(constp->num()); // Look for duplicates if (inits.find(num) != inits.end()) { // IEEE says illegal AstNode* otherp = inits.find(num)->second; @@ -1471,7 +1478,7 @@ private: } else { inits.insert(make_pair(num, itemp)); } - num.opAdd(one, VN_CAST(itemp->valuep(), Const)->num()); + num.opAdd(one, constp->num()); } } virtual void visit(AstEnumItem* nodep) { diff --git a/test_regress/t/t_enum_x_bad.out b/test_regress/t/t_enum_x_bad.out new file mode 100644 index 000000000..6677ff6dc --- /dev/null +++ b/test_regress/t/t_enum_x_bad.out @@ -0,0 +1,9 @@ +%Error: t/t_enum_x_bad.v:8: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19) + : ... In instance t + enum bit [1:0] { BADX = 2'b1x } BAD1; + ^~~~ +%Error: t/t_enum_x_bad.v:11: Enum value that is unassigned cannot follow value with X/Zs (IEEE 2017 6.19) + : ... In instance t + e1 + ^~ +%Error: Exiting due to diff --git a/test_regress/t/t_enum_x_bad.pl b/test_regress/t/t_enum_x_bad.pl new file mode 100755 index 000000000..573f98f12 --- /dev/null +++ b/test_regress/t/t_enum_x_bad.pl @@ -0,0 +1,18 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2008 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(linter => 1); + +lint( + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_enum_x_bad.v b/test_regress/t/t_enum_x_bad.v new file mode 100644 index 000000000..876ef29d5 --- /dev/null +++ b/test_regress/t/t_enum_x_bad.v @@ -0,0 +1,18 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2009 by Wilson Snyder. + +module t (/*AUTOARG*/); + + enum bit [1:0] { BADX = 2'b1x } BAD1; + + enum logic [3:0] { e0 = 4'b1xx1, + e1 + } BAD2; + + initial begin + $stop; + end + +endmodule From bd0eadb311664d7ea7c11b3940a20228485dbee1 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 8 Dec 2019 22:48:44 -0500 Subject: [PATCH 05/90] Fix handling user-botch of %d to print real. --- src/V3Number.cpp | 2 ++ test_regress/t/t_display.out | 1 + test_regress/t/t_display.v | 4 ++++ 3 files changed, 7 insertions(+) diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 5328da054..32d78bd63 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -741,6 +741,7 @@ vlsint32_t V3Number::toSInt() const { vluint64_t V3Number::toUQuad() const { UASSERT(!isFourState(), "toUQuad with 4-state "<<*this); // We allow wide numbers that represent values <= 64 bits + if (isDouble()) return static_cast(toDouble()); for (int i=2; i(toDouble()); vluint64_t v = toUQuad(); vluint64_t signExtend = (-(v & (VL_ULL(1)<<(width()-1)))); vluint64_t extended = v | signExtend; diff --git a/test_regress/t/t_display.out b/test_regress/t/t_display.out index 5ab2b8849..10667f059 100644 --- a/test_regress/t/t_display.out +++ b/test_regress/t/t_display.out @@ -49,4 +49,5 @@ extra argument: 0000000000000000 [0] Embedded <#013> return [0] Embedded multiline +log10(2) = 2 *-* All Finished *-* diff --git a/test_regress/t/t_display.v b/test_regress/t/t_display.v index 87fff05bf..da6ab3f7c 100644 --- a/test_regress/t/t_display.v +++ b/test_regress/t/t_display.v @@ -139,6 +139,10 @@ multiline", $time); `ifndef NC // NC-Verilog 5.3 chokes on this test if (str !== 32'h00_bf_11_0a) $stop; `endif + + // $itord conversion bug, note a %d instead of proper float + $display("log10(2) = %d", $log10(100)); + $write("*-* All Finished *-*\n"); $finish; end From c896a76fef2e69f1bbf42b639bb6906b73660159 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 9 Dec 2019 18:25:59 -0500 Subject: [PATCH 06/90] Fix clang warning. --- src/V3AstNodes.h | 1 - 1 file changed, 1 deletion(-) diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 2cb8edf6c..1071470bc 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -3841,7 +3841,6 @@ public: }; class AstStop : public AstNodeStmt { - bool m_maybe; // Maybe stop, maybe not based on error count public: explicit AstStop(FileLine* fl, bool maybe) : AstNodeStmt(fl) {} From ca1b083d5c0cd0151e8473f2ff2d7e58d5e8960e Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 9 Dec 2019 18:53:56 -0500 Subject: [PATCH 07/90] Fix clang warning. --- include/verilated_heavy.h | 2 +- test_regress/t/t_flag_csplit.pl | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 699326971..9b060942b 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -285,7 +285,7 @@ inline std::string VL_CVT_PACK_STR_NN(const std::string& lhs) VL_PURE { return lhs; } inline std::string VL_CVT_PACK_STR_NI(IData lhs) VL_PURE { - WData lw[1]; VL_SET_WI(lw, lhs); + WData lw[VL_WQ_WORDS_E]; VL_SET_WI(lw, lhs); return VL_CVT_PACK_STR_NW(1, lw); } inline std::string VL_CONCATN_NNN(const std::string& lhs, const std::string& rhs) VL_PURE { diff --git a/test_regress/t/t_flag_csplit.pl b/test_regress/t/t_flag_csplit.pl index 44103e503..4d08bb271 100755 --- a/test_regress/t/t_flag_csplit.pl +++ b/test_regress/t/t_flag_csplit.pl @@ -108,6 +108,7 @@ sub check_gcc_flags { my $fh = IO::File->new("<$filename") or error("$! $filenme"); while (defined (my $line = $fh->getline)) { chomp $line; + print ":log: $line\n" if $Self->{verbose}; if ($line =~ /\.cpp/) { my $filetype = ($line =~ /Slow/) ? "slow":"fast"; my $opt = ($line !~ /-O2/) ? "slow":"fast"; From c2037ddbc5d1214bf28f66f6812890810110a702 Mon Sep 17 00:00:00 2001 From: Yutetsu TAKATSUKASA Date: Mon, 9 Dec 2019 19:17:52 -0500 Subject: [PATCH 08/90] Support string compare, icompare, ato* methods, bug1606. Signed-off-by: Wilson Snyder --- Changes | 2 + docs/CONTRIBUTORS | 1 + include/verilated.cpp | 13 +++++ include/verilated_heavy.h | 17 ++++++ include/verilatedos.h | 9 ++++ src/V3AstNodes.h | 73 ++++++++++++++++++++++++++ src/V3EmitCInlines.cpp | 8 +++ src/V3Number.cpp | 35 ++++++++++++ src/V3Number.h | 2 + src/V3Width.cpp | 49 +++++++++++++++-- test_regress/t/t_string_type_methods.v | 17 +++--- 11 files changed, 215 insertions(+), 11 deletions(-) diff --git a/Changes b/Changes index 8620ccfb2..af7d0c7c1 100644 --- a/Changes +++ b/Changes @@ -6,6 +6,8 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Add BOUNDED warning and promote bounded queues to unbounded. +*** Support string compare, icompare, ato* methods, bug1606. [Yutetsu TAKATSUKASA] + * Verilator 4.024 2019-12-08 diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS index 025749b7f..2152dc059 100644 --- a/docs/CONTRIBUTORS +++ b/docs/CONTRIBUTORS @@ -30,4 +30,5 @@ Sebastien Van Cauwenberghe Stefan Wallentowitz Todd Strader Wilson Snyder +Yutetsu TAKATSUKASA Yves Mathieu diff --git a/include/verilated.cpp b/include/verilated.cpp index de2e6412f..d0bc7de08 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -30,7 +30,9 @@ #include "verilated_config.h" +#include #include +#include #include // mkdir #if defined(_WIN32) || defined(__MINGW32__) @@ -1824,6 +1826,17 @@ std::string VL_CVT_PACK_STR_NW(int lwords, WDataInP lwp) VL_MT_SAFE { return std::string(destout, len); } +IData VL_ATOI_N(const std::string& str, int base) VL_PURE { + std::string str_mod = str; // create a new instance to modify later. + // IEEE 1800-2017 6.16.9 says '_' may exist. + str_mod.erase(std::remove(str_mod.begin(), str_mod.end(), '_'), str_mod.end()); + + errno = 0; + long v = std::strtol(str_mod.c_str(), NULL, base); + if (errno != 0) v = 0; + return static_cast(v); +} + //=========================================================================== // Verilated:: Methods diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 9b060942b..c041b56eb 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -350,4 +350,21 @@ inline IData VL_VALUEPLUSARGS_INQ(int rbits, const std::string& ld, double& rdr) } extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) VL_MT_SAFE; +//====================================================================== +// Strings + +inline IData VL_CMP_NN(const std::string& lhs, const std::string& rhs, bool ignoreCase) VL_PURE { + // SystemVerilog Language Standard does not allow a string variable to contain '\0'. + // So C functions such as strcmp() can correctly compare strings. + int result; + if (ignoreCase) { + result = VL_STRCASECMP(lhs.c_str(), rhs.c_str()); + } else { + result = std::strcmp(lhs.c_str(), rhs.c_str()); + } + return result; +} + +extern IData VL_ATOI_N(const std::string& str, int base) VL_PURE; + #endif // Guard diff --git a/include/verilatedos.h b/include/verilatedos.h index 856b539a0..e60ea5754 100644 --- a/include/verilatedos.h +++ b/include/verilatedos.h @@ -423,6 +423,15 @@ typedef unsigned long long vluint64_t; ///< 64-bit unsigned type # endif #endif +//========================================================================= +// String related OS-specific functions + +#ifdef _MSC_VER +# define VL_STRCASECMP _stricmp +#else +# define VL_STRCASECMP strcasecmp +#endif + //========================================================================= #endif // Guard diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 1071470bc..423fc5171 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -4818,6 +4818,47 @@ public: virtual bool sizeMattersLhs() const { return false; } }; +class AstAtoN : public AstNodeUniop { + // string.atoi(), atobin(), atohex(), atooct(), atoireal() +public: + enum FmtType {ATOI = 10, ATOHEX = 16, ATOOCT = 8, ATOBIN = 2, ATOREAL = -1}; +private: + FmtType m_fmt; // Operation type +public: + AstAtoN(FileLine* fl, AstNode* lhsp, FmtType fmt) + : AstNodeUniop(fl, lhsp) + , m_fmt(fmt) { + fmt == ATOREAL ? dtypeSetDouble() : dtypeSetSigned32(); + } + ASTNODE_NODE_FUNCS(AtoN) + virtual void numberOperate(V3Number& out, const V3Number& lhs) { out.opAtoN(lhs, m_fmt); } + virtual string name() const { + switch (m_fmt) { + case ATOI: return "atoi"; + case ATOHEX: return "atohex"; + case ATOOCT: return "atooct"; + case ATOBIN: return "atobin"; + case ATOREAL: return "atoreal"; + default: V3ERROR_NA; + } + } + virtual string emitVerilog() { return "%l." + name() + "()"; } + virtual string emitC() { + switch (m_fmt) { + case ATOI: return "VL_ATOI_N(%li, 10)"; + case ATOHEX: return "VL_ATOI_N(%li, 16)"; + case ATOOCT: return "VL_ATOI_N(%li, 8)"; + case ATOBIN: return "VL_ATOI_N(%li, 2)"; + case ATOREAL: return "std::atof(%li.c_str())"; + default: V3ERROR_NA; + } + } + virtual bool cleanOut() const { return true; } + virtual bool cleanLhs() const { return true; } + virtual bool sizeMattersLhs() const { return false; } + FmtType format() const { return m_fmt; } +}; + //====================================================================== // Binary ops @@ -5950,6 +5991,38 @@ public: virtual string emitC() { return "hypot(%li,%ri)"; } }; +class AstCompareNN : public AstNodeBiop { + // Verilog str.compare() and str.icompare() +private: + bool m_ignoreCase; // True for str.icompare() +public: + AstCompareNN(FileLine* fl, AstNode* lhsp, AstNode* rhsp, bool ignoreCase) + : AstNodeBiop(fl, lhsp, rhsp) + , m_ignoreCase(ignoreCase) { + dtypeSetUInt32(); + } + ASTNODE_NODE_FUNCS(CompareNN) + virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { + return new AstCompareNN(this->fileline(), lhsp, rhsp, m_ignoreCase); + } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + out.opCompareNN(lhs, rhs, m_ignoreCase); + } + virtual string name() const { return m_ignoreCase ? "icompare" : "compare"; } + virtual string emitVerilog() { + return m_ignoreCase ? "%k(%l.icompare(%r))" : "%k(%l.compare(%r))"; + } + virtual string emitC() { + return m_ignoreCase ? "VL_CMP_NN(%li,%ri,true)" : "VL_CMP_NN(%li,%ri,false)"; + } + virtual string emitSimpleOperator() { return ""; } + virtual bool cleanOut() const { return true; } + virtual bool cleanLhs() const { return true; } + virtual bool cleanRhs() const { return true; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } +}; + class AstPast : public AstNodeMath { // Verilog $past // Parents: math diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index bbea7ebed..011e5e24d 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -58,6 +58,14 @@ class EmitCInlines : EmitCBaseVisitor { v3Global.needHeavy(true); iterateChildren(nodep); } + virtual void visit(AstAtoN* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } + virtual void visit(AstCompareNN* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } // Default virtual void visit(AstNode* nodep) { diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 32d78bd63..28940635d 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -26,6 +26,7 @@ #include "V3Ast.h" #include +#include #include #include #include @@ -1243,6 +1244,40 @@ V3Number& V3Number::opLogEq(const V3Number& lhs, const V3Number& rhs) { return opLogAnd(ifa, ifb); } +V3Number& V3Number::opAtoN(const V3Number& lhs, int base) { + NUM_ASSERT_OP_ARGS1(lhs); + NUM_ASSERT_STRING_ARGS1(lhs); + UASSERT(base == AstAtoN::ATOREAL || base == 2 || base == 8 || base == 10 || base == 16, + "base must be one of AstAtoN::ATOREAL, 2, 8, 10, or 16."); + + std::string str = lhs.toString(); // new instance to edit later + if (base == AstAtoN::ATOREAL) return setDouble(std::atof(str.c_str())); + + // IEEE 1800-2017 6.16.9 says '_' may exist. + str.erase(std::remove(str.begin(), str.end(), '_'), str.end()); + + errno = 0; + long v = std::strtol(str.c_str(), NULL, base); + if (errno != 0) v = 0; + return setLongS(static_cast(v)); +} + +V3Number& V3Number::opCompareNN(const V3Number& lhs, const V3Number& rhs, bool ignoreCase) { + NUM_ASSERT_OP_ARGS2(lhs, rhs); + NUM_ASSERT_STRING_ARGS2(lhs, rhs); + // SystemVerilog Language Standard does not allow a string variable to contain '\0'. + // So C functions such as strcmp() can correctly compare strings. + int result; + string lstring = lhs.toString(); + string rstring = rhs.toString(); + if (ignoreCase) { + result = VL_STRCASECMP(lstring.c_str(), rstring.c_str()); + } else { + result = std::strcmp(lstring.c_str(), rstring.c_str()); + } + return setLongS(result); +} + V3Number& V3Number::opEq(const V3Number& lhs, const V3Number& rhs) { // i op j, 1 bit return, max(L(lhs),L(rhs)) calculation, careful need to X/Z extend. NUM_ASSERT_OP_ARGS2(lhs, rhs); diff --git a/src/V3Number.h b/src/V3Number.h index f40f8616d..d4ab06435 100644 --- a/src/V3Number.h +++ b/src/V3Number.h @@ -360,6 +360,8 @@ public: V3Number& opLteD (const V3Number& lhs, const V3Number& rhs); // "N" - string operations + V3Number& opAtoN (const V3Number& lhs, int base); + V3Number& opCompareNN(const V3Number& lhs,const V3Number& rhs, bool ignoreCase); V3Number& opConcatN (const V3Number& lhs, const V3Number& rhs); V3Number& opReplN (const V3Number& lhs, const V3Number& rhs); V3Number& opReplN (const V3Number& lhs, uint32_t rhsval); diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 2ffe7a706..d67dae471 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -333,6 +333,30 @@ private: // Output integer, input string virtual void visit(AstLenN* nodep) { visit_Os32_string(nodep); } + virtual void visit(AstCompareNN* nodep) { + // CALLER: str.compare(), str.icompare() + // Widths: 32 bit out + UASSERT_OBJ(nodep->rhsp(), nodep, "For binary ops only!"); + if (m_vup->prelim()) { + // See similar handling in visit_cmp_eq_gt where created + iterateCheckString(nodep, "LHS", nodep->lhsp(), BOTH); + iterateCheckString(nodep, "RHS", nodep->rhsp(), BOTH); + nodep->dtypeSetSigned32(); + } + } + virtual void visit(AstAtoN* nodep) { + // CALLER: str.atobin(), atoi(), atohex(), atooct(), atoreal() + // Width: 64bit floating point for atoreal(), 32bit out for the others + if (m_vup->prelim()) { + // See similar handling in visit_cmp_eq_gt where created + iterateCheckString(nodep, "LHS", nodep->lhsp(), BOTH); + if (nodep->format() == AstAtoN::ATOREAL) { + nodep->dtypeSetDouble(); + } else { + nodep->dtypeSetSigned32(); + } + } + } // Widths: Constant, terminal virtual void visit(AstTime* nodep) { nodep->dtypeSetUInt64(); } @@ -2080,14 +2104,30 @@ private: methodOkArguments(nodep, 0, 0); AstNode* newp = new AstToUpperN(nodep->fileline(), nodep->fromp()->unlinkFrBack()); nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (nodep->name() == "compare" || nodep->name() == "icompare") { + const bool ignoreCase = nodep->name()[0] == 'i'; + methodOkArguments(nodep, 1, 1); + AstArg* argp = VN_CAST(nodep->pinsp(), Arg); + AstNode* lhs = nodep->fromp()->unlinkFrBack(); + AstNode* rhs = argp->exprp()->unlinkFrBack(); + AstNode* newp = new AstCompareNN(nodep->fileline(), lhs, rhs, ignoreCase); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); } else if (nodep->name() == "atobin" || nodep->name() == "atohex" || nodep->name() == "atoi" || nodep->name() == "atooct" - || nodep->name() == "atoreal" - || nodep->name() == "compare" - || nodep->name() == "icompare" - || nodep->name() == "getc" + || nodep->name() == "atoreal") { + AstAtoN::FmtType fmt; + if (nodep->name() == "atobin") fmt = AstAtoN::ATOBIN; + else if (nodep->name() == "atohex") fmt = AstAtoN::ATOHEX; + else if (nodep->name() == "atoi") fmt = AstAtoN::ATOI; + else if (nodep->name() == "atooct") fmt = AstAtoN::ATOOCT; + else if (nodep->name() == "atoreal") fmt = AstAtoN::ATOREAL; + else { V3ERROR_NA; fmt = AstAtoN::ATOI; } // dummy assignment to suppress compiler warning + methodOkArguments(nodep, 0, 0); + AstNode* newp = new AstAtoN(nodep->fileline(), nodep->fromp()->unlinkFrBack(), fmt); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (nodep->name() == "getc" || nodep->name() == "putc") { nodep->v3error("Unsupported: built-in string method "<prettyNameQ()); } else { @@ -3326,6 +3366,7 @@ private: nodep->dtypeSetLogicBool(); } } + void visit_Os32_string(AstNodeUniop* nodep) { // CALLER: LenN // Widths: 32 bit out diff --git a/test_regress/t/t_string_type_methods.v b/test_regress/t/t_string_type_methods.v index 85eadb79f..ccc47cb42 100644 --- a/test_regress/t/t_string_type_methods.v +++ b/test_regress/t/t_string_type_methods.v @@ -25,9 +25,16 @@ module t (/*AUTOARG*/ `ifndef VERILATOR s="1234"; s.putc(2, "z"); `checks(s, "12z4"); s="1234"; `checkh(s.getc(2), "3"); +`endif s="b"; if (s.compare("a") <= 0) $stop; s="b"; if (s.compare("b") != 0) $stop; s="b"; if (s.compare("c") >= 0) $stop; + s="b"; if (s.compare("A") <= 0) $stop; + s="b"; if (s.compare("B") <= 0) $stop; + s="b"; if (s.compare("C") <= 0) $stop; + s="B"; if (s.compare("a") >= 0) $stop; + s="B"; if (s.compare("b") >= 0) $stop; + s="B"; if (s.compare("c") >= 0) $stop; s="b"; if (s.icompare("A") < 0) $stop; s="b"; if (s.icompare("B") != 0) $stop; s="b"; if (s.icompare("C") >= 0) $stop; @@ -36,7 +43,6 @@ module t (/*AUTOARG*/ s="101"; `checkh(s.atooct(), 'o101); s="101"; `checkh(s.atobin(), 'b101); s="1.23"; `checkg(s.atoreal(), 1.23); -`endif s.itoa(123); `checks(s, "123"); s.hextoa(123); `checks(s, "7b"); s.octtoa(123); `checks(s, "173"); @@ -75,29 +81,26 @@ module t (/*AUTOARG*/ s="b"; end else if (cyc==5) begin -`ifndef VERILATOR if (s.compare("a") <= 0) $stop; if (s.compare("b") != 0) $stop; if (s.compare("c") >= 0) $stop; + if (s.compare("A") <= 0) $stop; + if (s.compare("B") <= 0) $stop; + if (s.compare("C") <= 0) $stop; if (s.icompare("A") < 0) $stop; if (s.icompare("B") != 0) $stop; if (s.icompare("C") >= 0) $stop; -`endif s="101"; end else if (cyc==7) begin -`ifndef VERILATOR `checkh(s.atoi(), 'd101); `checkh(s.atohex(), 'h101); `checkh(s.atooct(), 'o101); `checkh(s.atobin(), 'b101); -`endif s="1.23"; end else if (cyc==8) begin -`ifndef VERILATOR `checkg(s.atoreal(), 1.23); -`endif end else if (cyc==9) begin s.itoa(123); From 9cf5acc43e5d93ae0f933a9dc6e393ff97cd7f1e Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Mon, 9 Dec 2019 05:55:18 -0500 Subject: [PATCH 09/90] Install vcddiff for Travis, bug1600. --- .travis.yml | 1 + ci/build_vcddiff.sh | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 ci/build_vcddiff.sh diff --git a/.travis.yml b/.travis.yml index 100342091..9bdca4d68 100644 --- a/.travis.yml +++ b/.travis.yml @@ -27,6 +27,7 @@ before_install: - yes yes | sudo cpan -fi Unix::Processors Parallel::Forker Bit::Vector - sudo apt-get install gdb gtkwave before_script: + - bash -x ci/build_vcddiff.sh - bash -x ci/build_verilator.sh after_script: - ccache -s diff --git a/ci/build_vcddiff.sh b/ci/build_vcddiff.sh new file mode 100644 index 000000000..eefbf13cd --- /dev/null +++ b/ci/build_vcddiff.sh @@ -0,0 +1,18 @@ +#!/bin/bash +# DESCRIPTION: Verilator: Build script for vcddiff +# +# Copyright 2019 by Todd Strader. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. +set -e + +# NB: it would be better to add this via a PPA + +TMP_DIR=$(mktemp -d) + +git -C ${TMP_DIR} clone https://github.com/veripool/vcddiff +VCDDIFF_DIR=${TMP_DIR}/vcddiff +git -C ${VCDDIFF_DIR} checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c +make -C ${VCDDIFF_DIR} +sudo cp ${VCDDIFF_DIR}/vcddiff /usr/local/bin From 1c643916a303d129e03312d36ba5d3870e25d850 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 10 Dec 2019 18:53:35 -0500 Subject: [PATCH 10/90] Tests: Add copy_if_golden to harness. --- test_regress/driver.pl | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/test_regress/driver.pl b/test_regress/driver.pl index c2aadd541..ab1d60acd 100755 --- a/test_regress/driver.pl +++ b/test_regress/driver.pl @@ -2008,6 +2008,17 @@ sub files_identical { } } +sub copy_if_golden { + my $self = (ref $_[0]? shift : $Self); + my $fn1 = shift; + my $fn2 = shift; + if ($ENV{HARNESS_UPDATE_GOLDEN}) { # Update golden files with current + warn "%Warning: HARNESS_UPDATE_GOLDEN set: cp $fn1 $fn2\n"; + eval "use File::Copy;"; + File::Copy::copy($fn1, $fn2); + } +} + sub vcd_identical { my $self = (ref $_[0]? shift : $Self); my $fn1 = shift; @@ -2028,11 +2039,7 @@ sub vcd_identical { if ($out ne '') { print $out; $self->error("VCD miscompare $fn1 $fn2\n"); - if ($ENV{HARNESS_UPDATE_GOLDEN}) { # Update golden files with current - warn "%Warning: HARNESS_UPDATE_GOLDEN set: cp $fn1 $fn2\n"; - eval "use File::Copy;"; - File::Copy::copy($fn1,$fn2); - } + $self->copy_if_golden($fn1, $fn2); return 0; } } @@ -2047,11 +2054,7 @@ sub vcd_identical { if ($a ne $b) { print "$a\n$b\n" if $::Debug; $self->error("VCD hier mismatch $fn1 $fn2\n"); - if ($ENV{HARNESS_UPDATE_GOLDEN}) { # Update golden files with current - warn "%Warning: HARNESS_UPDATE_GOLDEN set: cp $fn1 $fn2\n"; - eval "use File::Copy;"; - File::Copy::copy($fn1,$fn2); - } + $self->copy_if_golden($fn1, $fn2); return 0; } } From 521418d83235cbc4e60fbd264c6e7fca594dd572 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 10 Dec 2019 18:55:09 -0500 Subject: [PATCH 11/90] Update FST trace API for better performance. --- Changes | 2 + include/gtkwave/fstapi.c | 139 +++++++++++++++++++++++++++++++++++- include/gtkwave/fstapi.h | 8 +++ include/verilated_fst_c.cpp | 46 ------------ include/verilated_fst_c.h | 9 +-- 5 files changed, 149 insertions(+), 55 deletions(-) diff --git a/Changes b/Changes index af7d0c7c1..254880bea 100644 --- a/Changes +++ b/Changes @@ -8,6 +8,8 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support string compare, icompare, ato* methods, bug1606. [Yutetsu TAKATSUKASA] +**** Update FST trace API for better performance. + * Verilator 4.024 2019-12-08 diff --git a/include/gtkwave/fstapi.c b/include/gtkwave/fstapi.c index aa9f3b975..3f52a7994 100644 --- a/include/gtkwave/fstapi.c +++ b/include/gtkwave/fstapi.c @@ -133,9 +133,9 @@ void **JenkinsIns(void *base_i, const unsigned char *mem, uint32_t length, uint3 #endif #ifdef __GNUC__ -// Boolean expression more often true than false +/* Boolean expression more often true than false */ #define FST_LIKELY(x) __builtin_expect(!!(x), 1) -// Boolean expression more often false than true +/* Boolean expression more often false than true */ #define FST_UNLIKELY(x) __builtin_expect(!!(x), 0) #else #define FST_LIKELY(x) (!!(x)) @@ -737,6 +737,9 @@ off_t hier_file_len; uint32_t *valpos_mem; unsigned char *curval_mem; +unsigned char *outval_mem; /* for two-state / Verilator-style value changes */ +uint32_t outval_alloc_siz; + char *filename; fstHandle maxhandle; @@ -1944,6 +1947,11 @@ if(xc && !xc->already_in_close && !xc->already_in_flush) } } fstDestroyMmaps(xc, 1); + if(xc->outval_mem) + { + free(xc->outval_mem); xc->outval_mem = NULL; + xc->outval_alloc_siz = 0; + } /* write out geom section */ fflush(xc->geom_handle); @@ -2913,7 +2921,7 @@ if(FST_LIKELY((xc) && (handle <= xc->maxhandle))) { xc->vchg_alloc_siz += (xc->fst_break_add_size + len); /* +len added in the case of extremely long vectors and small break add sizes */ xc->vchg_mem = (unsigned char *)realloc(xc->vchg_mem, xc->vchg_alloc_siz); - if(VL_UNLIKELY(!xc->vchg_mem)) + if(FST_UNLIKELY(!xc->vchg_mem)) { fprintf(stderr, FST_APIMESS "Could not realloc() in fstWriterEmitValueChange, exiting.\n"); exit(255); @@ -2998,6 +3006,131 @@ if(FST_LIKELY((xc) && (handle <= xc->maxhandle))) } } +void fstWriterEmitValueChange32(void *ctx, fstHandle handle, + uint32_t bits, uint32_t val) { + char buf[33]; + char *s = buf; + int i; + for (i = 0; i < bits; ++i) + { + *s++ = '0' + ((val >> (bits - i - 1)) & 1); + } + *s = '\0'; + fstWriterEmitValueChange(ctx, handle, buf); +} +void fstWriterEmitValueChange64(void *ctx, fstHandle handle, + uint32_t bits, uint64_t val) { + char buf[65]; + char *s = buf; + int i; + for (i = 0; i < bits; ++i) + { + *s++ = '0' + ((val >> (bits - i - 1)) & 1); + } + *s = '\0'; + fstWriterEmitValueChange(ctx, handle, buf); +} +void fstWriterEmitValueChangeVec32(void *ctx, fstHandle handle, + uint32_t bits, const uint32_t *val) { + struct fstWriterContext *xc = (struct fstWriterContext *)ctx; + if (FST_UNLIKELY(bits <= 32)) + { + fstWriterEmitValueChange32(ctx, handle, bits, val[0]); + } + else if(FST_LIKELY(xc)) + { + int bq = bits / 32; + int br = bits & 31; + int i; + int w; + uint32_t v; + unsigned char* s; + if (FST_UNLIKELY(bits + 1 > xc->outval_alloc_siz)) + { + xc->outval_alloc_siz = bits*2 + 1; + xc->outval_mem = (unsigned char*)realloc(xc->outval_mem, xc->outval_alloc_siz); + if (FST_UNLIKELY(!xc->outval_mem)) + { + fprintf(stderr, + FST_APIMESS "Could not realloc() in fstWriterEmitValueChangeVec32, exiting.\n"); + exit(255); + } + } + s = xc->outval_mem; + { + w = bq; + v = val[w]; + for (i = 0; i < br; ++i) + { + *s++ = '0' + ((v >> (br - i - 1)) & 1); + } + } + for (w = bq - 1; w >= 0; --w) + { + v = val[w]; + for (i = (32 - 4); i >= 0; i -= 4) { + s[0] = '0' + ((v >> (i + 3)) & 1); + s[1] = '0' + ((v >> (i + 2)) & 1); + s[2] = '0' + ((v >> (i + 1)) & 1); + s[3] = '0' + ((v >> (i + 0)) & 1); + s += 4; + } + } + *s = '\0'; + fstWriterEmitValueChange(ctx, handle, xc->outval_mem); + } +} +void fstWriterEmitValueChangeVec64(void *ctx, fstHandle handle, + uint32_t bits, const uint64_t *val) { + struct fstWriterContext *xc = (struct fstWriterContext *)ctx; + if (FST_UNLIKELY(bits <= 64)) + { + fstWriterEmitValueChange64(ctx, handle, bits, val[0]); + } + else if(FST_LIKELY(xc)) + { + int bq = bits / 64; + int br = bits & 63; + int i; + int w; + uint32_t v; + unsigned char* s; + if (FST_UNLIKELY(bits + 1 > xc->outval_alloc_siz)) + { + xc->outval_alloc_siz = bits*2 + 1; + xc->outval_mem = (unsigned char*)realloc(xc->outval_mem, xc->outval_alloc_siz); + if (FST_UNLIKELY(!xc->outval_mem)) + { + fprintf(stderr, + FST_APIMESS "Could not realloc() in fstWriterEmitValueChangeVec64, exiting.\n"); + exit(255); + } + } + s = xc->outval_mem; + { + w = bq; + v = val[w]; + for (i = 0; i < br; ++i) + { + *s++ = '0' + ((v >> (br - i - 1)) & 1); + } + } + for (w = bq - 1; w >= 0; --w) { + v = val[w]; + for (i = (64 - 4); i >= 0; i -= 4) + { + s[0] = '0' + ((v >> (i + 3)) & 1); + s[1] = '0' + ((v >> (i + 2)) & 1); + s[2] = '0' + ((v >> (i + 1)) & 1); + s[3] = '0' + ((v >> (i + 0)) & 1); + s += 4; + } + } + *s = '\0'; + fstWriterEmitValueChange(ctx, handle, xc->outval_mem); + } +} + void fstWriterEmitVariableLengthValueChange(void *ctx, fstHandle handle, const void *val, uint32_t len) { diff --git a/include/gtkwave/fstapi.h b/include/gtkwave/fstapi.h index aef6de23b..bbc82c278 100644 --- a/include/gtkwave/fstapi.h +++ b/include/gtkwave/fstapi.h @@ -355,6 +355,14 @@ fstHandle fstWriterCreateVar2(void *ctx, enum fstVarType vt, enum fstVarDi void fstWriterEmitDumpActive(void *ctx, int enable); void fstWriterEmitEnumTableRef(void *ctx, fstEnumHandle handle); void fstWriterEmitValueChange(void *ctx, fstHandle handle, const void *val); +void fstWriterEmitValueChange32(void *ctx, fstHandle handle, + uint32_t bits, uint32_t val); +void fstWriterEmitValueChange64(void *ctx, fstHandle handle, + uint32_t bits, uint64_t val); +void fstWriterEmitValueChangeVec32(void *ctx, fstHandle handle, + uint32_t bits, const uint32_t *val); +void fstWriterEmitValueChangeVec64(void *ctx, fstHandle handle, + uint32_t bits, const uint64_t *val); void fstWriterEmitVariableLengthValueChange(void *ctx, fstHandle handle, const void *val, uint32_t len); void fstWriterEmitTimeChange(void *ctx, uint64_t tim); void fstWriterFlushContext(void *ctx); diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp index 56f56d8b6..2c94e53ef 100644 --- a/include/verilated_fst_c.cpp +++ b/include/verilated_fst_c.cpp @@ -205,52 +205,6 @@ void VerilatedFst::dump(vluint64_t timeui) { } } -//============================================================================= -// Helpers - -char* VerilatedFst::word2Str(vluint32_t newval, int bits) { - // Constructor makes sure m_valueStrBuffer.reserve() > 32+1 - char* s = m_valueStrBuffer.data(); - for (int i = 0; i < bits; ++i) { - *s++ = '0' + ((newval>>(bits-i-1))&1); - } - *s = '\0'; - return m_valueStrBuffer.data(); -} - -char* VerilatedFst::quad2Str(vluint64_t newval, int bits) { - // Constructor makes sure m_valueStrBuffer.reserve() > 64+1 - char* s = m_valueStrBuffer.data(); - for (int i = 0; i < bits; ++i) { - *s++ = '0' + ((newval>>(bits-i-1))&1); - } - *s = '\0'; - return m_valueStrBuffer.data(); -} - -char* VerilatedFst::array2Str(const vluint32_t* newval, int bits) { - int bq = bits / 32; - int br = bits & 31; - m_valueStrBuffer.reserve(bits+1); - char* s = m_valueStrBuffer.data(); - vluint32_t v = newval[bq]; - for (int i = 0; i < br; ++i) { - *s++ = '0' + ((v>>(br-i-1))&1); - } - for (int w = bq-1; w >= 0; --w) { - v = newval[w]; - for (int i = (32 - 4); i >= 0; i-=4) { - s[0] = '0' + ((v>>(i+3))&1); - s[1] = '0' + ((v>>(i+2))&1); - s[2] = '0' + ((v>>(i+1))&1); - s[3] = '0' + ((v>>(i+0))&1); - s+=4; - } - } - *s = '\0'; - return m_valueStrBuffer.data(); -} - //******************************************************************** // Local Variables: // End: diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h index bda5a66be..786ed6f7b 100644 --- a/include/verilated_fst_c.h +++ b/include/verilated_fst_c.h @@ -63,9 +63,6 @@ private: int arraynum, vluint32_t len); // helpers std::vector m_valueStrBuffer; - char* word2Str(vluint32_t newval, int bits); - char* quad2Str(vluint64_t newval, int bits); - char* array2Str(const vluint32_t* newval, int bits); public: explicit VerilatedFst(void* fst=NULL); ~VerilatedFst() { if (m_fst == NULL) { fstWriterClose(m_fst); } } @@ -140,7 +137,7 @@ public: fstWriterEmitValueChange(m_fst, m_code2symbol[code], newval ? "1" : "0"); } void chgBus(vluint32_t code, const vluint32_t newval, int bits) { - fstWriterEmitValueChange(m_fst, m_code2symbol[code], word2Str(newval, bits)); + fstWriterEmitValueChange32(m_fst, m_code2symbol[code], bits, newval); } void chgDouble(vluint32_t code, const double newval) { double val = newval; @@ -151,10 +148,10 @@ public: fstWriterEmitValueChange(m_fst, m_code2symbol[code], &val); } void chgQuad(vluint32_t code, const vluint64_t newval, int bits) { - fstWriterEmitValueChange(m_fst, m_code2symbol[code], quad2Str(newval, bits)); + fstWriterEmitValueChange64(m_fst, m_code2symbol[code], bits, newval); } void chgArray(vluint32_t code, const vluint32_t* newval, int bits) { - fstWriterEmitValueChange(m_fst, m_code2symbol[code], array2Str(newval, bits)); + fstWriterEmitValueChangeVec32(m_fst, m_code2symbol[code], bits, newval); } void fullBit(vluint32_t code, const vluint32_t newval) { From f7a06cb54a082408ae47b4e74205586447895c0a Mon Sep 17 00:00:00 2001 From: Julien Margetts <> Date: Wed, 11 Dec 2019 17:15:45 -0500 Subject: [PATCH 12/90] Fix little endian cell ranges, bug1631. Signed-off-by: Wilson Snyder --- Changes | 2 + src/V3Inst.cpp | 5 +- test_regress/t/t_inst_array_connect.pl | 20 ++++++ test_regress/t/t_inst_array_connect.v | 85 ++++++++++++++++++++++++++ 4 files changed, 111 insertions(+), 1 deletion(-) create mode 100755 test_regress/t/t_inst_array_connect.pl create mode 100644 test_regress/t/t_inst_array_connect.v diff --git a/Changes b/Changes index 254880bea..57f7c9fbf 100644 --- a/Changes +++ b/Changes @@ -10,6 +10,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Update FST trace API for better performance. +**** Fix little endian cell ranges, bug1631. [Julien Margetts] + * Verilator 4.024 2019-12-08 diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp index cb62b5055..f35a87478 100644 --- a/src/V3Inst.cpp +++ b/src/V3Inst.cpp @@ -328,8 +328,11 @@ private: <<" pd="<exprp()->dtypep(), UnpackArrayDType)->rangep(); + int arraySelNum = rangep->littleEndian() + ? (rangep->elementsConst() - 1 - m_instSelNum) : m_instSelNum; AstNode* exprp = nodep->exprp()->unlinkFrBack(); - exprp = new AstArraySel(exprp->fileline(), exprp, m_instSelNum); + exprp = new AstArraySel(exprp->fileline(), exprp, arraySelNum); nodep->exprp(exprp); } else if (expwidth == pinwidth) { // NOP: Arrayed instants: widths match so connect to each instance diff --git a/test_regress/t/t_inst_array_connect.pl b/test_regress/t/t_inst_array_connect.pl new file mode 100755 index 000000000..6b3b15be5 --- /dev/null +++ b/test_regress/t/t_inst_array_connect.pl @@ -0,0 +1,20 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2019 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_inst_array_connect.v b/test_regress/t/t_inst_array_connect.v new file mode 100644 index 000000000..db4995f90 --- /dev/null +++ b/test_regress/t/t_inst_array_connect.v @@ -0,0 +1,85 @@ +// DESCRIPTION: Verilator: Verilog Test module for Issue#1631 +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Julien Margetts. + +module t (/*AUTOARG*/ + clk + ); + input clk; + + localparam N = 4; + + wire [7:0] cval1[0:N-1]; + wire [7:0] cval2[N-1:0]; + wire [7:0] cval3[0:N-1]; + wire [7:0] cval4[N-1:0]; + + wire [3:0] inc; + + assign inc = 4'b0001; + + // verilator lint_off LITENDIAN + + COUNTER UCOUNTER1[N-1:0] + ( + .clk (clk), + .inc (inc), + .o (cval1) // Twisted + ); + + COUNTER UCOUNTER2[N-1:0] + ( + .clk (clk), + .inc (inc), + .o (cval2) // Matches + ); + + COUNTER UCOUNTER3[0:N-1] + ( + .clk (clk), + .inc (inc), + .o (cval3) // Matches + ); + + COUNTER UCOUNTER4[0:N-1] + ( + .clk (clk), + .inc (inc), + .o (cval4) // Twisted + ); + + always @(posedge clk) begin + if ((cval1[3] != cval2[0]) || (cval3[3] != cval4[0])) + $stop; + + if ((cval1[0] + cval1[1] + cval1[2] + cval2[1] + cval2[2] + cval2[3] + + cval3[0] + cval3[1] + cval3[2] + cval4[1] + cval4[2] + cval4[3]) != 0) + $stop; + +`ifdef TEST_VERBOSE + $display("%d %d %d %d", cval1[0], cval1[1], cval1[2], cval1[3]); + $display("%d %d %d %d", cval2[0], cval2[1], cval2[2], cval2[3]); + $display("%d %d %d %d", cval3[0], cval3[1], cval3[2], cval3[3]); + $display("%d %d %d %d", cval4[0], cval4[1], cval4[2], cval4[3]); +`endif + + if (cval1[0] + cval1[3] > 3) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end +endmodule + +module COUNTER + ( + input clk, + input inc, + output reg [7:0] o + ); + + initial o = 8'd0; // No reset input + + always @(posedge clk) if (inc) o <= o + 1; + +endmodule From 6046b06b171325668b266d9af9695634afd0c543 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 11 Dec 2019 18:56:10 -0500 Subject: [PATCH 13/90] Tests: Fix no-email contributors. --- test_regress/t/t_dist_contributors.pl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test_regress/t/t_dist_contributors.pl b/test_regress/t/t_dist_contributors.pl index e2aa1fa49..e8a092dd3 100755 --- a/test_regress/t/t_dist_contributors.pl +++ b/test_regress/t/t_dist_contributors.pl @@ -46,7 +46,7 @@ sub read_contributors { # Assumes git .mailmap format while (my $line = ($fh && $fh->getline)) { while ($line =~ /(.*)/g) { - $line =~ s/ *<[^>]+>//; + $line =~ s/ *<[^>]*>//; $Contributors{$1} = 1; } } @@ -73,7 +73,7 @@ sub read_authors { # Check recent commits in case did commit my $git_auths = `git log '--pretty=format:%aN <%aE>' | head -20`; foreach my $line (split /\n/, $git_auths) { - $line =~ s/ *<[^>]+>//; + $line =~ s/ *<[^>]*>//; $Authors{$line} = 1; } } From c62c1520485b4042255e274d5ea05980467eeb48 Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Thu, 12 Dec 2019 07:53:08 -0500 Subject: [PATCH 14/90] Commentary --- bin/verilator | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/bin/verilator b/bin/verilator index 8972cc341..3b5f43a87 100755 --- a/bin/verilator +++ b/bin/verilator @@ -2674,7 +2674,7 @@ The remainder of this section describe behavior with --threads 1 or VL_THREADED is defined when compiling a threaded Verilated module, causing the Verilated support classes become threadsafe. -The thread used for constructing a model must the the same thread that +The thread used for constructing a model must be the same thread that calls eval() into the model, this is called the "eval thread". The thread used to perform certain global operations such as saving and tracing must be done by a "main thread". In most cases the eval thread and main thread @@ -2756,8 +2756,7 @@ The grammar of configuration commands is as follows: =item `verilator_config -Take remaining text up the the next `verilog mode switch and treat it as -Verilator configuration commands. +Take remaining text and treat it as Verilator configuration commands. =item coverage_on [-file "" [-lines [ - ]]] @@ -2995,7 +2994,7 @@ may `ifdef around compiler specific constructs. =item `verilator_config -Take remaining text up the the next `verilog mode switch and treat it as +Take remaining text up to the next `verilog mode switch and treat it as Verilator configuration commands. =item `verilog @@ -4852,7 +4851,7 @@ SystemC module *may* be faster.) =head1 BUGS -First, check the the coding limitations section. +First, check the coding limitations section. Next, try the --debug switch. This will enable additional internal assertions, and may help identify the problem. From 39950d16d0a70fbae61b3e38685486d81ba6865d Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 12 Dec 2019 20:53:58 -0500 Subject: [PATCH 15/90] Ignore `uselib to end-of-line, bug1634. --- Changes | 2 ++ bin/verilator | 7 ++++++- src/verilog.l | 1 + test_regress/t/t_mod_uselib.pl | 16 ++++++++++++++++ test_regress/t/t_mod_uselib.v | 17 +++++++++++++++++ 5 files changed, 42 insertions(+), 1 deletion(-) create mode 100755 test_regress/t/t_mod_uselib.pl create mode 100644 test_regress/t/t_mod_uselib.v diff --git a/Changes b/Changes index 57f7c9fbf..fe5ad5f31 100644 --- a/Changes +++ b/Changes @@ -8,6 +8,8 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support string compare, icompare, ato* methods, bug1606. [Yutetsu TAKATSUKASA] +**** Ignore `uselib to end-of-line, bug1634. [Frederic Antonin] + **** Update FST trace API for better performance. **** Fix little endian cell ranges, bug1631. [Julien Margetts] diff --git a/bin/verilator b/bin/verilator index 3b5f43a87..1a99f5b3f 100755 --- a/bin/verilator +++ b/bin/verilator @@ -3316,7 +3316,7 @@ that Verilator will print a list of known scopes to help your debugging. =head2 Floating Point -Floating Point (real) numbers are supported. +Short floating point (shortreal) numbers are converted to real. =head2 Latches @@ -3506,6 +3506,11 @@ Assignment patterns with order based, default, constant integer (array) or member identifier (struct/union) keys are supported. Data type keys and keys which are computed from a constant expression are not supported. +=item `uselib + +Uselib, a vendor specific library specification method, is ignored along +with anything following it until the end of that line. + =item cast operator Casting is supported only between simple scalar types, signed and unsigned, diff --git a/src/verilog.l b/src/verilog.l index 3740b4736..0422f0007 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -931,6 +931,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} FL_BRK; } // Rest handled by preproc "`suppress_faults" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`timescale"{ws}+[^\n\r]* { FL_FWD; FL_BRK; } // Verilog spec - not supported + "`uselib"{ws}+[^\n\r]* { FL_FWD; FL_BRK; } // Verilog-XL compatibility /* See also setLanguage below */ "`begin_keywords"[ \t]*\"1364-1995\" { FL_FWD; yy_push_state(V95); PARSEP->pushBeginKeywords(YY_START); FL_BRK; } diff --git a/test_regress/t/t_mod_uselib.pl b/test_regress/t/t_mod_uselib.pl new file mode 100755 index 000000000..a1d77d628 --- /dev/null +++ b/test_regress/t/t_mod_uselib.pl @@ -0,0 +1,16 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2010 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + ); + +ok(1); +1; diff --git a/test_regress/t/t_mod_uselib.v b/test_regress/t/t_mod_uselib.v new file mode 100644 index 000000000..8a97b958e --- /dev/null +++ b/test_regress/t/t_mod_uselib.v @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +module t (/*AUTOARG*/); +// // `uselib {dir= | file= | libext= | lib= +`uselib libext=.v + s s (); +endmodule + +module s; + initial begin + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule From 3ac6745658253bb45a74a0827b0b9260bda69027 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Fri, 13 Dec 2019 19:11:37 -0500 Subject: [PATCH 16/90] Add vpiTimeUnit and allow to specify time as string, bug1636. Signed-off-by: Wilson Snyder --- Changes | 2 + include/verilated.cpp | 24 ++++++++++++ include/verilated.h | 15 +++++++- include/verilated_vpi.cpp | 3 ++ include/verilatedos.h | 6 +++ test_regress/t/t_order_multidriven.cpp | 5 +-- test_regress/t/t_scope_map.cpp | 5 +-- test_regress/t/t_timescale.cpp | 53 ++++++++++++++++++++++++++ test_regress/t/t_timescale.pl | 23 +++++++++++ test_regress/t/t_timescale.v | 3 ++ test_regress/t/t_trace_cat.cpp | 5 +-- test_regress/t/t_trace_public_func.cpp | 5 +-- test_regress/t/t_trace_public_sig.cpp | 5 +-- test_regress/t/t_trace_timescale.cpp | 5 +-- test_regress/t/t_vpi_get.cpp | 5 +-- test_regress/t/t_vpi_memory.cpp | 5 +-- test_regress/t/t_vpi_time_cb.cpp | 1 + test_regress/t/t_vpi_unimpl.cpp | 5 +-- test_regress/t/t_vpi_var.cpp | 1 + test_regress/t/t_vpi_zero_time_cb.cpp | 7 +--- 20 files changed, 141 insertions(+), 42 deletions(-) create mode 100644 test_regress/t/t_timescale.cpp create mode 100755 test_regress/t/t_timescale.pl create mode 100644 test_regress/t/t_timescale.v diff --git a/Changes b/Changes index fe5ad5f31..ed764aacf 100644 --- a/Changes +++ b/Changes @@ -12,6 +12,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Update FST trace API for better performance. +**** Add vpiTimeUnit and allow to specify time as string, bug1636. [Stefan Wallentowitz] + **** Fix little endian cell ranges, bug1631. [Julien Margetts] diff --git a/include/verilated.cpp b/include/verilated.cpp index d0bc7de08..8a53a49a9 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -1837,6 +1837,30 @@ IData VL_ATOI_N(const std::string& str, int base) VL_PURE { return static_cast(v); } +//=========================================================================== +// Timescale conversion + +// Helper function for conversion of timescale strings +// Converts (1|10|100)(s|ms|us|ns|ps|fs) to power of then +int VL_TIME_STR_CONVERT(const char* strp) { + int scale = 0; + if (!strp) return 0; + if (*strp++ != '1') return 0; + while (*strp == '0') { scale++; strp++; } + switch (*strp++) { + case 's': break; + case 'm': scale -= 3; break; + case 'u': scale -= 6; break; + case 'n': scale -= 9; break; + case 'p': scale -= 12; break; + case 'f': scale -= 15; break; + default: return 0; + } + if ((scale < 0) && (*strp++ != 's')) return 0; + if (*strp) return 0; + return scale; +} + //=========================================================================== // Verilated:: Methods diff --git a/include/verilated.h b/include/verilated.h index 7634ef713..724ca5215 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -737,8 +737,21 @@ extern void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp); //========================================================================= // Pli macros +extern int VL_TIME_STR_CONVERT(const char* strp) VL_PURE; + #ifndef VL_TIME_PRECISION -# define VL_TIME_PRECISION (-12) ///< Timescale units only for for VPI return - picoseconds +# ifdef VL_TIME_PRECISION_STR +# define VL_TIME_PRECISION VL_TIME_STR_CONVERT(VL_STRINGIFY(VL_TIME_PRECISION_STR)) +# else +# define VL_TIME_PRECISION (-12) ///< Timescale units only for for VPI return - picoseconds +# endif +#endif +#ifndef VL_TIME_UNIT +# ifdef VL_TIME_UNIT_STR +# define VL_TIME_UNIT VL_TIME_STR_CONVERT(VL_STRINGIFY(VL_TIME_PRECISION_STR)) +# else +# define VL_TIME_UNIT (-12) ///< Timescale units only for for VPI return - picoseconds +# endif #endif #ifndef VL_TIME_MULTIPLIER # define VL_TIME_MULTIPLIER 1 diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp index 439b9d555..28fc11458 100644 --- a/include/verilated_vpi.cpp +++ b/include/verilated_vpi.cpp @@ -1224,6 +1224,9 @@ PLI_INT32 vpi_get(PLI_INT32 property, vpiHandle object) { case vpiTimePrecision: { return VL_TIME_PRECISION; } + case vpiTimeUnit: { + return VL_TIME_UNIT; + } case vpiType: { VerilatedVpio* vop = VerilatedVpio::castp(object); if (VL_UNLIKELY(!vop)) return 0; diff --git a/include/verilatedos.h b/include/verilatedos.h index e60ea5754..d874677ba 100644 --- a/include/verilatedos.h +++ b/include/verilatedos.h @@ -432,6 +432,12 @@ typedef unsigned long long vluint64_t; ///< 64-bit unsigned type # define VL_STRCASECMP strcasecmp #endif +//========================================================================= +// Stringify macros + +#define VL_STRINGIFY(x) VL_STRINGIFY2(x) +#define VL_STRINGIFY2(x) #x + //========================================================================= #endif // Guard diff --git a/test_regress/t/t_order_multidriven.cpp b/test_regress/t/t_order_multidriven.cpp index b08e4d14a..7e4f76744 100644 --- a/test_regress/t/t_order_multidriven.cpp +++ b/test_regress/t/t_order_multidriven.cpp @@ -5,9 +5,6 @@ #include "verilated.h" #include "verilated_vcd_c.h" -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - Vt_order_multidriven* vcore; VerilatedVcdC* vcd; vluint64_t vtime; @@ -46,7 +43,7 @@ int main() { vcd = new VerilatedVcdC; vcore->trace(vcd, 99); - vcd->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + vcd->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); vcore->i_clk_wr = 0; vcore->i_clk_rd = 0; diff --git a/test_regress/t/t_scope_map.cpp b/test_regress/t/t_scope_map.cpp index 3e15a7a02..4179e9c7c 100644 --- a/test_regress/t/t_scope_map.cpp +++ b/test_regress/t/t_scope_map.cpp @@ -13,9 +13,6 @@ #include "Vt_scope_map.h" -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - using namespace std; unsigned long long main_time = 0; @@ -31,7 +28,7 @@ int main(int argc, char** argv, char** env) { VerilatedVcdC* tfp = new VerilatedVcdC; top->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); top->CLK = 0; top->eval(); diff --git a/test_regress/t/t_timescale.cpp b/test_regress/t/t_timescale.cpp new file mode 100644 index 000000000..befd0843a --- /dev/null +++ b/test_regress/t/t_timescale.cpp @@ -0,0 +1,53 @@ +// -*- mode: C++; c-file-style: "cc-mode" -*- + +#include + +#include VM_PREFIX_INCLUDE + +unsigned long long main_time = 0; +double sc_time_stamp() { return (double)main_time; } + +#include +using namespace std; + +#define FILENM "t_timescale.cpp" + +#define CHECK_RESULT(got, exp) \ + if ((got) != (exp)) { \ + cout << dec << "%Error: " << FILENM << ":" << __LINE__ << ": GOT = " << (got) \ + << " EXP = " << (exp) << endl; \ + return __LINE__; \ + } + +int main(int argc, char** argv, char** env) { + VM_PREFIX* top = new VM_PREFIX("top"); + + CHECK_RESULT(VL_TIME_STR_CONVERT("100s"), 2); + CHECK_RESULT(VL_TIME_STR_CONVERT("10s"), 1); + CHECK_RESULT(VL_TIME_STR_CONVERT("1s"), 0); + CHECK_RESULT(VL_TIME_STR_CONVERT("100ms"), -1); + CHECK_RESULT(VL_TIME_STR_CONVERT("10ms"), -2); + CHECK_RESULT(VL_TIME_STR_CONVERT("1ms"), -3); + CHECK_RESULT(VL_TIME_STR_CONVERT("100us"), -4); + CHECK_RESULT(VL_TIME_STR_CONVERT("10us"), -5); + CHECK_RESULT(VL_TIME_STR_CONVERT("1us"), -6); + CHECK_RESULT(VL_TIME_STR_CONVERT("100ns"), -7); + CHECK_RESULT(VL_TIME_STR_CONVERT("10ns"), -8); + CHECK_RESULT(VL_TIME_STR_CONVERT("1ns"), -9); + CHECK_RESULT(VL_TIME_STR_CONVERT("100ps"), -10); + CHECK_RESULT(VL_TIME_STR_CONVERT("10ps"), -11); + CHECK_RESULT(VL_TIME_STR_CONVERT("1ps"), -12); + CHECK_RESULT(VL_TIME_STR_CONVERT("100fs"), -13); + CHECK_RESULT(VL_TIME_STR_CONVERT("10fs"), -14); + CHECK_RESULT(VL_TIME_STR_CONVERT("1fs"), -15); + + CHECK_RESULT(VL_TIME_STR_CONVERT("1.5s"), 0); + CHECK_RESULT(VL_TIME_STR_CONVERT("1s "), 0); + CHECK_RESULT(VL_TIME_STR_CONVERT("1ss"), 0); + CHECK_RESULT(VL_TIME_STR_CONVERT("s"), 0); + CHECK_RESULT(VL_TIME_STR_CONVERT(0), 0); + + top->final(); + printf("*-* All Finished *-*\n"); + return 0; +} diff --git a/test_regress/t/t_timescale.pl b/test_regress/t/t_timescale.pl new file mode 100755 index 000000000..cd165daa1 --- /dev/null +++ b/test_regress/t/t_timescale.pl @@ -0,0 +1,23 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt_all => 1); + +compile( + make_top_shell => 0, + make_main => 0, + v_flags2 => ["--exe $Self->{t_dir}/t_timescale.cpp"], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_timescale.v b/test_regress/t/t_timescale.v new file mode 100644 index 000000000..396bc9b35 --- /dev/null +++ b/test_regress/t/t_timescale.v @@ -0,0 +1,3 @@ +module t; + +endmodule diff --git a/test_regress/t/t_trace_cat.cpp b/test_regress/t/t_trace_cat.cpp index ab001d474..d919121d6 100644 --- a/test_regress/t/t_trace_cat.cpp +++ b/test_regress/t/t_trace_cat.cpp @@ -10,15 +10,12 @@ #include VM_PREFIX_INCLUDE -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - unsigned long long main_time = 0; double sc_time_stamp() { return (double)main_time; } const char* trace_name() { static char name[1000]; - VL_SNPRINTF(name, 1000, STRINGIFY(TEST_OBJ_DIR) "/simpart_%04d.vcd", (int)main_time); + VL_SNPRINTF(name, 1000, VL_STRINGIFY(TEST_OBJ_DIR) "/simpart_%04d.vcd", (int)main_time); return name; } diff --git a/test_regress/t/t_trace_public_func.cpp b/test_regress/t/t_trace_public_func.cpp index 21498ceec..cf5606ed5 100644 --- a/test_regress/t/t_trace_public_func.cpp +++ b/test_regress/t/t_trace_public_func.cpp @@ -12,9 +12,6 @@ #include "Vt_trace_public_func_t.h" #include "Vt_trace_public_func_glbl.h" -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - unsigned long long main_time = 0; double sc_time_stamp() { return (double)main_time; } @@ -28,7 +25,7 @@ int main(int argc, char** argv, char** env) { VerilatedVcdC* tfp = new VerilatedVcdC; top->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); while (main_time <= 20) { top->CLK = (main_time / dt_2) % 2; diff --git a/test_regress/t/t_trace_public_sig.cpp b/test_regress/t/t_trace_public_sig.cpp index 56b99eace..457c76560 100644 --- a/test_regress/t/t_trace_public_sig.cpp +++ b/test_regress/t/t_trace_public_sig.cpp @@ -12,9 +12,6 @@ #include "Vt_trace_public_sig_t.h" #include "Vt_trace_public_sig_glbl.h" -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - unsigned long long main_time = 0; double sc_time_stamp() { return (double)main_time; } @@ -28,7 +25,7 @@ int main(int argc, char** argv, char** env) { VerilatedVcdC* tfp = new VerilatedVcdC; top->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); while (main_time <= 20) { top->CLK = (main_time / dt_2) % 2; diff --git a/test_regress/t/t_trace_timescale.cpp b/test_regress/t/t_trace_timescale.cpp index 76ea0c5e1..8dead4e12 100644 --- a/test_regress/t/t_trace_timescale.cpp +++ b/test_regress/t/t_trace_timescale.cpp @@ -10,9 +10,6 @@ #include VM_PREFIX_INCLUDE -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - unsigned long long main_time = 0; double sc_time_stamp() { return ((double)main_time) / VL_TIME_MULTIPLIER; } @@ -28,7 +25,7 @@ int main(int argc, char** argv, char** env) { top->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); top->clk = 0; diff --git a/test_regress/t/t_vpi_get.cpp b/test_regress/t/t_vpi_get.cpp index 6f09bdd4b..d44c6f35a 100644 --- a/test_regress/t/t_vpi_get.cpp +++ b/test_regress/t/t_vpi_get.cpp @@ -47,9 +47,6 @@ using namespace std; unsigned int main_time = false; -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - //====================================================================== #define CHECK_RESULT_VH(got, exp) \ @@ -257,7 +254,7 @@ int main(int argc, char** argv, char** env) { VL_PRINTF("Enabling waves...\n"); VerilatedVcdC* tfp = new VerilatedVcdC; topp->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); #endif topp->eval(); diff --git a/test_regress/t/t_vpi_memory.cpp b/test_regress/t/t_vpi_memory.cpp index 753cc795c..6bab9ae2e 100644 --- a/test_regress/t/t_vpi_memory.cpp +++ b/test_regress/t/t_vpi_memory.cpp @@ -47,9 +47,6 @@ using namespace std; unsigned int main_time = false; -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - //====================================================================== #define CHECK_RESULT_VH(got, exp) \ @@ -227,7 +224,7 @@ int main(int argc, char** argv, char** env) { VL_PRINTF("Enabling waves...\n"); VerilatedVcdC* tfp = new VerilatedVcdC; topp->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); #endif topp->eval(); diff --git a/test_regress/t/t_vpi_time_cb.cpp b/test_regress/t/t_vpi_time_cb.cpp index f897225d0..4d277adb7 100644 --- a/test_regress/t/t_vpi_time_cb.cpp +++ b/test_regress/t/t_vpi_time_cb.cpp @@ -86,6 +86,7 @@ unsigned int callback_count_start_of_sim = 0; #define CHECK_RESULT_CSTR_STRIP(got, exp) CHECK_RESULT_CSTR(got + strspn(got, " "), exp) +// We cannot replace those with VL_STRINGIFY, not available when PLI is build #define STRINGIFY(x) STRINGIFY2(x) #define STRINGIFY2(x) #x diff --git a/test_regress/t/t_vpi_unimpl.cpp b/test_regress/t/t_vpi_unimpl.cpp index 49e28c548..987e77300 100644 --- a/test_regress/t/t_vpi_unimpl.cpp +++ b/test_regress/t/t_vpi_unimpl.cpp @@ -35,9 +35,6 @@ unsigned int main_time = false; unsigned int callback_count = false; -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - //====================================================================== #define CHECK_RESULT_VH(got, exp) \ @@ -163,7 +160,7 @@ int main(int argc, char** argv, char** env) { VL_PRINTF("Enabling waves...\n"); VerilatedVcdC* tfp = new VerilatedVcdC; topp->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); #endif topp->eval(); diff --git a/test_regress/t/t_vpi_var.cpp b/test_regress/t/t_vpi_var.cpp index 933f8e9b7..91ba19008 100644 --- a/test_regress/t/t_vpi_var.cpp +++ b/test_regress/t/t_vpi_var.cpp @@ -90,6 +90,7 @@ unsigned int callback_count_strs_max = 500; #define CHECK_RESULT_CSTR_STRIP(got, exp) CHECK_RESULT_CSTR(got + strspn(got, " "), exp) +// We cannot replace those with VL_STRINGIFY, not available when PLI is build #define STRINGIFY(x) STRINGIFY2(x) #define STRINGIFY2(x) #x diff --git a/test_regress/t/t_vpi_zero_time_cb.cpp b/test_regress/t/t_vpi_zero_time_cb.cpp index 2de6fcbd4..610d7f5cb 100644 --- a/test_regress/t/t_vpi_zero_time_cb.cpp +++ b/test_regress/t/t_vpi_zero_time_cb.cpp @@ -85,9 +85,6 @@ unsigned int callback_count_start_of_sim = 0; #define CHECK_RESULT_CSTR_STRIP(got, exp) CHECK_RESULT_CSTR(got + strspn(got, " "), exp) -#define STRINGIFY(x) STRINGIFY2(x) -#define STRINGIFY2(x) #x - //====================================================================== #ifdef IS_VPI @@ -166,12 +163,12 @@ int main(int argc, char** argv, char** env) { VL_PRINTF("Enabling waves...\n"); VerilatedVcdC* tfp = new VerilatedVcdC; topp->trace(tfp, 99); - tfp->open(STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); + tfp->open(VL_STRINGIFY(TEST_OBJ_DIR) "/simx.vcd"); #endif // Load and initialize the PLI application { - const char* filenamep = STRINGIFY(TEST_OBJ_DIR) "/libvpi.so"; + const char* filenamep = VL_STRINGIFY(TEST_OBJ_DIR) "/libvpi.so"; void* lib = dlopen(filenamep, RTLD_LAZY); void* bootstrap = dlsym(lib, "vpi_compat_bootstrap"); if (!bootstrap) { From 7387db506dabbd8fe802da21bd480231ab19b590 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 14 Dec 2019 09:25:36 -0500 Subject: [PATCH 17/90] GTKWave: Merge from upstream. --- include/gtkwave/fstapi.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/include/gtkwave/fstapi.c b/include/gtkwave/fstapi.c index 3f52a7994..c67cb6e4f 100644 --- a/include/gtkwave/fstapi.c +++ b/include/gtkwave/fstapi.c @@ -3008,26 +3008,24 @@ if(FST_LIKELY((xc) && (handle <= xc->maxhandle))) void fstWriterEmitValueChange32(void *ctx, fstHandle handle, uint32_t bits, uint32_t val) { - char buf[33]; + char buf[32]; char *s = buf; int i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); } - *s = '\0'; fstWriterEmitValueChange(ctx, handle, buf); } void fstWriterEmitValueChange64(void *ctx, fstHandle handle, uint32_t bits, uint64_t val) { - char buf[65]; + char buf[64]; char *s = buf; int i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); } - *s = '\0'; fstWriterEmitValueChange(ctx, handle, buf); } void fstWriterEmitValueChangeVec32(void *ctx, fstHandle handle, @@ -3045,7 +3043,7 @@ void fstWriterEmitValueChangeVec32(void *ctx, fstHandle handle, int w; uint32_t v; unsigned char* s; - if (FST_UNLIKELY(bits + 1 > xc->outval_alloc_siz)) + if (FST_UNLIKELY(bits > xc->outval_alloc_siz)) { xc->outval_alloc_siz = bits*2 + 1; xc->outval_mem = (unsigned char*)realloc(xc->outval_mem, xc->outval_alloc_siz); @@ -3076,7 +3074,6 @@ void fstWriterEmitValueChangeVec32(void *ctx, fstHandle handle, s += 4; } } - *s = '\0'; fstWriterEmitValueChange(ctx, handle, xc->outval_mem); } } @@ -3095,7 +3092,7 @@ void fstWriterEmitValueChangeVec64(void *ctx, fstHandle handle, int w; uint32_t v; unsigned char* s; - if (FST_UNLIKELY(bits + 1 > xc->outval_alloc_siz)) + if (FST_UNLIKELY(bits > xc->outval_alloc_siz)) { xc->outval_alloc_siz = bits*2 + 1; xc->outval_mem = (unsigned char*)realloc(xc->outval_mem, xc->outval_alloc_siz); @@ -3126,7 +3123,6 @@ void fstWriterEmitValueChangeVec64(void *ctx, fstHandle handle, s += 4; } } - *s = '\0'; fstWriterEmitValueChange(ctx, handle, xc->outval_mem); } } From 2a1c57ada6d4fb68446b720b11da195136c21f1d Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 14 Dec 2019 10:13:38 -0500 Subject: [PATCH 18/90] With -Wpedentic, warn about bad `pragma --- src/V3ParseImp.cpp | 9 +++++++++ src/V3ParseImp.h | 7 ++++--- src/verilog.l | 2 +- test_regress/t/t_pp_pragma_bad.out | 4 ++++ test_regress/t/t_pp_pragma_bad.pl | 19 +++++++++++++++++++ test_regress/t/t_pp_pragma_bad.v | 6 ++++++ 6 files changed, 43 insertions(+), 4 deletions(-) create mode 100644 test_regress/t/t_pp_pragma_bad.out create mode 100755 test_regress/t/t_pp_pragma_bad.pl create mode 100644 test_regress/t/t_pp_pragma_bad.v diff --git a/src/V3ParseImp.cpp b/src/V3ParseImp.cpp index e6ba9e484..ee2705d2f 100644 --- a/src/V3ParseImp.cpp +++ b/src/V3ParseImp.cpp @@ -73,6 +73,15 @@ V3ParseImp::~V3ParseImp() { //###################################################################### // Parser utility methods +void V3ParseImp::pragma(const char* textp) { + // Handle `pragma directive + if (0 == strncmp(textp, "`pragma", strlen("`pragma"))) textp += strlen("`pragma"); + while (isspace(*textp)) ++textp; + if (!*textp) { + if (v3Global.opt.pedantic()) yyerrorf("`pragma is missing a pragma_expression."); + } +} + void V3ParseImp::ppline(const char* textp) { // Handle `line directive FileLine* prevFl = copyOrSameFileLine(); diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h index daa5d5831..b5c73003e 100644 --- a/src/V3ParseImp.h +++ b/src/V3ParseImp.h @@ -142,12 +142,13 @@ public: int yylexThis(); static bool optFuture(const string& flag) { return v3Global.opt.isFuture(flag); } - void ppline(const char* text); + void ppline(const char* textp); + void pragma(const char* textp); void linenoInc() { fileline()->linenoInc(); } - void verilatorCmtLint(const char* text, bool on); + void verilatorCmtLint(const char* textp, bool on); void verilatorCmtLintSave(); void verilatorCmtLintRestore(); - void verilatorCmtBad(const char* text); + void verilatorCmtBad(const char* textp); void errorPreprocDirective(const char* textp); void tag(const char* text); void tagNodep(AstNode* nodep) { m_tagNodep = nodep; } diff --git a/src/verilog.l b/src/verilog.l index 0422f0007..cf321fb13 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -923,7 +923,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "`nosuppress_faults" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`nounconnected_drive" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`portcoerce" { FL_FWD; FL_BRK; } - "`pragma"{ws}+[^\n\r]* { FL_FWD; FL_BRK; } // Verilog 2005 + "`pragma"{ws}*[^\n\r]* { FL_FWD; PARSEP->pragma(yytext); FL_BRK; } // Verilog 2005 "`protect" { FL_FWD; FL_BRK; } "`remove_gatenames" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`remove_netnames" { FL_FWD; FL_BRK; } // Verilog-XL compatibility diff --git a/test_regress/t/t_pp_pragma_bad.out b/test_regress/t/t_pp_pragma_bad.out new file mode 100644 index 000000000..3d4e7490b --- /dev/null +++ b/test_regress/t/t_pp_pragma_bad.out @@ -0,0 +1,4 @@ +%Error: t/t_pp_pragma_bad.v:6: `pragma is missing a pragma_expression. +`pragma +^~~~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_pp_pragma_bad.pl b/test_regress/t/t_pp_pragma_bad.pl new file mode 100755 index 000000000..4d5945c09 --- /dev/null +++ b/test_regress/t/t_pp_pragma_bad.pl @@ -0,0 +1,19 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(linter => 1); + +lint( + verilator_flags2 => ["-Wpedantic"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_pp_pragma_bad.v b/test_regress/t/t_pp_pragma_bad.v new file mode 100644 index 000000000..2abfe64b7 --- /dev/null +++ b/test_regress/t/t_pp_pragma_bad.v @@ -0,0 +1,6 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +`pragma From 2408de16a03c5025a1a5cf442ac554b5c0d4a2b3 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 14 Dec 2019 21:39:47 -0500 Subject: [PATCH 19/90] Support bounded queues. --- Changes | 2 +- include/verilated_heavy.h | 12 ++++++-- src/V3AstNodes.cpp | 2 ++ src/V3AstNodes.h | 6 +++- src/V3Error.h | 3 +- src/V3ParseGrammar.cpp | 9 ++---- src/V3Width.cpp | 3 ++ test_regress/t/t_queue_bounded.v | 29 +++++++++++++++----- test_regress/t/t_queue_bounded_unsup_bad.out | 5 ---- test_regress/t/t_queue_bounded_unsup_bad.pl | 18 ------------ test_regress/t/t_queue_bounded_unsup_bad.v | 8 ------ 11 files changed, 46 insertions(+), 51 deletions(-) delete mode 100644 test_regress/t/t_queue_bounded_unsup_bad.out delete mode 100755 test_regress/t/t_queue_bounded_unsup_bad.pl delete mode 100644 test_regress/t/t_queue_bounded_unsup_bad.v diff --git a/Changes b/Changes index ed764aacf..42c0aefa2 100644 --- a/Changes +++ b/Changes @@ -4,7 +4,7 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 4.025 devel -*** Add BOUNDED warning and promote bounded queues to unbounded. +*** Support bounded queues. *** Support string compare, icompare, ato* methods, bug1606. [Yutetsu TAKATSUKASA] diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index c041b56eb..766bafc5e 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -185,7 +185,8 @@ std::string VL_TO_STRING(const VlAssocArray& obj) { // There are no multithreaded locks on this; the base variable must // be protected by other means // -template class VlQueue { +// Bound here is the maximum size() allowed, e.g. 1 + SystemVerilog bound +template class VlQueue { private: // TYPES typedef std::deque Deque; @@ -215,9 +216,14 @@ public: void erase(size_t index) { if (VL_LIKELY(index < m_deque.size())) m_deque.erase(index); } // function void q.push_front(value) - void push_front(const T_Value& value) { m_deque.push_front(value); } + void push_front(const T_Value& value) { + m_deque.push_front(value); + if (VL_UNLIKELY(T_MaxSize != 0 && m_deque.size() > T_MaxSize)) m_deque.pop_back(); + } // function void q.push_back(value) - void push_back(const T_Value& value) { m_deque.push_back(value); } + void push_back(const T_Value& value) { + if (VL_LIKELY(T_MaxSize == 0 || m_deque.size() < T_MaxSize)) m_deque.push_back(value); + } // function value_t q.pop_front(); T_Value pop_front() { if (m_deque.empty()) return m_defaultValue; diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 648fc09ff..e7c17fd15 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -285,6 +285,8 @@ AstVar::VlArgTypeRecursed AstVar::vlArgTypeRecurse(bool forFunc, const AstNodeDT if (!sub.m_osuffix.empty() || !sub.m_oref.empty()) { out += " " + sub.m_osuffix + sub.m_oref; } + // + 1 below as VlQueue uses 0 to mean unlimited, 1 to mean size() max is 1 + if (adtypep->boundp()) out += ", " + cvtToStr(adtypep->boundConst() + 1); out += "> "; info.m_oprefix = out; return info; diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 423fc5171..d93eb4722 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -743,8 +743,9 @@ class AstQueueDType : public AstNodeDType { private: AstNodeDType* m_refDTypep; // Elements of this type (after widthing) public: - AstQueueDType(FileLine* fl, VFlagChildDType, AstNodeDType* dtp) + AstQueueDType(FileLine* fl, VFlagChildDType, AstNodeDType* dtp, AstNode* boundp) : AstNodeDType(fl) { + setNOp2p(boundp); childDTypep(dtp); // Only for parser refDTypep(NULL); dtypep(NULL); // V3Width will resolve @@ -770,6 +771,9 @@ public: void childDTypep(AstNodeDType* nodep) { setOp1p(nodep); } virtual AstNodeDType* subDTypep() const { return m_refDTypep ? m_refDTypep : childDTypep(); } void refDTypep(AstNodeDType* nodep) { m_refDTypep = nodep; } + AstNode* boundp() const { return op2p(); } // op2 = Bound, NULL = none + void boundp(AstNode* nodep) { setNOp2p(nodep); } + int boundConst() const { AstConst* constp = VN_CAST(boundp(), Const); return (constp?constp->toSInt() : 0); } virtual AstNodeDType* virtRefDTypep() const { return m_refDTypep; } virtual void virtRefDTypep(AstNodeDType* nodep) { refDTypep(nodep); } // METHODS diff --git a/src/V3Error.h b/src/V3Error.h index 8f2892c16..98ce5220f 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -105,7 +105,6 @@ public: SYMRSVDWORD, // Symbol is Reserved Word SYNCASYNCNET, // Mixed sync + async reset TICKCOUNT, // Too large tick count - UNBOUNDED, // Unbounded queue UNDRIVEN, // No drivers UNOPT, // Unoptimizable block UNOPTFLAT, // Unoptimizable block after flattening @@ -155,7 +154,7 @@ public: "REALCVT", "REDEFMACRO", "SELRANGE", "SHORTREAL", "STMTDLY", "SYMRSVDWORD", "SYNCASYNCNET", "TICKCOUNT", - "UNBOUNDED", "UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNOPTTHREADS", + "UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNOPTTHREADS", "UNPACKED", "UNSIGNED", "UNUSED", "USERERROR", "USERFATAL", "USERINFO", "USERWARN", "VARHIDDEN", "WIDTH", "WIDTHCONCAT", diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp index 13155ac15..af9a23c6c 100644 --- a/src/V3ParseGrammar.cpp +++ b/src/V3ParseGrammar.cpp @@ -118,14 +118,11 @@ AstNodeDType* V3ParseGrammar::createArray(AstNodeDType* basep, (rangep->fileline(), VFlagChildDType(), arrayp, rangep); } else if (VN_IS(nrangep, QueueRange)) { arrayp = new AstQueueDType - (nrangep->fileline(), VFlagChildDType(), arrayp); + (nrangep->fileline(), VFlagChildDType(), arrayp, NULL); } else if (rangep && (VN_IS(rangep->leftp(), Unbounded) || VN_IS(rangep->rightp(), Unbounded))) { - if (!VN_IS(rangep->rightp(), Unbounded)) { - rangep->v3warn(UNBOUNDED, - "Unsupported: Bounded queues. Converting to unbounded."); - } - arrayp = new AstQueueDType(nrangep->fileline(), VFlagChildDType(), arrayp); + arrayp = new AstQueueDType(nrangep->fileline(), VFlagChildDType(), arrayp, + rangep->rightp()->cloneTree(true)); } else if (rangep) { arrayp = new AstUnpackArrayDType (rangep->fileline(), VFlagChildDType(), arrayp, rangep); diff --git a/src/V3Width.cpp b/src/V3Width.cpp index d67dae471..6eadf53a9 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1124,6 +1124,9 @@ private: // Iterate into subDTypep() to resolve that type and update pointer. nodep->refDTypep(iterateEditDTypep(nodep, nodep->subDTypep())); nodep->dtypep(nodep); // The array itself, not subDtype + if (VN_IS(nodep->boundp(), Unbounded)) { + nodep->boundp()->unlinkFrBack()->deleteTree(); // NULL will represent unbounded + } UINFO(4,"dtWidthed "< 1); - -lint( - fails => 1, - expect_filename => $Self->{golden_filename}, - ); - -ok(1); -1; diff --git a/test_regress/t/t_queue_bounded_unsup_bad.v b/test_regress/t/t_queue_bounded_unsup_bad.v deleted file mode 100644 index 6a4c94da4..000000000 --- a/test_regress/t/t_queue_bounded_unsup_bad.v +++ /dev/null @@ -1,8 +0,0 @@ -// DESCRIPTION: Verilator: Verilog Test module -// -// This file ONLY is placed into the Public Domain, for any use, -// without warranty, 2019 by Wilson Snyder. - -module t (/*AUTOARG*/); - int q[$ : 3]; -endmodule From 460e0541f3c72369af625939d347297b1e0b5ef6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 14 Dec 2019 22:04:58 -0500 Subject: [PATCH 20/90] Add error when `resetall inside module --- Changes | 2 ++ src/verilog.l | 4 ++-- src/verilog.y | 3 +++ test_regress/t/t_lint_implicit_def_bad.out | 4 ++-- test_regress/t/t_lint_implicit_def_bad.v | 4 ++++ test_regress/t/t_pp_pragma_bad.out | 5 ++++- test_regress/t/t_pp_pragma_bad.v | 6 ++++++ 7 files changed, 23 insertions(+), 5 deletions(-) diff --git a/Changes b/Changes index 42c0aefa2..a04e55c94 100644 --- a/Changes +++ b/Changes @@ -14,6 +14,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Add vpiTimeUnit and allow to specify time as string, bug1636. [Stefan Wallentowitz] +**** Add error when `resetall inside module (IEEE 2017-22.3). + **** Fix little endian cell ranges, bug1631. [Julien Margetts] diff --git a/src/verilog.l b/src/verilog.l index cf321fb13..a4412d938 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -927,8 +927,8 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "`protect" { FL_FWD; FL_BRK; } "`remove_gatenames" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`remove_netnames" { FL_FWD; FL_BRK; } // Verilog-XL compatibility - "`resetall" { FL_FWD; PARSEP->fileline()->warnOn(V3ErrorCode::I_DEF_NETTYPE_WIRE, true); - FL_BRK; } // Rest handled by preproc + "`resetall" { FL; PARSEP->fileline()->warnOn(V3ErrorCode::I_DEF_NETTYPE_WIRE, true); + return yaT_RESETALL; } // Rest handled by preproc "`suppress_faults" { FL_FWD; FL_BRK; } // Verilog-XL compatibility "`timescale"{ws}+[^\n\r]* { FL_FWD; FL_BRK; } // Verilog spec - not supported "`uselib"{ws}+[^\n\r]* { FL_FWD; FL_BRK; } // Verilog-XL compatibility diff --git a/src/verilog.y b/src/verilog.y index 84441eb0f..63958535f 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -287,6 +287,8 @@ class AstSenTree; %token yaD_IGNORE "${ignored-bbox-sys}" %token yaD_DPI "${dpi-sys}" +%token yaT_RESETALL "`resetall" + // is the fileline, abbreviated to shorten "$1" references %token '!' %token '#' @@ -742,6 +744,7 @@ description: // ==IEEE: description | bind_directive { if ($1) GRAMMARP->unitPackage($1->fileline())->addStmtp($1); } // unsupported // IEEE: config_declaration // // Verilator only + | yaT_RESETALL { } // Else, under design, and illegal based on IEEE 22.3 | vltItem { } | error { } ; diff --git a/test_regress/t/t_lint_implicit_def_bad.out b/test_regress/t/t_lint_implicit_def_bad.out index 9d3577db9..b9b0185e0 100644 --- a/test_regress/t/t_lint_implicit_def_bad.out +++ b/test_regress/t/t_lint_implicit_def_bad.out @@ -1,8 +1,8 @@ -%Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:10: Signal definition not found, creating implicitly: 'imp_warn' +%Warning-IMPLICIT: t/t_lint_implicit_def_bad.v:12: Signal definition not found, creating implicitly: 'imp_warn' assign imp_warn = 1'b1; ^~~~~~~~ ... Use "/* verilator lint_off IMPLICIT */" and lint_on around source to disable this message. -%Error: t/t_lint_implicit_def_bad.v:15: Signal definition not found, and implicit disabled with `default_nettype: 'imp_err' +%Error: t/t_lint_implicit_def_bad.v:17: Signal definition not found, and implicit disabled with `default_nettype: 'imp_err' assign imp_err = 1'b1; ^~~~~~~ %Error: Exiting due to diff --git a/test_regress/t/t_lint_implicit_def_bad.v b/test_regress/t/t_lint_implicit_def_bad.v index 071ccbfd0..6dc14ca06 100644 --- a/test_regress/t/t_lint_implicit_def_bad.v +++ b/test_regress/t/t_lint_implicit_def_bad.v @@ -7,6 +7,8 @@ module t (a,z); input a; output z; + sub sub (); + assign imp_warn = 1'b1; // verilator lint_off IMPLICIT assign imp_ok = 1'b1; @@ -16,8 +18,10 @@ module t (a,z); `default_nettype wire assign imp_ok2 = 1'b1; +endmodule `default_nettype none `resetall +module sub; assign imp_ok3 = 1'b1; endmodule diff --git a/test_regress/t/t_pp_pragma_bad.out b/test_regress/t/t_pp_pragma_bad.out index 3d4e7490b..2af125eaa 100644 --- a/test_regress/t/t_pp_pragma_bad.out +++ b/test_regress/t/t_pp_pragma_bad.out @@ -1,4 +1,7 @@ %Error: t/t_pp_pragma_bad.v:6: `pragma is missing a pragma_expression. `pragma ^~~~~~~ -%Error: Exiting due to +%Error: t/t_pp_pragma_bad.v:10: syntax error, unexpected `resetall +`resetall +^~~~~~~~~ +%Error: Cannot continue diff --git a/test_regress/t/t_pp_pragma_bad.v b/test_regress/t/t_pp_pragma_bad.v index 2abfe64b7..1ffa7be9b 100644 --- a/test_regress/t/t_pp_pragma_bad.v +++ b/test_regress/t/t_pp_pragma_bad.v @@ -4,3 +4,9 @@ // without warranty, 2019 by Wilson Snyder. `pragma + +`resetall // Ok +module t; +`resetall // Bad +endmodule +`resetall // Ok From 8cdc0c4e00f2b0266318cdbe25c425fb6ac4caae Mon Sep 17 00:00:00 2001 From: Yutetsu TAKATSUKASA Date: Sun, 15 Dec 2019 08:09:52 -0500 Subject: [PATCH 21/90] Support string putc, getc, substr, bug1606. Signed-off-by: Wilson Snyder --- Changes | 2 +- include/verilated.cpp | 27 +++++++++- include/verilated_heavy.h | 6 ++- src/V3AstNodes.h | 72 ++++++++++++++++++++++++++ src/V3Const.cpp | 2 + src/V3EmitC.cpp | 4 ++ src/V3EmitCInlines.cpp | 12 +++++ src/V3Number.cpp | 38 ++++++++++++++ src/V3Number.h | 3 ++ src/V3Width.cpp | 63 ++++++++++++++++++++-- test_regress/t/t_string_type_methods.v | 64 ++++++++++++++++------- 11 files changed, 268 insertions(+), 25 deletions(-) diff --git a/Changes b/Changes index a04e55c94..6deed2284 100644 --- a/Changes +++ b/Changes @@ -6,7 +6,7 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support bounded queues. -*** Support string compare, icompare, ato* methods, bug1606. [Yutetsu TAKATSUKASA] +*** Support string compare, ato*, etc methods, bug1606. [Yutetsu TAKATSUKASA] **** Ignore `uselib to end-of-line, bug1634. [Frederic Antonin] diff --git a/include/verilated.cpp b/include/verilated.cpp index 8a53a49a9..d4f3783ff 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -1826,8 +1826,33 @@ std::string VL_CVT_PACK_STR_NW(int lwords, WDataInP lwp) VL_MT_SAFE { return std::string(destout, len); } +std::string VL_PUTC_N(const std::string& lhs, IData rhs, CData ths) VL_PURE { + std::string lstring = lhs; + const vlsint32_t rhs_s = rhs; // To signed value + // 6.16.2:str.putc(i, c) does not change the value when i < 0 || i >= str.len() || c == 0 + if (0 <= rhs_s && rhs < lhs.length() && ths != 0) lstring[rhs] = ths; + return lstring; +} + +CData VL_GETC_N(const std::string& lhs, IData rhs) VL_PURE { + CData v = 0; + const vlsint32_t rhs_s = rhs; // To signed value + // 6.16.3:str.getc(i) returns 0 if i < 0 || i >= str.len() + if (0 <= rhs_s && rhs < lhs.length()) v = lhs[rhs]; + return v; +} + +std::string VL_SUBSTR_N(const std::string& lhs, IData rhs, IData ths) VL_PURE { + const vlsint32_t rhs_s = rhs; // To signed value + const vlsint32_t ths_s = ths; // To signed value + // 6.16.8:str.substr(i, j) returns an empty string when i < 0 || j < i || j >= str.len() + if (rhs_s < 0 || ths_s < rhs_s || ths >= lhs.length()) return ""; + // Second parameter of std::string::substr(i, n) is length, not position as in SystemVerilog + return lhs.substr(rhs, ths - rhs + 1); +} + IData VL_ATOI_N(const std::string& str, int base) VL_PURE { - std::string str_mod = str; // create a new instance to modify later. + std::string str_mod = str; // IEEE 1800-2017 6.16.9 says '_' may exist. str_mod.erase(std::remove(str_mod.begin(), str_mod.end(), '_'), str_mod.end()); diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 766bafc5e..f2d395d9c 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -359,8 +359,12 @@ extern IData VL_VALUEPLUSARGS_INN(int, const std::string& ld, std::string& rdr) //====================================================================== // Strings +extern std::string VL_PUTC_N(const std::string& lhs, IData rhs, CData ths) VL_PURE; +extern CData VL_GETC_N(const std::string& lhs, IData rhs) VL_PURE; +extern std::string VL_SUBSTR_N(const std::string& lhs, IData rhs, IData ths) VL_PURE; + inline IData VL_CMP_NN(const std::string& lhs, const std::string& rhs, bool ignoreCase) VL_PURE { - // SystemVerilog Language Standard does not allow a string variable to contain '\0'. + // SystemVerilog does not allow a string variable to contain '\0'. // So C functions such as strcmp() can correctly compare strings. int result; if (ignoreCase) { diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index d93eb4722..a5887219d 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -5995,6 +5995,78 @@ public: virtual string emitC() { return "hypot(%li,%ri)"; } }; +class AstPutcN : public AstNodeTriop { + // Verilog string.putc() +public: + AstPutcN(FileLine* fl, AstNode* lhsp, AstNode* rhsp, AstNode* ths) : AstNodeTriop(fl, lhsp, rhsp, ths) { + dtypeSetString(); + } + ASTNODE_NODE_FUNCS(PutcN) + virtual void numberOperate(V3Number& out, const V3Number& lhs, + const V3Number& rhs, const V3Number& ths) { + out.opPutcN(lhs, rhs, ths); + } + virtual string name() const { return "putc"; } + virtual string emitVerilog() { return "%k(%l.putc(%r,%t))"; } + virtual string emitC() { return "VL_PUTC_N(%li,%ri,%ti)"; } + virtual string emitSimpleOperator() { return ""; } + virtual bool cleanOut() const { return true; } + virtual bool cleanLhs() const { return true; } + virtual bool cleanRhs() const { return true; } + virtual bool cleanThs() const { return true; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } + virtual bool sizeMattersThs() const { return false; } +}; + +class AstGetcN : public AstNodeBiop { + // Verilog string.getc() +public: + AstGetcN(FileLine* fl, AstNode* lhsp, AstNode* rhsp) : AstNodeBiop(fl, lhsp, rhsp) { + dtypeSetBitSized(8, AstNumeric::UNSIGNED); + } + ASTNODE_NODE_FUNCS(GetcN) + virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp) { + return new AstGetcN(this->fileline(), lhsp, rhsp); + } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + out.opGetcN(lhs, rhs); + } + virtual string name() const { return "getc"; } + virtual string emitVerilog() { return "%k(%l.getc(%r))"; } + virtual string emitC() { return "VL_GETC_N(%li,%ri)"; } + virtual string emitSimpleOperator() { return ""; } + virtual bool cleanOut() const { return true; } + virtual bool cleanLhs() const { return true; } + virtual bool cleanRhs() const { return true; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } +}; + +class AstSubstrN : public AstNodeTriop { + // Verilog string.substr() +public: + AstSubstrN(FileLine* fl, AstNode* lhsp, AstNode* rhsp, AstNode* ths) : AstNodeTriop(fl, lhsp, rhsp, ths) { + dtypeSetString(); + } + ASTNODE_NODE_FUNCS(SubstrN) + virtual void numberOperate(V3Number& out, const V3Number& lhs, + const V3Number& rhs, const V3Number& ths) { + out.opSubstrN(lhs, rhs, ths); + } + virtual string name() const { return "substr"; } + virtual string emitVerilog() { return "%k(%l.substr(%r,%t))"; } + virtual string emitC() { return "VL_SUBSTR_N(%li,%ri,%ti)"; } + virtual string emitSimpleOperator() { return ""; } + virtual bool cleanOut() const { return true; } + virtual bool cleanLhs() const { return true; } + virtual bool cleanRhs() const { return true; } + virtual bool cleanThs() const { return true; } + virtual bool sizeMattersLhs() const { return false; } + virtual bool sizeMattersRhs() const { return false; } + virtual bool sizeMattersThs() const { return false; } +}; + class AstCompareNN : public AstNodeBiop { // Verilog str.compare() and str.icompare() private: diff --git a/src/V3Const.cpp b/src/V3Const.cpp index 967ffd9e9..6d7144d5d 100644 --- a/src/V3Const.cpp +++ b/src/V3Const.cpp @@ -2526,6 +2526,8 @@ private: TREEOPV("AstLogIf{$lhsp, $rhsp}", "AstLogOr{AstLogNot{$lhsp},$rhsp}"); TREEOPV("AstLogEq{$lhsp, $rhsp}", "replaceLogEq(nodep)"); // Strings + TREEOPC("AstPutcN{$lhsp.castConst, $rhsp.castConst, $thsp.castConst}", "replaceConst(nodep)"); + TREEOPC("AstSubstrN{$lhsp.castConst, $rhsp.castConst, $thsp.castConst}", "replaceConst(nodep)"); TREEOPC("AstCvtPackString{$lhsp.castConst}", "replaceConstString(nodep, VN_CAST(nodep->lhsp(), Const)->num().toString())"); diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index ed5e8dc44..da3f45cf1 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -643,6 +643,10 @@ public: emitOpName(nodep, nodep->emitC(), nodep->lhsp(), nodep->rhsp(), NULL); } } + virtual void visit(AstNodeTriop* nodep) { + UASSERT_OBJ(!emitSimpleOk(nodep), nodep, "Triop cannot be described in a simple way"); + emitOpName(nodep, nodep->emitC(), nodep->lhsp(), nodep->rhsp(), nodep->thsp()); + } virtual void visit(AstRedXor* nodep) { if (nodep->lhsp()->isWide()) { visit(VN_CAST(nodep, NodeUniop)); diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index 011e5e24d..28946e809 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -62,6 +62,18 @@ class EmitCInlines : EmitCBaseVisitor { v3Global.needHeavy(true); iterateChildren(nodep); } + virtual void visit(AstPutcN* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } + virtual void visit(AstGetcN* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } + virtual void visit(AstSubstrN* nodep) { + v3Global.needHeavy(true); + iterateChildren(nodep); + } virtual void visit(AstCompareNN* nodep) { v3Global.needHeavy(true); iterateChildren(nodep); diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 28940635d..0696b78be 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -1262,6 +1262,44 @@ V3Number& V3Number::opAtoN(const V3Number& lhs, int base) { return setLongS(static_cast(v)); } +V3Number& V3Number::opPutcN(const V3Number& lhs, const V3Number& rhs, const V3Number& ths) { + NUM_ASSERT_OP_ARGS3(lhs, rhs, ths); + NUM_ASSERT_STRING_ARGS1(lhs); + string lstring = lhs.toString(); + const vlsint32_t i = rhs.toSInt(); + const vlsint32_t c = ths.toSInt() & 0xFF; + // 6.16.2:str.putc(i, c) does not change the value when i < 0 || i >= str.len() || c == 0 + // when evaluating the second condition, i must be positive. + if (0 <= i && static_cast(i) < lstring.length() && c != 0) lstring[i] = c; + return setString(lstring); +} + +V3Number& V3Number::opGetcN(const V3Number& lhs, const V3Number& rhs) { + NUM_ASSERT_OP_ARGS2(lhs, rhs); + NUM_ASSERT_STRING_ARGS1(lhs); + const string lstring = lhs.toString(); + const vlsint32_t i = rhs.toSInt(); + vlsint32_t v = 0; + // 6.16.3:str.getc(i) returns 0 if i < 0 || i >= str.len() + // when evaluating the second condition, i must be positive. + if (0 <= i && static_cast(i) < lstring.length()) v = lstring[i]; + return setLong(v); +} + +V3Number& V3Number::opSubstrN(const V3Number& lhs, const V3Number& rhs, const V3Number& ths) { + NUM_ASSERT_OP_ARGS3(lhs, rhs, ths); + NUM_ASSERT_STRING_ARGS1(lhs); + const string lstring = lhs.toString(); + const vlsint32_t i = rhs.toSInt(); + const vlsint32_t j = ths.toSInt(); + // 6.16.8:str.substr(i, j) returns an empty string when i < 0 || j < i || j >= str.len() + // when evaluating the third condition, j must be positive because 0 <= i <= j is guaranteed by + // the former two conditions. + if (i < 0 || j < i || static_cast(j) >= lstring.length()) return setString(""); + // The second parameter of std::string::substr(i, n) is length, not position as SystemVerilog. + return setString(lstring.substr(i, j - i + 1)); +} + V3Number& V3Number::opCompareNN(const V3Number& lhs, const V3Number& rhs, bool ignoreCase) { NUM_ASSERT_OP_ARGS2(lhs, rhs); NUM_ASSERT_STRING_ARGS2(lhs, rhs); diff --git a/src/V3Number.h b/src/V3Number.h index d4ab06435..8e53198d4 100644 --- a/src/V3Number.h +++ b/src/V3Number.h @@ -361,6 +361,9 @@ public: // "N" - string operations V3Number& opAtoN (const V3Number& lhs, int base); + V3Number& opPutcN (const V3Number& lhs, const V3Number& rhs, const V3Number& ths); + V3Number& opGetcN (const V3Number& lhs, const V3Number& rhs); + V3Number& opSubstrN (const V3Number& lhs, const V3Number& rhs, const V3Number& ths); V3Number& opCompareNN(const V3Number& lhs,const V3Number& rhs, bool ignoreCase); V3Number& opConcatN (const V3Number& lhs, const V3Number& rhs); V3Number& opReplN (const V3Number& lhs, const V3Number& rhs); diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 6eadf53a9..b7f86aabd 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -333,6 +333,38 @@ private: // Output integer, input string virtual void visit(AstLenN* nodep) { visit_Os32_string(nodep); } + virtual void visit(AstPutcN* nodep) { + // CALLER: str.putc() + UASSERT_OBJ(nodep->rhsp() && nodep->thsp(), nodep, "For ternary ops only!"); + if (m_vup && m_vup->prelim()) { + // See similar handling in visit_cmp_eq_gt where created + iterateCheckString(nodep, "LHS", nodep->lhsp(), BOTH); + iterateCheckSigned32(nodep, "RHS", nodep->rhsp(), BOTH); + iterateCheckSigned32(nodep, "THS", nodep->thsp(), BOTH); + nodep->dtypeSetString(); //AstPutcN returns the new string to be assigned by AstAssign + } + } + virtual void visit(AstGetcN* nodep) { + // CALLER: str.getc() + UASSERT_OBJ(nodep->rhsp(), nodep, "For binary ops only!"); + if (m_vup && m_vup->prelim()) { + // See similar handling in visit_cmp_eq_gt where created + iterateCheckString(nodep, "LHS", nodep->lhsp(), BOTH); + iterateCheckSigned32(nodep, "RHS", nodep->rhsp(), BOTH); + nodep->dtypeSetBitSized(8, AstNumeric::UNSIGNED); + } + } + virtual void visit(AstSubstrN* nodep) { + // CALLER: str.substr() + UASSERT_OBJ(nodep->rhsp() && nodep->thsp(), nodep, "For ternary ops only!"); + if (m_vup && m_vup->prelim()) { + // See similar handling in visit_cmp_eq_gt where created + iterateCheckString(nodep, "LHS", nodep->lhsp(), BOTH); + iterateCheckSigned32(nodep, "RHS", nodep->rhsp(), BOTH); + iterateCheckSigned32(nodep, "THS", nodep->thsp(), BOTH); + nodep->dtypeSetString(); + } + } virtual void visit(AstCompareNN* nodep) { // CALLER: str.compare(), str.icompare() // Widths: 32 bit out @@ -2115,6 +2147,34 @@ private: AstNode* rhs = argp->exprp()->unlinkFrBack(); AstNode* newp = new AstCompareNN(nodep->fileline(), lhs, rhs, ignoreCase); nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (nodep->name() == "putc" ) { + methodOkArguments(nodep, 2, 2); + AstArg* arg0p = VN_CAST(nodep->pinsp(), Arg); + AstArg* arg1p = VN_CAST(arg0p->nextp(), Arg); + AstNodeVarRef* fromp = VN_CAST(nodep->fromp()->unlinkFrBack(), VarRef); + AstNode* rhsp = arg0p->exprp()->unlinkFrBack(); + AstNode* thsp = arg1p->exprp()->unlinkFrBack(); + AstVarRef* varrefp = new AstVarRef(nodep->fileline(), fromp->varp(), false); + AstNode* newp = new AstAssign(nodep->fileline(), fromp, + new AstPutcN(nodep->fileline(), varrefp, rhsp, thsp)); + fromp->lvalue(true); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (nodep->name() == "getc") { + methodOkArguments(nodep, 1, 1); + AstArg* arg0p = VN_CAST(nodep->pinsp(), Arg); + AstNode* lhsp = nodep->fromp()->unlinkFrBack(); + AstNode* rhsp = arg0p->exprp()->unlinkFrBack(); + AstNode* newp = new AstGetcN(nodep->fileline(), lhsp, rhsp); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (nodep->name() == "substr") { + methodOkArguments(nodep, 2, 2); + AstArg* arg0p = VN_CAST(nodep->pinsp(), Arg); + AstArg* arg1p = VN_CAST(arg0p->nextp(), Arg); + AstNode* lhsp = nodep->fromp()->unlinkFrBack(); + AstNode* rhsp = arg0p->exprp()->unlinkFrBack(); + AstNode* thsp = arg1p->exprp()->unlinkFrBack(); + AstNode* newp = new AstSubstrN(nodep->fileline(), lhsp, rhsp, thsp); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); } else if (nodep->name() == "atobin" || nodep->name() == "atohex" || nodep->name() == "atoi" @@ -2130,9 +2190,6 @@ private: methodOkArguments(nodep, 0, 0); AstNode* newp = new AstAtoN(nodep->fileline(), nodep->fromp()->unlinkFrBack(), fmt); nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); - } else if (nodep->name() == "getc" - || nodep->name() == "putc") { - nodep->v3error("Unsupported: built-in string method "<prettyNameQ()); } else { nodep->v3error("Unknown built-in string method "<prettyNameQ()); } diff --git a/test_regress/t/t_string_type_methods.v b/test_regress/t/t_string_type_methods.v index ccc47cb42..180090b7a 100644 --- a/test_regress/t/t_string_type_methods.v +++ b/test_regress/t/t_string_type_methods.v @@ -22,10 +22,13 @@ module t (/*AUTOARG*/ s="1234"; `checkh(s.len(),4); s="ab7CD"; `checks(s.toupper(), "AB7CD"); s="ab7CD"; `checks(s.tolower(), "ab7cd"); -`ifndef VERILATOR + s="1234"; s.putc(-1, "z"); `checks(s, "1234"); + s="1234"; s.putc(4, "z"); `checks(s, "1234"); + s="1234"; s.putc(2, 0); `checks(s, "1234"); s="1234"; s.putc(2, "z"); `checks(s, "12z4"); + s="1234"; `checkh(s.getc(-1), 0); + s="1234"; `checkh(s.getc(4), 0); s="1234"; `checkh(s.getc(2), "3"); -`endif s="b"; if (s.compare("a") <= 0) $stop; s="b"; if (s.compare("b") != 0) $stop; s="b"; if (s.compare("c") >= 0) $stop; @@ -38,6 +41,10 @@ module t (/*AUTOARG*/ s="b"; if (s.icompare("A") < 0) $stop; s="b"; if (s.icompare("B") != 0) $stop; s="b"; if (s.icompare("C") >= 0) $stop; + s="abcd"; `checks(s.substr(-1,1), ""); + s="abcd"; `checks(s.substr(1,0), ""); + s="abcd"; `checks(s.substr(1,4), ""); + s="abcd"; `checks(s.substr(2,3), "cd"); s="101"; `checkh(s.atoi(), 'd101); s="101"; `checkh(s.atohex(), 'h101); s="101"; `checkh(s.atooct(), 'o101); @@ -64,23 +71,35 @@ module t (/*AUTOARG*/ `checkh(s.len(),4); end else if (cyc==2) begin -`ifndef VERILATOR - s.putc(2, "z"); -`endif + s.putc(-1, "z"); end else if (cyc==3) begin -`ifndef VERILATOR - `checks(s, "12z4"); - `checkh(s.getc(2), "z"); -`endif - s="ab3CD"; + `checks(s, "1234"); + s.putc(4, "z"); end else if (cyc==4) begin + `checks(s, "1234"); + s.putc(2, 0); + end + else if (cyc==5) begin + `checks(s, "1234"); + s.putc(2, "z"); + end + else if (cyc==6) begin + `checks(s, "12z4"); + end + else if (cyc==7) begin + `checkh(s.getc(-1), 0); + `checkh(s.getc(4), 0); + `checkh(s.getc(2), "z"); + s="ab3CD"; + end + else if (cyc==8) begin `checks(s.toupper(), "AB3CD"); `checks(s.tolower(), "ab3cd"); s="b"; end - else if (cyc==5) begin + else if (cyc==9) begin if (s.compare("a") <= 0) $stop; if (s.compare("b") != 0) $stop; if (s.compare("c") >= 0) $stop; @@ -90,38 +109,45 @@ module t (/*AUTOARG*/ if (s.icompare("A") < 0) $stop; if (s.icompare("B") != 0) $stop; if (s.icompare("C") >= 0) $stop; + s="abcd"; + end + else if (cyc==10) begin + `checks(s.substr(-1,1), ""); + `checks(s.substr(1,0), ""); + `checks(s.substr(1,4), ""); + `checks(s.substr(2,3), "cd"); s="101"; end - else if (cyc==7) begin + else if (cyc==11) begin `checkh(s.atoi(), 'd101); `checkh(s.atohex(), 'h101); `checkh(s.atooct(), 'o101); `checkh(s.atobin(), 'b101); s="1.23"; end - else if (cyc==8) begin + else if (cyc==12) begin `checkg(s.atoreal(), 1.23); end - else if (cyc==9) begin + else if (cyc==13) begin s.itoa(123); end - else if (cyc==10) begin + else if (cyc==14) begin `checks(s, "123"); s.hextoa(123); end - else if (cyc==11) begin + else if (cyc==15) begin `checks(s, "7b"); s.octtoa(123); end - else if (cyc==12) begin + else if (cyc==16) begin `checks(s, "173"); s.bintoa(123); end - else if (cyc==13) begin + else if (cyc==17) begin `checks(s, "1111011"); s.realtoa(1.23); end - else if (cyc==14) begin + else if (cyc==18) begin `checks(s, "1.23"); end else if (cyc==99) begin From 83a1bd0675e09c400267847fa5c9df341f360a28 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 16 Dec 2019 21:43:52 -0500 Subject: [PATCH 22/90] Support immediate cover statements & refactor coverage internals. --- Changes | 2 + src/V3Assert.cpp | 109 +++++++++------------ src/V3AssertPre.cpp | 10 +- src/V3AstNodes.cpp | 4 + src/V3AstNodes.h | 77 +++++++-------- src/V3Coverage.cpp | 4 +- src/V3LinkParse.cpp | 4 +- src/V3LinkResolve.cpp | 6 +- src/V3Width.cpp | 18 ++-- src/verilog.y | 51 +++++----- test_regress/t/t_assert_cover.v | 10 +- test_regress/t/t_assert_property_fail_1.pl | 2 - test_regress/t/t_assert_property_fail_2.pl | 2 +- test_regress/t/t_past.v | 7 +- 14 files changed, 152 insertions(+), 154 deletions(-) diff --git a/Changes b/Changes index 6deed2284..6adca2a57 100644 --- a/Changes +++ b/Changes @@ -8,6 +8,8 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support string compare, ato*, etc methods, bug1606. [Yutetsu TAKATSUKASA] +**** Support immediate cover statements. + **** Ignore `uselib to end-of-line, bug1634. [Frederic Antonin] **** Update FST trace API for better performance. diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index bc5ede916..fc6fee602 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -44,10 +44,10 @@ private: AstNodeModule* m_modp; // Last module AstBegin* m_beginp; // Last begin unsigned m_modPastNum; // Module past numbering - VDouble0 m_statAsCover; // Statistic tracking - VDouble0 m_statAsPsl; // Statistic tracking + VDouble0 m_statCover; // Statistic tracking + VDouble0 m_statAsNotImm; // Statistic tracking + VDouble0 m_statAsImm; // Statistic tracking VDouble0 m_statAsFull; // Statistic tracking - VDouble0 m_statAsSV; // Statistic tracking // METHODS string assertDisplayMessage(AstNode* nodep, const string& prefix, const string& message) { @@ -104,17 +104,28 @@ private: return bodysp; } - void newPslAssertion(AstNode* nodep, AstNode* propp, AstSenTree* sentreep, - AstNode* stmtsp, const string& message) { - propp->unlinkFrBack(); - sentreep->unlinkFrBack(); - if (stmtsp) stmtsp->unlinkFrBack(); + void newPslAssertion(AstNodeCoverOrAssert* nodep, AstNode* failsp) { + if (m_beginp && nodep->name() == "") nodep->name(m_beginp->name()); + + AstNode* propp = nodep->propp()->unlinkFrBackWithNext(); + AstSenTree* sentreep = nodep->sentreep(); + const string& message = nodep->name(); + AstNode* passsp = nodep->passsp(); + if (passsp) passsp->unlinkFrBackWithNext(); + if (failsp) failsp->unlinkFrBackWithNext(); + + if (nodep->immediate()) { + UASSERT_OBJ(!sentreep, nodep, "Immediate assertions don't have sensivity"); + } else { + UASSERT_OBJ(sentreep, nodep, "Concurrent assertions must have sensivity"); + sentreep->unlinkFrBack(); + } // AstNode* bodysp = NULL; bool selfDestruct = false; AstIf* ifp = NULL; - if (AstPslCover* snodep = VN_CAST(nodep, PslCover)) { - ++m_statAsCover; + if (AstCover* snodep = VN_CAST(nodep, Cover)) { + ++m_statCover; if (!v3Global.opt.coverageUser()) { selfDestruct = true; } else { @@ -126,35 +137,29 @@ private: bodysp = covincp; } - if (bodysp && stmtsp) bodysp = bodysp->addNext(stmtsp); + if (bodysp && passsp) bodysp = bodysp->addNext(passsp); ifp = new AstIf(nodep->fileline(), propp, bodysp, NULL); bodysp = ifp; - - } else if (VN_IS(nodep, PslAssert)) { - ++m_statAsPsl; - // Insert an automatic error message and $stop after - // any user-supplied statements. - AstNode* autoMsgp = newFireAssertUnchecked(nodep, "'assert property' failed."); - if (stmtsp) { - stmtsp->addNext(autoMsgp); - } else { - stmtsp = autoMsgp; - } - ifp = new AstIf(nodep->fileline(), propp, NULL, stmtsp); + } else if (VN_IS(nodep, Assert)) { + if (nodep->immediate()) ++m_statAsImm; + else ++m_statAsNotImm; + if (passsp) passsp = newIfAssertOn(passsp); + if (failsp) failsp = newIfAssertOn(failsp); + if (!failsp) failsp = newFireAssertUnchecked(nodep, "'assert' failed."); + ifp = new AstIf(nodep->fileline(), propp, passsp, failsp); // It's more LIKELY that we'll take the NULL if clause // than the sim-killing else clause: ifp->branchPred(VBranchPred::BP_LIKELY); - bodysp = newIfAssertOn(ifp); - } else if (VN_IS(nodep, PslRestrict)) { - // IEEE says simulator ignores these - pushDeletep(nodep->unlinkFrBack()); VL_DANGLING(nodep); - return; + bodysp = ifp; } else { nodep->v3fatalSrc("Unknown node type"); } - AstNode* newp = new AstAlways(nodep->fileline(), - VAlwaysKwd::ALWAYS, sentreep, bodysp); + AstNode* newp; + if (sentreep) { + newp = new AstAlways(nodep->fileline(), + VAlwaysKwd::ALWAYS, sentreep, bodysp); + } else { newp = bodysp; } // Install it if (selfDestruct) { // Delete it after making the tree. This way we can tell the user @@ -168,28 +173,6 @@ private: pushDeletep(nodep); VL_DANGLING(nodep); } - void newVAssertion(AstVAssert* nodep, AstNode* propp) { - propp->unlinkFrBackWithNext(); - AstNode* passsp = nodep->passsp(); if (passsp) passsp->unlinkFrBackWithNext(); - AstNode* failsp = nodep->failsp(); if (failsp) failsp->unlinkFrBackWithNext(); - // - if (VN_IS(nodep, VAssert)) { - if (passsp) passsp = newIfAssertOn(passsp); - if (failsp) failsp = newIfAssertOn(failsp); - } else { - nodep->v3fatalSrc("Unknown node type"); - } - - AstIf* ifp = new AstIf(nodep->fileline(), propp, passsp, failsp); - AstNode* newp = ifp; - if (VN_IS(nodep, VAssert)) ifp->branchPred(VBranchPred::BP_UNLIKELY); - // - // Install it - nodep->replaceWith(newp); - // Bye - pushDeletep(nodep); VL_DANGLING(nodep); - } - // VISITORS virtual void visit(AstIf* nodep) { if (nodep->user1SetOnce()) return; @@ -358,16 +341,18 @@ private: } } - virtual void visit(AstNodePslCoverOrAssert* nodep) { + virtual void visit(AstAssert* nodep) { iterateChildren(nodep); - if (m_beginp && nodep->name() == "") nodep->name(m_beginp->name()); - newPslAssertion(nodep, nodep->propp(), nodep->sentreep(), - nodep->stmtsp(), nodep->name()); VL_DANGLING(nodep); + newPslAssertion(nodep, nodep->failsp()); } - virtual void visit(AstVAssert* nodep) { + virtual void visit(AstCover* nodep) { iterateChildren(nodep); - newVAssertion(nodep, nodep->propp()); VL_DANGLING(nodep); - ++m_statAsSV; + newPslAssertion(nodep, NULL); + } + virtual void visit(AstRestrict* nodep) { + iterateChildren(nodep); + // IEEE says simulator ignores these + pushDeletep(nodep->unlinkFrBack()); VL_DANGLING(nodep); } virtual void visit(AstNodeModule* nodep) { @@ -402,9 +387,9 @@ public: iterate(nodep); } virtual ~AssertVisitor() { - V3Stats::addStat("Assertions, PSL asserts", m_statAsPsl); - V3Stats::addStat("Assertions, SystemVerilog asserts", m_statAsSV); - V3Stats::addStat("Assertions, cover statements", m_statAsCover); + V3Stats::addStat("Assertions, assert non-immediate statements", m_statAsNotImm); + V3Stats::addStat("Assertions, assert immediate statements", m_statAsImm); + V3Stats::addStat("Assertions, cover statements", m_statCover); V3Stats::addStat("Assertions, full/parallel case", m_statAsFull); } }; diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp index 829025200..9916635aa 100644 --- a/src/V3AssertPre.cpp +++ b/src/V3AssertPre.cpp @@ -92,12 +92,14 @@ private: m_seniAlwaysp = NULL; } - virtual void visit(AstNodePslCoverOrAssert* nodep) { + virtual void visit(AstNodeCoverOrAssert* nodep) { if (nodep->sentreep()) return; // Already processed clearAssertInfo(); - // Find PslClocking's buried under nodep->exprsp + // Find Clocking's buried under nodep->exprsp iterateChildren(nodep); - nodep->sentreep(newSenTree(nodep)); + if (!nodep->immediate()) { + nodep->sentreep(newSenTree(nodep)); + } clearAssertInfo(); } virtual void visit(AstPast* nodep) { @@ -105,7 +107,7 @@ private: iterateChildren(nodep); nodep->sentreep(newSenTree(nodep)); } - virtual void visit(AstPslClocked* nodep) { + virtual void visit(AstPropClocked* nodep) { // No need to iterate the body, once replace will get iterated iterateAndNextNull(nodep->sensesp()); if (m_senip) { diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index e7c17fd15..545480008 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -949,6 +949,10 @@ void AstCellInline::dump(std::ostream& str) const { this->AstNode::dump(str); str<<" -> "<AstNode::dump(str); + if (immediate()) str<<" [IMMEDIATE]"; +} void AstDisplay::dump(std::ostream& str) const { this->AstNode::dump(str); //str<<" "<name() == name(); } virtual void name(const string& name) { m_name = name; } + virtual void dump(std::ostream& str=std::cout) const; AstNode* propp() const { return op1p(); } // op1 = property AstSenTree* sentreep() const { return VN_CAST(op2p(), SenTree); } // op2 = clock domain void sentreep(AstSenTree* sentreep) { addOp2p(sentreep); } // op2 = clock domain - AstNode* stmtsp() const { return op4p(); } // op4 = statements + AstNode* passsp() const { return op4p(); } // op4 = statements (assert/cover passes) + bool immediate() const { return m_immediate; } }; -class AstPslAssert : public AstNodePslCoverOrAssert { +class AstAssert : public AstNodeCoverOrAssert { public: - ASTNODE_NODE_FUNCS(PslAssert) - AstPslAssert(FileLine* fl, AstNode* propp, AstNode* stmtsp, const string& name="") - : AstNodePslCoverOrAssert(fl, propp, stmtsp, name) {} + ASTNODE_NODE_FUNCS(Assert) + AstAssert(FileLine* fl, AstNode* propp, AstNode* passsp, AstNode* failsp, + bool immediate, const string& name = "") + : AstNodeCoverOrAssert(fl, propp, passsp, immediate, name) { + addNOp3p(failsp); + } + AstNode* failsp() const { return op3p(); } // op3 = if assertion fails }; -class AstPslCover : public AstNodePslCoverOrAssert { +class AstCover : public AstNodeCoverOrAssert { public: - ASTNODE_NODE_FUNCS(PslCover) - AstPslCover(FileLine* fl, AstNode* propp, AstNode* stmtsp, const string& name="") - : AstNodePslCoverOrAssert(fl, propp, stmtsp, name) {} + ASTNODE_NODE_FUNCS(Cover) + AstCover(FileLine* fl, AstNode* propp, AstNode* stmtsp, + bool immediate, const string& name = "") + : AstNodeCoverOrAssert(fl, propp, stmtsp, immediate, name) {} AstNode* coverincp() const { return op3p(); } // op3 = coverage node void coverincp(AstCoverInc* nodep) { addOp3p(nodep); } // op3 = coverage node + virtual bool immediate() const { return false; } }; -class AstPslRestrict : public AstNodePslCoverOrAssert { +class AstRestrict : public AstNodeCoverOrAssert { public: - ASTNODE_NODE_FUNCS(PslRestrict) - AstPslRestrict(FileLine* fl, AstNode* propp) - : AstNodePslCoverOrAssert(fl, propp, NULL, "") {} + ASTNODE_NODE_FUNCS(Restrict) + AstRestrict(FileLine* fl, AstNode* propp) + : AstNodeCoverOrAssert(fl, propp, NULL, false, "") {} }; //====================================================================== diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp index 457d2e58b..585c26171 100644 --- a/src/V3Coverage.cpp +++ b/src/V3Coverage.cpp @@ -353,8 +353,8 @@ private: m_checkBlock = true; // Reset as a child may have cleared it } } - virtual void visit(AstPslCover* nodep) { - UINFO(4," PSLCOVER: "<coverincp()) { diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 2edb732bb..72f83f0f0 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -459,10 +459,10 @@ private: visitIterateNoValueMod(nodep); m_inAlways = false; } - virtual void visit(AstPslCover* nodep) { + virtual void visit(AstCover* nodep) { visitIterateNoValueMod(nodep); } - virtual void visit(AstPslRestrict* nodep) { + virtual void visit(AstRestrict* nodep) { visitIterateNoValueMod(nodep); } diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp index aead442dd..62b12faf5 100644 --- a/src/V3LinkResolve.cpp +++ b/src/V3LinkResolve.cpp @@ -55,8 +55,8 @@ private: // Below state needs to be preserved between each module call. AstNodeModule* m_modp; // Current module AstNodeFTask* m_ftaskp; // Function or task we're inside - AstVAssert* m_assertp; // Current assertion - int m_senitemCvtNum; // Temporary signal counter + AstNodeCoverOrAssert* m_assertp; // Current assertion + int m_senitemCvtNum; // Temporary signal counter // METHODS VL_DEBUG_FUNC; // Declare debug() @@ -82,7 +82,7 @@ private: nodep->replaceWith(nodep->bodysp()->unlinkFrBackWithNext()); VL_DANGLING(nodep); } } - virtual void visit(AstVAssert* nodep) { + virtual void visit(AstNodeCoverOrAssert* nodep) { if (m_assertp) nodep->v3error("Assert not allowed under another assert"); m_assertp = nodep; iterateChildren(nodep); diff --git a/src/V3Width.cpp b/src/V3Width.cpp index b7f86aabd..35d5b6856 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -2518,7 +2518,7 @@ private: return times; } - virtual void visit(AstPslClocked* nodep) { + virtual void visit(AstPropClocked* nodep) { if (m_vup->prelim()) { // First stage evaluation iterateCheckBool(nodep, "Property", nodep->propp(), BOTH); userIterateAndNext(nodep->sensesp(), NULL); @@ -2891,17 +2891,21 @@ private: assertAtStatement(nodep); userIterateChildren(nodep, WidthVP(SELF, BOTH).p()); } - virtual void visit(AstNodePslCoverOrAssert* nodep) { - assertAtStatement(nodep); - iterateCheckBool(nodep, "Property", nodep->propp(), BOTH); // it's like an if() condition. - userIterateAndNext(nodep->stmtsp(), NULL); - } - virtual void visit(AstVAssert* nodep) { + virtual void visit(AstAssert* nodep) { assertAtStatement(nodep); iterateCheckBool(nodep, "Property", nodep->propp(), BOTH); // it's like an if() condition. userIterateAndNext(nodep->passsp(), NULL); userIterateAndNext(nodep->failsp(), NULL); } + virtual void visit(AstCover* nodep) { + assertAtStatement(nodep); + iterateCheckBool(nodep, "Property", nodep->propp(), BOTH); // it's like an if() condition. + userIterateAndNext(nodep->passsp(), NULL); + } + virtual void visit(AstRestrict* nodep) { + assertAtStatement(nodep); + iterateCheckBool(nodep, "Property", nodep->propp(), BOTH); // it's like an if() condition. + } virtual void visit(AstPin* nodep) { //if (debug()) nodep->dumpTree(cout, "- PinPre: "); // TOP LEVEL NODE diff --git a/src/verilog.y b/src/verilog.y index 63958535f..9ac2862f2 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -105,7 +105,7 @@ public: return new AstText(fileline, newtext); } AstDisplay* createDisplayError(FileLine* fileline) { - AstDisplay* nodep = new AstDisplay(fileline,AstDisplayType::DT_ERROR, "", NULL,NULL); + AstDisplay* nodep = new AstDisplay(fileline, AstDisplayType::DT_ERROR, "", NULL, NULL); nodep->addNext(new AstStop(fileline, true)); return nodep; } @@ -3936,7 +3936,8 @@ clocking_declaration: // IEEE: clocking_declaration (INCOMPLETE) assertion_item: // ==IEEE: assertion_item concurrent_assertion_item { $$ = $1; } - | deferred_immediate_assertion_item { $$ = $1; } + | deferred_immediate_assertion_item + { $$ = $1 ? new AstAlways($1->fileline(), VAlwaysKwd::ALWAYS_COMB, NULL, $1) : NULL; } ; deferred_immediate_assertion_item: // ==IEEE: deferred_immediate_assertion_item @@ -3959,16 +3960,16 @@ immediate_assertion_statement: // ==IEEE: immediate_assertion_statement ; simple_immediate_assertion_statement: // ==IEEE: simple_immediate_assertion_statement - // // action_block expanded here, for compatibility with AstVAssert - yASSERT '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstVAssert($1,$3,$5, GRAMMARP->createDisplayError($1)); } - | yASSERT '(' expr ')' yELSE stmtBlock { $$ = new AstVAssert($1,$3,NULL,$6); } - | yASSERT '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstVAssert($1,$3,$5,$7); } - // // action_block expanded here, for compatibility with AstVAssert - | yASSUME '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstVAssert($1,$3,$5, GRAMMARP->createDisplayError($1)); } - | yASSUME '(' expr ')' yELSE stmtBlock { $$ = new AstVAssert($1,$3,NULL,$6); } - | yASSUME '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstVAssert($1,$3,$5,$7); } + // // action_block expanded here, for compatibility with AstAssert + yASSERT '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstAssert($1, $3, $5, NULL, true); } + | yASSERT '(' expr ')' yELSE stmtBlock { $$ = new AstAssert($1, $3, NULL, $6, true); } + | yASSERT '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstAssert($1, $3, $5, $7, true); } + // // action_block expanded here, for compatibility with AstAssert + | yASSUME '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstAssert($1, $3, $5, NULL, true); } + | yASSUME '(' expr ')' yELSE stmtBlock { $$ = new AstAssert($1, $3, NULL, $6, true); } + | yASSUME '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstAssert($1, $3, $5, $7, true); } // // IEEE: simple_immediate_cover_statement - | yCOVER '(' expr ')' stmt { $$ = NULL; BBUNSUP($1, "Unsupported: immediate cover"); } + | yCOVER '(' expr ')' stmt { $$ = new AstCover($1, $3, $5, true); } ; final_zero: // IEEE: part of deferred_immediate_assertion_statement @@ -3980,15 +3981,15 @@ final_zero: // IEEE: part of deferred_immediate_assertion_statement deferred_immediate_assertion_statement: // ==IEEE: deferred_immediate_assertion_statement // // IEEE: deferred_immediate_assert_statement - yASSERT final_zero '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstVAssert($1,$4,$6, GRAMMARP->createDisplayError($1)); } - | yASSERT final_zero '(' expr ')' yELSE stmtBlock { $$ = new AstVAssert($1,$4,NULL,$7); } - | yASSERT final_zero '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstVAssert($1,$4,$6,$8); } + yASSERT final_zero '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstAssert($1, $4, $6, NULL, true); } + | yASSERT final_zero '(' expr ')' yELSE stmtBlock { $$ = new AstAssert($1, $4, NULL, $7, true); } + | yASSERT final_zero '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstAssert($1, $4, $6, $8, true); } // // IEEE: deferred_immediate_assume_statement - | yASSUME final_zero '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstVAssert($1,$4,$6, GRAMMARP->createDisplayError($1)); } - | yASSUME final_zero '(' expr ')' yELSE stmtBlock { $$ = new AstVAssert($1,$4,NULL,$7); } - | yASSUME final_zero '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstVAssert($1,$4,$6,$8); } + | yASSUME final_zero '(' expr ')' stmtBlock %prec prLOWER_THAN_ELSE { $$ = new AstAssert($1, $4, $6, NULL, true); } + | yASSUME final_zero '(' expr ')' yELSE stmtBlock { $$ = new AstAssert($1, $4, NULL, $7, true); } + | yASSUME final_zero '(' expr ')' stmtBlock yELSE stmtBlock { $$ = new AstAssert($1, $4, $6, $8, true); } // // IEEE: deferred_immediate_cover_statement - | yCOVER final_zero '(' expr ')' stmt { $$ = NULL; BBUNSUP($1, "Unsupported: immediate cover"); } + | yCOVER final_zero '(' expr ')' stmt { $$ = new AstCover($1, $4, $6, true); } ; concurrent_assertion_item: // IEEE: concurrent_assertion_item @@ -4000,11 +4001,11 @@ concurrent_assertion_item: // IEEE: concurrent_assertion_item concurrent_assertion_statement: // ==IEEE: concurrent_assertion_statement // // IEEE: assert_property_statement - yASSERT yPROPERTY '(' property_spec ')' elseStmtBlock { $$ = new AstPslAssert($1,$4,$6); } + yASSERT yPROPERTY '(' property_spec ')' elseStmtBlock { $$ = new AstAssert($1, $4, NULL, $6, false); } // // IEEE: cover_property_statement - | yCOVER yPROPERTY '(' property_spec ')' stmtBlock { $$ = new AstPslCover($1,$4,$6); } + | yCOVER yPROPERTY '(' property_spec ')' stmtBlock { $$ = new AstCover($1, $4, $6, false); } // // IEEE: restrict_property_statement - | yRESTRICT yPROPERTY '(' property_spec ')' ';' { $$ = new AstPslRestrict($1,$4); } + | yRESTRICT yPROPERTY '(' property_spec ')' ';' { $$ = new AstRestrict($1, $4); } ; elseStmtBlock: // Part of concurrent_assertion_statement @@ -4015,10 +4016,10 @@ elseStmtBlock: // Part of concurrent_assertion_statement property_spec: // IEEE: property_spec //UNSUP: This rule has been super-specialized to what is supported now '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' expr - { $$ = new AstPslClocked($1,$3,$8,$10); } - | '@' '(' senitemEdge ')' expr { $$ = new AstPslClocked($1,$3,NULL,$5); } - | yDISABLE yIFF '(' expr ')' expr { $$ = new AstPslClocked($4->fileline(),NULL,$4,$6); } - | expr { $$ = new AstPslClocked($1->fileline(),NULL,NULL,$1); } + { $$ = new AstPropClocked($1, $3, $8, $10); } + | '@' '(' senitemEdge ')' expr { $$ = new AstPropClocked($1, $3, NULL, $5); } + | yDISABLE yIFF '(' expr ')' expr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } + | expr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } ; //************************************************ diff --git a/test_regress/t/t_assert_cover.v b/test_regress/t/t_assert_cover.v index 587dc0b2a..f40e3193e 100644 --- a/test_regress/t/t_assert_cover.v +++ b/test_regress/t/t_assert_cover.v @@ -64,7 +64,15 @@ module Test cover property (@(posedge clk) disable iff (!toggle) cyc==8) $stop; - // Innediate assert + always_ff @ (posedge clk) begin + labeled_icov: cover (cyc==3 || cyc==4); + end + + // Immediate cover + labeled_imm0: cover #0 (cyc == 0); + labeled_immf: cover final (cyc == 0); + + // Immediate assert labeled_imas: assert #0 (1); assert final (1); diff --git a/test_regress/t/t_assert_property_fail_1.pl b/test_regress/t/t_assert_property_fail_1.pl index 86ead013e..78b3d4d95 100755 --- a/test_regress/t/t_assert_property_fail_1.pl +++ b/test_regress/t/t_assert_property_fail_1.pl @@ -17,10 +17,8 @@ compile( ); execute( - fails => 1, ); -file_grep($Self->{run_log_filename}, qr/'assert property' failed/); # We expect to get a message when this assert fires: file_grep($Self->{run_log_filename}, qr/cyc != 3/); diff --git a/test_regress/t/t_assert_property_fail_2.pl b/test_regress/t/t_assert_property_fail_2.pl index 6977446ed..1a4446161 100755 --- a/test_regress/t/t_assert_property_fail_2.pl +++ b/test_regress/t/t_assert_property_fail_2.pl @@ -20,7 +20,7 @@ execute( fails => 1 ); -file_grep($Self->{run_log_filename}, qr/'assert property' failed/); +file_grep($Self->{run_log_filename}, qr/'assert' failed/); ok(1); 1; diff --git a/test_regress/t/t_past.v b/test_regress/t/t_past.v index 2388be27f..610e0fb5e 100644 --- a/test_regress/t/t_past.v +++ b/test_regress/t/t_past.v @@ -92,7 +92,12 @@ module Test2 (/*AUTOARG*/ reg [31:0] dly0; reg [31:0] dly1; + always @(posedge clk) begin + dly0 <= in; + dly1 <= dly0; + end + default clocking @(posedge clk); endclocking - assert property (@(posedge clk) dly1 == $past(in, 2)); + assert property (@(posedge clk) $time < 40 || dly1 == $past(in, 2)); endmodule From f514049c0462b497ff105ebd1d1ad0d88f2d2c79 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 16 Dec 2019 21:54:20 -0500 Subject: [PATCH 23/90] Add cleaner error on version control conflicts in sources. --- Changes | 2 ++ src/verilog.l | 5 +++++ test_regress/t/t_lint_vcmarker_bad.out | 10 ++++++++++ test_regress/t/t_lint_vcmarker_bad.pl | 18 ++++++++++++++++++ test_regress/t/t_lint_vcmarker_bad.v | 14 ++++++++++++++ 5 files changed, 49 insertions(+) create mode 100644 test_regress/t/t_lint_vcmarker_bad.out create mode 100755 test_regress/t/t_lint_vcmarker_bad.pl create mode 100644 test_regress/t/t_lint_vcmarker_bad.v diff --git a/Changes b/Changes index 6adca2a57..7f58bb57a 100644 --- a/Changes +++ b/Changes @@ -18,6 +18,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Add error when `resetall inside module (IEEE 2017-22.3). +**** Add cleaner error on version control conflicts in sources. + **** Fix little endian cell ranges, bug1631. [Julien Margetts] diff --git a/src/verilog.l b/src/verilog.l index a4412d938..4611b66e9 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -958,6 +958,11 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "`verilator_config" { FL_FWD; BEGIN VLT; FL_BRK; } "`verilog" { FL_FWD; BEGIN PARSEP->lastVerilogState(); FL_BRK; } + /* Errors */ + "<<<<<<<"[^\n\r]* { FL_FWD; yyerrorf("version control conflict marker in file"); FL_BRK; } + "======="[^\n\r]* { FL_FWD; yyerrorf("version control conflict marker in file"); FL_BRK; } + ">>>>>>>"[^\n\r]* { FL_FWD; yyerrorf("version control conflict marker in file"); FL_BRK; } + /* If add to this list also add to V3LanguageWords.h */ } diff --git a/test_regress/t/t_lint_vcmarker_bad.out b/test_regress/t/t_lint_vcmarker_bad.out new file mode 100644 index 000000000..32354dc42 --- /dev/null +++ b/test_regress/t/t_lint_vcmarker_bad.out @@ -0,0 +1,10 @@ +%Error: t/t_lint_vcmarker_bad.v:8: version control conflict marker in file +<<<<<<< HEAD +^~~~~~~~~~~~~~~ +%Error: t/t_lint_vcmarker_bad.v:10: version control conflict marker in file +======= +^~~~~~~~~~~ +%Error: t/t_lint_vcmarker_bad.v:12: version control conflict marker in file +>>>>>>> MERGE +^~~~~~~~~~~~~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_lint_vcmarker_bad.pl b/test_regress/t/t_lint_vcmarker_bad.pl new file mode 100755 index 000000000..9832155f2 --- /dev/null +++ b/test_regress/t/t_lint_vcmarker_bad.pl @@ -0,0 +1,18 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_lint_vcmarker_bad.v b/test_regress/t/t_lint_vcmarker_bad.v new file mode 100644 index 000000000..b959c373a --- /dev/null +++ b/test_regress/t/t_lint_vcmarker_bad.v @@ -0,0 +1,14 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +module t (/*AUTOARG*/); + +<<<<<<< HEAD // Intentional test: This conflict marker should be here + initial $display("Hello"); +======= // Intentional test: This conflict marker should be here + initial $display("Goodbye"); +>>>>>>> MERGE // Intentional test: This conflict marker should be here + +endmodule From 53c6b7df63baa76fa1df2e89f690b645ba9a8252 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 16 Dec 2019 22:46:09 -0500 Subject: [PATCH 24/90] Internals: Rename NodeClassDType. No functional change. --- src/V3Ast.h | 7 ++++--- src/V3AstNodes.cpp | 12 ++++++------ src/V3AstNodes.h | 10 +++++----- src/V3Changed.cpp | 2 +- src/V3Dead.cpp | 4 ++-- src/V3EmitV.cpp | 2 +- src/V3LinkParse.cpp | 2 +- src/V3ParseImp.h | 2 +- src/V3TraceDecl.cpp | 2 +- src/V3Width.cpp | 17 +++++++++-------- src/V3WidthCommit.h | 2 +- src/V3WidthSel.cpp | 10 +++++----- src/verilog.y | 10 +++++----- 13 files changed, 42 insertions(+), 40 deletions(-) diff --git a/src/V3Ast.h b/src/V3Ast.h index 72cd16bab..5206ef0bb 100644 --- a/src/V3Ast.h +++ b/src/V3Ast.h @@ -1949,7 +1949,8 @@ public: const char* charIQWN() const { return (isString() ? "N" : isWide() ? "W" : isQuad() ? "Q" : "I"); } }; -class AstNodeClassDType : public AstNodeDType { +class AstNodeUOrStructDType : public AstNodeDType { + // A struct or union; common handling private: // TYPES typedef std::map MemberNameMap; @@ -1959,14 +1960,14 @@ private: bool m_isFourstate; MemberNameMap m_members; public: - AstNodeClassDType(FileLine* fl, AstNumeric numericUnpack) + AstNodeUOrStructDType(FileLine* fl, AstNumeric numericUnpack) : AstNodeDType(fl) { // AstNumeric::NOSIGN overloaded to indicate not packed m_packed = (numericUnpack != AstNumeric::NOSIGN); m_isFourstate = false; // V3Width computes numeric(AstNumeric::fromBool(numericUnpack.isSigned())); } - ASTNODE_BASE_FUNCS(NodeClassDType) + ASTNODE_BASE_FUNCS(NodeUOrStructDType) virtual const char* broken() const; virtual void dump(std::ostream& str) const; // For basicp() we reuse the size to indicate a "fake" basic type of same size diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 545480008..e95e2e53e 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -65,7 +65,7 @@ int AstNodeSel::bitConst() const { return (constp ? constp->toSInt() : 0); } -void AstNodeClassDType::repairMemberCache() { +void AstNodeUOrStructDType::repairMemberCache() { clearCache(); for (AstMemberDType* itemp = membersp(); itemp; itemp=VN_CAST(itemp->nextp(), MemberDType)) { if (m_members.find(itemp->name())!=m_members.end()) { @@ -74,7 +74,7 @@ void AstNodeClassDType::repairMemberCache() { } } -const char* AstNodeClassDType::broken() const { +const char* AstNodeUOrStructDType::broken() const { vl_unordered_set exists; for (AstMemberDType* itemp = membersp(); itemp; itemp=VN_CAST(itemp->nextp(), MemberDType)) { exists.insert(itemp); @@ -107,14 +107,14 @@ int AstBasicDType::widthTotalBytes() const { else return widthWords() * (VL_EDATASIZE / 8); } -int AstNodeClassDType::widthTotalBytes() const { +int AstNodeUOrStructDType::widthTotalBytes() const { if (width()<=8) return 1; else if (width()<=16) return 2; else if (isQuad()) return 8; else return widthWords() * (VL_EDATASIZE / 8); } -int AstNodeClassDType::widthAlignBytes() const { +int AstNodeUOrStructDType::widthAlignBytes() const { // Could do max across members but that would be slow, // instead intuit based on total structure size if (width()<=8) return 1; @@ -580,7 +580,7 @@ AstNodeDType* AstNodeDType::dtypeDimensionp(int dimension) { } return NULL; } - else if (AstNodeClassDType* adtypep = VN_CAST(dtypep, NodeClassDType)) { + else if (AstNodeUOrStructDType* adtypep = VN_CAST(dtypep, NodeUOrStructDType)) { if (adtypep->packed()) { if ((dim++) == dimension) { return adtypep; @@ -1030,7 +1030,7 @@ void AstRefDType::dump(std::ostream& str) const { } else { str<<" -> UNLINKED"; } } -void AstNodeClassDType::dump(std::ostream& str) const { +void AstNodeUOrStructDType::dump(std::ostream& str) const { this->AstNode::dump(str); if (packed()) str<<" [PACKED]"; if (isFourstate()) str<<" [4STATE]"; diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 57142ca97..69fcab625 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -842,26 +842,26 @@ public: void packagep(AstPackage* nodep) { m_packagep = nodep; } }; -class AstStructDType : public AstNodeClassDType { +class AstStructDType : public AstNodeUOrStructDType { public: AstStructDType(FileLine* fl, AstNumeric numericUnpack) - : AstNodeClassDType(fl, numericUnpack) {} + : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(StructDType) virtual string verilogKwd() const { return "struct"; } }; -class AstUnionDType : public AstNodeClassDType { +class AstUnionDType : public AstNodeUOrStructDType { public: //UNSUP: bool isTagged; AstUnionDType(FileLine* fl, AstNumeric numericUnpack) - : AstNodeClassDType(fl, numericUnpack) {} + : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(UnionDType) virtual string verilogKwd() const { return "union"; } }; class AstMemberDType : public AstNodeDType { // A member of a struct/union - // PARENT: AstNodeClassDType + // PARENT: AstNodeUOrStructDType private: AstNodeDType* m_refDTypep; // Elements of this type (after widthing) string m_name; // Name of variable diff --git a/src/V3Changed.cpp b/src/V3Changed.cpp index f426847de..665677cf7 100644 --- a/src/V3Changed.cpp +++ b/src/V3Changed.cpp @@ -175,7 +175,7 @@ private: m_newRvEqnp = origNREp; } } - virtual void visit(AstNodeClassDType* nodep) { + virtual void visit(AstNodeUOrStructDType* nodep) { if (nodep->packedUnsup()) { newChangeDet(); } else { diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp index d34b80221..1cd44de2c 100644 --- a/src/V3Dead.cpp +++ b/src/V3Dead.cpp @@ -373,11 +373,11 @@ private: } for (std::vector::iterator it = m_dtypesp.begin(); it != m_dtypesp.end();++it) { if ((*it)->user1() == 0) { - AstNodeClassDType *classp; + AstNodeUOrStructDType *classp; // It's possible that there if a reference to each individual member, but // not to the dtype itself. Check and don't remove the parent dtype if // members are still alive. - if ((classp = VN_CAST((*it), NodeClassDType))) { + if ((classp = VN_CAST((*it), NodeUOrStructDType))) { bool cont = true; for (AstMemberDType *memberp = classp->membersp(); memberp; memberp = VN_CAST(memberp->nextp(), MemberDType)) { diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp index e2d6dd909..21ca8594d 100644 --- a/src/V3EmitV.cpp +++ b/src/V3EmitV.cpp @@ -542,7 +542,7 @@ class EmitVBaseVisitor : public EmitCBaseVisitor { iterate(nodep->subDTypep()); iterateAndNextNull(nodep->rangep()); } - virtual void visit(AstNodeClassDType* nodep) { + virtual void visit(AstNodeUOrStructDType* nodep) { puts(nodep->verilogKwd()+" "); if (nodep->packed()) puts("packed "); puts("\n"); diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 72f83f0f0..2ca7674cc 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -132,7 +132,7 @@ private: } visitIterateNodeDType(nodep); } - virtual void visit(AstNodeClassDType* nodep) { + virtual void visit(AstNodeUOrStructDType* nodep) { if (nodep->name() == "") { nodep->name(nameFromTypedef(nodep)); // Might still remain "" } diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h index b5c73003e..73c691bf2 100644 --- a/src/V3ParseImp.h +++ b/src/V3ParseImp.h @@ -73,7 +73,7 @@ struct V3ParseBisonYYSType { AstConst* constp; AstMemberDType* memberp; AstNodeModule* modulep; - AstNodeClassDType* classp; + AstNodeUOrStructDType* uorstructp; AstNodeDType* dtypep; AstNodeFTask* ftaskp; AstNodeFTaskRef* ftaskrefp; diff --git a/src/V3TraceDecl.cpp b/src/V3TraceDecl.cpp index 3db115a91..b9a780c7d 100644 --- a/src/V3TraceDecl.cpp +++ b/src/V3TraceDecl.cpp @@ -306,7 +306,7 @@ private: } } } - virtual void visit(AstNodeClassDType* nodep) { + virtual void visit(AstNodeUOrStructDType* nodep) { if (m_traVscp) { if (nodep->packed() && !v3Global.opt.traceStructs()) { // Everything downstream is packed, so deal with as one trace unit diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 35d5b6856..c8981902d 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1374,7 +1374,7 @@ private: } else if (nodep->isIO() && !(VN_IS(nodep->dtypeSkipRefp(), BasicDType) || VN_IS(nodep->dtypeSkipRefp(), NodeArrayDType) - || VN_IS(nodep->dtypeSkipRefp(), NodeClassDType))) { + || VN_IS(nodep->dtypeSkipRefp(), NodeUOrStructDType))) { nodep->v3error("Unsupported: Inputs and outputs must be simple data types"); } if (VN_IS(nodep->dtypep()->skipRefToConstp(), ConstDType)) { @@ -1647,7 +1647,7 @@ private: nodep->widthForce(1, 1); // Not really relevant UINFO(4,"dtWidthed "<didWidthAndSet()) return; // This node is a dtype & not both PRELIMed+FINALed UINFO(5," NODECLASS "<=9) nodep->dumpTree("-class-in--"); @@ -1697,7 +1697,7 @@ private: AstNodeDType* fromDtp = nodep->fromp()->dtypep()->skipRefToEnump(); UINFO(9," from dt "<findMember(nodep->name()); if (!memberp) { @@ -2255,8 +2255,8 @@ private: while (const AstConstDType* vdtypep = VN_CAST(dtypep, ConstDType)) { dtypep = vdtypep->subDTypep()->skipRefp(); } - if (AstNodeClassDType* vdtypep = VN_CAST(dtypep, NodeClassDType)) { - patternClass(nodep, vdtypep, defaultp); VL_DANGLING(nodep); + if (AstNodeUOrStructDType* vdtypep = VN_CAST(dtypep, NodeUOrStructDType)) { + patternUOrStruct(nodep, vdtypep, defaultp); VL_DANGLING(nodep); } else if (AstNodeArrayDType* vdtypep = VN_CAST(dtypep, NodeArrayDType)) { patternArray(nodep, vdtypep, defaultp); VL_DANGLING(nodep); @@ -2270,7 +2270,8 @@ private: } } } - void patternClass(AstPattern* nodep, AstNodeClassDType* vdtypep, AstPatMember* defaultp) { + void patternUOrStruct(AstPattern* nodep, AstNodeUOrStructDType* vdtypep, + AstPatMember* defaultp) { // Due to "default" and tagged patterns, we need to determine // which member each AstPatMember corresponds to before we can // determine the dtypep for that PatMember's value, and then @@ -4336,7 +4337,7 @@ private: declRange = adtypep->declRange(); if (isubDTypep()->skipRefp(); continue; - } else if (AstNodeClassDType* adtypep = VN_CAST(dtypep, NodeClassDType)) { + } else if (AstNodeUOrStructDType* adtypep = VN_CAST(dtypep, NodeUOrStructDType)) { declRange = adtypep->declRange(); if (adtypep) {} // UNUSED break; // Sub elements don't look like arrays and can't iterate into @@ -4357,7 +4358,7 @@ private: bits *= adtypep->declRange().elements(); dtypep = adtypep->subDTypep()->skipRefp(); continue; - } else if (AstNodeClassDType* adtypep = VN_CAST(dtypep, NodeClassDType)) { + } else if (AstNodeUOrStructDType* adtypep = VN_CAST(dtypep, NodeUOrStructDType)) { bits *= adtypep->width(); break; } else if (AstBasicDType* adtypep = VN_CAST(dtypep, BasicDType)) { diff --git a/src/V3WidthCommit.h b/src/V3WidthCommit.h index c92170cca..147e4737e 100644 --- a/src/V3WidthCommit.h +++ b/src/V3WidthCommit.h @@ -129,7 +129,7 @@ private: virtual void visit(AstNodeDType* nodep) { visitIterateNodeDType(nodep); } - virtual void visit(AstNodeClassDType* nodep) { + virtual void visit(AstNodeUOrStructDType* nodep) { if (nodep->user1SetOnce()) return; // Process once visitIterateNodeDType(nodep); nodep->clearCache(); diff --git a/src/V3WidthSel.cpp b/src/V3WidthSel.cpp index 233c6b27f..8f8f7dd9d 100644 --- a/src/V3WidthSel.cpp +++ b/src/V3WidthSel.cpp @@ -95,7 +95,7 @@ private: } else if (const AstQueueDType* adtypep = VN_CAST(ddtypep, QueueDType)) { } - else if (const AstNodeClassDType* adtypep = VN_CAST(ddtypep, NodeClassDType)) { + else if (const AstNodeUOrStructDType* adtypep = VN_CAST(ddtypep, NodeUOrStructDType)) { fromRange = adtypep->declRange(); } else if (AstBasicDType* adtypep = VN_CAST(ddtypep, BasicDType)) { @@ -280,7 +280,7 @@ private: if (debug()>=9) newp->dumpTree(cout, "--SELBTn: "); nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); } - else if (VN_IS(ddtypep, NodeClassDType)) { // It's packed, so a bit from the packed struct + else if (VN_IS(ddtypep, NodeUOrStructDType)) { // A bit from the packed struct // SELBIT(range, index) -> SEL(array, index, 1) AstSel* newp = new AstSel(nodep->fileline(), fromp, @@ -389,7 +389,7 @@ private: //if (debug()>=9) newp->dumpTree(cout, "--SELEXnew: "); nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); } - else if (VN_IS(ddtypep, NodeClassDType)) { + else if (VN_IS(ddtypep, NodeUOrStructDType)) { // Classes aren't little endian if (lsb > msb) { nodep->v3error("["<packedUnsup())) { + || (VN_IS(ddtypep, NodeUOrStructDType) + && VN_CAST(ddtypep, NodeUOrStructDType)->packedUnsup())) { int elwidth = 1; AstNode* newwidthp = widthp; if (const AstPackArrayDType* adtypep = VN_CAST(ddtypep, PackArrayDType)) { diff --git a/src/verilog.y b/src/verilog.y index 9ac2862f2..c1e828a22 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -1521,14 +1521,14 @@ var_data_type: // ==IEEE: var_data_type | yVAR implicit_typeE { $$ = $2; } ; -struct_unionDecl: // IEEE: part of data_type +struct_unionDecl: // IEEE: part of data_type // // packedSigningE is NOP for unpacked - ySTRUCT packedSigningE '{' { $$ = new AstStructDType($1, $2); SYMP->pushNew($$); } + ySTRUCT packedSigningE '{' { $$ = new AstStructDType($1, $2); SYMP->pushNew($$); } /*cont*/ struct_union_memberList '}' - { $$=$4; $$->addMembersp($5); SYMP->popScope($$); } - | yUNION taggedE packedSigningE '{' { $$ = new AstUnionDType($1, $3); SYMP->pushNew($$); } + { $$=$4; $$->addMembersp($5); SYMP->popScope($$); } + | yUNION taggedE packedSigningE '{' { $$ = new AstUnionDType($1, $3); SYMP->pushNew($$); } /*cont*/ struct_union_memberList '}' - { $$=$5; $$->addMembersp($6); SYMP->popScope($$); } + { $$=$5; $$->addMembersp($6); SYMP->popScope($$); } ; struct_union_memberList: // IEEE: { struct_union_member } From d738501c010a490ba2528aac9abd20f960277d0d Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Tue, 17 Dec 2019 06:08:41 -0500 Subject: [PATCH 25/90] Fix queues as statements, bug1641. --- Changes | 2 ++ src/V3Width.cpp | 3 +++ test_regress/t/t_queue.v | 4 ++-- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/Changes b/Changes index 7f58bb57a..d1276caae 100644 --- a/Changes +++ b/Changes @@ -22,6 +22,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix little endian cell ranges, bug1631. [Julien Margetts] +**** Fix queues as statements, bug1641. [Peter Monsson, Stefan Wallentowitz] + * Verilator 4.024 2019-12-08 diff --git a/src/V3Width.cpp b/src/V3Width.cpp index c8981902d..b1503e581 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -2051,6 +2051,9 @@ private: newp->dtypeFrom(adtypep->subDTypep()); newp->protect(false); newp->didWidth(true); + if (!nodep->firstAbovep()) { + newp->makeStatement(); + } } else if (nodep->name() == "push_back" || nodep->name() == "push_front") { methodOkArguments(nodep, 1, 1); diff --git a/test_regress/t/t_queue.v b/test_regress/t/t_queue.v index 1eea7f91e..4ef274e7e 100644 --- a/test_regress/t/t_queue.v +++ b/test_regress/t/t_queue.v @@ -60,7 +60,7 @@ module t (/*AUTOARG*/ //v = q[0]; `checks(v, "ins0"); //v = q[3]; `checks(v, "ins3"); - v = q.pop_front(); `checks(v, "f2"); + q.pop_front(); v = q.pop_front(); `checks(v, "f1"); v = q.pop_back(); `checks(v, "b2"); v = q.pop_back(); `checks(v, "b1"); @@ -73,7 +73,7 @@ module t (/*AUTOARG*/ v = q.pop_front(); `checks(v, ""); // Was empty, optional warning v = q.pop_back(); `checks(v, ""); // Was empty, optional warning - // COnversion of insert/delete with zero to operator + // Conversion of insert/delete with zero to operator q.push_front("front"); q.insert(0, "newfront"); i = q.size(); `checkh(i, 2); From cafb148a622753091c067f3f22d395d914cbf7c3 Mon Sep 17 00:00:00 2001 From: Julien Margetts <> Date: Tue, 17 Dec 2019 18:27:47 -0500 Subject: [PATCH 26/90] Commentary --- src/V3Graph.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/V3Graph.h b/src/V3Graph.h index cf71aee4d..b42ac4960 100644 --- a/src/V3Graph.h +++ b/src/V3Graph.h @@ -144,7 +144,7 @@ public: /// Delete any nodes with only outputs void deleteCutableOnlyEdges(); - /// Any cutable edged become non-cutable + /// Any cutable edges become non-cutable void makeEdgesNonCutable(V3EdgeFuncP edgeFuncp); /// Remove any redundant edges, weights become MAX of any other weight From 0465b6a3b1562395d30b88ff7b4079e77260d5ac Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 18 Dec 2019 17:58:24 -0500 Subject: [PATCH 27/90] Fix example makefiles, 1648. --- examples/make_tracing_c/Makefile | 7 ++++++- examples/make_tracing_sc/Makefile | 10 ++++++++-- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/examples/make_tracing_c/Makefile b/examples/make_tracing_c/Makefile index 4369918cb..a4f1a2c37 100644 --- a/examples/make_tracing_c/Makefile +++ b/examples/make_tracing_c/Makefile @@ -52,6 +52,9 @@ VERILATOR_FLAGS += --coverage # Add this trace to get a backtrace in gdb #VERILATOR_FLAGS += --gdbbt +# Input files for Verilator +VERILATOR_INPUT = -f input.vc top.v sim_main.cpp + ###################################################################### default: run @@ -61,7 +64,7 @@ run: @echo @echo "-- VERILATE ----------------" - $(VERILATOR) $(VERILATOR_FLAGS) -f input.vc top.v sim_main.cpp + $(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT) @echo @echo "-- COMPILE -----------------" @@ -72,11 +75,13 @@ run: @echo @echo "-- RUN ---------------------" + @rm -rf logs @mkdir -p logs obj_dir/Vtop +trace @echo @echo "-- COVERAGE ----------------" + @rm -rf logs/annotated $(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat @echo diff --git a/examples/make_tracing_sc/Makefile b/examples/make_tracing_sc/Makefile index 401463b7e..25ce7ddcc 100644 --- a/examples/make_tracing_sc/Makefile +++ b/examples/make_tracing_sc/Makefile @@ -52,6 +52,9 @@ VERILATOR_FLAGS += --coverage # Add this trace to get a backtrace in gdb #VERILATOR_FLAGS += --gdbbt +# Input files for Verilator +VERILATOR_INPUT = -f input.vc top.v sc_main.cpp + # Check if SC exists via a verilator call (empty if not) SYSTEMC_EXISTS := $(shell $(VERILATOR) --getenv SYSTEMC_INCLUDE) @@ -69,10 +72,10 @@ run: @echo @echo "-- VERILATE ----------------" - $(VERILATOR) $(VERILATOR_FLAGS) -f input.vc top.v sc_main.cpp + $(VERILATOR) $(VERILATOR_FLAGS) $(VERILATOR_INPUT) @echo - @echo "-- COMPILE ----------------=" + @echo "-- COMPILE -----------------" # To compile, we can either just do what Verilator asks, # or call a submakefile where we can override the rules ourselves # $(MAKE) -j 4 -C obj_dir -f Vtop.mk @@ -80,11 +83,13 @@ run: @echo @echo "-- RUN ---------------------" + @rm -rf logs @mkdir -p logs obj_dir/Vtop +trace @echo @echo "-- COVERAGE ----------------" + @rm -rf logs/annotated $(VERILATOR_COVERAGE) --annotate logs/annotated logs/coverage.dat @echo @@ -92,6 +97,7 @@ run: @echo "To see waveforms, open vlt_dump.vcd in a waveform viewer" @echo + ###################################################################### # Other targets From 9a54b2144be9939bcec6e33f72285062f661fce9 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Wed, 18 Dec 2019 18:17:18 -0500 Subject: [PATCH 28/90] Fix queue issues, bug1643. Signed-off-by: Wilson Snyder --- Changes | 2 +- src/V3AstNodes.cpp | 10 +++- src/V3LinkParse.cpp | 11 +++- src/V3Width.cpp | 93 +++++++++++++++++++++++--------- test_regress/t/t_queue.v | 114 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 201 insertions(+), 29 deletions(-) diff --git a/Changes b/Changes index d1276caae..ea1f29613 100644 --- a/Changes +++ b/Changes @@ -22,7 +22,7 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix little endian cell ranges, bug1631. [Julien Margetts] -**** Fix queues as statements, bug1641. [Peter Monsson, Stefan Wallentowitz] +**** Fix queue issues, bug1641, bug1643. [Peter Monsson, Stefan Wallentowitz] * Verilator 4.024 2019-12-08 diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index e95e2e53e..1adc5be7d 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -622,8 +622,16 @@ std::pair AstNodeDType::dimensions(bool includeBasic) { dtypep = adtypep->subDTypep(); continue; } + else if (const AstQueueDType* qdtypep = VN_CAST(dtypep, QueueDType)) { + unpacked++; + dtypep = qdtypep->subDTypep(); + continue; + } else if (const AstBasicDType* adtypep = VN_CAST(dtypep, BasicDType)) { - if (includeBasic && adtypep->isRanged()) packed++; + if (includeBasic && (adtypep->isRanged() || adtypep->isString())) packed++; + } + else if (const AstStructDType* sdtypep = VN_CAST(dtypep, StructDType)) { + packed++; } break; } diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 2ca7674cc..05b16ebd8 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -392,17 +392,22 @@ private: FileLine* fl = varsp->fileline(); AstNode* varp = new AstVar(fl, AstVarType::BLOCKTEMP, varsp->name(), nodep->findSigned32DType()); - // These will be the left and right dimensions of the array: + // These will be the left and right dimensions and size of the array: AstNode* leftp = new AstAttrOf(fl, AstAttrType::DIM_LEFT, new AstVarRef(fl, arrayp->name(), false), new AstConst(fl, dimension)); AstNode* rightp = new AstAttrOf(fl, AstAttrType::DIM_RIGHT, new AstVarRef(fl, arrayp->name(), false), new AstConst(fl, dimension)); + AstNode* sizep = new AstAttrOf(fl, AstAttrType::DIM_SIZE, + new AstVarRef(fl, arrayp->name(), false), + new AstConst(fl, dimension)); AstNode* stmtsp = varp; // Assign left-dimension into the loop var: stmtsp->addNext(new AstAssign (fl, new AstVarRef(fl, varp->name(), true), leftp)); + // This will turn into a constant bool for static arrays + AstNode* notemptyp = new AstGt(fl, sizep, new AstConst(fl, 0)); // This will turn into a bool constant, indicating whether // we count the loop variable up or down: AstNode* countupp = new AstLte(fl, leftp->cloneTree(true), @@ -414,13 +419,15 @@ private: rightp->cloneTree(true)), // Left decrements down to right new AstGte(fl, new AstVarRef(fl, varp->name(), false), rightp)); + // This will reduce to comparep for static arrays + AstNode* condp = new AstAnd(fl, notemptyp, comparep); AstNode* incp = new AstAssign( fl, new AstVarRef(fl, varp->name(), true), new AstAdd(fl, new AstVarRef(fl, varp->name(), false), new AstCond(fl, countupp, new AstConst(fl, 1), new AstConst(fl, -1)))); - stmtsp->addNext(new AstWhile(fl, comparep, newp, incp)); + stmtsp->addNext(new AstWhile(fl, condp, newp, incp)); newp = new AstBegin(nodep->fileline(), "", stmtsp); dimension--; } diff --git a/src/V3Width.cpp b/src/V3Width.cpp index b1503e581..9a2a106ea 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1076,31 +1076,74 @@ private: case AstAttrType::DIM_LOW: case AstAttrType::DIM_RIGHT: case AstAttrType::DIM_SIZE: { - UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, - "Unsized expression"); - std::pair dim - = nodep->fromp()->dtypep()->skipRefp()->dimensions(true); - uint32_t msbdim = dim.first + dim.second; - if (!nodep->dimp() || msbdim < 1) { - int dim = 1; - AstConst* newp = dimensionValue(nodep->fileline(), - nodep->fromp()->dtypep(), nodep->attrType(), dim); - nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); - } else if (VN_IS(nodep->dimp(), Const)) { - int dim = VN_CAST(nodep->dimp(), Const)->toSInt(); - AstConst* newp = dimensionValue(nodep->fileline(), - nodep->fromp()->dtypep(), nodep->attrType(), dim); - nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); - } - else { // Need a runtime lookup table. Yuk. - UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, - "Unsized expression"); - AstVar* varp = dimensionVarp(nodep->fromp()->dtypep(), nodep->attrType(), msbdim); - AstNode* dimp = nodep->dimp()->unlinkFrBack(); - AstVarRef* varrefp = new AstVarRef(nodep->fileline(), varp, false); - varrefp->packagep(v3Global.rootp()->dollarUnitPkgAddp()); - AstNode* newp = new AstArraySel(nodep->fileline(), varrefp, dimp); - nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, "Unsized expression"); + if (VN_IS(nodep->fromp()->dtypep(), QueueDType)) { + switch (nodep->attrType()) { + case AstAttrType::DIM_SIZE: { + AstNode* newp = new AstCMethodCall( + nodep->fileline(), nodep->fromp()->unlinkFrBack(), "size", NULL); + newp->dtypeSetSigned32(); + newp->didWidth(true); + newp->protect(false); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + break; + } + case AstAttrType::DIM_LEFT: + case AstAttrType::DIM_LOW: { + AstNode* newp = new AstConst(nodep->fileline(), AstConst::Signed32(), 0); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + break; + } + case AstAttrType::DIM_RIGHT: + case AstAttrType::DIM_HIGH: { + AstNode* sizep = new AstCMethodCall( + nodep->fileline(), nodep->fromp()->unlinkFrBack(), "size", NULL); + sizep->dtypeSetSigned32(); + sizep->didWidth(true); + sizep->protect(false); + AstNode* newp + = new AstSub(nodep->fileline(), sizep, + new AstConst(nodep->fileline(), AstConst::Signed32(), 1)); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + break; + } + case AstAttrType::DIM_INCREMENT: { + AstNode* newp = new AstConst(nodep->fileline(), AstConst::Signed32(), -1); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + break; + } + case AstAttrType::DIM_BITS: { + nodep->v3error("Unsupported: $bits for queue"); + break; + } + default: nodep->v3error("Unhandled attribute type"); + } + } else { + std::pair dim + = nodep->fromp()->dtypep()->skipRefp()->dimensions(true); + uint32_t msbdim = dim.first + dim.second; + if (!nodep->dimp() || msbdim < 1) { + int dim = 1; + AstConst* newp = dimensionValue(nodep->fileline(), nodep->fromp()->dtypep(), + nodep->attrType(), dim); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } else if (VN_IS(nodep->dimp(), Const)) { + int dim = VN_CAST(nodep->dimp(), Const)->toSInt(); + AstConst* newp = dimensionValue(nodep->fileline(), nodep->fromp()->dtypep(), + nodep->attrType(), dim); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } + else { // Need a runtime lookup table. Yuk. + UASSERT_OBJ(nodep->fromp() && nodep->fromp()->dtypep(), nodep, + "Unsized expression"); + AstVar* varp + = dimensionVarp(nodep->fromp()->dtypep(), nodep->attrType(), msbdim); + AstNode* dimp = nodep->dimp()->unlinkFrBack(); + AstVarRef* varrefp = new AstVarRef(nodep->fileline(), varp, false); + varrefp->packagep(v3Global.rootp()->dollarUnitPkgAddp()); + AstNode* newp = new AstArraySel(nodep->fileline(), varrefp, dimp); + nodep->replaceWith(newp); nodep->deleteTree(); VL_DANGLING(nodep); + } } break; } diff --git a/test_regress/t/t_queue.v b/test_regress/t/t_queue.v index 4ef274e7e..3ec91d79c 100644 --- a/test_regress/t/t_queue.v +++ b/test_regress/t/t_queue.v @@ -20,12 +20,71 @@ module t (/*AUTOARG*/ always @ (posedge clk) begin cyc <= cyc + 1; + + begin + // Very simple test using bit + bit q[$]; + bit x; + + `checkh($left(q), 0); + `checkh($right(q), -1); + `checkh($increment(q), -1); + `checkh($low(q), 0); + `checkh($high(q), -1); + `checkh($size(q), 0); + `checkh($dimensions(q), 1); + // Unsup: `checkh($bits(q), 0); + + q.push_back(1'b1); + `checkh($left(q), 0); + `checkh($right(q), 0); + `checkh($increment(q), -1); + `checkh($low(q), 0); + `checkh($high(q), 0); + `checkh($size(q), 1); + `checkh($dimensions(q), 1); + // Unsup: `checkh($bits(q), 2); + `checkh(q.size(), 1); + + q.push_back(1'b1); + q.push_back(1'b0); + q.push_back(1'b1); + `checkh($left(q), 0); + `checkh($right(q), 3); + `checkh($low(q), 0); + `checkh($high(q), 3); + `checkh($size(q), 4); + // Unsup: `checkh($bits(q), 4); + `checkh(q.size(), 4); + + x = q.pop_back(); `checkh(x, 1'b1); + `checkh($left(q), 0); + `checkh($right(q), 2); + `checkh($low(q), 0); + `checkh($high(q), 2); + `checkh($size(q), 3); + // sure those are working now.. + + x = q.pop_front(); `checkh(x, 1'b1); + x = q.pop_front(); `checkh(x, 1'b1); + x = q.pop_front(); `checkh(x, 1'b0); + `checkh(q.size(), 0); + end + begin // Simple test using integer typedef bit [3:0] nibble_t; nibble_t q[$]; nibble_t v; + `checkh($left(q), 0); + `checkh($right(q), -1); + `checkh($increment(q), -1); + `checkh($low(q), 0); + `checkh($high(q), -1); + `checkh($size(q), 0); + `checkh($dimensions(q), 2); + i = q.size(); `checkh(i, 0); q.push_back(4'd1); // 1 q.push_front(4'd2); // 2 1 @@ -37,8 +96,22 @@ module t (/*AUTOARG*/ // Strings string q[$]; string v; + int j = 0; + + // Empty queue checks + `checkh($left(q), 0); + `checkh($right(q), -1); + `checkh($increment(q), -1); + `checkh($low(q), 0); + `checkh($high(q), -1); + `checkh($size(q), 0); + `checkh($dimensions(q), 2); + //Unsup: `checkh($bits(q), 0); q.push_front("f1"); + + //Unsup: `checkh($bits(q), 16); + q.push_back("b1"); q.push_front("f2"); q.push_back("b2"); @@ -60,12 +133,28 @@ module t (/*AUTOARG*/ //v = q[0]; `checks(v, "ins0"); //v = q[3]; `checks(v, "ins3"); + foreach (q[i]) begin + j++; + v = q[i]; + if (i == 0) `checks(v, "f2"); + if (i == 1) `checks(v, "f1"); + if (i == 2) `checks(v, "b1"); + if (i == 3) `checks(v, "b2"); + end + `checkh(j,4); + q.pop_front(); v = q.pop_front(); `checks(v, "f1"); v = q.pop_back(); `checks(v, "b2"); v = q.pop_back(); `checks(v, "b1"); i = q.size(); `checkh(i, 0); + // Empty queue, this should be 0 + foreach (q[i]) begin + j++; + end + `checkh(j,4); + q.push_front("non-empty"); i = q.size(); `checkh(i, 1); q.delete(); @@ -83,6 +172,31 @@ module t (/*AUTOARG*/ end + begin + typedef struct packed { + bit [7:0] opcode; + bit [23:0] addr; + } instruction; // named structure type + + instruction q[$]; + + `checkh($dimensions(q), 2); + //Unsup: `checkh($bits(q), 0); + + end + + /* Unsup: + begin + int q[4][$]; + + q[0].push_back(0); + q[0].push_back(1); + q[1].push_back(2); + q[2].push_back(3); + + end + */ + // See t_queue_unsup_bad for more unsupported stuff $write("*-* All Finished *-*\n"); From 9807025618f94e48c9c33ec688225fad6cdf26ae Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 19 Dec 2019 20:07:48 -0500 Subject: [PATCH 29/90] Fix infinite loop on some V3Ast internal errors. --- src/V3Ast.cpp | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp index a2144f15e..cd2e2246c 100644 --- a/src/V3Ast.cpp +++ b/src/V3Ast.cpp @@ -1107,7 +1107,13 @@ void AstNode::v3errorEndFatal(std::ostringstream& str) const { string AstNode::locationStr() const { string str = "... In instance "; const AstNode* backp = this; + int itmax = 10000; // Max iterations before giving up on location search while (backp) { + if (--itmax < 0) { + // Likely some circular back link, and V3Ast is trying to report a low-level error + UINFO(1, "Ran out of iterations finding locationStr on " << backp << endl); + return ""; + } const AstScope* scopep; if ((scopep = VN_CAST_CONST(backp, Scope))) { // The design is flattened and there are no useful scopes From ee184f3f3924bbb1ce379fbaadd34afd2b3543b9 Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Fri, 20 Dec 2019 06:58:05 -0500 Subject: [PATCH 30/90] Fix strcasecmp for windows, bug1651. Signed-off-by: Wilson Snyder --- Changes | 2 ++ docs/CONTRIBUTORS | 1 + src/V3Error.cpp | 2 +- src/V3Options.cpp | 2 +- 4 files changed, 5 insertions(+), 2 deletions(-) diff --git a/Changes b/Changes index ea1f29613..c8b1822fd 100644 --- a/Changes +++ b/Changes @@ -24,6 +24,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix queue issues, bug1641, bug1643. [Peter Monsson, Stefan Wallentowitz] +**** Fix strcasecmp for windows, bug1651. [Kuba Ober] + * Verilator 4.024 2019-12-08 diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS index 2152dc059..ed7fd6b52 100644 --- a/docs/CONTRIBUTORS +++ b/docs/CONTRIBUTORS @@ -19,6 +19,7 @@ John Coiner Julien Margetts Kanad Kanhere Kevin Kiningham +Kuba Ober Lukasz Dalek Maarten De Braekeleer Matthew Ballance diff --git a/src/V3Error.cpp b/src/V3Error.cpp index fbf6f6a53..2014020e7 100644 --- a/src/V3Error.cpp +++ b/src/V3Error.cpp @@ -58,7 +58,7 @@ V3ErrorCode::V3ErrorCode(const char* msgp) { // Return error encoding for given string, or ERROR, which is a bad code for (int codei=V3ErrorCode::EC_MIN; codei Date: Fri, 20 Dec 2019 20:07:50 -0500 Subject: [PATCH 31/90] Decrease the number of chained if-else blocks to fix MSVC build. Pull (#7) MSVC has a limit of 128 blocks in a chain. --- src/V3Options.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/V3Options.cpp b/src/V3Options.cpp index 4da975ade..328755ae9 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -727,6 +727,7 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char VOptionBool bflag; // Allow gnu -- switches if (sw[0]=='-' && sw[1]=='-') ++sw; + bool hadSwitchPart1 = true; if (0) {} // Single switches else if (!strcmp(sw, "-E")) { m_preprocOnly = true; } @@ -799,6 +800,8 @@ void V3Options::parseOptsList(FileLine* fl, const string& optdir, int argc, char else if ( onoff (sw, "-Wpedantic", flag/*ref*/)) { m_pedantic = flag; } else if ( onoff (sw, "-x-initial-edge", flag/*ref*/)) { m_xInitialEdge = flag; } else if ( onoff (sw, "-xml-only", flag/*ref*/)) { m_xmlOnly = flag; } // Undocumented, still experimental + else { hadSwitchPart1 = false; } + if (hadSwitchPart1) {} // Optimization else if (!strncmp (sw, "-O", 2)) { for (const char* cp=sw+strlen("-O"); *cp; ++cp) { From c9ca390926ae27430c9cff40f32fa3985fdcfb47 Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Fri, 20 Dec 2019 20:14:52 -0500 Subject: [PATCH 32/90] Fix missing header. Pull (#8) --- src/V3Width.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 9a2a106ea..d17e1c4c6 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -77,6 +77,7 @@ #include "V3String.h" #include "V3Task.h" +#include #include // More code; this file was getting too large; see actions there From 3f0e2f7d9de03ea4fcc6273f2eb7ec3c0c353a0a Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Sat, 21 Dec 2019 10:25:05 -0500 Subject: [PATCH 33/90] Fix argument in AstConst.m_num.width. (#9) --- src/V3AstNodes.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 69fcab625..1bffff1ee 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -106,7 +106,7 @@ public: AstConst(FileLine* fl, Signed32, int32_t num) // Signed 32-bit integer of specified value : AstNodeMath(fl) , m_num(this, 32, num) { - m_num.width(32, 32); + m_num.width(32, true); dtypeSetLogicUnsized(32, m_num.widthMin(), AstNumeric::SIGNED); } class SizedEData {}; // for creator type-overload selection From 3a70bbc70c69ccb873ba53303919652b086549f3 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 22 Dec 2019 15:33:45 -0500 Subject: [PATCH 34/90] Update Changes to reflect github issue numbers. --- .github/labels.toml | 194 ++++++ Changes | 1374 +++++++++++++++++++++---------------------- MANIFEST.SKIP | 1 + 3 files changed, 882 insertions(+), 687 deletions(-) create mode 100644 .github/labels.toml diff --git a/.github/labels.toml b/.github/labels.toml new file mode 100644 index 000000000..0c9958522 --- /dev/null +++ b/.github/labels.toml @@ -0,0 +1,194 @@ +["area: assertions"] +color = "ffffe8" +name = "area: assertions" +description = "Issue involves assertions" + +["area: configure/compiling"] +color = "ffffe8" +name = "area: configure/compiling" +description = "Issue involves configuring or compilating Verilator itself" + +["area: coverage"] +color = "ffffe8" +name = "area: coverage" +description = "Issue involves coverage generation" + +["area: data-types"] +color = "ffffe8" +name = "area: data-types" +description = "Issue involves data-types" + +["area: documentation"] +color = "ffffe8" +name = "area: documentation" +description = "Issue involves documentation" + +["area: elaboration"] +color = "ffffe8" +name = "area: elaboration" +description = "Issue involves elaboration phase" + +["area: invoking/options"] +color = "ffffe8" +name = "area: invoking/options" +description = "Issue involves options passed to Verilator" + +["area: lint"] +color = "ffffe8" +name = "area: lint" +description = "Issue involves SystemVerilog lint checking" + +["area: parser"] +color = "ffffe8" +name = "area: parser" +description = "Issue involves SystemVerilog parsing" + +["area: performance"] +color = "ffffe8" +name = "area: performance" +description = "Issue involves performance issues" + +["area: portability"] +color = "ffffe8" +name = "area: portability" +description = "Issue involves operating system/compiler portability" + +["area: runtime result"] +color = "ffffe8" +name = "area: runtime result" +description = "Issue involves an incorrect runtine result from Verilated model" + +["area: scheduling"] +color = "ffffe8" +name = "area: scheduling" +description = "Issue involves scheduling/ordering of events" + +["area: tests"] +color = "ffffe8" +name = "area: tests" +description = "Issue involves the testing system" + +["area: usability"] +color = "ffffe8" +name = "area: usability" +description = "Issue involves general usability" + +["effort: days"] +color = "d0c0b0" +name = "effort: days" +description = "Expect this issue to require roughly days of invested effort to resolve" + +["effort: hours"] +color = "f5e6d6" +name = "effort: hours" +description = "Expect this issue to require roughly hours of invested effort to resolve" + +["effort: minutes"] +color = "f5e6d6" +name = "effort: minutes" +description = "Expect this issue to require less than an hour of invested effort to resolve" + +["effort: weeks"] +color = "d0c0b0" +name = "effort: weeks" +description = "Expect this issue to require weeks or more of invested effort to resolve" + +["good first issue"] +color = "7057ff" +name = "good first issue" +description = "Good for newcomers" + +["help wanted"] +color = "008672" +name = "help wanted" +description = "Extra attention is needed" + +["resolution: abandoned"] +color = "cfd3d7" +name = "resolution: abandoned" +description = "Closed; not enough information or otherwise never finished" + +["resolution: answered"] +color = "cfd3d7" +name = "resolution: answered" +description = "Closed; only applies to questions which were answered" + +["resolution: duplicate"] +color = "cfd3d7" +name = "resolution: duplicate" +description = "Closed; issue or pull request already exists" + +["resolution: external"] +color = "cfd3d7" +name = "resolution: external" +description = "Closed; passed to another tool's bug tracker" + +["resolution: fixed"] +color = "cfd3d7" +name = "resolution: fixed" +description = "Closed; fixed" + +["resolution: invalid"] +color = "cfd3d7" +name = "resolution: invalid" +description = "Closed; issue or pull request is no longer relevant" + +["resolution: no fix needed"] +color = "cfd3d7" +name = "resolution: no fix needed" +description = "Closed; no fix required (not a bug)" + +["resolution: wontfix"] +color = "cfd3d7" +name = "resolution: wontfix" +description = "Closed; work won't continue on an issue or pull request" + +["status: asked reporter"] +color = "ffffff" +name = "status: asked reporter" +description = "Bug is waiting for reporter to answer a question" + +["status: assigned"] +color = "a0f0ff" +name = "status: assigned" +description = "Issue is assigned to someone to work on" + +["status: blocked"] +color = "00007f" +name = "status: blocked" +description = "Issue is waiting for another bug, when other bug is fixed, then goes to 'status: assigned'" + +["status: discussion"] +color = "d876e3" +name = "status: discussion" +description = "Issue is waiting for discussions to resolve" + +["status: ready"] +color = "b6c92a" +name = "status: ready" +description = "Issue is ready for someone to fix; then goes to 'status: assigned'" + +["type: bug"] +color = "d73a4a" +name = "type: bug" +description = "Defect" + +["type: feature-IEEE"] +color = "cfccff" +name = "type: feature-IEEE" +description = "Request to add new feature, described in IEEE 1800" + +["type: feature-non-IEEE"] +color = "cfccff" +name = "type: feature-non-IEEE" +description = "Request to add new feature, outside IEEE 1800" + +["type: maintenance"] +color = "cfccff" +name = "type: maintenance" +description = "Internal maintenance task" + +["type: q and a"] +color = "84ba34" +name = "type: q and a" +description = "Question and answer about some feature or user question" diff --git a/Changes b/Changes index c8b1822fd..29a4012bd 100644 --- a/Changes +++ b/Changes @@ -6,32 +6,32 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support bounded queues. -*** Support string compare, ato*, etc methods, bug1606. [Yutetsu TAKATSUKASA] +*** Support string compare, ato*, etc methods, #1606. [Yutetsu TAKATSUKASA] **** Support immediate cover statements. -**** Ignore `uselib to end-of-line, bug1634. [Frederic Antonin] +**** Ignore `uselib to end-of-line, #1634. [Frederic Antonin] **** Update FST trace API for better performance. -**** Add vpiTimeUnit and allow to specify time as string, bug1636. [Stefan Wallentowitz] +**** Add vpiTimeUnit and allow to specify time as string, #1636. [Stefan Wallentowitz] **** Add error when `resetall inside module (IEEE 2017-22.3). **** Add cleaner error on version control conflicts in sources. -**** Fix little endian cell ranges, bug1631. [Julien Margetts] +**** Fix little endian cell ranges, #1631. [Julien Margetts] -**** Fix queue issues, bug1641, bug1643. [Peter Monsson, Stefan Wallentowitz] +**** Fix queue issues, #1641, #1643. [Peter Monsson, Stefan Wallentowitz] -**** Fix strcasecmp for windows, bug1651. [Kuba Ober] +**** Fix strcasecmp for windows, #1651. [Kuba Ober] * Verilator 4.024 2019-12-08 -** Support associative arrays (excluding [*] and pattern assignments), bug544. +** Support associative arrays (excluding [*] and pattern assignments), #544. -** Support queues (excluding {} notation and pattern assignments), bug545. +** Support queues (excluding {} notation and pattern assignments), #545. *** Add +verilator+error+limit to see more assertion errors. [Peter Monsson] @@ -45,42 +45,42 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Add error on redefining preprocessor directives. [Piotr Binkowski] -**** Support $value$plusargs float and shorts, bug1592, bug1619. [Garrett Smith] +**** Support $value$plusargs float and shorts, #1592, #1619. [Garrett Smith] -**** Fix gate lvalue optimization error, bug831. [Jonathon Donaldson, Driss Hafdi] +**** Fix gate lvalue optimization error, #831. [Jonathon Donaldson, Driss Hafdi] -**** Fix color assertion on empty if, bug1604. [Andrew Holme] +**** Fix color assertion on empty if, #1604. [Andrew Holme] -**** Fix for loop missing initializer, bug1605. [Andrew Holme] +**** Fix for loop missing initializer, #1605. [Andrew Holme] -**** Fix hang on concat error, bug1608. [Bogdan Vukobratovic] +**** Fix hang on concat error, #1608. [Bogdan Vukobratovic] **** Fix VPI timed callbacks to be one-shot, pull5. [Matthew Ballance] -**** Fix // in filenames, bug1610. [Peter Nelson] +**** Fix // in filenames, #1610. [Peter Nelson] **** Fix $display("%p") to be closer to IEEE. -**** Fix labels on functions with returns, bug1614. [Mitch Hayenga] +**** Fix labels on functions with returns, #1614. [Mitch Hayenga] -**** Fix false unused message on __Vemumtab, msg3180. [Tobias Rosenkranz] +**** Fix false unused message on __Vemumtab, #2061. [Tobias Rosenkranz] -**** Fix assertion on dotted parameter arrayed function, bug1620. [Rich Porter] +**** Fix assertion on dotted parameter arrayed function, #1620. [Rich Porter] -**** Fix interface reference tracing, bug1595. [Todd Strader] +**** Fix interface reference tracing, #1595. [Todd Strader] -**** Fix error on unpacked concatenations, bug1627. [Driss Hafdi] +**** Fix error on unpacked concatenations, #1627. [Driss Hafdi] * Verilator 4.022 2019-11-10 -** Add --protect-lib, bug1490. [Todd Strader] +** Add --protect-lib, #1490. [Todd Strader] -** Add cmake support, bug1363. [Patrick Stewart] +** Add cmake support, #1363. [Patrick Stewart] *** Examples have been renamed. -*** Add --protect-ids to obscure information in objects, bug1521. [Todd Strader] +*** Add --protect-ids to obscure information in objects, #1521. [Todd Strader] *** Add --trace-coverage. @@ -90,248 +90,248 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Suppress 'command failed' on normal errors. -*** Support some unpacked arrays in parameters, bug1315. [Marshal Qiao] +*** Support some unpacked arrays in parameters, #1315. [Marshal Qiao] -*** Add interface port visibility in traces, bug1594. [Todd Strader] +*** Add interface port visibility in traces, #1594. [Todd Strader] -**** Increase case duplicate/incomplete to 16 bit tables, bug1545. [Yossi Nivin] +**** Increase case duplicate/incomplete to 16 bit tables, #1545. [Yossi Nivin] -**** Support quoted arguments in -f files, bug1535. [Yves Mathieu] +**** Support quoted arguments in -f files, #1535. [Yves Mathieu] **** Optimize modulus by power-of-two constants, and masked conditionals. -**** Fix detecting missing reg types, bug1570. [Jacko Dirks] +**** Fix detecting missing reg types, #1570. [Jacko Dirks] **** Fix multithreaded yield behavior when no work. [Patrick Stewart] -**** Fix bad-syntax crashes, bug1548, bug1550-1553, bug1557-1560, bug1563, - bug1573-1577, bug1579, bug1582-1591. [Eric Rippey] +**** Fix bad-syntax crashes, #1548, #1550-#1553, #1557-#1560, #1563, + #1573-#1577, #1579, #1582-#1591. [Eric Rippey] -**** Fix false CMPCONST/UNSIGNED warnings on "inside", bug1581. [Mitch Hayenga] +**** Fix false CMPCONST/UNSIGNED warnings on "inside", #1581. [Mitch Hayenga] * Verilator 4.020 2019-10-06 -*** Support $fseek, $ftell, $frewind, bug1496. [Howard Su] +*** Support $fseek, $ftell, $frewind, #1496. [Howard Su] -*** Add --public-flat-rw, bug1511. [Stefan Wallentowitz] +*** Add --public-flat-rw, #1511. [Stefan Wallentowitz] -*** Support vpiModule, bug1469. [Stefan Wallentowitz] +*** Support vpiModule, #1469. [Stefan Wallentowitz] -**** Make Syms file honor --output-split-cfuncs, bug1499. [Todd Strader] +**** Make Syms file honor --output-split-cfuncs, #1499. [Todd Strader] -**** Fix make test with no VERILATOR_ROOT, bug1494. [Ahmed El-Mahmoudy] +**** Fix make test with no VERILATOR_ROOT, #1494. [Ahmed El-Mahmoudy] -**** Fix error on multidimensional cells, bug1505. [Anderson Ignacio Da Silva] +**** Fix error on multidimensional cells, #1505. [Anderson Ignacio Da Silva] **** Fix config_rev revision detection on old versions. -**** Fix false warning on backward indexing, bug1507. [Hao Shi] +**** Fix false warning on backward indexing, #1507. [Hao Shi] -**** Fix vpiType accessor, bug1509, bug1510. [Stefan Wallentowitz] +**** Fix vpiType accessor, #1509, #1510. [Stefan Wallentowitz] -**** Fix ugly error on interface misuse, bug1525. [Bogdan Vukobratovic] +**** Fix ugly error on interface misuse, #1525. [Bogdan Vukobratovic] -**** Fix misc bad-syntax crashes, bug1529-bug1533. [Eric Rippey] +**** Fix misc bad-syntax crashes, #1529, #1530, #1531, #1532, #1533. [Eric Rippey] -**** Fix case statements with strings, bug1536. [Philipp Wagner] +**** Fix case statements with strings, #1536. [Philipp Wagner] * Verilator 4.018 2019-08-29 ** When showing an error, show source code and offer suggestions of replacements. -** When showing an error, show the instance location, bug1305. [Todd Strader] +** When showing an error, show the instance location, #1305. [Todd Strader] -*** Add --rr, bug1481. [Todd Strader] +*** Add --rr, #1481. [Todd Strader] *** Change MULTITOP to warning to help linting, see manual. -*** Add XSim support to driver.pl, bug1493. [Todd Strader] +*** Add XSim support to driver.pl, #1493. [Todd Strader] -**** Show included-from filenames in warnings, bug1439. [Todd Strader] +**** Show included-from filenames in warnings, #1439. [Todd Strader] -**** Fix elaboration time errors, bug1429. [Udi Finkelstein] +**** Fix elaboration time errors, #1429. [Udi Finkelstein] -**** Fix not reporting some duplicate signals/ports, bug1462. [Peter Gerst] +**** Fix not reporting some duplicate signals/ports, #1462. [Peter Gerst] -**** Fix not in array context on non-power-of-two slices, msg2946. [Yu Sheng Lin] +**** Fix not in array context on non-power-of-two slices, #2027. [Yu Sheng Lin] **** Fix system compile flags injection. [Gianfranco Costamagna] -**** Fix enum values not being sized based on parent, bug1442. [Dan Petrisko] +**** Fix enum values not being sized based on parent, #1442. [Dan Petrisko] -**** Fix internal error on gate optimization of assign, bug1475. [Oyvind Harboe] +**** Fix internal error on gate optimization of assign, #1475. [Oyvind Harboe] -**** Add --dpi-hdr-only, bug1491. [Todd Strader] +**** Add --dpi-hdr-only, #1491. [Todd Strader] * Verilator 4.016 2019-06-16 -*** Add --quiet-exit, bug1436. [Todd Strader] +*** Add --quiet-exit, #1436. [Todd Strader] **** Error continuation lines no longer have %Error prefix. **** Support logical equivalence operator <->. -**** Support VerilatedFstC set_time_unit, bug1433. [Pieter Kapsenberg] +**** Support VerilatedFstC set_time_unit, #1433. [Pieter Kapsenberg] -**** Support deferred assertions, bug1449. [Charles Eddleston] +**** Support deferred assertions, #1449. [Charles Eddleston] **** Mark infrequently called functions with GCC cold attribute. -**** Fix sign-compare warning in verilated.cpp, bug1437. [Sergey Kvachonok] +**** Fix sign-compare warning in verilated.cpp, #1437. [Sergey Kvachonok] -**** Fix fault on $realtime with %t, bug1443. [Julien Margetts] +**** Fix fault on $realtime with %t, #1443. [Julien Margetts] -**** Fix $display with string without %s, bug1441. [Denis Rystsov] +**** Fix $display with string without %s, #1441. [Denis Rystsov] -**** Fix parameter function string returns, bug1441. [Denis Rystsov] +**** Fix parameter function string returns, #1441. [Denis Rystsov] -**** Fix invalid XML output due to special chars, bug1444. [Kanad Kanhere] +**** Fix invalid XML output due to special chars, #1444. [Kanad Kanhere] -**** Fix performance when mulithreaded on 1 CPU, bug1455. [Stefan Wallentowitz] +**** Fix performance when mulithreaded on 1 CPU, #1455. [Stefan Wallentowitz] -**** Fix type and real parameter issues, bug1427, bug1456, bug1458. [Todd Strader] +**** Fix type and real parameter issues, #1427, #1456, #1458. [Todd Strader] -**** Fix build error on MinGW, bug1460. [Richard Myers] +**** Fix build error on MinGW, #1460. [Richard Myers] -**** Fix not reporting some duplicate signals, bug1462. [Peter Gerst] +**** Fix not reporting some duplicate signals, #1462. [Peter Gerst] -**** Fix --savable invalid C++ on packed arrays, bug1465. [Alex Chadwick] +**** Fix --savable invalid C++ on packed arrays, #1465. [Alex Chadwick] -**** Fix constant function return of function var, bug1467. [Roman Popov] +**** Fix constant function return of function var, #1467. [Roman Popov] * Verilator 4.014 2019-05-08 *** Add --trace-fst-thread. -**** Support '#' comments in $readmem, bug1411. [Frederick Requin] +**** Support '#' comments in $readmem, #1411. [Frederick Requin] -**** Support "'dx" constants, bug1423. [Udi Finkelstein] +**** Support "'dx" constants, #1423. [Udi Finkelstein] **** For FST tracing use LZ4 compression. [Tony Bybell] -**** Add error when use parameters without value, bug1424. [Peter Gerst] +**** Add error when use parameters without value, #1424. [Peter Gerst] -**** Auto-extend and WIDTH warn on unsized X/Zs, bug1423. [Udi Finkelstein] +**** Auto-extend and WIDTH warn on unsized X/Zs, #1423. [Udi Finkelstein] -**** Fix missing VL_SHIFTL_ errors, bug1412, bug1415. [Larry Lee] +**** Fix missing VL_SHIFTL_ errors, #1412, #1415. [Larry Lee] -**** Fix MinGW GCC 6 printf formats, bug1413. [Sergey Kvachonok] +**** Fix MinGW GCC 6 printf formats, #1413. [Sergey Kvachonok] -**** Fix test problems when missing fst2vcd, bug1417. [Todd Strader] +**** Fix test problems when missing fst2vcd, #1417. [Todd Strader] -**** Fix GTKWave register warning, bug1421. [Pieter Kapsenberg] +**** Fix GTKWave register warning, #1421. [Pieter Kapsenberg] -**** Fix FST enums not displaying, bug1426. [Danilo Ramos] +**** Fix FST enums not displaying, #1426. [Danilo Ramos] -**** Fix table compile error with multiinterfaces, bug1431. [Bogdan Vukobratovic] +**** Fix table compile error with multiinterfaces, #1431. [Bogdan Vukobratovic] * Verilator 4.012 2019-3-23 -*** Add +verilator+seed, bug1396. [Stan Sokorac] +*** Add +verilator+seed, #1396. [Stan Sokorac] *** Support $fread. [Leendert van Doorn] -*** Support void' cast on functions called as tasks, bug1383. [Al Grant] +*** Support void' cast on functions called as tasks, #1383. [Al Grant] -*** Add IGNOREDRETURN warning, bug1383. +*** Add IGNOREDRETURN warning, #1383. **** Report PORTSHORT errors on concat constants, bug 1400. [Will Korteland] -**** Fix VERILATOR_GDB being ignored, msg2860. [Yu Sheng Lin] +**** Fix VERILATOR_GDB being ignored, #2017. [Yu Sheng Lin] **** Fix $value$plus$args missing verilated_heavy.h. [Yi-Chung Chen] -**** Fix MSVC compile error, bug1406. [Benjamin Gartner] +**** Fix MSVC compile error, #1406. [Benjamin Gartner] -**** Fix maintainer test when no Parallel::Forker, msg2630. [Enzo Chi] +**** Fix maintainer test when no Parallel::Forker, #1977. [Enzo Chi] -**** Fix +1364-1995ext flags applying too late, bug1384. [Al Grant] +**** Fix +1364-1995ext flags applying too late, #1384. [Al Grant] * Verilator 4.010 2019-01-27 *** Removed --trace-lxt2, use --trace-fst instead. -**** For --xml, add additional information, bug1372. [Jonathan Kimmitt] +**** For --xml, add additional information, #1372. [Jonathan Kimmitt] -**** Add circular typedef error, bug1388. [Al Grant] +**** Add circular typedef error, #1388. [Al Grant] -**** Add unsupported for loops error, msg2692. [Yu Sheng Lin] +**** Add unsupported for loops error, #1986. [Yu Sheng Lin] -**** Fix FST tracing of wide arrays, bug1376. [Aleksander Osman] +**** Fix FST tracing of wide arrays, #1376. [Aleksander Osman] -**** Fix error when pattern assignment has too few elements, bug1378. [Viktor Tomov] +**** Fix error when pattern assignment has too few elements, #1378. [Viktor Tomov] -**** Fix error when no modules in $unit, bug1381. [Al Grant] +**** Fix error when no modules in $unit, #1381. [Al Grant] -**** Fix missing too many digits warning, bug1380. [Jonathan Kimmitt] +**** Fix missing too many digits warning, #1380. [Jonathan Kimmitt] -**** Fix uninitialized data in verFiles and unroller, bug1385. bug1386. [Al Grant] +**** Fix uninitialized data in verFiles and unroller, #1385, #1386. [Al Grant] -**** Fix internal error on xrefs into unrolled functions, bug1387. [Al Grant] +**** Fix internal error on xrefs into unrolled functions, #1387. [Al Grant] -**** Fix DPI export void compiler error, bug1391. [Stan Sokorac] +**** Fix DPI export void compiler error, #1391. [Stan Sokorac] * Verilator 4.008 2018-12-01 -*** Support "ref" and "const ref" pins and functions, bug1360. [Jake Longo] +*** Support "ref" and "const ref" pins and functions, #1360. [Jake Longo] *** In --xml-only show the original unmodified names, and add module_files and cells similar to Verilog-Perl, msg2719. [Kanad Kanhere] -**** Add CONTASSREG error on continuous assignments to regs, bug1369. [Peter Gerst] +**** Add CONTASSREG error on continuous assignments to regs, #1369. [Peter Gerst] **** Add PROCASSWIRE error on behavioral assignments to wires, msg2737. [Neil Turton] **** Add IMPORTSTAR warning on import::* inside $unit scope. -**** Fix --trace-lxt2 compile error on MinGW, msg2711. [HyungKi Jeong] +**** Fix --trace-lxt2 compile error on MinGW, #1990. [HyungKi Jeong] -**** Fix hang on bad pattern keys, bug1364. [Matt Myers] +**** Fix hang on bad pattern keys, #1364. [Matt Myers] -**** Fix crash due to cygwin bug in getline, bug1349. [Affe Mao] +**** Fix crash due to cygwin bug in getline, #1349. [Affe Mao] -**** Fix __Slow files getting compiled with OPT_FAST, bug1370. [Thomas Watts] +**** Fix __Slow files getting compiled with OPT_FAST, #1370. [Thomas Watts] * Verilator 4.006 2018-10-27 -** Add --pp-comments, msg2700. [Robert Henry] +** Add --pp-comments, #1988. [Robert Henry] ** Add --dump-defines. -*** For --trace-fst, save enum decoding information, bug1358. [Sergi Granell] +*** For --trace-fst, save enum decoding information, #1358. [Sergi Granell] (To visualize enumeration data you must use GTKwave 3.3.95 or newer.) *** For --trace-fst, instead of *.fst.hier, put data into *.fst. [Tony Bybell] **** Fix --trace-lxt2 compile error on MinGW, msg2667. [HyungKi Jeong] -**** Fix Windows .exe not found, bug1361. [Patrick Stewart] +**** Fix Windows .exe not found, #1361. [Patrick Stewart] * Verilator 4.004 2018-10-6 -** Add GTKWave FST native tracing, bug1356. [Sergi Granell] +** Add GTKWave FST native tracing, #1356. [Sergi Granell] (Verilator developers need to pull the latest vcddiff.) *** Support $past. [Dan Gisselquist] -*** Support restrict, bug1350. [Clifford Wolf] +*** Support restrict, #1350. [Clifford Wolf] *** Rename include/lxt2 to include/gtkwave. **** Fix replication of 64-bit signal change detects. -**** Fix Mac OSX 10.13.6 / LLVM 9.1 compile issues, bug1348. [Kevin Kiningham] +**** Fix Mac OSX 10.13.6 / LLVM 9.1 compile issues, #1348. [Kevin Kiningham] -**** Fix MinGW compile issues, msg2636. [HyungKi Jeong] +**** Fix MinGW compile issues, #1979. [HyungKi Jeong] * Verilator 4.002 2018-09-16 @@ -343,74 +343,74 @@ The contributors that suggested a given feature are shown in []. Thanks! ** Add runtime arguments. -** Add GTKWave LXT2 native tracing, bug1333. [Yu Sheng Lin] +** Add GTKWave LXT2 native tracing, #1333. [Yu Sheng Lin] ** Note $random has new algorithm; results may vary vs. previous versions. -*** Better optimize large always block splitting, bug1244. [John Coiner] +*** Better optimize large always block splitting, #1244. [John Coiner] *** Add new reloop optimization for repetitive assignment compression. -*** Support string.atoi and similar methods, bug1289. [Joel Holdsworth] +*** Support string.atoi and similar methods, #1289. [Joel Holdsworth] **** Fix internals to be C++ null-pointer-check clean. **** Fix internals to avoid 'using namespace std'. -**** Fix Verilation performance issues, bug1316. [John Coiner] +**** Fix Verilation performance issues, #1316. [John Coiner] **** Fix clocker attributes to not propagate on concats. [John Coiner] -**** Fix first clock edge and --x-initial-edge, bug1327. [Rupert Swarbrick] +**** Fix first clock edge and --x-initial-edge, #1327. [Rupert Swarbrick] -**** Fix compile error on tracing of string arrays, bug1338. [Iztok Jeras] +**** Fix compile error on tracing of string arrays, #1338. [Iztok Jeras] -**** Fix number parsing with newline after radix, bug1340. [George Cuan] +**** Fix number parsing with newline after radix, #1340. [George Cuan] -**** Fix string ?: conditional type resolution, bug1345. [Iztok Jeras] +**** Fix string ?: conditional type resolution, #1345. [Iztok Jeras] -**** Fix duplicate symbol error on generate tri, bug1347. [Tomas Dzetkulic] +**** Fix duplicate symbol error on generate tri, #1347. [Tomas Dzetkulic] * Verilator 3.926 2018-08-22 **** Add OBJCACHE envvar support to examples and generated Makefiles. -**** Change MODDUP errors to warnings, msg2588. [Marshal Qiao] +**** Change MODDUP errors to warnings, #1969. [Marshal Qiao] **** Fix define argument stringification (`"), broke since 3.914. [Joe DErrico] -**** Fix to ignore Unicode UTF-8 BOM sequences, msg2576. [HyungKi Jeong] +**** Fix to ignore Unicode UTF-8 BOM sequences, #1967. [HyungKi Jeong] -**** Fix std:: build error, bug1322. +**** Fix std:: build error, #1322. -**** Fix function inlining inside certain while loops, bug1330. [Julien Margetts] +**** Fix function inlining inside certain while loops, #1330. [Julien Margetts] * Verilator 3.924 2018-06-12 *** Renamed --profile-cfuncs to --prof-cfuncs. -**** Report interface ports connected to wrong interface, bug1294. [Todd Strader] +**** Report interface ports connected to wrong interface, #1294. [Todd Strader] **** When tracing, use scalars on single bit arrays to appease vcddiff. **** Fix parsing "output signed" in V2K port list, msg2540. [James Jung] -**** Fix parsing error on bad missing #, bug1308. [Dan Kirkham] +**** Fix parsing error on bad missing #, #1308. [Dan Kirkham] -**** Fix $clog2 to be in verilog 2005, bug1319. [James Hutchinson] +**** Fix $clog2 to be in verilog 2005, #1319. [James Hutchinson] * Verilator 3.922 2018-03-17 ** Support IEEE 1800-2017 as default language. -*** Support trig functions ($sin() etc), bug1281. [Patrick Stewart] +*** Support trig functions ($sin() etc), #1281. [Patrick Stewart] -*** Support calling system functions as tasks, bug1285. [Joel Holdsworth] +*** Support calling system functions as tasks, #1285. [Joel Holdsworth] -*** Support assert properties, bug785, bug1290. [John Coiner, et al] +*** Support assert properties, #785, #1290. [John Coiner, et al] *** Support $writememh. [John Coiner] @@ -420,11 +420,11 @@ The contributors that suggested a given feature are shown in []. Thanks! **** On convergence errors, show activity. [John Coiner] -**** Fix GCC 8.0 issues, bug1273. +**** Fix GCC 8.0 issues, #1273. -**** Fix pullup/pulldowns on bit selects, bug1274. [Rob Stoddard] +**** Fix pullup/pulldowns on bit selects, #1274. [Rob Stoddard] -**** Fix verilator_coverage --annotate-min, bug1284. [Tymoteusz Blazejczyk] +**** Fix verilator_coverage --annotate-min, #1284. [Tymoteusz Blazejczyk] **** Fix quoting of quoted arguments. [John Coiner] @@ -434,30 +434,30 @@ The contributors that suggested a given feature are shown in []. Thanks! ** Moving forward, use the git "stable" branch to track the latest release, and git "v#.###" tags for specific releases. -*** Support 'assume' similar to 'assert', bug1269. [Dan Gisselquist] +*** Support 'assume' similar to 'assert', #1269. [Dan Gisselquist] -**** Fix tracing example file output, bug1268. [Enzo Chi] +**** Fix tracing example file output, #1268. [Enzo Chi] -**** Fix gate optimization out of memory, add --gate-stmts, bug1260. [Alex Solomatnikov] +**** Fix gate optimization out of memory, add --gate-stmts, #1260. [Alex Solomatnikov] -**** Fix compile error on public real parameters by suppressing, bug1261. [Alex Solomatnikov] +**** Fix compile error on public real parameters by suppressing, #1261. [Alex Solomatnikov] -**** Fix input-only tristate comparisons, bug1267. [Alexis G] +**** Fix input-only tristate comparisons, #1267. [Alexis G] -**** Fix missing edge type in xml output, msg2480. [Alexis G] +**** Fix missing edge type in xml output, #1955. [Alexis G] -**** Fix compile error with --public and interface bind, bug1264. [Alexis G] +**** Fix compile error with --public and interface bind, #1264. [Alexis G] -**** Remove c++filt, bug1265. [Stefan Wallentowitz] +**** Remove c++filt, #1265. [Stefan Wallentowitz] * Verilator 3.918 2018-01-02 -*** Workaround GCC/clang bug with huge compile times, bug1248. +*** Workaround GCC/clang bug with huge compile times, #1248. -*** Support DPI open arrays, bug909, bug1245. [David Pierce, Victor Besyakov] +*** Support DPI open arrays, #909, #1245. [David Pierce, Victor Besyakov] -*** Add INFINITELOOP warning, bug1254. [Alex Solomatnikov] +*** Add INFINITELOOP warning, #1254. [Alex Solomatnikov] **** Support > 64 bit decimal $display. @@ -468,40 +468,40 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Add error if always_comb has sensitivity list. [Arjen Roodselaar] -**** Fix SystemC 2.3.2 compile error, bug1251. [Tymoteusz Blazejczyk] +**** Fix SystemC 2.3.2 compile error, #1251. [Tymoteusz Blazejczyk] -**** Fix modport outputs being treated as inputs, bug1246. [Jeff Bush] +**** Fix modport outputs being treated as inputs, #1246. [Jeff Bush] -**** Fix false ALWCOMBORDER on interface references, bug1247. [Josh Redford] +**** Fix false ALWCOMBORDER on interface references, #1247. [Josh Redford] **** Fix constant propagation across DPI imports of inout strings. [Victor Besyakov] -**** Fix resolving inline nested interface names, bug1250. [Arjen Roodselaar] +**** Fix resolving inline nested interface names, #1250. [Arjen Roodselaar] * Verilator 3.916 2017-11-25 -*** Support self-recursive modules, bug659. [Sean Moore, et al] +*** Support self-recursive modules, #659. [Sean Moore, et al] *** Support $error/$warning in elaboration time blocks. *** Support $size/$bits/etc on type references. -*** Add error when driving input-only modport, bug1110. [Trevor Elbourne] +*** Add error when driving input-only modport, #1110. [Trevor Elbourne] *** Add BSSPACE and COLONPLUS lint warnings. -**** Detect MSB overflow when under VL_DEBUG, bug1238. [Junyi Xi] +**** Detect MSB overflow when under VL_DEBUG, #1238. [Junyi Xi] **** Add data types to --xml. [Rui Terra] -**** Fix partial slicing with pattern assignments, bug991. [Johan Bjork] +**** Fix partial slicing with pattern assignments, #991. [Johan Bjork] -**** Fix false unused warning on interfaces, bug1241. [Laurens van Dam] +**** Fix false unused warning on interfaces, #1241. [Laurens van Dam] **** Fix error on "unique case" with no cases. -**** Fix MacOS portability, bug1232. [Jeff Bush] +**** Fix MacOS portability, #1232. [Jeff Bush] * Verilator 3.914 2017-10-14 @@ -513,7 +513,7 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Add --x-initial option for specifying initial value assignment behavior. -*** Add --no-relative-cfuncs and related default optimization, bug1224. [John Coiner] +*** Add --no-relative-cfuncs and related default optimization, #1224. [John Coiner] *** Add /*verilator tag*/ for XML extraction applications. [Chris Randall] @@ -521,25 +521,25 @@ The contributors that suggested a given feature are shown in []. Thanks! **** The experimental VL_THREADED setting (only, not normal mode) now requires C++11. -**** Fix over-aggressive inlining, bug1223. [John Coiner] +**** Fix over-aggressive inlining, #1223. [John Coiner] -**** Fix Ubuntu 17.10 issues, bug1223 partial. [John Coiner] +**** Fix Ubuntu 17.10 issues, #1223 partial. [John Coiner] **** Fix compiler warning when WIDTH warning ignored on large compare. -**** Fix memory leak in VerilatedVcd dumps, bug1222 partial. [Shareef Jalloq] +**** Fix memory leak in VerilatedVcd dumps, #1222 partial. [Shareef Jalloq] -**** Fix unnecessary Vdly variables, bug1224 partial. [John Coiner] +**** Fix unnecessary Vdly variables, #1224 partial. [John Coiner] **** Fix conditional slices and add related optimizations. -**** Fix `` expansion of `defines, bug1225, bug1227, bug1228. [Odd Magne Reitan] +**** Fix `` expansion of `defines, #1225, #1227, #1228. [Odd Magne Reitan] -**** Fix -E duplicating output, bug1226. [Odd Magne Reitan] +**** Fix -E duplicating output, #1226. [Odd Magne Reitan] -**** Fix float-conversion warning, bug1229. [Robert Henry] +**** Fix float-conversion warning, #1229. [Robert Henry] -**** Fix MacOS portability, bug1230, bug1231. [Jeff Bush] +**** Fix MacOS portability, #1230, #1231. [Jeff Bush] * Verilator 3.912 2017-09-23 @@ -547,11 +547,11 @@ The contributors that suggested a given feature are shown in []. Thanks! ** Verilated headers no longer "use namespace std;" User's code without "std::" prefixes may need "use namespace std;" to compile. -*** Support or/and/xor array intrinsic methods, bug1210. [Mike Popoloski] +*** Support or/and/xor array intrinsic methods, #1210. [Mike Popoloski] -*** Support package export, bug1217. [Usuario Eda] +*** Support package export, #1217. [Usuario Eda] -*** Fix ordering of arrayed cell wide connections, bug1202 partial. [Mike Popoloski] +*** Fix ordering of arrayed cell wide connections, #1202 partial. [Mike Popoloski] **** Support module port parameters without defaults, bug 1213. [Mike Popoloski] @@ -559,17 +559,17 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Simplify VL_CONST_W macro generation for faster compiles. -**** Fix LITENDIAN warning on arrayed cells, bug1202. [Mike Popoloski] +**** Fix LITENDIAN warning on arrayed cells, #1202. [Mike Popoloski] -**** Fix enum ranges without colons, bug1204. [Mike Popoloski] +**** Fix enum ranges without colons, #1204. [Mike Popoloski] -**** Fix GCC noreturn compile error, bug1209. [Mike Popoloski] +**** Fix GCC noreturn compile error, #1209. [Mike Popoloski] -**** Fix constant function default parameters, bug1211. [Mike Popoloski] +**** Fix constant function default parameters, #1211. [Mike Popoloski] -**** Fix non-colon array of interface modports, bug1212. [Mike Popoloski] +**** Fix non-colon array of interface modports, #1212. [Mike Popoloski] -**** Fix .name connections on interfaces, bug1214. [Mike Popoloski] +**** Fix .name connections on interfaces, #1214. [Mike Popoloski] **** Fix wide array indices causing compile error. @@ -585,368 +585,368 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 3.908 2017-08-28 -**** Support x in $readmem, bug1180. [Arthur Kahlich] +**** Support x in $readmem, #1180. [Arthur Kahlich] -**** Support packed struct DPI imports, bug1190. [Rob Stoddard] +**** Support packed struct DPI imports, #1190. [Rob Stoddard] **** Fix GCC 6 warnings. -**** Fix compile error on unused VL_VALUEPLUSARGS_IW, bug1181. [Thomas J Whatson] +**** Fix compile error on unused VL_VALUEPLUSARGS_IW, #1181. [Thomas J Whatson] **** Fix undefined VL_POW_WWI. [Clifford Wolf] -**** Fix internal error on unconnected inouts, bug1187. [Rob Stoddard] +**** Fix internal error on unconnected inouts, #1187. [Rob Stoddard] * Verilator 3.906 2017-06-22 -*** Support set_time_unit/set_time_precision in C traces, msg2261. +*** Support set_time_unit/set_time_precision in C traces, #1937. -*** Fix extract of packed array with non-zero LSB, bug1172. [James Pallister] +*** Fix extract of packed array with non-zero LSB, #1172. [James Pallister] -*** Fix shifts by more than 32-bit numbers, bug1174. [Clifford Wolf] +*** Fix shifts by more than 32-bit numbers, #1174. [Clifford Wolf] -*** Fix power operator on wide constants, bug761. [Clifford Wolf] +*** Fix power operator on wide constants, #761. [Clifford Wolf] -*** Fix .* on interface pins, bug1176. [Maciej Piechotka] +*** Fix .* on interface pins, #1176. [Maciej Piechotka] * Verilator 3.904 2017-05-30 -*** Fix non-cutable ordering loops on clock arrays, bug1009. [Todd Strader] +*** Fix non-cutable ordering loops on clock arrays, #1009. [Todd Strader] -*** Support ports of array of reals, bug1154. [J Briquet] +*** Support ports of array of reals, #1154. [J Briquet] -*** Support arrayed parameter overrides, bug1153. [John Stevenson] +*** Support arrayed parameter overrides, #1153. [John Stevenson] -*** Support $value$plusargs with variables, bug1165. [Wesley Terpstra] +*** Support $value$plusargs with variables, #1165. [Wesley Terpstra] -**** Support modport access to un-modport objects, bug1161. [Todd Strader] +**** Support modport access to un-modport objects, #1161. [Todd Strader] -**** Add stack trace when can't optimize function, bug1158. [Todd Strader] +**** Add stack trace when can't optimize function, #1158. [Todd Strader] -**** Add warning on mis-sized literal, bug1156. [Todd Strader] +**** Add warning on mis-sized literal, #1156. [Todd Strader] -**** Fix interface functions returning wrong parameters, bug996. [Todd Strader] +**** Fix interface functions returning wrong parameters, #996. [Todd Strader] -**** Fix non-arrayed cells with interface arrays, bug1153. [John Stevenson] +**** Fix non-arrayed cells with interface arrays, #1153. [John Stevenson] -**** Fix --assert with complex case statements, bug1164. [Enzo Chi] +**** Fix --assert with complex case statements, #1164. [Enzo Chi] * Verilator 3.902 2017-04-02 -** Add -FI option to force includes,msg2146. [Amir Gonnen] +** Add -FI option to force includes, #1916. [Amir Gonnen] ** Add --relative-includes. [Rob Stoddard] -*** Add error on duplicate pattern assignments, bug1145. [Johan Bjork] +*** Add error on duplicate pattern assignments, #1145. [Johan Bjork] -**** Fix error on improperly widthed default function, bug984. [Todd Strader] +**** Fix error on improperly widthed default function, #984. [Todd Strader] **** Fix 2009 localparam syntax, msg2139. [Galen Seitz] -**** Fix ugly interface-to-non-interface errors, bug1112. [Johan Bjork] +**** Fix ugly interface-to-non-interface errors, #1112. [Johan Bjork] -**** Fix LDFLAGS and CFLAGS not preserving order, bug1130. [Olof Kindgren] +**** Fix LDFLAGS and CFLAGS not preserving order, #1130. [Olof Kindgren] -**** Fix internal error on initializing parameter array, bug1131. [Jie Xu] +**** Fix internal error on initializing parameter array, #1131. [Jie Xu] -**** Fix internal error on interface arrays, bug1135. [John Stevenson] +**** Fix internal error on interface arrays, #1135. [John Stevenson] -**** Fix calling sformatf to display, and elab $displays, bug1139. [Johan Bjork] +**** Fix calling sformatf to display, and elab $displays, #1139. [Johan Bjork] -**** Fix realpath compile issue on MSVC++, bug1141. [Miodrag Milanovic] +**** Fix realpath compile issue on MSVC++, #1141. [Miodrag Milanovic] -**** Fix missing error on interface size mismatch, bug1143. [Johan Bjork] +**** Fix missing error on interface size mismatch, #1143. [Johan Bjork] -**** Fix error on parameters with dotted references, bug1146. [Johan Bjork] +**** Fix error on parameters with dotted references, #1146. [Johan Bjork] -**** Fix wreal not handling continuous assign, bug1150. [J Briquet] +**** Fix wreal not handling continuous assign, #1150. [J Briquet] -**** Fix nested structure parameter selects, bug1150. [J Briquet] +**** Fix nested structure parameter selects, #1150. [J Briquet] * Verilator 3.900 2017-01-15 ** Internal code changes for improved compatibility and performance. -*** Support old-style $display($time), bug467. [John Demme] +*** Support old-style $display($time), #467. [John Demme] -**** With --bbox-unsup, suppress desassign and mixed edges, bug1120. [Galen Seitz] +**** With --bbox-unsup, suppress desassign and mixed edges, #1120. [Galen Seitz] -**** Fix parsing sensitivity with &&, bug934. [Luke Yang] +**** Fix parsing sensitivity with &&, #934. [Luke Yang] -**** Fix internal error on double-for loop unrolling, bug1044. [Jan Egil Ruud] +**** Fix internal error on double-for loop unrolling, #1044. [Jan Egil Ruud] -**** Fix internal error on unique casez with --assert, bug1117. [Enzo Chi] +**** Fix internal error on unique casez with --assert, #1117. [Enzo Chi] -**** Fix bad code when tracing array of structs, bug1122. [Andrew Bardsley] +**** Fix bad code when tracing array of structs, #1122. [Andrew Bardsley] * Verilator 3.890 2016-11-25 -*** Honor --output-split on coverage constructors, bug1098. [Johan Bjork] +*** Honor --output-split on coverage constructors, #1098. [Johan Bjork] **** Fix various issues when making outside of the kit. -**** Fix flex 2.6.2 bug, bug1103. [Sergey Kvachonok] +**** Fix flex 2.6.2 bug, #1103. [Sergey Kvachonok] -**** Fix error on bad interface name, bug1097. [Todd Strader] +**** Fix error on bad interface name, #1097. [Todd Strader] -**** Fix error on referencing variable in parent, bug1099. [Ian Thompson] +**** Fix error on referencing variable in parent, #1099. [Ian Thompson] -**** Fix type parameters with low optimization, bug1101. [Stefan Wallentowitz] +**** Fix type parameters with low optimization, #1101. [Stefan Wallentowitz] * Verilator 3.888 2016-10-14 -** Support foreach, bug1078. [Xuan Guo] +** Support foreach, #1078. [Xuan Guo] *** Add --no-decoration to remove output comments, msg2015. [Frederic Requin] *** If VM_PARALLEL_BUILDS=1, use OPT_FAST and OPT_SLOW. [Frederic Requin] Set VM_DEFAULT_RULES=0 for old behavior. -**** Add error on DPI functions > 32 bits, msg1995. [Elliot Mednick] +**** Add error on DPI functions > 32 bits, #1898. [Elliot Mednick] -**** Fix SystemC compiles with VPI, bug1081. [Arthur Kahlich] +**** Fix SystemC compiles with VPI, #1081. [Arthur Kahlich] -**** Fix error on wide numbers that represent shifts, msg1991, bug1088. [Mandy Xu] +**** Fix error on wide numbers that represent shifts, msg1991, #1088. [Mandy Xu] -**** Improve Verilation performance on internal strings, msg1975. [Johan Bjork] +**** Improve Verilation performance on internal strings, #1896. [Johan Bjork] -**** Improve Verilation performance on trace duplicates, bug1090. [Johan Bjork] +**** Improve Verilation performance on trace duplicates, #1090. [Johan Bjork] * Verilator 3.886 2016-07-30 -**** Fix enum values of 11-16 bits wide using .next/.prev, bug1062. [Brian Flachs] +**** Fix enum values of 11-16 bits wide using .next/.prev, #1062. [Brian Flachs] **** Fix false warnings on non-power-2 enums using .next/.prev. -**** Fix comparison of unpacked arrays, bug1071. [Andrew Bardsley] +**** Fix comparison of unpacked arrays, #1071. [Andrew Bardsley] **** Fix compiler warning in GCC 6. [David Horton] * Verilator 3.884 2016-05-18 -** Support parameter type, bug376. [Alan Hunter, et al] +** Support parameter type, #376. [Alan Hunter, et al] -** Support command-line -G/+pvalue param overrides, bug1045. [Stefan Wallentowitz] +** Support command-line -G/+pvalue param overrides, #1045. [Stefan Wallentowitz] -*** The default l2 scope name is now the same as the top-level module, bug1050. +*** The default l2 scope name is now the same as the top-level module, #1050. Use "--l2-name v" for the historical behavior. *** Add --l2-name option for controlling "v" naming. -**** Fix --output-split of constructors, bug1035. [Johan Bjork] +**** Fix --output-split of constructors, #1035. [Johan Bjork] -**** Fix removal of empty packages, modules and cells, bug1034. [Johan Bjork] +**** Fix removal of empty packages, modules and cells, #1034. [Johan Bjork] -**** Fix core dump on Arch Linux/GCC 6.1.1, bug1058. [Jannis Harder] +**** Fix core dump on Arch Linux/GCC 6.1.1, #1058. [Jannis Harder] -**** Fix $value$plusargs to string, msg1890. [Frederic Requin] +**** Fix $value$plusargs to string, #1880. [Frederic Requin] * Verilator 3.882 2016-03-01 -**** Internal Verilation-time performance enhancements, bug1021. [Johan Bjork] +**** Internal Verilation-time performance enhancements, #1021. [Johan Bjork] -**** Support inlining interfaces, bug1018. [Johan Bjork] +**** Support inlining interfaces, #1018. [Johan Bjork] -**** Support SV strings to readmemh, bug1040. [Stefan Wallentowitz] +**** Support SV strings to readmemh, #1040. [Stefan Wallentowitz] -**** Fix unrolling complicated for-loop bounds, bug677. [Johan Bjork] +**** Fix unrolling complicated for-loop bounds, #677. [Johan Bjork] -**** Fix stats file containing multiple unroll entries, bug1020. [Johan Bjork] +**** Fix stats file containing multiple unroll entries, #1020. [Johan Bjork] -**** Fix using short parameter names on negative params, bug1022. [Duraid Madina] +**** Fix using short parameter names on negative params, #1022. [Duraid Madina] -**** Fix read-after-free error, bug1031. [Johan Bjork] +**** Fix read-after-free error, #1031. [Johan Bjork] -**** Fix elaboration-time display warnings, bug1032. [Johan Bjork] +**** Fix elaboration-time display warnings, #1032. [Johan Bjork] -**** Fix crash on very deep function trees, bug1028. [Jonathan Kimmitt] +**** Fix crash on very deep function trees, #1028. [Jonathan Kimmitt] -**** Fix slicing mix of big and little-endian, bug1033. [Geoff Barrett] +**** Fix slicing mix of big and little-endian, #1033. [Geoff Barrett] -**** Fix pattern assignment width propagation, bug1037. [Johan Bjork] +**** Fix pattern assignment width propagation, #1037. [Johan Bjork] * Verilator 3.880 2015-12-19 -*** Support display %u, %v, %p, %z, bug989. [Johan Bjork] +*** Support display %u, %v, %p, %z, #989. [Johan Bjork] -**** Fix real parameters causing bad module names, bug992. [Johan Bjork] +**** Fix real parameters causing bad module names, #992. [Johan Bjork] -**** Fix size-changing cast on packed struct, bug993. [Johan Bjork] +**** Fix size-changing cast on packed struct, #993. [Johan Bjork] -**** Fix function calls on arrayed interface, bug994. [Johan Bjork] +**** Fix function calls on arrayed interface, #994. [Johan Bjork] -**** Fix arrayed interfaces, bug879, bug1001. [Todd Strader] +**** Fix arrayed interfaces, #879, #1001. [Todd Strader] -**** Fix constant function assigned to packed structs, bug997. [Johan Bjork] +**** Fix constant function assigned to packed structs, #997. [Johan Bjork] -**** Fix interface inside generate, bug998. [Johan Bjork] +**** Fix interface inside generate, #998. [Johan Bjork] -**** Fix $signed casts under generates, bug999. [Clifford Wolf] +**** Fix $signed casts under generates, #999. [Clifford Wolf] -**** Fix genvar constant propagation, bug1003. [Johan Bjork] +**** Fix genvar constant propagation, #1003. [Johan Bjork] -**** Fix parameter constant propagation from package, bug1004. [Johan Bjork] +**** Fix parameter constant propagation from package, #1004. [Johan Bjork] -**** Fix array slicing of non-const indexes, bug1006. [Johan Bjork] +**** Fix array slicing of non-const indexes, #1006. [Johan Bjork] -**** Fix dotted generated array error, bug1005. [Jeff Bush, Johan Bjork] +**** Fix dotted generated array error, #1005. [Jeff Bush, Johan Bjork] -**** Fix error instead of warning on large concat, msg1768. [Paul Rolfe] +**** Fix error instead of warning on large concat, #1865. [Paul Rolfe] -**** Fix $bitstoreal constant propagation, bug1012. [Jonathan Kimmitt] +**** Fix $bitstoreal constant propagation, #1012. [Jonathan Kimmitt] -**** Fix model restore crash, bug1013. [Jason McMullan] +**** Fix model restore crash, #1013. [Jason McMullan] -**** Fix arrayed instances to unpacked of same size, bug1015. [Varun Koyyalagunta] +**** Fix arrayed instances to unpacked of same size, #1015. [Varun Koyyalagunta] **** Fix slices of unpacked arrays with non-zero LSBs. -**** Fix ternary operation with unpacked array, bug1017. [Varun Koyyalagunta]. +**** Fix ternary operation with unpacked array, #1017. [Varun Koyyalagunta]. * Verilator 3.878 2015-11-01 -** Add --vpi flag, and fix VPI linkage, bug969. [Arthur Kahlich] +** Add --vpi flag, and fix VPI linkage, #969. [Arthur Kahlich] -** Support genvar indexes into arrayed cells, bug517. [Todd Strader] +** Support genvar indexes into arrayed cells, #517. [Todd Strader] -** Support $sformatf, bug977. [Johan Bjork] +** Support $sformatf, #977. [Johan Bjork] -*** Support elaboration assertions, bug973. [Johan Bjork] +*** Support elaboration assertions, #973. [Johan Bjork] -*** Support $display with non-format arguments, bug467. [Jamey Hicks] +*** Support $display with non-format arguments, #467. [Jamey Hicks] -**** Add VerilatedScopeNameMap for introspection, bug966. [Todd Strader] +**** Add VerilatedScopeNameMap for introspection, #966. [Todd Strader] -**** Ignore %l in $display, bug983. [Todd Strader] +**** Ignore %l in $display, #983. [Todd Strader] -**** Fix very long module names, bug937. [Todd Strader] +**** Fix very long module names, #937. [Todd Strader] -**** Fix internal error on dotted refs into generates, bug958. [Jie Xu] +**** Fix internal error on dotted refs into generates, #958. [Jie Xu] -**** Fix structure parameter constant propagation, bug968. [Todd Strader] +**** Fix structure parameter constant propagation, #968. [Todd Strader] -**** Fix enum constant propagation, bug970. [Todd Strader] +**** Fix enum constant propagation, #970. [Todd Strader] -**** Fix mis-optimizing public DPI functions, bug963. [Wei Song] +**** Fix mis-optimizing public DPI functions, #963. [Wei Song] **** Fix package:scope.scope variable references. -**** Fix $fwrite to constant stderr/stdout, bug961. [Wei Song] +**** Fix $fwrite to constant stderr/stdout, #961. [Wei Song] -**** Fix struct.enum.name method calls, bug855. [Jonathon Donaldson] +**** Fix struct.enum.name method calls, #855. [Jonathon Donaldson] -**** Fix dot indexing into arrayed inferfaces, bug978. [Johan Bjork] +**** Fix dot indexing into arrayed inferfaces, #978. [Johan Bjork] -**** Fix crash in commandArgsPlusMatch, bug987. [Jamie Iles] +**** Fix crash in commandArgsPlusMatch, #987. [Jamie Iles] -**** Fix error message on missing interface, bug985. [Todd Strader] +**** Fix error message on missing interface, #985. [Todd Strader] * Verilator 3.876 2015-08-12 -*** Add tracing_on, etc to vlt files, bug932. [Frederic Requin] +*** Add tracing_on, etc to vlt files, #932. [Frederic Requin] -**** Support extraction of enum bits, bug951. [Jonathon Donaldson] +**** Support extraction of enum bits, #951. [Jonathon Donaldson] -**** Fix MinGW compiler error, bug927, bug929. [Hans Tichelaar] +**** Fix MinGW compiler error, #927, #929. [Hans Tichelaar] -**** Fix .c files to be treated as .cpp, bug930. [Jonathon Donaldson] +**** Fix .c files to be treated as .cpp, #930. [Jonathon Donaldson] -**** Fix string-to-int space conversion, bug931. [Fabrizio Ferrandi] +**** Fix string-to-int space conversion, #931. [Fabrizio Ferrandi] **** Fix dpi imports inside generates. [Michael Tresidder] -**** Fix rounding in trace $timescale, bug946. [Frederic Requin] +**** Fix rounding in trace $timescale, #946. [Frederic Requin] -**** Fix $fopen with SV string, bug947. [Sven Stucki] +**** Fix $fopen with SV string, #947. [Sven Stucki] -**** Fix hashed error with typedef inside block, bug948. [Sven Stucki] +**** Fix hashed error with typedef inside block, #948. [Sven Stucki] -**** Fix makefile with --coverage, bug953. [Eivind Liland] +**** Fix makefile with --coverage, #953. [Eivind Liland] -**** Fix coverage documentation, bug954. [Thomas J Whatson] +**** Fix coverage documentation, #954. [Thomas J Whatson] -**** Fix parameters with function parameter arguments, bug952. [Jie Xu] +**** Fix parameters with function parameter arguments, #952. [Jie Xu] -**** Fix size casts as second argument of cast item, bug950. [Jonathon Donaldson] +**** Fix size casts as second argument of cast item, #950. [Jonathon Donaldson] * Verilator 3.874 2015-06-06 -*** Add pkg-config .pc file, bug919. [Stefan Wallentowitz] +*** Add pkg-config .pc file, #919. [Stefan Wallentowitz] -**** Fix installing missing manpages, bug908. [Ahmed El-Mahmoudy] +**** Fix installing missing manpages, #908. [Ahmed El-Mahmoudy] -**** Fix sign extension in large localparams, bug910. [Mike Thyer] +**** Fix sign extension in large localparams, #910. [Mike Thyer] -**** Fix core dump in sync-async warnings, bug911. [Sebastian Dressler] +**** Fix core dump in sync-async warnings, #911. [Sebastian Dressler] -**** Fix truncation warning with -pins-bv, bug912. [Alfonso Martinez] +**** Fix truncation warning with -pins-bv, #912. [Alfonso Martinez] -**** Fix Cygwin uint32 compile, bug914. [Matthew Barr] +**** Fix Cygwin uint32 compile, #914. [Matthew Barr] -**** Fix preprocessing stringified newline escapes, bug915. [Anton Rapp] +**** Fix preprocessing stringified newline escapes, #915. [Anton Rapp] -**** Fix part-select in constant function, bug916. [Andrew Bardsley] +**** Fix part-select in constant function, #916. [Andrew Bardsley] -**** Fix width extension on mis-width ports, bug918. [Patrick Maupin] +**** Fix width extension on mis-width ports, #918. [Patrick Maupin] -**** Fix width propagation on sized casts, bug925. [Jonathon Donaldson] +**** Fix width propagation on sized casts, #925. [Jonathon Donaldson] -**** Fix MSVC++ compiler error, bug927. [Hans Tichelaar] +**** Fix MSVC++ compiler error, #927. [Hans Tichelaar] * Verilator 3.872 2015-04-05 -*** Add VerilatedVcdFile to allow real-time waveforms, bug890. [HyungKi Jeong] +*** Add VerilatedVcdFile to allow real-time waveforms, #890. [HyungKi Jeong] -*** Add --clk and related optimizations, msg1533. [Jie Xu] +*** Add --clk and related optimizations, #1840. [Jie Xu] *** Fix order of C style arrays. [Duraid Madina] -**** Add --dump-treei-, bug894. [Jie Xu] +**** Add --dump-treei-, #894. [Jie Xu] -**** Fix comma-instantiations with parameters, bug884. [Franck Jullien] +**** Fix comma-instantiations with parameters, #884. [Franck Jullien] -**** Fix SystemC arrayed bit vectors, bug886. [David Poole] +**** Fix SystemC arrayed bit vectors, #886. [David Poole] -**** Fix compile error on MinGW, bug887. [HyungKi Jeong] +**** Fix compile error on MinGW, #887. [HyungKi Jeong] * Verilator 3.870 2015-02-12 -**** Suppress COMBDLY when inside always_latch, bug864. [Iztok Jeras] +**** Suppress COMBDLY when inside always_latch, #864. [Iztok Jeras] -**** Support cast operator with expression size, bug865. [Iztok Jeras] +**** Support cast operator with expression size, #865. [Iztok Jeras] -**** Add warning on slice selection out of bounds, bug875. [Cong Van Nguyen]. +**** Add warning on slice selection out of bounds, #875. [Cong Van Nguyen]. -**** Fix member select error broke in 3.868, bug867. [Iztok Jeras] +**** Fix member select error broke in 3.868, #867. [Iztok Jeras] -**** Fix $sccanf from string, bug866. [David Pierce] +**** Fix $sccanf from string, #866. [David Pierce] -**** Fix VM_PARALLEL_BUILDS broke in 3.868, bug870. [Hiroki Honda] +**** Fix VM_PARALLEL_BUILDS broke in 3.868, #870. [Hiroki Honda] -**** Fix non-ANSI modport instantiations, bug868. [Kevin Thompson] +**** Fix non-ANSI modport instantiations, #868. [Kevin Thompson] -**** Fix UNOPTFLAT change detect on multidim arrays, bug872. [Andrew Bardsley] +**** Fix UNOPTFLAT change detect on multidim arrays, #872. [Andrew Bardsley] -**** Fix slice connections of arrays to ports, bug880. [Varun Koyyalagunta] +**** Fix slice connections of arrays to ports, #880. [Varun Koyyalagunta] -**** Fix mis-optimizing gate assignments in unopt blocks, bug881. [Mike Thyer] +**** Fix mis-optimizing gate assignments in unopt blocks, #881. [Mike Thyer] -**** Fix sign extension of pattern members, bug882. [Iztok Jeras] +**** Fix sign extension of pattern members, #882. [Iztok Jeras] **** Fix clang compile warnings. @@ -959,152 +959,152 @@ The contributors that suggested a given feature are shown in []. Thanks! ** SystemPerl mode is deprecated and now untested. -*** Support enum.first/name and similar methods, bug460, bug848. +*** Support enum.first/name and similar methods, #460, #848. -*** Add 'string' printing and comparisons, bug746, bug747, etc. +*** Add 'string' printing and comparisons, #746, #747, etc. -*** Inline C functions that are used only once, msg1525. [Jie Xu] +*** Inline C functions that are used only once, #1838. [Jie Xu] -*** Fix tracing SystemC signals with structures, bug858. [Eivind Liland] +*** Fix tracing SystemC signals with structures, #858. [Eivind Liland] Note that SystemC traces will no longer show the signals in the wrapper, they can be seen one level further down. -**** Add --stats-vars, bug851. [Jeremy Bennett] +**** Add --stats-vars, #851. [Jeremy Bennett] -**** Fix bare generates in interfaces, bug789. [Bob Newgard] +**** Fix bare generates in interfaces, #789. [Bob Newgard] -**** Fix underscores in real literals, bug863. [Jonathon Donaldson] +**** Fix underscores in real literals, #863. [Jonathon Donaldson] * Verilator 3.866 2014-11-15 -*** Fix +define+A+B to define A and B to match other simulators, bug847. [Adam Krolnik] +*** Fix +define+A+B to define A and B to match other simulators, #847. [Adam Krolnik] -*** Add optimization of wires from arrayed cells, msg1447. [Jie Xu] +*** Add optimization of wires from arrayed cells, #1831. [Jie Xu] -*** Add optimization of operators between concats, msg1447. [Jie Xu] +*** Add optimization of operators between concats, #1831. [Jie Xu] -*** Add public enums, bug833. [Jonathon Donaldson] +*** Add public enums, #833. [Jonathon Donaldson] -*** Trace_off now operates on cells, bug826. [Lane Brooks] +*** Trace_off now operates on cells, #826. [Lane Brooks] -**** Fix public parameters in unused packages, bug804. [Jonathon Donaldson] +**** Fix public parameters in unused packages, #804. [Jonathon Donaldson] -**** Fix select when partially out-of-bound, bug823. [Cliffort Wolf] +**** Fix select when partially out-of-bound, #823. [Cliffort Wolf] -**** Fix generate unrolling with function call, bug830. [Steven Slatter] +**** Fix generate unrolling with function call, #830. [Steven Slatter] -**** Fix cast-to-size context-determined sizing, bug828. [Geoff Barrett] +**** Fix cast-to-size context-determined sizing, #828. [Geoff Barrett] -**** Fix not tracing modules following primitives, bug837. [Jie Xu] +**** Fix not tracing modules following primitives, #837. [Jie Xu] -**** Fix trace overflow on huge arrays, bug834. [Geoff Barrett] +**** Fix trace overflow on huge arrays, #834. [Geoff Barrett] -**** Fix quoted comment slashes in defines, bug845. [Adam Krolnik] +**** Fix quoted comment slashes in defines, #845. [Adam Krolnik] * Verilator 3.864 2014-09-21 -*** Support power operator with real, bug809. [Jonathon Donaldson] +*** Support power operator with real, #809. [Jonathon Donaldson] **** Improve verilator_profcfunc time attributions. [Jonathon Donaldson] -**** Fix duplicate anonymous structures in $root, bug788. [Bob Newgard] +**** Fix duplicate anonymous structures in $root, #788. [Bob Newgard] -**** Fix mis-optimization of bit-swap in wide signal, bug800. [Jie Xu] +**** Fix mis-optimization of bit-swap in wide signal, #800. [Jie Xu] -**** Fix error when tracing public parameters, bug722. [Jonathon Donaldson] +**** Fix error when tracing public parameters, #722. [Jonathon Donaldson] -**** Fix dpiGetContext in dotted scopes, bug740. [Geoff Barrett] +**** Fix dpiGetContext in dotted scopes, #740. [Geoff Barrett] -**** Fix over-shift structure optimization error, bug803. [Jeff Bush] +**** Fix over-shift structure optimization error, #803. [Jeff Bush] -**** Fix optional parameter keyword in module #(), bug810. [Iztok Jeras] +**** Fix optional parameter keyword in module #(), #810. [Iztok Jeras] -**** Fix $warning/$error multi-argument ordering, bug816. [Jonathon Donaldson] +**** Fix $warning/$error multi-argument ordering, #816. [Jonathon Donaldson] -**** Fix clang warnings, bug818. [Iztok Jeras] +**** Fix clang warnings, #818. [Iztok Jeras] -**** Fix string formats under deep expressions, bug820. [Iztok Jeras] +**** Fix string formats under deep expressions, #820. [Iztok Jeras] * Verilator 3.862 2014-06-10 *** Using command line -Wno-{WARNING} now overrides file-local lint_on. -*** Add -P to suppress `line and blanks with preprocessing, bug781. [Derek Lockhart] +*** Add -P to suppress `line and blanks with preprocessing, #781. [Derek Lockhart] *** Support SV 2012 package import before port list. **** Change SYMRSVDWORD to print as warning rather than error. -**** Fix seg-fault with variable of parameterized interface, bug692. [Jie Xu] +**** Fix seg-fault with variable of parameterized interface, #692. [Jie Xu] -**** Fix false name conflict on cells in generate blocks, bug749. [Igor Lesik] +**** Fix false name conflict on cells in generate blocks, #749. [Igor Lesik] -**** Fix pattern assignment to basic types, bug767. [Jie Xu] +**** Fix pattern assignment to basic types, #767. [Jie Xu] -**** Fix pattern assignment to conditionals, bug769. [Jie Xu] +**** Fix pattern assignment to conditionals, #769. [Jie Xu] -**** Fix shift corner-cases, bug765, bug766, bug768, bug772, bug774, bug776. [Clifford Wolf] +**** Fix shift corner-cases, #765, #766, #768, #772, #774, #776. [Clifford Wolf] -**** Fix C compiler interpreting signing, bug773. [Clifford Wolf] +**** Fix C compiler interpreting signing, #773. [Clifford Wolf] -**** Fix late constant division by zero giving X error, bug775. [Clifford Wolf] +**** Fix late constant division by zero giving X error, #775. [Clifford Wolf] **** Fix gate primitives with arrays and non-arrayed pins. -**** Fix DETECTARRAY error on packed arrays, bug770. [Jie Xu] +**** Fix DETECTARRAY error on packed arrays, #770. [Jie Xu] **** Fix ENDLABEL warnings on escaped identifiers. -**** Fix string corruption, bug780. [Derek Lockhart] +**** Fix string corruption, #780. [Derek Lockhart] * Verilator 3.860 2014-05-11 ** PSL is no longer supported, please use System Verilog assertions. -** Support '{} assignment pattern on arrays, bug355. +** Support '{} assignment pattern on arrays, #355. -** Support streaming operators, bug649. [Glen Gibb] +** Support streaming operators, #649. [Glen Gibb] -** Fix expression problems with -Wno-WIDTH, bug729, bug736, bug737, bug759. +** Fix expression problems with -Wno-WIDTH, #729, #736, #737, #759. Where WIDTH warnings were ignored this might result in different warning messages and results, though it should better match the spec. [Clifford Wolf] *** Add --no-trace-params. -*** Add assertions on 'unique if', bug725. [Jeff Bush] +*** Add assertions on 'unique if', #725. [Jeff Bush] *** Add PINCONNECTEMPTY warning. [Holger Waechtler] -*** Support parameter arrays, bug683. [Jeremy Bennett] +*** Support parameter arrays, #683. [Jeremy Bennett] -*** Fix begin_keywords "1800+VAMS", msg1211. +*** Fix begin_keywords "1800+VAMS", #1806. -**** Documentation fixes, bug723. [Glen Gibb] +**** Documentation fixes, #723. [Glen Gibb] -**** Support {} in always sensitivity lists, bug745. [Igor Lesik] +**** Support {} in always sensitivity lists, #745. [Igor Lesik] **** Fix tracing of package variables and real arrays. -**** Fix tracing of packed arrays without --trace-structs, bug742. [Jie Xu] +**** Fix tracing of packed arrays without --trace-structs, #742. [Jie Xu] -**** Fix missing coverage line on else-if, bug727. [Sharad Bagri] +**** Fix missing coverage line on else-if, #727. [Sharad Bagri] **** Fix modport function import not-found error. -**** Fix power operator calculation, bug730, bug735. [Clifford Wolf] +**** Fix power operator calculation, #730, #735. [Clifford Wolf] -**** Fix reporting struct members as reserved words, bug741. [Chris Randall] +**** Fix reporting struct members as reserved words, #741. [Chris Randall] -**** Fix change detection error on unions, bug758. [Jie Xu] +**** Fix change detection error on unions, #758. [Jie Xu] -**** Fix -Wno-UNOPTFLAT change detection with 64-bits, bug762. [Clifford Wolf] +**** Fix -Wno-UNOPTFLAT change detection with 64-bits, #762. [Clifford Wolf] -**** Fix shift-right optimization, bug763. [Clifford Wolf] +**** Fix shift-right optimization, #763. [Clifford Wolf] **** Fix Mac OS-X test issues. [Holger Waechtler] @@ -1113,130 +1113,130 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 3.856 2014-03-11 -*** Support case inside, bug708. [Jan Egil Ruud] +*** Support case inside, #708. [Jan Egil Ruud] -*** Add parameters into trace files, bug706. [Alex Solomatnikov] +*** Add parameters into trace files, #706. [Alex Solomatnikov] -**** Fix parsing "#0 'b0", bug256. +**** Fix parsing "#0 'b0", #256. **** Fix array bound checks on real variables. -**** Fix --skip-identical mis-detecting on OS-X, bug707. +**** Fix --skip-identical mis-detecting on OS-X, #707. -**** Fix missing VL_SHIFTRS_IQI with WIDTH warning, bug714. [Fabrizio Ferrandi] +**** Fix missing VL_SHIFTRS_IQI with WIDTH warning, #714. [Fabrizio Ferrandi] -**** Fix signed shift right optimization, bug715. [Fabrizio Ferrandi] +**** Fix signed shift right optimization, #715. [Fabrizio Ferrandi] -**** Fix internal error on "input x =" syntax error, bug716. [Lane Brooks] +**** Fix internal error on "input x =" syntax error, #716. [Lane Brooks] -**** Fix slice extraction from packed array, bug717. [Jan Egil Ruud] +**** Fix slice extraction from packed array, #717. [Jan Egil Ruud] -**** Fix inside statement EQWILD error, bug718. [Jan Egil Ruud] +**** Fix inside statement EQWILD error, #718. [Jan Egil Ruud] * Verilator 3.855 2014-01-18 -*** Support modport import, bug696. [Jeremy Bennett] +*** Support modport import, #696. [Jeremy Bennett] -*** Add --trace-structs to show struct names, bug673. [Chris Randall] +*** Add --trace-structs to show struct names, #673. [Chris Randall] -**** Fix tracing of packed structs, bug705. [Jie Xu] +**** Fix tracing of packed structs, #705. [Jie Xu] -**** Fix --lint-only with MinGW, msg1283. [HyungKi Jeong] +**** Fix --lint-only with MinGW, #1813. [HyungKi Jeong] **** Fix some delayed assignments of typedefed unpacked arrays. -**** Fix wire declarations with size and not range, bug466. [Alex Solomatnikov] +**** Fix wire declarations with size and not range, #466. [Alex Solomatnikov] -**** Fix parameter pin vs. normal pin error, bug704. [Alex Solomatnikov] +**** Fix parameter pin vs. normal pin error, #704. [Alex Solomatnikov] * Verilator 3.854 2013-11-26 *** Add UNPACKED warning to convert unpacked structs. [Jeremy Bennett] -*** Add --compiler clang to work around compiler bug, bug694. [Stefan Ludwig] +*** Add --compiler clang to work around compiler bug, #694. [Stefan Ludwig] -**** Support vpi_get of vpiSuppressVal, bug687. [Varun Koyyalagunta] +**** Support vpi_get of vpiSuppressVal, #687. [Varun Koyyalagunta] -**** Support vpi_get_time, bug688. [Varun Koyyalagunta] +**** Support vpi_get_time, #688. [Varun Koyyalagunta] -**** Fix evaluation of chained parameter functions, bug684. [Ted Campbell] +**** Fix evaluation of chained parameter functions, #684. [Ted Campbell] **** Fix enum value extension of '1. -**** Fix multiple VPI variable callbacks, bug679. [Rich Porter] +**** Fix multiple VPI variable callbacks, #679. [Rich Porter] -**** Fix vpi_get of vpiSize, bug680. [Rich Porter] +**** Fix vpi_get of vpiSize, #680. [Rich Porter] -**** Fix vpi_remove_cb inside callback, bug689. [Varun Koyyalagunta] +**** Fix vpi_remove_cb inside callback, #689. [Varun Koyyalagunta] -**** Fix crash with coverage of structures, bug691. [Eivind Liland] +**** Fix crash with coverage of structures, #691. [Eivind Liland] -**** Fix array assignment from const var, bug693. [Jie Xu] +**** Fix array assignment from const var, #693. [Jie Xu] * Verilator 3.853 2013-09-30 -**** Add --no-order-clock-delay to work around bug613. [Charlie Brej] +**** Add --no-order-clock-delay to work around #613. [Charlie Brej] * Verilator 3.852 2013-09-29 *** Support named function and task arguments. [Chris Randall] -*** Report SELRANGE warning for non-generate if, bug675. [Roland Kruse] +*** Report SELRANGE warning for non-generate if, #675. [Roland Kruse] -**** Fix ordering of $fgetc, msg1229. [Frederic Requin] +**** Fix ordering of $fgetc, #1808. [Frederic Requin] **** Fix --output-split-cfunc to count internal functions. [Chris Randall] -**** Fix crash on 32-bit Ubuntu, bug670. [Mark Jackson Pulver] +**** Fix crash on 32-bit Ubuntu, #670. [Mark Jackson Pulver] * Verilator 3.851 2013-08-15 -*** Fix ordering of clock enables with delayed assigns, bug613. [Jeremy Bennett] +*** Fix ordering of clock enables with delayed assigns, #613. [Jeremy Bennett] -*** Fix vpi_iterate on memory words, bug655. [Rich Porter] +*** Fix vpi_iterate on memory words, #655. [Rich Porter] -**** Fix final duplicate declarations when non-inlined, bug661. [Charlie Brej] +**** Fix final duplicate declarations when non-inlined, #661. [Charlie Brej] -**** Fix interface ports with comma lists, msg1058. [Ed Lander] +**** Fix interface ports with comma lists, #1779. [Ed Lander] **** Fix parameter real conversion from integer. -**** Fix clang warnings, bug668. [Yutetsu Takatsukasa] +**** Fix clang warnings, #668. [Yutetsu Takatsukasa] * Verilator 3.850 2013-06-02 -** Support interfaces and modports, bug102. [Byron Bradley, Jeremy Bennett] +** Support interfaces and modports, #102. [Byron Bradley, Jeremy Bennett] -*** Duplicate clock gate optimization on by default, bug621. +*** Duplicate clock gate optimization on by default, #621. -**** Fix arrayed input compile error, bug645. [Krzysztof Jankowski] +**** Fix arrayed input compile error, #645. [Krzysztof Jankowski] -**** Fix GCC version runtime changes, bug651. [Jeremy Bennett] +**** Fix GCC version runtime changes, #651. [Jeremy Bennett] -**** Fix packed array select internal error, bug652. [Krzysztof Jankowski] +**** Fix packed array select internal error, #652. [Krzysztof Jankowski] * Verilator 3.847 2013-05-11 *** Add ALWCOMBORDER warning. [KC Buckenmaier] -*** Add --pins-sc-uint and --pins-sc-biguint, bug638. [Alex Hornung] +*** Add --pins-sc-uint and --pins-sc-biguint, #638. [Alex Hornung] **** Support "signal[vec]++". -**** Fix simulation error when inputs and MULTIDRIVEN, bug634. [Ted Campbell] +**** Fix simulation error when inputs and MULTIDRIVEN, #634. [Ted Campbell] -**** Fix module resolution with __, bug631. [Jason McMullan] +**** Fix module resolution with __, #631. [Jason McMullan] -**** Fix packed array non-zero right index select crash, bug642. [Krzysztof Jankowski] +**** Fix packed array non-zero right index select crash, #642. [Krzysztof Jankowski] -**** Fix nested union crash, bug643. [Krzysztof Jankowski] +**** Fix nested union crash, #643. [Krzysztof Jankowski] * Verilator 3.846 2013-03-09 @@ -1244,203 +1244,203 @@ The contributors that suggested a given feature are shown in []. Thanks! ** IEEE 1800-2012 is now the default language. This adds 4 new keywords and updates the svdpi.h and vpi_user.h header files. -*** Add --report-unoptflat, bug611. [Jeremy Bennett] +*** Add --report-unoptflat, #611. [Jeremy Bennett] -*** Add duplicate clock gate optimization, msg980. [Varun Koyyalagunta] +*** Add duplicate clock gate optimization, #1772. [Varun Koyyalagunta] Disabled unless -OD or -O3 used, please try it as may get some significant speedups. *** Fix wrong dot resolution under inlining. [Art Stamness] -**** Support pattern assignment features, bug616, bug617, bug618. [Ed Lander] +**** Support pattern assignment features, #616, #617, #618. [Ed Lander] -**** Support bind in $unit, bug602. [Ed Lander] +**** Support bind in $unit, #602. [Ed Lander] -**** Support '() sized casts, bug628. [Ed Lander] +**** Support '() sized casts, #628. [Ed Lander] -**** Fix DETECTARRAY on packed structures, bug610. [Jeremy Bennett] +**** Fix DETECTARRAY on packed structures, #610. [Jeremy Bennett] -**** Fix LITENDIAN on unpacked structures, bug614. [Wai Sum Mong] +**** Fix LITENDIAN on unpacked structures, #614. [Wai Sum Mong] -**** Fix 32-bit OS VPI scan issue, bug615. [Jeremy Bennett, Rich Porter] +**** Fix 32-bit OS VPI scan issue, #615. [Jeremy Bennett, Rich Porter] -**** Fix opening a VerilatedVcdC file multiple times, msg1021. [Frederic Requin] +**** Fix opening a VerilatedVcdC file multiple times, #1774. [Frederic Requin] -**** Fix UNOPTFLAT circular array bounds crossing, bug630. [Jie Xu] +**** Fix UNOPTFLAT circular array bounds crossing, #630. [Jie Xu] -* Verilator 3.845 2013/02/04 +* Verilator 3.845 2013-02-04 -*** Fix nested packed arrays and struct, bug600. [Jeremy Bennett] +*** Fix nested packed arrays and struct, #600. [Jeremy Bennett] Packed arrays are now represented as a single linear vector in Verilated models. This may affect packed arrays that are public or accessed via the VPI. -*** Support wires with data types, bug608. [Ed Lander] +*** Support wires with data types, #608. [Ed Lander] -*** Support bind, to module names only, bug602. [Ed Lander] +*** Support bind, to module names only, #602. [Ed Lander] -*** Support VPI product info, warning calls, etc, bug588. [Rick Porter] +*** Support VPI product info, warning calls, etc, #588. [Rick Porter] -*** Support $left, $right and related functions, bug448. [Iztok Jeras] +*** Support $left, $right and related functions, #448. [Iztok Jeras] *** Support inside expressions. *** Define SYSTEMVERILOG, SV_COV_START and other IEEE mandated predefines. -**** Fix pin width mismatch error, bug595. [Alex Solomatnikov] +**** Fix pin width mismatch error, #595. [Alex Solomatnikov] -**** Fix implicit one bit parameter selection, bug603. [Jeremy Bennett] +**** Fix implicit one bit parameter selection, #603. [Jeremy Bennett] -**** Fix signed/unsigned parameter misconversion, bug606. [Jeremy Bennett] +**** Fix signed/unsigned parameter misconversion, #606. [Jeremy Bennett] -**** Fix segfault on multidimensional dotted arrays, bug607. [Jie Xu] +**** Fix segfault on multidimensional dotted arrays, #607. [Jie Xu] -**** Fix per-bit array output connection error, bug414. [Jan Egil Ruud] +**** Fix per-bit array output connection error, #414. [Jan Egil Ruud] **** Fix package logic var compile error. **** Fix enums with X values. -* Verilator 3.844 2013/01/09 +* Verilator 3.844 2013-01-09 -*** Support "unsigned int" DPI import functions, msg966. [Alex Lee] +*** Support "unsigned int" DPI import functions, #1770. [Alex Lee] -*** Fix package resolution of parameters, bug586. [Jeremy Bennett] +*** Fix package resolution of parameters, #586. [Jeremy Bennett] -**** Fix non-integer vpi_get_value, bug587. [Rich Porter] +**** Fix non-integer vpi_get_value, #587. [Rich Porter] -**** Fix task inlining under $display and case, bug589, bug598. [Holger Waechtler] +**** Fix task inlining under $display and case, #589, #598. [Holger Waechtler] -**** Fix package import of non-localparam parameter, bug474, bug591. [Jeremy Bennett] +**** Fix package import of non-localparam parameter, #474, #591. [Jeremy Bennett] -**** Fix package import of package imports, partial bug592. [Jeremy Bennett] +**** Fix package import of package imports, partial #592. [Jeremy Bennett] -**** Fix package import preventing local var, bug599. [Jeremy Bennett] +**** Fix package import preventing local var, #599. [Jeremy Bennett] -**** Fix array extraction of implicit vars, bug601. [Joe Eiler] +**** Fix array extraction of implicit vars, #601. [Joe Eiler] -* Verilator 3.843 2012/12/01 +* Verilator 3.843 2012-12-01 -*** Add +1364-1995ext and similar language options, bug532. [Jeremy Bennett] +*** Add +1364-1995ext and similar language options, #532. [Jeremy Bennett] -**** Fix mis-optimized identical submodule subtract, bug581. [Charlie Brej] +**** Fix mis-optimized identical submodule subtract, #581. [Charlie Brej] -**** Fix crash on dotted references into dead modules, bug583. [Jeremy Bennett] +**** Fix crash on dotted references into dead modules, #583. [Jeremy Bennett] -**** Fix compile issues on MSVCC, bug571, bug577. [Amir Gonnen] +**** Fix compile issues on MSVCC, #571, #577. [Amir Gonnen] -**** Fix --debug overriding preceding --dump-treei, bug580. [Jeremy Bennett] +**** Fix --debug overriding preceding --dump-treei, #580. [Jeremy Bennett] -* Verilator 3.842 2012/11/03 +* Verilator 3.842 2012-11-03 -**** Add -x-initial-edge, bug570. [Jeremy Bennett] +**** Add -x-initial-edge, #570. [Jeremy Bennett] **** Fix parameter pins interspersed with cells broke in 3.840. [Bernard Deadman] **** Fix large shift error on large shift constants. [David Welch] -**** Fix $display mangling on GCC 4.7 and speed up, msg927, bug373, bug574. [R Diez] +**** Fix $display mangling on GCC 4.7 and speed up, #1765, #373, #574. [R Diez] -**** Fix array of struct references giving false error, bug566. [Julius Baxter] +**** Fix array of struct references giving false error, #566. [Julius Baxter] -**** Fix missing var access functions when no DPI, bug572. [Amir Gonnen] +**** Fix missing var access functions when no DPI, #572. [Amir Gonnen] -**** Fix name collision on unnamed blocks, bug567. [Chandan Egbert] +**** Fix name collision on unnamed blocks, #567. [Chandan Egbert] -**** Fix name collision on task inputs, bug569. [Chandan Egbert] +**** Fix name collision on task inputs, #569. [Chandan Egbert] -* Verilator 3.841 2012/09/03 +* Verilator 3.841 2012-09-03 *** Add --savable to support model save/restore. [Jeremy Bennett] -*** Support '{} assignment pattern on structures, part of bug355. +*** Support '{} assignment pattern on structures, part of #355. -**** Fix double-deep parameter cell WIDTHs, bug541. [Hiroki Honda] +**** Fix double-deep parameter cell WIDTHs, #541. [Hiroki Honda] -**** Fix imports under multiple instantiated cells, bug542. [Alex Solomatnikov] +**** Fix imports under multiple instantiated cells, #542. [Alex Solomatnikov] -**** Fix defparam in generate broke in 3.840, bug543. [Alex Solomatnikov] +**** Fix defparam in generate broke in 3.840, #543. [Alex Solomatnikov] -**** Fix duplicate begin error broke in 3.840, bug548. [Alex Solomatnikov] +**** Fix duplicate begin error broke in 3.840, #548. [Alex Solomatnikov] -**** Fix triangle symbol resolution error broke in 3.840, bug550. [Ted Campbell] +**** Fix triangle symbol resolution error broke in 3.840, #550. [Ted Campbell] -* Verilator 3.840 2012/07/31 Beta +* Verilator 3.840 2012-07-31 Beta ** Rewrote tristate handling; supports tri0, tri1, tristate bit selects, - concatenates and pullup/pulldowns, bug395, bug56, bug54, bug51. + concatenates and pullup/pulldowns, #395, #56, #54, #51. [Alex Solomatnikov, Lane Brooks, et al] -** Support packed structures and unions, bug181. +** Support packed structures and unions, #181. Note this was a major internal change that may lead to some instability. -*** Support tri0 and tri1, bug462. [Alex Solomatnikov] +*** Support tri0 and tri1, #462. [Alex Solomatnikov] -*** Support nmos and pmos, bug488. [Alex Solomatnikov] +*** Support nmos and pmos, #488. [Alex Solomatnikov] -*** Add INITIALDLY warning on initial assignments, bug478. [Alex Solomatnikov] +*** Add INITIALDLY warning on initial assignments, #478. [Alex Solomatnikov] *** Add PINMISSING and PINNOCONNECT lint checks. *** Add --converge-limit option. -*** Fix generate operators not short circuiting, bug413. [by Jeremy Bennett] +*** Fix generate operators not short circuiting, #413. [by Jeremy Bennett] -*** Fix parameters not supported in constant functions, bug474. [Alex Solomatnikov] +*** Fix parameters not supported in constant functions, #474. [Alex Solomatnikov] -**** Fix duplicate warnings/errors, bug516. [Alex Solomatnikov] +**** Fix duplicate warnings/errors, #516. [Alex Solomatnikov] -**** Fix signed extending biops with WIDTH warning off, bug511. [Junji Hashimoto] +**** Fix signed extending biops with WIDTH warning off, #511. [Junji Hashimoto] -**** Fix ITOD internal error on real conversions, bug491. [Alex Solomatnikov] +**** Fix ITOD internal error on real conversions, #491. [Alex Solomatnikov] -**** Fix input and real loosing real data type, bug501. [Alex Solomatnikov] +**** Fix input and real loosing real data type, #501. [Alex Solomatnikov] -**** Fix imports causing symbol table error, bug490. [Alex Solomatnikov] +**** Fix imports causing symbol table error, #490. [Alex Solomatnikov] -**** Fix newlines in radix values, bug507. [Walter Lavino] +**** Fix newlines in radix values, #507. [Walter Lavino] -**** Fix loop error message to report line, bug513. [Jeremy Bennett] +**** Fix loop error message to report line, #513. [Jeremy Bennett] **** Fix false UNUSED warning on file system calls. -**** Fix GCC 4.7.0 compile warnings, bug530. [Jeremy Bennett] +**** Fix GCC 4.7.0 compile warnings, #530. [Jeremy Bennett] **** Fix svdpi.h compile error on Apple OS. -**** Fix compile error under git submodules, bug534. [Aurelien Francillon] +**** Fix compile error under git submodules, #534. [Aurelien Francillon] -* Verilator 3.833 2012/04/15 +* Verilator 3.833 2012-04-15 -*** Support += and -= in standard for loops, bug463. [Alex Solomatnikov] +*** Support += and -= in standard for loops, #463. [Alex Solomatnikov] -*** Fix processing unused parametrized modules, bug469, bug470. [Alex Solomatnikov] +*** Fix processing unused parametrized modules, #469, #470. [Alex Solomatnikov] -**** Add SELRANGE as warning instead of error, bug477. [Alex Solomatnikov] +**** Add SELRANGE as warning instead of error, #477. [Alex Solomatnikov] -**** Add readme.pdf and internal.pdf and doxygen, bug483. [by Jeremy Bennett] +**** Add readme.pdf and internal.pdf and doxygen, #483. [by Jeremy Bennett] -**** Fix change detections on arrays, bug364. [John Stevenson, Alex Solomatnikov] +**** Fix change detections on arrays, #364. [John Stevenson, Alex Solomatnikov] -**** Fix signed array warning, bug456. [Alex Solomatnikov] +**** Fix signed array warning, #456. [Alex Solomatnikov] -**** Fix genvar and begin under generate, bug461. [Alex Solomatnikov] +**** Fix genvar and begin under generate, #461. [Alex Solomatnikov] -**** Fix real constant parameter functions, bug475. [Alex Solomatnikov] +**** Fix real constant parameter functions, #475. [Alex Solomatnikov] -**** Fix and document --gdb option, bug454. [Jeremy Bennett] +**** Fix and document --gdb option, #454. [Jeremy Bennett] **** Fix OpenSolaris compile error. [Sanjay Singh] -* Verilator 3.832 2012/03/07 +* Verilator 3.832 2012-03-07 *** Fix memory delayed assignments from multiple clock domains. [Andrew Ling] @@ -1448,22 +1448,22 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Report MULTIDRIVEN on memories set in multiple clock domains. -*** Report ENDLABEL on mismatching end labels, bug450. [Iztok Jeras] +*** Report ENDLABEL on mismatching end labels, #450. [Iztok Jeras] -**** Fix expansion of back-slashed escaped macros, bug441. [Alberto Del Rio] +**** Fix expansion of back-slashed escaped macros, #441. [Alberto Del Rio] **** Fix inheriting real and signed type across untyped parameters. -**** Fix core dump with over 100 deep UNOPTFLAT, bug432. [Joe Eiler] +**** Fix core dump with over 100 deep UNOPTFLAT, #432. [Joe Eiler] **** Fix false command not found warning in makefiles. [Ruben Diez] **** Fix hang when functions inside begin block. [David Welch] -**** Fix hang on recursive substitution `defines, bug443. [Alex Solomatnikov] +**** Fix hang on recursive substitution `defines, #443. [Alex Solomatnikov] -* Verilator 3.831 2012/01/20 +* Verilator 3.831 2012-01-20 ** Support SystemC 2.3.0 prerelease. This requires setting the new SYSTEMC_INCLUDE and SYSTEMC_LIBDIR variables in place of now @@ -1473,22 +1473,22 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Support "generate for (genvar i=0; ...". [David Kravitz] -**** Fix dpi exports with > 32 bit but < 64 bit args, bug423. [Chandan Egbert] +**** Fix dpi exports with > 32 bit but < 64 bit args, #423. [Chandan Egbert] -**** Fix array of instantiations with sub-range output, bug414. [Jeremy Bennett] +**** Fix array of instantiations with sub-range output, #414. [Jeremy Bennett] **** Fix BLKSEQ warnings on variables declared inside always. [Ruben Diez] -* Verilator 3.830 2011/11/27 +* Verilator 3.830 2011-11-27 ** With "--language VAMS" support a touch of Verilog AMS. [Holger Waechtler] -*** Add sc_bv attribute to force bit vectors, bug402. [by Stefan Wallentowitz] +*** Add sc_bv attribute to force bit vectors, #402. [by Stefan Wallentowitz] **** Search for user -y paths before default current directory. [Ruben Diez] -**** Support constants in sensitivity lists, bug412. [Jeremy Bennett] +**** Support constants in sensitivity lists, #412. [Jeremy Bennett] **** Support $system. [Ruben Diez] @@ -1496,23 +1496,23 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Indicate 'exiting due to errors' if errors, not warnings. [Ruben Diez] -**** Fix bad result with if-else-return optimization, bug420. [Alex Solomatnikov] +**** Fix bad result with if-else-return optimization, #420. [Alex Solomatnikov] -**** Fix reporting not found modules if generate-off, bug403. [Jeremy Bennett] +**** Fix reporting not found modules if generate-off, #403. [Jeremy Bennett] **** Fix $display with %d following %g. [Holger Waechtler] -* Verilator 3.824 2011/10/25 +* Verilator 3.824 2011-10-25 -*** Fix "always @ (* )", bug403, bug404. [Walter Lavino] +*** Fix "always @ (* )", #403, #404. [Walter Lavino] *** Add ASSIGNIN as suppressable error. [Jeremy Bennett] -**** Fix 3.823 constructor core dump on Debian, bug401. [Ahmed El-Mahmoudy] +**** Fix 3.823 constructor core dump on Debian, #401. [Ahmed El-Mahmoudy] -* Verilator 3.823 2011/10/20 +* Verilator 3.823 2011-10-20 *** Support $ceil, $floor, etc. [Alex Solomatnikov] @@ -1522,25 +1522,25 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Fix UNDRIVEN warnings inside DPI import functions. [Ruben Diez] -*** Fix --help output to go to stderr, not stdout, bug397. [Ruben Diez] +*** Fix --help output to go to stderr, not stdout, #397. [Ruben Diez] -**** Fix DPI import output of 64 bits, bug398. [Mike Denio] +**** Fix DPI import output of 64 bits, #398. [Mike Denio] **** Fix DPI import false BLKSEQ warnings. [Alex Solomatnikov] -**** Fix MSVC compile warning with trunc/round, bug394. [Amir Gonnen] +**** Fix MSVC compile warning with trunc/round, #394. [Amir Gonnen] -**** Fix autoconf and Makefile warnings, bug396. [Ruben Diez] +**** Fix autoconf and Makefile warnings, #396. [Ruben Diez] -* Verilator 3.821 2011/09/14 +* Verilator 3.821 2011-09-14 -**** Fix PowerPC runtime error, bug288. [Ahmed El-Mahmoudy] +**** Fix PowerPC runtime error, #288. [Ahmed El-Mahmoudy] -**** Fix internal error on integer casts, bug374. [Chandan Egbert] +**** Fix internal error on integer casts, #374. [Chandan Egbert] -* Verilator 3.820 2011/07/28 +* Verilator 3.820 2011-07-28 ** Support 'real' numbers and related functions. @@ -1553,54 +1553,54 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support coverage in -cc and -sc output modes. [John Li] Note this requires SystemPerl 1.338 or newer. -**** Fix vpi_register_cb using bad s_cb_data, bug370. [by Thomas Watts] +**** Fix vpi_register_cb using bad s_cb_data, #370. [by Thomas Watts] -**** Fix $display missing leading zeros in %0d, bug367. [Alex Solomatnikov] +**** Fix $display missing leading zeros in %0d, #367. [Alex Solomatnikov] **** Use 'vluint64_t' for SystemC instead of (same sized) 'uint64' for MSVC++. -* Verilator 3.813 2011/06/28 +* Verilator 3.813 2011-06-28 *** Support bit vectors > 64 bits wide in DPI import and exports. -*** Fix out of memory on slice syntax error, bug354. [Alex Solomatnikov] +*** Fix out of memory on slice syntax error, #354. [Alex Solomatnikov] -**** Fix error on enum references to other packages, bug339. [Alex Solomatnikov] +**** Fix error on enum references to other packages, #339. [Alex Solomatnikov] -**** Fix DPI undeclared svBitVecVal compile error, bug346. [Chandan Egbert] +**** Fix DPI undeclared svBitVecVal compile error, #346. [Chandan Egbert] -**** Fix DPI bit vector compile errors, bug347, bug359. [Chandan Egbert] +**** Fix DPI bit vector compile errors, #347, #359. [Chandan Egbert] **** Fix CDCRSTLOGIC report showing endpoint flops without resets. -**** Fix compiler warnings on SPARC, bug288. [Ahmed El-Mahmoudy] +**** Fix compiler warnings on SPARC, #288. [Ahmed El-Mahmoudy] -* Verilator 3.812 2011/04/06 +* Verilator 3.812 2011-04-06 -*** Add --trace-max-width and --trace-max-array, bug319. [Alex Solomatnikov] +*** Add --trace-max-width and --trace-max-array, #319. [Alex Solomatnikov] *** Add --Wno-fatal to turn off abort on warnings. [by Stefan Wallentowitz] **** Support ${...} and $(...) env vars in .vc files. [by Stefan Wallentowitz] -**** Support $bits(data_type), bug327. [Alex Solomatnikov] +**** Support $bits(data_type), #327. [Alex Solomatnikov] -**** Support loop unrolling on width mismatches, bug333. [Joe Eiler] +**** Support loop unrolling on width mismatches, #333. [Joe Eiler] -**** Support simple cast operators, bug335. [Alex Solomatnikov] +**** Support simple cast operators, #335. [Alex Solomatnikov] **** Accelerate bit-selected inversions. -**** Add error on circular parameter definitions, bug329. [Alex Solomatnikov] +**** Add error on circular parameter definitions, #329. [Alex Solomatnikov] -**** Fix concatenates and vectored bufif1, bug326. [Iztok Jeras] +**** Fix concatenates and vectored bufif1, #326. [Iztok Jeras] -* Verilator 3.811 2011/02/14 +* Verilator 3.811 2011-02-14 -**** Report errors on duplicated or empty pins, bug321. [Christian Leber] +**** Report errors on duplicated or empty pins, #321. [Christian Leber] **** Report error on function call output tied to constant. [Bernard Deadman] @@ -1612,18 +1612,18 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix false BLKSEQ on non-unrolled for loop indexes. [Jeff Winston] -**** Fix block comment not separating identifiers, bug311. [Gene Sullivan] +**** Fix block comment not separating identifiers, #311. [Gene Sullivan] **** Fix warnings to point to lowest net usage, not upper level ports. -**** Fix error on constants connected to outputs, bug323. [Christian Leber] +**** Fix error on constants connected to outputs, #323. [Christian Leber] -* Verilator 3.810 2011/01/03 +* Verilator 3.810 2011-01-03 ** Add limited support for VPI access to public signals, see docs. -*** Add -F option to read relative option files, bug297. [Neil Hamilton] +*** Add -F option to read relative option files, #297. [Neil Hamilton] *** Support ++,--,+= etc as standalone statements. [Alex Solomatnikov] @@ -1653,54 +1653,54 @@ The contributors that suggested a given feature are shown in []. Thanks! *** The VARHIDDEN warning is now disabled by default, use -Wall to enable. -* Verilator 3.805 2010/11/02 +* Verilator 3.805 2010-11-02 -**** Add warning when directory contains spaces, msg378. [Salman Sheikh] +**** Add warning when directory contains spaces, #1705. [Salman Sheikh] -**** Fix wrong filename on include file errors, bug289. [Brad Parker] +**** Fix wrong filename on include file errors, #289. [Brad Parker] -**** Fix segfault on SystemVerilog "output wire foo=0", bug291. [Joshua Wise] +**** Fix segfault on SystemVerilog "output wire foo=0", #291. [Joshua Wise] -**** Fix DPI export name not found, msg369. [Terry Chen] +**** Fix DPI export name not found, #1703. [Terry Chen] -* Verilator 3.804 2010/09/20 +* Verilator 3.804 2010-09-20 -*** Support tracing/coverage of underscore signals, bug280. [by Jason McMullan] +*** Support tracing/coverage of underscore signals, #280. [by Jason McMullan] -**** Fix preprocessor `` of existing base define, bug283. [Usha Priyadharshini] +**** Fix preprocessor `` of existing base define, #283. [Usha Priyadharshini] **** Increase define recursions before error. [Paul Liu] **** On core dump, print debug suggestions. -* Verilator 3.803 2010/07/10 +* Verilator 3.803 2010-07-10 *** Fix preprocessor preservation of newlines across macro substitutions. **** Fix preprocessor stringification of nested macros. -**** Fix some constant parameter functions causing crash, bug253. [Nick Bowler] +**** Fix some constant parameter functions causing crash, #253. [Nick Bowler] **** Fix do {...} while() not requiring final semicolon. -* Verilator 3.802 2010/05/01 +* Verilator 3.802 2010-05-01 *** Support runtime access to public signal names. *** Add /*verilator public_flat_rw*/ for timing-specific public access. -*** Fix word size to match uint64_t on -m64 systems, bug238. [Joe Eiler] +*** Fix word size to match uint64_t on -m64 systems, #238. [Joe Eiler] -**** Improve error handling on slices of arrays, bug226. [by Byron Bradley] +**** Improve error handling on slices of arrays, #226. [by Byron Bradley] **** Report errors when extra underscores used in meta-comments. -**** Fix bit reductions on multi-packed dimensions, bug227. [by Byron Bradley] +**** Fix bit reductions on multi-packed dimensions, #227. [by Byron Bradley] -**** Fix removing $fscanf if assigned to unused var, bug248. [Ashutosh Das] +**** Fix removing $fscanf if assigned to unused var, #248. [Ashutosh Das] **** Fix "make install" with configure outside srcdir. [Stefan Wallentowitz] @@ -1710,10 +1710,10 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix parsing single files > 2GB. [Jeffrey Short] -**** Fix installing data files as non-executable, bug168. [by Ahmed El-Mahmoudy] +**** Fix installing data files as non-executable, #168. [by Ahmed El-Mahmoudy] -* Verilator 3.801 2010/03/17 +* Verilator 3.801 2010-03-17 *** Support "break", "continue", "return". @@ -1721,18 +1721,18 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Skip SystemC tests if not installed. [Iztok Jeras] -**** Fix clock-gates with non-AND complex logic, bug220. [Ashutosh Das] +**** Fix clock-gates with non-AND complex logic, #220. [Ashutosh Das] **** Fix flushing VCD buffers on $stop. [Ashutosh Das] -**** Fix Mac OS-X compile issues, bug217. [Joshua Wise, Trevor Williams] +**** Fix Mac OS-X compile issues, #217. [Joshua Wise, Trevor Williams] -**** Fix make uninstall, bug216. [Iztok Jeras] +**** Fix make uninstall, #216. [Iztok Jeras] **** Fix parametrized defines with empty arguments. -* Verilator 3.800 2010/02/07 +* Verilator 3.800 2010-02-07 Application visible changes: @@ -1754,13 +1754,13 @@ New features: ** Support direct programming interface (DPI) "import" and "export". Includes an extension to map user $system PLI calls to the DPI. -*** Support assignments of multidimensional slices, bug170. [by Byron Bradley] +*** Support assignments of multidimensional slices, #170. [by Byron Bradley] -*** Support multidimensional inputs/outputs, bug171. [by Byron Bradley] +*** Support multidimensional inputs/outputs, #171. [by Byron Bradley] -*** Support "reg [1:0][1:0][1:0]" and "reg x [3][2]", bug176. [Byron Bradley] +*** Support "reg [1:0][1:0][1:0]" and "reg x [3][2]", #176. [Byron Bradley] -*** Support declarations in loop initializers, bug172. [by Byron Bradley] +*** Support declarations in loop initializers, #172. [by Byron Bradley] *** Support $test$plusargs and $value$plusargs, but see the docs! @@ -1781,9 +1781,9 @@ New features: *** Add VARHIDDEN warning when signal name hides module name. -**** Support optional cell parenthesis, bug179. [by Byron Bradley] +**** Support optional cell parenthesis, #179. [by Byron Bradley] -**** Support for loop i++, ++i, i--, --i, bug175. [by Byron Bradley] +**** Support for loop i++, ++i, i--, --i, #175. [by Byron Bradley] **** Support 1800-2009 /*comments*/ in define values. @@ -1795,26 +1795,26 @@ New features: Bug fixes: -**** Fix implicit variable issues, bug196, bug201. [Byron Bradley] +**** Fix implicit variable issues, #196, #201. [Byron Bradley] -**** Fix 'for' variable typing, bug205. [by Byron Bradley] +**** Fix 'for' variable typing, #205. [by Byron Bradley] -**** Fix tracing with --pins-bv 1, bug195. [Michael S] +**** Fix tracing with --pins-bv 1, #195. [Michael S] -**** Fix MSVC++ 2008 compile issues, bug209. [Amir Gonnen] +**** Fix MSVC++ 2008 compile issues, #209. [Amir Gonnen] -**** Fix MinGW compilation, bug184, bug214. [by Shankar Giri, Amir Gonnen] +**** Fix MinGW compilation, #184, #214. [by Shankar Giri, Amir Gonnen] -**** Fix Cygwin 1.7.x compiler error with uint32_t, bug204. [Ivan Djordjevic] +**** Fix Cygwin 1.7.x compiler error with uint32_t, #204. [Ivan Djordjevic] -**** Fix `define argument mis-replacing system task of same name, bug191. +**** Fix `define argument mis-replacing system task of same name, #191. -**** Fix Verilator core dump on wide integer divides, bug178. [Byron Bradley] +**** Fix Verilator core dump on wide integer divides, #178. [Byron Bradley] **** Fix lint_off/lint_on meta comments on same line as warning. -* Verilator 3.720 2009/10/26 +* Verilator 3.720 2009-10-26 ** Support little endian bit vectors ("reg [0:2] x;"). @@ -1828,10 +1828,10 @@ Bug fixes: **** Fix cell port connection to unsized integer causing false width warning. -**** Fix erroring on strings with backslashed newlines, bug168. [Pete Nixon] +**** Fix erroring on strings with backslashed newlines, #168. [Pete Nixon] -* Verilator 3.714 2009/09/18 +* Verilator 3.714 2009-09-18 ** Add --bbox-sys option to blackbox $system calls. @@ -1845,25 +1845,25 @@ Bug fixes: **** Fix preprocessing commas in deep parameterized macros. [Brad Dobbie] -**** Fix tracing escaped dotted identifiers, bug107. +**** Fix tracing escaped dotted identifiers, #107. **** Fix $display with uppercase %M. **** Fix --error-limit option being ignored. -* Verilator 3.713 2009/08/04 +* Verilator 3.713 2009-08-04 ** Support constant function calls for parameters. [many!] -*** Support SystemVerilog "logic", bug101. [by Alex Duller] +*** Support SystemVerilog "logic", #101. [by Alex Duller] -*** Name SYMRSVDWORD error, and allow disabling it, bug103. [Gary Thomas] +*** Name SYMRSVDWORD error, and allow disabling it, #103. [Gary Thomas] -**** Fix escaped preprocessor identifiers, bug106. [Nimrod Gileadi] +**** Fix escaped preprocessor identifiers, #106. [Nimrod Gileadi] -* Verilator 3.712 2009/07/14 +* Verilator 3.712 2009-07-14 ** Patching SystemC is no longer required to trace sc_bvs. @@ -1878,20 +1878,20 @@ Bug fixes: **** Add BLKLOOPINIT error code, and describe --unroll-count. [Jeff Winston] -* Verilator 3.711 2009/06/23 +* Verilator 3.711 2009-06-23 **** Support decimal constants of arbitrary widths. [Mark Marshall] -**** Fix error on case statement with all duplicate items, bug99. [Gary Thomas] +**** Fix error on case statement with all duplicate items, #99. [Gary Thomas] -**** Fix segfault on unrolling for's with bad inits, bug90. [Andreas Olofsson] +**** Fix segfault on unrolling for's with bad inits, #90. [Andreas Olofsson] **** Fix tristates causing "Assigned pin is neither...". [by Lane Brooks] **** Fix compiler errors under Fedora release candidate 11. [Chitlesh Goorah] -* Verilator 3.710 2009/05/19 +* Verilator 3.710 2009-05-19 ** Verilator is now licensed under LGPL v3 and/or Artistic v2.0. @@ -1900,46 +1900,46 @@ Bug fixes: **** The front end parser has been re-factored to enable more SV parsing. Code should parse the same, but minor parsing bugs may pop up. -**** Verilator_includer is no longer installed twice, bug48. [Lane Brooks] +**** Verilator_includer is no longer installed twice, #48. [Lane Brooks] -**** Fix escaped identifiers with '.' causing conflicts, bug83. [J Baxter] +**** Fix escaped identifiers with '.' causing conflicts, #83. [J Baxter] -**** Fix define formal arguments that contain newlines, bug84. [David A] +**** Fix define formal arguments that contain newlines, #84. [David A] -* Verilator 3.703 2009/05/02 +* Verilator 3.703 2009-05-02 -*** Fix $clog2 calculation error with powers-of-2, bug81. [Patricio Kaplan] +*** Fix $clog2 calculation error with powers-of-2, #81. [Patricio Kaplan] -**** Fix error with tasks that have output first, bug78. [Andrea Foletto] +**** Fix error with tasks that have output first, #78. [Andrea Foletto] -**** Fix "cloning" error with -y/--top-module, bug76. [Dimitris Nalbantis] +**** Fix "cloning" error with -y/--top-module, #76. [Dimitris Nalbantis] -**** Fix segfault with error on bad --top-module, bug79. [Dimitris Nalbantis] +**** Fix segfault with error on bad --top-module, #79. [Dimitris Nalbantis] **** Fix "redefining I" error with complex includes. [Duraid Madina] **** Fix GCC 4.3.2 compile warnings. -* Verilator 3.702 2009/03/28 +* Verilator 3.702 2009-03-28 *** Add --pins-bv option to use sc_bv for all ports. [Brian Small] *** Add SYSTEMPERL_INCLUDE envvar to assist RPM builds. [Chitlesh Goorah] -**** Report errors when duplicate labels are used, bug72. [Vasu Kandadi] +**** Report errors when duplicate labels are used, #72. [Vasu Kandadi] **** Fix the SC_MODULE name() to not include __PVT__. [Bob Fredieu] -* Verilator 3.701 2009/02/26 +* Verilator 3.701 2009-02-26 ** Support repeat and forever statements. [Jeremy Bennett] *** Add --debugi- option, for internal debugging. [Dennis Muhlestein] -**** Fix compile issues with GCC 4.3, bug47. [Lane Brooks] +**** Fix compile issues with GCC 4.3, #47. [Lane Brooks] **** Fix VL_RANDom to better randomize bits. [Art Stamness] @@ -1948,7 +1948,7 @@ Bug fixes: **** Fix left associativity for ?: operators. -* Verilator 3.700 2009/01/08 +* Verilator 3.700 2009-01-08 ** Add limited support for tristate inouts. Written by Lane Brooks, under support by Ubixum Inc. This allows common pad ring and @@ -1962,7 +1962,7 @@ Bug fixes: *** Optimize two-level shift and and/or trees, +23% on one test. -*** Support posedge of bit-selected signals, bug45. [Rodney Sinclair] +*** Support posedge of bit-selected signals, #45. [Rodney Sinclair] *** Line coverage now aggregates by hierarchy automatically. Previously this would be done inside SystemPerl, which was slower. @@ -1979,11 +1979,11 @@ Bug fixes: **** Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start(). -**** Fix arrayed variables under function not compiling, bug44. [Ralf Karge] +**** Fix arrayed variables under function not compiling, #44. [Ralf Karge] **** Fix --output-split-cfuncs to also split trace code. [Niranjan Prabhu] -**** Fix 'bad select range' warning missing some cases, bug43. [Lane Brooks] +**** Fix 'bad select range' warning missing some cases, #43. [Lane Brooks] **** Fix internal signal names containing control characters (broke in 3.680). @@ -1991,25 +1991,25 @@ Bug fixes: **** Fix internal error on "output x; reg x = y;". -**** Fix wrong result for read of delayed FSM signal, bug46. [Rodney Sinclair] +**** Fix wrong result for read of delayed FSM signal, #46. [Rodney Sinclair] -* Verilator 3.681 2008/11/12 +* Verilator 3.681 2008-11-12 *** Add SystemVerilog unique and priority case. **** Include Verilog file's directory name in coverage reports. -**** Fix 'for' under 'generate-for' causing error; bug38. [Rafael Shirakawa] +**** Fix 'for' under 'generate-for' causing error, #38. [Rafael Shirakawa] **** Fix coverage hierarchy being backwards with inlining. [Vasu Arasanipalai] -**** Fix GCC 4.3 compile error; bug35. [Lane Brooks] +**** Fix GCC 4.3 compile error, #35. [Lane Brooks] -**** Fix MSVC compile error; bug42. [John Stroebel] +**** Fix MSVC compile error, #42. [John Stroebel] -* Verilator 3.680 2008/10/08 +* Verilator 3.680 2008-10-08 ** Support negative bit indexes. [Stephane Laurent] Tracing negative indexes requires latest Verilog-Perl and SystemPerl. @@ -2021,12 +2021,12 @@ Bug fixes: **** Expand environment variables in -f input files. [Lawrence Butcher] -**** Report error if port declaration is missing; bug32. [Guy-Armand Kamendje] +**** Report error if port declaration is missing, #32. [Guy-Armand Kamendje] **** Fix genvars causing link error when using --public. [Chris Candler] -* Verilator 3.671 2008/09/19 +* Verilator 3.671 2008-09-19 ** SystemC uint64_t pins are now the default instead of sc_bv<64>. Use --no-pins64 for backward compatibility. @@ -2049,7 +2049,7 @@ Bug fixes: **** Support arbitrary characters in identifiers. [Stephane Laurent] -* Verilator 3.670 2008/07/23 +* Verilator 3.670 2008-07-23 ** Add --x-assign=fast option, and make it the default. This chooses performance over reset debugging. See the manual. @@ -2070,14 +2070,14 @@ Bug fixes: **** Fix IMPURE errors due to X-assignment temporary variables. [Steve Tong] -**** Fix "lvalue" errors with public functions; bug25. [CY Wang] +**** Fix "lvalue" errors with public functions, #25. [CY Wang] **** Add WIDTH warning to $fopen etc file descriptors. **** Internal changes to how $displays get compiled and executed. -* Verilator 3.665 2008/06/25 +* Verilator 3.665 2008-06-25 **** Ignore "// verilator" comments alone on endif lines. [Rodney Sinclair] @@ -2094,12 +2094,12 @@ Bug fixes: **** Fix Makefile to find headers/libraries under prefix. [by Holger Waechtler] -* Verilator 3.664 2008/05/08 +* Verilator 3.664 2008-05-08 **** Fix missing file in kit. -* Verilator 3.663 2008/05/07 +* Verilator 3.663 2008-05-07 **** Add DESTDIR to Makefiles to assist RPM construction. [Gunter Dannoritzer] @@ -2112,7 +2112,7 @@ Bug fixes: **** Fix comma separated list of primitives. [by Bryan Brady] -* Verilator 3.662 2008/04/25 +* Verilator 3.662 2008-04-25 *** Add Verilog 2005 $clog2() function. This is useful in calculating bus-widths from parameters. @@ -2140,7 +2140,7 @@ Bug fixes: **** Fix bug introduced in 3.661 with parametrized defines. -* Verilator 3.661 2008/04/04 +* Verilator 3.661 2008-04-04 *** The --enable-defenv configure option added in 3.660 is now the default. This hard-codes a default for VERILATOR_ROOT etc in the executables. @@ -2171,7 +2171,7 @@ Bug fixes: **** Fix internal error after MSB < LSB error reported to user. [Stefan Thiede] -* Verilator 3.660 2008/03/23 +* Verilator 3.660 2008-03-23 *** Add support for hard-coding VERILATOR_ROOT etc in the executables, to enable easier use of Verilator RPMs. [Gunter Dannoritzer] @@ -2193,12 +2193,12 @@ Bug fixes: **** Fix undefined assigns to be implicit warnings. [Stefan Thiede] -* Verilator 3.658 2008/02/25 +* Verilator 3.658 2008-02-25 **** Fix unistd compile error in 3.657. [Patricio Kaplan, Jonathan Kimmitt] -* Verilator 3.657 2008/02/20 +* Verilator 3.657 2008-02-20 **** Fix assignments of {a,b,c} = {c,b,a}. [Jonathan Kimmitt] @@ -2209,7 +2209,7 @@ Bug fixes: **** Fix parsing of always @(*). [Patricio Kaplan] -* Verilator 3.656 2008/01/18 +* Verilator 3.656 2008-01-18 **** Wide VL_CONST_W_#X functions are now made automatically. [Bernard Deadman] In such cases, a new {prefix}__Inlines.h file will be built and included. @@ -2219,7 +2219,7 @@ Bug fixes: **** Fixed tracing of SystemC w/o SystemPerl. [Bernard Deadman, Johan Wouters] -* Verilator 3.655 2007/11/27 +* Verilator 3.655 2007-11-27 *** Support "#delay ;" with associated STMTDLY warning. @@ -2232,7 +2232,7 @@ Bug fixes: **** Fixed many internal memory leaks, and added leak detector. -* Verilator 3.654 2007/10/18 +* Verilator 3.654 2007-10-18 **** Don't exit early if many warnings but no errors are found. [Stan Mayer] @@ -2351,7 +2351,7 @@ Bug fixes: **** Fixed $readmem* with filenames < 8 characters. [Emerson Suguimoto] -* Verilator 3.630 2006/12/19 +* Verilator 3.630 2006-12-19 ** Support $readmemb and $readmemh. [Eugene Weber, Arthur Kahlich] @@ -2366,7 +2366,7 @@ Bug fixes: **** Fixed missed split optimization points underneath other re-split blocks. -* Verilator 3.623 2006/12/05 +* Verilator 3.623 2006-12-05 *** Add --output-split-cfuncs for accelerating GCC compile. [Eugene Weber] @@ -2375,12 +2375,12 @@ Bug fixes: **** Add M32 make variable to support -m32 compiles. [Eugene Weber] -* Verilator 3.622 2006/10/17 Stable +* Verilator 3.622 2006-10-17 Stable **** Fixed --skip-identical without --debug, broken in 3.621. [Andy Meier] -* Verilator 3.621 2006/10/11 Beta +* Verilator 3.621 2006-10-11 Beta ** Add /*verilator no_inline_task*/ to prevent over-expansion. [Eugene Weber] @@ -2395,7 +2395,7 @@ Bug fixes: **** Fixed core dump on printing error when not under --debug. [Allan Cochrane] -* Verilator 3.620 2006/10/04 Stable +* Verilator 3.620 2006-10-04 Stable *** Support simple inout task ports. [Eugene Weber] @@ -2413,7 +2413,7 @@ Bug fixes: **** Fixed dotted variables in always sensitivity lists. [Allan Cochrane] -* Verilator 3.610 2006/09/20 Stable +* Verilator 3.610 2006-09-20 Stable *** Verilator now works under DJGPP (Pentium GCC). [John Stroebel] @@ -2426,12 +2426,12 @@ Bug fixes: **** Fixed printf format warnings on 64-bit linux. -* Verilator 3.602 2006/09/11 Stable +* Verilator 3.602 2006-09-11 Stable **** Fixed function references under top inlined module. [David Hewson] -* Verilator 3.601 2006/09/06 Beta +* Verilator 3.601 2006-09-06 Beta *** Added --inhibit-sim flag for environments using old __Vm_inhibitSim. @@ -2455,7 +2455,7 @@ Bug fixes: **** Declare optimized lookup tables as 'static', to reduce D-Cache miss rate. -* Verilator 3.600 2006/08/28 Beta +* Verilator 3.600 2006-08-28 Beta ** Support dotted cross-hierarchy variable and task references. @@ -2468,7 +2468,7 @@ Bug fixes: **** Fixed redundant statements remaining after table optimization. -* Verilator 3.542 2006/08/11 Stable +* Verilator 3.542 2006-08-11 Stable **** Fixed extraneous UNSIGNED warning when comparing genvars. [David Hewson] @@ -2479,7 +2479,7 @@ Bug fixes: **** Add VL_CONST_W_24X macro. [Bernard Deadman] -* Verilator 3.541 2006/07/05 Beta +* Verilator 3.541 2006-07-05 Beta *** Fixed "// verilator lint_on" not re-enabling warnings. [David Hewson] @@ -2492,7 +2492,7 @@ Bug fixes: **** Fixed GCC 4.0 header file warnings. -* Verilator 3.540 2006/06/27 Beta +* Verilator 3.540 2006-06-27 Beta **** Optimize combo assignments that are used only once, ~5-25% faster. @@ -2503,7 +2503,7 @@ Bug fixes: **** Fixed mis-width warning on dead generate-if branches. [Jae Hossell] -* Verilator 3.533 2006/06/05 Stable +* Verilator 3.533 2006-06-05 Stable *** Add PDF user manual, verilator.pdf. @@ -2514,7 +2514,7 @@ Bug fixes: **** Fixed Bison compile errors in verilog.y. [by Ben Jackson] -* Verilator 3.531 2006/05/10 Stable +* Verilator 3.531 2006-05-10 Stable *** Support $c routines which return 64 bit values. @@ -2523,13 +2523,13 @@ Bug fixes: **** Fixed Verilator core dump when have empty public function. [David.Hewson] -* Verilator 3.530 2006/04/24 Stable +* Verilator 3.530 2006-04-24 Stable ** $time is now 64 bits. The macro VL_TIME_I is now VL_TIME_Q, but calls the same sc_time_stamp() function to get the current time. -* Verilator 3.523 2006/03/06 Stable +* Verilator 3.523 2006-03-06 Stable **** Fixed error line numbers being off due to multi-line defines. [Mat Zeno] @@ -2538,12 +2538,12 @@ Bug fixes: **** Fixed `systemc_imp_header "undefined macro" error. -* Verilator 3.522 2006/02/23 Beta +* Verilator 3.522 2006-02-23 Beta **** Add UNUSED error message, for forward compatibility. -* Verilator 3.521 2006/02/14 Beta +* Verilator 3.521 2006-02-14 Beta *** Create new --coverage-line and --coverage-user options. [Peter Holmes] @@ -2552,13 +2552,13 @@ Bug fixes: **** Fixed public module's parent still getting inlined. -* Verilator 3.520 2006/01/14 Stable +* Verilator 3.520 2006-01-14 Stable ** Added support for $fopen, $fclose, $fwrite, $fdisplay. See documentation, as the file descriptors differ from the standard. -* Verilator 3.510 2005/12/17 Stable +* Verilator 3.510 2005-12-17 Stable ** Improve trace-on performance on large multi-clock designs by 2x or more. This adds a small ~2% performance penalty if traces are compiled in, @@ -2573,7 +2573,7 @@ Bug fixes: **** Fixed VL_MULS_WWW compile error with MSVC++. [Wim Michiels] -* Verilator 3.502 2005/11/30 Stable +* Verilator 3.502 2005-11-30 Stable **** Fixed local non-IO variables in public functions and tasks. @@ -2581,7 +2581,7 @@ Bug fixes: times in both branch of a if. [Danny Ding] -* Verilator 3.501 2005/11/16 Stable +* Verilator 3.501 2005-11-16 Stable *** Add --prof-cfuncs for correlating profiles back to Verilog. @@ -2590,7 +2590,7 @@ Bug fixes: **** Fixed bad deep expressions with bit-selects and rotate. [Prabhat Gupta] -* Verilator 3.500 2005/10/30 Stable +* Verilator 3.500 2005-10-30 Stable ** Support signed numbers, >>>, $signed, $unsigned. [MANY!] @@ -2607,7 +2607,7 @@ Bug fixes: **** Fixed generate for cell instantiations with same name. [Mat Zeno] -* Verilator 3.481 2005/10/12 Stable +* Verilator 3.481 2005-10-12 Stable *** Add /*verilator tracing_on/off*/ for waveform control. @@ -2844,7 +2844,7 @@ Bug fixes: **** Fixed unlinked error with defparam. [Shawn Wang] -* Verilator 3.320 2004/12/10 +* Verilator 3.320 2004-12-10 ** NEWS is now renamed Changes, to support CPAN indexing. @@ -2863,14 +2863,14 @@ Bug fixes: **** Fixed compile warnings on Suse 9.1 -* Verilator 3.311 2004/11/29 +* Verilator 3.311 2004-11-29 ** Support implicit wire declarations (as a warning). [Shawn Wang] **** Fixed over-shift difference in Verilog vs C++. [Ralf Karge] -* Verilator 3.310 2004/11/15 +* Verilator 3.310 2004-11-15 ** Support defparam. @@ -2879,7 +2879,7 @@ Bug fixes: *** Ignore all specify blocks. -* Verilator 3.302 2004/11/12 +* Verilator 3.302 2004-11-12 *** Support NAND and NOR operators. @@ -2895,7 +2895,7 @@ Bug fixes: **** Fixed runtime bit-selection of parameter constants. -* Verilator 3.301 2004/11/04 +* Verilator 3.301 2004-11-04 **** Fixed 64 bit [31:0] = {#{}} mis-simulation. [Ralf Karge] @@ -2904,7 +2904,7 @@ Bug fixes: **** Work around GCC 2.96 negation bug. -* Verilator 3.300 2004/10/21 +* Verilator 3.300 2004-10-21 ** New backend that eliminates most VL_ macros. Improves performance 20%-50%, depending on frequency of use of signals @@ -2913,14 +2913,14 @@ Bug fixes: **** Fixed "setting unsigned int from signed value" warning. -* Verilator 3.271 2004/10/21 +* Verilator 3.271 2004-10-21 **** Fixed "loops detected" error with some negedge clocks. **** Cleaned up some output code spacing issues. -* Verilator 3.270 2004/10/15 +* Verilator 3.270 2004-10-15 *** Support Verilog 2001 parameters in module headers. [Ralf Karge] @@ -2929,7 +2929,7 @@ Bug fixes: **** Faster code to support compilers not inlining all Verilated functions. -* Verilator 3.260 2004/10/7 +* Verilator 3.260 2004-10-7 ** Support Verilog 2001 named parameter instantiation. [Ralf Karge] @@ -3034,7 +3034,7 @@ Bug fixes: **** Added optimizations for common replication operations. -* Verilator 3.201-beta 2003/12/10 +* Verilator 3.201-beta 2003-12-10 ** BETA VERSION, USE 3.124 for stable release! @@ -3060,7 +3060,7 @@ Bug fixes: **** Optimization of bit replications -* Verilator 3.124 2003/12/05 +* Verilator 3.124 2003-12-05 *** A optimized executable will be made by default, in addition to a debug executable. Invoking Verilator with --debug will pick the debug version. @@ -3068,7 +3068,7 @@ Bug fixes: **** Many minor invisible changes to support the next version. -* Verilator 3.123 2003/11/10 +* Verilator 3.123 2003-11-10 **** Wide bus performance enhancements. @@ -3077,7 +3077,7 @@ Bug fixes: **** Fixed __DOT__ compile problem with funcs in last revision. [Leon Wildman] -* Verilator 3.122 2003/10/29 +* Verilator 3.122 2003-10-29 *** Modules which are accessed from external code now must be marked with /*verilator public_module*/ unless they already contain public signals. @@ -3088,7 +3088,7 @@ Bug fixes: **** Fixed function call bug when width warning suppressed. [Leon Wildman] -* Verilator 3.121 2003/09/29 +* Verilator 3.121 2003-09-29 *** Support multiplication over 32 bits. [Chris Boumenot] Also improved speed of addition and subtraction over 32 bits. @@ -3100,7 +3100,7 @@ Bug fixes: **** Fixed width problems on function arguments. [Robert A. Clark] -* Verilator 3.120 2003/09/24 +* Verilator 3.120 2003-09-24 *** $finish now exits the model (via vl_finish function). @@ -3119,33 +3119,33 @@ Bug fixes: **** Fixed $display("%x"); -* Verilator 3.112 2003/09/16 +* Verilator 3.112 2003-09-16 **** Fixed functions in continuous assignments. [Robert A. Clark] **** Fixed inlining of modules with 2-level deep outputs. -* Verilator 3.111 2003/09/15 +* Verilator 3.111 2003-09-15 **** Fixed declaration of functions before using that module. [Robert A. Clark] **** Fixed module inlining bug with outputs. -* Verilator 3.110 2003/09/12 +* Verilator 3.110 2003-09-12 ** Support Verilog 2001 style input/output declarations. [Robert A. Clark] *** Allow local vars in headers of function/tasks. [Leon Wildman] -* Verilator 3.109 2003/08/28 +* Verilator 3.109 2003-08-28 ** Added support for local variables in named begin blocks. [Leon Wildman] -* Verilator 3.108 2003/08/11 +* Verilator 3.108 2003-08-11 ** Added support for functions. @@ -3158,7 +3158,7 @@ Bug fixes: **** Many optimizations involving conditionals (?:) -* Verilator 3.107 2003/07/15 +* Verilator 3.107 2003-07-15 *** --private and --l2name are now the default, as this enables additional optimizations. @@ -3176,7 +3176,7 @@ Bug fixes: **** Additional constant optimizations, ~5% speed improvement. -* Verilator 3.106 2003/06/17 +* Verilator 3.106 2003-06-17 ** $c can now take multiple expressions as arguments. For example $c("foo","bar(",32+1,");") will insert "foobar(33);" @@ -3201,12 +3201,12 @@ Bug fixes: **** Several cleanups for Redhat 8.0. -* Verilator 3.105 2003/05/08 +* Verilator 3.105 2003-05-08 **** Fixed more GCC 3.2 errors. [David Black] -* Verilator 3.104 2003/04/30 +* Verilator 3.104 2003-04-30 *** Indicate direction of ports with VL_IN and VL_OUT. @@ -3225,7 +3225,7 @@ Bug fixes: **** Fixed GCC 3.2 compile errors. [Narayan Bhagavatula] -* Verilator 3.103 2003/01/28 +* Verilator 3.103 2003-01-28 **** Fixed missing model evaluation when clock generated several levels of hierarchy across from where it is used as a clock. [Richard Myers] @@ -3233,26 +3233,26 @@ Bug fixes: **** Fixed sign-extension bug introduced in 3.102. -* Verilator 3.102 2003/01/24 +* Verilator 3.102 2003-01-24 **** Fixed sign-extension of X/Z's ("32'hx") -* Verilator 3.101 2003/01/13 +* Verilator 3.101 2003-01-13 **** Fixed 'parameter FOO=#'bXXXX' [Richard Myers] **** Allow spaces inside numbers ("32'h 1234") [Sam Gladstone] -* Verilator 3.100 2002/12/23 +* Verilator 3.100 2002-12-23 ** Support for simple tasks w/o vars or I/O. [Richard Myers] **** Ignore DOS carriage returns in Linux files. [Richard Myers] -* Verilator 3.012 2002/12/18 +* Verilator 3.012 2002-12-18 **** Fixed parsing bug with casex statements containing case items with bit extracts of parameters. [Richard Myers] @@ -3266,7 +3266,7 @@ Bug fixes: **** Fixed compile with threaded Perl. [Ami Keren] -* Verilator 3.010 2002/11/3 +* Verilator 3.010 2002-11-3 *** Support SystemC 2.0.1. SystemPerl version 1.130 or newer is required. @@ -3274,14 +3274,14 @@ Bug fixes: Bleiweiss] -* Verilator 3.005 2002/10/21 +* Verilator 3.005 2002-10-21 **** Fixed X's in case (not casex/z) to constant propagate correctly. **** Fixed missing include. [Kurachi] -* Verilator 3.004 2002/10/10 +* Verilator 3.004 2002-10-10 *** Added /* verilator module_inline */ and associated optimizations. @@ -3297,7 +3297,7 @@ Bug fixes: **** Additional concatenation optimizations. -* Verilator 3.003 2002/09/13 +* Verilator 3.003 2002-09-13 *** Now compiles on Windows 2000 with Cygwin. @@ -3306,12 +3306,12 @@ Bug fixes: **** Optimize wire assignments to constants. -* Verilator 3.002 2002/08/19 +* Verilator 3.002 2002-08-19 ** First public release of version 3. -* Verilator 3.000 2002/08/03 +* Verilator 3.000 2002-08-03 ** All new code base. Many changes too numerous to mention. @@ -3322,7 +3322,7 @@ Bug fixes: *** Optimizes call ordering, constant propagation, and dead code elimination. -* Verilator 2.1.8 2002/04/03 +* Verilator 2.1.8 2002-04-03 ** All applications must now link against include/verilated.cpp @@ -3339,7 +3339,7 @@ Bug fixes: **** Split evaluation function into clocked and non-clocked, 20% perf gain. -* Verilator 2.1.5 2001/12/1 +* Verilator 2.1.5 2001-12-1 ** Added coverage analysis. In conjunction with SystemC provide line coverage reports, without SystemC, provide a hook to user written @@ -3358,17 +3358,17 @@ Bug fixes: **** Fixed corruption of assignments of signal over 32 bits with non-0 lsb. -* Verilator 2.1.4 2001/11/16 +* Verilator 2.1.4 2001-11-16 ** Added $c("c_commands();"); for embedding arbitrary C code in Verilog. -* Verilator 2.1.3 2001/11/03 +* Verilator 2.1.3 2001-11-03 ** Support for parameters. -* Verilator 2.1.2 2001/10/25 +* Verilator 2.1.2 2001-10-25 ** Verilog Errors now reference the .v file rather then the .vpp file. @@ -3384,7 +3384,7 @@ Bug fixes: **** Fixed bug where XNOR on odd-bit-widths (~^ or ^~) had bad value. -* Verilator 2.1.1 2001/5/17 +* Verilator 2.1.1 2001-05-17 ** New test_sp directory for System-Perl (SystemC) top level instantiation of the Verilated code, lower modules are still C++ code. (Experimental). @@ -3400,7 +3400,7 @@ of input ports exists for tracing. **** Many code cleanups towards standard C++ style conventions. -* Verilator 2.1.0 2001/5/8 +* Verilator 2.1.0 2001-05-08 **** Many code cleanups towards standard C++ style conventions. @@ -3408,24 +3408,24 @@ of input ports exists for tracing. * {Version history lost} -* Verilator 1.8 1996/7/8 +* Verilator 1.8 1996-07-08 ** [Versions 0 to 1.8 were by Paul Wasson] **** Fixed single bit in concat from instance output incorrect offset bug. -* Verilator 1.7 1996/5/20 +* Verilator 1.7 1996-05-20 **** Mask unused bits of DONTCAREs. -* Verilator 1.6 1996/5/13 +* Verilator 1.6 1996-05-13 *** Added fasttrace script -* Verilator 1.5 1996/1/9 +* Verilator 1.5 1996-01-09 *** Pass structure pointer into translated code, so multiple instances can use same functions. @@ -3433,17 +3433,17 @@ of input ports exists for tracing. **** Fixed static value concat on casex items. -* Verilator 1.1 1995/3/30 +* Verilator 1.1 1995-03-30 *** Bug fixes, added verimake_partial script, performance improvements. -* Verilator 1.0c 1994/9/30 +* Verilator 1.0c 1994-09-30 *** Initial release of Verilator -* Verilator 0.0 1994/7/8 +* Verilator 0.0 1994-07-08 **** First code written. diff --git a/MANIFEST.SKIP b/MANIFEST.SKIP index b0f22bf37..2a964c31b 100644 --- a/MANIFEST.SKIP +++ b/MANIFEST.SKIP @@ -2,6 +2,7 @@ \.clang-tidy \.git/ \.git$ +\.github/ \.svn/ \.(bak|old)/ \.(bak|old)$ From ea979c8f83f655bba388a449cb2dee50856ae3eb Mon Sep 17 00:00:00 2001 From: Peter Monsson <> Date: Sun, 22 Dec 2019 15:49:10 -0500 Subject: [PATCH 35/90] Fix disable iff in assertions. Closes #1404. Signed-off-by: Wilson Snyder --- Changes | 2 + docs/CONTRIBUTORS | 1 + src/V3AssertPre.cpp | 14 +++-- test_regress/t/t_assert_disable_iff.pl | 21 +++++++ test_regress/t/t_assert_disable_iff.v | 81 ++++++++++++++++++++++++++ 5 files changed, 115 insertions(+), 4 deletions(-) create mode 100644 test_regress/t/t_assert_disable_iff.pl create mode 100644 test_regress/t/t_assert_disable_iff.v diff --git a/Changes b/Changes index 29a4012bd..2b0bb2d6f 100644 --- a/Changes +++ b/Changes @@ -26,6 +26,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix strcasecmp for windows, #1651. [Kuba Ober] +**** Fix disable iff in assertions. Closes #1404. [Peter Monsson] + * Verilator 4.024 2019-12-08 diff --git a/docs/CONTRIBUTORS b/docs/CONTRIBUTORS index ed7fd6b52..ab88d1a58 100644 --- a/docs/CONTRIBUTORS +++ b/docs/CONTRIBUTORS @@ -24,6 +24,7 @@ Lukasz Dalek Maarten De Braekeleer Matthew Ballance Mike Popoloski +Peter Monsson Patrick Stewart Philipp Wagner Richard Myers diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp index 9916635aa..bc4f6bfd9 100644 --- a/src/V3AssertPre.cpp +++ b/src/V3AssertPre.cpp @@ -116,10 +116,16 @@ private: // Block is the new expression to evaluate AstNode* blockp = nodep->propp()->unlinkFrBack(); if (nodep->disablep()) { - blockp = new AstAnd(nodep->disablep()->fileline(), - new AstNot(nodep->disablep()->fileline(), - nodep->disablep()->unlinkFrBack()), - blockp); + if (VN_IS(nodep->backp(), Cover)) { + blockp = new AstAnd(nodep->disablep()->fileline(), + new AstNot(nodep->disablep()->fileline(), + nodep->disablep()->unlinkFrBack()), + blockp); + } else { + blockp = new AstOr(nodep->disablep()->fileline(), + nodep->disablep()->unlinkFrBack(), + blockp); + } } // Unlink and just keep a pointer to it, convert to sentree as needed m_senip = nodep->sensesp(); diff --git a/test_regress/t/t_assert_disable_iff.pl b/test_regress/t/t_assert_disable_iff.pl new file mode 100644 index 000000000..90b4e1666 --- /dev/null +++ b/test_regress/t/t_assert_disable_iff.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + verilator_flags2 => ['--assert --cc --coverage-user'], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_disable_iff.v b/test_regress/t/t_assert_disable_iff.v new file mode 100644 index 000000000..7e07d0184 --- /dev/null +++ b/test_regress/t/t_assert_disable_iff.v @@ -0,0 +1,81 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Peter Monsson. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + integer cyc; initial cyc=1; + + Test test (/*AUTOINST*/ + // Inputs + .clk (clk)); + + always @ (posedge clk) begin + if (cyc!=0) begin + cyc <= cyc + 1; + if (cyc==10) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + end + +endmodule + +module Test + ( + input clk + ); + +`ifdef FAIL_ASSERT_1 + assert property ( + @(posedge clk) disable iff (0) + 0 + ) else $display("wrong disable"); +`endif + + assert property ( + @(posedge clk) disable iff (1) + 0 + ); + + assert property ( + @(posedge clk) disable iff (1) + 1 + ); + + assert property ( + @(posedge clk) disable iff (0) + 1 + ); + + // + // Cover properties behave differently + // + + cover property ( + @(posedge clk) disable iff (1) + 1 + ) $stop; + + cover property ( + @(posedge clk) disable iff (1) + 0 + ) $stop; + + cover property ( + @(posedge clk) disable iff (0) + 1 + ) $display("*COVER: ok"); + + cover property ( + @(posedge clk) disable iff (0) + 0 + ) $stop; + +endmodule From 5c361efaea3b01e26547e26d89b7f2bb8e49da7f Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 22 Dec 2019 18:09:46 -0500 Subject: [PATCH 36/90] Internals: Minor format cleanups. No functional change. --- include/verilated.h | 120 ++++++++++++++++++++------------------ include/verilated_heavy.h | 10 ++-- include/verilated_save.h | 50 ++++++++-------- include/verilated_sc.h | 3 +- include/verilated_syms.h | 10 +--- include/verilated_vcd_c.h | 10 ++-- 6 files changed, 103 insertions(+), 100 deletions(-) diff --git a/include/verilated.h b/include/verilated.h index 724ca5215..e895362b6 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -193,7 +193,8 @@ public: // CONSTRUCTORS /// The constructor establishes the thread id for all later calls. /// If necessary, a different class could be made that inits it otherwise. - VerilatedAssertOneThread() : m_threadid(VL_THREAD_ID()) { } + VerilatedAssertOneThread() + : m_threadid(VL_THREAD_ID()) {} ~VerilatedAssertOneThread() { check(); } // METHODS /// Check that the current thread ID is the same as the construction thread ID @@ -503,7 +504,7 @@ public: // METHODS - INTERNAL USE ONLY (but public due to what uses it) // Internal: Create a new module name by concatenating two strings static const char* catName(const char* n1, const char* n2, - const char* delimiter="."); // Returns static data + const char* delimiter = "."); // Returns static data // Internal: Throw signal assertion static void overWidthError(const char* signame) VL_MT_SAFE; @@ -857,16 +858,16 @@ static inline void VL_ASSIGNBIT_WI(int, int bit, WDataOutP owp, IData rhs) VL_MT } // Alternative form that is an instruction faster when rhs is constant one. static inline void VL_ASSIGNBIT_IO(int, int bit, CData& lhsr, IData) VL_PURE { - lhsr = (lhsr | (VL_UL(1)<(lwp[i]) + static_cast(static_cast(~rwp[i]))); - if (i==0) ++carry; // Negation of rwp + if (i == 0) ++carry; // Negation of rwp owp[i] = (carry & VL_ULL(0xffffffff)); carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff); } @@ -1403,25 +1404,26 @@ static inline WDataOutP VL_MULS_WWW(int, int lbits, int, WData rwstore[VL_MULS_MAX_WORDS]; WDataInP lwusp = lwp; WDataInP rwusp = rwp; - EData lneg = VL_SIGN_E(lbits, lwp[words-1]); + EData lneg = VL_SIGN_E(lbits, lwp[words - 1]); if (lneg) { // Negate lhs lwusp = lwstore; VL_NEGATE_W(words, lwstore, lwp); - lwstore[words-1] &= VL_MASK_E(lbits); // Clean it + lwstore[words - 1] &= VL_MASK_E(lbits); // Clean it } - EData rneg = VL_SIGN_E(lbits, rwp[words-1]); + EData rneg = VL_SIGN_E(lbits, rwp[words - 1]); if (rneg) { // Negate rhs rwusp = rwstore; VL_NEGATE_W(words, rwstore, rwp); - rwstore[words-1] &= VL_MASK_E(lbits); // Clean it + rwstore[words - 1] &= VL_MASK_E(lbits); // Clean it } VL_MUL_W(words, owp, lwusp, rwusp); - owp[words-1] &= VL_MASK_E(lbits); // Clean. Note it's ok for the multiply to overflow into the sign bit + owp[words - 1] &= VL_MASK_E( + lbits); // Clean. Note it's ok for the multiply to overflow into the sign bit if ((lneg ^ rneg) & 1) { // Negate output (not using NEGATE, as owp==lwp) QData carry = 0; - for (int i=0; i(static_cast(~owp[i])); - if (i==0) ++carry; // Negation of temp2 + if (i == 0) ++carry; // Negation of temp2 owp[i] = (carry & VL_ULL(0xffffffff)); carry = (carry >> VL_ULL(32)) & VL_ULL(0xffffffff); } @@ -1432,34 +1434,35 @@ static inline WDataOutP VL_MULS_WWW(int, int lbits, int, } static inline IData VL_DIVS_III(int lbits, IData lhs, IData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 0; vlsint32_t lhs_signed = VL_EXTENDS_II(VL_IDATASIZE, lbits, lhs); vlsint32_t rhs_signed = VL_EXTENDS_II(VL_IDATASIZE, lbits, rhs); return lhs_signed / rhs_signed; } static inline QData VL_DIVS_QQQ(int lbits, QData lhs, QData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 0; vlsint64_t lhs_signed = VL_EXTENDS_QQ(VL_QUADSIZE, lbits, lhs); vlsint64_t rhs_signed = VL_EXTENDS_QQ(VL_QUADSIZE, lbits, rhs); return lhs_signed / rhs_signed; } static inline IData VL_MODDIVS_III(int lbits, IData lhs, IData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 0; vlsint32_t lhs_signed = VL_EXTENDS_II(VL_IDATASIZE, lbits, lhs); vlsint32_t rhs_signed = VL_EXTENDS_II(VL_IDATASIZE, lbits, rhs); return lhs_signed % rhs_signed; } static inline QData VL_MODDIVS_QQQ(int lbits, QData lhs, QData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 0; vlsint64_t lhs_signed = VL_EXTENDS_QQ(VL_QUADSIZE, lbits, lhs); vlsint64_t rhs_signed = VL_EXTENDS_QQ(VL_QUADSIZE, lbits, rhs); return lhs_signed % rhs_signed; } -static inline WDataOutP VL_DIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { +static inline WDataOutP VL_DIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, + WDataInP rwp) VL_MT_SAFE { int words = VL_WORDS_I(lbits); - EData lsign = VL_SIGN_E(lbits, lwp[words-1]); - EData rsign = VL_SIGN_E(lbits, rwp[words-1]); + EData lsign = VL_SIGN_E(lbits, lwp[words - 1]); + EData rsign = VL_SIGN_E(lbits, rwp[words - 1]); // cppcheck-suppress variableScope WData lwstore[VL_MULS_MAX_WORDS]; // Fixed size, as MSVC++ doesn't allow [words] here // cppcheck-suppress variableScope @@ -1477,10 +1480,11 @@ static inline WDataOutP VL_DIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, WDat return VL_DIV_WWW(lbits, owp, ltup, rtup); } } -static inline WDataOutP VL_MODDIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, WDataInP rwp) VL_MT_SAFE { +static inline WDataOutP VL_MODDIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, + WDataInP rwp) VL_MT_SAFE { int words = VL_WORDS_I(lbits); - EData lsign = VL_SIGN_E(lbits, lwp[words-1]); - EData rsign = VL_SIGN_E(lbits, rwp[words-1]); + EData lsign = VL_SIGN_E(lbits, lwp[words - 1]); + EData rsign = VL_SIGN_E(lbits, rwp[words - 1]); // cppcheck-suppress variableScope WData lwstore[VL_MULS_MAX_WORDS]; // Fixed size, as MSVC++ doesn't allow [words] here // cppcheck-suppress variableScope @@ -1499,30 +1503,31 @@ static inline WDataOutP VL_MODDIVS_WWW(int lbits, WDataOutP owp, WDataInP lwp, W } } -#define VL_POW_IIQ(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs) -#define VL_POW_IIW(obits,lbits,rbits,lhs,rwp) VL_POW_QQW(obits,lbits,rbits,lhs,rwp) -#define VL_POW_QQI(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs) -#define VL_POW_WWI(obits,lbits,rbits,owp,lwp,rhs) VL_POW_WWQ(obits,lbits,rbits,owp,lwp,rhs) +#define VL_POW_IIQ(obits, lbits, rbits, lhs, rhs) VL_POW_QQQ(obits, lbits, rbits, lhs, rhs) +#define VL_POW_IIW(obits, lbits, rbits, lhs, rwp) VL_POW_QQW(obits, lbits, rbits, lhs, rwp) +#define VL_POW_QQI(obits, lbits, rbits, lhs, rhs) VL_POW_QQQ(obits, lbits, rbits, lhs, rhs) +#define VL_POW_WWI(obits, lbits, rbits, owp, lwp, rhs) \ + VL_POW_WWQ(obits, lbits, rbits, owp, lwp, rhs) static inline IData VL_POW_III(int, int, int rbits, IData lhs, IData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 1; - if (VL_UNLIKELY(lhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 1; + if (VL_UNLIKELY(lhs == 0)) return 0; IData power = lhs; IData out = 1; - for (int i=0; i0) power = power*power; - if (rhs & (VL_ULL(1)< 0) power = power * power; + if (rhs & (VL_ULL(1) << i)) out *= power; } return out; } static inline QData VL_POW_QQQ(int, int, int rbits, QData lhs, QData rhs) VL_PURE { - if (VL_UNLIKELY(rhs==0)) return 1; - if (VL_UNLIKELY(lhs==0)) return 0; + if (VL_UNLIKELY(rhs == 0)) return 1; + if (VL_UNLIKELY(lhs == 0)) return 0; QData power = lhs; QData out = VL_ULL(1); - for (int i=0; i0) power = power*power; - if (rhs & (VL_ULL(1)< 0) power = power * power; + if (rhs & (VL_ULL(1) << i)) out *= power; } return out; } @@ -1582,20 +1587,20 @@ QData VL_POWSS_QQW(int obits, int, int rbits, // INTERNAL: Stuff LHS bit 0++ into OUTPUT at specified offset // ld may be "dirty", output is clean static inline void _VL_INSERT_II(int, CData& lhsr, IData ld, int hbit, int lbit) VL_PURE { - IData insmask = (VL_MASK_I(hbit-lbit+1))<(ld); @@ -1810,8 +1814,8 @@ static inline IData VL_STREAML_III(int, int lbits, int, IData ld, IData rd) VL_P IData ret = 0; // Slice size should never exceed the lhs width IData mask = VL_MASK_I(rd); - for (int istart=0; istart 0 ? ostart : 0; ret |= ((ld >> istart) & mask) << ostart; } @@ -2026,21 +2030,21 @@ static inline WDataOutP VL_SHIFTR_WWW(int obits, int lbits, int rbits, return VL_SHIFTR_WWI(obits, lbits, 32, owp, lwp, rwp[0]); } static inline IData VL_SHIFTR_IIW(int obits, int, int rbits, IData lhs, WDataInP rwp) VL_MT_SAFE { - for (int i=1; i < VL_WORDS_I(rbits); ++i) { + for (int i = 1; i < VL_WORDS_I(rbits); ++i) { if (VL_UNLIKELY(rwp[i])) { // Huge shift 1>>32 or more return 0; } } - return VL_CLEAN_II(obits, obits, lhs>>rwp[0]); + return VL_CLEAN_II(obits, obits, lhs >> rwp[0]); } static inline QData VL_SHIFTR_QQW(int obits, int, int rbits, QData lhs, WDataInP rwp) VL_MT_SAFE { - for (int i=1; i < VL_WORDS_I(rbits); ++i) { + for (int i = 1; i < VL_WORDS_I(rbits); ++i) { if (VL_UNLIKELY(rwp[i])) { // Huge shift 1>>32 or more return 0; } } // Above checks rwp[1]==0 so not needed in below shift - return VL_CLEAN_QQ(obits, obits, lhs>>(static_cast(rwp[0]))); + return VL_CLEAN_QQ(obits, obits, lhs >> (static_cast(rwp[0]))); } // EMIT_RULE: VL_SHIFTRS: oclean=false; lclean=clean, rclean==clean; @@ -2194,7 +2198,7 @@ static inline QData VL_SEL_QWII(int, int lbits, int, int, int nbitsfromlow = VL_EDATASIZE - VL_BITBIT_E(lsb); QData hi = (lwp[VL_BITWORD_E(msb)]); QData lo = VL_BITRSHIFT_W(lwp, lsb); - return (hi<>(VerilatedDeserialize& os, vluint64_t& rhs){ +inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, vluint64_t& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint32_t& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint32_t& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, vluint32_t& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint16_t& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint16_t& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, vluint16_t& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint8_t& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, vluint8_t& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, vluint8_t& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, bool& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, bool& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, bool& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, double& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, double& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, double& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, float& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, float& rhs) { return os.write(&rhs, sizeof(rhs)); } inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, float& rhs) { return os.read(&rhs, sizeof(rhs)); } -inline VerilatedSerialize& operator<<(VerilatedSerialize& os, std::string& rhs) { +inline VerilatedSerialize& operator<<(VerilatedSerialize& os, std::string& rhs) { vluint32_t len = rhs.length(); - os<>(VerilatedDeserialize& os, std::string& rhs) { vluint32_t len = 0; - os>>len; + os >> len; rhs.resize(len); return os.read((void*)rhs.data(), len); } diff --git a/include/verilated_sc.h b/include/verilated_sc.h index ef9324829..54f86e737 100644 --- a/include/verilated_sc.h +++ b/include/verilated_sc.h @@ -41,7 +41,8 @@ class VlScBvExposer : public sc_bv_base { public: static const vluint32_t* sp_datap(const sc_bv_base& base) VL_MT_SAFE { - return static_cast(&base)->sp_datatp(); } + return static_cast(&base)->sp_datatp(); + } const vluint32_t* sp_datatp() const { return reinterpret_cast(m_data); } // Above reads this protected element in sc_bv_base: // sc_digit* m_data; // data array diff --git a/include/verilated_syms.h b/include/verilated_syms.h index 418a7bc6c..a47edd617 100644 --- a/include/verilated_syms.h +++ b/include/verilated_syms.h @@ -42,9 +42,7 @@ /// Class to sort maps keyed by const char*'s struct VerilatedCStrCmp { - bool operator() (const char* a, const char* b) const { - return std::strcmp(a, b) < 0; - } + bool operator()(const char* a, const char* b) const { return std::strcmp(a, b) < 0; } }; /// Map of sorted scope names to find associated scope class @@ -56,8 +54,7 @@ public: }; /// Map of sorted variable names to find associated variable class -class VerilatedVarNameMap - : public std::map { +class VerilatedVarNameMap : public std::map { public: VerilatedVarNameMap() {} ~VerilatedVarNameMap() {} @@ -65,8 +62,7 @@ public: typedef std::vector VerilatedScopeVector; -class VerilatedHierarchyMap - : public std::map { +class VerilatedHierarchyMap : public std::map { public: VerilatedHierarchyMap() {} ~VerilatedHierarchyMap() {} diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h index af4debffe..423d0ffbc 100644 --- a/include/verilated_vcd_c.h +++ b/include/verilated_vcd_c.h @@ -43,7 +43,8 @@ private: int m_fd; ///< File descriptor we're writing to public: // METHODS - VerilatedVcdFile() : m_fd(0) {} + VerilatedVcdFile() + : m_fd(0) {} virtual ~VerilatedVcdFile() {} virtual bool open(const std::string& name) VL_MT_UNSAFE; virtual void close() VL_MT_UNSAFE; @@ -57,10 +58,11 @@ public: class VerilatedVcdSig { protected: friend class VerilatedVcd; - vluint32_t m_code; ///< VCD file code number - int m_bits; ///< Size of value in bits + vluint32_t m_code; ///< VCD file code number + int m_bits; ///< Size of value in bits VerilatedVcdSig(vluint32_t code, int bits) - : m_code(code), m_bits(bits) {} + : m_code(code) + , m_bits(bits) {} public: ~VerilatedVcdSig() {} }; From b0876732549a8d93fa101f0da81d9ade6c1e6105 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 22 Dec 2019 18:21:43 -0500 Subject: [PATCH 37/90] Fix output endif spacing. No functional change. --- src/V3EmitC.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index da3f45cf1..e85396588 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -1215,7 +1215,7 @@ class EmitCImp : EmitCStmts { //puts("__Vm_activity = true;\n"); puts("}\n"); - if (nodep->ifdef()!="") puts("#endif // "+nodep->ifdef()+"\n"); + if (nodep->ifdef()!="") puts("#endif // "+nodep->ifdef()+"\n"); } void emitChangeDet() { @@ -2475,7 +2475,7 @@ void EmitCImp::emitIntFuncDecls(AstNodeModule* modp) { puts("("+cFuncArgs(funcp)+")"); if (funcp->slow()) puts(" VL_ATTR_COLD"); puts(";\n"); - if (funcp->ifdef()!="") puts("#endif // "+funcp->ifdef()+"\n"); + if (funcp->ifdef()!="") puts("#endif // "+funcp->ifdef()+"\n"); } } @@ -2756,7 +2756,7 @@ void EmitCImp::emitInt(AstNodeModule* modp) { } // finish up h-file - puts("#endif // guard\n"); + puts("#endif // guard\n"); } //---------------------------------------------------------------------- From 49db4d2b668e773c1408e1929edd612cd7b6c30a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sun, 22 Dec 2019 20:02:37 -0500 Subject: [PATCH 38/90] Internals: Trivial spacing change to force CI rebuild. No functional change. --- src/V3EmitC.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index e85396588..54fb59e2a 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -2468,14 +2468,15 @@ void EmitCImp::emitIntFuncDecls(AstNodeModule* modp) { const AstCFunc* funcp = *it; if (!funcp->dpiImport()) { // DPI is prototyped in __Dpi.h ofp()->putsPrivate(funcp->declPrivate()); - if (funcp->ifdef()!="") puts("#ifdef "+funcp->ifdef()+"\n"); + if (!funcp->ifdef().empty()) puts("#ifdef " + funcp->ifdef() + "\n"); if (funcp->isStatic().trueU()) puts("static "); - puts(funcp->rtnTypeVoid()); puts(" "); + puts(funcp->rtnTypeVoid()); + puts(" "); puts(funcp->nameProtect()); - puts("("+cFuncArgs(funcp)+")"); + puts("(" + cFuncArgs(funcp) + ")"); if (funcp->slow()) puts(" VL_ATTR_COLD"); puts(";\n"); - if (funcp->ifdef()!="") puts("#endif // "+funcp->ifdef()+"\n"); + if (!funcp->ifdef().empty()) puts("#endif // " + funcp->ifdef() + "\n"); } } From c1fb938a615d7c8f33f773178e0c51f742cc4f6e Mon Sep 17 00:00:00 2001 From: Julien Margetts <> Date: Mon, 23 Dec 2019 07:47:57 -0500 Subject: [PATCH 39/90] Fix huge case statement performance. Closes #1644. Signed-off-by: Wilson Snyder --- Changes | 2 ++ src/V3Case.cpp | 7 ++++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/Changes b/Changes index 2b0bb2d6f..ef975dbac 100644 --- a/Changes +++ b/Changes @@ -28,6 +28,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix disable iff in assertions. Closes #1404. [Peter Monsson] +**** Fix huge case statement performance. Closes #1644. [Julien Margetts] + * Verilator 4.024 2019-12-08 diff --git a/src/V3Case.cpp b/src/V3Case.cpp index a9189621c..43ec3ec39 100644 --- a/src/V3Case.cpp +++ b/src/V3Case.cpp @@ -210,7 +210,12 @@ private: return false; } } - if (m_caseItems <= 3) return false; // Not worth simplifying + if (m_caseItems <= 3 + // Avoid e.g. priority expanders from going crazy in expansion + || (m_caseWidth >= 8 && (m_caseItems <= (m_caseWidth + 1)))) { + return false; // Not worth simplifying + } + // Convert valueItem from AstCaseItem* to the expression // Not done earlier, as we may now have a NULL because it's just a ";" NOP branch for (uint32_t i=0; i<(1UL< Date: Mon, 23 Dec 2019 15:03:04 -0500 Subject: [PATCH 40/90] Parse all class constructs, as still unsupported. --- src/V3AstNodes.h | 148 ++++++++-- src/V3ParseImp.h | 2 + src/verilog.l | 43 ++- src/verilog.y | 369 +++++++++++++++++++++--- test_regress/t/t_flag_wpedantic_bad.out | 2 +- 5 files changed, 481 insertions(+), 83 deletions(-) diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 1bffff1ee..9f2ca053b 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -245,6 +245,22 @@ public: AstRange* rangep() const { return VN_CAST(op2p(), Range); } // op2 = Range of pin }; +class AstClass : public AstNode { + // MEMBERS + string m_name; // Name +public: + AstClass(FileLine* fl, const string& name) + : AstNode(fl) + , m_name(name) {} + ASTNODE_NODE_FUNCS(Class) + virtual string name() const { return m_name; } // * = Var name + virtual void name(const string& name) { m_name = name; } + virtual string verilogKwd() const { return "class"; } + virtual bool maybePointedTo() const { return true; } + AstNode* membersp() const { return op1p(); } // op1 = List of statements + void addMembersp(AstNode* nodep) { addNOp1p(nodep); } +}; + //###################################################################### //==== Data Types @@ -685,6 +701,45 @@ public: virtual int widthTotalBytes() const { return subDTypep()->widthTotalBytes(); } }; +class AstClassRefDType : public AstNodeDType { + // Reference to a class +private: + AstClass* m_classp; // data type pointed to, BELOW the AstTypedef + AstPackage* m_packagep; // Package hierarchy +public: + AstClassRefDType(FileLine* fl, AstClass* classp) + : AstNodeDType(fl), m_classp(classp), m_packagep(NULL) { + dtypep(this); + } + ASTNODE_NODE_FUNCS(ClassRefDType) + // METHODS + virtual const char* broken() const { + BROKEN_RTN(m_classp && !m_classp->brokeExists()); return NULL; } + virtual void cloneRelink() { + if (m_classp && m_classp->clonep()) m_classp = m_classp->clonep(); + } + virtual bool same(const AstNode* samep) const { + const AstClassRefDType* asamep = static_cast(samep); + return (m_classp == asamep->m_classp + && m_packagep == asamep->m_packagep); } + virtual bool similarDType(AstNodeDType* samep) const { return this == samep; } + virtual V3Hash sameHash() const { return V3Hash(V3Hash(m_classp), V3Hash(m_packagep)); } + virtual string name() const { return classp() ? classp()->name() : ""; } + virtual AstBasicDType* basicp() const { return NULL; } + virtual AstNodeDType* skipRefp() const { return (AstNodeDType*)this; } + virtual AstNodeDType* skipRefToConstp() const { return (AstNodeDType*)this; } + virtual AstNodeDType* skipRefToEnump() const { return (AstNodeDType*)this; } + virtual int widthAlignBytes() const { return 0; } + virtual int widthTotalBytes() const { return 0; } + virtual AstNodeDType* virtRefDTypep() const { return NULL; } + virtual void virtRefDTypep(AstNodeDType* nodep) {} + virtual AstNodeDType* subDTypep() const { return NULL; } + AstPackage* packagep() const { return m_packagep; } + void packagep(AstPackage* nodep) { m_packagep = nodep; } + AstClass* classp() const { return m_classp; } + void classp(AstClass* nodep) { m_classp = nodep; } +}; + class AstIfaceRefDType : public AstNodeDType { // Reference to an interface, either for a port, or inside parent cell private: @@ -844,6 +899,7 @@ public: class AstStructDType : public AstNodeUOrStructDType { public: + // AstNumeric below is mispurposed to indicate if packed or not AstStructDType(FileLine* fl, AstNumeric numericUnpack) : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(StructDType) @@ -853,6 +909,7 @@ public: class AstUnionDType : public AstNodeUOrStructDType { public: //UNSUP: bool isTagged; + // AstNumeric below is mispurposed to indicate if packed or not AstUnionDType(FileLine* fl, AstNumeric numericUnpack) : AstNodeUOrStructDType(fl, numericUnpack) {} ASTNODE_NODE_FUNCS(UnionDType) @@ -1282,37 +1339,6 @@ public: void declRange(const VNumRange& flag) { m_declRange = flag; } }; -class AstMemberSel : public AstNodeMath { - // Parents: math|stmt - // Children: varref|arraysel, math -private: - // Don't need the class we are extracting from, as the "fromp()"'s datatype can get us to it - string m_name; -public: - AstMemberSel(FileLine* fl, AstNode* fromp, VFlagChildDType, const string& name) - : AstNodeMath(fl), m_name(name) { - setOp1p(fromp); - dtypep(NULL); // V3Width will resolve - } - AstMemberSel(FileLine* fl, AstNode* fromp, AstMemberDType* dtp) - : AstNodeMath(fl) { - setOp1p(fromp); - dtypep(dtp); - m_name = dtp->name(); - } - ASTNODE_NODE_FUNCS(MemberSel) - virtual string name() const { return m_name; } - virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { - V3ERROR_NA; /* How can from be a const? */ } - virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially - virtual string emitC() { V3ERROR_NA; return ""; } - virtual bool cleanOut() const { return false; } - virtual bool same(const AstNode* samep) const { return true; } // dtype comparison does it all for us - virtual int instrCount() const { return widthInstrs(); } - AstNode* fromp() const { return op1p(); } // op1 = Extracting what (NULL=TBD during parsing) - void fromp(AstNode* nodep) { setOp1p(nodep); } -}; - class AstMethodCall : public AstNode { // A reference to a member task (or function) // We do not support generic member calls yet, so this is only enough to @@ -2012,6 +2038,47 @@ public: ASTNODE_NODE_FUNCS(Iface) }; +class AstMemberSel : public AstNodeMath { + // Parents: math|stmt + // Children: varref|arraysel, math +private: + // Don't need the class we are extracting from, as the "fromp()"'s datatype can get us to it + string m_name; + AstVar* m_varp; // Post link, variable within class that is target of selection +public: + AstMemberSel(FileLine* fl, AstNode* fromp, VFlagChildDType, const string& name) + : AstNodeMath(fl) + , m_name(name) + , m_varp(NULL) { + setOp1p(fromp); + dtypep(NULL); // V3Width will resolve + } + AstMemberSel(FileLine* fl, AstNode* fromp, AstNodeDType* dtp) + : AstNodeMath(fl) + , m_name(dtp->name()) + , m_varp(NULL) { + setOp1p(fromp); + dtypep(dtp); + } + ASTNODE_NODE_FUNCS(MemberSel) + virtual void cloneRelink() { if (m_varp && m_varp->clonep()) { m_varp = m_varp->clonep(); } } + virtual const char* broken() const { + BROKEN_RTN(m_varp && !m_varp->brokeExists()); return NULL; } + virtual string name() const { return m_name; } + virtual V3Hash sameHash() const { return V3Hash(m_name); } + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + V3ERROR_NA; /* How can from be a const? */ } + virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially + virtual string emitC() { V3ERROR_NA; return ""; } + virtual bool cleanOut() const { return false; } + virtual bool same(const AstNode* samep) const { return true; } // dtype comparison does it + virtual int instrCount() const { return widthInstrs(); } + AstNode* fromp() const { return op1p(); } // op1 = Extracting what (NULL=TBD during parsing) + void fromp(AstNode* nodep) { setOp1p(nodep); } + AstVar* varp() const { return m_varp; } + void varp(AstVar* nodep) { m_varp = nodep; } +}; + class AstModportFTaskRef : public AstNode { // An import/export referenced under a modport // The storage for the function itself is inside the @@ -3826,6 +3893,25 @@ public: } }; +class AstNew : public AstNodeMath { + // Parents: math|stmt + // Children: varref|arraysel, math +public: + AstNew(FileLine* fl) + : AstNodeMath(fl) { + dtypep(NULL); // V3Width will resolve + } + ASTNODE_NODE_FUNCS(New) + virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs) { + V3ERROR_NA; /* How can from be a const? */ } + virtual V3Hash sameHash() const { return V3Hash(); } + virtual string emitVerilog() { return "new"; } + virtual string emitC() { V3ERROR_NA; return ""; } + virtual bool cleanOut() const { return true; } + virtual bool same(const AstNode* samep) const { return true; } + virtual int instrCount() const { return widthInstrs(); } +}; + class AstPragma : public AstNode { private: AstPragmaType m_pragType; // Type of pragma diff --git a/src/V3ParseImp.h b/src/V3ParseImp.h index 73c691bf2..a2d49c29d 100644 --- a/src/V3ParseImp.h +++ b/src/V3ParseImp.h @@ -70,6 +70,7 @@ struct V3ParseBisonYYSType { AstCase* casep; AstCaseItem* caseitemp; AstCell* cellp; + AstClass* classp; AstConst* constp; AstMemberDType* memberp; AstNodeModule* modulep; @@ -86,6 +87,7 @@ struct V3ParseBisonYYSType { AstPatMember* patmemberp; AstPattern* patternp; AstPin* pinp; + AstRefDType* refdtypep; AstSenTree* sentreep; AstVar* varp; AstVarRef* varrefp; diff --git a/src/verilog.l b/src/verilog.l index 4611b66e9..0a082bd43 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -411,19 +411,21 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "always_comb" { FL; return yALWAYS_COMB; } "always_ff" { FL; return yALWAYS_FF; } "always_latch" { FL; return yALWAYS_LATCH; } - "assume" { FL; return yASSUME; } "assert" { FL; return yASSERT; } + "assume" { FL; return yASSUME; } "bind" { FL; return yBIND; } "bit" { FL; return yBIT; } "break" { FL; return yBREAK; } "byte" { FL; return yBYTE; } "chandle" { FL; return yCHANDLE; } + "class" { FL; return yCLASS; } "clocking" { FL; return yCLOCKING; } "const" { FL; return yCONST__LEX; } "context" { FL; return yCONTEXT; } "continue" { FL; return yCONTINUE; } "cover" { FL; return yCOVER; } "do" { FL; return yDO; } + "endclass" { FL; return yENDCLASS; } "endclocking" { FL; return yENDCLOCKING; } "endinterface" { FL; return yENDINTERFACE; } "endpackage" { FL; return yENDPACKAGE; } @@ -431,6 +433,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "endproperty" { FL; return yENDPROPERTY; } "enum" { FL; return yENUM; } "export" { FL; return yEXPORT; } + "extends" { FL; return yEXTENDS; } "extern" { FL; return yEXTERN; } "final" { FL; return yFINAL; } "forkjoin" { FL; return yFORKJOIN; } @@ -439,15 +442,18 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "inside" { FL; return yINSIDE; } "int" { FL; return yINT; } "interface" { FL; return yINTERFACE; } + "local" { FL; return yLOCAL__LEX; } "logic" { FL; return yLOGIC; } "longint" { FL; return yLONGINT; } "modport" { FL; return yMODPORT; } + "new" { FL; return yNEW__LEX; } "null" { FL; return yNULL; } "package" { FL; return yPACKAGE; } "packed" { FL; return yPACKED; } "priority" { FL; return yPRIORITY; } "program" { FL; return yPROGRAM; } "property" { FL; return yPROPERTY; } + "protected" { FL; return yPROTECTED; } "pure" { FL; return yPURE; } "rand" { FL; return yRAND; } "randc" { FL; return yRANDC; } @@ -460,6 +466,8 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "static" { FL; return ySTATIC__ETC; } "string" { FL; return ySTRING; } "struct" { FL; return ySTRUCT; } + "super" { FL; return ySUPER; } + "this" { FL; return yTHIS; } "timeprecision" { FL; return yTIMEPRECISION; } "timeunit" { FL; return yTIMEUNIT; } "type" { FL; return yTYPE; } @@ -467,6 +475,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "union" { FL; return yUNION; } "unique" { FL; return yUNIQUE; } "var" { FL; return yVAR; } + "virtual" { FL; return yVIRTUAL__LEX; } "void" { FL; return yVOID; } /* Generic unsupported warnings */ /* Note assert_strobe was in SystemVerilog 3.1, but removed for SystemVerilog 2005 */ @@ -474,36 +483,27 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "before" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "binsof" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "class" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "constraint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "covergroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "coverpoint" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "cross" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "dist" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "endclass" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "endgroup" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "endsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "expect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "extends" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "first_match" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "ignore_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "illegal_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "intersect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "join_any" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "join_none" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "local" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "new" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "protected" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randomize" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "sequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "solve" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "super" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "tagged" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "this" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "throughout" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "virtual" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "wait_order" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "wildcard" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "with" { ERROR_RSVD_WORD("SystemVerilog 2005"); } @@ -541,7 +541,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} /* System Verilog 2012 */ { /* Keywords */ - "implements" { ERROR_RSVD_WORD("SystemVerilog 2012"); } + "implements" { FL; return yIMPLEMENTS; } "interconnect" { ERROR_RSVD_WORD("SystemVerilog 2012"); } "nettype" { ERROR_RSVD_WORD("SystemVerilog 2012"); } "soft" { ERROR_RSVD_WORD("SystemVerilog 2012"); } @@ -1012,6 +1012,9 @@ void V3ParseImp::lexToken() { if (token == '(' || token == yCONST__LEX || token == yGLOBAL__LEX + || token == yLOCAL__LEX + || token == yNEW__LEX + || token == yVIRTUAL__LEX // Never put yID_* here; below symbol table resolution would break ) { if (debugFlex()>=6) { cout<<" lexToken: reading ahead to find possible strength"<newString("global"); } } + else if (token == yLOCAL__LEX) { + if (nexttok == yP_COLONCOLON) token = yLOCAL__COLONCOLON; + else token = yLOCAL__ETC; + } + else if (token == yNEW__LEX) { + if (nexttok == '(') token = yNEW__PAREN; + else token = yNEW__ETC; + } + else if (token == yVIRTUAL__LEX) { + if (nexttok == yCLASS) token = yVIRTUAL__CLASS; + else if (nexttok == yINTERFACE) token = yVIRTUAL__INTERFACE; + else if (nexttok == yaID__ETC || nexttok == yaID__LEX) + // || nexttok == yaID__aINTERFACE // but we may not know interfaces yet. + token = yVIRTUAL__anyID; + else token = yVIRTUAL__ETC; + } // If add to above "else if", also add to "if (token" further above } // If an id, change the type based on symbol table @@ -1061,7 +1080,7 @@ void V3ParseImp::lexToken() { if (VN_IS(scp, Typedef)) token = yaID__aTYPE; else if (VN_IS(scp, TypedefFwd)) token = yaID__aTYPE; else if (VN_IS(scp, Package)) token = yaID__aPACKAGE; - //UNSUP else if (VN_IS(scp, NodeClass)) token = yaID__aCLASS; + else if (VN_IS(scp, Class)) token = yaID__aTYPE; //UNSUP else if (VN_IS(scp, CoverGroup)) token = yaID__aCOVERGROUP; else token = yaID__ETC; } else { // Not found diff --git a/src/verilog.y b/src/verilog.y index c1e828a22..510e67b57 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -345,6 +345,7 @@ class AstSenTree; %token yCASEX "casex" %token yCASEZ "casez" %token yCHANDLE "chandle" +%token yCLASS "class" %token yCLOCKING "clocking" %token yCMOS "cmos" %token yCONST__ETC "const" @@ -362,6 +363,7 @@ class AstSenTree; %token yELSE "else" %token yEND "end" %token yENDCASE "endcase" +%token yENDCLASS "endclass" %token yENDCLOCKING "endclocking" %token yENDFUNCTION "endfunction" %token yENDGENERATE "endgenerate" @@ -377,6 +379,7 @@ class AstSenTree; %token yENUM "enum" %token yEVENT "event" %token yEXPORT "export" +%token yEXTENDS "extends" %token yEXTERN "extern" %token yFINAL "final" %token yFOR "for" @@ -393,6 +396,7 @@ class AstSenTree; %token yGLOBAL__LEX "global-in-lex" %token yIF "if" %token yIFF "iff" +%token yIMPLEMENTS "implements" %token yIMPORT "import" %token yINITIAL "initial" %token yINOUT "inout" @@ -403,12 +407,18 @@ class AstSenTree; %token yINTERFACE "interface" %token yJOIN "join" %token yLOCALPARAM "localparam" +%token yLOCAL__COLONCOLON "local-then-::" +%token yLOCAL__ETC "local" +%token yLOCAL__LEX "local-in-lex" %token yLOGIC "logic" %token yLONGINT "longint" %token yMODPORT "modport" %token yMODULE "module" %token yNAND "nand" %token yNEGEDGE "negedge" +%token yNEW__ETC "new" +%token yNEW__LEX "new-in-lex" +%token yNEW__PAREN "new-then-paren" %token yNMOS "nmos" %token yNOR "nor" %token yNOT "not" @@ -426,6 +436,7 @@ class AstSenTree; %token yPRIORITY "priority" %token yPROGRAM "program" %token yPROPERTY "property" +%token yPROTECTED "protected" %token yPULLDOWN "pulldown" %token yPULLUP "pullup" %token yPURE "pure" @@ -455,10 +466,12 @@ class AstSenTree; %token ySTATIC__ETC "static" %token ySTRING "string" %token ySTRUCT "struct" +%token ySUPER "super" %token ySUPPLY0 "supply0" %token ySUPPLY1 "supply1" %token yTABLE "table" %token yTASK "task" +%token yTHIS "this" %token yTIME "time" %token yTIMEPRECISION "timeprecision" %token yTIMEUNIT "timeunit" @@ -480,6 +493,11 @@ class AstSenTree; %token yUNSIGNED "unsigned" %token yVAR "var" %token yVECTORED "vectored" +%token yVIRTUAL__CLASS "virtual-then-class" +%token yVIRTUAL__ETC "virtual" +%token yVIRTUAL__INTERFACE "virtual-then-interface" +%token yVIRTUAL__LEX "virtual-in-lex" +%token yVIRTUAL__anyID "virtual-then-identifier" %token yVOID "void" %token yWAIT "wait" %token yWAND "wand" @@ -800,7 +818,7 @@ package_or_generate_item_declaration: // ==IEEE: package_or_generate_item //UNSUP checker_declaration { $$ = $1; } | dpi_import_export { $$ = $1; } //UNSUP extern_constraint_declaration { $$ = $1; } - //UNSUP class_declaration { $$ = $1; } + | class_declaration { $$ = $1; } // // class_constructor_declaration is part of function_declaration | local_parameter_declaration ';' { $$ = $1; } | parameter_declaration ';' { $$ = $1; } @@ -917,6 +935,11 @@ parameter_value_assignmentE: // IEEE: [ parameter_value_assignment ] // // '#' delay_value { UNSUP } ; +parameter_value_assignmentClass: // IEEE: [ parameter_value_assignment ] (for classes) + // // Like parameter_value_assignment, but for classes only, which always have #() + '#' '(' cellparamList ')' { $$ = $3; } + ; + parameter_port_listE: // IEEE: parameter_port_list + empty == parameter_value_assignment /* empty */ { $$ = NULL; } | '#' '(' ')' { $$ = NULL; } @@ -1133,7 +1156,7 @@ anonymous_program_itemList: // IEEE: { anonymous_program_item } anonymous_program_item: // ==IEEE: anonymous_program_item task_declaration { $$ = $1; } | function_declaration { $$ = $1; } - //UNSUP class_declaration { $$ = $1; } + | class_declaration { $$ = $1; } //UNSUP covergroup_declaration { $$ = $1; } // // class_constructor_declaration is part of function_declaration | ';' { $$ = NULL; } @@ -1478,13 +1501,20 @@ simple_type: // ==IEEE: simple_type data_type: // ==IEEE: data_type // // This expansion also replicated elsewhere, IE data_type__AndID data_typeNoRef { $$ = $1; } + // + // // REFERENCES + // // // IEEE: [ class_scope | package_scope ] type_identifier { packed_dimension } - | ps_type packed_dimensionListE { $$ = GRAMMARP->createArray($1,$2,true); } - //UNSUP class_scope_type packed_dimensionListE { UNSUP } // // IEEE: class_type - //UNSUP class_typeWithoutId { $$ = $1; } // // IEEE: ps_covergroup_identifier - // // we put covergroups under ps_type, so can ignore this + // // Don't distinguish between types and classes so all these combined + | package_scopeIdFollowsE idRefDType packed_dimensionListE + { $2->packagep($1); + $$ = GRAMMARP->createArray($2, $3, true); } + | package_scopeIdFollowsE idRefDType parameter_value_assignmentClass packed_dimensionListE + { $2->packagep($1); + BBUNSUP($3->fileline(), "Unsupported: Parameter classes"); + $$ = GRAMMARP->createArray($2, $4, true); } ; data_typeBasic: // IEEE: part of data_type @@ -1502,8 +1532,13 @@ data_typeNoRef: // ==IEEE: data_type, excluding class_type etc referenc | ySTRING { $$ = new AstBasicDType($1,AstBasicDTypeKwd::STRING); } | yCHANDLE { $$ = new AstBasicDType($1,AstBasicDTypeKwd::CHANDLE); } | yEVENT { $$ = new AstBasicDType($1,AstBasicDTypeKwd::BIT); BBUNSUP($1, "Unsupported: event data types"); } - //UNSUP yVIRTUAL__INTERFACE yINTERFACE id/*interface*/ { UNSUP } - //UNSUP yVIRTUAL__anyID id/*interface*/ { UNSUP } + // // Rules overlap virtual_interface_declaration + // // Parameters here are SV2009 + // // IEEE has ['.' modport] but that will conflict with port + // // declarations which decode '.' modport themselves, so + // // instead see data_typeVar + | yVIRTUAL__INTERFACE yINTERFACE id/*interface*/ { $$ = NULL; BBUNSUP($1, "Unsupported: virtual interface"); } + | yVIRTUAL__anyID id/*interface*/ { $$ = NULL; BBUNSUP($1, "Unsupported: virtual data type"); } //UNSUP type_reference { UNSUP } // // IEEE: class_scope: see data_type above // // IEEE: class_type: see data_type above @@ -1521,6 +1556,10 @@ var_data_type: // ==IEEE: var_data_type | yVAR implicit_typeE { $$ = $2; } ; +//UNSUP type_reference: // ==IEEE: type_reference +//UNSUP yTYPE '(' exprOrDataType ')' { UNSUP } +//UNSUP ; + struct_unionDecl: // IEEE: part of data_type // // packedSigningE is NOP for unpacked ySTRUCT packedSigningE '{' { $$ = new AstStructDType($1, $2); SYMP->pushNew($$); } @@ -1568,7 +1607,7 @@ member_decl_assignment: // Derived from IEEE: variable_decl_assignment // // // IEEE: "[ covergroup_variable_identifier ] '=' class_new // // Pushed into variable_declExpr:class_new - //UNSUP '=' class_new { UNSUP } + | '=' class_new { NULL; BBUNSUP($1, "Unsupported: member declaration assignment with new()"); } ; list_of_variable_decl_assignments: // ==IEEE: list_of_variable_decl_assignments @@ -1591,7 +1630,7 @@ variable_decl_assignment: // ==IEEE: variable_decl_assignment // // // IEEE: "[ covergroup_variable_identifier ] '=' class_new // // Pushed into variable_declExpr:class_new - //UNSUP '=' class_new { UNSUP } + | '=' class_new { NULL; BBUNSUP($1, "Unsupported: declaration assignment with new()"); } ; list_of_tf_variable_identifiers: // ==IEEE: list_of_tf_variable_identifiers @@ -1609,8 +1648,8 @@ tf_variable_identifier: // IEEE: part of list_of_tf_variable_identifiers variable_declExpr: // IEEE: part of variable_decl_assignment - rhs of expr expr { $$ = $1; } - //UNSUP dynamic_array_new { $$ = $1; } - //UNSUP class_new { $$ = $1; } + | dynamic_array_new { $$ = $1; } + | class_new { $$ = $1; } ; variable_dimensionListE: // IEEE: variable_dimension + empty @@ -1721,11 +1760,25 @@ data_declaration: // ==IEEE: data_declaration // // Therefore the virtual_interface_declaration term isn't used ; +class_property: // ==IEEE: class_property, which is {property_qualifier} data_declaration + memberQualResetListE data_declarationVarClass { $$ = $2; } + | memberQualResetListE type_declaration { $$ = $2; } + | memberQualResetListE package_import_declaration { $$ = $2; } + // // IEEE: virtual_interface_declaration + // // "yVIRTUAL yID yID" looks just like a data_declaration + // // Therefore the virtual_interface_declaration term isn't used + ; + data_declarationVar: // IEEE: part of data_declaration // // The first declaration has complications between assuming what's the type vs ID declaring data_declarationVarFront list_of_variable_decl_assignments ';' { $$ = $2; } ; +data_declarationVarClass: // IEEE: part of data_declaration (for class_property) + // // The first declaration has complications between assuming what's the type vs ID declaring + data_declarationVarFrontClass list_of_variable_decl_assignments ';' { $$ = $2; } + ; + data_declarationVarFront: // IEEE: part of data_declaration // // Non-ANSI; used inside block followed by ';' // // SEE ALSO port_declaration, tf_port_declaration, port @@ -1748,6 +1801,21 @@ data_declarationVarFront: // IEEE: part of data_declaration // // = class_new is in variable_decl_assignment ; +data_declarationVarFrontClass: // IEEE: part of data_declaration (for class_property) + // // VARRESET called before this rule + // // yCONST is removed, added to memberQual rules + // // implicit_type expanded into /*empty*/ or "signingE rangeList" + yVAR lifetimeE data_type { VARRESET_NONLIST(VAR); VARDTYPE($3); } + | yVAR lifetimeE { VARRESET_NONLIST(VAR); } + | yVAR lifetimeE signingE rangeList { /*VARRESET-in-ddVar*/ VARDTYPE(GRAMMARP->addRange(new AstBasicDType($1, LOGIC_IMPLICIT, $3), $4,true)); } + // + // // Expanded: "constE lifetimeE data_type" + | data_type { VARRESET_NONLIST(VAR); VARDTYPE($1); } + // // lifetime is removed, added to memberQual rules to avoid conflict + // // yCONST is removed, added to memberQual rules to avoid conflict + // // = class_new is in variable_decl_assignment + ; + implicit_typeE: // IEEE: part of *data_type_or_implicit // // Also expanded in data_declaration /* empty */ { $$ = NULL; } @@ -1767,8 +1835,8 @@ type_declaration: // ==IEEE: type_declaration | yTYPEDEF yENUM idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } | yTYPEDEF ySTRUCT idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } | yTYPEDEF yUNION idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } - //UNSUP yTYPEDEF yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } - //UNSUP yTYPEDEF yINTERFACE yCLASS idAny ';' { ... } + | yTYPEDEF yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($3, *$3); SYMP->reinsert($$); PARSEP->tagNodep($$); } + | yTYPEDEF yINTERFACE yCLASS idAny ';' { $$ = NULL; $$ = new AstTypedefFwd($4, *$4); SYMP->reinsert($$); PARSEP->tagNodep($$); } ; dtypeAttrListE: @@ -1891,8 +1959,8 @@ bind_directive: // ==IEEE: bind_directive + bind_target_scope // // ';' - Note IEEE grammar is wrong, includes extra ';' - it's already in module_instantiation // // We merged the rules - id may be a bind_target_instance or module_identifier or interface_identifier yBIND bind_target_instance bind_instantiation { $$ = new AstBind($2, *$2, $3); } - | yBIND bind_target_instance ':' bind_target_instance_list bind_instantiation { - $$=NULL; BBUNSUP($1, "Unsupported: Bind with instance list"); } + | yBIND bind_target_instance ':' bind_target_instance_list bind_instantiation + { $$ = NULL; BBUNSUP($1, "Unsupported: Bind with instance list"); } ; bind_target_instance_list: // ==IEEE: bind_target_instance_list @@ -2451,8 +2519,8 @@ statement_item: // IEEE: statement_item // // IEEE: blocking_assignment // // 1800-2009 restricts LHS of assignment to new to not have a range // // This is ignored to avoid conflicts - //UNSUP fexprLvalue '=' class_new ';' { UNSUP } - //UNSUP fexprLvalue '=' dynamic_array_new ';' { UNSUP } + | fexprLvalue '=' class_new ';' { $$ = new AstAssign($2, $1, $3); } + | fexprLvalue '=' dynamic_array_new ';' { $$ = new AstAssign($2, $1, $3); } // // // IEEE: nonblocking_assignment | fexprLvalue yP_LTE delayE expr ';' { $$ = new AstAssignDly($2,$1,$4); } @@ -2522,9 +2590,9 @@ statement_item: // IEEE: statement_item // // Because we've joined class_constructor_declaration into generic functions // // Way over-permissive; // // IEEE: [ ySUPER '.' yNEW [ '(' list_of_arguments ')' ] ';' ] - //UNSUP fexpr '.' class_new ';' { } + | fexpr '.' class_new ';' { $$ = NULL; BBUNSUP($1, "Unsupported: dotted new"); } // - | statementVerilatorPragmas { $$ = $1; } + | statementVerilatorPragmas { $$ = $1; } // // // IEEE: disable_statement | yDISABLE idAny/*hierarchical_identifier-task_or_block*/ ';' { $$ = new AstDisable($1,*$2); } @@ -2626,6 +2694,19 @@ finc_or_dec_expression: // ==IEEE: inc_or_dec_expression | yP_MINUSMINUS fexprLvalue { $$ = new AstAssign($1,$2,new AstSub ($1,$2->cloneTree(true),new AstConst($1, AstConst::StringToParse(), "'b1"))); } ; +class_new: // ==IEEE: class_new + // // Special precence so (...) doesn't match expr + yNEW__ETC { $$ = new AstNew($1); } + | yNEW__ETC expr { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: new with expression"); } + // // Grammer abiguity; we assume "new (x)" the () are a argument, not expr + | yNEW__PAREN '(' list_of_argumentsE ')' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: new with arguments"); } + ; + +dynamic_array_new: // ==IEEE: dynamic_array_new + yNEW__ETC '[' expr ']' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: Dynamic array new"); } + | yNEW__ETC '[' expr ']' '(' expr ')' { $$ = new AstNew($1); BBUNSUP($1, "Unsupported: Dynamic array new"); } + ; + //************************************************ // Case/If @@ -2831,17 +2912,27 @@ funcRef: // IEEE: part of tf_call task_subroutine_callNoMethod: // function_subroutine_callNoMethod (as task) // // IEEE: tf_call taskRef { $$ = $1; } + //UNSUP funcRef yWITH__PAREN '(' expr ')' { /*UNSUP*/ } | system_t_call { $$ = $1; } // // IEEE: method_call requires a "." so is in expr - //UNSUP randomize_call { $$ = $1; } + // // IEEE: ['std::'] not needed, as normal std package resolution will find it + // // IEEE: randomize_call + // // We implement randomize as a normal funcRef, since randomize isn't a keyword + // // Note yNULL is already part of expressions, so they come for free + //UNSUP funcRef yWITH__CUR constraint_block { } ; function_subroutine_callNoMethod: // IEEE: function_subroutine_call (as function) // // IEEE: tf_call funcRef { $$ = $1; } + //UNSUP funcRef yWITH__PAREN '(' expr ')' { /*UNSUP*/ } | system_f_call { $$ = $1; } // // IEEE: method_call requires a "." so is in expr - //UNSUP randomize_call { $$ = $1; } + // // IEEE: ['std::'] not needed, as normal std package resolution will find it + // // IEEE: randomize_call + // // We implement randomize as a normal funcRef, since randomize isn't a keyword + // // Note yNULL is already part of expressions, so they come for free + //UNSUP funcRef yWITH__CUR constraint_block { } ; system_t_call: // IEEE: system_tf_call (as task) @@ -3039,6 +3130,10 @@ function_declaration: // IEEE: function_declaration + function_body_decl { $$ = $3; $3->attrIsolateAssign($4); $$->addStmtsp($5); SYMP->popScope($$); GRAMMARP->endLabel($7,$$,$7); } + | yFUNCTION lifetimeE funcIdNew funcIsolateE tfGuts yENDFUNCTION endLabelE + { $$ = $3; $3->attrIsolateAssign($4); $$->addStmtsp($5); + SYMP->popScope($$); + GRAMMARP->endLabel($7,$$,$7); } ; function_prototype: // IEEE: function_prototype @@ -3046,6 +3141,11 @@ function_prototype: // IEEE: function_prototype | yFUNCTION funcId { $$=$2; $$->prototype(true); SYMP->popScope($$); } ; +class_constructor_prototype: // ==IEEE: class_constructor_prototype + yFUNCTION funcIdNew '(' tf_port_listE ')' ';' { $$ = $2; $$->addStmtsp($4); $$->prototype(true); SYMP->popScope($$); } + | yFUNCTION funcIdNew ';' { $$ = $2; $$->prototype(true); SYMP->popScope($$); } + ; + funcIsolateE: /* empty */ { $$ = 0; } | yVL_ISOLATE_ASSIGNMENTS { $$ = 1; } @@ -3097,11 +3197,27 @@ funcId: // IEEE: function_data_type_or_implicit + part of function_bod SYMP->pushNewUnder($$, NULL); } ; +funcIdNew: // IEEE: from class_constructor_declaration + yNEW__ETC + { $$ = new AstFunc($1, "new", NULL, NULL); + BBUNSUP($1, "Unsupported: new constructor"); + SYMP->pushNewUnder($$, NULL); } + | yNEW__PAREN + { $$ = new AstFunc($1, "new", NULL, NULL); + BBUNSUP($1, "Unsupported: new constructor"); + SYMP->pushNewUnder($$, NULL); } + | class_scopeWithoutId yNEW__PAREN + { $$ = new AstFunc($2, "new", NULL, NULL); + BBUNSUP($2, "Unsupported: scoped new constructor"); + SYMP->pushNewUnder($$, NULL); } + ; + tfIdScoped: // IEEE: part of function_body_declaration/task_body_declaration // // IEEE: [ interface_identifier '.' | class_scope ] function_identifier id { $$=$1; $$ = $1; } - //UNSUP id/*interface_identifier*/ '.' id { UNSUP } - //UNSUP class_scope_id { UNSUP } + | id/*interface_identifier*/ '.' id { $$=$3; $$ = $3; BBUNSUP($2, "Unsupported: Out of block function declaration"); } + | class_scopeIdFollows id { $$=$2; $$=$1; $$=$2; + BBUNSUP($1, "Unsupported: Out of class block function declaration"); } ; tfGuts: @@ -3368,8 +3484,7 @@ expr: // IEEE: part of expression/constant_expression/primary // // Indistinguishable from function_subroutine_call:method_call // | '$' { $$ = new AstUnbounded($1); } - | yNULL { $$ = new AstConst($1, AstConst::LogicFalse()); - BBUNSUP($1, "Unsupported: null expression"); } + | yNULL { $$ = new AstConst($1, AstConst::LogicFalse()); } // // IEEE: yTHIS // // See exprScope // @@ -3442,15 +3557,17 @@ exprScope: // scope and variable for use to inside an expression // // IEEE: [ implicit_class_handle . | class_scope | package_scope ] hierarchical_identifier select // // Or method_call_body without parenthesis // // See also varRefClassBit, which is the non-expr version of most of this - //UNSUP yTHIS { UNSUP } - idArrayed { $$ = $1; } + yTHIS { $$ = new AstConst($1, AstConst::LogicFalse()); + BBUNSUP($1, "Unsupported: this"); } + | idArrayed { $$ = $1; } | package_scopeIdFollows idArrayed { $$ = AstDot::newIfPkg($2->fileline(), $1, $2); } - //UNSUP class_scopeIdFollows idArrayed { UNSUP } + | class_scopeIdFollows idArrayed { $$ = $2; BBUNSUP($1, "Unsupported: scoped class reference"); } | ~l~expr '.' idArrayed { $$ = new AstDot($2,$1,$3); } // // expr below must be a "yTHIS" - //UNSUP ~l~expr '.' ySUPER { UNSUP } + | ~l~expr '.' ySUPER { $$ = $1; BBUNSUP($3, "Unsupported: super"); } // // Part of implicit_class_handle - //UNSUP ySUPER { UNSUP } + | ySUPER { $$ = new AstConst($1, AstConst::LogicFalse()); + BBUNSUP($1, "Unsupported: super"); } ; fexprScope: // exprScope, For use as first part of statement (disambiguates <=) @@ -3823,6 +3940,11 @@ idAny: // Any kind of identifier | yaID__ETC { $$ = $1; $$=$1; } ; +idRefDType: // IEEE: class_identifier or other type identifier + // Used where reference is needed + yaID__aTYPE { $$ = new AstRefDType($1, *$1); } + ; + idSVKwd: // Warn about non-forward compatible Verilog 2001 code // // yBIT, yBYTE won't work here as causes conflicts yDO { static string s = "do" ; $$ = &s; ERRSVKWD($1,*$$); $$=$1; } @@ -3850,12 +3972,12 @@ variable_lvalueConcList: // IEEE: part of variable_lvalue: '{' variable_l idClassSel: // Misc Ref to dotted, and/or arrayed, and/or bit-ranged variable idDotted { $$ = $1; } // // IEEE: [ implicit_class_handle . | package_scope ] hierarchical_variable_identifier select - //UNSUP yTHIS '.' idDotted { UNSUP } - //UNSUP ySUPER '.' idDotted { UNSUP } - //UNSUP yTHIS '.' ySUPER '.' idDotted { UNSUP } + | yTHIS '.' idDotted { $$ = $3; BBUNSUP($1, "Unsupported: this"); } + | ySUPER '.' idDotted { $$ = $3; BBUNSUP($1, "Unsupported: super"); } + | yTHIS '.' ySUPER '.' idDotted { $$ = $5; BBUNSUP($1, "Unsupported: this.super"); } // // Expanded: package_scope idDotted - //UNSUP class_scopeIdFollows idDotted { UNSUP } - //UNSUP package_scopeIdFollows idDotted { UNSUP } + | class_scopeIdFollows idDotted { $$ = $2; BBUNSUP($2, "Unsupported: package scoped id"); } + | package_scopeIdFollows idDotted { $$ = $2; BBUNSUP($2, "Unsupported: class scoped id"); } ; idDotted: @@ -3919,7 +4041,7 @@ strAsText: endLabelE: /* empty */ { $$ = NULL; $$=NULL; } | ':' idAny { $$ = $2; $$=$2; } - //UNSUP ':' yNEW__ETC { $$ = $2; $$=$2; } + | ':' yNEW__ETC { static string n = "new"; $$ = &n; $$=$2; } ; //************************************************ @@ -4037,6 +4159,65 @@ property_spec: // IEEE: property_spec //********************************************************************** // Class +class_declaration: // ==IEEE: part of class_declaration + // // IEEE-2012: using this also for interface_class_declaration + // // The classExtendsE rule relys on classFront having the + // // new class scope correct via classFront + classFront parameter_port_listE classExtendsE classImplementsE ';' + class_itemListE yENDCLASS endLabelE + { $$ = $1; $1->addMembersp($2); + $1->addMembersp($4); $1->addMembersp($6); + SYMP->popScope($$); + GRAMMARP->endLabel($7, $1, $8); } + ; + +classFront: // IEEE: part of class_declaration + classVirtualE yCLASS lifetimeE idAny/*class_identifier*/ + { $$ = new AstClass($2, *$4); + SYMP->pushNew($$); + BBUNSUP($2, "Unsupported: classes"); } + // // IEEE: part of interface_class_declaration + | yINTERFACE yCLASS lifetimeE idAny/*class_identifier*/ + { $$ = new AstClass($2, *$4); + SYMP->pushNew($$); + BBUNSUP($2, "Unsupported: interface classes"); } + ; + +classVirtualE: + /* empty */ { } + | yVIRTUAL__CLASS { BBUNSUP($1, "Unsupported: virtual classes"); } + ; + +classExtendsE: // IEEE: part of class_declaration + // // The classExtendsE rule relys on classFront having the + // // new class scope correct via classFront + /* empty */ { $$ = NULL; } + | yEXTENDS classExtendsList { $$ = $2; } + ; + +classExtendsList: // IEEE: part of class_declaration + classExtendsOne { $$ = $1; } + | classExtendsList ',' classExtendsOne { $$ = AstNode::addNextNull($1, $3); } + ; + +classExtendsOne: // IEEE: part of class_declaration + class_typeWithoutId { $$ = NULL; BBUNSUP($1, "Unsupported: extends"); } + // // IEEE: Might not be legal to have more than one set of parameters in an extends + | class_typeWithoutId '(' list_of_argumentsE ')' { $$ = NULL; BBUNSUP($1, "Unsupported: extends"); } + ; + +classImplementsE: // IEEE: part of class_declaration + // // All 1800-2012 + /* empty */ { $$ = NULL; } + | yIMPLEMENTS classImplementsList { $$ = $2; } + ; + +classImplementsList: // IEEE: part of class_declaration + // // All 1800-2012 + class_typeWithoutId { $$ = NULL; BBUNSUP($1, "Unsupported: implements class"); } + | classImplementsList ',' class_typeWithoutId { $$ = AstNode::addNextNull($1, $3); } + ; + //========= // Package scoping - to traverse the symbol table properly, the final identifer // must be included in the rules below. @@ -4049,13 +4230,48 @@ ps_id_etc: // package_scope + general id ps_type: // IEEE: ps_parameter_identifier | ps_type_identifier // Even though we looked up the type and have a AstNode* to it, // we can't fully resolve it because it may have been just a forward definition. - package_scopeIdFollowsE yaID__aTYPE { $$ = new AstRefDType($2, *$2); VN_CAST($$, RefDType)->packagep($1); } + package_scopeIdFollowsE idRefDType { $$ = $2; $2->packagep($1); } // // Simplify typing - from ps_covergroup_identifier - //UNSUP package_scopeIdFollowsE yaID__aCOVERGROUP { $$=$1; $$=$1+$2; } ; //=== Below rules assume special scoping per above +class_typeWithoutId: // as with class_typeWithoutId but allow yaID__aTYPE + // // and we thus don't need to resolve it in specified package + package_scopeIdFollowsE class_typeOneList { $$ = $2; $2->packagep($1); } + ; + +class_scopeWithoutId: // class_type standalone without following id + // // and we thus don't need to resolve it in specified package + class_scopeIdFollows { $$ = $1; } + ; + +class_scopeIdFollows: // IEEE: class_scope + type + // // IEEE: "class_type yP_COLONCOLON" + // // IMPORTANT: The lexer will parse the following ID to be in the found package + // // But class_type:'::' conflicts with class_scope:'::' so expand here + package_scopeIdFollowsE class_typeOneListColonIdFollows + { $$ = NULL; BBUNSUP(CRELINE(), "Unsupported: scoped class reference"); } + ; + +class_typeOneListColonIdFollows: // IEEE: class_type :: but allow yaID__aTYPE + class_typeOneList yP_COLONCOLON { BBUNSUP($2, "Unsupported: Hierarchical class references"); } + ; + +class_typeOneList: // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE + // // If you follow the rules down, class_type is really a list via ps_class_identifier + // // Must propagate scp up for next id + class_typeOne { $$ = $1; } + | class_typeOneListColonIdFollows class_typeOne { $$ = $2; /*UNSUP*/ } + ; + +class_typeOne: // IEEE: class_type: "id [ parameter_value_assignment ]" but allow yaID__aTYPE + // // If you follow the rules down, class_type is really a list via ps_class_identifier + // // Not listed in IEEE, but see bug627 any parameter type maybe a class + idRefDType parameter_value_assignmentE + { $$ = $1; if ($2) BBUNSUP($2->fileline(), "Unsupported: Parameterized classes"); } + ; + package_scopeIdFollowsE: // IEEE: [package_scope] // // IMPORTANT: The lexer will parse the following ID to be in the found package // // class_qualifier := [ yLOCAL '::' ] [ implicit_class_handle '.' class_scope ] @@ -4074,6 +4290,81 @@ package_scopeIdFollows: // IEEE: package_scope //UNSUP /*cont*/ yP_COLONCOLON { UNSUP } ; +//^^^========= + +class_itemListE: + /* empty */ { $$ = NULL; } + | class_itemList { $$ = $1; } + ; + +class_itemList: + class_item { $$ = $1; } + | class_itemList class_item { $$ = AstNode::addNextNull($1, $2); } + ; + +class_item: // ==IEEE: class_item + class_property { $$ = $1; } + | class_method { $$ = $1; } + //UNSUP class_constraint { $$ = $1; } + // + | class_declaration { $$ = NULL; BBUNSUP($1, "Unsupported: class within class"); } + | timeunits_declaration { $$ = $1; } + //UNSUP covergroup_declaration { $$ = $1; } + | local_parameter_declaration ';' { $$ = $1; BBUNSUP($2, "Unsupported: class parameters"); } // 1800-2009 + | parameter_declaration ';' { $$ = $1; BBUNSUP($2, "Unsupported: class parameters"); } // 1800-2009 + | ';' { $$ = NULL; } + // + | error ';' { $$ = NULL; } + ; + +class_method: // ==IEEE: class_method + memberQualResetListE task_declaration { $$ = $2; } + | memberQualResetListE function_declaration { $$ = $2; } + | yPURE yVIRTUAL__ETC memberQualResetListE method_prototype ';' + { $$ = NULL; BBUNSUP($1, "Unsupported: pure virtual class method"); } + | yEXTERN memberQualResetListE method_prototype ';' + { $$ = NULL; BBUNSUP($1, "Unsupported: extern class method prototype"); } + // // IEEE: "method_qualifierE class_constructor_declaration" + // // part of function_declaration + | yEXTERN memberQualResetListE class_constructor_prototype + { $$ = NULL; BBUNSUP($1, "Unsupported: extern class"); } + ; + +// IEEE: class_constructor_prototype +// See function_declaration + +class_item_qualifier: // IEEE: class_item_qualifier minus ySTATIC + // // IMPORTANT: yPROTECTED | yLOCAL is in a lex rule + yPROTECTED { $$ = NULL; } // Ignoring protected until implemented + | yLOCAL__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: 'local' class item"); } + | ySTATIC__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: 'static' class item"); } + ; + +memberQualResetListE: // Called from class_property for all qualifiers before yVAR + // // Also before method declarations, to prevent grammar conflict + // // Thus both types of qualifiers (method/property) are here + /*empty*/ { $$ = NULL; } + | memberQualList { $$ = $1; } + ; + +memberQualList: + memberQualOne { $$ = $1; } + | memberQualList memberQualOne { $$ = AstNode::addNextNull($1, $2); } + ; + +memberQualOne: // IEEE: property_qualifier + method_qualifier + // // Part of method_qualifier and property_qualifier + class_item_qualifier { $$ = $1; } + // // Part of method_qualifier only + | yVIRTUAL__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: virtual class member qualifier"); } + // // Part of property_qualifier only + | random_qualifier { $$ = NULL; } + // // Part of lifetime, but here as ySTATIC can be in different positions + | yAUTOMATIC { $$ = NULL; BBUNSUP($1, "Unsupported: automatic class member qualifier"); } + // // Part of data_declaration, but not in data_declarationVarFrontClass + | yCONST__ETC { $$ = NULL; BBUNSUP($1, "Unsupported: const class member qualifier"); } + ; + //********************************************************************** // Constraints diff --git a/test_regress/t/t_flag_wpedantic_bad.out b/test_regress/t/t_flag_wpedantic_bad.out index e59968538..26e8ff0ae 100644 --- a/test_regress/t/t_flag_wpedantic_bad.out +++ b/test_regress/t/t_flag_wpedantic_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_flag_wpedantic_bad.v:7: syntax error, unexpected global, expecting IDENTIFIER or do or final +%Error: t/t_flag_wpedantic_bad.v:7: syntax error, unexpected global, expecting IDENTIFIER or '=' or do or final reg global; ^ %Error: Exiting due to From 4afde8b4782337e8806cf2f4ec274d97535d9a01 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 15:18:55 -0500 Subject: [PATCH 41/90] Test class parsing (intended as part of last commit). --- test_regress/t/t_class_unsup_bad.out | 31 ++++++++++++++++++++++++ test_regress/t/t_class_unsup_bad.pl | 18 ++++++++++++++ test_regress/t/t_class_unsup_bad.v | 35 ++++++++++++++++++++++++++++ 3 files changed, 84 insertions(+) create mode 100644 test_regress/t/t_class_unsup_bad.out create mode 100755 test_regress/t/t_class_unsup_bad.pl create mode 100644 test_regress/t/t_class_unsup_bad.v diff --git a/test_regress/t/t_class_unsup_bad.out b/test_regress/t/t_class_unsup_bad.out new file mode 100644 index 000000000..7d5a2eb29 --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.out @@ -0,0 +1,31 @@ +%Error: t/t_class_unsup_bad.v:6: Unsupported: virtual interface +virtual interface vi_t vi; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:7: Unsupported: virtual data type +virtual vi_t vi2; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:12: Unsupported: classes +class C #(parameter P=1); +^~~~~ +%Error: t/t_class_unsup_bad.v:13: Unsupported: class parameters + localparam LOCPAR = 10; + ^ +%Error: t/t_class_unsup_bad.v:16: Unsupported: 'local' class item + local int loc; + ^~~~~ +%Error: t/t_class_unsup_bad.v:24: Unsupported: virtual class member qualifier + virtual function void func_virtual; endfunction + ^~~~~~~ +%Error: t/t_class_unsup_bad.v:25: Unsupported: pure virtual class method + pure virtual function void func_pure_virtual; endfunction + ^~~~ +%Error: t/t_class_unsup_bad.v:25: syntax error, unexpected endfunction + pure virtual function void func_pure_virtual; endfunction + ^~~~~~~~~~~ +%Error: t/t_class_unsup_bad.v:31: Unsupported: virtual classes +virtual class VC; +^~~~~~~ +%Error: t/t_class_unsup_bad.v:31: Unsupported: classes +virtual class VC; + ^~~~~ +%Error: Exiting due to diff --git a/test_regress/t/t_class_unsup_bad.pl b/test_regress/t/t_class_unsup_bad.pl new file mode 100755 index 000000000..49151b6cd --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.pl @@ -0,0 +1,18 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2019 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_class_unsup_bad.v b/test_regress/t/t_class_unsup_bad.v new file mode 100644 index 000000000..e509c5aa0 --- /dev/null +++ b/test_regress/t/t_class_unsup_bad.v @@ -0,0 +1,35 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Wilson Snyder. + +virtual interface vi_t vi; +virtual vi_t vi2; + +typedef class c; +typedef interface class ic; + +class C #(parameter P=1); + localparam LOCPAR = 10; + int imember; + + local int loc; + protected int prot; + + rand int irand; + randc int icrand; + + task classtask; endtask + function int classfunc; endfunction + virtual function void func_virtual; endfunction + pure virtual function void func_pure_virtual; endfunction + automatic function void func_automatic; endfunction + const function void func_const; endfunction + extern task exttask; +endclass + +virtual class VC; +endclass + +module t (/*AUTOARG*/); +endmodule From bacbb4cafdd3cf8b649a40ca1d23c3a94278ed79 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 15:19:22 -0500 Subject: [PATCH 42/90] Parse join_any/join_none still as unsupported. --- src/verilog.l | 4 ++-- src/verilog.y | 26 +++++++++++++++++++++++--- 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/src/verilog.l b/src/verilog.l index 0a082bd43..defc5430d 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -442,6 +442,8 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "inside" { FL; return yINSIDE; } "int" { FL; return yINT; } "interface" { FL; return yINTERFACE; } + "join_any" { FL; return yJOIN_ANY; } + "join_none" { FL; return yJOIN_NONE; } "local" { FL; return yLOCAL__LEX; } "logic" { FL; return yLOGIC; } "longint" { FL; return yLONGINT; } @@ -495,8 +497,6 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} "ignore_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "illegal_bins" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "intersect" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "join_any" { ERROR_RSVD_WORD("SystemVerilog 2005"); } - "join_none" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "matches" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randomize" { ERROR_RSVD_WORD("SystemVerilog 2005"); } "randsequence" { ERROR_RSVD_WORD("SystemVerilog 2005"); } diff --git a/src/verilog.y b/src/verilog.y index 510e67b57..e840cefda 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -406,6 +406,8 @@ class AstSenTree; %token yINTEGER "integer" %token yINTERFACE "interface" %token yJOIN "join" +%token yJOIN_ANY "join_any" +%token yJOIN_NONE "join_none" %token yLOCALPARAM "localparam" %token yLOCAL__COLONCOLON "local-then-::" %token yLOCAL__ETC "local" @@ -2464,8 +2466,24 @@ seq_block: // ==IEEE: seq_block ; par_block: // ==IEEE: par_block - par_blockFront blockDeclStmtList yJOIN endLabelE { $$=$1; $1->addStmtsp($2); SYMP->popScope($1); GRAMMARP->endLabel($4,$1,$4); } - | par_blockFront /**/ yJOIN endLabelE { $$=$1; SYMP->popScope($1); GRAMMARP->endLabel($3,$1,$3); } + par_blockFront blockDeclStmtList yJOIN endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } + | par_blockFront blockDeclStmtList yJOIN_ANY endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN_ANY endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } + | par_blockFront blockDeclStmtList yJOIN_NONE endLabelE + { $$ = $1; $1->addStmtsp($2); + SYMP->popScope($1); GRAMMARP->endLabel($4, $1, $4); } + | par_blockFront /**/ yJOIN_NONE endLabelE + { $$ = $1; + SYMP->popScope($1); GRAMMARP->endLabel($3, $1, $3); } ; seq_blockFront: // IEEE: part of seq_block @@ -2475,7 +2493,9 @@ seq_blockFront: // IEEE: part of seq_block par_blockFront: // IEEE: part of par_block yFORK { $$ = new AstBegin($1, "", NULL); SYMP->pushNew($$); - BBUNSUP($1, "Unsupported: fork statements"); } + BBUNSUP($1, "Unsupported: fork statements"); + // When support, record or BBUNSUP yJOIN_ANY/yJOIN_NONE + } | yFORK ':' idAny/*new-block_identifier*/ { $$ = new AstBegin($3, *$3, NULL); SYMP->pushNew($$); BBUNSUP($1, "Unsupported: fork statements"); } ; From 0f0c3d46849b4f8d232c0571d9f21562348b9fe8 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 16:26:59 -0500 Subject: [PATCH 43/90] Internals: Copy into parser Verilog-Perl rules as comments. No functional change. --- src/verilog.y | 581 +++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 579 insertions(+), 2 deletions(-) diff --git a/src/verilog.y b/src/verilog.y index e840cefda..9337ebbc1 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -1558,7 +1558,7 @@ var_data_type: // ==IEEE: var_data_type | yVAR implicit_typeE { $$ = $2; } ; -//UNSUP type_reference: // ==IEEE: type_reference +//UNSUP type_reference: // ==IEEE: type_reference //UNSUP yTYPE '(' exprOrDataType ')' { UNSUP } //UNSUP ; @@ -1825,6 +1825,11 @@ implicit_typeE: // IEEE: part of *data_type_or_implicit | signing { $$ = new AstBasicDType($1, LOGIC_IMPLICIT, $1); } ; +//UNSUPassertion_variable_declaration: // IEEE: assertion_variable_declaration +//UNSUP // // IEEE: var_data_type expanded +//UNSUP var_data_type list_of_variable_decl_assignments ';' { } +//UNSUP ; + type_declaration: // ==IEEE: type_declaration // // Use idAny, as we can redeclare a typedef on an existing typedef yTYPEDEF data_type idAny variable_dimensionListE dtypeAttrListE ';' @@ -2202,6 +2207,11 @@ rangeList: // IEEE: {packed_dimension} | rangeList anyrange { $$ = $1; $1->addNext($2); } ; +//UNSUPbit_selectE: // IEEE: constant_bit_select (IEEE included empty) +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '[' constExpr ']' { $$=$1; $$ = "["+$2+"]"; } +//UNSUP ; + // IEEE: select // Merged into more general idArray @@ -4068,14 +4078,97 @@ endLabelE: // Clocking clocking_declaration: // IEEE: clocking_declaration (INCOMPLETE) + //UNSUP: vvv remove this -- vastly simplified grammar: yDEFAULT yCLOCKING '@' '(' senitemEdge ')' ';' yENDCLOCKING { $$ = new AstClocking($2, $5, NULL); } - //UNSUP: Vastly simplified grammar + //UNSUP: ^^^ remove this -- vastly simplified grammar: + //UNSUP clockingFront clocking_event ';' + //UNSUP clocking_itemListE yENDCLOCKING endLabelE { SYMP->popScope($$); } ; +//UNSUPclockingFront: // IEEE: part of class_declaration +//UNSUP yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP | yDEFAULT yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yDEFAULT yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP | yGLOBAL__CLOCKING yCLOCKING { PARSEP->symPushNewAnon(VAstType::CLOCKING); } +//UNSUP | yGLOBAL__CLOCKING yCLOCKING idAny/*clocking_identifier*/ { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPclocking_event: // ==IEEE: clocking_event +//UNSUP '@' id { } +//UNSUP | '@' '(' event_expression ')' { } +//UNSUP ; + +//UNSUPclocking_itemListE: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | clocking_itemList { $$ = $1; } +//UNSUP ; + +//UNSUPclocking_itemList: // IEEE: [ clocking_item ] +//UNSUP clocking_item { $$ = $1; } +//UNSUP | clocking_itemList clocking_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPclocking_item: // ==IEEE: clocking_item +//UNSUP yDEFAULT default_skew ';' { } +//UNSUP | clocking_direction list_of_clocking_decl_assign ';' { } +//UNSUP | assertion_item_declaration { } +//UNSUP ; + +//UNSUPdefault_skew: // ==IEEE: default_skew +//UNSUP yINPUT clocking_skew { } +//UNSUP | yOUTPUT clocking_skew { } +//UNSUP | yINPUT clocking_skew yOUTPUT clocking_skew { } +//UNSUP ; + +//UNSUPclocking_direction: // ==IEEE: clocking_direction +//UNSUP yINPUT clocking_skewE { } +//UNSUP | yOUTPUT clocking_skewE { } +//UNSUP | yINPUT clocking_skewE yOUTPUT clocking_skewE { } +//UNSUP | yINOUT { } +//UNSUP ; + +//UNSUPlist_of_clocking_decl_assign: // ==IEEE: list_of_clocking_decl_assign +//UNSUP clocking_decl_assign { $$ = $1; } +//UNSUP | list_of_clocking_decl_assign ',' clocking_decl_assign { } +//UNSUP ; + +//UNSUPclocking_decl_assign: // ==IEEE: clocking_decl_assign +//UNSUP idAny/*new-signal_identifier*/ { $$ = $1; } +//UNSUP | idAny/*new-signal_identifier*/ '=' expr { } +//UNSUP ; + +//UNSUPclocking_skewE: // IEEE: [clocking_skew] +//UNSUP /* empty */ { $$ = NULL;} +//UNSUP | clocking_skew { $$ = $1; } +//UNSUP ; + +//UNSUPclocking_skew: // ==IEEE: clocking_skew +//UNSUP yPOSEDGE { } +//UNSUP | yPOSEDGE delay_control { } +//UNSUP | yNEGEDGE { } +//UNSUP | yNEGEDGE delay_control { } +//UNSUP | yEDGE { NEED_S09($1,"edge"); } +//UNSUP | yEDGE delay_control { NEED_S09($1,"edge"); } +//UNSUP | delay_control { $$ = $1; } +//UNSUP ; + +//UNSUPcycle_delay: // ==IEEE: cycle_delay +//UNSUP yP_POUNDPOUND yaINTNUM { } +//UNSUP | yP_POUNDPOUND id { } +//UNSUP | yP_POUNDPOUND '(' expr ')' { } +//UNSUP ; + //************************************************ // Asserts +//UNSUPassertion_item_declaration: // ==IEEE: assertion_item_declaration +//UNSUP property_declaration { $$ = $1; } +//UNSUP | sequence_declaration { $$ = $1; } +//UNSUP | let_declaration { $$ = $1; } +//UNSUP ; + assertion_item: // ==IEEE: assertion_item concurrent_assertion_item { $$ = $1; } | deferred_immediate_assertion_item @@ -4134,6 +4227,10 @@ deferred_immediate_assertion_statement: // ==IEEE: deferred_immediate_ass | yCOVER final_zero '(' expr ')' stmt { $$ = new AstCover($1, $4, $6, true); } ; +//UNSUPexpect_property_statement: // ==IEEE: expect_property_statement +//UNSUP yEXPECT '(' property_spec ')' action_block { } +//UNSUP ; + concurrent_assertion_item: // IEEE: concurrent_assertion_item concurrent_assertion_statement { $$ = $1; } | id/*block_identifier*/ ':' concurrent_assertion_statement { $$ = new AstBegin($1, *$1, $3); } @@ -4170,12 +4267,411 @@ property_spec: // IEEE: property_spec //************************************************ // Covergroup +//UNSUPcovergroup_declaration: // ==IEEE: covergroup_declaration +//UNSUP covergroup_declarationFront coverage_eventE ';' coverage_spec_or_optionListE +//UNSUP yENDGROUP endLabelE +//UNSUP { PARSEP->endgroupCb($5,$5); +//UNSUP SYMP->popScope($$); } +//UNSUP | covergroup_declarationFront '(' tf_port_listE ')' coverage_eventE ';' coverage_spec_or_optionListE +//UNSUP yENDGROUP endLabelE +//UNSUP { PARSEP->endgroupCb($8,$8); +//UNSUP SYMP->popScope($$); } +//UNSUP ; + +//UNSUPcovergroup_declarationFront: // IEEE: part of covergroup_declaration +//UNSUP yCOVERGROUP idAny +//UNSUP { SYMP->pushNew($$); +//UNSUP PARSEP->covergroupCb($1,$1,$2); } +//UNSUP ; + +//UNSUPcgexpr: // IEEE-2012: covergroup_expression, before that just expression +//UNSUP expr { $$ = $1; } +//UNSUP ; + +//UNSUPcoverage_spec_or_optionListE: // IEEE: [{coverage_spec_or_option}] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | coverage_spec_or_optionList { $$ = $1; } +//UNSUP ; + +//UNSUPcoverage_spec_or_optionList: // IEEE: {coverage_spec_or_option} +//UNSUP coverage_spec_or_option { $$ = $1; } +//UNSUP | coverage_spec_or_optionList coverage_spec_or_option { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPcoverage_spec_or_option: // ==IEEE: coverage_spec_or_option +//UNSUP // // IEEE: coverage_spec +//UNSUP cover_point { $$ = $1; } +//UNSUP | cover_cross { $$ = $1; } +//UNSUP | coverage_option ';' { $$ = $1; } +//UNSUP | error { $$ = NULL; } +//UNSUP ; + +//UNSUPcoverage_option: // ==IEEE: coverage_option +//UNSUP // // option/type_option aren't really keywords +//UNSUP id/*yOPTION | yTYPE_OPTION*/ '.' idAny/*member_identifier*/ '=' expr { } +//UNSUP ; + +//UNSUPcover_point: // ==IEEE: cover_point +//UNSUP /**/ yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP // // IEEE-2012: class_scope before an ID +//UNSUP | /**/ /**/ /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id id data_type id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | class_scope_id id /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP | /**/ id /**/ id ':' yCOVERPOINT expr iffE bins_or_empty { } +//UNSUP // // IEEE-2012: +//UNSUP | bins_or_empty { $$ = $1; } +//UNSUP ; + +//UNSUPiffE: // IEEE: part of cover_point, others +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | yIFF '(' expr ')' { } +//UNSUP ; + +//UNSUPbins_or_empty: // ==IEEE: bins_or_empty +//UNSUP '{' bins_or_optionsList '}' { $$ = $2; } +//UNSUP | '{' '}' { $$ = NULL; } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPbins_or_optionsList: // IEEE: { bins_or_options ';' } +//UNSUP bins_or_options ';' { $$ = $1; } +//UNSUP | bins_or_optionsList bins_or_options ';' { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPbins_or_options: // ==IEEE: bins_or_options +//UNSUP // // Superset of IEEE - we allow []'s in more places +//UNSUP coverage_option { $$ = $1; } +//UNSUP // // Can't use wildcardE as results in conflicts +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' iffE { } +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr ')' iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' '{' open_range_list '}' yWITH__CUR '{' cgexpr ')' iffE { } +//UNSUP // +//UNSUP // // cgexpr part of trans_list +//UNSUP // +//UNSUP | /**/ bins_keyword id/*bin_identifier*/ bins_orBraE '=' trans_list iffE { } +//UNSUP | yWILDCARD bins_keyword id/*bin_identifier*/ bins_orBraE '=' trans_list iffE { } +//UNSUP // +//UNSUP | bins_keyword id/*bin_identifier*/ bins_orBraE '=' yDEFAULT iffE { } +//UNSUP // +//UNSUP | bins_keyword id/*bin_identifier*/ bins_orBraE '=' yDEFAULT ySEQUENCE iffE { } +//UNSUP ; + +//UNSUPbins_orBraE: // IEEE: part of bins_or_options: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '[' ']' { } +//UNSUP | '[' cgexpr ']' { } +//UNSUP ; + +//UNSUPbins_keyword: // ==IEEE: bins_keyword +//UNSUP yBINS { } +//UNSUP | yILLEGAL_BINS { } +//UNSUP | yIGNORE_BINS { } +//UNSUP ; + +//UNSUPcovergroup_range_list: // ==IEEE: covergroup_range_list +//UNSUP covergroup_value_range { $$ = $1; } +//UNSUP | covergroup_range_list ',' covergroup_value_range { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPtrans_list: // ==IEEE: trans_list +//UNSUP '(' trans_set ')' { $$ = $2; } +//UNSUP | trans_list ',' '(' trans_set ')' { } +//UNSUP ; + +//UNSUPtrans_set: // ==IEEE: trans_set +//UNSUP trans_range_list { $$ = $1; } +//UNSUP // // Note the { => } in the grammer, this is really a list +//UNSUP | trans_set yP_EQGT trans_range_list { } +//UNSUP ; + +//UNSUPtrans_range_list: // ==IEEE: trans_range_list +//UNSUP trans_item { $$ = $1; } +//UNSUP | trans_item yP_BRASTAR repeat_range ']' { } +//UNSUP | trans_item yP_BRAMINUSGT repeat_range ']' { } +//UNSUP | trans_item yP_BRAEQ repeat_range ']' { } +//UNSUP ; + +//UNSUPtrans_item: // ==IEEE: range_list +//UNSUP covergroup_range_list { $$ = $1; } +//UNSUP ; + +//UNSUPrepeat_range: // ==IEEE: repeat_range +//UNSUP cgexpr { $$ = $1; } +//UNSUP | cgexpr ':' cgexpr { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPcover_cross: // ==IEEE: cover_cross +//UNSUP id/*cover_point_identifier*/ ':' yCROSS list_of_cross_items iffE cross_body { } +//UNSUP | /**/ yCROSS list_of_cross_items iffE cross_body { } +//UNSUP ; + +//UNSUPlist_of_cross_items: // ==IEEE: list_of_cross_items +//UNSUP cross_item ',' cross_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP | cross_item ',' cross_item ',' cross_itemList { } +//UNSUP ; + +//UNSUPcross_itemList: // IEEE: part of list_of_cross_items +//UNSUP cross_item { $$ = NULL; } +//UNSUP | cross_itemList ',' cross_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPcross_item: // ==IEEE: cross_item +//UNSUP idAny/*cover_point_identifier or variable_identifier*/ { $$ = $1; } +//UNSUP ; + +//UNSUPcross_body: // ==IEEE: cross_body +//UNSUP '{' '}' { $$ = NULL; } +//UNSUP // // IEEE-2012: No semicolon here, mistake in spec +//UNSUP | '{' cross_body_itemSemiList '}' { $$ = $1; } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPcross_body_itemSemiList: // IEEE: part of cross_body +//UNSUP cross_body_item ';' { $$ = $1; } +//UNSUP | cross_body_itemSemiList cross_body_item ';' { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPcross_body_item: // ==IEEE: cross_body_item +//UNSUP // // IEEE: our semicolon is in the list +//UNSUP bins_selection_or_option { $$ = $1; } +//UNSUP | function_declaration { $$ = $1; } +//UNSUP ; + +//UNSUPbins_selection_or_option: // ==IEEE: bins_selection_or_option +//UNSUP coverage_option { $$ = $1; } +//UNSUP | bins_selection { $$ = $1; } +//UNSUP ; + +//UNSUPbins_selection: // ==IEEE: bins_selection +//UNSUP bins_keyword idAny/*new-bin_identifier*/ '=' select_expression iffE { } +//UNSUP ; + +//UNSUPselect_expression: // ==IEEE: select_expression +//UNSUP // // IEEE: select_condition expanded here +//UNSUP yBINSOF '(' bins_expression ')' { } +//UNSUP | yBINSOF '(' bins_expression ')' yINTERSECT '{' covergroup_range_list '}' { } +//UNSUP | yWITH__PAREN '(' cgexpr ')' { } +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP yWITH__PAREN '(' cgexpr ')' yMATCHES cgexpr { } +//UNSUP | '!' yBINSOF '(' bins_expression ')' { } +//UNSUP | '!' yBINSOF '(' bins_expression ')' yINTERSECT '{' covergroup_range_list '}' { } +//UNSUP | '!' yWITH__PAREN '(' cgexpr ')' { } +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP '!' yWITH__PAREN '(' cgexpr ')' yMATCHES cgexpr { } +//UNSUP | select_expression yP_ANDAND select_expression { } +//UNSUP | select_expression yP_OROR select_expression { } +//UNSUP | '(' select_expression ')' { $$ = $2; } +//UNSUP // // IEEE-2012: cross_identifier +//UNSUP // // Part of covergroup_expression - generic identifier +//UNSUP // // IEEE-2012: Need clarification as to precedence +//UNSUP //UNSUP covergroup_expression [ yMATCHES covergroup_expression ] +//UNSUP ; + +//UNSUPbins_expression: // ==IEEE: bins_expression +//UNSUP // // "cover_point_identifier" and "variable_identifier" look identical +//UNSUP id/*variable_identifier or cover_point_identifier*/ { $$ = $1; } +//UNSUP | id/*cover_point_identifier*/ '.' idAny/*bins_identifier*/ { } +//UNSUP ; + +//UNSUPcoverage_eventE: // IEEE: [ coverage_event ] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | clocking_event { $$ = $1; } +//UNSUP | yWITH__ETC function idAny/*"sample"*/ '(' tf_port_listE ')' { } +//UNSUP | yP_ATAT '(' block_event_expression ')' { } +//UNSUP ; + +//UNSUPblock_event_expression: // ==IEEE: block_event_expression +//UNSUP block_event_expressionTerm { $$ = $1; } +//UNSUP | block_event_expression yOR block_event_expressionTerm { } +//UNSUP ; + +//UNSUPblock_event_expressionTerm: // IEEE: part of block_event_expression +//UNSUP yBEGIN hierarchical_btf_identifier { } +//UNSUP | yEND hierarchical_btf_identifier { } +//UNSUP ; + +//UNSUPhierarchical_btf_identifier: // ==IEEE: hierarchical_btf_identifier +//UNSUP // // hierarchical_tf_identifier + hierarchical_block_identifier +//UNSUP hierarchical_identifier/*tf_or_block*/ { $$ = $1; } +//UNSUP // // method_identifier +//UNSUP | hierarchical_identifier class_scope_id { } +//UNSUP | hierarchical_identifier id { } +//UNSUP ; + //********************************************************************** // Randsequence +//UNSUPrandsequence_statement: // ==IEEE: randsequence_statement +//UNSUP yRANDSEQUENCE '(' ')' productionList yENDSEQUENCE { } +//UNSUP | yRANDSEQUENCE '(' id/*production_identifier*/ ')' productionList yENDSEQUENCE { } +//UNSUP ; + +//UNSUPproductionList: // IEEE: production+ +//UNSUP production { $$ = $1; } +//UNSUP | productionList production { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPproduction: // ==IEEE: production +//UNSUP productionFront ':' rs_ruleList ';' { } +//UNSUP ; + +//UNSUPproductionFront: // IEEE: part of production +//UNSUP function_data_type id/*production_identifier*/ { } +//UNSUP | /**/ id/*production_identifier*/ { $$ = $1; } +//UNSUP | function_data_type id/*production_identifier*/ '(' tf_port_listE ')' { } +//UNSUP | /**/ id/*production_identifier*/ '(' tf_port_listE ')' { } +//UNSUP ; + +//UNSUPrs_ruleList: // IEEE: rs_rule+ part of production +//UNSUP rs_rule { $$ = $1; } +//UNSUP | rs_ruleList '|' rs_rule { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPrs_rule: // ==IEEE: rs_rule +//UNSUP rs_production_list { $$ = $1; } +//UNSUP | rs_production_list yP_COLONEQ weight_specification { } +//UNSUP | rs_production_list yP_COLONEQ weight_specification rs_code_block { } +//UNSUP ; + +//UNSUPrs_production_list: // ==IEEE: rs_production_list +//UNSUP rs_prodList { $$ = $1; } +//UNSUP | yRAND yJOIN /**/ production_item production_itemList { } +//UNSUP | yRAND yJOIN '(' expr ')' production_item production_itemList { } +//UNSUP ; + +//UNSUPweight_specification: // ==IEEE: weight_specification +//UNSUP yaINTNUM { $$ = $1; } +//UNSUP | idClassSel/*ps_identifier*/ { $$ = $1; } +//UNSUP | '(' expr ')' { $$ = $2; } +//UNSUP ; + +//UNSUPrs_code_block: // ==IEEE: rs_code_block +//UNSUP '{' '}' { $$ = NULL; } +//UNSUP | '{' rs_code_blockItemList '}' { $$ = $2; } +//UNSUP ; + +//UNSUPrs_code_blockItemList: // IEEE: part of rs_code_block +//UNSUP rs_code_blockItem { $$ = $1; } +//UNSUP | rs_code_blockItemList rs_code_blockItem { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_code_blockItem: // IEEE: part of rs_code_block +//UNSUP data_declaration { $$ = $1; } +//UNSUP | stmt { $$ = $1; } +//UNSUP ; + +//UNSUPrs_prodList: // IEEE: rs_prod+ +//UNSUP rs_prod { $$ = $1; } +//UNSUP | rs_prodList rs_prod { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_prod: // ==IEEE: rs_prod +//UNSUP production_item { $$ = $1; } +//UNSUP | rs_code_block { $$ = $1; } +//UNSUP // // IEEE: rs_if_else +//UNSUP | yIF '(' expr ')' production_item %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr ')' production_item yELSE production_item { } +//UNSUP // // IEEE: rs_repeat +//UNSUP | yREPEAT '(' expr ')' production_item { } +//UNSUP // // IEEE: rs_case +//UNSUP | yCASE '(' expr ')' rs_case_itemList yENDCASE { } +//UNSUP ; + +//UNSUPproduction_itemList: // IEEE: production_item+ +//UNSUP production_item { $$ = $1; } +//UNSUP | production_itemList production_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPproduction_item: // ==IEEE: production_item +//UNSUP id/*production_identifier*/ { $$ = $1; } +//UNSUP | id/*production_identifier*/ '(' list_of_argumentsE ')' { } +//UNSUP ; + +//UNSUPrs_case_itemList: // IEEE: rs_case_item+ +//UNSUP rs_case_item { $$ = $1; } +//UNSUP | rs_case_itemList rs_case_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPrs_case_item: // ==IEEE: rs_case_item +//UNSUP caseCondList ':' production_item ';' { } +//UNSUP | yDEFAULT production_item ';' { } +//UNSUP | yDEFAULT ':' production_item ';' { } +//UNSUP ; + //********************************************************************** // Checker +//UNSUPchecker_declaration: // ==IEEE: part of checker_declaration +//UNSUP checkerFront checker_port_listE ';' +//UNSUP checker_or_generate_itemListE yENDCHECKER endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPcheckerFront: // IEEE: part of checker_declaration +//UNSUP yCHECKER idAny/*checker_identifier*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPchecker_port_listE: // IEEE: [ ( [ checker_port_list ] ) ] +//UNSUP // // checker_port_item is basically the same as property_port_item, minus yLOCAL:: +//UNSUP // // Want to bet 1800-2012 adds local to checkers? +//UNSUP property_port_listE { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_itemListE: // IEEE: [{ checker_or_generate_itemList }] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | checker_or_generate_itemList { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_itemList: // IEEE: { checker_or_generate_itemList } +//UNSUP checker_or_generate_item { $$ = $1; } +//UNSUP | checker_or_generate_itemList checker_or_generate_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPchecker_or_generate_item: // ==IEEE: checker_or_generate_item +//UNSUP checker_or_generate_item_declaration { $$ = $1; } +//UNSUP | initial_construct { $$ = $1; } +//UNSUP // // IEEE: checker_construct +//UNSUP | yALWAYS stmtBlock { } +//UNSUP | final_construct { $$ = $1; } +//UNSUP | assertion_item { $$ = $1; } +//UNSUP | continuous_assign { $$ = $1; } +//UNSUP | checker_generate_item { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_or_generate_item_declaration: // ==IEEE: checker_or_generate_item_declaration +//UNSUP data_declaration { $$ = $1; } +//UNSUP | yRAND data_declaration { } +//UNSUP | function_declaration { $$ = $1; } +//UNSUP | checker_declaration { $$ = $1; } +//UNSUP | assertion_item_declaration { $$ = $1; } +//UNSUP | covergroup_declaration { $$ = $1; } +//UNSUP // // IEEE deprecated: overload_declaration +//UNSUP | genvar_declaration { $$ = $1; } +//UNSUP | clocking_declaration { $$ = $1; } +//UNSUP | yDEFAULT yCLOCKING id/*clocking_identifier*/ ';' { } +//UNSUP | yDEFAULT yDISABLE yIFF expr/*expression_or_dist*/ ';' { } +//UNSUP | ';' { $$ = NULL; } +//UNSUP ; + +//UNSUPchecker_generate_item: // ==IEEE: checker_generate_item +//UNSUP // // Specialized for checker so need "c_" prefixes here +//UNSUP c_loop_generate_construct { $$ = $1; } +//UNSUP | c_conditional_generate_construct { $$ = $1; } +//UNSUP | c_generate_region { $$ = $1; } +//UNSUP // +//UNSUP | elaboration_system_task { $$ = $1; } +//UNSUP ; + +//UNSUPchecker_instantiation: +//UNSUP // // Only used for procedural_assertion_item's +//UNSUP // // Version in concurrent_assertion_item looks like etcInst +//UNSUP // // Thus instead of *_checker_port_connection we can use etcInst's cellpinList +//UNSUP id/*checker_identifier*/ id '(' cellpinList ')' ';' { } +//UNSUP ; + //********************************************************************** // Class @@ -4388,6 +4884,87 @@ memberQualOne: // IEEE: property_qualifier + method_qualifier //********************************************************************** // Constraints +//UNSUPclass_constraint: // ==IEEE: class_constraint +//UNSUP // // IEEE: constraint_declaration +//UNSUP constraintStaticE yCONSTRAINT idAny constraint_block { } +//UNSUP // // IEEE: constraint_prototype + constraint_prototype_qualifier +//UNSUP | constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP | yEXTERN constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP | yPURE constraintStaticE yCONSTRAINT idAny ';' { } +//UNSUP ; + +//UNSUPconstraint_block: // ==IEEE: constraint_block +//UNSUP '{' constraint_block_itemList '}' { $$ = $1; } +//UNSUP ; + +//UNSUPconstraint_block_itemList: // IEEE: { constraint_block_item } +//UNSUP constraint_block_item { $$ = $1; } +//UNSUP | constraint_block_itemList constraint_block_item { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPconstraint_block_item: // ==IEEE: constraint_block_item +//UNSUP ySOLVE solve_before_list yBEFORE solve_before_list ';' { } +//UNSUP | constraint_expression { $$ = $1; } +//UNSUP ; + +//UNSUPsolve_before_list: // ==IEEE: solve_before_list +//UNSUP constraint_primary { $$ = $1; } +//UNSUP | solve_before_list ',' constraint_primary { } +//UNSUP ; + +//UNSUPconstraint_primary: // ==IEEE: constraint_primary +//UNSUP // // exprScope more general than: [ implicit_class_handle '.' | class_scope ] hierarchical_identifier select +//UNSUP exprScope { $$ = $1; } +//UNSUP ; + +//UNSUPconstraint_expressionList: // ==IEEE: { constraint_expression } +//UNSUP constraint_expression { $$ = $1; } +//UNSUP | constraint_expressionList constraint_expression { $$ = AstNode::addNextNull($1, $2); } +//UNSUP ; + +//UNSUPconstraint_expression: // ==IEEE: constraint_expression +//UNSUP expr/*expression_or_dist*/ ';' { $$ = $1; } +//UNSUP // // 1800-2012: +//UNSUP | ySOFT expr/*expression_or_dist*/ ';' { } +//UNSUP // // 1800-2012: +//UNSUP // // IEEE: uniqueness_constraint ';' +//UNSUP | yUNIQUE '{' open_range_list '}' { } +//UNSUP // // IEEE: expr yP_MINUSGT constraint_set +//UNSUP // // Conflicts with expr:"expr yP_MINUSGT expr"; rule moved there +//UNSUP // +//UNSUP | yIF '(' expr ')' constraint_set %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr ')' constraint_set yELSE constraint_set { } +//UNSUP // // IEEE says array_identifier here, but dotted accepted in VMM + 1800-2009 +//UNSUP | yFOREACH '(' idClassForeach/*array_id[loop_variables]*/ ')' constraint_set { } +//UNSUP // // soft is 1800-2012 +//UNSUP | yDISABLE ySOFT expr/*constraint_primary*/ ';' { } +//UNSUP ; + +//UNSUPconstraint_set: // ==IEEE: constraint_set +//UNSUP constraint_expression { $$ = $1; } +//UNSUP | '{' constraint_expressionList '}' { $$ = $2; } +//UNSUP ; + +//UNSUPdist_list: // ==IEEE: dist_list +//UNSUP dist_item { $$ = $1; } +//UNSUP | dist_list ',' dist_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPdist_item: // ==IEEE: dist_item + dist_weight +//UNSUP value_range { $$ = $1; } +//UNSUP | value_range yP_COLONEQ expr { } +//UNSUP | value_range yP_COLONDIV expr { } +//UNSUP ; + +//UNSUPextern_constraint_declaration: // ==IEEE: extern_constraint_declaration +//UNSUP constraintStaticE yCONSTRAINT class_scope_id constraint_block { } +//UNSUP ; + +//UNSUPconstraintStaticE: // IEEE: part of extern_constraint_declaration +//UNSUP /* empty */ { $$ = false; } +//UNSUP | ySTATIC__CONSTRAINT { $$ = true; } +//UNSUP ; + //********************************************************************** // VLT Files From 9b998cf6b360a276d25625d0491f2c4ba7326400 Mon Sep 17 00:00:00 2001 From: Peter Monsson Date: Mon, 23 Dec 2019 16:49:18 -0500 Subject: [PATCH 44/90] Support implication operator "|->" in assertions, #2069. Signed-off-by: Wilson Snyder --- Changes | 2 + src/verilog.y | 16 ++++-- test_regress/t/t_assert_implication.pl | 21 ++++++++ test_regress/t/t_assert_implication.v | 57 ++++++++++++++++++++++ test_regress/t/t_assert_implication_bad.pl | 26 ++++++++++ 5 files changed, 118 insertions(+), 4 deletions(-) create mode 100755 test_regress/t/t_assert_implication.pl create mode 100644 test_regress/t/t_assert_implication.v create mode 100755 test_regress/t/t_assert_implication_bad.pl diff --git a/Changes b/Changes index ef975dbac..97b1fc27c 100644 --- a/Changes +++ b/Changes @@ -6,6 +6,8 @@ The contributors that suggested a given feature are shown in []. Thanks! *** Support bounded queues. +*** Support implication operator "|->" in assertions, #2069. [Peter Monsson] + *** Support string compare, ato*, etc methods, #1606. [Yutetsu TAKATSUKASA] **** Support immediate cover statements. diff --git a/src/verilog.y b/src/verilog.y index 9337ebbc1..03bcb9262 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -4254,13 +4254,21 @@ elseStmtBlock: // Part of concurrent_assertion_statement property_spec: // IEEE: property_spec //UNSUP: This rule has been super-specialized to what is supported now - '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' expr + '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' property_expr { $$ = new AstPropClocked($1, $3, $8, $10); } - | '@' '(' senitemEdge ')' expr { $$ = new AstPropClocked($1, $3, NULL, $5); } - | yDISABLE yIFF '(' expr ')' expr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } - | expr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } + | '@' '(' senitemEdge ')' property_expr { $$ = new AstPropClocked($1, $3, NULL, $5); } + | yDISABLE yIFF '(' expr ')' property_expr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } + | property_expr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } ; +property_expr: // IEEE: property_expr + //UNSUP: This rule has been super-specialized to what is supported now + expr yP_ORMINUSGT property_expr { $$ = new AstLogOr($2,new AstLogNot($2,$1),$3); } + //UNSUP expr yP_OREQGT property_expr { $$ = new AstLogOr($2,new AstLogNot($2,new AstPast($2,$1, NULL)),$3); } // This handles disable iff in the past time step incorrectly + | expr { $$ = $1; } + ; + + //************************************************ // Let diff --git a/test_regress/t/t_assert_implication.pl b/test_regress/t/t_assert_implication.pl new file mode 100755 index 000000000..fd994540c --- /dev/null +++ b/test_regress/t/t_assert_implication.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + verilator_flags2 => ['--assert --cc'], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_assert_implication.v b/test_regress/t/t_assert_implication.v new file mode 100644 index 000000000..686d65643 --- /dev/null +++ b/test_regress/t/t_assert_implication.v @@ -0,0 +1,57 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2019 by Peter Monsson. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk; + integer cyc; initial cyc=1; + + Test test (/*AUTOINST*/ + // Inputs + .clk (clk)); + + always @ (posedge clk) begin + if (cyc!=0) begin + cyc <= cyc + 1; + if (cyc==10) begin + $write("*-* All Finished *-*\n"); + $finish; + end + end + end + +endmodule + +module Test + ( + input clk + ); + +`ifdef FAIL_ASSERT_1 + assert property ( + @(posedge clk) + 1 |-> 0 + ) else $display("[%0t] wrong implication", $time); +`endif + + assert property ( + @(posedge clk) + 1 |-> 1 + ); + + assert property ( + @(posedge clk) + 0 |-> 0 + ); + + assert property ( + @(posedge clk) + 0 |-> 1 + ); + +endmodule diff --git a/test_regress/t/t_assert_implication_bad.pl b/test_regress/t/t_assert_implication_bad.pl new file mode 100755 index 000000000..eb6f2f7e3 --- /dev/null +++ b/test_regress/t/t_assert_implication_bad.pl @@ -0,0 +1,26 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +top_filename("t/t_assert_implication.v"); + +compile( + v_flags2 => ['+define+FAIL_ASSERT_1'], + verilator_flags2 => ['--assert --cc'], + ); + +execute( + ); + +# We expect to get a message when this assert fires: +file_grep($Self->{run_log_filename}, qr/wrong implication/); + +ok(1); +1; From f23a7bfdd703d43d4bff99219f700fa3f0c6dacf Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 17:34:43 -0500 Subject: [PATCH 45/90] Tests: Check for carriage returns --- test_regress/t/t_dist_tabs.pl | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/test_regress/t/t_dist_tabs.pl b/test_regress/t/t_dist_tabs.pl index 272b45c8f..606921a22 100755 --- a/test_regress/t/t_dist_tabs.pl +++ b/test_regress/t/t_dist_tabs.pl @@ -61,6 +61,10 @@ if (!-r "$root/.git") { } elsif ($line =~ m!^\+(.*)!) { ++$lineno; + if ($line =~ /\r/) { + $summary = "File modification adds carriage return (remove them):" if !$summary; + $warns{$file} = "File modification adds carriage return (remove them): $file:$lineno"; + } my $len = length($1); if ($len >= 100 && $file !~ /\.out$/) { From 0ca197ec1b5391a976bdf23f6c751c8098d8d061 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 17:34:53 -0500 Subject: [PATCH 46/90] Github: Add issue templates --- .github/ISSUE_TEMPLATE/BUG_REPORT.md | 14 ++++++++++++++ .github/ISSUE_TEMPLATE/FEATURE.md | 16 ++++++++++++++++ .github/ISSUE_TEMPLATE/QUESTIONS.md | 10 ++++++++++ .github/PULL_REQUEST_TEMPLATE.md | 1 + .github/labels.toml | 5 +++++ 5 files changed, 46 insertions(+) create mode 100644 .github/ISSUE_TEMPLATE/BUG_REPORT.md create mode 100644 .github/ISSUE_TEMPLATE/FEATURE.md create mode 100644 .github/ISSUE_TEMPLATE/QUESTIONS.md create mode 100644 .github/PULL_REQUEST_TEMPLATE.md diff --git a/.github/ISSUE_TEMPLATE/BUG_REPORT.md b/.github/ISSUE_TEMPLATE/BUG_REPORT.md new file mode 100644 index 000000000..ff9a10534 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/BUG_REPORT.md @@ -0,0 +1,14 @@ +--- +name: Bug Report +about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: 'new', 'bug' +assignees: '' + +--- + +Thanks for taking the time to report this. + +Can you attach an example that shows the issue? (Must be openly licensed, ideally in test_regress format.) + +May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/FEATURE.md b/.github/ISSUE_TEMPLATE/FEATURE.md new file mode 100644 index 000000000..e43674b4d --- /dev/null +++ b/.github/ISSUE_TEMPLATE/FEATURE.md @@ -0,0 +1,16 @@ +--- +name: Feature Request +about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: 'new', 'type: feature-non-IEEE' +assignees: '' + +--- + +Thanks for taking the time to report this. + +What would you like added/supported? + +Can you attach an example that runs on other simulators? (Must be openly licensed, ideally in test_regress format.) + +May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/QUESTIONS.md b/.github/ISSUE_TEMPLATE/QUESTIONS.md new file mode 100644 index 000000000..04c4b0f29 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/QUESTIONS.md @@ -0,0 +1,10 @@ +--- +name: Q and A, or Other +about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: 'new', 'type: q and a' +assignees: '' + +--- + +How may we help - what is your question? diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md new file mode 100644 index 000000000..a05a08e94 --- /dev/null +++ b/.github/PULL_REQUEST_TEMPLATE.md @@ -0,0 +1 @@ +We appreciate your contributing to Verilator. If this is your first commit, please add your name to docs/CONTRIBUTORS, and read our contributing guidelines in docs/CONTRIBUTING.adoc. diff --git a/.github/labels.toml b/.github/labels.toml index 0c9958522..ec50f3c63 100644 --- a/.github/labels.toml +++ b/.github/labels.toml @@ -103,6 +103,11 @@ color = "008672" name = "help wanted" description = "Extra attention is needed" +["new"] +color = "ff4400" +name = "new" +description = "New issue, not yet seen by maintainers" + ["resolution: abandoned"] color = "cfd3d7" name = "resolution: abandoned" From dc8a0dfd5a6123e69adb6ccaaa39b9fe3096df33 Mon Sep 17 00:00:00 2001 From: W Snyder Date: Mon, 23 Dec 2019 17:36:26 -0500 Subject: [PATCH 47/90] Update issue templates --- .github/ISSUE_TEMPLATE/bug_report.md | 38 ++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 .github/ISSUE_TEMPLATE/bug_report.md diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md new file mode 100644 index 000000000..dd84ea782 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -0,0 +1,38 @@ +--- +name: Bug report +about: Create a report to help us improve +title: '' +labels: '' +assignees: '' + +--- + +**Describe the bug** +A clear and concise description of what the bug is. + +**To Reproduce** +Steps to reproduce the behavior: +1. Go to '...' +2. Click on '....' +3. Scroll down to '....' +4. See error + +**Expected behavior** +A clear and concise description of what you expected to happen. + +**Screenshots** +If applicable, add screenshots to help explain your problem. + +**Desktop (please complete the following information):** + - OS: [e.g. iOS] + - Browser [e.g. chrome, safari] + - Version [e.g. 22] + +**Smartphone (please complete the following information):** + - Device: [e.g. iPhone6] + - OS: [e.g. iOS8.1] + - Browser [e.g. stock browser, safari] + - Version [e.g. 22] + +**Additional context** +Add any other context about the problem here. From a37a127ef1276db45dde1f784a5174b3d678fb4a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 17:37:48 -0500 Subject: [PATCH 48/90] Github: Update issue templates --- .github/ISSUE_TEMPLATE/BUG_REPORT.md | 14 ------------ .github/ISSUE_TEMPLATE/FEATURE.md | 16 ------------- .github/ISSUE_TEMPLATE/QUESTIONS.md | 10 -------- .github/ISSUE_TEMPLATE/bug_report.md | 34 ++++------------------------ 4 files changed, 5 insertions(+), 69 deletions(-) delete mode 100644 .github/ISSUE_TEMPLATE/BUG_REPORT.md delete mode 100644 .github/ISSUE_TEMPLATE/FEATURE.md delete mode 100644 .github/ISSUE_TEMPLATE/QUESTIONS.md diff --git a/.github/ISSUE_TEMPLATE/BUG_REPORT.md b/.github/ISSUE_TEMPLATE/BUG_REPORT.md deleted file mode 100644 index ff9a10534..000000000 --- a/.github/ISSUE_TEMPLATE/BUG_REPORT.md +++ /dev/null @@ -1,14 +0,0 @@ ---- -name: Bug Report -about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) -title: '' -labels: 'new', 'bug' -assignees: '' - ---- - -Thanks for taking the time to report this. - -Can you attach an example that shows the issue? (Must be openly licensed, ideally in test_regress format.) - -May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/FEATURE.md b/.github/ISSUE_TEMPLATE/FEATURE.md deleted file mode 100644 index e43674b4d..000000000 --- a/.github/ISSUE_TEMPLATE/FEATURE.md +++ /dev/null @@ -1,16 +0,0 @@ ---- -name: Feature Request -about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) -title: '' -labels: 'new', 'type: feature-non-IEEE' -assignees: '' - ---- - -Thanks for taking the time to report this. - -What would you like added/supported? - -Can you attach an example that runs on other simulators? (Must be openly licensed, ideally in test_regress format.) - -May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/QUESTIONS.md b/.github/ISSUE_TEMPLATE/QUESTIONS.md deleted file mode 100644 index 04c4b0f29..000000000 --- a/.github/ISSUE_TEMPLATE/QUESTIONS.md +++ /dev/null @@ -1,10 +0,0 @@ ---- -name: Q and A, or Other -about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) -title: '' -labels: 'new', 'type: q and a' -assignees: '' - ---- - -How may we help - what is your question? diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md index dd84ea782..4c66f9630 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.md +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -1,38 +1,14 @@ --- name: Bug report -about: Create a report to help us improve +about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) title: '' -labels: '' +labels: new, bug assignees: '' --- -**Describe the bug** -A clear and concise description of what the bug is. +Thanks for taking the time to report this. -**To Reproduce** -Steps to reproduce the behavior: -1. Go to '...' -2. Click on '....' -3. Scroll down to '....' -4. See error +Can you attach an example that shows the issue? (Must be openly licensed, ideally in test_regress format.) -**Expected behavior** -A clear and concise description of what you expected to happen. - -**Screenshots** -If applicable, add screenshots to help explain your problem. - -**Desktop (please complete the following information):** - - OS: [e.g. iOS] - - Browser [e.g. chrome, safari] - - Version [e.g. 22] - -**Smartphone (please complete the following information):** - - Device: [e.g. iPhone6] - - OS: [e.g. iOS8.1] - - Browser [e.g. stock browser, safari] - - Version [e.g. 22] - -**Additional context** -Add any other context about the problem here. +May we assist you in trying to fix this yourself? From 350de3719e9aa8587b3f219d2ed7cbb19865e463 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 17:39:38 -0500 Subject: [PATCH 49/90] Github: Update issue templates --- .github/ISSUE_TEMPLATE/bug_report.md | 2 +- .github/ISSUE_TEMPLATE/feature.md | 16 ++++++++++++++++ .github/ISSUE_TEMPLATE/questions.md | 10 ++++++++++ 3 files changed, 27 insertions(+), 1 deletion(-) create mode 100644 .github/ISSUE_TEMPLATE/feature.md create mode 100644 .github/ISSUE_TEMPLATE/questions.md diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md index 4c66f9630..5fdef3a39 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.md +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -2,7 +2,7 @@ name: Bug report about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) title: '' -labels: new, bug +labels: 'new', 'type: bug' assignees: '' --- diff --git a/.github/ISSUE_TEMPLATE/feature.md b/.github/ISSUE_TEMPLATE/feature.md new file mode 100644 index 000000000..5179872f3 --- /dev/null +++ b/.github/ISSUE_TEMPLATE/feature.md @@ -0,0 +1,16 @@ +--- +name: Feature Request +about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: new, type: feature-non-IEEE +assignees: '' + +--- + +Thanks for taking the time to report this. + +What would you like added/supported? + +Can you attach an example that runs on other simulators? (Must be openly licensed, ideally in test_regress format.) + +May we assist you in trying to fix this yourself? diff --git a/.github/ISSUE_TEMPLATE/questions.md b/.github/ISSUE_TEMPLATE/questions.md new file mode 100644 index 000000000..e8635c68c --- /dev/null +++ b/.github/ISSUE_TEMPLATE/questions.md @@ -0,0 +1,10 @@ +--- +name: Q and A, or Other +about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) +title: '' +labels: new, type: q and a +assignees: '' + +--- + +How may we help - what is your question? From 81ee4930fc3c1c4ca5a60f803a5f0f650057ac28 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 17:40:50 -0500 Subject: [PATCH 50/90] Github: Update issue templates --- .github/ISSUE_TEMPLATE/bug_report.md | 2 +- .github/ISSUE_TEMPLATE/feature.md | 2 +- .github/ISSUE_TEMPLATE/questions.md | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/ISSUE_TEMPLATE/bug_report.md b/.github/ISSUE_TEMPLATE/bug_report.md index 5fdef3a39..3e438348e 100644 --- a/.github/ISSUE_TEMPLATE/bug_report.md +++ b/.github/ISSUE_TEMPLATE/bug_report.md @@ -2,7 +2,7 @@ name: Bug report about: Something isn't working as expected, and it isn't "Unsupported." (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) title: '' -labels: 'new', 'type: bug' +labels: new assignees: '' --- diff --git a/.github/ISSUE_TEMPLATE/feature.md b/.github/ISSUE_TEMPLATE/feature.md index 5179872f3..b36225b94 100644 --- a/.github/ISSUE_TEMPLATE/feature.md +++ b/.github/ISSUE_TEMPLATE/feature.md @@ -2,7 +2,7 @@ name: Feature Request about: Request something should be supported, or a new feature added. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) title: '' -labels: new, type: feature-non-IEEE +labels: new assignees: '' --- diff --git a/.github/ISSUE_TEMPLATE/questions.md b/.github/ISSUE_TEMPLATE/questions.md index e8635c68c..b634a5513 100644 --- a/.github/ISSUE_TEMPLATE/questions.md +++ b/.github/ISSUE_TEMPLATE/questions.md @@ -2,7 +2,7 @@ name: Q and A, or Other about: Ask a question, not related to a specific bug or feature request. (Note our contributor agreement at https://github.com/verilator/verilator/.github/blob/master/CONTRIBUTING.adoc) title: '' -labels: new, type: q and a +labels: new assignees: '' --- From 5c59fde92efe7f699d0189ddf9788e50deab3ecb Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 18:56:08 -0500 Subject: [PATCH 51/90] Fix codacy warning --- .codacy.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.codacy.yml b/.codacy.yml index b3a99af01..31a95b117 100644 --- a/.codacy.yml +++ b/.codacy.yml @@ -1,4 +1,5 @@ --- exclude_paths: + - '.github/**' - 'ci/build_verilator.sh' - 'include/vltstd/**' From 5089f997cc32980e43013169c147ebbd55e07430 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 19:00:17 -0500 Subject: [PATCH 52/90] Internals: Use standard function for include guards. No functional change intended. --- src/V3EmitC.cpp | 10 ++++------ src/V3EmitCInlines.cpp | 5 ++--- src/V3EmitCSyms.cpp | 10 ++++------ src/V3File.cpp | 12 ++++++++++++ src/V3File.h | 18 ++++++++++++------ src/V3String.cpp | 8 ++++++++ src/V3String.h | 4 +++- 7 files changed, 45 insertions(+), 22 deletions(-) diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 54fb59e2a..c6ebe76fe 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -1073,8 +1073,6 @@ class EmitCImp : EmitCStmts { } ofp->puts("// See "+v3Global.opt.prefix()+".h for the primary calling header\n"); } - ofp->puts("\n"); - return ofp; } @@ -2536,8 +2534,7 @@ void EmitCImp::emitMTaskState() { void EmitCImp::emitInt(AstNodeModule* modp) { // Always have this first; gcc has short circuiting if #ifdef is first in a file - puts("#ifndef _"+modClassName(modp)+"_H_\n"); - puts("#define _"+modClassName(modp)+"_H_\n"); + ofp()->putsGuard(); puts("\n"); ofp()->putsIntTopInclude(); @@ -2757,12 +2754,13 @@ void EmitCImp::emitInt(AstNodeModule* modp) { } // finish up h-file - puts("#endif // guard\n"); + ofp()->putsEndGuard(); } //---------------------------------------------------------------------- void EmitCImp::emitImp(AstNodeModule* modp) { + puts("\n"); puts("#include \""+modClassName(modp)+".h\"\n"); puts("#include \""+symClassName()+".h\"\n"); @@ -2770,8 +2768,8 @@ void EmitCImp::emitImp(AstNodeModule* modp) { puts("\n"); puts("#include \"verilated_dpi.h\"\n"); } - puts("\n"); + puts("\n"); emitTextSection(AstType::atScImpHdr); if (m_slow && splitFilenum()==0) { diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index 28946e809..344d29e13 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -101,8 +101,7 @@ void EmitCInlines::emitInt() { m_ofp = &hf; ofp()->putsHeader(); - puts("#ifndef _"+topClassName()+"__Inlines_H_\n"); - puts("#define _"+topClassName()+"__Inlines_H_\n"); + ofp()->putsGuard(); puts("\n"); puts("#include \"verilated.h\"\n"); @@ -112,7 +111,7 @@ void EmitCInlines::emitInt() { // Placeholder - v3Global.needHInlines(true) currently not used puts("//======================\n\n"); - puts("#endif // guard\n"); + ofp()->putsEndGuard(); } //###################################################################### diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp index dfbc62b73..5b55a02e7 100644 --- a/src/V3EmitCSyms.cpp +++ b/src/V3EmitCSyms.cpp @@ -372,12 +372,10 @@ void EmitCSyms::emitSymHdr() { puts("//\n"); puts("// Internal details; most calling programs do not need this header,\n"); puts("// unless using verilator public meta comments.\n"); - puts("\n"); - puts("#ifndef _"+symClassName()+"_H_\n"); - puts("#define _"+symClassName()+"_H_\n"); - puts("\n"); + ofp()->putsGuard(); + puts("\n"); ofp()->putsIntTopInclude(); if (v3Global.needHeavy()) { puts("#include \"verilated_heavy.h\"\n"); @@ -474,8 +472,8 @@ void EmitCSyms::emitSymHdr() { } puts("\n"); puts("} VL_ATTR_ALIGNED(64);\n"); - puts("\n"); - puts("#endif // guard\n"); + + ofp()->putsEndGuard(); } void EmitCSyms::closeSplit() { diff --git a/src/V3File.cpp b/src/V3File.cpp index cbf857e9b..46c81ded5 100644 --- a/src/V3File.cpp +++ b/src/V3File.cpp @@ -25,6 +25,7 @@ #include "V3File.h" #include "V3Os.h" #include "V3PreShell.h" +#include "V3String.h" #include "V3Ast.h" #include @@ -942,6 +943,17 @@ void V3OutFile::putsForceIncs() { } } +void V3OutCFile::putsGuard() { + UASSERT(!m_guard, "Already called putsGuard in emit file"); + m_guard = true; + string var = VString::upcase(string("_") + V3Os::filenameNonDir(filename()) + "_"); + for (string::iterator pos = var.begin(); pos != var.end(); ++pos) { + if (!isalnum(*pos)) *pos = '_'; + } + puts("\n#ifndef " + var + "\n"); + puts("#define " + var + " // guard\n"); +} + //###################################################################### // VIdProtect diff --git a/src/V3File.h b/src/V3File.h index 2c0997283..3f429ed66 100644 --- a/src/V3File.h +++ b/src/V3File.h @@ -138,6 +138,7 @@ public: V3OutFormatter(const string& filename, Language lang); virtual ~V3OutFormatter() {} // ACCESSORS + string filename() const { return m_filename; } int column() const { return m_column; } int blockIndent() const { return m_blockIndent; } void blockIndent(int flag) { m_blockIndent = flag; } @@ -186,23 +187,28 @@ private: }; class V3OutCFile : public V3OutFile { - int m_private; + int m_guard; // Created header guard + int m_private; // 1 = Most recently emitted private:, 2 = public: public: - explicit V3OutCFile(const string& filename) : V3OutFile(filename, V3OutFormatter::LA_C) { + explicit V3OutCFile(const string& filename) + : V3OutFile(filename, V3OutFormatter::LA_C) + , m_guard(false) { resetPrivate(); } virtual ~V3OutCFile() {} virtual void putsHeader() { puts("// Verilated -*- C++ -*-\n"); } - virtual void putsIntTopInclude() { - putsForceIncs(); + virtual void putsIntTopInclude() { putsForceIncs(); } + virtual void putsGuard(); + virtual void putsEndGuard() { + if (m_guard) puts("\n#endif // guard\n"); } // Print out public/privates void resetPrivate() { m_private = 0; } void putsPrivate(bool setPrivate) { - if (setPrivate && m_private!=1) { + if (setPrivate && m_private != 1) { puts("private:\n"); m_private = 1; - } else if (!setPrivate && m_private!=2) { + } else if (!setPrivate && m_private != 2) { puts("public:\n"); m_private = 2; } diff --git a/src/V3String.cpp b/src/V3String.cpp index 79869dbdf..9e1a5b0d6 100644 --- a/src/V3String.cpp +++ b/src/V3String.cpp @@ -88,6 +88,14 @@ string VString::downcase(const string& str) { return out; } +string VString::upcase(const string& str) { + string out = str; + for (string::iterator pos = out.begin(); pos != out.end(); ++pos) { + *pos = toupper(*pos); + } + return out; +} + string VString::quotePercent(const string& str) { string out; for (string::const_iterator pos = str.begin(); pos != str.end(); ++pos) { diff --git a/src/V3String.h b/src/V3String.h index d04629606..ace8428c3 100644 --- a/src/V3String.h +++ b/src/V3String.h @@ -65,8 +65,10 @@ public: static bool wildmatch(const char* s, const char* p); // Return {a}{dot}{b}, omitting dot if a or b are empty static string dot(const string& a, const string& dot, const string& b); - // Convert string to lowercase + // Convert string to lowercase (tolower) static string downcase(const string& str); + // Convert string to upper case (toupper) + static string upcase(const string& str); // Replace any %'s with %% static string quotePercent(const string& str); // Replace any unprintable with space From a0d391d695177c09ac45a90ec70201fa8298407b Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 19:01:29 -0500 Subject: [PATCH 53/90] Tests: Less aggressive contributors check. --- test_regress/t/t_dist_contributors.pl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test_regress/t/t_dist_contributors.pl b/test_regress/t/t_dist_contributors.pl index e8a092dd3..b31b8b4ff 100755 --- a/test_regress/t/t_dist_contributors.pl +++ b/test_regress/t/t_dist_contributors.pl @@ -71,7 +71,7 @@ sub read_user { sub read_authors { # Check recent commits in case did commit - my $git_auths = `git log '--pretty=format:%aN <%aE>' | head -20`; + my $git_auths = `git log '--pretty=format:%aN <%aE>' | head -5`; foreach my $line (split /\n/, $git_auths) { $line =~ s/ *<[^>]*>//; $Authors{$line} = 1; From c8daab3b46347f0c904006e22183182cf21f109c Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 23 Dec 2019 20:48:23 -0500 Subject: [PATCH 54/90] Internals: Refactor some member handling. No functional change intended. --- src/V3Width.cpp | 73 ++++++++++++++++++++++++------------------------- 1 file changed, 35 insertions(+), 38 deletions(-) diff --git a/src/V3Width.cpp b/src/V3Width.cpp index d17e1c4c6..b1f18dd04 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1740,55 +1740,52 @@ private: if (!nodep->fromp()->dtypep()) nodep->fromp()->v3fatalSrc("Unlinked data type"); AstNodeDType* fromDtp = nodep->fromp()->dtypep()->skipRefToEnump(); UINFO(9," from dt "<findMember(nodep->name()); + AstMemberDType* memberp = adtypep->findMember(nodep->name()); if (!memberp) { - nodep->v3error("Member "<prettyNameQ()<<" not found in structure"); + nodep->v3error("Member " << nodep->prettyNameQ() << " not found in structure"); + } else { + if (m_attrp) { // Looking for the base of the attribute + nodep->dtypep(memberp); + UINFO(9, " MEMBERSEL(attr) -> " << nodep << endl); + UINFO(9, " dt-> " << nodep->dtypep() << endl); + } else { + AstSel* newp = new AstSel(nodep->fileline(), nodep->fromp()->unlinkFrBack(), + memberp->lsb(), memberp->width()); + // Must skip over the member to find the union; as the member may disappear + // later + newp->dtypep(memberp->subDTypep()->skipRefToEnump()); + newp->didWidth(true); // Don't replace dtype with basic type + UINFO(9, " MEMBERSEL -> " << newp << endl); + UINFO(9, " dt-> " << newp->dtypep() << endl); + nodep->replaceWith(newp); + pushDeletep(nodep); VL_DANGLING(nodep); + // Should be able to treat it as a normal-ish nodesel - maybe. + // The lhsp() will be strange until this stage; create the number here? + } + return; } - } - else if (VN_IS(fromDtp, EnumDType) - || VN_IS(fromDtp, AssocArrayDType) - || VN_IS(fromDtp, QueueDType) - || VN_IS(fromDtp, BasicDType)) { + } else if (VN_IS(fromDtp, EnumDType) + || VN_IS(fromDtp, AssocArrayDType) + || VN_IS(fromDtp, QueueDType) + || VN_IS(fromDtp, BasicDType)) { // Method call on enum without following parenthesis, e.g. "ENUM.next" // Convert this into a method call, and let that visitor figure out what to do next - AstNode* newp = new AstMethodCall(nodep->fileline(), - nodep->fromp()->unlinkFrBack(), nodep->name(), NULL); + AstNode* newp = new AstMethodCall(nodep->fileline(), nodep->fromp()->unlinkFrBack(), + nodep->name(), NULL); nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); userIterate(newp, m_vup); return; - } - else { + } else { nodep->v3error("Member selection of non-struct/union object '" - <fromp()->prettyTypeName() - <<"' which is a '"<fromp()->dtypep()->prettyTypeName()<<"'"); - } - if (memberp) { - if (m_attrp) { // Looking for the base of the attribute - nodep->dtypep(memberp); - UINFO(9," MEMBERSEL(attr) -> "< "<dtypep()<fileline(), nodep->fromp()->unlinkFrBack(), - memberp->lsb(), memberp->width()); - // Must skip over the member to find the union; as the member may disappear later - newp->dtypep(memberp->subDTypep()->skipRefToEnump()); - newp->didWidth(true); // Don't replace dtype with basic type - UINFO(9," MEMBERSEL -> "< "<dtypep()<replaceWith(newp); - pushDeletep(nodep); VL_DANGLING(nodep); - // Should be able to treat it as a normal-ish nodesel - maybe. - // The lhsp() will be strange until this stage; create the number here? - } - } - if (!memberp) { // Very bogus, but avoids core dump - nodep->replaceWith(new AstConst(nodep->fileline(), AstConst::LogicFalse())); - pushDeletep(nodep); VL_DANGLING(nodep); + << nodep->fromp()->prettyTypeName() << "' which is a '" + << nodep->fromp()->dtypep()->prettyTypeName() << "'"); } + // Error handling + nodep->replaceWith(new AstConst(nodep->fileline(), AstConst::LogicFalse())); + pushDeletep(nodep); VL_DANGLING(nodep); } virtual void visit(AstCMethodCall* nodep) { @@ -2713,7 +2710,7 @@ private: if (argp) argp = argp->nextp(); break; } - case 'p': { // Packed + case 'p': { // Pattern AstNodeDType* dtypep = argp ? argp->dtypep()->skipRefp() : NULL; AstBasicDType* basicp = dtypep ? dtypep->basicp() : NULL; if (basicp && basicp->isString()) { From 37b9f254a28f7f618a74939c079b60e1a38486e6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 24 Dec 2019 08:47:30 -0500 Subject: [PATCH 55/90] Internals: Add origNameProtect. No functional change intended. --- src/V3Ast.cpp | 3 +++ src/V3Ast.h | 4 +++- src/V3AstNodes.h | 4 ++-- 3 files changed, 8 insertions(+), 3 deletions(-) diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp index cd2e2246c..a6f803b3e 100644 --- a/src/V3Ast.cpp +++ b/src/V3Ast.cpp @@ -146,6 +146,9 @@ string AstNode::encodeNumber(vlsint64_t num) { string AstNode::nameProtect() const { return VIdProtect::protectIf(name(), protect()); } +string AstNode::origNameProtect() const { + return VIdProtect::protectIf(origName(), protect()); +} string AstNode::shortName() const { string pretty = name(); diff --git a/src/V3Ast.h b/src/V3Ast.h index 5206ef0bb..41d559f65 100644 --- a/src/V3Ast.h +++ b/src/V3Ast.h @@ -1278,11 +1278,13 @@ public: // ACCESSORS virtual string name() const { return ""; } + virtual string origName() const { return ""; } virtual void name(const string& name) { this->v3fatalSrc("name() called on object without name() method"); } virtual void tag(const string& text) {} virtual string tag() const { return ""; } virtual string verilogKwd() const { return ""; } string nameProtect() const; // Name with --protect-id applied + string origNameProtect() const; // origName with --protect-id applied string shortName() const; // Name with __PVT__ removed for concatenating scopes static string dedotName(const string& namein); // Name with dots removed static string prettyName(const string& namein); // Name for printing out to the user @@ -2240,7 +2242,7 @@ public: void addActivep(AstNode* nodep) { addOp3p(nodep); } // ACCESSORS virtual void name(const string& name) { m_name = name; } - string origName() const { return m_origName; } + virtual string origName() const { return m_origName; } string hierName() const { return m_hierName; } void hierName(const string& hierName) { m_hierName = hierName; } bool inLibrary() const { return m_inLibrary; } diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 9f2ca053b..4eb5a3090 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -1517,7 +1517,7 @@ public: virtual string name() const { return m_name; } // * = Var name virtual bool hasDType() const { return true; } virtual bool maybePointedTo() const { return true; } - string origName() const { return m_origName; } // * = Original name + virtual string origName() const { return m_origName; } // * = Original name void origName(const string& name) { m_origName = name; } AstVarType varType() const { return m_varType; } // * = Type of variable void direction(const VDirection& flag) { @@ -2177,7 +2177,7 @@ public: // ACCESSORS virtual string name() const { return m_name; } // * = Cell name virtual void name(const string& name) { m_name = name; } - string origName() const { return m_origName; } // * = Original name + virtual string origName() const { return m_origName; } // * = Original name void origName(const string& name) { m_origName = name; } string modName() const { return m_modName; } // * = Instance name void modName(const string& name) { m_modName = name; } From 40a847d6135b55209272da676d106e9b59dd16f6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 24 Dec 2019 10:23:43 -0500 Subject: [PATCH 56/90] Internals: Refactor some code. No functional change intended. --- src/V3Width.cpp | 50 ++++++++++++++++++++++++------------------------- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/src/V3Width.cpp b/src/V3Width.cpp index b1f18dd04..256211832 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1741,31 +1741,7 @@ private: AstNodeDType* fromDtp = nodep->fromp()->dtypep()->skipRefToEnump(); UINFO(9," from dt "<findMember(nodep->name()); - if (!memberp) { - nodep->v3error("Member " << nodep->prettyNameQ() << " not found in structure"); - } else { - if (m_attrp) { // Looking for the base of the attribute - nodep->dtypep(memberp); - UINFO(9, " MEMBERSEL(attr) -> " << nodep << endl); - UINFO(9, " dt-> " << nodep->dtypep() << endl); - } else { - AstSel* newp = new AstSel(nodep->fileline(), nodep->fromp()->unlinkFrBack(), - memberp->lsb(), memberp->width()); - // Must skip over the member to find the union; as the member may disappear - // later - newp->dtypep(memberp->subDTypep()->skipRefToEnump()); - newp->didWidth(true); // Don't replace dtype with basic type - UINFO(9, " MEMBERSEL -> " << newp << endl); - UINFO(9, " dt-> " << newp->dtypep() << endl); - nodep->replaceWith(newp); - pushDeletep(nodep); VL_DANGLING(nodep); - // Should be able to treat it as a normal-ish nodesel - maybe. - // The lhsp() will be strange until this stage; create the number here? - } - return; - } + if (memberSelStruct(nodep, adtypep)) return; } else if (VN_IS(fromDtp, EnumDType) || VN_IS(fromDtp, AssocArrayDType) || VN_IS(fromDtp, QueueDType) @@ -1787,6 +1763,30 @@ private: nodep->replaceWith(new AstConst(nodep->fileline(), AstConst::LogicFalse())); pushDeletep(nodep); VL_DANGLING(nodep); } + bool memberSelStruct(AstMemberSel* nodep, AstNodeUOrStructDType* adtypep) { + // Returns true if ok + if (AstMemberDType* memberp = adtypep->findMember(nodep->name())) { + if (m_attrp) { // Looking for the base of the attribute + nodep->dtypep(memberp); + UINFO(9, " MEMBERSEL(attr) -> " << nodep << endl); + UINFO(9, " dt-> " << nodep->dtypep() << endl); + } else { + AstSel* newp = new AstSel(nodep->fileline(), nodep->fromp()->unlinkFrBack(), + memberp->lsb(), memberp->width()); + // Must skip over the member to find the union; as the member may disappear later + newp->dtypep(memberp->subDTypep()->skipRefToEnump()); + newp->didWidth(true); // Don't replace dtype with basic type + UINFO(9, " MEMBERSEL -> " << newp << endl); + UINFO(9, " dt-> " << newp->dtypep() << endl); + nodep->replaceWith(newp); pushDeletep(nodep); VL_DANGLING(nodep); + // Should be able to treat it as a normal-ish nodesel - maybe. + // The lhsp() will be strange until this stage; create the number here? + } + return true; + } + nodep->v3error("Member " << nodep->prettyNameQ() << " not found in structure"); + return false; + } virtual void visit(AstCMethodCall* nodep) { // Never created before V3Width, so no need to redo it From f540dead799aadc1e54ae03df670f1c435d73044 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 24 Dec 2019 12:47:27 -0500 Subject: [PATCH 57/90] Internals: new() support code, and misc stuff. --- src/V3AstNodes.h | 10 ++++++---- src/V3Clean.cpp | 1 + src/V3EmitC.cpp | 11 +++++++---- src/V3Width.cpp | 12 ++++++++++++ 4 files changed, 26 insertions(+), 8 deletions(-) diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 4eb5a3090..63304eb1a 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -6707,10 +6707,11 @@ public: class AstCMath : public AstNodeMath { private: bool m_cleanOut; + bool m_pure; // Pure optimizable public: // Emit C textual math function (like AstUCFunc) AstCMath(FileLine* fl, AstNode* exprsp) - : AstNodeMath(fl), m_cleanOut(true) { + : AstNodeMath(fl), m_cleanOut(true), m_pure(false) { addOp1p(exprsp); dtypeFrom(exprsp); } @@ -6720,8 +6721,8 @@ public: if (setwidth) { dtypeSetLogicSized(setwidth, AstNumeric::UNSIGNED); } } ASTNODE_NODE_FUNCS(CMath) - virtual bool isGateOptimizable() const { return false; } - virtual bool isPredictOptimizable() const { return false; } + virtual bool isGateOptimizable() const { return m_pure; } + virtual bool isPredictOptimizable() const { return m_pure; } virtual bool cleanOut() const { return m_cleanOut; } virtual string emitVerilog() { V3ERROR_NA; return ""; } // Implemented specially virtual string emitC() { V3ERROR_NA; return ""; } @@ -6729,9 +6730,10 @@ public: virtual bool same(const AstNode* samep) const { return true; } void addBodysp(AstNode* nodep) { addNOp1p(nodep); } AstNode* bodysp() const { return op1p(); } // op1 = expressions to print + bool pure() const { return m_pure; } + void pure(bool flag) { m_pure = flag; } }; - class AstCReset : public AstNodeStmt { // Reset variable at startup public: diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp index 3ea3c435d..2236c2d66 100644 --- a/src/V3Clean.cpp +++ b/src/V3Clean.cpp @@ -88,6 +88,7 @@ private: if (!nodep->user2() && nodep->hasDType()) { if (VN_IS(nodep, Var) || VN_IS(nodep, NodeDType) // Don't want to change variable widths! || VN_IS(nodep->dtypep()->skipRefp(), AssocArrayDType) // Or arrays + || VN_IS(nodep->dtypep()->skipRefp(), ClassRefDType) || VN_IS(nodep->dtypep()->skipRefp(), QueueDType) || VN_IS(nodep->dtypep()->skipRefp(), UnpackArrayDType) || VN_IS(nodep->dtypep()->skipRefp(), VoidDType)) { diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index c6ebe76fe..8d8640227 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -714,6 +714,11 @@ public: iterateAndNextNull(nodep->expr2p()); puts(")"); } } + virtual void visit(AstNew* nodep) { + puts("std::make_shared<" + nodep->dtypep()->nameProtect() + ">("); + iterateChildren(nodep); + puts(")"); + } virtual void visit(AstSel* nodep) { // Note ASSIGN checks for this on a LHS emitOpName(nodep, nodep->emitC(), nodep->fromp(), nodep->lsbp(), nodep->thsp()); @@ -2736,21 +2741,19 @@ void EmitCImp::emitInt(AstNodeModule* modp) { ofp()->putsPrivate(false); // public: puts("void "+protect("__Vserialize")+"(VerilatedSerialize& os);\n"); puts("void "+protect("__Vdeserialize")+"(VerilatedDeserialize& os);\n"); - puts("\n"); } puts("} VL_ATTR_ALIGNED(128);\n"); - puts("\n"); // Save/restore if (v3Global.opt.savable() && modp->isTop()) { - puts("inline VerilatedSerialize& operator<<(VerilatedSerialize& os, " + puts("\n"); + puts("inline VerilatedSerialize& operator<<(VerilatedSerialize& os, " +modClassName(modp)+"& rhs) {\n" "Verilated::quiesce(); rhs."+protect("__Vserialize")+"(os); return os; }\n"); puts("inline VerilatedDeserialize& operator>>(VerilatedDeserialize& os, " +modClassName(modp)+"& rhs) {\n" "Verilated::quiesce(); rhs."+protect("__Vdeserialize")+"(os); return os; }\n"); - puts("\n"); } // finish up h-file diff --git a/src/V3Width.cpp b/src/V3Width.cpp index 256211832..55c796c2e 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -2239,6 +2239,18 @@ private: } } + virtual void visit(AstNew* nodep) { + if (nodep->didWidthAndSet()) return; + userIterateChildren(nodep, WidthVP(SELF, BOTH).p()); + AstClassRefDType* refp = VN_CAST(m_vup->dtypeNullp(), ClassRefDType); + if (!refp) { // e.g. int a = new; + if (refp) UINFO(1, "Got refp "<v3error("new() not expected in this context"); + return; + } + nodep->dtypep(refp); + } + virtual void visit(AstPattern* nodep) { if (nodep->didWidthAndSet()) return; UINFO(9,"PATTERN "< Date: Tue, 24 Dec 2019 16:04:28 -0500 Subject: [PATCH 58/90] Internals: Rename pexpr. No functional change intended. --- src/verilog.y | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/src/verilog.y b/src/verilog.y index 03bcb9262..b76846ea4 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -4254,21 +4254,20 @@ elseStmtBlock: // Part of concurrent_assertion_statement property_spec: // IEEE: property_spec //UNSUP: This rule has been super-specialized to what is supported now - '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' property_expr + '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($1, $3, $8, $10); } - | '@' '(' senitemEdge ')' property_expr { $$ = new AstPropClocked($1, $3, NULL, $5); } - | yDISABLE yIFF '(' expr ')' property_expr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } - | property_expr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } + | '@' '(' senitemEdge ')' pexpr { $$ = new AstPropClocked($1, $3, NULL, $5); } + | yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } + | pexpr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } ; -property_expr: // IEEE: property_expr +pexpr: // IEEE: property_expr (The name pexpr is important as regexps just add an "p" to expr.) //UNSUP: This rule has been super-specialized to what is supported now - expr yP_ORMINUSGT property_expr { $$ = new AstLogOr($2,new AstLogNot($2,$1),$3); } - //UNSUP expr yP_OREQGT property_expr { $$ = new AstLogOr($2,new AstLogNot($2,new AstPast($2,$1, NULL)),$3); } // This handles disable iff in the past time step incorrectly - | expr { $$ = $1; } + expr yP_ORMINUSGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, $1), $3); } + //UNSUP expr yP_OREQGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, new AstPast($2, $1, NULL)), $3); } // This handles disable iff in the past time step incorrectly + | expr { $$ = $1; } ; - //************************************************ // Let From 8bd43d83b1744e64f0501085cc3cf7f3ca83e85a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 24 Dec 2019 16:15:47 -0500 Subject: [PATCH 59/90] Internals: bisonpre should ignore commented BISONPRE lines. --- src/bisonpre | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/src/bisonpre b/src/bisonpre index 04e4dfe2b..79b7dc79e 100755 --- a/src/bisonpre +++ b/src/bisonpre @@ -191,7 +191,7 @@ sub clean_output { } my @out; foreach my $line (@lines) { - if ($line =~ /BISONPRE_TOKEN_NAMES/) { + if (_enaline($line) && $line =~ /BISONPRE_TOKEN_NAMES/) { push @out, $line; foreach my $tv (sort keys %token_values) { push @out, sprintf("\tcase %d: return \"%s\";\n", @@ -303,7 +303,7 @@ sub clean_input { my @linesin = @lines; @lines=(); my $l=0; foreach my $line (@linesin) { $l++; - if ($line =~ /BISONPRE_VERSION/) { + if (_enaline($line) && $line =~ /BISONPRE_VERSION/) { # 1 3 4 ($line =~ /BISONPRE_VERSION\((\S+)\s*,\s*((\S+)\s*,)?\s*([^\),]+)\)\s*$/) or die "%Error: $filename:$l: Bad form of BISONPRE_VERSION: $line\n"; @@ -324,7 +324,7 @@ sub clean_input { my @linesin = @lines; @lines=(); my $l=0; foreach my $line (@linesin) { $l++; - if ($line =~ /BISONPRE_NOT/) { + if (_enaline($line) && $line =~ /BISONPRE_NOT/) { ($line =~ s/BISONPRE_NOT\((\S+)\)\s*(\{[^}]+})\s*$//) or die "%Error: $filename:$l: Bad form of BISONPRE_NOT: $line\n"; my $endtok = $1; my $action = $2; @@ -354,7 +354,7 @@ sub clean_input { my @linesin = @lines; @lines=(); my $l=0; foreach my $line (@linesin) { $l++; - if ($line =~ /BISONPRE_COPY/) { + if (_enaline($line) && $line =~ /BISONPRE_COPY/) { $line = _bisonpre_copy($line,$l,0); } push @lines, $line; @@ -377,7 +377,7 @@ sub clean_input { my $needmore = 0; foreach my $line (@linesin) { $l++; - if ($line =~ m!//BISONPRE_TYPES!) { + if (_enaline($line) && $line =~ m!//BISONPRE_TYPES!) { push @lines, $line; foreach my $type (sort keys %types) { next if !$type; @@ -438,6 +438,12 @@ sub _bisonpre_copy { return $text; } +sub _enaline { + my $line = shift; + return 0 if $line =~ m!//UN!; + return 1; +} + ####################################################################### __END__ From c753904a3faa7008e66cf8a0fb56a2fa067c6c28 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Tue, 24 Dec 2019 16:15:48 -0500 Subject: [PATCH 60/90] Internals: Copy into parser Verilog-Perl rules as comments. No functional change. --- src/verilog.y | 643 ++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 624 insertions(+), 19 deletions(-) diff --git a/src/verilog.y b/src/verilog.y index b76846ea4..e2031c2e1 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -931,6 +931,7 @@ parameter_value_assignmentE: // IEEE: [ parameter_value_assignment ] | '#' yaFLOATNUM { $$ = new AstPin($2, 1, "", new AstConst($2, AstConst::Unsized32(), (int)(($2<0)?($2-0.5):($2+0.5)))); } + //UNSUP '#' yaTIMENUM { UNSUP } | '#' idClassSel { $$ = new AstPin($2, 1, "", $2); } // // Not needed in Verilator: // // Side effect of combining *_instantiations @@ -1760,6 +1761,8 @@ data_declaration: // ==IEEE: data_declaration // // IEEE: virtual_interface_declaration // // "yVIRTUAL yID yID" looks just like a data_declaration // // Therefore the virtual_interface_declaration term isn't used + // // 1800-2009: + //UNSUP net_type_declaration { $$ = $1; } ; class_property: // ==IEEE: class_property, which is {property_qualifier} data_declaration @@ -1818,6 +1821,13 @@ data_declarationVarFrontClass: // IEEE: part of data_declaration (for class_prop // // = class_new is in variable_decl_assignment ; +//UNSUPnet_type_declaration: // IEEE: net_type_declaration +//UNSUP yNETTYPE data_type idAny/*net_type_identifier*/ ';' { } +//UNSUP // // package_scope part of data_type +//UNSUP | yNETTYPE data_type idAny yWITH__ETC package_scopeIdFollows id/*tf_identifier*/ ';' { } +//UNSUP | yNETTYPE package_scopeIdFollows id/*net_type_identifier*/ idAny/*net_type_identifier*/ ';' { } +//UNSUP ; + implicit_typeE: // IEEE: part of *data_type_or_implicit // // Also expanded in data_declaration /* empty */ { $$ = NULL; } @@ -1997,10 +2007,14 @@ bind_instantiation: // ==IEEE: bind_instantiation // different, so we copy all rules for checkers. generate_region: // ==IEEE: generate_region - yGENERATE genItemList yENDGENERATE { $$ = new AstGenerate($1, $2); } + yGENERATE ~c~genItemList yENDGENERATE { $$ = new AstGenerate($1, $2); } | yGENERATE yENDGENERATE { $$ = NULL; } ; +//UNSUPc_generate_region: // IEEE: generate_region (for checkers) +//UNSUP BISONPRE_COPY(generate_region,{s/~c~/c_/g}) // {copied} +//UNSUP ; + generate_block_or_null: // IEEE: generate_block_or_null // ';' // is included in // // IEEE: generate_block @@ -2010,24 +2024,36 @@ generate_block_or_null: // IEEE: generate_block_or_null ; genItemBegin: // IEEE: part of generate_block - yBEGIN genItemList yEND { $$ = new AstBegin($1,"genblk",$2,true); } + yBEGIN ~c~genItemList yEND { $$ = new AstBegin($1,"genblk",$2,true); } | yBEGIN yEND { $$ = NULL; } - | id ':' yBEGIN genItemList yEND endLabelE { $$ = new AstBegin($1,*$1,$4,true); GRAMMARP->endLabel($6,*$1,$6); } - | id ':' yBEGIN yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$1,$5); } - | yBEGIN ':' idAny genItemList yEND endLabelE { $$ = new AstBegin($3,*$3,$4,true); GRAMMARP->endLabel($6,*$3,$6); } - | yBEGIN ':' idAny yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$3,$5); } + | id ':' yBEGIN ~c~genItemList yEND endLabelE { $$ = new AstBegin($1,*$1,$4,true); GRAMMARP->endLabel($6,*$1,$6); } + | id ':' yBEGIN yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$1,$5); } + | yBEGIN ':' idAny ~c~ genItemList yEND endLabelE { $$ = new AstBegin($3,*$3,$4,true); GRAMMARP->endLabel($6,*$3,$6); } + | yBEGIN ':' idAny yEND endLabelE { $$ = NULL; GRAMMARP->endLabel($5,*$3,$5); } ; +//UNSUPc_genItemBegin: // IEEE: part of generate_block (for checkers) +//UNSUP BISONPRE_COPY(genItemBegin,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genItemOrBegin: // Not in IEEE, but our begin isn't under generate_item ~c~generate_item { $$ = $1; } | ~c~genItemBegin { $$ = $1; } ; +//UNSUPc_genItemOrBegin: // (for checkers) +//UNSUP BISONPRE_COPY(genItemOrBegin,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genItemList: ~c~genItemOrBegin { $$ = $1; } | ~c~genItemList ~c~genItemOrBegin { $$ = $1->addNextNull($2); } ; +//UNSUPc_genItemList: // (for checkers) +//UNSUP BISONPRE_COPY(genItemList,{s/~c~/c_/g}) // {copied} +//UNSUP ; + generate_item: // IEEE: module_or_interface_or_generate_item // // Only legal when in a generate under a module (or interface under a module) module_or_generate_item { $$ = $1; } @@ -2038,12 +2064,23 @@ generate_item: // IEEE: module_or_interface_or_generate_item // // so below in c_generate_item ; +//UNSUPc_generate_item: // IEEE: generate_item (for checkers) +//UNSUP checker_or_generate_item { $$ = $1; } +//UNSUP ; + conditional_generate_construct: // ==IEEE: conditional_generate_construct - yCASE '(' expr ')' ~c~case_generate_itemListE yENDCASE { $$ = new AstGenCase($1,$3,$5); } - | yIF '(' expr ')' generate_block_or_null %prec prLOWER_THAN_ELSE { $$ = new AstGenIf($1,$3,$5,NULL); } - | yIF '(' expr ')' generate_block_or_null yELSE generate_block_or_null { $$ = new AstGenIf($1,$3,$5,$7); } + yCASE '(' expr ')' ~c~case_generate_itemListE yENDCASE + { $$ = new AstGenCase($1, $3, $5); } + | yIF '(' expr ')' ~c~generate_block_or_null %prec prLOWER_THAN_ELSE + { $$ = new AstGenIf($1, $3, $5, NULL); } + | yIF '(' expr ')' ~c~generate_block_or_null yELSE ~c~generate_block_or_null + { $$ = new AstGenIf($1, $3, $5, $7); } ; +//UNSUPc_conditional_generate_construct: // IEEE: conditional_generate_construct (for checkers) +//UNSUP BISONPRE_COPY(conditional_generate_construct,{s/~c~/c_/g}) // {copied} +//UNSUP ; + loop_generate_construct: // ==IEEE: loop_generate_construct yFOR '(' genvar_initialization ';' expr ';' genvar_iteration ')' ~c~generate_block_or_null { // Convert BEGIN(...) to BEGIN(GENFOR(...)), as we need the BEGIN to hide the local genvar @@ -2069,6 +2106,10 @@ loop_generate_construct: // ==IEEE: loop_generate_construct } ; +//UNSUPc_loop_generate_construct: // IEEE: loop_generate_construct (for checkers) +//UNSUP BISONPRE_COPY(loop_generate_construct,{s/~c~/c_/g}) // {copied} +//UNSUP ; + genvar_initialization: // ==IEEE: genvar_initialization varRefBase '=' expr { $$ = new AstAssign($2,$1,$3); } | yGENVAR genvar_identifierDecl '=' constExpr { $$ = $2; $2->addNext(new AstAssign($3,new AstVarRef($2->fileline(),$2,true), $4)); } @@ -2105,12 +2146,20 @@ case_generate_itemList: // IEEE: { case_generate_itemList } | ~c~case_generate_itemList ~c~case_generate_item { $$=$1; $1->addNext($2); } ; +//UNSUPc_case_generate_itemList: // IEEE: { case_generate_item } (for checkers) +//UNSUP BISONPRE_COPY(case_generate_itemList,{s/~c~/c_/g}) // {copied} +//UNSUP ; + case_generate_item: // ==IEEE: case_generate_item caseCondList ':' generate_block_or_null { $$ = new AstCaseItem($2,$1,$3); } | yDEFAULT ':' generate_block_or_null { $$ = new AstCaseItem($1,NULL,$3); } | yDEFAULT generate_block_or_null { $$ = new AstCaseItem($1,NULL,$2); } ; +//UNSUPc_case_generate_item: // IEEE: case_generate_item (for checkers) +//UNSUP BISONPRE_COPY(case_generate_item,{s/~c~/c_/g}) // {copied} +//UNSUP ; + //************************************************ // Assignments and register declarations @@ -2123,6 +2172,13 @@ assignOne: variable_lvalue '=' expr { $$ = new AstAssignW($2,$1,$3); } ; +//UNSUPdelay_or_event_controlE: // IEEE: delay_or_event_control plus empty +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | delay_control { $$ = $1; } +//UNSUP | event_control { $$ = $1; } +//UNSUP | yREPEAT '(' expr ')' event_control { } +//UNSUP ; + delayE: /* empty */ { } | delay_control { $1->v3warn(ASSIGNDLY,"Unsupported: Ignoring delay on this assignment/primitive."); } /* ignored */ @@ -2146,6 +2202,7 @@ delay_value: // ==IEEE:delay_value delayExpr: expr { DEL($1); } // // Verilator doesn't support yaTIMENUM, so not in expr + //UNSUP below doesn't belong here: | yaTIMENUM { } ; @@ -2389,9 +2446,10 @@ cellpinItemE: // IEEE: named_port_connection + empty | '.' idAny { $$ = new AstPin($2,PINNUMINC(),*$2,new AstParseRef($2,VParseRefExp::PX_TEXT,*$2,NULL,NULL)); $$->svImplicit(true);} | '.' idAny '(' ')' { $$ = new AstPin($2,PINNUMINC(),*$2,NULL); } // // mintypmax is expanded here, as it might be a UDP or gate primitive + //UNSUP pev_expr below | '.' idAny '(' expr ')' { $$ = new AstPin($2,PINNUMINC(),*$2,$4); } - //UNSUP '.' idAny '(' expr ':' expr ')' { } - //UNSUP '.' idAny '(' expr ':' expr ':' expr ')' { } + //UNSUP '.' idAny '(' pev_expr ':' expr ')' { } + //UNSUP '.' idAny '(' pev_expr ':' expr ':' expr ')' { } // | expr { $$ = new AstPin(FILELINE_OR_CRE($1),PINNUMINC(),"",$1); } //UNSUP expr ':' expr { } @@ -2417,6 +2475,7 @@ event_control: // ==IEEE: event_control | '@' '(' '*' ')' { $$ = NULL; } | '@' '*' { $$ = NULL; } // // IEEE: hierarchical_event_identifier + // // UNSUP below should be idClassSel | '@' senitemVar { $$ = new AstSenTree($1,$2); } /* For events only */ // // IEEE: sequence_instance // // sequence_instance without parens matches idClassSel above. @@ -2429,9 +2488,13 @@ event_control: // ==IEEE: event_control ; event_expression: // IEEE: event_expression - split over several + //UNSUP // Below are all removed senitem { $$ = $1; } | event_expression yOR senitem { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } | event_expression ',' senitem { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } /* Verilog 2001 */ + //UNSUP // Above are all removed, replace with: + //UNSUP ev_expr { $$ = $1; } + //UNSUP event_expression ',' ev_expr %prec yOR { $$ = VN_CAST($1->addNextNull($3), NodeSenItem); } ; senitem: // IEEE: part of event_expression, non-'OR' ',' terms @@ -2452,13 +2515,20 @@ senitemVar: ; senitemEdge: // IEEE: part of event_expression + //UNSUP // Below are all removed yPOSEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_POSEDGE, $2); } | yNEGEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_NEGEDGE, $2); } | yEDGE idClassSel { $$ = new AstSenItem($1, VEdgeType::ET_BOTHEDGE, $2); } | yPOSEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_POSEDGE, $3); } | yNEGEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_NEGEDGE, $3); } | yEDGE '(' idClassSel ')' { $$ = new AstSenItem($1, VEdgeType::ET_BOTHEDGE, $3); } - //UNSUP yIFF... + //UNSUP // Above are all removed, replace with: + //UNSUP yPOSEDGE expr { UNSUP } + //UNSUP yPOSEDGE expr yIFF expr { UNSUP } + //UNSUP yNEGEDGE expr { UNSUP } + //UNSUP yNEGEDGE expr yIFF expr { UNSUP } + //UNSUP yEDGE expr { UNSUP } + //UNSUP yEDGE expr yIFF expr { UNSUP } ; //************************************************ @@ -2696,6 +2766,21 @@ statementVerilatorPragmas: yVL_COVERAGE_BLOCK_OFF { $$ = new AstPragma($1,AstPragmaType::COVERAGE_BLOCK_OFF); } ; +//UNSUPoperator_assignment: // IEEE: operator_assignment +//UNSUP ~f~exprLvalue '=' delay_or_event_controlE expr { } +//UNSUP | ~f~exprLvalue yP_PLUSEQ expr { } +//UNSUP | ~f~exprLvalue yP_MINUSEQ expr { } +//UNSUP | ~f~exprLvalue yP_TIMESEQ expr { } +//UNSUP | ~f~exprLvalue yP_DIVEQ expr { } +//UNSUP | ~f~exprLvalue yP_MODEQ expr { } +//UNSUP | ~f~exprLvalue yP_ANDEQ expr { } +//UNSUP | ~f~exprLvalue yP_OREQ expr { } +//UNSUP | ~f~exprLvalue yP_XOREQ expr { } +//UNSUP | ~f~exprLvalue yP_SLEFTEQ expr { } +//UNSUP | ~f~exprLvalue yP_SRIGHTEQ expr { } +//UNSUP | ~f~exprLvalue yP_SSRIGHTEQ expr { } +//UNSUP ; + foperator_assignment: // IEEE: operator_assignment (for first part of expression) fexprLvalue '=' delayE expr { $$ = new AstAssign($2,$1,$4); } | fexprLvalue '=' yD_FOPEN '(' expr ')' { $$ = NULL; BBUNSUP($3, "Unsupported: $fopen with multichannel descriptor. Add ,\"w\" as second argument to open a file descriptor."); } @@ -2714,16 +2799,45 @@ foperator_assignment: // IEEE: operator_assignment (for first part of exp | fexprLvalue yP_SLEFTEQ expr { $$ = new AstAssign($2,$1,new AstShiftL ($2,$1->cloneTree(true),$3)); } | fexprLvalue yP_SRIGHTEQ expr { $$ = new AstAssign($2,$1,new AstShiftR ($2,$1->cloneTree(true),$3)); } | fexprLvalue yP_SSRIGHTEQ expr { $$ = new AstAssign($2,$1,new AstShiftRS($2,$1->cloneTree(true),$3)); } + //UNSUP replace above with: + //UNSUP BISONPRE_COPY(operator_assignment,{s/~f~/f/g}) // {copied} ; +//UNSUPinc_or_dec_expression: // ==IEEE: inc_or_dec_expression +//UNSUP // // Need fexprScope instead of variable_lvalue to prevent conflict +//UNSUP ~l~exprScope yP_PLUSPLUS { $$=$1; $$ = $1+$2; } +//UNSUP | ~l~exprScope yP_MINUSMINUS { $$=$1; $$ = $1+$2; } +//UNSUP // // Need expr instead of variable_lvalue to prevent conflict +//UNSUP | yP_PLUSPLUS expr { $$=$1; $$ = $1+$2; } +//UNSUP | yP_MINUSMINUS expr { $$=$1; $$ = $1+$2; } +//UNSUP ; + finc_or_dec_expression: // ==IEEE: inc_or_dec_expression - //UNSUP: Generic scopes in incrementes + //UNSUP: Generic scopes in incrementes, remove below fexprLvalue yP_PLUSPLUS { $$ = new AstAssign($2,$1,new AstAdd ($2,$1->cloneTree(true),new AstConst($2, AstConst::StringToParse(), "'b1"))); } | fexprLvalue yP_MINUSMINUS { $$ = new AstAssign($2,$1,new AstSub ($2,$1->cloneTree(true),new AstConst($2, AstConst::StringToParse(), "'b1"))); } | yP_PLUSPLUS fexprLvalue { $$ = new AstAssign($1,$2,new AstAdd ($1,$2->cloneTree(true),new AstConst($1, AstConst::StringToParse(), "'b1"))); } | yP_MINUSMINUS fexprLvalue { $$ = new AstAssign($1,$2,new AstSub ($1,$2->cloneTree(true),new AstConst($1, AstConst::StringToParse(), "'b1"))); } + //UNSUP: Generic scopes in incrementes, remove above + //UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/f/g}) // {copied} ; +//UNSUPsinc_or_dec_expression: // IEEE: inc_or_dec_expression (for sequence_expression) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpinc_or_dec_expression: // IEEE: inc_or_dec_expression (for property_expression) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_inc_or_dec_expression: // IEEE: inc_or_dec_expression (for ev_expr) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_inc_or_dec_expression: // IEEE: inc_or_dec_expression (for pev_expr) +//UNSUP BISONPRE_COPY(inc_or_dec_expression,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + class_new: // ==IEEE: class_new // // Special precence so (...) doesn't match expr yNEW__ETC { $$ = new AstNew($1); } @@ -2759,6 +2873,11 @@ caseAttrE: | caseAttrE yVL_PARALLEL_CASE { GRAMMARP->m_caseAttrp->parallelPragma(true); } ; +//UNSUPcase_patternListE: // IEEE: case_pattern_item +//UNSUP // &&& is part of expr so aliases to case_itemList +//UNSUP case_itemListE { $$ = $1; } +//UNSUP ; + case_itemListE: // IEEE: [ { case_item } ] /* empty */ { $$ = NULL; } | case_itemList { $$ = $1; } @@ -2801,6 +2920,11 @@ value_range: // ==IEEE: value_range | '[' expr ':' expr ']' { $$ = new AstInsideRange($1, $2, $4); } ; +//UNSUPcovergroup_value_range: // ==IEEE-2012: covergroup_value_range +//UNSUP cgexpr { $$ = $1; } +//UNSUP | '[' cgexpr ':' cgexpr ']' { } +//UNSUP ; + caseCondList: // IEEE: part of case_item expr { $$ = $1; } | caseCondList ',' expr { $$ = $1;$1->addNext($3); } @@ -2897,6 +3021,7 @@ for_initializationItem: // IEEE: variable_assignment + for_variable_decl $$ = VARDONEA($3,*$3,NULL,NULL); $$->addNext(new AstAssign($4, new AstVarRef($3, *$3, true), $5));} // // IEEE: variable_assignment + // // UNSUP variable_lvalue below | varRefBase '=' expr { $$ = new AstAssign($2, $1, $3); } ; @@ -2906,8 +3031,22 @@ for_stepE: // IEEE: for_step + empty ; for_step: // IEEE: for_step + for_step_assignment { $$ = $1; } + | for_step ',' for_step_assignment { $$ = $1; $1->v3error("Unsupported: for loop step after the first comma"); } + ; + +for_step_assignment: // ==IEEE: for_step_assignment + //UNSUP operator_assignment { $$ = $1; } + // + //UNSUP inc_or_dec_expression { $$ = $1; } + // // IEEE: subroutine_call + //UNSUP function_subroutine_callNoMethod { $$ = $1; } + // // method_call:array_method requires a '.' + //UNSUP expr '.' array_methodNoRoot { } + //UNSUP exprScope { $$ = $1; } + //UNSUP remove below genvar_iteration { $$ = $1; } - | for_step ',' genvar_iteration { $$ = $1; $1->v3error("Unsupported: for loop step after the first comma"); } + //UNSUP remove above ; loop_variables: // IEEE: loop_variables @@ -2936,6 +3075,7 @@ funcRef: // IEEE: part of tf_call // id '(' list_of_argumentsE ')' { $$ = new AstFuncRef($1, *$1, $3); } | package_scopeIdFollows id '(' list_of_argumentsE ')' { $$ = AstDot::newIfPkg($2, $1, new AstFuncRef($2,*$2,$4)); } + //UNSUP list_of_argumentE should be pev_list_of_argumentE //UNSUP: idDotted is really just id to allow dotted method calls ; @@ -3129,6 +3269,14 @@ elaboration_system_task_guts: // IEEE: part of elaboration_system_task (1 | yD_FATAL '(' expr ',' exprListE ')' { $$ = new AstElabDisplay($1, AstDisplayType::DT_FATAL, $5); DEL($3); } ; +//UNSUPproperty_actual_arg: // ==IEEE: property_actual_arg +//UNSUP // // IEEE: property_expr +//UNSUP // // IEEE: sequence_actual_arg +//UNSUP pev_expr { $$ = $1; } +//UNSUP // // IEEE: sequence_expr +//UNSUP // // property_expr already includes sequence_expr +//UNSUP ; + exprOrDataType: // expr | data_type: combined to prevent conflicts expr { $$ = $1; } // // data_type includes id that overlaps expr, so special flavor @@ -3137,6 +3285,20 @@ exprOrDataType: // expr | data_type: combined to prevent conflicts //UNSUP event_control { } ; +//UNSUPexprOrDataTypeOrMinTypMax: // exprOrDataType or mintypmax_expression +//UNSUP expr { $$ = $1; } +//UNSUP | expr ':' expr ':' expr { $$ = $3; } +//UNSUP // // data_type includes id that overlaps expr, so special flavor +//UNSUP | data_type { $$ = $1; } +//UNSUP // // not in spec, but needed for $past(sig,1,,@(posedge clk)) +//UNSUP | event_control { $$ = $1; } +//UNSUP ; + +//UNSUPexprOrDataTypeList: +//UNSUP exprOrDataType { $$ = $1; } +//UNSUP | exprOrDataTypeList ',' exprOrDataType { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + list_of_argumentsE: // IEEE: [list_of_arguments] argsDottedList { $$ = $1; } | argsExprListE { if (VN_IS($1, Arg) && VN_CAST($1, Arg)->emptyConnectNoNext()) { $1->deleteTree(); $$ = NULL; } // Mis-created when have 'func()' @@ -3338,6 +3500,7 @@ array_methodNoRoot: yOR { $$ = new AstFuncRef($1, "or", NULL); } | yAND { $$ = new AstFuncRef($1, "and", NULL); } | yXOR { $$ = new AstFuncRef($1, "xor", NULL); } + //UNSUP yUNIQUE { $$ = new AstFuncRef($1, "unique", NULL); } ; dpi_import_export: // ==IEEE: dpi_import_export @@ -3444,9 +3607,18 @@ expr: // IEEE: part of expression/constant_expression/primary | ~l~expr yP_SRIGHT ~r~expr { $$ = new AstShiftR ($2,$1,$3); } | ~l~expr yP_SSRIGHT ~r~expr { $$ = new AstShiftRS ($2,$1,$3); } | ~l~expr yP_LTMINUSGT ~r~expr { $$ = new AstLogEq ($2,$1,$3); } + // + // // IEEE: expr yP_MINUSGT expr (1800-2009) + // // Conflicts with constraint_expression:"expr yP_MINUSGT constraint_set" + // // To duplicating expr for constraints, just allow the more general form + // // Later Ast processing must ignore constraint terms where inappropriate + //UNSUP ~l~expr yP_MINUSGT constraint_set { $$=$1; $$ = $1+$2+$3; } + //UNSUP remove line below + | ~l~expr yP_MINUSGT ~r~expr { $$ = new AstLogIf($2, $1, $3); } + // // // <= is special, as we need to disambiguate it with <= assignment // // We copy all of expr to fexpr and rename this token to a fake one. - | ~l~expr yP_LTE~f__IGNORE~ ~r~expr { $$ = new AstLte ($2,$1,$3); } + | ~l~expr yP_LTE~f__IGNORE~ ~r~expr { $$ = new AstLte($2, $1, $3); } // // // IEEE: conditional_expression | ~l~expr '?' ~r~expr ':' ~r~expr { $$ = new AstCond($2,$1,$3,$5); } @@ -3458,10 +3630,6 @@ expr: // IEEE: part of expression/constant_expression/primary //UNSUP yTAGGED id/*member*/ %prec prTAGGED { UNSUP } //UNSUP yTAGGED id/*member*/ %prec prTAGGED expr { UNSUP } // - //======================// PSL expressions - // - | ~l~expr yP_MINUSGT ~r~expr { $$ = new AstLogIf ($2,$1,$3); } - // //======================// IEEE: primary/constant_primary // // // IEEE: primary_literal (minus string, which is handled specially) @@ -3481,6 +3649,7 @@ expr: // IEEE: part of expression/constant_expression/primary // // // IEEE: multiple_concatenation/constant_multiple_concatenation | '{' constExpr '{' cateList '}' '}' { $$ = new AstReplicate($3, $4, $2); } + // // UNSUP some other rules above // | function_subroutine_callNoMethod { $$ = $1; } // // method_call @@ -3545,6 +3714,35 @@ fexpr: // For use as first part of statement (disambiguates <=) BISONPRE_COPY(expr,{s/~l~/f/g; s/~r~/f/g; s/~f__IGNORE~/__IGNORE/g;}) // {copied} ; +//UNSUPev_expr: // IEEE: event_expression +//UNSUP // // for yOR/, see event_expression +//UNSUP // +//UNSUP // // IEEE: [ edge_identifier ] expression [ yIFF expression ] +//UNSUP // // expr alone see below +//UNSUP senitemEdge { $$ = $1; } +//UNSUP | ev_expr yIFF expr { } +//UNSUP // +//UNSUP // // IEEE: sequence_instance [ yIFF expression ] +//UNSUP // // seq_inst is in expr, so matches senitem rule above +//UNSUP // +//UNSUP // // IEEE: event_expression yOR event_expression +//UNSUP | ev_expr yOR ev_expr { } +//UNSUP // // IEEE: event_expression ',' event_expression +//UNSUP // // See real event_expression rule +//UNSUP // +//UNSUP //--------------------- +//UNSUP // // IEEE: expr +//UNSUP | BISONPRE_COPY(expr,{s/~l~/ev_/g; s/~r~/ev_/g; s/~p~/ev_/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g;}) // {copied} +//UNSUP // +//UNSUP // // IEEE: '(' event_expression ')' +//UNSUP // // expr:'(' x ')' conflicts with event_expression:'(' event_expression ')' +//UNSUP // // so we use a special expression class +//UNSUP | '(' event_expression ')' { $$=$1; $$ = "(...)"; } +//UNSUP // // IEEE: From normal expr: '(' expr ':' expr ':' expr ')' +//UNSUP // // But must avoid conflict +//UNSUP | '(' event_expression ':' expr ':' expr ')' { $$=$1; $$ = "(...)"; } +//UNSUP ; + exprNoStr: // expression with string removed BISONPRE_COPY(expr,{s/~noStr__IGNORE~/Ignore/g;}) // {copied} ; @@ -3575,6 +3773,22 @@ fexprOkLvalue: // exprOkLValue, For use as first part of statement (disa BISONPRE_COPY(exprOkLvalue,{s/~l~/f/g}) // {copied} ; +//UNSUPsexprOkLvalue: // exprOkLValue, For use by sequence_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpexprOkLvalue: // exprOkLValue, For use by property_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_exprOkLvalue: // exprOkLValue, For use by ev_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_exprOkLvalue: // exprOkLValue, For use by ev_expr +//UNSUP BISONPRE_COPY(exprOkLvalue,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + fexprLvalue: // For use as first part of statement (disambiguates <=) fexprOkLvalue { $$=$1; $$ = $1; } ; @@ -3604,6 +3818,22 @@ fexprScope: // exprScope, For use as first part of statement (disambigua BISONPRE_COPY(exprScope,{s/~l~/f/g}) // {copied} ; +//UNSUPsexprScope: // exprScope, For use by sequence_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/s/g}) // {copied} +//UNSUP ; + +//UNSUPpexprScope: // exprScope, For use by property_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/p/g}) // {copied} +//UNSUP ; + +//UNSUPev_exprScope: // exprScope, For use by ev_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/ev_/g}) // {copied} +//UNSUP ; + +//UNSUPpev_exprScope: // exprScope, For use by ev_expr +//UNSUP BISONPRE_COPY(exprScope,{s/~l~/pev_/g}) // {copied} +//UNSUP ; + // PLI calls exclude "" as integers, they're strings // For $c("foo","bar") we want "bar" as a string, not a Verilog integer. exprStrText: @@ -3657,21 +3887,41 @@ argsExprListE: // IEEE: part of list_of_arguments | argsExprListE ',' argsExprOneE { $$ = $1->addNext($3); } ; +//UNSUPpev_argsExprListE: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP pev_argsExprOneE { $$ = $1; } +//UNSUP | pev_argsExprListE ',' pev_argsExprOneE { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + argsExprOneE: // IEEE: part of list_of_arguments /*empty*/ { $$ = new AstArg(CRELINE(), "", NULL); } | expr { $$ = new AstArg($1->fileline(), "", $1); } ; +//UNSUPpev_argsExprOneE: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP /*empty*/ { $$ = NULL; } // ,, is legal in list_of_arguments +//UNSUP | pev_expr { $$ = $1; } +//UNSUP ; + argsDottedList: // IEEE: part of list_of_arguments argsDotted { $$ = $1; } | argsDottedList ',' argsDotted { $$ = $1->addNextNull($3); } ; +//UNSUPpev_argsDottedList: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP pev_argsDotted { $$ = $1; } +//UNSUP | pev_argsDottedList ',' pev_argsDotted { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + argsDotted: // IEEE: part of list_of_arguments '.' idAny '(' ')' { $$ = new AstArg($2, *$2, NULL); } | '.' idAny '(' expr ')' { $$ = new AstArg($2, *$2, $4); } ; +//UNSUPpev_argsDotted: // IEEE: part of list_of_arguments - pev_expr at bottom +//UNSUP '.' idAny '(' ')' { $$ = new AstArg($2, *$2, NULL); } +//UNSUP | '.' idAny '(' pev_expr ')' { $$ = new AstArg($2, *$2, $4); } +//UNSUP ; + streaming_concatenation: // ==IEEE: streaming_concatenation // // Need to disambiguate {<< expr-{ ... expr-} stream_concat } // // From {<< stream-{ ... stream-} } @@ -3998,6 +4248,11 @@ variable_lvalueConcList: // IEEE: part of variable_lvalue: '{' variable_l | variable_lvalueConcList ',' variable_lvalue { $$ = new AstConcat($2,$1,$3); } ; +//UNSUPvariable_lvalueList: // IEEE: part of variable_lvalue: variable_lvalue { ',' variable_lvalue } +//UNSUP variable_lvalue { $$ = $1; } +//UNSUP | variable_lvalueList ',' variable_lvalue { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + // VarRef to dotted, and/or arrayed, and/or bit-ranged variable idClassSel: // Misc Ref to dotted, and/or arrayed, and/or bit-ranged variable idDotted { $$ = $1; } @@ -4240,9 +4495,19 @@ concurrent_assertion_item: // IEEE: concurrent_assertion_item concurrent_assertion_statement: // ==IEEE: concurrent_assertion_statement // // IEEE: assert_property_statement + //UNSUP remove below: yASSERT yPROPERTY '(' property_spec ')' elseStmtBlock { $$ = new AstAssert($1, $4, NULL, $6, false); } + //UNSUP yASSERT yPROPERTY '(' property_spec ')' action_block { } + // // IEEE: assume_property_statement + //UNSUP yASSUME yPROPERTY '(' property_spec ')' action_block { } // // IEEE: cover_property_statement | yCOVER yPROPERTY '(' property_spec ')' stmtBlock { $$ = new AstCover($1, $4, $6, false); } + // // IEEE: cover_sequence_statement + //UNSUP yCOVER ySEQUENCE '(' sexpr ')' stmt { } + // // IEEE: yCOVER ySEQUENCE '(' clocking_event sexpr ')' stmt + // // sexpr already includes "clocking_event sexpr" + //UNSUP yCOVER ySEQUENCE '(' clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' sexpr ')' stmt { } + //UNSUP yCOVER ySEQUENCE '(' yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' sexpr ')' stmt { } // // IEEE: restrict_property_statement | yRESTRICT yPROPERTY '(' property_spec ')' ';' { $$ = new AstRestrict($1, $4); } ; @@ -4252,22 +4517,362 @@ elseStmtBlock: // Part of concurrent_assertion_statement | yELSE stmtBlock { $$ = $2; } ; +//UNSUPproperty_declaration: // ==IEEE: property_declaration +//UNSUP property_declarationFront property_port_listE ';' property_declarationBody +//UNSUP yENDPROPERTY endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPproperty_declarationFront: // IEEE: part of property_declaration +//UNSUP yPROPERTY idAny/*property_identifier*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPproperty_port_listE: // IEEE: [ ( [ property_port_list ] ) ] +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | '(' {VARRESET_LIST(""); VARIO("input"); } property_port_list ')' +//UNSUP { VARRESET_NONLIST(""); } +//UNSUP ; + +//UNSUPproperty_port_list: // ==IEEE: property_port_list +//UNSUP property_port_item { $$ = $1; } +//UNSUP | property_port_list ',' property_port_item { } +//UNSUP ; + +//UNSUPproperty_port_item: // IEEE: property_port_item/sequence_port_item +//UNSUP // // Merged in sequence_port_item +//UNSUP // // IEEE: property_lvar_port_direction ::= yINPUT +//UNSUP // // prop IEEE: [ yLOCAL [ yINPUT ] ] property_formal_type +//UNSUP // // id {variable_dimension} [ '=' property_actual_arg ] +//UNSUP // // seq IEEE: [ yLOCAL [ sequence_lvar_port_direction ] ] sequence_formal_type +//UNSUP // // id {variable_dimension} [ '=' sequence_actual_arg ] +//UNSUP property_port_itemFront property_port_itemAssignment { } +//UNSUP ; + +//UNSUPproperty_port_itemFront: // IEEE: part of property_port_item/sequence_port_item +//UNSUP property_port_itemDirE property_formal_typeNoDt { VARDTYPE($2); } +//UNSUP // // data_type_or_implicit +//UNSUP | property_port_itemDirE data_type { VARDTYPE($2); } +//UNSUP | property_port_itemDirE yVAR data_type { VARDTYPE($3); } +//UNSUP | property_port_itemDirE yVAR implicit_typeE { VARDTYPE($3); } +//UNSUP | property_port_itemDirE signingE rangeList { VARDTYPE(SPACED($2,$3)); } +//UNSUP | property_port_itemDirE /*implicit*/ { /*VARDTYPE-same*/ } +//UNSUP ; + +//UNSUPproperty_port_itemAssignment: // IEEE: part of property_port_item/sequence_port_item/checker_port_direction +//UNSUP portSig variable_dimensionListE { VARDONE($1, $1, $2, ""); PINNUMINC(); } +//UNSUP | portSig variable_dimensionListE '=' property_actual_arg +//UNSUP { VARDONE($1, $1, $2, $4); PINNUMINC(); } +//UNSUP ; + +//UNSUPproperty_port_itemDirE: +//UNSUP /* empty */ { $$ = NULL; } +//UNSUP | yLOCAL__ETC { } +//UNSUP | yLOCAL__ETC port_direction { } +//UNSUP ; + +//UNSUPproperty_declarationBody: // IEEE: part of property_declaration +//UNSUP assertion_variable_declarationList property_statement_spec { } +//UNSUP // // IEEE-2012: Incorectly hasyCOVER ySEQUENCE then property_spec here. +//UNSUP // // Fixed in IEEE 1800-2017 +//UNSUP | property_statement_spec { $$ = $1; } +//UNSUP ; + +//UNSUPassertion_variable_declarationList: // IEEE: part of assertion_variable_declaration +//UNSUP assertion_variable_declaration { $$ = $1; } +//UNSUP | assertion_variable_declarationList assertion_variable_declaration { } +//UNSUP ; + +//UNSUPsequence_declaration: // ==IEEE: sequence_declaration +//UNSUP sequence_declarationFront sequence_port_listE ';' sequence_declarationBody +//UNSUP yENDSEQUENCE endLabelE +//UNSUP { SYMP->popScope($$); } +//UNSUP ; + +//UNSUPsequence_declarationFront: // IEEE: part of sequence_declaration +//UNSUP ySEQUENCE idAny/*new_sequence*/ +//UNSUP { SYMP->pushNew($$); } +//UNSUP ; + +//UNSUPsequence_port_listE: // IEEE: [ ( [ sequence_port_list ] ) ] +//UNSUP // // IEEE: sequence_lvar_port_direction ::= yINPUT | yINOUT | yOUTPUT +//UNSUP // // IEEE: [ yLOCAL [ sequence_lvar_port_direction ] ] sequence_formal_type +//UNSUP // // id {variable_dimension} [ '=' sequence_actual_arg ] +//UNSUP // // All this is almost identically the same as a property. +//UNSUP // // Difference is only yINOUT/yOUTPUT (which might be added to 1800-2012) +//UNSUP // // and yPROPERTY. So save some work. +//UNSUP property_port_listE { $$ = $1; } +//UNSUP ; + +//UNSUPproperty_formal_typeNoDt: // IEEE: property_formal_type (w/o implicit) +//UNSUP sequence_formal_typeNoDt { $$ = $1; } +//UNSUP | yPROPERTY { } +//UNSUP ; + +//UNSUPsequence_formal_typeNoDt: // ==IEEE: sequence_formal_type (w/o data_type_or_implicit) +//UNSUP // // IEEE: data_type_or_implicit +//UNSUP // // implicit expanded where used +//UNSUP ySEQUENCE { } +//UNSUP // // IEEE-2009: yEVENT +//UNSUP // // already part of data_type. Removed in 1800-2012. +//UNSUP | yUNTYPED { } +//UNSUP ; + +//UNSUPsequence_declarationBody: // IEEE: part of sequence_declaration +//UNSUP // // 1800-2012 makes ';' optional +//UNSUP assertion_variable_declarationList sexpr { } +//UNSUP | assertion_variable_declarationList sexpr ';' { } +//UNSUP | sexpr { $$ = $1; } +//UNSUP | sexpr ';' { $$ = $1; } +//UNSUP ; + property_spec: // IEEE: property_spec //UNSUP: This rule has been super-specialized to what is supported now + //UNSUP remove below '@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($1, $3, $8, $10); } | '@' '(' senitemEdge ')' pexpr { $$ = new AstPropClocked($1, $3, NULL, $5); } + //UNSUP remove above | yDISABLE yIFF '(' expr ')' pexpr { $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); } | pexpr { $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); } ; +//UNSUPproperty_statement_spec: // ==IEEE: property_statement_spec +//UNSUP // // IEEE: [ clocking_event ] [ yDISABLE yIFF '(' expression_or_dist ')' ] property_statement +//UNSUP property_statement { $$ = $1; } +//UNSUP | yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statement { } +//UNSUP // // IEEE: clocking_event property_statement +//UNSUP // // IEEE: clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statement +//UNSUP // // Both overlap pexpr:"clocking_event pexpr" the difference is +//UNSUP // // property_statement:property_statementCaseIf so replicate it +//UNSUP | clocking_event property_statementCaseIf { } +//UNSUP | clocking_event yDISABLE yIFF '(' expr/*expression_or_dist*/ ')' property_statementCaseIf { } +//UNSUP ; + +//UNSUPproperty_statement: // ==IEEE: property_statement +//UNSUP // // Doesn't make sense to have "pexpr ;" in pexpr rule itself, so we split out case/if +//UNSUP pexpr ';' { $$ = $1; } +//UNSUP // // Note this term replicated in property_statement_spec +//UNSUP // // If committee adds terms, they may need to be there too. +//UNSUP | property_statementCaseIf { $$ = $1; } +//UNSUP ; + +//UNSUPproperty_statementCaseIf: // IEEE: property_statement - minus pexpr +//UNSUP yCASE '(' expr/*expression_or_dist*/ ')' property_case_itemList yENDCASE { } +//UNSUP | yCASE '(' expr/*expression_or_dist*/ ')' yENDCASE { } +//UNSUP | yIF '(' expr/*expression_or_dist*/ ')' pexpr %prec prLOWER_THAN_ELSE { } +//UNSUP | yIF '(' expr/*expression_or_dist*/ ')' pexpr yELSE pexpr { } +//UNSUP ; + +//UNSUPproperty_case_itemList: // IEEE: {property_case_item} +//UNSUP property_case_item { $$ = $1; } +//UNSUP | property_case_itemList ',' property_case_item { $$ = AstNode::addNextNull($1, $3); } +//UNSUP ; + +//UNSUPproperty_case_item: // ==IEEE: property_case_item +//UNSUP // // IEEE: expression_or_dist { ',' expression_or_dist } ':' property_statement +//UNSUP // // IEEE 1800-2012 changed from property_statement to property_expr +//UNSUP // // IEEE 1800-2017 changed to require the semicolon +//UNSUP caseCondList ':' pexpr { } +//UNSUP | caseCondList ':' pexpr ';' { } +//UNSUP | yDEFAULT pexpr { } +//UNSUP | yDEFAULT ':' pexpr ';' { } +//UNSUP ; + +//UNSUPpev_expr: // IEEE: property_actual_arg | expr +//UNSUP // // which expands to pexpr | event_expression +//UNSUP // // Used in port and function calls, when we can't know yet if something +//UNSUP // // is a function/sequence/property or instance/checker pin. +//UNSUP // +//UNSUP // // '(' pev_expr ')' +//UNSUP // // Already in pexpr +//UNSUP // // IEEE: event_expression ',' event_expression +//UNSUP // // ','s are legal in event_expressions, but parens required to avoid conflict with port-sep-, +//UNSUP // // IEEE: event_expression yOR event_expression +//UNSUP // // Already in pexpr - needs removal there +//UNSUP // // IEEE: event_expression yIFF expr +//UNSUP // // Already in pexpr - needs removal there +//UNSUP // +//UNSUP senitemEdge { $$ = $1; } +//UNSUP // +//UNSUP //============= pexpr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(pexpr,{s/~o~p/pev_/g; }) // {copied} +//UNSUP // +//UNSUP //============= sexpr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(sexpr,{s/~p~s/pev_/g; }) // {copied} +//UNSUP // +//UNSUP //============= expr rules copied for pev_expr +//UNSUP | BISONPRE_COPY_ONCE(expr,{s/~l~/pev_/g; s/~p~/pev_/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} +//UNSUP ; + pexpr: // IEEE: property_expr (The name pexpr is important as regexps just add an "p" to expr.) //UNSUP: This rule has been super-specialized to what is supported now + //UNSUP remove below expr yP_ORMINUSGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, $1), $3); } //UNSUP expr yP_OREQGT pexpr { $$ = new AstLogOr($2, new AstLogNot($2, new AstPast($2, $1, NULL)), $3); } // This handles disable iff in the past time step incorrectly | expr { $$ = $1; } + //UNSUP remove above, use below: + // + // // IEEE: sequence_expr + // // Expanded below + // + // // IEEE: '(' pexpr ')' + // // Expanded below + // + //UNSUP yNOT pexpr %prec prNEGATION { } + //UNSUP ySTRONG '(' sexpr ')' { } + //UNSUP yWEAK '(' sexpr ')' { } + // // IEEE: pexpr yOR pexpr + // // IEEE: pexpr yAND pexpr + // // Under ~p~sexpr and/or ~p~sexpr + // + // // IEEE: "sequence_expr yP_ORMINUSGT pexpr" + // // Instead we use pexpr to prevent conflicts + //UNSUP ~o~pexpr yP_ORMINUSGT pexpr { } + //UNSUP ~o~pexpr yP_OREQGT pexpr { } + // + // // IEEE-2009: property_statement + // // IEEE-2012: yIF and yCASE + //UNSUP property_statementCaseIf { } + // + //UNSUP ~o~pexpr/*sexpr*/ yP_POUNDMINUSPD pexpr { } + //UNSUP ~o~pexpr/*sexpr*/ yP_POUNDEQPD pexpr { } + //UNSUP yNEXTTIME pexpr { } + //UNSUP yS_NEXTTIME pexpr { } + //UNSUP yNEXTTIME '[' expr/*const*/ ']' pexpr %prec yNEXTTIME { } + //UNSUP yS_NEXTTIME '[' expr/*const*/ ']' pexpr %prec yS_NEXTTIME { } + //UNSUP yALWAYS pexpr { } + //UNSUP yALWAYS '[' cycle_delay_const_range_expression ']' pexpr %prec yALWAYS { } + //UNSUP yS_ALWAYS '[' constant_range ']' pexpr %prec yS_ALWAYS { } + //UNSUP yS_EVENTUALLY pexpr { } + //UNSUP yEVENTUALLY '[' constant_range ']' pexpr %prec yEVENTUALLY { } + //UNSUP yS_EVENTUALLY '[' cycle_delay_const_range_expression ']' pexpr %prec yS_EVENTUALLY { } + //UNSUP ~o~pexpr yUNTIL pexpr { } + //UNSUP ~o~pexpr yS_UNTIL pexpr { } + //UNSUP ~o~pexpr yUNTIL_WITH pexpr { } + //UNSUP ~o~pexpr yS_UNTIL_WITH pexpr { } + //UNSUP ~o~pexpr yIMPLIES pexpr { } + // // yIFF also used by event_expression + //UNSUP ~o~pexpr yIFF ~o~pexpr { } + //UNSUP yACCEPT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec yACCEPT_ON { } + //UNSUP yREJECT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec yREJECT_ON { } + //UNSUP ySYNC_ACCEPT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec ySYNC_ACCEPT_ON { } + //UNSUP ySYNC_REJECT_ON '(' expr/*expression_or_dist*/ ')' pexpr %prec ySYNC_REJECT_ON { } + // + // // IEEE: "property_instance" + // // Looks just like a function/method call + // + // // Note "clocking_event pexpr" overlaps property_statement_spec: clocking_event property_statement + // + // // Include property_specDisable to match property_spec rule + //UNSUP clocking_event yDISABLE yIFF '(' expr ')' pexpr %prec prSEQ_CLOCKING { } + // + //============= sexpr rules copied for property_expr + //UNSUP BISONPRE_COPY_ONCE(sexpr,{s/~p~s/p/g; }) // {copied} + // + //============= expr rules copied for property_expr + //UNSUP BISONPRE_COPY_ONCE(expr,{s/~l~/p/g; s/~p~/p/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} ; +//UNSUPsexpr: // ==IEEE: sequence_expr (The name sexpr is important as regexps just add an "s" to expr.) +//UNSUP // // ********* RULES COPIED IN sequence_exprProp +//UNSUP // // For precedence, see IEEE 17.7.1 +//UNSUP // +//UNSUP // // IEEE: "cycle_delay_range sequence_expr { cycle_delay_range sequence_expr }" +//UNSUP // // IEEE: "sequence_expr cycle_delay_range sequence_expr { cycle_delay_range sequence_expr }" +//UNSUP // // Both rules basically mean we can repeat sequences, so make it simpler: +//UNSUP cycle_delay_range sexpr %prec yP_POUNDPOUND { } +//UNSUP | ~p~sexpr cycle_delay_range sexpr %prec prPOUNDPOUND_MULTI { } +//UNSUP // +//UNSUP // // IEEE: expression_or_dist [ boolean_abbrev ] +//UNSUP // // Note expression_or_dist includes "expr"! +//UNSUP // // sexpr/*sexpression_or_dist*/ --- Hardcoded below +//UNSUP | ~p~sexpr/*sexpression_or_dist*/ boolean_abbrev { } +//UNSUP // +//UNSUP // // IEEE: "sequence_instance [ sequence_abbrev ]" +//UNSUP // // version without sequence_abbrev looks just like normal function call +//UNSUP // // version w/sequence_abbrev matches above; expression_or_dist:expr:func boolean_abbrev:sequence_abbrev +//UNSUP // +//UNSUP // // IEEE: '(' expression_or_dist {',' sequence_match_item } ')' [ boolean_abbrev ] +//UNSUP // // IEEE: '(' sexpr {',' sequence_match_item } ')' [ sequence_abbrev ] +//UNSUP // // As sequence_expr includes expression_or_dist, and boolean_abbrev includes sequence_abbrev: +//UNSUP // // '(' sequence_expr {',' sequence_match_item } ')' [ boolean_abbrev ] +//UNSUP // // "'(' sexpr ')' boolean_abbrev" matches "[sexpr:'(' expr ')'] boolean_abbrev" so we can simply drop it +//UNSUP | '(' ~p~sexpr ')' { $$=$1; $$=$1+$2+$3; } +//UNSUP | '(' ~p~sexpr ',' sequence_match_itemList ')' { } +//UNSUP // +//UNSUP // // AND/OR are between pexprs OR sexprs +//UNSUP | ~p~sexpr yAND ~p~sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP | ~p~sexpr yOR ~p~sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // // Intersect always has an sexpr rhs +//UNSUP | ~p~sexpr yINTERSECT sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // +//UNSUP | yFIRST_MATCH '(' sexpr ')' { } +//UNSUP | yFIRST_MATCH '(' sexpr ',' sequence_match_itemList ')' { } +//UNSUP | ~p~sexpr/*sexpression_or_dist*/ yTHROUGHOUT sexpr { } +//UNSUP // // Below pexpr's are really sequence_expr, but avoid conflict +//UNSUP // // IEEE: sexpr yWITHIN sexpr +//UNSUP | ~p~sexpr yWITHIN sexpr { $$=$1; $$=$1+$2+$3; } +//UNSUP // // Note concurrent_assertion had duplicate rule for below +//UNSUP | clocking_event ~p~sexpr %prec prSEQ_CLOCKING { } +//UNSUP // +//UNSUP //============= expr rules copied for sequence_expr +//UNSUP | BISONPRE_COPY_ONCE(expr,{s/~l~/s/g; s/~p~/s/g; s/~noPar__IGNORE~/yP_PAR__IGNORE /g; }) // {copied} +//UNSUP ; + +//UNSUPcycle_delay_range: // IEEE: ==cycle_delay_range +//UNSUP // // These three terms in 1800-2005 ONLY +//UNSUP yP_POUNDPOUND yaINTNUM { } +//UNSUP | yP_POUNDPOUND id { } +//UNSUP | yP_POUNDPOUND '(' constExpr ')' { } +//UNSUP // // In 1800-2009 ONLY: +//UNSUP // // IEEE: yP_POUNDPOUND constant_primary +//UNSUP // // UNSUP: This causes a big grammer ambiguity +//UNSUP // // as ()'s mismatch between primary and the following statement +//UNSUP // // the sv-ac committee has been asked to clarify (Mantis 1901) +//UNSUP | yP_POUNDPOUND '[' cycle_delay_const_range_expression ']' { } +//UNSUP | yP_POUNDPOUND yP_BRASTAR ']' { } +//UNSUP | yP_POUNDPOUND yP_BRAPLUSKET { } +//UNSUP ; + +//UNSUPsequence_match_itemList: // IEEE: [sequence_match_item] part of sequence_expr +//UNSUP sequence_match_item { $$ = $1; } +//UNSUP | sequence_match_itemList ',' sequence_match_item { } +//UNSUP ; + +//UNSUPsequence_match_item: // ==IEEE: sequence_match_item +//UNSUP // // IEEE says: operator_assignment +//UNSUP // // IEEE says: inc_or_dec_expression +//UNSUP // // IEEE says: subroutine_call +//UNSUP // // This is the same list as... +//UNSUP for_step_assignment { $$ = $1; } +//UNSUP ; + +//UNSUPboolean_abbrev: // ==IEEE: boolean_abbrev +//UNSUP // // IEEE: consecutive_repetition +//UNSUP yP_BRASTAR const_or_range_expression ']' { } +//UNSUP | yP_BRASTAR ']' { } +//UNSUP | yP_BRAPLUSKET { $$ = $1; } +//UNSUP // // IEEE: non_consecutive_repetition +//UNSUP | yP_BRAEQ const_or_range_expression ']' { } +//UNSUP // // IEEE: goto_repetition +//UNSUP | yP_BRAMINUSGT const_or_range_expression ']' { } +//UNSUP ; + +//UNSUPconst_or_range_expression: // ==IEEE: const_or_range_expression +//UNSUP constExpr { $$ = $1; } +//UNSUP | cycle_delay_const_range_expression { } +//UNSUP ; + +//UNSUPconstant_range: // ==IEEE: constant_range +//UNSUP constExpr ':' constExpr { } +//UNSUP ; + +//UNSUPcycle_delay_const_range_expression: // ==IEEE: cycle_delay_const_range_expression +//UNSUP // // Note '$' is part of constExpr +//UNSUP constExpr ':' constExpr { } +//UNSUP ; + //************************************************ // Let From ac1cdf7cdf68a6e6d2fc3d1f1264a5b2b9576a4c Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Sat, 28 Dec 2019 11:44:24 -0500 Subject: [PATCH 61/90] Implement APIs missing on Windows. (#12) --- src/V3File.cpp | 10 +++-- src/V3Options.cpp | 13 ++++-- src/V3Os.cpp | 101 +++++++++++++++++++++++++++++++++++++--------- src/V3Os.h | 3 +- src/V3PreLex.l | 3 ++ 5 files changed, 103 insertions(+), 27 deletions(-) diff --git a/src/V3File.cpp b/src/V3File.cpp index 46c81ded5..3b967b328 100644 --- a/src/V3File.cpp +++ b/src/V3File.cpp @@ -53,6 +53,10 @@ # include #endif +#if defined(_WIN32) || defined(__MINGW32__) +# include // open, read, write, close +#endif + // If change this code, run a test with the below size set very small //#define INFILTER_IPC_BUFSIZ 16 #define INFILTER_IPC_BUFSIZ (64*1024) // For debug, try this as a small number @@ -409,8 +413,7 @@ private: || errno == EWOULDBLOCK #endif ) { - // cppcheck-suppress obsoleteFunctionsusleep - checkFilter(false); usleep(1000); continue; + checkFilter(false); V3Os::u_sleep(1000); continue; } else { m_readEof = true; break; } } return out; @@ -448,8 +451,7 @@ private: || errno == EWOULDBLOCK #endif ) { - // cppcheck-suppress obsoleteFunctionsusleep - checkFilter(false); usleep(1000); continue; + checkFilter(false); V3Os::u_sleep(1000); continue; } else break; } diff --git a/src/V3Options.cpp b/src/V3Options.cpp index 328755ae9..b822406c6 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -44,6 +44,10 @@ #include "config_rev.h" +#if defined(_WIN32) || defined(__MINGW32__) +# include // open, close +#endif + //###################################################################### // V3 Internal state @@ -1364,11 +1368,12 @@ void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) { string optdir = (rel ? V3Os::filenameDir(filename) : "."); // Convert to argv style arg list and parse them - char* argv [args.size()+1]; - for (unsigned i=0; i(args[i].c_str()); + std::vector argv; argv.reserve(args.size()+1); + for (const string &arg : args) { + argv.push_back(const_cast(arg.c_str())); } - parseOptsList(fl, optdir, args.size(), argv); + argv.push_back(nullptr); // argv is NULL-terminated + parseOptsList(fl, optdir, static_cast(argv.size()-1), argv.data()); } //====================================================================== diff --git a/src/V3Os.cpp b/src/V3Os.cpp index baf06d170..c94b7b650 100644 --- a/src/V3Os.cpp +++ b/src/V3Os.cpp @@ -18,6 +18,15 @@ // //************************************************************************* +#if defined(_WIN32) || defined(__MINGW32__) +# ifndef PSAPI_VERSION +# define PSAPI_VERSION 1 // Needed for compatibility with Windows 7 +# endif +#endif +#if defined(__MINGW32__) +# define MINGW_HAS_SECURE_API 1 // Needed to expose a "secure" POSIX-like API +#endif + #include "config_build.h" #include "verilatedos.h" @@ -35,11 +44,18 @@ #include #include #include -#include #include #if defined(_WIN32) || defined(__MINGW32__) +# include // LONG for bcrypt.h on MINGW +# include // BCryptGenRandom +# include # include // mkdir +# include // GetProcessMemoryInfo +# include +#else +# include +# include // usleep #endif @@ -47,11 +63,23 @@ // Environment string V3Os::getenvStr(const string& envvar, const string& defaultValue) { +#if defined(_MSC_VER) + // Note: MinGW does not offer _dupenv_s + char* envvalue; + if (_dupenv_s(&envvalue, nullptr, envvar.c_str()) == 0) { + const std::string result{envvalue}; + free(envvalue); + return result; + } else { + return defaultValue; + } +#else if (const char* envvalue = getenv(envvar.c_str())) { return envvalue; } else { return defaultValue; } +#endif } void V3Os::setenvStr(const string& envvar, const string& value, const string& why) { @@ -60,10 +88,12 @@ void V3Os::setenvStr(const string& envvar, const string& value, const string& wh } else { UINFO(1,"export "<= 200112L)) +#if defined(_WIN32) || defined(__MINGW32__) + _putenv_s(envvar.c_str(), value.c_str()); +#elif defined(_BSD_SOURCE) || (defined(_POSIX_C_SOURCE) && _POSIX_C_SOURCE >= 200112L) setenv(envvar.c_str(), value.c_str(), true); #else - //setenv() replaced by putenv() in MinGW/Solaris environment. Prototype is different + //setenv() replaced by putenv() in Solaris environment. Prototype is different //putenv() requires NAME=VALUE format string vareq = envvar + "=" + value; putenv(const_cast(vareq.c_str())); @@ -130,9 +160,9 @@ string V3Os::filenameSubstitute(const string& filename) { v3fatal("Unmatched brackets in variable substitution in file: "+filename); } string envvar = filename.substr(pos+1, endpos-pos); - const char* envvalue = NULL; - if (envvar != "") envvalue = getenv(envvar.c_str()); - if (envvalue) { + string envvalue; + if (!envvar.empty()) envvalue = getenvStr(envvar, {}); + if (!envvalue.empty()) { out += envvalue; if (brackets==NONE) pos = endpos; else pos = endpos+1; @@ -152,8 +182,8 @@ string V3Os::filenameRealPath(const string& filename) { // If there is a ../ that goes down from the 'root' of this path it is preserved. char retpath[PATH_MAX]; if ( -#if defined( _MSC_VER ) || defined( __MINGW32__ ) - ::_fullpath(retpath, filename.c_str(), PATH_MAX) +#if defined(_WIN32) || defined(__MINGW32__) + _fullpath(retpath, filename.c_str(), PATH_MAX) #else realpath(filename.c_str(), retpath) #endif @@ -188,7 +218,7 @@ string V3Os::getline(std::istream& is, char delim) { void V3Os::createDir(const string& dirname) { #if defined(_WIN32) || defined(__MINGW32__) - mkdir(dirname.c_str()); + _mkdir(dirname.c_str()); #else mkdir(dirname.c_str(), 0777); #endif @@ -199,7 +229,11 @@ void V3Os::unlinkRegexp(const string& dir, const string& regexp) { while (struct dirent* direntp = readdir(dirp)) { if (VString::wildmatch(direntp->d_name, regexp.c_str())) { string fullname = dir + "/" + string(direntp->d_name); +#if defined(_WIN32) || defined(__MINGW32__) + _unlink(fullname.c_str()); +#else unlink(fullname.c_str()); +#endif } } closedir(dirp); @@ -220,15 +254,24 @@ vluint64_t V3Os::rand64(vluint64_t* statep) { } string V3Os::trueRandom(size_t size) { - string data; data.reserve(size); - std::ifstream is ("/dev/urandom", std::ios::in | std::ios::binary); - char bytes[size]; - if (!is.read(bytes, size)) { - v3fatal("Could not open /dev/urandom, no source of randomness. Try specifing a key instead."); - return ""; + string result(size, '\xFF'); + char *const data = const_cast(result.data()); + // Note: std::string.data() returns a non-const Char* from C++17 onwards. + // For pre-C++17, this cast is OK in practice, even though it's UB. +#if defined(_WIN32) || defined(__MINGW32__) + NTSTATUS hr = BCryptGenRandom(NULL, reinterpret_cast(data), size, BCRYPT_USE_SYSTEM_PREFERRED_RNG); + if (!BCRYPT_SUCCESS(hr)) { + v3fatal("Could not acquire random data."); } - data.append(bytes, size); - return data; +#else + std::ifstream is ("/dev/urandom", std::ios::in | std::ios::binary); + // This read uses the size of the buffer. + // Flawfinder: ignore + if (!is.read(data, size)) { + v3fatal("Could not open /dev/urandom, no source of randomness. Try specifing a key instead."); + } +#endif + return result; } //###################################################################### @@ -236,7 +279,13 @@ string V3Os::trueRandom(size_t size) { uint64_t V3Os::timeUsecs() { #if defined(_WIN32) || defined(__MINGW32__) - return 0; + // Microseconds between 1601-01-01 00:00:00 UTC and 1970-01-01 00:00:00 UTC + static const uint64_t EPOCH_DIFFERENCE_USECS = 11644473600000000ull; + + FILETIME ft; // contains number of 0.1us intervals since the beginning of 1601 UTC. + GetSystemTimeAsFileTime(&ft); + uint64_t us = ((static_cast(ft.dwHighDateTime) << 32) + ft.dwLowDateTime + 5ull) / 10ull; + return us - EPOCH_DIFFERENCE_USECS; #else // NOLINTNEXTLINE(cppcoreguidelines-pro-type-member-init) timeval tv; @@ -247,6 +296,12 @@ uint64_t V3Os::timeUsecs() { uint64_t V3Os::memUsageBytes() { #if defined(_WIN32) || defined(__MINGW32__) + HANDLE process = GetCurrentProcess(); + PROCESS_MEMORY_COUNTERS pmc; + if (GetProcessMemoryInfo(process, &pmc, sizeof(pmc))) { + // The best we can do using simple Windows APIs is to get the size of the working set. + return pmc.WorkingSetSize; + } return 0; #else // Highly unportable. Sorry @@ -266,3 +321,13 @@ uint64_t V3Os::memUsageBytes() { return (text + data) * getpagesize(); #endif } + +void V3Os::u_sleep(int64_t usec) { +#if defined(_WIN32) || defined(__MINGW32__) + std::this_thread::sleep_for(std::chrono::microseconds(usec)); +#else + // cppcheck-suppress obsoleteFunctionsusleep + // Flawfinder: ignore + ::usleep(usec); +#endif +} diff --git a/src/V3Os.h b/src/V3Os.h index 261ca0978..1485025f1 100644 --- a/src/V3Os.h +++ b/src/V3Os.h @@ -58,7 +58,8 @@ public: static vluint64_t rand64(vluint64_t* statep); static string trueRandom(size_t size); - // METHODS (performance) + // METHODS (time & performance) + static void u_sleep(int64_t usec); ///< Sleep for a given number of microseconds. static uint64_t timeUsecs(); ///< Return wall time since epoch in microseconds, or 0 if not implemented static uint64_t memUsageBytes(); ///< Return memory usage in bytes, or 0 if not implemented }; diff --git a/src/V3PreLex.l b/src/V3PreLex.l index a749e7c65..0c75ef4cc 100644 --- a/src/V3PreLex.l +++ b/src/V3PreLex.l @@ -27,6 +27,9 @@ #include "V3PreProc.h" #include "V3PreLex.h" +#ifdef _WIN32 +# include // for isatty +#endif V3PreLex* V3PreLex::s_currentLexp = NULL; // Current lexing point From 7bbce51f7bcb41cdd2d6d4f6e4fccd462dd6098b Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Sun, 29 Dec 2019 22:04:03 -0500 Subject: [PATCH 62/90] Add include guard to V3InstrCount.h. (#2075) This is needed for cmake unity build to work. --- src/V3InstrCount.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/V3InstrCount.h b/src/V3InstrCount.h index 6d5ba0c5a..ecc9f73ca 100644 --- a/src/V3InstrCount.h +++ b/src/V3InstrCount.h @@ -19,6 +19,9 @@ // //************************************************************************* +#ifndef _V3INSTRCOUNT_H_ +#define _V3INSTRCOUNT_H_ 1 + #include "config_build.h" #include "verilatedos.h" @@ -41,3 +44,5 @@ public: // Optional osp is stream to dump critical path to. static uint32_t count(AstNode* nodep, bool assertNoDups, std::ostream* osp = NULL); }; + +#endif // guard From 7b384f7eb7abc85387f47a3465609add4b936b20 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Mon, 30 Dec 2019 12:55:36 +0100 Subject: [PATCH 63/90] XML: Add variable attributes (#2079) --- src/V3EmitXml.cpp | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp index ba62b10ab..494a9f319 100644 --- a/src/V3EmitXml.cpp +++ b/src/V3EmitXml.cpp @@ -114,6 +114,7 @@ class EmitXmlFileVisitor : public AstNVisitor { puts(" origName="); putsQuoted(nodep->origName()); if (nodep->level()==1 || nodep->level()==2) // ==2 because we don't add wrapper when in XML mode puts(" topModule=\"1\""); // IEEE vpiTopModule + if (nodep->modPublic()) puts(" public=\"true\""); outputChildrenEnd(nodep, ""); } virtual void visit(AstVar* nodep) { @@ -129,6 +130,16 @@ class EmitXmlFileVisitor : public AstNVisitor { puts(" vartype="); putsQuoted(!vt.empty() ? vt : kw); } puts(" origName="); putsQuoted(nodep->origName()); + // Attributes + if (nodep->attrClocker()) puts(" clocker=\"true\""); + if (nodep->attrClockEn()) puts(" clock_enable=\"true\""); + if (nodep->attrIsolateAssign()) puts(" isolate_assignments=\"true\""); + if (nodep->isSigPublic()) puts(" public=\"true\""); + if (nodep->isSigUserRdPublic()) puts(" public_flat_rd=\"true\""); + if (nodep->isSigUserRWPublic()) puts(" public_flat_rw=\"true\""); + if (nodep->attrScBv()) puts(" sc_bv=\"true\""); + if (nodep->attrScClocked()) puts(" sc_clock=\"true\""); + if (nodep->attrSFormat()) puts(" sformat=\"true\""); outputChildrenEnd(nodep, ""); } virtual void visit(AstPin* nodep) { From 19c8d3226322701154c257bd3257cc83e2b62d41 Mon Sep 17 00:00:00 2001 From: Kuba Ober Date: Mon, 30 Dec 2019 10:56:51 -0500 Subject: [PATCH 64/90] Fix SystemC link in the documentation. (#2076) --- docs/install.adoc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/docs/install.adoc b/docs/install.adoc index 804cdd411..f9bda00fc 100644 --- a/docs/install.adoc +++ b/docs/install.adoc @@ -96,11 +96,11 @@ Those developing Verilator may also want these (see internals.adoc): ==== Install SystemC If you will be using SystemC (vs straight C++ output), download -http://www.systemc.org[SystemC]. Follow their installation instructions. -You will need to set `SYSTEMC_INCLUDE` to point to the include directory -with systemc.h in it, and `SYSTEMC_LIBDIR` to points to the directory with -libsystemc.a in it. (Older installations may set `SYSTEMC` and -`SYSTEMC_ARCH` instead.) +https://www.accellera.org/downloads/standards/systemc[SystemC]. +Follow their installation instructions. You will need to set `SYSTEMC_INCLUDE` +to point to the include directory with `systemc.h` in it, and `SYSTEMC_LIBDIR` +to points to the directory with `libsystemc.a` in it. (Older installations +may set `SYSTEMC` and `SYSTEMC_ARCH` instead.) ==== Install GTKWave From b7665a88dbab6c47b26489999854d577dff78b87 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Mon, 30 Dec 2019 19:15:43 +0100 Subject: [PATCH 65/90] Rename msg to rule in configuration files (#2080) Rename the -msg switch to -rule in configuration files as it is more clear. resolves #2068 --- bin/verilator | 13 ++++++++----- src/verilog.l | 1 + src/verilog.y | 9 +++++++++ test_regress/t/t_vlt_warn.v | 2 +- test_regress/t/t_vlt_warn.vlt | 8 ++++---- 5 files changed, 23 insertions(+), 10 deletions(-) diff --git a/bin/verilator b/bin/verilator index 1a99f5b3f..d2be5ea29 100755 --- a/bin/verilator +++ b/bin/verilator @@ -2737,8 +2737,8 @@ controlled by configuration files, typically named with the .vlt extension. An example: `verilator_config - lint_off -msg WIDTH - lint_off -msg CASEX -file "silly_vendor_code.v" + lint_off -rule WIDTH + lint_off -rule CASEX -file "silly_vendor_code.v" This disables WIDTH warnings globally, and CASEX for a specific file. @@ -2767,9 +2767,9 @@ Enable/disable coverage for the specified filename (or wildcard with '*' or omitted). Often used to ignore an entire module for coverage analysis purposes. -=item lint_on [-msg ] [-file "" [-lines [ - ]]] +=item lint_on [-rule ] [-file "" [-lines [ - ]]] -=item lint_off [-msg ] [-file "" [-lines [ - ]]] +=item lint_off [-rule ] [-file "" [-lines [ - ]]] Enable/disables the specified lint warning, in the specified filename (or wildcard with '*' or '?', or all files if omitted) and range of line @@ -2778,10 +2778,13 @@ numbers (or all lines if omitted). With lint_off using '*' will override any lint_on directives in the source, i.e. the warning will still not be printed. -If the -msg is omitted, all lint warnings (see list in -Wno-lint) are +If the -rule is omitted, all lint warnings (see list in -Wno-lint) are enabled/disabled. This will override all later lint warning enables for the specified region. +In previous versions -rule was named -msg. The latter is deprecated, but +still works with a deprecation info, it may be removed in future versions. + =item tracing_on [-file "" [-lines [ - ]]] =item tracing_off [-file "" [-lines [ - ]]] diff --git a/src/verilog.l b/src/verilog.l index defc5430d..733b41491 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -145,6 +145,7 @@ vnum {vnum1}|{vnum2}|{vnum3}|{vnum4}|{vnum5} -?"-file" { FL; return yVLT_D_FILE; } -?"-lines" { FL; return yVLT_D_LINES; } -?"-msg" { FL; return yVLT_D_MSG; } + -?"-rule" { FL; return yVLT_D_RULE; } } /************************************************************************/ diff --git a/src/verilog.y b/src/verilog.y index e2031c2e1..d51d675f1 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -283,6 +283,7 @@ class AstSenTree; %token yVLT_D_FILE "--file" %token yVLT_D_LINES "--lines" %token yVLT_D_MSG "--msg" +%token yVLT_D_RULE "--rule" %token yaD_IGNORE "${ignored-bbox-sys}" %token yaD_DPI "${dpi-sys}" @@ -5596,6 +5597,10 @@ vltOffFront: | yVLT_TRACING_OFF { $$ = V3ErrorCode::I_TRACING; } | yVLT_LINT_OFF { $$ = V3ErrorCode::I_LINT; } | yVLT_LINT_OFF yVLT_D_MSG yaID__ETC + { $$ = V3ErrorCode((*$3).c_str()); + if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3info("Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3<: | yVLT_TRACING_ON { $$ = V3ErrorCode::I_TRACING; } | yVLT_LINT_ON { $$ = V3ErrorCode::I_LINT; } | yVLT_LINT_ON yVLT_D_MSG yaID__ETC + { $$ = V3ErrorCode((*$3).c_str()); + if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3info("Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3< Date: Thu, 2 Jan 2020 05:38:28 -0500 Subject: [PATCH 66/90] Update gtkwave files --- include/gtkwave/fstapi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/gtkwave/fstapi.c b/include/gtkwave/fstapi.c index c67cb6e4f..720116ba8 100644 --- a/include/gtkwave/fstapi.c +++ b/include/gtkwave/fstapi.c @@ -3010,7 +3010,7 @@ void fstWriterEmitValueChange32(void *ctx, fstHandle handle, uint32_t bits, uint32_t val) { char buf[32]; char *s = buf; - int i; + uint32_t i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); @@ -3021,7 +3021,7 @@ void fstWriterEmitValueChange64(void *ctx, fstHandle handle, uint32_t bits, uint64_t val) { char buf[64]; char *s = buf; - int i; + uint32_t i; for (i = 0; i < bits; ++i) { *s++ = '0' + ((val >> (bits - i - 1)) & 1); From 1957b1ebbdb675f7e4633099ceb67f5fb78721f2 Mon Sep 17 00:00:00 2001 From: Todd Strader Date: Thu, 2 Jan 2020 07:40:15 -0500 Subject: [PATCH 67/90] Fix permissions on build_vcddiff.sh --- ci/build_vcddiff.sh | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100644 => 100755 ci/build_vcddiff.sh diff --git a/ci/build_vcddiff.sh b/ci/build_vcddiff.sh old mode 100644 new mode 100755 From 924fe235a9127803435df1e62d65409bc8ca8012 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Fri, 3 Jan 2020 13:44:45 +0100 Subject: [PATCH 68/90] No assign alias for unpacked public variables (#2089) Public variables are all emitted in the C code and unpacked arrays arrays are sliced up for this. After inlining public unpacked array assignments should not be alias assignments but actual assignments, so that they are sliced and hence emitted properly. Fixes #2073 --- src/V3Inline.cpp | 9 +++++++++ test_regress/t/t_array_unpacked_public.pl | 21 +++++++++++++++++++++ test_regress/t/t_array_unpacked_public.v | 21 +++++++++++++++++++++ 3 files changed, 51 insertions(+) create mode 100755 test_regress/t/t_array_unpacked_public.pl create mode 100644 test_regress/t/t_array_unpacked_public.v diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp index 14d384f61..df4125848 100644 --- a/src/V3Inline.cpp +++ b/src/V3Inline.cpp @@ -322,6 +322,15 @@ private: new AstAssignW(nodep->fileline(), new AstVarRef(nodep->fileline(), exprvarrefp->varp(), true), new AstVarRef(nodep->fileline(), nodep, false))); + } else if (nodep->isSigPublic() && VN_IS(nodep->dtypep(), UnpackArrayDType)) { + // Public variable at this end and it is an unpacked array. We need to assign + // instead of aliased, because otherwise it will pass V3Slice and invalid + // code will be emitted. + UINFO(9,"assign to public and unpacked: "<addStmtp( + new AstAssignW(nodep->fileline(), + new AstVarRef(nodep->fileline(), exprvarrefp->varp(), true), + new AstVarRef(nodep->fileline(), nodep, false))); } else if (nodep->isIfaceRef()) { m_modp->addStmtp( new AstAssignVarScope(nodep->fileline(), diff --git a/test_regress/t/t_array_unpacked_public.pl b/test_regress/t/t_array_unpacked_public.pl new file mode 100755 index 000000000..1bb1cc973 --- /dev/null +++ b/test_regress/t/t_array_unpacked_public.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(simulator => 1); + +compile( + verilator_flags2 => ["--public-flat-rw"], + ); + +execute( + check_finished => 1, + ); + +ok(1); +1; diff --git a/test_regress/t/t_array_unpacked_public.v b/test_regress/t/t_array_unpacked_public.v new file mode 100644 index 000000000..556b85a98 --- /dev/null +++ b/test_regress/t/t_array_unpacked_public.v @@ -0,0 +1,21 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2020 by Stefan Wallentowitz + +module t(); + logic din [0:15]; + + array_test array_test_inst(.din(din)); + + initial begin + $write("*-* All Finished *-*\n"); + $finish; + end +endmodule + +module array_test( + input din [0:15] +); + +endmodule \ No newline at end of file From 37dc33a195b76db537ff3f261136d5de26520a01 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Fri, 3 Jan 2020 17:27:51 +0100 Subject: [PATCH 69/90] Deprecation (#2088) * Add deprecation warning * Deprecate -msg in configuration files * Deprecate sc_clock --- src/V3Error.h | 3 ++- src/V3LinkParse.cpp | 1 + src/verilog.y | 4 ++-- test_regress/t/t_clk_first.v | 8 ++++---- test_regress/t/t_clk_first_bad.out | 5 +++++ test_regress/t/t_clk_first_bad.pl | 21 +++++++++++++++++++++ test_regress/t/t_clk_first_deprecated.pl | 17 +++++++++++++++++ test_regress/t/t_clk_first_deprecated.v | 13 +++++++++++++ test_regress/t/t_vlt_warn.vlt | 5 +++-- test_regress/t/t_vlt_warn_bad.out | 5 +++++ test_regress/t/t_vlt_warn_bad.pl | 21 +++++++++++++++++++++ test_regress/t/t_vlt_warn_bad.vlt | 17 +++++++++++++++++ 12 files changed, 111 insertions(+), 9 deletions(-) create mode 100644 test_regress/t/t_clk_first_bad.out create mode 100755 test_regress/t/t_clk_first_bad.pl create mode 100755 test_regress/t/t_clk_first_deprecated.pl create mode 100644 test_regress/t/t_clk_first_deprecated.v create mode 100644 test_regress/t/t_vlt_warn_bad.out create mode 100755 test_regress/t/t_vlt_warn_bad.pl create mode 100644 test_regress/t/t_vlt_warn_bad.vlt diff --git a/src/V3Error.h b/src/V3Error.h index 98ce5220f..1c1cfae83 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -77,6 +77,7 @@ public: CONTASSREG, // Continuous assignment on reg DEFPARAM, // Style: Defparam DECLFILENAME, // Declaration doesn't match filename + DEPRECATED, // Feature will be deprecated ENDLABEL, // End lable name mismatch GENCLK, // Generated Clock IFDEPTH, // If statements too deep @@ -143,7 +144,7 @@ public: "BLKANDNBLK", "BLKLOOPINIT", "BLKSEQ", "BSSPACE", "CASEINCOMPLETE", "CASEOVERLAP", "CASEWITHX", "CASEX", "CDCRSTLOGIC", "CLKDATA", "CMPCONST", "COLONPLUS", "COMBDLY", "CONTASSREG", - "DEFPARAM", "DECLFILENAME", + "DEFPARAM", "DECLFILENAME", "DEPRECATED", "ENDLABEL", "GENCLK", "IFDEPTH", "IGNOREDRETURN", "IMPERFECTSCH", "IMPLICIT", "IMPORTSTAR", "IMPURE", diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index 05b16ebd8..ff99771f7 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -260,6 +260,7 @@ private: } else if (nodep->attrType() == AstAttrType::VAR_CLOCK) { UASSERT_OBJ(m_varp, nodep, "Attribute not attached to variable"); + nodep->v3warn(DEPRECATED, "sc_clock is deprecated and will be removed"); m_varp->attrScClocked(true); nodep->unlinkFrBack()->deleteTree(); VL_DANGLING(nodep); } diff --git a/src/verilog.y b/src/verilog.y index d51d675f1..4e34aed7e 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -5599,7 +5599,7 @@ vltOffFront: | yVLT_LINT_OFF yVLT_D_MSG yaID__ETC { $$ = V3ErrorCode((*$3).c_str()); if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3info("Deprecated -msg in configuration files, use -rule instead."<v3warn(DEPRECATED, "Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3<: | yVLT_LINT_ON yVLT_D_MSG yaID__ETC { $$ = V3ErrorCode((*$3).c_str()); if ($$ == V3ErrorCode::EC_ERROR) { $1->v3error("Unknown Error Code: "<<*$3<v3info("Deprecated -msg in configuration files, use -rule instead."<v3warn(DEPRECATED, "Deprecated -msg in configuration files, use -rule instead."<v3error("Unknown Error Code: "<<*$3< 1); + +top_filename("t/t_clk_first_deprecated.v"); + +lint( + verilator_flags2 => ["--lint-only"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_clk_first_deprecated.pl b/test_regress/t/t_clk_first_deprecated.pl new file mode 100755 index 000000000..01d7bf8d0 --- /dev/null +++ b/test_regress/t/t_clk_first_deprecated.pl @@ -0,0 +1,17 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2003 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +lint( + verilator_flags2 => ["--lint-only", "-Wno-DEPRECATED"], + ); + +ok(1); +1; diff --git a/test_regress/t/t_clk_first_deprecated.v b/test_regress/t/t_clk_first_deprecated.v new file mode 100644 index 000000000..5c5f5ce12 --- /dev/null +++ b/test_regress/t/t_clk_first_deprecated.v @@ -0,0 +1,13 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2003 by Wilson Snyder. + +module t (/*AUTOARG*/ + // Inputs + clk + ); + + input clk /*verilator sc_clock*/; + +endmodule diff --git a/test_regress/t/t_vlt_warn.vlt b/test_regress/t/t_vlt_warn.vlt index b1b7998aa..4e94fb4cb 100644 --- a/test_regress/t/t_vlt_warn.vlt +++ b/test_regress/t/t_vlt_warn.vlt @@ -5,10 +5,11 @@ `verilator_config -lint_off -msg CASEINCOMPLETE -file "t/t_vlt_warn.v" // Deprecation info about msg +lint_off -rule DEPRECATED -file "t/t_vlt_warn.vlt" -lines 12 +lint_off -rule CASEINCOMPLETE -file "t/t_vlt_warn.v" lint_off -rule WIDTH -file "t/t_vlt_warn.v" -lines 18 // Test wildcard filenames -lint_off -rule WIDTH -file "*/t_vlt_warn.v" -lines 19-19 +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 // Test global disables lint_off -file "*/t_vlt_warn.v" -lines 20-20 diff --git a/test_regress/t/t_vlt_warn_bad.out b/test_regress/t/t_vlt_warn_bad.out new file mode 100644 index 000000000..0a847a31a --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.out @@ -0,0 +1,5 @@ +%Warning-DEPRECATED: t/t_vlt_warn_bad.vlt:11: Deprecated -msg in configuration files, use -rule instead. +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 + ^~~~ + ... Use "/* verilator lint_off DEPRECATED */" and lint_on around source to disable this message. +%Error: Exiting due to diff --git a/test_regress/t/t_vlt_warn_bad.pl b/test_regress/t/t_vlt_warn_bad.pl new file mode 100755 index 000000000..5dd7bae92 --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.pl @@ -0,0 +1,21 @@ +#!/usr/bin/perl +if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; } +# DESCRIPTION: Verilator: Verilog Test driver/expect definition +# +# Copyright 2008 by Wilson Snyder. This program is free software; you can +# redistribute it and/or modify it under the terms of either the GNU +# Lesser General Public License Version 3 or the Perl Artistic License +# Version 2.0. + +scenarios(vlt => 1); + +top_filename("t/t_vlt_warn.v"); + +lint( + verilator_flags2 => ["--lint-only t/t_vlt_warn_bad.vlt"], + fails => 1, + expect_filename => $Self->{golden_filename}, + ); + +ok(1); +1; diff --git a/test_regress/t/t_vlt_warn_bad.vlt b/test_regress/t/t_vlt_warn_bad.vlt new file mode 100644 index 000000000..b16f429b1 --- /dev/null +++ b/test_regress/t/t_vlt_warn_bad.vlt @@ -0,0 +1,17 @@ +// DESCRIPTION: Verilator: Verilog Test module +// +// This file ONLY is placed into the Public Domain, for any use, +// without warranty, 2010 by Wilson Snyder. + +`verilator_config + +lint_off -rule CASEINCOMPLETE -file "t/t_vlt_warn.v" +lint_off -rule WIDTH -file "t/t_vlt_warn.v" -lines 18 +// Test wildcard filenames +lint_off -msg WIDTH -file "*/t_vlt_warn.v" -lines 19-19 +// Test global disables +lint_off -file "*/t_vlt_warn.v" -lines 20-20 + +coverage_off -file "t/t_vlt_warn.v" +// Test --flag is also accepted +tracing_off --file "t/t_vlt_warn.v" From f23fe8fd840f4c82b33485f7c37b9435c35ee480 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Mon, 6 Jan 2020 18:05:53 -0500 Subject: [PATCH 70/90] Update copyright year. --- Changes | 2 +- Makefile.in | 2 +- README.adoc | 2 +- bin/verilator | 4 ++-- bin/verilator_coverage | 4 ++-- bin/verilator_difftree | 2 +- bin/verilator_gantt | 2 +- bin/verilator_includer | 2 +- bin/verilator_profcfunc | 2 +- configure.ac | 2 +- docs/Makefile.in | 2 +- docs/TODO | 2 +- docs/install.adoc | 2 +- docs/internals.adoc | 2 +- examples/cmake_hello_c/CMakeLists.txt | 2 +- examples/cmake_hello_c/Makefile | 2 +- examples/cmake_hello_sc/CMakeLists.txt | 2 +- examples/cmake_hello_sc/Makefile | 2 +- examples/cmake_protect_lib/CMakeLists.txt | 2 +- examples/cmake_protect_lib/Makefile | 2 +- examples/cmake_tracing_c/CMakeLists.txt | 2 +- examples/cmake_tracing_c/Makefile | 2 +- examples/cmake_tracing_sc/CMakeLists.txt | 2 +- examples/cmake_tracing_sc/Makefile | 2 +- examples/make_hello_c/Makefile | 2 +- examples/make_hello_sc/Makefile | 2 +- examples/make_tracing_c/Makefile | 2 +- examples/make_tracing_c/Makefile_obj | 2 +- examples/make_tracing_sc/Makefile | 2 +- examples/make_tracing_sc/Makefile_obj | 2 +- examples/xml_py/Makefile | 2 +- include/verilated.cpp | 2 +- include/verilated.h | 2 +- include/verilated.mk.in | 2 +- include/verilated.v | 2 +- include/verilated_config.h.in | 2 +- include/verilated_cov.cpp | 2 +- include/verilated_cov.h | 2 +- include/verilated_cov_key.h | 2 +- include/verilated_dpi.cpp | 2 +- include/verilated_dpi.h | 2 +- include/verilated_fst_c.cpp | 2 +- include/verilated_fst_c.h | 2 +- include/verilated_heavy.h | 2 +- include/verilated_imp.h | 2 +- include/verilated_save.cpp | 2 +- include/verilated_save.h | 2 +- include/verilated_sc.h | 2 +- include/verilated_sym_props.h | 2 +- include/verilated_syms.h | 2 +- include/verilated_threads.cpp | 2 +- include/verilated_threads.h | 2 +- include/verilated_unordered_set_map.h | 2 +- include/verilated_vcd_c.cpp | 2 +- include/verilated_vcd_c.h | 2 +- include/verilated_vcd_sc.cpp | 2 +- include/verilated_vcd_sc.h | 2 +- include/verilated_vpi.cpp | 2 +- include/verilated_vpi.h | 2 +- include/verilatedos.h | 2 +- nodist/bisondiff | 2 +- nodist/bisonreader | 2 +- nodist/code_coverage | 2 +- nodist/code_coverage.dat | 2 +- nodist/dot_importer | 2 +- nodist/dot_pruner | 2 +- nodist/flexdiff | 2 +- nodist/git_untabify | 2 +- nodist/install_test | 2 +- nodist/invoke_atsim | 2 +- nodist/invoke_iccr | 2 +- nodist/invoke_ncverilog | 2 +- nodist/invoke_vcs | 2 +- nodist/vtree_importer | 2 +- src/.gdbinit | 2 +- src/Makefile.in | 2 +- src/Makefile_obj.in | 2 +- src/V3Active.cpp | 2 +- src/V3Active.h | 2 +- src/V3ActiveTop.cpp | 2 +- src/V3ActiveTop.h | 2 +- src/V3Assert.cpp | 2 +- src/V3Assert.h | 2 +- src/V3AssertPre.cpp | 2 +- src/V3AssertPre.h | 2 +- src/V3Ast.cpp | 2 +- src/V3Ast.h | 2 +- src/V3AstConstOnly.h | 2 +- src/V3AstNodes.cpp | 2 +- src/V3AstNodes.h | 2 +- src/V3Begin.cpp | 2 +- src/V3Begin.h | 2 +- src/V3Branch.cpp | 2 +- src/V3Branch.h | 2 +- src/V3Broken.cpp | 2 +- src/V3Broken.h | 2 +- src/V3CCtors.cpp | 2 +- src/V3CCtors.h | 2 +- src/V3Case.cpp | 2 +- src/V3Case.h | 2 +- src/V3Cast.cpp | 2 +- src/V3Cast.h | 2 +- src/V3Cdc.cpp | 2 +- src/V3Cdc.h | 2 +- src/V3Changed.cpp | 2 +- src/V3Changed.h | 2 +- src/V3Clean.cpp | 2 +- src/V3Clean.h | 2 +- src/V3Clock.cpp | 2 +- src/V3Clock.h | 2 +- src/V3Combine.cpp | 2 +- src/V3Combine.h | 2 +- src/V3Config.cpp | 2 +- src/V3Config.h | 2 +- src/V3Const.cpp | 2 +- src/V3Const.h | 2 +- src/V3Coverage.cpp | 2 +- src/V3Coverage.h | 2 +- src/V3CoverageJoin.cpp | 2 +- src/V3CoverageJoin.h | 2 +- src/V3Dead.cpp | 2 +- src/V3Dead.h | 2 +- src/V3Delayed.cpp | 2 +- src/V3Delayed.h | 2 +- src/V3Depth.cpp | 2 +- src/V3Depth.h | 2 +- src/V3DepthBlock.cpp | 2 +- src/V3DepthBlock.h | 2 +- src/V3Descope.cpp | 2 +- src/V3Descope.h | 2 +- src/V3EmitC.cpp | 2 +- src/V3EmitC.h | 2 +- src/V3EmitCBase.h | 2 +- src/V3EmitCInlines.cpp | 2 +- src/V3EmitCMake.cpp | 2 +- src/V3EmitCMake.h | 2 +- src/V3EmitCSyms.cpp | 2 +- src/V3EmitMk.cpp | 2 +- src/V3EmitMk.h | 2 +- src/V3EmitV.cpp | 2 +- src/V3EmitV.h | 2 +- src/V3EmitXml.cpp | 2 +- src/V3EmitXml.h | 2 +- src/V3Error.cpp | 2 +- src/V3Error.h | 2 +- src/V3Expand.cpp | 2 +- src/V3Expand.h | 2 +- src/V3File.cpp | 2 +- src/V3File.h | 2 +- src/V3FileLine.cpp | 2 +- src/V3FileLine.h | 2 +- src/V3Gate.cpp | 2 +- src/V3Gate.h | 2 +- src/V3GenClk.cpp | 2 +- src/V3GenClk.h | 2 +- src/V3Global.h | 2 +- src/V3Graph.cpp | 2 +- src/V3Graph.h | 2 +- src/V3GraphAcyc.cpp | 2 +- src/V3GraphAlg.cpp | 2 +- src/V3GraphAlg.h | 2 +- src/V3GraphDfa.cpp | 2 +- src/V3GraphDfa.h | 2 +- src/V3GraphPathChecker.cpp | 2 +- src/V3GraphPathChecker.h | 2 +- src/V3GraphStream.h | 2 +- src/V3GraphTest.cpp | 2 +- src/V3Hashed.cpp | 2 +- src/V3Hashed.h | 2 +- src/V3Inline.cpp | 2 +- src/V3Inline.h | 2 +- src/V3Inst.cpp | 2 +- src/V3Inst.h | 2 +- src/V3InstrCount.cpp | 2 +- src/V3InstrCount.h | 2 +- src/V3LangCode.h | 2 +- src/V3LanguageWords.h | 2 +- src/V3Life.cpp | 2 +- src/V3Life.h | 2 +- src/V3LifePost.cpp | 2 +- src/V3LifePost.h | 2 +- src/V3LinkCells.cpp | 2 +- src/V3LinkCells.h | 2 +- src/V3LinkDot.cpp | 2 +- src/V3LinkDot.h | 2 +- src/V3LinkJump.cpp | 2 +- src/V3LinkJump.h | 2 +- src/V3LinkLValue.cpp | 2 +- src/V3LinkLValue.h | 2 +- src/V3LinkLevel.cpp | 2 +- src/V3LinkLevel.h | 2 +- src/V3LinkParse.cpp | 2 +- src/V3LinkParse.h | 2 +- src/V3LinkResolve.cpp | 2 +- src/V3LinkResolve.h | 2 +- src/V3List.h | 2 +- src/V3Localize.cpp | 2 +- src/V3Localize.h | 2 +- src/V3Name.cpp | 2 +- src/V3Name.h | 2 +- src/V3Number.cpp | 2 +- src/V3Number.h | 2 +- src/V3Number_test.cpp | 2 +- src/V3Options.cpp | 4 ++-- src/V3Options.h | 2 +- src/V3Order.cpp | 2 +- src/V3Order.h | 2 +- src/V3OrderGraph.h | 2 +- src/V3Os.cpp | 2 +- src/V3Os.h | 2 +- src/V3Param.cpp | 2 +- src/V3Param.h | 2 +- src/V3Parse.h | 2 +- src/V3ParseGrammar.cpp | 2 +- src/V3ParseImp.cpp | 2 +- src/V3ParseImp.h | 2 +- src/V3ParseLex.cpp | 2 +- src/V3ParseSym.h | 2 +- src/V3Partition.cpp | 2 +- src/V3Partition.h | 2 +- src/V3PartitionGraph.h | 2 +- src/V3PreLex.h | 2 +- src/V3PreLex.l | 2 +- src/V3PreProc.cpp | 2 +- src/V3PreProc.h | 2 +- src/V3PreShell.cpp | 2 +- src/V3PreShell.h | 2 +- src/V3Premit.cpp | 2 +- src/V3Premit.h | 2 +- src/V3Reloop.cpp | 2 +- src/V3Reloop.h | 2 +- src/V3Scope.cpp | 2 +- src/V3Scope.h | 2 +- src/V3Scoreboard.cpp | 2 +- src/V3Scoreboard.h | 2 +- src/V3SenTree.h | 2 +- src/V3Simulate.h | 2 +- src/V3Slice.cpp | 2 +- src/V3Slice.h | 2 +- src/V3Split.cpp | 2 +- src/V3Split.h | 2 +- src/V3SplitAs.cpp | 2 +- src/V3SplitAs.h | 2 +- src/V3Stats.cpp | 2 +- src/V3Stats.h | 2 +- src/V3StatsReport.cpp | 2 +- src/V3String.cpp | 2 +- src/V3String.h | 2 +- src/V3Subst.cpp | 2 +- src/V3Subst.h | 2 +- src/V3SymTable.h | 2 +- src/V3TSP.h | 2 +- src/V3Table.cpp | 2 +- src/V3Table.h | 2 +- src/V3Task.cpp | 2 +- src/V3Task.h | 2 +- src/V3Trace.cpp | 2 +- src/V3Trace.h | 2 +- src/V3TraceDecl.cpp | 2 +- src/V3TraceDecl.h | 2 +- src/V3Tristate.cpp | 2 +- src/V3Tristate.h | 2 +- src/V3Undriven.cpp | 2 +- src/V3Undriven.h | 2 +- src/V3Unknown.cpp | 2 +- src/V3Unknown.h | 2 +- src/V3Unroll.cpp | 2 +- src/V3Unroll.h | 2 +- src/V3Width.cpp | 2 +- src/V3Width.h | 2 +- src/V3WidthCommit.h | 2 +- src/V3WidthSel.cpp | 2 +- src/Verilator.cpp | 2 +- src/VlcBucket.h | 2 +- src/VlcMain.cpp | 4 ++-- src/VlcOptions.h | 2 +- src/VlcPoint.h | 2 +- src/VlcSource.h | 2 +- src/VlcTest.h | 2 +- src/VlcTop.cpp | 2 +- src/VlcTop.h | 2 +- src/astgen | 2 +- src/bisonpre | 2 +- src/config_build.h.in | 2 +- src/config_rev.pl | 2 +- src/cppcheck_filtered | 2 +- src/flexfix | 2 +- src/pod2latexfix | 2 +- src/verilog.l | 2 +- src/verilog.y | 2 +- src/vlcovgen | 2 +- test_regress/CMakeLists.txt | 2 +- test_regress/Makefile | 2 +- test_regress/Makefile_obj | 2 +- test_regress/driver.pl | 2 +- test_regress/vgen.pl | 2 +- verilator-config-version.cmake.in | 2 +- verilator-config.cmake.in | 2 +- 298 files changed, 302 insertions(+), 302 deletions(-) diff --git a/Changes b/Changes index 97b1fc27c..dc12d607a 100644 --- a/Changes +++ b/Changes @@ -3457,7 +3457,7 @@ of input ports exists for tracing. This uses outline mode in Emacs. See C-h m [M-x describe-mode]. -Copyright 2001-2019 by Wilson Snyder. This program is free software; you +Copyright 2001-2020 by Wilson Snyder. This program is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/Makefile.in b/Makefile.in index 2016fdbac..e23932eaa 100644 --- a/Makefile.in +++ b/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/README.adoc b/README.adoc index 6cdc9b20d..8d1859e21 100644 --- a/README.adoc +++ b/README.adoc @@ -131,7 +131,7 @@ perhaps Icarus may. == Open License -Verilator is Copyright 2003-2019 by Wilson Snyder. (Report bugs to +Verilator is Copyright 2003-2020 by Wilson Snyder. (Report bugs to https://verilator.org/issues[Verilator Issues].) Verilator is free software; you can redistribute it and/or modify it under diff --git a/bin/verilator b/bin/verilator index d2be5ea29..105b346a2 100755 --- a/bin/verilator +++ b/bin/verilator @@ -3,7 +3,7 @@ eval 'exec perl -wS $0 ${1+"$@"}' if 0; ###################################################################### # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -5031,7 +5031,7 @@ remain anonymous. The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify the Verilator internals under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_coverage b/bin/verilator_coverage index 764e6b47f..9242d9eb8 100755 --- a/bin/verilator_coverage +++ b/bin/verilator_coverage @@ -3,7 +3,7 @@ eval 'exec perl -wS $0 ${1+"$@"}' if 0; ###################################################################### # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. @@ -271,7 +271,7 @@ Specifies a module search directory. The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify the Verilator internals under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_difftree b/bin/verilator_difftree index e00ee6268..fd40cf037 100755 --- a/bin/verilator_difftree +++ b/bin/verilator_difftree @@ -236,7 +236,7 @@ Do not show differences in line numbering. The latest version is available from L. -Copyright 2005-2019 by Wilson Snyder. This package is free software; you can +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_gantt b/bin/verilator_gantt index f384828f0..7e93d324c 100755 --- a/bin/verilator_gantt +++ b/bin/verilator_gantt @@ -540,7 +540,7 @@ verilator_gantt.vcd. The latest version is available from L. -Copyright 2018-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2018-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/bin/verilator_includer b/bin/verilator_includer index 45b8f1e5f..0fe436e1f 100755 --- a/bin/verilator_includer +++ b/bin/verilator_includer @@ -3,7 +3,7 @@ eval 'exec perl -wS $0 ${1+"$@"}' if 0; # DESCRIPTION: Print include statements for each ARGV # -# Copyright 2003-2019 by Wilson Snyder. This package is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This package is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. ###################################################################### diff --git a/bin/verilator_profcfunc b/bin/verilator_profcfunc index 1542d4b8f..d8323a857 100755 --- a/bin/verilator_profcfunc +++ b/bin/verilator_profcfunc @@ -230,7 +230,7 @@ Displays this message and program version and exits. The latest version is available from L. -Copyright 2007-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2007-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/configure.ac b/configure.ac index 2c178ac87..8d9a192f7 100644 --- a/configure.ac +++ b/configure.ac @@ -1,6 +1,6 @@ # DESCRIPTION: Process this file with autoconf to produce a configure script. # -# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/docs/Makefile.in b/docs/Makefile.in index 5e8e85cd6..a2aa53a0c 100644 --- a/docs/Makefile.in +++ b/docs/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/docs/TODO b/docs/TODO index f2c916480..72b7c13a1 100644 --- a/docs/TODO +++ b/docs/TODO @@ -1,6 +1,6 @@ // DESCRIPTION: Verilator: List of To Do issues. // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/docs/install.adoc b/docs/install.adoc index f9bda00fc..962ab5f73 100644 --- a/docs/install.adoc +++ b/docs/install.adoc @@ -289,6 +289,6 @@ or https://verilator.org/verilator_doc.pdf[Verilator manual (PDF)]. == License -Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/docs/internals.adoc b/docs/internals.adoc index 0880e5ce0..9a0379199 100644 --- a/docs/internals.adoc +++ b/docs/internals.adoc @@ -973,6 +973,6 @@ list in `src/Makefile_obj.in` and reconfigure. == Distribution -Copyright 2008-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2008-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/examples/cmake_hello_c/CMakeLists.txt b/examples/cmake_hello_c/CMakeLists.txt index a3b45036c..82c4707ff 100644 --- a/examples/cmake_hello_c/CMakeLists.txt +++ b/examples/cmake_hello_c/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_c/Makefile b/examples/cmake_hello_c/Makefile index 8c0b5ed24..769c4896f 100644 --- a/examples/cmake_hello_c/Makefile +++ b/examples/cmake_hello_c/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_sc/CMakeLists.txt b/examples/cmake_hello_sc/CMakeLists.txt index 3aa7d6714..7ee97f3da 100644 --- a/examples/cmake_hello_sc/CMakeLists.txt +++ b/examples/cmake_hello_sc/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to SystemC project # using CMake and Verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_hello_sc/Makefile b/examples/cmake_hello_sc/Makefile index 3e5cb375b..5d652762a 100644 --- a/examples/cmake_hello_sc/Makefile +++ b/examples/cmake_hello_sc/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_protect_lib/CMakeLists.txt b/examples/cmake_protect_lib/CMakeLists.txt index 7031eb1c7..d08888b93 100644 --- a/examples/cmake_protect_lib/CMakeLists.txt +++ b/examples/cmake_protect_lib/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_protect_lib/Makefile b/examples/cmake_protect_lib/Makefile index a3d3575a6..95132f76c 100644 --- a/examples/cmake_protect_lib/Makefile +++ b/examples/cmake_protect_lib/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_c/CMakeLists.txt b/examples/cmake_tracing_c/CMakeLists.txt index d0275e9f6..ab5236b3c 100644 --- a/examples/cmake_tracing_c/CMakeLists.txt +++ b/examples/cmake_tracing_c/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to systemc project # using cmake and verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_c/Makefile b/examples/cmake_tracing_c/Makefile index a6490a328..ef7f45ddf 100644 --- a/examples/cmake_tracing_c/Makefile +++ b/examples/cmake_tracing_c/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_sc/CMakeLists.txt b/examples/cmake_tracing_sc/CMakeLists.txt index 927d11b8f..f2490eb6c 100644 --- a/examples/cmake_tracing_sc/CMakeLists.txt +++ b/examples/cmake_tracing_sc/CMakeLists.txt @@ -5,7 +5,7 @@ # This is an example cmake script to build a verilog to SystemC project # using CMake and Verilator. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/cmake_tracing_sc/Makefile b/examples/cmake_tracing_sc/Makefile index 392cf53b4..6f3aad9e6 100644 --- a/examples/cmake_tracing_sc/Makefile +++ b/examples/cmake_tracing_sc/Makefile @@ -6,7 +6,7 @@ # This makefile is here for testing the examples and should # generally not be added to a CMake project. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_hello_c/Makefile b/examples/make_hello_c/Makefile index e1c969991..40939fb59 100644 --- a/examples/make_hello_c/Makefile +++ b/examples/make_hello_c/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_hello_sc/Makefile b/examples/make_hello_sc/Makefile index 10344d1a2..30506c69d 100644 --- a/examples/make_hello_sc/Makefile +++ b/examples/make_hello_sc/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_c/Makefile b/examples/make_tracing_c/Makefile index a4f1a2c37..f5a3b497e 100644 --- a/examples/make_tracing_c/Makefile +++ b/examples/make_tracing_c/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_c/Makefile_obj b/examples/make_tracing_c/Makefile_obj index c105301bb..c3eb5291d 100644 --- a/examples/make_tracing_c/Makefile_obj +++ b/examples/make_tracing_c/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_sc/Makefile b/examples/make_tracing_sc/Makefile index 25ce7ddcc..e70053c53 100644 --- a/examples/make_tracing_sc/Makefile +++ b/examples/make_tracing_sc/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/make_tracing_sc/Makefile_obj b/examples/make_tracing_sc/Makefile_obj index 5ba2b3b87..7c52ba627 100644 --- a/examples/make_tracing_sc/Makefile_obj +++ b/examples/make_tracing_sc/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/examples/xml_py/Makefile b/examples/xml_py/Makefile index 44d681c05..e05a6f00d 100644 --- a/examples/xml_py/Makefile +++ b/examples/xml_py/Makefile @@ -2,7 +2,7 @@ # # DESCRIPTION: Verilator Example: XML tests # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/include/verilated.cpp b/include/verilated.cpp index d4f3783ff..4bfae8d4c 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated.h b/include/verilated.h index e895362b6..5cf8065dc 100644 --- a/include/verilated.h +++ b/include/verilated.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated.mk.in b/include/verilated.mk.in index 612474582..e64de5e97 100644 --- a/include/verilated.mk.in +++ b/include/verilated.mk.in @@ -2,7 +2,7 @@ ###################################################################### # DESCRIPTION: Makefile commands for all verilated target files # -# Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +# Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can # redistribute it and/or modify it under the terms of either the GNU Lesser # General Public License Version 3 or the Perl Artistic License Version 2.0. ###################################################################### diff --git a/include/verilated.v b/include/verilated.v index 97cb6e677..ad51dcd99 100644 --- a/include/verilated.v +++ b/include/verilated.v @@ -4,7 +4,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_config.h.in b/include/verilated_config.h.in index a7f2e32c4..afc8d191c 100644 --- a/include/verilated_config.h.in +++ b/include/verilated_config.h.in @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_cov.cpp b/include/verilated_cov.cpp index 00aaf446c..2ea9351d4 100644 --- a/include/verilated_cov.cpp +++ b/include/verilated_cov.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_cov.h b/include/verilated_cov.h index 4e36ba25e..aff3e8c33 100644 --- a/include/verilated_cov.h +++ b/include/verilated_cov.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_cov_key.h b/include/verilated_cov_key.h index 41b2525ab..4fda5dda9 100644 --- a/include/verilated_cov_key.h +++ b/include/verilated_cov_key.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_dpi.cpp b/include/verilated_dpi.cpp index 2f70e91ea..a9da6866c 100644 --- a/include/verilated_dpi.cpp +++ b/include/verilated_dpi.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_dpi.h b/include/verilated_dpi.h index 66275f078..4edffc32b 100644 --- a/include/verilated_dpi.h +++ b/include/verilated_dpi.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp index 2c94e53ef..0bac106ff 100644 --- a/include/verilated_fst_c.cpp +++ b/include/verilated_fst_c.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h index 786ed6f7b..e539161ba 100644 --- a/include/verilated_fst_c.h +++ b/include/verilated_fst_c.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_heavy.h b/include/verilated_heavy.h index 127b2b7fc..b6697fc8c 100644 --- a/include/verilated_heavy.h +++ b/include/verilated_heavy.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_imp.h b/include/verilated_imp.h index da8e50a10..0d55c4c36 100644 --- a/include/verilated_imp.h +++ b/include/verilated_imp.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_save.cpp b/include/verilated_save.cpp index 6e8aefbd0..965ab24e8 100644 --- a/include/verilated_save.cpp +++ b/include/verilated_save.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_save.h b/include/verilated_save.h index 4070bcf74..0d23f4ebc 100644 --- a/include/verilated_save.h +++ b/include/verilated_save.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_sc.h b/include/verilated_sc.h index 54f86e737..a9e8dc42d 100644 --- a/include/verilated_sc.h +++ b/include/verilated_sc.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_sym_props.h b/include/verilated_sym_props.h index c8c92a7ce..373002660 100644 --- a/include/verilated_sym_props.h +++ b/include/verilated_sym_props.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_syms.h b/include/verilated_syms.h index a47edd617..4b3ffe028 100644 --- a/include/verilated_syms.h +++ b/include/verilated_syms.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_threads.cpp b/include/verilated_threads.cpp index d9ce2ad7c..1c5fda43b 100644 --- a/include/verilated_threads.cpp +++ b/include/verilated_threads.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_threads.h b/include/verilated_threads.h index b5e4817d7..ae02e5df6 100644 --- a/include/verilated_threads.h +++ b/include/verilated_threads.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2012-2019 by Wilson Snyder. This program is free software; +// Copyright 2012-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_unordered_set_map.h b/include/verilated_unordered_set_map.h index d011ca647..4a3ed007f 100644 --- a/include/verilated_unordered_set_map.h +++ b/include/verilated_unordered_set_map.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp index ee245b665..c21c8f1b9 100644 --- a/include/verilated_vcd_c.cpp +++ b/include/verilated_vcd_c.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h index 423d0ffbc..89f6f7c7c 100644 --- a/include/verilated_vcd_c.h +++ b/include/verilated_vcd_c.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vcd_sc.cpp b/include/verilated_vcd_sc.cpp index bbbed11ac..7fc772648 100644 --- a/include/verilated_vcd_sc.cpp +++ b/include/verilated_vcd_sc.cpp @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vcd_sc.h b/include/verilated_vcd_sc.h index 14e93886c..f5ab1efe1 100644 --- a/include/verilated_vcd_sc.h +++ b/include/verilated_vcd_sc.h @@ -3,7 +3,7 @@ // // THIS MODULE IS PUBLICLY LICENSED // -// Copyright 2001-2019 by Wilson Snyder. This program is free software; +// Copyright 2001-2020 by Wilson Snyder. This program is free software; // you can redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. // diff --git a/include/verilated_vpi.cpp b/include/verilated_vpi.cpp index 28fc11458..cd2ea7751 100644 --- a/include/verilated_vpi.cpp +++ b/include/verilated_vpi.cpp @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilated_vpi.h b/include/verilated_vpi.h index 0b23f3c32..0715cd18f 100644 --- a/include/verilated_vpi.h +++ b/include/verilated_vpi.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2009-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2009-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/include/verilatedos.h b/include/verilatedos.h index d874677ba..68d478555 100644 --- a/include/verilatedos.h +++ b/include/verilatedos.h @@ -1,7 +1,7 @@ // -*- mode: C++; c-file-style: "cc-mode" -*- //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License. // Version 2.0. diff --git a/nodist/bisondiff b/nodist/bisondiff index f5e1f9011..a22a5c2d7 100755 --- a/nodist/bisondiff +++ b/nodist/bisondiff @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/nodist/bisonreader b/nodist/bisonreader index d19079ac5..78197adee 100755 --- a/nodist/bisonreader +++ b/nodist/bisonreader @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/nodist/code_coverage b/nodist/code_coverage index 86b2f47b9..37343eccf 100755 --- a/nodist/code_coverage +++ b/nodist/code_coverage @@ -242,7 +242,7 @@ Runs a specific stage (see the script). =head1 DISTRIBUTION -Copyright 2019-2019 by Wilson Snyder. This package is free software; you +Copyright 2019-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/code_coverage.dat b/nodist/code_coverage.dat index 35b67649f..b9046cba6 100644 --- a/nodist/code_coverage.dat +++ b/nodist/code_coverage.dat @@ -1,7 +1,7 @@ # -*- Perl -*- # DESCRIPTION: Verilator: Internal C++ code lcov control file # -# Copyright 2019-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2019-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/nodist/dot_importer b/nodist/dot_importer index 4da1cae7b..c5cd5a3ed 100755 --- a/nodist/dot_importer +++ b/nodist/dot_importer @@ -143,7 +143,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/dot_pruner b/nodist/dot_pruner index a3dca4d7b..8136b7f28 100755 --- a/nodist/dot_pruner +++ b/nodist/dot_pruner @@ -184,7 +184,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/flexdiff b/nodist/flexdiff index dfc96bf7e..0c29d4380 100755 --- a/nodist/flexdiff +++ b/nodist/flexdiff @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2007-2019 by Wilson Snyder. This package is free software; you +# Copyright 2007-2020 by Wilson Snyder. This package is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/nodist/git_untabify b/nodist/git_untabify index c58922bbe..debb20ca6 100755 --- a/nodist/git_untabify +++ b/nodist/git_untabify @@ -235,7 +235,7 @@ Displays program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/install_test b/nodist/install_test index 74e99ec9c..8c6ac7db2 100755 --- a/nodist/install_test +++ b/nodist/install_test @@ -189,7 +189,7 @@ Runs a specific test stage (see the script). =head1 DISTRIBUTION -Copyright 2009-2019 by Wilson Snyder. This package is free software; you +Copyright 2009-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_atsim b/nodist/invoke_atsim index 9d46bf11c..b2bfea83c 100755 --- a/nodist/invoke_atsim +++ b/nodist/invoke_atsim @@ -28,7 +28,7 @@ invoke_atsim - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_iccr b/nodist/invoke_iccr index 9aeb0276d..5a007be64 100755 --- a/nodist/invoke_iccr +++ b/nodist/invoke_iccr @@ -28,7 +28,7 @@ invoke_iccr - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2007-2019 by Wilson Snyder. This package is free software; you +Copyright 2007-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_ncverilog b/nodist/invoke_ncverilog index 2ed813d9b..8e5a1f2d3 100755 --- a/nodist/invoke_ncverilog +++ b/nodist/invoke_ncverilog @@ -28,7 +28,7 @@ invoke_ncverilog - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/invoke_vcs b/nodist/invoke_vcs index d9e5c9c39..b53602b99 100755 --- a/nodist/invoke_vcs +++ b/nodist/invoke_vcs @@ -28,7 +28,7 @@ invoke_vcs - Invoke tool under "modules" command =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. This package is free software; you +Copyright 2005-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/nodist/vtree_importer b/nodist/vtree_importer index f3d3ec336..d7b72a2a0 100755 --- a/nodist/vtree_importer +++ b/nodist/vtree_importer @@ -331,7 +331,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/.gdbinit b/src/.gdbinit index 793dab502..9bed7ea0c 100644 --- a/src/.gdbinit +++ b/src/.gdbinit @@ -1,6 +1,6 @@ # DESCRIPTION: Verilator: GDB startup file with useful defines # -# Copyright 2012-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2012-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/Makefile.in b/src/Makefile.in index c0532d5a0..ff0c685a2 100644 --- a/src/Makefile.in +++ b/src/Makefile.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/Makefile_obj.in b/src/Makefile_obj.in index 9ba13b376..4c50d5a64 100644 --- a/src/Makefile_obj.in +++ b/src/Makefile_obj.in @@ -7,7 +7,7 @@ # #***************************************************************************** # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/V3Active.cpp b/src/V3Active.cpp index 3c698a774..b93630a62 100644 --- a/src/V3Active.cpp +++ b/src/V3Active.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Active.h b/src/V3Active.h index f5562b703..070232665 100644 --- a/src/V3Active.h +++ b/src/V3Active.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ActiveTop.cpp b/src/V3ActiveTop.cpp index 55f268190..172691cd5 100644 --- a/src/V3ActiveTop.cpp +++ b/src/V3ActiveTop.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3ActiveTop.h b/src/V3ActiveTop.h index bbbf1e721..9b4628de5 100644 --- a/src/V3ActiveTop.h +++ b/src/V3ActiveTop.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Assert.cpp b/src/V3Assert.cpp index fc6fee602..3b00f4bf6 100644 --- a/src/V3Assert.cpp +++ b/src/V3Assert.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Assert.h b/src/V3Assert.h index b3e0f1a31..fa8f144c7 100644 --- a/src/V3Assert.h +++ b/src/V3Assert.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AssertPre.cpp b/src/V3AssertPre.cpp index bc4f6bfd9..364010c7d 100644 --- a/src/V3AssertPre.cpp +++ b/src/V3AssertPre.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AssertPre.h b/src/V3AssertPre.h index 0c1cf7766..93e414fe6 100644 --- a/src/V3AssertPre.h +++ b/src/V3AssertPre.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Ast.cpp b/src/V3Ast.cpp index a6f803b3e..3bc088946 100644 --- a/src/V3Ast.cpp +++ b/src/V3Ast.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Ast.h b/src/V3Ast.h index 41d559f65..1c0057f4c 100644 --- a/src/V3Ast.h +++ b/src/V3Ast.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AstConstOnly.h b/src/V3AstConstOnly.h index c7aa0b039..ae31294ed 100644 --- a/src/V3AstConstOnly.h +++ b/src/V3AstConstOnly.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AstNodes.cpp b/src/V3AstNodes.cpp index 1adc5be7d..367486b05 100644 --- a/src/V3AstNodes.cpp +++ b/src/V3AstNodes.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3AstNodes.h b/src/V3AstNodes.h index 63304eb1a..b0254ae52 100644 --- a/src/V3AstNodes.h +++ b/src/V3AstNodes.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Begin.cpp b/src/V3Begin.cpp index 0c805653f..4c51b35b1 100644 --- a/src/V3Begin.cpp +++ b/src/V3Begin.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Begin.h b/src/V3Begin.h index 85066d18d..08613331d 100644 --- a/src/V3Begin.h +++ b/src/V3Begin.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Branch.cpp b/src/V3Branch.cpp index a7bb1f1a0..f2066dd08 100644 --- a/src/V3Branch.cpp +++ b/src/V3Branch.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Branch.h b/src/V3Branch.h index c59bbf5f3..46e1d8dec 100644 --- a/src/V3Branch.h +++ b/src/V3Branch.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Broken.cpp b/src/V3Broken.cpp index 779b53159..c8d413117 100644 --- a/src/V3Broken.cpp +++ b/src/V3Broken.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Broken.h b/src/V3Broken.h index 3129b3923..3a9726b6e 100644 --- a/src/V3Broken.h +++ b/src/V3Broken.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CCtors.cpp b/src/V3CCtors.cpp index d32eb5b4a..64b0b2460 100644 --- a/src/V3CCtors.cpp +++ b/src/V3CCtors.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CCtors.h b/src/V3CCtors.h index c474adb43..47bba3f8e 100644 --- a/src/V3CCtors.h +++ b/src/V3CCtors.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Case.cpp b/src/V3Case.cpp index 43ec3ec39..d19ad6f89 100644 --- a/src/V3Case.cpp +++ b/src/V3Case.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Case.h b/src/V3Case.h index 5c442e36f..ace56e8d5 100644 --- a/src/V3Case.h +++ b/src/V3Case.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cast.cpp b/src/V3Cast.cpp index 7409f3b34..b7246184b 100644 --- a/src/V3Cast.cpp +++ b/src/V3Cast.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cast.h b/src/V3Cast.h index ba0de4e07..0b9cd167f 100644 --- a/src/V3Cast.h +++ b/src/V3Cast.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cdc.cpp b/src/V3Cdc.cpp index 22d2d9876..ac4c0a3af 100644 --- a/src/V3Cdc.cpp +++ b/src/V3Cdc.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Cdc.h b/src/V3Cdc.h index ac145a477..8f9a445c2 100644 --- a/src/V3Cdc.h +++ b/src/V3Cdc.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Changed.cpp b/src/V3Changed.cpp index 665677cf7..3efdb2b9e 100644 --- a/src/V3Changed.cpp +++ b/src/V3Changed.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Changed.h b/src/V3Changed.h index 1c56756e3..116aab71c 100644 --- a/src/V3Changed.h +++ b/src/V3Changed.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clean.cpp b/src/V3Clean.cpp index 2236c2d66..27a7227c8 100644 --- a/src/V3Clean.cpp +++ b/src/V3Clean.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clean.h b/src/V3Clean.h index ab21cb318..fa35719a0 100644 --- a/src/V3Clean.h +++ b/src/V3Clean.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clock.cpp b/src/V3Clock.cpp index 51f4ba31a..1b9d07cc6 100644 --- a/src/V3Clock.cpp +++ b/src/V3Clock.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Clock.h b/src/V3Clock.h index 538ca8bbf..3e2168178 100644 --- a/src/V3Clock.h +++ b/src/V3Clock.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Combine.cpp b/src/V3Combine.cpp index b8372ee23..45516957b 100644 --- a/src/V3Combine.cpp +++ b/src/V3Combine.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Combine.h b/src/V3Combine.h index 682ccacc0..900a5bcf8 100644 --- a/src/V3Combine.h +++ b/src/V3Combine.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Config.cpp b/src/V3Config.cpp index 0e76b2297..6179860c4 100644 --- a/src/V3Config.cpp +++ b/src/V3Config.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Config.h b/src/V3Config.h index abfdc17ab..4c6ad4417 100644 --- a/src/V3Config.h +++ b/src/V3Config.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2010-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2010-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Const.cpp b/src/V3Const.cpp index 6d7144d5d..e5825110d 100644 --- a/src/V3Const.cpp +++ b/src/V3Const.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Const.h b/src/V3Const.h index ee43fca2d..803fc0f0d 100644 --- a/src/V3Const.h +++ b/src/V3Const.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Coverage.cpp b/src/V3Coverage.cpp index 585c26171..9927d1c47 100644 --- a/src/V3Coverage.cpp +++ b/src/V3Coverage.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Coverage.h b/src/V3Coverage.h index fd2102a4c..311bd4b7d 100644 --- a/src/V3Coverage.h +++ b/src/V3Coverage.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CoverageJoin.cpp b/src/V3CoverageJoin.cpp index 237975d27..fb66a9b12 100644 --- a/src/V3CoverageJoin.cpp +++ b/src/V3CoverageJoin.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3CoverageJoin.h b/src/V3CoverageJoin.h index 91fe1428a..a9ee2a82c 100644 --- a/src/V3CoverageJoin.h +++ b/src/V3CoverageJoin.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Dead.cpp b/src/V3Dead.cpp index 1cd44de2c..265738e2a 100644 --- a/src/V3Dead.cpp +++ b/src/V3Dead.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Dead.h b/src/V3Dead.h index 6baf5b4ad..e670b31d5 100644 --- a/src/V3Dead.h +++ b/src/V3Dead.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Delayed.cpp b/src/V3Delayed.cpp index df4cbf10e..40ef7954f 100644 --- a/src/V3Delayed.cpp +++ b/src/V3Delayed.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Delayed.h b/src/V3Delayed.h index 7e21dc9ad..9d7bc8f45 100644 --- a/src/V3Delayed.h +++ b/src/V3Delayed.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Depth.cpp b/src/V3Depth.cpp index b156c0988..51e1f07a0 100644 --- a/src/V3Depth.cpp +++ b/src/V3Depth.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Depth.h b/src/V3Depth.h index 8ab5542f4..75c673d2b 100644 --- a/src/V3Depth.h +++ b/src/V3Depth.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3DepthBlock.cpp b/src/V3DepthBlock.cpp index 4a31da51e..4a9abc27d 100644 --- a/src/V3DepthBlock.cpp +++ b/src/V3DepthBlock.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3DepthBlock.h b/src/V3DepthBlock.h index 54fa377a5..745763dc3 100644 --- a/src/V3DepthBlock.h +++ b/src/V3DepthBlock.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Descope.cpp b/src/V3Descope.cpp index 398f19bbc..5d49b29c0 100644 --- a/src/V3Descope.cpp +++ b/src/V3Descope.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Descope.h b/src/V3Descope.h index 391d21b73..2589898ef 100644 --- a/src/V3Descope.h +++ b/src/V3Descope.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 8d8640227..94c4c1e4a 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitC.h b/src/V3EmitC.h index 8edf76b75..718f6070e 100644 --- a/src/V3EmitC.h +++ b/src/V3EmitC.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCBase.h b/src/V3EmitCBase.h index b0a604c6d..28a7c4561 100644 --- a/src/V3EmitCBase.h +++ b/src/V3EmitCBase.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index 344d29e13..4b05a8194 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCMake.cpp b/src/V3EmitCMake.cpp index 1c740ca78..bed3591e1 100644 --- a/src/V3EmitCMake.cpp +++ b/src/V3EmitCMake.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCMake.h b/src/V3EmitCMake.h index d85104ebd..6c309450d 100644 --- a/src/V3EmitCMake.h +++ b/src/V3EmitCMake.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitCSyms.cpp b/src/V3EmitCSyms.cpp index 5b55a02e7..84e9c6937 100644 --- a/src/V3EmitCSyms.cpp +++ b/src/V3EmitCSyms.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitMk.cpp b/src/V3EmitMk.cpp index cc89ddb46..1831a305c 100644 --- a/src/V3EmitMk.cpp +++ b/src/V3EmitMk.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitMk.h b/src/V3EmitMk.h index 22a1a8608..eb7c0d4da 100644 --- a/src/V3EmitMk.h +++ b/src/V3EmitMk.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitV.cpp b/src/V3EmitV.cpp index 21ca8594d..9032711b8 100644 --- a/src/V3EmitV.cpp +++ b/src/V3EmitV.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitV.h b/src/V3EmitV.h index e453764a8..30ff083c4 100644 --- a/src/V3EmitV.h +++ b/src/V3EmitV.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitXml.cpp b/src/V3EmitXml.cpp index 494a9f319..00191ee1f 100644 --- a/src/V3EmitXml.cpp +++ b/src/V3EmitXml.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3EmitXml.h b/src/V3EmitXml.h index 44b93525c..0d82c9cc2 100644 --- a/src/V3EmitXml.h +++ b/src/V3EmitXml.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Error.cpp b/src/V3Error.cpp index 2014020e7..466171706 100644 --- a/src/V3Error.cpp +++ b/src/V3Error.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Error.h b/src/V3Error.h index 1c1cfae83..c9527a430 100644 --- a/src/V3Error.h +++ b/src/V3Error.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Expand.cpp b/src/V3Expand.cpp index 8f0a456bc..4291f965e 100644 --- a/src/V3Expand.cpp +++ b/src/V3Expand.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2004-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2004-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Expand.h b/src/V3Expand.h index ab70f8537..2a28294d7 100644 --- a/src/V3Expand.h +++ b/src/V3Expand.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3File.cpp b/src/V3File.cpp index 3b967b328..81776d2e0 100644 --- a/src/V3File.cpp +++ b/src/V3File.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3File.h b/src/V3File.h index 3f429ed66..d974058b5 100644 --- a/src/V3File.h +++ b/src/V3File.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3FileLine.cpp b/src/V3FileLine.cpp index 9d4ca503c..e7d45e3d8 100644 --- a/src/V3FileLine.cpp +++ b/src/V3FileLine.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3FileLine.h b/src/V3FileLine.h index 7818f9998..f515a1408 100644 --- a/src/V3FileLine.h +++ b/src/V3FileLine.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Gate.cpp b/src/V3Gate.cpp index 6054bb215..475539d2f 100644 --- a/src/V3Gate.cpp +++ b/src/V3Gate.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Gate.h b/src/V3Gate.h index 3fa6814af..c57144139 100644 --- a/src/V3Gate.h +++ b/src/V3Gate.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GenClk.cpp b/src/V3GenClk.cpp index ce6ab3846..c2755b633 100644 --- a/src/V3GenClk.cpp +++ b/src/V3GenClk.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GenClk.h b/src/V3GenClk.h index 4e61fc44b..d25b1be25 100644 --- a/src/V3GenClk.h +++ b/src/V3GenClk.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Global.h b/src/V3Global.h index a7ba8ac2d..966c2ccc5 100644 --- a/src/V3Global.h +++ b/src/V3Global.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Graph.cpp b/src/V3Graph.cpp index 24af2f84d..d5ea1fea2 100644 --- a/src/V3Graph.cpp +++ b/src/V3Graph.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Graph.h b/src/V3Graph.h index b42ac4960..e63541978 100644 --- a/src/V3Graph.h +++ b/src/V3Graph.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphAcyc.cpp b/src/V3GraphAcyc.cpp index d01d1e869..1c15e170b 100644 --- a/src/V3GraphAcyc.cpp +++ b/src/V3GraphAcyc.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphAlg.cpp b/src/V3GraphAlg.cpp index cc9cf90c3..6f82700da 100644 --- a/src/V3GraphAlg.cpp +++ b/src/V3GraphAlg.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphAlg.h b/src/V3GraphAlg.h index e3c0f617d..78aeeda31 100644 --- a/src/V3GraphAlg.h +++ b/src/V3GraphAlg.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphDfa.cpp b/src/V3GraphDfa.cpp index ee7512fa9..a55fcec06 100644 --- a/src/V3GraphDfa.cpp +++ b/src/V3GraphDfa.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphDfa.h b/src/V3GraphDfa.h index cd0916ae2..21009ef57 100644 --- a/src/V3GraphDfa.h +++ b/src/V3GraphDfa.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphPathChecker.cpp b/src/V3GraphPathChecker.cpp index 789912993..8e1699bae 100644 --- a/src/V3GraphPathChecker.cpp +++ b/src/V3GraphPathChecker.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphPathChecker.h b/src/V3GraphPathChecker.h index 514aab054..2d248363b 100644 --- a/src/V3GraphPathChecker.h +++ b/src/V3GraphPathChecker.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphStream.h b/src/V3GraphStream.h index 0298149db..a1bd9a1bb 100644 --- a/src/V3GraphStream.h +++ b/src/V3GraphStream.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3GraphTest.cpp b/src/V3GraphTest.cpp index de281394c..cd1e2e3fb 100644 --- a/src/V3GraphTest.cpp +++ b/src/V3GraphTest.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Hashed.cpp b/src/V3Hashed.cpp index 78f208450..71a7f8514 100644 --- a/src/V3Hashed.cpp +++ b/src/V3Hashed.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Hashed.h b/src/V3Hashed.h index 71117c825..063d0a09a 100644 --- a/src/V3Hashed.h +++ b/src/V3Hashed.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inline.cpp b/src/V3Inline.cpp index df4125848..aa9aef4a7 100644 --- a/src/V3Inline.cpp +++ b/src/V3Inline.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inline.h b/src/V3Inline.h index ca51acebb..2258c39f0 100644 --- a/src/V3Inline.h +++ b/src/V3Inline.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inst.cpp b/src/V3Inst.cpp index f35a87478..ce4a66bb8 100644 --- a/src/V3Inst.cpp +++ b/src/V3Inst.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Inst.h b/src/V3Inst.h index 04a634d22..38858b072 100644 --- a/src/V3Inst.h +++ b/src/V3Inst.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3InstrCount.cpp b/src/V3InstrCount.cpp index d48e1dfb8..e69146c71 100644 --- a/src/V3InstrCount.cpp +++ b/src/V3InstrCount.cpp @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3InstrCount.h b/src/V3InstrCount.h index ecc9f73ca..47ffed11a 100644 --- a/src/V3InstrCount.h +++ b/src/V3InstrCount.h @@ -7,7 +7,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LangCode.h b/src/V3LangCode.h index 158e9e1c5..ab4509e97 100644 --- a/src/V3LangCode.h +++ b/src/V3LangCode.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LanguageWords.h b/src/V3LanguageWords.h index 16465805f..2319ecfe8 100644 --- a/src/V3LanguageWords.h +++ b/src/V3LanguageWords.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2005-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2005-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Life.cpp b/src/V3Life.cpp index 2d6c3d8a1..b73bf8f05 100644 --- a/src/V3Life.cpp +++ b/src/V3Life.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Life.h b/src/V3Life.h index 40b2a8610..24823ee83 100644 --- a/src/V3Life.h +++ b/src/V3Life.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LifePost.cpp b/src/V3LifePost.cpp index 5487e98fa..108ef4aa6 100644 --- a/src/V3LifePost.cpp +++ b/src/V3LifePost.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LifePost.h b/src/V3LifePost.h index 00f00a62e..4a04e4213 100644 --- a/src/V3LifePost.h +++ b/src/V3LifePost.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp index 6ef8ffb60..361e70c41 100644 --- a/src/V3LinkCells.cpp +++ b/src/V3LinkCells.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkCells.h b/src/V3LinkCells.h index 34049c6fa..42738fe65 100644 --- a/src/V3LinkCells.h +++ b/src/V3LinkCells.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkDot.cpp b/src/V3LinkDot.cpp index a875a49de..c56c3c7a1 100644 --- a/src/V3LinkDot.cpp +++ b/src/V3LinkDot.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkDot.h b/src/V3LinkDot.h index baf0861cf..3a2721d41 100644 --- a/src/V3LinkDot.h +++ b/src/V3LinkDot.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkJump.cpp b/src/V3LinkJump.cpp index 268257d16..042ef62af 100644 --- a/src/V3LinkJump.cpp +++ b/src/V3LinkJump.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkJump.h b/src/V3LinkJump.h index 01a5803bf..fe923aff3 100644 --- a/src/V3LinkJump.h +++ b/src/V3LinkJump.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLValue.cpp b/src/V3LinkLValue.cpp index 58725448b..f00c604c8 100644 --- a/src/V3LinkLValue.cpp +++ b/src/V3LinkLValue.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLValue.h b/src/V3LinkLValue.h index b1cd6e2f8..d2d62bdb1 100644 --- a/src/V3LinkLValue.h +++ b/src/V3LinkLValue.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLevel.cpp b/src/V3LinkLevel.cpp index d3e69a635..abdfa423a 100644 --- a/src/V3LinkLevel.cpp +++ b/src/V3LinkLevel.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkLevel.h b/src/V3LinkLevel.h index 4900649fb..64b9b3bd8 100644 --- a/src/V3LinkLevel.h +++ b/src/V3LinkLevel.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkParse.cpp b/src/V3LinkParse.cpp index ff99771f7..a839c6f19 100644 --- a/src/V3LinkParse.cpp +++ b/src/V3LinkParse.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkParse.h b/src/V3LinkParse.h index 54f8ea017..8bf81e799 100644 --- a/src/V3LinkParse.h +++ b/src/V3LinkParse.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkResolve.cpp b/src/V3LinkResolve.cpp index 62b12faf5..edf2d6dd4 100644 --- a/src/V3LinkResolve.cpp +++ b/src/V3LinkResolve.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3LinkResolve.h b/src/V3LinkResolve.h index ac307ecfa..68dd138c5 100644 --- a/src/V3LinkResolve.h +++ b/src/V3LinkResolve.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3List.h b/src/V3List.h index 50d981902..f78d306a7 100644 --- a/src/V3List.h +++ b/src/V3List.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Localize.cpp b/src/V3Localize.cpp index 00cf2e4d0..2a2969c41 100644 --- a/src/V3Localize.cpp +++ b/src/V3Localize.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Localize.h b/src/V3Localize.h index a57b0acfb..22417e619 100644 --- a/src/V3Localize.h +++ b/src/V3Localize.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Name.cpp b/src/V3Name.cpp index affddbed8..fc4694d82 100644 --- a/src/V3Name.cpp +++ b/src/V3Name.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Name.h b/src/V3Name.h index 870a70c71..6f86ed00c 100644 --- a/src/V3Name.h +++ b/src/V3Name.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 0696b78be..1f060cecf 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Number.h b/src/V3Number.h index 8e53198d4..339d29495 100644 --- a/src/V3Number.h +++ b/src/V3Number.h @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Number_test.cpp b/src/V3Number_test.cpp index b6f77fbf0..e7faf7059 100644 --- a/src/V3Number_test.cpp +++ b/src/V3Number_test.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/V3Options.cpp b/src/V3Options.cpp index b822406c6..75204d050 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. @@ -1409,7 +1409,7 @@ void V3Options::showVersion(bool verbose) { if (!verbose) return; cout < free Verilog EDA software tool suite. The latest version is available from CPAN and from L. -Copyright 2008-2019 by Wilson Snyder. This package is free software; you +Copyright 2008-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/config_build.h.in b/src/config_build.h.in index 5413ff209..ab0c895ea 100644 --- a/src/config_build.h.in +++ b/src/config_build.h.in @@ -8,7 +8,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/config_rev.pl b/src/config_rev.pl index c3abd9516..da141daf6 100755 --- a/src/config_rev.pl +++ b/src/config_rev.pl @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2005-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/cppcheck_filtered b/src/cppcheck_filtered index de51dc5bd..b6fbf5f76 100755 --- a/src/cppcheck_filtered +++ b/src/cppcheck_filtered @@ -220,7 +220,7 @@ This is part of the L free Verilog EDA software tool suite. The latest version is available from CPAN and from L. -Copyright 2014-2019 by Wilson Snyder. This package is free software; you +Copyright 2014-2020 by Wilson Snyder. This package is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/src/flexfix b/src/flexfix index 1fa7d3b8b..7fbc5d905 100755 --- a/src/flexfix +++ b/src/flexfix @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/pod2latexfix b/src/pod2latexfix index 7fc68d864..70e577fb1 100755 --- a/src/pod2latexfix +++ b/src/pod2latexfix @@ -1,7 +1,7 @@ #!/usr/bin/perl -w ###################################################################### # -# Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you +# Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you # can redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/src/verilog.l b/src/verilog.l index 733b41491..c25b64d8e 100644 --- a/src/verilog.l +++ b/src/verilog.l @@ -6,7 +6,7 @@ * ************************************************************************** * - * Copyright 2003-2019 by Wilson Snyder. Verilator is free software; + * Copyright 2003-2020 by Wilson Snyder. Verilator is free software; * you can redistribute it and/or modify it under the terms of either the * GNU Lesser General Public License Version 3 or the Perl Artistic License * Version 2.0. diff --git a/src/verilog.y b/src/verilog.y index 4e34aed7e..902a2a5be 100644 --- a/src/verilog.y +++ b/src/verilog.y @@ -6,7 +6,7 @@ // //************************************************************************* // -// Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +// Copyright 2003-2020 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. diff --git a/src/vlcovgen b/src/vlcovgen index 7c19810b3..aa52b215d 100755 --- a/src/vlcovgen +++ b/src/vlcovgen @@ -150,7 +150,7 @@ Displays this message and program version and exits. =head1 DISTRIBUTION -Copyright 2002-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/test_regress/CMakeLists.txt b/test_regress/CMakeLists.txt index db053f6dd..e4492d064 100644 --- a/test_regress/CMakeLists.txt +++ b/test_regress/CMakeLists.txt @@ -4,7 +4,7 @@ # # This CMake file is meant to be consumed by regression tests. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/Makefile b/test_regress/Makefile index 1b224dc11..46c13973f 100644 --- a/test_regress/Makefile +++ b/test_regress/Makefile @@ -5,7 +5,7 @@ # This calls the object directory makefile. That allows the objects to # be placed in the "current directory" which simplifies the Makefile. # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/Makefile_obj b/test_regress/Makefile_obj index 9d0c9bcf4..02d911e7b 100644 --- a/test_regress/Makefile_obj +++ b/test_regress/Makefile_obj @@ -5,7 +5,7 @@ # # This is executed in the object directory, and called by ../Makefile # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/test_regress/driver.pl b/test_regress/driver.pl index ab1d60acd..ba52ef469 100755 --- a/test_regress/driver.pl +++ b/test_regress/driver.pl @@ -2651,7 +2651,7 @@ Command to use to invoke XSim xvlog The latest version is available from L. -Copyright 2003-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2003-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/test_regress/vgen.pl b/test_regress/vgen.pl index 3ed4afac2..eff31ed45 100755 --- a/test_regress/vgen.pl +++ b/test_regress/vgen.pl @@ -1044,7 +1044,7 @@ Include some signed arithmetic in the generated code. Experimental. =head1 DISTRIBUTION -Copyright 2001-2019 by Wilson Snyder. Verilator is free software; you can +Copyright 2001-2020 by Wilson Snyder. Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the Perl Artistic License Version 2.0. diff --git a/verilator-config-version.cmake.in b/verilator-config-version.cmake.in index 89862189a..d20a842ba 100644 --- a/verilator-config-version.cmake.in +++ b/verilator-config-version.cmake.in @@ -7,7 +7,7 @@ # # find_package(verilate 4.0) # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. diff --git a/verilator-config.cmake.in b/verilator-config.cmake.in index 0f25e3195..e7fe515d4 100644 --- a/verilator-config.cmake.in +++ b/verilator-config.cmake.in @@ -11,7 +11,7 @@ # add_executable(simulator ) # verilate(simulator SOURCES ) # -# Copyright 2003-2019 by Wilson Snyder. This program is free software; you can +# Copyright 2003-2020 by Wilson Snyder. This program is free software; you can # redistribute it and/or modify it under the terms of either the GNU # Lesser General Public License Version 3 or the Perl Artistic License # Version 2.0. From 9978cbfa5cad3768978a19f4205f4ed0ae5d3918 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 8 Jan 2020 07:32:31 -0500 Subject: [PATCH 71/90] Fix tracing -1 index arrays. Closes #2090. --- Changes | 2 + include/verilated_fst_c.cpp | 5 +- include/verilated_fst_c.h | 26 +- include/verilated_vcd_c.cpp | 60 +- include/verilated_vcd_c.h | 24 +- src/V3EmitC.cpp | 10 +- test_regress/t/t_trace_complex.out | 368 ++++++------ test_regress/t/t_trace_complex.v | 2 + test_regress/t/t_trace_complex_fst.out | 52 +- test_regress/t/t_trace_complex_params.out | 368 ++++++------ test_regress/t/t_trace_complex_params_fst.out | 52 +- test_regress/t/t_trace_complex_structs.out | 554 +++++++++--------- .../t/t_trace_complex_structs_fst.out | 44 +- 13 files changed, 811 insertions(+), 756 deletions(-) diff --git a/Changes b/Changes index dc12d607a..7e75f225d 100644 --- a/Changes +++ b/Changes @@ -32,6 +32,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix huge case statement performance. Closes #1644. [Julien Margetts] +**** Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa] + * Verilator 4.024 2019-12-08 diff --git a/include/verilated_fst_c.cpp b/include/verilated_fst_c.cpp index 0bac106ff..976e171e7 100644 --- a/include/verilated_fst_c.cpp +++ b/include/verilated_fst_c.cpp @@ -118,7 +118,7 @@ void VerilatedFst::declDTypeEnum(int dtypenum, const char* name, vluint32_t elem void VerilatedFst::declSymbol(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, vluint32_t len) { + bool array, int arraynum, vluint32_t len) { std::pair p = m_code2symbol.insert(std::make_pair(code, static_cast(NULL))); std::istringstream nameiss(name); @@ -153,8 +153,7 @@ void VerilatedFst::declSymbol(vluint32_t code, const char* name, std::stringstream name_ss; name_ss << symbol_name; - if (arraynum >= 0) - name_ss << "(" << arraynum << ")"; + if (array) name_ss << "(" << arraynum << ")"; std::string name_str = name_ss.str(); if (dtypenum > 0) { diff --git a/include/verilated_fst_c.h b/include/verilated_fst_c.h index e539161ba..eda522554 100644 --- a/include/verilated_fst_c.h +++ b/include/verilated_fst_c.h @@ -60,7 +60,7 @@ private: VL_UNCOPYABLE(VerilatedFst); void declSymbol(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, vluint32_t len); + bool array, int arraynum, vluint32_t len); // helpers std::vector m_valueStrBuffer; public: @@ -103,33 +103,33 @@ public: /// Inside dumping routines, declare a signal void declBit(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1); } void declBus(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } void declDouble(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 2); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 2); } void declFloat(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, 1); + bool array, int arraynum) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, 1); } void declQuad(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } void declArray(vluint32_t code, const char* name, int dtypenum, fstVarDir vardir, fstVarType vartype, - int arraynum, int msb, int lsb) { - declSymbol(code, name, dtypenum, vardir, vartype, arraynum, msb - lsb + 1); + bool array, int arraynum, int msb, int lsb) { + declSymbol(code, name, dtypenum, vardir, vartype, array, arraynum, msb - lsb + 1); } /// Inside dumping routines, dump one signal if it has changed diff --git a/include/verilated_vcd_c.cpp b/include/verilated_vcd_c.cpp index c21c8f1b9..42b930f05 100644 --- a/include/verilated_vcd_c.cpp +++ b/include/verilated_vcd_c.cpp @@ -525,7 +525,7 @@ void VerilatedVcd::module(const std::string& name) { } void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, - int arraynum, bool tri, bool bussed, int msb, int lsb) { + bool array, int arraynum, bool tri, bool bussed, int msb, int lsb) { if (!code) { VL_FATAL_MT(__FILE__, __LINE__, "", "Internal: internal trace problem, code 0 is illegal"); } @@ -584,7 +584,7 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, } decl += " "; decl += basename; - if (arraynum>=0) { + if (array) { sprintf(buf, "(%d)", arraynum); decl += buf; hiername += buf; @@ -597,26 +597,42 @@ void VerilatedVcd::declare(vluint32_t code, const char* name, const char* wirep, m_namemapp->insert(std::make_pair(hiername,decl)); } -void VerilatedVcd::declBit (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "wire", arraynum, false, false, 0, 0); } -void VerilatedVcd::declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, false, true, msb, lsb); } -void VerilatedVcd::declTriBit (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "wire", arraynum, true, false, 0, 0); } -void VerilatedVcd::declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb) -{ declare(code, name, "wire", arraynum, true, true, msb, lsb); } -void VerilatedVcd::declFloat (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "real", arraynum, false, false, 31, 0); } -void VerilatedVcd::declDouble (vluint32_t code, const char* name, int arraynum) -{ declare(code, name, "real", arraynum, false, false, 63, 0); } +void VerilatedVcd::declBit(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "wire", array, arraynum, false, false, 0, 0); +} +void VerilatedVcd::declBus(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declQuad(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, false, true, msb, lsb); +} +void VerilatedVcd::declTriBit(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "wire", array, arraynum, true, false, 0, 0); +} +void VerilatedVcd::declTriBus(vluint32_t code, const char* name, bool array, int arraynum, int msb, + int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declTriQuad(vluint32_t code, const char* name, bool array, int arraynum, + int msb, int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declTriArray(vluint32_t code, const char* name, bool array, int arraynum, + int msb, int lsb) { + declare(code, name, "wire", array, arraynum, true, true, msb, lsb); +} +void VerilatedVcd::declFloat(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "real", array, arraynum, false, false, 31, 0); +} +void VerilatedVcd::declDouble(vluint32_t code, const char* name, bool array, int arraynum) { + declare(code, name, "real", array, arraynum, false, false, 63, 0); +} //============================================================================= diff --git a/include/verilated_vcd_c.h b/include/verilated_vcd_c.h index 89f6f7c7c..835af7b71 100644 --- a/include/verilated_vcd_c.h +++ b/include/verilated_vcd_c.h @@ -125,8 +125,8 @@ private: void printStr(const char* str); void printQuad(vluint64_t n); void printTime(vluint64_t timeui); - void declare(vluint32_t code, const char* name, const char* wirep, - int arraynum, bool tri, bool bussed, int msb, int lsb); + void declare(vluint32_t code, const char* name, const char* wirep, bool array, int arraynum, + bool tri, bool bussed, int msb, int lsb); void dumpHeader(); void dumpPrep(vluint64_t timeui); @@ -201,16 +201,16 @@ public: /// Inside dumping routines, declare a module void module(const std::string& name); /// Inside dumping routines, declare a signal - void declBit (vluint32_t code, const char* name, int arraynum); - void declBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriBit (vluint32_t code, const char* name, int arraynum); - void declTriBus (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriQuad (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declTriArray (vluint32_t code, const char* name, int arraynum, int msb, int lsb); - void declDouble (vluint32_t code, const char* name, int arraynum); - void declFloat (vluint32_t code, const char* name, int arraynum); + void declBit( vluint32_t code, const char* name, bool array, int arraynum); + void declBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declArray( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriBit( vluint32_t code, const char* name, bool array, int arraynum); + void declTriBus( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriQuad( vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declTriArray(vluint32_t code, const char* name, bool array, int arraynum, int msb, int lsb); + void declDouble( vluint32_t code, const char* name, bool array, int arraynum); + void declFloat( vluint32_t code, const char* name, bool array, int arraynum); // ... other module_start for submodules (based on cell name) /// Inside dumping routines, dump one signal diff --git a/src/V3EmitC.cpp b/src/V3EmitC.cpp index 94c4c1e4a..ff4156267 100644 --- a/src/V3EmitC.cpp +++ b/src/V3EmitC.cpp @@ -3062,13 +3062,13 @@ class EmitCTrace : EmitCStmts { } // Range if (nodep->arrayRange().ranged()) { - puts(",(i+"+cvtToStr(nodep->arrayRange().lo())+")"); + puts(", true,(i+" + cvtToStr(nodep->arrayRange().lo()) + ")"); } else { - puts(",-1"); + puts(", false,-1"); } - if (!nodep->dtypep()->basicp()->isDouble() // When float/double no longer have widths this can go - && nodep->bitRange().ranged()) { - puts(","+cvtToStr(nodep->bitRange().left())+","+cvtToStr(nodep->bitRange().right())); + if (!nodep->dtypep()->basicp()->isDouble() && nodep->bitRange().ranged()) { + puts(", " + cvtToStr(nodep->bitRange().left()) + "," + + cvtToStr(nodep->bitRange().right())); } puts(");"); } diff --git a/test_regress/t/t_trace_complex.out b/test_regress/t/t_trace_complex.out index 1ca5bf69b..e3693b40b 100644 --- a/test_regress/t/t_trace_complex.out +++ b/test_regress/t/t_trace_complex.out @@ -1,49 +1,52 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:18 2019 +$date Wed Jan 8 07:23:20 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 < clk $end + $var wire 1 /" clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 < clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 3 v_arr_real(0) $end - $var real 64 5 v_arr_real(1) $end - $var wire 2 * v_arrp [2:1] $end - $var wire 4 + v_arrp_arrp [3:0] $end - $var wire 4 , v_arrp_strp [3:0] $end - $var wire 1 = v_arru(1) $end - $var wire 1 > v_arru(2) $end - $var wire 2 - v_arru_arrp(3) [2:1] $end - $var wire 2 . v_arru_arrp(4) [2:1] $end - $var wire 1 ? v_arru_arru(3)(1) $end - $var wire 1 @ v_arru_arru(3)(2) $end - $var wire 1 A v_arru_arru(4)(1) $end - $var wire 1 B v_arru_arru(4)(2) $end - $var wire 2 / v_arru_strp(3) [1:0] $end - $var wire 2 0 v_arru_strp(4) [1:0] $end - $var wire 3 9 v_enumb [2:0] $end - $var wire 32 7 v_enumed [31:0] $end - $var wire 32 8 v_enumed2 [31:0] $end - $var real 64 1 v_real $end - $var wire 64 % v_str32x2 [63:0] $end - $var wire 2 ' v_strp [1:0] $end - $var wire 4 ( v_strp_strp [3:0] $end - $var wire 2 ) v_unip_strp [1:0] $end + $var wire 1 /" clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 h" unpacked_array(-1) [7:0] $end + $var wire 8 g" unpacked_array(-2) [7:0] $end + $var wire 8 i" unpacked_array(0) [7:0] $end + $var real 64 E! v_arr_real(0) $end + $var real 64 G! v_arr_real(1) $end + $var wire 2 [ v_arrp [2:1] $end + $var wire 4 c v_arrp_arrp [3:0] $end + $var wire 4 k v_arrp_strp [3:0] $end + $var wire 1 7" v_arru(1) $end + $var wire 1 8" v_arru(2) $end + $var wire 2 s v_arru_arrp(3) [2:1] $end + $var wire 2 t v_arru_arrp(4) [2:1] $end + $var wire 1 G" v_arru_arru(3)(1) $end + $var wire 1 O" v_arru_arru(3)(2) $end + $var wire 1 W" v_arru_arru(4)(1) $end + $var wire 1 _" v_arru_arru(4)(2) $end + $var wire 2 %! v_arru_strp(3) [1:0] $end + $var wire 2 -! v_arru_strp(4) [1:0] $end + $var wire 3 u! v_enumb [2:0] $end + $var wire 32 e! v_enumed [31:0] $end + $var wire 32 m! v_enumed2 [31:0] $end + $var real 64 5! v_real $end + $var wire 64 3 v_str32x2 [63:0] $end + $var wire 2 C v_strp [1:0] $end + $var wire 4 K v_strp_strp [3:0] $end + $var wire 2 S v_unip_strp [1:0] $end $scope module p2 $end - $var wire 32 C PARAM [31:0] $end + $var wire 32 !# PARAM [31:0] $end $upscope $end $scope module p3 $end - $var wire 32 D PARAM [31:0] $end + $var wire 32 )# PARAM [31:0] $end $upscope $end $scope module unnamedblk1 $end - $var wire 32 : b [31:0] $end + $var wire 32 }! b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 ; a [31:0] $end + $var wire 32 '" a [31:0] $end $upscope $end $upscope $end $upscope $end @@ -53,164 +56,167 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b0000000000000000000000000000000000000000000000000000000011111111 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0 1 -r0 3 -r0 5 -b00000000000000000000000000000000 7 -b00000000000000000000000000000000 8 -b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -0< -0= -0> -0? -0@ -0A -0B -b00000000000000000000000000000010 C -b00000000000000000000000000000011 D +b00000000000000000000000000000000 + +b0000000000000000000000000000000000000000000000000000000011111111 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0 5! +r0 E! +r0 G! +b00000000000000000000000000000000 e! +b00000000000000000000000000000000 m! +b000 u! +b00000000000000000000000000000000 }! +b00000000000000000000000000000000 '" +0/" +07" +08" +0G" +0O" +0W" +0_" +b00000000 g" +b00000000 h" +b00000000 i" +b00000000000000000000000000000010 !# +b00000000000000000000000000000011 )# #10 -b00000000000000000000000000000001 $ -b0000000000000000000000000000000100000000000000000000000011111110 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.1 1 -r0.2 3 -r0.3 5 -b00000000000000000000000000000001 7 -b00000000000000000000000000000010 8 -b111 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; -1< +b00000000000000000000000000000001 + +b0000000000000000000000000000000100000000000000000000000011111110 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.1 5! +r0.2 E! +r0.3 G! +b00000000000000000000000000000001 e! +b00000000000000000000000000000010 m! +b111 u! +b00000000000000000000000000000101 }! +b00000000000000000000000000000101 '" +1/" #15 -0< +0/" #20 -b00000000000000000000000000000010 $ -b0000000000000000000000000000001000000000000000000000000011111101 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.2 1 -r0.4 3 -r0.6 5 -b00000000000000000000000000000010 7 -b00000000000000000000000000000100 8 -b110 9 -1< +b00000000000000000000000000000010 + +b0000000000000000000000000000001000000000000000000000000011111101 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.2 5! +r0.4 E! +r0.6 G! +b00000000000000000000000000000010 e! +b00000000000000000000000000000100 m! +b110 u! +1/" #25 -0< +0/" #30 -b00000000000000000000000000000011 $ -b0000000000000000000000000000001100000000000000000000000011111100 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.3 1 -r0.6000000000000001 3 -r0.8999999999999999 5 -b00000000000000000000000000000011 7 -b00000000000000000000000000000110 8 -b101 9 -1< +b00000000000000000000000000000011 + +b0000000000000000000000000000001100000000000000000000000011111100 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.3 5! +r0.6000000000000001 E! +r0.8999999999999999 G! +b00000000000000000000000000000011 e! +b00000000000000000000000000000110 m! +b101 u! +1/" #35 -0< +0/" #40 -b00000000000000000000000000000100 $ -b0000000000000000000000000000010000000000000000000000000011111011 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.4 1 -r0.8 3 -r1.2 5 -b00000000000000000000000000000100 7 -b00000000000000000000000000001000 8 -b100 9 -1< +b00000000000000000000000000000100 + +b0000000000000000000000000000010000000000000000000000000011111011 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.4 5! +r0.8 E! +r1.2 G! +b00000000000000000000000000000100 e! +b00000000000000000000000000001000 m! +b100 u! +1/" #45 -0< +0/" #50 -b00000000000000000000000000000101 $ -b0000000000000000000000000000010100000000000000000000000011111010 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.5 1 -r1 3 -r1.5 5 -b00000000000000000000000000000101 7 -b00000000000000000000000000001010 8 -b011 9 -1< +b00000000000000000000000000000101 + +b0000000000000000000000000000010100000000000000000000000011111010 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.5 5! +r1 E! +r1.5 G! +b00000000000000000000000000000101 e! +b00000000000000000000000000001010 m! +b011 u! +1/" #55 -0< +0/" #60 -b00000000000000000000000000000110 $ -b0000000000000000000000000000011000000000000000000000000011111001 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.6 1 -r1.2 3 -r1.8 5 -b00000000000000000000000000000110 7 -b00000000000000000000000000001100 8 -b010 9 -1< +b00000000000000000000000000000110 + +b0000000000000000000000000000011000000000000000000000000011111001 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.6 5! +r1.2 E! +r1.8 G! +b00000000000000000000000000000110 e! +b00000000000000000000000000001100 m! +b010 u! +1/" diff --git a/test_regress/t/t_trace_complex.v b/test_regress/t/t_trace_complex.v index 22f744289..803148e86 100644 --- a/test_regress/t/t_trace_complex.v +++ b/test_regress/t/t_trace_complex.v @@ -65,6 +65,8 @@ module t (clk); typedef enum logic [2:0] { BZERO=0, BONE, BTWO, BTHREE } enumb_t; enumb_t v_enumb; + logic [7:0] unpacked_array[-2:0]; + p #(.PARAM(2)) p2 (); p #(.PARAM(3)) p3 (); diff --git a/test_regress/t/t_trace_complex_fst.out b/test_regress/t/t_trace_complex_fst.out index 6850fcf49..09140eaf7 100644 --- a/test_regress/t/t_trace_complex_fst.out +++ b/test_regress/t/t_trace_complex_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:18 2019 + Wed Jan 8 07:26:16 2020 $end $version @@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 9 v_enumb $end +$var logic 8 : unpacked_array(-2) $end +$var logic 8 ; unpacked_array(-1) $end +$var logic 8 < unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 : b $end +$var integer 32 = b $end $scope module unnamedblk2 $end -$var integer 32 ; a $end +$var integer 32 > a $end $upscope $end $upscope $end $scope module p2 $end -$var parameter 32 < PARAM $end +$var parameter 32 ? PARAM $end $upscope $end $scope module p3 $end -$var parameter 32 = PARAM $end +$var parameter 32 @ PARAM $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 > global_bit $end +$var bit 1 A global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6 b00000000000000000000000000000000 7 b00000000000000000000000000000000 8 b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -b00000000000000000000000000000010 < -b00000000000000000000000000000011 = -1> +b00000000 : +b00000000 ; +b00000000 < +b00000000000000000000000000000000 = +b00000000000000000000000000000000 > +b00000000000000000000000000000010 ? +b00000000000000000000000000000011 @ +1A #10 -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b111 9 b00000000000000000000000000000010 8 b00000000000000000000000000000001 7 @@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6 b00000000000000000000000000000010 7 b00000000000000000000000000000100 8 b110 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #25 0! #30 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b101 9 b00000000000000000000000000000110 8 b00000000000000000000000000000011 7 @@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6 b00000000000000000000000000000100 7 b00000000000000000000000000001000 8 b100 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #45 0! #50 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b011 9 b00000000000000000000000000001010 8 b00000000000000000000000000000101 7 @@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6 b00000000000000000000000000000110 7 b00000000000000000000000000001100 8 b010 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > diff --git a/test_regress/t/t_trace_complex_params.out b/test_regress/t/t_trace_complex_params.out index 2f0975e10..ca5eeb36d 100644 --- a/test_regress/t/t_trace_complex_params.out +++ b/test_regress/t/t_trace_complex_params.out @@ -1,49 +1,52 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:21 2019 +$date Wed Jan 8 07:26:16 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 < clk $end + $var wire 1 /" clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 < clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 3 v_arr_real(0) $end - $var real 64 5 v_arr_real(1) $end - $var wire 2 * v_arrp [2:1] $end - $var wire 4 + v_arrp_arrp [3:0] $end - $var wire 4 , v_arrp_strp [3:0] $end - $var wire 1 = v_arru(1) $end - $var wire 1 > v_arru(2) $end - $var wire 2 - v_arru_arrp(3) [2:1] $end - $var wire 2 . v_arru_arrp(4) [2:1] $end - $var wire 1 ? v_arru_arru(3)(1) $end - $var wire 1 @ v_arru_arru(3)(2) $end - $var wire 1 A v_arru_arru(4)(1) $end - $var wire 1 B v_arru_arru(4)(2) $end - $var wire 2 / v_arru_strp(3) [1:0] $end - $var wire 2 0 v_arru_strp(4) [1:0] $end - $var wire 3 9 v_enumb [2:0] $end - $var wire 32 7 v_enumed [31:0] $end - $var wire 32 8 v_enumed2 [31:0] $end - $var real 64 1 v_real $end - $var wire 64 % v_str32x2 [63:0] $end - $var wire 2 ' v_strp [1:0] $end - $var wire 4 ( v_strp_strp [3:0] $end - $var wire 2 ) v_unip_strp [1:0] $end + $var wire 1 /" clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 h" unpacked_array(-1) [7:0] $end + $var wire 8 g" unpacked_array(-2) [7:0] $end + $var wire 8 i" unpacked_array(0) [7:0] $end + $var real 64 E! v_arr_real(0) $end + $var real 64 G! v_arr_real(1) $end + $var wire 2 [ v_arrp [2:1] $end + $var wire 4 c v_arrp_arrp [3:0] $end + $var wire 4 k v_arrp_strp [3:0] $end + $var wire 1 7" v_arru(1) $end + $var wire 1 8" v_arru(2) $end + $var wire 2 s v_arru_arrp(3) [2:1] $end + $var wire 2 t v_arru_arrp(4) [2:1] $end + $var wire 1 G" v_arru_arru(3)(1) $end + $var wire 1 O" v_arru_arru(3)(2) $end + $var wire 1 W" v_arru_arru(4)(1) $end + $var wire 1 _" v_arru_arru(4)(2) $end + $var wire 2 %! v_arru_strp(3) [1:0] $end + $var wire 2 -! v_arru_strp(4) [1:0] $end + $var wire 3 u! v_enumb [2:0] $end + $var wire 32 e! v_enumed [31:0] $end + $var wire 32 m! v_enumed2 [31:0] $end + $var real 64 5! v_real $end + $var wire 64 3 v_str32x2 [63:0] $end + $var wire 2 C v_strp [1:0] $end + $var wire 4 K v_strp_strp [3:0] $end + $var wire 2 S v_unip_strp [1:0] $end $scope module p2 $end - $var wire 32 C PARAM [31:0] $end + $var wire 32 !# PARAM [31:0] $end $upscope $end $scope module p3 $end - $var wire 32 D PARAM [31:0] $end + $var wire 32 )# PARAM [31:0] $end $upscope $end $scope module unnamedblk1 $end - $var wire 32 : b [31:0] $end + $var wire 32 }! b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 ; a [31:0] $end + $var wire 32 '" a [31:0] $end $upscope $end $upscope $end $upscope $end @@ -53,164 +56,167 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b0000000000000000000000000000000000000000000000000000000011111111 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0 1 -r0 3 -r0 5 -b00000000000000000000000000000000 7 -b00000000000000000000000000000000 8 -b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -0< -0= -0> -0? -0@ -0A -0B -b00000000000000000000000000000010 C -b00000000000000000000000000000011 D +b00000000000000000000000000000000 + +b0000000000000000000000000000000000000000000000000000000011111111 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0 5! +r0 E! +r0 G! +b00000000000000000000000000000000 e! +b00000000000000000000000000000000 m! +b000 u! +b00000000000000000000000000000000 }! +b00000000000000000000000000000000 '" +0/" +07" +08" +0G" +0O" +0W" +0_" +b00000000 g" +b00000000 h" +b00000000 i" +b00000000000000000000000000000010 !# +b00000000000000000000000000000011 )# #10 -b00000000000000000000000000000001 $ -b0000000000000000000000000000000100000000000000000000000011111110 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.1 1 -r0.2 3 -r0.3 5 -b00000000000000000000000000000001 7 -b00000000000000000000000000000010 8 -b111 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; -1< +b00000000000000000000000000000001 + +b0000000000000000000000000000000100000000000000000000000011111110 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.1 5! +r0.2 E! +r0.3 G! +b00000000000000000000000000000001 e! +b00000000000000000000000000000010 m! +b111 u! +b00000000000000000000000000000101 }! +b00000000000000000000000000000101 '" +1/" #15 -0< +0/" #20 -b00000000000000000000000000000010 $ -b0000000000000000000000000000001000000000000000000000000011111101 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.2 1 -r0.4 3 -r0.6 5 -b00000000000000000000000000000010 7 -b00000000000000000000000000000100 8 -b110 9 -1< +b00000000000000000000000000000010 + +b0000000000000000000000000000001000000000000000000000000011111101 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.2 5! +r0.4 E! +r0.6 G! +b00000000000000000000000000000010 e! +b00000000000000000000000000000100 m! +b110 u! +1/" #25 -0< +0/" #30 -b00000000000000000000000000000011 $ -b0000000000000000000000000000001100000000000000000000000011111100 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.3 1 -r0.6000000000000001 3 -r0.8999999999999999 5 -b00000000000000000000000000000011 7 -b00000000000000000000000000000110 8 -b101 9 -1< +b00000000000000000000000000000011 + +b0000000000000000000000000000001100000000000000000000000011111100 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.3 5! +r0.6000000000000001 E! +r0.8999999999999999 G! +b00000000000000000000000000000011 e! +b00000000000000000000000000000110 m! +b101 u! +1/" #35 -0< +0/" #40 -b00000000000000000000000000000100 $ -b0000000000000000000000000000010000000000000000000000000011111011 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.4 1 -r0.8 3 -r1.2 5 -b00000000000000000000000000000100 7 -b00000000000000000000000000001000 8 -b100 9 -1< +b00000000000000000000000000000100 + +b0000000000000000000000000000010000000000000000000000000011111011 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.4 5! +r0.8 E! +r1.2 G! +b00000000000000000000000000000100 e! +b00000000000000000000000000001000 m! +b100 u! +1/" #45 -0< +0/" #50 -b00000000000000000000000000000101 $ -b0000000000000000000000000000010100000000000000000000000011111010 % -b11 ' -b1111 ( -b11 ) -b11 * -b1111 + -b1111 , -b11 - -b11 . -b11 / -b11 0 -r0.5 1 -r1 3 -r1.5 5 -b00000000000000000000000000000101 7 -b00000000000000000000000000001010 8 -b011 9 -1< +b00000000000000000000000000000101 + +b0000000000000000000000000000010100000000000000000000000011111010 3 +b11 C +b1111 K +b11 S +b11 [ +b1111 c +b1111 k +b11 s +b11 t +b11 %! +b11 -! +r0.5 5! +r1 E! +r1.5 G! +b00000000000000000000000000000101 e! +b00000000000000000000000000001010 m! +b011 u! +1/" #55 -0< +0/" #60 -b00000000000000000000000000000110 $ -b0000000000000000000000000000011000000000000000000000000011111001 % -b00 ' -b0000 ( -b00 ) -b00 * -b0000 + -b0000 , -b00 - -b00 . -b00 / -b00 0 -r0.6 1 -r1.2 3 -r1.8 5 -b00000000000000000000000000000110 7 -b00000000000000000000000000001100 8 -b010 9 -1< +b00000000000000000000000000000110 + +b0000000000000000000000000000011000000000000000000000000011111001 3 +b00 C +b0000 K +b00 S +b00 [ +b0000 c +b0000 k +b00 s +b00 t +b00 %! +b00 -! +r0.6 5! +r1.2 E! +r1.8 G! +b00000000000000000000000000000110 e! +b00000000000000000000000000001100 m! +b010 u! +1/" diff --git a/test_regress/t/t_trace_complex_params_fst.out b/test_regress/t/t_trace_complex_params_fst.out index 3389037da..366add463 100644 --- a/test_regress/t/t_trace_complex_params_fst.out +++ b/test_regress/t/t_trace_complex_params_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:23 2019 + Wed Jan 8 07:26:17 2020 $end $version @@ -41,21 +41,24 @@ $var logic 32 8 v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 9 v_enumb $end +$var logic 8 : unpacked_array(-2) $end +$var logic 8 ; unpacked_array(-1) $end +$var logic 8 < unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 : b $end +$var integer 32 = b $end $scope module unnamedblk2 $end -$var integer 32 ; a $end +$var integer 32 > a $end $upscope $end $upscope $end $scope module p2 $end -$var parameter 32 < PARAM $end +$var parameter 32 ? PARAM $end $upscope $end $scope module p3 $end -$var parameter 32 = PARAM $end +$var parameter 32 @ PARAM $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 > global_bit $end +$var bit 1 A global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -85,14 +88,17 @@ b0000000000000000000000000000000000000000000000000000000011111111 6 b00000000000000000000000000000000 7 b00000000000000000000000000000000 8 b000 9 -b00000000000000000000000000000000 : -b00000000000000000000000000000000 ; -b00000000000000000000000000000010 < -b00000000000000000000000000000011 = -1> +b00000000 : +b00000000 ; +b00000000 < +b00000000000000000000000000000000 = +b00000000000000000000000000000000 > +b00000000000000000000000000000010 ? +b00000000000000000000000000000011 @ +1A #10 -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b111 9 b00000000000000000000000000000010 8 b00000000000000000000000000000001 7 @@ -134,14 +140,14 @@ b0000000000000000000000000000001000000000000000000000000011111101 6 b00000000000000000000000000000010 7 b00000000000000000000000000000100 8 b110 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #25 0! #30 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b101 9 b00000000000000000000000000000110 8 b00000000000000000000000000000011 7 @@ -182,14 +188,14 @@ b0000000000000000000000000000010000000000000000000000000011111011 6 b00000000000000000000000000000100 7 b00000000000000000000000000001000 8 b100 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > #45 0! #50 1! -b00000000000000000000000000000101 ; -b00000000000000000000000000000101 : +b00000000000000000000000000000101 > +b00000000000000000000000000000101 = b011 9 b00000000000000000000000000001010 8 b00000000000000000000000000000101 7 @@ -230,5 +236,5 @@ b0000000000000000000000000000011000000000000000000000000011111001 6 b00000000000000000000000000000110 7 b00000000000000000000000000001100 8 b010 9 -b00000000000000000000000000000101 : -b00000000000000000000000000000101 ; +b00000000000000000000000000000101 = +b00000000000000000000000000000101 > diff --git a/test_regress/t/t_trace_complex_structs.out b/test_regress/t/t_trace_complex_structs.out index 22b81efdb..ba955aa5e 100644 --- a/test_regress/t/t_trace_complex_structs.out +++ b/test_regress/t/t_trace_complex_structs.out @@ -1,83 +1,86 @@ $version Generated by VerilatedVcd $end -$date Wed May 1 19:09:26 2019 +$date Wed Jan 8 07:26:19 2020 $end $timescale 1ns $end $scope module top $end - $var wire 1 G clk $end + $var wire 1 )# clk $end $scope module $unit $end $var wire 1 # global_bit $end $upscope $end $scope module t $end - $var wire 1 G clk $end - $var wire 32 $ cyc [31:0] $end - $var real 64 > v_arr_real(0) $end - $var real 64 @ v_arr_real(1) $end - $var wire 2 / v_arrp [2:1] $end - $var wire 2 0 v_arrp_arrp(3) [1:0] $end - $var wire 2 1 v_arrp_arrp(4) [1:0] $end - $var wire 1 H v_arru(1) $end - $var wire 1 I v_arru(2) $end - $var wire 2 6 v_arru_arrp(3) [2:1] $end - $var wire 2 7 v_arru_arrp(4) [2:1] $end - $var wire 1 J v_arru_arru(3)(1) $end - $var wire 1 K v_arru_arru(3)(2) $end - $var wire 1 L v_arru_arru(4)(1) $end - $var wire 1 M v_arru_arru(4)(2) $end - $var wire 3 D v_enumb [2:0] $end - $var wire 32 B v_enumed [31:0] $end - $var wire 32 C v_enumed2 [31:0] $end - $var real 64 < v_real $end + $var wire 1 )# clk $end + $var wire 32 + cyc [31:0] $end + $var wire 8 b# unpacked_array(-1) [7:0] $end + $var wire 8 a# unpacked_array(-2) [7:0] $end + $var wire 8 c# unpacked_array(0) [7:0] $end + $var real 64 ?" v_arr_real(0) $end + $var real 64 A" v_arr_real(1) $end + $var wire 2 %! v_arrp [2:1] $end + $var wire 2 -! v_arrp_arrp(3) [1:0] $end + $var wire 2 5! v_arrp_arrp(4) [1:0] $end + $var wire 1 1# v_arru(1) $end + $var wire 1 2# v_arru(2) $end + $var wire 2 ]! v_arru_arrp(3) [2:1] $end + $var wire 2 ^! v_arru_arrp(4) [2:1] $end + $var wire 1 A# v_arru_arru(3)(1) $end + $var wire 1 I# v_arru_arru(3)(2) $end + $var wire 1 Q# v_arru_arru(4)(1) $end + $var wire 1 Y# v_arru_arru(4)(2) $end + $var wire 3 o" v_enumb [2:0] $end + $var wire 32 _" v_enumed [31:0] $end + $var wire 32 g" v_enumed2 [31:0] $end + $var real 64 /" v_real $end $scope module unnamedblk1 $end - $var wire 32 E b [31:0] $end + $var wire 32 w" b [31:0] $end $scope module unnamedblk2 $end - $var wire 32 F a [31:0] $end + $var wire 32 !# a [31:0] $end $upscope $end $upscope $end $scope module v_arrp_strp(3) $end - $var wire 1 3 b0 $end - $var wire 1 2 b1 $end + $var wire 1 E! b0 $end + $var wire 1 =! b1 $end $upscope $end $scope module v_arrp_strp(4) $end - $var wire 1 5 b0 $end - $var wire 1 4 b1 $end + $var wire 1 U! b0 $end + $var wire 1 M! b1 $end $upscope $end $scope module v_arru_strp(3) $end - $var wire 1 9 b0 $end - $var wire 1 8 b1 $end + $var wire 1 u! b0 $end + $var wire 1 m! b1 $end $upscope $end $scope module v_arru_strp(4) $end - $var wire 1 ; b0 $end - $var wire 1 : b1 $end + $var wire 1 '" b0 $end + $var wire 1 }! b1 $end $upscope $end $scope module v_str32x2(0) $end - $var wire 32 % data [31:0] $end + $var wire 32 3 data [31:0] $end $upscope $end $scope module v_str32x2(1) $end - $var wire 32 & data [31:0] $end + $var wire 32 ; data [31:0] $end $upscope $end $scope module v_strp $end - $var wire 1 ( b0 $end - $var wire 1 ' b1 $end + $var wire 1 K b0 $end + $var wire 1 C b1 $end $upscope $end $scope module v_strp_strp $end $scope module x0 $end - $var wire 1 , b0 $end - $var wire 1 + b1 $end + $var wire 1 k b0 $end + $var wire 1 c b1 $end $upscope $end $scope module x1 $end - $var wire 1 * b0 $end - $var wire 1 ) b1 $end + $var wire 1 [ b0 $end + $var wire 1 S b1 $end $upscope $end $upscope $end $scope module v_unip_strp $end $scope module x0 $end - $var wire 1 . b0 $end - $var wire 1 - b1 $end + $var wire 1 { b0 $end + $var wire 1 s b1 $end $upscope $end $scope module x1 $end - $var wire 1 . b0 $end - $var wire 1 - b1 $end + $var wire 1 { b0 $end + $var wire 1 s b1 $end $upscope $end $upscope $end $upscope $end @@ -87,246 +90,249 @@ $enddefinitions $end #0 1# -b00000000000000000000000000000000 $ -b00000000000000000000000011111111 % -b00000000000000000000000000000000 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0 < -r0 > -r0 @ -b00000000000000000000000000000000 B -b00000000000000000000000000000000 C -b000 D -b00000000000000000000000000000000 E -b00000000000000000000000000000000 F -0G -0H -0I -0J +b00000000000000000000000000000000 + +b00000000000000000000000011111111 3 +b00000000000000000000000000000000 ; +0C 0K -0L -0M +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0 /" +r0 ?" +r0 A" +b00000000000000000000000000000000 _" +b00000000000000000000000000000000 g" +b000 o" +b00000000000000000000000000000000 w" +b00000000000000000000000000000000 !# +0)# +01# +02# +0A# +0I# +0Q# +0Y# +b00000000 a# +b00000000 b# +b00000000 c# #10 -b00000000000000000000000000000001 $ -b00000000000000000000000011111110 % -b00000000000000000000000000000001 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.1 < -r0.2 > -r0.3 @ -b00000000000000000000000000000001 B -b00000000000000000000000000000010 C -b111 D -b00000000000000000000000000000101 E -b00000000000000000000000000000101 F -1G +b00000000000000000000000000000001 + +b00000000000000000000000011111110 3 +b00000000000000000000000000000001 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.1 /" +r0.2 ?" +r0.3 A" +b00000000000000000000000000000001 _" +b00000000000000000000000000000010 g" +b111 o" +b00000000000000000000000000000101 w" +b00000000000000000000000000000101 !# +1)# #15 -0G +0)# #20 -b00000000000000000000000000000010 $ -b00000000000000000000000011111101 % -b00000000000000000000000000000010 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.2 < -r0.4 > -r0.6 @ -b00000000000000000000000000000010 B -b00000000000000000000000000000100 C -b110 D -1G +b00000000000000000000000000000010 + +b00000000000000000000000011111101 3 +b00000000000000000000000000000010 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.2 /" +r0.4 ?" +r0.6 A" +b00000000000000000000000000000010 _" +b00000000000000000000000000000100 g" +b110 o" +1)# #25 -0G +0)# #30 -b00000000000000000000000000000011 $ -b00000000000000000000000011111100 % -b00000000000000000000000000000011 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.3 < -r0.6000000000000001 > -r0.8999999999999999 @ -b00000000000000000000000000000011 B -b00000000000000000000000000000110 C -b101 D -1G +b00000000000000000000000000000011 + +b00000000000000000000000011111100 3 +b00000000000000000000000000000011 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.3 /" +r0.6000000000000001 ?" +r0.8999999999999999 A" +b00000000000000000000000000000011 _" +b00000000000000000000000000000110 g" +b101 o" +1)# #35 -0G +0)# #40 -b00000000000000000000000000000100 $ -b00000000000000000000000011111011 % -b00000000000000000000000000000100 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.4 < -r0.8 > -r1.2 @ -b00000000000000000000000000000100 B -b00000000000000000000000000001000 C -b100 D -1G +b00000000000000000000000000000100 + +b00000000000000000000000011111011 3 +b00000000000000000000000000000100 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.4 /" +r0.8 ?" +r1.2 A" +b00000000000000000000000000000100 _" +b00000000000000000000000000001000 g" +b100 o" +1)# #45 -0G +0)# #50 -b00000000000000000000000000000101 $ -b00000000000000000000000011111010 % -b00000000000000000000000000000101 & -1' -1( -1) -1* -1+ -1, -1- -1. -b11 / -b11 0 -b11 1 -12 -13 -14 -15 -b11 6 -b11 7 -18 -19 -1: -1; -r0.5 < -r1 > -r1.5 @ -b00000000000000000000000000000101 B -b00000000000000000000000000001010 C -b011 D -1G +b00000000000000000000000000000101 + +b00000000000000000000000011111010 3 +b00000000000000000000000000000101 ; +1C +1K +1S +1[ +1c +1k +1s +1{ +b11 %! +b11 -! +b11 5! +1=! +1E! +1M! +1U! +b11 ]! +b11 ^! +1m! +1u! +1}! +1'" +r0.5 /" +r1 ?" +r1.5 A" +b00000000000000000000000000000101 _" +b00000000000000000000000000001010 g" +b011 o" +1)# #55 -0G +0)# #60 -b00000000000000000000000000000110 $ -b00000000000000000000000011111001 % -b00000000000000000000000000000110 & -0' -0( -0) -0* -0+ -0, -0- -0. -b00 / -b00 0 -b00 1 -02 -03 -04 -05 -b00 6 -b00 7 -08 -09 -0: -0; -r0.6 < -r1.2 > -r1.8 @ -b00000000000000000000000000000110 B -b00000000000000000000000000001100 C -b010 D -1G +b00000000000000000000000000000110 + +b00000000000000000000000011111001 3 +b00000000000000000000000000000110 ; +0C +0K +0S +0[ +0c +0k +0s +0{ +b00 %! +b00 -! +b00 5! +0=! +0E! +0M! +0U! +b00 ]! +b00 ^! +0m! +0u! +0}! +0'" +r0.6 /" +r1.2 ?" +r1.8 A" +b00000000000000000000000000000110 _" +b00000000000000000000000000001100 g" +b010 o" +1)# diff --git a/test_regress/t/t_trace_complex_structs_fst.out b/test_regress/t/t_trace_complex_structs_fst.out index 93e8f6d7a..a3e68df29 100644 --- a/test_regress/t/t_trace_complex_structs_fst.out +++ b/test_regress/t/t_trace_complex_structs_fst.out @@ -1,5 +1,5 @@ $date - Wed May 1 19:09:29 2019 + Wed Jan 8 07:26:20 2020 $end $version @@ -81,15 +81,18 @@ $var logic 32 D v_enumed2 $end $attrbegin misc 07 t.enumb_t 4 BZERO BONE BTWO BTHREE 000 001 010 011 2 $end $attrbegin misc 07 "" 2 $end $var logic 3 E v_enumb $end +$var logic 8 F unpacked_array(-2) $end +$var logic 8 G unpacked_array(-1) $end +$var logic 8 H unpacked_array(0) $end $scope module unnamedblk1 $end -$var integer 32 F b $end +$var integer 32 I b $end $scope module unnamedblk2 $end -$var integer 32 G a $end +$var integer 32 J a $end $upscope $end $upscope $end $upscope $end $scope module $unit $end -$var bit 1 H global_bit $end +$var bit 1 K global_bit $end $upscope $end $upscope $end $enddefinitions $end @@ -131,12 +134,15 @@ b00000000000000000000000000000000 B b00000000000000000000000000000000 C b00000000000000000000000000000000 D b000 E -b00000000000000000000000000000000 F -b00000000000000000000000000000000 G -1H +b00000000 F +b00000000 G +b00000000 H +b00000000000000000000000000000000 I +b00000000000000000000000000000000 J +1K #10 -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b111 E b00000000000000000000000000000010 D b00000000000000000000000000000001 C @@ -202,14 +208,14 @@ b00000000000000000000000000000010 B b00000000000000000000000000000010 C b00000000000000000000000000000100 D b110 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J #25 0! #30 1! -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b101 E b00000000000000000000000000000110 D b00000000000000000000000000000011 C @@ -274,14 +280,14 @@ b00000000000000000000000000000100 B b00000000000000000000000000000100 C b00000000000000000000000000001000 D b100 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J #45 0! #50 1! -b00000000000000000000000000000101 G -b00000000000000000000000000000101 F +b00000000000000000000000000000101 J +b00000000000000000000000000000101 I b011 E b00000000000000000000000000001010 D b00000000000000000000000000000101 C @@ -346,5 +352,5 @@ b00000000000000000000000000000110 B b00000000000000000000000000000110 C b00000000000000000000000000001100 D b010 E -b00000000000000000000000000000101 F -b00000000000000000000000000000101 G +b00000000000000000000000000000101 I +b00000000000000000000000000000101 J From 951a7d867a7e88cf2ae3907b929ad940a55211a2 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 8 Jan 2020 19:33:42 -0500 Subject: [PATCH 72/90] Commentary --- docs/CONTRIBUTING.adoc | 4 ++-- docs/internals.adoc | 7 +++++++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/docs/CONTRIBUTING.adoc b/docs/CONTRIBUTING.adoc index a0608cb5e..3bdc65084 100644 --- a/docs/CONTRIBUTING.adoc +++ b/docs/CONTRIBUTING.adoc @@ -24,8 +24,8 @@ contributions flow more efficiently. * Please https://verilator.org/issues/new[Open a new issue]. -* You may attach a patch to the issue, or (preferred) may point to a GitHub - repository branch within your GitHub account. +* You may attach a patch to the issue, or (preferred) may request a GitHub + pull request. ** Verilator uses Travis CI to provide continuous integration. You may want to setup Travis CI on your GitHub branch to ensure your changes diff --git a/docs/internals.adoc b/docs/internals.adoc index 9a0379199..3a8550200 100644 --- a/docs/internals.adoc +++ b/docs/internals.adoc @@ -382,6 +382,13 @@ changed; if clear, checking those signals for changes may be skipped. == Coding Conventions +=== Compiler Version and C++11 + +Verilator supports GCC 4.4.7 and newer. GCC 4.4.7 does not support C++11, +therefore C++11 is generally not required. Exceptions may be made to +require C++11 for features that are only practical with C++11, +e.g. threads. + === Indentation and Naming Style We will work with contributors to fix up indentation style issues, but it From 06247686c5746f8e63f85f6b73684b14f5c900be Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Wed, 8 Jan 2020 19:33:47 -0500 Subject: [PATCH 73/90] Codacy cleanups --- ci/build_vcddiff.sh | 8 ++++---- src/V3Life.cpp | 1 + src/V3PreProc.cpp | 2 +- src/V3Task.cpp | 1 + test_regress/t/t_mem_multi_io3.cpp | 8 +------- 5 files changed, 8 insertions(+), 12 deletions(-) diff --git a/ci/build_vcddiff.sh b/ci/build_vcddiff.sh index eefbf13cd..9a0e8b6da 100755 --- a/ci/build_vcddiff.sh +++ b/ci/build_vcddiff.sh @@ -11,8 +11,8 @@ set -e TMP_DIR=$(mktemp -d) -git -C ${TMP_DIR} clone https://github.com/veripool/vcddiff +git -C "${TMP_DIR}" clone https://github.com/veripool/vcddiff VCDDIFF_DIR=${TMP_DIR}/vcddiff -git -C ${VCDDIFF_DIR} checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c -make -C ${VCDDIFF_DIR} -sudo cp ${VCDDIFF_DIR}/vcddiff /usr/local/bin +git -C "${VCDDIFF_DIR}" checkout 5112f88b7ba8818dce9dfb72619e64a1fc19542c +make -C "${VCDDIFF_DIR}" +sudo cp "${VCDDIFF_DIR}/vcddiff" /usr/local/bin diff --git a/src/V3Life.cpp b/src/V3Life.cpp index b73bf8f05..138518f31 100644 --- a/src/V3Life.cpp +++ b/src/V3Life.cpp @@ -459,6 +459,7 @@ public: virtual ~LifeVisitor() { if (m_lifep) { delete m_lifep; m_lifep = NULL; } } + VL_UNCOPYABLE(LifeVisitor); }; //###################################################################### diff --git a/src/V3PreProc.cpp b/src/V3PreProc.cpp index 2feca95f7..8df36ba8c 100644 --- a/src/V3PreProc.cpp +++ b/src/V3PreProc.cpp @@ -358,7 +358,7 @@ void V3PreProcImp::define(FileLine* fl, const string& name, const string& value, } string V3PreProcImp::removeDefines(const string& text) { - string val = "0_never_match"; + string val; string rtnsym = text; for (int loopprevent=0; loopprevent<100; loopprevent++) { string xsym = rtnsym; diff --git a/src/V3Task.cpp b/src/V3Task.cpp index cfd2fd490..80a97c9ac 100644 --- a/src/V3Task.cpp +++ b/src/V3Task.cpp @@ -252,6 +252,7 @@ public: m_callGraph.dumpDotFilePrefixed("task_call"); } virtual ~TaskStateVisitor() {} + VL_UNCOPYABLE(TaskStateVisitor); }; //###################################################################### diff --git a/test_regress/t/t_mem_multi_io3.cpp b/test_regress/t/t_mem_multi_io3.cpp index 30aa58aeb..2108bc73e 100644 --- a/test_regress/t/t_mem_multi_io3.cpp +++ b/test_regress/t/t_mem_multi_io3.cpp @@ -20,12 +20,6 @@ int main() tb = new VM_PREFIX("tb"); // Just a constructor test - bool pass = true; - - if (pass) { - VL_PRINTF("*-* All Finished *-*\n"); - } else { - vl_fatal(__FILE__, __LINE__, "top", "Unexpected results from test\n"); - } + VL_PRINTF("*-* All Finished *-*\n"); return 0; } From b5c151863a2aa49e8afe8e036f3941d0452408b0 Mon Sep 17 00:00:00 2001 From: Yutetsu TAKATSUKASA Date: Fri, 10 Jan 2020 00:13:08 +0900 Subject: [PATCH 74/90] Update .clang-format so that recent clang-format such as LLVM-8 works. (#2092) Use C++03 because this project needs to compile with the standard. --- .clang-format | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/.clang-format b/.clang-format index d336fa9ed..f2fb7e371 100644 --- a/.clang-format +++ b/.clang-format @@ -91,7 +91,8 @@ PenaltyExcessCharacter: 1000000 PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Left RawStringFormats: - - Delimiter: pb + - Delimiters: + - 'pb' Language: TextProto BasedOnStyle: google ReflowComments: true @@ -108,7 +109,7 @@ SpacesInContainerLiterals: true SpacesInCStyleCastParentheses: false SpacesInParentheses: false SpacesInSquareBrackets: false -Standard: Cpp11 +Standard: Cpp03 TabWidth: 8 UseTab: Never ... From 525c79bd0a8fd73b35284f3b8a9444f0b5a85241 Mon Sep 17 00:00:00 2001 From: Stefan Wallentowitz Date: Thu, 9 Jan 2020 23:22:15 +0100 Subject: [PATCH 75/90] Add Docker infrastructure (#2087) This adds files to build and run two Docker images: - run: Build a Docker container that can be used as an executable drop-in for verilator. This can be useful to test behavior of older versions or a development version. The functionality is pretty simplistic at the moment for a start. - buildenv: Everything needed to build and test Verilator. Useful to run quick tests in the cloud or try other compilers. It can also serve as basis for further CI integration. --- ci/docker/buildenv/Dockerfile | 57 +++++++++++++++++++++++++++++ ci/docker/buildenv/README.adoc | 50 +++++++++++++++++++++++++ ci/docker/buildenv/build-systemc.sh | 29 +++++++++++++++ ci/docker/buildenv/build.sh | 30 +++++++++++++++ ci/docker/run/Dockerfile | 47 ++++++++++++++++++++++++ ci/docker/run/README.adoc | 49 +++++++++++++++++++++++++ ci/docker/run/hooks/build | 9 +++++ ci/docker/run/verilator-docker | 10 +++++ ci/docker/run/verilator-wrap.sh | 26 +++++++++++++ 9 files changed, 307 insertions(+) create mode 100644 ci/docker/buildenv/Dockerfile create mode 100644 ci/docker/buildenv/README.adoc create mode 100755 ci/docker/buildenv/build-systemc.sh create mode 100755 ci/docker/buildenv/build.sh create mode 100644 ci/docker/run/Dockerfile create mode 100644 ci/docker/run/README.adoc create mode 100644 ci/docker/run/hooks/build create mode 100755 ci/docker/run/verilator-docker create mode 100755 ci/docker/run/verilator-wrap.sh diff --git a/ci/docker/buildenv/Dockerfile b/ci/docker/buildenv/Dockerfile new file mode 100644 index 000000000..e634b300d --- /dev/null +++ b/ci/docker/buildenv/Dockerfile @@ -0,0 +1,57 @@ +# DESCRIPTION: Dockerfile for env to build and fully test Verilator +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +FROM ubuntu:18.04 + +RUN apt-get update \ + && DEBIAN_FRONTEND=noninteractive \ + apt-get install --no-install-recommends -y \ + autoconf=2.69-11 \ + bc=1.07.1-2 \ + bison=2:3.0.4.dfsg-1build1 \ + build-essential=12.4ubuntu1 \ + ca-certificates=20180409 \ + cmake=3.10.2-1ubuntu2.18.04.1 \ + flex=2.6.4-6 \ + gdb=8.1-0ubuntu3.2 \ + gcc-6=6.5.0-2ubuntu1~18.04 \ + gcc-5=5.5.0-12ubuntu1 \ + gcc-4.8=4.8.5-4ubuntu8 \ + git=1:2.17.1-1ubuntu0.5 \ + gtkwave=3.3.86-1 \ + g++-6=6.5.0-2ubuntu1~18.04 \ + g++-5=5.5.0-12ubuntu1 \ + g++-4.8=4.8.5-4ubuntu8 \ + libfl2=2.6.4-6 \ + libfl-dev=2.6.4-6 \ + numactl=2.0.11-2.1ubuntu0.1 \ + perl=5.26.1-6ubuntu0.3 \ + python3=3.6.7-1~18.04 \ + wget=1.19.4-1ubuntu2.2 \ + zlibc=0.9k-4.3 \ + zlib1g=1:1.2.11.dfsg-0ubuntu2 \ + zlib1g-dev=1:1.2.11.dfsg-0ubuntu2 \ + && apt-get clean \ + && rm -rf /var/lib/apt/lists/* + +WORKDIR /tmp + +COPY build-systemc.sh /tmp/ +RUN ./build-systemc.sh + +RUN cpan install -fi Unix::Processors Parallel::Forker Bit::Vector + +RUN git clone https://github.com/veripool/vcddiff.git && \ + make -C vcddiff && \ + cp -p vcddiff/vcddiff /usr/local/bin/vcddiff && \ + rm -rf vcddiff + +COPY build.sh /tmp/build.sh + +ENV VERILATOR_AUTHOR_SITE=1 + +ENTRYPOINT [ "/tmp/build.sh" ] diff --git a/ci/docker/buildenv/README.adoc b/ci/docker/buildenv/README.adoc new file mode 100644 index 000000000..edb3e2b5a --- /dev/null +++ b/ci/docker/buildenv/README.adoc @@ -0,0 +1,50 @@ += Verilator Build Environment + +This container is set up to compile and test a Verilator build based +on the following parameters: + +* Source repository (default: https://github.com/verilator/verilator) +* Source revision (default: master) +* GCC version (4.8.5, 5.5.0, 6.5.0, 7.4.0, default: 7.4.0) + +The container is published as `verilator/verilator-buildenv` on +https://hub.docker.com/repository/docker/verilator/verilator-buildenv[docker hub]. + +To run the basic build of current master: + + docker run -ti verilator/verilator-buildenv + +To also run tests: + + docker run -ti verilator/verilator-buildenv test + +Change the compiler: + + docker run -ti -e CC=gcc-4.8 -e CXX=g++-4.8 verilator/verilator-buildenv test + +The tests that involve gdb are not working due to security restrictions. +To run those too: + +.... +docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` -e CC=gcc-4.8 -e CXX=g++-4.8 --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test +.... + +You may want to avoid pushing your changes to a remote repository and +instead use a local working copy. You can mount the local working copy +path as a volume and use this as repo. Be careful, that it can only +use committed changes, so you may want to use a work-in-progress +commit or so. To build the current HEAD from top of a repository: + +.... +docker run -ti -v ${PWD}:/tmp/repo -e REPO=/tmp/repo -e REV=`git rev-parse --short HEAD` --cap-add=SYS_PTRACE --security-opt seccomp=unconfined verilator/verilator-buildenv test +.... + +== Under the Hood + +To rebuild the image, simply run: + + docker build . + +It will build SystemC in all supported compiler variants to reduce the +impact on testing cycles. A build script will be the entrypoint to the +container that will perform a standard build and test procedure. diff --git a/ci/docker/buildenv/build-systemc.sh b/ci/docker/buildenv/build-systemc.sh new file mode 100755 index 000000000..ee4630977 --- /dev/null +++ b/ci/docker/buildenv/build-systemc.sh @@ -0,0 +1,29 @@ +#!/bin/bash -e +# DESCRIPTION: Build SystemC in Ubuntu 18.04 with different g++/gcc +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +build_variant () { + version=$($1 --version | grep gcc | awk '{print $4}') + mkdir "/usr/local/systemc-2.3.3-gcc$version" + mkdir build + cd build + ../configure --prefix="/usr/local/systemc-2.3.3-gcc$version" CC="$1" CXX="$2" LD="$2" + make -j + make install + cd .. + rm -r build +} + +wget https://www.accellera.org/images/downloads/standards/systemc/systemc-2.3.3.tar.gz +tar -xzf systemc-2.3.3.tar.gz +cd systemc-2.3.3 +build_variant gcc g++ +build_variant gcc-6 g++-6 +build_variant gcc-5 g++-5 +build_variant gcc-4.8 g++-4.8 +cd .. +rm -r systemc-2.3.3* diff --git a/ci/docker/buildenv/build.sh b/ci/docker/buildenv/build.sh new file mode 100755 index 000000000..e79f69f91 --- /dev/null +++ b/ci/docker/buildenv/build.sh @@ -0,0 +1,30 @@ +#!/bin/bash -e +# DESCRIPTION: Build Verilator (inside container) +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +: "${REPO:=https://github.com/verilator/verilator}" +: "${REV:=master}" +: "${CC:=gcc}" +: "${CXX:=g++}" + +GCCVERSION=$(${CC} --version | grep gcc | awk '{print $4}') + +export SYSTEMC_INCLUDE="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/include" +export SYSTEMC_LIBDIR="/usr/local/systemc-2.3.3-gcc${GCCVERSION}/lib-linux64" +export LD_LIBRARY_PATH=${SYSTEMC_LIBDIR} + +SRCS=$PWD/verilator + +git clone "$REPO" "$SRCS" +cd "$SRCS" +git checkout "$REV" +autoconf +./configure --enable-longtests +make -j $(nproc) +if [ "${1:-''}" == "test" ]; then + make test +fi diff --git a/ci/docker/run/Dockerfile b/ci/docker/run/Dockerfile new file mode 100644 index 000000000..7f7995009 --- /dev/null +++ b/ci/docker/run/Dockerfile @@ -0,0 +1,47 @@ +# DESCRIPTION: Dockerfile for image to run Verilator inside +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +FROM ubuntu:18.04 + +RUN apt-get update \ + && apt-get install --no-install-recommends -y \ + autoconf=2.69-11 \ + bc=1.07.1-2 \ + bison=2:3.0.4.dfsg-1build1 \ + build-essential=12.4ubuntu1 \ + ca-certificates=20180409 \ + flex=2.6.4-6 \ + git=1:2.17.1-1ubuntu0.5 \ + libfl-dev=2.6.4-6 \ + perl=5.26.1-6ubuntu0.3 \ + python3=3.6.7-1~18.04 \ + && apt-get clean \ + && rm -rf /var/lib/apt/lists/* + +ARG REPO=https://github.com/verilator/verilator +ARG SOURCE_COMMIT=master + +WORKDIR /tmp + +# Add an exception for the linter, we want to cd here in one layer +# to reduce the number of layers (and thereby size). +# hadolint ignore=DL3003 +RUN git clone "${REPO}" verilator && \ + cd verilator && \ + git checkout "${SOURCE_COMMIT}" && \ + autoconf && \ + ./configure && \ + make -j "$(nproc)" && \ + make install && \ + cd .. && \ + rm -r verilator + +COPY verilator-wrap.sh /usr/local/bin/verilator-wrap.sh + +WORKDIR /work + +ENTRYPOINT [ "/usr/local/bin/verilator-wrap.sh" ] diff --git a/ci/docker/run/README.adoc b/ci/docker/run/README.adoc new file mode 100644 index 000000000..82793b878 --- /dev/null +++ b/ci/docker/run/README.adoc @@ -0,0 +1,49 @@ += Docker Container as Verilator executable + +This allows you to run Verilator easily as a docker image, e.g.: + + docker run -ti verilator/verilator:latest --version + +This is in particular useful to compare against older version or to +check when an issue was introduced. + +You will need to give it access to your files as a volume and fix the +user rights: + +.... +docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:latest --cc test.v +.... + +The caveat is that it can only access files below the current +directory then, a workaround is to adopt the volume and set +`-workdir`. + +There is a convenience script in this folder that wraps around the +docker calls: + + $ verilator-docker 3.922 --version + Verilator 3.922 2018-03-17 rev UNKNOWN_REV + +Finally, you can also work in the container by setting the entrypoint +(don't forget to mount a volume if you want your work persistent): + + docker run -ti --entrypoint /bin/bash verilator/verilator:latest + +The other files in this folder all for building the containers and to +store in them. You could use it to build Verilator at a specific +commit: + + docker build --build-arg SOURCE_COMMIT= . + +== Internals + +The Dockerfile is pretty straight-forward, it builds Verilator and +removes the tree after that to reduce the image size. It sets a +wrapper script (`verilator-wrap.sh`) as entrypoint. This script calls +Verilator but also copies the verilated runtime files to the `obj_dir` +or the `-Mdir` respectively. This allows the user to build the C++ +output with the matching runtime files. The wrapper patches the +generated Makefile accordingly. + +There is also a hook defined that is run by docker hub via automated +builds. diff --git a/ci/docker/run/hooks/build b/ci/docker/run/hooks/build new file mode 100644 index 000000000..5a6d609d5 --- /dev/null +++ b/ci/docker/run/hooks/build @@ -0,0 +1,9 @@ +#!/bin/bash +# DESCRIPTION: Docker hub hook to pass SOURCE_COMMIT +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0.FROM ubuntu:18.04 + +docker build --build-arg SOURCE_COMMIT=${SOURCE_COMMIT} -f $DOCKERFILE_PATH -t $IMAGE_NAME . diff --git a/ci/docker/run/verilator-docker b/ci/docker/run/verilator-docker new file mode 100755 index 000000000..ceb47df9f --- /dev/null +++ b/ci/docker/run/verilator-docker @@ -0,0 +1,10 @@ +#!/bin/bash +# DESCRIPTION: Wrap a verilator call to run a docker container +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +docker pull verilator/verilator:$1 >/dev/null +docker run -ti -v ${PWD}:/work --user $(id -u):$(id -g) verilator/verilator:$1 "${@:2}" diff --git a/ci/docker/run/verilator-wrap.sh b/ci/docker/run/verilator-wrap.sh new file mode 100755 index 000000000..69de6e768 --- /dev/null +++ b/ci/docker/run/verilator-wrap.sh @@ -0,0 +1,26 @@ +#!/bin/bash -e +# DESCRIPTION: Wrap a Verilator call and copy vlt includes +# (inside docker container) +# +# Copyright 2020 by Stefan Wallentowitz. This program is free +# software; you can redistribute it and/or modify it under the terms +# of either the GNU Lesser General Public License Version 3 or the +# Perl Artistic License Version 2.0. + +perl /usr/local/bin/verilator "$@" + +# Check if user set an obj_dir +obj_dir=$(echo " $@" | grep -oP '\s--Mdir\s*\K\S+') +if [ "$obj_dir" == "" ]; then + obj_dir="obj_dir" +fi + +# If the run was successful: Copy required files to allow build without this container +if [ -e ${obj_dir} ]; then + # Copy files required for the build + mkdir -p ${obj_dir}/vlt + cp -r /usr/local/share/verilator/bin ${obj_dir}/vlt + cp -r /usr/local/share/verilator/include ${obj_dir}/vlt + # Point Makefile to that folder + perl -i -pe 's/VERILATOR_ROOT = \/usr\/local\/share\/verilator/VERILATOR_ROOT = vlt/g' ${obj_dir}/*.mk +fi From aac02c1ed1ef4acbed8da4118fc4af5ab5af89a2 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 18:04:49 -0500 Subject: [PATCH 76/90] Fix expand optimization slowing --lint-only. Closes #2091. --- Changes | 2 ++ src/Verilator.cpp | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Changes b/Changes index 7e75f225d..0bc7b655f 100644 --- a/Changes +++ b/Changes @@ -34,6 +34,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix tracing -1 index arrays. Closes #2090. [Yutetsu Takatsukasa] +**** Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts] + * Verilator 4.024 2019-12-08 diff --git a/src/Verilator.cpp b/src/Verilator.cpp index 332b64f0b..b3ce68a12 100644 --- a/src/Verilator.cpp +++ b/src/Verilator.cpp @@ -470,7 +470,8 @@ void process() { } // Expand macros and wide operators into C++ primitives - if (!v3Global.opt.xmlOnly() + if (!v3Global.opt.lintOnly() + && !v3Global.opt.xmlOnly() && v3Global.opt.oExpand()) { V3Expand::expandAll(v3Global.rootp()); } From 029ff69d30491db04b7ef8157e182b88ccde1ca0 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 19:39:14 -0500 Subject: [PATCH 77/90] Update .clang-format to allow 6.0.0 to work. --- .clang-format | 5 ----- 1 file changed, 5 deletions(-) diff --git a/.clang-format b/.clang-format index f2fb7e371..0fd60f7dd 100644 --- a/.clang-format +++ b/.clang-format @@ -90,11 +90,6 @@ PenaltyBreakString: 1000 PenaltyExcessCharacter: 1000000 PenaltyReturnTypeOnItsOwnLine: 60 PointerAlignment: Left -RawStringFormats: - - Delimiters: - - 'pb' - Language: TextProto - BasedOnStyle: google ReflowComments: true SortIncludes: false SortUsingDeclarations: true From 2a50fafef2f0134bed6e9d072f19edba8bc6c61a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 19:39:27 -0500 Subject: [PATCH 78/90] Fix %{number}s with strings. #2093. --- Changes | 2 ++ include/verilated.cpp | 9 +++++++-- src/V3Number.cpp | 23 ++++++++++++++++------- src/V3Number.h | 1 + test_regress/t/t_display.out | 2 ++ test_regress/t/t_display.v | 4 ++++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/Changes b/Changes index 0bc7b655f..755695398 100644 --- a/Changes +++ b/Changes @@ -36,6 +36,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix expand optimization slowing --lint-only. Closes #2091. [Thomas Watts] +**** Fix %{number}s with strings. #2093. [agrobman] + * Verilator 4.024 2019-12-08 diff --git a/include/verilated.cpp b/include/verilated.cpp index 4bfae8d4c..07a880837 100644 --- a/include/verilated.cpp +++ b/include/verilated.cpp @@ -662,6 +662,7 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA case '@': { // Verilog/C++ string va_arg(ap, int); // # bits is ignored const std::string* cstrp = va_arg(ap, const std::string*); + if (width > cstrp->size()) output += std::string(width - cstrp->size(), ' '); output += *cstrp; break; } @@ -713,13 +714,17 @@ void _vl_vsformat(std::string& output, const char* formatp, va_list ap) VL_MT_SA output += charval; break; } - case 's': + case 's': { + std::string field; for (; lsb>=0; --lsb) { lsb = (lsb / 8) * 8; // Next digit IData charval = VL_BITRSHIFT_W(lwp, lsb) & 0xff; - output += (charval==0)?' ':charval; + field += (charval==0)?' ':charval; } + if (width > field.size()) output += std::string(width - field.size(), ' '); + output += field; break; + } case 'd': { // Signed decimal int digits; std::string append; diff --git a/src/V3Number.cpp b/src/V3Number.cpp index 1f060cecf..65f579654 100644 --- a/src/V3Number.cpp +++ b/src/V3Number.cpp @@ -496,11 +496,18 @@ bool V3Number::displayedFmtLegal(char format) { default: return false; } } + +string V3Number::displayPad(size_t fmtsize, char pad, const string& in) { + string prefix; + if (in.length() < fmtsize) prefix = string(fmtsize - in.length(), pad); + return prefix + in; +} + string V3Number::displayed(AstNode* nodep, const string& vformat) const { return displayed(nodep->fileline(), vformat); } -string V3Number::displayed(FileLine*fl, const string& vformat) const { +string V3Number::displayed(FileLine* fl, const string& vformat) const { string::const_iterator pos = vformat.begin(); UASSERT(pos != vformat.end() && pos[0]=='%', "$display-like function with non format argument "<<*this); @@ -566,6 +573,8 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { if (fmtsize != "0") str += ' '; } } + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, ' ', str); return str; } case '~': // Signed decimal @@ -592,12 +601,10 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { str = cvtToStr(toUQuad()); } } - int intfmtsize = atoi(fmtsize.c_str()); bool zeropad = fmtsize.length()>0 && fmtsize[0]=='0'; - while (static_cast(str.length()) < intfmtsize) { - if (zeropad) str.insert(0, "0"); - else str.insert(0, " "); - } + // fmtsize might have changed since we parsed the %fmtsize + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, (zeropad ? '0' : ' '), str); return str; } case 'e': @@ -643,7 +650,9 @@ string V3Number::displayed(FileLine*fl, const string& vformat) const { return str; } case '@': { // Packed string - return toString(); + size_t fmtsizen = static_cast(atoi(fmtsize.c_str())); + str = displayPad(fmtsizen, ' ', toString()); + return str; } default: fl->v3fatalSrc("Unknown $display-like format code for number: %"< Date: Thu, 9 Jan 2020 20:01:12 -0500 Subject: [PATCH 79/90] Fix shebang breaking some shells. Closes #2067. --- Changes | 2 ++ bin/verilator | 4 +--- bin/verilator_coverage | 4 +--- bin/verilator_difftree | 5 +---- bin/verilator_gantt | 6 ++---- bin/verilator_includer | 4 +--- bin/verilator_profcfunc | 4 +--- nodist/bisondiff | 3 ++- nodist/bisonreader | 3 ++- nodist/code_coverage | 3 ++- nodist/dot_importer | 4 ++-- nodist/dot_pruner | 4 ++-- nodist/flexdiff | 3 ++- nodist/git_untabify | 3 ++- nodist/install_test | 3 ++- nodist/invoke_atsim | 4 ++-- nodist/invoke_iccr | 4 ++-- nodist/invoke_ncverilog | 4 ++-- nodist/invoke_vcs | 4 ++-- nodist/vtree_importer | 4 ++-- src/astgen | 4 ++-- src/bisonpre | 4 ++-- src/config_rev.pl | 5 +++-- src/cppcheck_filtered | 4 ++-- src/flexfix | 5 +++-- src/pod2latexfix | 5 +++-- src/vlcovgen | 4 ++-- test_regress/driver.pl | 5 ++--- test_regress/t/bootstrap.pl | 2 +- test_regress/vgen.pl | 4 +++- 30 files changed, 58 insertions(+), 59 deletions(-) diff --git a/Changes b/Changes index 755695398..47f9a76f1 100644 --- a/Changes +++ b/Changes @@ -38,6 +38,8 @@ The contributors that suggested a given feature are shown in []. Thanks! **** Fix %{number}s with strings. #2093. [agrobman] +**** Fix shebang breaking some shells. Closes #2067. [zdave] + * Verilator 4.024 2019-12-08 diff --git a/bin/verilator b/bin/verilator index 105b346a2..922c7b365 100755 --- a/bin/verilator +++ b/bin/verilator @@ -1,6 +1,4 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl ###################################################################### # # Copyright 2003-2020 by Wilson Snyder. This program is free software; you diff --git a/bin/verilator_coverage b/bin/verilator_coverage index 9242d9eb8..13701b660 100755 --- a/bin/verilator_coverage +++ b/bin/verilator_coverage @@ -1,6 +1,4 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl ###################################################################### # # Copyright 2003-2020 by Wilson Snyder. This program is free software; you diff --git a/bin/verilator_difftree b/bin/verilator_difftree index fd40cf037..a7aab372b 100755 --- a/bin/verilator_difftree +++ b/bin/verilator_difftree @@ -1,10 +1,7 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; use warnings; use Getopt::Long; use IO::File; diff --git a/bin/verilator_gantt b/bin/verilator_gantt index 7e93d324c..252b98c9a 100755 --- a/bin/verilator_gantt +++ b/bin/verilator_gantt @@ -1,11 +1,9 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -use strict; use warnings; +use strict; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/bin/verilator_includer b/bin/verilator_includer index 0fe436e1f..83e05f2ed 100755 --- a/bin/verilator_includer +++ b/bin/verilator_includer @@ -1,6 +1,4 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # DESCRIPTION: Print include statements for each ARGV # # Copyright 2003-2020 by Wilson Snyder. This package is free software; you can diff --git a/bin/verilator_profcfunc b/bin/verilator_profcfunc index d8323a857..85523163d 100755 --- a/bin/verilator_profcfunc +++ b/bin/verilator_profcfunc @@ -1,6 +1,4 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### diff --git a/nodist/bisondiff b/nodist/bisondiff index a22a5c2d7..71120ee22 100755 --- a/nodist/bisondiff +++ b/nodist/bisondiff @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2007-2020 by Wilson Snyder. This package is free software; you @@ -15,6 +15,7 @@ # DESCRIPTION: Diff bison files +use warnings; use Getopt::Long; use IO::File; use strict; diff --git a/nodist/bisonreader b/nodist/bisonreader index 78197adee..0ada7c788 100755 --- a/nodist/bisonreader +++ b/nodist/bisonreader @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2007-2020 by Wilson Snyder. This package is free software; you @@ -15,6 +15,7 @@ # DESCRIPTION: Debugging of bison output +use warnings; use strict; my $Debug; diff --git a/nodist/code_coverage b/nodist/code_coverage index 37343eccf..8a2b2b2c8 100755 --- a/nodist/code_coverage +++ b/nodist/code_coverage @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Cwd; use File::Copy qw(cp); use File::Path qw(mkpath); diff --git a/nodist/dot_importer b/nodist/dot_importer index c5cd5a3ed..a63c2831c 100755 --- a/nodist/dot_importer +++ b/nodist/dot_importer @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/nodist/dot_pruner b/nodist/dot_pruner index 8136b7f28..9022b017f 100755 --- a/nodist/dot_pruner +++ b/nodist/dot_pruner @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/nodist/flexdiff b/nodist/flexdiff index 0c29d4380..963c8fdf8 100755 --- a/nodist/flexdiff +++ b/nodist/flexdiff @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2007-2020 by Wilson Snyder. This package is free software; you @@ -15,6 +15,7 @@ # DESCRIPTION: Diff flex files +use warnings; use IO::File; use strict; diff --git a/nodist/git_untabify b/nodist/git_untabify index debb20ca6..fc355b00b 100755 --- a/nodist/git_untabify +++ b/nodist/git_untabify @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Getopt::Long; #use Data::Dumper; $Data::Dumper::Indent=1; $Data::Dumper::Sortkeys=1; #Debug use IO::File; diff --git a/nodist/install_test b/nodist/install_test index 8c6ac7db2..4b4025219 100755 --- a/nodist/install_test +++ b/nodist/install_test @@ -1,7 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### +use warnings; use Getopt::Long; use Cwd; use IO::File; diff --git a/nodist/invoke_atsim b/nodist/invoke_atsim index b2bfea83c..41490042c 100755 --- a/nodist/invoke_atsim +++ b/nodist/invoke_atsim @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== diff --git a/nodist/invoke_iccr b/nodist/invoke_iccr index 5a007be64..580dc7a72 100755 --- a/nodist/invoke_iccr +++ b/nodist/invoke_iccr @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== diff --git a/nodist/invoke_ncverilog b/nodist/invoke_ncverilog index 8e5a1f2d3..ef2809c71 100755 --- a/nodist/invoke_ncverilog +++ b/nodist/invoke_ncverilog @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== diff --git a/nodist/invoke_vcs b/nodist/invoke_vcs index b53602b99..ceeaf25af 100755 --- a/nodist/invoke_vcs +++ b/nodist/invoke_vcs @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use strict; #====================================================================== diff --git a/nodist/vtree_importer b/nodist/vtree_importer index d7b72a2a0..652c114bd 100755 --- a/nodist/vtree_importer +++ b/nodist/vtree_importer @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/src/astgen b/src/astgen index 84bca8188..863a05621 100644 --- a/src/astgen +++ b/src/astgen @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -#require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/src/bisonpre b/src/bisonpre index cda66747c..b6c1f9322 100755 --- a/src/bisonpre +++ b/src/bisonpre @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/src/config_rev.pl b/src/config_rev.pl index da141daf6..cee6695f0 100755 --- a/src/config_rev.pl +++ b/src/config_rev.pl @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2005-2020 by Wilson Snyder. Verilator is free software; you @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Query's subversion to get version number +use warnings; + my $dir = $ARGV[0]; defined $dir or die "%Error: No directory argument,"; chdir $dir; diff --git a/src/cppcheck_filtered b/src/cppcheck_filtered index b6fbf5f76..6bc699092 100755 --- a/src/cppcheck_filtered +++ b/src/cppcheck_filtered @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/src/flexfix b/src/flexfix index 7fbc5d905..ac916d9a6 100755 --- a/src/flexfix +++ b/src/flexfix @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Edits flex output to get around various broken flex issues. +use warnings; + my $Opt_Prefix = $ARGV[0] or die "%Error: No prefix specified,"; foreach my $line () { diff --git a/src/pod2latexfix b/src/pod2latexfix index 70e577fb1..ce6ecaab5 100755 --- a/src/pod2latexfix +++ b/src/pod2latexfix @@ -1,4 +1,4 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl ###################################################################### # # Copyright 2002-2020 by Wilson Snyder. Verilator is free software; you @@ -12,9 +12,10 @@ # GNU General Public License for more details. # ###################################################################### - # DESCRIPTION: Edits pod2latex output +use warnings; + my $Opt_DistTitle = $ARGV[0] or die "%Error: No disttitle specified,"; my $Opt_DistDate = $ARGV[1] or die "%Error: No distdate specified,"; diff --git a/src/vlcovgen b/src/vlcovgen index aa52b215d..135f80293 100755 --- a/src/vlcovgen +++ b/src/vlcovgen @@ -1,8 +1,8 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### -#require 5.006_001; +use warnings; use Getopt::Long; use IO::File; use Pod::Usage; diff --git a/test_regress/driver.pl b/test_regress/driver.pl index ba52ef469..c65327582 100755 --- a/test_regress/driver.pl +++ b/test_regress/driver.pl @@ -1,10 +1,9 @@ -: # -*-Mode: perl;-*- use perl, wherever it is -eval 'exec perl -wS $0 ${1+"$@"}' - if 0; +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### require 5.006_001; +use warnings; use Cwd; BEGIN { if (!$ENV{VERILATOR_ROOT} && -x "../bin/verilator") { diff --git a/test_regress/t/bootstrap.pl b/test_regress/t/bootstrap.pl index a057f813c..418e56d58 100755 --- a/test_regress/t/bootstrap.pl +++ b/test_regress/t/bootstrap.pl @@ -1,4 +1,4 @@ -#!/usr/bin/perl +#!/usr/bin/env perl # DESCRIPTION: Verilator: Verilog Test driver bootstrapper # # Copyright 2008 by Wilson Snyder. This program is free software; you can diff --git a/test_regress/vgen.pl b/test_regress/vgen.pl index eff31ed45..dd9955f82 100755 --- a/test_regress/vgen.pl +++ b/test_regress/vgen.pl @@ -1,8 +1,10 @@ -#!/usr/bin/perl -w +#!/usr/bin/env perl # See copyright, etc in below POD section. ###################################################################### require 5.006_001; +use warnings; + use Getopt::Long; use IO::File; use Pod::Usage; From 4a307742c4099b2abca25bc4fd57c50b178bd842 Mon Sep 17 00:00:00 2001 From: Philipp Wagner Date: Fri, 10 Jan 2020 01:07:08 +0000 Subject: [PATCH 80/90] Fix typo in help output (#2096) The variable is named VM_PARALLEL_BUILDS, not VM_PARALLEL_BUILD. Signed-off-by: Philipp Wagner --- bin/verilator | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/verilator b/bin/verilator index 922c7b365..b9fd44223 100755 --- a/bin/verilator +++ b/bin/verilator @@ -1076,7 +1076,7 @@ and the remaining files can be compiled on parallel machines. Using design --output-split 20000 resulted in splitting into approximately one-minute-compile chunks. -Typically when using this, make with VM_PARALLEL_BUILD=1, and use +Typically when using this, make with VM_PARALLEL_BUILDS=1, and use I. =item --output-split-cfuncs I From 87d126de49b0d1ca81f0dfb0bf449108d5d1033e Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 20:09:50 -0500 Subject: [PATCH 81/90] Commentary --- Changes | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Changes b/Changes index 47f9a76f1..9fdb86d75 100644 --- a/Changes +++ b/Changes @@ -4,6 +4,8 @@ The contributors that suggested a given feature are shown in []. Thanks! * Verilator 4.025 devel +** Docker images are now available for Verilator releases. + *** Support bounded queues. *** Support implication operator "|->" in assertions, #2069. [Peter Monsson] From ca211c3b111484ebf324e15a76e9ddd8b21ff5ef Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 20:28:33 -0500 Subject: [PATCH 82/90] Commentary - Codacy badge fix. --- README.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.adoc b/README.adoc index 8d1859e21..e6d8ece42 100644 --- a/README.adoc +++ b/README.adoc @@ -4,7 +4,7 @@ ifdef::env-github[] image:https://img.shields.io/badge/License-LGPL%20v3-blue.svg[license LGPLv3,link=https://www.gnu.org/licenses/lgpl-3.0] image:https://img.shields.io/badge/License-Artistic%202.0-0298c3.svg[license Artistic-2.0,link=https://opensource.org/licenses/Artistic-2.0] -image:https://api.codacy.com/project/badge/Grade/ff998fdaa6f64b9a95eb5f342ee6bf4d[Code Quality,link=https://www.codacy.com/manual/wsnyder/verilator] +image:https://api.codacy.com/project/badge/Grade/48478c986f13400682ffe4a5e0939b3a[Code Quality,link=https://www.codacy.com/gh/verilator/verilator] image:https://travis-ci.com/verilator/verilator.svg?branch=master[Build Status (Travis CI),link=https://travis-ci.com/verilator/verilator] endif::[] From 2982336ec272b6e6427b72fa1655e3c199c6d04a Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Thu, 9 Jan 2020 20:29:36 -0500 Subject: [PATCH 83/90] Commentary --- README.adoc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/README.adoc b/README.adoc index e6d8ece42..8d8f17814 100644 --- a/README.adoc +++ b/README.adoc @@ -136,5 +136,5 @@ https://verilator.org/issues[Verilator Issues].) Verilator is free software; you can redistribute it and/or modify it under the terms of either the GNU Lesser General Public License Version 3 or the -Perl Artistic License Version 2.0. (See the documentation for more -details.) +Perl Artistic License Version 2.0. See the documentation for more +details. From 1234c8395331a7047cdd4ec0113f6791fad41db7 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 10 Jan 2020 07:07:21 -0500 Subject: [PATCH 84/90] Fix some C++11 requirements. --- src/V3Options.cpp | 6 +++--- src/V3Os.cpp | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/V3Options.cpp b/src/V3Options.cpp index 75204d050..184d92c5b 100644 --- a/src/V3Options.cpp +++ b/src/V3Options.cpp @@ -1369,10 +1369,10 @@ void V3Options::parseOptsFile(FileLine* fl, const string& filename, bool rel) { // Convert to argv style arg list and parse them std::vector argv; argv.reserve(args.size()+1); - for (const string &arg : args) { - argv.push_back(const_cast(arg.c_str())); + for (std::vector::const_iterator it = args.begin(); it != args.end(); ++it) { + argv.push_back(const_cast(it->c_str())); } - argv.push_back(nullptr); // argv is NULL-terminated + argv.push_back(NULL); // argv is NULL-terminated parseOptsList(fl, optdir, static_cast(argv.size()-1), argv.data()); } diff --git a/src/V3Os.cpp b/src/V3Os.cpp index 581e2b5c6..f5ffefb53 100644 --- a/src/V3Os.cpp +++ b/src/V3Os.cpp @@ -161,7 +161,7 @@ string V3Os::filenameSubstitute(const string& filename) { } string envvar = filename.substr(pos+1, endpos-pos); string envvalue; - if (!envvar.empty()) envvalue = getenvStr(envvar, {}); + if (!envvar.empty()) envvalue = getenvStr(envvar, ""); if (!envvalue.empty()) { out += envvalue; if (brackets==NONE) pos = endpos; From 16bb97687a43a4d6a92fb1957d30d7f6c8451e45 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 10 Jan 2020 18:49:23 -0500 Subject: [PATCH 85/90] Tests: Check for missing newlines at EOF. --- docs/doxygen-mainpage | 2 +- test_regress/t/t_array_unpacked_public.v | 3 +-- test_regress/t/t_dist_whitespace.pl | 12 +++++++++--- test_regress/t/t_inside_wild.v | 2 +- 4 files changed, 12 insertions(+), 7 deletions(-) diff --git a/docs/doxygen-mainpage b/docs/doxygen-mainpage index 877e82960..2d0c282a3 100644 --- a/docs/doxygen-mainpage +++ b/docs/doxygen-mainpage @@ -3,4 +3,4 @@ * \section intro_sec Introduction * * This is a full doxygen analysis of the Verilator source tree. - */ \ No newline at end of file + */ diff --git a/test_regress/t/t_array_unpacked_public.v b/test_regress/t/t_array_unpacked_public.v index 556b85a98..a54ea36e2 100644 --- a/test_regress/t/t_array_unpacked_public.v +++ b/test_regress/t/t_array_unpacked_public.v @@ -17,5 +17,4 @@ endmodule module array_test( input din [0:15] ); - -endmodule \ No newline at end of file +endmodule diff --git a/test_regress/t/t_dist_whitespace.pl b/test_regress/t/t_dist_whitespace.pl index 86d3c9a64..1168b44d9 100755 --- a/test_regress/t/t_dist_whitespace.pl +++ b/test_regress/t/t_dist_whitespace.pl @@ -20,10 +20,16 @@ foreach my $file (sort keys %files) { my $contents = file_contents($filename); if ($file =~ /\.out$/) { # Ignore golden files + next; } elsif ($contents =~ /[\001\002\003\004\005\006]/) { - # Ignore binrary files - } elsif ($contents =~ /[ \t]\n/ - || $contents =~ m/\n\n+$/) { # Regexp repeated below + # Ignore binary files + next; + } + if ($contents !~ /\n$/s && $contents ne "") { + $warns{$file} = "Missing trailing newline in $file"; + } + if ($contents =~ /[ \t]\n/ + || $contents =~ m/\n\n+$/) { # Regexp repeated below my $eol_ws_exempt = ($file =~ /(\.txt|\.html)$/ || $file =~ m!^README$! || $file =~ m!/gtkwave/!); diff --git a/test_regress/t/t_inside_wild.v b/test_regress/t/t_inside_wild.v index d0ed5f3c7..103721c31 100644 --- a/test_regress/t/t_inside_wild.v +++ b/test_regress/t/t_inside_wild.v @@ -80,4 +80,4 @@ module Test (/*AUTOARG*/ out <= in inside {5'b1_1?1?}; end -endmodule // t \ No newline at end of file +endmodule From 8859cbf5bcae9f831945eb9fb230cdc8be497f0d Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 10 Jan 2020 19:12:45 -0500 Subject: [PATCH 86/90] Commentary --- bin/verilator | 16 ++++++++-------- docs/install.adoc | 7 ++++++- 2 files changed, 14 insertions(+), 9 deletions(-) diff --git a/bin/verilator b/bin/verilator index b9fd44223..dd6a572d3 100755 --- a/bin/verilator +++ b/bin/verilator @@ -2112,16 +2112,16 @@ specified, it will come from a default optionally specified at configure time (before Verilator was compiled), or computed from SYSTEMC/lib-SYSTEMC_ARCH. -=item VCS_HOME - -If set, specifies the directory containing the Synopsys VCS distribution. -When set, a 'make test' in the Verilator distribution will also run VCS -baseline regression tests. - =item VERILATOR_BIN -If set, specifies an alternative name of the Verilator binary. May be used -for debugging and selecting between multiple operating system builds. +If set, specifies an alternative name of the C binary. May be +used for debugging and selecting between multiple operating system builds. + +=item VERILATOR_COVERAGE_BIN + +If set, specifies an alternative name of the C. +May be used for debugging and selecting between multiple operating system +builds. =item VERILATOR_GDB diff --git a/docs/install.adoc b/docs/install.adoc index 962ab5f73..fb785878b 100644 --- a/docs/install.adoc +++ b/docs/install.adoc @@ -21,9 +21,14 @@ Git, below, maybe a better alternative.) To install as a package: If this works, skip down to <>. +=== Docker + +Verilator is available in pre-built Docker containers. See +https://github.com/verilator/verilator/blob/master/ci/docker/run/README.adoc + === Git -Alternatively, installing Verilator with Git provides the most flexibility. +Installing Verilator with Git provides the most flexibility. For additional options and details see the additional sections below. In brief: From 2638f9db19850ff97f723f5dbf4e303c531b9c45 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 10 Jan 2020 19:18:27 -0500 Subject: [PATCH 87/90] Error cleanups. --- src/V3Width.cpp | 4 ++-- test_regress/t/t_enum_x_bad.out | 2 +- test_regress/t/t_fuzz_genintf_bad.out | 2 +- test_regress/t/t_fuzz_triand_bad.out | 2 +- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/V3Width.cpp b/src/V3Width.cpp index e41e78893..6186ff2da 100644 --- a/src/V3Width.cpp +++ b/src/V3Width.cpp @@ -1568,7 +1568,7 @@ private: AstConst* constp = VN_CAST(itemp->valuep(), Const); if (constp->num().isFourState() && nodep->dtypep()->basicp() && !nodep->dtypep()->basicp()->isFourstate()) - itemp->v3error("Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19)"); + itemp->v3error("Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2017 6.19)"); num.opAssign(constp->num()); // Look for duplicates if (inits.find(num) != inits.end()) { // IEEE says illegal @@ -1825,7 +1825,7 @@ private: methodCallString(nodep, basicp); } else { - nodep->v3error("Unsupported: Member call on non-enum object '" + nodep->v3error("Unsupported: Member call on object '" <fromp()->prettyTypeName() <<"' which is a '"<fromp()->dtypep()->prettyTypeName()<<"'"); } diff --git a/test_regress/t/t_enum_x_bad.out b/test_regress/t/t_enum_x_bad.out index 6677ff6dc..5fd3bc732 100644 --- a/test_regress/t/t_enum_x_bad.out +++ b/test_regress/t/t_enum_x_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_enum_x_bad.v:8: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2019 6.19) +%Error: t/t_enum_x_bad.v:8: Enum value with X/Zs cannot be assigned to non-fourstate type (IEEE 2017 6.19) : ... In instance t enum bit [1:0] { BADX = 2'b1x } BAD1; ^~~~ diff --git a/test_regress/t/t_fuzz_genintf_bad.out b/test_regress/t/t_fuzz_genintf_bad.out index d8e9eee16..7ba1095b9 100644 --- a/test_regress/t/t_fuzz_genintf_bad.out +++ b/test_regress/t/t_fuzz_genintf_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_fuzz_genintf_bad.v:23: Unsupported: Member call on non-enum object 'VARREF 'j'' which is a 'BASICDTYPE 'integer'' +%Error: t/t_fuzz_genintf_bad.v:23: Unsupported: Member call on object 'VARREF 'j'' which is a 'BASICDTYPE 'integer'' : ... In instance t j.e(0), ^ diff --git a/test_regress/t/t_fuzz_triand_bad.out b/test_regress/t/t_fuzz_triand_bad.out index aba49b72e..a881e799f 100644 --- a/test_regress/t/t_fuzz_triand_bad.out +++ b/test_regress/t/t_fuzz_triand_bad.out @@ -1,4 +1,4 @@ -%Error: t/t_fuzz_triand_bad.v:7: Unsupported: Member call on non-enum object 'VARREF 'g'' which is a 'BASICDTYPE 'logic'' +%Error: t/t_fuzz_triand_bad.v:7: Unsupported: Member call on object 'VARREF 'g'' which is a 'BASICDTYPE 'logic'' : ... In instance t tri g=g.and.g; ^~~ From 5f9ceb99a71c5e3cdfedb0099e122445c86120a6 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Fri, 10 Jan 2020 21:37:53 -0500 Subject: [PATCH 88/90] Cleanup spacing. --- src/V3ProtectLib.cpp | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/V3ProtectLib.cpp b/src/V3ProtectLib.cpp index 7e4afee3b..836a41661 100644 --- a/src/V3ProtectLib.cpp +++ b/src/V3ProtectLib.cpp @@ -144,10 +144,10 @@ class ProtectVisitor : public AstNVisitor { // DPI declarations hashComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_check_hash (int protectlib_hash__V);\n\n"); + m_libName+"_protectlib_check_hash(int protectlib_hash__V);\n\n"); initialComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function chandle "+ - m_libName+"_protectlib_create (string scope__V);\n\n"); + m_libName+"_protectlib_create(string scope__V);\n\n"); comboComment(txtp, fl); m_comboPortsp = new AstTextBlock(fl, "import \"DPI-C\" function longint "+ m_libName+"_protectlib_combo_update " @@ -157,21 +157,21 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, ");\n\n"); seqComment(txtp, fl); m_seqPortsp = new AstTextBlock(fl, "import \"DPI-C\" function longint "+ - m_libName+"_protectlib_seq_update " + m_libName+"_protectlib_seq_update" "(\n", false, true); m_seqPortsp->addText(fl, "chandle handle__V\n"); txtp->addNodep(m_seqPortsp); txtp->addText(fl, ");\n\n"); comboIgnoreComment(txtp, fl); m_comboIgnorePortsp = new AstTextBlock(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_combo_ignore " + m_libName+"_protectlib_combo_ignore" "(\n", false, true); m_comboIgnorePortsp->addText(fl, "chandle handle__V\n"); txtp->addNodep(m_comboIgnorePortsp); txtp->addText(fl, ");\n\n"); finalComment(txtp, fl); txtp->addText(fl, "import \"DPI-C\" function void "+ - m_libName+"_protectlib_final (chandle handle__V);\n\n"); + m_libName+"_protectlib_final(chandle handle__V);\n\n"); // Local variables txtp->addText(fl, "chandle handle__V;\n\n"); @@ -187,7 +187,7 @@ class ProtectVisitor : public AstNVisitor { // CPP hash value addComment(txtp, fl, "Hash value to make sure this file and the corresponding"); addComment(txtp, fl, "library agree"); - m_hashValuep = new AstTextBlock(fl, "localparam int protectlib_hash__V =\n"); + m_hashValuep = new AstTextBlock(fl, "localparam int protectlib_hash__V = "); txtp->addNodep(m_hashValuep); txtp->addText(fl, "\n"); @@ -278,8 +278,8 @@ class ProtectVisitor : public AstNVisitor { // Hash check hashComment(txtp, fl); txtp->addText(fl, "void "+m_libName+"_protectlib_check_hash" - " (int protectlib_hash__V) {\n"); - m_cHashValuep = new AstTextBlock(fl, "int expected_hash__V =\n"); + "(int protectlib_hash__V) {\n"); + m_cHashValuep = new AstTextBlock(fl, "int expected_hash__V = "); txtp->addNodep(m_cHashValuep); txtp->addText(fl, "if (protectlib_hash__V != expected_hash__V) {\n"); txtp->addText(fl, "fprintf(stderr, \"%%Error: cannot use "+m_libName+" library, " @@ -300,7 +300,7 @@ class ProtectVisitor : public AstNVisitor { // Updates comboComment(txtp, fl); - m_cComboParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_combo_update (\n", + m_cComboParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_combo_update(\n", false, true); m_cComboParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cComboParamsp); @@ -314,7 +314,7 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, "}\n\n"); seqComment(txtp, fl); - m_cSeqParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_seq_update (\n", + m_cSeqParamsp = new AstTextBlock(fl, "long long "+m_libName+"_protectlib_seq_update(\n", false, true); m_cSeqParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cSeqParamsp); @@ -328,7 +328,7 @@ class ProtectVisitor : public AstNVisitor { txtp->addText(fl, "}\n\n"); comboIgnoreComment(txtp, fl); - m_cIgnoreParamsp = new AstTextBlock(fl, "void "+m_libName+"_protectlib_combo_ignore (\n", + m_cIgnoreParamsp = new AstTextBlock(fl, "void "+m_libName+"_protectlib_combo_ignore(\n", false, true); m_cIgnoreParamsp->addText(fl, "void* vhandlep__V\n"); txtp->addNodep(m_cIgnoreParamsp); @@ -337,7 +337,7 @@ class ProtectVisitor : public AstNVisitor { // Final finalComment(txtp, fl); - txtp->addText(fl, "void "+m_libName+"_protectlib_final (void* vhandlep__V) {\n"); + txtp->addText(fl, "void "+m_libName+"_protectlib_final(void* vhandlep__V) {\n"); castPtr(fl, txtp); txtp->addText(fl, "handlep__V->final();\n"); txtp->addText(fl, "delete handlep__V;\n"); From f66dacd185d4e28ece714270264541276a5e6afc Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 11 Jan 2020 06:53:52 -0500 Subject: [PATCH 89/90] Remove some make clean files. --- Makefile.in | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Makefile.in b/Makefile.in index e23932eaa..d0ffe3c93 100644 --- a/Makefile.in +++ b/Makefile.in @@ -103,7 +103,7 @@ PACKAGE_VERSION = @PACKAGE_VERSION@ SHELL = /bin/sh -SUBDIRS = src test_regress \ +SUBDIRS = docs src test_regress \ examples/cmake_hello_c \ examples/cmake_hello_sc \ examples/cmake_tracing_c \ @@ -114,6 +114,7 @@ SUBDIRS = src test_regress \ examples/make_tracing_c \ examples/make_tracing_sc \ examples/make_protect_lib \ + examples/xml_py \ INFOS = verilator.txt verilator.html verilator.pdf @@ -513,6 +514,7 @@ clean mostlyclean distclean maintainer-clean:: rm -f *.tex rm -rf examples/*/obj_dir* examples/*/logs rm -rf test_*/obj_dir + rm -rf nodist/fuzzer/dictionary rm -rf nodist/obj_dir distclean maintainer-clean:: From 0c99bee4b1976a8c73ebb3748e5bbdfb4438f3df Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 11 Jan 2020 06:54:36 -0500 Subject: [PATCH 90/90] Version bump --- Changes | 2 +- configure.ac | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Changes b/Changes index 9fdb86d75..186296379 100644 --- a/Changes +++ b/Changes @@ -2,7 +2,7 @@ Revision history for Verilator The contributors that suggested a given feature are shown in []. Thanks! -* Verilator 4.025 devel +* Verilator 4.026 2020-01-11 ** Docker images are now available for Verilator releases. diff --git a/configure.ac b/configure.ac index 8d9a192f7..a7164d958 100644 --- a/configure.ac +++ b/configure.ac @@ -6,7 +6,7 @@ #AC_INIT([Verilator],[#.### YYYY-MM-DD]) #AC_INIT([Verilator],[#.### devel]) -AC_INIT([Verilator],[4.025 devel], +AC_INIT([Verilator],[4.026 2020-01-11], [https://verilator.org], [verilator],[https://verilator.org]) # When releasing, also update header of Changes file