From 08e650a2b46e49d601392b1f7d9f45e027187992 Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Thu, 11 Oct 2018 21:00:29 -0400
Subject: [PATCH] Commentary

---
 src/verilog.y | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/verilog.y b/src/verilog.y
index 31dd8f000..4a79cc2eb 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -302,8 +302,8 @@ class AstSenTree;
 %token<fl>		yALWAYS_LATCH	"always_latch"
 %token<fl>		yAND		"and"
 %token<fl>		yASSERT		"assert"
-%token<fl>		yASSUME		"assume"
 %token<fl>		yASSIGN		"assign"
+%token<fl>		yASSUME		"assume"
 %token<fl>		yAUTOMATIC	"automatic"
 %token<fl>		yBEGIN		"begin"
 %token<fl>		yBIND		"bind"