From 087dae2a5d63a32db05190c0337c11a16586d8ff Mon Sep 17 00:00:00 2001
From: Wilson Snyder <wsnyder@wsnyder.org>
Date: Fri, 27 Mar 2026 21:41:52 -0400
Subject: [PATCH] Commentary: Changes update

---
 Changes                                  |  7 +++++-
 docs/spelling.txt                        |  1 +
 test_regress/t/t_flag_csplit_pch.v       | 27 +++++++++++++-----------
 test_regress/t/t_static_init_pkg_order.v |  4 ++--
 4 files changed, 24 insertions(+), 15 deletions(-)

diff --git a/Changes b/Changes
index b3220d4ca..acf90fded 100644
--- a/Changes
+++ b/Changes
@@ -42,6 +42,7 @@ Verilator 5.047 devel
 * Support `##` delay on implication RHS in SVA properties (#7284). [Yilou Wang]
 * Support boolean and/or in sequence expressions (#7285). [Yilou Wang]
 * Support property-local variables and sequence match items (#7286). [Yilou Wang]
+* Support SVA goto repetition `[->N]` in concurrent assertions (#7310). [Yilou Wang]
 * Support `##[M:N]` range cycle delay in SVA sequences (#7312). [Yilou Wang]
 * Support array map() method (#7307) (#7316). [Wei-Lun Chiu]
 * Add VPI callback support to --main (#7145).
@@ -58,9 +59,11 @@ Verilator 5.047 devel
 * Optimize function call return value temporaries (#7152). [Geza Lore, Testorrent USA, Inc.]
 * Optimize conditional merging across some impure statements (#7159). [Geza Lore, Testorrent USA, Inc.]
 * Optimize reuse of existing associative terms in DfgPeephole. [Geza Lore, Testorrent USA, Inc.]
-* Optimize duplicate vertices in DfgPeephole (#7305). [Geza Lore, Testorrent USA, Inc.]
+* Optimize duplicate vertices and multiplexers in DfgPeephole (#7305). [Geza Lore, Testorrent USA, Inc.]
 * Optimize commutative vertex operands in DFG for better combining. [Geza Lore, Testorrent USA, Inc.]
 * Optimize DFG peephole until a fixed point (#7309). [Geza Lore, Testorrent USA, Inc.]
+* Optimize comparisons with identical operands and $countones in DFG. [Geza Lore, Testorrent USA, Inc.]
+* Optimize more patterns in DfgPeephole (#7332). [Geza Lore, Testorrent USA, Inc.]
 * Fix recursive default assignment for sub-arrays (#4589) (#7202). [Julian Carrier]
 * Fix shift width mismatch in constraint solver SMT emission (#5420) (#7265). [Yilou Wang]
 * Fix randomize size+element queue constraints (#5582) (#7225). [Rahul Behl, Testorrent USA, Inc.]
@@ -102,6 +105,8 @@ Verilator 5.047 devel
 * Fix linking shared library with its dependencies (#7320). [Artur Bieniek, Antmicro Ltd.]
 * Fix modport selection of virtual interface handle (#7321). [Yilou Wang]
 * Fix false ASSIGNIN on interface input ports driven from outside (#7322). [Yilou Wang]
+* Fix static initialization order for packages with class hierarchies (#7324). [Yilou Wang]
+* Fix `disable iff` imply-delay statement linking (#7337). [Nick Brereton]
 
 
 Verilator 5.046 2026-02-28
diff --git a/docs/spelling.txt b/docs/spelling.txt
index 5b6862949..7e86ffdad 100644
--- a/docs/spelling.txt
+++ b/docs/spelling.txt
@@ -834,6 +834,7 @@ glibc
 gmake
 gmon
 gotFinish
+goto
 gprof
 gtkwave
 hdr
diff --git a/test_regress/t/t_flag_csplit_pch.v b/test_regress/t/t_flag_csplit_pch.v
index d7dbc9eee..619eed3c8 100644
--- a/test_regress/t/t_flag_csplit_pch.v
+++ b/test_regress/t/t_flag_csplit_pch.v
@@ -4,17 +4,20 @@
 // SPDX-FileCopyrightText: 2026 Eunseo Song
 // SPDX-License-Identifier: CC0-1.0
 
-module top(input clk, input rst, output reg [7:0] count);
-   always @(posedge clk) begin
-      if (rst)
-        count <= 0;
-      else
-        count <= count + 1;
-   end
+module top (
+    input clk,
+    input rst,
+    output reg [7:0] count
+);
 
-   initial begin
-      $display("Hello from t_flag_csplit_pch");
-      $write("*-* All Coverage-Coverage = 1\n");
-      $finish;
-   end
+  always @(posedge clk) begin
+    if (rst) count <= 0;
+    else count <= count + 1;
+  end
+
+  initial begin
+    $display("Hello from t_flag_csplit_pch");
+    $write("*-* All Coverage-Coverage = 1\n");
+    $finish;
+  end
 endmodule
diff --git a/test_regress/t/t_static_init_pkg_order.v b/test_regress/t/t_static_init_pkg_order.v
index a45bf0c41..d98d2dd07 100644
--- a/test_regress/t/t_static_init_pkg_order.v
+++ b/test_regress/t/t_static_init_pkg_order.v
@@ -15,8 +15,8 @@
 package pkg_a;
   typedef enum int {
     STATE_UNINIT = 0,
-    STATE_INIT   = 1,
-    STATE_DONE   = 2
+    STATE_INIT = 1,
+    STATE_DONE = 2
   } state_e;
 
   state_e g_state = STATE_UNINIT;