From 0703159dbc0116e3c994d294db29095b1ca44c8a Mon Sep 17 00:00:00 2001
From: github action <action@example.com>
Date: Thu, 20 Nov 2025 11:39:49 +0000
Subject: [PATCH] Apply 'make format'

---
 src/V3LinkCells.cpp                | 7 +++----
 test_regress/t/t_config_default.py | 3 ++-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/V3LinkCells.cpp b/src/V3LinkCells.cpp
index b0a5f78fe..9e42b80c4 100644
--- a/src/V3LinkCells.cpp
+++ b/src/V3LinkCells.cpp
@@ -125,8 +125,7 @@ class LinkConfigsVisitor final : public VNVisitor {
     }
     void visit(AstConfigRule* nodep) override {
         if (!nodep->cellp()) {
-            for (AstNode* usep = nodep->usep(); usep;
-                usep = usep->nextp()) {
+            for (AstNode* usep = nodep->usep(); usep; usep = usep->nextp()) {
                 m_state.m_liblist.push_back(usep->name());
             }
         } else {
@@ -210,8 +209,8 @@ class LinkCellsVisitor final : public VNVisitor {
         // First search IEEE config library list
         AstNodeModule* foundp;
         for (auto const& l : m_state.m_liblist) {
-                foundp = findModuleLibSym(modName, l);
-                if (foundp) return foundp;
+            foundp = findModuleLibSym(modName, l);
+            if (foundp) return foundp;
         }
         // Then search local library
         foundp = findModuleLibSym(modName, libname);
diff --git a/test_regress/t/t_config_default.py b/test_regress/t/t_config_default.py
index 6416f2853..628079b8b 100755
--- a/test_regress/t/t_config_default.py
+++ b/test_regress/t/t_config_default.py
@@ -12,7 +12,8 @@ import vltest_bootstrap
 test.scenarios('simulator')
 
 test.compile(verilator_flags2=[
-    '--binary', '--top cfg1', '--work liba', 't/t_config_work__liba.v', '--work libb', 't/t_config_work__libb.v'
+    '--binary', '--top cfg1', '--work liba', 't/t_config_work__liba.v', '--work libb',
+    't/t_config_work__libb.v'
 ])
 
 test.execute()