From 06c7d8ce3b26a3707325460de4147b2b65b4f1a4 Mon Sep 17 00:00:00 2001 From: Wilson Snyder Date: Sat, 27 Oct 2018 10:03:28 -0400 Subject: [PATCH] Internals: Fix whitespace issues. No functional change, use -b to diff --- nodist/flexdiff | 12 ++--- src/V3EmitCInlines.cpp | 13 ++--- src/V3Parse.h | 6 +-- src/V3ParseGrammar.cpp | 3 +- src/VlcTop.h | 10 ++-- test_regress/t/TestVpi.h | 2 +- test_regress/t/t_array_pattern_packed.v | 2 +- test_regress/t/t_assert_question.v | 2 +- test_regress/t/t_crazy_sel.v | 2 +- test_regress/t/t_dist_cinclude.pl | 42 ++++++++-------- test_regress/t/t_dist_portability.pl | 54 ++++++++++----------- test_regress/t/t_dist_whitespace.pl | 20 ++++---- test_regress/t/t_dpi_exp_bad.v | 2 +- test_regress/t/t_dpi_qw_c.cpp | 2 +- test_regress/t/t_dpi_string.v | 2 +- test_regress/t/t_enum_public.cpp | 2 +- test_regress/t/t_extend_class_c.h | 2 +- test_regress/t/t_final.v | 2 +- test_regress/t/t_flag_csplit.pl | 26 +++++----- test_regress/t/t_func_const_bad.v | 2 +- test_regress/t/t_func_types.v | 2 +- test_regress/t/t_func_wide_out_bad.v | 2 +- test_regress/t/t_gen_var_bad.v | 2 +- test_regress/t/t_hierarchy_unnamed.v | 2 +- test_regress/t/t_inst_misarray_bad.v | 2 +- test_regress/t/t_interface_mismodport_bad.v | 2 +- test_regress/t/t_langext_3.v | 2 +- test_regress/t/t_lint_latch_bad.v | 2 +- test_regress/t/t_lint_multidriven_bad.v | 2 +- test_regress/t/t_lint_unused.v | 2 +- test_regress/t/t_mem_slot.v | 2 +- test_regress/t/t_order_a.v | 5 +- test_regress/t/t_package_enum.v | 2 +- test_regress/t/t_package_verb.v | 2 +- test_regress/t/t_param_ddeep_width.v | 2 +- test_regress/t/t_param_package.v | 2 +- test_regress/t/t_param_public.cpp | 2 +- test_regress/t/t_pp_display.v | 2 +- test_regress/t/t_preproc.pl | 40 +++++++-------- test_regress/t/t_select_bad_range.v | 2 +- test_regress/t/t_select_bad_range3.v | 3 +- test_regress/t/t_select_little_pack.v | 2 +- test_regress/t/t_struct_nest.v | 38 +++++++-------- test_regress/t/t_struct_unpacked.v | 2 +- test_regress/t/t_struct_unpacked_bad.v | 2 +- test_regress/t/t_tri_inout2.v | 2 +- test_regress/t/t_tri_select.v | 2 +- test_regress/t/t_tri_select_unsized.v | 2 +- test_regress/t/t_var_bad_hide.v | 2 +- test_regress/t/t_var_in_assign_bad.v | 2 +- test_regress/t/t_var_notfound_bad.v | 2 +- test_regress/t/t_var_set_link.v | 2 +- test_regress/t/t_vlt_warn.v | 2 +- 53 files changed, 178 insertions(+), 174 deletions(-) diff --git a/nodist/flexdiff b/nodist/flexdiff index 58578f7f8..2e6d6c02f 100755 --- a/nodist/flexdiff +++ b/nodist/flexdiff @@ -47,12 +47,12 @@ sub prep { my @lines; while (defined(my $line = $fh->getline)) { - # Productions - #$line =~ s/[ \t]{[^}]*?}/\t{}/g; - $line =~ s/StashPrefix;//g; - $line =~ s/VALTEXT;//g; - $line =~ s/CALLBACK\([^)]*\);//g; - push @lines, $line; + # Productions + #$line =~ s/[ \t]{[^}]*?}/\t{}/g; + $line =~ s/StashPrefix;//g; + $line =~ s/VALTEXT;//g; + $line =~ s/CALLBACK\([^)]*\);//g; + push @lines, $line; } #@lines = sort @lines; diff --git a/src/V3EmitCInlines.cpp b/src/V3EmitCInlines.cpp index 231a78873..8ca95801f 100644 --- a/src/V3EmitCInlines.cpp +++ b/src/V3EmitCInlines.cpp @@ -41,9 +41,10 @@ class EmitCInlines : EmitCBaseVisitor { // VISITORS virtual void visit(AstBasicDType* nodep) { - if (nodep->keyword() == AstBasicDTypeKwd::STRING) { - v3Global.needHeavy(true); // #include via verilated_heavy.h when we create symbol file - } + if (nodep->keyword() == AstBasicDTypeKwd::STRING) { + // Request #include via verilated_heavy.h when we create symbol file + v3Global.needHeavy(true); + } } // NOPs @@ -57,9 +58,9 @@ class EmitCInlines : EmitCBaseVisitor { public: explicit EmitCInlines(AstNetlist* nodep) { iterate(nodep); - if (v3Global.needHInlines()) { - emitInt(); - } + if (v3Global.needHInlines()) { + emitInt(); + } } }; diff --git a/src/V3Parse.h b/src/V3Parse.h index edbf2fac0..236bb0c84 100644 --- a/src/V3Parse.h +++ b/src/V3Parse.h @@ -36,7 +36,7 @@ class V3ParseSym; class V3Parse { private: - V3ParseImp* m_impp; + V3ParseImp* m_impp; // CONSTRUCTORS VL_UNCOPYABLE(V3Parse); @@ -48,10 +48,10 @@ public: // METHODS // Preprocess and read the Verilog file specified into the netlist database void parseFile(FileLine* fileline, const string& modname, bool inLibrary, - const string& errmsg); + const string& errmsg); // Push preprocessed text to the lexer static void ppPushText(V3ParseImp* impp, const string& text); }; -#endif // Guard +#endif // Guard diff --git a/src/V3ParseGrammar.cpp b/src/V3ParseGrammar.cpp index c6648cf67..ae1eaf5bc 100644 --- a/src/V3ParseGrammar.cpp +++ b/src/V3ParseGrammar.cpp @@ -18,7 +18,8 @@ // //************************************************************************* -#include "V3Ast.h" // This must be before V3ParseBison.cpp, as we don't want #defines to conflict + +#include "V3Ast.h" // This must be before V3ParseBison.cpp, as we don't want #defines to conflict //====================================================================== // The guts came from bison diff --git a/src/VlcTop.h b/src/VlcTop.h index 2d6c262ed..cf3c23876 100644 --- a/src/VlcTop.h +++ b/src/VlcTop.h @@ -35,12 +35,12 @@ class VlcTop { public: // PUBLIC MEMBERS - VlcOptions opt; //< Runtime options + VlcOptions opt; //< Runtime options private: // MEMBERS - VlcTests m_tests; //< List of all tests (all coverage files) - VlcPoints m_points; //< List of all points - VlcSources m_sources; //< List of all source files to annotate + VlcTests m_tests; //< List of all tests (all coverage files) + VlcPoints m_points; //< List of all points + VlcSources m_sources; //< List of all source files to annotate // METHODS void createDir(const string& dirname); @@ -68,4 +68,4 @@ public: //###################################################################### -#endif // guard +#endif // guard diff --git a/test_regress/t/TestVpi.h b/test_regress/t/TestVpi.h index f9dd2ac7d..9031854a0 100644 --- a/test_regress/t/TestVpi.h +++ b/test_regress/t/TestVpi.h @@ -28,7 +28,7 @@ public: operator vpiHandle() const { return m_handle; } inline TestVpiHandle& operator= (vpiHandle h) { m_handle = h; return *this; } TestVpiHandle& nofree() { - m_free = false; + m_free = false; return *this; } }; diff --git a/test_regress/t/t_array_pattern_packed.v b/test_regress/t/t_array_pattern_packed.v index 9171e2648..768f64d46 100644 --- a/test_regress/t/t_array_pattern_packed.v +++ b/test_regress/t/t_array_pattern_packed.v @@ -12,7 +12,7 @@ module t (/*AUTOARG*/ logic [1:0] [3:0] [3:0] array_simp; // big endian array - logic [3:0] array_oned; + logic [3:0] array_oned; initial begin array_oned = '{2:1'b1, 0:1'b1, default:1'b0}; diff --git a/test_regress/t/t_assert_question.v b/test_regress/t/t_assert_question.v index abd4efa9c..c72584535 100644 --- a/test_regress/t/t_assert_question.v +++ b/test_regress/t/t_assert_question.v @@ -13,7 +13,7 @@ module t (/*AUTOARG*/ input clk; input bit [3:0] sel; input bit [3:0] a; - input bit c; + input bit c; output bit dout; localparam logic DC = 1'b?; diff --git a/test_regress/t/t_crazy_sel.v b/test_regress/t/t_crazy_sel.v index 027d9884d..985978c31 100644 --- a/test_regress/t/t_crazy_sel.v +++ b/test_regress/t/t_crazy_sel.v @@ -16,7 +16,7 @@ module t (/*AUTOARG*/); genvar the_genvar; generate for (the_genvar = 0; the_genvar < 4; the_genvar++) begin: foo_loop - foo foo_inst(); + foo foo_inst(); end endgenerate diff --git a/test_regress/t/t_dist_cinclude.pl b/test_regress/t/t_dist_cinclude.pl index da8063a75..5f7600264 100755 --- a/test_regress/t/t_dist_cinclude.pl +++ b/test_regress/t/t_dist_cinclude.pl @@ -26,27 +26,27 @@ if (!-r "$root/.git") { foreach my $line (split /\n/, $grep) { next if $line =~ m!include/vltstd/vpi_user.h!; # IEEE Standard file - can't change it next if $line =~ m!include/gtkwave/!; # Standard file - can't change it - my $hit; - $hit = 1 if $line =~ /\bassert\.h/; - $hit = 1 if $line =~ /\bctype\.h/; - $hit = 1 if $line =~ /\berrno\.h/; - $hit = 1 if $line =~ /\bfloat\.h/; - $hit = 1 if $line =~ /\blimits\.h/; - $hit = 1 if $line =~ /\blocale\.h/; - $hit = 1 if $line =~ /\bmath\.h/; - $hit = 1 if $line =~ /\bsetjmp\.h/; - $hit = 1 if $line =~ /\bsignal\.h/; - $hit = 1 if $line =~ /\bstdarg\.h/; - $hit = 1 if $line =~ /\bstdbool\.h/; - $hit = 1 if $line =~ /\bstddef\.h/; - #Not yet: $hit = 1 if $line =~ /\bstdint\.h/; - $hit = 1 if $line =~ /\bstdio\.h/; - $hit = 1 if $line =~ /\bstdlib\.h/; - $hit = 1 if $line =~ /\bstring\.h/; - $hit = 1 if $line =~ /\btime\.h/ && $line !~ m!sys/time.h!; - next if !$hit; - print "$line\n"; - $names{$1} = 1 if $line =~ /^([^:]+)/; + my $hit; + $hit = 1 if $line =~ /\bassert\.h/; + $hit = 1 if $line =~ /\bctype\.h/; + $hit = 1 if $line =~ /\berrno\.h/; + $hit = 1 if $line =~ /\bfloat\.h/; + $hit = 1 if $line =~ /\blimits\.h/; + $hit = 1 if $line =~ /\blocale\.h/; + $hit = 1 if $line =~ /\bmath\.h/; + $hit = 1 if $line =~ /\bsetjmp\.h/; + $hit = 1 if $line =~ /\bsignal\.h/; + $hit = 1 if $line =~ /\bstdarg\.h/; + $hit = 1 if $line =~ /\bstdbool\.h/; + $hit = 1 if $line =~ /\bstddef\.h/; + #Not yet: $hit = 1 if $line =~ /\bstdint\.h/; + $hit = 1 if $line =~ /\bstdio\.h/; + $hit = 1 if $line =~ /\bstdlib\.h/; + $hit = 1 if $line =~ /\bstring\.h/; + $hit = 1 if $line =~ /\btime\.h/ && $line !~ m!sys/time.h!; + next if !$hit; + print "$line\n"; + $names{$1} = 1 if $line =~ /^([^:]+)/; } if (keys %names) { diff --git a/test_regress/t/t_dist_portability.pl b/test_regress/t/t_dist_portability.pl index 036925c5e..a4cb14859 100755 --- a/test_regress/t/t_dist_portability.pl +++ b/test_regress/t/t_dist_portability.pl @@ -35,15 +35,15 @@ sub uint { my $grep = `$cmd`; my %names; foreach my $line (split /\n/, $grep) { - $line =~ s!//.*$!!; - next if $line !~ /uint\d+_t\b/; - next if $line =~ /vl[su]int\d+_t/; - next if $line =~ /typedef/; - next if $line =~ m!include/svdpi.h!; # Not ours - if ($line =~ /^([^:]+)/) { - $names{$1} = 1; - print "$line\n"; - } + $line =~ s!//.*$!!; + next if $line !~ /uint\d+_t\b/; + next if $line =~ /vl[su]int\d+_t/; + next if $line =~ /typedef/; + next if $line =~ m!include/svdpi.h!; # Not ours + if ($line =~ /^([^:]+)/) { + $names{$1} = 1; + print "$line\n"; + } } if (keys %names) { error("Files with uint32*_t instead of vluint32s: ",join(' ',sort keys %names)); @@ -57,14 +57,14 @@ sub printfll { my $grep = `$cmd`; my %names; foreach my $line (split /\n/, $grep) { - next if $line !~ /%[a-z0-9]*ll/; - next if $line !~ /\blong\S+long\b/; # Assume a cast - print "$line\n"; - if ($line =~ /^([^:]+)/) { - $names{$1} = 1; - } else { - $names{UNKNOWN} = 1; - } + next if $line !~ /%[a-z0-9]*ll/; + next if $line !~ /\blong\S+long\b/; # Assume a cast + print "$line\n"; + if ($line =~ /^([^:]+)/) { + $names{$1} = 1; + } else { + $names{UNKNOWN} = 1; + } } if (keys %names) { error("Files with %ll instead of VL_PRI64: ",join(' ',sort keys %names)); @@ -78,11 +78,11 @@ sub cstr { my $grep = `$cmd`; my %names; foreach my $line (split /\n/, $grep) { - if ($line =~ /^([^:]+).*\(\)[a-z0-9_().->]*[.->]+(c_str|r?begin|r?end)\(\)/) { - next if $line =~ /lintok-begin-on-ref/; - print "$line\n"; - $names{$1} = 1; - } + if ($line =~ /^([^:]+).*\(\)[a-z0-9_().->]*[.->]+(c_str|r?begin|r?end)\(\)/) { + next if $line =~ /lintok-begin-on-ref/; + print "$line\n"; + $names{$1} = 1; + } } if (keys %names) { error("Files with potential c_str() lifetime issue: ",join(' ',sort keys %names)); @@ -97,11 +97,11 @@ sub vsnprintf { my $grep = `$cmd`; my %names; foreach my $line (split /\n/, $grep) { - if ($line =~ /\b(snprintf|vsnprintf)\b/) { - next if $line =~ /# *define\s*VL_V?SNPRINTF/; - print "$line\n"; - $names{$1} = 1; - } + if ($line =~ /\b(snprintf|vsnprintf)\b/) { + next if $line =~ /# *define\s*VL_V?SNPRINTF/; + print "$line\n"; + $names{$1} = 1; + } } if (keys %names) { error("Files with vsnprintf, use VL_VSNPRINTF: ",join(' ',sort keys %names)); diff --git a/test_regress/t/t_dist_whitespace.pl b/test_regress/t/t_dist_whitespace.pl index 35a72b280..2999b871f 100755 --- a/test_regress/t/t_dist_whitespace.pl +++ b/test_regress/t/t_dist_whitespace.pl @@ -19,16 +19,16 @@ foreach my $file (sort keys %files) { my $filename = "$root/$file"; my $contents = file_contents($filename); if ($file =~ /\.out$/) { - # Ignore golden files + # Ignore golden files } elsif ($contents =~ /[\001\002\003\004\005\006]/) { - # Ignore binrary files + # Ignore binrary files } elsif ($contents =~ /[ \t]\n/) { - if ($ENV{HARNESS_UPDATE_GOLDEN}) { - $contents =~ s/[ \t]+\n/\n/g; - $warns{$file} = "Updated whitespace at $file"; - write_wholefile($filename, $contents); - next; - } + if ($ENV{HARNESS_UPDATE_GOLDEN}) { + $contents =~ s/[ \t]+\n/\n/g; + $warns{$file} = "Updated whitespace at $file"; + write_wholefile($filename, $contents); + next; + } my @lines = split(/\n/, $contents); my $line_no = 0; foreach my $line (@lines) { @@ -70,8 +70,8 @@ sub get_manifest_files { print "MF $manifest_files\n" if $Self->{verbose}; my %files; foreach my $file (split /\s+/,$manifest_files) { - next if $file eq ''; - $files{$file} |= 1; + next if $file eq ''; + $files{$file} |= 1; } return \%files; } diff --git a/test_regress/t/t_dpi_exp_bad.v b/test_regress/t/t_dpi_exp_bad.v index f051e1ecb..765905991 100644 --- a/test_regress/t/t_dpi_exp_bad.v +++ b/test_regress/t/t_dpi_exp_bad.v @@ -8,6 +8,6 @@ module t; export "DPI-C" function dpix_f_bit48; - function bit [47:0] dpix_f_bit48 (bit [47:0] i); dpix_f_bit48 = ~i; endfunction + function bit [47:0] dpix_f_bit48(bit [47:0] i); dpix_f_bit48 = ~i; endfunction endmodule diff --git a/test_regress/t/t_dpi_qw_c.cpp b/test_regress/t/t_dpi_qw_c.cpp index 512b35428..9f1a5f893 100644 --- a/test_regress/t/t_dpi_qw_c.cpp +++ b/test_regress/t/t_dpi_qw_c.cpp @@ -26,7 +26,7 @@ void poke_value(int i) { static int didDump = 0; if (didDump++ == 0) { # ifdef TEST_VERBOSE - Verilated::scopesDump(); + Verilated::scopesDump(); # endif } #endif diff --git a/test_regress/t/t_dpi_string.v b/test_regress/t/t_dpi_string.v index 26b731253..c1387545a 100644 --- a/test_regress/t/t_dpi_string.v +++ b/test_regress/t/t_dpi_string.v @@ -11,7 +11,7 @@ module t (); generate begin : DSM - string SOME_STRING; + string SOME_STRING; end endgenerate diff --git a/test_regress/t/t_enum_public.cpp b/test_regress/t/t_enum_public.cpp index 0e0f8434d..84c996848 100644 --- a/test_regress/t/t_enum_public.cpp +++ b/test_regress/t/t_enum_public.cpp @@ -21,6 +21,6 @@ int main(int argc, char *argv[]) { if (Vt_enum_public_p62::ZERO == Vt_enum_public_p62::ALLONE) {} for (int i = 0; i < 10; i++) { - topp->eval(); + topp->eval(); } } diff --git a/test_regress/t/t_extend_class_c.h b/test_regress/t/t_extend_class_c.h index 99cbae11a..f98831edd 100644 --- a/test_regress/t/t_extend_class_c.h +++ b/test_regress/t/t_extend_class_c.h @@ -13,6 +13,6 @@ public: // METHODS // This function will be called from a instance created in Verilog inline vluint32_t my_math(vluint32_t in) { - return in+1; + return in+1; } }; diff --git a/test_regress/t/t_final.v b/test_regress/t/t_final.v index f8da60810..b66c49ed1 100644 --- a/test_regress/t/t_final.v +++ b/test_regress/t/t_final.v @@ -17,7 +17,7 @@ endmodule module t (); generate for (genvar i = 0; i < 100; i = i + 1) begin : module_set - submodule u_submodule (); + submodule u_submodule(); end endgenerate initial begin diff --git a/test_regress/t/t_flag_csplit.pl b/test_regress/t/t_flag_csplit.pl index 334edeb17..ee4a145aa 100755 --- a/test_regress/t/t_flag_csplit.pl +++ b/test_regress/t/t_flag_csplit.pl @@ -35,19 +35,19 @@ sub check { my $fh = IO::File->new("<$filename") or error("$! $filenme"); my @funcs; while (defined (my $line = $fh->getline)) { - if ($line =~ /^(void|IData)\s+(.*::.*)/) { - my $func = $2; - $func =~ s/\(.*$//; - print "\tFunc $func\n" if $Self->{verbose}; - if ($func !~ /::_eval_initial_loop$/ - && $func !~ /::__Vconfigure$/ - && $func !~ /::trace$/ - && $func !~ /::traceInit$/ - && $func !~ /::traceFull$/ - ) { - push @funcs, $func; - } - } + if ($line =~ /^(void|IData)\s+(.*::.*)/) { + my $func = $2; + $func =~ s/\(.*$//; + print "\tFunc $func\n" if $Self->{verbose}; + if ($func !~ /::_eval_initial_loop$/ + && $func !~ /::__Vconfigure$/ + && $func !~ /::trace$/ + && $func !~ /::traceInit$/ + && $func !~ /::traceFull$/ + ) { + push @funcs, $func; + } + } } if ($#funcs > 0) { error("Split had multiple functions in $filename\n\t".join("\n\t",@funcs)); diff --git a/test_regress/t/t_func_const_bad.v b/test_regress/t/t_func_const_bad.v index bdafacbc4..3ef441f07 100644 --- a/test_regress/t/t_func_const_bad.v +++ b/test_regress/t/t_func_const_bad.v @@ -35,7 +35,7 @@ module t; localparam B4 = f_bad_infinite(3); function integer f_bad_infinite(input [31:0] a); while (1) begin - f_bad_infinite = 0; + f_bad_infinite = 0; end endfunction diff --git a/test_regress/t/t_func_types.v b/test_regress/t/t_func_types.v index e5088b87a..9ee81c301 100644 --- a/test_regress/t/t_func_types.v +++ b/test_regress/t/t_func_types.v @@ -5,7 +5,7 @@ module t; - function int int123(); int123 = 32'h123; endfunction + function int int123(); int123 = 32'h123; endfunction function bit f_bit ; input bit i; f_bit = ~i; endfunction function int f_int ; input int i; f_int = ~i; endfunction diff --git a/test_regress/t/t_func_wide_out_bad.v b/test_regress/t/t_func_wide_out_bad.v index 1044b59b4..6bf3a7e80 100644 --- a/test_regress/t/t_func_wide_out_bad.v +++ b/test_regress/t/t_func_wide_out_bad.v @@ -8,7 +8,7 @@ module t (); parameter MSG_PORT_WIDTH = 4350; localparam PAYLOAD_MAX_BITS = 4352; - reg [MSG_PORT_WIDTH-1:0] msg; + reg [MSG_PORT_WIDTH-1:0] msg; initial begin // Operator TASKREF 'func' expects 4352 bits on the Function Argument, but Function Argument's VARREF 'msg' generates 4350 bits. diff --git a/test_regress/t/t_gen_var_bad.v b/test_regress/t/t_gen_var_bad.v index 7bb80e7da..177667c68 100644 --- a/test_regress/t/t_gen_var_bad.v +++ b/test_regress/t/t_gen_var_bad.v @@ -6,7 +6,7 @@ module t; integer i; generate - for (i=0; i<3; i=i+1) begin // Bad: i is not a genvar + for (i=0; i<3; i=i+1) begin // Bad: i is not a genvar end endgenerate endmodule diff --git a/test_regress/t/t_hierarchy_unnamed.v b/test_regress/t/t_hierarchy_unnamed.v index ca1b78251..37b55d454 100644 --- a/test_regress/t/t_hierarchy_unnamed.v +++ b/test_regress/t/t_hierarchy_unnamed.v @@ -7,7 +7,7 @@ module sub(); endmodule module t(input logic a, input logic b, - output logic x, output logic y); + output logic x, output logic y); always_comb begin integer i; diff --git a/test_regress/t/t_inst_misarray_bad.v b/test_regress/t/t_inst_misarray_bad.v index fbee260d0..3af9f7b6a 100644 --- a/test_regress/t/t_inst_misarray_bad.v +++ b/test_regress/t/t_inst_misarray_bad.v @@ -13,7 +13,7 @@ module t (/*AUTOARG*/ // dut #(.W(4)) udut(.*); dut #(.W(4)) udut(.clk(clk), - .foo(foo)); // Should be a non-internal error, as assigning logic to logic array + .foo(foo)); // Assigning logic to logic array endmodule diff --git a/test_regress/t/t_interface_mismodport_bad.v b/test_regress/t/t_interface_mismodport_bad.v index ad8aa2a52..80e6f01f4 100644 --- a/test_regress/t/t_interface_mismodport_bad.v +++ b/test_regress/t/t_interface_mismodport_bad.v @@ -20,7 +20,7 @@ module t (/*AUTOARG*/ ifc itop(); counter_ansi c1 (.isub(itop), - .i_value(4'h4)); + .i_value(4'h4)); endmodule diff --git a/test_regress/t/t_langext_3.v b/test_regress/t/t_langext_3.v index fbe69ea72..eecc02615 100644 --- a/test_regress/t/t_langext_3.v +++ b/test_regress/t/t_langext_3.v @@ -16,6 +16,6 @@ module t (/*AUTOARG*/ ); input clk; - uwire w; // Only in Verilog 2005 + uwire w; // Only in Verilog 2005 endmodule diff --git a/test_regress/t/t_lint_latch_bad.v b/test_regress/t/t_lint_latch_bad.v index 81129436d..8446ad562 100644 --- a/test_regress/t/t_lint_latch_bad.v +++ b/test_regress/t/t_lint_latch_bad.v @@ -19,7 +19,7 @@ module t (/*AUTOARG*/ end output logic bc; - output logic cc; + output logic cc; always_comb begin bc <= a; // Warning cc = a; diff --git a/test_regress/t/t_lint_multidriven_bad.v b/test_regress/t/t_lint_multidriven_bad.v index 46748db64..0eaa068db 100644 --- a/test_regress/t/t_lint_multidriven_bad.v +++ b/test_regress/t/t_lint_multidriven_bad.v @@ -17,7 +17,7 @@ module t (/*AUTOARG*/ output reg [31:0] out; output reg [15:0] out2; - reg [7:0] mem [4]; + reg [7:0] mem [4]; always @(posedge clk) begin mem[a0] <= d0; diff --git a/test_regress/t/t_lint_unused.v b/test_regress/t/t_lint_unused.v index 637f3cce7..801e50f9d 100644 --- a/test_regress/t/t_lint_unused.v +++ b/test_regress/t/t_lint_unused.v @@ -21,7 +21,7 @@ module t (/*AUTOARG*/ udp_mux2 udpsub (out, in, in, in); // Check ignoreds mark as used - reg sysused; + reg sysused; initial $bboxed(sysused); // Check file IO. The fopen is the "driver" all else a usage. diff --git a/test_regress/t/t_mem_slot.v b/test_regress/t/t_mem_slot.v index 8fcf5ed18..bc35f2831 100644 --- a/test_regress/t/t_mem_slot.v +++ b/test_regress/t/t_mem_slot.v @@ -3,7 +3,7 @@ // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2006 by Wilson Snyder. -`define RegDel 1 +`define RegDel 1 module t_mem_slot (Clk, SlotIdx, BitToChange, BitVal, SlotToReturn, OutputVal); diff --git a/test_regress/t/t_order_a.v b/test_regress/t/t_order_a.v index 4f5062030..199272dcc 100644 --- a/test_regress/t/t_order_a.v +++ b/test_regress/t/t_order_a.v @@ -5,7 +5,8 @@ module t_order_a (/*AUTOARG*/ // Outputs - m_from_clk_lev1_r, n_from_clk_lev2, o_from_com_levs11, o_from_comandclk_levs12, + m_from_clk_lev1_r, n_from_clk_lev2, o_from_com_levs11, + o_from_comandclk_levs12, // Inputs clk, a_to_clk_levm3, b_to_clk_levm1, c_com_levs10, d_to_clk_levm2, one ); @@ -23,7 +24,7 @@ module t_order_a (/*AUTOARG*/ /*AUTOREG*/ // Beginning of automatic regs (for this module's undeclared outputs) - reg [7:0] m_from_clk_lev1_r; + reg [7:0] m_from_clk_lev1_r; // End of automatics // surefire lint_off ASWEBB diff --git a/test_regress/t/t_package_enum.v b/test_regress/t/t_package_enum.v index bb2d719c5..c3402e574 100644 --- a/test_regress/t/t_package_enum.v +++ b/test_regress/t/t_package_enum.v @@ -13,7 +13,7 @@ endpackage module t; reg [1:0] ttype; - reg m; + reg m; enum bit [1:0] { LOCAL } l; diff --git a/test_regress/t/t_package_verb.v b/test_regress/t/t_package_verb.v index c2749d712..bc3191d07 100644 --- a/test_regress/t/t_package_verb.v +++ b/test_regress/t/t_package_verb.v @@ -6,7 +6,7 @@ // bug474 package verb_pkg; typedef enum int {VERB_I, - VERB_W} Verb_t; + VERB_W} Verb_t; Verb_t verb = VERB_I; string message = " "; endpackage diff --git a/test_regress/t/t_param_ddeep_width.v b/test_regress/t/t_param_ddeep_width.v index daced63cc..54cb9f969 100644 --- a/test_regress/t/t_param_ddeep_width.v +++ b/test_regress/t/t_param_ddeep_width.v @@ -22,7 +22,7 @@ module paramtest_DFFRE(clk,q); parameter [W-1:0] INIT={W{1'b0}}; input clk; output [W-1:0] q; - reg [W-1:0] q; + reg [W-1:0] q; always @(posedge clk) begin q <= INIT; end diff --git a/test_regress/t/t_param_package.v b/test_regress/t/t_param_package.v index b7ef97b43..21be7f149 100644 --- a/test_regress/t/t_param_package.v +++ b/test_regress/t/t_param_package.v @@ -19,5 +19,5 @@ module Test0 (val0); endmodule module Test1 (val1); - input logic [params::P : 0] val1; // Fully qualified parameter + input logic [params::P : 0] val1; // Fully qualified parameter endmodule diff --git a/test_regress/t/t_param_public.cpp b/test_regress/t/t_param_public.cpp index 1f3edff95..21ef77f7f 100644 --- a/test_regress/t/t_param_public.cpp +++ b/test_regress/t/t_param_public.cpp @@ -19,6 +19,6 @@ int main(int argc, char *argv[]) { if (static_cast(Vt_param_public_p::INPACK) != 0) {} for (int i = 0; i < 10; i++) { - topp->eval(); + topp->eval(); } } diff --git a/test_regress/t/t_pp_display.v b/test_regress/t/t_pp_display.v index 346a8d2ae..1cbd4568e 100644 --- a/test_regress/t/t_pp_display.v +++ b/test_regress/t/t_pp_display.v @@ -15,7 +15,7 @@ module t; `define rs right_side `define noarg na//note extra space `define thru(x) x -`define thruthru `ls `rs // Doesn't expand +`define thruthru `ls `rs // Doesn't expand `define msg(x,y) `"x: `\`"y`\`"`" `define left(m,left) m // The 'left' as the variable name shouldn't match the "left" in the `" string initial begin diff --git a/test_regress/t/t_preproc.pl b/test_regress/t/t_preproc.pl index f2c515d08..364edc564 100755 --- a/test_regress/t/t_preproc.pl +++ b/test_regress/t/t_preproc.pl @@ -27,31 +27,31 @@ sub preproc_check { my @Line_Checks; { # Read line comments. - my $fh = IO::File->new($filename1) or die "%Error: $! $filename1\n"; - while (defined(my $line = $fh->getline)) { - if ($line =~ /^Line_Preproc_Check/) { - push @Line_Checks, $.; - } - } - $fh->close; + my $fh = IO::File->new($filename1) or die "%Error: $! $filename1\n"; + while (defined(my $line = $fh->getline)) { + if ($line =~ /^Line_Preproc_Check/) { + push @Line_Checks, $.; + } + } + $fh->close; } { # See if output file agrees. - my $fh = IO::File->new($filename2) or die "%Error: $! $filename2\n"; - my $lineno = 0; - while (defined(my $line = $fh->getline)) { - $lineno++; - if ($line =~ /^\`line\s+(\d+)/) { - $lineno = $1 - 1; - } - if ($line =~ /^Line_Preproc_Check\s+(\d+)/) { - my $linecmt = $1; - my $check = shift @Line_Checks; + my $fh = IO::File->new($filename2) or die "%Error: $! $filename2\n"; + my $lineno = 0; + while (defined(my $line = $fh->getline)) { + $lineno++; + if ($line =~ /^\`line\s+(\d+)/) { + $lineno = $1 - 1; + } + if ($line =~ /^Line_Preproc_Check\s+(\d+)/) { + my $linecmt = $1; + my $check = shift @Line_Checks; if (!$check) { error("$filename2:$.: Extra Line_Preproc_Check\n"); } if ($linecmt != $check) { error("$filename2:$.: __LINE__ inserted $linecmt, exp=$check\n"); } if ($lineno != $check) { error("$filename2:$.: __LINE__ on `line $lineno, exp=$check\n"); } - } - } - $fh->close; + } + } + $fh->close; } if ($Line_Checks[0]) { error("$filename2: Missing a Line_Preproc_Check\n"); } return 1; diff --git a/test_regress/t/t_select_bad_range.v b/test_regress/t/t_select_bad_range.v index 3f7cbb15e..dee1f0433 100644 --- a/test_regress/t/t_select_bad_range.v +++ b/test_regress/t/t_select_bad_range.v @@ -7,7 +7,7 @@ module t (clk); input clk; reg [43:0] mi; - reg sel; + reg sel; reg [3:0] sel2; always @ (posedge clk) begin diff --git a/test_regress/t/t_select_bad_range3.v b/test_regress/t/t_select_bad_range3.v index ac8dfd4f6..11e2928b3 100644 --- a/test_regress/t/t_select_bad_range3.v +++ b/test_regress/t/t_select_bad_range3.v @@ -9,11 +9,12 @@ module t (/*AUTOARG*/ // Inputs inwires ); + input [7:0] inwires [12:10]; output wire [7:0] outwires [12:10]; assign outwires[10] = inwires[11]; assign outwires[11] = inwires[12]; - assign outwires[12] = inwires[13]; // must be an error here + assign outwires[12] = inwires[13]; // must be an error here endmodule diff --git a/test_regress/t/t_select_little_pack.v b/test_regress/t/t_select_little_pack.v index 1bf43d5c1..161423041 100644 --- a/test_regress/t/t_select_little_pack.v +++ b/test_regress/t/t_select_little_pack.v @@ -10,7 +10,7 @@ module t (/*AUTOARG*/ input clk; // No endian warning here - wire [7:0] pack [3:0]; + wire [7:0] pack [3:0]; initial begin pack[0] = 8'h78; diff --git a/test_regress/t/t_struct_nest.v b/test_regress/t/t_struct_nest.v index 8c57b98e3..33790b832 100644 --- a/test_regress/t/t_struct_nest.v +++ b/test_regress/t/t_struct_nest.v @@ -4,34 +4,34 @@ // without warranty, 2013 by Wilson Snyder. typedef struct packed { - logic [1:0] b1; - logic [1:0] b2; - logic [1:0] b3; - logic [1:0] b4; + logic [1:0] b1; + logic [1:0] b2; + logic [1:0] b3; + logic [1:0] b4; } t__aa_bbbbbbb_ccccc_dddddd_eee; typedef struct packed { - logic [31:0] a; - union packed { - logic [7:0] fbyte; - t__aa_bbbbbbb_ccccc_dddddd_eee pairs; - } b1; - logic [23:0] b2; - logic [7:0] c1; - logic [23:0] c2; - logic [31:0] d; + logic [31:0] a; + union packed { + logic [7:0] fbyte; + t__aa_bbbbbbb_ccccc_dddddd_eee pairs; + } b1; + logic [23:0] b2; + logic [7:0] c1; + logic [23:0] c2; + logic [31:0] d; } t__aa_bbbbbbb_ccccc_dddddd; typedef struct packed { - logic [31:0] a; - logic [31:0] b; - logic [31:0] c; - logic [31:0] d; + logic [31:0] a; + logic [31:0] b; + logic [31:0] c; + logic [31:0] d; } t__aa_bbbbbbb_ccccc_eee; typedef union packed { - t__aa_bbbbbbb_ccccc_dddddd dddddd; - t__aa_bbbbbbb_ccccc_eee eee; + t__aa_bbbbbbb_ccccc_dddddd dddddd; + t__aa_bbbbbbb_ccccc_eee eee; } t__aa_bbbbbbb_ccccc; diff --git a/test_regress/t/t_struct_unpacked.v b/test_regress/t/t_struct_unpacked.v index 92d759653..b499329c8 100644 --- a/test_regress/t/t_struct_unpacked.v +++ b/test_regress/t/t_struct_unpacked.v @@ -7,7 +7,7 @@ module x; // verilator lint_off UNPACKED typedef struct { - int a; + int a; } notpacked_t; // verilator lint_on UNPACKED diff --git a/test_regress/t/t_struct_unpacked_bad.v b/test_regress/t/t_struct_unpacked_bad.v index c726c13d2..a05607066 100644 --- a/test_regress/t/t_struct_unpacked_bad.v +++ b/test_regress/t/t_struct_unpacked_bad.v @@ -6,7 +6,7 @@ module x; typedef struct { - int a; + int a; } notpacked_t; typedef struct packed { diff --git a/test_regress/t/t_tri_inout2.v b/test_regress/t/t_tri_inout2.v index f0d4ae87a..62b532681 100644 --- a/test_regress/t/t_tri_inout2.v +++ b/test_regress/t/t_tri_inout2.v @@ -51,7 +51,7 @@ module t (/*AUTOARG*/ end if (in==3) begin - $write("*-* All Finished *-*\n"); + $write("*-* All Finished *-*\n"); $finish; end end diff --git a/test_regress/t/t_tri_select.v b/test_regress/t/t_tri_select.v index 260471882..48714cf73 100644 --- a/test_regress/t/t_tri_select.v +++ b/test_regress/t/t_tri_select.v @@ -27,7 +27,7 @@ module top ( // pulldown p1(PAD); - wire [5:0] fill = { 4'b0, A1 }; + wire [5:0] fill = { 4'b0, A1 }; endmodule diff --git a/test_regress/t/t_tri_select_unsized.v b/test_regress/t/t_tri_select_unsized.v index 2e2dbde5f..f626d28a5 100644 --- a/test_regress/t/t_tri_select_unsized.v +++ b/test_regress/t/t_tri_select_unsized.v @@ -13,7 +13,7 @@ module t (/*AUTOARG*/ wire [1:0] b; wire [1:0] c; - wire [0:0] d; // Explicit width due to issue 508 + wire [0:0] d; // Explicit width due to issue 508 wire [0:0] e; // This works if we use 1'bz, or 1'bx, but not with just 'bz or 'bx. It diff --git a/test_regress/t/t_var_bad_hide.v b/test_regress/t/t_var_bad_hide.v index 2ae49ad51..95971018e 100644 --- a/test_regress/t/t_var_bad_hide.v +++ b/test_regress/t/t_var_bad_hide.v @@ -18,7 +18,7 @@ module t; initial begin begin: lower - integer top; + integer top; end end diff --git a/test_regress/t/t_var_in_assign_bad.v b/test_regress/t/t_var_in_assign_bad.v index 8c1d8a9c5..a3f5ae53c 100644 --- a/test_regress/t/t_var_in_assign_bad.v +++ b/test_regress/t/t_var_in_assign_bad.v @@ -9,7 +9,7 @@ module t (/*AUTOARG*/ ); input [3:0] value; assign value = 4'h0; - sub sub (.valueSub (value[3:0])); + sub sub(.valueSub(value[3:0])); endmodule module sub (/*AUTOARG*/ diff --git a/test_regress/t/t_var_notfound_bad.v b/test_regress/t/t_var_notfound_bad.v index 95c27b485..508a351e1 100644 --- a/test_regress/t/t_var_notfound_bad.v +++ b/test_regress/t/t_var_notfound_bad.v @@ -15,7 +15,7 @@ module t (/*AUTOARG*/); sub.subsubz.inss = 0; // subsub not found i = nofunc(); // nofunc not found notask(); // notask not found - a_var(); // Calling variable as task + a_var(); // Calling variable as task $finish; end endmodule diff --git a/test_regress/t/t_var_set_link.v b/test_regress/t/t_var_set_link.v index 90c0f67ab..c12cf7941 100644 --- a/test_regress/t/t_var_set_link.v +++ b/test_regress/t/t_var_set_link.v @@ -12,7 +12,7 @@ module t (/*AUTOARG*/ // Gave "Internal Error: V3Broken.cpp:: Broken link in node" output [1:0] state; - reg [1:0] state = 2'b11; + reg [1:0] state = 2'b11; always @ (posedge clk) begin state <= state; end diff --git a/test_regress/t/t_vlt_warn.v b/test_regress/t/t_vlt_warn.v index 50c406618..315e086b8 100644 --- a/test_regress/t/t_vlt_warn.v +++ b/test_regress/t/t_vlt_warn.v @@ -21,7 +21,7 @@ module t; initial begin casex (1'b1) - 1'b0: $stop; + 1'b0: $stop; endcase $write("*-* All Finished *-*\n");