diff --git a/src/verilog.y b/src/verilog.y
index c1e828a22..aadca5b69 100644
--- a/src/verilog.y
+++ b/src/verilog.y
@@ -4015,13 +4015,21 @@ elseStmtBlock<nodep>:	// Part of concurrent_assertion_statement
 
 property_spec<nodep>:			// IEEE: property_spec
 	//UNSUP: This rule has been super-specialized to what is supported now
-		'@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' expr
+		'@' '(' senitemEdge ')' yDISABLE yIFF '(' expr ')' property_expr
 			{ $$ = new AstPropClocked($1, $3, $8, $10); }
-	|	'@' '(' senitemEdge ')' expr		{ $$ = new AstPropClocked($1, $3, NULL, $5); }
-	|	yDISABLE yIFF '(' expr ')' expr	 	{ $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); }
-	|	expr	 				{ $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); }
+	|	'@' '(' senitemEdge ')' property_expr	 	{ $$ = new AstPropClocked($1, $3, NULL, $5); }
+	|	yDISABLE yIFF '(' expr ')' property_expr 	{ $$ = new AstPropClocked($4->fileline(), NULL, $4, $6); }
+	|	property_expr	 				{ $$ = new AstPropClocked($1->fileline(), NULL, NULL, $1); }
 	;
 
+property_expr<nodep>:			// IEEE: property_expr
+	//UNSUP: This rule has been super-specialized to what is supported now
+		expr yP_ORMINUSGT property_expr			{ $$ = new AstLogOr($2,new AstLogNot($2,$1),$3); }
+//	|	expr yP_OREQGT property_expr			{ $$ = new AstLogOr($2,new AstLogNot($2,new AstPast($2,$1, NULL)),$3); } // This handles disable iff in the past time step incorrectly
+	|	expr						{ $$ = $1; }
+	;
+
+
 //************************************************
 // Let