diff --git a/test_regress/t/t_class_static_member.out b/test_regress/t/t_class_static_member.out
new file mode 100644
index 000000000..a00915e36
--- /dev/null
+++ b/test_regress/t/t_class_static_member.out
@@ -0,0 +1,6 @@
+%Error-UNSUPPORTED: t/t_class_static_member.v:12:15: Unsupported: 'static' class members
+                                                   : ... In instance t
+   12 |    static int c_st = 22;
+      |               ^~~~
+                    ... For error description see https://verilator.org/warn/UNSUPPORTED?v=latest
+%Error: Exiting due to
diff --git a/test_regress/t/t_class_static_member.pl b/test_regress/t/t_class_static_member.pl
new file mode 100755
index 000000000..8d48ddb75
--- /dev/null
+++ b/test_regress/t/t_class_static_member.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    fails => $Self->{vlt_all},  # Verilator unsupported, bug546
+    expect_filename => $Self->{golden_filename},
+    );
+
+execute(
+    check_finished => 1,
+    ) if !$Self->{vlt_all};
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_static_member.v b/test_regress/t/t_class_static_member.v
new file mode 100644
index 000000000..bc772f2e6
--- /dev/null
+++ b/test_regress/t/t_class_static_member.v
@@ -0,0 +1,55 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2022 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+class Cls;
+   int c_no = 2;
+   //automatic int c_au = 2;  // automatic not a legal keyword here
+   static int c_st = 22;
+
+   function int f_c_no ();
+      ++c_no; return c_no;
+   endfunction
+   function int f_c_st ();
+      ++c_st; return c_st;
+   endfunction
+
+   static function int f_cs_st ();
+      ++c_st; return c_st;
+   endfunction
+
+endclass
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk;
+
+   Cls a = new;
+   Cls b = new;
+
+   int   v;
+
+   initial begin
+      v = a.f_c_no(); `checkh(v, 3);
+      v = a.f_c_no(); `checkh(v, 4);
+      v = b.f_c_no(); `checkh(v, 3);
+      v = b.f_c_no(); `checkh(v, 4);
+      v = a.f_c_st(); `checkh(v, 23);
+      v = a.f_c_st(); `checkh(v, 24);
+      v = b.f_c_st(); `checkh(v, 25);
+      v = b.f_c_st(); `checkh(v, 26);
+      //
+      v = Cls::f_cs_st(); `checkh(v, 27);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule
diff --git a/test_regress/t/t_class_static_member_pkg.out b/test_regress/t/t_class_static_member_pkg.out
new file mode 100644
index 000000000..9dd7dfb59
--- /dev/null
+++ b/test_regress/t/t_class_static_member_pkg.out
@@ -0,0 +1,4 @@
+%Error: t/t_class_static_member_pkg.v:51:16: Syntax Error: Not expecting CLASSORPACKAGEREF under a DOT in dotted expression
+   51 |       v = Pkg::Cls::f_cs_st(); do if ((v) !== (27)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", "t/t_class_static_member_pkg.v",51, (v), (27)); $stop; end while(0);;
+      |                ^~~
+%Error: Exiting due to
diff --git a/test_regress/t/t_class_static_member_pkg.pl b/test_regress/t/t_class_static_member_pkg.pl
new file mode 100755
index 000000000..8d48ddb75
--- /dev/null
+++ b/test_regress/t/t_class_static_member_pkg.pl
@@ -0,0 +1,23 @@
+#!/usr/bin/env perl
+if (!$::Driver) { use FindBin; exec("$FindBin::Bin/bootstrap.pl", @ARGV, $0); die; }
+# DESCRIPTION: Verilator: Verilog Test driver/expect definition
+#
+# Copyright 2003 by Wilson Snyder. This program is free software; you
+# can redistribute it and/or modify it under the terms of either the GNU
+# Lesser General Public License Version 3 or the Perl Artistic License
+# Version 2.0.
+# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
+
+scenarios(simulator => 1);
+
+compile(
+    fails => $Self->{vlt_all},  # Verilator unsupported, bug546
+    expect_filename => $Self->{golden_filename},
+    );
+
+execute(
+    check_finished => 1,
+    ) if !$Self->{vlt_all};
+
+ok(1);
+1;
diff --git a/test_regress/t/t_class_static_member_pkg.v b/test_regress/t/t_class_static_member_pkg.v
new file mode 100644
index 000000000..ac36ab758
--- /dev/null
+++ b/test_regress/t/t_class_static_member_pkg.v
@@ -0,0 +1,57 @@
+// DESCRIPTION: Verilator: Verilog Test module
+//
+// This file ONLY is placed under the Creative Commons Public Domain, for
+// any use, without warranty, 2022 by Wilson Snyder.
+// SPDX-License-Identifier: CC0-1.0
+
+`define checkh(gotv,expv) do if ((gotv) !== (expv)) begin $write("%%Error: %s:%0d:  got='h%x exp='h%x\n", `__FILE__,`__LINE__, (gotv), (expv)); $stop; end while(0);
+
+package Pkg;
+class Cls;
+   int c_no = 2;
+   //automatic int c_au = 2;  // automatic not a legal keyword here
+   static int c_st = 22;
+
+   function int f_c_no ();
+      ++c_no; return c_no;
+   endfunction
+   function int f_c_st ();
+      ++c_st; return c_st;
+   endfunction
+
+   static function int f_cs_st ();
+      ++c_st; return c_st;
+   endfunction
+
+endclass
+endpackage
+
+module t (/*AUTOARG*/
+   // Inputs
+   clk
+   );
+
+   input clk;
+
+   Pkg::Cls a = new;
+   Pkg::Cls b = new;
+
+   int   v;
+
+   initial begin
+      v = a.f_c_no(); `checkh(v, 3);
+      v = a.f_c_no(); `checkh(v, 4);
+      v = b.f_c_no(); `checkh(v, 3);
+      v = b.f_c_no(); `checkh(v, 4);
+      v = a.f_c_st(); `checkh(v, 23);
+      v = a.f_c_st(); `checkh(v, 24);
+      v = b.f_c_st(); `checkh(v, 25);
+      v = b.f_c_st(); `checkh(v, 26);
+      //
+      v = Pkg::Cls::f_cs_st(); `checkh(v, 27);
+
+      $write("*-* All Finished *-*\n");
+      $finish;
+   end
+
+endmodule