// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain
// SPDX-FileCopyrightText: 2026 Antmicro
// SPDX-License-Identifier: CC0-1.0

class Cls;
  mailbox #(Cls) mb = new();
  static task foo();
    void'(mb.try_put(this));
  endtask
endclass
