From fc9999aeea4999df8be5a9bef3a7cb0e9dccf332 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Sat, 8 Feb 2020 21:14:03 -0500 Subject: [PATCH] support implied port directions --- src/Language/SystemVerilog/Parser/ParseDecl.hs | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/Language/SystemVerilog/Parser/ParseDecl.hs b/src/Language/SystemVerilog/Parser/ParseDecl.hs index 5725c79..8d9becf 100644 --- a/src/Language/SystemVerilog/Parser/ParseDecl.hs +++ b/src/Language/SystemVerilog/Parser/ParseDecl.hs @@ -105,10 +105,22 @@ parseDTsAsPortDecls pieces = length pieces == length commaIdxs + length identIdxs simpleIdents = map extractIdent $ filter isIdent pieces - declarations = parseDTsAsDecls pieces + declarations = propagateDirections Input $ parseDTsAsDecls pieces extractIdent = \(DTIdent _ x) -> x + propagateDirections :: Direction -> [Decl] -> [Decl] + propagateDirections dir (decl @ (Variable _ InterfaceT{} _ _ _) : decls) = + decl : propagateDirections dir decls + propagateDirections lastDir (Variable currDir t x a me : decls) = + decl : propagateDirections dir decls + where + decl = Variable dir t x a me + dir = if currDir == Local then lastDir else currDir + propagateDirections dir (decl : decls) = + decl : propagateDirections dir decls + propagateDirections _ [] = [] + portNames :: [Decl] -> [Identifier] portNames items = mapMaybe portName items portName :: Decl -> Maybe Identifier