diff --git a/src/Convert/DuplicateGenvar.hs b/src/Convert/DuplicateGenvar.hs index 97c17fc..2c2ee71 100644 --- a/src/Convert/DuplicateGenvar.hs +++ b/src/Convert/DuplicateGenvar.hs @@ -6,7 +6,7 @@ module Convert.DuplicateGenvar (convert) where -import Control.Monad.State +import Control.Monad.State.Strict import qualified Data.Set as Set import Convert.Traverse diff --git a/src/Convert/EmptyArgs.hs b/src/Convert/EmptyArgs.hs index 8166085..2e25403 100644 --- a/src/Convert/EmptyArgs.hs +++ b/src/Convert/EmptyArgs.hs @@ -8,7 +8,7 @@ module Convert.EmptyArgs (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import qualified Data.Set as Set import Convert.Traverse diff --git a/src/Convert/Enum.hs b/src/Convert/Enum.hs index a1be28b..bd2653d 100644 --- a/src/Convert/Enum.hs +++ b/src/Convert/Enum.hs @@ -19,7 +19,7 @@ module Convert.Enum (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import Data.List (elemIndices) import qualified Data.Set as Set diff --git a/src/Convert/FuncRoutine.hs b/src/Convert/FuncRoutine.hs index 1a3357b..595c8d4 100644 --- a/src/Convert/FuncRoutine.hs +++ b/src/Convert/FuncRoutine.hs @@ -10,7 +10,7 @@ module Convert.FuncRoutine (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import qualified Data.Set as Set import Convert.Traverse diff --git a/src/Convert/Interface.hs b/src/Convert/Interface.hs index 6e383f7..7f25c99 100644 --- a/src/Convert/Interface.hs +++ b/src/Convert/Interface.hs @@ -8,7 +8,7 @@ module Convert.Interface (convert) where import Data.List (isPrefixOf) import Data.Maybe (mapMaybe) -import Control.Monad.Writer +import Control.Monad.Writer.Strict import qualified Data.Map.Strict as Map import Convert.Scoper diff --git a/src/Convert/Jump.hs b/src/Convert/Jump.hs index 5812238..67dfb4c 100644 --- a/src/Convert/Jump.hs +++ b/src/Convert/Jump.hs @@ -10,8 +10,8 @@ module Convert.Jump (convert) where -import Control.Monad.State -import Control.Monad.Writer +import Control.Monad.State.Strict +import Control.Monad.Writer.Strict import Convert.Traverse import Language.SystemVerilog.AST diff --git a/src/Convert/KWArgs.hs b/src/Convert/KWArgs.hs index 549f41f..c357a45 100644 --- a/src/Convert/KWArgs.hs +++ b/src/Convert/KWArgs.hs @@ -10,7 +10,7 @@ module Convert.KWArgs (convert) where import Data.List (elemIndex, sortOn) -import Control.Monad.Writer +import Control.Monad.Writer.Strict import qualified Data.Map.Strict as Map import Convert.Traverse diff --git a/src/Convert/Logic.hs b/src/Convert/Logic.hs index 2e54cfa..f58732e 100644 --- a/src/Convert/Logic.hs +++ b/src/Convert/Logic.hs @@ -25,8 +25,8 @@ module Convert.Logic (convert) where -import Control.Monad.State -import Control.Monad.Writer +import Control.Monad.State.Strict +import Control.Monad.Writer.Strict import qualified Data.Map.Strict as Map import qualified Data.Set as Set diff --git a/src/Convert/NamedBlock.hs b/src/Convert/NamedBlock.hs index abf5724..9a16e27 100644 --- a/src/Convert/NamedBlock.hs +++ b/src/Convert/NamedBlock.hs @@ -10,7 +10,7 @@ module Convert.NamedBlock (convert) where -import Control.Monad.State +import Control.Monad.State.Strict import qualified Data.Set as Set import Convert.Traverse diff --git a/src/Convert/NestPI.hs b/src/Convert/NestPI.hs index 4ca537e..5525dd0 100644 --- a/src/Convert/NestPI.hs +++ b/src/Convert/NestPI.hs @@ -6,7 +6,7 @@ module Convert.NestPI (convert, reorder) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import Data.Maybe (mapMaybe) import qualified Data.Map.Strict as Map import qualified Data.Set as Set diff --git a/src/Convert/Package.hs b/src/Convert/Package.hs index 266e939..0019630 100644 --- a/src/Convert/Package.hs +++ b/src/Convert/Package.hs @@ -25,8 +25,8 @@ module Convert.Package (convert) where -import Control.Monad.State -import Control.Monad.Writer +import Control.Monad.State.Strict +import Control.Monad.Writer.Strict import qualified Data.Map.Strict as Map import qualified Data.Set as Set diff --git a/src/Convert/ParamType.hs b/src/Convert/ParamType.hs index b0e5f70..e7a1bf0 100644 --- a/src/Convert/ParamType.hs +++ b/src/Convert/ParamType.hs @@ -7,7 +7,7 @@ module Convert.ParamType (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import Data.Either (isLeft) import Data.Maybe (isJust, isNothing, fromJust) import qualified Data.Map.Strict as Map diff --git a/src/Convert/Scoper.hs b/src/Convert/Scoper.hs index d8e3be9..eaa45a6 100644 --- a/src/Convert/Scoper.hs +++ b/src/Convert/Scoper.hs @@ -42,7 +42,7 @@ module Convert.Scoper , scopeModuleItemT ) where -import Control.Monad.State +import Control.Monad.State.Strict import Data.Functor.Identity (runIdentity) import Data.Maybe (isNothing) import qualified Data.Map.Strict as Map diff --git a/src/Convert/SizeCast.hs b/src/Convert/SizeCast.hs index b65a406..e0d2b87 100644 --- a/src/Convert/SizeCast.hs +++ b/src/Convert/SizeCast.hs @@ -7,7 +7,7 @@ module Convert.SizeCast (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import Data.List (isPrefixOf) import Convert.ExprUtils diff --git a/src/Convert/StarPort.hs b/src/Convert/StarPort.hs index b5f8dea..8b7a40b 100644 --- a/src/Convert/StarPort.hs +++ b/src/Convert/StarPort.hs @@ -6,7 +6,7 @@ module Convert.StarPort (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import qualified Data.Map.Strict as Map import Convert.Traverse diff --git a/src/Convert/Traverse.hs b/src/Convert/Traverse.hs index 8d4a859..11e855f 100644 --- a/src/Convert/Traverse.hs +++ b/src/Convert/Traverse.hs @@ -98,8 +98,8 @@ module Convert.Traverse ) where import Data.Functor.Identity (Identity, runIdentity) -import Control.Monad.State -import Control.Monad.Writer +import Control.Monad.State.Strict +import Control.Monad.Writer.Strict import Language.SystemVerilog.AST type MapperM m t = t -> m t diff --git a/src/Convert/UnbasedUnsized.hs b/src/Convert/UnbasedUnsized.hs index 8e52ebb..892323b 100644 --- a/src/Convert/UnbasedUnsized.hs +++ b/src/Convert/UnbasedUnsized.hs @@ -17,7 +17,7 @@ module Convert.UnbasedUnsized (convert) where -import Control.Monad.Writer +import Control.Monad.Writer.Strict import Data.Maybe (catMaybes) import qualified Data.Map.Strict as Map diff --git a/src/Convert/UnpackedArray.hs b/src/Convert/UnpackedArray.hs index f869a9a..2fa93b3 100644 --- a/src/Convert/UnpackedArray.hs +++ b/src/Convert/UnpackedArray.hs @@ -14,7 +14,7 @@ module Convert.UnpackedArray (convert) where -import Control.Monad.State +import Control.Monad.State.Strict import qualified Data.Set as Set import Convert.Scoper diff --git a/src/Language/SystemVerilog/Parser.hs b/src/Language/SystemVerilog/Parser.hs index 20a586d..50c0208 100644 --- a/src/Language/SystemVerilog/Parser.hs +++ b/src/Language/SystemVerilog/Parser.hs @@ -6,7 +6,7 @@ module Language.SystemVerilog.Parser ) where import Control.Monad.Except -import Control.Monad.State +import Control.Monad.State.Strict import qualified Data.Map.Strict as Map import Language.SystemVerilog.AST (AST) import Language.SystemVerilog.Parser.Lex (lexStr) diff --git a/src/Language/SystemVerilog/Parser/Parse.y b/src/Language/SystemVerilog/Parser/Parse.y index 514f95c..a166ea6 100644 --- a/src/Language/SystemVerilog/Parser/Parse.y +++ b/src/Language/SystemVerilog/Parser/Parse.y @@ -16,7 +16,7 @@ module Language.SystemVerilog.Parser.Parse (parse) where import Control.Monad.Except -import Control.Monad.State +import Control.Monad.State.Strict import Data.Maybe (fromMaybe) import Language.SystemVerilog.AST import Language.SystemVerilog.Parser.ParseDecl diff --git a/src/Language/SystemVerilog/Parser/Preprocess.hs b/src/Language/SystemVerilog/Parser/Preprocess.hs index 3ad5d1b..177362a 100644 --- a/src/Language/SystemVerilog/Parser/Preprocess.hs +++ b/src/Language/SystemVerilog/Parser/Preprocess.hs @@ -14,7 +14,7 @@ module Language.SystemVerilog.Parser.Preprocess ) where import Control.Monad.Except -import Control.Monad.State +import Control.Monad.State.Strict import Data.Char (ord) import Data.List (dropWhileEnd, tails, isPrefixOf, findIndex) import Data.Maybe (isJust, fromJust)