From e2570303d0f6e35e6f9fc2efa80461a6e088cd37 Mon Sep 17 00:00:00 2001
From: Zachary Snow <zach@zachjs.com>
Date: Mon, 30 Sep 2019 23:11:16 -0400
Subject: [PATCH] reject negative repeat counts

---
 src/Language/SystemVerilog/AST/Expr.hs | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/Language/SystemVerilog/AST/Expr.hs b/src/Language/SystemVerilog/AST/Expr.hs
index 0a7c815..ef9421f 100644
--- a/src/Language/SystemVerilog/AST/Expr.hs
+++ b/src/Language/SystemVerilog/AST/Expr.hs
@@ -164,7 +164,15 @@ readNumber n =
 simplify :: Expr -> Expr
 simplify (UniOp LogNot (Number "1")) = Number "0"
 simplify (UniOp LogNot (Number "0")) = Number "1"
-simplify (Repeat (Number "0") _) = Concat []
+simplify (orig @ (Repeat (Number n) exprs)) =
+    case readNumber n of
+        Nothing -> orig
+        Just 0 -> Concat []
+        Just 1 -> Concat exprs
+        Just x ->
+            if x < 0
+                then error $ "negative repeat count: " ++ show orig
+                else orig
 simplify (Concat [expr]) = expr
 simplify (Concat exprs) =
     Concat $ filter (/= Concat []) exprs