From c4f5718f519cd3a641a8db888cd81a840b02056b Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Sat, 30 Mar 2019 01:33:49 -0400 Subject: [PATCH] support for binary xnor --- src/Language/SystemVerilog/AST/Op.hs | 2 ++ src/Language/SystemVerilog/Parser/Parse.y | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/Language/SystemVerilog/AST/Op.hs b/src/Language/SystemVerilog/AST/Op.hs index bb300d4..6b129fd 100644 --- a/src/Language/SystemVerilog/AST/Op.hs +++ b/src/Language/SystemVerilog/AST/Op.hs @@ -41,6 +41,7 @@ data BinOp | LogOr | BitAnd | BitXor + | BitXnor | BitOr | Mul | Div @@ -69,6 +70,7 @@ instance Show BinOp where show LogOr = "||" show BitAnd = "&" show BitXor = "^" + show BitXnor = "~^" show BitOr = "|" show Mul = "*" show Div = "/" diff --git a/src/Language/SystemVerilog/Parser/Parse.y b/src/Language/SystemVerilog/Parser/Parse.y index 45ca396..c825783 100644 --- a/src/Language/SystemVerilog/Parser/Parse.y +++ b/src/Language/SystemVerilog/Parser/Parse.y @@ -221,7 +221,7 @@ directive { Token Spe_Directive _ _ } %left "||" %left "&&" %left "|" "~|" -%left "^" "^~" +%left "^" "^~" "~^" %left "&" "~&" %left "==" "!=" "===" "!==" "==?" "!=?" %left "<" "<=" ">" ">=" @@ -781,6 +781,8 @@ Expr :: { Expr } | Expr "|" Expr { BinOp BitOr $1 $3 } | Expr "^" Expr { BinOp BitXor $1 $3 } | Expr "&" Expr { BinOp BitAnd $1 $3 } + | Expr "~^" Expr { BinOp BitXnor $1 $3 } + | Expr "^~" Expr { BinOp BitXnor $1 $3 } | Expr "+" Expr { BinOp Add $1 $3 } | Expr "-" Expr { BinOp Sub $1 $3 } | Expr "*" Expr { BinOp Mul $1 $3 }