From c1f027e11a45cbe345bd88e056c282b32334c402 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Tue, 19 Nov 2019 23:41:59 -0500 Subject: [PATCH] $readmemh/$readmemb imply reg (resolves #57) --- src/Convert/Logic.hs | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/Convert/Logic.hs b/src/Convert/Logic.hs index 9eddf2d..ea6b4a7 100644 --- a/src/Convert/Logic.hs +++ b/src/Convert/Logic.hs @@ -135,13 +135,20 @@ convertDescription ports orig = convertDecl other = other regIdents :: ModuleItem -> Writer Idents () -regIdents (AlwaysC _ stmt) = +regIdents (AlwaysC _ stmt) = do + collectNestedStmtsM collectReadMemsM stmt collectNestedStmtsM (collectStmtLHSsM (collectNestedLHSsM lhsIdents)) $ - traverseNestedStmts removeTimings stmt + traverseNestedStmts removeTimings stmt where removeTimings :: Stmt -> Stmt removeTimings (Timing _ s) = s removeTimings other = other + collectReadMemsM :: Stmt -> Writer Idents () + collectReadMemsM (Subroutine (Ident f) (Args (_ : Just (Ident x) : _) [])) = + if f == "$readmemh" || f == "$readmemb" + then tell $ Set.singleton x + else return () + collectReadMemsM _ = return () regIdents (Initial stmt) = regIdents $ AlwaysC Always stmt regIdents (Final stmt) =