diff --git a/src/Language/SystemVerilog/Parser/Lex.x b/src/Language/SystemVerilog/Parser/Lex.x
index 20a4e89..5fd260f 100644
--- a/src/Language/SystemVerilog/Parser/Lex.x
+++ b/src/Language/SystemVerilog/Parser/Lex.x
@@ -755,7 +755,11 @@ takeMacroArguments = do
             case (stack, ch) of
                 (      s,'\\') -> do
                     ch2 <- takeChar
-                    loop (curr ++ [ch, ch2]) s
+                    if ch2 == '\n'
+                        then do
+                            dropWhitespace
+                            loop curr s
+                        else loop (curr ++ [ch, ch2]) s
                 ([     ], ',') -> return (curr, False)
                 ([     ], ')') -> return (curr, True)