From a15b0c735ff36673a9f53cd084d8df6f4f81eb87 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Mon, 21 Jun 2021 15:49:23 -0400 Subject: [PATCH] fix codegen for binop size cast --- src/Language/SystemVerilog/AST/Expr.hs | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/Language/SystemVerilog/AST/Expr.hs b/src/Language/SystemVerilog/AST/Expr.hs index 83029ca..517b5e3 100644 --- a/src/Language/SystemVerilog/AST/Expr.hs +++ b/src/Language/SystemVerilog/AST/Expr.hs @@ -77,7 +77,8 @@ instance Show Expr where show (Repeat e l ) = printf "{%s {%s}}" (show e) (commas $ map show l) show (Concat l ) = printf "{%s}" (commas $ map show l) show (Stream o e l) = printf "{%s %s%s}" (show o) (show e) (show $ Concat l) - show (Cast tore e ) = printf "%s'(%s)" (showEither tore) (show e) + show (Cast tore e ) = printf "%s'(%s)" toreStr (show e) + where toreStr = either show (flip showBinOpPrec []) tore show (DimsFn f v ) = printf "%s(%s)" (show f) (showEither v) show (DimFn f v e) = printf "%s(%s, %s)" (show f) (showEither v) (show e) show (Inside e l ) = printf "(%s inside { %s })" (show e) (intercalate ", " $ map show l)