diff --git a/CHANGELOG.md b/CHANGELOG.md
index 59292cc..a663d82 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -6,6 +6,7 @@
   `'1`, `'x`) via `--exclude UnbasedUniszed`
 * Added support for enumerated type ranges (e.g., `enum { X[3:5] }`)
 * Added support for passing through DPI imports and exports
+* Added support for passing through functions with output ports
 
 ### Other Enhancements
 
diff --git a/src/Language/SystemVerilog/Parser/Parse.y b/src/Language/SystemVerilog/Parser/Parse.y
index 3b79895..f77d6a7 100644
--- a/src/Language/SystemVerilog/Parser/Parse.y
+++ b/src/Language/SystemVerilog/Parser/Parse.y
@@ -1571,9 +1571,10 @@ combineDeclsAndStmts (a1, b1) (a2, b2) =
 makeInput :: Decl -> Decl
 makeInput (Variable Local t x a e) = Variable Input t x a e
 makeInput (Variable Input t x a e) = Variable Input t x a e
+makeInput (Variable Output t x a e) = Variable Output t x a e
 makeInput (CommentDecl c) = CommentDecl c
 makeInput other =
-  error $ "unexpected non-var or non-input decl: " ++ (show other)
+  error $ "unexpected non-var or non-port function decl: " ++ (show other)
 
 checkTag :: String -> String -> a -> ParseState a
 checkTag _ "" x = return x
diff --git a/test/nosim/func_output.sv b/test/nosim/func_output.sv
new file mode 100644
index 0000000..4a6ae6f
--- /dev/null
+++ b/test/nosim/func_output.sv
@@ -0,0 +1,11 @@
+module top;
+    function automatic integer f;
+        input integer x;
+        output integer y;
+        f = x * 3;
+        y = x * 5;
+    endfunction
+    integer x, y;
+    initial x = f(-1, y);
+    initial $display(x, y);
+endmodule