From 76663c78a020697f4bb68feb8d10e29b4dc136d0 Mon Sep 17 00:00:00 2001
From: Zachary Snow <zach@zachjs.com>
Date: Wed, 25 Sep 2019 19:34:42 -0400
Subject: [PATCH] fix typename decl asgn lookahead (resolves #49)

---
 .../SystemVerilog/Parser/ParseDecl.hs         | 28 +++++++++++++------
 test/basic/port_typename.sv                   |  7 +++++
 test/basic/port_typename.v                    |  6 ++++
 3 files changed, 32 insertions(+), 9 deletions(-)
 create mode 100644 test/basic/port_typename.sv
 create mode 100644 test/basic/port_typename.v

diff --git a/src/Language/SystemVerilog/Parser/ParseDecl.hs b/src/Language/SystemVerilog/Parser/ParseDecl.hs
index 3ac79a6..6b5bcad 100644
--- a/src/Language/SystemVerilog/Parser/ParseDecl.hs
+++ b/src/Language/SystemVerilog/Parser/ParseDecl.hs
@@ -358,15 +358,25 @@ takeLifetime (DTLifetime l : rest) = (Just  l, rest)
 takeLifetime                 rest  = (Nothing, rest)
 
 takeType :: [DeclToken] -> ([Range] -> Type, [DeclToken])
-takeType (DTIdent a  : DTDot b      : rest) = (InterfaceT a (Just b),                       rest)
-takeType (DTType  tf : DTSigning sg : rest) = (tf       sg         ,                        rest)
-takeType (DTType  tf                : rest) = (tf       Unspecified,                        rest)
-takeType (DTSigning sg              : rest) = (Implicit sg         ,                        rest)
-takeType (DTIdent tn : DTComma      : rest) = (Implicit Unspecified, DTIdent tn : DTComma : rest)
-takeType (DTIdent tn                : [  ]) = (Implicit Unspecified, DTIdent tn           : [  ])
-takeType (DTIdent tn                : rest) = (Alias (Nothing) tn  ,                        rest)
-takeType (DTPSIdent ps tn           : rest) = (Alias (Just ps) tn  ,                        rest)
-takeType                              rest  = (Implicit Unspecified,                        rest)
+takeType (DTIdent a  : DTDot b      : rest) = (InterfaceT a (Just b), rest)
+takeType (DTType  tf : DTSigning sg : rest) = (tf       sg          , rest)
+takeType (DTType  tf                : rest) = (tf       Unspecified , rest)
+takeType (DTSigning sg              : rest) = (Implicit sg          , rest)
+takeType (DTPSIdent ps tn           : rest) = (Alias (Just ps) tn   , rest)
+takeType (DTIdent tn                : rest) =
+    if couldBeTypename
+        then (Alias (Nothing) tn  ,              rest)
+        else (Implicit Unspecified, DTIdent tn : rest)
+    where
+        couldBeTypename =
+            case (findIndex isIdent rest, elemIndex DTComma rest) of
+                -- no identifiers left => no decl asgns
+                (Nothing, _) -> False
+                -- an identifier is left, and no more commas
+                (_, Nothing) -> True
+                -- if comma is first, then this ident is a declaration
+                (Just a, Just b) -> a < b
+takeType rest = (Implicit Unspecified, rest)
 
 takeRanges :: [DeclToken] -> ([Range], [DeclToken])
 takeRanges [] = ([], [])
diff --git a/test/basic/port_typename.sv b/test/basic/port_typename.sv
new file mode 100644
index 0000000..e26087c
--- /dev/null
+++ b/test/basic/port_typename.sv
@@ -0,0 +1,7 @@
+typedef wire b_t;
+module top(
+    input a [1:0],
+    input b_t b
+);
+    initial $display("%d %d %1d %1d", a, b, $bits(a), $bits(b));
+endmodule
diff --git a/test/basic/port_typename.v b/test/basic/port_typename.v
new file mode 100644
index 0000000..3cccc29
--- /dev/null
+++ b/test/basic/port_typename.v
@@ -0,0 +1,6 @@
+module top(
+    input [1:0] a,
+    input wire b
+);
+    initial $display("%d %d %1d %1d", a, b, $bits(a), $bits(b));
+endmodule