diff --git a/test/lib/functions.sh b/test/lib/functions.sh
index 0e74990..e796e0e 100644
--- a/test/lib/functions.sh
+++ b/test/lib/functions.sh
@@ -118,6 +118,11 @@ simulateAndCompare() {
     assertTrue "VCDs are different:\n$output" $?
     output=`diff $ref_log $gen_log`
     assertTrue "Simulation outputs differ:\n$output" $?
+
+    rm -f $ref_vcd
+    rm -f $gen_vcd
+    rm -f $ref_log
+    rm -f $gen_log
 }
 
 runTest() {
diff --git a/test/relong/functions_tb.v b/test/relong/functions_tb.v
index ddbe3d3..b22415e 100644
--- a/test/relong/functions_tb.v
+++ b/test/relong/functions_tb.v
@@ -23,7 +23,7 @@ module top;
     end
 
     initial begin
-        $monitor($time, " data: %h check: %b checkData: %h", dataIn, {check1, check2}, checkData);
+        $monitor($time, " data: %h check: %b%b checkData: %h", dataIn, check1, check2, checkData);
         clear = 1'b1;
         dataIn = 8'h0;
         repeat(3) @(posedge clock);