From 5ef24d2d94ed250d5974a046bff2722253dfeee8 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Fri, 11 Oct 2019 19:22:55 -0400 Subject: [PATCH] omit empty subroutine args list --- src/Language/SystemVerilog/AST/Expr.hs | 4 ++-- src/Language/SystemVerilog/AST/Stmt.hs | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/src/Language/SystemVerilog/AST/Expr.hs b/src/Language/SystemVerilog/AST/Expr.hs index 0d068f0..b14942f 100644 --- a/src/Language/SystemVerilog/AST/Expr.hs +++ b/src/Language/SystemVerilog/AST/Expr.hs @@ -76,7 +76,7 @@ instance Show Expr where show (BinOp o a b) = printf "(%s %s %s)" (show a) (show o) (show b) show (Dot e n ) = printf "%s.%s" (show e) n show (Mux c a b) = printf "(%s ? %s : %s)" (show c) (show a) (show b) - show (Call ps f l) = printf "%s%s(%s)" (maybe "" (++ "::") ps) f (show l) + show (Call ps f l) = printf "%s%s%s" (maybe "" (++ "::") ps) f (show l) show (Cast tore e ) = printf "%s'(%s)" (showEither tore) (show e) show (DimsFn f v ) = printf "%s(%s)" (show f) (showEither v) show (DimFn f v e) = printf "%s(%s, %s)" (show f) (showEither v) (show e) @@ -93,7 +93,7 @@ data Args deriving (Eq, Ord) instance Show Args where - show (Args pnArgs kwArgs) = commas strs + show (Args pnArgs kwArgs) = "(" ++ (commas strs) ++ ")" where strs = (map showPnArg pnArgs) ++ (map showKwArg kwArgs) showPnArg = maybe "" show diff --git a/src/Language/SystemVerilog/AST/Stmt.hs b/src/Language/SystemVerilog/AST/Stmt.hs index 16ab9a4..475ccce 100644 --- a/src/Language/SystemVerilog/AST/Stmt.hs +++ b/src/Language/SystemVerilog/AST/Stmt.hs @@ -28,7 +28,7 @@ import Text.Printf (printf) import Language.SystemVerilog.AST.ShowHelp (commas, indent, unlines', showPad, showCase) import Language.SystemVerilog.AST.Attr (Attr) import Language.SystemVerilog.AST.Decl (Decl) -import Language.SystemVerilog.AST.Expr (Expr, Args) +import Language.SystemVerilog.AST.Expr (Expr, Args(..)) import Language.SystemVerilog.AST.LHS (LHS) import Language.SystemVerilog.AST.Op (AsgnOp(AsgnOpEq)) import Language.SystemVerilog.AST.Type (Identifier) @@ -84,7 +84,8 @@ instance Show Stmt where where showInit (l, e) = showAssign (l, AsgnOpEq, e) showAssign :: (LHS, AsgnOp, Expr) -> String showAssign (l, op, e) = printf "%s %s %s" (show l) (show op) (show e) - show (Subroutine ps x a) = printf "%s%s(%s);" (maybe "" (++ "::") ps) x (show a) + show (Subroutine ps x a) = printf "%s%s%s;" (maybe "" (++ "::") ps) x aStr + where aStr = if a == Args [] [] then "" else show a show (AsgnBlk o v e) = printf "%s %s %s;" (show v) (show o) (show e) show (Asgn t v e) = printf "%s <= %s%s;" (show v) (maybe "" showPad t) (show e) show (While e s) = printf "while (%s) %s" (show e) (show s)