From 52ccd3d3835c7618acf3cd5e286a1199fa4e2431 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Fri, 9 Jul 2021 10:34:35 -0400 Subject: [PATCH] additional test coverage for existing logic --- test/basic/assign_delay.sv | 11 +++++++++++ test/basic/attr.sv | 2 +- test/basic/gate.sv | 10 +++++++++- test/core/assert.sv | 8 +++++++- test/core/dimensions.sv | 2 ++ test/core/dimensions.v | 2 ++ test/define/main.sv | 7 +++++++ test/define/main.v | 3 +++ test/define/run.sh | 16 ++++++++++++++++ test/nosim/do_while.sv | 5 +++++ test/nosim/drive_strength.sv | 16 ++++++++++++++++ test/nosim/final.sv | 3 +++ test/nosim/min_typ_max.sv | 3 +++ test/nosim/net_type.sv | 15 +++++++++++++++ test/nosim/non_integer_type.sv | 7 +++++++ test/nosim/real.sv | 4 ++++ test/nosim/time.sv | 4 ++++ test/warning/localparam.sv | 1 + test/warning/run.sh | 22 ++++++++++++++++++++++ 19 files changed, 138 insertions(+), 3 deletions(-) create mode 100644 test/basic/assign_delay.sv create mode 100644 test/define/main.sv create mode 100644 test/define/main.v create mode 100755 test/define/run.sh create mode 100644 test/nosim/do_while.sv create mode 100644 test/nosim/drive_strength.sv create mode 100644 test/nosim/final.sv create mode 100644 test/nosim/min_typ_max.sv create mode 100644 test/nosim/net_type.sv create mode 100644 test/nosim/non_integer_type.sv create mode 100644 test/nosim/real.sv create mode 100644 test/nosim/time.sv create mode 100644 test/warning/localparam.sv diff --git a/test/basic/assign_delay.sv b/test/basic/assign_delay.sv new file mode 100644 index 0000000..e918d47 --- /dev/null +++ b/test/basic/assign_delay.sv @@ -0,0 +1,11 @@ +module top; + reg x; + wire y; + assign #5 y = x; + initial begin + #1 x = 0; + #1 x = 1; + #20 x = 0; + #20 x = 1; + end +endmodule diff --git a/test/basic/attr.sv b/test/basic/attr.sv index 94b8008..59414e0 100644 --- a/test/basic/attr.sv +++ b/test/basic/attr.sv @@ -10,7 +10,7 @@ endmodule (* a=1 *) module top; (* foo="bar" *) reg x; initial begin - x = 1; + (* bar = "baz" *) x = 1; $display(x); end diff --git a/test/basic/gate.sv b/test/basic/gate.sv index 039f020..93ae738 100644 --- a/test/basic/gate.sv +++ b/test/basic/gate.sv @@ -12,11 +12,19 @@ module top; not (output_not, input_a); buf #2 foo_name (output_buf_delay, input_a); + wire output_nand, output_or, output_nor, output_xor, output_xnor; + nand (output_nand, input_a, input_b); + or (output_or, input_a, input_b); + nor (output_nor, input_a, input_b); + xor (output_xor, input_a, input_b); + xnor (output_xnor, input_a, input_b); + initial repeat(2) begin $monitor("%3d ", $time, input_a, input_b, output_and, output_and_delay, - output_not, output_buf_delay); + output_not, output_buf_delay, + output_nand, output_or, output_nor, output_xor, output_xnor); #1; #1; input_a = 1; diff --git a/test/core/assert.sv b/test/core/assert.sv index 9eae45d..8ee0f04 100644 --- a/test/core/assert.sv +++ b/test/core/assert.sv @@ -5,8 +5,14 @@ module Module(input clock, input clear, input data); assert property ( @(posedge clock) disable iff(clear) x == y ); + named: assert property ( + @(posedge clock) disable iff(clear) x == y + ); task hello; $display("Hello!"); - assert property (x == y); endtask + always @(posedge clock) begin + assert property (x == y); + named_stmt: assert property (x == y); + end endmodule diff --git a/test/core/dimensions.sv b/test/core/dimensions.sv index c73b06d..7cc29d0 100644 --- a/test/core/dimensions.sv +++ b/test/core/dimensions.sv @@ -45,6 +45,8 @@ module top; $display("args %b", $size(RamPair, 1'h1)); $display("args %b", $size(RamPair, 1'd1)); $display("args %b", $size(RamPair, 1'dx)); + $display("args %b", $size(RamPair, '0)); + $display("args %b", $size(RamPair, 'x)); $display("args %b", $size(RamPair, $bits(integer) - 31)); $display("args %b", $size(integer, $bits(integer) - 31)); diff --git a/test/core/dimensions.v b/test/core/dimensions.v index 1c18807..b1c7eae 100644 --- a/test/core/dimensions.v +++ b/test/core/dimensions.v @@ -42,6 +42,8 @@ module top; $display("args %b", 2); $display("args %b", 2); $display("args %b", 1'bx); + $display("args %b", 1'bx); + $display("args %b", 1'bx); $display("args %b", 2); $display("args %b", 32); diff --git a/test/define/main.sv b/test/define/main.sv new file mode 100644 index 0000000..d4e9dab --- /dev/null +++ b/test/define/main.sv @@ -0,0 +1,7 @@ +`START +`ifdef DEFINED +`ifndef NOT_DEFINED + initial $display("Hi"); +`endif +`endif +`END diff --git a/test/define/main.v b/test/define/main.v new file mode 100644 index 0000000..bd4dce8 --- /dev/null +++ b/test/define/main.v @@ -0,0 +1,3 @@ +module top; + initial $display("Hi"); +endmodule diff --git a/test/define/run.sh b/test/define/run.sh new file mode 100755 index 0000000..7a5b1f1 --- /dev/null +++ b/test/define/run.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +test_main() { + runAndCapture -DDEFINED -DEND=endmodule -D"START=module top;" main.sv + assertTrue "conversion should succeed" $result + assertNotNull "stdout should not be empty" "$stdout" + assertNull "stderr should be empty" "$stderr" + + substituted=$SHUNIT_TMPDIR/main.sv + echo "$stdout" > $substituted + simpleTest $substituted main.v _ +} + +source ../lib/functions.sh + +. shunit2 diff --git a/test/nosim/do_while.sv b/test/nosim/do_while.sv new file mode 100644 index 0000000..0dd5bec --- /dev/null +++ b/test/nosim/do_while.sv @@ -0,0 +1,5 @@ +module top; + initial do + $display("hi"); + while (0); +endmodule diff --git a/test/nosim/drive_strength.sv b/test/nosim/drive_strength.sv new file mode 100644 index 0000000..8e05f21 --- /dev/null +++ b/test/nosim/drive_strength.sv @@ -0,0 +1,16 @@ +module top; + wire (supply0, supply1) a = 1; + wire (strong1, strong0) b = 1; + wire (pull0, highz1) c = 1; + wire (pull1, highz0) d = 1; + wire (highz0, weak1) e = 1; + wire (highz1, weak0) f = 1; + + wire u, v, w, x, y, z; + assign (supply0, supply1) u = 1; + assign (strong1, strong0) v = 1; + assign (pull0, highz1) w = 1; + assign (pull1, highz0) x = 1; + assign (highz0, weak1) y = 1; + assign (highz1, weak0) z = 1; +endmodule diff --git a/test/nosim/final.sv b/test/nosim/final.sv new file mode 100644 index 0000000..cd33b60 --- /dev/null +++ b/test/nosim/final.sv @@ -0,0 +1,3 @@ +module top; + final $display("bye"); +endmodule diff --git a/test/nosim/min_typ_max.sv b/test/nosim/min_typ_max.sv new file mode 100644 index 0000000..3772f23 --- /dev/null +++ b/test/nosim/min_typ_max.sv @@ -0,0 +1,3 @@ +module top; + initial #(1 : 2 : 3) $display("hi"); +endmodule diff --git a/test/nosim/net_type.sv b/test/nosim/net_type.sv new file mode 100644 index 0000000..dcfa7e3 --- /dev/null +++ b/test/nosim/net_type.sv @@ -0,0 +1,15 @@ +module top; +`define TEST(kw) kw a_``kw; + `TEST(supply0) + `TEST(supply1) + `TEST(tri) + `TEST(triand) + `TEST(trior) + `TEST(trireg) + `TEST(tri0) + `TEST(tri1) + `TEST(uwire) + `TEST(wire) + `TEST(wand) + `TEST(wor) +endmodule diff --git a/test/nosim/non_integer_type.sv b/test/nosim/non_integer_type.sv new file mode 100644 index 0000000..29cd4cf --- /dev/null +++ b/test/nosim/non_integer_type.sv @@ -0,0 +1,7 @@ +module top; + shortreal v [2]; + real w [2]; + realtime x [2]; + string y [2]; + event z [2]; +endmodule diff --git a/test/nosim/real.sv b/test/nosim/real.sv new file mode 100644 index 0000000..6f6d189 --- /dev/null +++ b/test/nosim/real.sv @@ -0,0 +1,4 @@ +module top; + real r = 3.14; + initial $display(r); +endmodule diff --git a/test/nosim/time.sv b/test/nosim/time.sv new file mode 100644 index 0000000..4b8a636 --- /dev/null +++ b/test/nosim/time.sv @@ -0,0 +1,4 @@ +module top; + time t = 1s; + initial $display(t); +endmodule diff --git a/test/warning/localparam.sv b/test/warning/localparam.sv new file mode 100644 index 0000000..4388bd1 --- /dev/null +++ b/test/warning/localparam.sv @@ -0,0 +1 @@ +localparam UNUSED = 1; diff --git a/test/warning/run.sh b/test/warning/run.sh index f3824ff..fae529e 100755 --- a/test/warning/run.sh +++ b/test/warning/run.sh @@ -1,5 +1,6 @@ #!/bin/bash +NO_FILES_WARNING="Warning: No input files specified (try \`sv2v --help\`)" PACKAGE_WARNING="Warning: Source includes packages but no modules. Please convert packages alongside the modules that use them." INTERFACE_WARNING="Warning: Source includes an interface but output is empty because there is no top-level module which has no ports which are interfaces." @@ -10,6 +11,13 @@ test_default() { assertNull "stderr should be empty" "$stderr" } +test_no_files() { + runAndCapture + assertTrue "conversion should succeed" $result + assertNull "stdout should be empty" "$stdout" + assertEquals "stderr should should have warning" "$NO_FILES_WARNING" "$stderr" +} + test_only_package() { runAndCapture package.sv assertTrue "conversion should succeed" $result @@ -38,6 +46,20 @@ test_only_interface_verbose() { assertEquals "stderr should have warning" "$INTERFACE_WARNING" "$stderr" } +test_only_localparam() { + runAndCapture localparam.sv + assertTrue "conversion should succeed" $result + assertNull "stdout should be empty" "$stdout" + assertNull "stderr should be empty" "$stderr" +} + +test_only_localparam_verbose() { + runAndCapture -v localparam.sv + assertTrue "conversion should succeed" $result + assertNotNull "stdout should not be empty" "$stdout" + assertNull "stderr should be empty" "$stderr" +} + source ../lib/functions.sh . shunit2