diff --git a/CHANGELOG.md b/CHANGELOG.md index 01dada1..cb94a5e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -19,6 +19,7 @@ * Support bare delay controls with real number delays * Fix parsing of sized ports with implicit directions * Ensure arrays used in nested ternary expressions are properly flattened +* Support parameters which use a type-of as the data type ## v0.0.8 diff --git a/src/Language/SystemVerilog/Parser/Parse.y b/src/Language/SystemVerilog/Parser/Parse.y index 7cdc918..3e05331 100644 --- a/src/Language/SystemVerilog/Parser/Parse.y +++ b/src/Language/SystemVerilog/Parser/Parse.y @@ -460,13 +460,13 @@ TypeAlias :: { Type } | Identifier ParamBindings "::" Identifier Dimensions { CSAlias $1 $2 $4 $5 } TypeNonIdent :: { Type } : PartialType OptSigning Dimensions { $1 $2 $3 } - | "type" "(" Expr ")" { TypeOf $3 } PartialType :: { Signing -> [Range] -> Type } : PartialTypeP { snd $1 } PartialTypeP :: { (Position, Signing -> [Range] -> Type) } : IntegerVectorTypeP { (fst $1, makeIntegerVector $1) } | IntegerAtomTypeP { (fst $1, makeIntegerAtom $1) } | NonIntegerTypeP { (fst $1, makeNonInteger $1) } + | "type" "(" Expr ")" { makeTypeOf $1 $3 } | "enum" EnumBaseType "{" EnumItems "}" { makeComplex $1 $ Enum $2 $4 } | "struct" Packing "{" StructItems "}" { makeComplex $1 $ Struct $2 $4 } | "union" Packing "{" StructItems "}" { makeComplex $1 $ Union $2 $4 } @@ -652,7 +652,6 @@ DeclToken :: { DeclToken } | "[" Expr "]" { DTBit (tokenPosition $1) $2 } | "." Identifier { DTDot (tokenPosition $1) $2 } | "automatic" { DTLifetime (tokenPosition $1) Automatic } - | "type" "(" Expr ")" { uncurry DTType $ makeTypeOf $1 $3 } | IncOrDecOperatorP { DTAsgn (fst $1) (AsgnOp $ snd $1) Nothing (RawNum 1) } | IdentifierP "::" Identifier { uncurry DTPSIdent $1 $3 } | IdentifierP ParamBindings "::" Identifier { uncurry DTCSIdent $1 $2 $4 } diff --git a/test/core/param_typeof.sv b/test/core/param_typeof.sv new file mode 100644 index 0000000..bb32a94 --- /dev/null +++ b/test/core/param_typeof.sv @@ -0,0 +1,12 @@ +module mod1; + parameter shortint X = 0; + parameter type(X) Y = 0; + initial $display("mod1 %0d %0d %b %b", X, Y, X, Y); +endmodule + +module mod2 #( + parameter shortint X = 0, + parameter type(X) Y = 0 +); + initial $display("mod2 %0d %0d %b %b", X, Y, X, Y); +endmodule diff --git a/test/core/param_typeof.v b/test/core/param_typeof.v new file mode 100644 index 0000000..bda6d41 --- /dev/null +++ b/test/core/param_typeof.v @@ -0,0 +1,12 @@ +module mod1; + parameter signed [15:0] X = 0; + parameter signed [15:0] Y = 0; + initial $display("mod1 %0d %0d %b %b", X, Y, X, Y); +endmodule + +module mod2 #( + parameter signed [15:0] X = 0, + parameter signed [15:0] Y = 0 +); + initial $display("mod2 %0d %0d %b %b", X, Y, X, Y); +endmodule diff --git a/test/core/param_typeof_tb.v b/test/core/param_typeof_tb.v new file mode 100644 index 0000000..c3670cd --- /dev/null +++ b/test/core/param_typeof_tb.v @@ -0,0 +1,10 @@ +module top; + mod1 m1_a(); + mod1 #( 1, 2) m1_b(); + mod1 #( 0, -1) m1_c(); + mod1 #(-3, -4) m1_d(); + mod2 m2_a(); + mod2 #( 1, 2) m2_b(); + mod2 #( 0, -1) m2_c(); + mod2 #(-3, -4) m2_d(); +endmodule