From 3d3359d35a4064bf2e45c494d6e5916b63c8fb3f Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Fri, 11 Oct 2019 19:31:41 -0400 Subject: [PATCH] apply BlockDecl conversions to tasks and functions --- src/Convert/BlockDecl.hs | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/src/Convert/BlockDecl.hs b/src/Convert/BlockDecl.hs index 7256ff0..bdafd03 100644 --- a/src/Convert/BlockDecl.hs +++ b/src/Convert/BlockDecl.hs @@ -15,9 +15,21 @@ import Language.SystemVerilog.AST convert :: [AST] -> [AST] convert = - map - $ traverseDescriptions $ traverseModuleItems - $ traverseStmts $ convertStmt + map $ traverseDescriptions $ traverseModuleItems + (convertModuleItem . traverseStmts convertStmt) + +convertModuleItem :: ModuleItem -> ModuleItem +convertModuleItem (MIPackageItem (Function ml t f decls stmts)) = + MIPackageItem $ Function ml t f decls' stmts' + where + Block Seq "" decls' stmts' = convertStmt $ + Block Seq "" decls stmts +convertModuleItem (MIPackageItem (Task ml f decls stmts)) = + MIPackageItem $ Task ml f decls' stmts' + where + Block Seq "" decls' stmts' = convertStmt $ + Block Seq "" decls stmts +convertModuleItem other = other convertStmt :: Stmt -> Stmt convertStmt (Block Seq name decls stmts) =