From 3979d294eb7bbf4c4f22096234c15ab1e67ce5d3 Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Sat, 12 Oct 2019 11:40:36 -0400 Subject: [PATCH] consistent size casting behavior - also adds $clog2 localparam substitution to Simplify --- src/Convert/Enum.hs | 9 +------ src/Convert/Simplify.hs | 36 +++++++++++++++----------- src/Language/SystemVerilog/AST/Expr.hs | 25 ------------------ test/basic/cast.sv | 8 ++++++ test/basic/cast.v | 8 ++++++ 5 files changed, 38 insertions(+), 48 deletions(-) diff --git a/src/Convert/Enum.hs b/src/Convert/Enum.hs index 8ac3b8e..adacd1e 100644 --- a/src/Convert/Enum.hs +++ b/src/Convert/Enum.hs @@ -93,17 +93,10 @@ toItem :: EnumItem -> PackageItem toItem ((mr, x), v) = Decl $ Param Localparam itemType x v' where - v' = if mr == Nothing - then simplify v - else sizedExpr x (rangeSize r) (simplify v) + v' = simplify v rs = maybe [] (\a -> [a]) mr - r = defaultRange mr itemType = Implicit Unspecified rs -defaultRange :: Maybe Range -> Range -defaultRange Nothing = (Number "0", Number "0") -defaultRange (Just r) = r - toBaseType :: Maybe Type -> Type toBaseType Nothing = defaultType toBaseType (Just (Implicit _ rs)) = diff --git a/src/Convert/Simplify.hs b/src/Convert/Simplify.hs index f217e69..368271b 100644 --- a/src/Convert/Simplify.hs +++ b/src/Convert/Simplify.hs @@ -49,31 +49,37 @@ traverseExprM = traverseNestedExprsM $ stately convertExpr convertExpr :: Info -> Expr -> Expr convertExpr info (Cast (Right c) e) = - case c' of - Number _ -> - if sized == e - then Cast (Right c') e - else sized - _ -> Cast (Right c') e + Cast (Right c') e where - c' = simplify $ traverseNestedExprs (substitute info) (simplify c) - sized = sizedExpr "" c' e + c' = simplify $ substitute info c convertExpr info (DimFn f v e) = DimFn f v e' where - e' = simplify $ traverseNestedExprs (substitute info) e + e' = simplify $ substitute info e +convertExpr info (Call Nothing "$clog2" (Args [Just e] [])) = + if clog2' == clog2 + then clog2 + else clog2' + where + e' = simplify $ substitute info e + clog2 = Call Nothing "$clog2" (Args [Just e'] []) + clog2' = simplify clog2 convertExpr info (Mux cc aa bb) = if before == after then Mux cc aa bb else simplify $ Mux after aa bb where - before = traverseNestedExprs (substitute info) (simplify cc) + before = substitute info cc after = simplify before convertExpr _ other = other substitute :: Info -> Expr -> Expr -substitute info (Ident x) = - case Map.lookup x info of - Nothing -> Ident x - Just e -> e -substitute _ other = other +substitute info expr = + traverseNestedExprs substitute' $ simplify expr + where + substitute' :: Expr -> Expr + substitute' (Ident x) = + case Map.lookup x info of + Nothing -> Ident x + Just e -> e + substitute' other = other diff --git a/src/Language/SystemVerilog/AST/Expr.hs b/src/Language/SystemVerilog/AST/Expr.hs index 478fe35..25fb242 100644 --- a/src/Language/SystemVerilog/AST/Expr.hs +++ b/src/Language/SystemVerilog/AST/Expr.hs @@ -19,7 +19,6 @@ module Language.SystemVerilog.AST.Expr , rangeSize , endianCondExpr , endianCondRange - , sizedExpr , dimensionsSize , readNumber ) where @@ -271,30 +270,6 @@ endianCondRange r r1 r2 = , endianCondExpr r (snd r1) (snd r2) ) --- attempts to make a number literal have an explicit size -sizedExpr :: Identifier -> Expr -> Expr -> Expr -sizedExpr x s (Number n) = - if size /= show resSize - then error $ "literal " ++ show n ++ " for " ++ show x - ++ " doesn't have size " ++ show size - else Number res - where - size = - case simplify s of - Number v -> v - other -> error $ "could not simplify sizedExpr: " ++ show other - unticked = case n of - '\'' : rest -> rest - rest -> rest - resSize = (read $ takeWhile (/= '\'') res) :: Int - res = case readMaybe unticked :: Maybe Int of - Nothing -> - if unticked == n - then n - else size ++ n - Just num -> size ++ "'d" ++ show num -sizedExpr _ _ e = e - dimensionsSize :: [Range] -> Expr dimensionsSize ranges = simplify $ diff --git a/test/basic/cast.sv b/test/basic/cast.sv index 99fe1e4..93febe3 100644 --- a/test/basic/cast.sv +++ b/test/basic/cast.sv @@ -1,4 +1,5 @@ module top; + parameter WIDTH = 32; initial begin logic [31:0] w = 1234; @@ -22,7 +23,14 @@ module top; $display("%0d %0d", y, ($clog2(WIDTH))'(y)); $display("%0d %0d", z, ($clog2(WIDTH))'(z)); end + localparam bit foo = '0; localparam logic [31:0] bar = 32'(foo); initial $display("%b %b", foo, bar); + + initial begin + $display("%b", 5'('1)); + $display("%b", 5'(1'sb1)); + end + endmodule diff --git a/test/basic/cast.v b/test/basic/cast.v index 99fd8aa..9b15639 100644 --- a/test/basic/cast.v +++ b/test/basic/cast.v @@ -1,4 +1,5 @@ module top; + initial begin : foo_block reg [31:0] w; reg signed [31:0] x; @@ -25,7 +26,14 @@ module top; $display("%0d %0d", y, $signed(y[4:0])); $display("%0d %0d", z, z[4:0]); end + localparam [0:0] foo = 0; localparam [31:0] bar = 32'b0; initial $display("%b %b", foo, bar); + + initial begin + $display("%b", 5'sb11111); + $display("%b", 5'sb11111); + end + endmodule