From 2d7dc00b8dbe58b9cd68025ff60e10234059461b Mon Sep 17 00:00:00 2001
From: Zachary Snow <zach@zachjs.com>
Date: Mon, 15 Feb 2021 16:58:56 -0500
Subject: [PATCH] fix concat of based xz literals with uneven chunks

---
 src/Language/SystemVerilog/AST/Number.hs |  5 +++--
 test/basic/number_concat.sv              | 11 +++++++++++
 test/basic/number_concat.v               | 11 +++++++++++
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/src/Language/SystemVerilog/AST/Number.hs b/src/Language/SystemVerilog/AST/Number.hs
index 4df2400..265c5f2 100644
--- a/src/Language/SystemVerilog/AST/Number.hs
+++ b/src/Language/SystemVerilog/AST/Number.hs
@@ -313,8 +313,9 @@ instance Semigroup Number where
                 if kinds1 == 0 && kinds2 == 0
                     then min base1 base2
                     else Binary
-            values = values2 + shiftL values1 size2
-            kinds = kinds2 + shiftL kinds1 size2
+            trim = flip mod . (2 ^)
+            values = trim size2 values2 + shiftL (trim size1 values1) size2
+            kinds = trim size2 kinds2 + shiftL (trim size1 kinds1) size2
             size1 = fromIntegral $ numberBitLength n1
             size2 = fromIntegral $ numberBitLength n2
             Based _ _ base1 values1 kinds1 = n1
diff --git a/test/basic/number_concat.sv b/test/basic/number_concat.sv
index 7ea17eb..19616e9 100644
--- a/test/basic/number_concat.sv
+++ b/test/basic/number_concat.sv
@@ -13,5 +13,16 @@ module top;
         `TEST('sh3, 'd0);
         `TEST('sh4, 'd0);
         `TEST('b0101, 'd0);
+        `TEST(17'hz, 1'b0);
+        `TEST(17'hzzzzz, 1'b0);
+        `TEST(17'hzzzzz, 1'bz);
+        `TEST(17'hzzzzz, 1'h0);
+        `TEST(17'hzzzzz, 1'h1);
+        `TEST(17'hzzzzz, 1'hx);
+        `TEST(17'hzzzzz, 1'hz);
+        `TEST(2'hx, 1'h0);
+        `TEST(2'hx, 1'h1);
+        `TEST(2'hx, 1'hx);
+        `TEST(2'hx, 1'hz);
     end
 endmodule
diff --git a/test/basic/number_concat.v b/test/basic/number_concat.v
index 6632a15..c9d60d7 100644
--- a/test/basic/number_concat.v
+++ b/test/basic/number_concat.v
@@ -13,5 +13,16 @@ module top;
         `TEST(32'sh3, 32'd0);
         `TEST(32'sh4, 32'd0);
         `TEST(32'sb0101, 32'd0);
+        `TEST(17'hz, 1'b0);
+        `TEST(17'hzzzzz, 1'b0);
+        `TEST(17'hzzzzz, 1'bz);
+        `TEST(17'hzzzzz, 1'h0);
+        `TEST(17'hzzzzz, 1'h1);
+        `TEST(17'hzzzzz, 1'hx);
+        `TEST(17'hzzzzz, 1'hz);
+        `TEST(2'hx, 1'h0);
+        `TEST(2'hx, 1'h1);
+        `TEST(2'hx, 1'hx);
+        `TEST(2'hx, 1'hz);
     end
 endmodule