From 24ab7aee24a0475cb83d6ed4dc55924d11b33b0a Mon Sep 17 00:00:00 2001 From: Zachary Snow Date: Sat, 26 Oct 2024 23:46:20 -0400 Subject: [PATCH] interface inlining records decls with attrs --- CHANGELOG.md | 2 ++ src/Convert/Interface.hs | 4 ++-- test/core/interface_array.sv | 2 +- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d9df33b..e9b36ff 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,6 +18,8 @@ left-hand side of an assignment * Fixed `input signed` ports of interface-using modules producing invalid declarations after inlining +* Fixed inlining of interfaces and interface-bound modules containing port + declarations tagged with an attribute * Fixed `` `resetall `` not resetting the `` `default_nettype `` ### Other Enhancements diff --git a/src/Convert/Interface.hs b/src/Convert/Interface.hs index 74fa350..1ecdfb9 100644 --- a/src/Convert/Interface.hs +++ b/src/Convert/Interface.hs @@ -691,8 +691,8 @@ inlineInstance global ranges modportBindings items partName then idn instanceName else bit (idn instanceName) (Ident loopVar) - declDirs = execWriter $ - mapM (collectDeclsM collectDeclDir) items + declDirs = execWriter $ mapM + (collectNestedModuleItemsM $ collectDeclsM collectDeclDir) items collectDeclDir :: Decl -> Writer (Map.Map Identifier Direction) () collectDeclDir (Variable dir _ ident _ _) = when (dir /= Local) $ diff --git a/test/core/interface_array.sv b/test/core/interface_array.sv index 86b3fc3..11a1d8b 100644 --- a/test/core/interface_array.sv +++ b/test/core/interface_array.sv @@ -1,5 +1,5 @@ interface Interface(i); - input i; + (* test *) input i; logic v; logic o; task tick;