diff --git a/src/Convert/PackedArray.hs b/src/Convert/PackedArray.hs
index b83ef1e..e67cd4d 100644
--- a/src/Convert/PackedArray.hs
+++ b/src/Convert/PackedArray.hs
@@ -157,7 +157,7 @@ unflattener writeToFlatVariant arr (t, (majorHi, majorLo)) =
             (index, majorLo)
             (BinOp Le (Ident index) majorHi)
             (index, AsgnOp Add, Number "1")
-            (prefix "unflatten")
+            (Just $ prefix "unflatten")
             [ localparam startBit
                 (simplify $ BinOp Add majorLo
                     (BinOp Mul (Ident index) size))
diff --git a/src/Language/SystemVerilog/AST.hs b/src/Language/SystemVerilog/AST.hs
index 01d0570..b5c39d4 100644
--- a/src/Language/SystemVerilog/AST.hs
+++ b/src/Language/SystemVerilog/AST.hs
@@ -515,7 +515,7 @@ type GenCase = ([Expr], GenItem)
 data GenItem
   = GenBlock (Maybe Identifier) [GenItem]
   | GenCase  Expr [GenCase] (Maybe GenItem)
-  | GenFor   (Identifier, Expr) Expr (Identifier, AsgnOp, Expr) Identifier [GenItem]
+  | GenFor   (Identifier, Expr) Expr (Identifier, AsgnOp, Expr) (Maybe Identifier) [GenItem]
   | GenIf    Expr GenItem GenItem
   | GenNull
   | GenModuleItem ModuleItem
@@ -529,7 +529,7 @@ instance Show GenItem where
   show (GenCase e c (Just d)) = printf "case (%s)\n%s\n\tdefault:\n%s\nendcase" (show e) (indent $ unlines' $ map showCase c) (indent $ indent $ show d)
   show (GenIf e a GenNull)    = printf "if (%s) %s"          (show e) (show a)
   show (GenIf e a b      )    = printf "if (%s) %s\nelse %s" (show e) (show a) (show b)
-  show (GenFor (x1, e1) c (x2, o2, e2) x is) = printf "for (%s = %s; %s; %s %s %s) %s" x1 (show e1) (show c) x2 (show o2) (show e2) (show $ GenBlock (Just x) is)
+  show (GenFor (x1, e1) c (x2, o2, e2) mx is) = printf "for (%s = %s; %s; %s %s %s) %s" x1 (show e1) (show c) x2 (show o2) (show e2) (show $ GenBlock mx is)
   show GenNull = ";"
   show (GenModuleItem item) = show item
 
diff --git a/src/Language/SystemVerilog/Parser/Parse.y b/src/Language/SystemVerilog/Parser/Parse.y
index be5fe3a..5c7d076 100644
--- a/src/Language/SystemVerilog/Parser/Parse.y
+++ b/src/Language/SystemVerilog/Parser/Parse.y
@@ -411,8 +411,8 @@ Stmt :: { Stmt }
   | Identifier      ";" { Subroutine $1 [] }
 StmtNonAsgn :: { Stmt }
   : ";" { Null }
-  | "begin"                DeclsAndStmts "end" { Block Nothing   (fst $2) (snd $2) }
-  | "begin" ":" Identifier DeclsAndStmts "end" { Block (Just $3) (fst $4) (snd $4) }
+  | "begin"                DeclsAndStmts "end" opt(Tag) { Block Nothing   (fst $2) (snd $2) }
+  | "begin" ":" Identifier DeclsAndStmts "end" opt(Tag) { Block (Just $3) (fst $4) (snd $4) }
   | "if" "(" Expr ")" Stmt "else" Stmt         { If $3 $5 $7        }
   | "if" "(" Expr ")" Stmt %prec NoElse        { If $3 $5 Null      }
   | "for" "(" Identifier "=" Expr ";" Expr ";" Identifier "=" Expr ")" Stmt { For ($3, $5) $7 ($9, $11) $13 }
@@ -564,13 +564,16 @@ GenItems :: { [GenItem] }
 GenItem :: { GenItem }
   : "if" "(" Expr ")" GenItemOrNull "else" GenItemOrNull { GenIf $3 $5 $7      }
   | "if" "(" Expr ")" GenItemOrNull %prec NoElse         { GenIf $3 $5 GenNull }
-  | "begin"                GenItems "end"                { GenBlock Nothing   $2 }
-  | "begin" ":" Identifier GenItems "end"                { GenBlock (Just $3) $4 }
+  | GenBlock                                             { uncurry GenBlock $1 }
   | "case" "(" Expr ")" GenCases opt(GenCaseDefault) "endcase" { GenCase $3 $5 $6 }
-  | "for" "(" Identifier "=" Expr ";" Expr ";" GenvarIteration ")" "begin" ":" Identifier GenItems "end" { GenFor ($3, $5) $7 $9 $13 $14 }
+  | "for" "(" Identifier "=" Expr ";" Expr ";" GenvarIteration ")" GenBlock { (uncurry $ GenFor ($3, $5) $7 $9) $11  }
   -- TODO: We should restrict it to the module items that are actually allowed.
   | ModuleItem { genItemsToGenItem $ map GenModuleItem $1 }
 
+GenBlock :: { (Maybe Identifier, [GenItem]) }
+  : "begin"                GenItems "end" opt(Tag) { (Nothing, $2) }
+  | "begin" ":" Identifier GenItems "end" opt(Tag) { (Just $3, $4) }
+
 GenCases :: { [GenCase] }
   : {- empty -}      { [] }
   | GenCases GenCase { $1 ++ [$2] }